[PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels

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* [PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels
@ 2026-05-12 13:32 Ankit Nautiyal
  2026-05-12 13:32 ` [PATCH 1/6] drm/i915/display: Deprecate TRANS_VSYNC where VRR TG is always on Ankit Nautiyal
                   ` (9 more replies)
  0 siblings, 10 replies; 12+ messages in thread
From: Ankit Nautiyal @ 2026-05-12 13:32 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: ville.syrjala, jani.nikula, navaremanasi, Ankit Nautiyal

Currently intel_panel_fixed_mode() can return a lower refresh rate mode
for VRR panels if the lower refresh rate mode is first in the list.
This creates problems for seamless switch features like LRR and
Seamless-DRRS, as it results in changes to vsync_start/end causing a
full modeset instead of a seamless switch.

This is particularly problematic for DRRS panels on platforms without
double buffered M/N support for LNL+ (display version 20+), where
seamless clock changes are not possible.

This series attempts to fix this by:
1. Adding a helper to get the highest refresh rate mode from the list of
   fixed modes for a connector.
2. When a seamless switch to a lower mode is desired, making
   intel_panel_fixed_mode() return the highest refresh rate mode,
   provided the requested rate is in VRR range. The vblank is then
   extended to provide the desired refresh rate.

To determine whether a full modeset or seamless switch is intended, the
connector state is checked for the allow_modeset flag. A nullable
conn_state parameter is added to intel_panel_fixed_mode() and
intel_panel_compute_config() for this purpose.

Rev2:
 - Address Ville's comments to preserve Vtotal-Vsync distance while
   adjusting VTOTAL.
 - Address Manasi's comments to always go with highest RR mode
   irrespective of allow_modeset flag for modes that have same clock but
   different votal.

Ankit Nautiyal (6):
  drm/i915/display: Deprecate TRANS_VSYNC where VRR TG is always on
  drm/i915/panel: Preserve Vtotal-Vsync distance while adjusting vtotal
  drm/i915/intel_panel: Add a helper to get the highest refresh rate
    mode
  drm/i915/intel_panel: Pass crtc_state to intel_panel_compute_config
  drm/i915/intel_panel: Use highest refresh rate mode for VRR panels
  drm/i915/intel_panel: Refine VRR fixed mode selection for DRRS panels

 drivers/gpu/drm/i915/display/icl_dsi.c       |  2 +-
 drivers/gpu/drm/i915/display/intel_display.c | 19 +++-
 drivers/gpu/drm/i915/display/intel_dp.c      |  2 +-
 drivers/gpu/drm/i915/display/intel_dvo.c     |  2 +-
 drivers/gpu/drm/i915/display/intel_lvds.c    |  2 +-
 drivers/gpu/drm/i915/display/intel_panel.c   | 94 ++++++++++++++++----
 drivers/gpu/drm/i915/display/intel_panel.h   |  9 +-
 drivers/gpu/drm/i915/display/intel_sdvo.c    |  8 +-
 drivers/gpu/drm/i915/display/intel_vrr.c     | 31 +++++--
 drivers/gpu/drm/i915/display/vlv_dsi.c       |  2 +-
 10 files changed, 130 insertions(+), 41 deletions(-)

-- 
2.45.2

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH 1/6] drm/i915/display: Deprecate TRANS_VSYNC where VRR TG is always on
  2026-05-12 13:32 [PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels Ankit Nautiyal
@ 2026-05-12 13:32 ` Ankit Nautiyal
  2026-05-19 14:56   ` Ville Syrjälä
  2026-05-12 13:32 ` [PATCH 2/6] drm/i915/panel: Preserve Vtotal-Vsync distance while adjusting vtotal Ankit Nautiyal
                   ` (8 subsequent siblings)
  9 siblings, 1 reply; 12+ messages in thread
From: Ankit Nautiyal @ 2026-05-12 13:32 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: ville.syrjala, jani.nikula, navaremanasi, Ankit Nautiyal

The VRR Timing generator does not use TRANS_VSYNC register, instead it
use TRANS_VRR_VSYNC registers for both variable and fixed timings.

Avoid using TRANS_VSYNC registers for platforms that always use VRR
timing generator. The crtc_vsync_{start, end} fields of the adjusted
mode can still be filled with the Vsync start/end values, while readback
these can be derived from TRANS_VRR_VSYNC. Since the TRANS_VRR_VSYNC
register has vrr_vsync_{start,end} measured from the Vtotal, to get the
crtc_vsync_{start, end} we need to subtract the vrr values from the
Vtotal.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++---
 drivers/gpu/drm/i915/display/intel_vrr.c     | 31 ++++++++++++++------
 2 files changed, 37 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d5cf1476c7b9..548a12aff88f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2653,6 +2653,7 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
 	u32 crtc_vdisplay, crtc_vtotal, crtc_vblank_start, crtc_vblank_end;
+	u32 crtc_vsync_start, crtc_vsync_end;
 	int vsyncshift = 0;
 
 	drm_WARN_ON(display->drm, transcoder_is_dsi(cpu_transcoder));
@@ -2727,9 +2728,17 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
 	intel_de_write(display, TRANS_VBLANK(display, cpu_transcoder),
 		       VBLANK_START(crtc_vblank_start - 1) |
 		       VBLANK_END(crtc_vblank_end - 1));
+	if (intel_vrr_always_use_vrr_tg(display)) {
+		crtc_vsync_start = 1;
+		crtc_vsync_end = 1;
+	} else {
+		crtc_vsync_start = adjusted_mode->crtc_vsync_start;
+		crtc_vsync_end = adjusted_mode->crtc_vsync_end;
+	}
+
 	intel_de_write(display, TRANS_VSYNC(display, cpu_transcoder),
-		       VSYNC_START(adjusted_mode->crtc_vsync_start - 1) |
-		       VSYNC_END(adjusted_mode->crtc_vsync_end - 1));
+		       VSYNC_START(crtc_vsync_start - 1) |
+		       VSYNC_END(crtc_vsync_end - 1));
 
 	/* Workaround: when the EDP input selection is B, the VTOTAL_B must be
 	 * programmed with the VTOTAL_EDP value. Same for VTOTAL_C. This is
@@ -5162,8 +5171,10 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 	PIPE_CONF_CHECK_I(name.crtc_vdisplay); \
 	if (!fastset || !allow_vblank_delay_fastset(current_config)) \
 		PIPE_CONF_CHECK_I(name.crtc_vblank_start); \
-	PIPE_CONF_CHECK_I(name.crtc_vsync_start); \
-	PIPE_CONF_CHECK_I(name.crtc_vsync_end); \
+	if (!intel_vrr_always_use_vrr_tg(display)) { \
+		PIPE_CONF_CHECK_I(name.crtc_vsync_start); \
+		PIPE_CONF_CHECK_I(name.crtc_vsync_end); \
+	} \
 	if (!fastset || !pipe_config->update_lrr) { \
 		PIPE_CONF_CHECK_I(name.crtc_vtotal); \
 		PIPE_CONF_CHECK_I(name.crtc_vblank_end); \
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 1b09992ce9fd..24aa74475e64 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -1099,24 +1099,37 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
 			crtc_state->vrr.vmin += intel_vrr_vmin_flipline_offset(display);
 		}
 
+		if (HAS_AS_SDP(display)) {
+			trans_vrr_vsync =
+				intel_de_read(display,
+					      TRANS_VRR_VSYNC(display, cpu_transcoder));
+			crtc_state->vrr.vsync_start =
+				REG_FIELD_GET(VRR_VSYNC_START_MASK, trans_vrr_vsync);
+			crtc_state->vrr.vsync_end =
+				REG_FIELD_GET(VRR_VSYNC_END_MASK, trans_vrr_vsync);
+		}
+
 		/*
 		 * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
 		 * bits are not filled. Since for these platforms TRAN_VMIN is always
 		 * filled with crtc_vtotal, use TRAN_VRR_VMIN to get the vtotal for
 		 * adjusted_mode.
+		 *
+		 * Similarly Vsync start/end are also not used when VRR TG is used.
+		 * Use the TRANS_VRR_VSYNC to fill these. Since these are relative
+		 * from the Vtotal, subtract from the crtc_vtotal to get the correct
+		 * value.
 		 */
-		if (intel_vrr_always_use_vrr_tg(display))
+		if (intel_vrr_always_use_vrr_tg(display)) {
 			crtc_state->hw.adjusted_mode.crtc_vtotal =
 				intel_vrr_vmin_vtotal(crtc_state);
 
-		if (HAS_AS_SDP(display)) {
-			trans_vrr_vsync =
-				intel_de_read(display,
-					      TRANS_VRR_VSYNC(display, cpu_transcoder));
-			crtc_state->vrr.vsync_start =
-				REG_FIELD_GET(VRR_VSYNC_START_MASK, trans_vrr_vsync);
-			crtc_state->vrr.vsync_end =
-				REG_FIELD_GET(VRR_VSYNC_END_MASK, trans_vrr_vsync);
+			crtc_state->hw.adjusted_mode.crtc_vsync_start =
+				crtc_state->hw.adjusted_mode.crtc_vtotal -
+				crtc_state->vrr.vsync_start;
+			crtc_state->hw.adjusted_mode.crtc_vsync_end =
+				crtc_state->hw.adjusted_mode.crtc_vtotal -
+				crtc_state->vrr.vsync_end;
 		}
 	}
 
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* Re: [PATCH 1/6] drm/i915/display: Deprecate TRANS_VSYNC where VRR TG is always on
  2026-05-12 13:32 ` [PATCH 1/6] drm/i915/display: Deprecate TRANS_VSYNC where VRR TG is always on Ankit Nautiyal
@ 2026-05-19 14:56   ` Ville Syrjälä
  0 siblings, 0 replies; 12+ messages in thread
From: Ville Syrjälä @ 2026-05-19 14:56 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-gfx, intel-xe, jani.nikula, navaremanasi

On Tue, May 12, 2026 at 07:02:44PM +0530, Ankit Nautiyal wrote:
> The VRR Timing generator does not use TRANS_VSYNC register, instead it
> use TRANS_VRR_VSYNC registers for both variable and fixed timings.
> 
> Avoid using TRANS_VSYNC registers for platforms that always use VRR
> timing generator. The crtc_vsync_{start, end} fields of the adjusted
> mode can still be filled with the Vsync start/end values, while readback
> these can be derived from TRANS_VRR_VSYNC. Since the TRANS_VRR_VSYNC
> register has vrr_vsync_{start,end} measured from the Vtotal, to get the
> crtc_vsync_{start, end} we need to subtract the vrr values from the
> Vtotal.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++---
>  drivers/gpu/drm/i915/display/intel_vrr.c     | 31 ++++++++++++++------
>  2 files changed, 37 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index d5cf1476c7b9..548a12aff88f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2653,6 +2653,7 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
>  	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>  	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>  	u32 crtc_vdisplay, crtc_vtotal, crtc_vblank_start, crtc_vblank_end;
> +	u32 crtc_vsync_start, crtc_vsync_end;
>  	int vsyncshift = 0;
>  
>  	drm_WARN_ON(display->drm, transcoder_is_dsi(cpu_transcoder));
> @@ -2727,9 +2728,17 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
>  	intel_de_write(display, TRANS_VBLANK(display, cpu_transcoder),
>  		       VBLANK_START(crtc_vblank_start - 1) |
>  		       VBLANK_END(crtc_vblank_end - 1));
> +	if (intel_vrr_always_use_vrr_tg(display)) {
> +		crtc_vsync_start = 1;
> +		crtc_vsync_end = 1;

At least the vsync interrupt still uses TRANS_VSYNC on LNL, even when
using the VRR timing generator. So I don't think we want to do this
until the hardware has really stopped using TRANS_VSYNC, which perhaps
means NVL+. I still need to check how PTL behaves...

> +	} else {
> +		crtc_vsync_start = adjusted_mode->crtc_vsync_start;
> +		crtc_vsync_end = adjusted_mode->crtc_vsync_end;
> +	}
> +
>  	intel_de_write(display, TRANS_VSYNC(display, cpu_transcoder),
> -		       VSYNC_START(adjusted_mode->crtc_vsync_start - 1) |
> -		       VSYNC_END(adjusted_mode->crtc_vsync_end - 1));
> +		       VSYNC_START(crtc_vsync_start - 1) |
> +		       VSYNC_END(crtc_vsync_end - 1));
>  
>  	/* Workaround: when the EDP input selection is B, the VTOTAL_B must be
>  	 * programmed with the VTOTAL_EDP value. Same for VTOTAL_C. This is
> @@ -5162,8 +5171,10 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  	PIPE_CONF_CHECK_I(name.crtc_vdisplay); \
>  	if (!fastset || !allow_vblank_delay_fastset(current_config)) \
>  		PIPE_CONF_CHECK_I(name.crtc_vblank_start); \
> -	PIPE_CONF_CHECK_I(name.crtc_vsync_start); \
> -	PIPE_CONF_CHECK_I(name.crtc_vsync_end); \
> +	if (!intel_vrr_always_use_vrr_tg(display)) { \
> +		PIPE_CONF_CHECK_I(name.crtc_vsync_start); \
> +		PIPE_CONF_CHECK_I(name.crtc_vsync_end); \

IMO we should just handle these through the LRR codepath, just like
vtotal and vblank_end.

> +	} \
>  	if (!fastset || !pipe_config->update_lrr) { \
>  		PIPE_CONF_CHECK_I(name.crtc_vtotal); \
>  		PIPE_CONF_CHECK_I(name.crtc_vblank_end); \
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 1b09992ce9fd..24aa74475e64 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -1099,24 +1099,37 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
>  			crtc_state->vrr.vmin += intel_vrr_vmin_flipline_offset(display);
>  		}
>  
> +		if (HAS_AS_SDP(display)) {
> +			trans_vrr_vsync =
> +				intel_de_read(display,
> +					      TRANS_VRR_VSYNC(display, cpu_transcoder));
> +			crtc_state->vrr.vsync_start =
> +				REG_FIELD_GET(VRR_VSYNC_START_MASK, trans_vrr_vsync);
> +			crtc_state->vrr.vsync_end =
> +				REG_FIELD_GET(VRR_VSYNC_END_MASK, trans_vrr_vsync);
> +		}
> +
>  		/*
>  		 * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
>  		 * bits are not filled. Since for these platforms TRAN_VMIN is always
>  		 * filled with crtc_vtotal, use TRAN_VRR_VMIN to get the vtotal for
>  		 * adjusted_mode.
> +		 *
> +		 * Similarly Vsync start/end are also not used when VRR TG is used.
> +		 * Use the TRANS_VRR_VSYNC to fill these. Since these are relative
> +		 * from the Vtotal, subtract from the crtc_vtotal to get the correct
> +		 * value.
>  		 */
> -		if (intel_vrr_always_use_vrr_tg(display))
> +		if (intel_vrr_always_use_vrr_tg(display)) {
>  			crtc_state->hw.adjusted_mode.crtc_vtotal =
>  				intel_vrr_vmin_vtotal(crtc_state);
>  
> -		if (HAS_AS_SDP(display)) {
> -			trans_vrr_vsync =
> -				intel_de_read(display,
> -					      TRANS_VRR_VSYNC(display, cpu_transcoder));
> -			crtc_state->vrr.vsync_start =
> -				REG_FIELD_GET(VRR_VSYNC_START_MASK, trans_vrr_vsync);
> -			crtc_state->vrr.vsync_end =
> -				REG_FIELD_GET(VRR_VSYNC_END_MASK, trans_vrr_vsync);
> +			crtc_state->hw.adjusted_mode.crtc_vsync_start =
> +				crtc_state->hw.adjusted_mode.crtc_vtotal -
> +				crtc_state->vrr.vsync_start;
> +			crtc_state->hw.adjusted_mode.crtc_vsync_end =
> +				crtc_state->hw.adjusted_mode.crtc_vtotal -
> +				crtc_state->vrr.vsync_end;
>  		}
>  	}
>  
> -- 
> 2.45.2

-- 
Ville Syrjälä
Intel

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH 2/6] drm/i915/panel: Preserve Vtotal-Vsync distance while adjusting vtotal
  2026-05-12 13:32 [PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels Ankit Nautiyal
  2026-05-12 13:32 ` [PATCH 1/6] drm/i915/display: Deprecate TRANS_VSYNC where VRR TG is always on Ankit Nautiyal
@ 2026-05-12 13:32 ` Ankit Nautiyal
  2026-05-12 13:32 ` [PATCH 3/6] drm/i915/intel_panel: Add a helper to get the highest refresh rate mode Ankit Nautiyal
                   ` (7 subsequent siblings)
  9 siblings, 0 replies; 12+ messages in thread
From: Ankit Nautiyal @ 2026-05-12 13:32 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: ville.syrjala, jani.nikula, navaremanasi, Ankit Nautiyal

As we increase the vtotal to accomodate lower resfresh rate for fixed
modes, adjust the vtotal-vsync distance also.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_panel.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 20c548eea6da..14c7eea8ccb1 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -237,11 +237,18 @@ int intel_panel_compute_config(struct intel_connector *connector,
 
 	drm_mode_copy(adjusted_mode, fixed_mode);
 
-	if (is_vrr && fixed_mode_vrefresh != vrefresh)
+	if (is_vrr && fixed_mode_vrefresh != vrefresh) {
+		int vsync_start_diff = adjusted_mode->vtotal - adjusted_mode->vsync_start;
+		int vsync_end_diff = adjusted_mode->vtotal - adjusted_mode->vsync_end;
+
 		adjusted_mode->vtotal =
 			DIV_ROUND_CLOSEST(adjusted_mode->clock * 1000,
 					  adjusted_mode->htotal * vrefresh);
 
+		adjusted_mode->vsync_start = adjusted_mode->vtotal - vsync_start_diff;
+		adjusted_mode->vsync_end = adjusted_mode->vtotal - vsync_end_diff;
+	}
+
 	drm_mode_set_crtcinfo(adjusted_mode, 0);
 
 	return 0;
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH 3/6] drm/i915/intel_panel: Add a helper to get the highest refresh rate mode
  2026-05-12 13:32 [PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels Ankit Nautiyal
  2026-05-12 13:32 ` [PATCH 1/6] drm/i915/display: Deprecate TRANS_VSYNC where VRR TG is always on Ankit Nautiyal
  2026-05-12 13:32 ` [PATCH 2/6] drm/i915/panel: Preserve Vtotal-Vsync distance while adjusting vtotal Ankit Nautiyal
@ 2026-05-12 13:32 ` Ankit Nautiyal
  2026-05-12 13:32 ` [PATCH 4/6] drm/i915/intel_panel: Pass crtc_state to intel_panel_compute_config Ankit Nautiyal
                   ` (6 subsequent siblings)
  9 siblings, 0 replies; 12+ messages in thread
From: Ankit Nautiyal @ 2026-05-12 13:32 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: ville.syrjala, jani.nikula, navaremanasi, Ankit Nautiyal

Introduce a helper intel_panel_highest_vrefresh_mode() to get the
highest refresh rate mode from the list of fixed modes for a connector.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_panel.c | 15 +++++++++++++++
 drivers/gpu/drm/i915/display/intel_panel.h |  2 ++
 2 files changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 14c7eea8ccb1..6577c6bf5a88 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -158,6 +158,21 @@ intel_panel_highest_mode(struct intel_connector *connector,
 	return best_mode;
 }
 
+const struct drm_display_mode *
+intel_panel_highest_vrefresh_mode(struct intel_connector *connector)
+{
+	const struct drm_display_mode *fixed_mode, *best_mode = NULL;
+
+	/* pick the fixed_mode that has the highest vrefresh */
+	list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
+		if (!best_mode ||
+		    drm_mode_vrefresh(fixed_mode) > drm_mode_vrefresh(best_mode))
+			best_mode = fixed_mode;
+	}
+
+	return best_mode;
+}
+
 int intel_panel_get_modes(struct intel_connector *connector)
 {
 	const struct drm_display_mode *fixed_mode;
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index 23bd227826c9..fe4d80a41d4c 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -39,6 +39,8 @@ intel_panel_downclock_mode(struct intel_connector *connector,
 const struct drm_display_mode *
 intel_panel_highest_mode(struct intel_connector *connector,
 			 const struct drm_display_mode *adjusted_mode);
+const struct drm_display_mode *
+intel_panel_highest_vrefresh_mode(struct intel_connector *connector);
 int intel_panel_get_modes(struct intel_connector *connector);
 enum drrs_type intel_panel_drrs_type(struct intel_connector *connector);
 enum drm_mode_status
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH 4/6] drm/i915/intel_panel: Pass crtc_state to intel_panel_compute_config
  2026-05-12 13:32 [PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels Ankit Nautiyal
                   ` (2 preceding siblings ...)
  2026-05-12 13:32 ` [PATCH 3/6] drm/i915/intel_panel: Add a helper to get the highest refresh rate mode Ankit Nautiyal
@ 2026-05-12 13:32 ` Ankit Nautiyal
  2026-05-12 13:32 ` [PATCH 5/6] drm/i915/intel_panel: Use highest refresh rate mode for VRR panels Ankit Nautiyal
                   ` (5 subsequent siblings)
  9 siblings, 0 replies; 12+ messages in thread
From: Ankit Nautiyal @ 2026-05-12 13:32 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: ville.syrjala, jani.nikula, navaremanasi, Ankit Nautiyal

Change intel_panel_compute_config() to take intel_crtc_state instead of
drm_display_mode, to better match the convention used by encoder
compute_config hooks. The adjusted_mode is derived internally from
crtc_state->hw.adjusted_mode.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c     | 2 +-
 drivers/gpu/drm/i915/display/intel_dp.c    | 2 +-
 drivers/gpu/drm/i915/display/intel_dvo.c   | 2 +-
 drivers/gpu/drm/i915/display/intel_lvds.c  | 2 +-
 drivers/gpu/drm/i915/display/intel_panel.c | 4 +++-
 drivers/gpu/drm/i915/display/intel_panel.h | 4 +++-
 drivers/gpu/drm/i915/display/intel_sdvo.c  | 5 +++--
 drivers/gpu/drm/i915/display/vlv_dsi.c     | 2 +-
 8 files changed, 14 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index afbaa0465842..b8ec8c1d9865 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1671,7 +1671,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
 	pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
 	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 
-	ret = intel_panel_compute_config(intel_connector, adjusted_mode);
+	ret = intel_panel_compute_config(intel_connector, pipe_config, conn_state->state);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 2151766546e6..284b1b7a6af3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3598,7 +3598,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	int ret = 0, link_bpp_x16;
 
 	if (intel_dp_is_edp(intel_dp)) {
-		ret = intel_panel_compute_config(connector, adjusted_mode);
+		ret = intel_panel_compute_config(connector, pipe_config, conn_state->state);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index dd1a995c2979..5579f0072362 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -256,7 +256,7 @@ static int intel_dvo_compute_config(struct intel_encoder *encoder,
 	 * with the panel scaling set up to source from the H/VDisplay
 	 * of the original mode.
 	 */
-	ret = intel_panel_compute_config(connector, adjusted_mode);
+	ret = intel_panel_compute_config(connector, pipe_config, conn_state->state);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index ab6ba08ac091..b74ad1bd4069 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -459,7 +459,7 @@ static int intel_lvds_compute_config(struct intel_encoder *encoder,
 	 * with the panel scaling set up to source from the H/VDisplay
 	 * of the original mode.
 	 */
-	ret = intel_panel_compute_config(connector, adjusted_mode);
+	ret = intel_panel_compute_config(connector, crtc_state, conn_state->state);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 6577c6bf5a88..2765d87ddca7 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -213,8 +213,10 @@ enum drrs_type intel_panel_drrs_type(struct intel_connector *connector)
 }
 
 int intel_panel_compute_config(struct intel_connector *connector,
-			       struct drm_display_mode *adjusted_mode)
+			       struct intel_crtc_state *crtc_state,
+			       const struct drm_atomic_commit *state)
 {
+	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
 	const struct drm_display_mode *fixed_mode =
 		intel_panel_fixed_mode(connector, adjusted_mode);
 	int vrefresh, fixed_mode_vrefresh;
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index fe4d80a41d4c..3c4ff6735c21 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -10,6 +10,7 @@
 
 enum drm_connector_status;
 enum drrs_type;
+struct drm_atomic_commit;
 struct drm_connector;
 struct drm_connector_state;
 struct drm_display_mode;
@@ -48,7 +49,8 @@ intel_panel_mode_valid(struct intel_connector *connector,
 		       const struct drm_display_mode *mode,
 		       int *target_clock);
 int intel_panel_compute_config(struct intel_connector *connector,
-			       struct drm_display_mode *adjusted_mode);
+			       struct intel_crtc_state *crtc_state,
+			       const struct drm_atomic_commit *state);
 void intel_panel_add_edid_fixed_modes(struct intel_connector *connector,
 				      bool use_alt_fixed_modes);
 void intel_panel_add_vbt_lfp_fixed_mode(struct intel_connector *connector);
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 23c511a9a2ad..e11c1dfc602a 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -797,7 +797,7 @@ intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 
 	if (IS_LVDS(intel_sdvo_connector)) {
 		const struct drm_display_mode *fixed_mode =
-			intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
+intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
 
 		if (fixed_mode->hdisplay != args.width ||
 		    fixed_mode->vdisplay != args.height)
@@ -1399,7 +1399,8 @@ static int intel_sdvo_compute_config(struct intel_encoder *encoder,
 		int ret;
 
 		ret = intel_panel_compute_config(&intel_sdvo_connector->base,
-						 adjusted_mode);
+						 pipe_config,
+						 conn_state->state);
 		if (ret)
 			return ret;
 
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index 76e8cd0f65a4..13ea5b4f57ad 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -280,7 +280,7 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder,
 	pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
 	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 
-	ret = intel_panel_compute_config(intel_connector, adjusted_mode);
+	ret = intel_panel_compute_config(intel_connector, pipe_config, conn_state->state);
 	if (ret)
 		return ret;
 
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH 5/6] drm/i915/intel_panel: Use highest refresh rate mode for VRR panels
  2026-05-12 13:32 [PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels Ankit Nautiyal
                   ` (3 preceding siblings ...)
  2026-05-12 13:32 ` [PATCH 4/6] drm/i915/intel_panel: Pass crtc_state to intel_panel_compute_config Ankit Nautiyal
@ 2026-05-12 13:32 ` Ankit Nautiyal
  2026-05-12 13:32 ` [PATCH 6/6] drm/i915/intel_panel: Refine VRR fixed mode selection for DRRS panels Ankit Nautiyal
                   ` (4 subsequent siblings)
  9 siblings, 0 replies; 12+ messages in thread
From: Ankit Nautiyal @ 2026-05-12 13:32 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: ville.syrjala, jani.nikula, navaremanasi, Ankit Nautiyal

intel_panel_fixed_mode() intends to choose a fixed mode at or above the
requested refresh rate for VRR panels, so the requested refresh can be
reached by extending vblank.

However, as per the current logic in is_best_fixed_mode(), the helper
can return a lower refresh rate mode if it appears first in the list of
fixed modes. This is because is_best_fixed_mode() picks the closest
match, and the VRR check only rejects candidates where both rates are in
VRR range and the candidate is lower, but the first mode bypasses this
via the !best_mode early return.

For seamless switch features like LRR (Lower Refresh Rate) this creates
a problem as selecting a lower fixed mode results in a change in
vsync_start/end, forcing a full modeset.

To fix this, introduce need_higher_rr_mode() which returns true for all
VRR capable panels when the requested rate is in VRR range. When true,
intel_panel_fixed_mode() returns the highest refresh rate mode upfront,
which can then be reduced to match the requested vrefresh by extending
the vblank length.

Also remove the VRR check from is_best_fixed_mode() since the selection
is now handled upfront in intel_panel_fixed_mode().

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_panel.c | 37 ++++++++++++++--------
 1 file changed, 24 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 2765d87ddca7..1c2a8cd454be 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -59,29 +59,32 @@ intel_panel_preferred_fixed_mode(struct intel_connector *connector)
 					struct drm_display_mode, head);
 }
 
-static bool is_best_fixed_mode(struct intel_connector *connector,
-			       int vrefresh, int fixed_mode_vrefresh,
+static bool is_best_fixed_mode(int vrefresh, int fixed_mode_vrefresh,
 			       const struct drm_display_mode *best_mode)
 {
 	/* we want to always return something */
 	if (!best_mode)
 		return true;
 
-	/*
-	 * With VRR always pick a mode with equal/higher than requested
-	 * vrefresh, which we can then reduce to match the requested
-	 * vrefresh by extending the vblank length.
-	 */
-	if (intel_vrr_is_in_range(connector, vrefresh) &&
-	    intel_vrr_is_in_range(connector, fixed_mode_vrefresh) &&
-	    fixed_mode_vrefresh < vrefresh)
-		return false;
-
 	/* pick the fixed_mode that is closest in terms of vrefresh */
 	return abs(fixed_mode_vrefresh - vrefresh) <
 		abs(drm_mode_vrefresh(best_mode) - vrefresh);
 }
 
+static bool need_higher_rr_mode(struct intel_connector *connector,
+				const struct drm_display_mode *mode)
+{
+	int vrefresh = drm_mode_vrefresh(mode);
+
+	if (!intel_vrr_is_capable(connector))
+		return false;
+
+	if (!intel_vrr_is_in_range(connector, vrefresh))
+		return false;
+
+	return true;
+}
+
 const struct drm_display_mode *
 intel_panel_fixed_mode(struct intel_connector *connector,
 		       const struct drm_display_mode *mode)
@@ -89,10 +92,18 @@ intel_panel_fixed_mode(struct intel_connector *connector,
 	const struct drm_display_mode *fixed_mode, *best_mode = NULL;
 	int vrefresh = drm_mode_vrefresh(mode);
 
+	/*
+	 * With VRR always pick the highest refresh rate mode,
+	 * which we can then reduce to match the requested
+	 * vrefresh by extending the vblank length.
+	 */
+	if (need_higher_rr_mode(connector, mode))
+		return intel_panel_highest_vrefresh_mode(connector);
+
 	list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
 		int fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
 
-		if (is_best_fixed_mode(connector, vrefresh,
+		if (is_best_fixed_mode(vrefresh,
 				       fixed_mode_vrefresh, best_mode))
 			best_mode = fixed_mode;
 	}
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH 6/6] drm/i915/intel_panel: Refine VRR fixed mode selection for DRRS panels
  2026-05-12 13:32 [PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels Ankit Nautiyal
                   ` (4 preceding siblings ...)
  2026-05-12 13:32 ` [PATCH 5/6] drm/i915/intel_panel: Use highest refresh rate mode for VRR panels Ankit Nautiyal
@ 2026-05-12 13:32 ` Ankit Nautiyal
  2026-05-12 22:21 ` ✗ CI.checkpatch: warning for drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels (rev2) Patchwork
                   ` (3 subsequent siblings)
  9 siblings, 0 replies; 12+ messages in thread
From: Ankit Nautiyal @ 2026-05-12 13:32 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: ville.syrjala, jani.nikula, navaremanasi, Ankit Nautiyal

There are two kinds of VRR panels with fixed modes to consider:

Type 1: Modes with different clocks (e.g. 60Hz @ 347MHz, 120Hz @ 695MHz)
For such panels, it is not possible to seamlessly switch from a lower RR
mode to a higher RR mode, since at lower clock we cannot increase the
clock without a full modeset. But seamless switch from 120Hz to 60Hz can
be achieved by running at the same (higher) clock and just extending the
vtotal.

Type 2: Modes with same clock but different vtotal
Here the clock is the same, so we can go from higher RR to lower RR or
vice versa just by changing the vtotal. Seamless switching is possible
in both directions.

The previous change makes intel_panel_fixed_mode() always return the
highest refresh rate mode for all VRR panels. This works well for Type 2
panels since there is no clock advantage from picking a lower mode.

However for Type 1 (seamless DRRS) panels, if the user sets the
allow_modeset flag they really want a lower RR mode with a lower clock
to save power. So avoid selecting the highest RR mode when allow_modeset
is set for such panels.

Also, for seamless DRRS panels on platforms with double-buffered M/N
support, the clock can be changed on the fly, so we don't need the
highest RR + vtotal adjustment approach.

To understand the user requirement for full modeset/seamless switch, add
a nullable struct drm_atomic_commit state parameter to
intel_panel_fixed_mode() to check the allow_modeset flag.

Note: The mode_valid callers pass NULL since they have no atomic state.
In that case use the existing approach to select the closest-match to
avoid pruning valid modes.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_panel.c | 35 ++++++++++++++++++----
 drivers/gpu/drm/i915/display/intel_panel.h |  3 +-
 drivers/gpu/drm/i915/display/intel_sdvo.c  |  5 ++--
 3 files changed, 34 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 1c2a8cd454be..cc228ff81510 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -72,8 +72,10 @@ static bool is_best_fixed_mode(int vrefresh, int fixed_mode_vrefresh,
 }
 
 static bool need_higher_rr_mode(struct intel_connector *connector,
-				const struct drm_display_mode *mode)
+				const struct drm_display_mode *mode,
+				const struct drm_atomic_commit *state)
 {
+	struct intel_display *display = to_intel_display(connector);
 	int vrefresh = drm_mode_vrefresh(mode);
 
 	if (!intel_vrr_is_capable(connector))
@@ -82,12 +84,33 @@ static bool need_higher_rr_mode(struct intel_connector *connector,
 	if (!intel_vrr_is_in_range(connector, vrefresh))
 		return false;
 
-	return true;
+	if (!state)
+		return false;
+
+	/*
+	 * If Seamless switch requested, use highest RR mode + vtotal
+	 * adjustment, unless DRRS with double-buffered M/N which
+	 * can change the clock on the fly.
+	 */
+	if (!state->allow_modeset) {
+		if (intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS &&
+		    HAS_DOUBLE_BUFFERED_M_N(display))
+			return false;
+		return true;
+	}
+
+	/*
+	 * If full modeset is allowed, then for DRRS panels, use nearest mode
+	 * (lower clock saves power). For non-DRRS VRR panels, use highest RR
+	 * mode (no clock advantage from picking a lower mode).
+	 */
+	return intel_panel_drrs_type(connector) != DRRS_TYPE_SEAMLESS;
 }
 
 const struct drm_display_mode *
 intel_panel_fixed_mode(struct intel_connector *connector,
-		       const struct drm_display_mode *mode)
+		       const struct drm_display_mode *mode,
+		       const struct drm_atomic_commit *state)
 {
 	const struct drm_display_mode *fixed_mode, *best_mode = NULL;
 	int vrefresh = drm_mode_vrefresh(mode);
@@ -97,7 +120,7 @@ intel_panel_fixed_mode(struct intel_connector *connector,
 	 * which we can then reduce to match the requested
 	 * vrefresh by extending the vblank length.
 	 */
-	if (need_higher_rr_mode(connector, mode))
+	if (need_higher_rr_mode(connector, mode, state))
 		return intel_panel_highest_vrefresh_mode(connector);
 
 	list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
@@ -229,7 +252,7 @@ int intel_panel_compute_config(struct intel_connector *connector,
 {
 	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
 	const struct drm_display_mode *fixed_mode =
-		intel_panel_fixed_mode(connector, adjusted_mode);
+		intel_panel_fixed_mode(connector, adjusted_mode, state);
 	int vrefresh, fixed_mode_vrefresh;
 	bool is_vrr;
 
@@ -435,7 +458,7 @@ intel_panel_mode_valid(struct intel_connector *connector,
 		       int *target_clock)
 {
 	const struct drm_display_mode *fixed_mode =
-		intel_panel_fixed_mode(connector, mode);
+		intel_panel_fixed_mode(connector, mode, NULL);
 
 	if (target_clock)
 		*target_clock = mode->clock;
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index 3c4ff6735c21..c44323918768 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -33,7 +33,8 @@ const struct drm_display_mode *
 intel_panel_preferred_fixed_mode(struct intel_connector *connector);
 const struct drm_display_mode *
 intel_panel_fixed_mode(struct intel_connector *connector,
-		       const struct drm_display_mode *mode);
+		       const struct drm_display_mode *mode,
+		       const struct drm_atomic_commit *state);
 const struct drm_display_mode *
 intel_panel_downclock_mode(struct intel_connector *connector,
 			   const struct drm_display_mode *adjusted_mode);
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index e11c1dfc602a..0574a027526a 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -797,7 +797,7 @@ intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 
 	if (IS_LVDS(intel_sdvo_connector)) {
 		const struct drm_display_mode *fixed_mode =
-intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
+			intel_panel_fixed_mode(&intel_sdvo_connector->base, mode, NULL);
 
 		if (fixed_mode->hdisplay != args.width ||
 		    fixed_mode->vdisplay != args.height)
@@ -1564,7 +1564,8 @@ static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
 	/* lvds has a special fixed output timing. */
 	if (IS_LVDS(intel_sdvo_connector)) {
 		const struct drm_display_mode *fixed_mode =
-			intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
+			intel_panel_fixed_mode(&intel_sdvo_connector->base,
+					       mode, conn_state->state);
 
 		intel_sdvo_get_dtd_from_mode(&output_dtd, fixed_mode);
 	} else {
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* ✗ CI.checkpatch: warning for drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels (rev2)
  2026-05-12 13:32 [PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels Ankit Nautiyal
                   ` (5 preceding siblings ...)
  2026-05-12 13:32 ` [PATCH 6/6] drm/i915/intel_panel: Refine VRR fixed mode selection for DRRS panels Ankit Nautiyal
@ 2026-05-12 22:21 ` Patchwork
  2026-05-12 22:22 ` ✓ CI.KUnit: success " Patchwork
                   ` (2 subsequent siblings)
  9 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2026-05-12 22:21 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-xe

== Series Details ==

Series: drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels (rev2)
URL   : https://patchwork.freedesktop.org/series/165603/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit d1a2add1a2513d04af7833256f923b3d4668b3fa
Author: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Date:   Tue May 12 19:02:49 2026 +0530

    drm/i915/intel_panel: Refine VRR fixed mode selection for DRRS panels
    
    There are two kinds of VRR panels with fixed modes to consider:
    
    Type 1: Modes with different clocks (e.g. 60Hz @ 347MHz, 120Hz @ 695MHz)
    For such panels, it is not possible to seamlessly switch from a lower RR
    mode to a higher RR mode, since at lower clock we cannot increase the
    clock without a full modeset. But seamless switch from 120Hz to 60Hz can
    be achieved by running at the same (higher) clock and just extending the
    vtotal.
    
    Type 2: Modes with same clock but different vtotal
    Here the clock is the same, so we can go from higher RR to lower RR or
    vice versa just by changing the vtotal. Seamless switching is possible
    in both directions.
    
    The previous change makes intel_panel_fixed_mode() always return the
    highest refresh rate mode for all VRR panels. This works well for Type 2
    panels since there is no clock advantage from picking a lower mode.
    
    However for Type 1 (seamless DRRS) panels, if the user sets the
    allow_modeset flag they really want a lower RR mode with a lower clock
    to save power. So avoid selecting the highest RR mode when allow_modeset
    is set for such panels.
    
    Also, for seamless DRRS panels on platforms with double-buffered M/N
    support, the clock can be changed on the fly, so we don't need the
    highest RR + vtotal adjustment approach.
    
    To understand the user requirement for full modeset/seamless switch, add
    a nullable struct drm_atomic_commit state parameter to
    intel_panel_fixed_mode() to check the allow_modeset flag.
    
    Note: The mode_valid callers pass NULL since they have no atomic state.
    In that case use the existing approach to select the closest-match to
    avoid pruning valid modes.
    
    Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
+ /mt/dim checkpatch 8fbb3d48e61c7e68cefdba85c3fa3ba59e7a93b4 drm-intel
fa5e6f0d6b63 drm/i915/display: Deprecate TRANS_VSYNC where VRR TG is always on
c48638b6c04a drm/i915/panel: Preserve Vtotal-Vsync distance while adjusting vtotal
-:7: WARNING:TYPO_SPELLING: 'accomodate' may be misspelled - perhaps 'accommodate'?
#7: 
As we increase the vtotal to accomodate lower resfresh rate for fixed
                             ^^^^^^^^^^

total: 0 errors, 1 warnings, 0 checks, 19 lines checked
9625e8cc6972 drm/i915/intel_panel: Add a helper to get the highest refresh rate mode
a57652dbc4f1 drm/i915/intel_panel: Pass crtc_state to intel_panel_compute_config
440ecab04443 drm/i915/intel_panel: Use highest refresh rate mode for VRR panels
d1a2add1a251 drm/i915/intel_panel: Refine VRR fixed mode selection for DRRS panels



^ permalink raw reply	[flat|nested] 12+ messages in thread

* ✓ CI.KUnit: success for drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels (rev2)
  2026-05-12 13:32 [PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels Ankit Nautiyal
                   ` (6 preceding siblings ...)
  2026-05-12 22:21 ` ✗ CI.checkpatch: warning for drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels (rev2) Patchwork
@ 2026-05-12 22:22 ` Patchwork
  2026-05-12 23:43 ` ✓ Xe.CI.BAT: " Patchwork
  2026-05-13 16:21 ` ✗ Xe.CI.FULL: failure " Patchwork
  9 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2026-05-12 22:22 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-xe

== Series Details ==

Series: drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels (rev2)
URL   : https://patchwork.freedesktop.org/series/165603/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[22:21:11] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:21:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:21:47] Starting KUnit Kernel (1/1)...
[22:21:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:21:47] ================== guc_buf (11 subtests) ===================
[22:21:47] [PASSED] test_smallest
[22:21:47] [PASSED] test_largest
[22:21:47] [PASSED] test_granular
[22:21:47] [PASSED] test_unique
[22:21:47] [PASSED] test_overlap
[22:21:47] [PASSED] test_reusable
[22:21:47] [PASSED] test_too_big
[22:21:47] [PASSED] test_flush
[22:21:47] [PASSED] test_lookup
[22:21:47] [PASSED] test_data
[22:21:47] [PASSED] test_class
[22:21:47] ===================== [PASSED] guc_buf =====================
[22:21:47] =================== guc_dbm (7 subtests) ===================
[22:21:47] [PASSED] test_empty
[22:21:47] [PASSED] test_default
[22:21:47] ======================== test_size  ========================
[22:21:47] [PASSED] 4
[22:21:47] [PASSED] 8
[22:21:47] [PASSED] 32
[22:21:47] [PASSED] 256
[22:21:47] ==================== [PASSED] test_size ====================
[22:21:47] ======================= test_reuse  ========================
[22:21:47] [PASSED] 4
[22:21:47] [PASSED] 8
[22:21:47] [PASSED] 32
[22:21:47] [PASSED] 256
[22:21:47] =================== [PASSED] test_reuse ====================
[22:21:47] =================== test_range_overlap  ====================
[22:21:47] [PASSED] 4
[22:21:47] [PASSED] 8
[22:21:47] [PASSED] 32
[22:21:47] [PASSED] 256
[22:21:47] =============== [PASSED] test_range_overlap ================
[22:21:47] =================== test_range_compact  ====================
[22:21:47] [PASSED] 4
[22:21:47] [PASSED] 8
[22:21:47] [PASSED] 32
[22:21:47] [PASSED] 256
[22:21:47] =============== [PASSED] test_range_compact ================
[22:21:47] ==================== test_range_spare  =====================
[22:21:47] [PASSED] 4
[22:21:47] [PASSED] 8
[22:21:47] [PASSED] 32
[22:21:47] [PASSED] 256
[22:21:47] ================ [PASSED] test_range_spare =================
[22:21:47] ===================== [PASSED] guc_dbm =====================
[22:21:47] =================== guc_idm (6 subtests) ===================
[22:21:47] [PASSED] bad_init
[22:21:47] [PASSED] no_init
[22:21:47] [PASSED] init_fini
[22:21:47] [PASSED] check_used
[22:21:47] [PASSED] check_quota
[22:21:47] [PASSED] check_all
[22:21:47] ===================== [PASSED] guc_idm =====================
[22:21:47] ================== no_relay (3 subtests) ===================
[22:21:47] [PASSED] xe_drops_guc2pf_if_not_ready
[22:21:47] [PASSED] xe_drops_guc2vf_if_not_ready
[22:21:47] [PASSED] xe_rejects_send_if_not_ready
[22:21:47] ==================== [PASSED] no_relay =====================
[22:21:47] ================== pf_relay (14 subtests) ==================
[22:21:47] [PASSED] pf_rejects_guc2pf_too_short
[22:21:47] [PASSED] pf_rejects_guc2pf_too_long
[22:21:47] [PASSED] pf_rejects_guc2pf_no_payload
[22:21:47] [PASSED] pf_fails_no_payload
[22:21:47] [PASSED] pf_fails_bad_origin
[22:21:47] [PASSED] pf_fails_bad_type
[22:21:47] [PASSED] pf_txn_reports_error
[22:21:47] [PASSED] pf_txn_sends_pf2guc
[22:21:47] [PASSED] pf_sends_pf2guc
[22:21:47] [SKIPPED] pf_loopback_nop
[22:21:47] [SKIPPED] pf_loopback_echo
[22:21:47] [SKIPPED] pf_loopback_fail
[22:21:47] [SKIPPED] pf_loopback_busy
[22:21:47] [SKIPPED] pf_loopback_retry
[22:21:47] ==================== [PASSED] pf_relay =====================
[22:21:47] ================== vf_relay (3 subtests) ===================
[22:21:47] [PASSED] vf_rejects_guc2vf_too_short
[22:21:47] [PASSED] vf_rejects_guc2vf_too_long
[22:21:47] [PASSED] vf_rejects_guc2vf_no_payload
[22:21:47] ==================== [PASSED] vf_relay =====================
[22:21:47] ================ pf_gt_config (9 subtests) =================
[22:21:47] [PASSED] fair_contexts_1vf
[22:21:47] [PASSED] fair_doorbells_1vf
[22:21:47] [PASSED] fair_ggtt_1vf
[22:21:47] ====================== fair_vram_1vf  ======================
[22:21:47] [PASSED] 3.50 GiB
[22:21:47] [PASSED] 11.5 GiB
[22:21:47] [PASSED] 15.5 GiB
[22:21:47] [PASSED] 31.5 GiB
[22:21:47] [PASSED] 63.5 GiB
[22:21:47] [PASSED] 1.91 GiB
[22:21:47] ================== [PASSED] fair_vram_1vf ==================
[22:21:47] ================ fair_vram_1vf_admin_only  =================
[22:21:47] [PASSED] 3.50 GiB
[22:21:47] [PASSED] 11.5 GiB
[22:21:47] [PASSED] 15.5 GiB
[22:21:47] [PASSED] 31.5 GiB
[22:21:47] [PASSED] 63.5 GiB
[22:21:47] [PASSED] 1.91 GiB
[22:21:47] ============ [PASSED] fair_vram_1vf_admin_only =============
[22:21:47] ====================== fair_contexts  ======================
[22:21:47] [PASSED] 1 VF
[22:21:47] [PASSED] 2 VFs
[22:21:47] [PASSED] 3 VFs
[22:21:47] [PASSED] 4 VFs
[22:21:47] [PASSED] 5 VFs
[22:21:47] [PASSED] 6 VFs
[22:21:47] [PASSED] 7 VFs
[22:21:47] [PASSED] 8 VFs
[22:21:47] [PASSED] 9 VFs
[22:21:47] [PASSED] 10 VFs
[22:21:47] [PASSED] 11 VFs
[22:21:47] [PASSED] 12 VFs
[22:21:47] [PASSED] 13 VFs
[22:21:47] [PASSED] 14 VFs
[22:21:47] [PASSED] 15 VFs
[22:21:47] [PASSED] 16 VFs
[22:21:47] [PASSED] 17 VFs
[22:21:47] [PASSED] 18 VFs
[22:21:47] [PASSED] 19 VFs
[22:21:47] [PASSED] 20 VFs
[22:21:47] [PASSED] 21 VFs
[22:21:47] [PASSED] 22 VFs
[22:21:47] [PASSED] 23 VFs
[22:21:47] [PASSED] 24 VFs
[22:21:47] [PASSED] 25 VFs
[22:21:47] [PASSED] 26 VFs
[22:21:47] [PASSED] 27 VFs
[22:21:47] [PASSED] 28 VFs
[22:21:47] [PASSED] 29 VFs
[22:21:47] [PASSED] 30 VFs
[22:21:47] [PASSED] 31 VFs
[22:21:47] [PASSED] 32 VFs
[22:21:47] [PASSED] 33 VFs
[22:21:47] [PASSED] 34 VFs
[22:21:47] [PASSED] 35 VFs
[22:21:47] [PASSED] 36 VFs
[22:21:47] [PASSED] 37 VFs
[22:21:47] [PASSED] 38 VFs
[22:21:47] [PASSED] 39 VFs
[22:21:47] [PASSED] 40 VFs
[22:21:47] [PASSED] 41 VFs
[22:21:47] [PASSED] 42 VFs
[22:21:47] [PASSED] 43 VFs
[22:21:47] [PASSED] 44 VFs
[22:21:47] [PASSED] 45 VFs
[22:21:47] [PASSED] 46 VFs
[22:21:47] [PASSED] 47 VFs
[22:21:47] [PASSED] 48 VFs
[22:21:47] [PASSED] 49 VFs
[22:21:47] [PASSED] 50 VFs
[22:21:47] [PASSED] 51 VFs
[22:21:47] [PASSED] 52 VFs
[22:21:47] [PASSED] 53 VFs
[22:21:47] [PASSED] 54 VFs
[22:21:47] [PASSED] 55 VFs
[22:21:47] [PASSED] 56 VFs
[22:21:47] [PASSED] 57 VFs
[22:21:47] [PASSED] 58 VFs
[22:21:47] [PASSED] 59 VFs
[22:21:47] [PASSED] 60 VFs
[22:21:47] [PASSED] 61 VFs
[22:21:47] [PASSED] 62 VFs
[22:21:47] [PASSED] 63 VFs
[22:21:47] ================== [PASSED] fair_contexts ==================
[22:21:47] ===================== fair_doorbells  ======================
[22:21:47] [PASSED] 1 VF
[22:21:47] [PASSED] 2 VFs
[22:21:47] [PASSED] 3 VFs
[22:21:47] [PASSED] 4 VFs
[22:21:47] [PASSED] 5 VFs
[22:21:47] [PASSED] 6 VFs
[22:21:47] [PASSED] 7 VFs
[22:21:47] [PASSED] 8 VFs
[22:21:47] [PASSED] 9 VFs
[22:21:47] [PASSED] 10 VFs
[22:21:47] [PASSED] 11 VFs
[22:21:47] [PASSED] 12 VFs
[22:21:47] [PASSED] 13 VFs
[22:21:47] [PASSED] 14 VFs
[22:21:47] [PASSED] 15 VFs
[22:21:47] [PASSED] 16 VFs
[22:21:47] [PASSED] 17 VFs
[22:21:47] [PASSED] 18 VFs
[22:21:47] [PASSED] 19 VFs
[22:21:47] [PASSED] 20 VFs
[22:21:47] [PASSED] 21 VFs
[22:21:47] [PASSED] 22 VFs
[22:21:47] [PASSED] 23 VFs
[22:21:47] [PASSED] 24 VFs
[22:21:47] [PASSED] 25 VFs
[22:21:47] [PASSED] 26 VFs
[22:21:47] [PASSED] 27 VFs
[22:21:47] [PASSED] 28 VFs
[22:21:47] [PASSED] 29 VFs
[22:21:47] [PASSED] 30 VFs
[22:21:47] [PASSED] 31 VFs
[22:21:47] [PASSED] 32 VFs
[22:21:47] [PASSED] 33 VFs
[22:21:47] [PASSED] 34 VFs
[22:21:47] [PASSED] 35 VFs
[22:21:47] [PASSED] 36 VFs
[22:21:47] [PASSED] 37 VFs
[22:21:47] [PASSED] 38 VFs
[22:21:47] [PASSED] 39 VFs
[22:21:47] [PASSED] 40 VFs
[22:21:47] [PASSED] 41 VFs
[22:21:47] [PASSED] 42 VFs
[22:21:47] [PASSED] 43 VFs
[22:21:47] [PASSED] 44 VFs
[22:21:47] [PASSED] 45 VFs
[22:21:47] [PASSED] 46 VFs
[22:21:47] [PASSED] 47 VFs
[22:21:47] [PASSED] 48 VFs
[22:21:47] [PASSED] 49 VFs
[22:21:47] [PASSED] 50 VFs
[22:21:47] [PASSED] 51 VFs
[22:21:47] [PASSED] 52 VFs
[22:21:47] [PASSED] 53 VFs
[22:21:47] [PASSED] 54 VFs
[22:21:47] [PASSED] 55 VFs
[22:21:47] [PASSED] 56 VFs
[22:21:47] [PASSED] 57 VFs
[22:21:47] [PASSED] 58 VFs
[22:21:47] [PASSED] 59 VFs
[22:21:47] [PASSED] 60 VFs
[22:21:47] [PASSED] 61 VFs
[22:21:47] [PASSED] 62 VFs
[22:21:47] [PASSED] 63 VFs
[22:21:47] ================= [PASSED] fair_doorbells ==================
[22:21:47] ======================== fair_ggtt  ========================
[22:21:47] [PASSED] 1 VF
[22:21:47] [PASSED] 2 VFs
[22:21:47] [PASSED] 3 VFs
[22:21:47] [PASSED] 4 VFs
[22:21:47] [PASSED] 5 VFs
[22:21:47] [PASSED] 6 VFs
[22:21:47] [PASSED] 7 VFs
[22:21:47] [PASSED] 8 VFs
[22:21:47] [PASSED] 9 VFs
[22:21:47] [PASSED] 10 VFs
[22:21:47] [PASSED] 11 VFs
[22:21:47] [PASSED] 12 VFs
[22:21:47] [PASSED] 13 VFs
[22:21:47] [PASSED] 14 VFs
[22:21:47] [PASSED] 15 VFs
[22:21:47] [PASSED] 16 VFs
[22:21:47] [PASSED] 17 VFs
[22:21:47] [PASSED] 18 VFs
[22:21:47] [PASSED] 19 VFs
[22:21:47] [PASSED] 20 VFs
[22:21:47] [PASSED] 21 VFs
[22:21:47] [PASSED] 22 VFs
[22:21:47] [PASSED] 23 VFs
[22:21:47] [PASSED] 24 VFs
[22:21:47] [PASSED] 25 VFs
[22:21:47] [PASSED] 26 VFs
[22:21:48] [PASSED] 27 VFs
[22:21:48] [PASSED] 28 VFs
[22:21:48] [PASSED] 29 VFs
[22:21:48] [PASSED] 30 VFs
[22:21:48] [PASSED] 31 VFs
[22:21:48] [PASSED] 32 VFs
[22:21:48] [PASSED] 33 VFs
[22:21:48] [PASSED] 34 VFs
[22:21:48] [PASSED] 35 VFs
[22:21:48] [PASSED] 36 VFs
[22:21:48] [PASSED] 37 VFs
[22:21:48] [PASSED] 38 VFs
[22:21:48] [PASSED] 39 VFs
[22:21:48] [PASSED] 40 VFs
[22:21:48] [PASSED] 41 VFs
[22:21:48] [PASSED] 42 VFs
[22:21:48] [PASSED] 43 VFs
[22:21:48] [PASSED] 44 VFs
[22:21:48] [PASSED] 45 VFs
[22:21:48] [PASSED] 46 VFs
[22:21:48] [PASSED] 47 VFs
[22:21:48] [PASSED] 48 VFs
[22:21:48] [PASSED] 49 VFs
[22:21:48] [PASSED] 50 VFs
[22:21:48] [PASSED] 51 VFs
[22:21:48] [PASSED] 52 VFs
[22:21:48] [PASSED] 53 VFs
[22:21:48] [PASSED] 54 VFs
[22:21:48] [PASSED] 55 VFs
[22:21:48] [PASSED] 56 VFs
[22:21:48] [PASSED] 57 VFs
[22:21:48] [PASSED] 58 VFs
[22:21:48] [PASSED] 59 VFs
[22:21:48] [PASSED] 60 VFs
[22:21:48] [PASSED] 61 VFs
[22:21:48] [PASSED] 62 VFs
[22:21:48] [PASSED] 63 VFs
[22:21:48] ==================== [PASSED] fair_ggtt ====================
[22:21:48] ======================== fair_vram  ========================
[22:21:48] [PASSED] 1 VF
[22:21:48] [PASSED] 2 VFs
[22:21:48] [PASSED] 3 VFs
[22:21:48] [PASSED] 4 VFs
[22:21:48] [PASSED] 5 VFs
[22:21:48] [PASSED] 6 VFs
[22:21:48] [PASSED] 7 VFs
[22:21:48] [PASSED] 8 VFs
[22:21:48] [PASSED] 9 VFs
[22:21:48] [PASSED] 10 VFs
[22:21:48] [PASSED] 11 VFs
[22:21:48] [PASSED] 12 VFs
[22:21:48] [PASSED] 13 VFs
[22:21:48] [PASSED] 14 VFs
[22:21:48] [PASSED] 15 VFs
[22:21:48] [PASSED] 16 VFs
[22:21:48] [PASSED] 17 VFs
[22:21:48] [PASSED] 18 VFs
[22:21:48] [PASSED] 19 VFs
[22:21:48] [PASSED] 20 VFs
[22:21:48] [PASSED] 21 VFs
[22:21:48] [PASSED] 22 VFs
[22:21:48] [PASSED] 23 VFs
[22:21:48] [PASSED] 24 VFs
[22:21:48] [PASSED] 25 VFs
[22:21:48] [PASSED] 26 VFs
[22:21:48] [PASSED] 27 VFs
[22:21:48] [PASSED] 28 VFs
[22:21:48] [PASSED] 29 VFs
[22:21:48] [PASSED] 30 VFs
[22:21:48] [PASSED] 31 VFs
[22:21:48] [PASSED] 32 VFs
[22:21:48] [PASSED] 33 VFs
[22:21:48] [PASSED] 34 VFs
[22:21:48] [PASSED] 35 VFs
[22:21:48] [PASSED] 36 VFs
[22:21:48] [PASSED] 37 VFs
[22:21:48] [PASSED] 38 VFs
[22:21:48] [PASSED] 39 VFs
[22:21:48] [PASSED] 40 VFs
[22:21:48] [PASSED] 41 VFs
[22:21:48] [PASSED] 42 VFs
[22:21:48] [PASSED] 43 VFs
[22:21:48] [PASSED] 44 VFs
[22:21:48] [PASSED] 45 VFs
[22:21:48] [PASSED] 46 VFs
[22:21:48] [PASSED] 47 VFs
[22:21:48] [PASSED] 48 VFs
[22:21:48] [PASSED] 49 VFs
[22:21:48] [PASSED] 50 VFs
[22:21:48] [PASSED] 51 VFs
[22:21:48] [PASSED] 52 VFs
[22:21:48] [PASSED] 53 VFs
[22:21:48] [PASSED] 54 VFs
[22:21:48] [PASSED] 55 VFs
[22:21:48] [PASSED] 56 VFs
[22:21:48] [PASSED] 57 VFs
[22:21:48] [PASSED] 58 VFs
[22:21:48] [PASSED] 59 VFs
[22:21:48] [PASSED] 60 VFs
[22:21:48] [PASSED] 61 VFs
[22:21:48] [PASSED] 62 VFs
[22:21:48] [PASSED] 63 VFs
[22:21:48] ==================== [PASSED] fair_vram ====================
[22:21:48] ================== [PASSED] pf_gt_config ===================
[22:21:48] ===================== lmtt (1 subtest) =====================
[22:21:48] ======================== test_ops  =========================
[22:21:48] [PASSED] 2-level
[22:21:48] [PASSED] multi-level
[22:21:48] ==================== [PASSED] test_ops =====================
[22:21:48] ====================== [PASSED] lmtt =======================
[22:21:48] ================= pf_service (11 subtests) =================
[22:21:48] [PASSED] pf_negotiate_any
[22:21:48] [PASSED] pf_negotiate_base_match
[22:21:48] [PASSED] pf_negotiate_base_newer
[22:21:48] [PASSED] pf_negotiate_base_next
[22:21:48] [SKIPPED] pf_negotiate_base_older
[22:21:48] [PASSED] pf_negotiate_base_prev
[22:21:48] [PASSED] pf_negotiate_latest_match
[22:21:48] [PASSED] pf_negotiate_latest_newer
[22:21:48] [PASSED] pf_negotiate_latest_next
[22:21:48] [SKIPPED] pf_negotiate_latest_older
[22:21:48] [SKIPPED] pf_negotiate_latest_prev
[22:21:48] =================== [PASSED] pf_service ====================
[22:21:48] ================= xe_guc_g2g (2 subtests) ==================
[22:21:48] ============== xe_live_guc_g2g_kunit_default  ==============
[22:21:48] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[22:21:48] ============== xe_live_guc_g2g_kunit_allmem  ===============
[22:21:48] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[22:21:48] =================== [SKIPPED] xe_guc_g2g ===================
[22:21:48] =================== xe_mocs (2 subtests) ===================
[22:21:48] ================ xe_live_mocs_kernel_kunit  ================
[22:21:48] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[22:21:48] ================ xe_live_mocs_reset_kunit  =================
[22:21:48] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[22:21:48] ==================== [SKIPPED] xe_mocs =====================
[22:21:48] ================= xe_migrate (2 subtests) ==================
[22:21:48] ================= xe_migrate_sanity_kunit  =================
[22:21:48] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[22:21:48] ================== xe_validate_ccs_kunit  ==================
[22:21:48] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[22:21:48] =================== [SKIPPED] xe_migrate ===================
[22:21:48] ================== xe_dma_buf (1 subtest) ==================
[22:21:48] ==================== xe_dma_buf_kunit  =====================
[22:21:48] ================ [SKIPPED] xe_dma_buf_kunit ================
[22:21:48] =================== [SKIPPED] xe_dma_buf ===================
[22:21:48] ================= xe_bo_shrink (1 subtest) =================
[22:21:48] =================== xe_bo_shrink_kunit  ====================
[22:21:48] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[22:21:48] ================== [SKIPPED] xe_bo_shrink ==================
[22:21:48] ==================== xe_bo (2 subtests) ====================
[22:21:48] ================== xe_ccs_migrate_kunit  ===================
[22:21:48] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[22:21:48] ==================== xe_bo_evict_kunit  ====================
[22:21:48] =============== [SKIPPED] xe_bo_evict_kunit ================
[22:21:48] ===================== [SKIPPED] xe_bo ======================
[22:21:48] ==================== args (13 subtests) ====================
[22:21:48] [PASSED] count_args_test
[22:21:48] [PASSED] call_args_example
[22:21:48] [PASSED] call_args_test
[22:21:48] [PASSED] drop_first_arg_example
[22:21:48] [PASSED] drop_first_arg_test
[22:21:48] [PASSED] first_arg_example
[22:21:48] [PASSED] first_arg_test
[22:21:48] [PASSED] last_arg_example
[22:21:48] [PASSED] last_arg_test
[22:21:48] [PASSED] pick_arg_example
[22:21:48] [PASSED] if_args_example
[22:21:48] [PASSED] if_args_test
[22:21:48] [PASSED] sep_comma_example
[22:21:48] ====================== [PASSED] args =======================
[22:21:48] =================== xe_pci (3 subtests) ====================
[22:21:48] ==================== check_graphics_ip  ====================
[22:21:48] [PASSED] 12.00 Xe_LP
[22:21:48] [PASSED] 12.10 Xe_LP+
[22:21:48] [PASSED] 12.55 Xe_HPG
[22:21:48] [PASSED] 12.60 Xe_HPC
[22:21:48] [PASSED] 12.70 Xe_LPG
[22:21:48] [PASSED] 12.71 Xe_LPG
[22:21:48] [PASSED] 12.74 Xe_LPG+
[22:21:48] [PASSED] 20.01 Xe2_HPG
[22:21:48] [PASSED] 20.02 Xe2_HPG
[22:21:48] [PASSED] 20.04 Xe2_LPG
[22:21:48] [PASSED] 30.00 Xe3_LPG
[22:21:48] [PASSED] 30.01 Xe3_LPG
[22:21:48] [PASSED] 30.03 Xe3_LPG
[22:21:48] [PASSED] 30.04 Xe3_LPG
[22:21:48] [PASSED] 30.05 Xe3_LPG
[22:21:48] [PASSED] 35.10 Xe3p_LPG
[22:21:48] [PASSED] 35.11 Xe3p_XPC
[22:21:48] ================ [PASSED] check_graphics_ip ================
[22:21:48] ===================== check_media_ip  ======================
[22:21:48] [PASSED] 12.00 Xe_M
[22:21:48] [PASSED] 12.55 Xe_HPM
[22:21:48] [PASSED] 13.00 Xe_LPM+
[22:21:48] [PASSED] 13.01 Xe2_HPM
[22:21:48] [PASSED] 20.00 Xe2_LPM
[22:21:48] [PASSED] 30.00 Xe3_LPM
[22:21:48] [PASSED] 30.02 Xe3_LPM
[22:21:48] [PASSED] 35.00 Xe3p_LPM
[22:21:48] [PASSED] 35.03 Xe3p_HPM
[22:21:48] ================= [PASSED] check_media_ip ==================
[22:21:48] =================== check_platform_desc  ===================
[22:21:48] [PASSED] 0x9A60 (TIGERLAKE)
[22:21:48] [PASSED] 0x9A68 (TIGERLAKE)
[22:21:48] [PASSED] 0x9A70 (TIGERLAKE)
[22:21:48] [PASSED] 0x9A40 (TIGERLAKE)
[22:21:48] [PASSED] 0x9A49 (TIGERLAKE)
[22:21:48] [PASSED] 0x9A59 (TIGERLAKE)
[22:21:48] [PASSED] 0x9A78 (TIGERLAKE)
[22:21:48] [PASSED] 0x9AC0 (TIGERLAKE)
[22:21:48] [PASSED] 0x9AC9 (TIGERLAKE)
[22:21:48] [PASSED] 0x9AD9 (TIGERLAKE)
[22:21:48] [PASSED] 0x9AF8 (TIGERLAKE)
[22:21:48] [PASSED] 0x4C80 (ROCKETLAKE)
[22:21:48] [PASSED] 0x4C8A (ROCKETLAKE)
[22:21:48] [PASSED] 0x4C8B (ROCKETLAKE)
[22:21:48] [PASSED] 0x4C8C (ROCKETLAKE)
[22:21:48] [PASSED] 0x4C90 (ROCKETLAKE)
[22:21:48] [PASSED] 0x4C9A (ROCKETLAKE)
[22:21:48] [PASSED] 0x4680 (ALDERLAKE_S)
[22:21:48] [PASSED] 0x4682 (ALDERLAKE_S)
[22:21:48] [PASSED] 0x4688 (ALDERLAKE_S)
[22:21:48] [PASSED] 0x468A (ALDERLAKE_S)
[22:21:48] [PASSED] 0x468B (ALDERLAKE_S)
[22:21:48] [PASSED] 0x4690 (ALDERLAKE_S)
[22:21:48] [PASSED] 0x4692 (ALDERLAKE_S)
[22:21:48] [PASSED] 0x4693 (ALDERLAKE_S)
[22:21:48] [PASSED] 0x46A0 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46A1 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46A2 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46A3 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46A6 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46A8 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46AA (ALDERLAKE_P)
[22:21:48] [PASSED] 0x462A (ALDERLAKE_P)
[22:21:48] [PASSED] 0x4626 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x4628 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46B0 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46B1 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46B2 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46B3 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46C0 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46C1 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46C2 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46C3 (ALDERLAKE_P)
[22:21:48] [PASSED] 0x46D0 (ALDERLAKE_N)
[22:21:48] [PASSED] 0x46D1 (ALDERLAKE_N)
[22:21:48] [PASSED] 0x46D2 (ALDERLAKE_N)
[22:21:48] [PASSED] 0x46D3 (ALDERLAKE_N)
[22:21:48] [PASSED] 0x46D4 (ALDERLAKE_N)
[22:21:48] [PASSED] 0xA721 (ALDERLAKE_P)
[22:21:48] [PASSED] 0xA7A1 (ALDERLAKE_P)
[22:21:48] [PASSED] 0xA7A9 (ALDERLAKE_P)
[22:21:48] [PASSED] 0xA7AC (ALDERLAKE_P)
[22:21:48] [PASSED] 0xA7AD (ALDERLAKE_P)
[22:21:48] [PASSED] 0xA720 (ALDERLAKE_P)
[22:21:48] [PASSED] 0xA7A0 (ALDERLAKE_P)
[22:21:48] [PASSED] 0xA7A8 (ALDERLAKE_P)
[22:21:48] [PASSED] 0xA7AA (ALDERLAKE_P)
[22:21:48] [PASSED] 0xA7AB (ALDERLAKE_P)
[22:21:48] [PASSED] 0xA780 (ALDERLAKE_S)
[22:21:48] [PASSED] 0xA781 (ALDERLAKE_S)
[22:21:48] [PASSED] 0xA782 (ALDERLAKE_S)
[22:21:48] [PASSED] 0xA783 (ALDERLAKE_S)
[22:21:48] [PASSED] 0xA788 (ALDERLAKE_S)
[22:21:48] [PASSED] 0xA789 (ALDERLAKE_S)
[22:21:48] [PASSED] 0xA78A (ALDERLAKE_S)
[22:21:48] [PASSED] 0xA78B (ALDERLAKE_S)
[22:21:48] [PASSED] 0x4905 (DG1)
[22:21:48] [PASSED] 0x4906 (DG1)
[22:21:48] [PASSED] 0x4907 (DG1)
[22:21:48] [PASSED] 0x4908 (DG1)
[22:21:48] [PASSED] 0x4909 (DG1)
[22:21:48] [PASSED] 0x56C0 (DG2)
[22:21:48] [PASSED] 0x56C2 (DG2)
[22:21:48] [PASSED] 0x56C1 (DG2)
[22:21:48] [PASSED] 0x7D51 (METEORLAKE)
[22:21:48] [PASSED] 0x7DD1 (METEORLAKE)
[22:21:48] [PASSED] 0x7D41 (METEORLAKE)
[22:21:48] [PASSED] 0x7D67 (METEORLAKE)
[22:21:48] [PASSED] 0xB640 (METEORLAKE)
[22:21:48] [PASSED] 0x56A0 (DG2)
[22:21:48] [PASSED] 0x56A1 (DG2)
[22:21:48] [PASSED] 0x56A2 (DG2)
[22:21:48] [PASSED] 0x56BE (DG2)
[22:21:48] [PASSED] 0x56BF (DG2)
[22:21:48] [PASSED] 0x5690 (DG2)
[22:21:48] [PASSED] 0x5691 (DG2)
[22:21:48] [PASSED] 0x5692 (DG2)
[22:21:48] [PASSED] 0x56A5 (DG2)
[22:21:48] [PASSED] 0x56A6 (DG2)
[22:21:48] [PASSED] 0x56B0 (DG2)
[22:21:48] [PASSED] 0x56B1 (DG2)
[22:21:48] [PASSED] 0x56BA (DG2)
[22:21:48] [PASSED] 0x56BB (DG2)
[22:21:48] [PASSED] 0x56BC (DG2)
[22:21:48] [PASSED] 0x56BD (DG2)
[22:21:48] [PASSED] 0x5693 (DG2)
[22:21:48] [PASSED] 0x5694 (DG2)
[22:21:48] [PASSED] 0x5695 (DG2)
[22:21:48] [PASSED] 0x56A3 (DG2)
[22:21:48] [PASSED] 0x56A4 (DG2)
[22:21:48] [PASSED] 0x56B2 (DG2)
[22:21:48] [PASSED] 0x56B3 (DG2)
[22:21:48] [PASSED] 0x5696 (DG2)
[22:21:48] [PASSED] 0x5697 (DG2)
[22:21:48] [PASSED] 0xB69 (PVC)
[22:21:48] [PASSED] 0xB6E (PVC)
[22:21:48] [PASSED] 0xBD4 (PVC)
[22:21:48] [PASSED] 0xBD5 (PVC)
[22:21:48] [PASSED] 0xBD6 (PVC)
[22:21:48] [PASSED] 0xBD7 (PVC)
[22:21:48] [PASSED] 0xBD8 (PVC)
[22:21:48] [PASSED] 0xBD9 (PVC)
[22:21:48] [PASSED] 0xBDA (PVC)
[22:21:48] [PASSED] 0xBDB (PVC)
[22:21:48] [PASSED] 0xBE0 (PVC)
[22:21:48] [PASSED] 0xBE1 (PVC)
[22:21:48] [PASSED] 0xBE5 (PVC)
[22:21:48] [PASSED] 0x7D40 (METEORLAKE)
[22:21:48] [PASSED] 0x7D45 (METEORLAKE)
[22:21:48] [PASSED] 0x7D55 (METEORLAKE)
[22:21:48] [PASSED] 0x7D60 (METEORLAKE)
[22:21:48] [PASSED] 0x7DD5 (METEORLAKE)
[22:21:48] [PASSED] 0x6420 (LUNARLAKE)
[22:21:48] [PASSED] 0x64A0 (LUNARLAKE)
[22:21:48] [PASSED] 0x64B0 (LUNARLAKE)
[22:21:48] [PASSED] 0xE202 (BATTLEMAGE)
[22:21:48] [PASSED] 0xE209 (BATTLEMAGE)
[22:21:48] [PASSED] 0xE20B (BATTLEMAGE)
[22:21:48] [PASSED] 0xE20C (BATTLEMAGE)
[22:21:48] [PASSED] 0xE20D (BATTLEMAGE)
[22:21:48] [PASSED] 0xE210 (BATTLEMAGE)
[22:21:48] [PASSED] 0xE211 (BATTLEMAGE)
[22:21:48] [PASSED] 0xE212 (BATTLEMAGE)
[22:21:48] [PASSED] 0xE216 (BATTLEMAGE)
[22:21:48] [PASSED] 0xE220 (BATTLEMAGE)
[22:21:48] [PASSED] 0xE221 (BATTLEMAGE)
[22:21:48] [PASSED] 0xE222 (BATTLEMAGE)
[22:21:48] [PASSED] 0xE223 (BATTLEMAGE)
[22:21:48] [PASSED] 0xB080 (PANTHERLAKE)
[22:21:48] [PASSED] 0xB081 (PANTHERLAKE)
[22:21:48] [PASSED] 0xB082 (PANTHERLAKE)
[22:21:48] [PASSED] 0xB083 (PANTHERLAKE)
[22:21:48] [PASSED] 0xB084 (PANTHERLAKE)
[22:21:48] [PASSED] 0xB085 (PANTHERLAKE)
[22:21:48] [PASSED] 0xB086 (PANTHERLAKE)
[22:21:48] [PASSED] 0xB087 (PANTHERLAKE)
[22:21:48] [PASSED] 0xB08F (PANTHERLAKE)
[22:21:48] [PASSED] 0xB090 (PANTHERLAKE)
[22:21:48] [PASSED] 0xB0A0 (PANTHERLAKE)
[22:21:48] [PASSED] 0xB0B0 (PANTHERLAKE)
[22:21:48] [PASSED] 0xFD80 (PANTHERLAKE)
[22:21:48] [PASSED] 0xFD81 (PANTHERLAKE)
[22:21:48] [PASSED] 0xD740 (NOVALAKE_S)
[22:21:48] [PASSED] 0xD741 (NOVALAKE_S)
[22:21:48] [PASSED] 0xD742 (NOVALAKE_S)
[22:21:48] [PASSED] 0xD743 (NOVALAKE_S)
[22:21:48] [PASSED] 0xD744 (NOVALAKE_S)
[22:21:48] [PASSED] 0xD745 (NOVALAKE_S)
[22:21:48] [PASSED] 0x674C (CRESCENTISLAND)
[22:21:48] [PASSED] 0x674D (CRESCENTISLAND)
[22:21:48] [PASSED] 0x674E (CRESCENTISLAND)
[22:21:48] [PASSED] 0x674F (CRESCENTISLAND)
[22:21:48] [PASSED] 0x6750 (CRESCENTISLAND)
[22:21:48] [PASSED] 0xD750 (NOVALAKE_P)
[22:21:48] [PASSED] 0xD751 (NOVALAKE_P)
[22:21:48] [PASSED] 0xD752 (NOVALAKE_P)
[22:21:48] [PASSED] 0xD753 (NOVALAKE_P)
[22:21:48] [PASSED] 0xD754 (NOVALAKE_P)
[22:21:48] [PASSED] 0xD755 (NOVALAKE_P)
[22:21:48] [PASSED] 0xD756 (NOVALAKE_P)
[22:21:48] [PASSED] 0xD757 (NOVALAKE_P)
[22:21:48] [PASSED] 0xD75F (NOVALAKE_P)
[22:21:48] =============== [PASSED] check_platform_desc ===============
[22:21:48] ===================== [PASSED] xe_pci ======================
[22:21:48] =================== xe_rtp (2 subtests) ====================
[22:21:48] =============== xe_rtp_process_to_sr_tests  ================
[22:21:48] [PASSED] coalesce-same-reg
[22:21:48] [PASSED] no-match-no-add
[22:21:48] [PASSED] match-or
[22:21:48] [PASSED] match-or-xfail
[22:21:48] [PASSED] no-match-no-add-multiple-rules
[22:21:48] [PASSED] two-regs-two-entries
[22:21:48] [PASSED] clr-one-set-other
[22:21:48] [PASSED] set-field
[22:21:48] [PASSED] conflict-duplicate
[22:21:48] [PASSED] conflict-not-disjoint
[22:21:48] [PASSED] conflict-reg-type
[22:21:48] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[22:21:48] ================== xe_rtp_process_tests  ===================
[22:21:48] [PASSED] active1
[22:21:48] [PASSED] active2
[22:21:48] [PASSED] active-inactive
[22:21:48] [PASSED] inactive-active
[22:21:48] [PASSED] inactive-1st_or_active-inactive
[22:21:48] [PASSED] inactive-2nd_or_active-inactive
[22:21:48] [PASSED] inactive-last_or_active-inactive
[22:21:48] [PASSED] inactive-no_or_active-inactive
[22:21:48] ============== [PASSED] xe_rtp_process_tests ===============
[22:21:48] ===================== [PASSED] xe_rtp ======================
[22:21:48] ==================== xe_wa (1 subtest) =====================
[22:21:48] ======================== xe_wa_gt  =========================
[22:21:48] [PASSED] TIGERLAKE B0
[22:21:48] [PASSED] DG1 A0
[22:21:48] [PASSED] DG1 B0
[22:21:48] [PASSED] ALDERLAKE_S A0
[22:21:48] [PASSED] ALDERLAKE_S B0
[22:21:48] [PASSED] ALDERLAKE_S C0
[22:21:48] [PASSED] ALDERLAKE_S D0
[22:21:48] [PASSED] ALDERLAKE_P A0
[22:21:48] [PASSED] ALDERLAKE_P B0
[22:21:48] [PASSED] ALDERLAKE_P C0
[22:21:48] [PASSED] ALDERLAKE_S RPLS D0
[22:21:48] [PASSED] ALDERLAKE_P RPLU E0
[22:21:48] [PASSED] DG2 G10 C0
[22:21:48] [PASSED] DG2 G11 B1
[22:21:48] [PASSED] DG2 G12 A1
[22:21:48] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:21:48] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:21:48] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[22:21:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[22:21:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[22:21:48] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[22:21:48] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[22:21:48] ==================== [PASSED] xe_wa_gt =====================
[22:21:48] ====================== [PASSED] xe_wa ======================
[22:21:48] ============================================================
[22:21:48] Testing complete. Ran 601 tests: passed: 583, skipped: 18
[22:21:48] Elapsed time: 36.359s total, 4.346s configuring, 31.390s building, 0.613s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[22:21:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:21:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:22:14] Starting KUnit Kernel (1/1)...
[22:22:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:22:14] ============ drm_test_pick_cmdline (2 subtests) ============
[22:22:14] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[22:22:14] =============== drm_test_pick_cmdline_named  ===============
[22:22:14] [PASSED] NTSC
[22:22:14] [PASSED] NTSC-J
[22:22:14] [PASSED] PAL
[22:22:14] [PASSED] PAL-M
[22:22:14] =========== [PASSED] drm_test_pick_cmdline_named ===========
[22:22:14] ============== [PASSED] drm_test_pick_cmdline ==============
[22:22:14] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[22:22:14] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[22:22:14] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[22:22:14] =========== drm_validate_clone_mode (2 subtests) ===========
[22:22:14] ============== drm_test_check_in_clone_mode  ===============
[22:22:14] [PASSED] in_clone_mode
[22:22:14] [PASSED] not_in_clone_mode
[22:22:14] ========== [PASSED] drm_test_check_in_clone_mode ===========
[22:22:14] =============== drm_test_check_valid_clones  ===============
[22:22:14] [PASSED] not_in_clone_mode
[22:22:14] [PASSED] valid_clone
[22:22:14] [PASSED] invalid_clone
[22:22:14] =========== [PASSED] drm_test_check_valid_clones ===========
[22:22:14] ============= [PASSED] drm_validate_clone_mode =============
[22:22:14] ============= drm_validate_modeset (1 subtest) =============
[22:22:14] [PASSED] drm_test_check_connector_changed_modeset
[22:22:14] ============== [PASSED] drm_validate_modeset ===============
[22:22:14] ====== drm_test_bridge_get_current_state (2 subtests) ======
[22:22:14] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[22:22:14] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[22:22:14] ======== [PASSED] drm_test_bridge_get_current_state ========
[22:22:14] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[22:22:14] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[22:22:14] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[22:22:14] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[22:22:14] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[22:22:14] ============== drm_bridge_alloc (2 subtests) ===============
[22:22:14] [PASSED] drm_test_drm_bridge_alloc_basic
[22:22:14] [PASSED] drm_test_drm_bridge_alloc_get_put
[22:22:14] ================ [PASSED] drm_bridge_alloc =================
[22:22:14] ============= drm_cmdline_parser (40 subtests) =============
[22:22:14] [PASSED] drm_test_cmdline_force_d_only
[22:22:14] [PASSED] drm_test_cmdline_force_D_only_dvi
[22:22:14] [PASSED] drm_test_cmdline_force_D_only_hdmi
[22:22:14] [PASSED] drm_test_cmdline_force_D_only_not_digital
[22:22:14] [PASSED] drm_test_cmdline_force_e_only
[22:22:14] [PASSED] drm_test_cmdline_res
[22:22:14] [PASSED] drm_test_cmdline_res_vesa
[22:22:14] [PASSED] drm_test_cmdline_res_vesa_rblank
[22:22:14] [PASSED] drm_test_cmdline_res_rblank
[22:22:14] [PASSED] drm_test_cmdline_res_bpp
[22:22:14] [PASSED] drm_test_cmdline_res_refresh
[22:22:14] [PASSED] drm_test_cmdline_res_bpp_refresh
[22:22:14] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[22:22:14] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[22:22:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[22:22:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[22:22:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[22:22:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[22:22:14] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[22:22:14] [PASSED] drm_test_cmdline_res_margins_force_on
[22:22:14] [PASSED] drm_test_cmdline_res_vesa_margins
[22:22:14] [PASSED] drm_test_cmdline_name
[22:22:14] [PASSED] drm_test_cmdline_name_bpp
[22:22:14] [PASSED] drm_test_cmdline_name_option
[22:22:14] [PASSED] drm_test_cmdline_name_bpp_option
[22:22:14] [PASSED] drm_test_cmdline_rotate_0
[22:22:14] [PASSED] drm_test_cmdline_rotate_90
[22:22:14] [PASSED] drm_test_cmdline_rotate_180
[22:22:14] [PASSED] drm_test_cmdline_rotate_270
[22:22:14] [PASSED] drm_test_cmdline_hmirror
[22:22:14] [PASSED] drm_test_cmdline_vmirror
[22:22:14] [PASSED] drm_test_cmdline_margin_options
[22:22:14] [PASSED] drm_test_cmdline_multiple_options
[22:22:14] [PASSED] drm_test_cmdline_bpp_extra_and_option
[22:22:14] [PASSED] drm_test_cmdline_extra_and_option
[22:22:14] [PASSED] drm_test_cmdline_freestanding_options
[22:22:14] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[22:22:14] [PASSED] drm_test_cmdline_panel_orientation
[22:22:14] ================ drm_test_cmdline_invalid  =================
[22:22:14] [PASSED] margin_only
[22:22:14] [PASSED] interlace_only
[22:22:14] [PASSED] res_missing_x
[22:22:14] [PASSED] res_missing_y
[22:22:14] [PASSED] res_bad_y
[22:22:14] [PASSED] res_missing_y_bpp
[22:22:14] [PASSED] res_bad_bpp
[22:22:14] [PASSED] res_bad_refresh
[22:22:14] [PASSED] res_bpp_refresh_force_on_off
[22:22:14] [PASSED] res_invalid_mode
[22:22:14] [PASSED] res_bpp_wrong_place_mode
[22:22:14] [PASSED] name_bpp_refresh
[22:22:14] [PASSED] name_refresh
[22:22:14] [PASSED] name_refresh_wrong_mode
[22:22:14] [PASSED] name_refresh_invalid_mode
[22:22:14] [PASSED] rotate_multiple
[22:22:14] [PASSED] rotate_invalid_val
[22:22:14] [PASSED] rotate_truncated
[22:22:14] [PASSED] invalid_option
[22:22:14] [PASSED] invalid_tv_option
[22:22:14] [PASSED] truncated_tv_option
[22:22:14] ============ [PASSED] drm_test_cmdline_invalid =============
[22:22:14] =============== drm_test_cmdline_tv_options  ===============
[22:22:14] [PASSED] NTSC
[22:22:14] [PASSED] NTSC_443
[22:22:14] [PASSED] NTSC_J
[22:22:14] [PASSED] PAL
[22:22:14] [PASSED] PAL_M
[22:22:14] [PASSED] PAL_N
[22:22:14] [PASSED] SECAM
[22:22:14] [PASSED] MONO_525
[22:22:14] [PASSED] MONO_625
[22:22:14] =========== [PASSED] drm_test_cmdline_tv_options ===========
[22:22:14] =============== [PASSED] drm_cmdline_parser ================
[22:22:14] ========== drmm_connector_hdmi_init (20 subtests) ==========
[22:22:14] [PASSED] drm_test_connector_hdmi_init_valid
[22:22:14] [PASSED] drm_test_connector_hdmi_init_bpc_8
[22:22:14] [PASSED] drm_test_connector_hdmi_init_bpc_10
[22:22:14] [PASSED] drm_test_connector_hdmi_init_bpc_12
[22:22:14] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[22:22:14] [PASSED] drm_test_connector_hdmi_init_bpc_null
[22:22:14] [PASSED] drm_test_connector_hdmi_init_formats_empty
[22:22:14] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[22:22:14] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[22:22:14] [PASSED] supported_formats=0x9 yuv420_allowed=1
[22:22:14] [PASSED] supported_formats=0x9 yuv420_allowed=0
[22:22:14] [PASSED] supported_formats=0x5 yuv420_allowed=1
[22:22:14] [PASSED] supported_formats=0x5 yuv420_allowed=0
[22:22:14] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:22:14] [PASSED] drm_test_connector_hdmi_init_null_ddc
[22:22:14] [PASSED] drm_test_connector_hdmi_init_null_product
[22:22:14] [PASSED] drm_test_connector_hdmi_init_null_vendor
[22:22:14] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[22:22:14] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[22:22:14] [PASSED] drm_test_connector_hdmi_init_product_valid
[22:22:14] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[22:22:14] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[22:22:14] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[22:22:14] ========= drm_test_connector_hdmi_init_type_valid  =========
[22:22:14] [PASSED] HDMI-A
[22:22:14] [PASSED] HDMI-B
[22:22:14] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[22:22:14] ======== drm_test_connector_hdmi_init_type_invalid  ========
[22:22:14] [PASSED] Unknown
[22:22:14] [PASSED] VGA
[22:22:14] [PASSED] DVI-I
[22:22:14] [PASSED] DVI-D
[22:22:14] [PASSED] DVI-A
[22:22:14] [PASSED] Composite
[22:22:14] [PASSED] SVIDEO
[22:22:14] [PASSED] LVDS
[22:22:14] [PASSED] Component
[22:22:14] [PASSED] DIN
[22:22:14] [PASSED] DP
[22:22:14] [PASSED] TV
[22:22:14] [PASSED] eDP
[22:22:14] [PASSED] Virtual
[22:22:14] [PASSED] DSI
[22:22:14] [PASSED] DPI
[22:22:14] [PASSED] Writeback
[22:22:14] [PASSED] SPI
[22:22:14] [PASSED] USB
[22:22:14] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[22:22:14] ============ [PASSED] drmm_connector_hdmi_init =============
[22:22:14] ============= drmm_connector_init (3 subtests) =============
[22:22:14] [PASSED] drm_test_drmm_connector_init
[22:22:14] [PASSED] drm_test_drmm_connector_init_null_ddc
[22:22:14] ========= drm_test_drmm_connector_init_type_valid  =========
[22:22:14] [PASSED] Unknown
[22:22:14] [PASSED] VGA
[22:22:14] [PASSED] DVI-I
[22:22:14] [PASSED] DVI-D
[22:22:14] [PASSED] DVI-A
[22:22:14] [PASSED] Composite
[22:22:14] [PASSED] SVIDEO
[22:22:14] [PASSED] LVDS
[22:22:14] [PASSED] Component
[22:22:14] [PASSED] DIN
[22:22:14] [PASSED] DP
[22:22:14] [PASSED] HDMI-A
[22:22:14] [PASSED] HDMI-B
[22:22:14] [PASSED] TV
[22:22:14] [PASSED] eDP
[22:22:14] [PASSED] Virtual
[22:22:14] [PASSED] DSI
[22:22:14] [PASSED] DPI
[22:22:14] [PASSED] Writeback
[22:22:14] [PASSED] SPI
[22:22:14] [PASSED] USB
[22:22:14] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[22:22:14] =============== [PASSED] drmm_connector_init ===============
[22:22:14] ========= drm_connector_dynamic_init (6 subtests) ==========
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_init
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_init_properties
[22:22:14] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[22:22:14] [PASSED] Unknown
[22:22:14] [PASSED] VGA
[22:22:14] [PASSED] DVI-I
[22:22:14] [PASSED] DVI-D
[22:22:14] [PASSED] DVI-A
[22:22:14] [PASSED] Composite
[22:22:14] [PASSED] SVIDEO
[22:22:14] [PASSED] LVDS
[22:22:14] [PASSED] Component
[22:22:14] [PASSED] DIN
[22:22:14] [PASSED] DP
[22:22:14] [PASSED] HDMI-A
[22:22:14] [PASSED] HDMI-B
[22:22:14] [PASSED] TV
[22:22:14] [PASSED] eDP
[22:22:14] [PASSED] Virtual
[22:22:14] [PASSED] DSI
[22:22:14] [PASSED] DPI
[22:22:14] [PASSED] Writeback
[22:22:14] [PASSED] SPI
[22:22:14] [PASSED] USB
[22:22:14] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[22:22:14] ======== drm_test_drm_connector_dynamic_init_name  =========
[22:22:14] [PASSED] Unknown
[22:22:14] [PASSED] VGA
[22:22:14] [PASSED] DVI-I
[22:22:14] [PASSED] DVI-D
[22:22:14] [PASSED] DVI-A
[22:22:14] [PASSED] Composite
[22:22:14] [PASSED] SVIDEO
[22:22:14] [PASSED] LVDS
[22:22:14] [PASSED] Component
[22:22:14] [PASSED] DIN
[22:22:14] [PASSED] DP
[22:22:14] [PASSED] HDMI-A
[22:22:14] [PASSED] HDMI-B
[22:22:14] [PASSED] TV
[22:22:14] [PASSED] eDP
[22:22:14] [PASSED] Virtual
[22:22:14] [PASSED] DSI
[22:22:14] [PASSED] DPI
[22:22:14] [PASSED] Writeback
[22:22:14] [PASSED] SPI
[22:22:14] [PASSED] USB
[22:22:14] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[22:22:14] =========== [PASSED] drm_connector_dynamic_init ============
[22:22:14] ==== drm_connector_dynamic_register_early (4 subtests) =====
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[22:22:14] ====== [PASSED] drm_connector_dynamic_register_early =======
[22:22:14] ======= drm_connector_dynamic_register (7 subtests) ========
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[22:22:14] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[22:22:14] ========= [PASSED] drm_connector_dynamic_register ==========
[22:22:14] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[22:22:14] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[22:22:14] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[22:22:14] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[22:22:14] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[22:22:14] ========== drm_test_get_tv_mode_from_name_valid  ===========
[22:22:14] [PASSED] NTSC
[22:22:14] [PASSED] NTSC-443
[22:22:14] [PASSED] NTSC-J
[22:22:14] [PASSED] PAL
[22:22:14] [PASSED] PAL-M
[22:22:14] [PASSED] PAL-N
[22:22:14] [PASSED] SECAM
[22:22:14] [PASSED] Mono
[22:22:14] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[22:22:14] [PASSED] drm_test_get_tv_mode_from_name_truncated
[22:22:14] ============ [PASSED] drm_get_tv_mode_from_name ============
[22:22:14] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[22:22:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[22:22:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[22:22:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[22:22:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[22:22:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[22:22:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[22:22:14] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[22:22:14] [PASSED] VIC 96
[22:22:14] [PASSED] VIC 97
[22:22:14] [PASSED] VIC 101
[22:22:14] [PASSED] VIC 102
[22:22:14] [PASSED] VIC 106
[22:22:14] [PASSED] VIC 107
[22:22:14] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[22:22:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[22:22:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[22:22:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[22:22:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[22:22:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[22:22:14] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[22:22:14] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[22:22:14] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[22:22:14] [PASSED] Automatic
[22:22:14] [PASSED] Full
[22:22:14] [PASSED] Limited 16:235
[22:22:14] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[22:22:14] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[22:22:14] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[22:22:14] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[22:22:14] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[22:22:14] [PASSED] RGB
[22:22:14] [PASSED] YUV 4:2:0
[22:22:14] [PASSED] YUV 4:2:2
[22:22:14] [PASSED] YUV 4:4:4
[22:22:14] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[22:22:14] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[22:22:14] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[22:22:14] ============= drm_damage_helper (21 subtests) ==============
[22:22:14] [PASSED] drm_test_damage_iter_no_damage
[22:22:14] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[22:22:14] [PASSED] drm_test_damage_iter_no_damage_src_moved
[22:22:14] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[22:22:14] [PASSED] drm_test_damage_iter_no_damage_not_visible
[22:22:14] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[22:22:14] [PASSED] drm_test_damage_iter_no_damage_no_fb
[22:22:14] [PASSED] drm_test_damage_iter_simple_damage
[22:22:14] [PASSED] drm_test_damage_iter_single_damage
[22:22:14] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[22:22:14] [PASSED] drm_test_damage_iter_single_damage_outside_src
[22:22:14] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[22:22:14] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[22:22:14] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[22:22:14] [PASSED] drm_test_damage_iter_single_damage_src_moved
[22:22:14] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[22:22:14] [PASSED] drm_test_damage_iter_damage
[22:22:14] [PASSED] drm_test_damage_iter_damage_one_intersect
[22:22:14] [PASSED] drm_test_damage_iter_damage_one_outside
[22:22:14] [PASSED] drm_test_damage_iter_damage_src_moved
[22:22:14] [PASSED] drm_test_damage_iter_damage_not_visible
[22:22:14] ================ [PASSED] drm_damage_helper ================
[22:22:14] ============== drm_dp_mst_helper (3 subtests) ==============
[22:22:14] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[22:22:14] [PASSED] Clock 154000 BPP 30 DSC disabled
[22:22:14] [PASSED] Clock 234000 BPP 30 DSC disabled
[22:22:14] [PASSED] Clock 297000 BPP 24 DSC disabled
[22:22:14] [PASSED] Clock 332880 BPP 24 DSC enabled
[22:22:14] [PASSED] Clock 324540 BPP 24 DSC enabled
[22:22:14] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[22:22:14] ============== drm_test_dp_mst_calc_pbn_div  ===============
[22:22:14] [PASSED] Link rate 2000000 lane count 4
[22:22:14] [PASSED] Link rate 2000000 lane count 2
[22:22:14] [PASSED] Link rate 2000000 lane count 1
[22:22:14] [PASSED] Link rate 1350000 lane count 4
[22:22:14] [PASSED] Link rate 1350000 lane count 2
[22:22:14] [PASSED] Link rate 1350000 lane count 1
[22:22:14] [PASSED] Link rate 1000000 lane count 4
[22:22:14] [PASSED] Link rate 1000000 lane count 2
[22:22:14] [PASSED] Link rate 1000000 lane count 1
[22:22:14] [PASSED] Link rate 810000 lane count 4
[22:22:14] [PASSED] Link rate 810000 lane count 2
[22:22:14] [PASSED] Link rate 810000 lane count 1
[22:22:14] [PASSED] Link rate 540000 lane count 4
[22:22:14] [PASSED] Link rate 540000 lane count 2
[22:22:14] [PASSED] Link rate 540000 lane count 1
[22:22:14] [PASSED] Link rate 270000 lane count 4
[22:22:14] [PASSED] Link rate 270000 lane count 2
[22:22:14] [PASSED] Link rate 270000 lane count 1
[22:22:14] [PASSED] Link rate 162000 lane count 4
[22:22:14] [PASSED] Link rate 162000 lane count 2
[22:22:14] [PASSED] Link rate 162000 lane count 1
[22:22:14] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[22:22:14] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[22:22:14] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[22:22:14] [PASSED] DP_POWER_UP_PHY with port number
[22:22:14] [PASSED] DP_POWER_DOWN_PHY with port number
[22:22:14] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[22:22:14] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[22:22:14] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[22:22:14] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[22:22:14] [PASSED] DP_QUERY_PAYLOAD with port number
[22:22:14] [PASSED] DP_QUERY_PAYLOAD with VCPI
[22:22:14] [PASSED] DP_REMOTE_DPCD_READ with port number
[22:22:14] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[22:22:14] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[22:22:14] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[22:22:14] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[22:22:14] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[22:22:14] [PASSED] DP_REMOTE_I2C_READ with port number
[22:22:14] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[22:22:14] [PASSED] DP_REMOTE_I2C_READ with transactions array
[22:22:14] [PASSED] DP_REMOTE_I2C_WRITE with port number
[22:22:14] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[22:22:14] [PASSED] DP_REMOTE_I2C_WRITE with data array
[22:22:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[22:22:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[22:22:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[22:22:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[22:22:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[22:22:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[22:22:14] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[22:22:14] ================ [PASSED] drm_dp_mst_helper ================
[22:22:14] ================== drm_exec (7 subtests) ===================
[22:22:14] [PASSED] sanitycheck
[22:22:14] [PASSED] test_lock
[22:22:14] [PASSED] test_lock_unlock
[22:22:14] [PASSED] test_duplicates
[22:22:14] [PASSED] test_prepare
[22:22:14] [PASSED] test_prepare_array
[22:22:14] [PASSED] test_multiple_loops
[22:22:14] ==================== [PASSED] drm_exec =====================
[22:22:14] =========== drm_format_helper_test (17 subtests) ===========
[22:22:14] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[22:22:14] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[22:22:14] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[22:22:14] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[22:22:14] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[22:22:14] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[22:22:14] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[22:22:14] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[22:22:14] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[22:22:14] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[22:22:14] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[22:22:14] ============== drm_test_fb_xrgb8888_to_mono  ===============
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[22:22:14] ==================== drm_test_fb_swab  =====================
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ================ [PASSED] drm_test_fb_swab =================
[22:22:14] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[22:22:14] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[22:22:14] [PASSED] single_pixel_source_buffer
[22:22:14] [PASSED] single_pixel_clip_rectangle
[22:22:14] [PASSED] well_known_colors
[22:22:14] [PASSED] destination_pitch
[22:22:14] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[22:22:14] ================= drm_test_fb_clip_offset  =================
[22:22:14] [PASSED] pass through
[22:22:14] [PASSED] horizontal offset
[22:22:14] [PASSED] vertical offset
[22:22:14] [PASSED] horizontal and vertical offset
[22:22:14] [PASSED] horizontal offset (custom pitch)
[22:22:14] [PASSED] vertical offset (custom pitch)
[22:22:14] [PASSED] horizontal and vertical offset (custom pitch)
[22:22:14] ============= [PASSED] drm_test_fb_clip_offset =============
[22:22:14] =================== drm_test_fb_memcpy  ====================
[22:22:14] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[22:22:14] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[22:22:14] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[22:22:14] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[22:22:14] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[22:22:14] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[22:22:14] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[22:22:14] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[22:22:14] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[22:22:14] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[22:22:14] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[22:22:14] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[22:22:14] =============== [PASSED] drm_test_fb_memcpy ================
[22:22:14] ============= [PASSED] drm_format_helper_test ==============
[22:22:14] ================= drm_format (18 subtests) =================
[22:22:14] [PASSED] drm_test_format_block_width_invalid
[22:22:14] [PASSED] drm_test_format_block_width_one_plane
[22:22:14] [PASSED] drm_test_format_block_width_two_plane
[22:22:14] [PASSED] drm_test_format_block_width_three_plane
[22:22:14] [PASSED] drm_test_format_block_width_tiled
[22:22:14] [PASSED] drm_test_format_block_height_invalid
[22:22:14] [PASSED] drm_test_format_block_height_one_plane
[22:22:14] [PASSED] drm_test_format_block_height_two_plane
[22:22:14] [PASSED] drm_test_format_block_height_three_plane
[22:22:14] [PASSED] drm_test_format_block_height_tiled
[22:22:14] [PASSED] drm_test_format_min_pitch_invalid
[22:22:14] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[22:22:14] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[22:22:14] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[22:22:14] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[22:22:14] [PASSED] drm_test_format_min_pitch_two_plane
[22:22:14] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[22:22:14] [PASSED] drm_test_format_min_pitch_tiled
[22:22:14] =================== [PASSED] drm_format ====================
[22:22:14] ============== drm_framebuffer (10 subtests) ===============
[22:22:14] ========== drm_test_framebuffer_check_src_coords  ==========
[22:22:14] [PASSED] Success: source fits into fb
[22:22:14] [PASSED] Fail: overflowing fb with x-axis coordinate
[22:22:14] [PASSED] Fail: overflowing fb with y-axis coordinate
[22:22:14] [PASSED] Fail: overflowing fb with source width
[22:22:14] [PASSED] Fail: overflowing fb with source height
[22:22:14] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[22:22:14] [PASSED] drm_test_framebuffer_cleanup
[22:22:14] =============== drm_test_framebuffer_create  ===============
[22:22:14] [PASSED] ABGR8888 normal sizes
[22:22:14] [PASSED] ABGR8888 max sizes
[22:22:14] [PASSED] ABGR8888 pitch greater than min required
[22:22:14] [PASSED] ABGR8888 pitch less than min required
[22:22:14] [PASSED] ABGR8888 Invalid width
[22:22:14] [PASSED] ABGR8888 Invalid buffer handle
[22:22:14] [PASSED] No pixel format
[22:22:14] [PASSED] ABGR8888 Width 0
[22:22:14] [PASSED] ABGR8888 Height 0
[22:22:14] [PASSED] ABGR8888 Out of bound height * pitch combination
[22:22:14] [PASSED] ABGR8888 Large buffer offset
[22:22:14] [PASSED] ABGR8888 Buffer offset for inexistent plane
[22:22:14] [PASSED] ABGR8888 Invalid flag
[22:22:14] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[22:22:14] [PASSED] ABGR8888 Valid buffer modifier
[22:22:14] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[22:22:14] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[22:22:14] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[22:22:14] [PASSED] NV12 Normal sizes
[22:22:14] [PASSED] NV12 Max sizes
[22:22:14] [PASSED] NV12 Invalid pitch
[22:22:14] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[22:22:14] [PASSED] NV12 different  modifier per-plane
[22:22:14] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[22:22:14] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[22:22:14] [PASSED] NV12 Modifier for inexistent plane
[22:22:14] [PASSED] NV12 Handle for inexistent plane
[22:22:14] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[22:22:14] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[22:22:14] [PASSED] YVU420 Normal sizes
[22:22:14] [PASSED] YVU420 Max sizes
[22:22:14] [PASSED] YVU420 Invalid pitch
[22:22:14] [PASSED] YVU420 Different pitches
[22:22:14] [PASSED] YVU420 Different buffer offsets/pitches
[22:22:14] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[22:22:14] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[22:22:14] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[22:22:14] [PASSED] YVU420 Valid modifier
[22:22:14] [PASSED] YVU420 Different modifiers per plane
[22:22:14] [PASSED] YVU420 Modifier for inexistent plane
[22:22:14] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[22:22:14] [PASSED] X0L2 Normal sizes
[22:22:14] [PASSED] X0L2 Max sizes
[22:22:14] [PASSED] X0L2 Invalid pitch
[22:22:14] [PASSED] X0L2 Pitch greater than minimum required
[22:22:14] [PASSED] X0L2 Handle for inexistent plane
[22:22:14] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[22:22:14] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[22:22:14] [PASSED] X0L2 Valid modifier
[22:22:14] [PASSED] X0L2 Modifier for inexistent plane
[22:22:14] =========== [PASSED] drm_test_framebuffer_create ===========
[22:22:14] [PASSED] drm_test_framebuffer_free
[22:22:14] [PASSED] drm_test_framebuffer_init
[22:22:14] [PASSED] drm_test_framebuffer_init_bad_format
[22:22:14] [PASSED] drm_test_framebuffer_init_dev_mismatch
[22:22:14] [PASSED] drm_test_framebuffer_lookup
[22:22:14] [PASSED] drm_test_framebuffer_lookup_inexistent
[22:22:14] [PASSED] drm_test_framebuffer_modifiers_not_supported
[22:22:14] ================= [PASSED] drm_framebuffer =================
[22:22:14] ================ drm_gem_shmem (8 subtests) ================
[22:22:14] [PASSED] drm_gem_shmem_test_obj_create
[22:22:14] [PASSED] drm_gem_shmem_test_obj_create_private
[22:22:14] [PASSED] drm_gem_shmem_test_pin_pages
[22:22:14] [PASSED] drm_gem_shmem_test_vmap
[22:22:14] [PASSED] drm_gem_shmem_test_get_sg_table
[22:22:14] [PASSED] drm_gem_shmem_test_get_pages_sgt
[22:22:14] [PASSED] drm_gem_shmem_test_madvise
[22:22:14] [PASSED] drm_gem_shmem_test_purge
[22:22:14] ================== [PASSED] drm_gem_shmem ==================
[22:22:14] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[22:22:14] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[22:22:14] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[22:22:14] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[22:22:14] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[22:22:14] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[22:22:14] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[22:22:14] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[22:22:14] [PASSED] Automatic
[22:22:14] [PASSED] Full
[22:22:14] [PASSED] Limited 16:235
[22:22:14] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[22:22:14] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[22:22:14] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[22:22:14] [PASSED] drm_test_check_disable_connector
[22:22:14] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[22:22:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[22:22:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[22:22:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[22:22:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[22:22:14] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[22:22:14] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[22:22:14] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[22:22:14] [PASSED] drm_test_check_output_bpc_dvi
[22:22:14] [PASSED] drm_test_check_output_bpc_format_vic_1
[22:22:14] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[22:22:14] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[22:22:14] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[22:22:14] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[22:22:14] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[22:22:14] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[22:22:14] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[22:22:14] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[22:22:14] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[22:22:14] [PASSED] drm_test_check_broadcast_rgb_value
[22:22:14] [PASSED] drm_test_check_bpc_8_value
[22:22:14] [PASSED] drm_test_check_bpc_10_value
[22:22:14] [PASSED] drm_test_check_bpc_12_value
[22:22:14] [PASSED] drm_test_check_format_value
[22:22:14] [PASSED] drm_test_check_tmds_char_value
[22:22:14] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[22:22:14] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[22:22:14] [PASSED] drm_test_check_mode_valid
[22:22:14] [PASSED] drm_test_check_mode_valid_reject
[22:22:14] [PASSED] drm_test_check_mode_valid_reject_rate
[22:22:14] [PASSED] drm_test_check_mode_valid_reject_max_clock
[22:22:14] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[22:22:14] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[22:22:14] [PASSED] drm_test_check_infoframes
[22:22:14] [PASSED] drm_test_check_reject_avi_infoframe
[22:22:14] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[22:22:14] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[22:22:14] [PASSED] drm_test_check_reject_audio_infoframe
[22:22:14] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[22:22:14] ================= drm_managed (2 subtests) =================
[22:22:14] [PASSED] drm_test_managed_release_action
[22:22:14] [PASSED] drm_test_managed_run_action
[22:22:14] =================== [PASSED] drm_managed ===================
[22:22:14] =================== drm_mm (6 subtests) ====================
[22:22:14] [PASSED] drm_test_mm_init
[22:22:14] [PASSED] drm_test_mm_debug
[22:22:14] [PASSED] drm_test_mm_align32
[22:22:14] [PASSED] drm_test_mm_align64
[22:22:14] [PASSED] drm_test_mm_lowest
[22:22:14] [PASSED] drm_test_mm_highest
[22:22:14] ===================== [PASSED] drm_mm ======================
[22:22:14] ============= drm_modes_analog_tv (5 subtests) =============
[22:22:14] [PASSED] drm_test_modes_analog_tv_mono_576i
[22:22:14] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[22:22:14] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[22:22:14] [PASSED] drm_test_modes_analog_tv_pal_576i
[22:22:14] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[22:22:14] =============== [PASSED] drm_modes_analog_tv ===============
[22:22:14] ============== drm_plane_helper (2 subtests) ===============
[22:22:14] =============== drm_test_check_plane_state  ================
[22:22:14] [PASSED] clipping_simple
[22:22:14] [PASSED] clipping_rotate_reflect
[22:22:14] [PASSED] positioning_simple
[22:22:14] [PASSED] upscaling
[22:22:14] [PASSED] downscaling
[22:22:14] [PASSED] rounding1
[22:22:14] [PASSED] rounding2
[22:22:14] [PASSED] rounding3
[22:22:14] [PASSED] rounding4
[22:22:14] =========== [PASSED] drm_test_check_plane_state ============
[22:22:14] =========== drm_test_check_invalid_plane_state  ============
[22:22:14] [PASSED] positioning_invalid
[22:22:14] [PASSED] upscaling_invalid
[22:22:14] [PASSED] downscaling_invalid
[22:22:14] ======= [PASSED] drm_test_check_invalid_plane_state ========
[22:22:14] ================ [PASSED] drm_plane_helper =================
[22:22:14] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[22:22:14] ====== drm_test_connector_helper_tv_get_modes_check  =======
[22:22:14] [PASSED] None
[22:22:14] [PASSED] PAL
[22:22:14] [PASSED] NTSC
[22:22:14] [PASSED] Both, NTSC Default
[22:22:14] [PASSED] Both, PAL Default
[22:22:14] [PASSED] Both, NTSC Default, with PAL on command-line
[22:22:14] [PASSED] Both, PAL Default, with NTSC on command-line
[22:22:14] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[22:22:14] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[22:22:14] ================== drm_rect (9 subtests) ===================
[22:22:14] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[22:22:14] [PASSED] drm_test_rect_clip_scaled_not_clipped
[22:22:14] [PASSED] drm_test_rect_clip_scaled_clipped
[22:22:14] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[22:22:14] ================= drm_test_rect_intersect  =================
[22:22:14] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[22:22:14] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[22:22:14] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[22:22:14] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[22:22:14] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[22:22:14] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[22:22:14] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[22:22:14] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[22:22:14] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[22:22:14] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[22:22:14] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[22:22:14] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[22:22:14] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[22:22:14] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[22:22:14] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[22:22:14] ============= [PASSED] drm_test_rect_intersect =============
[22:22:14] ================ drm_test_rect_calc_hscale  ================
[22:22:14] [PASSED] normal use
[22:22:14] [PASSED] out of max range
[22:22:14] [PASSED] out of min range
[22:22:14] [PASSED] zero dst
[22:22:14] [PASSED] negative src
[22:22:14] [PASSED] negative dst
[22:22:14] ============ [PASSED] drm_test_rect_calc_hscale ============
[22:22:14] ================ drm_test_rect_calc_vscale  ================
[22:22:14] [PASSED] normal use
[22:22:14] [PASSED] out of max range
[22:22:14] [PASSED] out of min range
[22:22:14] [PASSED] zero dst
[22:22:14] [PASSED] negative src
[22:22:14] [PASSED] negative dst
[22:22:14] ============ [PASSED] drm_test_rect_calc_vscale ============
[22:22:14] ================== drm_test_rect_rotate  ===================
[22:22:14] [PASSED] reflect-x
[22:22:14] [PASSED] reflect-y
[22:22:14] [PASSED] rotate-0
[22:22:14] [PASSED] rotate-90
[22:22:14] [PASSED] rotate-180
[22:22:14] [PASSED] rotate-270
[22:22:14] ============== [PASSED] drm_test_rect_rotate ===============
[22:22:14] ================ drm_test_rect_rotate_inv  =================
[22:22:14] [PASSED] reflect-x
[22:22:14] [PASSED] reflect-y
[22:22:14] [PASSED] rotate-0
[22:22:14] [PASSED] rotate-90
[22:22:14] [PASSED] rotate-180
[22:22:14] [PASSED] rotate-270
[22:22:14] ============ [PASSED] drm_test_rect_rotate_inv =============
[22:22:14] ==================== [PASSED] drm_rect =====================
[22:22:14] ============ drm_sysfb_modeset_test (1 subtest) ============
[22:22:14] ============ drm_test_sysfb_build_fourcc_list  =============
[22:22:14] [PASSED] no native formats
[22:22:14] [PASSED] XRGB8888 as native format
[22:22:14] [PASSED] remove duplicates
[22:22:14] [PASSED] convert alpha formats
[22:22:14] [PASSED] random formats
[22:22:14] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[22:22:14] ============= [PASSED] drm_sysfb_modeset_test ==============
[22:22:14] ================== drm_fixp (2 subtests) ===================
[22:22:14] [PASSED] drm_test_int2fixp
[22:22:14] [PASSED] drm_test_sm2fixp
[22:22:14] ==================== [PASSED] drm_fixp =====================
[22:22:14] ============================================================
[22:22:14] Testing complete. Ran 621 tests: passed: 621
[22:22:14] Elapsed time: 25.935s total, 1.684s configuring, 24.071s building, 0.179s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[22:22:14] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:22:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:22:25] Starting KUnit Kernel (1/1)...
[22:22:25] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:22:25] ================= ttm_device (5 subtests) ==================
[22:22:25] [PASSED] ttm_device_init_basic
[22:22:25] [PASSED] ttm_device_init_multiple
[22:22:25] [PASSED] ttm_device_fini_basic
[22:22:25] [PASSED] ttm_device_init_no_vma_man
[22:22:25] ================== ttm_device_init_pools  ==================
[22:22:25] [PASSED] No DMA allocations, no DMA32 required
[22:22:25] [PASSED] DMA allocations, DMA32 required
[22:22:25] [PASSED] No DMA allocations, DMA32 required
[22:22:25] [PASSED] DMA allocations, no DMA32 required
[22:22:25] ============== [PASSED] ttm_device_init_pools ==============
[22:22:25] =================== [PASSED] ttm_device ====================
[22:22:25] ================== ttm_pool (8 subtests) ===================
[22:22:25] ================== ttm_pool_alloc_basic  ===================
[22:22:25] [PASSED] One page
[22:22:25] [PASSED] More than one page
[22:22:25] [PASSED] Above the allocation limit
[22:22:25] [PASSED] One page, with coherent DMA mappings enabled
[22:22:25] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:22:25] ============== [PASSED] ttm_pool_alloc_basic ===============
[22:22:25] ============== ttm_pool_alloc_basic_dma_addr  ==============
[22:22:25] [PASSED] One page
[22:22:25] [PASSED] More than one page
[22:22:25] [PASSED] Above the allocation limit
[22:22:25] [PASSED] One page, with coherent DMA mappings enabled
[22:22:25] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:22:25] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[22:22:25] [PASSED] ttm_pool_alloc_order_caching_match
[22:22:25] [PASSED] ttm_pool_alloc_caching_mismatch
[22:22:25] [PASSED] ttm_pool_alloc_order_mismatch
[22:22:25] [PASSED] ttm_pool_free_dma_alloc
[22:22:25] [PASSED] ttm_pool_free_no_dma_alloc
[22:22:25] [PASSED] ttm_pool_fini_basic
[22:22:25] ==================== [PASSED] ttm_pool =====================
[22:22:25] ================ ttm_resource (8 subtests) =================
[22:22:25] ================= ttm_resource_init_basic  =================
[22:22:25] [PASSED] Init resource in TTM_PL_SYSTEM
[22:22:25] [PASSED] Init resource in TTM_PL_VRAM
[22:22:25] [PASSED] Init resource in a private placement
[22:22:25] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[22:22:25] ============= [PASSED] ttm_resource_init_basic =============
[22:22:25] [PASSED] ttm_resource_init_pinned
[22:22:25] [PASSED] ttm_resource_fini_basic
[22:22:25] [PASSED] ttm_resource_manager_init_basic
[22:22:25] [PASSED] ttm_resource_manager_usage_basic
[22:22:25] [PASSED] ttm_resource_manager_set_used_basic
[22:22:25] [PASSED] ttm_sys_man_alloc_basic
[22:22:25] [PASSED] ttm_sys_man_free_basic
[22:22:25] ================== [PASSED] ttm_resource ===================
[22:22:25] =================== ttm_tt (15 subtests) ===================
[22:22:25] ==================== ttm_tt_init_basic  ====================
[22:22:25] [PASSED] Page-aligned size
[22:22:25] [PASSED] Extra pages requested
[22:22:25] ================ [PASSED] ttm_tt_init_basic ================
[22:22:25] [PASSED] ttm_tt_init_misaligned
[22:22:25] [PASSED] ttm_tt_fini_basic
[22:22:25] [PASSED] ttm_tt_fini_sg
[22:22:25] [PASSED] ttm_tt_fini_shmem
[22:22:25] [PASSED] ttm_tt_create_basic
[22:22:25] [PASSED] ttm_tt_create_invalid_bo_type
[22:22:25] [PASSED] ttm_tt_create_ttm_exists
[22:22:25] [PASSED] ttm_tt_create_failed
[22:22:25] [PASSED] ttm_tt_destroy_basic
[22:22:25] [PASSED] ttm_tt_populate_null_ttm
[22:22:25] [PASSED] ttm_tt_populate_populated_ttm
[22:22:25] [PASSED] ttm_tt_unpopulate_basic
[22:22:25] [PASSED] ttm_tt_unpopulate_empty_ttm
[22:22:25] [PASSED] ttm_tt_swapin_basic
[22:22:25] ===================== [PASSED] ttm_tt ======================
[22:22:25] =================== ttm_bo (14 subtests) ===================
[22:22:25] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[22:22:25] [PASSED] Cannot be interrupted and sleeps
[22:22:25] [PASSED] Cannot be interrupted, locks straight away
[22:22:25] [PASSED] Can be interrupted, sleeps
[22:22:25] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[22:22:25] [PASSED] ttm_bo_reserve_locked_no_sleep
[22:22:25] [PASSED] ttm_bo_reserve_no_wait_ticket
[22:22:25] [PASSED] ttm_bo_reserve_double_resv
[22:22:25] [PASSED] ttm_bo_reserve_interrupted
[22:22:25] [PASSED] ttm_bo_reserve_deadlock
[22:22:25] [PASSED] ttm_bo_unreserve_basic
[22:22:25] [PASSED] ttm_bo_unreserve_pinned
[22:22:25] [PASSED] ttm_bo_unreserve_bulk
[22:22:25] [PASSED] ttm_bo_fini_basic
[22:22:25] [PASSED] ttm_bo_fini_shared_resv
[22:22:25] [PASSED] ttm_bo_pin_basic
[22:22:25] [PASSED] ttm_bo_pin_unpin_resource
[22:22:25] [PASSED] ttm_bo_multiple_pin_one_unpin
[22:22:25] ===================== [PASSED] ttm_bo ======================
[22:22:25] ============== ttm_bo_validate (22 subtests) ===============
[22:22:25] ============== ttm_bo_init_reserved_sys_man  ===============
[22:22:25] [PASSED] Buffer object for userspace
[22:22:25] [PASSED] Kernel buffer object
[22:22:25] [PASSED] Shared buffer object
[22:22:25] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[22:22:25] ============== ttm_bo_init_reserved_mock_man  ==============
[22:22:25] [PASSED] Buffer object for userspace
[22:22:25] [PASSED] Kernel buffer object
[22:22:25] [PASSED] Shared buffer object
[22:22:25] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[22:22:25] [PASSED] ttm_bo_init_reserved_resv
[22:22:25] ================== ttm_bo_validate_basic  ==================
[22:22:25] [PASSED] Buffer object for userspace
[22:22:25] [PASSED] Kernel buffer object
[22:22:25] [PASSED] Shared buffer object
[22:22:25] ============== [PASSED] ttm_bo_validate_basic ==============
[22:22:25] [PASSED] ttm_bo_validate_invalid_placement
[22:22:25] ============= ttm_bo_validate_same_placement  ==============
[22:22:25] [PASSED] System manager
[22:22:25] [PASSED] VRAM manager
[22:22:25] ========= [PASSED] ttm_bo_validate_same_placement ==========
[22:22:25] [PASSED] ttm_bo_validate_failed_alloc
[22:22:25] [PASSED] ttm_bo_validate_pinned
[22:22:25] [PASSED] ttm_bo_validate_busy_placement
[22:22:25] ================ ttm_bo_validate_multihop  =================
[22:22:25] [PASSED] Buffer object for userspace
[22:22:25] [PASSED] Kernel buffer object
[22:22:25] [PASSED] Shared buffer object
[22:22:25] ============ [PASSED] ttm_bo_validate_multihop =============
[22:22:25] ========== ttm_bo_validate_no_placement_signaled  ==========
[22:22:25] [PASSED] Buffer object in system domain, no page vector
[22:22:25] [PASSED] Buffer object in system domain with an existing page vector
[22:22:25] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[22:22:25] ======== ttm_bo_validate_no_placement_not_signaled  ========
[22:22:25] [PASSED] Buffer object for userspace
[22:22:25] [PASSED] Kernel buffer object
[22:22:25] [PASSED] Shared buffer object
[22:22:25] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[22:22:25] [PASSED] ttm_bo_validate_move_fence_signaled
[22:22:25] ========= ttm_bo_validate_move_fence_not_signaled  =========
[22:22:25] [PASSED] Waits for GPU
[22:22:25] [PASSED] Tries to lock straight away
[22:22:25] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[22:22:25] [PASSED] ttm_bo_validate_swapout
[22:22:25] [PASSED] ttm_bo_validate_happy_evict
[22:22:25] [PASSED] ttm_bo_validate_all_pinned_evict
[22:22:25] [PASSED] ttm_bo_validate_allowed_only_evict
[22:22:25] [PASSED] ttm_bo_validate_deleted_evict
[22:22:25] [PASSED] ttm_bo_validate_busy_domain_evict
[22:22:25] [PASSED] ttm_bo_validate_evict_gutting
[22:22:25] [PASSED] ttm_bo_validate_recrusive_evict
[22:22:25] ================= [PASSED] ttm_bo_validate =================
[22:22:25] ============================================================
[22:22:25] Testing complete. Ran 102 tests: passed: 102
[22:22:25] Elapsed time: 11.517s total, 1.739s configuring, 9.562s building, 0.184s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 12+ messages in thread

* ✓ Xe.CI.BAT: success for drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels (rev2)
  2026-05-12 13:32 [PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels Ankit Nautiyal
                   ` (7 preceding siblings ...)
  2026-05-12 22:22 ` ✓ CI.KUnit: success " Patchwork
@ 2026-05-12 23:43 ` Patchwork
  2026-05-13 16:21 ` ✗ Xe.CI.FULL: failure " Patchwork
  9 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2026-05-12 23:43 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 990 bytes --]

== Series Details ==

Series: drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels (rev2)
URL   : https://patchwork.freedesktop.org/series/165603/
State : success

== Summary ==

CI Bug Log - changes from xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86_BAT -> xe-pw-165603v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86 -> xe-pw-165603v2

  IGT_8907: 6b305d78c65768c09cc7c0e902273bf409bbd218 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86: 9cb559e83f7f3c02c8c6566d3446cd37ecc56e86
  xe-pw-165603v2: 165603v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/index.html

[-- Attachment #2: Type: text/html, Size: 1538 bytes --]

^ permalink raw reply	[flat|nested] 12+ messages in thread

* ✗ Xe.CI.FULL: failure for drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels (rev2)
  2026-05-12 13:32 [PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels Ankit Nautiyal
                   ` (8 preceding siblings ...)
  2026-05-12 23:43 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-05-13 16:21 ` Patchwork
  9 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2026-05-13 16:21 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 25422 bytes --]

== Series Details ==

Series: drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels (rev2)
URL   : https://patchwork.freedesktop.org/series/165603/
State : failure

== Summary ==

CI Bug Log - changes from xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86_FULL -> xe-pw-165603v2_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-165603v2_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-165603v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-165603v2_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-lnl:          [PASS][1] -> [FAIL][2] +3 other tests fail
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-lnl-7/igt@kms_panel_fitting@atomic-fastset.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-lnl-5/igt@kms_panel_fitting@atomic-fastset.html

  
Known issues
------------

  Here are the changes found in xe-pw-165603v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2327]) +1 other test skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#1124]) +3 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#7679])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-4/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-target-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#367])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_bw@linear-tiling-3-displays-target-2560x1440p.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#3432])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2887]) +4 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2252]) +2 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html

  * igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][10] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2321] / [Intel XE#7355])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2320])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2286] / [Intel XE#6035])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dsc@dsc-fractional-bpp:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2244])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_dsc@dsc-fractional-bpp.html

  * igt@kms_flip@2x-flip-vs-panning@ac-dp2-hdmi-a3:
    - shard-bmg:          [PASS][15] -> [DMESG-FAIL][16] ([Intel XE#5545])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_flip@2x-flip-vs-panning@ac-dp2-hdmi-a3.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-2/igt@kms_flip@2x-flip-vs-panning@ac-dp2-hdmi-a3.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [PASS][17] -> [FAIL][18] ([Intel XE#301]) +2 other tests fail
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#7178] / [Intel XE#7351]) +3 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2311]) +22 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#4141]) +7 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#7061]) +2 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-shrfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2313]) +17 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#7915])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb2101010:
    - shard-bmg:          [PASS][25] -> [SKIP][26] ([Intel XE#7915]) +2 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-5/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb2101010.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb2101010.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#7283]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#5021] / [Intel XE#7377])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#5020] / [Intel XE#7348])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_pm_backlight@fade:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#7376] / [Intel XE#870]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-4/igt@kms_pm_backlight@fade.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#7794])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#1489]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr@psr-basic:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2234] / [Intel XE#2850]) +6 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_psr@psr-basic.html

  * igt@kms_scaling_modes@scaling-mode-center@pipe-a-edp-1:
    - shard-lnl:          [PASS][34] -> [SKIP][35] ([Intel XE#374]) +8 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-lnl-4/igt@kms_scaling_modes@scaling-mode-center@pipe-a-edp-1.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-lnl-3/igt@kms_scaling_modes@scaling-mode-center@pipe-a-edp-1.html

  * igt@kms_scaling_modes@scaling-mode-full-aspect:
    - shard-lnl:          [PASS][36] -> [SKIP][37] ([Intel XE#2413] / [Intel XE#374]) +2 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-lnl-1/igt@kms_scaling_modes@scaling-mode-full-aspect.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-lnl-1/igt@kms_scaling_modes@scaling-mode-full-aspect.html

  * igt@kms_sharpness_filter@invalid-plane-with-filter:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#6503]) +2 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-4/igt@kms_sharpness_filter@invalid-plane-with-filter.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2426] / [Intel XE#5848])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#1499])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_vrr@flip-suspend.html

  * igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
    - shard-lnl:          [PASS][41] -> [FAIL][42] ([Intel XE#5862]) +1 other test fail
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-lnl-5/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-lnl-4/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html

  * igt@xe_create@multigpu-create-massive-size:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#2504] / [Intel XE#7319] / [Intel XE#7350])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-4/igt@xe_create@multigpu-create-massive-size.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2322] / [Intel XE#7372]) +3 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-imm:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#7136]) +4 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@xe_exec_fault_mode@many-execqueues-multi-queue-imm.html

  * igt@xe_exec_multi_queue@two-queues-close-fd:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#6874]) +12 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@xe_exec_multi_queue@two-queues-close-fd.html

  * igt@xe_exec_reset@cm-multi-queue-close-fd:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#7866])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@xe_exec_reset@cm-multi-queue-close-fd.html

  * igt@xe_exec_sip_eudebug@breakpoint-writesip-nodebug:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#7636]) +6 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@xe_exec_sip_eudebug@breakpoint-writesip-nodebug.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-basic:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#7138]) +4 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-cm-fd-basic.html

  * igt@xe_mmap@small-bar:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#586] / [Intel XE#7323] / [Intel XE#7384])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@xe_mmap@small-bar.html

  * igt@xe_multigpu_svm@mgpu-pagefault-basic:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#6964]) +2 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@xe_multigpu_svm@mgpu-pagefault-basic.html

  * igt@xe_page_reclaim@prl-invalidate-full:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#7793]) +1 other test skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@xe_page_reclaim@prl-invalidate-full.html

  * igt@xe_pm@d3cold-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#5694] / [Intel XE#7370])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@xe_pm@d3cold-i2c.html

  * igt@xe_pxp@pxp-termination-key-update-post-termination-irq:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#4733] / [Intel XE#7417])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-4/igt@xe_pxp@pxp-termination-key-update-post-termination-irq.html

  * igt@xe_wedged@wedged-mode-toggle:
    - shard-lnl:          [PASS][55] -> [ABORT][56] ([Intel XE#7914])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-lnl-3/igt@xe_wedged@wedged-mode-toggle.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-lnl-8/igt@xe_wedged@wedged-mode-toggle.html

  
#### Possible fixes ####

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-lnl:          [FAIL][57] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_hdr@bpc-switch-suspend@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          [INCOMPLETE][59] -> [PASS][60] +1 other test pass
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-9/igt@kms_hdr@bpc-switch-suspend@pipe-a-hdmi-a-3-xrgb16161616f.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-9/igt@kms_hdr@bpc-switch-suspend@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010:
    - shard-bmg:          [SKIP][61] ([Intel XE#7915]) -> [PASS][62] +1 other test pass
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-8/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-5/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010.html

  * igt@kms_setmode@basic@pipe-a-hdmi-a-3:
    - shard-bmg:          [FAIL][63] ([Intel XE#6361]) -> [PASS][64] +1 other test pass
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-5/igt@kms_setmode@basic@pipe-a-hdmi-a-3.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-1/igt@kms_setmode@basic@pipe-a-hdmi-a-3.html

  * igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads:
    - shard-bmg:          [FAIL][65] -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-10/igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-4/igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads.html

  
#### Warnings ####

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-lnl:          [SKIP][67] ([Intel XE#309] / [Intel XE#7343]) -> [SKIP][68] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-lnl-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][69] ([Intel XE#301] / [Intel XE#3149]) -> [FAIL][70] ([Intel XE#301])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][71] ([Intel XE#3544] / [Intel XE#7915] / [Intel XE#7916]) -> [SKIP][72] ([Intel XE#3544] / [Intel XE#7916])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-6/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          [SKIP][73] ([Intel XE#7915]) -> [SKIP][74] ([Intel XE#7916]) +1 other test skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-3/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/shard-bmg-6/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/374
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
  [Intel XE#5862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5862
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7319]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7319
  [Intel XE#7323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7323
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7350
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7377
  [Intel XE#7384]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7384
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7794
  [Intel XE#7866]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7866
  [Intel XE#7914]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7914
  [Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
  [Intel XE#7916]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7916
  [Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870


Build changes
-------------

  * Linux: xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86 -> xe-pw-165603v2

  IGT_8907: 6b305d78c65768c09cc7c0e902273bf409bbd218 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86: 9cb559e83f7f3c02c8c6566d3446cd37ecc56e86
  xe-pw-165603v2: 165603v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165603v2/index.html

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^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2026-05-19 14:56 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-12 13:32 [PATCH 0/6] drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels Ankit Nautiyal
2026-05-12 13:32 ` [PATCH 1/6] drm/i915/display: Deprecate TRANS_VSYNC where VRR TG is always on Ankit Nautiyal
2026-05-19 14:56   ` Ville Syrjälä
2026-05-12 13:32 ` [PATCH 2/6] drm/i915/panel: Preserve Vtotal-Vsync distance while adjusting vtotal Ankit Nautiyal
2026-05-12 13:32 ` [PATCH 3/6] drm/i915/intel_panel: Add a helper to get the highest refresh rate mode Ankit Nautiyal
2026-05-12 13:32 ` [PATCH 4/6] drm/i915/intel_panel: Pass crtc_state to intel_panel_compute_config Ankit Nautiyal
2026-05-12 13:32 ` [PATCH 5/6] drm/i915/intel_panel: Use highest refresh rate mode for VRR panels Ankit Nautiyal
2026-05-12 13:32 ` [PATCH 6/6] drm/i915/intel_panel: Refine VRR fixed mode selection for DRRS panels Ankit Nautiyal
2026-05-12 22:21 ` ✗ CI.checkpatch: warning for drm/i915/intel_panel: Fix seamless VRR mode switching for DRRS panels (rev2) Patchwork
2026-05-12 22:22 ` ✓ CI.KUnit: success " Patchwork
2026-05-12 23:43 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-13 16:21 ` ✗ Xe.CI.FULL: failure " Patchwork

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