* [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP
@ 2026-06-12 14:41 Ville Syrjala
2026-06-12 14:42 ` [PATCH 1/4] drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR Ville Syrjala
` (8 more replies)
0 siblings, 9 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-06-12 14:41 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, dri-devel
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Tweak the eDP fixed mode selection algorithm to allow
userspace to do refresh rate changes on VRR capable
eDP panels without full modesets.
Ville Syrjälä (4):
drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
drm/i915: Pass the full atomic state to .compute_config()
drm/i915/panel: Adjust intel_panel_compute_config() calling convention
drm/i915/panel: Attempt VRR based refresh rate change for
!allow_modeset
drivers/gpu/drm/drm_modes.c | 23 +++++++
drivers/gpu/drm/i915/display/g4x_dp.c | 5 +-
drivers/gpu/drm/i915/display/g4x_hdmi.c | 4 +-
drivers/gpu/drm/i915/display/icl_dsi.c | 5 +-
drivers/gpu/drm/i915/display/intel_crt.c | 9 ++-
drivers/gpu/drm/i915/display/intel_ddi.c | 8 ++-
drivers/gpu/drm/i915/display/intel_display.c | 4 +-
.../drm/i915/display/intel_display_types.h | 6 +-
drivers/gpu/drm/i915/display/intel_dp.c | 6 +-
drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 8 +--
drivers/gpu/drm/i915/display/intel_dvo.c | 5 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 5 +-
drivers/gpu/drm/i915/display/intel_panel.c | 61 ++++++++++++++++---
drivers/gpu/drm/i915/display/intel_panel.h | 6 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 7 ++-
drivers/gpu/drm/i915/display/intel_tv.c | 5 +-
drivers/gpu/drm/i915/display/vlv_dsi.c | 5 +-
include/drm/drm_modes.h | 1 +
19 files changed, 131 insertions(+), 45 deletions(-)
--
2.53.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/4] drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
2026-06-12 14:41 [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
@ 2026-06-12 14:42 ` Ville Syrjala
2026-06-13 14:19 ` Kandpal, Suraj
2026-06-12 14:42 ` [PATCH 2/4] drm/i915: Pass the full atomic state to .compute_config() Ville Syrjala
` (7 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjala @ 2026-06-12 14:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, dri-devel
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add a new mode matching flag DRM_MODE_MATCH_TIMINGS_VRR. This is
identical to DRM_MODE_MATCH_TIMINGS, except it requires the vsync
pulse to remain anchored to the end of vtotal, as opposed to the
start of the frame. VRR capable hardware can therefore treat
matching modes as just variants of the same mode with a different
vblank lengths.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/drm_modes.c | 23 +++++++++++++++++++++++
include/drm/drm_modes.h | 1 +
2 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 3f8e025fd6d9..e1eed13a8e94 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -1469,6 +1469,25 @@ struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
}
EXPORT_SYMBOL(drm_mode_duplicate);
+static bool drm_mode_match_timings_vrr(const struct drm_display_mode *mode1,
+ const struct drm_display_mode *mode2)
+{
+ int mode1_vsync_start_offset = mode1->vtotal - mode1->vsync_start;
+ int mode1_vsync_end_offset = mode1->vtotal - mode1->vsync_end;
+ int mode2_vsync_start_offset = mode2->vtotal - mode2->vsync_start;
+ int mode2_vsync_end_offset = mode2->vtotal - mode2->vsync_end;
+
+ return mode1->hdisplay == mode2->hdisplay &&
+ mode1->hsync_start == mode2->hsync_start &&
+ mode1->hsync_end == mode2->hsync_end &&
+ mode1->htotal == mode2->htotal &&
+ mode1->hskew == mode2->hskew &&
+ mode1->vdisplay == mode2->vdisplay &&
+ mode1_vsync_start_offset == mode2_vsync_start_offset &&
+ mode1_vsync_end_offset == mode2_vsync_end_offset &&
+ mode1->vscan == mode2->vscan;
+}
+
static bool drm_mode_match_timings(const struct drm_display_mode *mode1,
const struct drm_display_mode *mode2)
{
@@ -1538,6 +1557,10 @@ bool drm_mode_match(const struct drm_display_mode *mode1,
if (!mode1 || !mode2)
return false;
+ if (match_flags & DRM_MODE_MATCH_TIMINGS_VRR &&
+ !drm_mode_match_timings_vrr(mode1, mode2))
+ return false;
+
if (match_flags & DRM_MODE_MATCH_TIMINGS &&
!drm_mode_match_timings(mode1, mode2))
return false;
diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h
index b9bb92e4b029..6e3eccc3c349 100644
--- a/include/drm/drm_modes.h
+++ b/include/drm/drm_modes.h
@@ -193,6 +193,7 @@ enum drm_mode_status {
#define DRM_MODE_MATCH_FLAGS (1 << 2)
#define DRM_MODE_MATCH_3D_FLAGS (1 << 3)
#define DRM_MODE_MATCH_ASPECT_RATIO (1 << 4)
+#define DRM_MODE_MATCH_TIMINGS_VRR (1 << 5)
/**
* struct drm_display_mode - DRM kernel-internal display mode structure
--
2.53.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/4] drm/i915: Pass the full atomic state to .compute_config()
2026-06-12 14:41 [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
2026-06-12 14:42 ` [PATCH 1/4] drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR Ville Syrjala
@ 2026-06-12 14:42 ` Ville Syrjala
2026-06-13 14:23 ` Kandpal, Suraj
2026-06-12 14:42 ` [PATCH 3/4] drm/i915/panel: Adjust intel_panel_compute_config() calling convention Ville Syrjala
` (6 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjala @ 2026-06-12 14:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, dri-devel
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Upcoming changes will need access to the full atomic state
in .compute_config(). Pass it in from the top.
Couple of the implementations already dug this out via the
crtc_state/conn_state->state pointer, but we don't want to
use that anywhere because it's a bit of a footgun by only
being valid during the early stages of the commit.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 5 +++--
drivers/gpu/drm/i915/display/g4x_hdmi.c | 4 ++--
drivers/gpu/drm/i915/display/icl_dsi.c | 3 ++-
drivers/gpu/drm/i915/display/intel_crt.c | 9 ++++++---
drivers/gpu/drm/i915/display/intel_ddi.c | 8 +++++---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++++--
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dp.h | 3 ++-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 8 ++++----
drivers/gpu/drm/i915/display/intel_dvo.c | 3 ++-
drivers/gpu/drm/i915/display/intel_lvds.c | 3 ++-
drivers/gpu/drm/i915/display/intel_sdvo.c | 3 ++-
drivers/gpu/drm/i915/display/intel_tv.c | 5 ++---
drivers/gpu/drm/i915/display/vlv_dsi.c | 3 ++-
15 files changed, 42 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index d211e6c49e0a..b867443ff227 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -1222,7 +1222,8 @@ static bool ilk_digital_port_connected(struct intel_encoder *encoder)
return intel_de_read(display, DEISR) & bit;
}
-static int g4x_dp_compute_config(struct intel_encoder *encoder,
+static int g4x_dp_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
@@ -1232,7 +1233,7 @@ static int g4x_dp_compute_config(struct intel_encoder *encoder,
if (HAS_PCH_SPLIT(display) && encoder->port != PORT_A)
crtc_state->has_pch_encoder = true;
- ret = intel_dp_compute_config(encoder, crtc_state, conn_state);
+ ret = intel_dp_compute_config(state, encoder, crtc_state, conn_state);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index acb36cab999c..4c33aa1d1d32 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -126,12 +126,12 @@ static bool g4x_compute_has_hdmi_sink(struct intel_atomic_state *state,
return false;
}
-static int g4x_hdmi_compute_config(struct intel_encoder *encoder,
+static int g4x_hdmi_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
if (HAS_PCH_SPLIT(display))
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index a549f1fac810..59184f2f805c 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1657,7 +1657,8 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
return 0;
}
-static int gen11_dsi_compute_config(struct intel_encoder *encoder,
+static int gen11_dsi_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 243e332bef57..5b8968197fbc 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -397,7 +397,8 @@ intel_crt_mode_valid(struct drm_connector *connector,
return MODE_OK;
}
-static int intel_crt_compute_config(struct intel_encoder *encoder,
+static int intel_crt_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
@@ -413,7 +414,8 @@ static int intel_crt_compute_config(struct intel_encoder *encoder,
return 0;
}
-static int pch_crt_compute_config(struct intel_encoder *encoder,
+static int pch_crt_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
@@ -432,7 +434,8 @@ static int pch_crt_compute_config(struct intel_encoder *encoder,
return 0;
}
-static int hsw_crt_compute_config(struct intel_encoder *encoder,
+static int hsw_crt_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 2684e33b602d..91cac4e1d94a 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4480,7 +4480,8 @@ intel_ddi_compute_output_type(struct intel_encoder *encoder,
}
}
-static int intel_ddi_compute_config(struct intel_encoder *encoder,
+static int intel_ddi_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
@@ -4498,7 +4499,7 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
ret = intel_hdmi_compute_config(encoder, pipe_config, conn_state);
} else {
- ret = intel_dp_compute_config(encoder, pipe_config, conn_state);
+ ret = intel_dp_compute_config(state, encoder, pipe_config, conn_state);
}
if (ret)
@@ -4603,7 +4604,8 @@ intel_ddi_port_sync_transcoders(const struct intel_crtc_state *ref_crtc_state,
return transcoders;
}
-static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
+static int intel_ddi_compute_config_late(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e2e4b00a8fa9..1db1c3ea0873 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4793,7 +4793,7 @@ intel_modeset_pipe_config(struct intel_atomic_state *state,
if (connector_state->crtc != &crtc->base)
continue;
- ret = encoder->compute_config(encoder, crtc_state,
+ ret = encoder->compute_config(state, encoder, crtc_state,
connector_state);
if (ret == -EDEADLK)
return ret;
@@ -4853,7 +4853,7 @@ intel_modeset_pipe_config_late(struct intel_atomic_state *state,
!encoder->compute_config_late)
continue;
- ret = encoder->compute_config_late(encoder, crtc_state,
+ ret = encoder->compute_config_late(state, encoder, crtc_state,
conn_state);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index aa4772a1c208..beaa89afb3ff 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -178,10 +178,12 @@ struct intel_encoder {
enum intel_output_type (*compute_output_type)(struct intel_encoder *,
struct intel_crtc_state *,
struct drm_connector_state *);
- int (*compute_config)(struct intel_encoder *,
+ int (*compute_config)(struct intel_atomic_state *,
+ struct intel_encoder *,
struct intel_crtc_state *,
struct drm_connector_state *);
- int (*compute_config_late)(struct intel_encoder *,
+ int (*compute_config_late)(struct intel_atomic_state *,
+ struct intel_encoder *,
struct intel_crtc_state *,
struct drm_connector_state *);
void (*pre_pll_enable)(struct intel_atomic_state *,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3569e61e7fee..b9324b590ee9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3627,12 +3627,12 @@ int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state,
}
int
-intel_dp_compute_config(struct intel_encoder *encoder,
+intel_dp_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
struct intel_connector *connector = intel_dp->attached_connector;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 92ce04852326..b233739b89ce 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -71,7 +71,8 @@ void intel_dp_sink_disable_decompression(struct intel_atomic_state *state,
void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
-int intel_dp_compute_config(struct intel_encoder *encoder,
+int intel_dp_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state);
bool intel_dp_needs_8b10b_fec(const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index bcdc50491347..a2f9440ab84a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -697,12 +697,12 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
return 0;
}
-static int mst_stream_compute_config(struct intel_encoder *encoder,
+static int mst_stream_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_dp *intel_dp = to_primary_dp(encoder);
struct intel_connector *connector =
@@ -921,11 +921,11 @@ int intel_dp_mst_atomic_check_link(struct intel_atomic_state *state,
return 0;
}
-static int mst_stream_compute_config_late(struct intel_encoder *encoder,
+static int mst_stream_compute_config_late(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
- struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
struct intel_dp *intel_dp = to_primary_dp(encoder);
/* lowest numbered transcoder will be designated master */
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index dd1a995c2979..181722c41b96 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -242,7 +242,8 @@ intel_dvo_mode_valid(struct drm_connector *_connector,
return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
}
-static int intel_dvo_compute_config(struct intel_encoder *encoder,
+static int intel_dvo_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index c8098104d853..30e4809b36ac 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -413,7 +413,8 @@ intel_lvds_mode_valid(struct drm_connector *_connector,
return MODE_OK;
}
-static int intel_lvds_compute_config(struct intel_encoder *encoder,
+static int intel_lvds_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index d83d350959d8..6b73c9a5ec7f 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -1354,7 +1354,8 @@ static bool intel_sdvo_has_audio(struct intel_encoder *encoder,
return intel_conn_state->force_audio == HDMI_AUDIO_ON;
}
-static int intel_sdvo_compute_config(struct intel_encoder *encoder,
+static int intel_sdvo_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
index 0a926c6f25f4..840e1dcdc2d0 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -1187,13 +1187,12 @@ static bool intel_tv_vert_scaling(const struct drm_display_mode *tv_mode,
}
static int
-intel_tv_compute_config(struct intel_encoder *encoder,
+intel_tv_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct intel_atomic_state *state =
- to_intel_atomic_state(pipe_config->uapi.state);
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_tv_connector_state *tv_conn_state =
to_intel_tv_connector_state(conn_state);
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index 877eab75f19a..b89318f5bdc2 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -266,7 +266,8 @@ static void band_gap_reset(struct intel_display *display)
vlv_flisdsi_put(display);
}
-static int intel_dsi_compute_config(struct intel_encoder *encoder,
+static int intel_dsi_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
--
2.53.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 3/4] drm/i915/panel: Adjust intel_panel_compute_config() calling convention
2026-06-12 14:41 [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
2026-06-12 14:42 ` [PATCH 1/4] drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR Ville Syrjala
2026-06-12 14:42 ` [PATCH 2/4] drm/i915: Pass the full atomic state to .compute_config() Ville Syrjala
@ 2026-06-12 14:42 ` Ville Syrjala
2026-06-13 14:25 ` Kandpal, Suraj
2026-06-12 14:42 ` [PATCH 4/4] drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset Ville Syrjala
` (5 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjala @ 2026-06-12 14:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, dri-devel
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pass the full atomic state to intel_panel_compute_config(). We'll
need this for some upcoming VRR fastset tricks. And to accompany
full state we'll also need the crtc (or its state) as well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dvo.c | 2 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 2 +-
drivers/gpu/drm/i915/display/intel_panel.c | 6 ++++--
drivers/gpu/drm/i915/display/intel_panel.h | 6 ++++--
drivers/gpu/drm/i915/display/intel_sdvo.c | 4 ++--
drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +-
8 files changed, 15 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 59184f2f805c..ea0cdb7822f3 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1672,7 +1672,7 @@ static int gen11_dsi_compute_config(struct intel_atomic_state *state,
pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
- ret = intel_panel_compute_config(intel_connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config, intel_connector);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index b9324b590ee9..da8a94821c11 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3639,7 +3639,7 @@ intel_dp_compute_config(struct intel_atomic_state *state,
int ret = 0, link_bpp_x16;
if (intel_dp_is_edp(intel_dp)) {
- ret = intel_panel_compute_config(connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config, connector);
if (ret)
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index 181722c41b96..f157699a7c4c 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -257,7 +257,7 @@ static int intel_dvo_compute_config(struct intel_atomic_state *state,
* with the panel scaling set up to source from the H/VDisplay
* of the original mode.
*/
- ret = intel_panel_compute_config(connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config, connector);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 30e4809b36ac..872753478cf2 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -460,7 +460,7 @@ static int intel_lvds_compute_config(struct intel_atomic_state *state,
* with the panel scaling set up to source from the H/VDisplay
* of the original mode.
*/
- ret = intel_panel_compute_config(connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, crtc_state, connector);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 81fb349ece5f..af59fc946fcb 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -197,9 +197,11 @@ enum drrs_type intel_panel_drrs_type(struct intel_connector *connector)
return connector->panel.vbt.drrs_type;
}
-int intel_panel_compute_config(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode)
+int intel_panel_compute_config(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector)
{
+ struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
const struct drm_display_mode *fixed_mode =
intel_panel_fixed_mode(connector, adjusted_mode);
int vrefresh, fixed_mode_vrefresh;
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index 23bd227826c9..30c6078ecb1b 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -14,6 +14,7 @@ struct drm_connector;
struct drm_connector_state;
struct drm_display_mode;
struct drm_edid;
+struct intel_atomic_state;
struct intel_connector;
struct intel_crtc_state;
struct intel_display;
@@ -45,8 +46,9 @@ enum drm_mode_status
intel_panel_mode_valid(struct intel_connector *connector,
const struct drm_display_mode *mode,
int *target_clock);
-int intel_panel_compute_config(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode);
+int intel_panel_compute_config(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector);
void intel_panel_add_edid_fixed_modes(struct intel_connector *connector,
bool use_alt_fixed_modes);
void intel_panel_add_vbt_lfp_fixed_mode(struct intel_connector *connector);
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 6b73c9a5ec7f..3075ef04df56 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -1399,8 +1399,8 @@ static int intel_sdvo_compute_config(struct intel_atomic_state *state,
const struct drm_display_mode *fixed_mode;
int ret;
- ret = intel_panel_compute_config(&intel_sdvo_connector->base,
- adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config,
+ &intel_sdvo_connector->base);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index b89318f5bdc2..8829f365592e 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -281,7 +281,7 @@ static int intel_dsi_compute_config(struct intel_atomic_state *state,
pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
- ret = intel_panel_compute_config(intel_connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config, intel_connector);
if (ret)
return ret;
--
2.53.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 4/4] drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset
2026-06-12 14:41 [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (2 preceding siblings ...)
2026-06-12 14:42 ` [PATCH 3/4] drm/i915/panel: Adjust intel_panel_compute_config() calling convention Ville Syrjala
@ 2026-06-12 14:42 ` Ville Syrjala
2026-06-15 5:17 ` Nautiyal, Ankit K
2026-06-12 14:58 ` ✗ CI.checkpatch: warning for drm/i915: Work harder to enable VRR based refresh rate changes on eDP Patchwork
` (4 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjala @ 2026-06-12 14:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, dri-devel
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Adjust the panel fixed mode selection algorithm to only consider
fixed modes that are "VRR compatible" with the old fixed mode
when userspace doesn't want to allow full modesets. This will
allow a VRR based refresh rate changes (ie. just a change in
the vblank length) via the fastset path.
When full modesets are allowed, we still use the original algorithm
as that may pick a fixed mode with a more optimal dotclock, potentially
leading to reduced power consumption.
This approach works as long as userspace does the initial
allow_modeset=true commit using the highest refresh rate it will
want to use. Subsequent commits with allow_modeset=false can then
switch between lower refresh rates without blinks.
One remaining hurdle we may need to solve is the guardband length.
Assuming the highest refresh rate vblank is too short for
intel_vrr_compute_optimized_guardband() the intitial guardband will
match the highest refresh rate vblank. A subsequent switch to a lower
refresh rate will then recompute the guardband and select a value
that is higher (since the vblank will be longer). The mismatch in
guardband lengths will prevent the fastset. We may either have to
preserve the original (sub-optimal) guardband, or we'll have to
revisit the idea of changing the guardband without a full modeset.
Note that I'm not 100% happy with this solution because
intel_panel_fixed_mode() is no longer fully idempotent, but I wasn't
able to come up with anything truly better either :/ The simple
solution would be just to always pick the fixed mode with the highest
dotclock, but that could lead to increased power consumption even
when high refresh rates are never used.
Perhaps the proper solution would be to just deprecate this
idea of taking in random modes for internal panels and then
cooking up a compatible fixed modes. Life would be easier if
userspace was required to provide the desired fixed mode directly.
But in order to do that we'd need to introduce new uapi properties
to control the pfit aspect of this, and we'd probably need a new
client cap to select between the old and new userspace behaviour.
Something to consider in the future...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_panel.c | 55 ++++++++++++++++++++--
1 file changed, 50 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index af59fc946fcb..a5fcac1318da 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -82,16 +82,37 @@ static bool is_best_fixed_mode(struct intel_connector *connector,
abs(drm_mode_vrefresh(best_mode) - vrefresh);
}
-const struct drm_display_mode *
-intel_panel_fixed_mode(struct intel_connector *connector,
- const struct drm_display_mode *mode)
+static bool is_vrr_compatible(const struct drm_display_mode *mode1,
+ const struct drm_display_mode *mode2)
+{
+ return drm_mode_match(mode1, mode2,
+ DRM_MODE_MATCH_CLOCK |
+ DRM_MODE_MATCH_TIMINGS_VRR |
+ DRM_MODE_MATCH_FLAGS |
+ DRM_MODE_MATCH_3D_FLAGS);
+}
+
+static const struct drm_display_mode *
+_intel_panel_fixed_mode(struct intel_connector *connector,
+ const struct drm_display_mode *mode,
+ const struct drm_display_mode *vrr_ref_mode)
{
const struct drm_display_mode *fixed_mode, *best_mode = NULL;
int vrefresh = drm_mode_vrefresh(mode);
+ if (vrr_ref_mode &&
+ (!intel_vrr_is_in_range(connector, vrefresh) ||
+ !intel_vrr_is_in_range(connector, drm_mode_vrefresh(vrr_ref_mode))))
+ return NULL;
+
list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
int fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
+ if (vrr_ref_mode &&
+ (!intel_vrr_is_in_range(connector, fixed_mode_vrefresh) ||
+ !is_vrr_compatible(fixed_mode, vrr_ref_mode)))
+ continue;
+
if (is_best_fixed_mode(connector, vrefresh,
fixed_mode_vrefresh, best_mode))
best_mode = fixed_mode;
@@ -100,6 +121,13 @@ intel_panel_fixed_mode(struct intel_connector *connector,
return best_mode;
}
+const struct drm_display_mode *
+intel_panel_fixed_mode(struct intel_connector *connector,
+ const struct drm_display_mode *mode)
+{
+ return _intel_panel_fixed_mode(connector, mode, NULL);
+}
+
static bool is_alt_drrs_mode(const struct drm_display_mode *mode,
const struct drm_display_mode *preferred_mode)
{
@@ -202,11 +230,28 @@ int intel_panel_compute_config(struct intel_atomic_state *state,
struct intel_connector *connector)
{
struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
- const struct drm_display_mode *fixed_mode =
- intel_panel_fixed_mode(connector, adjusted_mode);
+ const struct drm_display_mode *fixed_mode = NULL;
int vrefresh, fixed_mode_vrefresh;
bool is_vrr;
+ /*
+ * Attempt a VRR based refresh rate change if possible
+ * when userspace has forbidden a full modeset.
+ */
+ if (!state->base.allow_modeset) {
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ const struct intel_crtc_state *old_crtc_state =
+ intel_atomic_get_old_crtc_state(state, crtc);
+
+ if (old_crtc_state->hw.enable &&
+ old_crtc_state->uapi.encoder_mask == crtc_state->uapi.encoder_mask)
+ fixed_mode = _intel_panel_fixed_mode(connector, adjusted_mode,
+ &old_crtc_state->hw.adjusted_mode);
+ }
+
+ if (!fixed_mode)
+ fixed_mode = intel_panel_fixed_mode(connector, adjusted_mode);
+
if (!fixed_mode)
return 0;
--
2.53.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* ✗ CI.checkpatch: warning for drm/i915: Work harder to enable VRR based refresh rate changes on eDP
2026-06-12 14:41 [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (3 preceding siblings ...)
2026-06-12 14:42 ` [PATCH 4/4] drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset Ville Syrjala
@ 2026-06-12 14:58 ` Patchwork
2026-06-12 14:59 ` ✓ CI.KUnit: success " Patchwork
` (3 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-06-12 14:58 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915: Work harder to enable VRR based refresh rate changes on eDP
URL : https://patchwork.freedesktop.org/series/168442/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 29b8e4fb7d58f107e022157a058dc631f991ac92
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Fri Jun 12 17:42:03 2026 +0300
drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset
Adjust the panel fixed mode selection algorithm to only consider
fixed modes that are "VRR compatible" with the old fixed mode
when userspace doesn't want to allow full modesets. This will
allow a VRR based refresh rate changes (ie. just a change in
the vblank length) via the fastset path.
When full modesets are allowed, we still use the original algorithm
as that may pick a fixed mode with a more optimal dotclock, potentially
leading to reduced power consumption.
This approach works as long as userspace does the initial
allow_modeset=true commit using the highest refresh rate it will
want to use. Subsequent commits with allow_modeset=false can then
switch between lower refresh rates without blinks.
One remaining hurdle we may need to solve is the guardband length.
Assuming the highest refresh rate vblank is too short for
intel_vrr_compute_optimized_guardband() the intitial guardband will
match the highest refresh rate vblank. A subsequent switch to a lower
refresh rate will then recompute the guardband and select a value
that is higher (since the vblank will be longer). The mismatch in
guardband lengths will prevent the fastset. We may either have to
preserve the original (sub-optimal) guardband, or we'll have to
revisit the idea of changing the guardband without a full modeset.
Note that I'm not 100% happy with this solution because
intel_panel_fixed_mode() is no longer fully idempotent, but I wasn't
able to come up with anything truly better either :/ The simple
solution would be just to always pick the fixed mode with the highest
dotclock, but that could lead to increased power consumption even
when high refresh rates are never used.
Perhaps the proper solution would be to just deprecate this
idea of taking in random modes for internal panels and then
cooking up a compatible fixed modes. Life would be easier if
userspace was required to provide the desired fixed mode directly.
But in order to do that we'd need to introduce new uapi properties
to control the pfit aspect of this, and we'd probably need a new
client cap to select between the old and new userspace behaviour.
Something to consider in the future...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+ /mt/dim checkpatch 536f4e1338749a805ec4a7b82b1444dae2c6fe4d drm-intel
8950e467b43a drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
fb3b90d7b4f6 drm/i915: Pass the full atomic state to .compute_config()
-:173: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#173: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:181:
+ int (*compute_config)(struct intel_atomic_state *,
-:173: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#173: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:181:
+ int (*compute_config)(struct intel_atomic_state *,
-:173: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_crtc_state *' should also have an identifier name
#173: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:181:
+ int (*compute_config)(struct intel_atomic_state *,
-:173: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct drm_connector_state *' should also have an identifier name
#173: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:181:
+ int (*compute_config)(struct intel_atomic_state *,
-:178: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#178: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:185:
+ int (*compute_config_late)(struct intel_atomic_state *,
-:178: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#178: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:185:
+ int (*compute_config_late)(struct intel_atomic_state *,
-:178: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_crtc_state *' should also have an identifier name
#178: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:185:
+ int (*compute_config_late)(struct intel_atomic_state *,
-:178: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct drm_connector_state *' should also have an identifier name
#178: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:185:
+ int (*compute_config_late)(struct intel_atomic_state *,
total: 0 errors, 8 warnings, 0 checks, 224 lines checked
2ca258c9d96a drm/i915/panel: Adjust intel_panel_compute_config() calling convention
29b8e4fb7d58 drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ CI.KUnit: success for drm/i915: Work harder to enable VRR based refresh rate changes on eDP
2026-06-12 14:41 [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (4 preceding siblings ...)
2026-06-12 14:58 ` ✗ CI.checkpatch: warning for drm/i915: Work harder to enable VRR based refresh rate changes on eDP Patchwork
@ 2026-06-12 14:59 ` Patchwork
2026-06-12 15:54 ` ✓ Xe.CI.BAT: " Patchwork
` (2 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-06-12 14:59 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915: Work harder to enable VRR based refresh rate changes on eDP
URL : https://patchwork.freedesktop.org/series/168442/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[14:58:27] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:58:31] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:59:02] Starting KUnit Kernel (1/1)...
[14:59:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:59:03] ================== guc_buf (11 subtests) ===================
[14:59:03] [PASSED] test_smallest
[14:59:03] [PASSED] test_largest
[14:59:03] [PASSED] test_granular
[14:59:03] [PASSED] test_unique
[14:59:03] [PASSED] test_overlap
[14:59:03] [PASSED] test_reusable
[14:59:03] [PASSED] test_too_big
[14:59:03] [PASSED] test_flush
[14:59:03] [PASSED] test_lookup
[14:59:03] [PASSED] test_data
[14:59:03] [PASSED] test_class
[14:59:03] ===================== [PASSED] guc_buf =====================
[14:59:03] =================== guc_dbm (7 subtests) ===================
[14:59:03] [PASSED] test_empty
[14:59:03] [PASSED] test_default
[14:59:03] ======================== test_size ========================
[14:59:03] [PASSED] 4
[14:59:03] [PASSED] 8
[14:59:03] [PASSED] 32
[14:59:03] [PASSED] 256
[14:59:03] ==================== [PASSED] test_size ====================
[14:59:03] ======================= test_reuse ========================
[14:59:03] [PASSED] 4
[14:59:03] [PASSED] 8
[14:59:03] [PASSED] 32
[14:59:03] [PASSED] 256
[14:59:03] =================== [PASSED] test_reuse ====================
[14:59:03] =================== test_range_overlap ====================
[14:59:03] [PASSED] 4
[14:59:03] [PASSED] 8
[14:59:03] [PASSED] 32
[14:59:03] [PASSED] 256
[14:59:03] =============== [PASSED] test_range_overlap ================
[14:59:03] =================== test_range_compact ====================
[14:59:03] [PASSED] 4
[14:59:03] [PASSED] 8
[14:59:03] [PASSED] 32
[14:59:03] [PASSED] 256
[14:59:03] =============== [PASSED] test_range_compact ================
[14:59:03] ==================== test_range_spare =====================
[14:59:03] [PASSED] 4
[14:59:03] [PASSED] 8
[14:59:03] [PASSED] 32
[14:59:03] [PASSED] 256
[14:59:03] ================ [PASSED] test_range_spare =================
[14:59:03] ===================== [PASSED] guc_dbm =====================
[14:59:03] =================== guc_idm (6 subtests) ===================
[14:59:03] [PASSED] bad_init
[14:59:03] [PASSED] no_init
[14:59:03] [PASSED] init_fini
[14:59:03] [PASSED] check_used
[14:59:03] [PASSED] check_quota
[14:59:03] [PASSED] check_all
[14:59:03] ===================== [PASSED] guc_idm =====================
[14:59:03] ================== no_relay (3 subtests) ===================
[14:59:03] [PASSED] xe_drops_guc2pf_if_not_ready
[14:59:03] [PASSED] xe_drops_guc2vf_if_not_ready
[14:59:03] [PASSED] xe_rejects_send_if_not_ready
[14:59:03] ==================== [PASSED] no_relay =====================
[14:59:03] ================== pf_relay (14 subtests) ==================
[14:59:03] [PASSED] pf_rejects_guc2pf_too_short
[14:59:03] [PASSED] pf_rejects_guc2pf_too_long
[14:59:03] [PASSED] pf_rejects_guc2pf_no_payload
[14:59:03] [PASSED] pf_fails_no_payload
[14:59:03] [PASSED] pf_fails_bad_origin
[14:59:03] [PASSED] pf_fails_bad_type
[14:59:03] [PASSED] pf_txn_reports_error
[14:59:03] [PASSED] pf_txn_sends_pf2guc
[14:59:03] [PASSED] pf_sends_pf2guc
[14:59:03] [SKIPPED] pf_loopback_nop
[14:59:03] [SKIPPED] pf_loopback_echo
[14:59:03] [SKIPPED] pf_loopback_fail
[14:59:03] [SKIPPED] pf_loopback_busy
[14:59:03] [SKIPPED] pf_loopback_retry
[14:59:03] ==================== [PASSED] pf_relay =====================
[14:59:03] ================== vf_relay (3 subtests) ===================
[14:59:03] [PASSED] vf_rejects_guc2vf_too_short
[14:59:03] [PASSED] vf_rejects_guc2vf_too_long
[14:59:03] [PASSED] vf_rejects_guc2vf_no_payload
[14:59:03] ==================== [PASSED] vf_relay =====================
[14:59:03] ================ pf_gt_config (9 subtests) =================
[14:59:03] [PASSED] fair_contexts_1vf
[14:59:03] [PASSED] fair_doorbells_1vf
[14:59:03] [PASSED] fair_ggtt_1vf
[14:59:03] ====================== fair_vram_1vf ======================
[14:59:03] [PASSED] 3.50 GiB
[14:59:03] [PASSED] 11.5 GiB
[14:59:03] [PASSED] 15.5 GiB
[14:59:03] [PASSED] 31.5 GiB
[14:59:03] [PASSED] 63.5 GiB
[14:59:03] [PASSED] 1.91 GiB
[14:59:03] ================== [PASSED] fair_vram_1vf ==================
[14:59:03] ================ fair_vram_1vf_admin_only =================
[14:59:03] [PASSED] 3.50 GiB
[14:59:03] [PASSED] 11.5 GiB
[14:59:03] [PASSED] 15.5 GiB
[14:59:03] [PASSED] 31.5 GiB
[14:59:03] [PASSED] 63.5 GiB
[14:59:03] [PASSED] 1.91 GiB
[14:59:03] ============ [PASSED] fair_vram_1vf_admin_only =============
[14:59:03] ====================== fair_contexts ======================
[14:59:03] [PASSED] 1 VF
[14:59:03] [PASSED] 2 VFs
[14:59:03] [PASSED] 3 VFs
[14:59:03] [PASSED] 4 VFs
[14:59:03] [PASSED] 5 VFs
[14:59:03] [PASSED] 6 VFs
[14:59:03] [PASSED] 7 VFs
[14:59:03] [PASSED] 8 VFs
[14:59:03] [PASSED] 9 VFs
[14:59:03] [PASSED] 10 VFs
[14:59:03] [PASSED] 11 VFs
[14:59:03] [PASSED] 12 VFs
[14:59:03] [PASSED] 13 VFs
[14:59:03] [PASSED] 14 VFs
[14:59:03] [PASSED] 15 VFs
[14:59:03] [PASSED] 16 VFs
[14:59:03] [PASSED] 17 VFs
[14:59:03] [PASSED] 18 VFs
[14:59:03] [PASSED] 19 VFs
[14:59:03] [PASSED] 20 VFs
[14:59:03] [PASSED] 21 VFs
[14:59:03] [PASSED] 22 VFs
[14:59:03] [PASSED] 23 VFs
[14:59:03] [PASSED] 24 VFs
[14:59:03] [PASSED] 25 VFs
[14:59:03] [PASSED] 26 VFs
[14:59:03] [PASSED] 27 VFs
[14:59:03] [PASSED] 28 VFs
[14:59:03] [PASSED] 29 VFs
[14:59:03] [PASSED] 30 VFs
[14:59:03] [PASSED] 31 VFs
[14:59:03] [PASSED] 32 VFs
[14:59:03] [PASSED] 33 VFs
[14:59:03] [PASSED] 34 VFs
[14:59:03] [PASSED] 35 VFs
[14:59:03] [PASSED] 36 VFs
[14:59:03] [PASSED] 37 VFs
[14:59:03] [PASSED] 38 VFs
[14:59:03] [PASSED] 39 VFs
[14:59:03] [PASSED] 40 VFs
[14:59:03] [PASSED] 41 VFs
[14:59:03] [PASSED] 42 VFs
[14:59:03] [PASSED] 43 VFs
[14:59:03] [PASSED] 44 VFs
[14:59:03] [PASSED] 45 VFs
[14:59:03] [PASSED] 46 VFs
[14:59:03] [PASSED] 47 VFs
[14:59:03] [PASSED] 48 VFs
[14:59:03] [PASSED] 49 VFs
[14:59:03] [PASSED] 50 VFs
[14:59:03] [PASSED] 51 VFs
[14:59:03] [PASSED] 52 VFs
[14:59:03] [PASSED] 53 VFs
[14:59:03] [PASSED] 54 VFs
[14:59:03] [PASSED] 55 VFs
[14:59:03] [PASSED] 56 VFs
[14:59:03] [PASSED] 57 VFs
[14:59:03] [PASSED] 58 VFs
[14:59:03] [PASSED] 59 VFs
[14:59:03] [PASSED] 60 VFs
[14:59:03] [PASSED] 61 VFs
[14:59:03] [PASSED] 62 VFs
[14:59:03] [PASSED] 63 VFs
[14:59:03] ================== [PASSED] fair_contexts ==================
[14:59:03] ===================== fair_doorbells ======================
[14:59:03] [PASSED] 1 VF
[14:59:03] [PASSED] 2 VFs
[14:59:03] [PASSED] 3 VFs
[14:59:03] [PASSED] 4 VFs
[14:59:03] [PASSED] 5 VFs
[14:59:03] [PASSED] 6 VFs
[14:59:03] [PASSED] 7 VFs
[14:59:03] [PASSED] 8 VFs
[14:59:03] [PASSED] 9 VFs
[14:59:03] [PASSED] 10 VFs
[14:59:03] [PASSED] 11 VFs
[14:59:03] [PASSED] 12 VFs
[14:59:03] [PASSED] 13 VFs
[14:59:03] [PASSED] 14 VFs
[14:59:03] [PASSED] 15 VFs
[14:59:03] [PASSED] 16 VFs
[14:59:03] [PASSED] 17 VFs
[14:59:03] [PASSED] 18 VFs
[14:59:03] [PASSED] 19 VFs
[14:59:03] [PASSED] 20 VFs
[14:59:03] [PASSED] 21 VFs
[14:59:03] [PASSED] 22 VFs
[14:59:03] [PASSED] 23 VFs
[14:59:03] [PASSED] 24 VFs
[14:59:03] [PASSED] 25 VFs
[14:59:03] [PASSED] 26 VFs
[14:59:03] [PASSED] 27 VFs
[14:59:03] [PASSED] 28 VFs
[14:59:03] [PASSED] 29 VFs
[14:59:03] [PASSED] 30 VFs
[14:59:03] [PASSED] 31 VFs
[14:59:03] [PASSED] 32 VFs
[14:59:03] [PASSED] 33 VFs
[14:59:03] [PASSED] 34 VFs
[14:59:03] [PASSED] 35 VFs
[14:59:03] [PASSED] 36 VFs
[14:59:03] [PASSED] 37 VFs
[14:59:03] [PASSED] 38 VFs
[14:59:03] [PASSED] 39 VFs
[14:59:03] [PASSED] 40 VFs
[14:59:03] [PASSED] 41 VFs
[14:59:03] [PASSED] 42 VFs
[14:59:03] [PASSED] 43 VFs
[14:59:03] [PASSED] 44 VFs
[14:59:03] [PASSED] 45 VFs
[14:59:03] [PASSED] 46 VFs
[14:59:03] [PASSED] 47 VFs
[14:59:03] [PASSED] 48 VFs
[14:59:03] [PASSED] 49 VFs
[14:59:03] [PASSED] 50 VFs
[14:59:03] [PASSED] 51 VFs
[14:59:03] [PASSED] 52 VFs
[14:59:03] [PASSED] 53 VFs
[14:59:03] [PASSED] 54 VFs
[14:59:03] [PASSED] 55 VFs
[14:59:03] [PASSED] 56 VFs
[14:59:03] [PASSED] 57 VFs
[14:59:03] [PASSED] 58 VFs
[14:59:03] [PASSED] 59 VFs
[14:59:03] [PASSED] 60 VFs
[14:59:03] [PASSED] 61 VFs
[14:59:03] [PASSED] 62 VFs
[14:59:03] [PASSED] 63 VFs
[14:59:03] ================= [PASSED] fair_doorbells ==================
[14:59:03] ======================== fair_ggtt ========================
[14:59:03] [PASSED] 1 VF
[14:59:03] [PASSED] 2 VFs
[14:59:03] [PASSED] 3 VFs
[14:59:03] [PASSED] 4 VFs
[14:59:03] [PASSED] 5 VFs
[14:59:03] [PASSED] 6 VFs
[14:59:03] [PASSED] 7 VFs
[14:59:03] [PASSED] 8 VFs
[14:59:03] [PASSED] 9 VFs
[14:59:03] [PASSED] 10 VFs
[14:59:03] [PASSED] 11 VFs
[14:59:03] [PASSED] 12 VFs
[14:59:03] [PASSED] 13 VFs
[14:59:03] [PASSED] 14 VFs
[14:59:03] [PASSED] 15 VFs
[14:59:03] [PASSED] 16 VFs
[14:59:03] [PASSED] 17 VFs
[14:59:03] [PASSED] 18 VFs
[14:59:03] [PASSED] 19 VFs
[14:59:03] [PASSED] 20 VFs
[14:59:03] [PASSED] 21 VFs
[14:59:03] [PASSED] 22 VFs
[14:59:03] [PASSED] 23 VFs
[14:59:03] [PASSED] 24 VFs
[14:59:03] [PASSED] 25 VFs
[14:59:03] [PASSED] 26 VFs
[14:59:03] [PASSED] 27 VFs
[14:59:03] [PASSED] 28 VFs
[14:59:03] [PASSED] 29 VFs
[14:59:03] [PASSED] 30 VFs
[14:59:03] [PASSED] 31 VFs
[14:59:03] [PASSED] 32 VFs
[14:59:03] [PASSED] 33 VFs
[14:59:03] [PASSED] 34 VFs
[14:59:03] [PASSED] 35 VFs
[14:59:03] [PASSED] 36 VFs
[14:59:03] [PASSED] 37 VFs
[14:59:03] [PASSED] 38 VFs
[14:59:03] [PASSED] 39 VFs
[14:59:03] [PASSED] 40 VFs
[14:59:03] [PASSED] 41 VFs
[14:59:03] [PASSED] 42 VFs
[14:59:03] [PASSED] 43 VFs
[14:59:03] [PASSED] 44 VFs
[14:59:03] [PASSED] 45 VFs
[14:59:03] [PASSED] 46 VFs
[14:59:03] [PASSED] 47 VFs
[14:59:03] [PASSED] 48 VFs
[14:59:03] [PASSED] 49 VFs
[14:59:03] [PASSED] 50 VFs
[14:59:03] [PASSED] 51 VFs
[14:59:03] [PASSED] 52 VFs
[14:59:03] [PASSED] 53 VFs
[14:59:03] [PASSED] 54 VFs
[14:59:03] [PASSED] 55 VFs
[14:59:03] [PASSED] 56 VFs
[14:59:03] [PASSED] 57 VFs
[14:59:03] [PASSED] 58 VFs
[14:59:03] [PASSED] 59 VFs
[14:59:03] [PASSED] 60 VFs
[14:59:03] [PASSED] 61 VFs
[14:59:03] [PASSED] 62 VFs
[14:59:03] [PASSED] 63 VFs
[14:59:03] ==================== [PASSED] fair_ggtt ====================
[14:59:03] ======================== fair_vram ========================
[14:59:03] [PASSED] 1 VF
[14:59:03] [PASSED] 2 VFs
[14:59:03] [PASSED] 3 VFs
[14:59:03] [PASSED] 4 VFs
[14:59:03] [PASSED] 5 VFs
[14:59:03] [PASSED] 6 VFs
[14:59:03] [PASSED] 7 VFs
[14:59:03] [PASSED] 8 VFs
[14:59:03] [PASSED] 9 VFs
[14:59:03] [PASSED] 10 VFs
[14:59:03] [PASSED] 11 VFs
[14:59:03] [PASSED] 12 VFs
[14:59:03] [PASSED] 13 VFs
[14:59:03] [PASSED] 14 VFs
[14:59:03] [PASSED] 15 VFs
[14:59:03] [PASSED] 16 VFs
[14:59:03] [PASSED] 17 VFs
[14:59:03] [PASSED] 18 VFs
[14:59:03] [PASSED] 19 VFs
[14:59:03] [PASSED] 20 VFs
[14:59:03] [PASSED] 21 VFs
[14:59:03] [PASSED] 22 VFs
[14:59:03] [PASSED] 23 VFs
[14:59:03] [PASSED] 24 VFs
[14:59:03] [PASSED] 25 VFs
[14:59:03] [PASSED] 26 VFs
[14:59:03] [PASSED] 27 VFs
[14:59:03] [PASSED] 28 VFs
[14:59:03] [PASSED] 29 VFs
[14:59:03] [PASSED] 30 VFs
[14:59:03] [PASSED] 31 VFs
[14:59:03] [PASSED] 32 VFs
[14:59:03] [PASSED] 33 VFs
[14:59:03] [PASSED] 34 VFs
[14:59:03] [PASSED] 35 VFs
[14:59:03] [PASSED] 36 VFs
[14:59:03] [PASSED] 37 VFs
[14:59:03] [PASSED] 38 VFs
[14:59:03] [PASSED] 39 VFs
[14:59:03] [PASSED] 40 VFs
[14:59:03] [PASSED] 41 VFs
[14:59:03] [PASSED] 42 VFs
[14:59:03] [PASSED] 43 VFs
[14:59:03] [PASSED] 44 VFs
[14:59:03] [PASSED] 45 VFs
[14:59:03] [PASSED] 46 VFs
[14:59:03] [PASSED] 47 VFs
[14:59:03] [PASSED] 48 VFs
[14:59:03] [PASSED] 49 VFs
[14:59:03] [PASSED] 50 VFs
[14:59:03] [PASSED] 51 VFs
[14:59:03] [PASSED] 52 VFs
[14:59:03] [PASSED] 53 VFs
[14:59:03] [PASSED] 54 VFs
[14:59:03] [PASSED] 55 VFs
[14:59:03] [PASSED] 56 VFs
[14:59:03] [PASSED] 57 VFs
[14:59:03] [PASSED] 58 VFs
[14:59:03] [PASSED] 59 VFs
[14:59:03] [PASSED] 60 VFs
[14:59:03] [PASSED] 61 VFs
[14:59:03] [PASSED] 62 VFs
[14:59:03] [PASSED] 63 VFs
[14:59:03] ==================== [PASSED] fair_vram ====================
[14:59:03] ================== [PASSED] pf_gt_config ===================
[14:59:03] ===================== lmtt (1 subtest) =====================
[14:59:03] ======================== test_ops =========================
[14:59:03] [PASSED] 2-level
[14:59:03] [PASSED] multi-level
[14:59:03] ==================== [PASSED] test_ops =====================
[14:59:03] ====================== [PASSED] lmtt =======================
[14:59:03] ================= pf_service (11 subtests) =================
[14:59:03] [PASSED] pf_negotiate_any
[14:59:03] [PASSED] pf_negotiate_base_match
[14:59:03] [PASSED] pf_negotiate_base_newer
[14:59:03] [PASSED] pf_negotiate_base_next
[14:59:03] [SKIPPED] pf_negotiate_base_older
[14:59:03] [PASSED] pf_negotiate_base_prev
[14:59:03] [PASSED] pf_negotiate_latest_match
[14:59:03] [PASSED] pf_negotiate_latest_newer
[14:59:03] [PASSED] pf_negotiate_latest_next
[14:59:03] [SKIPPED] pf_negotiate_latest_older
[14:59:03] [SKIPPED] pf_negotiate_latest_prev
[14:59:03] =================== [PASSED] pf_service ====================
[14:59:03] ================= xe_guc_g2g (2 subtests) ==================
[14:59:03] ============== xe_live_guc_g2g_kunit_default ==============
[14:59:03] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[14:59:03] ============== xe_live_guc_g2g_kunit_allmem ===============
[14:59:03] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[14:59:03] =================== [SKIPPED] xe_guc_g2g ===================
[14:59:03] =================== xe_mocs (2 subtests) ===================
[14:59:03] ================ xe_live_mocs_kernel_kunit ================
[14:59:03] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[14:59:03] ================ xe_live_mocs_reset_kunit =================
[14:59:03] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[14:59:03] ==================== [SKIPPED] xe_mocs =====================
[14:59:03] ================= xe_migrate (2 subtests) ==================
[14:59:03] ================= xe_migrate_sanity_kunit =================
[14:59:03] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[14:59:03] ================== xe_validate_ccs_kunit ==================
[14:59:03] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[14:59:03] =================== [SKIPPED] xe_migrate ===================
[14:59:03] ================== xe_dma_buf (1 subtest) ==================
[14:59:03] ==================== xe_dma_buf_kunit =====================
[14:59:03] ================ [SKIPPED] xe_dma_buf_kunit ================
[14:59:03] =================== [SKIPPED] xe_dma_buf ===================
[14:59:03] ================= xe_bo_shrink (1 subtest) =================
[14:59:03] =================== xe_bo_shrink_kunit ====================
[14:59:03] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[14:59:03] ================== [SKIPPED] xe_bo_shrink ==================
[14:59:03] ==================== xe_bo (2 subtests) ====================
[14:59:03] ================== xe_ccs_migrate_kunit ===================
[14:59:03] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[14:59:03] ==================== xe_bo_evict_kunit ====================
[14:59:03] =============== [SKIPPED] xe_bo_evict_kunit ================
[14:59:03] ===================== [SKIPPED] xe_bo ======================
[14:59:03] ==================== args (13 subtests) ====================
[14:59:03] [PASSED] count_args_test
[14:59:03] [PASSED] call_args_example
[14:59:03] [PASSED] call_args_test
[14:59:03] [PASSED] drop_first_arg_example
[14:59:03] [PASSED] drop_first_arg_test
[14:59:03] [PASSED] first_arg_example
[14:59:03] [PASSED] first_arg_test
[14:59:03] [PASSED] last_arg_example
[14:59:03] [PASSED] last_arg_test
[14:59:03] [PASSED] pick_arg_example
[14:59:03] [PASSED] if_args_example
[14:59:03] [PASSED] if_args_test
[14:59:03] [PASSED] sep_comma_example
[14:59:03] ====================== [PASSED] args =======================
[14:59:03] =================== xe_pci (3 subtests) ====================
[14:59:03] ==================== check_graphics_ip ====================
[14:59:03] [PASSED] 12.00 Xe_LP
[14:59:03] [PASSED] 12.10 Xe_LP+
[14:59:03] [PASSED] 12.55 Xe_HPG
[14:59:03] [PASSED] 12.60 Xe_HPC
[14:59:03] [PASSED] 12.70 Xe_LPG
[14:59:03] [PASSED] 12.71 Xe_LPG
[14:59:03] [PASSED] 12.74 Xe_LPG+
[14:59:03] [PASSED] 20.01 Xe2_HPG
[14:59:03] [PASSED] 20.02 Xe2_HPG
[14:59:03] [PASSED] 20.04 Xe2_LPG
[14:59:03] [PASSED] 30.00 Xe3_LPG
[14:59:03] [PASSED] 30.01 Xe3_LPG
[14:59:03] [PASSED] 30.03 Xe3_LPG
[14:59:03] [PASSED] 30.04 Xe3_LPG
[14:59:03] [PASSED] 30.05 Xe3_LPG
[14:59:03] [PASSED] 35.10 Xe3p_LPG
[14:59:03] [PASSED] 35.11 Xe3p_XPC
[14:59:03] ================ [PASSED] check_graphics_ip ================
[14:59:03] ===================== check_media_ip ======================
[14:59:03] [PASSED] 12.00 Xe_M
[14:59:03] [PASSED] 12.55 Xe_HPM
[14:59:03] [PASSED] 13.00 Xe_LPM+
[14:59:03] [PASSED] 13.01 Xe2_HPM
[14:59:03] [PASSED] 20.00 Xe2_LPM
[14:59:03] [PASSED] 30.00 Xe3_LPM
[14:59:03] [PASSED] 30.02 Xe3_LPM
[14:59:03] [PASSED] 35.00 Xe3p_LPM
[14:59:03] [PASSED] 35.03 Xe3p_HPM
[14:59:03] ================= [PASSED] check_media_ip ==================
[14:59:03] =================== check_platform_desc ===================
[14:59:03] [PASSED] 0x9A60 (TIGERLAKE)
[14:59:03] [PASSED] 0x9A68 (TIGERLAKE)
[14:59:03] [PASSED] 0x9A70 (TIGERLAKE)
[14:59:03] [PASSED] 0x9A40 (TIGERLAKE)
[14:59:03] [PASSED] 0x9A49 (TIGERLAKE)
[14:59:03] [PASSED] 0x9A59 (TIGERLAKE)
[14:59:03] [PASSED] 0x9A78 (TIGERLAKE)
[14:59:03] [PASSED] 0x9AC0 (TIGERLAKE)
[14:59:03] [PASSED] 0x9AC9 (TIGERLAKE)
[14:59:03] [PASSED] 0x9AD9 (TIGERLAKE)
[14:59:03] [PASSED] 0x9AF8 (TIGERLAKE)
[14:59:03] [PASSED] 0x4C80 (ROCKETLAKE)
[14:59:03] [PASSED] 0x4C8A (ROCKETLAKE)
[14:59:03] [PASSED] 0x4C8B (ROCKETLAKE)
[14:59:03] [PASSED] 0x4C8C (ROCKETLAKE)
[14:59:03] [PASSED] 0x4C90 (ROCKETLAKE)
[14:59:03] [PASSED] 0x4C9A (ROCKETLAKE)
[14:59:03] [PASSED] 0x4680 (ALDERLAKE_S)
[14:59:03] [PASSED] 0x4682 (ALDERLAKE_S)
[14:59:03] [PASSED] 0x4688 (ALDERLAKE_S)
[14:59:03] [PASSED] 0x468A (ALDERLAKE_S)
[14:59:03] [PASSED] 0x468B (ALDERLAKE_S)
[14:59:03] [PASSED] 0x4690 (ALDERLAKE_S)
[14:59:03] [PASSED] 0x4692 (ALDERLAKE_S)
[14:59:03] [PASSED] 0x4693 (ALDERLAKE_S)
[14:59:03] [PASSED] 0x46A0 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46A1 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46A2 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46A3 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46A6 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46A8 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46AA (ALDERLAKE_P)
[14:59:03] [PASSED] 0x462A (ALDERLAKE_P)
[14:59:03] [PASSED] 0x4626 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x4628 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46B0 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46B1 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46B2 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46B3 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46C0 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46C1 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46C2 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46C3 (ALDERLAKE_P)
[14:59:03] [PASSED] 0x46D0 (ALDERLAKE_N)
[14:59:03] [PASSED] 0x46D1 (ALDERLAKE_N)
[14:59:03] [PASSED] 0x46D2 (ALDERLAKE_N)
[14:59:03] [PASSED] 0x46D3 (ALDERLAKE_N)
[14:59:03] [PASSED] 0x46D4 (ALDERLAKE_N)
[14:59:03] [PASSED] 0xA721 (ALDERLAKE_P)
[14:59:03] [PASSED] 0xA7A1 (ALDERLAKE_P)
[14:59:03] [PASSED] 0xA7A9 (ALDERLAKE_P)
[14:59:03] [PASSED] 0xA7AC (ALDERLAKE_P)
[14:59:03] [PASSED] 0xA7AD (ALDERLAKE_P)
[14:59:03] [PASSED] 0xA720 (ALDERLAKE_P)
[14:59:03] [PASSED] 0xA7A0 (ALDERLAKE_P)
[14:59:03] [PASSED] 0xA7A8 (ALDERLAKE_P)
[14:59:03] [PASSED] 0xA7AA (ALDERLAKE_P)
[14:59:03] [PASSED] 0xA7AB (ALDERLAKE_P)
[14:59:03] [PASSED] 0xA780 (ALDERLAKE_S)
[14:59:03] [PASSED] 0xA781 (ALDERLAKE_S)
[14:59:03] [PASSED] 0xA782 (ALDERLAKE_S)
[14:59:03] [PASSED] 0xA783 (ALDERLAKE_S)
[14:59:03] [PASSED] 0xA788 (ALDERLAKE_S)
[14:59:03] [PASSED] 0xA789 (ALDERLAKE_S)
[14:59:03] [PASSED] 0xA78A (ALDERLAKE_S)
[14:59:03] [PASSED] 0xA78B (ALDERLAKE_S)
[14:59:03] [PASSED] 0x4905 (DG1)
[14:59:03] [PASSED] 0x4906 (DG1)
[14:59:03] [PASSED] 0x4907 (DG1)
[14:59:03] [PASSED] 0x4908 (DG1)
[14:59:03] [PASSED] 0x4909 (DG1)
[14:59:03] [PASSED] 0x56C0 (DG2)
[14:59:03] [PASSED] 0x56C2 (DG2)
[14:59:03] [PASSED] 0x56C1 (DG2)
[14:59:03] [PASSED] 0x7D51 (METEORLAKE)
[14:59:03] [PASSED] 0x7DD1 (METEORLAKE)
[14:59:03] [PASSED] 0x7D41 (METEORLAKE)
[14:59:03] [PASSED] 0x7D67 (METEORLAKE)
[14:59:03] [PASSED] 0xB640 (METEORLAKE)
[14:59:03] [PASSED] 0x56A0 (DG2)
[14:59:03] [PASSED] 0x56A1 (DG2)
[14:59:03] [PASSED] 0x56A2 (DG2)
[14:59:03] [PASSED] 0x56BE (DG2)
[14:59:03] [PASSED] 0x56BF (DG2)
[14:59:03] [PASSED] 0x5690 (DG2)
[14:59:03] [PASSED] 0x5691 (DG2)
[14:59:03] [PASSED] 0x5692 (DG2)
[14:59:03] [PASSED] 0x56A5 (DG2)
[14:59:03] [PASSED] 0x56A6 (DG2)
[14:59:03] [PASSED] 0x56B0 (DG2)
[14:59:03] [PASSED] 0x56B1 (DG2)
[14:59:03] [PASSED] 0x56BA (DG2)
[14:59:03] [PASSED] 0x56BB (DG2)
[14:59:03] [PASSED] 0x56BC (DG2)
[14:59:03] [PASSED] 0x56BD (DG2)
[14:59:03] [PASSED] 0x5693 (DG2)
[14:59:03] [PASSED] 0x5694 (DG2)
[14:59:03] [PASSED] 0x5695 (DG2)
[14:59:03] [PASSED] 0x56A3 (DG2)
[14:59:03] [PASSED] 0x56A4 (DG2)
[14:59:03] [PASSED] 0x56B2 (DG2)
[14:59:03] [PASSED] 0x56B3 (DG2)
[14:59:03] [PASSED] 0x5696 (DG2)
[14:59:03] [PASSED] 0x5697 (DG2)
[14:59:03] [PASSED] 0xB69 (PVC)
[14:59:03] [PASSED] 0xB6E (PVC)
[14:59:03] [PASSED] 0xBD4 (PVC)
[14:59:03] [PASSED] 0xBD5 (PVC)
[14:59:03] [PASSED] 0xBD6 (PVC)
[14:59:03] [PASSED] 0xBD7 (PVC)
[14:59:03] [PASSED] 0xBD8 (PVC)
[14:59:03] [PASSED] 0xBD9 (PVC)
[14:59:03] [PASSED] 0xBDA (PVC)
[14:59:03] [PASSED] 0xBDB (PVC)
[14:59:03] [PASSED] 0xBE0 (PVC)
[14:59:03] [PASSED] 0xBE1 (PVC)
[14:59:03] [PASSED] 0xBE5 (PVC)
[14:59:03] [PASSED] 0x7D40 (METEORLAKE)
[14:59:03] [PASSED] 0x7D45 (METEORLAKE)
[14:59:03] [PASSED] 0x7D55 (METEORLAKE)
[14:59:03] [PASSED] 0x7D60 (METEORLAKE)
[14:59:03] [PASSED] 0x7DD5 (METEORLAKE)
[14:59:03] [PASSED] 0x6420 (LUNARLAKE)
[14:59:03] [PASSED] 0x64A0 (LUNARLAKE)
[14:59:03] [PASSED] 0x64B0 (LUNARLAKE)
[14:59:03] [PASSED] 0xE202 (BATTLEMAGE)
[14:59:03] [PASSED] 0xE209 (BATTLEMAGE)
[14:59:03] [PASSED] 0xE20B (BATTLEMAGE)
[14:59:03] [PASSED] 0xE20C (BATTLEMAGE)
[14:59:03] [PASSED] 0xE20D (BATTLEMAGE)
[14:59:03] [PASSED] 0xE210 (BATTLEMAGE)
[14:59:03] [PASSED] 0xE211 (BATTLEMAGE)
[14:59:03] [PASSED] 0xE212 (BATTLEMAGE)
[14:59:03] [PASSED] 0xE216 (BATTLEMAGE)
[14:59:03] [PASSED] 0xE220 (BATTLEMAGE)
[14:59:03] [PASSED] 0xE221 (BATTLEMAGE)
[14:59:03] [PASSED] 0xE222 (BATTLEMAGE)
[14:59:03] [PASSED] 0xE223 (BATTLEMAGE)
[14:59:03] [PASSED] 0xB080 (PANTHERLAKE)
[14:59:03] [PASSED] 0xB081 (PANTHERLAKE)
[14:59:03] [PASSED] 0xB082 (PANTHERLAKE)
[14:59:03] [PASSED] 0xB083 (PANTHERLAKE)
[14:59:03] [PASSED] 0xB084 (PANTHERLAKE)
[14:59:03] [PASSED] 0xB085 (PANTHERLAKE)
[14:59:03] [PASSED] 0xB086 (PANTHERLAKE)
[14:59:03] [PASSED] 0xB087 (PANTHERLAKE)
[14:59:03] [PASSED] 0xB08F (PANTHERLAKE)
[14:59:03] [PASSED] 0xB090 (PANTHERLAKE)
[14:59:03] [PASSED] 0xB0A0 (PANTHERLAKE)
[14:59:03] [PASSED] 0xB0B0 (PANTHERLAKE)
[14:59:03] [PASSED] 0xFD80 (PANTHERLAKE)
[14:59:03] [PASSED] 0xFD81 (PANTHERLAKE)
[14:59:03] [PASSED] 0xD740 (NOVALAKE_S)
[14:59:03] [PASSED] 0xD741 (NOVALAKE_S)
[14:59:03] [PASSED] 0xD742 (NOVALAKE_S)
[14:59:03] [PASSED] 0xD743 (NOVALAKE_S)
[14:59:03] [PASSED] 0xD745 (NOVALAKE_S)
[14:59:03] [PASSED] 0xD74A (NOVALAKE_S)
[14:59:03] [PASSED] 0xD74B (NOVALAKE_S)
[14:59:03] [PASSED] 0x674C (CRESCENTISLAND)
[14:59:03] [PASSED] 0x674D (CRESCENTISLAND)
[14:59:03] [PASSED] 0x674E (CRESCENTISLAND)
[14:59:03] [PASSED] 0x674F (CRESCENTISLAND)
[14:59:03] [PASSED] 0x6750 (CRESCENTISLAND)
[14:59:03] [PASSED] 0xD750 (NOVALAKE_P)
[14:59:03] [PASSED] 0xD751 (NOVALAKE_P)
[14:59:03] [PASSED] 0xD752 (NOVALAKE_P)
[14:59:03] [PASSED] 0xD753 (NOVALAKE_P)
[14:59:03] [PASSED] 0xD754 (NOVALAKE_P)
[14:59:03] [PASSED] 0xD755 (NOVALAKE_P)
[14:59:03] [PASSED] 0xD756 (NOVALAKE_P)
[14:59:03] [PASSED] 0xD757 (NOVALAKE_P)
[14:59:03] [PASSED] 0xD75F (NOVALAKE_P)
[14:59:03] =============== [PASSED] check_platform_desc ===============
[14:59:03] ===================== [PASSED] xe_pci ======================
[14:59:03] ============= xe_rtp_tables_test (4 subtests) ==============
[14:59:03] ================== xe_rtp_table_gt_test ===================
[14:59:03] [PASSED] gt_was/14011060649
[14:59:03] [PASSED] gt_was/14011059788
[14:59:03] [PASSED] gt_was/14015795083
[14:59:03] [PASSED] gt_was/16021867713
[14:59:03] [PASSED] gt_was/14019449301
[14:59:03] [PASSED] gt_was/16028005424
[14:59:03] [PASSED] gt_was/14026578760
[14:59:03] [PASSED] gt_was/1409420604
[14:59:03] [PASSED] gt_was/1408615072
[14:59:03] [PASSED] gt_was/22010523718
[14:59:03] [PASSED] gt_was/14011006942
[14:59:03] [PASSED] gt_was/14014830051
[14:59:03] [PASSED] gt_was/18018781329
[14:59:03] [PASSED] gt_was/1509235366
[14:59:03] [PASSED] gt_was/18018781329
[14:59:03] [PASSED] gt_was/16016694945
[14:59:03] [PASSED] gt_was/14018575942
[14:59:03] [PASSED] gt_was/22016670082
[14:59:03] [PASSED] gt_was/22016670082
[14:59:03] [PASSED] gt_was/14017421178
[14:59:03] [PASSED] gt_was/16025250150
[14:59:03] [PASSED] gt_was/14021871409
[14:59:03] [PASSED] gt_was/16021865536
[14:59:03] [PASSED] gt_was/14021486841
[14:59:03] [PASSED] gt_was/14025160223
[14:59:03] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[14:59:03] [PASSED] gt_was/14025635424
[14:59:03] [PASSED] gt_was/16028005424
[14:59:03] ============== [PASSED] xe_rtp_table_gt_test ===============
[14:59:03] ================== xe_rtp_table_gt_test ===================
[14:59:03] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[14:59:03] [PASSED] gt_tunings/Tuning: 32B Access Enable
[14:59:03] [PASSED] gt_tunings/Tuning: L3 cache
[14:59:03] [PASSED] gt_tunings/Tuning: L3 cache - media
[14:59:03] [PASSED] gt_tunings/Tuning: Compression Overfetch
[14:59:03] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[14:59:03] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[14:59:03] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[14:59:03] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[14:59:03] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[14:59:03] [PASSED] gt_tunings/Tuning: Stateless compression control
[14:59:03] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[14:59:03] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[14:59:03] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[14:59:03] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[14:59:03] ============== [PASSED] xe_rtp_table_gt_test ===============
[14:59:03] ================== xe_rtp_table_oob_test ==================
[14:59:03] [PASSED] oob_was/1607983814
[14:59:03] [PASSED] oob_was/16010904313
[14:59:03] [PASSED] oob_was/18022495364
[14:59:03] [PASSED] oob_was/22012773006
[14:59:03] [PASSED] oob_was/14014475959
[14:59:03] [PASSED] oob_was/22011391025
[14:59:03] [PASSED] oob_was/22012727170
[14:59:03] [PASSED] oob_was/22012727685
[14:59:03] [PASSED] oob_was/22016596838
[14:59:03] [PASSED] oob_was/18020744125
[14:59:03] [PASSED] oob_was/1409600907
[14:59:03] [PASSED] oob_was/22014953428
[14:59:03] [PASSED] oob_was/16017236439
[14:59:03] [PASSED] oob_was/14019821291
[14:59:03] [PASSED] oob_was/14015076503
[14:59:03] [PASSED] oob_was/14018913170
[14:59:03] [PASSED] oob_was/14018094691
[14:59:03] [PASSED] oob_was/18024947630
[14:59:03] [PASSED] oob_was/16022287689
[14:59:03] [PASSED] oob_was/13011645652
[14:59:03] [PASSED] oob_was/14022293748
[14:59:03] [PASSED] oob_was/22019794406
[14:59:03] [PASSED] oob_was/22019338487
[14:59:03] [PASSED] oob_was/16023588340
[14:59:03] [PASSED] oob_was/14019789679
[14:59:03] [PASSED] oob_was/14022866841
[14:59:03] [PASSED] oob_was/16021333562
[14:59:03] [PASSED] oob_was/14016712196
[14:59:03] [PASSED] oob_was/14015568240
[14:59:03] [PASSED] oob_was/18013179988
[14:59:03] [PASSED] oob_was/1508761755
[14:59:03] [PASSED] oob_was/16023105232
[14:59:03] [PASSED] oob_was/16026508708
[14:59:03] [PASSED] oob_was/14020001231
[14:59:03] [PASSED] oob_was/16023683509
[14:59:03] [PASSED] oob_was/14025515070
[14:59:03] [PASSED] oob_was/15015404425_disable
[14:59:03] [PASSED] oob_was/16026007364
[14:59:03] [PASSED] oob_was/14020316580
[14:59:03] [PASSED] oob_was/14025883347
[14:59:03] ============== [PASSED] xe_rtp_table_oob_test ==============
[14:59:03] ================ xe_rtp_table_dev_oob_test ================
[14:59:03] [PASSED] device_oob_was/22010954014
[14:59:03] [PASSED] device_oob_was/15015404425
[14:59:03] [PASSED] device_oob_was/22019338487_display
[14:59:03] [PASSED] device_oob_was/14022085890
[14:59:03] [PASSED] device_oob_was/14026539277
[14:59:03] [PASSED] device_oob_was/14026633728
[14:59:03] [PASSED] device_oob_was/14026746987
[14:59:03] [PASSED] device_oob_was/14026779378
[14:59:03] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[14:59:03] =============== [PASSED] xe_rtp_tables_test ================
[14:59:03] =================== xe_rtp (3 subtests) ====================
[14:59:03] =================== xe_rtp_rules_tests ====================
[14:59:03] [PASSED] no
[14:59:03] [PASSED] yes
[14:59:03] [PASSED] no-and-no
[14:59:03] [PASSED] no-and-yes
[14:59:03] [PASSED] yes-and-no
[14:59:03] [PASSED] yes-and-yes
[14:59:03] [PASSED] no-or-no
[14:59:03] [PASSED] no-or-yes
[14:59:03] [PASSED] yes-or-no
[14:59:03] [PASSED] yes-or-yes
[14:59:03] [PASSED] no-yes-or-yes-no
[14:59:03] [PASSED] no-yes-or-yes-yes
[14:59:03] [PASSED] yes-yes-or-no-yes
[14:59:03] [PASSED] yes-yes-or-yes-yes
[14:59:03] [PASSED] no-no-or-yes-or-no
[14:59:03] [PASSED] or
[14:59:03] [PASSED] or-yes
[14:59:03] [PASSED] or-no
[14:59:03] [PASSED] yes-or
[14:59:03] [PASSED] no-or
[14:59:03] [PASSED] no-or-or-yes
[14:59:03] [PASSED] yes-or-or-no
[14:59:03] [PASSED] no-or-or-no
[14:59:03] [PASSED] missing-context-engine-class
[14:59:03] [PASSED] missing-context-engine-class-or-yes
[14:59:03] [PASSED] missing-context-engine-class-or-or-yes
[14:59:03] =============== [PASSED] xe_rtp_rules_tests ================
[14:59:03] =============== xe_rtp_process_to_sr_tests ================
[14:59:03] [PASSED] coalesce-same-reg
[14:59:03] [PASSED] no-match-no-add
[14:59:03] [PASSED] two-regs-two-entries
[14:59:03] [PASSED] clr-one-set-other
[14:59:03] [PASSED] set-field
[14:59:03] [PASSED] conflict-duplicate
[14:59:03] [PASSED] conflict-not-disjoint
[14:59:03] [PASSED] conflict-reg-type
[14:59:03] [PASSED] bad-mcr-reg-forced-to-regular
[14:59:03] [PASSED] bad-regular-reg-forced-to-mcr
[14:59:03] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[14:59:03] ================== xe_rtp_process_tests ===================
[14:59:03] [PASSED] active1
[14:59:03] [PASSED] active2
[14:59:03] [PASSED] active-inactive
[14:59:03] [PASSED] inactive-active
[14:59:03] [PASSED] inactive-active-inactive
[14:59:03] [PASSED] inactive-inactive-inactive
[14:59:03] ============== [PASSED] xe_rtp_process_tests ===============
[14:59:03] ===================== [PASSED] xe_rtp ======================
[14:59:03] ==================== xe_wa (1 subtest) =====================
[14:59:03] ======================== xe_wa_gt =========================
[14:59:03] [PASSED] TIGERLAKE B0
[14:59:03] [PASSED] DG1 A0
[14:59:03] [PASSED] DG1 B0
[14:59:03] [PASSED] ALDERLAKE_S A0
[14:59:03] [PASSED] ALDERLAKE_S B0
[14:59:03] [PASSED] ALDERLAKE_S C0
[14:59:03] [PASSED] ALDERLAKE_S D0
[14:59:03] [PASSED] ALDERLAKE_P A0
[14:59:03] [PASSED] ALDERLAKE_P B0
[14:59:03] [PASSED] ALDERLAKE_P C0
[14:59:03] [PASSED] ALDERLAKE_S RPLS D0
[14:59:03] [PASSED] ALDERLAKE_P RPLU E0
[14:59:03] [PASSED] DG2 G10 C0
[14:59:03] [PASSED] DG2 G11 B1
[14:59:03] [PASSED] DG2 G12 A1
[14:59:03] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:59:03] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:59:03] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[14:59:03] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[14:59:03] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[14:59:03] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[14:59:03] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[14:59:03] ==================== [PASSED] xe_wa_gt =====================
[14:59:03] ====================== [PASSED] xe_wa ======================
[14:59:03] ============================================================
[14:59:03] Testing complete. Ran 716 tests: passed: 698, skipped: 18
[14:59:03] Elapsed time: 36.227s total, 4.304s configuring, 31.257s building, 0.640s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[14:59:03] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:59:05] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
In file included from ../drivers/gpu/drm/tests/drm_bridge_test.c:21:
../drivers/gpu/drm/tests/drm_kunit_edid.h:958:28: warning: ‘test_edid_hdmi_4k_rgb_yuv420_dc_max_340mhz’ defined but not used [-Wunused-const-variable=]
958 | static const unsigned char test_edid_hdmi_4k_rgb_yuv420_dc_max_340mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:726:28: warning: ‘test_edid_hdmi_1080p_rgb_yuv_dc_max_340mhz’ defined but not used [-Wunused-const-variable=]
726 | static const unsigned char test_edid_hdmi_1080p_rgb_yuv_dc_max_340mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:612:28: warning: ‘test_edid_hdmi_1080p_rgb_yuv_dc_max_200mhz’ defined but not used [-Wunused-const-variable=]
612 | static const unsigned char test_edid_hdmi_1080p_rgb_yuv_dc_max_200mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:498:28: warning: ‘test_edid_hdmi_1080p_rgb_max_340mhz’ defined but not used [-Wunused-const-variable=]
498 | static const unsigned char test_edid_hdmi_1080p_rgb_max_340mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:390:28: warning: ‘test_edid_hdmi_1080p_rgb_max_200mhz_hdr’ defined but not used [-Wunused-const-variable=]
390 | static const unsigned char test_edid_hdmi_1080p_rgb_max_200mhz_hdr[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:271:28: warning: ‘test_edid_hdmi_1080p_rgb_max_200mhz’ defined but not used [-Wunused-const-variable=]
271 | static const unsigned char test_edid_hdmi_1080p_rgb_max_200mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:163:28: warning: ‘test_edid_hdmi_1080p_rgb_max_100mhz’ defined but not used [-Wunused-const-variable=]
163 | static const unsigned char test_edid_hdmi_1080p_rgb_max_100mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:57:28: warning: ‘test_edid_dvi_1080p’ defined but not used [-Wunused-const-variable=]
57 | static const unsigned char test_edid_dvi_1080p[] = {
| ^~~~~~~~~~~~~~~~~~~
[14:59:29] Starting KUnit Kernel (1/1)...
[14:59:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:59:29] ============ drm_test_pick_cmdline (2 subtests) ============
[14:59:29] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[14:59:29] =============== drm_test_pick_cmdline_named ===============
[14:59:29] [PASSED] NTSC
[14:59:29] [PASSED] NTSC-J
[14:59:29] [PASSED] PAL
[14:59:29] [PASSED] PAL-M
[14:59:29] =========== [PASSED] drm_test_pick_cmdline_named ===========
[14:59:29] ============== [PASSED] drm_test_pick_cmdline ==============
[14:59:29] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[14:59:29] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[14:59:29] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[14:59:29] =========== drm_validate_clone_mode (2 subtests) ===========
[14:59:29] ============== drm_test_check_in_clone_mode ===============
[14:59:29] [PASSED] in_clone_mode
[14:59:29] [PASSED] not_in_clone_mode
[14:59:29] ========== [PASSED] drm_test_check_in_clone_mode ===========
[14:59:29] =============== drm_test_check_valid_clones ===============
[14:59:29] [PASSED] not_in_clone_mode
[14:59:29] [PASSED] valid_clone
[14:59:29] [PASSED] invalid_clone
[14:59:29] =========== [PASSED] drm_test_check_valid_clones ===========
[14:59:29] ============= [PASSED] drm_validate_clone_mode =============
[14:59:29] ============= drm_validate_modeset (1 subtest) =============
[14:59:29] [PASSED] drm_test_check_connector_changed_modeset
[14:59:29] ============== [PASSED] drm_validate_modeset ===============
[14:59:29] ====== drm_test_bridge_get_current_state (2 subtests) ======
[14:59:29] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[14:59:29] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[14:59:29] ======== [PASSED] drm_test_bridge_get_current_state ========
[14:59:29] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[14:59:29] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[14:59:29] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[14:59:29] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[14:59:29] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[14:59:29] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[14:59:29] ============== drm_bridge_alloc (2 subtests) ===============
[14:59:29] [PASSED] drm_test_drm_bridge_alloc_basic
[14:59:29] [PASSED] drm_test_drm_bridge_alloc_get_put
[14:59:29] ================ [PASSED] drm_bridge_alloc =================
[14:59:29] ============= drm_bridge_bus_fmt (5 subtests) ==============
[14:59:29] [PASSED] drm_test_bridge_rgb_yuv_rgb
[14:59:29] [PASSED] drm_test_bridge_must_convert_to_yuv444
[14:59:29] [PASSED] drm_test_bridge_hdmi_auto_rgb
[14:59:29] [PASSED] drm_test_bridge_auto_first
[14:59:29] [PASSED] drm_test_bridge_rgb_yuv_no_path
[14:59:29] =============== [PASSED] drm_bridge_bus_fmt ================
[14:59:29] ============= drm_cmdline_parser (40 subtests) =============
[14:59:29] [PASSED] drm_test_cmdline_force_d_only
[14:59:29] [PASSED] drm_test_cmdline_force_D_only_dvi
[14:59:29] [PASSED] drm_test_cmdline_force_D_only_hdmi
[14:59:29] [PASSED] drm_test_cmdline_force_D_only_not_digital
[14:59:29] [PASSED] drm_test_cmdline_force_e_only
[14:59:29] [PASSED] drm_test_cmdline_res
[14:59:29] [PASSED] drm_test_cmdline_res_vesa
[14:59:29] [PASSED] drm_test_cmdline_res_vesa_rblank
[14:59:29] [PASSED] drm_test_cmdline_res_rblank
[14:59:29] [PASSED] drm_test_cmdline_res_bpp
[14:59:29] [PASSED] drm_test_cmdline_res_refresh
[14:59:29] [PASSED] drm_test_cmdline_res_bpp_refresh
[14:59:29] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[14:59:29] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[14:59:29] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[14:59:29] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[14:59:29] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[14:59:29] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[14:59:29] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[14:59:29] [PASSED] drm_test_cmdline_res_margins_force_on
[14:59:29] [PASSED] drm_test_cmdline_res_vesa_margins
[14:59:29] [PASSED] drm_test_cmdline_name
[14:59:29] [PASSED] drm_test_cmdline_name_bpp
[14:59:29] [PASSED] drm_test_cmdline_name_option
[14:59:29] [PASSED] drm_test_cmdline_name_bpp_option
[14:59:29] [PASSED] drm_test_cmdline_rotate_0
[14:59:29] [PASSED] drm_test_cmdline_rotate_90
[14:59:29] [PASSED] drm_test_cmdline_rotate_180
[14:59:29] [PASSED] drm_test_cmdline_rotate_270
[14:59:29] [PASSED] drm_test_cmdline_hmirror
[14:59:29] [PASSED] drm_test_cmdline_vmirror
[14:59:29] [PASSED] drm_test_cmdline_margin_options
[14:59:29] [PASSED] drm_test_cmdline_multiple_options
[14:59:29] [PASSED] drm_test_cmdline_bpp_extra_and_option
[14:59:29] [PASSED] drm_test_cmdline_extra_and_option
[14:59:29] [PASSED] drm_test_cmdline_freestanding_options
[14:59:29] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[14:59:29] [PASSED] drm_test_cmdline_panel_orientation
[14:59:29] ================ drm_test_cmdline_invalid =================
[14:59:29] [PASSED] margin_only
[14:59:29] [PASSED] interlace_only
[14:59:29] [PASSED] res_missing_x
[14:59:29] [PASSED] res_missing_y
[14:59:29] [PASSED] res_bad_y
[14:59:29] [PASSED] res_missing_y_bpp
[14:59:29] [PASSED] res_bad_bpp
[14:59:29] [PASSED] res_bad_refresh
[14:59:29] [PASSED] res_bpp_refresh_force_on_off
[14:59:29] [PASSED] res_invalid_mode
[14:59:29] [PASSED] res_bpp_wrong_place_mode
[14:59:29] [PASSED] name_bpp_refresh
[14:59:29] [PASSED] name_refresh
[14:59:29] [PASSED] name_refresh_wrong_mode
[14:59:29] [PASSED] name_refresh_invalid_mode
[14:59:29] [PASSED] rotate_multiple
[14:59:29] [PASSED] rotate_invalid_val
[14:59:29] [PASSED] rotate_truncated
[14:59:29] [PASSED] invalid_option
[14:59:29] [PASSED] invalid_tv_option
[14:59:29] [PASSED] truncated_tv_option
[14:59:29] ============ [PASSED] drm_test_cmdline_invalid =============
[14:59:29] =============== drm_test_cmdline_tv_options ===============
[14:59:29] [PASSED] NTSC
[14:59:29] [PASSED] NTSC_443
[14:59:29] [PASSED] NTSC_J
[14:59:29] [PASSED] PAL
[14:59:29] [PASSED] PAL_M
[14:59:29] [PASSED] PAL_N
[14:59:29] [PASSED] SECAM
[14:59:29] [PASSED] MONO_525
[14:59:29] [PASSED] MONO_625
[14:59:29] =========== [PASSED] drm_test_cmdline_tv_options ===========
[14:59:29] =============== [PASSED] drm_cmdline_parser ================
[14:59:29] ========== drmm_connector_hdmi_init (20 subtests) ==========
[14:59:29] [PASSED] drm_test_connector_hdmi_init_valid
[14:59:29] [PASSED] drm_test_connector_hdmi_init_bpc_8
[14:59:29] [PASSED] drm_test_connector_hdmi_init_bpc_10
[14:59:29] [PASSED] drm_test_connector_hdmi_init_bpc_12
[14:59:29] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[14:59:29] [PASSED] drm_test_connector_hdmi_init_bpc_null
[14:59:29] [PASSED] drm_test_connector_hdmi_init_formats_empty
[14:59:29] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[14:59:29] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:59:29] [PASSED] supported_formats=0x9 yuv420_allowed=1
[14:59:29] [PASSED] supported_formats=0x9 yuv420_allowed=0
[14:59:29] [PASSED] supported_formats=0x5 yuv420_allowed=1
[14:59:29] [PASSED] supported_formats=0x5 yuv420_allowed=0
[14:59:29] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:59:29] [PASSED] drm_test_connector_hdmi_init_null_ddc
[14:59:29] [PASSED] drm_test_connector_hdmi_init_null_product
[14:59:29] [PASSED] drm_test_connector_hdmi_init_null_vendor
[14:59:29] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[14:59:29] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[14:59:29] [PASSED] drm_test_connector_hdmi_init_product_valid
[14:59:29] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[14:59:29] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[14:59:29] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[14:59:29] ========= drm_test_connector_hdmi_init_type_valid =========
[14:59:29] [PASSED] HDMI-A
[14:59:29] [PASSED] HDMI-B
[14:59:29] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[14:59:29] ======== drm_test_connector_hdmi_init_type_invalid ========
[14:59:29] [PASSED] Unknown
[14:59:29] [PASSED] VGA
[14:59:29] [PASSED] DVI-I
[14:59:29] [PASSED] DVI-D
[14:59:29] [PASSED] DVI-A
[14:59:29] [PASSED] Composite
[14:59:29] [PASSED] SVIDEO
[14:59:29] [PASSED] LVDS
[14:59:29] [PASSED] Component
[14:59:29] [PASSED] DIN
[14:59:29] [PASSED] DP
[14:59:29] [PASSED] TV
[14:59:29] [PASSED] eDP
[14:59:29] [PASSED] Virtual
[14:59:29] [PASSED] DSI
[14:59:29] [PASSED] DPI
[14:59:29] [PASSED] Writeback
[14:59:29] [PASSED] SPI
[14:59:29] [PASSED] USB
[14:59:29] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[14:59:29] ============ [PASSED] drmm_connector_hdmi_init =============
[14:59:29] ============= drmm_connector_init (3 subtests) =============
[14:59:29] [PASSED] drm_test_drmm_connector_init
[14:59:29] [PASSED] drm_test_drmm_connector_init_null_ddc
[14:59:29] ========= drm_test_drmm_connector_init_type_valid =========
[14:59:29] [PASSED] Unknown
[14:59:29] [PASSED] VGA
[14:59:29] [PASSED] DVI-I
[14:59:29] [PASSED] DVI-D
[14:59:29] [PASSED] DVI-A
[14:59:29] [PASSED] Composite
[14:59:29] [PASSED] SVIDEO
[14:59:29] [PASSED] LVDS
[14:59:29] [PASSED] Component
[14:59:29] [PASSED] DIN
[14:59:29] [PASSED] DP
[14:59:29] [PASSED] HDMI-A
[14:59:29] [PASSED] HDMI-B
[14:59:29] [PASSED] TV
[14:59:29] [PASSED] eDP
[14:59:29] [PASSED] Virtual
[14:59:29] [PASSED] DSI
[14:59:29] [PASSED] DPI
[14:59:29] [PASSED] Writeback
[14:59:29] [PASSED] SPI
[14:59:29] [PASSED] USB
[14:59:29] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[14:59:29] =============== [PASSED] drmm_connector_init ===============
[14:59:29] ========= drm_connector_dynamic_init (6 subtests) ==========
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_init
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_init_properties
[14:59:29] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[14:59:29] [PASSED] Unknown
[14:59:29] [PASSED] VGA
[14:59:29] [PASSED] DVI-I
[14:59:29] [PASSED] DVI-D
[14:59:29] [PASSED] DVI-A
[14:59:29] [PASSED] Composite
[14:59:29] [PASSED] SVIDEO
[14:59:29] [PASSED] LVDS
[14:59:29] [PASSED] Component
[14:59:29] [PASSED] DIN
[14:59:29] [PASSED] DP
[14:59:29] [PASSED] HDMI-A
[14:59:29] [PASSED] HDMI-B
[14:59:29] [PASSED] TV
[14:59:29] [PASSED] eDP
[14:59:29] [PASSED] Virtual
[14:59:29] [PASSED] DSI
[14:59:29] [PASSED] DPI
[14:59:29] [PASSED] Writeback
[14:59:29] [PASSED] SPI
[14:59:29] [PASSED] USB
[14:59:29] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[14:59:29] ======== drm_test_drm_connector_dynamic_init_name =========
[14:59:29] [PASSED] Unknown
[14:59:29] [PASSED] VGA
[14:59:29] [PASSED] DVI-I
[14:59:29] [PASSED] DVI-D
[14:59:29] [PASSED] DVI-A
[14:59:29] [PASSED] Composite
[14:59:29] [PASSED] SVIDEO
[14:59:29] [PASSED] LVDS
[14:59:29] [PASSED] Component
[14:59:29] [PASSED] DIN
[14:59:29] [PASSED] DP
[14:59:29] [PASSED] HDMI-A
[14:59:29] [PASSED] HDMI-B
[14:59:29] [PASSED] TV
[14:59:29] [PASSED] eDP
[14:59:29] [PASSED] Virtual
[14:59:29] [PASSED] DSI
[14:59:29] [PASSED] DPI
[14:59:29] [PASSED] Writeback
[14:59:29] [PASSED] SPI
[14:59:29] [PASSED] USB
[14:59:29] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[14:59:29] =========== [PASSED] drm_connector_dynamic_init ============
[14:59:29] ==== drm_connector_dynamic_register_early (4 subtests) =====
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[14:59:29] ====== [PASSED] drm_connector_dynamic_register_early =======
[14:59:29] ======= drm_connector_dynamic_register (7 subtests) ========
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[14:59:29] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[14:59:29] ========= [PASSED] drm_connector_dynamic_register ==========
[14:59:29] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[14:59:29] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[14:59:29] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[14:59:29] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[14:59:29] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[14:59:29] ========== drm_test_get_tv_mode_from_name_valid ===========
[14:59:29] [PASSED] NTSC
[14:59:29] [PASSED] NTSC-443
[14:59:29] [PASSED] NTSC-J
[14:59:29] [PASSED] PAL
[14:59:29] [PASSED] PAL-M
[14:59:29] [PASSED] PAL-N
[14:59:29] [PASSED] SECAM
[14:59:29] [PASSED] Mono
[14:59:29] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[14:59:29] [PASSED] drm_test_get_tv_mode_from_name_truncated
[14:59:29] ============ [PASSED] drm_get_tv_mode_from_name ============
[14:59:29] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[14:59:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[14:59:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[14:59:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[14:59:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[14:59:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[14:59:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[14:59:29] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[14:59:29] [PASSED] VIC 96
[14:59:29] [PASSED] VIC 97
[14:59:29] [PASSED] VIC 101
[14:59:29] [PASSED] VIC 102
[14:59:29] [PASSED] VIC 106
[14:59:29] [PASSED] VIC 107
[14:59:29] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[14:59:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[14:59:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[14:59:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[14:59:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[14:59:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[14:59:29] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[14:59:29] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[14:59:29] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[14:59:29] [PASSED] Automatic
[14:59:29] [PASSED] Full
[14:59:29] [PASSED] Limited 16:235
[14:59:29] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[14:59:29] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[14:59:29] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[14:59:29] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[14:59:29] === drm_test_drm_hdmi_connector_get_output_format_name ====
[14:59:29] [PASSED] RGB
[14:59:29] [PASSED] YUV 4:2:0
[14:59:29] [PASSED] YUV 4:2:2
[14:59:29] [PASSED] YUV 4:4:4
[14:59:29] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[14:59:29] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[14:59:29] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[14:59:29] ============= drm_damage_helper (21 subtests) ==============
[14:59:29] [PASSED] drm_test_damage_iter_no_damage
[14:59:29] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[14:59:29] [PASSED] drm_test_damage_iter_no_damage_src_moved
[14:59:29] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[14:59:29] [PASSED] drm_test_damage_iter_no_damage_not_visible
[14:59:29] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[14:59:29] [PASSED] drm_test_damage_iter_no_damage_no_fb
[14:59:29] [PASSED] drm_test_damage_iter_simple_damage
[14:59:29] [PASSED] drm_test_damage_iter_single_damage
[14:59:29] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[14:59:29] [PASSED] drm_test_damage_iter_single_damage_outside_src
[14:59:29] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[14:59:29] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[14:59:29] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[14:59:29] [PASSED] drm_test_damage_iter_single_damage_src_moved
[14:59:29] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[14:59:29] [PASSED] drm_test_damage_iter_damage
[14:59:29] [PASSED] drm_test_damage_iter_damage_one_intersect
[14:59:29] [PASSED] drm_test_damage_iter_damage_one_outside
[14:59:29] [PASSED] drm_test_damage_iter_damage_src_moved
[14:59:29] [PASSED] drm_test_damage_iter_damage_not_visible
[14:59:29] ================ [PASSED] drm_damage_helper ================
[14:59:29] ============== drm_dp_mst_helper (3 subtests) ==============
[14:59:29] ============== drm_test_dp_mst_calc_pbn_mode ==============
[14:59:29] [PASSED] Clock 154000 BPP 30 DSC disabled
[14:59:29] [PASSED] Clock 234000 BPP 30 DSC disabled
[14:59:29] [PASSED] Clock 297000 BPP 24 DSC disabled
[14:59:29] [PASSED] Clock 332880 BPP 24 DSC enabled
[14:59:29] [PASSED] Clock 324540 BPP 24 DSC enabled
[14:59:29] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[14:59:29] ============== drm_test_dp_mst_calc_pbn_div ===============
[14:59:29] [PASSED] Link rate 2000000 lane count 4
[14:59:29] [PASSED] Link rate 2000000 lane count 2
[14:59:29] [PASSED] Link rate 2000000 lane count 1
[14:59:29] [PASSED] Link rate 1350000 lane count 4
[14:59:29] [PASSED] Link rate 1350000 lane count 2
[14:59:29] [PASSED] Link rate 1350000 lane count 1
[14:59:29] [PASSED] Link rate 1000000 lane count 4
[14:59:29] [PASSED] Link rate 1000000 lane count 2
[14:59:29] [PASSED] Link rate 1000000 lane count 1
[14:59:29] [PASSED] Link rate 810000 lane count 4
[14:59:29] [PASSED] Link rate 810000 lane count 2
[14:59:29] [PASSED] Link rate 810000 lane count 1
[14:59:29] [PASSED] Link rate 540000 lane count 4
[14:59:29] [PASSED] Link rate 540000 lane count 2
[14:59:29] [PASSED] Link rate 540000 lane count 1
[14:59:29] [PASSED] Link rate 270000 lane count 4
[14:59:29] [PASSED] Link rate 270000 lane count 2
[14:59:29] [PASSED] Link rate 270000 lane count 1
[14:59:29] [PASSED] Link rate 162000 lane count 4
[14:59:29] [PASSED] Link rate 162000 lane count 2
[14:59:29] [PASSED] Link rate 162000 lane count 1
[14:59:29] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[14:59:29] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[14:59:29] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[14:59:29] [PASSED] DP_POWER_UP_PHY with port number
[14:59:29] [PASSED] DP_POWER_DOWN_PHY with port number
[14:59:29] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[14:59:29] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[14:59:29] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[14:59:29] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[14:59:29] [PASSED] DP_QUERY_PAYLOAD with port number
[14:59:29] [PASSED] DP_QUERY_PAYLOAD with VCPI
[14:59:29] [PASSED] DP_REMOTE_DPCD_READ with port number
[14:59:29] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[14:59:29] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[14:59:29] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[14:59:29] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[14:59:29] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[14:59:29] [PASSED] DP_REMOTE_I2C_READ with port number
[14:59:29] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[14:59:29] [PASSED] DP_REMOTE_I2C_READ with transactions array
[14:59:29] [PASSED] DP_REMOTE_I2C_WRITE with port number
[14:59:29] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[14:59:29] [PASSED] DP_REMOTE_I2C_WRITE with data array
[14:59:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[14:59:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[14:59:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[14:59:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[14:59:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[14:59:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[14:59:29] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[14:59:29] ================ [PASSED] drm_dp_mst_helper ================
[14:59:29] ================== drm_exec (7 subtests) ===================
[14:59:29] [PASSED] sanitycheck
[14:59:29] [PASSED] test_lock
[14:59:29] [PASSED] test_lock_unlock
[14:59:29] [PASSED] test_duplicates
[14:59:29] [PASSED] test_prepare
[14:59:29] [PASSED] test_prepare_array
[14:59:29] [PASSED] test_multiple_loops
[14:59:29] ==================== [PASSED] drm_exec =====================
[14:59:29] =========== drm_format_helper_test (17 subtests) ===========
[14:59:29] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[14:59:29] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[14:59:29] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[14:59:29] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[14:59:29] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[14:59:29] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[14:59:29] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[14:59:29] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[14:59:29] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[14:59:29] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[14:59:29] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[14:59:29] ============== drm_test_fb_xrgb8888_to_mono ===============
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[14:59:29] ==================== drm_test_fb_swab =====================
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ================ [PASSED] drm_test_fb_swab =================
[14:59:29] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[14:59:29] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[14:59:29] [PASSED] single_pixel_source_buffer
[14:59:29] [PASSED] single_pixel_clip_rectangle
[14:59:29] [PASSED] well_known_colors
[14:59:29] [PASSED] destination_pitch
[14:59:29] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[14:59:29] ================= drm_test_fb_clip_offset =================
[14:59:29] [PASSED] pass through
[14:59:29] [PASSED] horizontal offset
[14:59:29] [PASSED] vertical offset
[14:59:29] [PASSED] horizontal and vertical offset
[14:59:29] [PASSED] horizontal offset (custom pitch)
[14:59:29] [PASSED] vertical offset (custom pitch)
[14:59:29] [PASSED] horizontal and vertical offset (custom pitch)
[14:59:29] ============= [PASSED] drm_test_fb_clip_offset =============
[14:59:29] =================== drm_test_fb_memcpy ====================
[14:59:29] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[14:59:29] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[14:59:29] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[14:59:29] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[14:59:29] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[14:59:29] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[14:59:29] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[14:59:29] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[14:59:29] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[14:59:29] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[14:59:29] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[14:59:29] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[14:59:29] =============== [PASSED] drm_test_fb_memcpy ================
[14:59:29] ============= [PASSED] drm_format_helper_test ==============
[14:59:29] ================= drm_format (18 subtests) =================
[14:59:29] [PASSED] drm_test_format_block_width_invalid
[14:59:29] [PASSED] drm_test_format_block_width_one_plane
[14:59:29] [PASSED] drm_test_format_block_width_two_plane
[14:59:29] [PASSED] drm_test_format_block_width_three_plane
[14:59:29] [PASSED] drm_test_format_block_width_tiled
[14:59:29] [PASSED] drm_test_format_block_height_invalid
[14:59:29] [PASSED] drm_test_format_block_height_one_plane
[14:59:29] [PASSED] drm_test_format_block_height_two_plane
[14:59:29] [PASSED] drm_test_format_block_height_three_plane
[14:59:29] [PASSED] drm_test_format_block_height_tiled
[14:59:29] [PASSED] drm_test_format_min_pitch_invalid
[14:59:29] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[14:59:29] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[14:59:29] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[14:59:29] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[14:59:29] [PASSED] drm_test_format_min_pitch_two_plane
[14:59:29] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[14:59:29] [PASSED] drm_test_format_min_pitch_tiled
[14:59:29] =================== [PASSED] drm_format ====================
[14:59:29] ============== drm_framebuffer (10 subtests) ===============
[14:59:29] ========== drm_test_framebuffer_check_src_coords ==========
[14:59:29] [PASSED] Success: source fits into fb
[14:59:29] [PASSED] Fail: overflowing fb with x-axis coordinate
[14:59:29] [PASSED] Fail: overflowing fb with y-axis coordinate
[14:59:29] [PASSED] Fail: overflowing fb with source width
[14:59:29] [PASSED] Fail: overflowing fb with source height
[14:59:29] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[14:59:29] [PASSED] drm_test_framebuffer_cleanup
[14:59:29] =============== drm_test_framebuffer_create ===============
[14:59:29] [PASSED] ABGR8888 normal sizes
[14:59:29] [PASSED] ABGR8888 max sizes
[14:59:29] [PASSED] ABGR8888 pitch greater than min required
[14:59:29] [PASSED] ABGR8888 pitch less than min required
[14:59:29] [PASSED] ABGR8888 Invalid width
[14:59:29] [PASSED] ABGR8888 Invalid buffer handle
[14:59:29] [PASSED] No pixel format
[14:59:29] [PASSED] ABGR8888 Width 0
[14:59:29] [PASSED] ABGR8888 Height 0
[14:59:29] [PASSED] ABGR8888 Out of bound height * pitch combination
[14:59:29] [PASSED] ABGR8888 Large buffer offset
[14:59:29] [PASSED] ABGR8888 Buffer offset for inexistent plane
[14:59:29] [PASSED] ABGR8888 Invalid flag
[14:59:29] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[14:59:29] [PASSED] ABGR8888 Valid buffer modifier
[14:59:29] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[14:59:29] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[14:59:29] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[14:59:29] [PASSED] NV12 Normal sizes
[14:59:29] [PASSED] NV12 Max sizes
[14:59:29] [PASSED] NV12 Invalid pitch
[14:59:29] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[14:59:29] [PASSED] NV12 different modifier per-plane
[14:59:29] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[14:59:29] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[14:59:29] [PASSED] NV12 Modifier for inexistent plane
[14:59:29] [PASSED] NV12 Handle for inexistent plane
[14:59:29] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[14:59:29] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[14:59:29] [PASSED] YVU420 Normal sizes
[14:59:29] [PASSED] YVU420 Max sizes
[14:59:29] [PASSED] YVU420 Invalid pitch
[14:59:29] [PASSED] YVU420 Different pitches
[14:59:29] [PASSED] YVU420 Different buffer offsets/pitches
[14:59:29] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[14:59:29] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[14:59:29] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[14:59:29] [PASSED] YVU420 Valid modifier
[14:59:29] [PASSED] YVU420 Different modifiers per plane
[14:59:29] [PASSED] YVU420 Modifier for inexistent plane
[14:59:29] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[14:59:29] [PASSED] X0L2 Normal sizes
[14:59:29] [PASSED] X0L2 Max sizes
[14:59:29] [PASSED] X0L2 Invalid pitch
[14:59:29] [PASSED] X0L2 Pitch greater than minimum required
[14:59:29] [PASSED] X0L2 Handle for inexistent plane
[14:59:29] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[14:59:29] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[14:59:29] [PASSED] X0L2 Valid modifier
[14:59:29] [PASSED] X0L2 Modifier for inexistent plane
[14:59:29] =========== [PASSED] drm_test_framebuffer_create ===========
[14:59:29] [PASSED] drm_test_framebuffer_free
[14:59:29] [PASSED] drm_test_framebuffer_init
[14:59:29] [PASSED] drm_test_framebuffer_init_bad_format
[14:59:29] [PASSED] drm_test_framebuffer_init_dev_mismatch
[14:59:29] [PASSED] drm_test_framebuffer_lookup
[14:59:29] [PASSED] drm_test_framebuffer_lookup_inexistent
[14:59:29] [PASSED] drm_test_framebuffer_modifiers_not_supported
[14:59:29] ================= [PASSED] drm_framebuffer =================
[14:59:29] ================ drm_gem_shmem (8 subtests) ================
[14:59:29] [PASSED] drm_gem_shmem_test_obj_create
[14:59:29] [PASSED] drm_gem_shmem_test_obj_create_private
[14:59:29] [PASSED] drm_gem_shmem_test_pin_pages
[14:59:29] [PASSED] drm_gem_shmem_test_vmap
[14:59:29] [PASSED] drm_gem_shmem_test_get_sg_table
[14:59:29] [PASSED] drm_gem_shmem_test_get_pages_sgt
[14:59:29] [PASSED] drm_gem_shmem_test_madvise
[14:59:29] [PASSED] drm_gem_shmem_test_purge
[14:59:29] ================== [PASSED] drm_gem_shmem ==================
[14:59:29] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[14:59:29] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[14:59:29] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[14:59:29] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[14:59:29] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[14:59:29] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[14:59:29] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[14:59:29] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[14:59:29] [PASSED] Automatic
[14:59:29] [PASSED] Full
[14:59:29] [PASSED] Limited 16:235
[14:59:29] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[14:59:29] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[14:59:29] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[14:59:29] [PASSED] drm_test_check_disable_connector
[14:59:29] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[14:59:29] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[14:59:29] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[14:59:29] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[14:59:29] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[14:59:29] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[14:59:29] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[14:59:29] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[14:59:29] [PASSED] drm_test_check_output_bpc_dvi
[14:59:29] [PASSED] drm_test_check_output_bpc_format_vic_1
[14:59:29] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[14:59:29] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[14:59:29] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[14:59:29] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[14:59:29] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[14:59:29] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[14:59:29] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[14:59:29] ============ drm_test_check_hdmi_color_format =============
[14:59:29] [PASSED] AUTO -> RGB
[14:59:29] [PASSED] YCBCR422 -> YUV422
[14:59:29] [PASSED] YCBCR420 -> YUV420
[14:59:29] [PASSED] YCBCR444 -> YUV444
[14:59:29] [PASSED] RGB -> RGB
[14:59:29] ======== [PASSED] drm_test_check_hdmi_color_format =========
[14:59:29] ======== drm_test_check_hdmi_color_format_420_only ========
[14:59:29] [PASSED] RGB should fail
[14:59:29] [PASSED] YUV444 should fail
[14:59:29] [PASSED] YUV422 should fail
[14:59:29] [PASSED] YUV420 should work
[14:59:29] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[14:59:29] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[14:59:29] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[14:59:29] [PASSED] drm_test_check_broadcast_rgb_value
[14:59:29] [PASSED] drm_test_check_bpc_8_value
[14:59:29] [PASSED] drm_test_check_bpc_10_value
[14:59:29] [PASSED] drm_test_check_bpc_12_value
[14:59:29] [PASSED] drm_test_check_format_value
[14:59:29] [PASSED] drm_test_check_tmds_char_value
[14:59:29] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[14:59:29] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[14:59:29] [PASSED] drm_test_check_mode_valid
[14:59:29] [PASSED] drm_test_check_mode_valid_reject
[14:59:29] [PASSED] drm_test_check_mode_valid_reject_rate
[14:59:29] [PASSED] drm_test_check_mode_valid_reject_max_clock
[14:59:29] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[14:59:29] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[14:59:29] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[14:59:29] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[14:59:29] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[14:59:29] [PASSED] drm_test_check_infoframes
[14:59:29] [PASSED] drm_test_check_reject_avi_infoframe
[14:59:29] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[14:59:29] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[14:59:29] [PASSED] drm_test_check_reject_audio_infoframe
[14:59:29] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[14:59:29] ================= drm_managed (2 subtests) =================
[14:59:29] [PASSED] drm_test_managed_release_action
[14:59:29] [PASSED] drm_test_managed_run_action
[14:59:29] =================== [PASSED] drm_managed ===================
[14:59:29] =================== drm_mm (6 subtests) ====================
[14:59:29] [PASSED] drm_test_mm_init
[14:59:29] [PASSED] drm_test_mm_debug
[14:59:29] [PASSED] drm_test_mm_align32
[14:59:29] [PASSED] drm_test_mm_align64
[14:59:29] [PASSED] drm_test_mm_lowest
[14:59:29] [PASSED] drm_test_mm_highest
[14:59:29] ===================== [PASSED] drm_mm ======================
[14:59:29] ============= drm_modes_analog_tv (5 subtests) =============
[14:59:29] [PASSED] drm_test_modes_analog_tv_mono_576i
[14:59:29] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[14:59:29] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[14:59:29] [PASSED] drm_test_modes_analog_tv_pal_576i
[14:59:29] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[14:59:29] =============== [PASSED] drm_modes_analog_tv ===============
[14:59:29] ============== drm_plane_helper (2 subtests) ===============
[14:59:29] =============== drm_test_check_plane_state ================
[14:59:29] [PASSED] clipping_simple
[14:59:29] [PASSED] clipping_rotate_reflect
[14:59:29] [PASSED] positioning_simple
[14:59:29] [PASSED] upscaling
[14:59:29] [PASSED] downscaling
[14:59:29] [PASSED] rounding1
[14:59:29] [PASSED] rounding2
[14:59:29] [PASSED] rounding3
[14:59:29] [PASSED] rounding4
[14:59:29] =========== [PASSED] drm_test_check_plane_state ============
[14:59:29] =========== drm_test_check_invalid_plane_state ============
[14:59:29] [PASSED] positioning_invalid
[14:59:29] [PASSED] upscaling_invalid
[14:59:29] [PASSED] downscaling_invalid
[14:59:29] ======= [PASSED] drm_test_check_invalid_plane_state ========
[14:59:29] ================ [PASSED] drm_plane_helper =================
[14:59:29] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[14:59:29] ====== drm_test_connector_helper_tv_get_modes_check =======
[14:59:29] [PASSED] None
[14:59:29] [PASSED] PAL
[14:59:29] [PASSED] NTSC
[14:59:29] [PASSED] Both, NTSC Default
[14:59:29] [PASSED] Both, PAL Default
[14:59:29] [PASSED] Both, NTSC Default, with PAL on command-line
[14:59:29] [PASSED] Both, PAL Default, with NTSC on command-line
[14:59:29] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[14:59:29] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[14:59:29] ================== drm_rect (9 subtests) ===================
[14:59:29] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[14:59:29] [PASSED] drm_test_rect_clip_scaled_not_clipped
[14:59:29] [PASSED] drm_test_rect_clip_scaled_clipped
[14:59:29] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[14:59:29] ================= drm_test_rect_intersect =================
[14:59:29] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[14:59:29] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[14:59:29] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[14:59:29] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[14:59:29] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[14:59:29] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[14:59:29] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[14:59:29] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[14:59:29] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[14:59:29] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[14:59:29] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[14:59:29] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[14:59:29] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[14:59:29] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[14:59:29] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[14:59:29] ============= [PASSED] drm_test_rect_intersect =============
[14:59:29] ================ drm_test_rect_calc_hscale ================
[14:59:29] [PASSED] normal use
[14:59:29] [PASSED] out of max range
[14:59:29] [PASSED] out of min range
[14:59:29] [PASSED] zero dst
[14:59:29] [PASSED] negative src
[14:59:29] [PASSED] negative dst
[14:59:29] ============ [PASSED] drm_test_rect_calc_hscale ============
[14:59:29] ================ drm_test_rect_calc_vscale ================
[14:59:29] [PASSED] normal use
[14:59:29] [PASSED] out of max range
[14:59:29] [PASSED] out of min range
[14:59:29] [PASSED] zero dst
[14:59:29] [PASSED] negative src
[14:59:29] [PASSED] negative dst
[14:59:29] ============ [PASSED] drm_test_rect_calc_vscale ============
[14:59:29] ================== drm_test_rect_rotate ===================
[14:59:29] [PASSED] reflect-x
[14:59:29] [PASSED] reflect-y
[14:59:29] [PASSED] rotate-0
[14:59:29] [PASSED] rotate-90
[14:59:29] [PASSED] rotate-180
[14:59:29] [PASSED] rotate-270
[14:59:29] ============== [PASSED] drm_test_rect_rotate ===============
[14:59:29] ================ drm_test_rect_rotate_inv =================
[14:59:29] [PASSED] reflect-x
[14:59:29] [PASSED] reflect-y
[14:59:29] [PASSED] rotate-0
[14:59:29] [PASSED] rotate-90
[14:59:29] [PASSED] rotate-180
[14:59:29] [PASSED] rotate-270
[14:59:29] ============ [PASSED] drm_test_rect_rotate_inv =============
[14:59:29] ==================== [PASSED] drm_rect =====================
[14:59:29] ============ drm_sysfb_modeset_test (1 subtest) ============
[14:59:29] ============ drm_test_sysfb_build_fourcc_list =============
[14:59:29] [PASSED] no native formats
[14:59:29] [PASSED] XRGB8888 as native format
[14:59:29] [PASSED] remove duplicates
[14:59:29] [PASSED] convert alpha formats
[14:59:29] [PASSED] random formats
[14:59:29] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[14:59:29] ============= [PASSED] drm_sysfb_modeset_test ==============
[14:59:29] ================== drm_fixp (2 subtests) ===================
[14:59:29] [PASSED] drm_test_int2fixp
[14:59:29] [PASSED] drm_test_sm2fixp
[14:59:29] ==================== [PASSED] drm_fixp =====================
[14:59:29] ============================================================
[14:59:29] Testing complete. Ran 639 tests: passed: 639
[14:59:29] Elapsed time: 26.206s total, 1.722s configuring, 24.316s building, 0.150s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[14:59:30] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:59:31] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:59:41] Starting KUnit Kernel (1/1)...
[14:59:41] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:59:41] ================= ttm_device (5 subtests) ==================
[14:59:41] [PASSED] ttm_device_init_basic
[14:59:41] [PASSED] ttm_device_init_multiple
[14:59:41] [PASSED] ttm_device_fini_basic
[14:59:41] [PASSED] ttm_device_init_no_vma_man
[14:59:41] ================== ttm_device_init_pools ==================
[14:59:41] [PASSED] No DMA allocations, no DMA32 required
[14:59:41] [PASSED] DMA allocations, DMA32 required
[14:59:41] [PASSED] No DMA allocations, DMA32 required
[14:59:41] [PASSED] DMA allocations, no DMA32 required
[14:59:41] ============== [PASSED] ttm_device_init_pools ==============
[14:59:41] =================== [PASSED] ttm_device ====================
[14:59:41] ================== ttm_pool (8 subtests) ===================
[14:59:41] ================== ttm_pool_alloc_basic ===================
[14:59:41] [PASSED] One page
[14:59:41] [PASSED] More than one page
[14:59:41] [PASSED] Above the allocation limit
[14:59:41] [PASSED] One page, with coherent DMA mappings enabled
[14:59:41] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:59:41] ============== [PASSED] ttm_pool_alloc_basic ===============
[14:59:41] ============== ttm_pool_alloc_basic_dma_addr ==============
[14:59:41] [PASSED] One page
[14:59:41] [PASSED] More than one page
[14:59:41] [PASSED] Above the allocation limit
[14:59:41] [PASSED] One page, with coherent DMA mappings enabled
[14:59:41] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:59:41] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[14:59:41] [PASSED] ttm_pool_alloc_order_caching_match
[14:59:41] [PASSED] ttm_pool_alloc_caching_mismatch
[14:59:41] [PASSED] ttm_pool_alloc_order_mismatch
[14:59:41] [PASSED] ttm_pool_free_dma_alloc
[14:59:41] [PASSED] ttm_pool_free_no_dma_alloc
[14:59:41] [PASSED] ttm_pool_fini_basic
[14:59:41] ==================== [PASSED] ttm_pool =====================
[14:59:41] ================ ttm_resource (8 subtests) =================
[14:59:41] ================= ttm_resource_init_basic =================
[14:59:41] [PASSED] Init resource in TTM_PL_SYSTEM
[14:59:41] [PASSED] Init resource in TTM_PL_VRAM
[14:59:41] [PASSED] Init resource in a private placement
[14:59:41] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[14:59:41] ============= [PASSED] ttm_resource_init_basic =============
[14:59:41] [PASSED] ttm_resource_init_pinned
[14:59:41] [PASSED] ttm_resource_fini_basic
[14:59:41] [PASSED] ttm_resource_manager_init_basic
[14:59:41] [PASSED] ttm_resource_manager_usage_basic
[14:59:41] [PASSED] ttm_resource_manager_set_used_basic
[14:59:41] [PASSED] ttm_sys_man_alloc_basic
[14:59:41] [PASSED] ttm_sys_man_free_basic
[14:59:41] ================== [PASSED] ttm_resource ===================
[14:59:41] =================== ttm_tt (15 subtests) ===================
[14:59:41] ==================== ttm_tt_init_basic ====================
[14:59:41] [PASSED] Page-aligned size
[14:59:41] [PASSED] Extra pages requested
[14:59:41] ================ [PASSED] ttm_tt_init_basic ================
[14:59:41] [PASSED] ttm_tt_init_misaligned
[14:59:41] [PASSED] ttm_tt_fini_basic
[14:59:41] [PASSED] ttm_tt_fini_sg
[14:59:41] [PASSED] ttm_tt_fini_shmem
[14:59:41] [PASSED] ttm_tt_create_basic
[14:59:41] [PASSED] ttm_tt_create_invalid_bo_type
[14:59:41] [PASSED] ttm_tt_create_ttm_exists
[14:59:41] [PASSED] ttm_tt_create_failed
[14:59:41] [PASSED] ttm_tt_destroy_basic
[14:59:41] [PASSED] ttm_tt_populate_null_ttm
[14:59:41] [PASSED] ttm_tt_populate_populated_ttm
[14:59:41] [PASSED] ttm_tt_unpopulate_basic
[14:59:41] [PASSED] ttm_tt_unpopulate_empty_ttm
[14:59:41] [PASSED] ttm_tt_swapin_basic
[14:59:41] ===================== [PASSED] ttm_tt ======================
[14:59:41] =================== ttm_bo (14 subtests) ===================
[14:59:41] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[14:59:41] [PASSED] Cannot be interrupted and sleeps
[14:59:41] [PASSED] Cannot be interrupted, locks straight away
[14:59:41] [PASSED] Can be interrupted, sleeps
[14:59:41] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[14:59:41] [PASSED] ttm_bo_reserve_locked_no_sleep
[14:59:41] [PASSED] ttm_bo_reserve_no_wait_ticket
[14:59:41] [PASSED] ttm_bo_reserve_double_resv
[14:59:41] [PASSED] ttm_bo_reserve_interrupted
[14:59:41] [PASSED] ttm_bo_reserve_deadlock
[14:59:41] [PASSED] ttm_bo_unreserve_basic
[14:59:41] [PASSED] ttm_bo_unreserve_pinned
[14:59:41] [PASSED] ttm_bo_unreserve_bulk
[14:59:41] [PASSED] ttm_bo_fini_basic
[14:59:41] [PASSED] ttm_bo_fini_shared_resv
[14:59:41] [PASSED] ttm_bo_pin_basic
[14:59:41] [PASSED] ttm_bo_pin_unpin_resource
[14:59:41] [PASSED] ttm_bo_multiple_pin_one_unpin
[14:59:41] ===================== [PASSED] ttm_bo ======================
[14:59:41] ============== ttm_bo_validate (22 subtests) ===============
[14:59:41] ============== ttm_bo_init_reserved_sys_man ===============
[14:59:41] [PASSED] Buffer object for userspace
[14:59:41] [PASSED] Kernel buffer object
[14:59:41] [PASSED] Shared buffer object
[14:59:41] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[14:59:41] ============== ttm_bo_init_reserved_mock_man ==============
[14:59:41] [PASSED] Buffer object for userspace
[14:59:41] [PASSED] Kernel buffer object
[14:59:41] [PASSED] Shared buffer object
[14:59:41] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[14:59:41] [PASSED] ttm_bo_init_reserved_resv
[14:59:41] ================== ttm_bo_validate_basic ==================
[14:59:41] [PASSED] Buffer object for userspace
[14:59:41] [PASSED] Kernel buffer object
[14:59:41] [PASSED] Shared buffer object
[14:59:41] ============== [PASSED] ttm_bo_validate_basic ==============
[14:59:41] [PASSED] ttm_bo_validate_invalid_placement
[14:59:41] ============= ttm_bo_validate_same_placement ==============
[14:59:41] [PASSED] System manager
[14:59:41] [PASSED] VRAM manager
[14:59:41] ========= [PASSED] ttm_bo_validate_same_placement ==========
[14:59:41] [PASSED] ttm_bo_validate_failed_alloc
[14:59:41] [PASSED] ttm_bo_validate_pinned
[14:59:41] [PASSED] ttm_bo_validate_busy_placement
[14:59:41] ================ ttm_bo_validate_multihop =================
[14:59:41] [PASSED] Buffer object for userspace
[14:59:41] [PASSED] Kernel buffer object
[14:59:41] [PASSED] Shared buffer object
[14:59:41] ============ [PASSED] ttm_bo_validate_multihop =============
[14:59:41] ========== ttm_bo_validate_no_placement_signaled ==========
[14:59:41] [PASSED] Buffer object in system domain, no page vector
[14:59:41] [PASSED] Buffer object in system domain with an existing page vector
[14:59:41] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[14:59:41] ======== ttm_bo_validate_no_placement_not_signaled ========
[14:59:41] [PASSED] Buffer object for userspace
[14:59:41] [PASSED] Kernel buffer object
[14:59:41] [PASSED] Shared buffer object
[14:59:41] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[14:59:41] [PASSED] ttm_bo_validate_move_fence_signaled
[14:59:41] ========= ttm_bo_validate_move_fence_not_signaled =========
[14:59:41] [PASSED] Waits for GPU
[14:59:41] [PASSED] Tries to lock straight away
[14:59:41] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[14:59:41] [PASSED] ttm_bo_validate_swapout
[14:59:41] [PASSED] ttm_bo_validate_happy_evict
[14:59:41] [PASSED] ttm_bo_validate_all_pinned_evict
[14:59:41] [PASSED] ttm_bo_validate_allowed_only_evict
[14:59:41] [PASSED] ttm_bo_validate_deleted_evict
[14:59:41] [PASSED] ttm_bo_validate_busy_domain_evict
[14:59:41] [PASSED] ttm_bo_validate_evict_gutting
[14:59:41] [PASSED] ttm_bo_validate_recrusive_evict
[14:59:41] ================= [PASSED] ttm_bo_validate =================
[14:59:41] ============================================================
[14:59:41] Testing complete. Ran 102 tests: passed: 102
[14:59:41] Elapsed time: 11.277s total, 1.771s configuring, 9.291s building, 0.176s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915: Work harder to enable VRR based refresh rate changes on eDP
2026-06-12 14:41 [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (5 preceding siblings ...)
2026-06-12 14:59 ` ✓ CI.KUnit: success " Patchwork
@ 2026-06-12 15:54 ` Patchwork
2026-06-13 7:16 ` ✓ Xe.CI.FULL: " Patchwork
2026-06-15 9:06 ` [PATCH 0/4] " Michel Dänzer
8 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-06-12 15:54 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1030 bytes --]
== Series Details ==
Series: drm/i915: Work harder to enable VRR based refresh rate changes on eDP
URL : https://patchwork.freedesktop.org/series/168442/
State : success
== Summary ==
CI Bug Log - changes from xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129_BAT -> xe-pw-168442v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8960 -> IGT_8961
* Linux: xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129 -> xe-pw-168442v1
IGT_8960: 88bd725754990332efcd158b0429f6ac7fb63862 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8961: 8961
xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129: 8372c3177e62bca48fdca142601d3d3804ff3129
xe-pw-168442v1: 168442v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/index.html
[-- Attachment #2: Type: text/html, Size: 1592 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ Xe.CI.FULL: success for drm/i915: Work harder to enable VRR based refresh rate changes on eDP
2026-06-12 14:41 [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (6 preceding siblings ...)
2026-06-12 15:54 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-13 7:16 ` Patchwork
2026-06-15 9:06 ` [PATCH 0/4] " Michel Dänzer
8 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-06-13 7:16 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 37677 bytes --]
== Series Details ==
Series: drm/i915: Work harder to enable VRR based refresh rate changes on eDP
URL : https://patchwork.freedesktop.org/series/168442/
State : success
== Summary ==
CI Bug Log - changes from xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129_FULL -> xe-pw-168442v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-168442v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@intel_hwmon@hwmon-write:
- shard-bmg: [PASS][1] -> [FAIL][2] ([Intel XE#7445])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-bmg-10/igt@intel_hwmon@hwmon-write.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-4/igt@intel_hwmon@hwmon-write.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#2327]) +2 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-9/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip:
- shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#7059] / [Intel XE#7085])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-3/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#7059] / [Intel XE#7085])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-10/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#1124])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180.html
- shard-lnl: NOTRUN -> [SKIP][7] ([Intel XE#1124])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_bw@linear-tiling-2-displays-target-2160x1440p:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#367])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-7/igt@kms_bw@linear-tiling-2-displays-target-2160x1440p.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-b-dp-2:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2652]) +8 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-9/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-b-dp-2.html
* igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2887]) +5 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-5/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs.html
- shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#2887]) +2 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-3/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs.html
* igt@kms_chamelium_color@ctm-negative:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#2325] / [Intel XE#7358])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-7/igt@kms_chamelium_color@ctm-negative.html
* igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2252]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-4/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
* igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe:
- shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#373])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-8/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2390] / [Intel XE#6974])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-6/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_cursor_crc@cursor-random-32x32:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2320]) +2 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-9/igt@kms_cursor_crc@cursor-random-32x32.html
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#1424]) +1 other test skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-7/igt@kms_cursor_crc@cursor-random-32x32.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
- shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#309] / [Intel XE#7343]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-7/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-lnl: NOTRUN -> [SKIP][19] ([Intel XE#323] / [Intel XE#6035])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2286] / [Intel XE#6035])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#4354] / [Intel XE#7386])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-7/igt@kms_dp_link_training@uhbr-mst.html
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#4354] / [Intel XE#7386])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-9/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#8265])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-2/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
- shard-lnl: NOTRUN -> [SKIP][24] ([Intel XE#1421])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-3/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: NOTRUN -> [FAIL][25] ([Intel XE#301]) +1 other test fail
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [PASS][26] -> [FAIL][27] ([Intel XE#301]) +1 other test fail
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#7178] / [Intel XE#7351]) +2 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
- shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
* igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-indfb-pgflip-blt:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#6312]) +2 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-2/igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][32] ([Intel XE#7905]) +7 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-4/igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#4141]) +8 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt:
- shard-lnl: NOTRUN -> [SKIP][34] ([Intel XE#656] / [Intel XE#7905]) +9 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][35] ([Intel XE#6312] / [Intel XE#651]) +1 other test skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-5/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#7061] / [Intel XE#7356])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-indfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#2311]) +25 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#7399])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y.html
- shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#7399])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y.html
* igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][40] ([Intel XE#7061])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-5/igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-indfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#7865]) +2 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-4/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#7061]) +2 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-8/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psrhdr-rgb565-draw-render:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#2313]) +29 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-1/igt@kms_frontbuffer_tracking@psrhdr-rgb565-draw-render.html
* igt@kms_hdr@static-swap:
- shard-lnl: NOTRUN -> [SKIP][44] ([Intel XE#1503] / [Intel XE#7915])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-8/igt@kms_hdr@static-swap.html
* igt@kms_hdr@static-swap@pipe-a-edp-1-xrgb2101010:
- shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#7915]) +1 other test skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-8/igt@kms_hdr@static-swap@pipe-a-edp-1-xrgb2101010.html
* igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#7915]) +1 other test skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-6/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [PASS][47] -> [SKIP][48] ([Intel XE#7915]) +1 other test skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-bmg-9/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-6/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#6911] / [Intel XE#7378])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-7/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#4090] / [Intel XE#7443])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-4/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
- shard-lnl: NOTRUN -> [SKIP][51] ([Intel XE#7173] / [Intel XE#7294])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-5/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#7283])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-4/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html
- shard-lnl: NOTRUN -> [SKIP][53] ([Intel XE#7283])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-5/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html
* igt@kms_pm_backlight@bad-brightness:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-6/igt@kms_pm_backlight@bad-brightness.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#2938] / [Intel XE#7376] / [Intel XE#7760])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-3/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_dc@dc6-psr:
- shard-lnl: [PASS][56] -> [FAIL][57] ([Intel XE#7340])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-lnl-1/igt@kms_pm_dc@dc6-psr.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-1/igt@kms_pm_dc@dc6-psr.html
* igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#1489]) +1 other test skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-1/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr@fbc-pr-primary-page-flip:
- shard-lnl: NOTRUN -> [SKIP][59] ([Intel XE#1406])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-8/igt@kms_psr@fbc-pr-primary-page-flip.html
* igt@kms_psr@psr2-primary-render:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#2234])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-4/igt@kms_psr@psr2-primary-render.html
* igt@kms_psr@psr2-suspend:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#2234] / [Intel XE#2850]) +5 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-7/igt@kms_psr@psr2-suspend.html
* igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
- shard-lnl: NOTRUN -> [SKIP][62] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-6/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
- shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#3904] / [Intel XE#7342]) +2 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
* igt@xe_eudebug_online@pagefault-one-of-many:
- shard-lnl: NOTRUN -> [SKIP][64] ([Intel XE#7636]) +2 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-5/igt@xe_eudebug_online@pagefault-one-of-many.html
* igt@xe_eudebug_online@single-step-one:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#7636]) +5 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-10/igt@xe_eudebug_online@single-step-one.html
* igt@xe_evict@evict-beng-mixed-threads-large-multi-vm:
- shard-lnl: NOTRUN -> [SKIP][66] ([Intel XE#6540] / [Intel XE#688]) +1 other test skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-2/igt@xe_evict@evict-beng-mixed-threads-large-multi-vm.html
* igt@xe_evict@evict-small-multi-queue-cm:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#7140]) +1 other test skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-8/igt@xe_evict@evict-small-multi-queue-cm.html
* igt@xe_exec_balancer@twice-cm-virtual-userptr:
- shard-lnl: NOTRUN -> [SKIP][68] ([Intel XE#7482]) +4 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-5/igt@xe_exec_balancer@twice-cm-virtual-userptr.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr:
- shard-lnl: NOTRUN -> [SKIP][69] ([Intel XE#1392])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-2/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind:
- shard-bmg: NOTRUN -> [SKIP][70] ([Intel XE#2322] / [Intel XE#7372]) +4 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-7/igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind.html
* igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate-race-prefetch:
- shard-bmg: NOTRUN -> [SKIP][71] ([Intel XE#7136]) +6 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-5/igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate-race-prefetch.html
- shard-lnl: NOTRUN -> [SKIP][72] ([Intel XE#7136]) +2 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-3/igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate-race-prefetch.html
* igt@xe_exec_multi_queue@max-queues-preempt-mode-close-fd-smem:
- shard-bmg: NOTRUN -> [SKIP][73] ([Intel XE#6874]) +11 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-10/igt@xe_exec_multi_queue@max-queues-preempt-mode-close-fd-smem.html
* igt@xe_exec_multi_queue@one-queue-preempt-mode-dyn-priority-smem:
- shard-lnl: NOTRUN -> [SKIP][74] ([Intel XE#6874]) +5 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-4/igt@xe_exec_multi_queue@one-queue-preempt-mode-dyn-priority-smem.html
* igt@xe_exec_reset@cm-multi-queue-gt-reset:
- shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#7866]) +1 other test skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-6/igt@xe_exec_reset@cm-multi-queue-gt-reset.html
- shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#7866]) +1 other test skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-3/igt@xe_exec_reset@cm-multi-queue-gt-reset.html
* igt@xe_exec_system_allocator@many-malloc-busy-nomemset:
- shard-lnl: [PASS][77] -> [ABORT][78] ([Intel XE#8007])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-lnl-2/igt@xe_exec_system_allocator@many-malloc-busy-nomemset.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-6/igt@xe_exec_system_allocator@many-malloc-busy-nomemset.html
* igt@xe_exec_threads@threads-multi-queue-fd-rebind:
- shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#7138]) +2 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-fd-rebind.html
* igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr:
- shard-lnl: NOTRUN -> [SKIP][80] ([Intel XE#7138])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-1/igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr.html
* igt@xe_multigpu_svm@mgpu-latency-copy-basic:
- shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#6964]) +1 other test skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-3/igt@xe_multigpu_svm@mgpu-latency-copy-basic.html
* igt@xe_page_reclaim@invalid-1g:
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#7793]) +1 other test skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-8/igt@xe_page_reclaim@invalid-1g.html
- shard-lnl: NOTRUN -> [SKIP][83] ([Intel XE#7793])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-2/igt@xe_page_reclaim@invalid-1g.html
* igt@xe_pm@d3cold-basic:
- shard-bmg: NOTRUN -> [SKIP][84] ([Intel XE#2284] / [Intel XE#7370]) +1 other test skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-6/igt@xe_pm@d3cold-basic.html
* igt@xe_pm@d3cold-basic-exec:
- shard-lnl: NOTRUN -> [SKIP][85] ([Intel XE#2284] / [Intel XE#366] / [Intel XE#7370])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-6/igt@xe_pm@d3cold-basic-exec.html
* igt@xe_query@multigpu-query-gt-list:
- shard-lnl: NOTRUN -> [SKIP][86] ([Intel XE#944])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-3/igt@xe_query@multigpu-query-gt-list.html
* igt@xe_query@multigpu-query-mem-usage:
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#944])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-2/igt@xe_query@multigpu-query-mem-usage.html
* igt@xe_sriov_auto_provisioning@fair-allocation:
- shard-lnl: NOTRUN -> [SKIP][88] ([Intel XE#4130] / [Intel XE#7366])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-5/igt@xe_sriov_auto_provisioning@fair-allocation.html
* igt@xe_sriov_flr@flr-vfs-parallel:
- shard-bmg: [PASS][89] -> [FAIL][90] ([Intel XE#6569])
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-bmg-10/igt@xe_sriov_flr@flr-vfs-parallel.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-2/igt@xe_sriov_flr@flr-vfs-parallel.html
* igt@xe_sriov_scheduling@equal-throughput-normal-priority:
- shard-lnl: NOTRUN -> [SKIP][91] ([Intel XE#8339]) +4 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-5/igt@xe_sriov_scheduling@equal-throughput-normal-priority.html
#### Possible fixes ####
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [FAIL][92] ([Intel XE#7571]) -> [PASS][93]
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible@ab-dp2-hdmi-a3:
- shard-bmg: [FAIL][94] ([Intel XE#5408] / [Intel XE#6266]) -> [PASS][95] +1 other test pass
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-bmg-10/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible@ab-dp2-hdmi-a3.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-8/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible@ab-dp2-hdmi-a3.html
* igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-2-xrgb16161616f:
- shard-bmg: [INCOMPLETE][96] ([Intel XE#8337]) -> [PASS][97] +1 other test pass
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-bmg-8/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-2-xrgb16161616f.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-2/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-2-xrgb16161616f.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][98] ([Intel XE#1503]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-bmg-9/igt@kms_hdr@invalid-hdr.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-7/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [SKIP][100] ([Intel XE#7922]) -> [PASS][101] +1 other test pass
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-bmg-9/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-7/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_pm_dc@dc5-psr:
- shard-lnl: [FAIL][102] ([Intel XE#7340]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-lnl-7/igt@kms_pm_dc@dc5-psr.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-7/igt@kms_pm_dc@dc5-psr.html
* igt@kms_setmode@basic:
- shard-lnl: [FAIL][104] ([Intel XE#6361]) -> [PASS][105] +1 other test pass
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-lnl-2/igt@kms_setmode@basic.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-1/igt@kms_setmode@basic.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-huge-nomemset:
- shard-bmg: [FAIL][106] ([Intel XE#8058]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-bmg-8/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-huge-nomemset.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-9/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-huge-nomemset.html
* igt@xe_pmu@gt-frequency:
- shard-lnl: [FAIL][108] ([Intel XE#8012]) -> [PASS][109] +1 other test pass
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-lnl-6/igt@xe_pmu@gt-frequency.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-8/igt@xe_pmu@gt-frequency.html
* igt@xe_sriov_flr@flr-twice:
- shard-bmg: [FAIL][110] ([Intel XE#7992]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-bmg-2/igt@xe_sriov_flr@flr-twice.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-6/igt@xe_sriov_flr@flr-twice.html
#### Warnings ####
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][112] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935]) -> [SKIP][113] ([Intel XE#309] / [Intel XE#7343])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-7/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render:
- shard-lnl: [ABORT][114] ([Intel XE#8007]) -> [SKIP][115] ([Intel XE#7061])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-lnl-5/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-lnl-4/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][116] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][117] ([Intel XE#2509] / [Intel XE#7437])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#5408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5408
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
[Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
[Intel XE#6927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6927
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
[Intel XE#7173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7173
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7294
[Intel XE#7340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7340
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7366
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
[Intel XE#7378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7378
[Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
[Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7443]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7443
[Intel XE#7445]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7445
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
[Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7866]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7866
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
[Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8012
[Intel XE#8058]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8058
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8337]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8337
[Intel XE#8339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8339
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* IGT: IGT_8960 -> IGT_8961
* Linux: xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129 -> xe-pw-168442v1
IGT_8960: 88bd725754990332efcd158b0429f6ac7fb63862 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8961: 8961
xe-5247-8372c3177e62bca48fdca142601d3d3804ff3129: 8372c3177e62bca48fdca142601d3d3804ff3129
xe-pw-168442v1: 168442v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v1/index.html
[-- Attachment #2: Type: text/html, Size: 42974 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH 1/4] drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
2026-06-12 14:42 ` [PATCH 1/4] drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR Ville Syrjala
@ 2026-06-13 14:19 ` Kandpal, Suraj
0 siblings, 0 replies; 18+ messages in thread
From: Kandpal, Suraj @ 2026-06-13 14:19 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org
> Subject: [PATCH 1/4] drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a new mode matching flag DRM_MODE_MATCH_TIMINGS_VRR. This is
> identical to DRM_MODE_MATCH_TIMINGS, except it requires the vsync pulse
> to remain anchored to the end of vtotal, as opposed to the start of the frame.
> VRR capable hardware can therefore treat matching modes as just variants of
> the same mode with a different vblank lengths.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/drm_modes.c | 23 +++++++++++++++++++++++
> include/drm/drm_modes.h | 1 +
> 2 files changed, 24 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
> index 3f8e025fd6d9..e1eed13a8e94 100644
> --- a/drivers/gpu/drm/drm_modes.c
> +++ b/drivers/gpu/drm/drm_modes.c
> @@ -1469,6 +1469,25 @@ struct drm_display_mode
> *drm_mode_duplicate(struct drm_device *dev, }
> EXPORT_SYMBOL(drm_mode_duplicate);
>
> +static bool drm_mode_match_timings_vrr(const struct drm_display_mode
Nit: drm_mode_match_vrr_timings perhaps
But with or without the changes LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> *mode1,
> + const struct drm_display_mode *mode2) {
> + int mode1_vsync_start_offset = mode1->vtotal - mode1->vsync_start;
> + int mode1_vsync_end_offset = mode1->vtotal - mode1->vsync_end;
> + int mode2_vsync_start_offset = mode2->vtotal - mode2->vsync_start;
> + int mode2_vsync_end_offset = mode2->vtotal - mode2->vsync_end;
> +
> + return mode1->hdisplay == mode2->hdisplay &&
> + mode1->hsync_start == mode2->hsync_start &&
> + mode1->hsync_end == mode2->hsync_end &&
> + mode1->htotal == mode2->htotal &&
> + mode1->hskew == mode2->hskew &&
> + mode1->vdisplay == mode2->vdisplay &&
> + mode1_vsync_start_offset == mode2_vsync_start_offset &&
> + mode1_vsync_end_offset == mode2_vsync_end_offset &&
> + mode1->vscan == mode2->vscan;
> +}
> +
> static bool drm_mode_match_timings(const struct drm_display_mode
> *mode1,
> const struct drm_display_mode *mode2) {
> @@ -1538,6 +1557,10 @@ bool drm_mode_match(const struct
> drm_display_mode *mode1,
> if (!mode1 || !mode2)
> return false;
>
> + if (match_flags & DRM_MODE_MATCH_TIMINGS_VRR &&
> + !drm_mode_match_timings_vrr(mode1, mode2))
> + return false;
> +
> if (match_flags & DRM_MODE_MATCH_TIMINGS &&
> !drm_mode_match_timings(mode1, mode2))
> return false;
> diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h index
> b9bb92e4b029..6e3eccc3c349 100644
> --- a/include/drm/drm_modes.h
> +++ b/include/drm/drm_modes.h
> @@ -193,6 +193,7 @@ enum drm_mode_status { #define
> DRM_MODE_MATCH_FLAGS (1 << 2) #define DRM_MODE_MATCH_3D_FLAGS
> (1 << 3) #define DRM_MODE_MATCH_ASPECT_RATIO (1 << 4)
> +#define DRM_MODE_MATCH_TIMINGS_VRR (1 << 5)
>
> /**
> * struct drm_display_mode - DRM kernel-internal display mode structure
> --
> 2.53.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH 2/4] drm/i915: Pass the full atomic state to .compute_config()
2026-06-12 14:42 ` [PATCH 2/4] drm/i915: Pass the full atomic state to .compute_config() Ville Syrjala
@ 2026-06-13 14:23 ` Kandpal, Suraj
0 siblings, 0 replies; 18+ messages in thread
From: Kandpal, Suraj @ 2026-06-13 14:23 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org
> Subject: [PATCH 2/4] drm/i915: Pass the full atomic state to .compute_config()
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Upcoming changes will need access to the full atomic state in
> .compute_config(). Pass it in from the top.
>
> Couple of the implementations already dug this out via the
> crtc_state/conn_state->state pointer, but we don't want to use that anywhere
> because it's a bit of a footgun by only being valid during the early stages of the
> commit.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 5 +++--
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 4 ++--
> drivers/gpu/drm/i915/display/icl_dsi.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_crt.c | 9 ++++++---
> drivers/gpu/drm/i915/display/intel_ddi.c | 8 +++++---
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++++--
> drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_dp.h | 3 ++-
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 8 ++++----
> drivers/gpu/drm/i915/display/intel_dvo.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_lvds.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_sdvo.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_tv.c | 5 ++---
> drivers/gpu/drm/i915/display/vlv_dsi.c | 3 ++-
> 15 files changed, 42 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index d211e6c49e0a..b867443ff227 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -1222,7 +1222,8 @@ static bool ilk_digital_port_connected(struct
> intel_encoder *encoder)
> return intel_de_read(display, DEISR) & bit; }
>
> -static int g4x_dp_compute_config(struct intel_encoder *encoder,
> +static int g4x_dp_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> struct drm_connector_state *conn_state) {
> @@ -1232,7 +1233,7 @@ static int g4x_dp_compute_config(struct
> intel_encoder *encoder,
> if (HAS_PCH_SPLIT(display) && encoder->port != PORT_A)
> crtc_state->has_pch_encoder = true;
>
> - ret = intel_dp_compute_config(encoder, crtc_state, conn_state);
> + ret = intel_dp_compute_config(state, encoder, crtc_state, conn_state);
> if (ret)
> return ret;
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index acb36cab999c..4c33aa1d1d32 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -126,12 +126,12 @@ static bool g4x_compute_has_hdmi_sink(struct
> intel_atomic_state *state,
> return false;
> }
>
> -static int g4x_hdmi_compute_config(struct intel_encoder *encoder,
> +static int g4x_hdmi_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> struct drm_connector_state *conn_state) {
> struct intel_display *display = to_intel_display(encoder);
> - struct intel_atomic_state *state = to_intel_atomic_state(crtc_state-
> >uapi.state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>
> if (HAS_PCH_SPLIT(display))
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index a549f1fac810..59184f2f805c 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1657,7 +1657,8 @@ static int gen11_dsi_dsc_compute_config(struct
> intel_encoder *encoder,
> return 0;
> }
>
> -static int gen11_dsi_compute_config(struct intel_encoder *encoder,
> +static int gen11_dsi_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state) {
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
> b/drivers/gpu/drm/i915/display/intel_crt.c
> index 243e332bef57..5b8968197fbc 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -397,7 +397,8 @@ intel_crt_mode_valid(struct drm_connector
> *connector,
> return MODE_OK;
> }
>
> -static int intel_crt_compute_config(struct intel_encoder *encoder,
> +static int intel_crt_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> struct drm_connector_state *conn_state) {
> @@ -413,7 +414,8 @@ static int intel_crt_compute_config(struct intel_encoder
> *encoder,
> return 0;
> }
>
> -static int pch_crt_compute_config(struct intel_encoder *encoder,
> +static int pch_crt_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> struct drm_connector_state *conn_state) {
> @@ -432,7 +434,8 @@ static int pch_crt_compute_config(struct intel_encoder
> *encoder,
> return 0;
> }
>
> -static int hsw_crt_compute_config(struct intel_encoder *encoder,
> +static int hsw_crt_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> struct drm_connector_state *conn_state) {
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 2684e33b602d..91cac4e1d94a 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4480,7 +4480,8 @@ intel_ddi_compute_output_type(struct
> intel_encoder *encoder,
> }
> }
>
> -static int intel_ddi_compute_config(struct intel_encoder *encoder,
> +static int intel_ddi_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state) {
> @@ -4498,7 +4499,7 @@ static int intel_ddi_compute_config(struct
> intel_encoder *encoder,
>
> ret = intel_hdmi_compute_config(encoder, pipe_config,
> conn_state);
> } else {
> - ret = intel_dp_compute_config(encoder, pipe_config,
> conn_state);
> + ret = intel_dp_compute_config(state, encoder, pipe_config,
> +conn_state);
> }
>
> if (ret)
> @@ -4603,7 +4604,8 @@ intel_ddi_port_sync_transcoders(const struct
> intel_crtc_state *ref_crtc_state,
> return transcoders;
> }
>
> -static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
> +static int intel_ddi_compute_config_late(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> struct drm_connector_state
> *conn_state) { diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e2e4b00a8fa9..1db1c3ea0873 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4793,7 +4793,7 @@ intel_modeset_pipe_config(struct intel_atomic_state
> *state,
> if (connector_state->crtc != &crtc->base)
> continue;
>
> - ret = encoder->compute_config(encoder, crtc_state,
> + ret = encoder->compute_config(state, encoder, crtc_state,
> connector_state);
> if (ret == -EDEADLK)
> return ret;
> @@ -4853,7 +4853,7 @@ intel_modeset_pipe_config_late(struct
> intel_atomic_state *state,
> !encoder->compute_config_late)
> continue;
>
> - ret = encoder->compute_config_late(encoder, crtc_state,
> + ret = encoder->compute_config_late(state, encoder, crtc_state,
> conn_state);
> if (ret)
> return ret;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index aa4772a1c208..beaa89afb3ff 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -178,10 +178,12 @@ struct intel_encoder {
> enum intel_output_type (*compute_output_type)(struct
> intel_encoder *,
> struct intel_crtc_state *,
> struct
> drm_connector_state *);
> - int (*compute_config)(struct intel_encoder *,
> + int (*compute_config)(struct intel_atomic_state *,
> + struct intel_encoder *,
> struct intel_crtc_state *,
> struct drm_connector_state *);
> - int (*compute_config_late)(struct intel_encoder *,
> + int (*compute_config_late)(struct intel_atomic_state *,
> + struct intel_encoder *,
> struct intel_crtc_state *,
> struct drm_connector_state *);
> void (*pre_pll_enable)(struct intel_atomic_state *, diff --git
> a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 3569e61e7fee..b9324b590ee9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3627,12 +3627,12 @@ int intel_dp_compute_min_hblank(struct
> intel_crtc_state *crtc_state, }
>
> int
> -intel_dp_compute_config(struct intel_encoder *encoder,
> +intel_dp_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state) {
> struct intel_display *display = to_intel_display(encoder);
> - struct intel_atomic_state *state = to_intel_atomic_state(conn_state-
> >state);
> struct drm_display_mode *adjusted_mode = &pipe_config-
> >hw.adjusted_mode;
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> struct intel_connector *connector = intel_dp->attached_connector; diff
> --git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index 92ce04852326..b233739b89ce 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -71,7 +71,8 @@ void intel_dp_sink_disable_decompression(struct
> intel_atomic_state *state, void intel_dp_encoder_suspend(struct
> intel_encoder *intel_encoder); void intel_dp_encoder_shutdown(struct
> intel_encoder *intel_encoder); void intel_dp_encoder_flush_work(struct
> drm_encoder *encoder); -int intel_dp_compute_config(struct intel_encoder
> *encoder,
> +int intel_dp_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state); bool
> intel_dp_needs_8b10b_fec(const struct intel_crtc_state *crtc_state, diff --git
> a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index bcdc50491347..a2f9440ab84a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -697,12 +697,12 @@ static int
> mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
> return 0;
> }
>
> -static int mst_stream_compute_config(struct intel_encoder *encoder,
> +static int mst_stream_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state) {
> struct intel_display *display = to_intel_display(encoder);
> - struct intel_atomic_state *state = to_intel_atomic_state(conn_state-
> >state);
> struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> struct intel_dp *intel_dp = to_primary_dp(encoder);
> struct intel_connector *connector =
> @@ -921,11 +921,11 @@ int intel_dp_mst_atomic_check_link(struct
> intel_atomic_state *state,
> return 0;
> }
>
> -static int mst_stream_compute_config_late(struct intel_encoder *encoder,
> +static int mst_stream_compute_config_late(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> struct drm_connector_state
> *conn_state) {
> - struct intel_atomic_state *state = to_intel_atomic_state(conn_state-
> >state);
> struct intel_dp *intel_dp = to_primary_dp(encoder);
>
> /* lowest numbered transcoder will be designated master */ diff --git
> a/drivers/gpu/drm/i915/display/intel_dvo.c
> b/drivers/gpu/drm/i915/display/intel_dvo.c
> index dd1a995c2979..181722c41b96 100644
> --- a/drivers/gpu/drm/i915/display/intel_dvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_dvo.c
> @@ -242,7 +242,8 @@ intel_dvo_mode_valid(struct drm_connector
> *_connector,
> return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
> }
>
> -static int intel_dvo_compute_config(struct intel_encoder *encoder,
> +static int intel_dvo_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state) {
> diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c
> b/drivers/gpu/drm/i915/display/intel_lvds.c
> index c8098104d853..30e4809b36ac 100644
> --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> @@ -413,7 +413,8 @@ intel_lvds_mode_valid(struct drm_connector
> *_connector,
> return MODE_OK;
> }
>
> -static int intel_lvds_compute_config(struct intel_encoder *encoder,
> +static int intel_lvds_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> struct drm_connector_state *conn_state) {
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
> b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index d83d350959d8..6b73c9a5ec7f 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -1354,7 +1354,8 @@ static bool intel_sdvo_has_audio(struct
> intel_encoder *encoder,
> return intel_conn_state->force_audio == HDMI_AUDIO_ON; }
>
> -static int intel_sdvo_compute_config(struct intel_encoder *encoder,
> +static int intel_sdvo_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state) {
> diff --git a/drivers/gpu/drm/i915/display/intel_tv.c
> b/drivers/gpu/drm/i915/display/intel_tv.c
> index 0a926c6f25f4..840e1dcdc2d0 100644
> --- a/drivers/gpu/drm/i915/display/intel_tv.c
> +++ b/drivers/gpu/drm/i915/display/intel_tv.c
> @@ -1187,13 +1187,12 @@ static bool intel_tv_vert_scaling(const struct
> drm_display_mode *tv_mode, }
>
> static int
> -intel_tv_compute_config(struct intel_encoder *encoder,
> +intel_tv_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state) {
> struct intel_display *display = to_intel_display(encoder);
> - struct intel_atomic_state *state =
> - to_intel_atomic_state(pipe_config->uapi.state);
> struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> struct intel_tv_connector_state *tv_conn_state =
> to_intel_tv_connector_state(conn_state);
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c
> b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index 877eab75f19a..b89318f5bdc2 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -266,7 +266,8 @@ static void band_gap_reset(struct intel_display
> *display)
> vlv_flisdsi_put(display);
> }
>
> -static int intel_dsi_compute_config(struct intel_encoder *encoder,
> +static int intel_dsi_compute_config(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state) {
> --
> 2.53.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH 3/4] drm/i915/panel: Adjust intel_panel_compute_config() calling convention
2026-06-12 14:42 ` [PATCH 3/4] drm/i915/panel: Adjust intel_panel_compute_config() calling convention Ville Syrjala
@ 2026-06-13 14:25 ` Kandpal, Suraj
0 siblings, 0 replies; 18+ messages in thread
From: Kandpal, Suraj @ 2026-06-13 14:25 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org
> Subject: [PATCH 3/4] drm/i915/panel: Adjust intel_panel_compute_config()
> calling convention
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Pass the full atomic state to intel_panel_compute_config(). We'll need this for
> some upcoming VRR fastset tricks. And to accompany full state we'll also need
> the crtc (or its state) as well.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dvo.c | 2 +-
> drivers/gpu/drm/i915/display/intel_lvds.c | 2 +-
> drivers/gpu/drm/i915/display/intel_panel.c | 6 ++++--
> drivers/gpu/drm/i915/display/intel_panel.h | 6 ++++--
> drivers/gpu/drm/i915/display/intel_sdvo.c | 4 ++--
> drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +-
> 8 files changed, 15 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 59184f2f805c..ea0cdb7822f3 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1672,7 +1672,7 @@ static int gen11_dsi_compute_config(struct
> intel_atomic_state *state,
> pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
>
> - ret = intel_panel_compute_config(intel_connector, adjusted_mode);
> + ret = intel_panel_compute_config(state, pipe_config, intel_connector);
> if (ret)
> return ret;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index b9324b590ee9..da8a94821c11 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3639,7 +3639,7 @@ intel_dp_compute_config(struct intel_atomic_state
> *state,
> int ret = 0, link_bpp_x16;
>
> if (intel_dp_is_edp(intel_dp)) {
> - ret = intel_panel_compute_config(connector, adjusted_mode);
> + ret = intel_panel_compute_config(state, pipe_config,
> connector);
> if (ret)
> return ret;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c
> b/drivers/gpu/drm/i915/display/intel_dvo.c
> index 181722c41b96..f157699a7c4c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_dvo.c
> @@ -257,7 +257,7 @@ static int intel_dvo_compute_config(struct
> intel_atomic_state *state,
> * with the panel scaling set up to source from the H/VDisplay
> * of the original mode.
> */
> - ret = intel_panel_compute_config(connector, adjusted_mode);
> + ret = intel_panel_compute_config(state, pipe_config, connector);
> if (ret)
> return ret;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c
> b/drivers/gpu/drm/i915/display/intel_lvds.c
> index 30e4809b36ac..872753478cf2 100644
> --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> @@ -460,7 +460,7 @@ static int intel_lvds_compute_config(struct
> intel_atomic_state *state,
> * with the panel scaling set up to source from the H/VDisplay
> * of the original mode.
> */
> - ret = intel_panel_compute_config(connector, adjusted_mode);
> + ret = intel_panel_compute_config(state, crtc_state, connector);
> if (ret)
> return ret;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
> b/drivers/gpu/drm/i915/display/intel_panel.c
> index 81fb349ece5f..af59fc946fcb 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -197,9 +197,11 @@ enum drrs_type intel_panel_drrs_type(struct
> intel_connector *connector)
> return connector->panel.vbt.drrs_type; }
>
> -int intel_panel_compute_config(struct intel_connector *connector,
> - struct drm_display_mode *adjusted_mode)
> +int intel_panel_compute_config(struct intel_atomic_state *state,
> + struct intel_crtc_state *crtc_state,
> + struct intel_connector *connector)
> {
> + struct drm_display_mode *adjusted_mode =
> +&crtc_state->hw.adjusted_mode;
> const struct drm_display_mode *fixed_mode =
> intel_panel_fixed_mode(connector, adjusted_mode);
> int vrefresh, fixed_mode_vrefresh;
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.h
> b/drivers/gpu/drm/i915/display/intel_panel.h
> index 23bd227826c9..30c6078ecb1b 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.h
> +++ b/drivers/gpu/drm/i915/display/intel_panel.h
> @@ -14,6 +14,7 @@ struct drm_connector;
> struct drm_connector_state;
> struct drm_display_mode;
> struct drm_edid;
> +struct intel_atomic_state;
> struct intel_connector;
> struct intel_crtc_state;
> struct intel_display;
> @@ -45,8 +46,9 @@ enum drm_mode_status
> intel_panel_mode_valid(struct intel_connector *connector,
> const struct drm_display_mode *mode,
> int *target_clock);
> -int intel_panel_compute_config(struct intel_connector *connector,
> - struct drm_display_mode *adjusted_mode);
> +int intel_panel_compute_config(struct intel_atomic_state *state,
> + struct intel_crtc_state *crtc_state,
> + struct intel_connector *connector);
> void intel_panel_add_edid_fixed_modes(struct intel_connector *connector,
> bool use_alt_fixed_modes);
> void intel_panel_add_vbt_lfp_fixed_mode(struct intel_connector *connector);
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
> b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 6b73c9a5ec7f..3075ef04df56 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -1399,8 +1399,8 @@ static int intel_sdvo_compute_config(struct
> intel_atomic_state *state,
> const struct drm_display_mode *fixed_mode;
> int ret;
>
> - ret = intel_panel_compute_config(&intel_sdvo_connector-
> >base,
> - adjusted_mode);
> + ret = intel_panel_compute_config(state, pipe_config,
> + &intel_sdvo_connector-
> >base);
> if (ret)
> return ret;
>
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c
> b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index b89318f5bdc2..8829f365592e 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -281,7 +281,7 @@ static int intel_dsi_compute_config(struct
> intel_atomic_state *state,
> pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
>
> - ret = intel_panel_compute_config(intel_connector, adjusted_mode);
> + ret = intel_panel_compute_config(state, pipe_config, intel_connector);
> if (ret)
> return ret;
>
> --
> 2.53.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/4] drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset
2026-06-12 14:42 ` [PATCH 4/4] drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset Ville Syrjala
@ 2026-06-15 5:17 ` Nautiyal, Ankit K
0 siblings, 0 replies; 18+ messages in thread
From: Nautiyal, Ankit K @ 2026-06-15 5:17 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, dri-devel
On 6/12/2026 8:12 PM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Adjust the panel fixed mode selection algorithm to only consider
> fixed modes that are "VRR compatible" with the old fixed mode
> when userspace doesn't want to allow full modesets. This will
> allow a VRR based refresh rate changes (ie. just a change in
> the vblank length) via the fastset path.
>
> When full modesets are allowed, we still use the original algorithm
> as that may pick a fixed mode with a more optimal dotclock, potentially
> leading to reduced power consumption.
>
> This approach works as long as userspace does the initial
> allow_modeset=true commit using the highest refresh rate it will
> want to use. Subsequent commits with allow_modeset=false can then
> switch between lower refresh rates without blinks.
>
> One remaining hurdle we may need to solve is the guardband length.
> Assuming the highest refresh rate vblank is too short for
> intel_vrr_compute_optimized_guardband() the intitial guardband will
> match the highest refresh rate vblank. A subsequent switch to a lower
> refresh rate will then recompute the guardband and select a value
> that is higher (since the vblank will be longer). The mismatch in
> guardband lengths will prevent the fastset. We may either have to
> preserve the original (sub-optimal) guardband,
I think preserving the original (sub-optimal) guardband makes sense for
the seamless case, but we will lose out on enabling some power saving
features like PSR/LOBF for which the sub-otimal guardband would not be
sufficient.
So this really comes down to how we want to interpret the
DRM_MODE_ALLOW_MODESET(state->allow_modeset).
If a lower RR mode is set with allow_modeset = true, then doing a full
modeset sounds fine.
In that case we can recompute the guardband and enable the additional
power saving features (PSR/LOBF) if they are supported.
If the same transition is done without allow_modeset, then we should try
to keep it seamless.
In that case using the sub-optimal guardband to avoid a full modeset
seems like the better choice, even if that means power saving features
may or may not be enabled, despite being supported at the new RR.
So effectively:
with allow_modeset -> recompute and get optimal behavior
without it -> keep things stable, even if sub-optimal
IMO this will make the behavior predictable and lets userspace decide
when it wants to pay the cost to get those benefits.
> or we'll have to
> revisit the idea of changing the guardband without a full modeset.
>
> Note that I'm not 100% happy with this solution because
> intel_panel_fixed_mode() is no longer fully idempotent, but I wasn't
> able to come up with anything truly better either :/ The simple
> solution would be just to always pick the fixed mode with the highest
> dotclock, but that could lead to increased power consumption even
> when high refresh rates are never used.
>
> Perhaps the proper solution would be to just deprecate this
> idea of taking in random modes for internal panels and then
> cooking up a compatible fixed modes. Life would be easier if
> userspace was required to provide the desired fixed mode directly.
> But in order to do that we'd need to introduce new uapi properties
> to control the pfit aspect of this, and we'd probably need a new
> client cap to select between the old and new userspace behaviour.
> Something to consider in the future...
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_panel.c | 55 ++++++++++++++++++++--
> 1 file changed, 50 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
> index af59fc946fcb..a5fcac1318da 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -82,16 +82,37 @@ static bool is_best_fixed_mode(struct intel_connector *connector,
> abs(drm_mode_vrefresh(best_mode) - vrefresh);
> }
>
> -const struct drm_display_mode *
> -intel_panel_fixed_mode(struct intel_connector *connector,
> - const struct drm_display_mode *mode)
> +static bool is_vrr_compatible(const struct drm_display_mode *mode1,
> + const struct drm_display_mode *mode2)
> +{
> + return drm_mode_match(mode1, mode2,
> + DRM_MODE_MATCH_CLOCK |
> + DRM_MODE_MATCH_TIMINGS_VRR |
> + DRM_MODE_MATCH_FLAGS |
> + DRM_MODE_MATCH_3D_FLAGS);
> +}
> +
> +static const struct drm_display_mode *
> +_intel_panel_fixed_mode(struct intel_connector *connector,
> + const struct drm_display_mode *mode,
> + const struct drm_display_mode *vrr_ref_mode)
> {
> const struct drm_display_mode *fixed_mode, *best_mode = NULL;
> int vrefresh = drm_mode_vrefresh(mode);
>
> + if (vrr_ref_mode &&
> + (!intel_vrr_is_in_range(connector, vrefresh) ||
> + !intel_vrr_is_in_range(connector, drm_mode_vrefresh(vrr_ref_mode))))
> + return NULL;
> +
> list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
> int fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
>
> + if (vrr_ref_mode &&
> + (!intel_vrr_is_in_range(connector, fixed_mode_vrefresh) ||
> + !is_vrr_compatible(fixed_mode, vrr_ref_mode)))
> + continue;
> +
> if (is_best_fixed_mode(connector, vrefresh,
> fixed_mode_vrefresh, best_mode))
This works for all practical purposes, but if we take a hypothetical
case below, it would not work as expected.
2 fixed modes:
with lower RR rate with same clock being first in the modelist:
"3840x2400": 60 1199280 3840 3848 3880 4004 2400 4968 4976 4992
"3840x2400": 120 1199280 3840 3848 3880 4004 2400 2472 2480 2496
vrr range : 120-40Hz
Scenario: 120Hz is set we want to switch to 80 Hz.
iteration 1
fixed mode = 60Hz
best mode = 60 Hz
iteration 2
fixed mode = 120Hz -> 80 is nearer to 60 than to 120 so best mode
remains 60
best mode = 60Hz
We will end up selecting 60Hz mode and try to stretch vtotal based on
this mode.
So perhaps we should make is_best_fixed_mode() such that the order of
modes should not affect our fixed mode selection algorithm.
Note:
1) As I have mentioned, this is hypothetical case which I have cooked up
by changing the modes from a real panel, which has highest mode as
preferred mode and 120 Hz mode being preferred mode.
fixed modes:
"3840x2400": 120 1199280 3840 3848 3880 4004 2400 2472
2480 2496 0x48 0xa
"3840x2400": 60 1199280 3840 3848 3880 4004 2400 4968
4976 4992 0x40 0xa
2) This issue will also not be seen with VRR panels when the clocks are
different but Vtotals are same, the patch should work perfectly in that
case too.
Regards,
Ankit
> best_mode = fixed_mode;
> @@ -100,6 +121,13 @@ intel_panel_fixed_mode(struct intel_connector *connector,
> return best_mode;
> }
>
> +const struct drm_display_mode *
> +intel_panel_fixed_mode(struct intel_connector *connector,
> + const struct drm_display_mode *mode)
> +{
> + return _intel_panel_fixed_mode(connector, mode, NULL);
> +}
> +
> static bool is_alt_drrs_mode(const struct drm_display_mode *mode,
> const struct drm_display_mode *preferred_mode)
> {
> @@ -202,11 +230,28 @@ int intel_panel_compute_config(struct intel_atomic_state *state,
> struct intel_connector *connector)
> {
> struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> - const struct drm_display_mode *fixed_mode =
> - intel_panel_fixed_mode(connector, adjusted_mode);
> + const struct drm_display_mode *fixed_mode = NULL;
> int vrefresh, fixed_mode_vrefresh;
> bool is_vrr;
>
> + /*
> + * Attempt a VRR based refresh rate change if possible
> + * when userspace has forbidden a full modeset.
> + */
> + if (!state->base.allow_modeset) {
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + const struct intel_crtc_state *old_crtc_state =
> + intel_atomic_get_old_crtc_state(state, crtc);
> +
> + if (old_crtc_state->hw.enable &&
> + old_crtc_state->uapi.encoder_mask == crtc_state->uapi.encoder_mask)
> + fixed_mode = _intel_panel_fixed_mode(connector, adjusted_mode,
> + &old_crtc_state->hw.adjusted_mode);
> + }
> +
> + if (!fixed_mode)
> + fixed_mode = intel_panel_fixed_mode(connector, adjusted_mode);
> +
> if (!fixed_mode)
> return 0;
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP
2026-06-12 14:41 [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (7 preceding siblings ...)
2026-06-13 7:16 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-06-15 9:06 ` Michel Dänzer
2026-06-15 9:08 ` Michel Dänzer
8 siblings, 1 reply; 18+ messages in thread
From: Michel Dänzer @ 2026-06-15 9:06 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, dri-devel
On 6/12/26 16:41, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Tweak the eDP fixed mode selection algorithm to allow
> userspace to do refresh rate changes on VRR capable
> eDP panels without full modesets.
>
> Ville Syrjälä (4):
> drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
> drm/i915: Pass the full atomic state to .compute_config()
> drm/i915/panel: Adjust intel_panel_compute_config() calling convention
> drm/i915/panel: Attempt VRR based refresh rate change for
> !allow_modeset
What's the motivation for this approach?
Per https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/5091#note_2784749 , it comes as a bit of a surprise. The approach we've been discussing at display hackfests instead is to add properties for controlling the maximum & minimum refresh rates.
While the approach in this series could be considered an alternative for the maximum, AFAICT it doesn't allow enforcing a minimum refresh rate which differs from the maximum and default minimum.
--
Earthling Michel Dänzer \ GNOME / Xwayland / Mesa developer
https://redhat.com \ Libre software enthusiast
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP
2026-06-15 9:06 ` [PATCH 0/4] " Michel Dänzer
@ 2026-06-15 9:08 ` Michel Dänzer
2026-06-15 13:06 ` Ville Syrjälä
0 siblings, 1 reply; 18+ messages in thread
From: Michel Dänzer @ 2026-06-15 9:08 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, dri-devel, wayland-devel
Adding wayland-devel list for awareness, see also https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/5091.
On 6/15/26 11:06, Michel Dänzer wrote:
> On 6/12/26 16:41, Ville Syrjala wrote:
>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> Tweak the eDP fixed mode selection algorithm to allow
>> userspace to do refresh rate changes on VRR capable
>> eDP panels without full modesets.
>>
>> Ville Syrjälä (4):
>> drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
>> drm/i915: Pass the full atomic state to .compute_config()
>> drm/i915/panel: Adjust intel_panel_compute_config() calling convention
>> drm/i915/panel: Attempt VRR based refresh rate change for
>> !allow_modeset
>
> What's the motivation for this approach?
>
> Per https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/5091#note_2784749 , it comes as a bit of a surprise. The approach we've been discussing at display hackfests instead is to add properties for controlling the maximum & minimum refresh rates.
>
> While the approach in this series could be considered an alternative for the maximum, AFAICT it doesn't allow enforcing a minimum refresh rate which differs from the maximum and default minimum.
>
>
--
Earthling Michel Dänzer \ GNOME / Xwayland / Mesa developer
https://redhat.com \ Libre software enthusiast
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP
2026-06-15 9:08 ` Michel Dänzer
@ 2026-06-15 13:06 ` Ville Syrjälä
2026-06-15 13:30 ` Michel Dänzer
0 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjälä @ 2026-06-15 13:06 UTC (permalink / raw)
To: Michel Dänzer; +Cc: intel-gfx, intel-xe, dri-devel, wayland-devel
On Mon, Jun 15, 2026 at 11:08:59AM +0200, Michel Dänzer wrote:
>
> Adding wayland-devel list for awareness, see also https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/5091.
>
>
> On 6/15/26 11:06, Michel Dänzer wrote:
> > On 6/12/26 16:41, Ville Syrjala wrote:
> >> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>
> >> Tweak the eDP fixed mode selection algorithm to allow
> >> userspace to do refresh rate changes on VRR capable
> >> eDP panels without full modesets.
> >>
> >> Ville Syrjälä (4):
> >> drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
> >> drm/i915: Pass the full atomic state to .compute_config()
> >> drm/i915/panel: Adjust intel_panel_compute_config() calling convention
> >> drm/i915/panel: Attempt VRR based refresh rate change for
> >> !allow_modeset
> >
> > What's the motivation for this approach?
> >
> > Per https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/5091#note_2784749 , it comes as a bit of a surprise. The approach we've been discussing at display hackfests instead is to add properties for controlling the maximum & minimum refresh rates.
This has nothing to do with limiting the VRR range. What we're doing
here is selecting the actual timings to drive an internal laptop panel,
given some random cooked up modeline from userspace.
We pick the actual mode from the set of "fixed modes" (ie. the modes
that the panel/system itself has reported as supported via
EDID/VBT/ACPI/etc.). For non-VRR panels we just pick the fixed mode
whose refresh rate is closest to the user specified mode, and reject
the commit if it's not close enough (<= 1 Hz). For VRR panels we
can avoid that rejection part by adjusting the vtotal appropriately,
assuming the user specified mode's refresh rate is withing the
VRR range of the panel.
> >
> > While the approach in this series could be considered an alternative for the maximum, AFAICT it doesn't allow enforcing a minimum refresh rate which differs from the maximum and default minimum.
The timings specify the absolute max refresh rate you can achieve. So
a separate max VRR refresh rate knob would be mostly redundant, but as
we've discussed before, it could have its uses for the non-integer
vtotal use cases (CMRR in Intel parlance).
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP
2026-06-15 13:06 ` Ville Syrjälä
@ 2026-06-15 13:30 ` Michel Dänzer
2026-06-15 17:00 ` Ville Syrjälä
0 siblings, 1 reply; 18+ messages in thread
From: Michel Dänzer @ 2026-06-15 13:30 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, intel-xe, dri-devel, wayland-devel
On 6/15/26 15:06, Ville Syrjälä wrote:
> On Mon, Jun 15, 2026 at 11:08:59AM +0200, Michel Dänzer wrote:
>> On 6/15/26 11:06, Michel Dänzer wrote:
>>> On 6/12/26 16:41, Ville Syrjala wrote:
>>>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>>
>>>> Tweak the eDP fixed mode selection algorithm to allow
>>>> userspace to do refresh rate changes on VRR capable
>>>> eDP panels without full modesets.
>>>>
>>>> Ville Syrjälä (4):
>>>> drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
>>>> drm/i915: Pass the full atomic state to .compute_config()
>>>> drm/i915/panel: Adjust intel_panel_compute_config() calling convention
>>>> drm/i915/panel: Attempt VRR based refresh rate change for
>>>> !allow_modeset
>>>
>>> What's the motivation for this approach?
>>>
>>> Per https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/5091#note_2784749 , it comes as a bit of a surprise. The approach we've been discussing at display hackfests instead is to add properties for controlling the maximum & minimum refresh rates.
>
> This has nothing to do with limiting the VRR range. What we're doing
> here is selecting the actual timings to drive an internal laptop panel,
> given some random cooked up modeline from userspace.
This use case would be covered by setting the same values for both properties.
(There are other use cases where changing mode alone isn't enough though, e.g. involving the compositor setting a narrow range between maximum & minimum refresh rate)
> For non-VRR panels we just pick the fixed mode whose refresh rate is closest to the
> user specified mode, and reject the commit if it's not close enough (<= 1 Hz).
Sounds like that wouldn't be good enough for some video use cases I'm afraid.
>>> While the approach in this series could be considered an alternative for the maximum, AFAICT it doesn't allow enforcing a minimum refresh rate which differs from the maximum and default minimum.
>
> The timings specify the absolute max refresh rate you can achieve. So
> a separate max VRR refresh rate knob would be mostly redundant, but as
> we've discussed before, it could have its uses for the non-integer
> vtotal use cases (CMRR in Intel parlance).
None of that addresses the lack of control of the minimum refresh range.
--
Earthling Michel Dänzer \ GNOME / Xwayland / Mesa developer
https://redhat.com \ Libre software enthusiast
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP
2026-06-15 13:30 ` Michel Dänzer
@ 2026-06-15 17:00 ` Ville Syrjälä
0 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjälä @ 2026-06-15 17:00 UTC (permalink / raw)
To: Michel Dänzer; +Cc: intel-gfx, intel-xe, dri-devel, wayland-devel
On Mon, Jun 15, 2026 at 03:30:00PM +0200, Michel Dänzer wrote:
> On 6/15/26 15:06, Ville Syrjälä wrote:
> > On Mon, Jun 15, 2026 at 11:08:59AM +0200, Michel Dänzer wrote:
> >> On 6/15/26 11:06, Michel Dänzer wrote:
> >>> On 6/12/26 16:41, Ville Syrjala wrote:
> >>>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>>>
> >>>> Tweak the eDP fixed mode selection algorithm to allow
> >>>> userspace to do refresh rate changes on VRR capable
> >>>> eDP panels without full modesets.
> >>>>
> >>>> Ville Syrjälä (4):
> >>>> drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
> >>>> drm/i915: Pass the full atomic state to .compute_config()
> >>>> drm/i915/panel: Adjust intel_panel_compute_config() calling convention
> >>>> drm/i915/panel: Attempt VRR based refresh rate change for
> >>>> !allow_modeset
> >>>
> >>> What's the motivation for this approach?
> >>>
> >>> Per https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/5091#note_2784749 , it comes as a bit of a surprise. The approach we've been discussing at display hackfests instead is to add properties for controlling the maximum & minimum refresh rates.
> >
> > This has nothing to do with limiting the VRR range. What we're doing
> > here is selecting the actual timings to drive an internal laptop panel,
> > given some random cooked up modeline from userspace.
>
> This use case would be covered by setting the same values for both properties.
It's all irrelevant here. We might not even have VRR enabled in this
case. All we want is to set the mode (or something close enough) to what
userspace has requested.
>
> (There are other use cases where changing mode alone isn't enough though, e.g. involving the compositor setting a narrow range between maximum & minimum refresh rate)
>
>
> > For non-VRR panels we just pick the fixed mode whose refresh rate is closest to the
> > user specified mode, and reject the commit if it's not close enough (<= 1 Hz).
>
> Sounds like that wouldn't be good enough for some video use cases I'm afraid.
>
>
> >>> While the approach in this series could be considered an alternative for the maximum, AFAICT it doesn't allow enforcing a minimum refresh rate which differs from the maximum and default minimum.
> >
> > The timings specify the absolute max refresh rate you can achieve. So
> > a separate max VRR refresh rate knob would be mostly redundant, but as
> > we've discussed before, it could have its uses for the non-integer
> > vtotal use cases (CMRR in Intel parlance).
>
> None of that addresses the lack of control of the minimum refresh range.
We've been over this before. Yes, a new property would be needed to
limit the min refresh rate if someone wants to do that.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2026-06-15 17:00 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-06-12 14:41 [PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
2026-06-12 14:42 ` [PATCH 1/4] drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR Ville Syrjala
2026-06-13 14:19 ` Kandpal, Suraj
2026-06-12 14:42 ` [PATCH 2/4] drm/i915: Pass the full atomic state to .compute_config() Ville Syrjala
2026-06-13 14:23 ` Kandpal, Suraj
2026-06-12 14:42 ` [PATCH 3/4] drm/i915/panel: Adjust intel_panel_compute_config() calling convention Ville Syrjala
2026-06-13 14:25 ` Kandpal, Suraj
2026-06-12 14:42 ` [PATCH 4/4] drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset Ville Syrjala
2026-06-15 5:17 ` Nautiyal, Ankit K
2026-06-12 14:58 ` ✗ CI.checkpatch: warning for drm/i915: Work harder to enable VRR based refresh rate changes on eDP Patchwork
2026-06-12 14:59 ` ✓ CI.KUnit: success " Patchwork
2026-06-12 15:54 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-13 7:16 ` ✓ Xe.CI.FULL: " Patchwork
2026-06-15 9:06 ` [PATCH 0/4] " Michel Dänzer
2026-06-15 9:08 ` Michel Dänzer
2026-06-15 13:06 ` Ville Syrjälä
2026-06-15 13:30 ` Michel Dänzer
2026-06-15 17:00 ` Ville Syrjälä
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