* [PATCH v2 1/5] drm/i915/panel: Split VRR vs. fixed refresh rate fixed mode selection into separate stages
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
@ 2026-06-22 21:35 ` Ville Syrjala
2026-06-23 4:24 ` Nautiyal, Ankit K
2026-06-23 11:40 ` [PATCH v3 " Ville Syrjala
2026-06-22 21:35 ` [PATCH v2 2/5] drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR Ville Syrjala
` (12 subsequent siblings)
13 siblings, 2 replies; 20+ messages in thread
From: Ville Syrjala @ 2026-06-22 21:35 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, dri-devel, Suraj Kandpal, Ankit Nautiyal
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Split the VRR vs. fixed refresh rate fixed mode selection into two
completely separate stages. First try the VRR method, which will
only accept fixed modes that are in the VRR range and whose refresh
rate is equal or higher to the user's requested mode's refresh rate.
If the VRR method doesn't find anything we fall back to the fixed
refresh rate method of simply looking for the fixed mode with the
closest refresh rate to the user's request.
The main benefit is that we will only perform the VRR vtotal adjustment
on fixed modes that have equal or higher refresh rate to the user's
requested mode, thus we will never end up in a situation where we'd
have to shrink the fixed mode's vtotal. This avoids any risk of ending
up with a vtotal that is too short.
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_panel.c | 123 ++++++++++++++-------
1 file changed, 84 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 81fb349ece5f..12a27edf8bc8 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -67,21 +67,43 @@ static bool is_best_fixed_mode(struct intel_connector *connector,
if (!best_mode)
return true;
- /*
- * With VRR always pick a mode with equal/higher than requested
- * vrefresh, which we can then reduce to match the requested
- * vrefresh by extending the vblank length.
- */
- if (intel_vrr_is_in_range(connector, vrefresh) &&
- intel_vrr_is_in_range(connector, fixed_mode_vrefresh) &&
- fixed_mode_vrefresh < vrefresh)
- return false;
-
/* pick the fixed_mode that is closest in terms of vrefresh */
return abs(fixed_mode_vrefresh - vrefresh) <
abs(drm_mode_vrefresh(best_mode) - vrefresh);
}
+static const struct drm_display_mode *
+intel_panel_fixed_mode_vrr(struct intel_connector *connector,
+ const struct drm_display_mode *mode)
+{
+ const struct drm_display_mode *fixed_mode, *best_mode = NULL;
+ int vrefresh = drm_mode_vrefresh(mode);
+
+ if (!intel_vrr_is_in_range(connector, vrefresh))
+ return NULL;
+
+ list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
+ int fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
+
+ if (!intel_vrr_is_in_range(connector, fixed_mode_vrefresh))
+ continue;
+
+ /*
+ * With VRR always pick a mode with equal/higher than requested
+ * vrefresh, which we can then reduce to match the requested
+ * vrefresh by extending the vblank length.
+ */
+ if (fixed_mode_vrefresh < vrefresh)
+ continue;
+
+ if (is_best_fixed_mode(connector, vrefresh,
+ fixed_mode_vrefresh, best_mode))
+ best_mode = fixed_mode;
+ }
+
+ return best_mode;
+}
+
const struct drm_display_mode *
intel_panel_fixed_mode(struct intel_connector *connector,
const struct drm_display_mode *mode)
@@ -197,47 +219,23 @@ enum drrs_type intel_panel_drrs_type(struct intel_connector *connector)
return connector->panel.vbt.drrs_type;
}
-int intel_panel_compute_config(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode)
+static int intel_panel_compute_config_vrr(struct intel_connector *connector,
+ struct drm_display_mode *adjusted_mode)
{
const struct drm_display_mode *fixed_mode =
intel_panel_fixed_mode(connector, adjusted_mode);
int vrefresh, fixed_mode_vrefresh;
- bool is_vrr;
+ fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode);
if (!fixed_mode)
- return 0;
+ return -EINVAL;
vrefresh = drm_mode_vrefresh(adjusted_mode);
fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
- /*
- * Assume that we shouldn't muck about with the
- * timings if they don't land in the VRR range.
- */
- is_vrr = intel_vrr_is_in_range(connector, vrefresh) &&
- intel_vrr_is_in_range(connector, fixed_mode_vrefresh);
-
- if (!is_vrr) {
- /*
- * We don't want to lie too much to the user about the refresh
- * rate they're going to get. But we have to allow a bit of latitude
- * for Xorg since it likes to automagically cook up modes with slightly
- * off refresh rates.
- */
- if (abs(vrefresh - fixed_mode_vrefresh) > 1) {
- drm_dbg_kms(connector->base.dev,
- "[CONNECTOR:%d:%s] Requested mode vrefresh (%d Hz) does not match fixed mode vrefresh (%d Hz)\n",
- connector->base.base.id, connector->base.name,
- vrefresh, fixed_mode_vrefresh);
-
- return -EINVAL;
- }
- }
-
drm_mode_copy(adjusted_mode, fixed_mode);
- if (is_vrr && fixed_mode_vrefresh != vrefresh) {
+ if (fixed_mode_vrefresh != vrefresh) {
int vsync_start_offset = adjusted_mode->vtotal - adjusted_mode->vsync_start;
int vsync_end_offset = adjusted_mode->vtotal - adjusted_mode->vsync_end;
@@ -254,6 +252,53 @@ int intel_panel_compute_config(struct intel_connector *connector,
return 0;
}
+static int intel_panel_compute_config_fixed_rr(struct intel_connector *connector,
+ struct drm_display_mode *adjusted_mode)
+{
+ const struct drm_display_mode *fixed_mode;
+ int vrefresh, fixed_mode_vrefresh;
+
+ fixed_mode = intel_panel_fixed_mode(connector, adjusted_mode);
+ if (!fixed_mode)
+ return 0;
+
+ vrefresh = drm_mode_vrefresh(adjusted_mode);
+ fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
+
+ /*
+ * We don't want to lie too much to the user about the refresh
+ * rate they're going to get. But we have to allow a bit of latitude
+ * for Xorg since it likes to automagically cook up modes with slightly
+ * off refresh rates.
+ */
+ if (abs(vrefresh - fixed_mode_vrefresh) > 1) {
+ drm_dbg_kms(connector->base.dev,
+ "[CONNECTOR:%d:%s] Requested mode vrefresh (%d Hz) does not match fixed mode vrefresh (%d Hz)\n",
+ connector->base.base.id, connector->base.name,
+ vrefresh, fixed_mode_vrefresh);
+
+ return -EINVAL;
+ }
+
+ drm_mode_copy(adjusted_mode, fixed_mode);
+
+ drm_mode_set_crtcinfo(adjusted_mode, 0);
+
+ return 0;
+}
+
+int intel_panel_compute_config(struct intel_connector *connector,
+ struct drm_display_mode *adjusted_mode)
+{
+ int ret;
+
+ ret = intel_panel_compute_config_vrr(connector, adjusted_mode);
+ if (ret)
+ ret = intel_panel_compute_config_fixed_rr(connector, adjusted_mode);
+
+ return ret;
+}
+
static void intel_panel_add_edid_alt_fixed_modes(struct intel_connector *connector)
{
struct intel_display *display = to_intel_display(connector);
--
2.53.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v2 1/5] drm/i915/panel: Split VRR vs. fixed refresh rate fixed mode selection into separate stages
2026-06-22 21:35 ` [PATCH v2 1/5] drm/i915/panel: Split VRR vs. fixed refresh rate fixed mode selection into separate stages Ville Syrjala
@ 2026-06-23 4:24 ` Nautiyal, Ankit K
2026-06-23 11:40 ` [PATCH v3 " Ville Syrjala
1 sibling, 0 replies; 20+ messages in thread
From: Nautiyal, Ankit K @ 2026-06-23 4:24 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, dri-devel, Suraj Kandpal
On 6/23/2026 3:05 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Split the VRR vs. fixed refresh rate fixed mode selection into two
> completely separate stages. First try the VRR method, which will
> only accept fixed modes that are in the VRR range and whose refresh
> rate is equal or higher to the user's requested mode's refresh rate.
> If the VRR method doesn't find anything we fall back to the fixed
> refresh rate method of simply looking for the fixed mode with the
> closest refresh rate to the user's request.
>
> The main benefit is that we will only perform the VRR vtotal adjustment
> on fixed modes that have equal or higher refresh rate to the user's
> requested mode, thus we will never end up in a situation where we'd
> have to shrink the fixed mode's vtotal. This avoids any risk of ending
> up with a vtotal that is too short.
>
> Cc: Suraj Kandpal <suraj.kandpal@intel.com>
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_panel.c | 123 ++++++++++++++-------
> 1 file changed, 84 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
> index 81fb349ece5f..12a27edf8bc8 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -67,21 +67,43 @@ static bool is_best_fixed_mode(struct intel_connector *connector,
> if (!best_mode)
> return true;
>
> - /*
> - * With VRR always pick a mode with equal/higher than requested
> - * vrefresh, which we can then reduce to match the requested
> - * vrefresh by extending the vblank length.
> - */
> - if (intel_vrr_is_in_range(connector, vrefresh) &&
> - intel_vrr_is_in_range(connector, fixed_mode_vrefresh) &&
> - fixed_mode_vrefresh < vrefresh)
> - return false;
> -
> /* pick the fixed_mode that is closest in terms of vrefresh */
> return abs(fixed_mode_vrefresh - vrefresh) <
> abs(drm_mode_vrefresh(best_mode) - vrefresh);
> }
>
> +static const struct drm_display_mode *
> +intel_panel_fixed_mode_vrr(struct intel_connector *connector,
> + const struct drm_display_mode *mode)
> +{
> + const struct drm_display_mode *fixed_mode, *best_mode = NULL;
> + int vrefresh = drm_mode_vrefresh(mode);
> +
> + if (!intel_vrr_is_in_range(connector, vrefresh))
> + return NULL;
> +
> + list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
> + int fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
> +
> + if (!intel_vrr_is_in_range(connector, fixed_mode_vrefresh))
> + continue;
> +
> + /*
> + * With VRR always pick a mode with equal/higher than requested
> + * vrefresh, which we can then reduce to match the requested
> + * vrefresh by extending the vblank length.
> + */
> + if (fixed_mode_vrefresh < vrefresh)
> + continue;
> +
> + if (is_best_fixed_mode(connector, vrefresh,
> + fixed_mode_vrefresh, best_mode))
> + best_mode = fixed_mode;
> + }
> +
> + return best_mode;
> +}
> +
> const struct drm_display_mode *
> intel_panel_fixed_mode(struct intel_connector *connector,
> const struct drm_display_mode *mode)
> @@ -197,47 +219,23 @@ enum drrs_type intel_panel_drrs_type(struct intel_connector *connector)
> return connector->panel.vbt.drrs_type;
> }
>
> -int intel_panel_compute_config(struct intel_connector *connector,
> - struct drm_display_mode *adjusted_mode)
> +static int intel_panel_compute_config_vrr(struct intel_connector *connector,
> + struct drm_display_mode *adjusted_mode)
> {
> const struct drm_display_mode *fixed_mode =
> intel_panel_fixed_mode(connector, adjusted_mode);
This is not needed now, we are overwriting this anyways.
Otherwise LGTM.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> int vrefresh, fixed_mode_vrefresh;
> - bool is_vrr;
>
> + fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode);
> if (!fixed_mode)
> - return 0;
> + return -EINVAL;
>
> vrefresh = drm_mode_vrefresh(adjusted_mode);
> fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
>
> - /*
> - * Assume that we shouldn't muck about with the
> - * timings if they don't land in the VRR range.
> - */
> - is_vrr = intel_vrr_is_in_range(connector, vrefresh) &&
> - intel_vrr_is_in_range(connector, fixed_mode_vrefresh);
> -
> - if (!is_vrr) {
> - /*
> - * We don't want to lie too much to the user about the refresh
> - * rate they're going to get. But we have to allow a bit of latitude
> - * for Xorg since it likes to automagically cook up modes with slightly
> - * off refresh rates.
> - */
> - if (abs(vrefresh - fixed_mode_vrefresh) > 1) {
> - drm_dbg_kms(connector->base.dev,
> - "[CONNECTOR:%d:%s] Requested mode vrefresh (%d Hz) does not match fixed mode vrefresh (%d Hz)\n",
> - connector->base.base.id, connector->base.name,
> - vrefresh, fixed_mode_vrefresh);
> -
> - return -EINVAL;
> - }
> - }
> -
> drm_mode_copy(adjusted_mode, fixed_mode);
>
> - if (is_vrr && fixed_mode_vrefresh != vrefresh) {
> + if (fixed_mode_vrefresh != vrefresh) {
> int vsync_start_offset = adjusted_mode->vtotal - adjusted_mode->vsync_start;
> int vsync_end_offset = adjusted_mode->vtotal - adjusted_mode->vsync_end;
>
> @@ -254,6 +252,53 @@ int intel_panel_compute_config(struct intel_connector *connector,
> return 0;
> }
>
> +static int intel_panel_compute_config_fixed_rr(struct intel_connector *connector,
> + struct drm_display_mode *adjusted_mode)
> +{
> + const struct drm_display_mode *fixed_mode;
> + int vrefresh, fixed_mode_vrefresh;
> +
> + fixed_mode = intel_panel_fixed_mode(connector, adjusted_mode);
> + if (!fixed_mode)
> + return 0;
> +
> + vrefresh = drm_mode_vrefresh(adjusted_mode);
> + fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
> +
> + /*
> + * We don't want to lie too much to the user about the refresh
> + * rate they're going to get. But we have to allow a bit of latitude
> + * for Xorg since it likes to automagically cook up modes with slightly
> + * off refresh rates.
> + */
> + if (abs(vrefresh - fixed_mode_vrefresh) > 1) {
> + drm_dbg_kms(connector->base.dev,
> + "[CONNECTOR:%d:%s] Requested mode vrefresh (%d Hz) does not match fixed mode vrefresh (%d Hz)\n",
> + connector->base.base.id, connector->base.name,
> + vrefresh, fixed_mode_vrefresh);
> +
> + return -EINVAL;
> + }
> +
> + drm_mode_copy(adjusted_mode, fixed_mode);
> +
> + drm_mode_set_crtcinfo(adjusted_mode, 0);
> +
> + return 0;
> +}
> +
> +int intel_panel_compute_config(struct intel_connector *connector,
> + struct drm_display_mode *adjusted_mode)
> +{
> + int ret;
> +
> + ret = intel_panel_compute_config_vrr(connector, adjusted_mode);
> + if (ret)
> + ret = intel_panel_compute_config_fixed_rr(connector, adjusted_mode);
> +
> + return ret;
> +}
> +
> static void intel_panel_add_edid_alt_fixed_modes(struct intel_connector *connector)
> {
> struct intel_display *display = to_intel_display(connector);
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH v3 1/5] drm/i915/panel: Split VRR vs. fixed refresh rate fixed mode selection into separate stages
2026-06-22 21:35 ` [PATCH v2 1/5] drm/i915/panel: Split VRR vs. fixed refresh rate fixed mode selection into separate stages Ville Syrjala
2026-06-23 4:24 ` Nautiyal, Ankit K
@ 2026-06-23 11:40 ` Ville Syrjala
1 sibling, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2026-06-23 11:40 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, dri-devel, Suraj Kandpal, Ankit Nautiyal
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Split the VRR vs. fixed refresh rate fixed mode selection into two
completely separate stages. First try the VRR method, which will
only accept fixed modes that are in the VRR range and whose refresh
rate is equal or higher to the user's requested mode's refresh rate.
If the VRR method doesn't find anything we fall back to the fixed
refresh rate method of simply looking for the fixed mode with the
closest refresh rate to the user's request.
The main benefit is that we will only perform the VRR vtotal adjustment
on fixed modes that have equal or higher refresh rate to the user's
requested mode, thus we will never end up in a situation where we'd
have to shrink the fixed mode's vtotal. This avoids any risk of ending
up with a vtotal that is too short.
v2: Drop redundant intel_panel_fixed_mode() call (Ankit)
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_panel.c | 126 ++++++++++++++-------
1 file changed, 85 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 81fb349ece5f..2b8401b6d4d6 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -67,21 +67,43 @@ static bool is_best_fixed_mode(struct intel_connector *connector,
if (!best_mode)
return true;
- /*
- * With VRR always pick a mode with equal/higher than requested
- * vrefresh, which we can then reduce to match the requested
- * vrefresh by extending the vblank length.
- */
- if (intel_vrr_is_in_range(connector, vrefresh) &&
- intel_vrr_is_in_range(connector, fixed_mode_vrefresh) &&
- fixed_mode_vrefresh < vrefresh)
- return false;
-
/* pick the fixed_mode that is closest in terms of vrefresh */
return abs(fixed_mode_vrefresh - vrefresh) <
abs(drm_mode_vrefresh(best_mode) - vrefresh);
}
+static const struct drm_display_mode *
+intel_panel_fixed_mode_vrr(struct intel_connector *connector,
+ const struct drm_display_mode *mode)
+{
+ const struct drm_display_mode *fixed_mode, *best_mode = NULL;
+ int vrefresh = drm_mode_vrefresh(mode);
+
+ if (!intel_vrr_is_in_range(connector, vrefresh))
+ return NULL;
+
+ list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
+ int fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
+
+ if (!intel_vrr_is_in_range(connector, fixed_mode_vrefresh))
+ continue;
+
+ /*
+ * With VRR always pick a mode with equal/higher than requested
+ * vrefresh, which we can then reduce to match the requested
+ * vrefresh by extending the vblank length.
+ */
+ if (fixed_mode_vrefresh < vrefresh)
+ continue;
+
+ if (is_best_fixed_mode(connector, vrefresh,
+ fixed_mode_vrefresh, best_mode))
+ best_mode = fixed_mode;
+ }
+
+ return best_mode;
+}
+
const struct drm_display_mode *
intel_panel_fixed_mode(struct intel_connector *connector,
const struct drm_display_mode *mode)
@@ -197,47 +219,22 @@ enum drrs_type intel_panel_drrs_type(struct intel_connector *connector)
return connector->panel.vbt.drrs_type;
}
-int intel_panel_compute_config(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode)
+static int intel_panel_compute_config_vrr(struct intel_connector *connector,
+ struct drm_display_mode *adjusted_mode)
{
- const struct drm_display_mode *fixed_mode =
- intel_panel_fixed_mode(connector, adjusted_mode);
+ const struct drm_display_mode *fixed_mode;
int vrefresh, fixed_mode_vrefresh;
- bool is_vrr;
+ fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode);
if (!fixed_mode)
- return 0;
+ return -EINVAL;
vrefresh = drm_mode_vrefresh(adjusted_mode);
fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
- /*
- * Assume that we shouldn't muck about with the
- * timings if they don't land in the VRR range.
- */
- is_vrr = intel_vrr_is_in_range(connector, vrefresh) &&
- intel_vrr_is_in_range(connector, fixed_mode_vrefresh);
-
- if (!is_vrr) {
- /*
- * We don't want to lie too much to the user about the refresh
- * rate they're going to get. But we have to allow a bit of latitude
- * for Xorg since it likes to automagically cook up modes with slightly
- * off refresh rates.
- */
- if (abs(vrefresh - fixed_mode_vrefresh) > 1) {
- drm_dbg_kms(connector->base.dev,
- "[CONNECTOR:%d:%s] Requested mode vrefresh (%d Hz) does not match fixed mode vrefresh (%d Hz)\n",
- connector->base.base.id, connector->base.name,
- vrefresh, fixed_mode_vrefresh);
-
- return -EINVAL;
- }
- }
-
drm_mode_copy(adjusted_mode, fixed_mode);
- if (is_vrr && fixed_mode_vrefresh != vrefresh) {
+ if (fixed_mode_vrefresh != vrefresh) {
int vsync_start_offset = adjusted_mode->vtotal - adjusted_mode->vsync_start;
int vsync_end_offset = adjusted_mode->vtotal - adjusted_mode->vsync_end;
@@ -254,6 +251,53 @@ int intel_panel_compute_config(struct intel_connector *connector,
return 0;
}
+static int intel_panel_compute_config_fixed_rr(struct intel_connector *connector,
+ struct drm_display_mode *adjusted_mode)
+{
+ const struct drm_display_mode *fixed_mode;
+ int vrefresh, fixed_mode_vrefresh;
+
+ fixed_mode = intel_panel_fixed_mode(connector, adjusted_mode);
+ if (!fixed_mode)
+ return 0;
+
+ vrefresh = drm_mode_vrefresh(adjusted_mode);
+ fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
+
+ /*
+ * We don't want to lie too much to the user about the refresh
+ * rate they're going to get. But we have to allow a bit of latitude
+ * for Xorg since it likes to automagically cook up modes with slightly
+ * off refresh rates.
+ */
+ if (abs(vrefresh - fixed_mode_vrefresh) > 1) {
+ drm_dbg_kms(connector->base.dev,
+ "[CONNECTOR:%d:%s] Requested mode vrefresh (%d Hz) does not match fixed mode vrefresh (%d Hz)\n",
+ connector->base.base.id, connector->base.name,
+ vrefresh, fixed_mode_vrefresh);
+
+ return -EINVAL;
+ }
+
+ drm_mode_copy(adjusted_mode, fixed_mode);
+
+ drm_mode_set_crtcinfo(adjusted_mode, 0);
+
+ return 0;
+}
+
+int intel_panel_compute_config(struct intel_connector *connector,
+ struct drm_display_mode *adjusted_mode)
+{
+ int ret;
+
+ ret = intel_panel_compute_config_vrr(connector, adjusted_mode);
+ if (ret)
+ ret = intel_panel_compute_config_fixed_rr(connector, adjusted_mode);
+
+ return ret;
+}
+
static void intel_panel_add_edid_alt_fixed_modes(struct intel_connector *connector)
{
struct intel_display *display = to_intel_display(connector);
--
2.53.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 2/5] drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
2026-06-22 21:35 ` [PATCH v2 1/5] drm/i915/panel: Split VRR vs. fixed refresh rate fixed mode selection into separate stages Ville Syrjala
@ 2026-06-22 21:35 ` Ville Syrjala
2026-06-22 21:36 ` [PATCH v2 3/5] drm/i915: Pass the full atomic state to .compute_config() Ville Syrjala
` (11 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2026-06-22 21:35 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, dri-devel, Suraj Kandpal, Maarten Lankhorst
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add a new mode matching flag DRM_MODE_MATCH_TIMINGS_VRR. This is
identical to DRM_MODE_MATCH_TIMINGS, except it requires the vsync
pulse to remain anchored to the end of vtotal, as opposed to the
start of the frame. VRR capable hardware can therefore treat
matching modes as just variants of the same mode with a different
vblank lengths.
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/drm_modes.c | 23 +++++++++++++++++++++++
include/drm/drm_modes.h | 1 +
2 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 3f8e025fd6d9..e1eed13a8e94 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -1469,6 +1469,25 @@ struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
}
EXPORT_SYMBOL(drm_mode_duplicate);
+static bool drm_mode_match_timings_vrr(const struct drm_display_mode *mode1,
+ const struct drm_display_mode *mode2)
+{
+ int mode1_vsync_start_offset = mode1->vtotal - mode1->vsync_start;
+ int mode1_vsync_end_offset = mode1->vtotal - mode1->vsync_end;
+ int mode2_vsync_start_offset = mode2->vtotal - mode2->vsync_start;
+ int mode2_vsync_end_offset = mode2->vtotal - mode2->vsync_end;
+
+ return mode1->hdisplay == mode2->hdisplay &&
+ mode1->hsync_start == mode2->hsync_start &&
+ mode1->hsync_end == mode2->hsync_end &&
+ mode1->htotal == mode2->htotal &&
+ mode1->hskew == mode2->hskew &&
+ mode1->vdisplay == mode2->vdisplay &&
+ mode1_vsync_start_offset == mode2_vsync_start_offset &&
+ mode1_vsync_end_offset == mode2_vsync_end_offset &&
+ mode1->vscan == mode2->vscan;
+}
+
static bool drm_mode_match_timings(const struct drm_display_mode *mode1,
const struct drm_display_mode *mode2)
{
@@ -1538,6 +1557,10 @@ bool drm_mode_match(const struct drm_display_mode *mode1,
if (!mode1 || !mode2)
return false;
+ if (match_flags & DRM_MODE_MATCH_TIMINGS_VRR &&
+ !drm_mode_match_timings_vrr(mode1, mode2))
+ return false;
+
if (match_flags & DRM_MODE_MATCH_TIMINGS &&
!drm_mode_match_timings(mode1, mode2))
return false;
diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h
index b9bb92e4b029..6e3eccc3c349 100644
--- a/include/drm/drm_modes.h
+++ b/include/drm/drm_modes.h
@@ -193,6 +193,7 @@ enum drm_mode_status {
#define DRM_MODE_MATCH_FLAGS (1 << 2)
#define DRM_MODE_MATCH_3D_FLAGS (1 << 3)
#define DRM_MODE_MATCH_ASPECT_RATIO (1 << 4)
+#define DRM_MODE_MATCH_TIMINGS_VRR (1 << 5)
/**
* struct drm_display_mode - DRM kernel-internal display mode structure
--
2.53.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v2 3/5] drm/i915: Pass the full atomic state to .compute_config()
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
2026-06-22 21:35 ` [PATCH v2 1/5] drm/i915/panel: Split VRR vs. fixed refresh rate fixed mode selection into separate stages Ville Syrjala
2026-06-22 21:35 ` [PATCH v2 2/5] drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR Ville Syrjala
@ 2026-06-22 21:36 ` Ville Syrjala
2026-06-22 21:36 ` [PATCH v2 4/5] drm/i915/panel: Adjust intel_panel_compute_config() calling convention Ville Syrjala
` (10 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2026-06-22 21:36 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, dri-devel, Suraj Kandpal
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Upcoming changes will need access to the full atomic state
in .compute_config(). Pass it in from the top.
Couple of the implementations already dug this out via the
crtc_state/conn_state->state pointer, but we don't want to
use that anywhere because it's a bit of a footgun by only
being valid during the early stages of the commit.
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 5 +++--
drivers/gpu/drm/i915/display/g4x_hdmi.c | 4 ++--
drivers/gpu/drm/i915/display/icl_dsi.c | 3 ++-
drivers/gpu/drm/i915/display/intel_crt.c | 9 ++++++---
drivers/gpu/drm/i915/display/intel_ddi.c | 8 +++++---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++++--
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dp.h | 3 ++-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 8 ++++----
drivers/gpu/drm/i915/display/intel_dvo.c | 3 ++-
drivers/gpu/drm/i915/display/intel_lvds.c | 3 ++-
drivers/gpu/drm/i915/display/intel_sdvo.c | 3 ++-
drivers/gpu/drm/i915/display/intel_tv.c | 5 ++---
drivers/gpu/drm/i915/display/vlv_dsi.c | 3 ++-
15 files changed, 42 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index d211e6c49e0a..b867443ff227 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -1222,7 +1222,8 @@ static bool ilk_digital_port_connected(struct intel_encoder *encoder)
return intel_de_read(display, DEISR) & bit;
}
-static int g4x_dp_compute_config(struct intel_encoder *encoder,
+static int g4x_dp_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
@@ -1232,7 +1233,7 @@ static int g4x_dp_compute_config(struct intel_encoder *encoder,
if (HAS_PCH_SPLIT(display) && encoder->port != PORT_A)
crtc_state->has_pch_encoder = true;
- ret = intel_dp_compute_config(encoder, crtc_state, conn_state);
+ ret = intel_dp_compute_config(state, encoder, crtc_state, conn_state);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index acb36cab999c..4c33aa1d1d32 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -126,12 +126,12 @@ static bool g4x_compute_has_hdmi_sink(struct intel_atomic_state *state,
return false;
}
-static int g4x_hdmi_compute_config(struct intel_encoder *encoder,
+static int g4x_hdmi_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
if (HAS_PCH_SPLIT(display))
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index a549f1fac810..59184f2f805c 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1657,7 +1657,8 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
return 0;
}
-static int gen11_dsi_compute_config(struct intel_encoder *encoder,
+static int gen11_dsi_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 243e332bef57..5b8968197fbc 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -397,7 +397,8 @@ intel_crt_mode_valid(struct drm_connector *connector,
return MODE_OK;
}
-static int intel_crt_compute_config(struct intel_encoder *encoder,
+static int intel_crt_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
@@ -413,7 +414,8 @@ static int intel_crt_compute_config(struct intel_encoder *encoder,
return 0;
}
-static int pch_crt_compute_config(struct intel_encoder *encoder,
+static int pch_crt_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
@@ -432,7 +434,8 @@ static int pch_crt_compute_config(struct intel_encoder *encoder,
return 0;
}
-static int hsw_crt_compute_config(struct intel_encoder *encoder,
+static int hsw_crt_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 25314ec65ae7..2b7eb010511b 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4485,7 +4485,8 @@ intel_ddi_compute_output_type(struct intel_encoder *encoder,
}
}
-static int intel_ddi_compute_config(struct intel_encoder *encoder,
+static int intel_ddi_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
@@ -4503,7 +4504,7 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
ret = intel_hdmi_compute_config(encoder, pipe_config, conn_state);
} else {
- ret = intel_dp_compute_config(encoder, pipe_config, conn_state);
+ ret = intel_dp_compute_config(state, encoder, pipe_config, conn_state);
}
if (ret)
@@ -4608,7 +4609,8 @@ intel_ddi_port_sync_transcoders(const struct intel_crtc_state *ref_crtc_state,
return transcoders;
}
-static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
+static int intel_ddi_compute_config_late(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 805066b02aaa..5bc8e6ea10a5 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4781,7 +4781,7 @@ intel_modeset_pipe_config(struct intel_atomic_state *state,
if (connector_state->crtc != &crtc->base)
continue;
- ret = encoder->compute_config(encoder, crtc_state,
+ ret = encoder->compute_config(state, encoder, crtc_state,
connector_state);
if (ret == -EDEADLK)
return ret;
@@ -4841,7 +4841,7 @@ intel_modeset_pipe_config_late(struct intel_atomic_state *state,
!encoder->compute_config_late)
continue;
- ret = encoder->compute_config_late(encoder, crtc_state,
+ ret = encoder->compute_config_late(state, encoder, crtc_state,
conn_state);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index ebd00922bf3c..2689321609a5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -178,10 +178,12 @@ struct intel_encoder {
enum intel_output_type (*compute_output_type)(struct intel_encoder *,
struct intel_crtc_state *,
struct drm_connector_state *);
- int (*compute_config)(struct intel_encoder *,
+ int (*compute_config)(struct intel_atomic_state *,
+ struct intel_encoder *,
struct intel_crtc_state *,
struct drm_connector_state *);
- int (*compute_config_late)(struct intel_encoder *,
+ int (*compute_config_late)(struct intel_atomic_state *,
+ struct intel_encoder *,
struct intel_crtc_state *,
struct drm_connector_state *);
void (*pre_pll_enable)(struct intel_atomic_state *,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3569e61e7fee..b9324b590ee9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3627,12 +3627,12 @@ int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state,
}
int
-intel_dp_compute_config(struct intel_encoder *encoder,
+intel_dp_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
struct intel_connector *connector = intel_dp->attached_connector;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 92ce04852326..b233739b89ce 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -71,7 +71,8 @@ void intel_dp_sink_disable_decompression(struct intel_atomic_state *state,
void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
-int intel_dp_compute_config(struct intel_encoder *encoder,
+int intel_dp_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state);
bool intel_dp_needs_8b10b_fec(const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 0aa3e6b4c781..ecc90e8faee1 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -697,12 +697,12 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
return 0;
}
-static int mst_stream_compute_config(struct intel_encoder *encoder,
+static int mst_stream_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_dp *intel_dp = to_primary_dp(encoder);
struct intel_connector *connector =
@@ -925,11 +925,11 @@ int intel_dp_mst_atomic_check_link(struct intel_atomic_state *state,
return 0;
}
-static int mst_stream_compute_config_late(struct intel_encoder *encoder,
+static int mst_stream_compute_config_late(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
- struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
struct intel_dp *intel_dp = to_primary_dp(encoder);
/* lowest numbered transcoder will be designated master */
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index dd1a995c2979..181722c41b96 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -242,7 +242,8 @@ intel_dvo_mode_valid(struct drm_connector *_connector,
return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
}
-static int intel_dvo_compute_config(struct intel_encoder *encoder,
+static int intel_dvo_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index c8098104d853..30e4809b36ac 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -413,7 +413,8 @@ intel_lvds_mode_valid(struct drm_connector *_connector,
return MODE_OK;
}
-static int intel_lvds_compute_config(struct intel_encoder *encoder,
+static int intel_lvds_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index d83d350959d8..6b73c9a5ec7f 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -1354,7 +1354,8 @@ static bool intel_sdvo_has_audio(struct intel_encoder *encoder,
return intel_conn_state->force_audio == HDMI_AUDIO_ON;
}
-static int intel_sdvo_compute_config(struct intel_encoder *encoder,
+static int intel_sdvo_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
index 0a926c6f25f4..840e1dcdc2d0 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -1187,13 +1187,12 @@ static bool intel_tv_vert_scaling(const struct drm_display_mode *tv_mode,
}
static int
-intel_tv_compute_config(struct intel_encoder *encoder,
+intel_tv_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct intel_atomic_state *state =
- to_intel_atomic_state(pipe_config->uapi.state);
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_tv_connector_state *tv_conn_state =
to_intel_tv_connector_state(conn_state);
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index 877eab75f19a..b89318f5bdc2 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -266,7 +266,8 @@ static void band_gap_reset(struct intel_display *display)
vlv_flisdsi_put(display);
}
-static int intel_dsi_compute_config(struct intel_encoder *encoder,
+static int intel_dsi_compute_config(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
--
2.53.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v2 4/5] drm/i915/panel: Adjust intel_panel_compute_config() calling convention
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (2 preceding siblings ...)
2026-06-22 21:36 ` [PATCH v2 3/5] drm/i915: Pass the full atomic state to .compute_config() Ville Syrjala
@ 2026-06-22 21:36 ` Ville Syrjala
2026-06-23 11:41 ` [PATCH v3 " Ville Syrjala
2026-06-22 21:36 ` [PATCH v2 5/5] drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset Ville Syrjala
` (9 subsequent siblings)
13 siblings, 1 reply; 20+ messages in thread
From: Ville Syrjala @ 2026-06-22 21:36 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, dri-devel, Suraj Kandpal
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pass the full atomic state to intel_panel_compute_config(). We'll
need this for some upcoming VRR fastset tricks. And to accompany
full state we'll also need the crtc (or its state) as well.
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dvo.c | 2 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 2 +-
drivers/gpu/drm/i915/display/intel_panel.c | 24 +++++++++++++---------
drivers/gpu/drm/i915/display/intel_panel.h | 6 ++++--
drivers/gpu/drm/i915/display/intel_sdvo.c | 4 ++--
drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +-
8 files changed, 25 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 59184f2f805c..ea0cdb7822f3 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1672,7 +1672,7 @@ static int gen11_dsi_compute_config(struct intel_atomic_state *state,
pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
- ret = intel_panel_compute_config(intel_connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config, intel_connector);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index b9324b590ee9..da8a94821c11 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3639,7 +3639,7 @@ intel_dp_compute_config(struct intel_atomic_state *state,
int ret = 0, link_bpp_x16;
if (intel_dp_is_edp(intel_dp)) {
- ret = intel_panel_compute_config(connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config, connector);
if (ret)
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index 181722c41b96..f157699a7c4c 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -257,7 +257,7 @@ static int intel_dvo_compute_config(struct intel_atomic_state *state,
* with the panel scaling set up to source from the H/VDisplay
* of the original mode.
*/
- ret = intel_panel_compute_config(connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config, connector);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 30e4809b36ac..872753478cf2 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -460,7 +460,7 @@ static int intel_lvds_compute_config(struct intel_atomic_state *state,
* with the panel scaling set up to source from the H/VDisplay
* of the original mode.
*/
- ret = intel_panel_compute_config(connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, crtc_state, connector);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 12a27edf8bc8..faa24537ef63 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -219,11 +219,12 @@ enum drrs_type intel_panel_drrs_type(struct intel_connector *connector)
return connector->panel.vbt.drrs_type;
}
-static int intel_panel_compute_config_vrr(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode)
+static int intel_panel_compute_config_vrr(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector)
{
- const struct drm_display_mode *fixed_mode =
- intel_panel_fixed_mode(connector, adjusted_mode);
+ struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+ const struct drm_display_mode *fixed_mode;
int vrefresh, fixed_mode_vrefresh;
fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode);
@@ -252,9 +253,11 @@ static int intel_panel_compute_config_vrr(struct intel_connector *connector,
return 0;
}
-static int intel_panel_compute_config_fixed_rr(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode)
+static int intel_panel_compute_config_fixed_rr(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector)
{
+ struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
const struct drm_display_mode *fixed_mode;
int vrefresh, fixed_mode_vrefresh;
@@ -287,14 +290,15 @@ static int intel_panel_compute_config_fixed_rr(struct intel_connector *connector
return 0;
}
-int intel_panel_compute_config(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode)
+int intel_panel_compute_config(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector)
{
int ret;
- ret = intel_panel_compute_config_vrr(connector, adjusted_mode);
+ ret = intel_panel_compute_config_vrr(state, crtc_state, connector);
if (ret)
- ret = intel_panel_compute_config_fixed_rr(connector, adjusted_mode);
+ ret = intel_panel_compute_config_fixed_rr(state, crtc_state, connector);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index 23bd227826c9..30c6078ecb1b 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -14,6 +14,7 @@ struct drm_connector;
struct drm_connector_state;
struct drm_display_mode;
struct drm_edid;
+struct intel_atomic_state;
struct intel_connector;
struct intel_crtc_state;
struct intel_display;
@@ -45,8 +46,9 @@ enum drm_mode_status
intel_panel_mode_valid(struct intel_connector *connector,
const struct drm_display_mode *mode,
int *target_clock);
-int intel_panel_compute_config(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode);
+int intel_panel_compute_config(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector);
void intel_panel_add_edid_fixed_modes(struct intel_connector *connector,
bool use_alt_fixed_modes);
void intel_panel_add_vbt_lfp_fixed_mode(struct intel_connector *connector);
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 6b73c9a5ec7f..3075ef04df56 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -1399,8 +1399,8 @@ static int intel_sdvo_compute_config(struct intel_atomic_state *state,
const struct drm_display_mode *fixed_mode;
int ret;
- ret = intel_panel_compute_config(&intel_sdvo_connector->base,
- adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config,
+ &intel_sdvo_connector->base);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index b89318f5bdc2..8829f365592e 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -281,7 +281,7 @@ static int intel_dsi_compute_config(struct intel_atomic_state *state,
pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
- ret = intel_panel_compute_config(intel_connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config, intel_connector);
if (ret)
return ret;
--
2.53.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v3 4/5] drm/i915/panel: Adjust intel_panel_compute_config() calling convention
2026-06-22 21:36 ` [PATCH v2 4/5] drm/i915/panel: Adjust intel_panel_compute_config() calling convention Ville Syrjala
@ 2026-06-23 11:41 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2026-06-23 11:41 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, dri-devel, Suraj Kandpal
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pass the full atomic state to intel_panel_compute_config(). We'll
need this for some upcoming VRR fastset tricks. And to accompany
full state we'll also need the crtc (or its state) as well.
v2: Rebase
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dvo.c | 2 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 2 +-
drivers/gpu/drm/i915/display/intel_panel.c | 21 +++++++++++++--------
drivers/gpu/drm/i915/display/intel_panel.h | 6 ++++--
drivers/gpu/drm/i915/display/intel_sdvo.c | 4 ++--
drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +-
8 files changed, 24 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 59184f2f805c..ea0cdb7822f3 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1672,7 +1672,7 @@ static int gen11_dsi_compute_config(struct intel_atomic_state *state,
pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
- ret = intel_panel_compute_config(intel_connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config, intel_connector);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index b9324b590ee9..da8a94821c11 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3639,7 +3639,7 @@ intel_dp_compute_config(struct intel_atomic_state *state,
int ret = 0, link_bpp_x16;
if (intel_dp_is_edp(intel_dp)) {
- ret = intel_panel_compute_config(connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config, connector);
if (ret)
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index 181722c41b96..f157699a7c4c 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -257,7 +257,7 @@ static int intel_dvo_compute_config(struct intel_atomic_state *state,
* with the panel scaling set up to source from the H/VDisplay
* of the original mode.
*/
- ret = intel_panel_compute_config(connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config, connector);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 30e4809b36ac..872753478cf2 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -460,7 +460,7 @@ static int intel_lvds_compute_config(struct intel_atomic_state *state,
* with the panel scaling set up to source from the H/VDisplay
* of the original mode.
*/
- ret = intel_panel_compute_config(connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, crtc_state, connector);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 2b8401b6d4d6..faa24537ef63 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -219,9 +219,11 @@ enum drrs_type intel_panel_drrs_type(struct intel_connector *connector)
return connector->panel.vbt.drrs_type;
}
-static int intel_panel_compute_config_vrr(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode)
+static int intel_panel_compute_config_vrr(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector)
{
+ struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
const struct drm_display_mode *fixed_mode;
int vrefresh, fixed_mode_vrefresh;
@@ -251,9 +253,11 @@ static int intel_panel_compute_config_vrr(struct intel_connector *connector,
return 0;
}
-static int intel_panel_compute_config_fixed_rr(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode)
+static int intel_panel_compute_config_fixed_rr(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector)
{
+ struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
const struct drm_display_mode *fixed_mode;
int vrefresh, fixed_mode_vrefresh;
@@ -286,14 +290,15 @@ static int intel_panel_compute_config_fixed_rr(struct intel_connector *connector
return 0;
}
-int intel_panel_compute_config(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode)
+int intel_panel_compute_config(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector)
{
int ret;
- ret = intel_panel_compute_config_vrr(connector, adjusted_mode);
+ ret = intel_panel_compute_config_vrr(state, crtc_state, connector);
if (ret)
- ret = intel_panel_compute_config_fixed_rr(connector, adjusted_mode);
+ ret = intel_panel_compute_config_fixed_rr(state, crtc_state, connector);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index 23bd227826c9..30c6078ecb1b 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -14,6 +14,7 @@ struct drm_connector;
struct drm_connector_state;
struct drm_display_mode;
struct drm_edid;
+struct intel_atomic_state;
struct intel_connector;
struct intel_crtc_state;
struct intel_display;
@@ -45,8 +46,9 @@ enum drm_mode_status
intel_panel_mode_valid(struct intel_connector *connector,
const struct drm_display_mode *mode,
int *target_clock);
-int intel_panel_compute_config(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode);
+int intel_panel_compute_config(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector);
void intel_panel_add_edid_fixed_modes(struct intel_connector *connector,
bool use_alt_fixed_modes);
void intel_panel_add_vbt_lfp_fixed_mode(struct intel_connector *connector);
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 6b73c9a5ec7f..3075ef04df56 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -1399,8 +1399,8 @@ static int intel_sdvo_compute_config(struct intel_atomic_state *state,
const struct drm_display_mode *fixed_mode;
int ret;
- ret = intel_panel_compute_config(&intel_sdvo_connector->base,
- adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config,
+ &intel_sdvo_connector->base);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index b89318f5bdc2..8829f365592e 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -281,7 +281,7 @@ static int intel_dsi_compute_config(struct intel_atomic_state *state,
pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
- ret = intel_panel_compute_config(intel_connector, adjusted_mode);
+ ret = intel_panel_compute_config(state, pipe_config, intel_connector);
if (ret)
return ret;
--
2.53.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 5/5] drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (3 preceding siblings ...)
2026-06-22 21:36 ` [PATCH v2 4/5] drm/i915/panel: Adjust intel_panel_compute_config() calling convention Ville Syrjala
@ 2026-06-22 21:36 ` Ville Syrjala
2026-06-23 4:28 ` Nautiyal, Ankit K
2026-06-22 21:42 ` ✗ CI.checkpatch: warning for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev2) Patchwork
` (8 subsequent siblings)
13 siblings, 1 reply; 20+ messages in thread
From: Ville Syrjala @ 2026-06-22 21:36 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, dri-devel, Ankit Nautiyal
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Adjust the panel fixed mode selection algorithm to only consider
fixed modes that are "VRR compatible" with the old fixed mode
when userspace doesn't want to allow full modesets. This will
allow a VRR based refresh rate changes (ie. just a change in
the vblank length) via the fastset path.
When full modesets are allowed, we still use the original algorithm
as that may pick a fixed mode with a more optimal dotclock, potentially
leading to reduced power consumption.
This approach works as long as userspace does the initial
allow_modeset=true commit using the highest refresh rate it will
want to use. Subsequent commits with allow_modeset=false can then
switch between lower refresh rates without blinks.
One remaining hurdle we may need to solve is the guardband length.
Assuming the highest refresh rate vblank is too short for
intel_vrr_compute_optimized_guardband() the intitial guardband will
match the highest refresh rate vblank. A subsequent switch to a lower
refresh rate will then recompute the guardband and select a value
that is higher (since the vblank will be longer). The mismatch in
guardband lengths will prevent the fastset. We may either have to
preserve the original (sub-optimal) guardband, or we'll have to
revisit the idea of changing the guardband without a full modeset.
Note that I'm not 100% happy with this solution because
intel_panel_fixed_mode() is no longer fully idempotent, but I wasn't
able to come up with anything truly better either :/ The simple
solution would be just to always pick the fixed mode with the highest
dotclock, but that could lead to increased power consumption even
when high refresh rates are never used.
Perhaps the proper solution would be to just deprecate this
idea of taking in random modes for internal panels and then
cooking up a compatible fixed modes. Life would be easier if
userspace was required to provide the desired fixed mode directly.
But in order to do that we'd need to introduce new uapi properties
to control the pfit aspect of this, and we'd probably need a new
client cap to select between the old and new userspace behaviour.
Something to consider in the future...
v2: Rebase due to earlier changes to VRR fixed mode selection
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_panel.c | 42 ++++++++++++++++++++--
1 file changed, 39 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index faa24537ef63..81e638d0c7b3 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -72,9 +72,20 @@ static bool is_best_fixed_mode(struct intel_connector *connector,
abs(drm_mode_vrefresh(best_mode) - vrefresh);
}
+static bool is_vrr_compatible(const struct drm_display_mode *mode1,
+ const struct drm_display_mode *mode2)
+{
+ return drm_mode_match(mode1, mode2,
+ DRM_MODE_MATCH_CLOCK |
+ DRM_MODE_MATCH_TIMINGS_VRR |
+ DRM_MODE_MATCH_FLAGS |
+ DRM_MODE_MATCH_3D_FLAGS);
+}
+
static const struct drm_display_mode *
intel_panel_fixed_mode_vrr(struct intel_connector *connector,
- const struct drm_display_mode *mode)
+ const struct drm_display_mode *mode,
+ const struct drm_display_mode *vrr_ref_mode)
{
const struct drm_display_mode *fixed_mode, *best_mode = NULL;
int vrefresh = drm_mode_vrefresh(mode);
@@ -82,6 +93,10 @@ intel_panel_fixed_mode_vrr(struct intel_connector *connector,
if (!intel_vrr_is_in_range(connector, vrefresh))
return NULL;
+ if (vrr_ref_mode &&
+ !intel_vrr_is_in_range(connector, drm_mode_vrefresh(vrr_ref_mode)))
+ return NULL;
+
list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
int fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
@@ -96,6 +111,10 @@ intel_panel_fixed_mode_vrr(struct intel_connector *connector,
if (fixed_mode_vrefresh < vrefresh)
continue;
+ if (vrr_ref_mode &&
+ !is_vrr_compatible(fixed_mode, vrr_ref_mode))
+ continue;
+
if (is_best_fixed_mode(connector, vrefresh,
fixed_mode_vrefresh, best_mode))
best_mode = fixed_mode;
@@ -224,10 +243,27 @@ static int intel_panel_compute_config_vrr(struct intel_atomic_state *state,
struct intel_connector *connector)
{
struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
- const struct drm_display_mode *fixed_mode;
+ const struct drm_display_mode *fixed_mode = NULL;
int vrefresh, fixed_mode_vrefresh;
- fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode);
+ /*
+ * Attempt a VRR based refresh rate change if possible
+ * when userspace has forbidden a full modeset.
+ */
+ if (!state->base.allow_modeset) {
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ const struct intel_crtc_state *old_crtc_state =
+ intel_atomic_get_old_crtc_state(state, crtc);
+
+ if (old_crtc_state->hw.enable &&
+ old_crtc_state->uapi.encoder_mask == crtc_state->uapi.encoder_mask)
+ fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode,
+ &old_crtc_state->hw.adjusted_mode);
+ }
+
+ if (!fixed_mode)
+ fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode, NULL);
+
if (!fixed_mode)
return -EINVAL;
--
2.53.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v2 5/5] drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset
2026-06-22 21:36 ` [PATCH v2 5/5] drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset Ville Syrjala
@ 2026-06-23 4:28 ` Nautiyal, Ankit K
2026-06-23 11:48 ` Ville Syrjälä
0 siblings, 1 reply; 20+ messages in thread
From: Nautiyal, Ankit K @ 2026-06-23 4:28 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, dri-devel
On 6/23/2026 3:06 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Adjust the panel fixed mode selection algorithm to only consider
> fixed modes that are "VRR compatible" with the old fixed mode
> when userspace doesn't want to allow full modesets. This will
> allow a VRR based refresh rate changes (ie. just a change in
> the vblank length) via the fastset path.
>
> When full modesets are allowed, we still use the original algorithm
> as that may pick a fixed mode with a more optimal dotclock, potentially
> leading to reduced power consumption.
>
> This approach works as long as userspace does the initial
> allow_modeset=true commit using the highest refresh rate it will
> want to use. Subsequent commits with allow_modeset=false can then
> switch between lower refresh rates without blinks.
>
> One remaining hurdle we may need to solve is the guardband length.
> Assuming the highest refresh rate vblank is too short for
> intel_vrr_compute_optimized_guardband() the intitial guardband will
> match the highest refresh rate vblank. A subsequent switch to a lower
> refresh rate will then recompute the guardband and select a value
> that is higher (since the vblank will be longer). The mismatch in
> guardband lengths will prevent the fastset. We may either have to
> preserve the original (sub-optimal) guardband, or we'll have to
> revisit the idea of changing the guardband without a full modeset.
>
> Note that I'm not 100% happy with this solution because
> intel_panel_fixed_mode() is no longer fully idempotent, but I wasn't
> able to come up with anything truly better either :/ The simple
> solution would be just to always pick the fixed mode with the highest
> dotclock, but that could lead to increased power consumption even
> when high refresh rates are never used.
>
> Perhaps the proper solution would be to just deprecate this
> idea of taking in random modes for internal panels and then
> cooking up a compatible fixed modes. Life would be easier if
> userspace was required to provide the desired fixed mode directly.
> But in order to do that we'd need to introduce new uapi properties
> to control the pfit aspect of this, and we'd probably need a new
> client cap to select between the old and new userspace behaviour.
> Something to consider in the future...
>
> v2: Rebase due to earlier changes to VRR fixed mode selection
>
> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> #v1
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_panel.c | 42 ++++++++++++++++++++--
> 1 file changed, 39 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
> index faa24537ef63..81e638d0c7b3 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -72,9 +72,20 @@ static bool is_best_fixed_mode(struct intel_connector *connector,
> abs(drm_mode_vrefresh(best_mode) - vrefresh);
> }
>
> +static bool is_vrr_compatible(const struct drm_display_mode *mode1,
> + const struct drm_display_mode *mode2)
> +{
> + return drm_mode_match(mode1, mode2,
> + DRM_MODE_MATCH_CLOCK |
> + DRM_MODE_MATCH_TIMINGS_VRR |
> + DRM_MODE_MATCH_FLAGS |
> + DRM_MODE_MATCH_3D_FLAGS);
> +}
> +
> static const struct drm_display_mode *
> intel_panel_fixed_mode_vrr(struct intel_connector *connector,
> - const struct drm_display_mode *mode)
> + const struct drm_display_mode *mode,
> + const struct drm_display_mode *vrr_ref_mode)
> {
> const struct drm_display_mode *fixed_mode, *best_mode = NULL;
> int vrefresh = drm_mode_vrefresh(mode);
> @@ -82,6 +93,10 @@ intel_panel_fixed_mode_vrr(struct intel_connector *connector,
> if (!intel_vrr_is_in_range(connector, vrefresh))
> return NULL;
>
> + if (vrr_ref_mode &&
> + !intel_vrr_is_in_range(connector, drm_mode_vrefresh(vrr_ref_mode)))
> + return NULL;
> +
> list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
> int fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
>
> @@ -96,6 +111,10 @@ intel_panel_fixed_mode_vrr(struct intel_connector *connector,
> if (fixed_mode_vrefresh < vrefresh)
> continue;
>
> + if (vrr_ref_mode &&
> + !is_vrr_compatible(fixed_mode, vrr_ref_mode))
> + continue;
> +
> if (is_best_fixed_mode(connector, vrefresh,
> fixed_mode_vrefresh, best_mode))
> best_mode = fixed_mode;
> @@ -224,10 +243,27 @@ static int intel_panel_compute_config_vrr(struct intel_atomic_state *state,
> struct intel_connector *connector)
> {
> struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> - const struct drm_display_mode *fixed_mode;
> + const struct drm_display_mode *fixed_mode = NULL;
> int vrefresh, fixed_mode_vrefresh;
>
Perhaps an early return for if (!vrr_is_capable()) here will avoid two
calls for intel_panel_fixed_mode_vrr().
I leave it to you.
In any case the patch LGTM.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> - fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode);
> + /*
> + * Attempt a VRR based refresh rate change if possible
> + * when userspace has forbidden a full modeset.
> + */
> + if (!state->base.allow_modeset) {
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + const struct intel_crtc_state *old_crtc_state =
> + intel_atomic_get_old_crtc_state(state, crtc);
> +
> + if (old_crtc_state->hw.enable &&
> + old_crtc_state->uapi.encoder_mask == crtc_state->uapi.encoder_mask)
> + fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode,
> + &old_crtc_state->hw.adjusted_mode);
> + }
> +
> + if (!fixed_mode)
> + fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode, NULL);
> +
> if (!fixed_mode)
> return -EINVAL;
>
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v2 5/5] drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset
2026-06-23 4:28 ` Nautiyal, Ankit K
@ 2026-06-23 11:48 ` Ville Syrjälä
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjälä @ 2026-06-23 11:48 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx, intel-xe, dri-devel
On Tue, Jun 23, 2026 at 09:58:03AM +0530, Nautiyal, Ankit K wrote:
>
> On 6/23/2026 3:06 AM, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Adjust the panel fixed mode selection algorithm to only consider
> > fixed modes that are "VRR compatible" with the old fixed mode
> > when userspace doesn't want to allow full modesets. This will
> > allow a VRR based refresh rate changes (ie. just a change in
> > the vblank length) via the fastset path.
> >
> > When full modesets are allowed, we still use the original algorithm
> > as that may pick a fixed mode with a more optimal dotclock, potentially
> > leading to reduced power consumption.
> >
> > This approach works as long as userspace does the initial
> > allow_modeset=true commit using the highest refresh rate it will
> > want to use. Subsequent commits with allow_modeset=false can then
> > switch between lower refresh rates without blinks.
> >
> > One remaining hurdle we may need to solve is the guardband length.
> > Assuming the highest refresh rate vblank is too short for
> > intel_vrr_compute_optimized_guardband() the intitial guardband will
> > match the highest refresh rate vblank. A subsequent switch to a lower
> > refresh rate will then recompute the guardband and select a value
> > that is higher (since the vblank will be longer). The mismatch in
> > guardband lengths will prevent the fastset. We may either have to
> > preserve the original (sub-optimal) guardband, or we'll have to
> > revisit the idea of changing the guardband without a full modeset.
> >
> > Note that I'm not 100% happy with this solution because
> > intel_panel_fixed_mode() is no longer fully idempotent, but I wasn't
> > able to come up with anything truly better either :/ The simple
> > solution would be just to always pick the fixed mode with the highest
> > dotclock, but that could lead to increased power consumption even
> > when high refresh rates are never used.
> >
> > Perhaps the proper solution would be to just deprecate this
> > idea of taking in random modes for internal panels and then
> > cooking up a compatible fixed modes. Life would be easier if
> > userspace was required to provide the desired fixed mode directly.
> > But in order to do that we'd need to introduce new uapi properties
> > to control the pfit aspect of this, and we'd probably need a new
> > client cap to select between the old and new userspace behaviour.
> > Something to consider in the future...
> >
> > v2: Rebase due to earlier changes to VRR fixed mode selection
> >
> > Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> #v1
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_panel.c | 42 ++++++++++++++++++++--
> > 1 file changed, 39 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
> > index faa24537ef63..81e638d0c7b3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_panel.c
> > +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> > @@ -72,9 +72,20 @@ static bool is_best_fixed_mode(struct intel_connector *connector,
> > abs(drm_mode_vrefresh(best_mode) - vrefresh);
> > }
> >
> > +static bool is_vrr_compatible(const struct drm_display_mode *mode1,
> > + const struct drm_display_mode *mode2)
> > +{
> > + return drm_mode_match(mode1, mode2,
> > + DRM_MODE_MATCH_CLOCK |
> > + DRM_MODE_MATCH_TIMINGS_VRR |
> > + DRM_MODE_MATCH_FLAGS |
> > + DRM_MODE_MATCH_3D_FLAGS);
> > +}
> > +
> > static const struct drm_display_mode *
> > intel_panel_fixed_mode_vrr(struct intel_connector *connector,
> > - const struct drm_display_mode *mode)
> > + const struct drm_display_mode *mode,
> > + const struct drm_display_mode *vrr_ref_mode)
> > {
> > const struct drm_display_mode *fixed_mode, *best_mode = NULL;
> > int vrefresh = drm_mode_vrefresh(mode);
> > @@ -82,6 +93,10 @@ intel_panel_fixed_mode_vrr(struct intel_connector *connector,
> > if (!intel_vrr_is_in_range(connector, vrefresh))
> > return NULL;
> >
> > + if (vrr_ref_mode &&
> > + !intel_vrr_is_in_range(connector, drm_mode_vrefresh(vrr_ref_mode)))
> > + return NULL;
> > +
> > list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
> > int fixed_mode_vrefresh = drm_mode_vrefresh(fixed_mode);
> >
> > @@ -96,6 +111,10 @@ intel_panel_fixed_mode_vrr(struct intel_connector *connector,
> > if (fixed_mode_vrefresh < vrefresh)
> > continue;
> >
> > + if (vrr_ref_mode &&
> > + !is_vrr_compatible(fixed_mode, vrr_ref_mode))
> > + continue;
> > +
> > if (is_best_fixed_mode(connector, vrefresh,
> > fixed_mode_vrefresh, best_mode))
> > best_mode = fixed_mode;
> > @@ -224,10 +243,27 @@ static int intel_panel_compute_config_vrr(struct intel_atomic_state *state,
> > struct intel_connector *connector)
> > {
> > struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> > - const struct drm_display_mode *fixed_mode;
> > + const struct drm_display_mode *fixed_mode = NULL;
> > int vrefresh, fixed_mode_vrefresh;
> >
>
> Perhaps an early return for if (!vrr_is_capable()) here will avoid two
> calls for intel_panel_fixed_mode_vrr().
That's essentially the first thing intel_panel_fixed_mode_vrr() will
end up doing. Granted, we do go through a few extra functions calls
to get there, but I expect that to be negligible given we're about
to run through the whole state compute machinery anyway.
There are probably much more fruitful places to optimize if we were
to actually measure the whole thing.
>
> I leave it to you.
>
> In any case the patch LGTM.
>
> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Thanks.
>
> > - fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode);
> > + /*
> > + * Attempt a VRR based refresh rate change if possible
> > + * when userspace has forbidden a full modeset.
> > + */
> > + if (!state->base.allow_modeset) {
> > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > + const struct intel_crtc_state *old_crtc_state =
> > + intel_atomic_get_old_crtc_state(state, crtc);
> > +
> > + if (old_crtc_state->hw.enable &&
> > + old_crtc_state->uapi.encoder_mask == crtc_state->uapi.encoder_mask)
> > + fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode,
> > + &old_crtc_state->hw.adjusted_mode);
> > + }
> > +
> > + if (!fixed_mode)
> > + fixed_mode = intel_panel_fixed_mode_vrr(connector, adjusted_mode, NULL);
> > +
> > if (!fixed_mode)
> > return -EINVAL;
> >
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✗ CI.checkpatch: warning for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev2)
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (4 preceding siblings ...)
2026-06-22 21:36 ` [PATCH v2 5/5] drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset Ville Syrjala
@ 2026-06-22 21:42 ` Patchwork
2026-06-22 21:43 ` ✓ CI.KUnit: success " Patchwork
` (7 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-22 21:42 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev2)
URL : https://patchwork.freedesktop.org/series/168442/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 1b92a8f2aa7fdfca9d215dc42a554bd7e34036fb
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Tue Jun 23 00:36:02 2026 +0300
drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset
Adjust the panel fixed mode selection algorithm to only consider
fixed modes that are "VRR compatible" with the old fixed mode
when userspace doesn't want to allow full modesets. This will
allow a VRR based refresh rate changes (ie. just a change in
the vblank length) via the fastset path.
When full modesets are allowed, we still use the original algorithm
as that may pick a fixed mode with a more optimal dotclock, potentially
leading to reduced power consumption.
This approach works as long as userspace does the initial
allow_modeset=true commit using the highest refresh rate it will
want to use. Subsequent commits with allow_modeset=false can then
switch between lower refresh rates without blinks.
One remaining hurdle we may need to solve is the guardband length.
Assuming the highest refresh rate vblank is too short for
intel_vrr_compute_optimized_guardband() the intitial guardband will
match the highest refresh rate vblank. A subsequent switch to a lower
refresh rate will then recompute the guardband and select a value
that is higher (since the vblank will be longer). The mismatch in
guardband lengths will prevent the fastset. We may either have to
preserve the original (sub-optimal) guardband, or we'll have to
revisit the idea of changing the guardband without a full modeset.
Note that I'm not 100% happy with this solution because
intel_panel_fixed_mode() is no longer fully idempotent, but I wasn't
able to come up with anything truly better either :/ The simple
solution would be just to always pick the fixed mode with the highest
dotclock, but that could lead to increased power consumption even
when high refresh rates are never used.
Perhaps the proper solution would be to just deprecate this
idea of taking in random modes for internal panels and then
cooking up a compatible fixed modes. Life would be easier if
userspace was required to provide the desired fixed mode directly.
But in order to do that we'd need to introduce new uapi properties
to control the pfit aspect of this, and we'd probably need a new
client cap to select between the old and new userspace behaviour.
Something to consider in the future...
v2: Rebase due to earlier changes to VRR fixed mode selection
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+ /mt/dim checkpatch 6583dd200482a34bb17e5dc54551f91f53b79798 drm-intel
e4fba8b75e7b drm/i915/panel: Split VRR vs. fixed refresh rate fixed mode selection into separate stages
27561c67968a drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
e87c3f09bdb9 drm/i915: Pass the full atomic state to .compute_config()
-:174: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#174: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:181:
+ int (*compute_config)(struct intel_atomic_state *,
-:174: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#174: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:181:
+ int (*compute_config)(struct intel_atomic_state *,
-:174: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_crtc_state *' should also have an identifier name
#174: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:181:
+ int (*compute_config)(struct intel_atomic_state *,
-:174: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct drm_connector_state *' should also have an identifier name
#174: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:181:
+ int (*compute_config)(struct intel_atomic_state *,
-:179: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#179: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:185:
+ int (*compute_config_late)(struct intel_atomic_state *,
-:179: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#179: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:185:
+ int (*compute_config_late)(struct intel_atomic_state *,
-:179: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_crtc_state *' should also have an identifier name
#179: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:185:
+ int (*compute_config_late)(struct intel_atomic_state *,
-:179: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct drm_connector_state *' should also have an identifier name
#179: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:185:
+ int (*compute_config_late)(struct intel_atomic_state *,
total: 0 errors, 8 warnings, 0 checks, 224 lines checked
f04a4bbfd6a6 drm/i915/panel: Adjust intel_panel_compute_config() calling convention
1b92a8f2aa7f drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ CI.KUnit: success for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev2)
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (5 preceding siblings ...)
2026-06-22 21:42 ` ✗ CI.checkpatch: warning for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev2) Patchwork
@ 2026-06-22 21:43 ` Patchwork
2026-06-22 22:39 ` ✓ Xe.CI.BAT: " Patchwork
` (6 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-22 21:43 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev2)
URL : https://patchwork.freedesktop.org/series/168442/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[21:42:35] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:42:39] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:43:10] Starting KUnit Kernel (1/1)...
[21:43:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:43:11] ================== guc_buf (11 subtests) ===================
[21:43:11] [PASSED] test_smallest
[21:43:11] [PASSED] test_largest
[21:43:11] [PASSED] test_granular
[21:43:11] [PASSED] test_unique
[21:43:11] [PASSED] test_overlap
[21:43:11] [PASSED] test_reusable
[21:43:11] [PASSED] test_too_big
[21:43:11] [PASSED] test_flush
[21:43:11] [PASSED] test_lookup
[21:43:11] [PASSED] test_data
[21:43:11] [PASSED] test_class
[21:43:11] ===================== [PASSED] guc_buf =====================
[21:43:11] =================== guc_dbm (7 subtests) ===================
[21:43:11] [PASSED] test_empty
[21:43:11] [PASSED] test_default
[21:43:11] ======================== test_size ========================
[21:43:11] [PASSED] 4
[21:43:11] [PASSED] 8
[21:43:11] [PASSED] 32
[21:43:11] [PASSED] 256
[21:43:11] ==================== [PASSED] test_size ====================
[21:43:11] ======================= test_reuse ========================
[21:43:11] [PASSED] 4
[21:43:11] [PASSED] 8
[21:43:11] [PASSED] 32
[21:43:11] [PASSED] 256
[21:43:11] =================== [PASSED] test_reuse ====================
[21:43:11] =================== test_range_overlap ====================
[21:43:11] [PASSED] 4
[21:43:11] [PASSED] 8
[21:43:11] [PASSED] 32
[21:43:11] [PASSED] 256
[21:43:11] =============== [PASSED] test_range_overlap ================
[21:43:11] =================== test_range_compact ====================
[21:43:11] [PASSED] 4
[21:43:11] [PASSED] 8
[21:43:11] [PASSED] 32
[21:43:11] [PASSED] 256
[21:43:11] =============== [PASSED] test_range_compact ================
[21:43:11] ==================== test_range_spare =====================
[21:43:11] [PASSED] 4
[21:43:11] [PASSED] 8
[21:43:11] [PASSED] 32
[21:43:11] [PASSED] 256
[21:43:11] ================ [PASSED] test_range_spare =================
[21:43:11] ===================== [PASSED] guc_dbm =====================
[21:43:11] =================== guc_idm (6 subtests) ===================
[21:43:11] [PASSED] bad_init
[21:43:11] [PASSED] no_init
[21:43:11] [PASSED] init_fini
[21:43:11] [PASSED] check_used
[21:43:11] [PASSED] check_quota
[21:43:11] [PASSED] check_all
[21:43:11] ===================== [PASSED] guc_idm =====================
[21:43:11] ================== no_relay (3 subtests) ===================
[21:43:11] [PASSED] xe_drops_guc2pf_if_not_ready
[21:43:11] [PASSED] xe_drops_guc2vf_if_not_ready
[21:43:11] [PASSED] xe_rejects_send_if_not_ready
[21:43:11] ==================== [PASSED] no_relay =====================
[21:43:11] ================== pf_relay (14 subtests) ==================
[21:43:11] [PASSED] pf_rejects_guc2pf_too_short
[21:43:11] [PASSED] pf_rejects_guc2pf_too_long
[21:43:11] [PASSED] pf_rejects_guc2pf_no_payload
[21:43:11] [PASSED] pf_fails_no_payload
[21:43:11] [PASSED] pf_fails_bad_origin
[21:43:11] [PASSED] pf_fails_bad_type
[21:43:11] [PASSED] pf_txn_reports_error
[21:43:11] [PASSED] pf_txn_sends_pf2guc
[21:43:11] [PASSED] pf_sends_pf2guc
[21:43:11] [SKIPPED] pf_loopback_nop
[21:43:11] [SKIPPED] pf_loopback_echo
[21:43:11] [SKIPPED] pf_loopback_fail
[21:43:11] [SKIPPED] pf_loopback_busy
[21:43:11] [SKIPPED] pf_loopback_retry
[21:43:11] ==================== [PASSED] pf_relay =====================
[21:43:11] ================== vf_relay (3 subtests) ===================
[21:43:11] [PASSED] vf_rejects_guc2vf_too_short
[21:43:11] [PASSED] vf_rejects_guc2vf_too_long
[21:43:11] [PASSED] vf_rejects_guc2vf_no_payload
[21:43:11] ==================== [PASSED] vf_relay =====================
[21:43:11] ================ pf_gt_config (9 subtests) =================
[21:43:11] [PASSED] fair_contexts_1vf
[21:43:11] [PASSED] fair_doorbells_1vf
[21:43:11] [PASSED] fair_ggtt_1vf
[21:43:11] ====================== fair_vram_1vf ======================
[21:43:11] [PASSED] 3.50 GiB
[21:43:11] [PASSED] 11.5 GiB
[21:43:11] [PASSED] 15.5 GiB
[21:43:11] [PASSED] 31.5 GiB
[21:43:11] [PASSED] 63.5 GiB
[21:43:11] [PASSED] 1.91 GiB
[21:43:11] ================== [PASSED] fair_vram_1vf ==================
[21:43:11] ================ fair_vram_1vf_admin_only =================
[21:43:11] [PASSED] 3.50 GiB
[21:43:11] [PASSED] 11.5 GiB
[21:43:11] [PASSED] 15.5 GiB
[21:43:11] [PASSED] 31.5 GiB
[21:43:11] [PASSED] 63.5 GiB
[21:43:11] [PASSED] 1.91 GiB
[21:43:11] ============ [PASSED] fair_vram_1vf_admin_only =============
[21:43:11] ====================== fair_contexts ======================
[21:43:11] [PASSED] 1 VF
[21:43:11] [PASSED] 2 VFs
[21:43:11] [PASSED] 3 VFs
[21:43:11] [PASSED] 4 VFs
[21:43:11] [PASSED] 5 VFs
[21:43:11] [PASSED] 6 VFs
[21:43:11] [PASSED] 7 VFs
[21:43:11] [PASSED] 8 VFs
[21:43:11] [PASSED] 9 VFs
[21:43:11] [PASSED] 10 VFs
[21:43:11] [PASSED] 11 VFs
[21:43:11] [PASSED] 12 VFs
[21:43:11] [PASSED] 13 VFs
[21:43:11] [PASSED] 14 VFs
[21:43:11] [PASSED] 15 VFs
[21:43:11] [PASSED] 16 VFs
[21:43:11] [PASSED] 17 VFs
[21:43:11] [PASSED] 18 VFs
[21:43:11] [PASSED] 19 VFs
[21:43:11] [PASSED] 20 VFs
[21:43:11] [PASSED] 21 VFs
[21:43:11] [PASSED] 22 VFs
[21:43:11] [PASSED] 23 VFs
[21:43:11] [PASSED] 24 VFs
[21:43:11] [PASSED] 25 VFs
[21:43:11] [PASSED] 26 VFs
[21:43:11] [PASSED] 27 VFs
[21:43:11] [PASSED] 28 VFs
[21:43:11] [PASSED] 29 VFs
[21:43:11] [PASSED] 30 VFs
[21:43:11] [PASSED] 31 VFs
[21:43:11] [PASSED] 32 VFs
[21:43:11] [PASSED] 33 VFs
[21:43:11] [PASSED] 34 VFs
[21:43:11] [PASSED] 35 VFs
[21:43:11] [PASSED] 36 VFs
[21:43:11] [PASSED] 37 VFs
[21:43:11] [PASSED] 38 VFs
[21:43:11] [PASSED] 39 VFs
[21:43:11] [PASSED] 40 VFs
[21:43:11] [PASSED] 41 VFs
[21:43:11] [PASSED] 42 VFs
[21:43:11] [PASSED] 43 VFs
[21:43:11] [PASSED] 44 VFs
[21:43:11] [PASSED] 45 VFs
[21:43:11] [PASSED] 46 VFs
[21:43:11] [PASSED] 47 VFs
[21:43:11] [PASSED] 48 VFs
[21:43:11] [PASSED] 49 VFs
[21:43:11] [PASSED] 50 VFs
[21:43:11] [PASSED] 51 VFs
[21:43:11] [PASSED] 52 VFs
[21:43:11] [PASSED] 53 VFs
[21:43:11] [PASSED] 54 VFs
[21:43:11] [PASSED] 55 VFs
[21:43:11] [PASSED] 56 VFs
[21:43:11] [PASSED] 57 VFs
[21:43:11] [PASSED] 58 VFs
[21:43:11] [PASSED] 59 VFs
[21:43:11] [PASSED] 60 VFs
[21:43:11] [PASSED] 61 VFs
[21:43:11] [PASSED] 62 VFs
[21:43:11] [PASSED] 63 VFs
[21:43:11] ================== [PASSED] fair_contexts ==================
[21:43:11] ===================== fair_doorbells ======================
[21:43:11] [PASSED] 1 VF
[21:43:11] [PASSED] 2 VFs
[21:43:11] [PASSED] 3 VFs
[21:43:11] [PASSED] 4 VFs
[21:43:11] [PASSED] 5 VFs
[21:43:11] [PASSED] 6 VFs
[21:43:11] [PASSED] 7 VFs
[21:43:11] [PASSED] 8 VFs
[21:43:11] [PASSED] 9 VFs
[21:43:11] [PASSED] 10 VFs
[21:43:11] [PASSED] 11 VFs
[21:43:11] [PASSED] 12 VFs
[21:43:11] [PASSED] 13 VFs
[21:43:11] [PASSED] 14 VFs
[21:43:11] [PASSED] 15 VFs
[21:43:11] [PASSED] 16 VFs
[21:43:11] [PASSED] 17 VFs
[21:43:11] [PASSED] 18 VFs
[21:43:11] [PASSED] 19 VFs
[21:43:11] [PASSED] 20 VFs
[21:43:11] [PASSED] 21 VFs
[21:43:11] [PASSED] 22 VFs
[21:43:11] [PASSED] 23 VFs
[21:43:11] [PASSED] 24 VFs
[21:43:11] [PASSED] 25 VFs
[21:43:11] [PASSED] 26 VFs
[21:43:11] [PASSED] 27 VFs
[21:43:11] [PASSED] 28 VFs
[21:43:11] [PASSED] 29 VFs
[21:43:11] [PASSED] 30 VFs
[21:43:11] [PASSED] 31 VFs
[21:43:11] [PASSED] 32 VFs
[21:43:11] [PASSED] 33 VFs
[21:43:11] [PASSED] 34 VFs
[21:43:11] [PASSED] 35 VFs
[21:43:11] [PASSED] 36 VFs
[21:43:11] [PASSED] 37 VFs
[21:43:11] [PASSED] 38 VFs
[21:43:11] [PASSED] 39 VFs
[21:43:11] [PASSED] 40 VFs
[21:43:11] [PASSED] 41 VFs
[21:43:11] [PASSED] 42 VFs
[21:43:11] [PASSED] 43 VFs
[21:43:11] [PASSED] 44 VFs
[21:43:11] [PASSED] 45 VFs
[21:43:11] [PASSED] 46 VFs
[21:43:11] [PASSED] 47 VFs
[21:43:11] [PASSED] 48 VFs
[21:43:11] [PASSED] 49 VFs
[21:43:11] [PASSED] 50 VFs
[21:43:11] [PASSED] 51 VFs
[21:43:11] [PASSED] 52 VFs
[21:43:11] [PASSED] 53 VFs
[21:43:11] [PASSED] 54 VFs
[21:43:11] [PASSED] 55 VFs
[21:43:11] [PASSED] 56 VFs
[21:43:11] [PASSED] 57 VFs
[21:43:11] [PASSED] 58 VFs
[21:43:11] [PASSED] 59 VFs
[21:43:11] [PASSED] 60 VFs
[21:43:11] [PASSED] 61 VFs
[21:43:11] [PASSED] 62 VFs
[21:43:11] [PASSED] 63 VFs
[21:43:11] ================= [PASSED] fair_doorbells ==================
[21:43:11] ======================== fair_ggtt ========================
[21:43:11] [PASSED] 1 VF
[21:43:11] [PASSED] 2 VFs
[21:43:11] [PASSED] 3 VFs
[21:43:11] [PASSED] 4 VFs
[21:43:11] [PASSED] 5 VFs
[21:43:11] [PASSED] 6 VFs
[21:43:11] [PASSED] 7 VFs
[21:43:11] [PASSED] 8 VFs
[21:43:11] [PASSED] 9 VFs
[21:43:11] [PASSED] 10 VFs
[21:43:11] [PASSED] 11 VFs
[21:43:11] [PASSED] 12 VFs
[21:43:11] [PASSED] 13 VFs
[21:43:11] [PASSED] 14 VFs
[21:43:11] [PASSED] 15 VFs
[21:43:11] [PASSED] 16 VFs
[21:43:11] [PASSED] 17 VFs
[21:43:11] [PASSED] 18 VFs
[21:43:11] [PASSED] 19 VFs
[21:43:11] [PASSED] 20 VFs
[21:43:11] [PASSED] 21 VFs
[21:43:11] [PASSED] 22 VFs
[21:43:11] [PASSED] 23 VFs
[21:43:11] [PASSED] 24 VFs
[21:43:11] [PASSED] 25 VFs
[21:43:11] [PASSED] 26 VFs
[21:43:11] [PASSED] 27 VFs
[21:43:11] [PASSED] 28 VFs
[21:43:11] [PASSED] 29 VFs
[21:43:11] [PASSED] 30 VFs
[21:43:11] [PASSED] 31 VFs
[21:43:11] [PASSED] 32 VFs
[21:43:11] [PASSED] 33 VFs
[21:43:11] [PASSED] 34 VFs
[21:43:11] [PASSED] 35 VFs
[21:43:11] [PASSED] 36 VFs
[21:43:11] [PASSED] 37 VFs
[21:43:11] [PASSED] 38 VFs
[21:43:11] [PASSED] 39 VFs
[21:43:11] [PASSED] 40 VFs
[21:43:11] [PASSED] 41 VFs
[21:43:11] [PASSED] 42 VFs
[21:43:11] [PASSED] 43 VFs
[21:43:11] [PASSED] 44 VFs
[21:43:11] [PASSED] 45 VFs
[21:43:11] [PASSED] 46 VFs
[21:43:11] [PASSED] 47 VFs
[21:43:11] [PASSED] 48 VFs
[21:43:11] [PASSED] 49 VFs
[21:43:11] [PASSED] 50 VFs
[21:43:11] [PASSED] 51 VFs
[21:43:11] [PASSED] 52 VFs
[21:43:11] [PASSED] 53 VFs
[21:43:11] [PASSED] 54 VFs
[21:43:11] [PASSED] 55 VFs
[21:43:11] [PASSED] 56 VFs
[21:43:11] [PASSED] 57 VFs
[21:43:11] [PASSED] 58 VFs
[21:43:11] [PASSED] 59 VFs
[21:43:11] [PASSED] 60 VFs
[21:43:11] [PASSED] 61 VFs
[21:43:11] [PASSED] 62 VFs
[21:43:11] [PASSED] 63 VFs
[21:43:11] ==================== [PASSED] fair_ggtt ====================
[21:43:11] ======================== fair_vram ========================
[21:43:11] [PASSED] 1 VF
[21:43:11] [PASSED] 2 VFs
[21:43:11] [PASSED] 3 VFs
[21:43:11] [PASSED] 4 VFs
[21:43:11] [PASSED] 5 VFs
[21:43:11] [PASSED] 6 VFs
[21:43:11] [PASSED] 7 VFs
[21:43:11] [PASSED] 8 VFs
[21:43:11] [PASSED] 9 VFs
[21:43:11] [PASSED] 10 VFs
[21:43:11] [PASSED] 11 VFs
[21:43:11] [PASSED] 12 VFs
[21:43:11] [PASSED] 13 VFs
[21:43:11] [PASSED] 14 VFs
[21:43:11] [PASSED] 15 VFs
[21:43:11] [PASSED] 16 VFs
[21:43:11] [PASSED] 17 VFs
[21:43:11] [PASSED] 18 VFs
[21:43:11] [PASSED] 19 VFs
[21:43:11] [PASSED] 20 VFs
[21:43:11] [PASSED] 21 VFs
[21:43:11] [PASSED] 22 VFs
[21:43:11] [PASSED] 23 VFs
[21:43:11] [PASSED] 24 VFs
[21:43:11] [PASSED] 25 VFs
[21:43:11] [PASSED] 26 VFs
[21:43:11] [PASSED] 27 VFs
[21:43:11] [PASSED] 28 VFs
[21:43:11] [PASSED] 29 VFs
[21:43:11] [PASSED] 30 VFs
[21:43:11] [PASSED] 31 VFs
[21:43:11] [PASSED] 32 VFs
[21:43:11] [PASSED] 33 VFs
[21:43:11] [PASSED] 34 VFs
[21:43:11] [PASSED] 35 VFs
[21:43:11] [PASSED] 36 VFs
[21:43:11] [PASSED] 37 VFs
[21:43:11] [PASSED] 38 VFs
[21:43:11] [PASSED] 39 VFs
[21:43:11] [PASSED] 40 VFs
[21:43:11] [PASSED] 41 VFs
[21:43:11] [PASSED] 42 VFs
[21:43:11] [PASSED] 43 VFs
[21:43:11] [PASSED] 44 VFs
[21:43:11] [PASSED] 45 VFs
[21:43:11] [PASSED] 46 VFs
[21:43:11] [PASSED] 47 VFs
[21:43:11] [PASSED] 48 VFs
[21:43:11] [PASSED] 49 VFs
[21:43:11] [PASSED] 50 VFs
[21:43:11] [PASSED] 51 VFs
[21:43:11] [PASSED] 52 VFs
[21:43:11] [PASSED] 53 VFs
[21:43:11] [PASSED] 54 VFs
[21:43:11] [PASSED] 55 VFs
[21:43:11] [PASSED] 56 VFs
[21:43:11] [PASSED] 57 VFs
[21:43:11] [PASSED] 58 VFs
[21:43:11] [PASSED] 59 VFs
[21:43:11] [PASSED] 60 VFs
[21:43:11] [PASSED] 61 VFs
[21:43:11] [PASSED] 62 VFs
[21:43:11] [PASSED] 63 VFs
[21:43:11] ==================== [PASSED] fair_vram ====================
[21:43:11] ================== [PASSED] pf_gt_config ===================
[21:43:11] ===================== lmtt (1 subtest) =====================
[21:43:11] ======================== test_ops =========================
[21:43:11] [PASSED] 2-level
[21:43:11] [PASSED] multi-level
[21:43:11] ==================== [PASSED] test_ops =====================
[21:43:11] ====================== [PASSED] lmtt =======================
[21:43:11] ================= pf_service (11 subtests) =================
[21:43:11] [PASSED] pf_negotiate_any
[21:43:11] [PASSED] pf_negotiate_base_match
[21:43:11] [PASSED] pf_negotiate_base_newer
[21:43:11] [PASSED] pf_negotiate_base_next
[21:43:11] [SKIPPED] pf_negotiate_base_older
[21:43:11] [PASSED] pf_negotiate_base_prev
[21:43:11] [PASSED] pf_negotiate_latest_match
[21:43:11] [PASSED] pf_negotiate_latest_newer
[21:43:11] [PASSED] pf_negotiate_latest_next
[21:43:11] [SKIPPED] pf_negotiate_latest_older
[21:43:11] [SKIPPED] pf_negotiate_latest_prev
[21:43:11] =================== [PASSED] pf_service ====================
[21:43:11] ================= xe_guc_g2g (2 subtests) ==================
[21:43:11] ============== xe_live_guc_g2g_kunit_default ==============
[21:43:11] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[21:43:11] ============== xe_live_guc_g2g_kunit_allmem ===============
[21:43:11] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[21:43:11] =================== [SKIPPED] xe_guc_g2g ===================
[21:43:11] =================== xe_mocs (2 subtests) ===================
[21:43:11] ================ xe_live_mocs_kernel_kunit ================
[21:43:11] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[21:43:11] ================ xe_live_mocs_reset_kunit =================
[21:43:11] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[21:43:11] ==================== [SKIPPED] xe_mocs =====================
[21:43:11] ================= xe_migrate (2 subtests) ==================
[21:43:11] ================= xe_migrate_sanity_kunit =================
[21:43:11] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[21:43:11] ================== xe_validate_ccs_kunit ==================
[21:43:11] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[21:43:11] =================== [SKIPPED] xe_migrate ===================
[21:43:11] ================== xe_dma_buf (1 subtest) ==================
[21:43:11] ==================== xe_dma_buf_kunit =====================
[21:43:11] ================ [SKIPPED] xe_dma_buf_kunit ================
[21:43:11] =================== [SKIPPED] xe_dma_buf ===================
[21:43:11] ================= xe_bo_shrink (1 subtest) =================
[21:43:11] =================== xe_bo_shrink_kunit ====================
[21:43:11] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[21:43:11] ================== [SKIPPED] xe_bo_shrink ==================
[21:43:11] ==================== xe_bo (2 subtests) ====================
[21:43:11] ================== xe_ccs_migrate_kunit ===================
[21:43:11] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[21:43:11] ==================== xe_bo_evict_kunit ====================
[21:43:11] =============== [SKIPPED] xe_bo_evict_kunit ================
[21:43:11] ===================== [SKIPPED] xe_bo ======================
[21:43:11] ==================== args (13 subtests) ====================
[21:43:11] [PASSED] count_args_test
[21:43:11] [PASSED] call_args_example
[21:43:11] [PASSED] call_args_test
[21:43:11] [PASSED] drop_first_arg_example
[21:43:11] [PASSED] drop_first_arg_test
[21:43:11] [PASSED] first_arg_example
[21:43:11] [PASSED] first_arg_test
[21:43:11] [PASSED] last_arg_example
[21:43:11] [PASSED] last_arg_test
[21:43:11] [PASSED] pick_arg_example
[21:43:11] [PASSED] if_args_example
[21:43:11] [PASSED] if_args_test
[21:43:11] [PASSED] sep_comma_example
[21:43:11] ====================== [PASSED] args =======================
[21:43:11] =================== xe_pci (3 subtests) ====================
[21:43:11] ==================== check_graphics_ip ====================
[21:43:11] [PASSED] 12.00 Xe_LP
[21:43:11] [PASSED] 12.10 Xe_LP+
[21:43:11] [PASSED] 12.55 Xe_HPG
[21:43:11] [PASSED] 12.60 Xe_HPC
[21:43:11] [PASSED] 12.70 Xe_LPG
[21:43:11] [PASSED] 12.71 Xe_LPG
[21:43:11] [PASSED] 12.74 Xe_LPG+
[21:43:11] [PASSED] 20.01 Xe2_HPG
[21:43:11] [PASSED] 20.02 Xe2_HPG
[21:43:11] [PASSED] 20.04 Xe2_LPG
[21:43:11] [PASSED] 30.00 Xe3_LPG
[21:43:11] [PASSED] 30.01 Xe3_LPG
[21:43:11] [PASSED] 30.03 Xe3_LPG
[21:43:11] [PASSED] 30.04 Xe3_LPG
[21:43:11] [PASSED] 30.05 Xe3_LPG
[21:43:11] [PASSED] 35.10 Xe3p_LPG
[21:43:11] [PASSED] 35.11 Xe3p_XPC
[21:43:11] ================ [PASSED] check_graphics_ip ================
[21:43:11] ===================== check_media_ip ======================
[21:43:11] [PASSED] 12.00 Xe_M
[21:43:11] [PASSED] 12.55 Xe_HPM
[21:43:11] [PASSED] 13.00 Xe_LPM+
[21:43:11] [PASSED] 13.01 Xe2_HPM
[21:43:11] [PASSED] 20.00 Xe2_LPM
[21:43:11] [PASSED] 30.00 Xe3_LPM
[21:43:11] [PASSED] 30.02 Xe3_LPM
[21:43:11] [PASSED] 35.00 Xe3p_LPM
[21:43:11] [PASSED] 35.03 Xe3p_HPM
[21:43:11] ================= [PASSED] check_media_ip ==================
[21:43:11] =================== check_platform_desc ===================
[21:43:11] [PASSED] 0x9A60 (TIGERLAKE)
[21:43:11] [PASSED] 0x9A68 (TIGERLAKE)
[21:43:11] [PASSED] 0x9A70 (TIGERLAKE)
[21:43:11] [PASSED] 0x9A40 (TIGERLAKE)
[21:43:11] [PASSED] 0x9A49 (TIGERLAKE)
[21:43:11] [PASSED] 0x9A59 (TIGERLAKE)
[21:43:11] [PASSED] 0x9A78 (TIGERLAKE)
[21:43:11] [PASSED] 0x9AC0 (TIGERLAKE)
[21:43:11] [PASSED] 0x9AC9 (TIGERLAKE)
[21:43:11] [PASSED] 0x9AD9 (TIGERLAKE)
[21:43:11] [PASSED] 0x9AF8 (TIGERLAKE)
[21:43:11] [PASSED] 0x4C80 (ROCKETLAKE)
[21:43:11] [PASSED] 0x4C8A (ROCKETLAKE)
[21:43:11] [PASSED] 0x4C8B (ROCKETLAKE)
[21:43:11] [PASSED] 0x4C8C (ROCKETLAKE)
[21:43:11] [PASSED] 0x4C90 (ROCKETLAKE)
[21:43:11] [PASSED] 0x4C9A (ROCKETLAKE)
[21:43:11] [PASSED] 0x4680 (ALDERLAKE_S)
[21:43:11] [PASSED] 0x4682 (ALDERLAKE_S)
[21:43:11] [PASSED] 0x4688 (ALDERLAKE_S)
[21:43:11] [PASSED] 0x468A (ALDERLAKE_S)
[21:43:11] [PASSED] 0x468B (ALDERLAKE_S)
[21:43:11] [PASSED] 0x4690 (ALDERLAKE_S)
[21:43:11] [PASSED] 0x4692 (ALDERLAKE_S)
[21:43:11] [PASSED] 0x4693 (ALDERLAKE_S)
[21:43:11] [PASSED] 0x46A0 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46A1 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46A2 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46A3 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46A6 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46A8 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46AA (ALDERLAKE_P)
[21:43:11] [PASSED] 0x462A (ALDERLAKE_P)
[21:43:11] [PASSED] 0x4626 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x4628 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46B0 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46B1 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46B2 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46B3 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46C0 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46C1 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46C2 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46C3 (ALDERLAKE_P)
[21:43:11] [PASSED] 0x46D0 (ALDERLAKE_N)
[21:43:11] [PASSED] 0x46D1 (ALDERLAKE_N)
[21:43:11] [PASSED] 0x46D2 (ALDERLAKE_N)
[21:43:11] [PASSED] 0x46D3 (ALDERLAKE_N)
[21:43:11] [PASSED] 0x46D4 (ALDERLAKE_N)
[21:43:11] [PASSED] 0xA721 (ALDERLAKE_P)
[21:43:11] [PASSED] 0xA7A1 (ALDERLAKE_P)
[21:43:11] [PASSED] 0xA7A9 (ALDERLAKE_P)
[21:43:11] [PASSED] 0xA7AC (ALDERLAKE_P)
[21:43:11] [PASSED] 0xA7AD (ALDERLAKE_P)
[21:43:11] [PASSED] 0xA720 (ALDERLAKE_P)
[21:43:11] [PASSED] 0xA7A0 (ALDERLAKE_P)
[21:43:11] [PASSED] 0xA7A8 (ALDERLAKE_P)
[21:43:11] [PASSED] 0xA7AA (ALDERLAKE_P)
[21:43:11] [PASSED] 0xA7AB (ALDERLAKE_P)
[21:43:11] [PASSED] 0xA780 (ALDERLAKE_S)
[21:43:11] [PASSED] 0xA781 (ALDERLAKE_S)
[21:43:11] [PASSED] 0xA782 (ALDERLAKE_S)
[21:43:11] [PASSED] 0xA783 (ALDERLAKE_S)
[21:43:11] [PASSED] 0xA788 (ALDERLAKE_S)
[21:43:11] [PASSED] 0xA789 (ALDERLAKE_S)
[21:43:11] [PASSED] 0xA78A (ALDERLAKE_S)
[21:43:11] [PASSED] 0xA78B (ALDERLAKE_S)
[21:43:11] [PASSED] 0x4905 (DG1)
[21:43:11] [PASSED] 0x4906 (DG1)
[21:43:11] [PASSED] 0x4907 (DG1)
[21:43:11] [PASSED] 0x4908 (DG1)
[21:43:11] [PASSED] 0x4909 (DG1)
[21:43:11] [PASSED] 0x56C0 (DG2)
[21:43:11] [PASSED] 0x56C2 (DG2)
[21:43:11] [PASSED] 0x56C1 (DG2)
[21:43:11] [PASSED] 0x7D51 (METEORLAKE)
[21:43:11] [PASSED] 0x7DD1 (METEORLAKE)
[21:43:11] [PASSED] 0x7D41 (METEORLAKE)
[21:43:11] [PASSED] 0x7D67 (METEORLAKE)
[21:43:11] [PASSED] 0xB640 (METEORLAKE)
[21:43:11] [PASSED] 0x56A0 (DG2)
[21:43:11] [PASSED] 0x56A1 (DG2)
[21:43:11] [PASSED] 0x56A2 (DG2)
[21:43:11] [PASSED] 0x56BE (DG2)
[21:43:11] [PASSED] 0x56BF (DG2)
[21:43:11] [PASSED] 0x5690 (DG2)
[21:43:11] [PASSED] 0x5691 (DG2)
[21:43:11] [PASSED] 0x5692 (DG2)
[21:43:11] [PASSED] 0x56A5 (DG2)
[21:43:11] [PASSED] 0x56A6 (DG2)
[21:43:11] [PASSED] 0x56B0 (DG2)
[21:43:11] [PASSED] 0x56B1 (DG2)
[21:43:11] [PASSED] 0x56BA (DG2)
[21:43:11] [PASSED] 0x56BB (DG2)
[21:43:11] [PASSED] 0x56BC (DG2)
[21:43:11] [PASSED] 0x56BD (DG2)
[21:43:11] [PASSED] 0x5693 (DG2)
[21:43:11] [PASSED] 0x5694 (DG2)
[21:43:11] [PASSED] 0x5695 (DG2)
[21:43:11] [PASSED] 0x56A3 (DG2)
[21:43:11] [PASSED] 0x56A4 (DG2)
[21:43:11] [PASSED] 0x56B2 (DG2)
[21:43:11] [PASSED] 0x56B3 (DG2)
[21:43:11] [PASSED] 0x5696 (DG2)
[21:43:11] [PASSED] 0x5697 (DG2)
[21:43:11] [PASSED] 0xB69 (PVC)
[21:43:11] [PASSED] 0xB6E (PVC)
[21:43:11] [PASSED] 0xBD4 (PVC)
[21:43:11] [PASSED] 0xBD5 (PVC)
[21:43:11] [PASSED] 0xBD6 (PVC)
[21:43:11] [PASSED] 0xBD7 (PVC)
[21:43:11] [PASSED] 0xBD8 (PVC)
[21:43:11] [PASSED] 0xBD9 (PVC)
[21:43:11] [PASSED] 0xBDA (PVC)
[21:43:11] [PASSED] 0xBDB (PVC)
[21:43:11] [PASSED] 0xBE0 (PVC)
[21:43:11] [PASSED] 0xBE1 (PVC)
[21:43:11] [PASSED] 0xBE5 (PVC)
[21:43:11] [PASSED] 0x7D40 (METEORLAKE)
[21:43:11] [PASSED] 0x7D45 (METEORLAKE)
[21:43:11] [PASSED] 0x7D55 (METEORLAKE)
[21:43:11] [PASSED] 0x7D60 (METEORLAKE)
[21:43:11] [PASSED] 0x7DD5 (METEORLAKE)
[21:43:11] [PASSED] 0x6420 (LUNARLAKE)
[21:43:11] [PASSED] 0x64A0 (LUNARLAKE)
[21:43:11] [PASSED] 0x64B0 (LUNARLAKE)
[21:43:11] [PASSED] 0xE202 (BATTLEMAGE)
[21:43:11] [PASSED] 0xE209 (BATTLEMAGE)
[21:43:11] [PASSED] 0xE20B (BATTLEMAGE)
[21:43:11] [PASSED] 0xE20C (BATTLEMAGE)
[21:43:11] [PASSED] 0xE20D (BATTLEMAGE)
[21:43:11] [PASSED] 0xE210 (BATTLEMAGE)
[21:43:11] [PASSED] 0xE211 (BATTLEMAGE)
[21:43:11] [PASSED] 0xE212 (BATTLEMAGE)
[21:43:11] [PASSED] 0xE216 (BATTLEMAGE)
[21:43:11] [PASSED] 0xE220 (BATTLEMAGE)
[21:43:11] [PASSED] 0xE221 (BATTLEMAGE)
[21:43:11] [PASSED] 0xE222 (BATTLEMAGE)
[21:43:11] [PASSED] 0xE223 (BATTLEMAGE)
[21:43:11] [PASSED] 0xB080 (PANTHERLAKE)
[21:43:11] [PASSED] 0xB081 (PANTHERLAKE)
[21:43:11] [PASSED] 0xB082 (PANTHERLAKE)
[21:43:11] [PASSED] 0xB083 (PANTHERLAKE)
[21:43:11] [PASSED] 0xB084 (PANTHERLAKE)
[21:43:11] [PASSED] 0xB085 (PANTHERLAKE)
[21:43:11] [PASSED] 0xB086 (PANTHERLAKE)
[21:43:11] [PASSED] 0xB087 (PANTHERLAKE)
[21:43:11] [PASSED] 0xB08F (PANTHERLAKE)
[21:43:11] [PASSED] 0xB090 (PANTHERLAKE)
[21:43:11] [PASSED] 0xB0A0 (PANTHERLAKE)
[21:43:11] [PASSED] 0xB0B0 (PANTHERLAKE)
[21:43:11] [PASSED] 0xFD80 (PANTHERLAKE)
[21:43:11] [PASSED] 0xFD81 (PANTHERLAKE)
[21:43:11] [PASSED] 0xD740 (NOVALAKE_S)
[21:43:11] [PASSED] 0xD741 (NOVALAKE_S)
[21:43:11] [PASSED] 0xD742 (NOVALAKE_S)
[21:43:11] [PASSED] 0xD743 (NOVALAKE_S)
[21:43:11] [PASSED] 0xD745 (NOVALAKE_S)
[21:43:11] [PASSED] 0xD74A (NOVALAKE_S)
[21:43:11] [PASSED] 0xD74B (NOVALAKE_S)
[21:43:11] [PASSED] 0x674C (CRESCENTISLAND)
[21:43:11] [PASSED] 0x674D (CRESCENTISLAND)
[21:43:11] [PASSED] 0x674E (CRESCENTISLAND)
[21:43:11] [PASSED] 0x674F (CRESCENTISLAND)
[21:43:11] [PASSED] 0x6750 (CRESCENTISLAND)
[21:43:11] [PASSED] 0xD750 (NOVALAKE_P)
[21:43:11] [PASSED] 0xD751 (NOVALAKE_P)
[21:43:11] [PASSED] 0xD752 (NOVALAKE_P)
[21:43:11] [PASSED] 0xD753 (NOVALAKE_P)
[21:43:11] [PASSED] 0xD754 (NOVALAKE_P)
[21:43:11] [PASSED] 0xD755 (NOVALAKE_P)
[21:43:11] [PASSED] 0xD756 (NOVALAKE_P)
[21:43:11] [PASSED] 0xD757 (NOVALAKE_P)
[21:43:11] [PASSED] 0xD75F (NOVALAKE_P)
[21:43:11] =============== [PASSED] check_platform_desc ===============
[21:43:11] ===================== [PASSED] xe_pci ======================
[21:43:11] ============= xe_rtp_tables_test (4 subtests) ==============
[21:43:11] ================== xe_rtp_table_gt_test ===================
[21:43:11] [PASSED] gt_was/14011060649
[21:43:11] [PASSED] gt_was/14011059788
[21:43:11] [PASSED] gt_was/14015795083
[21:43:11] [PASSED] gt_was/16021867713
[21:43:11] [PASSED] gt_was/14019449301
[21:43:11] [PASSED] gt_was/16028005424
[21:43:11] [PASSED] gt_was/14026578760
[21:43:11] [PASSED] gt_was/1409420604
[21:43:11] [PASSED] gt_was/1408615072
[21:43:11] [PASSED] gt_was/22010523718
[21:43:11] [PASSED] gt_was/14011006942
[21:43:11] [PASSED] gt_was/14014830051
[21:43:11] [PASSED] gt_was/18018781329
[21:43:11] [PASSED] gt_was/1509235366
[21:43:11] [PASSED] gt_was/18018781329
[21:43:11] [PASSED] gt_was/16016694945
[21:43:11] [PASSED] gt_was/14018575942
[21:43:11] [PASSED] gt_was/22016670082
[21:43:11] [PASSED] gt_was/22016670082
[21:43:11] [PASSED] gt_was/14017421178
[21:43:11] [PASSED] gt_was/16025250150
[21:43:11] [PASSED] gt_was/14021871409
[21:43:11] [PASSED] gt_was/16021865536
[21:43:11] [PASSED] gt_was/14021486841
[21:43:11] [PASSED] gt_was/14025160223
[21:43:11] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[21:43:11] [PASSED] gt_was/14025635424
[21:43:11] [PASSED] gt_was/16028005424
[21:43:11] ============== [PASSED] xe_rtp_table_gt_test ===============
[21:43:11] ================== xe_rtp_table_gt_test ===================
[21:43:11] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[21:43:11] [PASSED] gt_tunings/Tuning: 32B Access Enable
[21:43:11] [PASSED] gt_tunings/Tuning: L3 cache
[21:43:11] [PASSED] gt_tunings/Tuning: L3 cache - media
[21:43:11] [PASSED] gt_tunings/Tuning: Compression Overfetch
[21:43:11] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[21:43:11] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[21:43:11] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[21:43:11] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[21:43:11] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[21:43:11] [PASSED] gt_tunings/Tuning: Stateless compression control
[21:43:11] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[21:43:11] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[21:43:11] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[21:43:11] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[21:43:11] ============== [PASSED] xe_rtp_table_gt_test ===============
[21:43:11] ================== xe_rtp_table_oob_test ==================
[21:43:11] [PASSED] oob_was/1607983814
[21:43:11] [PASSED] oob_was/16010904313
[21:43:11] [PASSED] oob_was/18022495364
[21:43:11] [PASSED] oob_was/22012773006
[21:43:11] [PASSED] oob_was/14014475959
[21:43:11] [PASSED] oob_was/22011391025
[21:43:11] [PASSED] oob_was/22012727170
[21:43:11] [PASSED] oob_was/22012727685
[21:43:11] [PASSED] oob_was/22016596838
[21:43:11] [PASSED] oob_was/18020744125
[21:43:11] [PASSED] oob_was/1409600907
[21:43:11] [PASSED] oob_was/22014953428
[21:43:11] [PASSED] oob_was/16017236439
[21:43:11] [PASSED] oob_was/14019821291
[21:43:11] [PASSED] oob_was/14015076503
[21:43:11] [PASSED] oob_was/14018913170
[21:43:11] [PASSED] oob_was/14018094691
[21:43:11] [PASSED] oob_was/18024947630
[21:43:11] [PASSED] oob_was/16022287689
[21:43:11] [PASSED] oob_was/13011645652
[21:43:11] [PASSED] oob_was/14022293748
[21:43:11] [PASSED] oob_was/22019794406
[21:43:11] [PASSED] oob_was/22019338487
[21:43:11] [PASSED] oob_was/16023588340
[21:43:11] [PASSED] oob_was/14019789679
[21:43:11] [PASSED] oob_was/14022866841
[21:43:11] [PASSED] oob_was/16021333562
[21:43:11] [PASSED] oob_was/14016712196
[21:43:11] [PASSED] oob_was/14015568240
[21:43:11] [PASSED] oob_was/18013179988
[21:43:11] [PASSED] oob_was/1508761755
[21:43:11] [PASSED] oob_was/16023105232
[21:43:11] [PASSED] oob_was/16026508708
[21:43:11] [PASSED] oob_was/14020001231
[21:43:11] [PASSED] oob_was/16023683509
[21:43:11] [PASSED] oob_was/14025515070
[21:43:11] [PASSED] oob_was/15015404425_disable
[21:43:11] [PASSED] oob_was/16026007364
[21:43:11] [PASSED] oob_was/14020316580
[21:43:11] [PASSED] oob_was/14025883347
[21:43:11] [PASSED] oob_was/16029380221
[21:43:11] ============== [PASSED] xe_rtp_table_oob_test ==============
[21:43:11] ================ xe_rtp_table_dev_oob_test ================
[21:43:11] [PASSED] device_oob_was/22010954014
[21:43:11] [PASSED] device_oob_was/15015404425
[21:43:11] [PASSED] device_oob_was/22019338487_display
[21:43:11] [PASSED] device_oob_was/14022085890
[21:43:11] [PASSED] device_oob_was/14026539277
[21:43:11] [PASSED] device_oob_was/14026633728
[21:43:11] [PASSED] device_oob_was/14026746987
[21:43:11] [PASSED] device_oob_was/14026779378
[21:43:11] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[21:43:11] =============== [PASSED] xe_rtp_tables_test ================
[21:43:11] =================== xe_rtp (3 subtests) ====================
[21:43:11] =================== xe_rtp_rules_tests ====================
[21:43:11] [PASSED] no
[21:43:11] [PASSED] yes
[21:43:11] [PASSED] no-and-no
[21:43:11] [PASSED] no-and-yes
[21:43:11] [PASSED] yes-and-no
[21:43:11] [PASSED] yes-and-yes
[21:43:11] [PASSED] no-or-no
[21:43:11] [PASSED] no-or-yes
[21:43:11] [PASSED] yes-or-no
[21:43:11] [PASSED] yes-or-yes
[21:43:11] [PASSED] no-yes-or-yes-no
[21:43:11] [PASSED] no-yes-or-yes-yes
[21:43:11] [PASSED] yes-yes-or-no-yes
[21:43:11] [PASSED] yes-yes-or-yes-yes
[21:43:11] [PASSED] no-no-or-yes-or-no
[21:43:11] [PASSED] or
[21:43:11] [PASSED] or-yes
[21:43:11] [PASSED] or-no
[21:43:11] [PASSED] yes-or
[21:43:11] [PASSED] no-or
[21:43:11] [PASSED] no-or-or-yes
[21:43:11] [PASSED] yes-or-or-no
[21:43:11] [PASSED] no-or-or-no
[21:43:11] [PASSED] missing-context-engine-class
[21:43:11] [PASSED] missing-context-engine-class-or-yes
[21:43:11] [PASSED] missing-context-engine-class-or-or-yes
[21:43:11] =============== [PASSED] xe_rtp_rules_tests ================
[21:43:11] =============== xe_rtp_process_to_sr_tests ================
[21:43:11] [PASSED] coalesce-same-reg
[21:43:11] [PASSED] coalesce-same-reg-literal-and-func
[21:43:11] [PASSED] no-match-no-add
[21:43:11] [PASSED] two-regs-two-entries
[21:43:11] [PASSED] clr-one-set-other
[21:43:11] [PASSED] set-field
[21:43:11] [PASSED] conflict-duplicate
[21:43:11] [PASSED] conflict-not-disjoint
[21:43:11] [PASSED] conflict-not-disjoint-literal-and-func
[21:43:11] [PASSED] conflict-reg-type
[21:43:11] [PASSED] bad-mcr-reg-forced-to-regular
[21:43:11] [PASSED] bad-regular-reg-forced-to-mcr
[21:43:11] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[21:43:11] ================== xe_rtp_process_tests ===================
[21:43:11] [PASSED] active1
[21:43:11] [PASSED] active2
[21:43:11] [PASSED] active-inactive
[21:43:11] [PASSED] inactive-active
[21:43:11] [PASSED] inactive-active-inactive
[21:43:11] [PASSED] inactive-inactive-inactive
[21:43:11] ============== [PASSED] xe_rtp_process_tests ===============
[21:43:11] ===================== [PASSED] xe_rtp ======================
[21:43:11] ==================== xe_wa (1 subtest) =====================
[21:43:11] ======================== xe_wa_gt =========================
[21:43:11] [PASSED] TIGERLAKE B0
[21:43:11] [PASSED] DG1 A0
[21:43:11] [PASSED] DG1 B0
[21:43:11] [PASSED] ALDERLAKE_S A0
[21:43:11] [PASSED] ALDERLAKE_S B0
[21:43:11] [PASSED] ALDERLAKE_S C0
[21:43:11] [PASSED] ALDERLAKE_S D0
[21:43:11] [PASSED] ALDERLAKE_P A0
[21:43:11] [PASSED] ALDERLAKE_P B0
[21:43:11] [PASSED] ALDERLAKE_P C0
[21:43:11] [PASSED] ALDERLAKE_S RPLS D0
[21:43:11] [PASSED] ALDERLAKE_P RPLU E0
[21:43:11] [PASSED] DG2 G10 C0
[21:43:11] [PASSED] DG2 G11 B1
[21:43:11] [PASSED] DG2 G12 A1
[21:43:11] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:43:11] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:43:11] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[21:43:11] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[21:43:11] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[21:43:11] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[21:43:11] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[21:43:11] ==================== [PASSED] xe_wa_gt =====================
[21:43:11] ====================== [PASSED] xe_wa ======================
[21:43:11] ============================================================
[21:43:11] Testing complete. Ran 719 tests: passed: 701, skipped: 18
[21:43:11] Elapsed time: 36.408s total, 4.363s configuring, 31.379s building, 0.646s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[21:43:11] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:43:13] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:43:37] Starting KUnit Kernel (1/1)...
[21:43:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:43:37] ============ drm_test_pick_cmdline (2 subtests) ============
[21:43:37] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[21:43:37] =============== drm_test_pick_cmdline_named ===============
[21:43:37] [PASSED] NTSC
[21:43:37] [PASSED] NTSC-J
[21:43:37] [PASSED] PAL
[21:43:37] [PASSED] PAL-M
[21:43:37] =========== [PASSED] drm_test_pick_cmdline_named ===========
[21:43:37] ============== [PASSED] drm_test_pick_cmdline ==============
[21:43:37] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[21:43:37] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[21:43:37] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[21:43:37] =========== drm_validate_clone_mode (2 subtests) ===========
[21:43:37] ============== drm_test_check_in_clone_mode ===============
[21:43:37] [PASSED] in_clone_mode
[21:43:37] [PASSED] not_in_clone_mode
[21:43:37] ========== [PASSED] drm_test_check_in_clone_mode ===========
[21:43:37] =============== drm_test_check_valid_clones ===============
[21:43:37] [PASSED] not_in_clone_mode
[21:43:37] [PASSED] valid_clone
[21:43:37] [PASSED] invalid_clone
[21:43:37] =========== [PASSED] drm_test_check_valid_clones ===========
[21:43:37] ============= [PASSED] drm_validate_clone_mode =============
[21:43:37] ============= drm_validate_modeset (1 subtest) =============
[21:43:37] [PASSED] drm_test_check_connector_changed_modeset
[21:43:37] ============== [PASSED] drm_validate_modeset ===============
[21:43:37] ====== drm_test_bridge_get_current_state (2 subtests) ======
[21:43:37] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[21:43:37] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[21:43:37] ======== [PASSED] drm_test_bridge_get_current_state ========
[21:43:37] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[21:43:37] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[21:43:37] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[21:43:37] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[21:43:37] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[21:43:37] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[21:43:37] ============== drm_bridge_alloc (2 subtests) ===============
[21:43:37] [PASSED] drm_test_drm_bridge_alloc_basic
[21:43:37] [PASSED] drm_test_drm_bridge_alloc_get_put
[21:43:37] ================ [PASSED] drm_bridge_alloc =================
[21:43:37] ============= drm_bridge_bus_fmt (5 subtests) ==============
[21:43:37] [PASSED] drm_test_bridge_rgb_yuv_rgb
[21:43:37] [PASSED] drm_test_bridge_must_convert_to_yuv444
[21:43:37] [PASSED] drm_test_bridge_hdmi_auto_rgb
[21:43:37] [PASSED] drm_test_bridge_auto_first
[21:43:37] [PASSED] drm_test_bridge_rgb_yuv_no_path
[21:43:37] =============== [PASSED] drm_bridge_bus_fmt ================
[21:43:37] ============= drm_cmdline_parser (40 subtests) =============
[21:43:37] [PASSED] drm_test_cmdline_force_d_only
[21:43:37] [PASSED] drm_test_cmdline_force_D_only_dvi
[21:43:37] [PASSED] drm_test_cmdline_force_D_only_hdmi
[21:43:37] [PASSED] drm_test_cmdline_force_D_only_not_digital
[21:43:37] [PASSED] drm_test_cmdline_force_e_only
[21:43:37] [PASSED] drm_test_cmdline_res
[21:43:37] [PASSED] drm_test_cmdline_res_vesa
[21:43:37] [PASSED] drm_test_cmdline_res_vesa_rblank
[21:43:37] [PASSED] drm_test_cmdline_res_rblank
[21:43:37] [PASSED] drm_test_cmdline_res_bpp
[21:43:37] [PASSED] drm_test_cmdline_res_refresh
[21:43:37] [PASSED] drm_test_cmdline_res_bpp_refresh
[21:43:37] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[21:43:37] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[21:43:37] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[21:43:37] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[21:43:37] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[21:43:37] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[21:43:37] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[21:43:37] [PASSED] drm_test_cmdline_res_margins_force_on
[21:43:37] [PASSED] drm_test_cmdline_res_vesa_margins
[21:43:37] [PASSED] drm_test_cmdline_name
[21:43:37] [PASSED] drm_test_cmdline_name_bpp
[21:43:37] [PASSED] drm_test_cmdline_name_option
[21:43:37] [PASSED] drm_test_cmdline_name_bpp_option
[21:43:37] [PASSED] drm_test_cmdline_rotate_0
[21:43:37] [PASSED] drm_test_cmdline_rotate_90
[21:43:37] [PASSED] drm_test_cmdline_rotate_180
[21:43:37] [PASSED] drm_test_cmdline_rotate_270
[21:43:37] [PASSED] drm_test_cmdline_hmirror
[21:43:37] [PASSED] drm_test_cmdline_vmirror
[21:43:37] [PASSED] drm_test_cmdline_margin_options
[21:43:37] [PASSED] drm_test_cmdline_multiple_options
[21:43:37] [PASSED] drm_test_cmdline_bpp_extra_and_option
[21:43:37] [PASSED] drm_test_cmdline_extra_and_option
[21:43:37] [PASSED] drm_test_cmdline_freestanding_options
[21:43:37] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[21:43:37] [PASSED] drm_test_cmdline_panel_orientation
[21:43:37] ================ drm_test_cmdline_invalid =================
[21:43:37] [PASSED] margin_only
[21:43:37] [PASSED] interlace_only
[21:43:37] [PASSED] res_missing_x
[21:43:37] [PASSED] res_missing_y
[21:43:37] [PASSED] res_bad_y
[21:43:37] [PASSED] res_missing_y_bpp
[21:43:37] [PASSED] res_bad_bpp
[21:43:37] [PASSED] res_bad_refresh
[21:43:37] [PASSED] res_bpp_refresh_force_on_off
[21:43:37] [PASSED] res_invalid_mode
[21:43:37] [PASSED] res_bpp_wrong_place_mode
[21:43:37] [PASSED] name_bpp_refresh
[21:43:37] [PASSED] name_refresh
[21:43:37] [PASSED] name_refresh_wrong_mode
[21:43:37] [PASSED] name_refresh_invalid_mode
[21:43:37] [PASSED] rotate_multiple
[21:43:37] [PASSED] rotate_invalid_val
[21:43:37] [PASSED] rotate_truncated
[21:43:37] [PASSED] invalid_option
[21:43:37] [PASSED] invalid_tv_option
[21:43:37] [PASSED] truncated_tv_option
[21:43:37] ============ [PASSED] drm_test_cmdline_invalid =============
[21:43:37] =============== drm_test_cmdline_tv_options ===============
[21:43:37] [PASSED] NTSC
[21:43:37] [PASSED] NTSC_443
[21:43:37] [PASSED] NTSC_J
[21:43:37] [PASSED] PAL
[21:43:37] [PASSED] PAL_M
[21:43:37] [PASSED] PAL_N
[21:43:37] [PASSED] SECAM
[21:43:37] [PASSED] MONO_525
[21:43:37] [PASSED] MONO_625
[21:43:37] =========== [PASSED] drm_test_cmdline_tv_options ===========
[21:43:37] =============== [PASSED] drm_cmdline_parser ================
[21:43:37] ========== drmm_connector_hdmi_init (20 subtests) ==========
[21:43:37] [PASSED] drm_test_connector_hdmi_init_valid
[21:43:37] [PASSED] drm_test_connector_hdmi_init_bpc_8
[21:43:37] [PASSED] drm_test_connector_hdmi_init_bpc_10
[21:43:37] [PASSED] drm_test_connector_hdmi_init_bpc_12
[21:43:37] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[21:43:37] [PASSED] drm_test_connector_hdmi_init_bpc_null
[21:43:37] [PASSED] drm_test_connector_hdmi_init_formats_empty
[21:43:37] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[21:43:37] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:43:37] [PASSED] supported_formats=0x9 yuv420_allowed=1
[21:43:37] [PASSED] supported_formats=0x9 yuv420_allowed=0
[21:43:37] [PASSED] supported_formats=0x5 yuv420_allowed=1
[21:43:37] [PASSED] supported_formats=0x5 yuv420_allowed=0
[21:43:37] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:43:37] [PASSED] drm_test_connector_hdmi_init_null_ddc
[21:43:37] [PASSED] drm_test_connector_hdmi_init_null_product
[21:43:37] [PASSED] drm_test_connector_hdmi_init_null_vendor
[21:43:37] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[21:43:37] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[21:43:37] [PASSED] drm_test_connector_hdmi_init_product_valid
[21:43:37] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[21:43:37] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[21:43:37] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[21:43:37] ========= drm_test_connector_hdmi_init_type_valid =========
[21:43:37] [PASSED] HDMI-A
[21:43:37] [PASSED] HDMI-B
[21:43:37] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[21:43:37] ======== drm_test_connector_hdmi_init_type_invalid ========
[21:43:37] [PASSED] Unknown
[21:43:37] [PASSED] VGA
[21:43:37] [PASSED] DVI-I
[21:43:37] [PASSED] DVI-D
[21:43:37] [PASSED] DVI-A
[21:43:37] [PASSED] Composite
[21:43:37] [PASSED] SVIDEO
[21:43:37] [PASSED] LVDS
[21:43:37] [PASSED] Component
[21:43:37] [PASSED] DIN
[21:43:37] [PASSED] DP
[21:43:37] [PASSED] TV
[21:43:37] [PASSED] eDP
[21:43:37] [PASSED] Virtual
[21:43:37] [PASSED] DSI
[21:43:37] [PASSED] DPI
[21:43:37] [PASSED] Writeback
[21:43:37] [PASSED] SPI
[21:43:37] [PASSED] USB
[21:43:37] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[21:43:37] ============ [PASSED] drmm_connector_hdmi_init =============
[21:43:37] ============= drmm_connector_init (3 subtests) =============
[21:43:37] [PASSED] drm_test_drmm_connector_init
[21:43:37] [PASSED] drm_test_drmm_connector_init_null_ddc
[21:43:37] ========= drm_test_drmm_connector_init_type_valid =========
[21:43:37] [PASSED] Unknown
[21:43:37] [PASSED] VGA
[21:43:37] [PASSED] DVI-I
[21:43:37] [PASSED] DVI-D
[21:43:37] [PASSED] DVI-A
[21:43:37] [PASSED] Composite
[21:43:37] [PASSED] SVIDEO
[21:43:37] [PASSED] LVDS
[21:43:37] [PASSED] Component
[21:43:37] [PASSED] DIN
[21:43:37] [PASSED] DP
[21:43:37] [PASSED] HDMI-A
[21:43:37] [PASSED] HDMI-B
[21:43:37] [PASSED] TV
[21:43:37] [PASSED] eDP
[21:43:37] [PASSED] Virtual
[21:43:37] [PASSED] DSI
[21:43:37] [PASSED] DPI
[21:43:37] [PASSED] Writeback
[21:43:37] [PASSED] SPI
[21:43:37] [PASSED] USB
[21:43:37] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[21:43:37] =============== [PASSED] drmm_connector_init ===============
[21:43:37] ========= drm_connector_dynamic_init (6 subtests) ==========
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_init
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_init_properties
[21:43:37] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[21:43:37] [PASSED] Unknown
[21:43:37] [PASSED] VGA
[21:43:37] [PASSED] DVI-I
[21:43:37] [PASSED] DVI-D
[21:43:37] [PASSED] DVI-A
[21:43:37] [PASSED] Composite
[21:43:37] [PASSED] SVIDEO
[21:43:37] [PASSED] LVDS
[21:43:37] [PASSED] Component
[21:43:37] [PASSED] DIN
[21:43:37] [PASSED] DP
[21:43:37] [PASSED] HDMI-A
[21:43:37] [PASSED] HDMI-B
[21:43:37] [PASSED] TV
[21:43:37] [PASSED] eDP
[21:43:37] [PASSED] Virtual
[21:43:37] [PASSED] DSI
[21:43:37] [PASSED] DPI
[21:43:37] [PASSED] Writeback
[21:43:37] [PASSED] SPI
[21:43:37] [PASSED] USB
[21:43:37] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[21:43:37] ======== drm_test_drm_connector_dynamic_init_name =========
[21:43:37] [PASSED] Unknown
[21:43:37] [PASSED] VGA
[21:43:37] [PASSED] DVI-I
[21:43:37] [PASSED] DVI-D
[21:43:37] [PASSED] DVI-A
[21:43:37] [PASSED] Composite
[21:43:37] [PASSED] SVIDEO
[21:43:37] [PASSED] LVDS
[21:43:37] [PASSED] Component
[21:43:37] [PASSED] DIN
[21:43:37] [PASSED] DP
[21:43:37] [PASSED] HDMI-A
[21:43:37] [PASSED] HDMI-B
[21:43:37] [PASSED] TV
[21:43:37] [PASSED] eDP
[21:43:37] [PASSED] Virtual
[21:43:37] [PASSED] DSI
[21:43:37] [PASSED] DPI
[21:43:37] [PASSED] Writeback
[21:43:37] [PASSED] SPI
[21:43:37] [PASSED] USB
[21:43:37] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[21:43:37] =========== [PASSED] drm_connector_dynamic_init ============
[21:43:37] ==== drm_connector_dynamic_register_early (4 subtests) =====
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[21:43:37] ====== [PASSED] drm_connector_dynamic_register_early =======
[21:43:37] ======= drm_connector_dynamic_register (7 subtests) ========
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[21:43:37] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[21:43:37] ========= [PASSED] drm_connector_dynamic_register ==========
[21:43:37] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[21:43:37] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[21:43:37] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[21:43:37] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[21:43:37] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[21:43:37] ========== drm_test_get_tv_mode_from_name_valid ===========
[21:43:37] [PASSED] NTSC
[21:43:37] [PASSED] NTSC-443
[21:43:37] [PASSED] NTSC-J
[21:43:37] [PASSED] PAL
[21:43:37] [PASSED] PAL-M
[21:43:37] [PASSED] PAL-N
[21:43:37] [PASSED] SECAM
[21:43:37] [PASSED] Mono
[21:43:37] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[21:43:37] [PASSED] drm_test_get_tv_mode_from_name_truncated
[21:43:37] ============ [PASSED] drm_get_tv_mode_from_name ============
[21:43:37] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[21:43:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[21:43:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[21:43:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[21:43:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[21:43:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[21:43:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[21:43:37] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[21:43:37] [PASSED] VIC 96
[21:43:37] [PASSED] VIC 97
[21:43:37] [PASSED] VIC 101
[21:43:37] [PASSED] VIC 102
[21:43:37] [PASSED] VIC 106
[21:43:37] [PASSED] VIC 107
[21:43:37] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[21:43:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[21:43:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[21:43:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[21:43:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[21:43:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[21:43:37] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[21:43:37] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[21:43:37] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[21:43:37] [PASSED] Automatic
[21:43:37] [PASSED] Full
[21:43:37] [PASSED] Limited 16:235
[21:43:37] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[21:43:37] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[21:43:37] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[21:43:37] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[21:43:37] === drm_test_drm_hdmi_connector_get_output_format_name ====
[21:43:37] [PASSED] RGB
[21:43:37] [PASSED] YUV 4:2:0
[21:43:37] [PASSED] YUV 4:2:2
[21:43:37] [PASSED] YUV 4:4:4
[21:43:37] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[21:43:37] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[21:43:37] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[21:43:37] ============= drm_damage_helper (21 subtests) ==============
[21:43:37] [PASSED] drm_test_damage_iter_no_damage
[21:43:37] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[21:43:37] [PASSED] drm_test_damage_iter_no_damage_src_moved
[21:43:37] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[21:43:37] [PASSED] drm_test_damage_iter_no_damage_not_visible
[21:43:37] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[21:43:37] [PASSED] drm_test_damage_iter_no_damage_no_fb
[21:43:37] [PASSED] drm_test_damage_iter_simple_damage
[21:43:37] [PASSED] drm_test_damage_iter_single_damage
[21:43:37] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[21:43:37] [PASSED] drm_test_damage_iter_single_damage_outside_src
[21:43:37] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[21:43:37] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[21:43:37] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[21:43:37] [PASSED] drm_test_damage_iter_single_damage_src_moved
[21:43:37] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[21:43:37] [PASSED] drm_test_damage_iter_damage
[21:43:37] [PASSED] drm_test_damage_iter_damage_one_intersect
[21:43:37] [PASSED] drm_test_damage_iter_damage_one_outside
[21:43:37] [PASSED] drm_test_damage_iter_damage_src_moved
[21:43:37] [PASSED] drm_test_damage_iter_damage_not_visible
[21:43:37] ================ [PASSED] drm_damage_helper ================
[21:43:37] ============== drm_dp_mst_helper (3 subtests) ==============
[21:43:37] ============== drm_test_dp_mst_calc_pbn_mode ==============
[21:43:37] [PASSED] Clock 154000 BPP 30 DSC disabled
[21:43:37] [PASSED] Clock 234000 BPP 30 DSC disabled
[21:43:37] [PASSED] Clock 297000 BPP 24 DSC disabled
[21:43:37] [PASSED] Clock 332880 BPP 24 DSC enabled
[21:43:37] [PASSED] Clock 324540 BPP 24 DSC enabled
[21:43:37] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[21:43:37] ============== drm_test_dp_mst_calc_pbn_div ===============
[21:43:37] [PASSED] Link rate 2000000 lane count 4
[21:43:37] [PASSED] Link rate 2000000 lane count 2
[21:43:37] [PASSED] Link rate 2000000 lane count 1
[21:43:37] [PASSED] Link rate 1350000 lane count 4
[21:43:37] [PASSED] Link rate 1350000 lane count 2
[21:43:37] [PASSED] Link rate 1350000 lane count 1
[21:43:37] [PASSED] Link rate 1000000 lane count 4
[21:43:37] [PASSED] Link rate 1000000 lane count 2
[21:43:37] [PASSED] Link rate 1000000 lane count 1
[21:43:37] [PASSED] Link rate 810000 lane count 4
[21:43:37] [PASSED] Link rate 810000 lane count 2
[21:43:37] [PASSED] Link rate 810000 lane count 1
[21:43:37] [PASSED] Link rate 540000 lane count 4
[21:43:37] [PASSED] Link rate 540000 lane count 2
[21:43:37] [PASSED] Link rate 540000 lane count 1
[21:43:37] [PASSED] Link rate 270000 lane count 4
[21:43:37] [PASSED] Link rate 270000 lane count 2
[21:43:37] [PASSED] Link rate 270000 lane count 1
[21:43:37] [PASSED] Link rate 162000 lane count 4
[21:43:37] [PASSED] Link rate 162000 lane count 2
[21:43:37] [PASSED] Link rate 162000 lane count 1
[21:43:37] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[21:43:37] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[21:43:37] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[21:43:37] [PASSED] DP_POWER_UP_PHY with port number
[21:43:37] [PASSED] DP_POWER_DOWN_PHY with port number
[21:43:37] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[21:43:37] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[21:43:37] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[21:43:37] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[21:43:37] [PASSED] DP_QUERY_PAYLOAD with port number
[21:43:37] [PASSED] DP_QUERY_PAYLOAD with VCPI
[21:43:37] [PASSED] DP_REMOTE_DPCD_READ with port number
[21:43:37] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[21:43:37] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[21:43:37] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[21:43:37] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[21:43:37] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[21:43:37] [PASSED] DP_REMOTE_I2C_READ with port number
[21:43:37] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[21:43:37] [PASSED] DP_REMOTE_I2C_READ with transactions array
[21:43:37] [PASSED] DP_REMOTE_I2C_WRITE with port number
[21:43:37] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[21:43:37] [PASSED] DP_REMOTE_I2C_WRITE with data array
[21:43:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[21:43:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[21:43:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[21:43:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[21:43:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[21:43:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[21:43:37] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[21:43:37] ================ [PASSED] drm_dp_mst_helper ================
[21:43:37] ================== drm_exec (7 subtests) ===================
[21:43:37] [PASSED] sanitycheck
[21:43:37] [PASSED] test_lock
[21:43:37] [PASSED] test_lock_unlock
[21:43:37] [PASSED] test_duplicates
[21:43:37] [PASSED] test_prepare
[21:43:37] [PASSED] test_prepare_array
[21:43:37] [PASSED] test_multiple_loops
[21:43:37] ==================== [PASSED] drm_exec =====================
[21:43:37] =========== drm_format_helper_test (17 subtests) ===========
[21:43:37] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[21:43:37] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[21:43:37] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[21:43:37] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[21:43:37] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[21:43:37] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[21:43:37] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[21:43:37] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[21:43:37] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[21:43:37] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[21:43:37] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[21:43:37] ============== drm_test_fb_xrgb8888_to_mono ===============
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[21:43:37] ==================== drm_test_fb_swab =====================
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ================ [PASSED] drm_test_fb_swab =================
[21:43:37] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[21:43:37] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[21:43:37] [PASSED] single_pixel_source_buffer
[21:43:37] [PASSED] single_pixel_clip_rectangle
[21:43:37] [PASSED] well_known_colors
[21:43:37] [PASSED] destination_pitch
[21:43:37] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[21:43:37] ================= drm_test_fb_clip_offset =================
[21:43:37] [PASSED] pass through
[21:43:37] [PASSED] horizontal offset
[21:43:37] [PASSED] vertical offset
[21:43:37] [PASSED] horizontal and vertical offset
[21:43:37] [PASSED] horizontal offset (custom pitch)
[21:43:37] [PASSED] vertical offset (custom pitch)
[21:43:37] [PASSED] horizontal and vertical offset (custom pitch)
[21:43:37] ============= [PASSED] drm_test_fb_clip_offset =============
[21:43:37] =================== drm_test_fb_memcpy ====================
[21:43:37] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[21:43:37] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[21:43:37] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[21:43:37] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[21:43:37] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[21:43:37] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[21:43:37] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[21:43:37] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[21:43:37] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[21:43:37] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[21:43:37] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[21:43:37] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[21:43:37] =============== [PASSED] drm_test_fb_memcpy ================
[21:43:37] ============= [PASSED] drm_format_helper_test ==============
[21:43:37] ================= drm_format (18 subtests) =================
[21:43:37] [PASSED] drm_test_format_block_width_invalid
[21:43:37] [PASSED] drm_test_format_block_width_one_plane
[21:43:37] [PASSED] drm_test_format_block_width_two_plane
[21:43:37] [PASSED] drm_test_format_block_width_three_plane
[21:43:37] [PASSED] drm_test_format_block_width_tiled
[21:43:37] [PASSED] drm_test_format_block_height_invalid
[21:43:37] [PASSED] drm_test_format_block_height_one_plane
[21:43:37] [PASSED] drm_test_format_block_height_two_plane
[21:43:37] [PASSED] drm_test_format_block_height_three_plane
[21:43:37] [PASSED] drm_test_format_block_height_tiled
[21:43:37] [PASSED] drm_test_format_min_pitch_invalid
[21:43:37] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[21:43:37] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[21:43:37] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[21:43:37] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[21:43:37] [PASSED] drm_test_format_min_pitch_two_plane
[21:43:37] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[21:43:37] [PASSED] drm_test_format_min_pitch_tiled
[21:43:37] =================== [PASSED] drm_format ====================
[21:43:37] ============== drm_framebuffer (10 subtests) ===============
[21:43:37] ========== drm_test_framebuffer_check_src_coords ==========
[21:43:37] [PASSED] Success: source fits into fb
[21:43:37] [PASSED] Fail: overflowing fb with x-axis coordinate
[21:43:37] [PASSED] Fail: overflowing fb with y-axis coordinate
[21:43:37] [PASSED] Fail: overflowing fb with source width
[21:43:37] [PASSED] Fail: overflowing fb with source height
[21:43:37] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[21:43:37] [PASSED] drm_test_framebuffer_cleanup
[21:43:37] =============== drm_test_framebuffer_create ===============
[21:43:37] [PASSED] ABGR8888 normal sizes
[21:43:37] [PASSED] ABGR8888 max sizes
[21:43:37] [PASSED] ABGR8888 pitch greater than min required
[21:43:37] [PASSED] ABGR8888 pitch less than min required
[21:43:37] [PASSED] ABGR8888 Invalid width
[21:43:37] [PASSED] ABGR8888 Invalid buffer handle
[21:43:37] [PASSED] No pixel format
[21:43:37] [PASSED] ABGR8888 Width 0
[21:43:37] [PASSED] ABGR8888 Height 0
[21:43:37] [PASSED] ABGR8888 Out of bound height * pitch combination
[21:43:37] [PASSED] ABGR8888 Large buffer offset
[21:43:37] [PASSED] ABGR8888 Buffer offset for inexistent plane
[21:43:37] [PASSED] ABGR8888 Invalid flag
[21:43:37] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[21:43:37] [PASSED] ABGR8888 Valid buffer modifier
[21:43:37] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[21:43:37] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[21:43:37] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[21:43:37] [PASSED] NV12 Normal sizes
[21:43:37] [PASSED] NV12 Max sizes
[21:43:37] [PASSED] NV12 Invalid pitch
[21:43:37] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[21:43:37] [PASSED] NV12 different modifier per-plane
[21:43:37] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[21:43:37] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[21:43:37] [PASSED] NV12 Modifier for inexistent plane
[21:43:37] [PASSED] NV12 Handle for inexistent plane
[21:43:37] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[21:43:37] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[21:43:37] [PASSED] YVU420 Normal sizes
[21:43:37] [PASSED] YVU420 Max sizes
[21:43:37] [PASSED] YVU420 Invalid pitch
[21:43:37] [PASSED] YVU420 Different pitches
[21:43:37] [PASSED] YVU420 Different buffer offsets/pitches
[21:43:37] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[21:43:37] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[21:43:37] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[21:43:37] [PASSED] YVU420 Valid modifier
[21:43:37] [PASSED] YVU420 Different modifiers per plane
[21:43:37] [PASSED] YVU420 Modifier for inexistent plane
[21:43:37] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[21:43:37] [PASSED] X0L2 Normal sizes
[21:43:37] [PASSED] X0L2 Max sizes
[21:43:37] [PASSED] X0L2 Invalid pitch
[21:43:37] [PASSED] X0L2 Pitch greater than minimum required
[21:43:37] [PASSED] X0L2 Handle for inexistent plane
[21:43:37] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[21:43:37] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[21:43:37] [PASSED] X0L2 Valid modifier
[21:43:37] [PASSED] X0L2 Modifier for inexistent plane
[21:43:37] =========== [PASSED] drm_test_framebuffer_create ===========
[21:43:37] [PASSED] drm_test_framebuffer_free
[21:43:37] [PASSED] drm_test_framebuffer_init
[21:43:37] [PASSED] drm_test_framebuffer_init_bad_format
[21:43:37] [PASSED] drm_test_framebuffer_init_dev_mismatch
[21:43:37] [PASSED] drm_test_framebuffer_lookup
[21:43:37] [PASSED] drm_test_framebuffer_lookup_inexistent
[21:43:37] [PASSED] drm_test_framebuffer_modifiers_not_supported
[21:43:37] ================= [PASSED] drm_framebuffer =================
[21:43:37] ================ drm_gem_shmem (8 subtests) ================
[21:43:37] [PASSED] drm_gem_shmem_test_obj_create
[21:43:37] [PASSED] drm_gem_shmem_test_obj_create_private
[21:43:37] [PASSED] drm_gem_shmem_test_pin_pages
[21:43:37] [PASSED] drm_gem_shmem_test_vmap
[21:43:37] [PASSED] drm_gem_shmem_test_get_sg_table
[21:43:37] [PASSED] drm_gem_shmem_test_get_pages_sgt
[21:43:37] [PASSED] drm_gem_shmem_test_madvise
[21:43:37] [PASSED] drm_gem_shmem_test_purge
[21:43:37] ================== [PASSED] drm_gem_shmem ==================
[21:43:37] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[21:43:37] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[21:43:37] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[21:43:37] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[21:43:37] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[21:43:37] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[21:43:37] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[21:43:37] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[21:43:37] [PASSED] Automatic
[21:43:37] [PASSED] Full
[21:43:37] [PASSED] Limited 16:235
[21:43:37] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[21:43:37] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[21:43:37] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[21:43:37] [PASSED] drm_test_check_disable_connector
[21:43:37] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[21:43:37] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[21:43:37] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[21:43:37] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[21:43:37] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[21:43:37] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[21:43:37] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[21:43:37] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[21:43:37] [PASSED] drm_test_check_output_bpc_dvi
[21:43:37] [PASSED] drm_test_check_output_bpc_format_vic_1
[21:43:37] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[21:43:37] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[21:43:37] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[21:43:37] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[21:43:37] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[21:43:37] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[21:43:37] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[21:43:37] ============ drm_test_check_hdmi_color_format =============
[21:43:37] [PASSED] AUTO -> RGB
[21:43:37] [PASSED] YCBCR422 -> YUV422
[21:43:37] [PASSED] YCBCR420 -> YUV420
[21:43:37] [PASSED] YCBCR444 -> YUV444
[21:43:37] [PASSED] RGB -> RGB
[21:43:37] ======== [PASSED] drm_test_check_hdmi_color_format =========
[21:43:37] ======== drm_test_check_hdmi_color_format_420_only ========
[21:43:37] [PASSED] RGB should fail
[21:43:37] [PASSED] YUV444 should fail
[21:43:37] [PASSED] YUV422 should fail
[21:43:37] [PASSED] YUV420 should work
[21:43:37] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[21:43:37] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[21:43:37] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[21:43:37] [PASSED] drm_test_check_broadcast_rgb_value
[21:43:37] [PASSED] drm_test_check_bpc_8_value
[21:43:37] [PASSED] drm_test_check_bpc_10_value
[21:43:37] [PASSED] drm_test_check_bpc_12_value
[21:43:37] [PASSED] drm_test_check_format_value
[21:43:37] [PASSED] drm_test_check_tmds_char_value
[21:43:37] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[21:43:37] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[21:43:37] [PASSED] drm_test_check_mode_valid
[21:43:37] [PASSED] drm_test_check_mode_valid_reject
[21:43:37] [PASSED] drm_test_check_mode_valid_reject_rate
[21:43:37] [PASSED] drm_test_check_mode_valid_reject_max_clock
[21:43:37] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[21:43:37] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[21:43:37] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[21:43:37] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[21:43:37] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[21:43:37] [PASSED] drm_test_check_infoframes
[21:43:37] [PASSED] drm_test_check_reject_avi_infoframe
[21:43:37] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[21:43:37] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[21:43:37] [PASSED] drm_test_check_reject_audio_infoframe
[21:43:37] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[21:43:37] ================= drm_managed (2 subtests) =================
[21:43:37] [PASSED] drm_test_managed_release_action
[21:43:37] [PASSED] drm_test_managed_run_action
[21:43:37] =================== [PASSED] drm_managed ===================
[21:43:37] =================== drm_mm (6 subtests) ====================
[21:43:37] [PASSED] drm_test_mm_init
[21:43:37] [PASSED] drm_test_mm_debug
[21:43:37] [PASSED] drm_test_mm_align32
[21:43:37] [PASSED] drm_test_mm_align64
[21:43:37] [PASSED] drm_test_mm_lowest
[21:43:37] [PASSED] drm_test_mm_highest
[21:43:37] ===================== [PASSED] drm_mm ======================
[21:43:37] ============= drm_modes_analog_tv (5 subtests) =============
[21:43:37] [PASSED] drm_test_modes_analog_tv_mono_576i
[21:43:37] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[21:43:37] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[21:43:37] [PASSED] drm_test_modes_analog_tv_pal_576i
[21:43:37] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[21:43:37] =============== [PASSED] drm_modes_analog_tv ===============
[21:43:37] ============== drm_plane_helper (2 subtests) ===============
[21:43:37] =============== drm_test_check_plane_state ================
[21:43:37] [PASSED] clipping_simple
[21:43:37] [PASSED] clipping_rotate_reflect
[21:43:37] [PASSED] positioning_simple
[21:43:37] [PASSED] upscaling
[21:43:37] [PASSED] downscaling
[21:43:37] [PASSED] rounding1
[21:43:37] [PASSED] rounding2
[21:43:37] [PASSED] rounding3
[21:43:37] [PASSED] rounding4
[21:43:37] =========== [PASSED] drm_test_check_plane_state ============
[21:43:37] =========== drm_test_check_invalid_plane_state ============
[21:43:37] [PASSED] positioning_invalid
[21:43:37] [PASSED] upscaling_invalid
[21:43:37] [PASSED] downscaling_invalid
[21:43:37] ======= [PASSED] drm_test_check_invalid_plane_state ========
[21:43:37] ================ [PASSED] drm_plane_helper =================
[21:43:37] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[21:43:37] ====== drm_test_connector_helper_tv_get_modes_check =======
[21:43:37] [PASSED] None
[21:43:37] [PASSED] PAL
[21:43:37] [PASSED] NTSC
[21:43:37] [PASSED] Both, NTSC Default
[21:43:37] [PASSED] Both, PAL Default
[21:43:37] [PASSED] Both, NTSC Default, with PAL on command-line
[21:43:37] [PASSED] Both, PAL Default, with NTSC on command-line
[21:43:37] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[21:43:37] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[21:43:37] ================== drm_rect (9 subtests) ===================
[21:43:37] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[21:43:37] [PASSED] drm_test_rect_clip_scaled_not_clipped
[21:43:37] [PASSED] drm_test_rect_clip_scaled_clipped
[21:43:37] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[21:43:37] ================= drm_test_rect_intersect =================
[21:43:37] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[21:43:37] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[21:43:37] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[21:43:37] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[21:43:37] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[21:43:37] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[21:43:37] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[21:43:37] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[21:43:37] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[21:43:37] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[21:43:37] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[21:43:37] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[21:43:37] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[21:43:37] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[21:43:37] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[21:43:37] ============= [PASSED] drm_test_rect_intersect =============
[21:43:37] ================ drm_test_rect_calc_hscale ================
[21:43:37] [PASSED] normal use
[21:43:37] [PASSED] out of max range
[21:43:37] [PASSED] out of min range
[21:43:37] [PASSED] zero dst
[21:43:37] [PASSED] negative src
[21:43:37] [PASSED] negative dst
[21:43:37] ============ [PASSED] drm_test_rect_calc_hscale ============
[21:43:37] ================ drm_test_rect_calc_vscale ================
[21:43:37] [PASSED] normal use
[21:43:37] [PASSED] out of max range
[21:43:37] [PASSED] out of min range
[21:43:37] [PASSED] zero dst
[21:43:37] [PASSED] negative src
[21:43:37] [PASSED] negative dst
[21:43:37] ============ [PASSED] drm_test_rect_calc_vscale ============
[21:43:37] ================== drm_test_rect_rotate ===================
[21:43:37] [PASSED] reflect-x
[21:43:37] [PASSED] reflect-y
[21:43:37] [PASSED] rotate-0
[21:43:37] [PASSED] rotate-90
[21:43:37] [PASSED] rotate-180
[21:43:37] [PASSED] rotate-270
[21:43:37] ============== [PASSED] drm_test_rect_rotate ===============
[21:43:37] ================ drm_test_rect_rotate_inv =================
[21:43:37] [PASSED] reflect-x
[21:43:37] [PASSED] reflect-y
[21:43:37] [PASSED] rotate-0
[21:43:37] [PASSED] rotate-90
[21:43:37] [PASSED] rotate-180
[21:43:37] [PASSED] rotate-270
[21:43:37] ============ [PASSED] drm_test_rect_rotate_inv =============
[21:43:37] ==================== [PASSED] drm_rect =====================
[21:43:37] ============ drm_sysfb_modeset_test (1 subtest) ============
[21:43:37] ============ drm_test_sysfb_build_fourcc_list =============
[21:43:37] [PASSED] no native formats
[21:43:37] [PASSED] XRGB8888 as native format
[21:43:37] [PASSED] remove duplicates
[21:43:37] [PASSED] convert alpha formats
[21:43:37] [PASSED] random formats
[21:43:37] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[21:43:37] ============= [PASSED] drm_sysfb_modeset_test ==============
[21:43:37] ================== drm_fixp (2 subtests) ===================
[21:43:37] [PASSED] drm_test_int2fixp
[21:43:37] [PASSED] drm_test_sm2fixp
[21:43:37] ==================== [PASSED] drm_fixp =====================
[21:43:37] ============================================================
[21:43:37] Testing complete. Ran 639 tests: passed: 639
[21:43:37] Elapsed time: 26.121s total, 1.784s configuring, 24.173s building, 0.138s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[21:43:37] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:43:39] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:43:48] Starting KUnit Kernel (1/1)...
[21:43:48] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:43:49] ================= ttm_device (5 subtests) ==================
[21:43:49] [PASSED] ttm_device_init_basic
[21:43:49] [PASSED] ttm_device_init_multiple
[21:43:49] [PASSED] ttm_device_fini_basic
[21:43:49] [PASSED] ttm_device_init_no_vma_man
[21:43:49] ================== ttm_device_init_pools ==================
[21:43:49] [PASSED] No DMA allocations, no DMA32 required
[21:43:49] [PASSED] DMA allocations, DMA32 required
[21:43:49] [PASSED] No DMA allocations, DMA32 required
[21:43:49] [PASSED] DMA allocations, no DMA32 required
[21:43:49] ============== [PASSED] ttm_device_init_pools ==============
[21:43:49] =================== [PASSED] ttm_device ====================
[21:43:49] ================== ttm_pool (8 subtests) ===================
[21:43:49] ================== ttm_pool_alloc_basic ===================
[21:43:49] [PASSED] One page
[21:43:49] [PASSED] More than one page
[21:43:49] [PASSED] Above the allocation limit
[21:43:49] [PASSED] One page, with coherent DMA mappings enabled
[21:43:49] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:43:49] ============== [PASSED] ttm_pool_alloc_basic ===============
[21:43:49] ============== ttm_pool_alloc_basic_dma_addr ==============
[21:43:49] [PASSED] One page
[21:43:49] [PASSED] More than one page
[21:43:49] [PASSED] Above the allocation limit
[21:43:49] [PASSED] One page, with coherent DMA mappings enabled
[21:43:49] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:43:49] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[21:43:49] [PASSED] ttm_pool_alloc_order_caching_match
[21:43:49] [PASSED] ttm_pool_alloc_caching_mismatch
[21:43:49] [PASSED] ttm_pool_alloc_order_mismatch
[21:43:49] [PASSED] ttm_pool_free_dma_alloc
[21:43:49] [PASSED] ttm_pool_free_no_dma_alloc
[21:43:49] [PASSED] ttm_pool_fini_basic
[21:43:49] ==================== [PASSED] ttm_pool =====================
[21:43:49] ================ ttm_resource (8 subtests) =================
[21:43:49] ================= ttm_resource_init_basic =================
[21:43:49] [PASSED] Init resource in TTM_PL_SYSTEM
[21:43:49] [PASSED] Init resource in TTM_PL_VRAM
[21:43:49] [PASSED] Init resource in a private placement
[21:43:49] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[21:43:49] ============= [PASSED] ttm_resource_init_basic =============
[21:43:49] [PASSED] ttm_resource_init_pinned
[21:43:49] [PASSED] ttm_resource_fini_basic
[21:43:49] [PASSED] ttm_resource_manager_init_basic
[21:43:49] [PASSED] ttm_resource_manager_usage_basic
[21:43:49] [PASSED] ttm_resource_manager_set_used_basic
[21:43:49] [PASSED] ttm_sys_man_alloc_basic
[21:43:49] [PASSED] ttm_sys_man_free_basic
[21:43:49] ================== [PASSED] ttm_resource ===================
[21:43:49] =================== ttm_tt (15 subtests) ===================
[21:43:49] ==================== ttm_tt_init_basic ====================
[21:43:49] [PASSED] Page-aligned size
[21:43:49] [PASSED] Extra pages requested
[21:43:49] ================ [PASSED] ttm_tt_init_basic ================
[21:43:49] [PASSED] ttm_tt_init_misaligned
[21:43:49] [PASSED] ttm_tt_fini_basic
[21:43:49] [PASSED] ttm_tt_fini_sg
[21:43:49] [PASSED] ttm_tt_fini_shmem
[21:43:49] [PASSED] ttm_tt_create_basic
[21:43:49] [PASSED] ttm_tt_create_invalid_bo_type
[21:43:49] [PASSED] ttm_tt_create_ttm_exists
[21:43:49] [PASSED] ttm_tt_create_failed
[21:43:49] [PASSED] ttm_tt_destroy_basic
[21:43:49] [PASSED] ttm_tt_populate_null_ttm
[21:43:49] [PASSED] ttm_tt_populate_populated_ttm
[21:43:49] [PASSED] ttm_tt_unpopulate_basic
[21:43:49] [PASSED] ttm_tt_unpopulate_empty_ttm
[21:43:49] [PASSED] ttm_tt_swapin_basic
[21:43:49] ===================== [PASSED] ttm_tt ======================
[21:43:49] =================== ttm_bo (14 subtests) ===================
[21:43:49] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[21:43:49] [PASSED] Cannot be interrupted and sleeps
[21:43:49] [PASSED] Cannot be interrupted, locks straight away
[21:43:49] [PASSED] Can be interrupted, sleeps
[21:43:49] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[21:43:49] [PASSED] ttm_bo_reserve_locked_no_sleep
[21:43:49] [PASSED] ttm_bo_reserve_no_wait_ticket
[21:43:49] [PASSED] ttm_bo_reserve_double_resv
[21:43:49] [PASSED] ttm_bo_reserve_interrupted
[21:43:49] [PASSED] ttm_bo_reserve_deadlock
[21:43:49] [PASSED] ttm_bo_unreserve_basic
[21:43:49] [PASSED] ttm_bo_unreserve_pinned
[21:43:49] [PASSED] ttm_bo_unreserve_bulk
[21:43:49] [PASSED] ttm_bo_fini_basic
[21:43:49] [PASSED] ttm_bo_fini_shared_resv
[21:43:49] [PASSED] ttm_bo_pin_basic
[21:43:49] [PASSED] ttm_bo_pin_unpin_resource
[21:43:49] [PASSED] ttm_bo_multiple_pin_one_unpin
[21:43:49] ===================== [PASSED] ttm_bo ======================
[21:43:49] ============== ttm_bo_validate (22 subtests) ===============
[21:43:49] ============== ttm_bo_init_reserved_sys_man ===============
[21:43:49] [PASSED] Buffer object for userspace
[21:43:49] [PASSED] Kernel buffer object
[21:43:49] [PASSED] Shared buffer object
[21:43:49] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[21:43:49] ============== ttm_bo_init_reserved_mock_man ==============
[21:43:49] [PASSED] Buffer object for userspace
[21:43:49] [PASSED] Kernel buffer object
[21:43:49] [PASSED] Shared buffer object
[21:43:49] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[21:43:49] [PASSED] ttm_bo_init_reserved_resv
[21:43:49] ================== ttm_bo_validate_basic ==================
[21:43:49] [PASSED] Buffer object for userspace
[21:43:49] [PASSED] Kernel buffer object
[21:43:49] [PASSED] Shared buffer object
[21:43:49] ============== [PASSED] ttm_bo_validate_basic ==============
[21:43:49] [PASSED] ttm_bo_validate_invalid_placement
[21:43:49] ============= ttm_bo_validate_same_placement ==============
[21:43:49] [PASSED] System manager
[21:43:49] [PASSED] VRAM manager
[21:43:49] ========= [PASSED] ttm_bo_validate_same_placement ==========
[21:43:49] [PASSED] ttm_bo_validate_failed_alloc
[21:43:49] [PASSED] ttm_bo_validate_pinned
[21:43:49] [PASSED] ttm_bo_validate_busy_placement
[21:43:49] ================ ttm_bo_validate_multihop =================
[21:43:49] [PASSED] Buffer object for userspace
[21:43:49] [PASSED] Kernel buffer object
[21:43:49] [PASSED] Shared buffer object
[21:43:49] ============ [PASSED] ttm_bo_validate_multihop =============
[21:43:49] ========== ttm_bo_validate_no_placement_signaled ==========
[21:43:49] [PASSED] Buffer object in system domain, no page vector
[21:43:49] [PASSED] Buffer object in system domain with an existing page vector
[21:43:49] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[21:43:49] ======== ttm_bo_validate_no_placement_not_signaled ========
[21:43:49] [PASSED] Buffer object for userspace
[21:43:49] [PASSED] Kernel buffer object
[21:43:49] [PASSED] Shared buffer object
[21:43:49] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[21:43:49] [PASSED] ttm_bo_validate_move_fence_signaled
[21:43:49] ========= ttm_bo_validate_move_fence_not_signaled =========
[21:43:49] [PASSED] Waits for GPU
[21:43:49] [PASSED] Tries to lock straight away
[21:43:49] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[21:43:49] [PASSED] ttm_bo_validate_swapout
[21:43:49] [PASSED] ttm_bo_validate_happy_evict
[21:43:49] [PASSED] ttm_bo_validate_all_pinned_evict
[21:43:49] [PASSED] ttm_bo_validate_allowed_only_evict
[21:43:49] [PASSED] ttm_bo_validate_deleted_evict
[21:43:49] [PASSED] ttm_bo_validate_busy_domain_evict
[21:43:49] [PASSED] ttm_bo_validate_evict_gutting
[21:43:49] [PASSED] ttm_bo_validate_recrusive_evict
[21:43:49] ================= [PASSED] ttm_bo_validate =================
[21:43:49] ============================================================
[21:43:49] Testing complete. Ran 102 tests: passed: 102
[21:43:49] Elapsed time: 11.276s total, 1.665s configuring, 9.396s building, 0.184s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev2)
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (6 preceding siblings ...)
2026-06-22 21:43 ` ✓ CI.KUnit: success " Patchwork
@ 2026-06-22 22:39 ` Patchwork
2026-06-23 3:50 ` ✓ Xe.CI.FULL: " Patchwork
` (5 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-22 22:39 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1037 bytes --]
== Series Details ==
Series: drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev2)
URL : https://patchwork.freedesktop.org/series/168442/
State : success
== Summary ==
CI Bug Log - changes from xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798_BAT -> xe-pw-168442v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8976 -> IGT_8977
* Linux: xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798 -> xe-pw-168442v2
IGT_8976: 8976
IGT_8977: c8bdb0bc2140e337e1d79969430c3d7a5c088c9e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798: 6583dd200482a34bb17e5dc54551f91f53b79798
xe-pw-168442v2: 168442v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/index.html
[-- Attachment #2: Type: text/html, Size: 1599 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ Xe.CI.FULL: success for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev2)
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (7 preceding siblings ...)
2026-06-22 22:39 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-23 3:50 ` Patchwork
2026-06-23 12:41 ` ✗ CI.checkpatch: warning for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev4) Patchwork
` (4 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-23 3:50 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 21396 bytes --]
== Series Details ==
Series: drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev2)
URL : https://patchwork.freedesktop.org/series/168442/
State : success
== Summary ==
CI Bug Log - changes from xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798_FULL -> xe-pw-168442v2_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-168442v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][1] ([Intel XE#1124]) +4 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-3/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-lnl: NOTRUN -> [SKIP][2] ([Intel XE#1124])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-lnl-1/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_bw@linear-tiling-1-displays-target-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#367]) +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-2/igt@kms_bw@linear-tiling-1-displays-target-3840x2160p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#2887]) +6 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-10/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
- shard-lnl: NOTRUN -> [SKIP][5] ([Intel XE#2887])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-lnl-1/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
* igt@kms_chamelium_color@ctm-blue-to-red:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2325] / [Intel XE#7358])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-8/igt@kms_chamelium_color@ctm-blue-to-red.html
* igt@kms_chamelium_frames@dp-crc-multiple:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2252]) +2 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-2/igt@kms_chamelium_frames@dp-crc-multiple.html
* igt@kms_cursor_crc@cursor-offscreen-256x85:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#2320])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-10/igt@kms_cursor_crc@cursor-offscreen-256x85.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2321] / [Intel XE#7355])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-1/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2286] / [Intel XE#6035]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_dsc@dsc-basic-ultrajoiner:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#8265]) +1 other test skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-5/igt@kms_dsc@dsc-basic-ultrajoiner.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-lnl: [PASS][12] -> [FAIL][13] ([Intel XE#7949])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-3/igt@kms_fbcon_fbt@psr-suspend.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-lnl-2/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [PASS][14] -> [FAIL][15] ([Intel XE#301])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2311]) +17 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-9/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt.html
* igt@kms_frontbuffer_tracking@drrshdr-rgb565-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#6312])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-lnl-6/igt@kms_frontbuffer_tracking@drrshdr-rgb565-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#4141]) +4 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#7061] / [Intel XE#7356])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-shrfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2313]) +11 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#7061]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-blt.html
* igt@kms_getfb@getfb2-accept-nv12:
- shard-bmg: [PASS][22] -> [INCOMPLETE][23] ([Intel XE#2594])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-4/igt@kms_getfb@getfb2-accept-nv12.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-5/igt@kms_getfb@getfb2-accept-nv12.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][24] -> [SKIP][25] ([Intel XE#1503])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-8/igt@kms_hdr@invalid-hdr.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [PASS][26] -> [SKIP][27] ([Intel XE#7922]) +1 other test skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-8/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-5/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [PASS][28] -> [SKIP][29] ([Intel XE#7915]) +3 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-10/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-7/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#6911] / [Intel XE#7466])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-7/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#2486])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-10/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#7283]) +2 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-8/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#1439] / [Intel XE#7402] / [Intel XE#836])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-5/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#1489]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-3/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html
* igt@kms_psr@psr-basic:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-9/igt@kms_psr@psr-basic.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2330] / [Intel XE#5813])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-8/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_setmode@basic:
- shard-bmg: NOTRUN -> [FAIL][37] ([Intel XE#6361]) +2 other tests fail
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-9/igt@kms_setmode@basic.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-lnl: [PASS][38] -> [FAIL][39] ([Intel XE#6361]) +1 other test fail
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-4/igt@kms_setmode@basic@pipe-b-edp-1.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-lnl-7/igt@kms_setmode@basic@pipe-b-edp-1.html
* igt@kms_sharpness_filter@filter-basic:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#6503])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-9/igt@kms_sharpness_filter@filter-basic.html
* igt@kms_vrr@seamless-rr-switch-vrr:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#1499])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-7/igt@kms_vrr@seamless-rr-switch-vrr.html
* igt@xe_eudebug@basic-exec-queues:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#7636]) +3 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-4/igt@xe_eudebug@basic-exec-queues.html
- shard-lnl: NOTRUN -> [SKIP][43] ([Intel XE#7636])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-lnl-4/igt@xe_eudebug@basic-exec-queues.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-9/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind.html
* igt@xe_exec_fault_mode@many-multi-queue-rebind:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#8374]) +1 other test skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-8/igt@xe_exec_fault_mode@many-multi-queue-rebind.html
* igt@xe_exec_multi_queue@many-queues-priority-smem:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#8364]) +9 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-7/igt@xe_exec_multi_queue@many-queues-priority-smem.html
* igt@xe_exec_multi_queue@one-queue-preempt-mode-userptr-invalidate:
- shard-lnl: NOTRUN -> [SKIP][47] ([Intel XE#8364]) +2 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-lnl-4/igt@xe_exec_multi_queue@one-queue-preempt-mode-userptr-invalidate.html
* igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#8378]) +1 other test skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-7/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-rebind.html
* igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#6281] / [Intel XE#7426])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-5/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html
* igt@xe_query@multigpu-query-config:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#944])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-3/igt@xe_query@multigpu-query-config.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-bmg: [PASS][51] -> [FAIL][52] ([Intel XE#6569])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-10/igt@xe_sriov_flr@flr-vf1-clear.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-8/igt@xe_sriov_flr@flr-vf1-clear.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [FAIL][53] ([Intel XE#301]) -> [PASS][54] +1 other test pass
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [FAIL][55] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][56] +1 other test pass
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [SKIP][57] ([Intel XE#7915]) -> [PASS][58] +3 other tests pass
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-2/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-10/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@xe_sriov_vram@vf-access-provisioned:
- shard-bmg: [FAIL][59] ([Intel XE#7992]) -> [PASS][60] +1 other test pass
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-8/igt@xe_sriov_vram@vf-access-provisioned.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-5/igt@xe_sriov_vram@vf-access-provisioned.html
* igt@xe_vm@large-userptr-binds-16777216:
- shard-lnl: [ABORT][61] ([Intel XE#8007]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-5/igt@xe_vm@large-userptr-binds-16777216.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-lnl-2/igt@xe_vm@large-userptr-binds-16777216.html
#### Warnings ####
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][63] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][64] ([Intel XE#2426] / [Intel XE#5848])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][65] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][66] ([Intel XE#2509] / [Intel XE#7437])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
[Intel XE#6281]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6281
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
[Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7402]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7402
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7426
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7466
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
[Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
[Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
[Intel XE#7949]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7949
[Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* IGT: IGT_8976 -> IGT_8977
* Linux: xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798 -> xe-pw-168442v2
IGT_8976: 8976
IGT_8977: c8bdb0bc2140e337e1d79969430c3d7a5c088c9e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798: 6583dd200482a34bb17e5dc54551f91f53b79798
xe-pw-168442v2: 168442v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v2/index.html
[-- Attachment #2: Type: text/html, Size: 23760 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread* ✗ CI.checkpatch: warning for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev4)
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (8 preceding siblings ...)
2026-06-23 3:50 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-06-23 12:41 ` Patchwork
2026-06-23 12:42 ` ✓ CI.KUnit: success " Patchwork
` (3 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-23 12:41 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe
== Series Details ==
Series: drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev4)
URL : https://patchwork.freedesktop.org/series/168442/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit a1b839f72f83f277f4bc39f58c05f6d647199260
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Tue Jun 23 00:36:02 2026 +0300
drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset
Adjust the panel fixed mode selection algorithm to only consider
fixed modes that are "VRR compatible" with the old fixed mode
when userspace doesn't want to allow full modesets. This will
allow a VRR based refresh rate changes (ie. just a change in
the vblank length) via the fastset path.
When full modesets are allowed, we still use the original algorithm
as that may pick a fixed mode with a more optimal dotclock, potentially
leading to reduced power consumption.
This approach works as long as userspace does the initial
allow_modeset=true commit using the highest refresh rate it will
want to use. Subsequent commits with allow_modeset=false can then
switch between lower refresh rates without blinks.
One remaining hurdle we may need to solve is the guardband length.
Assuming the highest refresh rate vblank is too short for
intel_vrr_compute_optimized_guardband() the intitial guardband will
match the highest refresh rate vblank. A subsequent switch to a lower
refresh rate will then recompute the guardband and select a value
that is higher (since the vblank will be longer). The mismatch in
guardband lengths will prevent the fastset. We may either have to
preserve the original (sub-optimal) guardband, or we'll have to
revisit the idea of changing the guardband without a full modeset.
Note that I'm not 100% happy with this solution because
intel_panel_fixed_mode() is no longer fully idempotent, but I wasn't
able to come up with anything truly better either :/ The simple
solution would be just to always pick the fixed mode with the highest
dotclock, but that could lead to increased power consumption even
when high refresh rates are never used.
Perhaps the proper solution would be to just deprecate this
idea of taking in random modes for internal panels and then
cooking up a compatible fixed modes. Life would be easier if
userspace was required to provide the desired fixed mode directly.
But in order to do that we'd need to introduce new uapi properties
to control the pfit aspect of this, and we'd probably need a new
client cap to select between the old and new userspace behaviour.
Something to consider in the future...
v2: Rebase due to earlier changes to VRR fixed mode selection
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
+ /mt/dim checkpatch 60326b17f877e12846167bf8ef83680b9875218a drm-intel
b1a2ac4094b5 drm/i915/panel: Split VRR vs. fixed refresh rate fixed mode selection into separate stages
5c1f59fe51d2 drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
380d9631ea8c drm/i915: Pass the full atomic state to .compute_config()
-:174: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#174: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:180:
+ int (*compute_config)(struct intel_atomic_state *,
-:174: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#174: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:180:
+ int (*compute_config)(struct intel_atomic_state *,
-:174: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_crtc_state *' should also have an identifier name
#174: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:180:
+ int (*compute_config)(struct intel_atomic_state *,
-:174: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct drm_connector_state *' should also have an identifier name
#174: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:180:
+ int (*compute_config)(struct intel_atomic_state *,
-:179: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#179: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:184:
+ int (*compute_config_late)(struct intel_atomic_state *,
-:179: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#179: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:184:
+ int (*compute_config_late)(struct intel_atomic_state *,
-:179: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_crtc_state *' should also have an identifier name
#179: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:184:
+ int (*compute_config_late)(struct intel_atomic_state *,
-:179: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct drm_connector_state *' should also have an identifier name
#179: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:184:
+ int (*compute_config_late)(struct intel_atomic_state *,
total: 0 errors, 8 warnings, 0 checks, 224 lines checked
a12ea211d172 drm/i915/panel: Adjust intel_panel_compute_config() calling convention
a1b839f72f83 drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ CI.KUnit: success for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev4)
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (9 preceding siblings ...)
2026-06-23 12:41 ` ✗ CI.checkpatch: warning for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev4) Patchwork
@ 2026-06-23 12:42 ` Patchwork
2026-06-23 13:51 ` ✓ Xe.CI.BAT: " Patchwork
` (2 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-23 12:42 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe
== Series Details ==
Series: drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev4)
URL : https://patchwork.freedesktop.org/series/168442/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:41:27] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:41:31] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:42:02] Starting KUnit Kernel (1/1)...
[12:42:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:42:02] ================== guc_buf (11 subtests) ===================
[12:42:02] [PASSED] test_smallest
[12:42:02] [PASSED] test_largest
[12:42:03] [PASSED] test_granular
[12:42:03] [PASSED] test_unique
[12:42:03] [PASSED] test_overlap
[12:42:03] [PASSED] test_reusable
[12:42:03] [PASSED] test_too_big
[12:42:03] [PASSED] test_flush
[12:42:03] [PASSED] test_lookup
[12:42:03] [PASSED] test_data
[12:42:03] [PASSED] test_class
[12:42:03] ===================== [PASSED] guc_buf =====================
[12:42:03] =================== guc_dbm (7 subtests) ===================
[12:42:03] [PASSED] test_empty
[12:42:03] [PASSED] test_default
[12:42:03] ======================== test_size ========================
[12:42:03] [PASSED] 4
[12:42:03] [PASSED] 8
[12:42:03] [PASSED] 32
[12:42:03] [PASSED] 256
[12:42:03] ==================== [PASSED] test_size ====================
[12:42:03] ======================= test_reuse ========================
[12:42:03] [PASSED] 4
[12:42:03] [PASSED] 8
[12:42:03] [PASSED] 32
[12:42:03] [PASSED] 256
[12:42:03] =================== [PASSED] test_reuse ====================
[12:42:03] =================== test_range_overlap ====================
[12:42:03] [PASSED] 4
[12:42:03] [PASSED] 8
[12:42:03] [PASSED] 32
[12:42:03] [PASSED] 256
[12:42:03] =============== [PASSED] test_range_overlap ================
[12:42:03] =================== test_range_compact ====================
[12:42:03] [PASSED] 4
[12:42:03] [PASSED] 8
[12:42:03] [PASSED] 32
[12:42:03] [PASSED] 256
[12:42:03] =============== [PASSED] test_range_compact ================
[12:42:03] ==================== test_range_spare =====================
[12:42:03] [PASSED] 4
[12:42:03] [PASSED] 8
[12:42:03] [PASSED] 32
[12:42:03] [PASSED] 256
[12:42:03] ================ [PASSED] test_range_spare =================
[12:42:03] ===================== [PASSED] guc_dbm =====================
[12:42:03] =================== guc_idm (6 subtests) ===================
[12:42:03] [PASSED] bad_init
[12:42:03] [PASSED] no_init
[12:42:03] [PASSED] init_fini
[12:42:03] [PASSED] check_used
[12:42:03] [PASSED] check_quota
[12:42:03] [PASSED] check_all
[12:42:03] ===================== [PASSED] guc_idm =====================
[12:42:03] ================== no_relay (3 subtests) ===================
[12:42:03] [PASSED] xe_drops_guc2pf_if_not_ready
[12:42:03] [PASSED] xe_drops_guc2vf_if_not_ready
[12:42:03] [PASSED] xe_rejects_send_if_not_ready
[12:42:03] ==================== [PASSED] no_relay =====================
[12:42:03] ================== pf_relay (14 subtests) ==================
[12:42:03] [PASSED] pf_rejects_guc2pf_too_short
[12:42:03] [PASSED] pf_rejects_guc2pf_too_long
[12:42:03] [PASSED] pf_rejects_guc2pf_no_payload
[12:42:03] [PASSED] pf_fails_no_payload
[12:42:03] [PASSED] pf_fails_bad_origin
[12:42:03] [PASSED] pf_fails_bad_type
[12:42:03] [PASSED] pf_txn_reports_error
[12:42:03] [PASSED] pf_txn_sends_pf2guc
[12:42:03] [PASSED] pf_sends_pf2guc
[12:42:03] [SKIPPED] pf_loopback_nop
[12:42:03] [SKIPPED] pf_loopback_echo
[12:42:03] [SKIPPED] pf_loopback_fail
[12:42:03] [SKIPPED] pf_loopback_busy
[12:42:03] [SKIPPED] pf_loopback_retry
[12:42:03] ==================== [PASSED] pf_relay =====================
[12:42:03] ================== vf_relay (3 subtests) ===================
[12:42:03] [PASSED] vf_rejects_guc2vf_too_short
[12:42:03] [PASSED] vf_rejects_guc2vf_too_long
[12:42:03] [PASSED] vf_rejects_guc2vf_no_payload
[12:42:03] ==================== [PASSED] vf_relay =====================
[12:42:03] ================ pf_gt_config (9 subtests) =================
[12:42:03] [PASSED] fair_contexts_1vf
[12:42:03] [PASSED] fair_doorbells_1vf
[12:42:03] [PASSED] fair_ggtt_1vf
[12:42:03] ====================== fair_vram_1vf ======================
[12:42:03] [PASSED] 3.50 GiB
[12:42:03] [PASSED] 11.5 GiB
[12:42:03] [PASSED] 15.5 GiB
[12:42:03] [PASSED] 31.5 GiB
[12:42:03] [PASSED] 63.5 GiB
[12:42:03] [PASSED] 1.91 GiB
[12:42:03] ================== [PASSED] fair_vram_1vf ==================
[12:42:03] ================ fair_vram_1vf_admin_only =================
[12:42:03] [PASSED] 3.50 GiB
[12:42:03] [PASSED] 11.5 GiB
[12:42:03] [PASSED] 15.5 GiB
[12:42:03] [PASSED] 31.5 GiB
[12:42:03] [PASSED] 63.5 GiB
[12:42:03] [PASSED] 1.91 GiB
[12:42:03] ============ [PASSED] fair_vram_1vf_admin_only =============
[12:42:03] ====================== fair_contexts ======================
[12:42:03] [PASSED] 1 VF
[12:42:03] [PASSED] 2 VFs
[12:42:03] [PASSED] 3 VFs
[12:42:03] [PASSED] 4 VFs
[12:42:03] [PASSED] 5 VFs
[12:42:03] [PASSED] 6 VFs
[12:42:03] [PASSED] 7 VFs
[12:42:03] [PASSED] 8 VFs
[12:42:03] [PASSED] 9 VFs
[12:42:03] [PASSED] 10 VFs
[12:42:03] [PASSED] 11 VFs
[12:42:03] [PASSED] 12 VFs
[12:42:03] [PASSED] 13 VFs
[12:42:03] [PASSED] 14 VFs
[12:42:03] [PASSED] 15 VFs
[12:42:03] [PASSED] 16 VFs
[12:42:03] [PASSED] 17 VFs
[12:42:03] [PASSED] 18 VFs
[12:42:03] [PASSED] 19 VFs
[12:42:03] [PASSED] 20 VFs
[12:42:03] [PASSED] 21 VFs
[12:42:03] [PASSED] 22 VFs
[12:42:03] [PASSED] 23 VFs
[12:42:03] [PASSED] 24 VFs
[12:42:03] [PASSED] 25 VFs
[12:42:03] [PASSED] 26 VFs
[12:42:03] [PASSED] 27 VFs
[12:42:03] [PASSED] 28 VFs
[12:42:03] [PASSED] 29 VFs
[12:42:03] [PASSED] 30 VFs
[12:42:03] [PASSED] 31 VFs
[12:42:03] [PASSED] 32 VFs
[12:42:03] [PASSED] 33 VFs
[12:42:03] [PASSED] 34 VFs
[12:42:03] [PASSED] 35 VFs
[12:42:03] [PASSED] 36 VFs
[12:42:03] [PASSED] 37 VFs
[12:42:03] [PASSED] 38 VFs
[12:42:03] [PASSED] 39 VFs
[12:42:03] [PASSED] 40 VFs
[12:42:03] [PASSED] 41 VFs
[12:42:03] [PASSED] 42 VFs
[12:42:03] [PASSED] 43 VFs
[12:42:03] [PASSED] 44 VFs
[12:42:03] [PASSED] 45 VFs
[12:42:03] [PASSED] 46 VFs
[12:42:03] [PASSED] 47 VFs
[12:42:03] [PASSED] 48 VFs
[12:42:03] [PASSED] 49 VFs
[12:42:03] [PASSED] 50 VFs
[12:42:03] [PASSED] 51 VFs
[12:42:03] [PASSED] 52 VFs
[12:42:03] [PASSED] 53 VFs
[12:42:03] [PASSED] 54 VFs
[12:42:03] [PASSED] 55 VFs
[12:42:03] [PASSED] 56 VFs
[12:42:03] [PASSED] 57 VFs
[12:42:03] [PASSED] 58 VFs
[12:42:03] [PASSED] 59 VFs
[12:42:03] [PASSED] 60 VFs
[12:42:03] [PASSED] 61 VFs
[12:42:03] [PASSED] 62 VFs
[12:42:03] [PASSED] 63 VFs
[12:42:03] ================== [PASSED] fair_contexts ==================
[12:42:03] ===================== fair_doorbells ======================
[12:42:03] [PASSED] 1 VF
[12:42:03] [PASSED] 2 VFs
[12:42:03] [PASSED] 3 VFs
[12:42:03] [PASSED] 4 VFs
[12:42:03] [PASSED] 5 VFs
[12:42:03] [PASSED] 6 VFs
[12:42:03] [PASSED] 7 VFs
[12:42:03] [PASSED] 8 VFs
[12:42:03] [PASSED] 9 VFs
[12:42:03] [PASSED] 10 VFs
[12:42:03] [PASSED] 11 VFs
[12:42:03] [PASSED] 12 VFs
[12:42:03] [PASSED] 13 VFs
[12:42:03] [PASSED] 14 VFs
[12:42:03] [PASSED] 15 VFs
[12:42:03] [PASSED] 16 VFs
[12:42:03] [PASSED] 17 VFs
[12:42:03] [PASSED] 18 VFs
[12:42:03] [PASSED] 19 VFs
[12:42:03] [PASSED] 20 VFs
[12:42:03] [PASSED] 21 VFs
[12:42:03] [PASSED] 22 VFs
[12:42:03] [PASSED] 23 VFs
[12:42:03] [PASSED] 24 VFs
[12:42:03] [PASSED] 25 VFs
[12:42:03] [PASSED] 26 VFs
[12:42:03] [PASSED] 27 VFs
[12:42:03] [PASSED] 28 VFs
[12:42:03] [PASSED] 29 VFs
[12:42:03] [PASSED] 30 VFs
[12:42:03] [PASSED] 31 VFs
[12:42:03] [PASSED] 32 VFs
[12:42:03] [PASSED] 33 VFs
[12:42:03] [PASSED] 34 VFs
[12:42:03] [PASSED] 35 VFs
[12:42:03] [PASSED] 36 VFs
[12:42:03] [PASSED] 37 VFs
[12:42:03] [PASSED] 38 VFs
[12:42:03] [PASSED] 39 VFs
[12:42:03] [PASSED] 40 VFs
[12:42:03] [PASSED] 41 VFs
[12:42:03] [PASSED] 42 VFs
[12:42:03] [PASSED] 43 VFs
[12:42:03] [PASSED] 44 VFs
[12:42:03] [PASSED] 45 VFs
[12:42:03] [PASSED] 46 VFs
[12:42:03] [PASSED] 47 VFs
[12:42:03] [PASSED] 48 VFs
[12:42:03] [PASSED] 49 VFs
[12:42:03] [PASSED] 50 VFs
[12:42:03] [PASSED] 51 VFs
[12:42:03] [PASSED] 52 VFs
[12:42:03] [PASSED] 53 VFs
[12:42:03] [PASSED] 54 VFs
[12:42:03] [PASSED] 55 VFs
[12:42:03] [PASSED] 56 VFs
[12:42:03] [PASSED] 57 VFs
[12:42:03] [PASSED] 58 VFs
[12:42:03] [PASSED] 59 VFs
[12:42:03] [PASSED] 60 VFs
[12:42:03] [PASSED] 61 VFs
[12:42:03] [PASSED] 62 VFs
[12:42:03] [PASSED] 63 VFs
[12:42:03] ================= [PASSED] fair_doorbells ==================
[12:42:03] ======================== fair_ggtt ========================
[12:42:03] [PASSED] 1 VF
[12:42:03] [PASSED] 2 VFs
[12:42:03] [PASSED] 3 VFs
[12:42:03] [PASSED] 4 VFs
[12:42:03] [PASSED] 5 VFs
[12:42:03] [PASSED] 6 VFs
[12:42:03] [PASSED] 7 VFs
[12:42:03] [PASSED] 8 VFs
[12:42:03] [PASSED] 9 VFs
[12:42:03] [PASSED] 10 VFs
[12:42:03] [PASSED] 11 VFs
[12:42:03] [PASSED] 12 VFs
[12:42:03] [PASSED] 13 VFs
[12:42:03] [PASSED] 14 VFs
[12:42:03] [PASSED] 15 VFs
[12:42:03] [PASSED] 16 VFs
[12:42:03] [PASSED] 17 VFs
[12:42:03] [PASSED] 18 VFs
[12:42:03] [PASSED] 19 VFs
[12:42:03] [PASSED] 20 VFs
[12:42:03] [PASSED] 21 VFs
[12:42:03] [PASSED] 22 VFs
[12:42:03] [PASSED] 23 VFs
[12:42:03] [PASSED] 24 VFs
[12:42:03] [PASSED] 25 VFs
[12:42:03] [PASSED] 26 VFs
[12:42:03] [PASSED] 27 VFs
[12:42:03] [PASSED] 28 VFs
[12:42:03] [PASSED] 29 VFs
[12:42:03] [PASSED] 30 VFs
[12:42:03] [PASSED] 31 VFs
[12:42:03] [PASSED] 32 VFs
[12:42:03] [PASSED] 33 VFs
[12:42:03] [PASSED] 34 VFs
[12:42:03] [PASSED] 35 VFs
[12:42:03] [PASSED] 36 VFs
[12:42:03] [PASSED] 37 VFs
[12:42:03] [PASSED] 38 VFs
[12:42:03] [PASSED] 39 VFs
[12:42:03] [PASSED] 40 VFs
[12:42:03] [PASSED] 41 VFs
[12:42:03] [PASSED] 42 VFs
[12:42:03] [PASSED] 43 VFs
[12:42:03] [PASSED] 44 VFs
[12:42:03] [PASSED] 45 VFs
[12:42:03] [PASSED] 46 VFs
[12:42:03] [PASSED] 47 VFs
[12:42:03] [PASSED] 48 VFs
[12:42:03] [PASSED] 49 VFs
[12:42:03] [PASSED] 50 VFs
[12:42:03] [PASSED] 51 VFs
[12:42:03] [PASSED] 52 VFs
[12:42:03] [PASSED] 53 VFs
[12:42:03] [PASSED] 54 VFs
[12:42:03] [PASSED] 55 VFs
[12:42:03] [PASSED] 56 VFs
[12:42:03] [PASSED] 57 VFs
[12:42:03] [PASSED] 58 VFs
[12:42:03] [PASSED] 59 VFs
[12:42:03] [PASSED] 60 VFs
[12:42:03] [PASSED] 61 VFs
[12:42:03] [PASSED] 62 VFs
[12:42:03] [PASSED] 63 VFs
[12:42:03] ==================== [PASSED] fair_ggtt ====================
[12:42:03] ======================== fair_vram ========================
[12:42:03] [PASSED] 1 VF
[12:42:03] [PASSED] 2 VFs
[12:42:03] [PASSED] 3 VFs
[12:42:03] [PASSED] 4 VFs
[12:42:03] [PASSED] 5 VFs
[12:42:03] [PASSED] 6 VFs
[12:42:03] [PASSED] 7 VFs
[12:42:03] [PASSED] 8 VFs
[12:42:03] [PASSED] 9 VFs
[12:42:03] [PASSED] 10 VFs
[12:42:03] [PASSED] 11 VFs
[12:42:03] [PASSED] 12 VFs
[12:42:03] [PASSED] 13 VFs
[12:42:03] [PASSED] 14 VFs
[12:42:03] [PASSED] 15 VFs
[12:42:03] [PASSED] 16 VFs
[12:42:03] [PASSED] 17 VFs
[12:42:03] [PASSED] 18 VFs
[12:42:03] [PASSED] 19 VFs
[12:42:03] [PASSED] 20 VFs
[12:42:03] [PASSED] 21 VFs
[12:42:03] [PASSED] 22 VFs
[12:42:03] [PASSED] 23 VFs
[12:42:03] [PASSED] 24 VFs
[12:42:03] [PASSED] 25 VFs
[12:42:03] [PASSED] 26 VFs
[12:42:03] [PASSED] 27 VFs
[12:42:03] [PASSED] 28 VFs
[12:42:03] [PASSED] 29 VFs
[12:42:03] [PASSED] 30 VFs
[12:42:03] [PASSED] 31 VFs
[12:42:03] [PASSED] 32 VFs
[12:42:03] [PASSED] 33 VFs
[12:42:03] [PASSED] 34 VFs
[12:42:03] [PASSED] 35 VFs
[12:42:03] [PASSED] 36 VFs
[12:42:03] [PASSED] 37 VFs
[12:42:03] [PASSED] 38 VFs
[12:42:03] [PASSED] 39 VFs
[12:42:03] [PASSED] 40 VFs
[12:42:03] [PASSED] 41 VFs
[12:42:03] [PASSED] 42 VFs
[12:42:03] [PASSED] 43 VFs
[12:42:03] [PASSED] 44 VFs
[12:42:03] [PASSED] 45 VFs
[12:42:03] [PASSED] 46 VFs
[12:42:03] [PASSED] 47 VFs
[12:42:03] [PASSED] 48 VFs
[12:42:03] [PASSED] 49 VFs
[12:42:03] [PASSED] 50 VFs
[12:42:03] [PASSED] 51 VFs
[12:42:03] [PASSED] 52 VFs
[12:42:03] [PASSED] 53 VFs
[12:42:03] [PASSED] 54 VFs
[12:42:03] [PASSED] 55 VFs
[12:42:03] [PASSED] 56 VFs
[12:42:03] [PASSED] 57 VFs
[12:42:03] [PASSED] 58 VFs
[12:42:03] [PASSED] 59 VFs
[12:42:03] [PASSED] 60 VFs
[12:42:03] [PASSED] 61 VFs
[12:42:03] [PASSED] 62 VFs
[12:42:03] [PASSED] 63 VFs
[12:42:03] ==================== [PASSED] fair_vram ====================
[12:42:03] ================== [PASSED] pf_gt_config ===================
[12:42:03] ===================== lmtt (1 subtest) =====================
[12:42:03] ======================== test_ops =========================
[12:42:03] [PASSED] 2-level
[12:42:03] [PASSED] multi-level
[12:42:03] ==================== [PASSED] test_ops =====================
[12:42:03] ====================== [PASSED] lmtt =======================
[12:42:03] ================= pf_service (11 subtests) =================
[12:42:03] [PASSED] pf_negotiate_any
[12:42:03] [PASSED] pf_negotiate_base_match
[12:42:03] [PASSED] pf_negotiate_base_newer
[12:42:03] [PASSED] pf_negotiate_base_next
[12:42:03] [SKIPPED] pf_negotiate_base_older
[12:42:03] [PASSED] pf_negotiate_base_prev
[12:42:03] [PASSED] pf_negotiate_latest_match
[12:42:03] [PASSED] pf_negotiate_latest_newer
[12:42:03] [PASSED] pf_negotiate_latest_next
[12:42:03] [SKIPPED] pf_negotiate_latest_older
[12:42:03] [SKIPPED] pf_negotiate_latest_prev
[12:42:03] =================== [PASSED] pf_service ====================
[12:42:03] ================= xe_guc_g2g (2 subtests) ==================
[12:42:03] ============== xe_live_guc_g2g_kunit_default ==============
[12:42:03] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:42:03] ============== xe_live_guc_g2g_kunit_allmem ===============
[12:42:03] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:42:03] =================== [SKIPPED] xe_guc_g2g ===================
[12:42:03] =================== xe_mocs (2 subtests) ===================
[12:42:03] ================ xe_live_mocs_kernel_kunit ================
[12:42:03] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:42:03] ================ xe_live_mocs_reset_kunit =================
[12:42:03] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:42:03] ==================== [SKIPPED] xe_mocs =====================
[12:42:03] ================= xe_migrate (2 subtests) ==================
[12:42:03] ================= xe_migrate_sanity_kunit =================
[12:42:03] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:42:03] ================== xe_validate_ccs_kunit ==================
[12:42:03] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:42:03] =================== [SKIPPED] xe_migrate ===================
[12:42:03] ================== xe_dma_buf (1 subtest) ==================
[12:42:03] ==================== xe_dma_buf_kunit =====================
[12:42:03] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:42:03] =================== [SKIPPED] xe_dma_buf ===================
[12:42:03] ================= xe_bo_shrink (1 subtest) =================
[12:42:03] =================== xe_bo_shrink_kunit ====================
[12:42:03] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:42:03] ================== [SKIPPED] xe_bo_shrink ==================
[12:42:03] ==================== xe_bo (2 subtests) ====================
[12:42:03] ================== xe_ccs_migrate_kunit ===================
[12:42:03] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:42:03] ==================== xe_bo_evict_kunit ====================
[12:42:03] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:42:03] ===================== [SKIPPED] xe_bo ======================
[12:42:03] ==================== args (13 subtests) ====================
[12:42:03] [PASSED] count_args_test
[12:42:03] [PASSED] call_args_example
[12:42:03] [PASSED] call_args_test
[12:42:03] [PASSED] drop_first_arg_example
[12:42:03] [PASSED] drop_first_arg_test
[12:42:03] [PASSED] first_arg_example
[12:42:03] [PASSED] first_arg_test
[12:42:03] [PASSED] last_arg_example
[12:42:03] [PASSED] last_arg_test
[12:42:03] [PASSED] pick_arg_example
[12:42:03] [PASSED] if_args_example
[12:42:03] [PASSED] if_args_test
[12:42:03] [PASSED] sep_comma_example
[12:42:03] ====================== [PASSED] args =======================
[12:42:03] =================== xe_pci (3 subtests) ====================
[12:42:03] ==================== check_graphics_ip ====================
[12:42:03] [PASSED] 12.00 Xe_LP
[12:42:03] [PASSED] 12.10 Xe_LP+
[12:42:03] [PASSED] 12.55 Xe_HPG
[12:42:03] [PASSED] 12.60 Xe_HPC
[12:42:03] [PASSED] 12.70 Xe_LPG
[12:42:03] [PASSED] 12.71 Xe_LPG
[12:42:03] [PASSED] 12.74 Xe_LPG+
[12:42:03] [PASSED] 20.01 Xe2_HPG
[12:42:03] [PASSED] 20.02 Xe2_HPG
[12:42:03] [PASSED] 20.04 Xe2_LPG
[12:42:03] [PASSED] 30.00 Xe3_LPG
[12:42:03] [PASSED] 30.01 Xe3_LPG
[12:42:03] [PASSED] 30.03 Xe3_LPG
[12:42:03] [PASSED] 30.04 Xe3_LPG
[12:42:03] [PASSED] 30.05 Xe3_LPG
[12:42:03] [PASSED] 35.10 Xe3p_LPG
[12:42:03] [PASSED] 35.11 Xe3p_XPC
[12:42:03] ================ [PASSED] check_graphics_ip ================
[12:42:03] ===================== check_media_ip ======================
[12:42:03] [PASSED] 12.00 Xe_M
[12:42:03] [PASSED] 12.55 Xe_HPM
[12:42:03] [PASSED] 13.00 Xe_LPM+
[12:42:03] [PASSED] 13.01 Xe2_HPM
[12:42:03] [PASSED] 20.00 Xe2_LPM
[12:42:03] [PASSED] 30.00 Xe3_LPM
[12:42:03] [PASSED] 30.02 Xe3_LPM
[12:42:03] [PASSED] 35.00 Xe3p_LPM
[12:42:03] [PASSED] 35.03 Xe3p_HPM
[12:42:03] ================= [PASSED] check_media_ip ==================
[12:42:03] =================== check_platform_desc ===================
[12:42:03] [PASSED] 0x9A60 (TIGERLAKE)
[12:42:03] [PASSED] 0x9A68 (TIGERLAKE)
[12:42:03] [PASSED] 0x9A70 (TIGERLAKE)
[12:42:03] [PASSED] 0x9A40 (TIGERLAKE)
[12:42:03] [PASSED] 0x9A49 (TIGERLAKE)
[12:42:03] [PASSED] 0x9A59 (TIGERLAKE)
[12:42:03] [PASSED] 0x9A78 (TIGERLAKE)
[12:42:03] [PASSED] 0x9AC0 (TIGERLAKE)
[12:42:03] [PASSED] 0x9AC9 (TIGERLAKE)
[12:42:03] [PASSED] 0x9AD9 (TIGERLAKE)
[12:42:03] [PASSED] 0x9AF8 (TIGERLAKE)
[12:42:03] [PASSED] 0x4C80 (ROCKETLAKE)
[12:42:03] [PASSED] 0x4C8A (ROCKETLAKE)
[12:42:03] [PASSED] 0x4C8B (ROCKETLAKE)
[12:42:03] [PASSED] 0x4C8C (ROCKETLAKE)
[12:42:03] [PASSED] 0x4C90 (ROCKETLAKE)
[12:42:03] [PASSED] 0x4C9A (ROCKETLAKE)
[12:42:03] [PASSED] 0x4680 (ALDERLAKE_S)
[12:42:03] [PASSED] 0x4682 (ALDERLAKE_S)
[12:42:03] [PASSED] 0x4688 (ALDERLAKE_S)
[12:42:03] [PASSED] 0x468A (ALDERLAKE_S)
[12:42:03] [PASSED] 0x468B (ALDERLAKE_S)
[12:42:03] [PASSED] 0x4690 (ALDERLAKE_S)
[12:42:03] [PASSED] 0x4692 (ALDERLAKE_S)
[12:42:03] [PASSED] 0x4693 (ALDERLAKE_S)
[12:42:03] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46AA (ALDERLAKE_P)
[12:42:03] [PASSED] 0x462A (ALDERLAKE_P)
[12:42:03] [PASSED] 0x4626 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x4628 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:42:03] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:42:03] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:42:03] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:42:03] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:42:03] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:42:03] [PASSED] 0xA721 (ALDERLAKE_P)
[12:42:03] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:42:03] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:42:03] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:42:03] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:42:03] [PASSED] 0xA720 (ALDERLAKE_P)
[12:42:03] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:42:03] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:42:03] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:42:03] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:42:03] [PASSED] 0xA780 (ALDERLAKE_S)
[12:42:03] [PASSED] 0xA781 (ALDERLAKE_S)
[12:42:03] [PASSED] 0xA782 (ALDERLAKE_S)
[12:42:03] [PASSED] 0xA783 (ALDERLAKE_S)
[12:42:03] [PASSED] 0xA788 (ALDERLAKE_S)
[12:42:03] [PASSED] 0xA789 (ALDERLAKE_S)
[12:42:03] [PASSED] 0xA78A (ALDERLAKE_S)
[12:42:03] [PASSED] 0xA78B (ALDERLAKE_S)
[12:42:03] [PASSED] 0x4905 (DG1)
[12:42:03] [PASSED] 0x4906 (DG1)
[12:42:03] [PASSED] 0x4907 (DG1)
[12:42:03] [PASSED] 0x4908 (DG1)
[12:42:03] [PASSED] 0x4909 (DG1)
[12:42:03] [PASSED] 0x56C0 (DG2)
[12:42:03] [PASSED] 0x56C2 (DG2)
[12:42:03] [PASSED] 0x56C1 (DG2)
[12:42:03] [PASSED] 0x7D51 (METEORLAKE)
[12:42:03] [PASSED] 0x7DD1 (METEORLAKE)
[12:42:03] [PASSED] 0x7D41 (METEORLAKE)
[12:42:03] [PASSED] 0x7D67 (METEORLAKE)
[12:42:03] [PASSED] 0xB640 (METEORLAKE)
[12:42:03] [PASSED] 0x56A0 (DG2)
[12:42:03] [PASSED] 0x56A1 (DG2)
[12:42:03] [PASSED] 0x56A2 (DG2)
[12:42:03] [PASSED] 0x56BE (DG2)
[12:42:03] [PASSED] 0x56BF (DG2)
[12:42:03] [PASSED] 0x5690 (DG2)
[12:42:03] [PASSED] 0x5691 (DG2)
[12:42:03] [PASSED] 0x5692 (DG2)
[12:42:03] [PASSED] 0x56A5 (DG2)
[12:42:03] [PASSED] 0x56A6 (DG2)
[12:42:03] [PASSED] 0x56B0 (DG2)
[12:42:03] [PASSED] 0x56B1 (DG2)
[12:42:03] [PASSED] 0x56BA (DG2)
[12:42:03] [PASSED] 0x56BB (DG2)
[12:42:03] [PASSED] 0x56BC (DG2)
[12:42:03] [PASSED] 0x56BD (DG2)
[12:42:03] [PASSED] 0x5693 (DG2)
[12:42:03] [PASSED] 0x5694 (DG2)
[12:42:03] [PASSED] 0x5695 (DG2)
[12:42:03] [PASSED] 0x56A3 (DG2)
[12:42:03] [PASSED] 0x56A4 (DG2)
[12:42:03] [PASSED] 0x56B2 (DG2)
[12:42:03] [PASSED] 0x56B3 (DG2)
[12:42:03] [PASSED] 0x5696 (DG2)
[12:42:03] [PASSED] 0x5697 (DG2)
[12:42:03] [PASSED] 0xB69 (PVC)
[12:42:03] [PASSED] 0xB6E (PVC)
[12:42:03] [PASSED] 0xBD4 (PVC)
[12:42:03] [PASSED] 0xBD5 (PVC)
[12:42:03] [PASSED] 0xBD6 (PVC)
[12:42:03] [PASSED] 0xBD7 (PVC)
[12:42:03] [PASSED] 0xBD8 (PVC)
[12:42:03] [PASSED] 0xBD9 (PVC)
[12:42:03] [PASSED] 0xBDA (PVC)
[12:42:03] [PASSED] 0xBDB (PVC)
[12:42:03] [PASSED] 0xBE0 (PVC)
[12:42:03] [PASSED] 0xBE1 (PVC)
[12:42:03] [PASSED] 0xBE5 (PVC)
[12:42:03] [PASSED] 0x7D40 (METEORLAKE)
[12:42:03] [PASSED] 0x7D45 (METEORLAKE)
[12:42:03] [PASSED] 0x7D55 (METEORLAKE)
[12:42:03] [PASSED] 0x7D60 (METEORLAKE)
[12:42:03] [PASSED] 0x7DD5 (METEORLAKE)
[12:42:03] [PASSED] 0x6420 (LUNARLAKE)
[12:42:03] [PASSED] 0x64A0 (LUNARLAKE)
[12:42:03] [PASSED] 0x64B0 (LUNARLAKE)
[12:42:03] [PASSED] 0xE202 (BATTLEMAGE)
[12:42:03] [PASSED] 0xE209 (BATTLEMAGE)
[12:42:03] [PASSED] 0xE20B (BATTLEMAGE)
[12:42:03] [PASSED] 0xE20C (BATTLEMAGE)
[12:42:03] [PASSED] 0xE20D (BATTLEMAGE)
[12:42:03] [PASSED] 0xE210 (BATTLEMAGE)
[12:42:03] [PASSED] 0xE211 (BATTLEMAGE)
[12:42:03] [PASSED] 0xE212 (BATTLEMAGE)
[12:42:03] [PASSED] 0xE216 (BATTLEMAGE)
[12:42:03] [PASSED] 0xE220 (BATTLEMAGE)
[12:42:03] [PASSED] 0xE221 (BATTLEMAGE)
[12:42:03] [PASSED] 0xE222 (BATTLEMAGE)
[12:42:03] [PASSED] 0xE223 (BATTLEMAGE)
[12:42:03] [PASSED] 0xB080 (PANTHERLAKE)
[12:42:03] [PASSED] 0xB081 (PANTHERLAKE)
[12:42:03] [PASSED] 0xB082 (PANTHERLAKE)
[12:42:03] [PASSED] 0xB083 (PANTHERLAKE)
[12:42:03] [PASSED] 0xB084 (PANTHERLAKE)
[12:42:03] [PASSED] 0xB085 (PANTHERLAKE)
[12:42:03] [PASSED] 0xB086 (PANTHERLAKE)
[12:42:03] [PASSED] 0xB087 (PANTHERLAKE)
[12:42:03] [PASSED] 0xB08F (PANTHERLAKE)
[12:42:03] [PASSED] 0xB090 (PANTHERLAKE)
[12:42:03] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:42:03] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:42:03] [PASSED] 0xFD80 (PANTHERLAKE)
[12:42:03] [PASSED] 0xFD81 (PANTHERLAKE)
[12:42:03] [PASSED] 0xD740 (NOVALAKE_S)
[12:42:03] [PASSED] 0xD741 (NOVALAKE_S)
[12:42:03] [PASSED] 0xD742 (NOVALAKE_S)
[12:42:03] [PASSED] 0xD743 (NOVALAKE_S)
[12:42:03] [PASSED] 0xD745 (NOVALAKE_S)
[12:42:03] [PASSED] 0xD74A (NOVALAKE_S)
[12:42:03] [PASSED] 0xD74B (NOVALAKE_S)
[12:42:03] [PASSED] 0x674C (CRESCENTISLAND)
[12:42:03] [PASSED] 0x674D (CRESCENTISLAND)
[12:42:03] [PASSED] 0x674E (CRESCENTISLAND)
[12:42:03] [PASSED] 0x674F (CRESCENTISLAND)
[12:42:03] [PASSED] 0x6750 (CRESCENTISLAND)
[12:42:03] [PASSED] 0xD750 (NOVALAKE_P)
[12:42:03] [PASSED] 0xD751 (NOVALAKE_P)
[12:42:03] [PASSED] 0xD752 (NOVALAKE_P)
[12:42:03] [PASSED] 0xD753 (NOVALAKE_P)
[12:42:03] [PASSED] 0xD754 (NOVALAKE_P)
[12:42:03] [PASSED] 0xD755 (NOVALAKE_P)
[12:42:03] [PASSED] 0xD756 (NOVALAKE_P)
[12:42:03] [PASSED] 0xD757 (NOVALAKE_P)
[12:42:03] [PASSED] 0xD75F (NOVALAKE_P)
[12:42:03] =============== [PASSED] check_platform_desc ===============
[12:42:03] ===================== [PASSED] xe_pci ======================
[12:42:03] ============= xe_rtp_tables_test (4 subtests) ==============
[12:42:03] ================== xe_rtp_table_gt_test ===================
[12:42:03] [PASSED] gt_was/14011060649
[12:42:03] [PASSED] gt_was/14011059788
[12:42:03] [PASSED] gt_was/14015795083
[12:42:03] [PASSED] gt_was/16021867713
[12:42:03] [PASSED] gt_was/14019449301
[12:42:03] [PASSED] gt_was/16028005424
[12:42:03] [PASSED] gt_was/14026578760
[12:42:03] [PASSED] gt_was/1409420604
[12:42:03] [PASSED] gt_was/1408615072
[12:42:03] [PASSED] gt_was/22010523718
[12:42:03] [PASSED] gt_was/14011006942
[12:42:03] [PASSED] gt_was/14014830051
[12:42:03] [PASSED] gt_was/18018781329
[12:42:03] [PASSED] gt_was/1509235366
[12:42:03] [PASSED] gt_was/18018781329
[12:42:03] [PASSED] gt_was/16016694945
[12:42:03] [PASSED] gt_was/14018575942
[12:42:03] [PASSED] gt_was/22016670082
[12:42:03] [PASSED] gt_was/22016670082
[12:42:03] [PASSED] gt_was/14017421178
[12:42:03] [PASSED] gt_was/16025250150
[12:42:03] [PASSED] gt_was/14021871409
[12:42:03] [PASSED] gt_was/16021865536
[12:42:03] [PASSED] gt_was/14021486841
[12:42:03] [PASSED] gt_was/14025160223
[12:42:03] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[12:42:03] [PASSED] gt_was/14025635424
[12:42:03] [PASSED] gt_was/16028005424
[12:42:03] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:42:03] ================== xe_rtp_table_gt_test ===================
[12:42:03] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[12:42:03] [PASSED] gt_tunings/Tuning: 32B Access Enable
[12:42:03] [PASSED] gt_tunings/Tuning: L3 cache
[12:42:03] [PASSED] gt_tunings/Tuning: L3 cache - media
[12:42:03] [PASSED] gt_tunings/Tuning: Compression Overfetch
[12:42:03] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[12:42:03] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[12:42:03] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[12:42:03] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[12:42:03] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[12:42:03] [PASSED] gt_tunings/Tuning: Stateless compression control
[12:42:03] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[12:42:03] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[12:42:03] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[12:42:03] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[12:42:03] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:42:03] ================== xe_rtp_table_oob_test ==================
[12:42:03] [PASSED] oob_was/1607983814
[12:42:03] [PASSED] oob_was/16010904313
[12:42:03] [PASSED] oob_was/18022495364
[12:42:03] [PASSED] oob_was/22012773006
[12:42:03] [PASSED] oob_was/14014475959
[12:42:03] [PASSED] oob_was/22011391025
[12:42:03] [PASSED] oob_was/22012727170
[12:42:03] [PASSED] oob_was/22012727685
[12:42:03] [PASSED] oob_was/22016596838
[12:42:03] [PASSED] oob_was/18020744125
[12:42:03] [PASSED] oob_was/1409600907
[12:42:03] [PASSED] oob_was/22014953428
[12:42:03] [PASSED] oob_was/16017236439
[12:42:03] [PASSED] oob_was/14019821291
[12:42:03] [PASSED] oob_was/14015076503
[12:42:03] [PASSED] oob_was/14018913170
[12:42:03] [PASSED] oob_was/14018094691
[12:42:03] [PASSED] oob_was/18024947630
[12:42:03] [PASSED] oob_was/16022287689
[12:42:03] [PASSED] oob_was/13011645652
[12:42:03] [PASSED] oob_was/14022293748
[12:42:03] [PASSED] oob_was/22019794406
[12:42:03] [PASSED] oob_was/22019338487
[12:42:03] [PASSED] oob_was/16023588340
[12:42:03] [PASSED] oob_was/14019789679
[12:42:03] [PASSED] oob_was/14022866841
[12:42:03] [PASSED] oob_was/16021333562
[12:42:03] [PASSED] oob_was/14016712196
[12:42:03] [PASSED] oob_was/14015568240
[12:42:03] [PASSED] oob_was/18013179988
[12:42:03] [PASSED] oob_was/1508761755
[12:42:03] [PASSED] oob_was/16023105232
[12:42:03] [PASSED] oob_was/16026508708
[12:42:03] [PASSED] oob_was/14020001231
[12:42:03] [PASSED] oob_was/16023683509
[12:42:03] [PASSED] oob_was/14025515070
[12:42:03] [PASSED] oob_was/15015404425_disable
[12:42:03] [PASSED] oob_was/16026007364
[12:42:03] [PASSED] oob_was/14020316580
[12:42:03] [PASSED] oob_was/14025883347
[12:42:03] [PASSED] oob_was/16029380221
[12:42:03] ============== [PASSED] xe_rtp_table_oob_test ==============
[12:42:03] ================ xe_rtp_table_dev_oob_test ================
[12:42:03] [PASSED] device_oob_was/22010954014
[12:42:03] [PASSED] device_oob_was/15015404425
[12:42:03] [PASSED] device_oob_was/22019338487_display
[12:42:03] [PASSED] device_oob_was/14022085890
[12:42:03] [PASSED] device_oob_was/14026539277
[12:42:03] [PASSED] device_oob_was/14026633728
[12:42:03] [PASSED] device_oob_was/14026746987
[12:42:03] [PASSED] device_oob_was/14026779378
[12:42:03] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[12:42:03] =============== [PASSED] xe_rtp_tables_test ================
[12:42:03] =================== xe_rtp (3 subtests) ====================
[12:42:03] =================== xe_rtp_rules_tests ====================
[12:42:03] [PASSED] no
[12:42:03] [PASSED] yes
[12:42:03] [PASSED] no-and-no
[12:42:03] [PASSED] no-and-yes
[12:42:03] [PASSED] yes-and-no
[12:42:03] [PASSED] yes-and-yes
[12:42:03] [PASSED] no-or-no
[12:42:03] [PASSED] no-or-yes
[12:42:03] [PASSED] yes-or-no
[12:42:03] [PASSED] yes-or-yes
[12:42:03] [PASSED] no-yes-or-yes-no
[12:42:03] [PASSED] no-yes-or-yes-yes
[12:42:03] [PASSED] yes-yes-or-no-yes
[12:42:03] [PASSED] yes-yes-or-yes-yes
[12:42:03] [PASSED] no-no-or-yes-or-no
[12:42:03] [PASSED] or
[12:42:03] [PASSED] or-yes
[12:42:03] [PASSED] or-no
[12:42:03] [PASSED] yes-or
[12:42:03] [PASSED] no-or
[12:42:03] [PASSED] no-or-or-yes
[12:42:03] [PASSED] yes-or-or-no
[12:42:03] [PASSED] no-or-or-no
[12:42:03] [PASSED] missing-context-engine-class
[12:42:03] [PASSED] missing-context-engine-class-or-yes
[12:42:03] [PASSED] missing-context-engine-class-or-or-yes
[12:42:03] =============== [PASSED] xe_rtp_rules_tests ================
[12:42:03] =============== xe_rtp_process_to_sr_tests ================
[12:42:03] [PASSED] coalesce-same-reg
[12:42:03] [PASSED] coalesce-same-reg-literal-and-func
[12:42:03] [PASSED] no-match-no-add
[12:42:03] [PASSED] two-regs-two-entries
[12:42:03] [PASSED] clr-one-set-other
[12:42:03] [PASSED] set-field
[12:42:03] [PASSED] conflict-duplicate
[12:42:03] [PASSED] conflict-not-disjoint
[12:42:03] [PASSED] conflict-not-disjoint-literal-and-func
[12:42:03] [PASSED] conflict-reg-type
[12:42:03] [PASSED] bad-mcr-reg-forced-to-regular
[12:42:03] [PASSED] bad-regular-reg-forced-to-mcr
[12:42:03] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:42:03] ================== xe_rtp_process_tests ===================
[12:42:03] [PASSED] active1
[12:42:03] [PASSED] active2
[12:42:03] [PASSED] active-inactive
[12:42:03] [PASSED] inactive-active
[12:42:03] [PASSED] inactive-active-inactive
[12:42:03] [PASSED] inactive-inactive-inactive
[12:42:03] ============== [PASSED] xe_rtp_process_tests ===============
[12:42:03] ===================== [PASSED] xe_rtp ======================
[12:42:03] ==================== xe_wa (1 subtest) =====================
[12:42:03] ======================== xe_wa_gt =========================
[12:42:03] [PASSED] TIGERLAKE B0
[12:42:03] [PASSED] DG1 A0
[12:42:03] [PASSED] DG1 B0
[12:42:03] [PASSED] ALDERLAKE_S A0
[12:42:03] [PASSED] ALDERLAKE_S B0
[12:42:03] [PASSED] ALDERLAKE_S C0
[12:42:03] [PASSED] ALDERLAKE_S D0
[12:42:03] [PASSED] ALDERLAKE_P A0
[12:42:03] [PASSED] ALDERLAKE_P B0
[12:42:03] [PASSED] ALDERLAKE_P C0
[12:42:03] [PASSED] ALDERLAKE_S RPLS D0
[12:42:03] [PASSED] ALDERLAKE_P RPLU E0
[12:42:03] [PASSED] DG2 G10 C0
[12:42:03] [PASSED] DG2 G11 B1
[12:42:03] [PASSED] DG2 G12 A1
[12:42:03] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:42:03] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:42:03] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:42:03] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:42:03] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:42:03] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:42:03] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:42:03] ==================== [PASSED] xe_wa_gt =====================
[12:42:03] ====================== [PASSED] xe_wa ======================
[12:42:03] ============================================================
[12:42:03] Testing complete. Ran 719 tests: passed: 701, skipped: 18
[12:42:03] Elapsed time: 36.263s total, 4.242s configuring, 31.356s building, 0.657s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:42:03] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:42:05] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:42:29] Starting KUnit Kernel (1/1)...
[12:42:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:42:29] ============ drm_test_pick_cmdline (2 subtests) ============
[12:42:29] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:42:29] =============== drm_test_pick_cmdline_named ===============
[12:42:29] [PASSED] NTSC
[12:42:29] [PASSED] NTSC-J
[12:42:29] [PASSED] PAL
[12:42:29] [PASSED] PAL-M
[12:42:29] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:42:29] ============== [PASSED] drm_test_pick_cmdline ==============
[12:42:29] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:42:29] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:42:29] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:42:29] =========== drm_validate_clone_mode (2 subtests) ===========
[12:42:29] ============== drm_test_check_in_clone_mode ===============
[12:42:29] [PASSED] in_clone_mode
[12:42:29] [PASSED] not_in_clone_mode
[12:42:29] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:42:29] =============== drm_test_check_valid_clones ===============
[12:42:29] [PASSED] not_in_clone_mode
[12:42:29] [PASSED] valid_clone
[12:42:29] [PASSED] invalid_clone
[12:42:29] =========== [PASSED] drm_test_check_valid_clones ===========
[12:42:29] ============= [PASSED] drm_validate_clone_mode =============
[12:42:29] ============= drm_validate_modeset (1 subtest) =============
[12:42:29] [PASSED] drm_test_check_connector_changed_modeset
[12:42:29] ============== [PASSED] drm_validate_modeset ===============
[12:42:29] ====== drm_test_bridge_get_current_state (2 subtests) ======
[12:42:29] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:42:29] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[12:42:29] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:42:29] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[12:42:29] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:42:29] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:42:29] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[12:42:29] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[12:42:29] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:42:29] ============== drm_bridge_alloc (2 subtests) ===============
[12:42:29] [PASSED] drm_test_drm_bridge_alloc_basic
[12:42:29] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:42:29] ================ [PASSED] drm_bridge_alloc =================
[12:42:29] ============= drm_bridge_bus_fmt (5 subtests) ==============
[12:42:29] [PASSED] drm_test_bridge_rgb_yuv_rgb
[12:42:29] [PASSED] drm_test_bridge_must_convert_to_yuv444
[12:42:29] [PASSED] drm_test_bridge_hdmi_auto_rgb
[12:42:29] [PASSED] drm_test_bridge_auto_first
[12:42:29] [PASSED] drm_test_bridge_rgb_yuv_no_path
[12:42:29] =============== [PASSED] drm_bridge_bus_fmt ================
[12:42:29] ============= drm_cmdline_parser (40 subtests) =============
[12:42:29] [PASSED] drm_test_cmdline_force_d_only
[12:42:29] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:42:29] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:42:29] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:42:29] [PASSED] drm_test_cmdline_force_e_only
[12:42:29] [PASSED] drm_test_cmdline_res
[12:42:29] [PASSED] drm_test_cmdline_res_vesa
[12:42:29] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:42:29] [PASSED] drm_test_cmdline_res_rblank
[12:42:29] [PASSED] drm_test_cmdline_res_bpp
[12:42:29] [PASSED] drm_test_cmdline_res_refresh
[12:42:29] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:42:29] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:42:29] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:42:29] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:42:29] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:42:29] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:42:29] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:42:29] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:42:29] [PASSED] drm_test_cmdline_res_margins_force_on
[12:42:29] [PASSED] drm_test_cmdline_res_vesa_margins
[12:42:29] [PASSED] drm_test_cmdline_name
[12:42:29] [PASSED] drm_test_cmdline_name_bpp
[12:42:29] [PASSED] drm_test_cmdline_name_option
[12:42:29] [PASSED] drm_test_cmdline_name_bpp_option
[12:42:29] [PASSED] drm_test_cmdline_rotate_0
[12:42:29] [PASSED] drm_test_cmdline_rotate_90
[12:42:29] [PASSED] drm_test_cmdline_rotate_180
[12:42:29] [PASSED] drm_test_cmdline_rotate_270
[12:42:29] [PASSED] drm_test_cmdline_hmirror
[12:42:29] [PASSED] drm_test_cmdline_vmirror
[12:42:29] [PASSED] drm_test_cmdline_margin_options
[12:42:29] [PASSED] drm_test_cmdline_multiple_options
[12:42:29] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:42:29] [PASSED] drm_test_cmdline_extra_and_option
[12:42:29] [PASSED] drm_test_cmdline_freestanding_options
[12:42:29] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:42:29] [PASSED] drm_test_cmdline_panel_orientation
[12:42:29] ================ drm_test_cmdline_invalid =================
[12:42:29] [PASSED] margin_only
[12:42:29] [PASSED] interlace_only
[12:42:29] [PASSED] res_missing_x
[12:42:29] [PASSED] res_missing_y
[12:42:29] [PASSED] res_bad_y
[12:42:29] [PASSED] res_missing_y_bpp
[12:42:29] [PASSED] res_bad_bpp
[12:42:29] [PASSED] res_bad_refresh
[12:42:29] [PASSED] res_bpp_refresh_force_on_off
[12:42:29] [PASSED] res_invalid_mode
[12:42:29] [PASSED] res_bpp_wrong_place_mode
[12:42:29] [PASSED] name_bpp_refresh
[12:42:29] [PASSED] name_refresh
[12:42:29] [PASSED] name_refresh_wrong_mode
[12:42:29] [PASSED] name_refresh_invalid_mode
[12:42:29] [PASSED] rotate_multiple
[12:42:29] [PASSED] rotate_invalid_val
[12:42:29] [PASSED] rotate_truncated
[12:42:29] [PASSED] invalid_option
[12:42:29] [PASSED] invalid_tv_option
[12:42:29] [PASSED] truncated_tv_option
[12:42:29] ============ [PASSED] drm_test_cmdline_invalid =============
[12:42:29] =============== drm_test_cmdline_tv_options ===============
[12:42:29] [PASSED] NTSC
[12:42:29] [PASSED] NTSC_443
[12:42:29] [PASSED] NTSC_J
[12:42:29] [PASSED] PAL
[12:42:29] [PASSED] PAL_M
[12:42:29] [PASSED] PAL_N
[12:42:29] [PASSED] SECAM
[12:42:29] [PASSED] MONO_525
[12:42:29] [PASSED] MONO_625
[12:42:29] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:42:29] =============== [PASSED] drm_cmdline_parser ================
[12:42:29] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:42:29] [PASSED] drm_test_connector_hdmi_init_valid
[12:42:29] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:42:29] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:42:29] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:42:29] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:42:29] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:42:29] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:42:29] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:42:29] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:42:29] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:42:29] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:42:29] [PASSED] supported_formats=0x5 yuv420_allowed=1
[12:42:29] [PASSED] supported_formats=0x5 yuv420_allowed=0
[12:42:29] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:42:29] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:42:29] [PASSED] drm_test_connector_hdmi_init_null_product
[12:42:29] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:42:29] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:42:29] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:42:29] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:42:29] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:42:29] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:42:29] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:42:29] ========= drm_test_connector_hdmi_init_type_valid =========
[12:42:29] [PASSED] HDMI-A
[12:42:29] [PASSED] HDMI-B
[12:42:29] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:42:29] ======== drm_test_connector_hdmi_init_type_invalid ========
[12:42:29] [PASSED] Unknown
[12:42:29] [PASSED] VGA
[12:42:29] [PASSED] DVI-I
[12:42:29] [PASSED] DVI-D
[12:42:29] [PASSED] DVI-A
[12:42:29] [PASSED] Composite
[12:42:29] [PASSED] SVIDEO
[12:42:29] [PASSED] LVDS
[12:42:29] [PASSED] Component
[12:42:29] [PASSED] DIN
[12:42:29] [PASSED] DP
[12:42:29] [PASSED] TV
[12:42:29] [PASSED] eDP
[12:42:29] [PASSED] Virtual
[12:42:29] [PASSED] DSI
[12:42:29] [PASSED] DPI
[12:42:29] [PASSED] Writeback
[12:42:29] [PASSED] SPI
[12:42:29] [PASSED] USB
[12:42:29] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:42:29] ============ [PASSED] drmm_connector_hdmi_init =============
[12:42:29] ============= drmm_connector_init (3 subtests) =============
[12:42:29] [PASSED] drm_test_drmm_connector_init
[12:42:29] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:42:29] ========= drm_test_drmm_connector_init_type_valid =========
[12:42:29] [PASSED] Unknown
[12:42:29] [PASSED] VGA
[12:42:29] [PASSED] DVI-I
[12:42:29] [PASSED] DVI-D
[12:42:29] [PASSED] DVI-A
[12:42:29] [PASSED] Composite
[12:42:29] [PASSED] SVIDEO
[12:42:29] [PASSED] LVDS
[12:42:29] [PASSED] Component
[12:42:29] [PASSED] DIN
[12:42:29] [PASSED] DP
[12:42:29] [PASSED] HDMI-A
[12:42:29] [PASSED] HDMI-B
[12:42:29] [PASSED] TV
[12:42:29] [PASSED] eDP
[12:42:29] [PASSED] Virtual
[12:42:29] [PASSED] DSI
[12:42:29] [PASSED] DPI
[12:42:29] [PASSED] Writeback
[12:42:29] [PASSED] SPI
[12:42:29] [PASSED] USB
[12:42:29] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:42:29] =============== [PASSED] drmm_connector_init ===============
[12:42:29] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_init
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:42:29] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[12:42:29] [PASSED] Unknown
[12:42:29] [PASSED] VGA
[12:42:29] [PASSED] DVI-I
[12:42:29] [PASSED] DVI-D
[12:42:29] [PASSED] DVI-A
[12:42:29] [PASSED] Composite
[12:42:29] [PASSED] SVIDEO
[12:42:29] [PASSED] LVDS
[12:42:29] [PASSED] Component
[12:42:29] [PASSED] DIN
[12:42:29] [PASSED] DP
[12:42:29] [PASSED] HDMI-A
[12:42:29] [PASSED] HDMI-B
[12:42:29] [PASSED] TV
[12:42:29] [PASSED] eDP
[12:42:29] [PASSED] Virtual
[12:42:29] [PASSED] DSI
[12:42:29] [PASSED] DPI
[12:42:29] [PASSED] Writeback
[12:42:29] [PASSED] SPI
[12:42:29] [PASSED] USB
[12:42:29] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:42:29] ======== drm_test_drm_connector_dynamic_init_name =========
[12:42:29] [PASSED] Unknown
[12:42:29] [PASSED] VGA
[12:42:29] [PASSED] DVI-I
[12:42:29] [PASSED] DVI-D
[12:42:29] [PASSED] DVI-A
[12:42:29] [PASSED] Composite
[12:42:29] [PASSED] SVIDEO
[12:42:29] [PASSED] LVDS
[12:42:29] [PASSED] Component
[12:42:29] [PASSED] DIN
[12:42:29] [PASSED] DP
[12:42:29] [PASSED] HDMI-A
[12:42:29] [PASSED] HDMI-B
[12:42:29] [PASSED] TV
[12:42:29] [PASSED] eDP
[12:42:29] [PASSED] Virtual
[12:42:29] [PASSED] DSI
[12:42:29] [PASSED] DPI
[12:42:29] [PASSED] Writeback
[12:42:29] [PASSED] SPI
[12:42:29] [PASSED] USB
[12:42:29] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:42:29] =========== [PASSED] drm_connector_dynamic_init ============
[12:42:29] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:42:29] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:42:29] ======= drm_connector_dynamic_register (7 subtests) ========
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:42:29] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:42:29] ========= [PASSED] drm_connector_dynamic_register ==========
[12:42:29] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:42:29] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:42:29] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:42:29] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:42:29] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:42:29] ========== drm_test_get_tv_mode_from_name_valid ===========
[12:42:29] [PASSED] NTSC
[12:42:29] [PASSED] NTSC-443
[12:42:29] [PASSED] NTSC-J
[12:42:29] [PASSED] PAL
[12:42:29] [PASSED] PAL-M
[12:42:29] [PASSED] PAL-N
[12:42:29] [PASSED] SECAM
[12:42:29] [PASSED] Mono
[12:42:29] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:42:29] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:42:29] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:42:29] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:42:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:42:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:42:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:42:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:42:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:42:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:42:29] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[12:42:29] [PASSED] VIC 96
[12:42:29] [PASSED] VIC 97
[12:42:29] [PASSED] VIC 101
[12:42:29] [PASSED] VIC 102
[12:42:29] [PASSED] VIC 106
[12:42:29] [PASSED] VIC 107
[12:42:29] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:42:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:42:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:42:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:42:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:42:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:42:29] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:42:29] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:42:29] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[12:42:29] [PASSED] Automatic
[12:42:29] [PASSED] Full
[12:42:29] [PASSED] Limited 16:235
[12:42:29] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:42:29] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:42:29] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:42:29] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:42:29] === drm_test_drm_hdmi_connector_get_output_format_name ====
[12:42:29] [PASSED] RGB
[12:42:29] [PASSED] YUV 4:2:0
[12:42:29] [PASSED] YUV 4:2:2
[12:42:29] [PASSED] YUV 4:4:4
[12:42:29] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:42:29] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:42:29] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:42:29] ============= drm_damage_helper (21 subtests) ==============
[12:42:29] [PASSED] drm_test_damage_iter_no_damage
[12:42:29] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:42:29] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:42:29] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:42:29] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:42:29] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:42:29] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:42:29] [PASSED] drm_test_damage_iter_simple_damage
[12:42:29] [PASSED] drm_test_damage_iter_single_damage
[12:42:29] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:42:29] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:42:29] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:42:29] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:42:29] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:42:29] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:42:29] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:42:29] [PASSED] drm_test_damage_iter_damage
[12:42:29] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:42:29] [PASSED] drm_test_damage_iter_damage_one_outside
[12:42:29] [PASSED] drm_test_damage_iter_damage_src_moved
[12:42:29] [PASSED] drm_test_damage_iter_damage_not_visible
[12:42:29] ================ [PASSED] drm_damage_helper ================
[12:42:29] ============== drm_dp_mst_helper (3 subtests) ==============
[12:42:29] ============== drm_test_dp_mst_calc_pbn_mode ==============
[12:42:29] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:42:29] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:42:29] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:42:29] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:42:29] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:42:29] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:42:29] ============== drm_test_dp_mst_calc_pbn_div ===============
[12:42:29] [PASSED] Link rate 2000000 lane count 4
[12:42:29] [PASSED] Link rate 2000000 lane count 2
[12:42:29] [PASSED] Link rate 2000000 lane count 1
[12:42:29] [PASSED] Link rate 1350000 lane count 4
[12:42:29] [PASSED] Link rate 1350000 lane count 2
[12:42:29] [PASSED] Link rate 1350000 lane count 1
[12:42:29] [PASSED] Link rate 1000000 lane count 4
[12:42:29] [PASSED] Link rate 1000000 lane count 2
[12:42:29] [PASSED] Link rate 1000000 lane count 1
[12:42:29] [PASSED] Link rate 810000 lane count 4
[12:42:29] [PASSED] Link rate 810000 lane count 2
[12:42:29] [PASSED] Link rate 810000 lane count 1
[12:42:29] [PASSED] Link rate 540000 lane count 4
[12:42:29] [PASSED] Link rate 540000 lane count 2
[12:42:29] [PASSED] Link rate 540000 lane count 1
[12:42:29] [PASSED] Link rate 270000 lane count 4
[12:42:29] [PASSED] Link rate 270000 lane count 2
[12:42:29] [PASSED] Link rate 270000 lane count 1
[12:42:29] [PASSED] Link rate 162000 lane count 4
[12:42:29] [PASSED] Link rate 162000 lane count 2
[12:42:29] [PASSED] Link rate 162000 lane count 1
[12:42:29] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:42:29] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[12:42:29] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:42:29] [PASSED] DP_POWER_UP_PHY with port number
[12:42:29] [PASSED] DP_POWER_DOWN_PHY with port number
[12:42:29] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:42:29] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:42:29] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:42:29] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:42:29] [PASSED] DP_QUERY_PAYLOAD with port number
[12:42:29] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:42:29] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:42:29] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:42:29] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:42:29] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:42:29] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:42:29] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:42:29] [PASSED] DP_REMOTE_I2C_READ with port number
[12:42:29] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:42:29] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:42:29] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:42:29] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:42:29] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:42:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:42:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:42:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:42:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:42:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:42:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:42:29] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:42:29] ================ [PASSED] drm_dp_mst_helper ================
[12:42:29] ================== drm_exec (7 subtests) ===================
[12:42:29] [PASSED] sanitycheck
[12:42:29] [PASSED] test_lock
[12:42:29] [PASSED] test_lock_unlock
[12:42:29] [PASSED] test_duplicates
[12:42:29] [PASSED] test_prepare
[12:42:29] [PASSED] test_prepare_array
[12:42:29] [PASSED] test_multiple_loops
[12:42:29] ==================== [PASSED] drm_exec =====================
[12:42:29] =========== drm_format_helper_test (17 subtests) ===========
[12:42:29] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:42:29] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:42:29] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:42:29] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:42:29] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:42:29] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:42:29] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:42:29] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:42:29] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:42:29] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:42:29] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:42:29] ============== drm_test_fb_xrgb8888_to_mono ===============
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:42:29] ==================== drm_test_fb_swab =====================
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ================ [PASSED] drm_test_fb_swab =================
[12:42:29] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:42:29] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[12:42:29] [PASSED] single_pixel_source_buffer
[12:42:29] [PASSED] single_pixel_clip_rectangle
[12:42:29] [PASSED] well_known_colors
[12:42:29] [PASSED] destination_pitch
[12:42:29] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:42:29] ================= drm_test_fb_clip_offset =================
[12:42:29] [PASSED] pass through
[12:42:29] [PASSED] horizontal offset
[12:42:29] [PASSED] vertical offset
[12:42:29] [PASSED] horizontal and vertical offset
[12:42:29] [PASSED] horizontal offset (custom pitch)
[12:42:29] [PASSED] vertical offset (custom pitch)
[12:42:29] [PASSED] horizontal and vertical offset (custom pitch)
[12:42:29] ============= [PASSED] drm_test_fb_clip_offset =============
[12:42:29] =================== drm_test_fb_memcpy ====================
[12:42:29] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:42:29] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:42:29] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:42:29] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:42:29] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:42:29] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:42:29] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:42:29] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:42:29] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:42:29] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:42:29] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:42:29] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:42:29] =============== [PASSED] drm_test_fb_memcpy ================
[12:42:29] ============= [PASSED] drm_format_helper_test ==============
[12:42:29] ================= drm_format (18 subtests) =================
[12:42:29] [PASSED] drm_test_format_block_width_invalid
[12:42:29] [PASSED] drm_test_format_block_width_one_plane
[12:42:29] [PASSED] drm_test_format_block_width_two_plane
[12:42:29] [PASSED] drm_test_format_block_width_three_plane
[12:42:29] [PASSED] drm_test_format_block_width_tiled
[12:42:29] [PASSED] drm_test_format_block_height_invalid
[12:42:29] [PASSED] drm_test_format_block_height_one_plane
[12:42:29] [PASSED] drm_test_format_block_height_two_plane
[12:42:29] [PASSED] drm_test_format_block_height_three_plane
[12:42:29] [PASSED] drm_test_format_block_height_tiled
[12:42:29] [PASSED] drm_test_format_min_pitch_invalid
[12:42:29] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:42:29] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:42:29] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:42:29] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:42:29] [PASSED] drm_test_format_min_pitch_two_plane
[12:42:29] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:42:29] [PASSED] drm_test_format_min_pitch_tiled
[12:42:29] =================== [PASSED] drm_format ====================
[12:42:29] ============== drm_framebuffer (10 subtests) ===============
[12:42:29] ========== drm_test_framebuffer_check_src_coords ==========
[12:42:29] [PASSED] Success: source fits into fb
[12:42:29] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:42:29] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:42:29] [PASSED] Fail: overflowing fb with source width
[12:42:29] [PASSED] Fail: overflowing fb with source height
[12:42:29] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:42:29] [PASSED] drm_test_framebuffer_cleanup
[12:42:29] =============== drm_test_framebuffer_create ===============
[12:42:29] [PASSED] ABGR8888 normal sizes
[12:42:29] [PASSED] ABGR8888 max sizes
[12:42:29] [PASSED] ABGR8888 pitch greater than min required
[12:42:29] [PASSED] ABGR8888 pitch less than min required
[12:42:29] [PASSED] ABGR8888 Invalid width
[12:42:29] [PASSED] ABGR8888 Invalid buffer handle
[12:42:29] [PASSED] No pixel format
[12:42:29] [PASSED] ABGR8888 Width 0
[12:42:29] [PASSED] ABGR8888 Height 0
[12:42:29] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:42:29] [PASSED] ABGR8888 Large buffer offset
[12:42:29] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:42:29] [PASSED] ABGR8888 Invalid flag
[12:42:29] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:42:29] [PASSED] ABGR8888 Valid buffer modifier
[12:42:29] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:42:29] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:42:29] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:42:29] [PASSED] NV12 Normal sizes
[12:42:29] [PASSED] NV12 Max sizes
[12:42:29] [PASSED] NV12 Invalid pitch
[12:42:29] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:42:29] [PASSED] NV12 different modifier per-plane
[12:42:29] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:42:29] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:42:29] [PASSED] NV12 Modifier for inexistent plane
[12:42:29] [PASSED] NV12 Handle for inexistent plane
[12:42:29] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:42:29] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:42:29] [PASSED] YVU420 Normal sizes
[12:42:29] [PASSED] YVU420 Max sizes
[12:42:29] [PASSED] YVU420 Invalid pitch
[12:42:29] [PASSED] YVU420 Different pitches
[12:42:29] [PASSED] YVU420 Different buffer offsets/pitches
[12:42:29] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:42:29] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:42:29] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:42:29] [PASSED] YVU420 Valid modifier
[12:42:29] [PASSED] YVU420 Different modifiers per plane
[12:42:29] [PASSED] YVU420 Modifier for inexistent plane
[12:42:29] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:42:29] [PASSED] X0L2 Normal sizes
[12:42:29] [PASSED] X0L2 Max sizes
[12:42:29] [PASSED] X0L2 Invalid pitch
[12:42:29] [PASSED] X0L2 Pitch greater than minimum required
[12:42:29] [PASSED] X0L2 Handle for inexistent plane
[12:42:29] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:42:29] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:42:29] [PASSED] X0L2 Valid modifier
[12:42:29] [PASSED] X0L2 Modifier for inexistent plane
[12:42:29] =========== [PASSED] drm_test_framebuffer_create ===========
[12:42:29] [PASSED] drm_test_framebuffer_free
[12:42:29] [PASSED] drm_test_framebuffer_init
[12:42:29] [PASSED] drm_test_framebuffer_init_bad_format
[12:42:29] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:42:29] [PASSED] drm_test_framebuffer_lookup
[12:42:29] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:42:29] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:42:29] ================= [PASSED] drm_framebuffer =================
[12:42:29] ================ drm_gem_shmem (8 subtests) ================
[12:42:29] [PASSED] drm_gem_shmem_test_obj_create
[12:42:29] [PASSED] drm_gem_shmem_test_obj_create_private
[12:42:29] [PASSED] drm_gem_shmem_test_pin_pages
[12:42:29] [PASSED] drm_gem_shmem_test_vmap
[12:42:29] [PASSED] drm_gem_shmem_test_get_sg_table
[12:42:29] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:42:29] [PASSED] drm_gem_shmem_test_madvise
[12:42:29] [PASSED] drm_gem_shmem_test_purge
[12:42:29] ================== [PASSED] drm_gem_shmem ==================
[12:42:29] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[12:42:29] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:42:29] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:42:29] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:42:29] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:42:29] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:42:29] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:42:29] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[12:42:29] [PASSED] Automatic
[12:42:29] [PASSED] Full
[12:42:29] [PASSED] Limited 16:235
[12:42:29] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:42:29] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:42:29] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:42:29] [PASSED] drm_test_check_disable_connector
[12:42:29] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:42:29] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:42:29] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:42:29] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:42:29] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:42:29] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:42:29] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:42:29] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:42:29] [PASSED] drm_test_check_output_bpc_dvi
[12:42:29] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:42:29] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:42:29] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:42:29] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:42:29] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:42:29] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:42:29] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:42:29] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:42:29] ============ drm_test_check_hdmi_color_format =============
[12:42:29] [PASSED] AUTO -> RGB
[12:42:29] [PASSED] YCBCR422 -> YUV422
[12:42:29] [PASSED] YCBCR420 -> YUV420
[12:42:29] [PASSED] YCBCR444 -> YUV444
[12:42:29] [PASSED] RGB -> RGB
[12:42:29] ======== [PASSED] drm_test_check_hdmi_color_format =========
[12:42:29] ======== drm_test_check_hdmi_color_format_420_only ========
[12:42:29] [PASSED] RGB should fail
[12:42:29] [PASSED] YUV444 should fail
[12:42:29] [PASSED] YUV422 should fail
[12:42:29] [PASSED] YUV420 should work
[12:42:29] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[12:42:29] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:42:29] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:42:29] [PASSED] drm_test_check_broadcast_rgb_value
[12:42:29] [PASSED] drm_test_check_bpc_8_value
[12:42:29] [PASSED] drm_test_check_bpc_10_value
[12:42:29] [PASSED] drm_test_check_bpc_12_value
[12:42:29] [PASSED] drm_test_check_format_value
[12:42:29] [PASSED] drm_test_check_tmds_char_value
[12:42:29] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:42:29] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[12:42:29] [PASSED] drm_test_check_mode_valid
[12:42:29] [PASSED] drm_test_check_mode_valid_reject
[12:42:29] [PASSED] drm_test_check_mode_valid_reject_rate
[12:42:29] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:42:29] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[12:42:29] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[12:42:29] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[12:42:29] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:42:29] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[12:42:29] [PASSED] drm_test_check_infoframes
[12:42:29] [PASSED] drm_test_check_reject_avi_infoframe
[12:42:29] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[12:42:29] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[12:42:29] [PASSED] drm_test_check_reject_audio_infoframe
[12:42:29] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[12:42:29] ================= drm_managed (2 subtests) =================
[12:42:29] [PASSED] drm_test_managed_release_action
[12:42:29] [PASSED] drm_test_managed_run_action
[12:42:29] =================== [PASSED] drm_managed ===================
[12:42:29] =================== drm_mm (6 subtests) ====================
[12:42:29] [PASSED] drm_test_mm_init
[12:42:29] [PASSED] drm_test_mm_debug
[12:42:29] [PASSED] drm_test_mm_align32
[12:42:29] [PASSED] drm_test_mm_align64
[12:42:29] [PASSED] drm_test_mm_lowest
[12:42:29] [PASSED] drm_test_mm_highest
[12:42:29] ===================== [PASSED] drm_mm ======================
[12:42:29] ============= drm_modes_analog_tv (5 subtests) =============
[12:42:29] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:42:29] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:42:29] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:42:29] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:42:29] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:42:29] =============== [PASSED] drm_modes_analog_tv ===============
[12:42:29] ============== drm_plane_helper (2 subtests) ===============
[12:42:29] =============== drm_test_check_plane_state ================
[12:42:29] [PASSED] clipping_simple
[12:42:29] [PASSED] clipping_rotate_reflect
[12:42:29] [PASSED] positioning_simple
[12:42:29] [PASSED] upscaling
[12:42:29] [PASSED] downscaling
[12:42:29] [PASSED] rounding1
[12:42:29] [PASSED] rounding2
[12:42:29] [PASSED] rounding3
[12:42:29] [PASSED] rounding4
[12:42:29] =========== [PASSED] drm_test_check_plane_state ============
[12:42:29] =========== drm_test_check_invalid_plane_state ============
[12:42:29] [PASSED] positioning_invalid
[12:42:29] [PASSED] upscaling_invalid
[12:42:29] [PASSED] downscaling_invalid
[12:42:29] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:42:29] ================ [PASSED] drm_plane_helper =================
[12:42:29] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:42:29] ====== drm_test_connector_helper_tv_get_modes_check =======
[12:42:29] [PASSED] None
[12:42:29] [PASSED] PAL
[12:42:29] [PASSED] NTSC
[12:42:29] [PASSED] Both, NTSC Default
[12:42:29] [PASSED] Both, PAL Default
[12:42:29] [PASSED] Both, NTSC Default, with PAL on command-line
[12:42:29] [PASSED] Both, PAL Default, with NTSC on command-line
[12:42:29] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:42:29] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:42:29] ================== drm_rect (9 subtests) ===================
[12:42:29] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:42:29] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:42:29] [PASSED] drm_test_rect_clip_scaled_clipped
[12:42:29] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:42:29] ================= drm_test_rect_intersect =================
[12:42:29] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:42:29] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:42:29] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:42:29] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:42:29] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:42:29] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:42:29] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:42:29] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:42:29] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:42:29] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:42:29] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:42:29] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:42:29] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:42:29] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:42:29] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:42:29] ============= [PASSED] drm_test_rect_intersect =============
[12:42:29] ================ drm_test_rect_calc_hscale ================
[12:42:29] [PASSED] normal use
[12:42:29] [PASSED] out of max range
[12:42:29] [PASSED] out of min range
[12:42:29] [PASSED] zero dst
[12:42:29] [PASSED] negative src
[12:42:29] [PASSED] negative dst
[12:42:29] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:42:29] ================ drm_test_rect_calc_vscale ================
[12:42:29] [PASSED] normal use
[12:42:29] [PASSED] out of max range
[12:42:29] [PASSED] out of min range
[12:42:29] [PASSED] zero dst
[12:42:29] [PASSED] negative src
[12:42:29] [PASSED] negative dst
[12:42:29] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:42:29] ================== drm_test_rect_rotate ===================
[12:42:29] [PASSED] reflect-x
[12:42:29] [PASSED] reflect-y
[12:42:29] [PASSED] rotate-0
[12:42:29] [PASSED] rotate-90
[12:42:29] [PASSED] rotate-180
[12:42:29] [PASSED] rotate-270
[12:42:29] ============== [PASSED] drm_test_rect_rotate ===============
[12:42:29] ================ drm_test_rect_rotate_inv =================
[12:42:29] [PASSED] reflect-x
[12:42:29] [PASSED] reflect-y
[12:42:29] [PASSED] rotate-0
[12:42:29] [PASSED] rotate-90
[12:42:29] [PASSED] rotate-180
[12:42:29] [PASSED] rotate-270
[12:42:29] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:42:29] ==================== [PASSED] drm_rect =====================
[12:42:29] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:42:29] ============ drm_test_sysfb_build_fourcc_list =============
[12:42:29] [PASSED] no native formats
[12:42:29] [PASSED] XRGB8888 as native format
[12:42:29] [PASSED] remove duplicates
[12:42:29] [PASSED] convert alpha formats
[12:42:29] [PASSED] random formats
[12:42:29] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:42:29] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:42:29] ================== drm_fixp (2 subtests) ===================
[12:42:29] [PASSED] drm_test_int2fixp
[12:42:29] [PASSED] drm_test_sm2fixp
[12:42:29] ==================== [PASSED] drm_fixp =====================
[12:42:29] ============================================================
[12:42:29] Testing complete. Ran 639 tests: passed: 639
[12:42:29] Elapsed time: 25.956s total, 1.769s configuring, 23.972s building, 0.192s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:42:29] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:42:31] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:42:40] Starting KUnit Kernel (1/1)...
[12:42:40] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:42:40] ================= ttm_device (5 subtests) ==================
[12:42:40] [PASSED] ttm_device_init_basic
[12:42:40] [PASSED] ttm_device_init_multiple
[12:42:40] [PASSED] ttm_device_fini_basic
[12:42:40] [PASSED] ttm_device_init_no_vma_man
[12:42:40] ================== ttm_device_init_pools ==================
[12:42:40] [PASSED] No DMA allocations, no DMA32 required
[12:42:40] [PASSED] DMA allocations, DMA32 required
[12:42:40] [PASSED] No DMA allocations, DMA32 required
[12:42:40] [PASSED] DMA allocations, no DMA32 required
[12:42:40] ============== [PASSED] ttm_device_init_pools ==============
[12:42:40] =================== [PASSED] ttm_device ====================
[12:42:40] ================== ttm_pool (8 subtests) ===================
[12:42:40] ================== ttm_pool_alloc_basic ===================
[12:42:40] [PASSED] One page
[12:42:40] [PASSED] More than one page
[12:42:40] [PASSED] Above the allocation limit
[12:42:40] [PASSED] One page, with coherent DMA mappings enabled
[12:42:40] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:42:40] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:42:40] ============== ttm_pool_alloc_basic_dma_addr ==============
[12:42:40] [PASSED] One page
[12:42:40] [PASSED] More than one page
[12:42:40] [PASSED] Above the allocation limit
[12:42:40] [PASSED] One page, with coherent DMA mappings enabled
[12:42:40] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:42:40] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:42:40] [PASSED] ttm_pool_alloc_order_caching_match
[12:42:40] [PASSED] ttm_pool_alloc_caching_mismatch
[12:42:40] [PASSED] ttm_pool_alloc_order_mismatch
[12:42:40] [PASSED] ttm_pool_free_dma_alloc
[12:42:40] [PASSED] ttm_pool_free_no_dma_alloc
[12:42:40] [PASSED] ttm_pool_fini_basic
[12:42:40] ==================== [PASSED] ttm_pool =====================
[12:42:40] ================ ttm_resource (8 subtests) =================
[12:42:40] ================= ttm_resource_init_basic =================
[12:42:40] [PASSED] Init resource in TTM_PL_SYSTEM
[12:42:40] [PASSED] Init resource in TTM_PL_VRAM
[12:42:40] [PASSED] Init resource in a private placement
[12:42:40] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:42:40] ============= [PASSED] ttm_resource_init_basic =============
[12:42:40] [PASSED] ttm_resource_init_pinned
[12:42:40] [PASSED] ttm_resource_fini_basic
[12:42:40] [PASSED] ttm_resource_manager_init_basic
[12:42:40] [PASSED] ttm_resource_manager_usage_basic
[12:42:40] [PASSED] ttm_resource_manager_set_used_basic
[12:42:40] [PASSED] ttm_sys_man_alloc_basic
[12:42:40] [PASSED] ttm_sys_man_free_basic
[12:42:40] ================== [PASSED] ttm_resource ===================
[12:42:40] =================== ttm_tt (15 subtests) ===================
[12:42:40] ==================== ttm_tt_init_basic ====================
[12:42:40] [PASSED] Page-aligned size
[12:42:40] [PASSED] Extra pages requested
[12:42:40] ================ [PASSED] ttm_tt_init_basic ================
[12:42:40] [PASSED] ttm_tt_init_misaligned
[12:42:40] [PASSED] ttm_tt_fini_basic
[12:42:40] [PASSED] ttm_tt_fini_sg
[12:42:40] [PASSED] ttm_tt_fini_shmem
[12:42:40] [PASSED] ttm_tt_create_basic
[12:42:40] [PASSED] ttm_tt_create_invalid_bo_type
[12:42:40] [PASSED] ttm_tt_create_ttm_exists
[12:42:40] [PASSED] ttm_tt_create_failed
[12:42:40] [PASSED] ttm_tt_destroy_basic
[12:42:40] [PASSED] ttm_tt_populate_null_ttm
[12:42:40] [PASSED] ttm_tt_populate_populated_ttm
[12:42:40] [PASSED] ttm_tt_unpopulate_basic
[12:42:40] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:42:40] [PASSED] ttm_tt_swapin_basic
[12:42:40] ===================== [PASSED] ttm_tt ======================
[12:42:40] =================== ttm_bo (14 subtests) ===================
[12:42:40] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[12:42:40] [PASSED] Cannot be interrupted and sleeps
[12:42:40] [PASSED] Cannot be interrupted, locks straight away
[12:42:40] [PASSED] Can be interrupted, sleeps
[12:42:40] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:42:40] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:42:40] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:42:40] [PASSED] ttm_bo_reserve_double_resv
[12:42:40] [PASSED] ttm_bo_reserve_interrupted
[12:42:40] [PASSED] ttm_bo_reserve_deadlock
[12:42:40] [PASSED] ttm_bo_unreserve_basic
[12:42:40] [PASSED] ttm_bo_unreserve_pinned
[12:42:40] [PASSED] ttm_bo_unreserve_bulk
[12:42:40] [PASSED] ttm_bo_fini_basic
[12:42:40] [PASSED] ttm_bo_fini_shared_resv
[12:42:40] [PASSED] ttm_bo_pin_basic
[12:42:40] [PASSED] ttm_bo_pin_unpin_resource
[12:42:40] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:42:40] ===================== [PASSED] ttm_bo ======================
[12:42:40] ============== ttm_bo_validate (22 subtests) ===============
[12:42:40] ============== ttm_bo_init_reserved_sys_man ===============
[12:42:40] [PASSED] Buffer object for userspace
[12:42:40] [PASSED] Kernel buffer object
[12:42:40] [PASSED] Shared buffer object
[12:42:40] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:42:40] ============== ttm_bo_init_reserved_mock_man ==============
[12:42:40] [PASSED] Buffer object for userspace
[12:42:40] [PASSED] Kernel buffer object
[12:42:40] [PASSED] Shared buffer object
[12:42:40] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:42:40] [PASSED] ttm_bo_init_reserved_resv
[12:42:40] ================== ttm_bo_validate_basic ==================
[12:42:40] [PASSED] Buffer object for userspace
[12:42:40] [PASSED] Kernel buffer object
[12:42:40] [PASSED] Shared buffer object
[12:42:40] ============== [PASSED] ttm_bo_validate_basic ==============
[12:42:40] [PASSED] ttm_bo_validate_invalid_placement
[12:42:40] ============= ttm_bo_validate_same_placement ==============
[12:42:40] [PASSED] System manager
[12:42:40] [PASSED] VRAM manager
[12:42:40] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:42:40] [PASSED] ttm_bo_validate_failed_alloc
[12:42:40] [PASSED] ttm_bo_validate_pinned
[12:42:40] [PASSED] ttm_bo_validate_busy_placement
[12:42:40] ================ ttm_bo_validate_multihop =================
[12:42:40] [PASSED] Buffer object for userspace
[12:42:40] [PASSED] Kernel buffer object
[12:42:40] [PASSED] Shared buffer object
[12:42:40] ============ [PASSED] ttm_bo_validate_multihop =============
[12:42:40] ========== ttm_bo_validate_no_placement_signaled ==========
[12:42:40] [PASSED] Buffer object in system domain, no page vector
[12:42:40] [PASSED] Buffer object in system domain with an existing page vector
[12:42:40] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:42:40] ======== ttm_bo_validate_no_placement_not_signaled ========
[12:42:40] [PASSED] Buffer object for userspace
[12:42:40] [PASSED] Kernel buffer object
[12:42:40] [PASSED] Shared buffer object
[12:42:40] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:42:40] [PASSED] ttm_bo_validate_move_fence_signaled
[12:42:40] ========= ttm_bo_validate_move_fence_not_signaled =========
[12:42:40] [PASSED] Waits for GPU
[12:42:40] [PASSED] Tries to lock straight away
[12:42:40] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:42:40] [PASSED] ttm_bo_validate_swapout
[12:42:40] [PASSED] ttm_bo_validate_happy_evict
[12:42:40] [PASSED] ttm_bo_validate_all_pinned_evict
[12:42:40] [PASSED] ttm_bo_validate_allowed_only_evict
[12:42:40] [PASSED] ttm_bo_validate_deleted_evict
[12:42:40] [PASSED] ttm_bo_validate_busy_domain_evict
[12:42:40] [PASSED] ttm_bo_validate_evict_gutting
[12:42:40] [PASSED] ttm_bo_validate_recrusive_evict
[12:42:40] ================= [PASSED] ttm_bo_validate =================
[12:42:40] ============================================================
[12:42:40] Testing complete. Ran 102 tests: passed: 102
[12:42:40] Elapsed time: 11.387s total, 1.723s configuring, 9.448s building, 0.178s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev4)
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (10 preceding siblings ...)
2026-06-23 12:42 ` ✓ CI.KUnit: success " Patchwork
@ 2026-06-23 13:51 ` Patchwork
2026-06-23 16:05 ` [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Srinivas, Vidya
2026-06-23 17:35 ` ✗ Xe.CI.FULL: failure for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev4) Patchwork
13 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-23 13:51 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 4263 bytes --]
== Series Details ==
Series: drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev4)
URL : https://patchwork.freedesktop.org/series/168442/
State : success
== Summary ==
CI Bug Log - changes from xe-5288-60326b17f877e12846167bf8ef83680b9875218a_BAT -> xe-pw-168442v4_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 12)
------------------------------
Missing (1): bat-ptl-vm
New tests
---------
New tests have been introduced between xe-5288-60326b17f877e12846167bf8ef83680b9875218a_BAT and xe-pw-168442v4_BAT:
### New IGT tests (20) ###
* igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-edp-1:
- Statuses : 4 pass(s)
- Exec time: [2.24, 2.72] s
* igt@kms_pipe_crc_basic@hang-read-crc@pipe-b-edp-1:
- Statuses : 4 pass(s)
- Exec time: [2.81, 3.21] s
* igt@kms_pipe_crc_basic@hang-read-crc@pipe-c-edp-1:
- Statuses : 4 pass(s)
- Exec time: [2.78, 3.15] s
* igt@kms_pipe_crc_basic@hang-read-crc@pipe-d-edp-1:
- Statuses : 2 pass(s)
- Exec time: [2.82, 3.02] s
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-a-edp-1:
- Statuses : 4 pass(s)
- Exec time: [0.79, 1.07] s
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-b-edp-1:
- Statuses : 4 pass(s)
- Exec time: [1.47, 1.66] s
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-edp-1:
- Statuses : 4 pass(s)
- Exec time: [1.49, 1.70] s
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-edp-1:
- Statuses : 2 pass(s)
- Exec time: [1.40, 1.51] s
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-a-edp-1:
- Statuses : 4 pass(s)
- Exec time: [0.79, 1.10] s
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-b-edp-1:
- Statuses : 4 pass(s)
- Exec time: [1.49, 1.74] s
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-c-edp-1:
- Statuses : 4 pass(s)
- Exec time: [1.43, 1.65] s
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-edp-1:
- Statuses : 2 pass(s)
- Exec time: [1.43, 1.50] s
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-edp-1:
- Statuses : 4 pass(s)
- Exec time: [0.76, 1.01] s
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-edp-1:
- Statuses : 4 pass(s)
- Exec time: [1.47, 1.54] s
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-edp-1:
- Statuses : 4 pass(s)
- Exec time: [1.40, 1.60] s
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- Statuses : 2 pass(s)
- Exec time: [1.36, 1.50] s
* igt@kms_pipe_crc_basic@read-crc@pipe-a-edp-1:
- Statuses : 4 pass(s)
- Exec time: [0.75, 1.01] s
* igt@kms_pipe_crc_basic@read-crc@pipe-b-edp-1:
- Statuses : 4 pass(s)
- Exec time: [1.49, 1.55] s
* igt@kms_pipe_crc_basic@read-crc@pipe-c-edp-1:
- Statuses : 4 pass(s)
- Exec time: [1.39, 1.61] s
* igt@kms_pipe_crc_basic@read-crc@pipe-d-edp-1:
- Statuses : 2 pass(s)
- Exec time: [1.41, 1.50] s
Known issues
------------
Here are the changes found in xe-pw-168442v4_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_live_ktest@xe_dma_buf:
- bat-bmg-vm: [PASS][1] -> [ABORT][2] ([Intel XE#8007] / [Intel XE#8023]) +1 other test abort
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8023]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8023
Build changes
-------------
* IGT: IGT_8979 -> IGT_8980
* Linux: xe-5288-60326b17f877e12846167bf8ef83680b9875218a -> xe-pw-168442v4
IGT_8979: 8979
IGT_8980: 65d820119e86b017bf801c8f2bb500e557b29d1c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5288-60326b17f877e12846167bf8ef83680b9875218a: 60326b17f877e12846167bf8ef83680b9875218a
xe-pw-168442v4: 168442v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/index.html
[-- Attachment #2: Type: text/html, Size: 5444 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread* RE: [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (11 preceding siblings ...)
2026-06-23 13:51 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-23 16:05 ` Srinivas, Vidya
2026-06-23 17:35 ` ✗ Xe.CI.FULL: failure for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev4) Patchwork
13 siblings, 0 replies; 20+ messages in thread
From: Srinivas, Vidya @ 2026-06-23 16:05 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
Kandpal, Suraj, Nautiyal, Ankit K, Lee, Shawn C
Thank you very much Ville for the patch series.
Tested-by: Vidya Srinivas <vidya.srinivas@intel.com>
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: 23 June 2026 03:06
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Kandpal,
> Suraj <suraj.kandpal@intel.com>; Nautiyal, Ankit K
> <ankit.k.nautiyal@intel.com>
> Subject: [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh
> rate changes on eDP
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Tweak the eDP fixed mode selection algorithm to allow userspace to do
> refresh rate changes on VRR capable eDP panels without full modesets.
>
> v2: Cleaner split for VRR vs. fixed refresh rate fixed mode
> selection to avoid some corner cases
>
> Cc: Suraj Kandpal <suraj.kandpal@intel.com>
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>
> Ville Syrjälä (5):
> drm/i915/panel: Split VRR vs. fixed refresh rate fixed mode selection
> into separate stages
> drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
> drm/i915: Pass the full atomic state to .compute_config()
> drm/i915/panel: Adjust intel_panel_compute_config() calling convention
> drm/i915/panel: Attempt VRR based refresh rate change for
> !allow_modeset
>
> drivers/gpu/drm/drm_modes.c | 23 +++
> drivers/gpu/drm/i915/display/g4x_dp.c | 5 +-
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 4 +-
> drivers/gpu/drm/i915/display/icl_dsi.c | 5 +-
> drivers/gpu/drm/i915/display/intel_crt.c | 9 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 8 +-
> drivers/gpu/drm/i915/display/intel_display.c | 4 +-
> .../drm/i915/display/intel_display_types.h | 6 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 6 +-
> drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 8 +-
> drivers/gpu/drm/i915/display/intel_dvo.c | 5 +-
> drivers/gpu/drm/i915/display/intel_lvds.c | 5 +-
> drivers/gpu/drm/i915/display/intel_panel.c | 167 +++++++++++++-----
> drivers/gpu/drm/i915/display/intel_panel.h | 6 +-
> drivers/gpu/drm/i915/display/intel_sdvo.c | 7 +-
> drivers/gpu/drm/i915/display/intel_tv.c | 5 +-
> drivers/gpu/drm/i915/display/vlv_dsi.c | 5 +-
> include/drm/drm_modes.h | 1 +
> 19 files changed, 203 insertions(+), 79 deletions(-)
>
> --
> 2.53.0
^ permalink raw reply [flat|nested] 20+ messages in thread* ✗ Xe.CI.FULL: failure for drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev4)
2026-06-22 21:35 [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Ville Syrjala
` (12 preceding siblings ...)
2026-06-23 16:05 ` [PATCH v2 0/5] drm/i915: Work harder to enable VRR based refresh rate changes on eDP Srinivas, Vidya
@ 2026-06-23 17:35 ` Patchwork
13 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-23 17:35 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 9650 bytes --]
== Series Details ==
Series: drm/i915: Work harder to enable VRR based refresh rate changes on eDP (rev4)
URL : https://patchwork.freedesktop.org/series/168442/
State : failure
== Summary ==
CI Bug Log - changes from xe-5288-60326b17f877e12846167bf8ef83680b9875218a_FULL -> xe-pw-168442v4_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-168442v4_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-168442v4_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-168442v4_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@asahi/asahi_get_time@get-time-compare:
- shard-lnl: NOTRUN -> [SKIP][1] +8 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-lnl-2/igt@asahi/asahi_get_time@get-time-compare.html
* igt@asahi/asahi_get_time@get-time-flags-1:
- shard-bmg: NOTRUN -> [SKIP][2] +8 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-bmg-3/igt@asahi/asahi_get_time@get-time-flags-1.html
Known issues
------------
Here are the changes found in xe-pw-168442v4_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [PASS][3] -> [FAIL][4] ([Intel XE#301])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_pm_dc@deep-pkgc:
- shard-lnl: [PASS][5] -> [FAIL][6] ([Intel XE#2029] / [Intel XE#7395])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/shard-lnl-3/igt@kms_pm_dc@deep-pkgc.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-lnl-1/igt@kms_pm_dc@deep-pkgc.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-lnl: [PASS][7] -> [SKIP][8] ([Intel XE#8361])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/shard-lnl-2/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-lnl-5/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@xe_eudebug@basic-close:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#7636])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-bmg-1/igt@xe_eudebug@basic-close.html
* igt@xe_exec_basic@multigpu-once-userptr-invalidate-race:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2322] / [Intel XE#7372])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-bmg-10/igt@xe_exec_basic@multigpu-once-userptr-invalidate-race.html
* igt@xe_exec_reset@multi-queue-cat-error:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#8369])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-bmg-9/igt@xe_exec_reset@multi-queue-cat-error.html
#### Possible fixes ####
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [FAIL][12] ([Intel XE#7571]) -> [PASS][13] +1 other test pass
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][14] ([Intel XE#301]) -> [PASS][15] +1 other test pass
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-bmg: [INCOMPLETE][16] ([Intel XE#4760] / [Intel XE#8155]) -> [PASS][17] +1 other test pass
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/shard-bmg-3/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-bmg-9/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][18] ([Intel XE#1503]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-bmg-6/igt@kms_hdr@invalid-hdr.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-bmg: [FAIL][20] ([Intel XE#7992]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/shard-bmg-6/igt@xe_sriov_flr@flr-vf1-clear.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-bmg-7/igt@xe_sriov_flr@flr-vf1-clear.html
* igt@xe_sriov_flr@flr-vfs-parallel:
- shard-bmg: [FAIL][22] ([Intel XE#6569]) -> [PASS][23]
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/shard-bmg-7/igt@xe_sriov_flr@flr-vfs-parallel.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-bmg-4/igt@xe_sriov_flr@flr-vfs-parallel.html
#### Warnings ####
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][24] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][25] ([Intel XE#3544])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-bmg-10/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][26] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][27] ([Intel XE#2426] / [Intel XE#5848])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][28] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][29] ([Intel XE#2426] / [Intel XE#5848])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5288-60326b17f877e12846167bf8ef83680b9875218a/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#4760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4760
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7395
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
[Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992
[Intel XE#8155]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8155
[Intel XE#8361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8361
[Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
Build changes
-------------
* IGT: IGT_8979 -> IGT_8980
* Linux: xe-5288-60326b17f877e12846167bf8ef83680b9875218a -> xe-pw-168442v4
IGT_8979: 8979
IGT_8980: 65d820119e86b017bf801c8f2bb500e557b29d1c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5288-60326b17f877e12846167bf8ef83680b9875218a: 60326b17f877e12846167bf8ef83680b9875218a
xe-pw-168442v4: 168442v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168442v4/index.html
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