Re: [PATCH v1 2/2] drm/xe: Add sysfs for GT/IA bias

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Wed, Jul 01, 2026 at 05:56:14PM -0700, Vinay Belgaumkar wrote:
> GT_IA_PERF_BIAS_REG indicates power budget between IA and GT.
> Lower 16 bits correspond to IA and upper to GT. Higher value
> indicates more bias towards that plane. The values are in U1.15
> format.
> 
> $ cat /sys/class/drm/card1/device/tile0/gt0/freq0/gt_ia_bias
> 0x80002666

What about decoding this?

> 
> This interface will allow us to observe power budget changes while
> running workloads and also, if needed, tune it.
> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_gt_regs.h |  2 ++
>  drivers/gpu/drm/xe/xe_gt_freq.c      | 51 ++++++++++++++++++++++++++++
>  2 files changed, 53 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 08251c7a1a4b..41c5c5f20964 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -634,6 +634,8 @@
>  #define GT_GFX_RC6_LOCKED			XE_REG(0x138104)
>  #define GT_GFX_RC6				XE_REG(0x138108)
>  
> +#define GT_IA_PERF_BIAS_REG			XE_REG(0x138158)
> +
>  #define GT0_PERF_LIMIT_REASONS			XE_REG(0x1381a8)
>  /* Common performance limit reason bits - available on all platforms */
>  #define   GT0_PERF_LIMIT_REASONS_MASK		0xde3
> diff --git a/drivers/gpu/drm/xe/xe_gt_freq.c b/drivers/gpu/drm/xe/xe_gt_freq.c
> index a40dd074106f..0847832151f9 100644
> --- a/drivers/gpu/drm/xe/xe_gt_freq.c
> +++ b/drivers/gpu/drm/xe/xe_gt_freq.c
> @@ -11,10 +11,13 @@
>  #include <drm/drm_managed.h>
>  #include <drm/drm_print.h>
>  
> +#include <regs/xe_gt_regs.h>
> +#include "xe_gt.h"
>  #include "xe_gt_sysfs.h"
>  #include "xe_gt_throttle.h"
>  #include "xe_gt_types.h"
>  #include "xe_guc_pc.h"
> +#include "xe_mmio.h"
>  #include "xe_pm.h"
>  
>  /**
> @@ -242,6 +245,41 @@ static ssize_t power_profile_store(struct kobject *kobj,
>  }
>  static struct kobj_attribute attr_power_profile = __ATTR_RW(power_profile);
>  
> +static ssize_t gt_ia_bias_show(struct kobject *kobj,
> +			       struct kobj_attribute *attr,
> +			       char *buf)
> +{
> +	struct device *dev = kobj_to_dev(kobj);
> +	struct xe_gt *gt = kobj_to_gt(kobj->parent);
> +	u32 val;
> +
> +	guard(xe_pm_runtime)(dev_to_xe(dev));
> +	val = xe_mmio_read32(&gt->mmio, GT_IA_PERF_BIAS_REG);
> +
> +	return sysfs_emit(buf, "0x%x\n", val);
> +}
> +
> +static ssize_t gt_ia_bias_store(struct kobject *kobj,
> +				struct kobj_attribute *attr,
> +				const char *buff, size_t count)
> +{
> +	struct device *dev = kobj_to_dev(kobj);
> +	struct xe_gt *gt = kobj_to_gt(kobj->parent);
> +	u32 val;
> +	int ret;
> +
> +	ret = kstrtou32(buff, 0, &val);
> +	if (ret)
> +		return ret;
> +
> +	guard(xe_pm_runtime)(dev_to_xe(dev));
> +	xe_mmio_write32(&gt->mmio, GT_IA_PERF_BIAS_REG, val);
> +
> +	return count;
> +}
> +
> +static struct kobj_attribute attr_gt_ia_bias = __ATTR_RW(gt_ia_bias);
> +
>  static const struct attribute *freq_attrs[] = {
>  	&attr_act_freq.attr,
>  	&attr_cur_freq.attr,
> @@ -258,8 +296,13 @@ static const struct attribute *freq_attrs[] = {
>  static void freq_fini(void *arg)
>  {
>  	struct kobject *kobj = arg;
> +	struct device *dev = kobj_to_dev(kobj);
> +	struct xe_gt *gt = kobj_to_gt(kobj->parent);
>  
>  	sysfs_remove_files(kobj, freq_attrs);
> +
> +	if (xe_gt_is_main_type(gt) && !IS_DGFX(dev_to_xe(dev)))
> +		sysfs_remove_file(kobj, &attr_gt_ia_bias.attr);
>  	kobject_put(kobj);
>  }
>  
> @@ -289,6 +332,14 @@ int xe_gt_freq_init(struct xe_gt *gt)
>  		return err;
>  	}
>  
> +	if (xe_gt_is_main_type(gt) && !IS_DGFX(xe)) {
> +		err = sysfs_create_file(gt->freq, &attr_gt_ia_bias.attr);
> +		if (err) {
> +			kobject_put(gt->freq);
> +			return err;
> +		}
> +	}
> +
>  	err = devm_add_action_or_reset(xe->drm.dev, freq_fini, gt->freq);
>  	if (err)
>  		return err;
> -- 
> 2.38.1
>