* [PATCH v1] drm/xe/ras: Fix invalid health error code
@ 2026-08-04 5:12 Raag Jadav
2026-08-04 5:23 ` ✓ CI.KUnit: success for " Patchwork
` (7 more replies)
0 siblings, 8 replies; 13+ messages in thread
From: Raag Jadav @ 2026-08-04 5:12 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, michal.wajdeczko, matthew.d.roper, soham.purkait,
Raag Jadav
We use -EBADMSG for corrupted responses from sysctrl. Fix the error code.
Fixes: 53a7115f9862 ("drm/xe/xe_ras: Add RAS GPU health indicator")
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
drivers/gpu/drm/xe/xe_ras.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index f7af4da8172c..bdad0621ae12 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -700,7 +700,7 @@ static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr
if (response.health >= XE_RAS_HEALTH_MAX) {
xe_err(xe, "sysctrl: invalid health state %u\n",
response.health);
- return -EIO;
+ return -EBADMSG;
}
health = gpu_health_states[response.health];
@@ -753,7 +753,7 @@ static ssize_t gpu_health_store(struct device *dev, struct device_attribute *att
if (response.health >= XE_RAS_HEALTH_MAX) {
xe_err(xe, "sysctrl: invalid health state %u\n",
response.health);
- return -EIO;
+ return -EBADMSG;
}
health = gpu_health_states[response.health];
--
2.43.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* ✓ CI.KUnit: success for drm/xe/ras: Fix invalid health error code
2026-08-04 5:12 [PATCH v1] drm/xe/ras: Fix invalid health error code Raag Jadav
@ 2026-08-04 5:23 ` Patchwork
2026-08-04 6:36 ` [PATCH v1] " Tauro, Riana
` (6 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-08-04 5:23 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
== Series Details ==
Series: drm/xe/ras: Fix invalid health error code
URL : https://patchwork.freedesktop.org/series/171545/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[05:22:22] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:22:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:22:58] Starting KUnit Kernel (1/1)...
[05:22:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:22:59] ================== guc_buf (11 subtests) ===================
[05:22:59] [PASSED] test_smallest
[05:22:59] [PASSED] test_largest
[05:22:59] [PASSED] test_granular
[05:22:59] [PASSED] test_unique
[05:22:59] [PASSED] test_overlap
[05:22:59] [PASSED] test_reusable
[05:22:59] [PASSED] test_too_big
[05:22:59] [PASSED] test_flush
[05:22:59] [PASSED] test_lookup
[05:22:59] [PASSED] test_data
[05:22:59] [PASSED] test_class
[05:22:59] ===================== [PASSED] guc_buf =====================
[05:22:59] =================== guc_dbm (7 subtests) ===================
[05:22:59] [PASSED] test_empty
[05:22:59] [PASSED] test_default
[05:22:59] ======================== test_size ========================
[05:22:59] [PASSED] 4
[05:22:59] [PASSED] 8
[05:22:59] [PASSED] 32
[05:22:59] [PASSED] 256
[05:22:59] ==================== [PASSED] test_size ====================
[05:22:59] ======================= test_reuse ========================
[05:22:59] [PASSED] 4
[05:22:59] [PASSED] 8
[05:22:59] [PASSED] 32
[05:22:59] [PASSED] 256
[05:22:59] =================== [PASSED] test_reuse ====================
[05:22:59] =================== test_range_overlap ====================
[05:22:59] [PASSED] 4
[05:22:59] [PASSED] 8
[05:22:59] [PASSED] 32
[05:22:59] [PASSED] 256
[05:22:59] =============== [PASSED] test_range_overlap ================
[05:22:59] =================== test_range_compact ====================
[05:22:59] [PASSED] 4
[05:22:59] [PASSED] 8
[05:22:59] [PASSED] 32
[05:22:59] [PASSED] 256
[05:22:59] =============== [PASSED] test_range_compact ================
[05:22:59] ==================== test_range_spare =====================
[05:22:59] [PASSED] 4
[05:22:59] [PASSED] 8
[05:22:59] [PASSED] 32
[05:22:59] [PASSED] 256
[05:22:59] ================ [PASSED] test_range_spare =================
[05:22:59] ===================== [PASSED] guc_dbm =====================
[05:22:59] =================== guc_idm (6 subtests) ===================
[05:22:59] [PASSED] bad_init
[05:22:59] [PASSED] no_init
[05:22:59] [PASSED] init_fini
[05:22:59] [PASSED] check_used
[05:22:59] [PASSED] check_quota
[05:22:59] [PASSED] check_all
[05:22:59] ===================== [PASSED] guc_idm =====================
[05:22:59] =============== guc_klv_helpers (9 subtests) ===============
[05:22:59] [PASSED] test_count
[05:22:59] [PASSED] test_encode_u32
[05:22:59] [PASSED] test_encode_u64
[05:22:59] [PASSED] test_encode_string
[05:22:59] [PASSED] test_encode_object_raw
[05:22:59] [PASSED] test_encode_object_klv
[05:22:59] [PASSED] test_encode_object_nested
[05:22:59] [PASSED] test_encode_object_basic
[05:22:59] [PASSED] test_print
[05:22:59] ================= [PASSED] guc_klv_helpers =================
[05:22:59] ================== no_relay (3 subtests) ===================
[05:22:59] [PASSED] xe_drops_guc2pf_if_not_ready
[05:22:59] [PASSED] xe_drops_guc2vf_if_not_ready
[05:22:59] [PASSED] xe_rejects_send_if_not_ready
[05:22:59] ==================== [PASSED] no_relay =====================
[05:22:59] ================== pf_relay (14 subtests) ==================
[05:22:59] [PASSED] pf_rejects_guc2pf_too_short
[05:22:59] [PASSED] pf_rejects_guc2pf_too_long
[05:22:59] [PASSED] pf_rejects_guc2pf_no_payload
[05:22:59] [PASSED] pf_fails_no_payload
[05:22:59] [PASSED] pf_fails_bad_origin
[05:22:59] [PASSED] pf_fails_bad_type
[05:22:59] [PASSED] pf_txn_reports_error
[05:22:59] [PASSED] pf_txn_sends_pf2guc
[05:22:59] [PASSED] pf_sends_pf2guc
[05:22:59] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[05:22:59] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[05:22:59] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[05:22:59] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[05:22:59] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[05:22:59] ==================== [PASSED] pf_relay =====================
[05:22:59] ================== vf_relay (3 subtests) ===================
[05:22:59] [PASSED] vf_rejects_guc2vf_too_short
[05:22:59] [PASSED] vf_rejects_guc2vf_too_long
[05:22:59] [PASSED] vf_rejects_guc2vf_no_payload
[05:22:59] ==================== [PASSED] vf_relay =====================
[05:22:59] ================ pf_gt_config (9 subtests) =================
[05:22:59] [PASSED] fair_contexts_1vf
[05:22:59] [PASSED] fair_doorbells_1vf
[05:22:59] [PASSED] fair_ggtt_1vf
[05:22:59] ====================== fair_vram_1vf ======================
[05:22:59] [PASSED] 3.50 GiB
[05:22:59] [PASSED] 11.5 GiB
[05:22:59] [PASSED] 15.5 GiB
[05:22:59] [PASSED] 31.5 GiB
[05:22:59] [PASSED] 63.5 GiB
[05:22:59] [PASSED] 1.91 GiB
[05:22:59] ================== [PASSED] fair_vram_1vf ==================
[05:22:59] ================ fair_vram_1vf_admin_only =================
[05:22:59] [PASSED] 3.50 GiB
[05:22:59] [PASSED] 11.5 GiB
[05:22:59] [PASSED] 15.5 GiB
[05:22:59] [PASSED] 31.5 GiB
[05:22:59] [PASSED] 63.5 GiB
[05:22:59] [PASSED] 1.91 GiB
[05:22:59] ============ [PASSED] fair_vram_1vf_admin_only =============
[05:22:59] ====================== fair_contexts ======================
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[05:22:59] ================== [PASSED] fair_contexts ==================
[05:22:59] ===================== fair_doorbells ======================
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[05:22:59] ================= [PASSED] fair_doorbells ==================
[05:22:59] ======================== fair_ggtt ========================
[05:22:59] [PASSED] 1 VF
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[05:22:59] ==================== [PASSED] fair_ggtt ====================
[05:22:59] ======================== fair_vram ========================
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[05:22:59] ==================== [PASSED] fair_vram ====================
[05:22:59] ================== [PASSED] pf_gt_config ===================
[05:22:59] ===================== lmtt (1 subtest) =====================
[05:22:59] ======================== test_ops =========================
[05:22:59] [PASSED] 2-level
[05:22:59] [PASSED] multi-level
[05:22:59] ==================== [PASSED] test_ops =====================
[05:22:59] ====================== [PASSED] lmtt =======================
[05:22:59] ================= sriov_packet (1 subtest) =================
[05:22:59] [PASSED] test_descriptor_init
[05:22:59] ================== [PASSED] sriov_packet ===================
[05:22:59] ================= pf_service (11 subtests) =================
[05:22:59] [PASSED] pf_negotiate_any
[05:22:59] [PASSED] pf_negotiate_base_match
[05:22:59] [PASSED] pf_negotiate_base_newer
[05:22:59] [PASSED] pf_negotiate_base_next
[05:22:59] [SKIPPED] pf_negotiate_base_older (no older minor)
[05:22:59] [PASSED] pf_negotiate_base_prev
[05:22:59] [PASSED] pf_negotiate_latest_match
[05:22:59] [PASSED] pf_negotiate_latest_newer
[05:22:59] [PASSED] pf_negotiate_latest_next
[05:22:59] [SKIPPED] pf_negotiate_latest_older (no older minor)
[05:22:59] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[05:22:59] =================== [PASSED] pf_service ====================
[05:22:59] ================= xe_guc_g2g (2 subtests) ==================
[05:22:59] ============== xe_live_guc_g2g_kunit_default ==============
[05:22:59] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[05:22:59] ============== xe_live_guc_g2g_kunit_allmem ===============
[05:22:59] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[05:22:59] =================== [SKIPPED] xe_guc_g2g ===================
[05:22:59] =================== xe_mocs (2 subtests) ===================
[05:22:59] ================ xe_live_mocs_kernel_kunit ================
[05:22:59] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[05:22:59] ================ xe_live_mocs_reset_kunit =================
[05:22:59] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[05:22:59] ==================== [SKIPPED] xe_mocs =====================
[05:22:59] ================= xe_migrate (2 subtests) ==================
[05:22:59] ================= xe_migrate_sanity_kunit =================
[05:22:59] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[05:22:59] ================== xe_validate_ccs_kunit ==================
[05:22:59] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[05:22:59] =================== [SKIPPED] xe_migrate ===================
[05:22:59] ================== xe_dma_buf (1 subtest) ==================
[05:22:59] ==================== xe_dma_buf_kunit =====================
[05:22:59] ================ [SKIPPED] xe_dma_buf_kunit ================
[05:22:59] =================== [SKIPPED] xe_dma_buf ===================
[05:22:59] ================= xe_bo_shrink (1 subtest) =================
[05:22:59] =================== xe_bo_shrink_kunit ====================
[05:22:59] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[05:22:59] ================== [SKIPPED] xe_bo_shrink ==================
[05:22:59] ==================== xe_bo (2 subtests) ====================
[05:22:59] ================== xe_ccs_migrate_kunit ===================
[05:22:59] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[05:22:59] ==================== xe_bo_evict_kunit ====================
[05:22:59] =============== [SKIPPED] xe_bo_evict_kunit ================
[05:22:59] ===================== [SKIPPED] xe_bo ======================
[05:22:59] ==================== args (13 subtests) ====================
[05:22:59] [PASSED] count_args_test
[05:22:59] [PASSED] call_args_example
[05:22:59] [PASSED] call_args_test
[05:22:59] [PASSED] drop_first_arg_example
[05:22:59] [PASSED] drop_first_arg_test
[05:22:59] [PASSED] first_arg_example
[05:22:59] [PASSED] first_arg_test
[05:22:59] [PASSED] last_arg_example
[05:22:59] [PASSED] last_arg_test
[05:22:59] [PASSED] pick_arg_example
[05:22:59] [PASSED] if_args_example
[05:22:59] [PASSED] if_args_test
[05:22:59] [PASSED] sep_comma_example
[05:22:59] ====================== [PASSED] args =======================
[05:22:59] =================== xe_pci (3 subtests) ====================
[05:22:59] ==================== check_graphics_ip ====================
[05:22:59] [PASSED] 12.00 Xe_LP
[05:22:59] [PASSED] 12.10 Xe_LP+
[05:22:59] [PASSED] 12.55 Xe_HPG
[05:22:59] [PASSED] 12.60 Xe_HPC
[05:22:59] [PASSED] 12.70 Xe_LPG
[05:22:59] [PASSED] 12.71 Xe_LPG
[05:22:59] [PASSED] 12.74 Xe_LPG+
[05:22:59] [PASSED] 20.01 Xe2_HPG
[05:22:59] [PASSED] 20.02 Xe2_HPG
[05:22:59] [PASSED] 20.04 Xe2_LPG
[05:22:59] [PASSED] 30.00 Xe3_LPG
[05:22:59] [PASSED] 30.01 Xe3_LPG
[05:22:59] [PASSED] 30.03 Xe3_LPG
[05:22:59] [PASSED] 30.04 Xe3_LPG
[05:22:59] [PASSED] 30.05 Xe3_LPG
[05:22:59] [PASSED] 35.10 Xe3p_LPG
[05:22:59] [PASSED] 35.11 Xe3p_XPC
[05:22:59] ================ [PASSED] check_graphics_ip ================
[05:22:59] ===================== check_media_ip ======================
[05:22:59] [PASSED] 12.00 Xe_M
[05:22:59] [PASSED] 12.55 Xe_HPM
[05:22:59] [PASSED] 13.00 Xe_LPM+
[05:22:59] [PASSED] 13.01 Xe2_HPM
[05:22:59] [PASSED] 20.00 Xe2_LPM
[05:22:59] [PASSED] 30.00 Xe3_LPM
[05:22:59] [PASSED] 30.02 Xe3_LPM
[05:22:59] [PASSED] 35.00 Xe3p_LPM
[05:22:59] [PASSED] 35.03 Xe3p_HPM
[05:22:59] ================= [PASSED] check_media_ip ==================
[05:22:59] =================== check_platform_desc ===================
[05:22:59] [PASSED] 0x9A60 (TIGERLAKE)
[05:22:59] [PASSED] 0x9A68 (TIGERLAKE)
[05:22:59] [PASSED] 0x9A70 (TIGERLAKE)
[05:22:59] [PASSED] 0x9A40 (TIGERLAKE)
[05:22:59] [PASSED] 0x9A49 (TIGERLAKE)
[05:22:59] [PASSED] 0x9A59 (TIGERLAKE)
[05:22:59] [PASSED] 0x9A78 (TIGERLAKE)
[05:22:59] [PASSED] 0x9AC0 (TIGERLAKE)
[05:22:59] [PASSED] 0x9AC9 (TIGERLAKE)
[05:22:59] [PASSED] 0x9AD9 (TIGERLAKE)
[05:22:59] [PASSED] 0x9AF8 (TIGERLAKE)
[05:22:59] [PASSED] 0x4C80 (ROCKETLAKE)
[05:22:59] [PASSED] 0x4C8A (ROCKETLAKE)
[05:22:59] [PASSED] 0x4C8B (ROCKETLAKE)
[05:22:59] [PASSED] 0x4C8C (ROCKETLAKE)
[05:22:59] [PASSED] 0x4C90 (ROCKETLAKE)
[05:22:59] [PASSED] 0x4C9A (ROCKETLAKE)
[05:22:59] [PASSED] 0x4680 (ALDERLAKE_S)
[05:22:59] [PASSED] 0x4682 (ALDERLAKE_S)
[05:22:59] [PASSED] 0x4688 (ALDERLAKE_S)
[05:22:59] [PASSED] 0x468A (ALDERLAKE_S)
[05:22:59] [PASSED] 0x468B (ALDERLAKE_S)
[05:22:59] [PASSED] 0x4690 (ALDERLAKE_S)
[05:22:59] [PASSED] 0x4692 (ALDERLAKE_S)
[05:22:59] [PASSED] 0x4693 (ALDERLAKE_S)
[05:22:59] [PASSED] 0x46A0 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46A1 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46A2 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46A3 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46A6 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46A8 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46AA (ALDERLAKE_P)
[05:22:59] [PASSED] 0x462A (ALDERLAKE_P)
[05:22:59] [PASSED] 0x4626 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x4628 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46B0 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46B1 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46B2 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46B3 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46C0 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46C1 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46C2 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46C3 (ALDERLAKE_P)
[05:22:59] [PASSED] 0x46D0 (ALDERLAKE_N)
[05:22:59] [PASSED] 0x46D1 (ALDERLAKE_N)
[05:22:59] [PASSED] 0x46D2 (ALDERLAKE_N)
[05:22:59] [PASSED] 0x46D3 (ALDERLAKE_N)
[05:22:59] [PASSED] 0x46D4 (ALDERLAKE_N)
[05:22:59] [PASSED] 0xA721 (ALDERLAKE_P)
[05:22:59] [PASSED] 0xA7A1 (ALDERLAKE_P)
[05:22:59] [PASSED] 0xA7A9 (ALDERLAKE_P)
[05:22:59] [PASSED] 0xA7AC (ALDERLAKE_P)
[05:22:59] [PASSED] 0xA7AD (ALDERLAKE_P)
[05:22:59] [PASSED] 0xA720 (ALDERLAKE_P)
[05:22:59] [PASSED] 0xA7A0 (ALDERLAKE_P)
[05:22:59] [PASSED] 0xA7A8 (ALDERLAKE_P)
[05:22:59] [PASSED] 0xA7AA (ALDERLAKE_P)
[05:22:59] [PASSED] 0xA7AB (ALDERLAKE_P)
[05:22:59] [PASSED] 0xA780 (ALDERLAKE_S)
[05:22:59] [PASSED] 0xA781 (ALDERLAKE_S)
[05:22:59] [PASSED] 0xA782 (ALDERLAKE_S)
[05:22:59] [PASSED] 0xA783 (ALDERLAKE_S)
[05:22:59] [PASSED] 0xA788 (ALDERLAKE_S)
[05:22:59] [PASSED] 0xA789 (ALDERLAKE_S)
[05:22:59] [PASSED] 0xA78A (ALDERLAKE_S)
[05:22:59] [PASSED] 0xA78B (ALDERLAKE_S)
[05:22:59] [PASSED] 0x4905 (DG1)
[05:22:59] [PASSED] 0x4906 (DG1)
[05:22:59] [PASSED] 0x4907 (DG1)
[05:22:59] [PASSED] 0x4908 (DG1)
[05:22:59] [PASSED] 0x4909 (DG1)
[05:22:59] [PASSED] 0x56C0 (DG2)
[05:22:59] [PASSED] 0x56C2 (DG2)
[05:22:59] [PASSED] 0x56C1 (DG2)
[05:22:59] [PASSED] 0x7D51 (METEORLAKE)
[05:22:59] [PASSED] 0x7DD1 (METEORLAKE)
[05:22:59] [PASSED] 0x7D41 (METEORLAKE)
[05:22:59] [PASSED] 0x7D67 (METEORLAKE)
[05:22:59] [PASSED] 0xB640 (METEORLAKE)
[05:22:59] [PASSED] 0x56A0 (DG2)
[05:22:59] [PASSED] 0x56A1 (DG2)
[05:22:59] [PASSED] 0x56A2 (DG2)
[05:22:59] [PASSED] 0x56BE (DG2)
[05:22:59] [PASSED] 0x56BF (DG2)
[05:22:59] [PASSED] 0x5690 (DG2)
[05:22:59] [PASSED] 0x5691 (DG2)
[05:22:59] [PASSED] 0x5692 (DG2)
[05:22:59] [PASSED] 0x56A5 (DG2)
[05:22:59] [PASSED] 0x56A6 (DG2)
[05:22:59] [PASSED] 0x56B0 (DG2)
[05:22:59] [PASSED] 0x56B1 (DG2)
[05:22:59] [PASSED] 0x56BA (DG2)
[05:22:59] [PASSED] 0x56BB (DG2)
[05:22:59] [PASSED] 0x56BC (DG2)
[05:22:59] [PASSED] 0x56BD (DG2)
[05:22:59] [PASSED] 0x5693 (DG2)
[05:22:59] [PASSED] 0x5694 (DG2)
[05:22:59] [PASSED] 0x5695 (DG2)
[05:22:59] [PASSED] 0x56A3 (DG2)
[05:22:59] [PASSED] 0x56A4 (DG2)
[05:22:59] [PASSED] 0x56B2 (DG2)
[05:22:59] [PASSED] 0x56B3 (DG2)
[05:22:59] [PASSED] 0x5696 (DG2)
[05:22:59] [PASSED] 0x5697 (DG2)
[05:22:59] [PASSED] 0xB69 (PVC)
[05:22:59] [PASSED] 0xB6E (PVC)
[05:22:59] [PASSED] 0xBD4 (PVC)
[05:22:59] [PASSED] 0xBD5 (PVC)
[05:22:59] [PASSED] 0xBD6 (PVC)
[05:22:59] [PASSED] 0xBD7 (PVC)
[05:22:59] [PASSED] 0xBD8 (PVC)
[05:22:59] [PASSED] 0xBD9 (PVC)
[05:22:59] [PASSED] 0xBDA (PVC)
[05:22:59] [PASSED] 0xBDB (PVC)
[05:22:59] [PASSED] 0xBE0 (PVC)
[05:22:59] [PASSED] 0xBE1 (PVC)
[05:22:59] [PASSED] 0xBE5 (PVC)
[05:22:59] [PASSED] 0x7D40 (METEORLAKE)
[05:22:59] [PASSED] 0x7D45 (METEORLAKE)
[05:22:59] [PASSED] 0x7D55 (METEORLAKE)
[05:22:59] [PASSED] 0x7D60 (METEORLAKE)
[05:22:59] [PASSED] 0x7DD5 (METEORLAKE)
[05:22:59] [PASSED] 0x6420 (LUNARLAKE)
[05:22:59] [PASSED] 0x64A0 (LUNARLAKE)
[05:22:59] [PASSED] 0x64B0 (LUNARLAKE)
[05:22:59] [PASSED] 0xE202 (BATTLEMAGE)
[05:22:59] [PASSED] 0xE209 (BATTLEMAGE)
[05:22:59] [PASSED] 0xE20B (BATTLEMAGE)
[05:22:59] [PASSED] 0xE20C (BATTLEMAGE)
[05:22:59] [PASSED] 0xE20D (BATTLEMAGE)
[05:22:59] [PASSED] 0xE210 (BATTLEMAGE)
[05:22:59] [PASSED] 0xE211 (BATTLEMAGE)
[05:22:59] [PASSED] 0xE212 (BATTLEMAGE)
[05:22:59] [PASSED] 0xE216 (BATTLEMAGE)
[05:22:59] [PASSED] 0xE220 (BATTLEMAGE)
[05:22:59] [PASSED] 0xE221 (BATTLEMAGE)
[05:22:59] [PASSED] 0xE222 (BATTLEMAGE)
[05:22:59] [PASSED] 0xE223 (BATTLEMAGE)
[05:22:59] [PASSED] 0xB080 (PANTHERLAKE)
[05:22:59] [PASSED] 0xB081 (PANTHERLAKE)
[05:22:59] [PASSED] 0xB082 (PANTHERLAKE)
[05:22:59] [PASSED] 0xB083 (PANTHERLAKE)
[05:22:59] [PASSED] 0xB084 (PANTHERLAKE)
[05:22:59] [PASSED] 0xB085 (PANTHERLAKE)
[05:22:59] [PASSED] 0xB086 (PANTHERLAKE)
[05:22:59] [PASSED] 0xB087 (PANTHERLAKE)
[05:22:59] [PASSED] 0xB08F (PANTHERLAKE)
[05:22:59] [PASSED] 0xB090 (PANTHERLAKE)
[05:22:59] [PASSED] 0xB0A0 (PANTHERLAKE)
[05:22:59] [PASSED] 0xB0B0 (PANTHERLAKE)
[05:22:59] [PASSED] 0xFD80 (PANTHERLAKE)
[05:22:59] [PASSED] 0xFD81 (PANTHERLAKE)
[05:22:59] [PASSED] 0xD740 (NOVALAKE_S)
[05:22:59] [PASSED] 0xD741 (NOVALAKE_S)
[05:22:59] [PASSED] 0xD742 (NOVALAKE_S)
[05:22:59] [PASSED] 0xD743 (NOVALAKE_S)
[05:22:59] [PASSED] 0xD745 (NOVALAKE_S)
[05:22:59] [PASSED] 0xD74A (NOVALAKE_S)
[05:22:59] [PASSED] 0xD74B (NOVALAKE_S)
[05:22:59] [PASSED] 0x674C (CRESCENTISLAND)
[05:22:59] [PASSED] 0x674D (CRESCENTISLAND)
[05:22:59] [PASSED] 0x674E (CRESCENTISLAND)
[05:22:59] [PASSED] 0x674F (CRESCENTISLAND)
[05:22:59] [PASSED] 0x6750 (CRESCENTISLAND)
[05:22:59] [PASSED] 0xD750 (NOVALAKE_P)
[05:22:59] [PASSED] 0xD751 (NOVALAKE_P)
[05:22:59] [PASSED] 0xD752 (NOVALAKE_P)
[05:22:59] [PASSED] 0xD753 (NOVALAKE_P)
[05:22:59] [PASSED] 0xD754 (NOVALAKE_P)
[05:22:59] [PASSED] 0xD755 (NOVALAKE_P)
[05:22:59] [PASSED] 0xD756 (NOVALAKE_P)
[05:22:59] [PASSED] 0xD757 (NOVALAKE_P)
[05:22:59] [PASSED] 0xD75F (NOVALAKE_P)
[05:22:59] =============== [PASSED] check_platform_desc ===============
[05:22:59] ===================== [PASSED] xe_pci ======================
[05:22:59] ============= xe_rtp_tables_test (5 subtests) ==============
[05:22:59] ================== xe_rtp_table_gt_test ===================
[05:22:59] [PASSED] gt_was/14011060649
[05:22:59] [PASSED] gt_was/14011059788
[05:22:59] [PASSED] gt_was/14015795083
[05:22:59] [PASSED] gt_was/16021867713
[05:22:59] [PASSED] gt_was/14019449301
[05:22:59] [PASSED] gt_was/16028005424
[05:22:59] [PASSED] gt_was/14026578760
[05:22:59] [PASSED] gt_was/1409420604
[05:22:59] [PASSED] gt_was/1408615072
[05:22:59] [PASSED] gt_was/22010523718
[05:22:59] [PASSED] gt_was/14011006942
[05:22:59] [PASSED] gt_was/14014830051
[05:22:59] [PASSED] gt_was/18018781329
[05:22:59] [PASSED] gt_was/1509235366
[05:22:59] [PASSED] gt_was/18018781329
[05:22:59] [PASSED] gt_was/16016694945
[05:22:59] [PASSED] gt_was/14018575942
[05:22:59] [PASSED] gt_was/22016670082
[05:22:59] [PASSED] gt_was/22016670082
[05:22:59] [PASSED] gt_was/14017421178
[05:22:59] [PASSED] gt_was/16025250150
[05:22:59] [PASSED] gt_was/14021871409
[05:22:59] [PASSED] gt_was/16021865536
[05:22:59] [PASSED] gt_was/14021486841
[05:22:59] [PASSED] gt_was/14025160223
[05:22:59] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[05:22:59] [PASSED] gt_was/14025635424
[05:22:59] [PASSED] gt_was/16028005424
[05:22:59] ============== [PASSED] xe_rtp_table_gt_test ===============
[05:22:59] ================== xe_rtp_table_gt_test ===================
[05:22:59] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[05:22:59] [PASSED] gt_tunings/Tuning: 32B Access Enable
[05:22:59] [PASSED] gt_tunings/Tuning: L3 cache
[05:22:59] [PASSED] gt_tunings/Tuning: L3 cache - media
[05:22:59] [PASSED] gt_tunings/Tuning: Compression Overfetch
[05:22:59] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[05:22:59] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[05:22:59] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[05:22:59] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[05:22:59] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[05:22:59] [PASSED] gt_tunings/Tuning: Stateless compression control
[05:22:59] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[05:22:59] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[05:22:59] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[05:22:59] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[05:22:59] ============== [PASSED] xe_rtp_table_gt_test ===============
[05:22:59] ================== xe_rtp_table_oob_test ==================
[05:22:59] [PASSED] oob_was/1607983814
[05:22:59] [PASSED] oob_was/16010904313
[05:22:59] [PASSED] oob_was/18022495364
[05:22:59] [PASSED] oob_was/22012773006
[05:22:59] [PASSED] oob_was/14014475959
[05:22:59] [PASSED] oob_was/22011391025
[05:22:59] [PASSED] oob_was/22012727170
[05:22:59] [PASSED] oob_was/22012727685
[05:22:59] [PASSED] oob_was/22016596838
[05:22:59] [PASSED] oob_was/18020744125
[05:22:59] [PASSED] oob_was/1409600907
[05:22:59] [PASSED] oob_was/22014953428
[05:22:59] [PASSED] oob_was/16017236439
[05:22:59] [PASSED] oob_was/14019821291
[05:22:59] [PASSED] oob_was/14015076503
[05:22:59] [PASSED] oob_was/14018913170
[05:22:59] [PASSED] oob_was/14018094691
[05:22:59] [PASSED] oob_was/18024947630
[05:22:59] [PASSED] oob_was/16022287689
[05:22:59] [PASSED] oob_was/13011645652
[05:22:59] [PASSED] oob_was/14022293748
[05:22:59] [PASSED] oob_was/22019794406
[05:22:59] [PASSED] oob_was/22019338487
[05:22:59] [PASSED] oob_was/16023588340
[05:22:59] [PASSED] oob_was/14019789679
[05:22:59] [PASSED] oob_was/14022866841
[05:22:59] [PASSED] oob_was/16021333562
[05:22:59] [PASSED] oob_was/14016712196
[05:22:59] [PASSED] oob_was/14015568240
[05:22:59] [PASSED] oob_was/18013179988
[05:22:59] [PASSED] oob_was/1508761755
[05:22:59] [PASSED] oob_was/16023105232
[05:22:59] [PASSED] oob_was/16026508708
[05:22:59] [PASSED] oob_was/14020001231
[05:22:59] [PASSED] oob_was/16023683509
[05:22:59] [PASSED] oob_was/14025515070
[05:22:59] [PASSED] oob_was/15015404425_disable
[05:22:59] [PASSED] oob_was/16026007364
[05:22:59] [PASSED] oob_was/14020316580
[05:22:59] [PASSED] oob_was/14025883347
[05:22:59] [PASSED] oob_was/16029380221
[05:22:59] [PASSED] oob_was/22022079272
[05:22:59] [PASSED] oob_was/16029897822
[05:22:59] [PASSED] oob_was/14027054324
[05:22:59] ============== [PASSED] xe_rtp_table_oob_test ==============
[05:22:59] ================ xe_rtp_table_dev_oob_test ================
[05:22:59] [PASSED] device_oob_was/22010954014
[05:22:59] [PASSED] device_oob_was/15015404425
[05:22:59] [PASSED] device_oob_was/22019338487_display
[05:22:59] [PASSED] device_oob_was/14022085890
[05:22:59] [PASSED] device_oob_was/14026539277
[05:22:59] [PASSED] device_oob_was/14026633728
[05:22:59] [PASSED] device_oob_was/14026746987
[05:22:59] [PASSED] device_oob_was/14026779378
[05:22:59] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[05:22:59] ========== xe_rtp_table_missing_upper_bound_test ==========
[05:22:59] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[05:22:59] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[05:22:59] [PASSED] register_whitelist/1806527549
[05:22:59] [PASSED] register_whitelist/allow_read_ctx_timestamp
[05:22:59] [PASSED] register_whitelist/allow_read_queue_timestamp
[05:22:59] [PASSED] register_whitelist/16014440446
[05:22:59] [PASSED] register_whitelist/16017236439
[05:22:59] [PASSED] register_whitelist/16020183090
[05:22:59] [PASSED] register_whitelist/14024997852
[05:22:59] [PASSED] register_whitelist/14024997852
[05:22:59] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[05:22:59] =============== [PASSED] xe_rtp_tables_test ================
[05:22:59] =================== xe_rtp (3 subtests) ====================
[05:22:59] =================== xe_rtp_rules_tests ====================
[05:22:59] [PASSED] no
[05:22:59] [PASSED] yes
[05:22:59] [PASSED] no-and-no
[05:22:59] [PASSED] no-and-yes
[05:22:59] [PASSED] yes-and-no
[05:22:59] [PASSED] yes-and-yes
[05:22:59] [PASSED] no-or-no
[05:22:59] [PASSED] no-or-yes
[05:22:59] [PASSED] yes-or-no
[05:22:59] [PASSED] yes-or-yes
[05:22:59] [PASSED] no-yes-or-yes-no
[05:22:59] [PASSED] no-yes-or-yes-yes
[05:22:59] [PASSED] yes-yes-or-no-yes
[05:22:59] [PASSED] yes-yes-or-yes-yes
[05:22:59] [PASSED] no-no-or-yes-or-no
[05:22:59] [PASSED] or
[05:22:59] [PASSED] or-yes
[05:22:59] [PASSED] or-no
[05:22:59] [PASSED] yes-or
[05:22:59] [PASSED] no-or
[05:22:59] [PASSED] no-or-or-yes
[05:22:59] [PASSED] yes-or-or-no
[05:22:59] [PASSED] no-or-or-no
[05:22:59] [PASSED] missing-context-engine-class
[05:22:59] [PASSED] missing-context-engine-class-or-yes
[05:22:59] [PASSED] missing-context-engine-class-or-or-yes
[05:22:59] =============== [PASSED] xe_rtp_rules_tests ================
[05:22:59] =============== xe_rtp_process_to_sr_tests ================
[05:22:59] [PASSED] coalesce-same-reg
[05:22:59] [PASSED] coalesce-same-reg-literal-and-func
[05:22:59] [PASSED] no-match-no-add
[05:22:59] [PASSED] two-regs-two-entries
[05:22:59] [PASSED] clr-one-set-other
[05:22:59] [PASSED] set-field
[05:22:59] [PASSED] conflict-duplicate
[05:22:59] [PASSED] conflict-not-disjoint
[05:22:59] [PASSED] conflict-not-disjoint-literal-and-func
[05:22:59] [PASSED] conflict-reg-type
[05:22:59] [PASSED] bad-mcr-reg-forced-to-regular
[05:22:59] [PASSED] bad-regular-reg-forced-to-mcr
[05:22:59] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[05:22:59] ================== xe_rtp_process_tests ===================
[05:22:59] [PASSED] active1
[05:22:59] [PASSED] active2
[05:22:59] [PASSED] active-inactive
[05:22:59] [PASSED] inactive-active
[05:22:59] [PASSED] inactive-active-inactive
[05:22:59] [PASSED] inactive-inactive-inactive
[05:22:59] ============== [PASSED] xe_rtp_process_tests ===============
[05:22:59] ===================== [PASSED] xe_rtp ======================
[05:22:59] ==================== xe_wa (1 subtest) =====================
[05:22:59] ======================== xe_wa_gt =========================
[05:22:59] [PASSED] TIGERLAKE B0
[05:22:59] [PASSED] DG1 A0
[05:22:59] [PASSED] DG1 B0
[05:22:59] [PASSED] ALDERLAKE_S A0
[05:22:59] [PASSED] ALDERLAKE_S B0
[05:22:59] [PASSED] ALDERLAKE_S C0
[05:22:59] [PASSED] ALDERLAKE_S D0
[05:22:59] [PASSED] ALDERLAKE_P A0
[05:22:59] [PASSED] ALDERLAKE_P B0
[05:22:59] [PASSED] ALDERLAKE_P C0
[05:22:59] [PASSED] ALDERLAKE_S RPLS D0
[05:22:59] [PASSED] ALDERLAKE_P RPLU E0
[05:22:59] [PASSED] DG2 G10 C0
[05:22:59] [PASSED] DG2 G11 B1
[05:22:59] [PASSED] DG2 G12 A1
[05:22:59] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:22:59] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:22:59] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[05:22:59] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[05:22:59] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[05:22:59] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[05:22:59] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[05:22:59] ==================== [PASSED] xe_wa_gt =====================
[05:22:59] ====================== [PASSED] xe_wa ======================
[05:22:59] ============================================================
[05:22:59] Testing complete. Ran 742 tests: passed: 724, skipped: 18
[05:22:59] Elapsed time: 37.240s total, 4.353s configuring, 32.221s building, 0.635s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[05:22:59] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:23:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:23:26] Starting KUnit Kernel (1/1)...
[05:23:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:23:26] ============ drm_test_pick_cmdline (2 subtests) ============
[05:23:26] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[05:23:26] =============== drm_test_pick_cmdline_named ===============
[05:23:26] [PASSED] NTSC
[05:23:26] [PASSED] NTSC-J
[05:23:26] [PASSED] PAL
[05:23:26] [PASSED] PAL-M
[05:23:26] =========== [PASSED] drm_test_pick_cmdline_named ===========
[05:23:26] ============== [PASSED] drm_test_pick_cmdline ==============
[05:23:26] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[05:23:26] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[05:23:26] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[05:23:26] =========== drm_validate_clone_mode (2 subtests) ===========
[05:23:26] ============== drm_test_check_in_clone_mode ===============
[05:23:26] [PASSED] in_clone_mode
[05:23:26] [PASSED] not_in_clone_mode
[05:23:26] ========== [PASSED] drm_test_check_in_clone_mode ===========
[05:23:26] =============== drm_test_check_valid_clones ===============
[05:23:26] [PASSED] not_in_clone_mode
[05:23:26] [PASSED] valid_clone
[05:23:26] [PASSED] invalid_clone
[05:23:26] =========== [PASSED] drm_test_check_valid_clones ===========
[05:23:26] ============= [PASSED] drm_validate_clone_mode =============
[05:23:26] ============= drm_validate_modeset (1 subtest) =============
[05:23:26] [PASSED] drm_test_check_connector_changed_modeset
[05:23:26] ============== [PASSED] drm_validate_modeset ===============
[05:23:26] ====== drm_test_bridge_get_current_state (1 subtest) =======
[05:23:26] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[05:23:26] ======== [PASSED] drm_test_bridge_get_current_state ========
[05:23:26] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[05:23:26] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[05:23:26] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[05:23:26] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[05:23:26] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[05:23:26] ============== drm_bridge_alloc (2 subtests) ===============
[05:23:26] [PASSED] drm_test_drm_bridge_alloc_basic
[05:23:26] [PASSED] drm_test_drm_bridge_alloc_get_put
[05:23:26] ================ [PASSED] drm_bridge_alloc =================
[05:23:26] ============= drm_bridge_bus_fmt (5 subtests) ==============
[05:23:26] [PASSED] drm_test_bridge_rgb_yuv_rgb
[05:23:26] [PASSED] drm_test_bridge_must_convert_to_yuv444
[05:23:26] [PASSED] drm_test_bridge_hdmi_auto_rgb
[05:23:26] [PASSED] drm_test_bridge_auto_first
[05:23:26] [PASSED] drm_test_bridge_rgb_yuv_no_path
[05:23:26] =============== [PASSED] drm_bridge_bus_fmt ================
[05:23:26] ============= drm_cmdline_parser (40 subtests) =============
[05:23:26] [PASSED] drm_test_cmdline_force_d_only
[05:23:26] [PASSED] drm_test_cmdline_force_D_only_dvi
[05:23:26] [PASSED] drm_test_cmdline_force_D_only_hdmi
[05:23:26] [PASSED] drm_test_cmdline_force_D_only_not_digital
[05:23:26] [PASSED] drm_test_cmdline_force_e_only
[05:23:26] [PASSED] drm_test_cmdline_res
[05:23:26] [PASSED] drm_test_cmdline_res_vesa
[05:23:26] [PASSED] drm_test_cmdline_res_vesa_rblank
[05:23:26] [PASSED] drm_test_cmdline_res_rblank
[05:23:26] [PASSED] drm_test_cmdline_res_bpp
[05:23:26] [PASSED] drm_test_cmdline_res_refresh
[05:23:26] [PASSED] drm_test_cmdline_res_bpp_refresh
[05:23:26] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[05:23:26] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[05:23:26] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[05:23:26] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[05:23:26] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[05:23:26] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[05:23:26] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[05:23:26] [PASSED] drm_test_cmdline_res_margins_force_on
[05:23:26] [PASSED] drm_test_cmdline_res_vesa_margins
[05:23:26] [PASSED] drm_test_cmdline_name
[05:23:26] [PASSED] drm_test_cmdline_name_bpp
[05:23:26] [PASSED] drm_test_cmdline_name_option
[05:23:26] [PASSED] drm_test_cmdline_name_bpp_option
[05:23:26] [PASSED] drm_test_cmdline_rotate_0
[05:23:26] [PASSED] drm_test_cmdline_rotate_90
[05:23:26] [PASSED] drm_test_cmdline_rotate_180
[05:23:26] [PASSED] drm_test_cmdline_rotate_270
[05:23:26] [PASSED] drm_test_cmdline_hmirror
[05:23:26] [PASSED] drm_test_cmdline_vmirror
[05:23:26] [PASSED] drm_test_cmdline_margin_options
[05:23:26] [PASSED] drm_test_cmdline_multiple_options
[05:23:26] [PASSED] drm_test_cmdline_bpp_extra_and_option
[05:23:26] [PASSED] drm_test_cmdline_extra_and_option
[05:23:26] [PASSED] drm_test_cmdline_freestanding_options
[05:23:26] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[05:23:26] [PASSED] drm_test_cmdline_panel_orientation
[05:23:26] ================ drm_test_cmdline_invalid =================
[05:23:26] [PASSED] margin_only
[05:23:26] [PASSED] interlace_only
[05:23:26] [PASSED] res_missing_x
[05:23:26] [PASSED] res_missing_y
[05:23:26] [PASSED] res_bad_y
[05:23:26] [PASSED] res_missing_y_bpp
[05:23:26] [PASSED] res_bad_bpp
[05:23:26] [PASSED] res_bad_refresh
[05:23:26] [PASSED] res_bpp_refresh_force_on_off
[05:23:26] [PASSED] res_invalid_mode
[05:23:26] [PASSED] res_bpp_wrong_place_mode
[05:23:26] [PASSED] name_bpp_refresh
[05:23:26] [PASSED] name_refresh
[05:23:26] [PASSED] name_refresh_wrong_mode
[05:23:26] [PASSED] name_refresh_invalid_mode
[05:23:26] [PASSED] rotate_multiple
[05:23:26] [PASSED] rotate_invalid_val
[05:23:26] [PASSED] rotate_truncated
[05:23:26] [PASSED] invalid_option
[05:23:26] [PASSED] invalid_tv_option
[05:23:26] [PASSED] truncated_tv_option
[05:23:26] ============ [PASSED] drm_test_cmdline_invalid =============
[05:23:26] =============== drm_test_cmdline_tv_options ===============
[05:23:26] [PASSED] NTSC
[05:23:26] [PASSED] NTSC_443
[05:23:26] [PASSED] NTSC_J
[05:23:26] [PASSED] PAL
[05:23:26] [PASSED] PAL_M
[05:23:26] [PASSED] PAL_N
[05:23:26] [PASSED] SECAM
[05:23:26] [PASSED] MONO_525
[05:23:26] [PASSED] MONO_625
[05:23:26] =========== [PASSED] drm_test_cmdline_tv_options ===========
[05:23:26] =============== [PASSED] drm_cmdline_parser ================
[05:23:26] ========== drmm_connector_hdmi_init (20 subtests) ==========
[05:23:26] [PASSED] drm_test_connector_hdmi_init_valid
[05:23:26] [PASSED] drm_test_connector_hdmi_init_bpc_8
[05:23:26] [PASSED] drm_test_connector_hdmi_init_bpc_10
[05:23:26] [PASSED] drm_test_connector_hdmi_init_bpc_12
[05:23:26] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[05:23:26] [PASSED] drm_test_connector_hdmi_init_bpc_null
[05:23:26] [PASSED] drm_test_connector_hdmi_init_formats_empty
[05:23:26] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[05:23:26] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:23:26] [PASSED] supported_formats=0x9 yuv420_allowed=1
[05:23:26] [PASSED] supported_formats=0x9 yuv420_allowed=0
[05:23:26] [PASSED] supported_formats=0x5 yuv420_allowed=1
[05:23:26] [PASSED] supported_formats=0x5 yuv420_allowed=0
[05:23:26] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:23:26] [PASSED] drm_test_connector_hdmi_init_null_ddc
[05:23:26] [PASSED] drm_test_connector_hdmi_init_null_product
[05:23:26] [PASSED] drm_test_connector_hdmi_init_null_vendor
[05:23:26] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[05:23:26] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[05:23:26] [PASSED] drm_test_connector_hdmi_init_product_valid
[05:23:26] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[05:23:26] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[05:23:26] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[05:23:26] ========= drm_test_connector_hdmi_init_type_valid =========
[05:23:26] [PASSED] HDMI-A
[05:23:26] [PASSED] HDMI-B
[05:23:26] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[05:23:26] ======== drm_test_connector_hdmi_init_type_invalid ========
[05:23:26] [PASSED] Unknown
[05:23:26] [PASSED] VGA
[05:23:26] [PASSED] DVI-I
[05:23:26] [PASSED] DVI-D
[05:23:26] [PASSED] DVI-A
[05:23:26] [PASSED] Composite
[05:23:26] [PASSED] SVIDEO
[05:23:26] [PASSED] LVDS
[05:23:26] [PASSED] Component
[05:23:26] [PASSED] DIN
[05:23:26] [PASSED] DP
[05:23:26] [PASSED] TV
[05:23:26] [PASSED] eDP
[05:23:26] [PASSED] Virtual
[05:23:26] [PASSED] DSI
[05:23:26] [PASSED] DPI
[05:23:26] [PASSED] Writeback
[05:23:26] [PASSED] SPI
[05:23:26] [PASSED] USB
[05:23:26] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[05:23:26] ============ [PASSED] drmm_connector_hdmi_init =============
[05:23:26] ============= drmm_connector_init (3 subtests) =============
[05:23:26] [PASSED] drm_test_drmm_connector_init
[05:23:26] [PASSED] drm_test_drmm_connector_init_null_ddc
[05:23:26] ========= drm_test_drmm_connector_init_type_valid =========
[05:23:26] [PASSED] Unknown
[05:23:26] [PASSED] VGA
[05:23:26] [PASSED] DVI-I
[05:23:26] [PASSED] DVI-D
[05:23:26] [PASSED] DVI-A
[05:23:26] [PASSED] Composite
[05:23:26] [PASSED] SVIDEO
[05:23:26] [PASSED] LVDS
[05:23:26] [PASSED] Component
[05:23:26] [PASSED] DIN
[05:23:26] [PASSED] DP
[05:23:26] [PASSED] HDMI-A
[05:23:26] [PASSED] HDMI-B
[05:23:26] [PASSED] TV
[05:23:26] [PASSED] eDP
[05:23:26] [PASSED] Virtual
[05:23:26] [PASSED] DSI
[05:23:26] [PASSED] DPI
[05:23:26] [PASSED] Writeback
[05:23:26] [PASSED] SPI
[05:23:26] [PASSED] USB
[05:23:26] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[05:23:26] =============== [PASSED] drmm_connector_init ===============
[05:23:26] ========= drm_connector_dynamic_init (6 subtests) ==========
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_init
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_init_properties
[05:23:26] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[05:23:26] [PASSED] Unknown
[05:23:26] [PASSED] VGA
[05:23:26] [PASSED] DVI-I
[05:23:26] [PASSED] DVI-D
[05:23:26] [PASSED] DVI-A
[05:23:26] [PASSED] Composite
[05:23:26] [PASSED] SVIDEO
[05:23:26] [PASSED] LVDS
[05:23:26] [PASSED] Component
[05:23:26] [PASSED] DIN
[05:23:26] [PASSED] DP
[05:23:26] [PASSED] HDMI-A
[05:23:26] [PASSED] HDMI-B
[05:23:26] [PASSED] TV
[05:23:26] [PASSED] eDP
[05:23:26] [PASSED] Virtual
[05:23:26] [PASSED] DSI
[05:23:26] [PASSED] DPI
[05:23:26] [PASSED] Writeback
[05:23:26] [PASSED] SPI
[05:23:26] [PASSED] USB
[05:23:26] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[05:23:26] ======== drm_test_drm_connector_dynamic_init_name =========
[05:23:26] [PASSED] Unknown
[05:23:26] [PASSED] VGA
[05:23:26] [PASSED] DVI-I
[05:23:26] [PASSED] DVI-D
[05:23:26] [PASSED] DVI-A
[05:23:26] [PASSED] Composite
[05:23:26] [PASSED] SVIDEO
[05:23:26] [PASSED] LVDS
[05:23:26] [PASSED] Component
[05:23:26] [PASSED] DIN
[05:23:26] [PASSED] DP
[05:23:26] [PASSED] HDMI-A
[05:23:26] [PASSED] HDMI-B
[05:23:26] [PASSED] TV
[05:23:26] [PASSED] eDP
[05:23:26] [PASSED] Virtual
[05:23:26] [PASSED] DSI
[05:23:26] [PASSED] DPI
[05:23:26] [PASSED] Writeback
[05:23:26] [PASSED] SPI
[05:23:26] [PASSED] USB
[05:23:26] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[05:23:26] =========== [PASSED] drm_connector_dynamic_init ============
[05:23:26] ==== drm_connector_dynamic_register_early (4 subtests) =====
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[05:23:26] ====== [PASSED] drm_connector_dynamic_register_early =======
[05:23:26] ======= drm_connector_dynamic_register (7 subtests) ========
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[05:23:26] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[05:23:26] ========= [PASSED] drm_connector_dynamic_register ==========
[05:23:26] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[05:23:26] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[05:23:26] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[05:23:26] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[05:23:26] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[05:23:26] ========== drm_test_get_tv_mode_from_name_valid ===========
[05:23:26] [PASSED] NTSC
[05:23:26] [PASSED] NTSC-443
[05:23:26] [PASSED] NTSC-J
[05:23:26] [PASSED] PAL
[05:23:26] [PASSED] PAL-M
[05:23:26] [PASSED] PAL-N
[05:23:26] [PASSED] SECAM
[05:23:26] [PASSED] Mono
[05:23:26] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[05:23:26] [PASSED] drm_test_get_tv_mode_from_name_truncated
[05:23:26] ============ [PASSED] drm_get_tv_mode_from_name ============
[05:23:26] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[05:23:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[05:23:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[05:23:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[05:23:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[05:23:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[05:23:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[05:23:26] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[05:23:26] [PASSED] VIC 96
[05:23:26] [PASSED] VIC 97
[05:23:26] [PASSED] VIC 101
[05:23:26] [PASSED] VIC 102
[05:23:26] [PASSED] VIC 106
[05:23:26] [PASSED] VIC 107
[05:23:26] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[05:23:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[05:23:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[05:23:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[05:23:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[05:23:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[05:23:26] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[05:23:26] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[05:23:26] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[05:23:26] [PASSED] Automatic
[05:23:26] [PASSED] Full
[05:23:26] [PASSED] Limited 16:235
[05:23:26] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[05:23:26] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[05:23:26] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[05:23:26] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[05:23:26] === drm_test_drm_hdmi_connector_get_output_format_name ====
[05:23:26] [PASSED] RGB
[05:23:26] [PASSED] YUV 4:2:0
[05:23:26] [PASSED] YUV 4:2:2
[05:23:26] [PASSED] YUV 4:4:4
[05:23:26] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[05:23:26] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[05:23:26] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[05:23:26] ============= drm_damage_helper (21 subtests) ==============
[05:23:26] [PASSED] drm_test_damage_iter_no_damage
[05:23:26] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[05:23:26] [PASSED] drm_test_damage_iter_no_damage_src_moved
[05:23:26] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[05:23:26] [PASSED] drm_test_damage_iter_no_damage_not_visible
[05:23:26] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[05:23:26] [PASSED] drm_test_damage_iter_no_damage_no_fb
[05:23:26] [PASSED] drm_test_damage_iter_simple_damage
[05:23:26] [PASSED] drm_test_damage_iter_single_damage
[05:23:26] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[05:23:26] [PASSED] drm_test_damage_iter_single_damage_outside_src
[05:23:26] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[05:23:26] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[05:23:26] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[05:23:26] [PASSED] drm_test_damage_iter_single_damage_src_moved
[05:23:26] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[05:23:26] [PASSED] drm_test_damage_iter_damage
[05:23:26] [PASSED] drm_test_damage_iter_damage_one_intersect
[05:23:26] [PASSED] drm_test_damage_iter_damage_one_outside
[05:23:26] [PASSED] drm_test_damage_iter_damage_src_moved
[05:23:26] [PASSED] drm_test_damage_iter_damage_not_visible
[05:23:26] ================ [PASSED] drm_damage_helper ================
[05:23:26] ============== drm_dp_mst_helper (3 subtests) ==============
[05:23:26] ============== drm_test_dp_mst_calc_pbn_mode ==============
[05:23:26] [PASSED] Clock 154000 BPP 30 DSC disabled
[05:23:26] [PASSED] Clock 234000 BPP 30 DSC disabled
[05:23:26] [PASSED] Clock 297000 BPP 24 DSC disabled
[05:23:26] [PASSED] Clock 332880 BPP 24 DSC enabled
[05:23:26] [PASSED] Clock 324540 BPP 24 DSC enabled
[05:23:26] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[05:23:26] ============== drm_test_dp_mst_calc_pbn_div ===============
[05:23:26] [PASSED] Link rate 2000000 lane count 4
[05:23:26] [PASSED] Link rate 2000000 lane count 2
[05:23:26] [PASSED] Link rate 2000000 lane count 1
[05:23:26] [PASSED] Link rate 1350000 lane count 4
[05:23:26] [PASSED] Link rate 1350000 lane count 2
[05:23:26] [PASSED] Link rate 1350000 lane count 1
[05:23:26] [PASSED] Link rate 1000000 lane count 4
[05:23:26] [PASSED] Link rate 1000000 lane count 2
[05:23:26] [PASSED] Link rate 1000000 lane count 1
[05:23:26] [PASSED] Link rate 810000 lane count 4
[05:23:26] [PASSED] Link rate 810000 lane count 2
[05:23:26] [PASSED] Link rate 810000 lane count 1
[05:23:26] [PASSED] Link rate 540000 lane count 4
[05:23:26] [PASSED] Link rate 540000 lane count 2
[05:23:26] [PASSED] Link rate 540000 lane count 1
[05:23:26] [PASSED] Link rate 270000 lane count 4
[05:23:26] [PASSED] Link rate 270000 lane count 2
[05:23:26] [PASSED] Link rate 270000 lane count 1
[05:23:26] [PASSED] Link rate 162000 lane count 4
[05:23:26] [PASSED] Link rate 162000 lane count 2
[05:23:26] [PASSED] Link rate 162000 lane count 1
[05:23:26] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[05:23:26] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[05:23:26] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[05:23:26] [PASSED] DP_POWER_UP_PHY with port number
[05:23:26] [PASSED] DP_POWER_DOWN_PHY with port number
[05:23:26] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[05:23:26] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[05:23:26] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[05:23:26] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[05:23:26] [PASSED] DP_QUERY_PAYLOAD with port number
[05:23:26] [PASSED] DP_QUERY_PAYLOAD with VCPI
[05:23:26] [PASSED] DP_REMOTE_DPCD_READ with port number
[05:23:26] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[05:23:26] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[05:23:26] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[05:23:26] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[05:23:26] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[05:23:26] [PASSED] DP_REMOTE_I2C_READ with port number
[05:23:26] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[05:23:26] [PASSED] DP_REMOTE_I2C_READ with transactions array
[05:23:26] [PASSED] DP_REMOTE_I2C_WRITE with port number
[05:23:26] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[05:23:26] [PASSED] DP_REMOTE_I2C_WRITE with data array
[05:23:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[05:23:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[05:23:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[05:23:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[05:23:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[05:23:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[05:23:26] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[05:23:26] ================ [PASSED] drm_dp_mst_helper ================
[05:23:26] ================== drm_exec (7 subtests) ===================
[05:23:26] [PASSED] sanitycheck
[05:23:26] [PASSED] test_lock
[05:23:26] [PASSED] test_lock_unlock
[05:23:26] [PASSED] test_duplicates
[05:23:26] [PASSED] test_prepare
[05:23:26] [PASSED] test_prepare_array
[05:23:26] [PASSED] test_multiple_loops
[05:23:26] ==================== [PASSED] drm_exec =====================
[05:23:26] =========== drm_format_helper_test (17 subtests) ===========
[05:23:26] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[05:23:26] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[05:23:26] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[05:23:26] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[05:23:26] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[05:23:26] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[05:23:26] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[05:23:26] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[05:23:26] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[05:23:26] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[05:23:26] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[05:23:26] ============== drm_test_fb_xrgb8888_to_mono ===============
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[05:23:26] ==================== drm_test_fb_swab =====================
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ================ [PASSED] drm_test_fb_swab =================
[05:23:26] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[05:23:26] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[05:23:26] [PASSED] single_pixel_source_buffer
[05:23:26] [PASSED] single_pixel_clip_rectangle
[05:23:26] [PASSED] well_known_colors
[05:23:26] [PASSED] destination_pitch
[05:23:26] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[05:23:26] ================= drm_test_fb_clip_offset =================
[05:23:26] [PASSED] pass through
[05:23:26] [PASSED] horizontal offset
[05:23:26] [PASSED] vertical offset
[05:23:26] [PASSED] horizontal and vertical offset
[05:23:26] [PASSED] horizontal offset (custom pitch)
[05:23:26] [PASSED] vertical offset (custom pitch)
[05:23:26] [PASSED] horizontal and vertical offset (custom pitch)
[05:23:26] ============= [PASSED] drm_test_fb_clip_offset =============
[05:23:26] =================== drm_test_fb_memcpy ====================
[05:23:26] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[05:23:26] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[05:23:26] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[05:23:26] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[05:23:26] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[05:23:26] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[05:23:26] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[05:23:26] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[05:23:26] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[05:23:26] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[05:23:26] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[05:23:26] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[05:23:26] =============== [PASSED] drm_test_fb_memcpy ================
[05:23:26] ============= [PASSED] drm_format_helper_test ==============
[05:23:26] ================= drm_format (18 subtests) =================
[05:23:26] [PASSED] drm_test_format_block_width_invalid
[05:23:26] [PASSED] drm_test_format_block_width_one_plane
[05:23:26] [PASSED] drm_test_format_block_width_two_plane
[05:23:26] [PASSED] drm_test_format_block_width_three_plane
[05:23:26] [PASSED] drm_test_format_block_width_tiled
[05:23:26] [PASSED] drm_test_format_block_height_invalid
[05:23:26] [PASSED] drm_test_format_block_height_one_plane
[05:23:26] [PASSED] drm_test_format_block_height_two_plane
[05:23:26] [PASSED] drm_test_format_block_height_three_plane
[05:23:26] [PASSED] drm_test_format_block_height_tiled
[05:23:26] [PASSED] drm_test_format_min_pitch_invalid
[05:23:26] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[05:23:26] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[05:23:26] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[05:23:26] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[05:23:26] [PASSED] drm_test_format_min_pitch_two_plane
[05:23:26] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[05:23:26] [PASSED] drm_test_format_min_pitch_tiled
[05:23:26] =================== [PASSED] drm_format ====================
[05:23:26] ============== drm_framebuffer (10 subtests) ===============
[05:23:26] ========== drm_test_framebuffer_check_src_coords ==========
[05:23:26] [PASSED] Success: source fits into fb
[05:23:26] [PASSED] Fail: overflowing fb with x-axis coordinate
[05:23:26] [PASSED] Fail: overflowing fb with y-axis coordinate
[05:23:26] [PASSED] Fail: overflowing fb with source width
[05:23:26] [PASSED] Fail: overflowing fb with source height
[05:23:26] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[05:23:26] [PASSED] drm_test_framebuffer_cleanup
[05:23:26] =============== drm_test_framebuffer_create ===============
[05:23:26] [PASSED] ABGR8888 normal sizes
[05:23:26] [PASSED] ABGR8888 max sizes
[05:23:26] [PASSED] ABGR8888 pitch greater than min required
[05:23:26] [PASSED] ABGR8888 pitch less than min required
[05:23:26] [PASSED] ABGR8888 Invalid width
[05:23:26] [PASSED] ABGR8888 Invalid buffer handle
[05:23:26] [PASSED] No pixel format
[05:23:26] [PASSED] ABGR8888 Width 0
[05:23:26] [PASSED] ABGR8888 Height 0
[05:23:26] [PASSED] ABGR8888 Out of bound height * pitch combination
[05:23:26] [PASSED] ABGR8888 Large buffer offset
[05:23:26] [PASSED] ABGR8888 Buffer offset for inexistent plane
[05:23:26] [PASSED] ABGR8888 Invalid flag
[05:23:26] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[05:23:26] [PASSED] ABGR8888 Valid buffer modifier
[05:23:26] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[05:23:26] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[05:23:26] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[05:23:26] [PASSED] NV12 Normal sizes
[05:23:26] [PASSED] NV12 Max sizes
[05:23:26] [PASSED] NV12 Invalid pitch
[05:23:26] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[05:23:26] [PASSED] NV12 different modifier per-plane
[05:23:26] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[05:23:26] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[05:23:26] [PASSED] NV12 Modifier for inexistent plane
[05:23:26] [PASSED] NV12 Handle for inexistent plane
[05:23:26] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[05:23:26] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[05:23:26] [PASSED] YVU420 Normal sizes
[05:23:26] [PASSED] YVU420 Max sizes
[05:23:26] [PASSED] YVU420 Invalid pitch
[05:23:26] [PASSED] YVU420 Different pitches
[05:23:26] [PASSED] YVU420 Different buffer offsets/pitches
[05:23:26] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[05:23:26] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[05:23:26] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[05:23:26] [PASSED] YVU420 Valid modifier
[05:23:26] [PASSED] YVU420 Different modifiers per plane
[05:23:26] [PASSED] YVU420 Modifier for inexistent plane
[05:23:26] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[05:23:26] [PASSED] X0L2 Normal sizes
[05:23:26] [PASSED] X0L2 Max sizes
[05:23:26] [PASSED] X0L2 Invalid pitch
[05:23:26] [PASSED] X0L2 Pitch greater than minimum required
[05:23:26] [PASSED] X0L2 Handle for inexistent plane
[05:23:26] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[05:23:26] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[05:23:26] [PASSED] X0L2 Valid modifier
[05:23:26] [PASSED] X0L2 Modifier for inexistent plane
[05:23:26] =========== [PASSED] drm_test_framebuffer_create ===========
[05:23:26] [PASSED] drm_test_framebuffer_free
[05:23:26] [PASSED] drm_test_framebuffer_init
[05:23:26] [PASSED] drm_test_framebuffer_init_bad_format
[05:23:26] [PASSED] drm_test_framebuffer_init_dev_mismatch
[05:23:26] [PASSED] drm_test_framebuffer_lookup
[05:23:26] [PASSED] drm_test_framebuffer_lookup_inexistent
[05:23:26] [PASSED] drm_test_framebuffer_modifiers_not_supported
[05:23:26] ================= [PASSED] drm_framebuffer =================
[05:23:26] ================ drm_gem_shmem (8 subtests) ================
[05:23:26] [PASSED] drm_gem_shmem_test_obj_create
[05:23:26] [PASSED] drm_gem_shmem_test_obj_create_private
[05:23:26] [PASSED] drm_gem_shmem_test_pin_pages
[05:23:26] [PASSED] drm_gem_shmem_test_vmap
[05:23:26] [PASSED] drm_gem_shmem_test_get_sg_table
[05:23:26] [PASSED] drm_gem_shmem_test_get_pages_sgt
[05:23:26] [PASSED] drm_gem_shmem_test_madvise
[05:23:26] [PASSED] drm_gem_shmem_test_purge
[05:23:26] ================== [PASSED] drm_gem_shmem ==================
[05:23:26] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[05:23:26] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[05:23:26] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[05:23:26] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[05:23:26] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[05:23:26] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[05:23:26] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[05:23:26] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[05:23:26] [PASSED] Automatic
[05:23:26] [PASSED] Full
[05:23:26] [PASSED] Limited 16:235
[05:23:26] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[05:23:26] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[05:23:26] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[05:23:26] [PASSED] drm_test_check_disable_connector
[05:23:26] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[05:23:26] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[05:23:26] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[05:23:26] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[05:23:26] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[05:23:26] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[05:23:26] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[05:23:26] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[05:23:26] [PASSED] drm_test_check_output_bpc_dvi
[05:23:26] [PASSED] drm_test_check_output_bpc_format_vic_1
[05:23:26] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[05:23:26] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[05:23:26] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[05:23:26] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[05:23:26] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[05:23:26] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[05:23:26] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[05:23:26] ============ drm_test_check_hdmi_color_format =============
[05:23:26] [PASSED] AUTO -> RGB
[05:23:26] [PASSED] YCBCR422 -> YUV422
[05:23:26] [PASSED] YCBCR420 -> YUV420
[05:23:26] [PASSED] YCBCR444 -> YUV444
[05:23:26] [PASSED] RGB -> RGB
[05:23:26] ======== [PASSED] drm_test_check_hdmi_color_format =========
[05:23:26] ======== drm_test_check_hdmi_color_format_420_only ========
[05:23:26] [PASSED] RGB should fail
[05:23:26] [PASSED] YUV444 should fail
[05:23:26] [PASSED] YUV422 should fail
[05:23:26] [PASSED] YUV420 should work
[05:23:26] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[05:23:26] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[05:23:26] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[05:23:26] [PASSED] drm_test_check_broadcast_rgb_value
[05:23:26] [PASSED] drm_test_check_bpc_8_value
[05:23:26] [PASSED] drm_test_check_bpc_10_value
[05:23:26] [PASSED] drm_test_check_bpc_12_value
[05:23:26] [PASSED] drm_test_check_format_value
[05:23:26] [PASSED] drm_test_check_tmds_char_value
[05:23:26] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[05:23:26] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[05:23:26] [PASSED] drm_test_check_mode_valid
[05:23:26] [PASSED] drm_test_check_mode_valid_reject
[05:23:26] [PASSED] drm_test_check_mode_valid_reject_rate
[05:23:26] [PASSED] drm_test_check_mode_valid_reject_max_clock
[05:23:26] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[05:23:26] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[05:23:26] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[05:23:26] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[05:23:26] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[05:23:26] [PASSED] drm_test_check_infoframes
[05:23:26] [PASSED] drm_test_check_reject_avi_infoframe
[05:23:26] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[05:23:26] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[05:23:26] [PASSED] drm_test_check_reject_audio_infoframe
[05:23:26] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[05:23:26] ================= drm_managed (2 subtests) =================
[05:23:26] [PASSED] drm_test_managed_release_action
[05:23:26] [PASSED] drm_test_managed_run_action
[05:23:26] =================== [PASSED] drm_managed ===================
[05:23:26] =================== drm_mm (6 subtests) ====================
[05:23:26] [PASSED] drm_test_mm_init
[05:23:26] [PASSED] drm_test_mm_debug
[05:23:26] [PASSED] drm_test_mm_align32
[05:23:26] [PASSED] drm_test_mm_align64
[05:23:26] [PASSED] drm_test_mm_lowest
[05:23:26] [PASSED] drm_test_mm_highest
[05:23:26] ===================== [PASSED] drm_mm ======================
[05:23:26] ============= drm_modes_analog_tv (5 subtests) =============
[05:23:26] [PASSED] drm_test_modes_analog_tv_mono_576i
[05:23:26] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[05:23:26] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[05:23:26] [PASSED] drm_test_modes_analog_tv_pal_576i
[05:23:26] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[05:23:26] =============== [PASSED] drm_modes_analog_tv ===============
[05:23:26] ============== drm_plane_helper (2 subtests) ===============
[05:23:26] =============== drm_test_check_plane_state ================
[05:23:26] [PASSED] clipping_simple
[05:23:26] [PASSED] clipping_rotate_reflect
[05:23:26] [PASSED] positioning_simple
[05:23:26] [PASSED] upscaling
[05:23:26] [PASSED] downscaling
[05:23:26] [PASSED] rounding1
[05:23:26] [PASSED] rounding2
[05:23:26] [PASSED] rounding3
[05:23:26] [PASSED] rounding4
[05:23:26] =========== [PASSED] drm_test_check_plane_state ============
[05:23:26] =========== drm_test_check_invalid_plane_state ============
[05:23:26] [PASSED] positioning_invalid
[05:23:26] [PASSED] upscaling_invalid
[05:23:26] [PASSED] downscaling_invalid
[05:23:26] ======= [PASSED] drm_test_check_invalid_plane_state ========
[05:23:26] ================ [PASSED] drm_plane_helper =================
[05:23:26] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[05:23:26] ====== drm_test_connector_helper_tv_get_modes_check =======
[05:23:26] [PASSED] None
[05:23:26] [PASSED] PAL
[05:23:26] [PASSED] NTSC
[05:23:26] [PASSED] Both, NTSC Default
[05:23:26] [PASSED] Both, PAL Default
[05:23:26] [PASSED] Both, NTSC Default, with PAL on command-line
[05:23:26] [PASSED] Both, PAL Default, with NTSC on command-line
[05:23:26] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[05:23:26] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[05:23:26] ================== drm_rect (9 subtests) ===================
[05:23:26] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[05:23:26] [PASSED] drm_test_rect_clip_scaled_not_clipped
[05:23:26] [PASSED] drm_test_rect_clip_scaled_clipped
[05:23:26] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[05:23:26] ================= drm_test_rect_intersect =================
[05:23:26] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[05:23:26] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[05:23:26] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[05:23:26] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[05:23:26] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[05:23:26] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[05:23:26] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[05:23:26] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[05:23:26] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[05:23:26] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[05:23:26] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[05:23:26] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[05:23:26] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[05:23:26] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[05:23:26] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[05:23:26] ============= [PASSED] drm_test_rect_intersect =============
[05:23:26] ================ drm_test_rect_calc_hscale ================
[05:23:26] [PASSED] normal use
[05:23:26] [PASSED] out of max range
[05:23:26] [PASSED] out of min range
[05:23:26] [PASSED] zero dst
[05:23:26] [PASSED] negative src
[05:23:26] [PASSED] negative dst
[05:23:26] ============ [PASSED] drm_test_rect_calc_hscale ============
[05:23:26] ================ drm_test_rect_calc_vscale ================
[05:23:26] [PASSED] normal use
[05:23:26] [PASSED] out of max range
[05:23:26] [PASSED] out of min range
[05:23:26] [PASSED] zero dst
[05:23:26] [PASSED] negative src
[05:23:26] [PASSED] negative dst
[05:23:26] ============ [PASSED] drm_test_rect_calc_vscale ============
[05:23:26] ================== drm_test_rect_rotate ===================
[05:23:26] [PASSED] reflect-x
[05:23:26] [PASSED] reflect-y
[05:23:26] [PASSED] rotate-0
[05:23:26] [PASSED] rotate-90
[05:23:26] [PASSED] rotate-180
[05:23:26] [PASSED] rotate-270
[05:23:26] ============== [PASSED] drm_test_rect_rotate ===============
[05:23:26] ================ drm_test_rect_rotate_inv =================
[05:23:26] [PASSED] reflect-x
[05:23:26] [PASSED] reflect-y
[05:23:26] [PASSED] rotate-0
[05:23:26] [PASSED] rotate-90
[05:23:26] [PASSED] rotate-180
[05:23:26] [PASSED] rotate-270
[05:23:26] ============ [PASSED] drm_test_rect_rotate_inv =============
[05:23:26] ==================== [PASSED] drm_rect =====================
[05:23:26] ============ drm_sysfb_modeset_test (1 subtest) ============
[05:23:26] ============ drm_test_sysfb_build_fourcc_list =============
[05:23:26] [PASSED] no native formats
[05:23:26] [PASSED] XRGB8888 as native format
[05:23:26] [PASSED] remove duplicates
[05:23:26] [PASSED] convert alpha formats
[05:23:26] [PASSED] random formats
[05:23:26] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[05:23:26] ============= [PASSED] drm_sysfb_modeset_test ==============
[05:23:26] ================== drm_fixp (2 subtests) ===================
[05:23:26] [PASSED] drm_test_int2fixp
[05:23:26] [PASSED] drm_test_sm2fixp
[05:23:26] ==================== [PASSED] drm_fixp =====================
[05:23:26] ============================================================
[05:23:26] Testing complete. Ran 637 tests: passed: 637
[05:23:26] Elapsed time: 27.165s total, 1.821s configuring, 25.176s building, 0.144s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[05:23:27] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:23:28] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:23:38] Starting KUnit Kernel (1/1)...
[05:23:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:23:38] ================= ttm_device (5 subtests) ==================
[05:23:38] [PASSED] ttm_device_init_basic
[05:23:38] [PASSED] ttm_device_init_multiple
[05:23:38] [PASSED] ttm_device_fini_basic
[05:23:38] [PASSED] ttm_device_init_no_vma_man
[05:23:38] ================== ttm_device_init_pools ==================
[05:23:38] [PASSED] No DMA allocations, no DMA32 required
[05:23:38] [PASSED] DMA allocations, DMA32 required
[05:23:38] [PASSED] No DMA allocations, DMA32 required
[05:23:38] [PASSED] DMA allocations, no DMA32 required
[05:23:38] ============== [PASSED] ttm_device_init_pools ==============
[05:23:38] =================== [PASSED] ttm_device ====================
[05:23:38] ================== ttm_pool (8 subtests) ===================
[05:23:38] ================== ttm_pool_alloc_basic ===================
[05:23:38] [PASSED] One page
[05:23:38] [PASSED] More than one page
[05:23:38] [PASSED] Above the allocation limit
[05:23:38] [PASSED] One page, with coherent DMA mappings enabled
[05:23:38] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:23:38] ============== [PASSED] ttm_pool_alloc_basic ===============
[05:23:38] ============== ttm_pool_alloc_basic_dma_addr ==============
[05:23:38] [PASSED] One page
[05:23:38] [PASSED] More than one page
[05:23:38] [PASSED] Above the allocation limit
[05:23:38] [PASSED] One page, with coherent DMA mappings enabled
[05:23:38] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:23:38] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[05:23:38] [PASSED] ttm_pool_alloc_order_caching_match
[05:23:38] [PASSED] ttm_pool_alloc_caching_mismatch
[05:23:38] [PASSED] ttm_pool_alloc_order_mismatch
[05:23:38] [PASSED] ttm_pool_free_dma_alloc
[05:23:38] [PASSED] ttm_pool_free_no_dma_alloc
[05:23:38] [PASSED] ttm_pool_fini_basic
[05:23:38] ==================== [PASSED] ttm_pool =====================
[05:23:38] ================ ttm_resource (8 subtests) =================
[05:23:38] ================= ttm_resource_init_basic =================
[05:23:38] [PASSED] Init resource in TTM_PL_SYSTEM
[05:23:38] [PASSED] Init resource in TTM_PL_VRAM
[05:23:38] [PASSED] Init resource in a private placement
[05:23:38] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[05:23:38] ============= [PASSED] ttm_resource_init_basic =============
[05:23:38] [PASSED] ttm_resource_init_pinned
[05:23:38] [PASSED] ttm_resource_fini_basic
[05:23:38] [PASSED] ttm_resource_manager_init_basic
[05:23:38] [PASSED] ttm_resource_manager_usage_basic
[05:23:38] [PASSED] ttm_resource_manager_set_used_basic
[05:23:38] [PASSED] ttm_sys_man_alloc_basic
[05:23:38] [PASSED] ttm_sys_man_free_basic
[05:23:38] ================== [PASSED] ttm_resource ===================
[05:23:38] =================== ttm_tt (15 subtests) ===================
[05:23:38] ==================== ttm_tt_init_basic ====================
[05:23:38] [PASSED] Page-aligned size
[05:23:38] [PASSED] Extra pages requested
[05:23:38] ================ [PASSED] ttm_tt_init_basic ================
[05:23:38] [PASSED] ttm_tt_init_misaligned
[05:23:38] [PASSED] ttm_tt_fini_basic
[05:23:38] [PASSED] ttm_tt_fini_sg
[05:23:38] [PASSED] ttm_tt_fini_shmem
[05:23:38] [PASSED] ttm_tt_create_basic
[05:23:38] [PASSED] ttm_tt_create_invalid_bo_type
[05:23:38] [PASSED] ttm_tt_create_ttm_exists
[05:23:38] [PASSED] ttm_tt_create_failed
[05:23:38] [PASSED] ttm_tt_destroy_basic
[05:23:38] [PASSED] ttm_tt_populate_null_ttm
[05:23:38] [PASSED] ttm_tt_populate_populated_ttm
[05:23:38] [PASSED] ttm_tt_unpopulate_basic
[05:23:38] [PASSED] ttm_tt_unpopulate_empty_ttm
[05:23:38] [PASSED] ttm_tt_swapin_basic
[05:23:38] ===================== [PASSED] ttm_tt ======================
[05:23:38] =================== ttm_bo (14 subtests) ===================
[05:23:38] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[05:23:38] [PASSED] Cannot be interrupted and sleeps
[05:23:38] [PASSED] Cannot be interrupted, locks straight away
[05:23:38] [PASSED] Can be interrupted, sleeps
[05:23:38] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[05:23:38] [PASSED] ttm_bo_reserve_locked_no_sleep
[05:23:38] [PASSED] ttm_bo_reserve_no_wait_ticket
[05:23:38] [PASSED] ttm_bo_reserve_double_resv
[05:23:38] [PASSED] ttm_bo_reserve_interrupted
[05:23:38] [PASSED] ttm_bo_reserve_deadlock
[05:23:38] [PASSED] ttm_bo_unreserve_basic
[05:23:38] [PASSED] ttm_bo_unreserve_pinned
[05:23:38] [PASSED] ttm_bo_unreserve_bulk
[05:23:38] [PASSED] ttm_bo_fini_basic
[05:23:38] [PASSED] ttm_bo_fini_shared_resv
[05:23:38] [PASSED] ttm_bo_pin_basic
[05:23:38] [PASSED] ttm_bo_pin_unpin_resource
[05:23:38] [PASSED] ttm_bo_multiple_pin_one_unpin
[05:23:38] ===================== [PASSED] ttm_bo ======================
[05:23:38] ============== ttm_bo_validate (22 subtests) ===============
[05:23:38] ============== ttm_bo_init_reserved_sys_man ===============
[05:23:38] [PASSED] Buffer object for userspace
[05:23:38] [PASSED] Kernel buffer object
[05:23:38] [PASSED] Shared buffer object
[05:23:38] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[05:23:38] ============== ttm_bo_init_reserved_mock_man ==============
[05:23:38] [PASSED] Buffer object for userspace
[05:23:38] [PASSED] Kernel buffer object
[05:23:38] [PASSED] Shared buffer object
[05:23:38] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[05:23:38] [PASSED] ttm_bo_init_reserved_resv
[05:23:38] ================== ttm_bo_validate_basic ==================
[05:23:38] [PASSED] Buffer object for userspace
[05:23:38] [PASSED] Kernel buffer object
[05:23:38] [PASSED] Shared buffer object
[05:23:38] ============== [PASSED] ttm_bo_validate_basic ==============
[05:23:38] [PASSED] ttm_bo_validate_invalid_placement
[05:23:38] ============= ttm_bo_validate_same_placement ==============
[05:23:38] [PASSED] System manager
[05:23:38] [PASSED] VRAM manager
[05:23:38] ========= [PASSED] ttm_bo_validate_same_placement ==========
[05:23:38] [PASSED] ttm_bo_validate_failed_alloc
[05:23:38] [PASSED] ttm_bo_validate_pinned
[05:23:38] [PASSED] ttm_bo_validate_busy_placement
[05:23:38] ================ ttm_bo_validate_multihop =================
[05:23:38] [PASSED] Buffer object for userspace
[05:23:38] [PASSED] Kernel buffer object
[05:23:38] [PASSED] Shared buffer object
[05:23:38] ============ [PASSED] ttm_bo_validate_multihop =============
[05:23:38] ========== ttm_bo_validate_no_placement_signaled ==========
[05:23:38] [PASSED] Buffer object in system domain, no page vector
[05:23:38] [PASSED] Buffer object in system domain with an existing page vector
[05:23:38] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[05:23:38] ======== ttm_bo_validate_no_placement_not_signaled ========
[05:23:38] [PASSED] Buffer object for userspace
[05:23:38] [PASSED] Kernel buffer object
[05:23:38] [PASSED] Shared buffer object
[05:23:38] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[05:23:38] [PASSED] ttm_bo_validate_move_fence_signaled
[05:23:38] ========= ttm_bo_validate_move_fence_not_signaled =========
[05:23:38] [PASSED] Waits for GPU
[05:23:38] [PASSED] Tries to lock straight away
[05:23:38] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[05:23:38] [PASSED] ttm_bo_validate_swapout
[05:23:38] [PASSED] ttm_bo_validate_happy_evict
[05:23:38] [PASSED] ttm_bo_validate_all_pinned_evict
[05:23:38] [PASSED] ttm_bo_validate_allowed_only_evict
[05:23:38] [PASSED] ttm_bo_validate_deleted_evict
[05:23:38] [PASSED] ttm_bo_validate_busy_domain_evict
[05:23:38] [PASSED] ttm_bo_validate_evict_gutting
[05:23:38] [PASSED] ttm_bo_validate_recrusive_evict
[05:23:38] ================= [PASSED] ttm_bo_validate =================
[05:23:38] ============================================================
[05:23:38] Testing complete. Ran 102 tests: passed: 102
[05:23:38] Elapsed time: 11.794s total, 1.810s configuring, 9.769s building, 0.183s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v1] drm/xe/ras: Fix invalid health error code
2026-08-04 5:12 [PATCH v1] drm/xe/ras: Fix invalid health error code Raag Jadav
2026-08-04 5:23 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-08-04 6:36 ` Tauro, Riana
2026-08-04 6:56 ` Michal Wajdeczko
2026-08-04 6:41 ` ✓ Xe.CI.FULL: success for " Patchwork
` (5 subsequent siblings)
7 siblings, 1 reply; 13+ messages in thread
From: Tauro, Riana @ 2026-08-04 6:36 UTC (permalink / raw)
To: Raag Jadav, intel-xe; +Cc: michal.wajdeczko, matthew.d.roper, soham.purkait
On 04-08-2026 10:42, Raag Jadav wrote:
> We use -EBADMSG for corrupted responses from sysctrl. Fix the error code.
Let's keep it -EIO as it's more appropriate for sysctrl errors and
consistent than
#define EBADMSG 74 /* Not a data message */
Thanks
Riana
>
> Fixes: 53a7115f9862 ("drm/xe/xe_ras: Add RAS GPU health indicator")
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> ---
> drivers/gpu/drm/xe/xe_ras.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index f7af4da8172c..bdad0621ae12 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -700,7 +700,7 @@ static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr
> if (response.health >= XE_RAS_HEALTH_MAX) {
> xe_err(xe, "sysctrl: invalid health state %u\n",
> response.health);
> - return -EIO;
> + return -EBADMSG;
> }
>
> health = gpu_health_states[response.health];
> @@ -753,7 +753,7 @@ static ssize_t gpu_health_store(struct device *dev, struct device_attribute *att
> if (response.health >= XE_RAS_HEALTH_MAX) {
> xe_err(xe, "sysctrl: invalid health state %u\n",
> response.health);
> - return -EIO;
> + return -EBADMSG;
> }
>
> health = gpu_health_states[response.health];
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Xe.CI.FULL: success for drm/xe/ras: Fix invalid health error code
2026-08-04 5:12 [PATCH v1] drm/xe/ras: Fix invalid health error code Raag Jadav
2026-08-04 5:23 ` ✓ CI.KUnit: success for " Patchwork
2026-08-04 6:36 ` [PATCH v1] " Tauro, Riana
@ 2026-08-04 6:41 ` Patchwork
2026-08-04 13:37 ` ✓ CI.KUnit: " Patchwork
` (4 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-08-04 6:41 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 864 bytes --]
== Series Details ==
Series: drm/xe/ras: Fix invalid health error code
URL : https://patchwork.freedesktop.org/series/171545/
State : success
== Summary ==
CI Bug Log - changes from xe-5525-c2d24e2eda55d74743f0d99a98805bf0b596beef_FULL -> xe-pw-171545v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (0 -> 0)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5525-c2d24e2eda55d74743f0d99a98805bf0b596beef -> xe-pw-171545v1
IGT_9036: 9036
xe-5525-c2d24e2eda55d74743f0d99a98805bf0b596beef: c2d24e2eda55d74743f0d99a98805bf0b596beef
xe-pw-171545v1: 171545v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v1/index.html
[-- Attachment #2: Type: text/html, Size: 1412 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v1] drm/xe/ras: Fix invalid health error code
2026-08-04 6:36 ` [PATCH v1] " Tauro, Riana
@ 2026-08-04 6:56 ` Michal Wajdeczko
2026-08-04 8:07 ` Raag Jadav
0 siblings, 1 reply; 13+ messages in thread
From: Michal Wajdeczko @ 2026-08-04 6:56 UTC (permalink / raw)
To: Tauro, Riana, Raag Jadav, intel-xe; +Cc: matthew.d.roper, soham.purkait
On 8/4/2026 8:36 AM, Tauro, Riana wrote:
>
> On 04-08-2026 10:42, Raag Jadav wrote:
>> We use -EBADMSG for corrupted responses from sysctrl. Fix the error code.
>
> Let's keep it -EIO as it's more appropriate for sysctrl errors and consistent than
>
> #define EBADMSG 74 /* Not a data message */
btw, inside GuC CTB code we use
-EPIPE // for corrupted message/channel
-EPROTO // for unexpected content in the message
as -EIO is too generic
>
> Thanks
> Riana
>
>>
>> Fixes: 53a7115f9862 ("drm/xe/xe_ras: Add RAS GPU health indicator")
>> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_ras.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>> index f7af4da8172c..bdad0621ae12 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.c
>> +++ b/drivers/gpu/drm/xe/xe_ras.c
>> @@ -700,7 +700,7 @@ static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr
>> if (response.health >= XE_RAS_HEALTH_MAX) {
>> xe_err(xe, "sysctrl: invalid health state %u\n",
>> response.health);
>> - return -EIO;
>> + return -EBADMSG;
>> }
>> health = gpu_health_states[response.health];
>> @@ -753,7 +753,7 @@ static ssize_t gpu_health_store(struct device *dev, struct device_attribute *att
>> if (response.health >= XE_RAS_HEALTH_MAX) {
>> xe_err(xe, "sysctrl: invalid health state %u\n",
>> response.health);
>> - return -EIO;
>> + return -EBADMSG;
>> }
>> health = gpu_health_states[response.health];
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v1] drm/xe/ras: Fix invalid health error code
2026-08-04 6:56 ` Michal Wajdeczko
@ 2026-08-04 8:07 ` Raag Jadav
2026-08-04 8:31 ` Tauro, Riana
0 siblings, 1 reply; 13+ messages in thread
From: Raag Jadav @ 2026-08-04 8:07 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: Tauro, Riana, intel-xe, matthew.d.roper, soham.purkait
On Tue, Aug 04, 2026 at 08:56:12AM +0200, Michal Wajdeczko wrote:
> On 8/4/2026 8:36 AM, Tauro, Riana wrote:
> >
> > On 04-08-2026 10:42, Raag Jadav wrote:
> >> We use -EBADMSG for corrupted responses from sysctrl. Fix the error code.
> >
> > Let's keep it -EIO as it's more appropriate for sysctrl errors and consistent than
> >
> > #define EBADMSG 74 /* Not a data message */
The response size is valid, it's just the contents are corrupted. Similar
to what we did with commit 948eee331bef ("drm/xe/ras: Validate sysctrl
response") and more consistent here.
> btw, inside GuC CTB code we use
>
> -EPIPE // for corrupted message/channel
> -EPROTO // for unexpected content in the message
We have a bunch of these as a response status, check ras_status_to_errno().
The one proposed here is for the values deemed acceptable as per spec.
> as -EIO is too generic
Agree.
Raag
> >> Fixes: 53a7115f9862 ("drm/xe/xe_ras: Add RAS GPU health indicator")
> >> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> >> ---
> >> drivers/gpu/drm/xe/xe_ras.c | 4 ++--
> >> 1 file changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> >> index f7af4da8172c..bdad0621ae12 100644
> >> --- a/drivers/gpu/drm/xe/xe_ras.c
> >> +++ b/drivers/gpu/drm/xe/xe_ras.c
> >> @@ -700,7 +700,7 @@ static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr
> >> if (response.health >= XE_RAS_HEALTH_MAX) {
> >> xe_err(xe, "sysctrl: invalid health state %u\n",
> >> response.health);
> >> - return -EIO;
> >> + return -EBADMSG;
> >> }
> >> health = gpu_health_states[response.health];
> >> @@ -753,7 +753,7 @@ static ssize_t gpu_health_store(struct device *dev, struct device_attribute *att
> >> if (response.health >= XE_RAS_HEALTH_MAX) {
> >> xe_err(xe, "sysctrl: invalid health state %u\n",
> >> response.health);
> >> - return -EIO;
> >> + return -EBADMSG;
> >> }
> >> health = gpu_health_states[response.health];
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v1] drm/xe/ras: Fix invalid health error code
2026-08-04 8:07 ` Raag Jadav
@ 2026-08-04 8:31 ` Tauro, Riana
2026-08-04 10:16 ` Raag Jadav
0 siblings, 1 reply; 13+ messages in thread
From: Tauro, Riana @ 2026-08-04 8:31 UTC (permalink / raw)
To: Raag Jadav, Michal Wajdeczko; +Cc: intel-xe, matthew.d.roper, soham.purkait
On 04-08-2026 13:37, Raag Jadav wrote:
> On Tue, Aug 04, 2026 at 08:56:12AM +0200, Michal Wajdeczko wrote:
>> On 8/4/2026 8:36 AM, Tauro, Riana wrote:
>>> On 04-08-2026 10:42, Raag Jadav wrote:
>>>> We use -EBADMSG for corrupted responses from sysctrl. Fix the error code.
>>> Let's keep it -EIO as it's more appropriate for sysctrl errors and consistent than
>>>
>>> #define EBADMSG 74 /* Not a data message */
> The response size is valid, it's just the contents are corrupted. Similar
> to what we did with commit 948eee331bef ("drm/xe/ras: Validate sysctrl
> response") and more consistent here.
>
>> btw, inside GuC CTB code we use
>>
>> -EPIPE // for corrupted message/channel
>> -EPROTO // for unexpected content in the message
> We have a bunch of these as a response status, check ras_status_to_errno().
> The one proposed here is for the values deemed acceptable as per spec.
>
>> as -EIO is too generic
> Agree.
Using -EIO consistently for system controller errors allows easier
debugging for
sysctrl commands. When any sysctrl ops fail we know it's not RAS layer.
The only other error code we see is directly from firmware status.
This is my thought. I will leave it upto you
>
> Raag
>
>>>> Fixes: 53a7115f9862 ("drm/xe/xe_ras: Add RAS GPU health indicator")
>>>> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
>>>> ---
>>>> drivers/gpu/drm/xe/xe_ras.c | 4 ++--
>>>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>>>> index f7af4da8172c..bdad0621ae12 100644
>>>> --- a/drivers/gpu/drm/xe/xe_ras.c
>>>> +++ b/drivers/gpu/drm/xe/xe_ras.c
>>>> @@ -700,7 +700,7 @@ static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr
>>>> if (response.health >= XE_RAS_HEALTH_MAX) {
>>>> xe_err(xe, "sysctrl: invalid health state %u\n",
>>>> response.health);
>>>> - return -EIO;
>>>> + return -EBADMSG;
>>>> }
>>>> health = gpu_health_states[response.health];
>>>> @@ -753,7 +753,7 @@ static ssize_t gpu_health_store(struct device *dev, struct device_attribute *att
>>>> if (response.health >= XE_RAS_HEALTH_MAX) {
>>>> xe_err(xe, "sysctrl: invalid health state %u\n",
>>>> response.health);
>>>> - return -EIO;
>>>> + return -EBADMSG;
>>>> }
>>>> health = gpu_health_states[response.health];
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v1] drm/xe/ras: Fix invalid health error code
2026-08-04 8:31 ` Tauro, Riana
@ 2026-08-04 10:16 ` Raag Jadav
0 siblings, 0 replies; 13+ messages in thread
From: Raag Jadav @ 2026-08-04 10:16 UTC (permalink / raw)
To: Tauro, Riana; +Cc: Michal Wajdeczko, intel-xe, matthew.d.roper, soham.purkait
On Tue, Aug 04, 2026 at 02:01:16PM +0530, Tauro, Riana wrote:
> On 04-08-2026 13:37, Raag Jadav wrote:
> > On Tue, Aug 04, 2026 at 08:56:12AM +0200, Michal Wajdeczko wrote:
> > > On 8/4/2026 8:36 AM, Tauro, Riana wrote:
> > > > On 04-08-2026 10:42, Raag Jadav wrote:
> > > > > We use -EBADMSG for corrupted responses from sysctrl. Fix the error code.
> > > > Let's keep it -EIO as it's more appropriate for sysctrl errors and consistent than
> > > >
> > > > #define EBADMSG 74 /* Not a data message */
> > The response size is valid, it's just the contents are corrupted. Similar
> > to what we did with commit 948eee331bef ("drm/xe/ras: Validate sysctrl
> > response") and more consistent here.
> >
> > > btw, inside GuC CTB code we use
> > >
> > > -EPIPE // for corrupted message/channel
> > > -EPROTO // for unexpected content in the message
> > We have a bunch of these as a response status, check ras_status_to_errno().
> > The one proposed here is for the values deemed acceptable as per spec.
> >
> > > as -EIO is too generic
> > Agree.
>
> Using -EIO consistently for system controller errors allows easier debugging
> for
> sysctrl commands. When any sysctrl ops fail we know it's not RAS layer.
We still log it as a sysctrl error, so nothing changed from debugging POV
here. Besides, error codes are what make the failure cases distinguishable
to the consumer, otherwise we wouldn't have so many of them :)
> The only other error code we see is directly from firmware status.
I'm all for trusting what the firmware tells me, but this has caused more
problems than solved historically :)
> This is my thought. I will leave it upto you
Sure.
Raag
> > > > > Fixes: 53a7115f9862 ("drm/xe/xe_ras: Add RAS GPU health indicator")
> > > > > Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> > > > > ---
> > > > > drivers/gpu/drm/xe/xe_ras.c | 4 ++--
> > > > > 1 file changed, 2 insertions(+), 2 deletions(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> > > > > index f7af4da8172c..bdad0621ae12 100644
> > > > > --- a/drivers/gpu/drm/xe/xe_ras.c
> > > > > +++ b/drivers/gpu/drm/xe/xe_ras.c
> > > > > @@ -700,7 +700,7 @@ static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr
> > > > > if (response.health >= XE_RAS_HEALTH_MAX) {
> > > > > xe_err(xe, "sysctrl: invalid health state %u\n",
> > > > > response.health);
> > > > > - return -EIO;
> > > > > + return -EBADMSG;
> > > > > }
> > > > > health = gpu_health_states[response.health];
> > > > > @@ -753,7 +753,7 @@ static ssize_t gpu_health_store(struct device *dev, struct device_attribute *att
> > > > > if (response.health >= XE_RAS_HEALTH_MAX) {
> > > > > xe_err(xe, "sysctrl: invalid health state %u\n",
> > > > > response.health);
> > > > > - return -EIO;
> > > > > + return -EBADMSG;
> > > > > }
> > > > > health = gpu_health_states[response.health];
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ CI.KUnit: success for drm/xe/ras: Fix invalid health error code
2026-08-04 5:12 [PATCH v1] drm/xe/ras: Fix invalid health error code Raag Jadav
` (2 preceding siblings ...)
2026-08-04 6:41 ` ✓ Xe.CI.FULL: success for " Patchwork
@ 2026-08-04 13:37 ` Patchwork
2026-08-05 5:58 ` ✗ Xe.CI.BAT: failure " Patchwork
` (3 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-08-04 13:37 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
== Series Details ==
Series: drm/xe/ras: Fix invalid health error code
URL : https://patchwork.freedesktop.org/series/171545/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:36:33] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:36:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:37:09] Starting KUnit Kernel (1/1)...
[13:37:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:37:09] ================== guc_buf (11 subtests) ===================
[13:37:09] [PASSED] test_smallest
[13:37:09] [PASSED] test_largest
[13:37:09] [PASSED] test_granular
[13:37:09] [PASSED] test_unique
[13:37:09] [PASSED] test_overlap
[13:37:09] [PASSED] test_reusable
[13:37:09] [PASSED] test_too_big
[13:37:09] [PASSED] test_flush
[13:37:09] [PASSED] test_lookup
[13:37:09] [PASSED] test_data
[13:37:09] [PASSED] test_class
[13:37:09] ===================== [PASSED] guc_buf =====================
[13:37:09] =================== guc_dbm (7 subtests) ===================
[13:37:09] [PASSED] test_empty
[13:37:09] [PASSED] test_default
[13:37:09] ======================== test_size ========================
[13:37:09] [PASSED] 4
[13:37:09] [PASSED] 8
[13:37:09] [PASSED] 32
[13:37:09] [PASSED] 256
[13:37:09] ==================== [PASSED] test_size ====================
[13:37:09] ======================= test_reuse ========================
[13:37:09] [PASSED] 4
[13:37:09] [PASSED] 8
[13:37:09] [PASSED] 32
[13:37:09] [PASSED] 256
[13:37:09] =================== [PASSED] test_reuse ====================
[13:37:09] =================== test_range_overlap ====================
[13:37:09] [PASSED] 4
[13:37:09] [PASSED] 8
[13:37:09] [PASSED] 32
[13:37:09] [PASSED] 256
[13:37:09] =============== [PASSED] test_range_overlap ================
[13:37:09] =================== test_range_compact ====================
[13:37:09] [PASSED] 4
[13:37:09] [PASSED] 8
[13:37:09] [PASSED] 32
[13:37:09] [PASSED] 256
[13:37:09] =============== [PASSED] test_range_compact ================
[13:37:09] ==================== test_range_spare =====================
[13:37:09] [PASSED] 4
[13:37:09] [PASSED] 8
[13:37:09] [PASSED] 32
[13:37:09] [PASSED] 256
[13:37:09] ================ [PASSED] test_range_spare =================
[13:37:09] ===================== [PASSED] guc_dbm =====================
[13:37:09] =================== guc_idm (6 subtests) ===================
[13:37:09] [PASSED] bad_init
[13:37:09] [PASSED] no_init
[13:37:09] [PASSED] init_fini
[13:37:09] [PASSED] check_used
[13:37:09] [PASSED] check_quota
[13:37:09] [PASSED] check_all
[13:37:09] ===================== [PASSED] guc_idm =====================
[13:37:09] =============== guc_klv_helpers (9 subtests) ===============
[13:37:09] [PASSED] test_count
[13:37:09] [PASSED] test_encode_u32
[13:37:09] [PASSED] test_encode_u64
[13:37:09] [PASSED] test_encode_string
[13:37:09] [PASSED] test_encode_object_raw
[13:37:09] [PASSED] test_encode_object_klv
[13:37:09] [PASSED] test_encode_object_nested
[13:37:09] [PASSED] test_encode_object_basic
[13:37:09] [PASSED] test_print
[13:37:09] ================= [PASSED] guc_klv_helpers =================
[13:37:09] ================== no_relay (3 subtests) ===================
[13:37:09] [PASSED] xe_drops_guc2pf_if_not_ready
[13:37:09] [PASSED] xe_drops_guc2vf_if_not_ready
[13:37:09] [PASSED] xe_rejects_send_if_not_ready
[13:37:09] ==================== [PASSED] no_relay =====================
[13:37:09] ================== pf_relay (14 subtests) ==================
[13:37:09] [PASSED] pf_rejects_guc2pf_too_short
[13:37:09] [PASSED] pf_rejects_guc2pf_too_long
[13:37:09] [PASSED] pf_rejects_guc2pf_no_payload
[13:37:09] [PASSED] pf_fails_no_payload
[13:37:09] [PASSED] pf_fails_bad_origin
[13:37:09] [PASSED] pf_fails_bad_type
[13:37:09] [PASSED] pf_txn_reports_error
[13:37:09] [PASSED] pf_txn_sends_pf2guc
[13:37:09] [PASSED] pf_sends_pf2guc
[13:37:09] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[13:37:09] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[13:37:09] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[13:37:09] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[13:37:09] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[13:37:09] ==================== [PASSED] pf_relay =====================
[13:37:09] ================== vf_relay (3 subtests) ===================
[13:37:09] [PASSED] vf_rejects_guc2vf_too_short
[13:37:09] [PASSED] vf_rejects_guc2vf_too_long
[13:37:09] [PASSED] vf_rejects_guc2vf_no_payload
[13:37:09] ==================== [PASSED] vf_relay =====================
[13:37:09] ================ pf_gt_config (9 subtests) =================
[13:37:09] [PASSED] fair_contexts_1vf
[13:37:09] [PASSED] fair_doorbells_1vf
[13:37:09] [PASSED] fair_ggtt_1vf
[13:37:09] ====================== fair_vram_1vf ======================
[13:37:09] [PASSED] 3.50 GiB
[13:37:09] [PASSED] 11.5 GiB
[13:37:09] [PASSED] 15.5 GiB
[13:37:09] [PASSED] 31.5 GiB
[13:37:09] [PASSED] 63.5 GiB
[13:37:09] [PASSED] 1.91 GiB
[13:37:09] ================== [PASSED] fair_vram_1vf ==================
[13:37:09] ================ fair_vram_1vf_admin_only =================
[13:37:09] [PASSED] 3.50 GiB
[13:37:09] [PASSED] 11.5 GiB
[13:37:09] [PASSED] 15.5 GiB
[13:37:09] [PASSED] 31.5 GiB
[13:37:09] [PASSED] 63.5 GiB
[13:37:09] [PASSED] 1.91 GiB
[13:37:09] ============ [PASSED] fair_vram_1vf_admin_only =============
[13:37:09] ====================== fair_contexts ======================
[13:37:09] [PASSED] 1 VF
[13:37:09] [PASSED] 2 VFs
[13:37:09] [PASSED] 3 VFs
[13:37:09] [PASSED] 4 VFs
[13:37:09] [PASSED] 5 VFs
[13:37:09] [PASSED] 6 VFs
[13:37:09] [PASSED] 7 VFs
[13:37:09] [PASSED] 8 VFs
[13:37:09] [PASSED] 9 VFs
[13:37:09] [PASSED] 10 VFs
[13:37:09] [PASSED] 11 VFs
[13:37:09] [PASSED] 12 VFs
[13:37:09] [PASSED] 13 VFs
[13:37:09] [PASSED] 14 VFs
[13:37:09] [PASSED] 15 VFs
[13:37:09] [PASSED] 16 VFs
[13:37:09] [PASSED] 17 VFs
[13:37:09] [PASSED] 18 VFs
[13:37:09] [PASSED] 19 VFs
[13:37:09] [PASSED] 20 VFs
[13:37:09] [PASSED] 21 VFs
[13:37:09] [PASSED] 22 VFs
[13:37:09] [PASSED] 23 VFs
[13:37:09] [PASSED] 24 VFs
[13:37:09] [PASSED] 25 VFs
[13:37:09] [PASSED] 26 VFs
[13:37:09] [PASSED] 27 VFs
[13:37:09] [PASSED] 28 VFs
[13:37:09] [PASSED] 29 VFs
[13:37:09] [PASSED] 30 VFs
[13:37:09] [PASSED] 31 VFs
[13:37:09] [PASSED] 32 VFs
[13:37:09] [PASSED] 33 VFs
[13:37:09] [PASSED] 34 VFs
[13:37:09] [PASSED] 35 VFs
[13:37:09] [PASSED] 36 VFs
[13:37:09] [PASSED] 37 VFs
[13:37:09] [PASSED] 38 VFs
[13:37:09] [PASSED] 39 VFs
[13:37:09] [PASSED] 40 VFs
[13:37:09] [PASSED] 41 VFs
[13:37:09] [PASSED] 42 VFs
[13:37:09] [PASSED] 43 VFs
[13:37:09] [PASSED] 44 VFs
[13:37:09] [PASSED] 45 VFs
[13:37:09] [PASSED] 46 VFs
[13:37:09] [PASSED] 47 VFs
[13:37:09] [PASSED] 48 VFs
[13:37:09] [PASSED] 49 VFs
[13:37:09] [PASSED] 50 VFs
[13:37:09] [PASSED] 51 VFs
[13:37:09] [PASSED] 52 VFs
[13:37:09] [PASSED] 53 VFs
[13:37:09] [PASSED] 54 VFs
[13:37:09] [PASSED] 55 VFs
[13:37:09] [PASSED] 56 VFs
[13:37:09] [PASSED] 57 VFs
[13:37:09] [PASSED] 58 VFs
[13:37:09] [PASSED] 59 VFs
[13:37:09] [PASSED] 60 VFs
[13:37:09] [PASSED] 61 VFs
[13:37:09] [PASSED] 62 VFs
[13:37:09] [PASSED] 63 VFs
[13:37:09] ================== [PASSED] fair_contexts ==================
[13:37:09] ===================== fair_doorbells ======================
[13:37:09] [PASSED] 1 VF
[13:37:09] [PASSED] 2 VFs
[13:37:09] [PASSED] 3 VFs
[13:37:09] [PASSED] 4 VFs
[13:37:09] [PASSED] 5 VFs
[13:37:09] [PASSED] 6 VFs
[13:37:09] [PASSED] 7 VFs
[13:37:09] [PASSED] 8 VFs
[13:37:09] [PASSED] 9 VFs
[13:37:09] [PASSED] 10 VFs
[13:37:09] [PASSED] 11 VFs
[13:37:09] [PASSED] 12 VFs
[13:37:09] [PASSED] 13 VFs
[13:37:09] [PASSED] 14 VFs
[13:37:09] [PASSED] 15 VFs
[13:37:09] [PASSED] 16 VFs
[13:37:09] [PASSED] 17 VFs
[13:37:09] [PASSED] 18 VFs
[13:37:09] [PASSED] 19 VFs
[13:37:09] [PASSED] 20 VFs
[13:37:09] [PASSED] 21 VFs
[13:37:09] [PASSED] 22 VFs
[13:37:09] [PASSED] 23 VFs
[13:37:09] [PASSED] 24 VFs
[13:37:09] [PASSED] 25 VFs
[13:37:09] [PASSED] 26 VFs
[13:37:09] [PASSED] 27 VFs
[13:37:09] [PASSED] 28 VFs
[13:37:09] [PASSED] 29 VFs
[13:37:09] [PASSED] 30 VFs
[13:37:09] [PASSED] 31 VFs
[13:37:09] [PASSED] 32 VFs
[13:37:09] [PASSED] 33 VFs
[13:37:09] [PASSED] 34 VFs
[13:37:09] [PASSED] 35 VFs
[13:37:09] [PASSED] 36 VFs
[13:37:09] [PASSED] 37 VFs
[13:37:09] [PASSED] 38 VFs
[13:37:09] [PASSED] 39 VFs
[13:37:09] [PASSED] 40 VFs
[13:37:09] [PASSED] 41 VFs
[13:37:09] [PASSED] 42 VFs
[13:37:09] [PASSED] 43 VFs
[13:37:09] [PASSED] 44 VFs
[13:37:09] [PASSED] 45 VFs
[13:37:09] [PASSED] 46 VFs
[13:37:09] [PASSED] 47 VFs
[13:37:09] [PASSED] 48 VFs
[13:37:09] [PASSED] 49 VFs
[13:37:09] [PASSED] 50 VFs
[13:37:09] [PASSED] 51 VFs
[13:37:09] [PASSED] 52 VFs
[13:37:09] [PASSED] 53 VFs
[13:37:09] [PASSED] 54 VFs
[13:37:09] [PASSED] 55 VFs
[13:37:09] [PASSED] 56 VFs
[13:37:09] [PASSED] 57 VFs
[13:37:09] [PASSED] 58 VFs
[13:37:09] [PASSED] 59 VFs
[13:37:09] [PASSED] 60 VFs
[13:37:09] [PASSED] 61 VFs
[13:37:09] [PASSED] 62 VFs
[13:37:09] [PASSED] 63 VFs
[13:37:09] ================= [PASSED] fair_doorbells ==================
[13:37:09] ======================== fair_ggtt ========================
[13:37:09] [PASSED] 1 VF
[13:37:09] [PASSED] 2 VFs
[13:37:09] [PASSED] 3 VFs
[13:37:09] [PASSED] 4 VFs
[13:37:09] [PASSED] 5 VFs
[13:37:09] [PASSED] 6 VFs
[13:37:09] [PASSED] 7 VFs
[13:37:09] [PASSED] 8 VFs
[13:37:09] [PASSED] 9 VFs
[13:37:09] [PASSED] 10 VFs
[13:37:09] [PASSED] 11 VFs
[13:37:09] [PASSED] 12 VFs
[13:37:09] [PASSED] 13 VFs
[13:37:09] [PASSED] 14 VFs
[13:37:09] [PASSED] 15 VFs
[13:37:09] [PASSED] 16 VFs
[13:37:09] [PASSED] 17 VFs
[13:37:09] [PASSED] 18 VFs
[13:37:09] [PASSED] 19 VFs
[13:37:09] [PASSED] 20 VFs
[13:37:09] [PASSED] 21 VFs
[13:37:09] [PASSED] 22 VFs
[13:37:09] [PASSED] 23 VFs
[13:37:09] [PASSED] 24 VFs
[13:37:09] [PASSED] 25 VFs
[13:37:09] [PASSED] 26 VFs
[13:37:09] [PASSED] 27 VFs
[13:37:09] [PASSED] 28 VFs
[13:37:09] [PASSED] 29 VFs
[13:37:09] [PASSED] 30 VFs
[13:37:09] [PASSED] 31 VFs
[13:37:09] [PASSED] 32 VFs
[13:37:09] [PASSED] 33 VFs
[13:37:09] [PASSED] 34 VFs
[13:37:09] [PASSED] 35 VFs
[13:37:09] [PASSED] 36 VFs
[13:37:09] [PASSED] 37 VFs
[13:37:09] [PASSED] 38 VFs
[13:37:09] [PASSED] 39 VFs
[13:37:09] [PASSED] 40 VFs
[13:37:09] [PASSED] 41 VFs
[13:37:09] [PASSED] 42 VFs
[13:37:09] [PASSED] 43 VFs
[13:37:09] [PASSED] 44 VFs
[13:37:09] [PASSED] 45 VFs
[13:37:09] [PASSED] 46 VFs
[13:37:09] [PASSED] 47 VFs
[13:37:09] [PASSED] 48 VFs
[13:37:09] [PASSED] 49 VFs
[13:37:09] [PASSED] 50 VFs
[13:37:09] [PASSED] 51 VFs
[13:37:09] [PASSED] 52 VFs
[13:37:09] [PASSED] 53 VFs
[13:37:09] [PASSED] 54 VFs
[13:37:09] [PASSED] 55 VFs
[13:37:09] [PASSED] 56 VFs
[13:37:09] [PASSED] 57 VFs
[13:37:09] [PASSED] 58 VFs
[13:37:09] [PASSED] 59 VFs
[13:37:09] [PASSED] 60 VFs
[13:37:09] [PASSED] 61 VFs
[13:37:09] [PASSED] 62 VFs
[13:37:09] [PASSED] 63 VFs
[13:37:09] ==================== [PASSED] fair_ggtt ====================
[13:37:09] ======================== fair_vram ========================
[13:37:09] [PASSED] 1 VF
[13:37:09] [PASSED] 2 VFs
[13:37:09] [PASSED] 3 VFs
[13:37:09] [PASSED] 4 VFs
[13:37:09] [PASSED] 5 VFs
[13:37:09] [PASSED] 6 VFs
[13:37:09] [PASSED] 7 VFs
[13:37:09] [PASSED] 8 VFs
[13:37:09] [PASSED] 9 VFs
[13:37:09] [PASSED] 10 VFs
[13:37:09] [PASSED] 11 VFs
[13:37:09] [PASSED] 12 VFs
[13:37:09] [PASSED] 13 VFs
[13:37:09] [PASSED] 14 VFs
[13:37:09] [PASSED] 15 VFs
[13:37:09] [PASSED] 16 VFs
[13:37:09] [PASSED] 17 VFs
[13:37:09] [PASSED] 18 VFs
[13:37:09] [PASSED] 19 VFs
[13:37:09] [PASSED] 20 VFs
[13:37:09] [PASSED] 21 VFs
[13:37:09] [PASSED] 22 VFs
[13:37:09] [PASSED] 23 VFs
[13:37:09] [PASSED] 24 VFs
[13:37:09] [PASSED] 25 VFs
[13:37:09] [PASSED] 26 VFs
[13:37:09] [PASSED] 27 VFs
[13:37:09] [PASSED] 28 VFs
[13:37:09] [PASSED] 29 VFs
[13:37:09] [PASSED] 30 VFs
[13:37:09] [PASSED] 31 VFs
[13:37:09] [PASSED] 32 VFs
[13:37:09] [PASSED] 33 VFs
[13:37:09] [PASSED] 34 VFs
[13:37:09] [PASSED] 35 VFs
[13:37:09] [PASSED] 36 VFs
[13:37:09] [PASSED] 37 VFs
[13:37:09] [PASSED] 38 VFs
[13:37:09] [PASSED] 39 VFs
[13:37:09] [PASSED] 40 VFs
[13:37:09] [PASSED] 41 VFs
[13:37:09] [PASSED] 42 VFs
[13:37:09] [PASSED] 43 VFs
[13:37:09] [PASSED] 44 VFs
[13:37:09] [PASSED] 45 VFs
[13:37:09] [PASSED] 46 VFs
[13:37:09] [PASSED] 47 VFs
[13:37:09] [PASSED] 48 VFs
[13:37:09] [PASSED] 49 VFs
[13:37:09] [PASSED] 50 VFs
[13:37:09] [PASSED] 51 VFs
[13:37:09] [PASSED] 52 VFs
[13:37:09] [PASSED] 53 VFs
[13:37:09] [PASSED] 54 VFs
[13:37:09] [PASSED] 55 VFs
[13:37:09] [PASSED] 56 VFs
[13:37:09] [PASSED] 57 VFs
[13:37:09] [PASSED] 58 VFs
[13:37:09] [PASSED] 59 VFs
[13:37:09] [PASSED] 60 VFs
[13:37:09] [PASSED] 61 VFs
[13:37:09] [PASSED] 62 VFs
[13:37:09] [PASSED] 63 VFs
[13:37:09] ==================== [PASSED] fair_vram ====================
[13:37:09] ================== [PASSED] pf_gt_config ===================
[13:37:09] ===================== lmtt (1 subtest) =====================
[13:37:09] ======================== test_ops =========================
[13:37:09] [PASSED] 2-level
[13:37:09] [PASSED] multi-level
[13:37:09] ==================== [PASSED] test_ops =====================
[13:37:09] ====================== [PASSED] lmtt =======================
[13:37:09] ================= sriov_packet (1 subtest) =================
[13:37:09] [PASSED] test_descriptor_init
[13:37:09] ================== [PASSED] sriov_packet ===================
[13:37:09] ================= pf_service (11 subtests) =================
[13:37:09] [PASSED] pf_negotiate_any
[13:37:09] [PASSED] pf_negotiate_base_match
[13:37:09] [PASSED] pf_negotiate_base_newer
[13:37:09] [PASSED] pf_negotiate_base_next
[13:37:09] [SKIPPED] pf_negotiate_base_older (no older minor)
[13:37:09] [PASSED] pf_negotiate_base_prev
[13:37:09] [PASSED] pf_negotiate_latest_match
[13:37:09] [PASSED] pf_negotiate_latest_newer
[13:37:09] [PASSED] pf_negotiate_latest_next
[13:37:09] [SKIPPED] pf_negotiate_latest_older (no older minor)
[13:37:09] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[13:37:09] =================== [PASSED] pf_service ====================
[13:37:09] ================= xe_guc_g2g (2 subtests) ==================
[13:37:09] ============== xe_live_guc_g2g_kunit_default ==============
[13:37:09] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[13:37:09] ============== xe_live_guc_g2g_kunit_allmem ===============
[13:37:09] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[13:37:09] =================== [SKIPPED] xe_guc_g2g ===================
[13:37:09] =================== xe_mocs (2 subtests) ===================
[13:37:09] ================ xe_live_mocs_kernel_kunit ================
[13:37:09] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[13:37:09] ================ xe_live_mocs_reset_kunit =================
[13:37:09] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[13:37:09] ==================== [SKIPPED] xe_mocs =====================
[13:37:09] ================= xe_migrate (2 subtests) ==================
[13:37:09] ================= xe_migrate_sanity_kunit =================
[13:37:09] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[13:37:09] ================== xe_validate_ccs_kunit ==================
[13:37:09] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[13:37:09] =================== [SKIPPED] xe_migrate ===================
[13:37:09] ================== xe_dma_buf (1 subtest) ==================
[13:37:09] ==================== xe_dma_buf_kunit =====================
[13:37:09] ================ [SKIPPED] xe_dma_buf_kunit ================
[13:37:09] =================== [SKIPPED] xe_dma_buf ===================
[13:37:09] ================= xe_bo_shrink (1 subtest) =================
[13:37:09] =================== xe_bo_shrink_kunit ====================
[13:37:09] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[13:37:09] ================== [SKIPPED] xe_bo_shrink ==================
[13:37:09] ==================== xe_bo (2 subtests) ====================
[13:37:09] ================== xe_ccs_migrate_kunit ===================
[13:37:09] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[13:37:09] ==================== xe_bo_evict_kunit ====================
[13:37:09] =============== [SKIPPED] xe_bo_evict_kunit ================
[13:37:09] ===================== [SKIPPED] xe_bo ======================
[13:37:09] ==================== args (13 subtests) ====================
[13:37:09] [PASSED] count_args_test
[13:37:09] [PASSED] call_args_example
[13:37:09] [PASSED] call_args_test
[13:37:09] [PASSED] drop_first_arg_example
[13:37:09] [PASSED] drop_first_arg_test
[13:37:09] [PASSED] first_arg_example
[13:37:09] [PASSED] first_arg_test
[13:37:09] [PASSED] last_arg_example
[13:37:09] [PASSED] last_arg_test
[13:37:09] [PASSED] pick_arg_example
[13:37:09] [PASSED] if_args_example
[13:37:09] [PASSED] if_args_test
[13:37:09] [PASSED] sep_comma_example
[13:37:09] ====================== [PASSED] args =======================
[13:37:09] =================== xe_pci (3 subtests) ====================
[13:37:09] ==================== check_graphics_ip ====================
[13:37:09] [PASSED] 12.00 Xe_LP
[13:37:09] [PASSED] 12.10 Xe_LP+
[13:37:09] [PASSED] 12.55 Xe_HPG
[13:37:09] [PASSED] 12.60 Xe_HPC
[13:37:09] [PASSED] 12.70 Xe_LPG
[13:37:09] [PASSED] 12.71 Xe_LPG
[13:37:09] [PASSED] 12.74 Xe_LPG+
[13:37:09] [PASSED] 20.01 Xe2_HPG
[13:37:09] [PASSED] 20.02 Xe2_HPG
[13:37:09] [PASSED] 20.04 Xe2_LPG
[13:37:09] [PASSED] 30.00 Xe3_LPG
[13:37:09] [PASSED] 30.01 Xe3_LPG
[13:37:09] [PASSED] 30.03 Xe3_LPG
[13:37:09] [PASSED] 30.04 Xe3_LPG
[13:37:09] [PASSED] 30.05 Xe3_LPG
[13:37:09] [PASSED] 35.10 Xe3p_LPG
[13:37:09] [PASSED] 35.11 Xe3p_XPC
[13:37:09] ================ [PASSED] check_graphics_ip ================
[13:37:09] ===================== check_media_ip ======================
[13:37:09] [PASSED] 12.00 Xe_M
[13:37:09] [PASSED] 12.55 Xe_HPM
[13:37:09] [PASSED] 13.00 Xe_LPM+
[13:37:09] [PASSED] 13.01 Xe2_HPM
[13:37:09] [PASSED] 20.00 Xe2_LPM
[13:37:09] [PASSED] 30.00 Xe3_LPM
[13:37:09] [PASSED] 30.02 Xe3_LPM
[13:37:09] [PASSED] 35.00 Xe3p_LPM
[13:37:09] [PASSED] 35.03 Xe3p_HPM
[13:37:09] ================= [PASSED] check_media_ip ==================
[13:37:09] =================== check_platform_desc ===================
[13:37:09] [PASSED] 0x9A60 (TIGERLAKE)
[13:37:09] [PASSED] 0x9A68 (TIGERLAKE)
[13:37:09] [PASSED] 0x9A70 (TIGERLAKE)
[13:37:09] [PASSED] 0x9A40 (TIGERLAKE)
[13:37:09] [PASSED] 0x9A49 (TIGERLAKE)
[13:37:09] [PASSED] 0x9A59 (TIGERLAKE)
[13:37:09] [PASSED] 0x9A78 (TIGERLAKE)
[13:37:09] [PASSED] 0x9AC0 (TIGERLAKE)
[13:37:09] [PASSED] 0x9AC9 (TIGERLAKE)
[13:37:09] [PASSED] 0x9AD9 (TIGERLAKE)
[13:37:09] [PASSED] 0x9AF8 (TIGERLAKE)
[13:37:09] [PASSED] 0x4C80 (ROCKETLAKE)
[13:37:09] [PASSED] 0x4C8A (ROCKETLAKE)
[13:37:09] [PASSED] 0x4C8B (ROCKETLAKE)
[13:37:09] [PASSED] 0x4C8C (ROCKETLAKE)
[13:37:09] [PASSED] 0x4C90 (ROCKETLAKE)
[13:37:09] [PASSED] 0x4C9A (ROCKETLAKE)
[13:37:09] [PASSED] 0x4680 (ALDERLAKE_S)
[13:37:09] [PASSED] 0x4682 (ALDERLAKE_S)
[13:37:09] [PASSED] 0x4688 (ALDERLAKE_S)
[13:37:09] [PASSED] 0x468A (ALDERLAKE_S)
[13:37:09] [PASSED] 0x468B (ALDERLAKE_S)
[13:37:09] [PASSED] 0x4690 (ALDERLAKE_S)
[13:37:09] [PASSED] 0x4692 (ALDERLAKE_S)
[13:37:09] [PASSED] 0x4693 (ALDERLAKE_S)
[13:37:09] [PASSED] 0x46A0 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46A1 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46A2 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46A3 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46A6 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46A8 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46AA (ALDERLAKE_P)
[13:37:09] [PASSED] 0x462A (ALDERLAKE_P)
[13:37:09] [PASSED] 0x4626 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x4628 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46B0 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46B1 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46B2 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46B3 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46C0 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46C1 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46C2 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46C3 (ALDERLAKE_P)
[13:37:09] [PASSED] 0x46D0 (ALDERLAKE_N)
[13:37:09] [PASSED] 0x46D1 (ALDERLAKE_N)
[13:37:09] [PASSED] 0x46D2 (ALDERLAKE_N)
[13:37:09] [PASSED] 0x46D3 (ALDERLAKE_N)
[13:37:09] [PASSED] 0x46D4 (ALDERLAKE_N)
[13:37:09] [PASSED] 0xA721 (ALDERLAKE_P)
[13:37:09] [PASSED] 0xA7A1 (ALDERLAKE_P)
[13:37:09] [PASSED] 0xA7A9 (ALDERLAKE_P)
[13:37:09] [PASSED] 0xA7AC (ALDERLAKE_P)
[13:37:09] [PASSED] 0xA7AD (ALDERLAKE_P)
[13:37:09] [PASSED] 0xA720 (ALDERLAKE_P)
[13:37:09] [PASSED] 0xA7A0 (ALDERLAKE_P)
[13:37:09] [PASSED] 0xA7A8 (ALDERLAKE_P)
[13:37:09] [PASSED] 0xA7AA (ALDERLAKE_P)
[13:37:09] [PASSED] 0xA7AB (ALDERLAKE_P)
[13:37:09] [PASSED] 0xA780 (ALDERLAKE_S)
[13:37:09] [PASSED] 0xA781 (ALDERLAKE_S)
[13:37:09] [PASSED] 0xA782 (ALDERLAKE_S)
[13:37:09] [PASSED] 0xA783 (ALDERLAKE_S)
[13:37:09] [PASSED] 0xA788 (ALDERLAKE_S)
[13:37:09] [PASSED] 0xA789 (ALDERLAKE_S)
[13:37:09] [PASSED] 0xA78A (ALDERLAKE_S)
[13:37:09] [PASSED] 0xA78B (ALDERLAKE_S)
[13:37:09] [PASSED] 0x4905 (DG1)
[13:37:09] [PASSED] 0x4906 (DG1)
[13:37:09] [PASSED] 0x4907 (DG1)
[13:37:09] [PASSED] 0x4908 (DG1)
[13:37:09] [PASSED] 0x4909 (DG1)
[13:37:09] [PASSED] 0x56C0 (DG2)
[13:37:09] [PASSED] 0x56C2 (DG2)
[13:37:09] [PASSED] 0x56C1 (DG2)
[13:37:09] [PASSED] 0x7D51 (METEORLAKE)
[13:37:09] [PASSED] 0x7DD1 (METEORLAKE)
[13:37:09] [PASSED] 0x7D41 (METEORLAKE)
[13:37:09] [PASSED] 0x7D67 (METEORLAKE)
[13:37:09] [PASSED] 0xB640 (METEORLAKE)
[13:37:09] [PASSED] 0x56A0 (DG2)
[13:37:09] [PASSED] 0x56A1 (DG2)
[13:37:09] [PASSED] 0x56A2 (DG2)
[13:37:09] [PASSED] 0x56BE (DG2)
[13:37:09] [PASSED] 0x56BF (DG2)
[13:37:09] [PASSED] 0x5690 (DG2)
[13:37:09] [PASSED] 0x5691 (DG2)
[13:37:09] [PASSED] 0x5692 (DG2)
[13:37:09] [PASSED] 0x56A5 (DG2)
[13:37:09] [PASSED] 0x56A6 (DG2)
[13:37:09] [PASSED] 0x56B0 (DG2)
[13:37:09] [PASSED] 0x56B1 (DG2)
[13:37:09] [PASSED] 0x56BA (DG2)
[13:37:09] [PASSED] 0x56BB (DG2)
[13:37:09] [PASSED] 0x56BC (DG2)
[13:37:09] [PASSED] 0x56BD (DG2)
[13:37:09] [PASSED] 0x5693 (DG2)
[13:37:09] [PASSED] 0x5694 (DG2)
[13:37:09] [PASSED] 0x5695 (DG2)
[13:37:09] [PASSED] 0x56A3 (DG2)
[13:37:09] [PASSED] 0x56A4 (DG2)
[13:37:09] [PASSED] 0x56B2 (DG2)
[13:37:09] [PASSED] 0x56B3 (DG2)
[13:37:09] [PASSED] 0x5696 (DG2)
[13:37:09] [PASSED] 0x5697 (DG2)
[13:37:09] [PASSED] 0xB69 (PVC)
[13:37:09] [PASSED] 0xB6E (PVC)
[13:37:09] [PASSED] 0xBD4 (PVC)
[13:37:09] [PASSED] 0xBD5 (PVC)
[13:37:09] [PASSED] 0xBD6 (PVC)
[13:37:09] [PASSED] 0xBD7 (PVC)
[13:37:09] [PASSED] 0xBD8 (PVC)
[13:37:09] [PASSED] 0xBD9 (PVC)
[13:37:09] [PASSED] 0xBDA (PVC)
[13:37:09] [PASSED] 0xBDB (PVC)
[13:37:09] [PASSED] 0xBE0 (PVC)
[13:37:09] [PASSED] 0xBE1 (PVC)
[13:37:09] [PASSED] 0xBE5 (PVC)
[13:37:09] [PASSED] 0x7D40 (METEORLAKE)
[13:37:09] [PASSED] 0x7D45 (METEORLAKE)
[13:37:09] [PASSED] 0x7D55 (METEORLAKE)
[13:37:09] [PASSED] 0x7D60 (METEORLAKE)
[13:37:09] [PASSED] 0x7DD5 (METEORLAKE)
[13:37:09] [PASSED] 0x6420 (LUNARLAKE)
[13:37:09] [PASSED] 0x64A0 (LUNARLAKE)
[13:37:09] [PASSED] 0x64B0 (LUNARLAKE)
[13:37:09] [PASSED] 0xE202 (BATTLEMAGE)
[13:37:09] [PASSED] 0xE209 (BATTLEMAGE)
[13:37:09] [PASSED] 0xE20B (BATTLEMAGE)
[13:37:09] [PASSED] 0xE20C (BATTLEMAGE)
[13:37:09] [PASSED] 0xE20D (BATTLEMAGE)
[13:37:09] [PASSED] 0xE210 (BATTLEMAGE)
[13:37:09] [PASSED] 0xE211 (BATTLEMAGE)
[13:37:09] [PASSED] 0xE212 (BATTLEMAGE)
[13:37:09] [PASSED] 0xE216 (BATTLEMAGE)
[13:37:09] [PASSED] 0xE220 (BATTLEMAGE)
[13:37:09] [PASSED] 0xE221 (BATTLEMAGE)
[13:37:09] [PASSED] 0xE222 (BATTLEMAGE)
[13:37:09] [PASSED] 0xE223 (BATTLEMAGE)
[13:37:09] [PASSED] 0xB080 (PANTHERLAKE)
[13:37:09] [PASSED] 0xB081 (PANTHERLAKE)
[13:37:09] [PASSED] 0xB082 (PANTHERLAKE)
[13:37:09] [PASSED] 0xB083 (PANTHERLAKE)
[13:37:09] [PASSED] 0xB084 (PANTHERLAKE)
[13:37:09] [PASSED] 0xB085 (PANTHERLAKE)
[13:37:09] [PASSED] 0xB086 (PANTHERLAKE)
[13:37:09] [PASSED] 0xB087 (PANTHERLAKE)
[13:37:09] [PASSED] 0xB08F (PANTHERLAKE)
[13:37:09] [PASSED] 0xB090 (PANTHERLAKE)
[13:37:09] [PASSED] 0xB0A0 (PANTHERLAKE)
[13:37:09] [PASSED] 0xB0B0 (PANTHERLAKE)
[13:37:09] [PASSED] 0xFD80 (PANTHERLAKE)
[13:37:09] [PASSED] 0xFD81 (PANTHERLAKE)
[13:37:09] [PASSED] 0xD740 (NOVALAKE_S)
[13:37:09] [PASSED] 0xD741 (NOVALAKE_S)
[13:37:09] [PASSED] 0xD742 (NOVALAKE_S)
[13:37:09] [PASSED] 0xD743 (NOVALAKE_S)
[13:37:09] [PASSED] 0xD745 (NOVALAKE_S)
[13:37:09] [PASSED] 0xD74A (NOVALAKE_S)
[13:37:09] [PASSED] 0xD74B (NOVALAKE_S)
[13:37:09] [PASSED] 0x674C (CRESCENTISLAND)
[13:37:09] [PASSED] 0x674D (CRESCENTISLAND)
[13:37:09] [PASSED] 0x674E (CRESCENTISLAND)
[13:37:09] [PASSED] 0x674F (CRESCENTISLAND)
[13:37:09] [PASSED] 0x6750 (CRESCENTISLAND)
[13:37:09] [PASSED] 0xD750 (NOVALAKE_P)
[13:37:09] [PASSED] 0xD751 (NOVALAKE_P)
[13:37:09] [PASSED] 0xD752 (NOVALAKE_P)
[13:37:09] [PASSED] 0xD753 (NOVALAKE_P)
[13:37:09] [PASSED] 0xD754 (NOVALAKE_P)
[13:37:09] [PASSED] 0xD755 (NOVALAKE_P)
[13:37:09] [PASSED] 0xD756 (NOVALAKE_P)
[13:37:09] [PASSED] 0xD757 (NOVALAKE_P)
[13:37:09] [PASSED] 0xD75F (NOVALAKE_P)
[13:37:09] =============== [PASSED] check_platform_desc ===============
[13:37:09] ===================== [PASSED] xe_pci ======================
[13:37:09] ============= xe_rtp_tables_test (5 subtests) ==============
[13:37:09] ================== xe_rtp_table_gt_test ===================
[13:37:09] [PASSED] gt_was/14011060649
[13:37:09] [PASSED] gt_was/14011059788
[13:37:09] [PASSED] gt_was/14015795083
[13:37:09] [PASSED] gt_was/16021867713
[13:37:09] [PASSED] gt_was/14019449301
[13:37:09] [PASSED] gt_was/16028005424
[13:37:09] [PASSED] gt_was/14026578760
[13:37:09] [PASSED] gt_was/1409420604
[13:37:09] [PASSED] gt_was/1408615072
[13:37:09] [PASSED] gt_was/22010523718
[13:37:09] [PASSED] gt_was/14011006942
[13:37:09] [PASSED] gt_was/14014830051
[13:37:09] [PASSED] gt_was/18018781329
[13:37:09] [PASSED] gt_was/1509235366
[13:37:09] [PASSED] gt_was/18018781329
[13:37:09] [PASSED] gt_was/16016694945
[13:37:09] [PASSED] gt_was/14018575942
[13:37:09] [PASSED] gt_was/22016670082
[13:37:09] [PASSED] gt_was/22016670082
[13:37:09] [PASSED] gt_was/14017421178
[13:37:09] [PASSED] gt_was/16025250150
[13:37:09] [PASSED] gt_was/14021871409
[13:37:09] [PASSED] gt_was/16021865536
[13:37:09] [PASSED] gt_was/14021486841
[13:37:09] [PASSED] gt_was/14025160223
[13:37:09] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[13:37:09] [PASSED] gt_was/14025635424
[13:37:09] [PASSED] gt_was/16028005424
[13:37:09] ============== [PASSED] xe_rtp_table_gt_test ===============
[13:37:09] ================== xe_rtp_table_gt_test ===================
[13:37:09] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[13:37:09] [PASSED] gt_tunings/Tuning: 32B Access Enable
[13:37:09] [PASSED] gt_tunings/Tuning: L3 cache
[13:37:09] [PASSED] gt_tunings/Tuning: L3 cache - media
[13:37:09] [PASSED] gt_tunings/Tuning: Compression Overfetch
[13:37:09] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[13:37:09] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[13:37:09] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[13:37:09] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[13:37:09] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[13:37:09] [PASSED] gt_tunings/Tuning: Stateless compression control
[13:37:09] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[13:37:09] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[13:37:09] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[13:37:09] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[13:37:09] ============== [PASSED] xe_rtp_table_gt_test ===============
[13:37:09] ================== xe_rtp_table_oob_test ==================
[13:37:09] [PASSED] oob_was/1607983814
[13:37:09] [PASSED] oob_was/16010904313
[13:37:09] [PASSED] oob_was/18022495364
[13:37:09] [PASSED] oob_was/22012773006
[13:37:09] [PASSED] oob_was/14014475959
[13:37:09] [PASSED] oob_was/22011391025
[13:37:09] [PASSED] oob_was/22012727170
[13:37:09] [PASSED] oob_was/22012727685
[13:37:09] [PASSED] oob_was/22016596838
[13:37:09] [PASSED] oob_was/18020744125
[13:37:09] [PASSED] oob_was/1409600907
[13:37:09] [PASSED] oob_was/22014953428
[13:37:09] [PASSED] oob_was/16017236439
[13:37:09] [PASSED] oob_was/14019821291
[13:37:09] [PASSED] oob_was/14015076503
[13:37:09] [PASSED] oob_was/14018913170
[13:37:09] [PASSED] oob_was/14018094691
[13:37:09] [PASSED] oob_was/18024947630
[13:37:09] [PASSED] oob_was/16022287689
[13:37:09] [PASSED] oob_was/13011645652
[13:37:09] [PASSED] oob_was/14022293748
[13:37:09] [PASSED] oob_was/22019794406
[13:37:09] [PASSED] oob_was/22019338487
[13:37:09] [PASSED] oob_was/16023588340
[13:37:09] [PASSED] oob_was/14019789679
[13:37:09] [PASSED] oob_was/14022866841
[13:37:09] [PASSED] oob_was/16021333562
[13:37:09] [PASSED] oob_was/14016712196
[13:37:09] [PASSED] oob_was/14015568240
[13:37:09] [PASSED] oob_was/18013179988
[13:37:09] [PASSED] oob_was/1508761755
[13:37:09] [PASSED] oob_was/16023105232
[13:37:09] [PASSED] oob_was/16026508708
[13:37:09] [PASSED] oob_was/14020001231
[13:37:09] [PASSED] oob_was/16023683509
[13:37:09] [PASSED] oob_was/14025515070
[13:37:09] [PASSED] oob_was/15015404425_disable
[13:37:09] [PASSED] oob_was/16026007364
[13:37:09] [PASSED] oob_was/14020316580
[13:37:09] [PASSED] oob_was/14025883347
[13:37:09] [PASSED] oob_was/16029380221
[13:37:09] [PASSED] oob_was/22022079272
[13:37:09] [PASSED] oob_was/16029897822
[13:37:09] [PASSED] oob_was/14027054324
[13:37:09] ============== [PASSED] xe_rtp_table_oob_test ==============
[13:37:09] ================ xe_rtp_table_dev_oob_test ================
[13:37:09] [PASSED] device_oob_was/22010954014
[13:37:09] [PASSED] device_oob_was/15015404425
[13:37:09] [PASSED] device_oob_was/22019338487_display
[13:37:09] [PASSED] device_oob_was/14022085890
[13:37:09] [PASSED] device_oob_was/14026539277
[13:37:09] [PASSED] device_oob_was/14026633728
[13:37:09] [PASSED] device_oob_was/14026746987
[13:37:09] [PASSED] device_oob_was/14026779378
[13:37:09] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[13:37:09] ========== xe_rtp_table_missing_upper_bound_test ==========
[13:37:09] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[13:37:09] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[13:37:09] [PASSED] register_whitelist/1806527549
[13:37:09] [PASSED] register_whitelist/allow_read_ctx_timestamp
[13:37:09] [PASSED] register_whitelist/allow_read_queue_timestamp
[13:37:09] [PASSED] register_whitelist/16014440446
[13:37:09] [PASSED] register_whitelist/16017236439
[13:37:09] [PASSED] register_whitelist/16020183090
[13:37:09] [PASSED] register_whitelist/14024997852
[13:37:09] [PASSED] register_whitelist/14024997852
[13:37:09] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[13:37:09] =============== [PASSED] xe_rtp_tables_test ================
[13:37:09] =================== xe_rtp (3 subtests) ====================
[13:37:09] =================== xe_rtp_rules_tests ====================
[13:37:09] [PASSED] no
[13:37:09] [PASSED] yes
[13:37:09] [PASSED] no-and-no
[13:37:09] [PASSED] no-and-yes
[13:37:09] [PASSED] yes-and-no
[13:37:09] [PASSED] yes-and-yes
[13:37:09] [PASSED] no-or-no
[13:37:09] [PASSED] no-or-yes
[13:37:09] [PASSED] yes-or-no
[13:37:09] [PASSED] yes-or-yes
[13:37:09] [PASSED] no-yes-or-yes-no
[13:37:09] [PASSED] no-yes-or-yes-yes
[13:37:09] [PASSED] yes-yes-or-no-yes
[13:37:09] [PASSED] yes-yes-or-yes-yes
[13:37:09] [PASSED] no-no-or-yes-or-no
[13:37:09] [PASSED] or
[13:37:09] [PASSED] or-yes
[13:37:09] [PASSED] or-no
[13:37:09] [PASSED] yes-or
[13:37:09] [PASSED] no-or
[13:37:09] [PASSED] no-or-or-yes
[13:37:09] [PASSED] yes-or-or-no
[13:37:09] [PASSED] no-or-or-no
[13:37:09] [PASSED] missing-context-engine-class
[13:37:09] [PASSED] missing-context-engine-class-or-yes
[13:37:09] [PASSED] missing-context-engine-class-or-or-yes
[13:37:09] =============== [PASSED] xe_rtp_rules_tests ================
[13:37:09] =============== xe_rtp_process_to_sr_tests ================
[13:37:09] [PASSED] coalesce-same-reg
[13:37:09] [PASSED] coalesce-same-reg-literal-and-func
[13:37:09] [PASSED] no-match-no-add
[13:37:09] [PASSED] two-regs-two-entries
[13:37:09] [PASSED] clr-one-set-other
[13:37:09] [PASSED] set-field
[13:37:09] [PASSED] conflict-duplicate
[13:37:09] [PASSED] conflict-not-disjoint
[13:37:09] [PASSED] conflict-not-disjoint-literal-and-func
[13:37:09] [PASSED] conflict-reg-type
[13:37:09] [PASSED] bad-mcr-reg-forced-to-regular
[13:37:09] [PASSED] bad-regular-reg-forced-to-mcr
[13:37:09] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[13:37:09] ================== xe_rtp_process_tests ===================
[13:37:09] [PASSED] active1
[13:37:09] [PASSED] active2
[13:37:09] [PASSED] active-inactive
[13:37:09] [PASSED] inactive-active
[13:37:09] [PASSED] inactive-active-inactive
[13:37:09] [PASSED] inactive-inactive-inactive
[13:37:09] ============== [PASSED] xe_rtp_process_tests ===============
[13:37:09] ===================== [PASSED] xe_rtp ======================
[13:37:09] ==================== xe_wa (1 subtest) =====================
[13:37:09] ======================== xe_wa_gt =========================
[13:37:09] [PASSED] TIGERLAKE B0
[13:37:09] [PASSED] DG1 A0
[13:37:09] [PASSED] DG1 B0
[13:37:09] [PASSED] ALDERLAKE_S A0
[13:37:09] [PASSED] ALDERLAKE_S B0
[13:37:09] [PASSED] ALDERLAKE_S C0
[13:37:09] [PASSED] ALDERLAKE_S D0
[13:37:09] [PASSED] ALDERLAKE_P A0
[13:37:09] [PASSED] ALDERLAKE_P B0
[13:37:09] [PASSED] ALDERLAKE_P C0
[13:37:09] [PASSED] ALDERLAKE_S RPLS D0
[13:37:09] [PASSED] ALDERLAKE_P RPLU E0
[13:37:09] [PASSED] DG2 G10 C0
[13:37:09] [PASSED] DG2 G11 B1
[13:37:09] [PASSED] DG2 G12 A1
[13:37:09] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:37:09] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:37:09] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[13:37:09] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[13:37:09] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[13:37:09] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[13:37:09] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[13:37:09] ==================== [PASSED] xe_wa_gt =====================
[13:37:09] ====================== [PASSED] xe_wa ======================
[13:37:09] ============================================================
[13:37:09] Testing complete. Ran 742 tests: passed: 724, skipped: 18
[13:37:10] Elapsed time: 36.856s total, 4.384s configuring, 31.806s building, 0.638s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[13:37:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:37:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:37:36] Starting KUnit Kernel (1/1)...
[13:37:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:37:36] ============ drm_test_pick_cmdline (2 subtests) ============
[13:37:36] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[13:37:36] =============== drm_test_pick_cmdline_named ===============
[13:37:36] [PASSED] NTSC
[13:37:36] [PASSED] NTSC-J
[13:37:36] [PASSED] PAL
[13:37:36] [PASSED] PAL-M
[13:37:36] =========== [PASSED] drm_test_pick_cmdline_named ===========
[13:37:36] ============== [PASSED] drm_test_pick_cmdline ==============
[13:37:36] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[13:37:36] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[13:37:36] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[13:37:36] =========== drm_validate_clone_mode (2 subtests) ===========
[13:37:36] ============== drm_test_check_in_clone_mode ===============
[13:37:36] [PASSED] in_clone_mode
[13:37:36] [PASSED] not_in_clone_mode
[13:37:36] ========== [PASSED] drm_test_check_in_clone_mode ===========
[13:37:36] =============== drm_test_check_valid_clones ===============
[13:37:36] [PASSED] not_in_clone_mode
[13:37:36] [PASSED] valid_clone
[13:37:36] [PASSED] invalid_clone
[13:37:36] =========== [PASSED] drm_test_check_valid_clones ===========
[13:37:36] ============= [PASSED] drm_validate_clone_mode =============
[13:37:36] ============= drm_validate_modeset (1 subtest) =============
[13:37:36] [PASSED] drm_test_check_connector_changed_modeset
[13:37:36] ============== [PASSED] drm_validate_modeset ===============
[13:37:36] ====== drm_test_bridge_get_current_state (1 subtest) =======
[13:37:36] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[13:37:36] ======== [PASSED] drm_test_bridge_get_current_state ========
[13:37:36] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[13:37:36] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[13:37:36] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[13:37:36] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[13:37:36] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[13:37:36] ============== drm_bridge_alloc (2 subtests) ===============
[13:37:36] [PASSED] drm_test_drm_bridge_alloc_basic
[13:37:36] [PASSED] drm_test_drm_bridge_alloc_get_put
[13:37:36] ================ [PASSED] drm_bridge_alloc =================
[13:37:36] ============= drm_bridge_bus_fmt (5 subtests) ==============
[13:37:36] [PASSED] drm_test_bridge_rgb_yuv_rgb
[13:37:36] [PASSED] drm_test_bridge_must_convert_to_yuv444
[13:37:36] [PASSED] drm_test_bridge_hdmi_auto_rgb
[13:37:36] [PASSED] drm_test_bridge_auto_first
[13:37:36] [PASSED] drm_test_bridge_rgb_yuv_no_path
[13:37:36] =============== [PASSED] drm_bridge_bus_fmt ================
[13:37:36] ============= drm_cmdline_parser (40 subtests) =============
[13:37:36] [PASSED] drm_test_cmdline_force_d_only
[13:37:36] [PASSED] drm_test_cmdline_force_D_only_dvi
[13:37:36] [PASSED] drm_test_cmdline_force_D_only_hdmi
[13:37:36] [PASSED] drm_test_cmdline_force_D_only_not_digital
[13:37:36] [PASSED] drm_test_cmdline_force_e_only
[13:37:36] [PASSED] drm_test_cmdline_res
[13:37:36] [PASSED] drm_test_cmdline_res_vesa
[13:37:36] [PASSED] drm_test_cmdline_res_vesa_rblank
[13:37:36] [PASSED] drm_test_cmdline_res_rblank
[13:37:36] [PASSED] drm_test_cmdline_res_bpp
[13:37:36] [PASSED] drm_test_cmdline_res_refresh
[13:37:36] [PASSED] drm_test_cmdline_res_bpp_refresh
[13:37:36] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[13:37:36] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[13:37:36] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[13:37:36] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[13:37:36] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[13:37:36] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[13:37:36] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[13:37:36] [PASSED] drm_test_cmdline_res_margins_force_on
[13:37:36] [PASSED] drm_test_cmdline_res_vesa_margins
[13:37:36] [PASSED] drm_test_cmdline_name
[13:37:36] [PASSED] drm_test_cmdline_name_bpp
[13:37:36] [PASSED] drm_test_cmdline_name_option
[13:37:36] [PASSED] drm_test_cmdline_name_bpp_option
[13:37:36] [PASSED] drm_test_cmdline_rotate_0
[13:37:36] [PASSED] drm_test_cmdline_rotate_90
[13:37:36] [PASSED] drm_test_cmdline_rotate_180
[13:37:36] [PASSED] drm_test_cmdline_rotate_270
[13:37:36] [PASSED] drm_test_cmdline_hmirror
[13:37:36] [PASSED] drm_test_cmdline_vmirror
[13:37:36] [PASSED] drm_test_cmdline_margin_options
[13:37:36] [PASSED] drm_test_cmdline_multiple_options
[13:37:36] [PASSED] drm_test_cmdline_bpp_extra_and_option
[13:37:36] [PASSED] drm_test_cmdline_extra_and_option
[13:37:36] [PASSED] drm_test_cmdline_freestanding_options
[13:37:36] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[13:37:36] [PASSED] drm_test_cmdline_panel_orientation
[13:37:36] ================ drm_test_cmdline_invalid =================
[13:37:36] [PASSED] margin_only
[13:37:36] [PASSED] interlace_only
[13:37:36] [PASSED] res_missing_x
[13:37:36] [PASSED] res_missing_y
[13:37:36] [PASSED] res_bad_y
[13:37:36] [PASSED] res_missing_y_bpp
[13:37:36] [PASSED] res_bad_bpp
[13:37:36] [PASSED] res_bad_refresh
[13:37:36] [PASSED] res_bpp_refresh_force_on_off
[13:37:36] [PASSED] res_invalid_mode
[13:37:36] [PASSED] res_bpp_wrong_place_mode
[13:37:36] [PASSED] name_bpp_refresh
[13:37:36] [PASSED] name_refresh
[13:37:36] [PASSED] name_refresh_wrong_mode
[13:37:36] [PASSED] name_refresh_invalid_mode
[13:37:36] [PASSED] rotate_multiple
[13:37:36] [PASSED] rotate_invalid_val
[13:37:36] [PASSED] rotate_truncated
[13:37:36] [PASSED] invalid_option
[13:37:36] [PASSED] invalid_tv_option
[13:37:36] [PASSED] truncated_tv_option
[13:37:36] ============ [PASSED] drm_test_cmdline_invalid =============
[13:37:36] =============== drm_test_cmdline_tv_options ===============
[13:37:36] [PASSED] NTSC
[13:37:36] [PASSED] NTSC_443
[13:37:36] [PASSED] NTSC_J
[13:37:36] [PASSED] PAL
[13:37:36] [PASSED] PAL_M
[13:37:36] [PASSED] PAL_N
[13:37:36] [PASSED] SECAM
[13:37:36] [PASSED] MONO_525
[13:37:36] [PASSED] MONO_625
[13:37:36] =========== [PASSED] drm_test_cmdline_tv_options ===========
[13:37:36] =============== [PASSED] drm_cmdline_parser ================
[13:37:36] ========== drmm_connector_hdmi_init (20 subtests) ==========
[13:37:36] [PASSED] drm_test_connector_hdmi_init_valid
[13:37:36] [PASSED] drm_test_connector_hdmi_init_bpc_8
[13:37:36] [PASSED] drm_test_connector_hdmi_init_bpc_10
[13:37:36] [PASSED] drm_test_connector_hdmi_init_bpc_12
[13:37:36] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[13:37:36] [PASSED] drm_test_connector_hdmi_init_bpc_null
[13:37:36] [PASSED] drm_test_connector_hdmi_init_formats_empty
[13:37:36] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[13:37:36] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:37:36] [PASSED] supported_formats=0x9 yuv420_allowed=1
[13:37:36] [PASSED] supported_formats=0x9 yuv420_allowed=0
[13:37:36] [PASSED] supported_formats=0x5 yuv420_allowed=1
[13:37:36] [PASSED] supported_formats=0x5 yuv420_allowed=0
[13:37:36] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:37:36] [PASSED] drm_test_connector_hdmi_init_null_ddc
[13:37:36] [PASSED] drm_test_connector_hdmi_init_null_product
[13:37:36] [PASSED] drm_test_connector_hdmi_init_null_vendor
[13:37:36] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[13:37:36] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[13:37:36] [PASSED] drm_test_connector_hdmi_init_product_valid
[13:37:36] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[13:37:36] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[13:37:36] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[13:37:36] ========= drm_test_connector_hdmi_init_type_valid =========
[13:37:36] [PASSED] HDMI-A
[13:37:36] [PASSED] HDMI-B
[13:37:36] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[13:37:36] ======== drm_test_connector_hdmi_init_type_invalid ========
[13:37:36] [PASSED] Unknown
[13:37:36] [PASSED] VGA
[13:37:36] [PASSED] DVI-I
[13:37:36] [PASSED] DVI-D
[13:37:36] [PASSED] DVI-A
[13:37:36] [PASSED] Composite
[13:37:36] [PASSED] SVIDEO
[13:37:36] [PASSED] LVDS
[13:37:36] [PASSED] Component
[13:37:36] [PASSED] DIN
[13:37:36] [PASSED] DP
[13:37:36] [PASSED] TV
[13:37:36] [PASSED] eDP
[13:37:36] [PASSED] Virtual
[13:37:36] [PASSED] DSI
[13:37:36] [PASSED] DPI
[13:37:36] [PASSED] Writeback
[13:37:36] [PASSED] SPI
[13:37:36] [PASSED] USB
[13:37:36] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[13:37:36] ============ [PASSED] drmm_connector_hdmi_init =============
[13:37:36] ============= drmm_connector_init (3 subtests) =============
[13:37:36] [PASSED] drm_test_drmm_connector_init
[13:37:36] [PASSED] drm_test_drmm_connector_init_null_ddc
[13:37:36] ========= drm_test_drmm_connector_init_type_valid =========
[13:37:36] [PASSED] Unknown
[13:37:36] [PASSED] VGA
[13:37:36] [PASSED] DVI-I
[13:37:36] [PASSED] DVI-D
[13:37:36] [PASSED] DVI-A
[13:37:36] [PASSED] Composite
[13:37:36] [PASSED] SVIDEO
[13:37:36] [PASSED] LVDS
[13:37:36] [PASSED] Component
[13:37:36] [PASSED] DIN
[13:37:36] [PASSED] DP
[13:37:36] [PASSED] HDMI-A
[13:37:36] [PASSED] HDMI-B
[13:37:36] [PASSED] TV
[13:37:36] [PASSED] eDP
[13:37:36] [PASSED] Virtual
[13:37:36] [PASSED] DSI
[13:37:36] [PASSED] DPI
[13:37:36] [PASSED] Writeback
[13:37:36] [PASSED] SPI
[13:37:36] [PASSED] USB
[13:37:36] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[13:37:36] =============== [PASSED] drmm_connector_init ===============
[13:37:36] ========= drm_connector_dynamic_init (6 subtests) ==========
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_init
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_init_properties
[13:37:36] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[13:37:36] [PASSED] Unknown
[13:37:36] [PASSED] VGA
[13:37:36] [PASSED] DVI-I
[13:37:36] [PASSED] DVI-D
[13:37:36] [PASSED] DVI-A
[13:37:36] [PASSED] Composite
[13:37:36] [PASSED] SVIDEO
[13:37:36] [PASSED] LVDS
[13:37:36] [PASSED] Component
[13:37:36] [PASSED] DIN
[13:37:36] [PASSED] DP
[13:37:36] [PASSED] HDMI-A
[13:37:36] [PASSED] HDMI-B
[13:37:36] [PASSED] TV
[13:37:36] [PASSED] eDP
[13:37:36] [PASSED] Virtual
[13:37:36] [PASSED] DSI
[13:37:36] [PASSED] DPI
[13:37:36] [PASSED] Writeback
[13:37:36] [PASSED] SPI
[13:37:36] [PASSED] USB
[13:37:36] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[13:37:36] ======== drm_test_drm_connector_dynamic_init_name =========
[13:37:36] [PASSED] Unknown
[13:37:36] [PASSED] VGA
[13:37:36] [PASSED] DVI-I
[13:37:36] [PASSED] DVI-D
[13:37:36] [PASSED] DVI-A
[13:37:36] [PASSED] Composite
[13:37:36] [PASSED] SVIDEO
[13:37:36] [PASSED] LVDS
[13:37:36] [PASSED] Component
[13:37:36] [PASSED] DIN
[13:37:36] [PASSED] DP
[13:37:36] [PASSED] HDMI-A
[13:37:36] [PASSED] HDMI-B
[13:37:36] [PASSED] TV
[13:37:36] [PASSED] eDP
[13:37:36] [PASSED] Virtual
[13:37:36] [PASSED] DSI
[13:37:36] [PASSED] DPI
[13:37:36] [PASSED] Writeback
[13:37:36] [PASSED] SPI
[13:37:36] [PASSED] USB
[13:37:36] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[13:37:36] =========== [PASSED] drm_connector_dynamic_init ============
[13:37:36] ==== drm_connector_dynamic_register_early (4 subtests) =====
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[13:37:36] ====== [PASSED] drm_connector_dynamic_register_early =======
[13:37:36] ======= drm_connector_dynamic_register (7 subtests) ========
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[13:37:36] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[13:37:36] ========= [PASSED] drm_connector_dynamic_register ==========
[13:37:36] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[13:37:36] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[13:37:36] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[13:37:36] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[13:37:36] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[13:37:36] ========== drm_test_get_tv_mode_from_name_valid ===========
[13:37:36] [PASSED] NTSC
[13:37:36] [PASSED] NTSC-443
[13:37:36] [PASSED] NTSC-J
[13:37:36] [PASSED] PAL
[13:37:36] [PASSED] PAL-M
[13:37:36] [PASSED] PAL-N
[13:37:36] [PASSED] SECAM
[13:37:36] [PASSED] Mono
[13:37:36] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[13:37:36] [PASSED] drm_test_get_tv_mode_from_name_truncated
[13:37:36] ============ [PASSED] drm_get_tv_mode_from_name ============
[13:37:36] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[13:37:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[13:37:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[13:37:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[13:37:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[13:37:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[13:37:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[13:37:36] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[13:37:36] [PASSED] VIC 96
[13:37:36] [PASSED] VIC 97
[13:37:36] [PASSED] VIC 101
[13:37:36] [PASSED] VIC 102
[13:37:36] [PASSED] VIC 106
[13:37:36] [PASSED] VIC 107
[13:37:36] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[13:37:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[13:37:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[13:37:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[13:37:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[13:37:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[13:37:36] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[13:37:36] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[13:37:36] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[13:37:36] [PASSED] Automatic
[13:37:36] [PASSED] Full
[13:37:36] [PASSED] Limited 16:235
[13:37:36] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[13:37:36] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[13:37:36] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[13:37:36] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[13:37:36] === drm_test_drm_hdmi_connector_get_output_format_name ====
[13:37:36] [PASSED] RGB
[13:37:36] [PASSED] YUV 4:2:0
[13:37:36] [PASSED] YUV 4:2:2
[13:37:36] [PASSED] YUV 4:4:4
[13:37:36] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[13:37:36] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[13:37:36] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[13:37:36] ============= drm_damage_helper (21 subtests) ==============
[13:37:36] [PASSED] drm_test_damage_iter_no_damage
[13:37:36] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[13:37:36] [PASSED] drm_test_damage_iter_no_damage_src_moved
[13:37:36] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[13:37:36] [PASSED] drm_test_damage_iter_no_damage_not_visible
[13:37:36] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[13:37:36] [PASSED] drm_test_damage_iter_no_damage_no_fb
[13:37:36] [PASSED] drm_test_damage_iter_simple_damage
[13:37:36] [PASSED] drm_test_damage_iter_single_damage
[13:37:36] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[13:37:36] [PASSED] drm_test_damage_iter_single_damage_outside_src
[13:37:36] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[13:37:36] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[13:37:36] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[13:37:36] [PASSED] drm_test_damage_iter_single_damage_src_moved
[13:37:36] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[13:37:36] [PASSED] drm_test_damage_iter_damage
[13:37:36] [PASSED] drm_test_damage_iter_damage_one_intersect
[13:37:36] [PASSED] drm_test_damage_iter_damage_one_outside
[13:37:36] [PASSED] drm_test_damage_iter_damage_src_moved
[13:37:36] [PASSED] drm_test_damage_iter_damage_not_visible
[13:37:36] ================ [PASSED] drm_damage_helper ================
[13:37:36] ============== drm_dp_mst_helper (3 subtests) ==============
[13:37:36] ============== drm_test_dp_mst_calc_pbn_mode ==============
[13:37:36] [PASSED] Clock 154000 BPP 30 DSC disabled
[13:37:36] [PASSED] Clock 234000 BPP 30 DSC disabled
[13:37:36] [PASSED] Clock 297000 BPP 24 DSC disabled
[13:37:36] [PASSED] Clock 332880 BPP 24 DSC enabled
[13:37:36] [PASSED] Clock 324540 BPP 24 DSC enabled
[13:37:36] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[13:37:36] ============== drm_test_dp_mst_calc_pbn_div ===============
[13:37:36] [PASSED] Link rate 2000000 lane count 4
[13:37:36] [PASSED] Link rate 2000000 lane count 2
[13:37:36] [PASSED] Link rate 2000000 lane count 1
[13:37:36] [PASSED] Link rate 1350000 lane count 4
[13:37:36] [PASSED] Link rate 1350000 lane count 2
[13:37:36] [PASSED] Link rate 1350000 lane count 1
[13:37:36] [PASSED] Link rate 1000000 lane count 4
[13:37:36] [PASSED] Link rate 1000000 lane count 2
[13:37:36] [PASSED] Link rate 1000000 lane count 1
[13:37:36] [PASSED] Link rate 810000 lane count 4
[13:37:36] [PASSED] Link rate 810000 lane count 2
[13:37:36] [PASSED] Link rate 810000 lane count 1
[13:37:36] [PASSED] Link rate 540000 lane count 4
[13:37:36] [PASSED] Link rate 540000 lane count 2
[13:37:36] [PASSED] Link rate 540000 lane count 1
[13:37:36] [PASSED] Link rate 270000 lane count 4
[13:37:36] [PASSED] Link rate 270000 lane count 2
[13:37:36] [PASSED] Link rate 270000 lane count 1
[13:37:36] [PASSED] Link rate 162000 lane count 4
[13:37:36] [PASSED] Link rate 162000 lane count 2
[13:37:36] [PASSED] Link rate 162000 lane count 1
[13:37:36] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[13:37:36] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[13:37:36] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[13:37:36] [PASSED] DP_POWER_UP_PHY with port number
[13:37:36] [PASSED] DP_POWER_DOWN_PHY with port number
[13:37:36] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[13:37:36] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[13:37:36] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[13:37:36] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[13:37:36] [PASSED] DP_QUERY_PAYLOAD with port number
[13:37:36] [PASSED] DP_QUERY_PAYLOAD with VCPI
[13:37:36] [PASSED] DP_REMOTE_DPCD_READ with port number
[13:37:36] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[13:37:36] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[13:37:36] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[13:37:36] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[13:37:36] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[13:37:36] [PASSED] DP_REMOTE_I2C_READ with port number
[13:37:36] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[13:37:36] [PASSED] DP_REMOTE_I2C_READ with transactions array
[13:37:36] [PASSED] DP_REMOTE_I2C_WRITE with port number
[13:37:36] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[13:37:36] [PASSED] DP_REMOTE_I2C_WRITE with data array
[13:37:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[13:37:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[13:37:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[13:37:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[13:37:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[13:37:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[13:37:36] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[13:37:36] ================ [PASSED] drm_dp_mst_helper ================
[13:37:36] ================== drm_exec (7 subtests) ===================
[13:37:36] [PASSED] sanitycheck
[13:37:36] [PASSED] test_lock
[13:37:36] [PASSED] test_lock_unlock
[13:37:36] [PASSED] test_duplicates
[13:37:36] [PASSED] test_prepare
[13:37:36] [PASSED] test_prepare_array
[13:37:36] [PASSED] test_multiple_loops
[13:37:36] ==================== [PASSED] drm_exec =====================
[13:37:36] =========== drm_format_helper_test (17 subtests) ===========
[13:37:36] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[13:37:36] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[13:37:36] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[13:37:36] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[13:37:36] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[13:37:36] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[13:37:36] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[13:37:36] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[13:37:36] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[13:37:36] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[13:37:36] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[13:37:36] ============== drm_test_fb_xrgb8888_to_mono ===============
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[13:37:36] ==================== drm_test_fb_swab =====================
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ================ [PASSED] drm_test_fb_swab =================
[13:37:36] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[13:37:36] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[13:37:36] [PASSED] single_pixel_source_buffer
[13:37:36] [PASSED] single_pixel_clip_rectangle
[13:37:36] [PASSED] well_known_colors
[13:37:36] [PASSED] destination_pitch
[13:37:36] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[13:37:36] ================= drm_test_fb_clip_offset =================
[13:37:36] [PASSED] pass through
[13:37:36] [PASSED] horizontal offset
[13:37:36] [PASSED] vertical offset
[13:37:36] [PASSED] horizontal and vertical offset
[13:37:36] [PASSED] horizontal offset (custom pitch)
[13:37:36] [PASSED] vertical offset (custom pitch)
[13:37:36] [PASSED] horizontal and vertical offset (custom pitch)
[13:37:36] ============= [PASSED] drm_test_fb_clip_offset =============
[13:37:36] =================== drm_test_fb_memcpy ====================
[13:37:36] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[13:37:36] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[13:37:36] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[13:37:36] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[13:37:36] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[13:37:36] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[13:37:36] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[13:37:36] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[13:37:36] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[13:37:36] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[13:37:36] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[13:37:36] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[13:37:36] =============== [PASSED] drm_test_fb_memcpy ================
[13:37:36] ============= [PASSED] drm_format_helper_test ==============
[13:37:36] ================= drm_format (18 subtests) =================
[13:37:36] [PASSED] drm_test_format_block_width_invalid
[13:37:36] [PASSED] drm_test_format_block_width_one_plane
[13:37:36] [PASSED] drm_test_format_block_width_two_plane
[13:37:36] [PASSED] drm_test_format_block_width_three_plane
[13:37:36] [PASSED] drm_test_format_block_width_tiled
[13:37:36] [PASSED] drm_test_format_block_height_invalid
[13:37:36] [PASSED] drm_test_format_block_height_one_plane
[13:37:36] [PASSED] drm_test_format_block_height_two_plane
[13:37:36] [PASSED] drm_test_format_block_height_three_plane
[13:37:36] [PASSED] drm_test_format_block_height_tiled
[13:37:36] [PASSED] drm_test_format_min_pitch_invalid
[13:37:36] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[13:37:36] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[13:37:36] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[13:37:36] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[13:37:36] [PASSED] drm_test_format_min_pitch_two_plane
[13:37:36] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[13:37:36] [PASSED] drm_test_format_min_pitch_tiled
[13:37:36] =================== [PASSED] drm_format ====================
[13:37:36] ============== drm_framebuffer (10 subtests) ===============
[13:37:36] ========== drm_test_framebuffer_check_src_coords ==========
[13:37:36] [PASSED] Success: source fits into fb
[13:37:36] [PASSED] Fail: overflowing fb with x-axis coordinate
[13:37:36] [PASSED] Fail: overflowing fb with y-axis coordinate
[13:37:36] [PASSED] Fail: overflowing fb with source width
[13:37:36] [PASSED] Fail: overflowing fb with source height
[13:37:36] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[13:37:36] [PASSED] drm_test_framebuffer_cleanup
[13:37:36] =============== drm_test_framebuffer_create ===============
[13:37:36] [PASSED] ABGR8888 normal sizes
[13:37:36] [PASSED] ABGR8888 max sizes
[13:37:36] [PASSED] ABGR8888 pitch greater than min required
[13:37:36] [PASSED] ABGR8888 pitch less than min required
[13:37:36] [PASSED] ABGR8888 Invalid width
[13:37:36] [PASSED] ABGR8888 Invalid buffer handle
[13:37:36] [PASSED] No pixel format
[13:37:36] [PASSED] ABGR8888 Width 0
[13:37:36] [PASSED] ABGR8888 Height 0
[13:37:36] [PASSED] ABGR8888 Out of bound height * pitch combination
[13:37:36] [PASSED] ABGR8888 Large buffer offset
[13:37:36] [PASSED] ABGR8888 Buffer offset for inexistent plane
[13:37:36] [PASSED] ABGR8888 Invalid flag
[13:37:36] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[13:37:36] [PASSED] ABGR8888 Valid buffer modifier
[13:37:36] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[13:37:36] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[13:37:36] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[13:37:36] [PASSED] NV12 Normal sizes
[13:37:36] [PASSED] NV12 Max sizes
[13:37:36] [PASSED] NV12 Invalid pitch
[13:37:36] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[13:37:36] [PASSED] NV12 different modifier per-plane
[13:37:36] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[13:37:36] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[13:37:36] [PASSED] NV12 Modifier for inexistent plane
[13:37:36] [PASSED] NV12 Handle for inexistent plane
[13:37:36] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[13:37:36] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[13:37:36] [PASSED] YVU420 Normal sizes
[13:37:36] [PASSED] YVU420 Max sizes
[13:37:36] [PASSED] YVU420 Invalid pitch
[13:37:36] [PASSED] YVU420 Different pitches
[13:37:36] [PASSED] YVU420 Different buffer offsets/pitches
[13:37:36] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[13:37:36] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[13:37:36] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[13:37:36] [PASSED] YVU420 Valid modifier
[13:37:36] [PASSED] YVU420 Different modifiers per plane
[13:37:36] [PASSED] YVU420 Modifier for inexistent plane
[13:37:36] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[13:37:36] [PASSED] X0L2 Normal sizes
[13:37:36] [PASSED] X0L2 Max sizes
[13:37:36] [PASSED] X0L2 Invalid pitch
[13:37:36] [PASSED] X0L2 Pitch greater than minimum required
[13:37:36] [PASSED] X0L2 Handle for inexistent plane
[13:37:36] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[13:37:36] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[13:37:36] [PASSED] X0L2 Valid modifier
[13:37:36] [PASSED] X0L2 Modifier for inexistent plane
[13:37:36] =========== [PASSED] drm_test_framebuffer_create ===========
[13:37:36] [PASSED] drm_test_framebuffer_free
[13:37:36] [PASSED] drm_test_framebuffer_init
[13:37:36] [PASSED] drm_test_framebuffer_init_bad_format
[13:37:36] [PASSED] drm_test_framebuffer_init_dev_mismatch
[13:37:36] [PASSED] drm_test_framebuffer_lookup
[13:37:36] [PASSED] drm_test_framebuffer_lookup_inexistent
[13:37:36] [PASSED] drm_test_framebuffer_modifiers_not_supported
[13:37:36] ================= [PASSED] drm_framebuffer =================
[13:37:36] ================ drm_gem_shmem (8 subtests) ================
[13:37:36] [PASSED] drm_gem_shmem_test_obj_create
[13:37:36] [PASSED] drm_gem_shmem_test_obj_create_private
[13:37:36] [PASSED] drm_gem_shmem_test_pin_pages
[13:37:36] [PASSED] drm_gem_shmem_test_vmap
[13:37:36] [PASSED] drm_gem_shmem_test_get_sg_table
[13:37:36] [PASSED] drm_gem_shmem_test_get_pages_sgt
[13:37:36] [PASSED] drm_gem_shmem_test_madvise
[13:37:36] [PASSED] drm_gem_shmem_test_purge
[13:37:36] ================== [PASSED] drm_gem_shmem ==================
[13:37:36] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[13:37:36] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[13:37:36] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[13:37:36] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[13:37:36] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[13:37:36] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[13:37:36] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[13:37:36] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[13:37:36] [PASSED] Automatic
[13:37:36] [PASSED] Full
[13:37:36] [PASSED] Limited 16:235
[13:37:36] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[13:37:36] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[13:37:36] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[13:37:36] [PASSED] drm_test_check_disable_connector
[13:37:36] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[13:37:36] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[13:37:36] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[13:37:36] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[13:37:36] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[13:37:36] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[13:37:36] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[13:37:36] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[13:37:36] [PASSED] drm_test_check_output_bpc_dvi
[13:37:36] [PASSED] drm_test_check_output_bpc_format_vic_1
[13:37:36] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[13:37:36] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[13:37:36] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[13:37:36] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[13:37:36] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[13:37:36] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[13:37:36] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[13:37:36] ============ drm_test_check_hdmi_color_format =============
[13:37:36] [PASSED] AUTO -> RGB
[13:37:36] [PASSED] YCBCR422 -> YUV422
[13:37:36] [PASSED] YCBCR420 -> YUV420
[13:37:36] [PASSED] YCBCR444 -> YUV444
[13:37:36] [PASSED] RGB -> RGB
[13:37:36] ======== [PASSED] drm_test_check_hdmi_color_format =========
[13:37:36] ======== drm_test_check_hdmi_color_format_420_only ========
[13:37:36] [PASSED] RGB should fail
[13:37:36] [PASSED] YUV444 should fail
[13:37:36] [PASSED] YUV422 should fail
[13:37:36] [PASSED] YUV420 should work
[13:37:36] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[13:37:36] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[13:37:36] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[13:37:36] [PASSED] drm_test_check_broadcast_rgb_value
[13:37:36] [PASSED] drm_test_check_bpc_8_value
[13:37:36] [PASSED] drm_test_check_bpc_10_value
[13:37:36] [PASSED] drm_test_check_bpc_12_value
[13:37:36] [PASSED] drm_test_check_format_value
[13:37:36] [PASSED] drm_test_check_tmds_char_value
[13:37:36] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[13:37:36] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[13:37:36] [PASSED] drm_test_check_mode_valid
[13:37:36] [PASSED] drm_test_check_mode_valid_reject
[13:37:36] [PASSED] drm_test_check_mode_valid_reject_rate
[13:37:36] [PASSED] drm_test_check_mode_valid_reject_max_clock
[13:37:36] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[13:37:36] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[13:37:36] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[13:37:36] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[13:37:36] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[13:37:36] [PASSED] drm_test_check_infoframes
[13:37:36] [PASSED] drm_test_check_reject_avi_infoframe
[13:37:36] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[13:37:36] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[13:37:36] [PASSED] drm_test_check_reject_audio_infoframe
[13:37:36] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[13:37:36] ================= drm_managed (2 subtests) =================
[13:37:36] [PASSED] drm_test_managed_release_action
[13:37:36] [PASSED] drm_test_managed_run_action
[13:37:36] =================== [PASSED] drm_managed ===================
[13:37:36] =================== drm_mm (6 subtests) ====================
[13:37:36] [PASSED] drm_test_mm_init
[13:37:36] [PASSED] drm_test_mm_debug
[13:37:36] [PASSED] drm_test_mm_align32
[13:37:36] [PASSED] drm_test_mm_align64
[13:37:36] [PASSED] drm_test_mm_lowest
[13:37:36] [PASSED] drm_test_mm_highest
[13:37:36] ===================== [PASSED] drm_mm ======================
[13:37:36] ============= drm_modes_analog_tv (5 subtests) =============
[13:37:36] [PASSED] drm_test_modes_analog_tv_mono_576i
[13:37:36] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[13:37:36] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[13:37:36] [PASSED] drm_test_modes_analog_tv_pal_576i
[13:37:36] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[13:37:36] =============== [PASSED] drm_modes_analog_tv ===============
[13:37:36] ============== drm_plane_helper (2 subtests) ===============
[13:37:36] =============== drm_test_check_plane_state ================
[13:37:36] [PASSED] clipping_simple
[13:37:36] [PASSED] clipping_rotate_reflect
[13:37:36] [PASSED] positioning_simple
[13:37:36] [PASSED] upscaling
[13:37:36] [PASSED] downscaling
[13:37:36] [PASSED] rounding1
[13:37:36] [PASSED] rounding2
[13:37:36] [PASSED] rounding3
[13:37:36] [PASSED] rounding4
[13:37:36] =========== [PASSED] drm_test_check_plane_state ============
[13:37:36] =========== drm_test_check_invalid_plane_state ============
[13:37:36] [PASSED] positioning_invalid
[13:37:36] [PASSED] upscaling_invalid
[13:37:36] [PASSED] downscaling_invalid
[13:37:36] ======= [PASSED] drm_test_check_invalid_plane_state ========
[13:37:36] ================ [PASSED] drm_plane_helper =================
[13:37:36] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[13:37:36] ====== drm_test_connector_helper_tv_get_modes_check =======
[13:37:36] [PASSED] None
[13:37:36] [PASSED] PAL
[13:37:36] [PASSED] NTSC
[13:37:36] [PASSED] Both, NTSC Default
[13:37:36] [PASSED] Both, PAL Default
[13:37:36] [PASSED] Both, NTSC Default, with PAL on command-line
[13:37:36] [PASSED] Both, PAL Default, with NTSC on command-line
[13:37:36] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[13:37:36] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[13:37:36] ================== drm_rect (9 subtests) ===================
[13:37:36] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[13:37:36] [PASSED] drm_test_rect_clip_scaled_not_clipped
[13:37:36] [PASSED] drm_test_rect_clip_scaled_clipped
[13:37:36] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[13:37:36] ================= drm_test_rect_intersect =================
[13:37:36] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[13:37:36] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[13:37:36] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[13:37:36] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[13:37:36] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[13:37:36] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[13:37:36] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[13:37:36] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[13:37:36] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[13:37:36] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[13:37:36] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[13:37:36] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[13:37:36] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[13:37:36] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[13:37:36] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[13:37:36] ============= [PASSED] drm_test_rect_intersect =============
[13:37:36] ================ drm_test_rect_calc_hscale ================
[13:37:36] [PASSED] normal use
[13:37:36] [PASSED] out of max range
[13:37:36] [PASSED] out of min range
[13:37:36] [PASSED] zero dst
[13:37:36] [PASSED] negative src
[13:37:36] [PASSED] negative dst
[13:37:36] ============ [PASSED] drm_test_rect_calc_hscale ============
[13:37:36] ================ drm_test_rect_calc_vscale ================
[13:37:36] [PASSED] normal use
[13:37:36] [PASSED] out of max range
[13:37:36] [PASSED] out of min range
[13:37:36] [PASSED] zero dst
[13:37:36] [PASSED] negative src
[13:37:36] [PASSED] negative dst
[13:37:36] ============ [PASSED] drm_test_rect_calc_vscale ============
[13:37:36] ================== drm_test_rect_rotate ===================
[13:37:36] [PASSED] reflect-x
[13:37:36] [PASSED] reflect-y
[13:37:36] [PASSED] rotate-0
[13:37:36] [PASSED] rotate-90
[13:37:36] [PASSED] rotate-180
[13:37:36] [PASSED] rotate-270
[13:37:36] ============== [PASSED] drm_test_rect_rotate ===============
[13:37:36] ================ drm_test_rect_rotate_inv =================
[13:37:36] [PASSED] reflect-x
[13:37:36] [PASSED] reflect-y
[13:37:36] [PASSED] rotate-0
[13:37:36] [PASSED] rotate-90
[13:37:36] [PASSED] rotate-180
[13:37:36] [PASSED] rotate-270
[13:37:36] ============ [PASSED] drm_test_rect_rotate_inv =============
[13:37:36] ==================== [PASSED] drm_rect =====================
[13:37:36] ============ drm_sysfb_modeset_test (1 subtest) ============
[13:37:36] ============ drm_test_sysfb_build_fourcc_list =============
[13:37:36] [PASSED] no native formats
[13:37:36] [PASSED] XRGB8888 as native format
[13:37:36] [PASSED] remove duplicates
[13:37:36] [PASSED] convert alpha formats
[13:37:36] [PASSED] random formats
[13:37:36] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[13:37:36] ============= [PASSED] drm_sysfb_modeset_test ==============
[13:37:36] ================== drm_fixp (2 subtests) ===================
[13:37:36] [PASSED] drm_test_int2fixp
[13:37:36] [PASSED] drm_test_sm2fixp
[13:37:36] ==================== [PASSED] drm_fixp =====================
[13:37:36] ============================================================
[13:37:36] Testing complete. Ran 637 tests: passed: 637
[13:37:36] Elapsed time: 26.733s total, 1.813s configuring, 24.753s building, 0.148s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[13:37:37] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:37:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:37:48] Starting KUnit Kernel (1/1)...
[13:37:48] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:37:48] ================= ttm_device (5 subtests) ==================
[13:37:48] [PASSED] ttm_device_init_basic
[13:37:48] [PASSED] ttm_device_init_multiple
[13:37:48] [PASSED] ttm_device_fini_basic
[13:37:48] [PASSED] ttm_device_init_no_vma_man
[13:37:48] ================== ttm_device_init_pools ==================
[13:37:48] [PASSED] No DMA allocations, no DMA32 required
[13:37:48] [PASSED] DMA allocations, DMA32 required
[13:37:48] [PASSED] No DMA allocations, DMA32 required
[13:37:48] [PASSED] DMA allocations, no DMA32 required
[13:37:48] ============== [PASSED] ttm_device_init_pools ==============
[13:37:48] =================== [PASSED] ttm_device ====================
[13:37:48] ================== ttm_pool (8 subtests) ===================
[13:37:48] ================== ttm_pool_alloc_basic ===================
[13:37:48] [PASSED] One page
[13:37:48] [PASSED] More than one page
[13:37:48] [PASSED] Above the allocation limit
[13:37:48] [PASSED] One page, with coherent DMA mappings enabled
[13:37:48] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:37:48] ============== [PASSED] ttm_pool_alloc_basic ===============
[13:37:48] ============== ttm_pool_alloc_basic_dma_addr ==============
[13:37:48] [PASSED] One page
[13:37:48] [PASSED] More than one page
[13:37:48] [PASSED] Above the allocation limit
[13:37:48] [PASSED] One page, with coherent DMA mappings enabled
[13:37:48] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:37:48] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[13:37:48] [PASSED] ttm_pool_alloc_order_caching_match
[13:37:48] [PASSED] ttm_pool_alloc_caching_mismatch
[13:37:48] [PASSED] ttm_pool_alloc_order_mismatch
[13:37:48] [PASSED] ttm_pool_free_dma_alloc
[13:37:48] [PASSED] ttm_pool_free_no_dma_alloc
[13:37:48] [PASSED] ttm_pool_fini_basic
[13:37:48] ==================== [PASSED] ttm_pool =====================
[13:37:48] ================ ttm_resource (8 subtests) =================
[13:37:48] ================= ttm_resource_init_basic =================
[13:37:48] [PASSED] Init resource in TTM_PL_SYSTEM
[13:37:48] [PASSED] Init resource in TTM_PL_VRAM
[13:37:48] [PASSED] Init resource in a private placement
[13:37:48] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[13:37:48] ============= [PASSED] ttm_resource_init_basic =============
[13:37:48] [PASSED] ttm_resource_init_pinned
[13:37:48] [PASSED] ttm_resource_fini_basic
[13:37:48] [PASSED] ttm_resource_manager_init_basic
[13:37:48] [PASSED] ttm_resource_manager_usage_basic
[13:37:48] [PASSED] ttm_resource_manager_set_used_basic
[13:37:48] [PASSED] ttm_sys_man_alloc_basic
[13:37:48] [PASSED] ttm_sys_man_free_basic
[13:37:48] ================== [PASSED] ttm_resource ===================
[13:37:48] =================== ttm_tt (15 subtests) ===================
[13:37:48] ==================== ttm_tt_init_basic ====================
[13:37:48] [PASSED] Page-aligned size
[13:37:48] [PASSED] Extra pages requested
[13:37:48] ================ [PASSED] ttm_tt_init_basic ================
[13:37:48] [PASSED] ttm_tt_init_misaligned
[13:37:48] [PASSED] ttm_tt_fini_basic
[13:37:48] [PASSED] ttm_tt_fini_sg
[13:37:48] [PASSED] ttm_tt_fini_shmem
[13:37:48] [PASSED] ttm_tt_create_basic
[13:37:48] [PASSED] ttm_tt_create_invalid_bo_type
[13:37:48] [PASSED] ttm_tt_create_ttm_exists
[13:37:48] [PASSED] ttm_tt_create_failed
[13:37:48] [PASSED] ttm_tt_destroy_basic
[13:37:48] [PASSED] ttm_tt_populate_null_ttm
[13:37:48] [PASSED] ttm_tt_populate_populated_ttm
[13:37:48] [PASSED] ttm_tt_unpopulate_basic
[13:37:48] [PASSED] ttm_tt_unpopulate_empty_ttm
[13:37:48] [PASSED] ttm_tt_swapin_basic
[13:37:48] ===================== [PASSED] ttm_tt ======================
[13:37:48] =================== ttm_bo (14 subtests) ===================
[13:37:48] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[13:37:48] [PASSED] Cannot be interrupted and sleeps
[13:37:48] [PASSED] Cannot be interrupted, locks straight away
[13:37:48] [PASSED] Can be interrupted, sleeps
[13:37:48] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[13:37:48] [PASSED] ttm_bo_reserve_locked_no_sleep
[13:37:48] [PASSED] ttm_bo_reserve_no_wait_ticket
[13:37:48] [PASSED] ttm_bo_reserve_double_resv
[13:37:48] [PASSED] ttm_bo_reserve_interrupted
[13:37:48] [PASSED] ttm_bo_reserve_deadlock
[13:37:48] [PASSED] ttm_bo_unreserve_basic
[13:37:48] [PASSED] ttm_bo_unreserve_pinned
[13:37:48] [PASSED] ttm_bo_unreserve_bulk
[13:37:48] [PASSED] ttm_bo_fini_basic
[13:37:48] [PASSED] ttm_bo_fini_shared_resv
[13:37:48] [PASSED] ttm_bo_pin_basic
[13:37:48] [PASSED] ttm_bo_pin_unpin_resource
[13:37:48] [PASSED] ttm_bo_multiple_pin_one_unpin
[13:37:48] ===================== [PASSED] ttm_bo ======================
[13:37:48] ============== ttm_bo_validate (22 subtests) ===============
[13:37:48] ============== ttm_bo_init_reserved_sys_man ===============
[13:37:48] [PASSED] Buffer object for userspace
[13:37:48] [PASSED] Kernel buffer object
[13:37:48] [PASSED] Shared buffer object
[13:37:48] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[13:37:48] ============== ttm_bo_init_reserved_mock_man ==============
[13:37:48] [PASSED] Buffer object for userspace
[13:37:48] [PASSED] Kernel buffer object
[13:37:48] [PASSED] Shared buffer object
[13:37:48] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[13:37:48] [PASSED] ttm_bo_init_reserved_resv
[13:37:48] ================== ttm_bo_validate_basic ==================
[13:37:48] [PASSED] Buffer object for userspace
[13:37:48] [PASSED] Kernel buffer object
[13:37:48] [PASSED] Shared buffer object
[13:37:48] ============== [PASSED] ttm_bo_validate_basic ==============
[13:37:48] [PASSED] ttm_bo_validate_invalid_placement
[13:37:48] ============= ttm_bo_validate_same_placement ==============
[13:37:48] [PASSED] System manager
[13:37:48] [PASSED] VRAM manager
[13:37:48] ========= [PASSED] ttm_bo_validate_same_placement ==========
[13:37:48] [PASSED] ttm_bo_validate_failed_alloc
[13:37:48] [PASSED] ttm_bo_validate_pinned
[13:37:48] [PASSED] ttm_bo_validate_busy_placement
[13:37:48] ================ ttm_bo_validate_multihop =================
[13:37:48] [PASSED] Buffer object for userspace
[13:37:48] [PASSED] Kernel buffer object
[13:37:48] [PASSED] Shared buffer object
[13:37:48] ============ [PASSED] ttm_bo_validate_multihop =============
[13:37:48] ========== ttm_bo_validate_no_placement_signaled ==========
[13:37:48] [PASSED] Buffer object in system domain, no page vector
[13:37:48] [PASSED] Buffer object in system domain with an existing page vector
[13:37:48] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[13:37:48] ======== ttm_bo_validate_no_placement_not_signaled ========
[13:37:48] [PASSED] Buffer object for userspace
[13:37:48] [PASSED] Kernel buffer object
[13:37:48] [PASSED] Shared buffer object
[13:37:48] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[13:37:48] [PASSED] ttm_bo_validate_move_fence_signaled
[13:37:48] ========= ttm_bo_validate_move_fence_not_signaled =========
[13:37:48] [PASSED] Waits for GPU
[13:37:48] [PASSED] Tries to lock straight away
[13:37:48] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[13:37:48] [PASSED] ttm_bo_validate_swapout
[13:37:48] [PASSED] ttm_bo_validate_happy_evict
[13:37:48] [PASSED] ttm_bo_validate_all_pinned_evict
[13:37:48] [PASSED] ttm_bo_validate_allowed_only_evict
[13:37:48] [PASSED] ttm_bo_validate_deleted_evict
[13:37:48] [PASSED] ttm_bo_validate_busy_domain_evict
[13:37:48] [PASSED] ttm_bo_validate_evict_gutting
[13:37:48] [PASSED] ttm_bo_validate_recrusive_evict
[13:37:48] ================= [PASSED] ttm_bo_validate =================
[13:37:48] ============================================================
[13:37:48] Testing complete. Ran 102 tests: passed: 102
[13:37:48] Elapsed time: 11.873s total, 1.786s configuring, 9.822s building, 0.225s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✗ Xe.CI.BAT: failure for drm/xe/ras: Fix invalid health error code
2026-08-04 5:12 [PATCH v1] drm/xe/ras: Fix invalid health error code Raag Jadav
` (3 preceding siblings ...)
2026-08-04 13:37 ` ✓ CI.KUnit: " Patchwork
@ 2026-08-05 5:58 ` Patchwork
2026-08-05 8:25 ` ✓ CI.KUnit: success for drm/xe/ras: Fix invalid health error code (rev2) Patchwork
` (2 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-08-05 5:58 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 371 bytes --]
== Series Details ==
Series: drm/xe/ras: Fix invalid health error code
URL : https://patchwork.freedesktop.org/series/171545/
State : failure
== Summary ==
ERROR: The runconfig 'xe-5525-c2d24e2eda55d74743f0d99a98805bf0b596beef_BAT' does not exist in the database
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v1/index.html
[-- Attachment #2: Type: text/html, Size: 936 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ CI.KUnit: success for drm/xe/ras: Fix invalid health error code (rev2)
2026-08-04 5:12 [PATCH v1] drm/xe/ras: Fix invalid health error code Raag Jadav
` (4 preceding siblings ...)
2026-08-05 5:58 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-08-05 8:25 ` Patchwork
2026-08-05 9:32 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-08-05 16:34 ` ✓ Xe.CI.FULL: success " Patchwork
7 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-08-05 8:25 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
== Series Details ==
Series: drm/xe/ras: Fix invalid health error code (rev2)
URL : https://patchwork.freedesktop.org/series/171545/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[08:24:29] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:24:34] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:25:05] Starting KUnit Kernel (1/1)...
[08:25:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:25:06] ================== guc_buf (11 subtests) ===================
[08:25:06] [PASSED] test_smallest
[08:25:06] [PASSED] test_largest
[08:25:06] [PASSED] test_granular
[08:25:06] [PASSED] test_unique
[08:25:06] [PASSED] test_overlap
[08:25:06] [PASSED] test_reusable
[08:25:06] [PASSED] test_too_big
[08:25:06] [PASSED] test_flush
[08:25:06] [PASSED] test_lookup
[08:25:06] [PASSED] test_data
[08:25:06] [PASSED] test_class
[08:25:06] ===================== [PASSED] guc_buf =====================
[08:25:06] =================== guc_dbm (7 subtests) ===================
[08:25:06] [PASSED] test_empty
[08:25:06] [PASSED] test_default
[08:25:06] ======================== test_size ========================
[08:25:06] [PASSED] 4
[08:25:06] [PASSED] 8
[08:25:06] [PASSED] 32
[08:25:06] [PASSED] 256
[08:25:06] ==================== [PASSED] test_size ====================
[08:25:06] ======================= test_reuse ========================
[08:25:06] [PASSED] 4
[08:25:06] [PASSED] 8
[08:25:06] [PASSED] 32
[08:25:06] [PASSED] 256
[08:25:06] =================== [PASSED] test_reuse ====================
[08:25:06] =================== test_range_overlap ====================
[08:25:06] [PASSED] 4
[08:25:06] [PASSED] 8
[08:25:06] [PASSED] 32
[08:25:06] [PASSED] 256
[08:25:06] =============== [PASSED] test_range_overlap ================
[08:25:06] =================== test_range_compact ====================
[08:25:06] [PASSED] 4
[08:25:06] [PASSED] 8
[08:25:06] [PASSED] 32
[08:25:06] [PASSED] 256
[08:25:06] =============== [PASSED] test_range_compact ================
[08:25:06] ==================== test_range_spare =====================
[08:25:06] [PASSED] 4
[08:25:06] [PASSED] 8
[08:25:06] [PASSED] 32
[08:25:06] [PASSED] 256
[08:25:06] ================ [PASSED] test_range_spare =================
[08:25:06] ===================== [PASSED] guc_dbm =====================
[08:25:06] =================== guc_idm (6 subtests) ===================
[08:25:06] [PASSED] bad_init
[08:25:06] [PASSED] no_init
[08:25:06] [PASSED] init_fini
[08:25:06] [PASSED] check_used
[08:25:06] [PASSED] check_quota
[08:25:06] [PASSED] check_all
[08:25:06] ===================== [PASSED] guc_idm =====================
[08:25:06] =============== guc_klv_helpers (9 subtests) ===============
[08:25:06] [PASSED] test_count
[08:25:06] [PASSED] test_encode_u32
[08:25:06] [PASSED] test_encode_u64
[08:25:06] [PASSED] test_encode_string
[08:25:06] [PASSED] test_encode_object_raw
[08:25:06] [PASSED] test_encode_object_klv
[08:25:06] [PASSED] test_encode_object_nested
[08:25:06] [PASSED] test_encode_object_basic
[08:25:06] [PASSED] test_print
[08:25:06] ================= [PASSED] guc_klv_helpers =================
[08:25:06] ================== no_relay (3 subtests) ===================
[08:25:06] [PASSED] xe_drops_guc2pf_if_not_ready
[08:25:06] [PASSED] xe_drops_guc2vf_if_not_ready
[08:25:06] [PASSED] xe_rejects_send_if_not_ready
[08:25:06] ==================== [PASSED] no_relay =====================
[08:25:06] ================== pf_relay (14 subtests) ==================
[08:25:06] [PASSED] pf_rejects_guc2pf_too_short
[08:25:06] [PASSED] pf_rejects_guc2pf_too_long
[08:25:06] [PASSED] pf_rejects_guc2pf_no_payload
[08:25:06] [PASSED] pf_fails_no_payload
[08:25:06] [PASSED] pf_fails_bad_origin
[08:25:06] [PASSED] pf_fails_bad_type
[08:25:06] [PASSED] pf_txn_reports_error
[08:25:06] [PASSED] pf_txn_sends_pf2guc
[08:25:06] [PASSED] pf_sends_pf2guc
[08:25:06] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:25:06] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:25:06] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:25:06] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:25:06] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:25:06] ==================== [PASSED] pf_relay =====================
[08:25:06] ================== vf_relay (3 subtests) ===================
[08:25:06] [PASSED] vf_rejects_guc2vf_too_short
[08:25:06] [PASSED] vf_rejects_guc2vf_too_long
[08:25:06] [PASSED] vf_rejects_guc2vf_no_payload
[08:25:06] ==================== [PASSED] vf_relay =====================
[08:25:06] ================ pf_gt_config (9 subtests) =================
[08:25:06] [PASSED] fair_contexts_1vf
[08:25:06] [PASSED] fair_doorbells_1vf
[08:25:06] [PASSED] fair_ggtt_1vf
[08:25:06] ====================== fair_vram_1vf ======================
[08:25:06] [PASSED] 3.50 GiB
[08:25:06] [PASSED] 11.5 GiB
[08:25:06] [PASSED] 15.5 GiB
[08:25:06] [PASSED] 31.5 GiB
[08:25:06] [PASSED] 63.5 GiB
[08:25:06] [PASSED] 1.91 GiB
[08:25:06] ================== [PASSED] fair_vram_1vf ==================
[08:25:06] ================ fair_vram_1vf_admin_only =================
[08:25:06] [PASSED] 3.50 GiB
[08:25:06] [PASSED] 11.5 GiB
[08:25:06] [PASSED] 15.5 GiB
[08:25:06] [PASSED] 31.5 GiB
[08:25:06] [PASSED] 63.5 GiB
[08:25:06] [PASSED] 1.91 GiB
[08:25:06] ============ [PASSED] fair_vram_1vf_admin_only =============
[08:25:06] ====================== fair_contexts ======================
[08:25:06] [PASSED] 1 VF
[08:25:06] [PASSED] 2 VFs
[08:25:06] [PASSED] 3 VFs
[08:25:06] [PASSED] 4 VFs
[08:25:06] [PASSED] 5 VFs
[08:25:06] [PASSED] 6 VFs
[08:25:06] [PASSED] 7 VFs
[08:25:06] [PASSED] 8 VFs
[08:25:06] [PASSED] 9 VFs
[08:25:06] [PASSED] 10 VFs
[08:25:06] [PASSED] 11 VFs
[08:25:06] [PASSED] 12 VFs
[08:25:06] [PASSED] 13 VFs
[08:25:06] [PASSED] 14 VFs
[08:25:06] [PASSED] 15 VFs
[08:25:06] [PASSED] 16 VFs
[08:25:06] [PASSED] 17 VFs
[08:25:06] [PASSED] 18 VFs
[08:25:06] [PASSED] 19 VFs
[08:25:06] [PASSED] 20 VFs
[08:25:06] [PASSED] 21 VFs
[08:25:06] [PASSED] 22 VFs
[08:25:06] [PASSED] 23 VFs
[08:25:06] [PASSED] 24 VFs
[08:25:06] [PASSED] 25 VFs
[08:25:06] [PASSED] 26 VFs
[08:25:06] [PASSED] 27 VFs
[08:25:06] [PASSED] 28 VFs
[08:25:06] [PASSED] 29 VFs
[08:25:06] [PASSED] 30 VFs
[08:25:06] [PASSED] 31 VFs
[08:25:06] [PASSED] 32 VFs
[08:25:06] [PASSED] 33 VFs
[08:25:06] [PASSED] 34 VFs
[08:25:06] [PASSED] 35 VFs
[08:25:06] [PASSED] 36 VFs
[08:25:06] [PASSED] 37 VFs
[08:25:06] [PASSED] 38 VFs
[08:25:06] [PASSED] 39 VFs
[08:25:06] [PASSED] 40 VFs
[08:25:06] [PASSED] 41 VFs
[08:25:06] [PASSED] 42 VFs
[08:25:06] [PASSED] 43 VFs
[08:25:06] [PASSED] 44 VFs
[08:25:06] [PASSED] 45 VFs
[08:25:06] [PASSED] 46 VFs
[08:25:06] [PASSED] 47 VFs
[08:25:06] [PASSED] 48 VFs
[08:25:06] [PASSED] 49 VFs
[08:25:06] [PASSED] 50 VFs
[08:25:06] [PASSED] 51 VFs
[08:25:06] [PASSED] 52 VFs
[08:25:06] [PASSED] 53 VFs
[08:25:06] [PASSED] 54 VFs
[08:25:06] [PASSED] 55 VFs
[08:25:06] [PASSED] 56 VFs
[08:25:06] [PASSED] 57 VFs
[08:25:06] [PASSED] 58 VFs
[08:25:06] [PASSED] 59 VFs
[08:25:06] [PASSED] 60 VFs
[08:25:06] [PASSED] 61 VFs
[08:25:06] [PASSED] 62 VFs
[08:25:06] [PASSED] 63 VFs
[08:25:06] ================== [PASSED] fair_contexts ==================
[08:25:06] ===================== fair_doorbells ======================
[08:25:06] [PASSED] 1 VF
[08:25:06] [PASSED] 2 VFs
[08:25:06] [PASSED] 3 VFs
[08:25:06] [PASSED] 4 VFs
[08:25:06] [PASSED] 5 VFs
[08:25:06] [PASSED] 6 VFs
[08:25:06] [PASSED] 7 VFs
[08:25:06] [PASSED] 8 VFs
[08:25:06] [PASSED] 9 VFs
[08:25:06] [PASSED] 10 VFs
[08:25:06] [PASSED] 11 VFs
[08:25:06] [PASSED] 12 VFs
[08:25:06] [PASSED] 13 VFs
[08:25:06] [PASSED] 14 VFs
[08:25:06] [PASSED] 15 VFs
[08:25:06] [PASSED] 16 VFs
[08:25:06] [PASSED] 17 VFs
[08:25:06] [PASSED] 18 VFs
[08:25:06] [PASSED] 19 VFs
[08:25:06] [PASSED] 20 VFs
[08:25:06] [PASSED] 21 VFs
[08:25:06] [PASSED] 22 VFs
[08:25:06] [PASSED] 23 VFs
[08:25:06] [PASSED] 24 VFs
[08:25:06] [PASSED] 25 VFs
[08:25:06] [PASSED] 26 VFs
[08:25:06] [PASSED] 27 VFs
[08:25:06] [PASSED] 28 VFs
[08:25:06] [PASSED] 29 VFs
[08:25:06] [PASSED] 30 VFs
[08:25:06] [PASSED] 31 VFs
[08:25:06] [PASSED] 32 VFs
[08:25:06] [PASSED] 33 VFs
[08:25:06] [PASSED] 34 VFs
[08:25:06] [PASSED] 35 VFs
[08:25:06] [PASSED] 36 VFs
[08:25:06] [PASSED] 37 VFs
[08:25:06] [PASSED] 38 VFs
[08:25:06] [PASSED] 39 VFs
[08:25:06] [PASSED] 40 VFs
[08:25:06] [PASSED] 41 VFs
[08:25:06] [PASSED] 42 VFs
[08:25:06] [PASSED] 43 VFs
[08:25:06] [PASSED] 44 VFs
[08:25:06] [PASSED] 45 VFs
[08:25:06] [PASSED] 46 VFs
[08:25:06] [PASSED] 47 VFs
[08:25:06] [PASSED] 48 VFs
[08:25:06] [PASSED] 49 VFs
[08:25:06] [PASSED] 50 VFs
[08:25:06] [PASSED] 51 VFs
[08:25:06] [PASSED] 52 VFs
[08:25:06] [PASSED] 53 VFs
[08:25:06] [PASSED] 54 VFs
[08:25:06] [PASSED] 55 VFs
[08:25:06] [PASSED] 56 VFs
[08:25:06] [PASSED] 57 VFs
[08:25:06] [PASSED] 58 VFs
[08:25:06] [PASSED] 59 VFs
[08:25:06] [PASSED] 60 VFs
[08:25:06] [PASSED] 61 VFs
[08:25:06] [PASSED] 62 VFs
[08:25:06] [PASSED] 63 VFs
[08:25:06] ================= [PASSED] fair_doorbells ==================
[08:25:06] ======================== fair_ggtt ========================
[08:25:06] [PASSED] 1 VF
[08:25:06] [PASSED] 2 VFs
[08:25:06] [PASSED] 3 VFs
[08:25:06] [PASSED] 4 VFs
[08:25:06] [PASSED] 5 VFs
[08:25:06] [PASSED] 6 VFs
[08:25:06] [PASSED] 7 VFs
[08:25:06] [PASSED] 8 VFs
[08:25:06] [PASSED] 9 VFs
[08:25:06] [PASSED] 10 VFs
[08:25:06] [PASSED] 11 VFs
[08:25:06] [PASSED] 12 VFs
[08:25:06] [PASSED] 13 VFs
[08:25:06] [PASSED] 14 VFs
[08:25:06] [PASSED] 15 VFs
[08:25:06] [PASSED] 16 VFs
[08:25:06] [PASSED] 17 VFs
[08:25:06] [PASSED] 18 VFs
[08:25:06] [PASSED] 19 VFs
[08:25:06] [PASSED] 20 VFs
[08:25:06] [PASSED] 21 VFs
[08:25:06] [PASSED] 22 VFs
[08:25:06] [PASSED] 23 VFs
[08:25:06] [PASSED] 24 VFs
[08:25:06] [PASSED] 25 VFs
[08:25:06] [PASSED] 26 VFs
[08:25:06] [PASSED] 27 VFs
[08:25:06] [PASSED] 28 VFs
[08:25:06] [PASSED] 29 VFs
[08:25:06] [PASSED] 30 VFs
[08:25:06] [PASSED] 31 VFs
[08:25:06] [PASSED] 32 VFs
[08:25:06] [PASSED] 33 VFs
[08:25:06] [PASSED] 34 VFs
[08:25:06] [PASSED] 35 VFs
[08:25:06] [PASSED] 36 VFs
[08:25:06] [PASSED] 37 VFs
[08:25:06] [PASSED] 38 VFs
[08:25:06] [PASSED] 39 VFs
[08:25:06] [PASSED] 40 VFs
[08:25:06] [PASSED] 41 VFs
[08:25:06] [PASSED] 42 VFs
[08:25:06] [PASSED] 43 VFs
[08:25:06] [PASSED] 44 VFs
[08:25:06] [PASSED] 45 VFs
[08:25:06] [PASSED] 46 VFs
[08:25:06] [PASSED] 47 VFs
[08:25:06] [PASSED] 48 VFs
[08:25:06] [PASSED] 49 VFs
[08:25:06] [PASSED] 50 VFs
[08:25:06] [PASSED] 51 VFs
[08:25:06] [PASSED] 52 VFs
[08:25:06] [PASSED] 53 VFs
[08:25:06] [PASSED] 54 VFs
[08:25:06] [PASSED] 55 VFs
[08:25:06] [PASSED] 56 VFs
[08:25:06] [PASSED] 57 VFs
[08:25:06] [PASSED] 58 VFs
[08:25:06] [PASSED] 59 VFs
[08:25:06] [PASSED] 60 VFs
[08:25:06] [PASSED] 61 VFs
[08:25:06] [PASSED] 62 VFs
[08:25:06] [PASSED] 63 VFs
[08:25:06] ==================== [PASSED] fair_ggtt ====================
[08:25:06] ======================== fair_vram ========================
[08:25:06] [PASSED] 1 VF
[08:25:06] [PASSED] 2 VFs
[08:25:06] [PASSED] 3 VFs
[08:25:06] [PASSED] 4 VFs
[08:25:06] [PASSED] 5 VFs
[08:25:06] [PASSED] 6 VFs
[08:25:06] [PASSED] 7 VFs
[08:25:06] [PASSED] 8 VFs
[08:25:06] [PASSED] 9 VFs
[08:25:06] [PASSED] 10 VFs
[08:25:06] [PASSED] 11 VFs
[08:25:06] [PASSED] 12 VFs
[08:25:06] [PASSED] 13 VFs
[08:25:06] [PASSED] 14 VFs
[08:25:06] [PASSED] 15 VFs
[08:25:06] [PASSED] 16 VFs
[08:25:06] [PASSED] 17 VFs
[08:25:06] [PASSED] 18 VFs
[08:25:06] [PASSED] 19 VFs
[08:25:06] [PASSED] 20 VFs
[08:25:06] [PASSED] 21 VFs
[08:25:06] [PASSED] 22 VFs
[08:25:06] [PASSED] 23 VFs
[08:25:06] [PASSED] 24 VFs
[08:25:06] [PASSED] 25 VFs
[08:25:06] [PASSED] 26 VFs
[08:25:06] [PASSED] 27 VFs
[08:25:06] [PASSED] 28 VFs
[08:25:06] [PASSED] 29 VFs
[08:25:06] [PASSED] 30 VFs
[08:25:06] [PASSED] 31 VFs
[08:25:06] [PASSED] 32 VFs
[08:25:06] [PASSED] 33 VFs
[08:25:06] [PASSED] 34 VFs
[08:25:06] [PASSED] 35 VFs
[08:25:06] [PASSED] 36 VFs
[08:25:06] [PASSED] 37 VFs
[08:25:06] [PASSED] 38 VFs
[08:25:06] [PASSED] 39 VFs
[08:25:06] [PASSED] 40 VFs
[08:25:06] [PASSED] 41 VFs
[08:25:06] [PASSED] 42 VFs
[08:25:06] [PASSED] 43 VFs
[08:25:06] [PASSED] 44 VFs
[08:25:06] [PASSED] 45 VFs
[08:25:06] [PASSED] 46 VFs
[08:25:06] [PASSED] 47 VFs
[08:25:06] [PASSED] 48 VFs
[08:25:06] [PASSED] 49 VFs
[08:25:06] [PASSED] 50 VFs
[08:25:06] [PASSED] 51 VFs
[08:25:06] [PASSED] 52 VFs
[08:25:06] [PASSED] 53 VFs
[08:25:06] [PASSED] 54 VFs
[08:25:06] [PASSED] 55 VFs
[08:25:06] [PASSED] 56 VFs
[08:25:06] [PASSED] 57 VFs
[08:25:06] [PASSED] 58 VFs
[08:25:06] [PASSED] 59 VFs
[08:25:06] [PASSED] 60 VFs
[08:25:06] [PASSED] 61 VFs
[08:25:06] [PASSED] 62 VFs
[08:25:06] [PASSED] 63 VFs
[08:25:06] ==================== [PASSED] fair_vram ====================
[08:25:06] ================== [PASSED] pf_gt_config ===================
[08:25:06] ===================== lmtt (1 subtest) =====================
[08:25:06] ======================== test_ops =========================
[08:25:06] [PASSED] 2-level
[08:25:06] [PASSED] multi-level
[08:25:06] ==================== [PASSED] test_ops =====================
[08:25:06] ====================== [PASSED] lmtt =======================
[08:25:06] ================= sriov_packet (1 subtest) =================
[08:25:06] [PASSED] test_descriptor_init
[08:25:06] ================== [PASSED] sriov_packet ===================
[08:25:06] ================= pf_service (11 subtests) =================
[08:25:06] [PASSED] pf_negotiate_any
[08:25:06] [PASSED] pf_negotiate_base_match
[08:25:06] [PASSED] pf_negotiate_base_newer
[08:25:06] [PASSED] pf_negotiate_base_next
[08:25:06] [SKIPPED] pf_negotiate_base_older (no older minor)
[08:25:06] [PASSED] pf_negotiate_base_prev
[08:25:06] [PASSED] pf_negotiate_latest_match
[08:25:06] [PASSED] pf_negotiate_latest_newer
[08:25:06] [PASSED] pf_negotiate_latest_next
[08:25:06] [SKIPPED] pf_negotiate_latest_older (no older minor)
[08:25:06] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[08:25:06] =================== [PASSED] pf_service ====================
[08:25:06] ================= xe_guc_g2g (2 subtests) ==================
[08:25:06] ============== xe_live_guc_g2g_kunit_default ==============
[08:25:06] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[08:25:06] ============== xe_live_guc_g2g_kunit_allmem ===============
[08:25:06] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[08:25:06] =================== [SKIPPED] xe_guc_g2g ===================
[08:25:06] =================== xe_mocs (2 subtests) ===================
[08:25:06] ================ xe_live_mocs_kernel_kunit ================
[08:25:06] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[08:25:06] ================ xe_live_mocs_reset_kunit =================
[08:25:06] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[08:25:06] ==================== [SKIPPED] xe_mocs =====================
[08:25:06] ================= xe_migrate (2 subtests) ==================
[08:25:06] ================= xe_migrate_sanity_kunit =================
[08:25:06] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[08:25:06] ================== xe_validate_ccs_kunit ==================
[08:25:06] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[08:25:06] =================== [SKIPPED] xe_migrate ===================
[08:25:06] ================== xe_dma_buf (1 subtest) ==================
[08:25:06] ==================== xe_dma_buf_kunit =====================
[08:25:06] ================ [SKIPPED] xe_dma_buf_kunit ================
[08:25:06] =================== [SKIPPED] xe_dma_buf ===================
[08:25:06] ================= xe_bo_shrink (1 subtest) =================
[08:25:06] =================== xe_bo_shrink_kunit ====================
[08:25:06] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[08:25:06] ================== [SKIPPED] xe_bo_shrink ==================
[08:25:06] ==================== xe_bo (2 subtests) ====================
[08:25:06] ================== xe_ccs_migrate_kunit ===================
[08:25:06] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[08:25:06] ==================== xe_bo_evict_kunit ====================
[08:25:06] =============== [SKIPPED] xe_bo_evict_kunit ================
[08:25:06] ===================== [SKIPPED] xe_bo ======================
[08:25:06] ==================== args (13 subtests) ====================
[08:25:06] [PASSED] count_args_test
[08:25:06] [PASSED] call_args_example
[08:25:06] [PASSED] call_args_test
[08:25:06] [PASSED] drop_first_arg_example
[08:25:06] [PASSED] drop_first_arg_test
[08:25:06] [PASSED] first_arg_example
[08:25:06] [PASSED] first_arg_test
[08:25:06] [PASSED] last_arg_example
[08:25:06] [PASSED] last_arg_test
[08:25:06] [PASSED] pick_arg_example
[08:25:06] [PASSED] if_args_example
[08:25:06] [PASSED] if_args_test
[08:25:06] [PASSED] sep_comma_example
[08:25:06] ====================== [PASSED] args =======================
[08:25:06] =================== xe_pci (3 subtests) ====================
[08:25:06] ==================== check_graphics_ip ====================
[08:25:06] [PASSED] 12.00 Xe_LP
[08:25:06] [PASSED] 12.10 Xe_LP+
[08:25:06] [PASSED] 12.55 Xe_HPG
[08:25:06] [PASSED] 12.60 Xe_HPC
[08:25:06] [PASSED] 12.70 Xe_LPG
[08:25:06] [PASSED] 12.71 Xe_LPG
[08:25:06] [PASSED] 12.74 Xe_LPG+
[08:25:06] [PASSED] 20.01 Xe2_HPG
[08:25:06] [PASSED] 20.02 Xe2_HPG
[08:25:06] [PASSED] 20.04 Xe2_LPG
[08:25:06] [PASSED] 30.00 Xe3_LPG
[08:25:06] [PASSED] 30.01 Xe3_LPG
[08:25:06] [PASSED] 30.03 Xe3_LPG
[08:25:06] [PASSED] 30.04 Xe3_LPG
[08:25:06] [PASSED] 30.05 Xe3_LPG
[08:25:06] [PASSED] 35.10 Xe3p_LPG
[08:25:06] [PASSED] 35.11 Xe3p_XPC
[08:25:06] ================ [PASSED] check_graphics_ip ================
[08:25:06] ===================== check_media_ip ======================
[08:25:06] [PASSED] 12.00 Xe_M
[08:25:06] [PASSED] 12.55 Xe_HPM
[08:25:06] [PASSED] 13.00 Xe_LPM+
[08:25:06] [PASSED] 13.01 Xe2_HPM
[08:25:06] [PASSED] 20.00 Xe2_LPM
[08:25:06] [PASSED] 30.00 Xe3_LPM
[08:25:06] [PASSED] 30.02 Xe3_LPM
[08:25:06] [PASSED] 35.00 Xe3p_LPM
[08:25:06] [PASSED] 35.03 Xe3p_HPM
[08:25:06] ================= [PASSED] check_media_ip ==================
[08:25:06] =================== check_platform_desc ===================
[08:25:06] [PASSED] 0x9A60 (TIGERLAKE)
[08:25:06] [PASSED] 0x9A68 (TIGERLAKE)
[08:25:06] [PASSED] 0x9A70 (TIGERLAKE)
[08:25:06] [PASSED] 0x9A40 (TIGERLAKE)
[08:25:06] [PASSED] 0x9A49 (TIGERLAKE)
[08:25:06] [PASSED] 0x9A59 (TIGERLAKE)
[08:25:06] [PASSED] 0x9A78 (TIGERLAKE)
[08:25:06] [PASSED] 0x9AC0 (TIGERLAKE)
[08:25:06] [PASSED] 0x9AC9 (TIGERLAKE)
[08:25:06] [PASSED] 0x9AD9 (TIGERLAKE)
[08:25:06] [PASSED] 0x9AF8 (TIGERLAKE)
[08:25:06] [PASSED] 0x4C80 (ROCKETLAKE)
[08:25:06] [PASSED] 0x4C8A (ROCKETLAKE)
[08:25:06] [PASSED] 0x4C8B (ROCKETLAKE)
[08:25:06] [PASSED] 0x4C8C (ROCKETLAKE)
[08:25:06] [PASSED] 0x4C90 (ROCKETLAKE)
[08:25:06] [PASSED] 0x4C9A (ROCKETLAKE)
[08:25:06] [PASSED] 0x4680 (ALDERLAKE_S)
[08:25:06] [PASSED] 0x4682 (ALDERLAKE_S)
[08:25:06] [PASSED] 0x4688 (ALDERLAKE_S)
[08:25:06] [PASSED] 0x468A (ALDERLAKE_S)
[08:25:06] [PASSED] 0x468B (ALDERLAKE_S)
[08:25:06] [PASSED] 0x4690 (ALDERLAKE_S)
[08:25:06] [PASSED] 0x4692 (ALDERLAKE_S)
[08:25:06] [PASSED] 0x4693 (ALDERLAKE_S)
[08:25:06] [PASSED] 0x46A0 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46A1 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46A2 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46A3 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46A6 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46A8 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46AA (ALDERLAKE_P)
[08:25:06] [PASSED] 0x462A (ALDERLAKE_P)
[08:25:06] [PASSED] 0x4626 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x4628 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46B0 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46B1 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46B2 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46B3 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46C0 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46C1 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46C2 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46C3 (ALDERLAKE_P)
[08:25:06] [PASSED] 0x46D0 (ALDERLAKE_N)
[08:25:06] [PASSED] 0x46D1 (ALDERLAKE_N)
[08:25:06] [PASSED] 0x46D2 (ALDERLAKE_N)
[08:25:06] [PASSED] 0x46D3 (ALDERLAKE_N)
[08:25:06] [PASSED] 0x46D4 (ALDERLAKE_N)
[08:25:06] [PASSED] 0xA721 (ALDERLAKE_P)
[08:25:06] [PASSED] 0xA7A1 (ALDERLAKE_P)
[08:25:06] [PASSED] 0xA7A9 (ALDERLAKE_P)
[08:25:06] [PASSED] 0xA7AC (ALDERLAKE_P)
[08:25:06] [PASSED] 0xA7AD (ALDERLAKE_P)
[08:25:06] [PASSED] 0xA720 (ALDERLAKE_P)
[08:25:06] [PASSED] 0xA7A0 (ALDERLAKE_P)
[08:25:06] [PASSED] 0xA7A8 (ALDERLAKE_P)
[08:25:06] [PASSED] 0xA7AA (ALDERLAKE_P)
[08:25:06] [PASSED] 0xA7AB (ALDERLAKE_P)
[08:25:06] [PASSED] 0xA780 (ALDERLAKE_S)
[08:25:06] [PASSED] 0xA781 (ALDERLAKE_S)
[08:25:06] [PASSED] 0xA782 (ALDERLAKE_S)
[08:25:06] [PASSED] 0xA783 (ALDERLAKE_S)
[08:25:06] [PASSED] 0xA788 (ALDERLAKE_S)
[08:25:06] [PASSED] 0xA789 (ALDERLAKE_S)
[08:25:06] [PASSED] 0xA78A (ALDERLAKE_S)
[08:25:06] [PASSED] 0xA78B (ALDERLAKE_S)
[08:25:06] [PASSED] 0x4905 (DG1)
[08:25:06] [PASSED] 0x4906 (DG1)
[08:25:06] [PASSED] 0x4907 (DG1)
[08:25:06] [PASSED] 0x4908 (DG1)
[08:25:06] [PASSED] 0x4909 (DG1)
[08:25:06] [PASSED] 0x56C0 (DG2)
[08:25:06] [PASSED] 0x56C2 (DG2)
[08:25:06] [PASSED] 0x56C1 (DG2)
[08:25:06] [PASSED] 0x7D51 (METEORLAKE)
[08:25:06] [PASSED] 0x7DD1 (METEORLAKE)
[08:25:06] [PASSED] 0x7D41 (METEORLAKE)
[08:25:06] [PASSED] 0x7D67 (METEORLAKE)
[08:25:06] [PASSED] 0xB640 (METEORLAKE)
[08:25:06] [PASSED] 0x56A0 (DG2)
[08:25:06] [PASSED] 0x56A1 (DG2)
[08:25:06] [PASSED] 0x56A2 (DG2)
[08:25:06] [PASSED] 0x56BE (DG2)
[08:25:06] [PASSED] 0x56BF (DG2)
[08:25:06] [PASSED] 0x5690 (DG2)
[08:25:06] [PASSED] 0x5691 (DG2)
[08:25:06] [PASSED] 0x5692 (DG2)
[08:25:06] [PASSED] 0x56A5 (DG2)
[08:25:06] [PASSED] 0x56A6 (DG2)
[08:25:06] [PASSED] 0x56B0 (DG2)
[08:25:06] [PASSED] 0x56B1 (DG2)
[08:25:06] [PASSED] 0x56BA (DG2)
[08:25:06] [PASSED] 0x56BB (DG2)
[08:25:06] [PASSED] 0x56BC (DG2)
[08:25:06] [PASSED] 0x56BD (DG2)
[08:25:06] [PASSED] 0x5693 (DG2)
[08:25:06] [PASSED] 0x5694 (DG2)
[08:25:06] [PASSED] 0x5695 (DG2)
[08:25:06] [PASSED] 0x56A3 (DG2)
[08:25:06] [PASSED] 0x56A4 (DG2)
[08:25:06] [PASSED] 0x56B2 (DG2)
[08:25:06] [PASSED] 0x56B3 (DG2)
[08:25:06] [PASSED] 0x5696 (DG2)
[08:25:06] [PASSED] 0x5697 (DG2)
[08:25:06] [PASSED] 0xB69 (PVC)
[08:25:06] [PASSED] 0xB6E (PVC)
[08:25:06] [PASSED] 0xBD4 (PVC)
[08:25:06] [PASSED] 0xBD5 (PVC)
[08:25:06] [PASSED] 0xBD6 (PVC)
[08:25:06] [PASSED] 0xBD7 (PVC)
[08:25:06] [PASSED] 0xBD8 (PVC)
[08:25:06] [PASSED] 0xBD9 (PVC)
[08:25:06] [PASSED] 0xBDA (PVC)
[08:25:06] [PASSED] 0xBDB (PVC)
[08:25:06] [PASSED] 0xBE0 (PVC)
[08:25:06] [PASSED] 0xBE1 (PVC)
[08:25:06] [PASSED] 0xBE5 (PVC)
[08:25:06] [PASSED] 0x7D40 (METEORLAKE)
[08:25:06] [PASSED] 0x7D45 (METEORLAKE)
[08:25:06] [PASSED] 0x7D55 (METEORLAKE)
[08:25:06] [PASSED] 0x7D60 (METEORLAKE)
[08:25:06] [PASSED] 0x7DD5 (METEORLAKE)
[08:25:06] [PASSED] 0x6420 (LUNARLAKE)
[08:25:06] [PASSED] 0x64A0 (LUNARLAKE)
[08:25:06] [PASSED] 0x64B0 (LUNARLAKE)
[08:25:06] [PASSED] 0xE202 (BATTLEMAGE)
[08:25:06] [PASSED] 0xE209 (BATTLEMAGE)
[08:25:06] [PASSED] 0xE20B (BATTLEMAGE)
[08:25:06] [PASSED] 0xE20C (BATTLEMAGE)
[08:25:06] [PASSED] 0xE20D (BATTLEMAGE)
[08:25:06] [PASSED] 0xE210 (BATTLEMAGE)
[08:25:06] [PASSED] 0xE211 (BATTLEMAGE)
[08:25:06] [PASSED] 0xE212 (BATTLEMAGE)
[08:25:06] [PASSED] 0xE216 (BATTLEMAGE)
[08:25:06] [PASSED] 0xE220 (BATTLEMAGE)
[08:25:06] [PASSED] 0xE221 (BATTLEMAGE)
[08:25:06] [PASSED] 0xE222 (BATTLEMAGE)
[08:25:06] [PASSED] 0xE223 (BATTLEMAGE)
[08:25:06] [PASSED] 0xB080 (PANTHERLAKE)
[08:25:06] [PASSED] 0xB081 (PANTHERLAKE)
[08:25:06] [PASSED] 0xB082 (PANTHERLAKE)
[08:25:06] [PASSED] 0xB083 (PANTHERLAKE)
[08:25:06] [PASSED] 0xB084 (PANTHERLAKE)
[08:25:06] [PASSED] 0xB085 (PANTHERLAKE)
[08:25:06] [PASSED] 0xB086 (PANTHERLAKE)
[08:25:06] [PASSED] 0xB087 (PANTHERLAKE)
[08:25:06] [PASSED] 0xB08F (PANTHERLAKE)
[08:25:06] [PASSED] 0xB090 (PANTHERLAKE)
[08:25:06] [PASSED] 0xB0A0 (PANTHERLAKE)
[08:25:06] [PASSED] 0xB0B0 (PANTHERLAKE)
[08:25:06] [PASSED] 0xFD80 (PANTHERLAKE)
[08:25:06] [PASSED] 0xFD81 (PANTHERLAKE)
[08:25:06] [PASSED] 0xD740 (NOVALAKE_S)
[08:25:06] [PASSED] 0xD741 (NOVALAKE_S)
[08:25:06] [PASSED] 0xD742 (NOVALAKE_S)
[08:25:06] [PASSED] 0xD743 (NOVALAKE_S)
[08:25:06] [PASSED] 0xD745 (NOVALAKE_S)
[08:25:06] [PASSED] 0xD74A (NOVALAKE_S)
[08:25:06] [PASSED] 0xD74B (NOVALAKE_S)
[08:25:06] [PASSED] 0x674C (CRESCENTISLAND)
[08:25:06] [PASSED] 0x674D (CRESCENTISLAND)
[08:25:06] [PASSED] 0x674E (CRESCENTISLAND)
[08:25:06] [PASSED] 0x674F (CRESCENTISLAND)
[08:25:06] [PASSED] 0x6750 (CRESCENTISLAND)
[08:25:06] [PASSED] 0xD750 (NOVALAKE_P)
[08:25:06] [PASSED] 0xD751 (NOVALAKE_P)
[08:25:06] [PASSED] 0xD752 (NOVALAKE_P)
[08:25:06] [PASSED] 0xD753 (NOVALAKE_P)
[08:25:06] [PASSED] 0xD754 (NOVALAKE_P)
[08:25:06] [PASSED] 0xD755 (NOVALAKE_P)
[08:25:06] [PASSED] 0xD756 (NOVALAKE_P)
[08:25:06] [PASSED] 0xD757 (NOVALAKE_P)
[08:25:06] [PASSED] 0xD75F (NOVALAKE_P)
[08:25:06] =============== [PASSED] check_platform_desc ===============
[08:25:06] ===================== [PASSED] xe_pci ======================
[08:25:06] ============= xe_rtp_tables_test (5 subtests) ==============
[08:25:06] ================== xe_rtp_table_gt_test ===================
[08:25:06] [PASSED] gt_was/14011060649
[08:25:06] [PASSED] gt_was/14011059788
[08:25:06] [PASSED] gt_was/14015795083
[08:25:06] [PASSED] gt_was/16021867713
[08:25:06] [PASSED] gt_was/14019449301
[08:25:06] [PASSED] gt_was/16028005424
[08:25:06] [PASSED] gt_was/14026578760
[08:25:06] [PASSED] gt_was/1409420604
[08:25:06] [PASSED] gt_was/1408615072
[08:25:06] [PASSED] gt_was/22010523718
[08:25:06] [PASSED] gt_was/14011006942
[08:25:06] [PASSED] gt_was/14014830051
[08:25:06] [PASSED] gt_was/18018781329
[08:25:06] [PASSED] gt_was/1509235366
[08:25:06] [PASSED] gt_was/18018781329
[08:25:06] [PASSED] gt_was/16016694945
[08:25:06] [PASSED] gt_was/14018575942
[08:25:06] [PASSED] gt_was/22016670082
[08:25:06] [PASSED] gt_was/22016670082
[08:25:06] [PASSED] gt_was/14017421178
[08:25:06] [PASSED] gt_was/16025250150
[08:25:06] [PASSED] gt_was/14021871409
[08:25:06] [PASSED] gt_was/16021865536
[08:25:06] [PASSED] gt_was/14021486841
[08:25:06] [PASSED] gt_was/14025160223
[08:25:06] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[08:25:06] [PASSED] gt_was/14025635424
[08:25:06] [PASSED] gt_was/16028005424
[08:25:06] ============== [PASSED] xe_rtp_table_gt_test ===============
[08:25:06] ================== xe_rtp_table_gt_test ===================
[08:25:06] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[08:25:06] [PASSED] gt_tunings/Tuning: 32B Access Enable
[08:25:06] [PASSED] gt_tunings/Tuning: L3 cache
[08:25:06] [PASSED] gt_tunings/Tuning: L3 cache - media
[08:25:06] [PASSED] gt_tunings/Tuning: Compression Overfetch
[08:25:06] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[08:25:06] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[08:25:06] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[08:25:06] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[08:25:06] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[08:25:06] [PASSED] gt_tunings/Tuning: Stateless compression control
[08:25:06] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[08:25:06] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[08:25:06] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[08:25:06] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[08:25:06] ============== [PASSED] xe_rtp_table_gt_test ===============
[08:25:06] ================== xe_rtp_table_oob_test ==================
[08:25:06] [PASSED] oob_was/1607983814
[08:25:06] [PASSED] oob_was/16010904313
[08:25:06] [PASSED] oob_was/18022495364
[08:25:06] [PASSED] oob_was/22012773006
[08:25:06] [PASSED] oob_was/14014475959
[08:25:06] [PASSED] oob_was/22011391025
[08:25:06] [PASSED] oob_was/22012727170
[08:25:06] [PASSED] oob_was/22012727685
[08:25:06] [PASSED] oob_was/22016596838
[08:25:06] [PASSED] oob_was/18020744125
[08:25:06] [PASSED] oob_was/1409600907
[08:25:06] [PASSED] oob_was/22014953428
[08:25:06] [PASSED] oob_was/16017236439
[08:25:06] [PASSED] oob_was/14019821291
[08:25:06] [PASSED] oob_was/14015076503
[08:25:06] [PASSED] oob_was/14018913170
[08:25:06] [PASSED] oob_was/14018094691
[08:25:06] [PASSED] oob_was/18024947630
[08:25:06] [PASSED] oob_was/16022287689
[08:25:06] [PASSED] oob_was/13011645652
[08:25:06] [PASSED] oob_was/14022293748
[08:25:06] [PASSED] oob_was/22019794406
[08:25:06] [PASSED] oob_was/22019338487
[08:25:06] [PASSED] oob_was/16023588340
[08:25:06] [PASSED] oob_was/14019789679
[08:25:06] [PASSED] oob_was/14022866841
[08:25:06] [PASSED] oob_was/16021333562
[08:25:06] [PASSED] oob_was/14016712196
[08:25:06] [PASSED] oob_was/14015568240
[08:25:06] [PASSED] oob_was/18013179988
[08:25:06] [PASSED] oob_was/1508761755
[08:25:06] [PASSED] oob_was/16023105232
[08:25:06] [PASSED] oob_was/16026508708
[08:25:06] [PASSED] oob_was/14020001231
[08:25:06] [PASSED] oob_was/16023683509
[08:25:06] [PASSED] oob_was/14025515070
[08:25:06] [PASSED] oob_was/15015404425_disable
[08:25:06] [PASSED] oob_was/16026007364
[08:25:06] [PASSED] oob_was/14020316580
[08:25:06] [PASSED] oob_was/14025883347
[08:25:06] [PASSED] oob_was/16029380221
[08:25:06] [PASSED] oob_was/22022079272
[08:25:06] [PASSED] oob_was/16029897822
[08:25:06] [PASSED] oob_was/14027054324
[08:25:06] ============== [PASSED] xe_rtp_table_oob_test ==============
[08:25:06] ================ xe_rtp_table_dev_oob_test ================
[08:25:06] [PASSED] device_oob_was/22010954014
[08:25:06] [PASSED] device_oob_was/15015404425
[08:25:06] [PASSED] device_oob_was/22019338487_display
[08:25:06] [PASSED] device_oob_was/14022085890
[08:25:06] [PASSED] device_oob_was/14026539277
[08:25:06] [PASSED] device_oob_was/14026633728
[08:25:06] [PASSED] device_oob_was/14026746987
[08:25:06] [PASSED] device_oob_was/14026779378
[08:25:06] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[08:25:06] ========== xe_rtp_table_missing_upper_bound_test ==========
[08:25:06] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[08:25:06] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[08:25:06] [PASSED] register_whitelist/1806527549
[08:25:06] [PASSED] register_whitelist/allow_read_ctx_timestamp
[08:25:06] [PASSED] register_whitelist/allow_read_queue_timestamp
[08:25:06] [PASSED] register_whitelist/16014440446
[08:25:06] [PASSED] register_whitelist/16017236439
[08:25:06] [PASSED] register_whitelist/16020183090
[08:25:06] [PASSED] register_whitelist/14024997852
[08:25:06] [PASSED] register_whitelist/14024997852
[08:25:06] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[08:25:06] =============== [PASSED] xe_rtp_tables_test ================
[08:25:06] =================== xe_rtp (3 subtests) ====================
[08:25:06] =================== xe_rtp_rules_tests ====================
[08:25:06] [PASSED] no
[08:25:06] [PASSED] yes
[08:25:06] [PASSED] no-and-no
[08:25:06] [PASSED] no-and-yes
[08:25:06] [PASSED] yes-and-no
[08:25:06] [PASSED] yes-and-yes
[08:25:06] [PASSED] no-or-no
[08:25:06] [PASSED] no-or-yes
[08:25:06] [PASSED] yes-or-no
[08:25:06] [PASSED] yes-or-yes
[08:25:06] [PASSED] no-yes-or-yes-no
[08:25:06] [PASSED] no-yes-or-yes-yes
[08:25:06] [PASSED] yes-yes-or-no-yes
[08:25:06] [PASSED] yes-yes-or-yes-yes
[08:25:06] [PASSED] no-no-or-yes-or-no
[08:25:06] [PASSED] or
[08:25:06] [PASSED] or-yes
[08:25:06] [PASSED] or-no
[08:25:06] [PASSED] yes-or
[08:25:06] [PASSED] no-or
[08:25:06] [PASSED] no-or-or-yes
[08:25:06] [PASSED] yes-or-or-no
[08:25:06] [PASSED] no-or-or-no
[08:25:06] [PASSED] missing-context-engine-class
[08:25:06] [PASSED] missing-context-engine-class-or-yes
[08:25:06] [PASSED] missing-context-engine-class-or-or-yes
[08:25:06] =============== [PASSED] xe_rtp_rules_tests ================
[08:25:06] =============== xe_rtp_process_to_sr_tests ================
[08:25:06] [PASSED] coalesce-same-reg
[08:25:06] [PASSED] coalesce-same-reg-literal-and-func
[08:25:06] [PASSED] no-match-no-add
[08:25:06] [PASSED] two-regs-two-entries
[08:25:06] [PASSED] clr-one-set-other
[08:25:06] [PASSED] set-field
[08:25:06] [PASSED] conflict-duplicate
[08:25:06] [PASSED] conflict-not-disjoint
[08:25:06] [PASSED] conflict-not-disjoint-literal-and-func
[08:25:06] [PASSED] conflict-reg-type
[08:25:06] [PASSED] bad-mcr-reg-forced-to-regular
[08:25:06] [PASSED] bad-regular-reg-forced-to-mcr
[08:25:06] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[08:25:06] ================== xe_rtp_process_tests ===================
[08:25:06] [PASSED] active1
[08:25:06] [PASSED] active2
[08:25:06] [PASSED] active-inactive
[08:25:06] [PASSED] inactive-active
[08:25:06] [PASSED] inactive-active-inactive
[08:25:06] [PASSED] inactive-inactive-inactive
[08:25:06] ============== [PASSED] xe_rtp_process_tests ===============
[08:25:06] ===================== [PASSED] xe_rtp ======================
[08:25:06] ==================== xe_wa (1 subtest) =====================
[08:25:06] ======================== xe_wa_gt =========================
[08:25:06] [PASSED] TIGERLAKE B0
[08:25:06] [PASSED] DG1 A0
[08:25:06] [PASSED] DG1 B0
[08:25:06] [PASSED] ALDERLAKE_S A0
[08:25:06] [PASSED] ALDERLAKE_S B0
[08:25:06] [PASSED] ALDERLAKE_S C0
[08:25:06] [PASSED] ALDERLAKE_S D0
[08:25:06] [PASSED] ALDERLAKE_P A0
[08:25:06] [PASSED] ALDERLAKE_P B0
[08:25:06] [PASSED] ALDERLAKE_P C0
[08:25:06] [PASSED] ALDERLAKE_S RPLS D0
[08:25:06] [PASSED] ALDERLAKE_P RPLU E0
[08:25:06] [PASSED] DG2 G10 C0
[08:25:06] [PASSED] DG2 G11 B1
[08:25:06] [PASSED] DG2 G12 A1
[08:25:06] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:25:06] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:25:06] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[08:25:06] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[08:25:06] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[08:25:06] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[08:25:06] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[08:25:06] ==================== [PASSED] xe_wa_gt =====================
[08:25:06] ====================== [PASSED] xe_wa ======================
[08:25:06] ============================================================
[08:25:06] Testing complete. Ran 742 tests: passed: 724, skipped: 18
[08:25:06] Elapsed time: 36.893s total, 4.431s configuring, 31.847s building, 0.590s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[08:25:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:25:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:25:33] Starting KUnit Kernel (1/1)...
[08:25:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:25:33] ============ drm_test_pick_cmdline (2 subtests) ============
[08:25:33] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[08:25:33] =============== drm_test_pick_cmdline_named ===============
[08:25:33] [PASSED] NTSC
[08:25:33] [PASSED] NTSC-J
[08:25:33] [PASSED] PAL
[08:25:33] [PASSED] PAL-M
[08:25:33] =========== [PASSED] drm_test_pick_cmdline_named ===========
[08:25:33] ============== [PASSED] drm_test_pick_cmdline ==============
[08:25:33] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[08:25:33] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[08:25:33] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[08:25:33] =========== drm_validate_clone_mode (2 subtests) ===========
[08:25:33] ============== drm_test_check_in_clone_mode ===============
[08:25:33] [PASSED] in_clone_mode
[08:25:33] [PASSED] not_in_clone_mode
[08:25:33] ========== [PASSED] drm_test_check_in_clone_mode ===========
[08:25:33] =============== drm_test_check_valid_clones ===============
[08:25:33] [PASSED] not_in_clone_mode
[08:25:33] [PASSED] valid_clone
[08:25:33] [PASSED] invalid_clone
[08:25:33] =========== [PASSED] drm_test_check_valid_clones ===========
[08:25:33] ============= [PASSED] drm_validate_clone_mode =============
[08:25:33] ============= drm_validate_modeset (1 subtest) =============
[08:25:33] [PASSED] drm_test_check_connector_changed_modeset
[08:25:33] ============== [PASSED] drm_validate_modeset ===============
[08:25:33] ====== drm_test_bridge_get_current_state (1 subtest) =======
[08:25:33] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[08:25:33] ======== [PASSED] drm_test_bridge_get_current_state ========
[08:25:33] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[08:25:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[08:25:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[08:25:33] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[08:25:33] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[08:25:33] ============== drm_bridge_alloc (2 subtests) ===============
[08:25:33] [PASSED] drm_test_drm_bridge_alloc_basic
[08:25:33] [PASSED] drm_test_drm_bridge_alloc_get_put
[08:25:33] ================ [PASSED] drm_bridge_alloc =================
[08:25:33] ============= drm_bridge_bus_fmt (5 subtests) ==============
[08:25:33] [PASSED] drm_test_bridge_rgb_yuv_rgb
[08:25:33] [PASSED] drm_test_bridge_must_convert_to_yuv444
[08:25:33] [PASSED] drm_test_bridge_hdmi_auto_rgb
[08:25:33] [PASSED] drm_test_bridge_auto_first
[08:25:33] [PASSED] drm_test_bridge_rgb_yuv_no_path
[08:25:33] =============== [PASSED] drm_bridge_bus_fmt ================
[08:25:33] ============= drm_cmdline_parser (40 subtests) =============
[08:25:33] [PASSED] drm_test_cmdline_force_d_only
[08:25:33] [PASSED] drm_test_cmdline_force_D_only_dvi
[08:25:33] [PASSED] drm_test_cmdline_force_D_only_hdmi
[08:25:33] [PASSED] drm_test_cmdline_force_D_only_not_digital
[08:25:33] [PASSED] drm_test_cmdline_force_e_only
[08:25:33] [PASSED] drm_test_cmdline_res
[08:25:33] [PASSED] drm_test_cmdline_res_vesa
[08:25:33] [PASSED] drm_test_cmdline_res_vesa_rblank
[08:25:33] [PASSED] drm_test_cmdline_res_rblank
[08:25:33] [PASSED] drm_test_cmdline_res_bpp
[08:25:33] [PASSED] drm_test_cmdline_res_refresh
[08:25:33] [PASSED] drm_test_cmdline_res_bpp_refresh
[08:25:33] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[08:25:33] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[08:25:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[08:25:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[08:25:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[08:25:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[08:25:33] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[08:25:33] [PASSED] drm_test_cmdline_res_margins_force_on
[08:25:33] [PASSED] drm_test_cmdline_res_vesa_margins
[08:25:33] [PASSED] drm_test_cmdline_name
[08:25:33] [PASSED] drm_test_cmdline_name_bpp
[08:25:33] [PASSED] drm_test_cmdline_name_option
[08:25:33] [PASSED] drm_test_cmdline_name_bpp_option
[08:25:33] [PASSED] drm_test_cmdline_rotate_0
[08:25:33] [PASSED] drm_test_cmdline_rotate_90
[08:25:33] [PASSED] drm_test_cmdline_rotate_180
[08:25:33] [PASSED] drm_test_cmdline_rotate_270
[08:25:33] [PASSED] drm_test_cmdline_hmirror
[08:25:33] [PASSED] drm_test_cmdline_vmirror
[08:25:33] [PASSED] drm_test_cmdline_margin_options
[08:25:33] [PASSED] drm_test_cmdline_multiple_options
[08:25:33] [PASSED] drm_test_cmdline_bpp_extra_and_option
[08:25:33] [PASSED] drm_test_cmdline_extra_and_option
[08:25:33] [PASSED] drm_test_cmdline_freestanding_options
[08:25:33] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[08:25:33] [PASSED] drm_test_cmdline_panel_orientation
[08:25:33] ================ drm_test_cmdline_invalid =================
[08:25:33] [PASSED] margin_only
[08:25:33] [PASSED] interlace_only
[08:25:33] [PASSED] res_missing_x
[08:25:33] [PASSED] res_missing_y
[08:25:33] [PASSED] res_bad_y
[08:25:33] [PASSED] res_missing_y_bpp
[08:25:33] [PASSED] res_bad_bpp
[08:25:33] [PASSED] res_bad_refresh
[08:25:33] [PASSED] res_bpp_refresh_force_on_off
[08:25:33] [PASSED] res_invalid_mode
[08:25:33] [PASSED] res_bpp_wrong_place_mode
[08:25:33] [PASSED] name_bpp_refresh
[08:25:33] [PASSED] name_refresh
[08:25:33] [PASSED] name_refresh_wrong_mode
[08:25:33] [PASSED] name_refresh_invalid_mode
[08:25:33] [PASSED] rotate_multiple
[08:25:33] [PASSED] rotate_invalid_val
[08:25:33] [PASSED] rotate_truncated
[08:25:33] [PASSED] invalid_option
[08:25:33] [PASSED] invalid_tv_option
[08:25:33] [PASSED] truncated_tv_option
[08:25:33] ============ [PASSED] drm_test_cmdline_invalid =============
[08:25:33] =============== drm_test_cmdline_tv_options ===============
[08:25:33] [PASSED] NTSC
[08:25:33] [PASSED] NTSC_443
[08:25:33] [PASSED] NTSC_J
[08:25:33] [PASSED] PAL
[08:25:33] [PASSED] PAL_M
[08:25:33] [PASSED] PAL_N
[08:25:33] [PASSED] SECAM
[08:25:33] [PASSED] MONO_525
[08:25:33] [PASSED] MONO_625
[08:25:33] =========== [PASSED] drm_test_cmdline_tv_options ===========
[08:25:33] =============== [PASSED] drm_cmdline_parser ================
[08:25:33] ========== drmm_connector_hdmi_init (20 subtests) ==========
[08:25:33] [PASSED] drm_test_connector_hdmi_init_valid
[08:25:33] [PASSED] drm_test_connector_hdmi_init_bpc_8
[08:25:33] [PASSED] drm_test_connector_hdmi_init_bpc_10
[08:25:33] [PASSED] drm_test_connector_hdmi_init_bpc_12
[08:25:33] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[08:25:33] [PASSED] drm_test_connector_hdmi_init_bpc_null
[08:25:33] [PASSED] drm_test_connector_hdmi_init_formats_empty
[08:25:33] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[08:25:33] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:25:33] [PASSED] supported_formats=0x9 yuv420_allowed=1
[08:25:33] [PASSED] supported_formats=0x9 yuv420_allowed=0
[08:25:33] [PASSED] supported_formats=0x5 yuv420_allowed=1
[08:25:33] [PASSED] supported_formats=0x5 yuv420_allowed=0
[08:25:33] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:25:33] [PASSED] drm_test_connector_hdmi_init_null_ddc
[08:25:33] [PASSED] drm_test_connector_hdmi_init_null_product
[08:25:33] [PASSED] drm_test_connector_hdmi_init_null_vendor
[08:25:33] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[08:25:33] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[08:25:33] [PASSED] drm_test_connector_hdmi_init_product_valid
[08:25:33] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[08:25:33] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[08:25:33] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[08:25:33] ========= drm_test_connector_hdmi_init_type_valid =========
[08:25:33] [PASSED] HDMI-A
[08:25:33] [PASSED] HDMI-B
[08:25:33] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[08:25:33] ======== drm_test_connector_hdmi_init_type_invalid ========
[08:25:33] [PASSED] Unknown
[08:25:33] [PASSED] VGA
[08:25:33] [PASSED] DVI-I
[08:25:33] [PASSED] DVI-D
[08:25:33] [PASSED] DVI-A
[08:25:33] [PASSED] Composite
[08:25:33] [PASSED] SVIDEO
[08:25:33] [PASSED] LVDS
[08:25:33] [PASSED] Component
[08:25:33] [PASSED] DIN
[08:25:33] [PASSED] DP
[08:25:33] [PASSED] TV
[08:25:33] [PASSED] eDP
[08:25:33] [PASSED] Virtual
[08:25:33] [PASSED] DSI
[08:25:33] [PASSED] DPI
[08:25:33] [PASSED] Writeback
[08:25:33] [PASSED] SPI
[08:25:33] [PASSED] USB
[08:25:33] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[08:25:33] ============ [PASSED] drmm_connector_hdmi_init =============
[08:25:33] ============= drmm_connector_init (3 subtests) =============
[08:25:33] [PASSED] drm_test_drmm_connector_init
[08:25:33] [PASSED] drm_test_drmm_connector_init_null_ddc
[08:25:33] ========= drm_test_drmm_connector_init_type_valid =========
[08:25:33] [PASSED] Unknown
[08:25:33] [PASSED] VGA
[08:25:33] [PASSED] DVI-I
[08:25:33] [PASSED] DVI-D
[08:25:33] [PASSED] DVI-A
[08:25:33] [PASSED] Composite
[08:25:33] [PASSED] SVIDEO
[08:25:33] [PASSED] LVDS
[08:25:33] [PASSED] Component
[08:25:33] [PASSED] DIN
[08:25:33] [PASSED] DP
[08:25:33] [PASSED] HDMI-A
[08:25:33] [PASSED] HDMI-B
[08:25:33] [PASSED] TV
[08:25:33] [PASSED] eDP
[08:25:33] [PASSED] Virtual
[08:25:33] [PASSED] DSI
[08:25:33] [PASSED] DPI
[08:25:33] [PASSED] Writeback
[08:25:33] [PASSED] SPI
[08:25:33] [PASSED] USB
[08:25:33] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[08:25:33] =============== [PASSED] drmm_connector_init ===============
[08:25:33] ========= drm_connector_dynamic_init (6 subtests) ==========
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_init
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_init_properties
[08:25:33] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[08:25:33] [PASSED] Unknown
[08:25:33] [PASSED] VGA
[08:25:33] [PASSED] DVI-I
[08:25:33] [PASSED] DVI-D
[08:25:33] [PASSED] DVI-A
[08:25:33] [PASSED] Composite
[08:25:33] [PASSED] SVIDEO
[08:25:33] [PASSED] LVDS
[08:25:33] [PASSED] Component
[08:25:33] [PASSED] DIN
[08:25:33] [PASSED] DP
[08:25:33] [PASSED] HDMI-A
[08:25:33] [PASSED] HDMI-B
[08:25:33] [PASSED] TV
[08:25:33] [PASSED] eDP
[08:25:33] [PASSED] Virtual
[08:25:33] [PASSED] DSI
[08:25:33] [PASSED] DPI
[08:25:33] [PASSED] Writeback
[08:25:33] [PASSED] SPI
[08:25:33] [PASSED] USB
[08:25:33] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[08:25:33] ======== drm_test_drm_connector_dynamic_init_name =========
[08:25:33] [PASSED] Unknown
[08:25:33] [PASSED] VGA
[08:25:33] [PASSED] DVI-I
[08:25:33] [PASSED] DVI-D
[08:25:33] [PASSED] DVI-A
[08:25:33] [PASSED] Composite
[08:25:33] [PASSED] SVIDEO
[08:25:33] [PASSED] LVDS
[08:25:33] [PASSED] Component
[08:25:33] [PASSED] DIN
[08:25:33] [PASSED] DP
[08:25:33] [PASSED] HDMI-A
[08:25:33] [PASSED] HDMI-B
[08:25:33] [PASSED] TV
[08:25:33] [PASSED] eDP
[08:25:33] [PASSED] Virtual
[08:25:33] [PASSED] DSI
[08:25:33] [PASSED] DPI
[08:25:33] [PASSED] Writeback
[08:25:33] [PASSED] SPI
[08:25:33] [PASSED] USB
[08:25:33] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[08:25:33] =========== [PASSED] drm_connector_dynamic_init ============
[08:25:33] ==== drm_connector_dynamic_register_early (4 subtests) =====
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[08:25:33] ====== [PASSED] drm_connector_dynamic_register_early =======
[08:25:33] ======= drm_connector_dynamic_register (7 subtests) ========
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[08:25:33] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[08:25:33] ========= [PASSED] drm_connector_dynamic_register ==========
[08:25:33] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[08:25:33] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[08:25:33] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[08:25:33] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[08:25:33] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[08:25:33] ========== drm_test_get_tv_mode_from_name_valid ===========
[08:25:33] [PASSED] NTSC
[08:25:33] [PASSED] NTSC-443
[08:25:33] [PASSED] NTSC-J
[08:25:33] [PASSED] PAL
[08:25:33] [PASSED] PAL-M
[08:25:33] [PASSED] PAL-N
[08:25:33] [PASSED] SECAM
[08:25:33] [PASSED] Mono
[08:25:33] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[08:25:33] [PASSED] drm_test_get_tv_mode_from_name_truncated
[08:25:33] ============ [PASSED] drm_get_tv_mode_from_name ============
[08:25:33] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[08:25:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[08:25:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[08:25:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[08:25:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[08:25:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[08:25:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[08:25:33] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[08:25:33] [PASSED] VIC 96
[08:25:33] [PASSED] VIC 97
[08:25:33] [PASSED] VIC 101
[08:25:33] [PASSED] VIC 102
[08:25:33] [PASSED] VIC 106
[08:25:33] [PASSED] VIC 107
[08:25:33] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[08:25:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[08:25:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[08:25:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[08:25:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[08:25:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[08:25:33] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[08:25:33] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[08:25:33] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[08:25:33] [PASSED] Automatic
[08:25:33] [PASSED] Full
[08:25:33] [PASSED] Limited 16:235
[08:25:33] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[08:25:33] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[08:25:33] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[08:25:33] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[08:25:33] === drm_test_drm_hdmi_connector_get_output_format_name ====
[08:25:33] [PASSED] RGB
[08:25:33] [PASSED] YUV 4:2:0
[08:25:33] [PASSED] YUV 4:2:2
[08:25:33] [PASSED] YUV 4:4:4
[08:25:33] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[08:25:33] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[08:25:33] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[08:25:33] ============= drm_damage_helper (21 subtests) ==============
[08:25:33] [PASSED] drm_test_damage_iter_no_damage
[08:25:33] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[08:25:33] [PASSED] drm_test_damage_iter_no_damage_src_moved
[08:25:33] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[08:25:33] [PASSED] drm_test_damage_iter_no_damage_not_visible
[08:25:33] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[08:25:33] [PASSED] drm_test_damage_iter_no_damage_no_fb
[08:25:33] [PASSED] drm_test_damage_iter_simple_damage
[08:25:33] [PASSED] drm_test_damage_iter_single_damage
[08:25:33] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[08:25:33] [PASSED] drm_test_damage_iter_single_damage_outside_src
[08:25:33] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[08:25:33] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[08:25:33] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[08:25:33] [PASSED] drm_test_damage_iter_single_damage_src_moved
[08:25:33] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[08:25:33] [PASSED] drm_test_damage_iter_damage
[08:25:33] [PASSED] drm_test_damage_iter_damage_one_intersect
[08:25:33] [PASSED] drm_test_damage_iter_damage_one_outside
[08:25:33] [PASSED] drm_test_damage_iter_damage_src_moved
[08:25:33] [PASSED] drm_test_damage_iter_damage_not_visible
[08:25:33] ================ [PASSED] drm_damage_helper ================
[08:25:33] ============== drm_dp_mst_helper (3 subtests) ==============
[08:25:33] ============== drm_test_dp_mst_calc_pbn_mode ==============
[08:25:33] [PASSED] Clock 154000 BPP 30 DSC disabled
[08:25:33] [PASSED] Clock 234000 BPP 30 DSC disabled
[08:25:33] [PASSED] Clock 297000 BPP 24 DSC disabled
[08:25:33] [PASSED] Clock 332880 BPP 24 DSC enabled
[08:25:33] [PASSED] Clock 324540 BPP 24 DSC enabled
[08:25:33] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[08:25:33] ============== drm_test_dp_mst_calc_pbn_div ===============
[08:25:33] [PASSED] Link rate 2000000 lane count 4
[08:25:33] [PASSED] Link rate 2000000 lane count 2
[08:25:33] [PASSED] Link rate 2000000 lane count 1
[08:25:33] [PASSED] Link rate 1350000 lane count 4
[08:25:33] [PASSED] Link rate 1350000 lane count 2
[08:25:33] [PASSED] Link rate 1350000 lane count 1
[08:25:33] [PASSED] Link rate 1000000 lane count 4
[08:25:33] [PASSED] Link rate 1000000 lane count 2
[08:25:33] [PASSED] Link rate 1000000 lane count 1
[08:25:33] [PASSED] Link rate 810000 lane count 4
[08:25:33] [PASSED] Link rate 810000 lane count 2
[08:25:33] [PASSED] Link rate 810000 lane count 1
[08:25:33] [PASSED] Link rate 540000 lane count 4
[08:25:33] [PASSED] Link rate 540000 lane count 2
[08:25:33] [PASSED] Link rate 540000 lane count 1
[08:25:33] [PASSED] Link rate 270000 lane count 4
[08:25:33] [PASSED] Link rate 270000 lane count 2
[08:25:33] [PASSED] Link rate 270000 lane count 1
[08:25:33] [PASSED] Link rate 162000 lane count 4
[08:25:33] [PASSED] Link rate 162000 lane count 2
[08:25:33] [PASSED] Link rate 162000 lane count 1
[08:25:33] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[08:25:33] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[08:25:33] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[08:25:33] [PASSED] DP_POWER_UP_PHY with port number
[08:25:33] [PASSED] DP_POWER_DOWN_PHY with port number
[08:25:33] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[08:25:33] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[08:25:33] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[08:25:33] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[08:25:33] [PASSED] DP_QUERY_PAYLOAD with port number
[08:25:33] [PASSED] DP_QUERY_PAYLOAD with VCPI
[08:25:33] [PASSED] DP_REMOTE_DPCD_READ with port number
[08:25:33] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[08:25:33] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[08:25:33] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[08:25:33] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[08:25:33] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[08:25:33] [PASSED] DP_REMOTE_I2C_READ with port number
[08:25:33] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[08:25:33] [PASSED] DP_REMOTE_I2C_READ with transactions array
[08:25:33] [PASSED] DP_REMOTE_I2C_WRITE with port number
[08:25:33] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[08:25:33] [PASSED] DP_REMOTE_I2C_WRITE with data array
[08:25:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[08:25:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[08:25:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[08:25:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[08:25:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[08:25:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[08:25:33] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[08:25:33] ================ [PASSED] drm_dp_mst_helper ================
[08:25:33] ================== drm_exec (7 subtests) ===================
[08:25:33] [PASSED] sanitycheck
[08:25:33] [PASSED] test_lock
[08:25:33] [PASSED] test_lock_unlock
[08:25:33] [PASSED] test_duplicates
[08:25:33] [PASSED] test_prepare
[08:25:33] [PASSED] test_prepare_array
[08:25:33] [PASSED] test_multiple_loops
[08:25:33] ==================== [PASSED] drm_exec =====================
[08:25:33] =========== drm_format_helper_test (17 subtests) ===========
[08:25:33] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[08:25:33] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[08:25:33] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[08:25:33] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[08:25:33] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[08:25:33] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[08:25:33] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[08:25:33] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[08:25:33] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[08:25:33] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[08:25:33] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[08:25:33] ============== drm_test_fb_xrgb8888_to_mono ===============
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[08:25:33] ==================== drm_test_fb_swab =====================
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ================ [PASSED] drm_test_fb_swab =================
[08:25:33] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[08:25:33] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[08:25:33] [PASSED] single_pixel_source_buffer
[08:25:33] [PASSED] single_pixel_clip_rectangle
[08:25:33] [PASSED] well_known_colors
[08:25:33] [PASSED] destination_pitch
[08:25:33] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[08:25:33] ================= drm_test_fb_clip_offset =================
[08:25:33] [PASSED] pass through
[08:25:33] [PASSED] horizontal offset
[08:25:33] [PASSED] vertical offset
[08:25:33] [PASSED] horizontal and vertical offset
[08:25:33] [PASSED] horizontal offset (custom pitch)
[08:25:33] [PASSED] vertical offset (custom pitch)
[08:25:33] [PASSED] horizontal and vertical offset (custom pitch)
[08:25:33] ============= [PASSED] drm_test_fb_clip_offset =============
[08:25:33] =================== drm_test_fb_memcpy ====================
[08:25:33] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[08:25:33] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[08:25:33] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[08:25:33] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[08:25:33] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[08:25:33] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[08:25:33] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[08:25:33] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[08:25:33] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[08:25:33] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[08:25:33] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[08:25:33] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[08:25:33] =============== [PASSED] drm_test_fb_memcpy ================
[08:25:33] ============= [PASSED] drm_format_helper_test ==============
[08:25:33] ================= drm_format (18 subtests) =================
[08:25:33] [PASSED] drm_test_format_block_width_invalid
[08:25:33] [PASSED] drm_test_format_block_width_one_plane
[08:25:33] [PASSED] drm_test_format_block_width_two_plane
[08:25:33] [PASSED] drm_test_format_block_width_three_plane
[08:25:33] [PASSED] drm_test_format_block_width_tiled
[08:25:33] [PASSED] drm_test_format_block_height_invalid
[08:25:33] [PASSED] drm_test_format_block_height_one_plane
[08:25:33] [PASSED] drm_test_format_block_height_two_plane
[08:25:33] [PASSED] drm_test_format_block_height_three_plane
[08:25:33] [PASSED] drm_test_format_block_height_tiled
[08:25:33] [PASSED] drm_test_format_min_pitch_invalid
[08:25:33] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[08:25:33] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[08:25:33] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[08:25:33] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[08:25:33] [PASSED] drm_test_format_min_pitch_two_plane
[08:25:33] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[08:25:33] [PASSED] drm_test_format_min_pitch_tiled
[08:25:33] =================== [PASSED] drm_format ====================
[08:25:33] ============== drm_framebuffer (10 subtests) ===============
[08:25:33] ========== drm_test_framebuffer_check_src_coords ==========
[08:25:33] [PASSED] Success: source fits into fb
[08:25:33] [PASSED] Fail: overflowing fb with x-axis coordinate
[08:25:33] [PASSED] Fail: overflowing fb with y-axis coordinate
[08:25:33] [PASSED] Fail: overflowing fb with source width
[08:25:33] [PASSED] Fail: overflowing fb with source height
[08:25:33] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[08:25:33] [PASSED] drm_test_framebuffer_cleanup
[08:25:33] =============== drm_test_framebuffer_create ===============
[08:25:33] [PASSED] ABGR8888 normal sizes
[08:25:33] [PASSED] ABGR8888 max sizes
[08:25:33] [PASSED] ABGR8888 pitch greater than min required
[08:25:33] [PASSED] ABGR8888 pitch less than min required
[08:25:33] [PASSED] ABGR8888 Invalid width
[08:25:33] [PASSED] ABGR8888 Invalid buffer handle
[08:25:33] [PASSED] No pixel format
[08:25:33] [PASSED] ABGR8888 Width 0
[08:25:33] [PASSED] ABGR8888 Height 0
[08:25:33] [PASSED] ABGR8888 Out of bound height * pitch combination
[08:25:33] [PASSED] ABGR8888 Large buffer offset
[08:25:33] [PASSED] ABGR8888 Buffer offset for inexistent plane
[08:25:33] [PASSED] ABGR8888 Invalid flag
[08:25:33] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[08:25:33] [PASSED] ABGR8888 Valid buffer modifier
[08:25:33] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[08:25:33] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[08:25:33] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[08:25:33] [PASSED] NV12 Normal sizes
[08:25:33] [PASSED] NV12 Max sizes
[08:25:33] [PASSED] NV12 Invalid pitch
[08:25:33] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[08:25:33] [PASSED] NV12 different modifier per-plane
[08:25:33] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[08:25:33] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[08:25:33] [PASSED] NV12 Modifier for inexistent plane
[08:25:33] [PASSED] NV12 Handle for inexistent plane
[08:25:33] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[08:25:33] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[08:25:33] [PASSED] YVU420 Normal sizes
[08:25:33] [PASSED] YVU420 Max sizes
[08:25:33] [PASSED] YVU420 Invalid pitch
[08:25:33] [PASSED] YVU420 Different pitches
[08:25:33] [PASSED] YVU420 Different buffer offsets/pitches
[08:25:33] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[08:25:33] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[08:25:33] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[08:25:33] [PASSED] YVU420 Valid modifier
[08:25:33] [PASSED] YVU420 Different modifiers per plane
[08:25:33] [PASSED] YVU420 Modifier for inexistent plane
[08:25:33] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[08:25:33] [PASSED] X0L2 Normal sizes
[08:25:33] [PASSED] X0L2 Max sizes
[08:25:33] [PASSED] X0L2 Invalid pitch
[08:25:33] [PASSED] X0L2 Pitch greater than minimum required
[08:25:33] [PASSED] X0L2 Handle for inexistent plane
[08:25:33] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[08:25:33] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[08:25:33] [PASSED] X0L2 Valid modifier
[08:25:33] [PASSED] X0L2 Modifier for inexistent plane
[08:25:33] =========== [PASSED] drm_test_framebuffer_create ===========
[08:25:33] [PASSED] drm_test_framebuffer_free
[08:25:33] [PASSED] drm_test_framebuffer_init
[08:25:33] [PASSED] drm_test_framebuffer_init_bad_format
[08:25:33] [PASSED] drm_test_framebuffer_init_dev_mismatch
[08:25:33] [PASSED] drm_test_framebuffer_lookup
[08:25:33] [PASSED] drm_test_framebuffer_lookup_inexistent
[08:25:33] [PASSED] drm_test_framebuffer_modifiers_not_supported
[08:25:33] ================= [PASSED] drm_framebuffer =================
[08:25:33] ================ drm_gem_shmem (8 subtests) ================
[08:25:33] [PASSED] drm_gem_shmem_test_obj_create
[08:25:33] [PASSED] drm_gem_shmem_test_obj_create_private
[08:25:33] [PASSED] drm_gem_shmem_test_pin_pages
[08:25:33] [PASSED] drm_gem_shmem_test_vmap
[08:25:33] [PASSED] drm_gem_shmem_test_get_sg_table
[08:25:33] [PASSED] drm_gem_shmem_test_get_pages_sgt
[08:25:33] [PASSED] drm_gem_shmem_test_madvise
[08:25:33] [PASSED] drm_gem_shmem_test_purge
[08:25:33] ================== [PASSED] drm_gem_shmem ==================
[08:25:33] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[08:25:33] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[08:25:33] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[08:25:33] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[08:25:33] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[08:25:33] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[08:25:33] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[08:25:33] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[08:25:33] [PASSED] Automatic
[08:25:33] [PASSED] Full
[08:25:33] [PASSED] Limited 16:235
[08:25:33] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[08:25:33] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[08:25:33] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[08:25:33] [PASSED] drm_test_check_disable_connector
[08:25:33] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[08:25:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[08:25:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[08:25:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[08:25:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[08:25:33] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[08:25:33] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[08:25:33] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[08:25:33] [PASSED] drm_test_check_output_bpc_dvi
[08:25:33] [PASSED] drm_test_check_output_bpc_format_vic_1
[08:25:33] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[08:25:33] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[08:25:33] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[08:25:33] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[08:25:33] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[08:25:33] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[08:25:33] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[08:25:33] ============ drm_test_check_hdmi_color_format =============
[08:25:33] [PASSED] AUTO -> RGB
[08:25:33] [PASSED] YCBCR422 -> YUV422
[08:25:33] [PASSED] YCBCR420 -> YUV420
[08:25:33] [PASSED] YCBCR444 -> YUV444
[08:25:33] [PASSED] RGB -> RGB
[08:25:33] ======== [PASSED] drm_test_check_hdmi_color_format =========
[08:25:33] ======== drm_test_check_hdmi_color_format_420_only ========
[08:25:33] [PASSED] RGB should fail
[08:25:33] [PASSED] YUV444 should fail
[08:25:33] [PASSED] YUV422 should fail
[08:25:33] [PASSED] YUV420 should work
[08:25:33] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[08:25:33] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[08:25:33] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[08:25:33] [PASSED] drm_test_check_broadcast_rgb_value
[08:25:33] [PASSED] drm_test_check_bpc_8_value
[08:25:33] [PASSED] drm_test_check_bpc_10_value
[08:25:33] [PASSED] drm_test_check_bpc_12_value
[08:25:33] [PASSED] drm_test_check_format_value
[08:25:33] [PASSED] drm_test_check_tmds_char_value
[08:25:33] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[08:25:33] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[08:25:33] [PASSED] drm_test_check_mode_valid
[08:25:33] [PASSED] drm_test_check_mode_valid_reject
[08:25:33] [PASSED] drm_test_check_mode_valid_reject_rate
[08:25:33] [PASSED] drm_test_check_mode_valid_reject_max_clock
[08:25:33] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[08:25:33] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[08:25:33] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[08:25:33] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[08:25:33] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[08:25:33] [PASSED] drm_test_check_infoframes
[08:25:33] [PASSED] drm_test_check_reject_avi_infoframe
[08:25:33] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[08:25:33] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[08:25:33] [PASSED] drm_test_check_reject_audio_infoframe
[08:25:33] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[08:25:33] ================= drm_managed (2 subtests) =================
[08:25:33] [PASSED] drm_test_managed_release_action
[08:25:33] [PASSED] drm_test_managed_run_action
[08:25:33] =================== [PASSED] drm_managed ===================
[08:25:33] =================== drm_mm (6 subtests) ====================
[08:25:33] [PASSED] drm_test_mm_init
[08:25:33] [PASSED] drm_test_mm_debug
[08:25:33] [PASSED] drm_test_mm_align32
[08:25:33] [PASSED] drm_test_mm_align64
[08:25:33] [PASSED] drm_test_mm_lowest
[08:25:33] [PASSED] drm_test_mm_highest
[08:25:33] ===================== [PASSED] drm_mm ======================
[08:25:33] ============= drm_modes_analog_tv (5 subtests) =============
[08:25:33] [PASSED] drm_test_modes_analog_tv_mono_576i
[08:25:33] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[08:25:33] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[08:25:33] [PASSED] drm_test_modes_analog_tv_pal_576i
[08:25:33] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[08:25:33] =============== [PASSED] drm_modes_analog_tv ===============
[08:25:33] ============== drm_plane_helper (2 subtests) ===============
[08:25:33] =============== drm_test_check_plane_state ================
[08:25:33] [PASSED] clipping_simple
[08:25:33] [PASSED] clipping_rotate_reflect
[08:25:33] [PASSED] positioning_simple
[08:25:33] [PASSED] upscaling
[08:25:33] [PASSED] downscaling
[08:25:33] [PASSED] rounding1
[08:25:33] [PASSED] rounding2
[08:25:33] [PASSED] rounding3
[08:25:33] [PASSED] rounding4
[08:25:33] =========== [PASSED] drm_test_check_plane_state ============
[08:25:33] =========== drm_test_check_invalid_plane_state ============
[08:25:33] [PASSED] positioning_invalid
[08:25:33] [PASSED] upscaling_invalid
[08:25:33] [PASSED] downscaling_invalid
[08:25:33] ======= [PASSED] drm_test_check_invalid_plane_state ========
[08:25:33] ================ [PASSED] drm_plane_helper =================
[08:25:33] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[08:25:33] ====== drm_test_connector_helper_tv_get_modes_check =======
[08:25:33] [PASSED] None
[08:25:33] [PASSED] PAL
[08:25:33] [PASSED] NTSC
[08:25:33] [PASSED] Both, NTSC Default
[08:25:33] [PASSED] Both, PAL Default
[08:25:33] [PASSED] Both, NTSC Default, with PAL on command-line
[08:25:33] [PASSED] Both, PAL Default, with NTSC on command-line
[08:25:33] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[08:25:33] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[08:25:33] ================== drm_rect (9 subtests) ===================
[08:25:33] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[08:25:33] [PASSED] drm_test_rect_clip_scaled_not_clipped
[08:25:33] [PASSED] drm_test_rect_clip_scaled_clipped
[08:25:33] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[08:25:33] ================= drm_test_rect_intersect =================
[08:25:33] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[08:25:33] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[08:25:33] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[08:25:33] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[08:25:33] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[08:25:33] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[08:25:33] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[08:25:33] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[08:25:33] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[08:25:33] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[08:25:33] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[08:25:33] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[08:25:33] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[08:25:33] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[08:25:33] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[08:25:33] ============= [PASSED] drm_test_rect_intersect =============
[08:25:33] ================ drm_test_rect_calc_hscale ================
[08:25:33] [PASSED] normal use
[08:25:33] [PASSED] out of max range
[08:25:33] [PASSED] out of min range
[08:25:33] [PASSED] zero dst
[08:25:33] [PASSED] negative src
[08:25:33] [PASSED] negative dst
[08:25:33] ============ [PASSED] drm_test_rect_calc_hscale ============
[08:25:33] ================ drm_test_rect_calc_vscale ================
[08:25:33] [PASSED] normal use
[08:25:33] [PASSED] out of max range
[08:25:33] [PASSED] out of min range
[08:25:33] [PASSED] zero dst
[08:25:33] [PASSED] negative src
[08:25:33] [PASSED] negative dst
[08:25:33] ============ [PASSED] drm_test_rect_calc_vscale ============
[08:25:33] ================== drm_test_rect_rotate ===================
[08:25:33] [PASSED] reflect-x
[08:25:33] [PASSED] reflect-y
[08:25:33] [PASSED] rotate-0
[08:25:33] [PASSED] rotate-90
[08:25:33] [PASSED] rotate-180
[08:25:33] [PASSED] rotate-270
[08:25:33] ============== [PASSED] drm_test_rect_rotate ===============
[08:25:33] ================ drm_test_rect_rotate_inv =================
[08:25:33] [PASSED] reflect-x
[08:25:33] [PASSED] reflect-y
[08:25:33] [PASSED] rotate-0
[08:25:33] [PASSED] rotate-90
[08:25:33] [PASSED] rotate-180
[08:25:33] [PASSED] rotate-270
[08:25:33] ============ [PASSED] drm_test_rect_rotate_inv =============
[08:25:33] ==================== [PASSED] drm_rect =====================
[08:25:33] ============ drm_sysfb_modeset_test (1 subtest) ============
[08:25:33] ============ drm_test_sysfb_build_fourcc_list =============
[08:25:33] [PASSED] no native formats
[08:25:33] [PASSED] XRGB8888 as native format
[08:25:33] [PASSED] remove duplicates
[08:25:33] [PASSED] convert alpha formats
[08:25:33] [PASSED] random formats
[08:25:33] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[08:25:33] ============= [PASSED] drm_sysfb_modeset_test ==============
[08:25:33] ================== drm_fixp (2 subtests) ===================
[08:25:33] [PASSED] drm_test_int2fixp
[08:25:33] [PASSED] drm_test_sm2fixp
[08:25:33] ==================== [PASSED] drm_fixp =====================
[08:25:33] ============================================================
[08:25:33] Testing complete. Ran 637 tests: passed: 637
[08:25:33] Elapsed time: 26.626s total, 1.828s configuring, 24.634s building, 0.138s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[08:25:33] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:25:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:25:45] Starting KUnit Kernel (1/1)...
[08:25:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:25:45] ================= ttm_device (5 subtests) ==================
[08:25:45] [PASSED] ttm_device_init_basic
[08:25:45] [PASSED] ttm_device_init_multiple
[08:25:45] [PASSED] ttm_device_fini_basic
[08:25:45] [PASSED] ttm_device_init_no_vma_man
[08:25:45] ================== ttm_device_init_pools ==================
[08:25:45] [PASSED] No DMA allocations, no DMA32 required
[08:25:45] [PASSED] DMA allocations, DMA32 required
[08:25:45] [PASSED] No DMA allocations, DMA32 required
[08:25:45] [PASSED] DMA allocations, no DMA32 required
[08:25:45] ============== [PASSED] ttm_device_init_pools ==============
[08:25:45] =================== [PASSED] ttm_device ====================
[08:25:45] ================== ttm_pool (8 subtests) ===================
[08:25:45] ================== ttm_pool_alloc_basic ===================
[08:25:45] [PASSED] One page
[08:25:45] [PASSED] More than one page
[08:25:45] [PASSED] Above the allocation limit
[08:25:45] [PASSED] One page, with coherent DMA mappings enabled
[08:25:45] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:25:45] ============== [PASSED] ttm_pool_alloc_basic ===============
[08:25:45] ============== ttm_pool_alloc_basic_dma_addr ==============
[08:25:45] [PASSED] One page
[08:25:45] [PASSED] More than one page
[08:25:45] [PASSED] Above the allocation limit
[08:25:45] [PASSED] One page, with coherent DMA mappings enabled
[08:25:45] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:25:45] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[08:25:45] [PASSED] ttm_pool_alloc_order_caching_match
[08:25:45] [PASSED] ttm_pool_alloc_caching_mismatch
[08:25:45] [PASSED] ttm_pool_alloc_order_mismatch
[08:25:45] [PASSED] ttm_pool_free_dma_alloc
[08:25:45] [PASSED] ttm_pool_free_no_dma_alloc
[08:25:45] [PASSED] ttm_pool_fini_basic
[08:25:45] ==================== [PASSED] ttm_pool =====================
[08:25:45] ================ ttm_resource (8 subtests) =================
[08:25:45] ================= ttm_resource_init_basic =================
[08:25:45] [PASSED] Init resource in TTM_PL_SYSTEM
[08:25:45] [PASSED] Init resource in TTM_PL_VRAM
[08:25:45] [PASSED] Init resource in a private placement
[08:25:45] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[08:25:45] ============= [PASSED] ttm_resource_init_basic =============
[08:25:45] [PASSED] ttm_resource_init_pinned
[08:25:45] [PASSED] ttm_resource_fini_basic
[08:25:45] [PASSED] ttm_resource_manager_init_basic
[08:25:45] [PASSED] ttm_resource_manager_usage_basic
[08:25:45] [PASSED] ttm_resource_manager_set_used_basic
[08:25:45] [PASSED] ttm_sys_man_alloc_basic
[08:25:45] [PASSED] ttm_sys_man_free_basic
[08:25:45] ================== [PASSED] ttm_resource ===================
[08:25:45] =================== ttm_tt (15 subtests) ===================
[08:25:45] ==================== ttm_tt_init_basic ====================
[08:25:45] [PASSED] Page-aligned size
[08:25:45] [PASSED] Extra pages requested
[08:25:45] ================ [PASSED] ttm_tt_init_basic ================
[08:25:45] [PASSED] ttm_tt_init_misaligned
[08:25:45] [PASSED] ttm_tt_fini_basic
[08:25:45] [PASSED] ttm_tt_fini_sg
[08:25:45] [PASSED] ttm_tt_fini_shmem
[08:25:45] [PASSED] ttm_tt_create_basic
[08:25:45] [PASSED] ttm_tt_create_invalid_bo_type
[08:25:45] [PASSED] ttm_tt_create_ttm_exists
[08:25:45] [PASSED] ttm_tt_create_failed
[08:25:45] [PASSED] ttm_tt_destroy_basic
[08:25:45] [PASSED] ttm_tt_populate_null_ttm
[08:25:45] [PASSED] ttm_tt_populate_populated_ttm
[08:25:45] [PASSED] ttm_tt_unpopulate_basic
[08:25:45] [PASSED] ttm_tt_unpopulate_empty_ttm
[08:25:45] [PASSED] ttm_tt_swapin_basic
[08:25:45] ===================== [PASSED] ttm_tt ======================
[08:25:45] =================== ttm_bo (14 subtests) ===================
[08:25:45] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[08:25:45] [PASSED] Cannot be interrupted and sleeps
[08:25:45] [PASSED] Cannot be interrupted, locks straight away
[08:25:45] [PASSED] Can be interrupted, sleeps
[08:25:45] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[08:25:45] [PASSED] ttm_bo_reserve_locked_no_sleep
[08:25:45] [PASSED] ttm_bo_reserve_no_wait_ticket
[08:25:45] [PASSED] ttm_bo_reserve_double_resv
[08:25:45] [PASSED] ttm_bo_reserve_interrupted
[08:25:45] [PASSED] ttm_bo_reserve_deadlock
[08:25:45] [PASSED] ttm_bo_unreserve_basic
[08:25:45] [PASSED] ttm_bo_unreserve_pinned
[08:25:45] [PASSED] ttm_bo_unreserve_bulk
[08:25:45] [PASSED] ttm_bo_fini_basic
[08:25:45] [PASSED] ttm_bo_fini_shared_resv
[08:25:45] [PASSED] ttm_bo_pin_basic
[08:25:45] [PASSED] ttm_bo_pin_unpin_resource
[08:25:45] [PASSED] ttm_bo_multiple_pin_one_unpin
[08:25:45] ===================== [PASSED] ttm_bo ======================
[08:25:45] ============== ttm_bo_validate (22 subtests) ===============
[08:25:45] ============== ttm_bo_init_reserved_sys_man ===============
[08:25:45] [PASSED] Buffer object for userspace
[08:25:45] [PASSED] Kernel buffer object
[08:25:45] [PASSED] Shared buffer object
[08:25:45] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[08:25:45] ============== ttm_bo_init_reserved_mock_man ==============
[08:25:45] [PASSED] Buffer object for userspace
[08:25:45] [PASSED] Kernel buffer object
[08:25:45] [PASSED] Shared buffer object
[08:25:45] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[08:25:45] [PASSED] ttm_bo_init_reserved_resv
[08:25:45] ================== ttm_bo_validate_basic ==================
[08:25:45] [PASSED] Buffer object for userspace
[08:25:45] [PASSED] Kernel buffer object
[08:25:45] [PASSED] Shared buffer object
[08:25:45] ============== [PASSED] ttm_bo_validate_basic ==============
[08:25:45] [PASSED] ttm_bo_validate_invalid_placement
[08:25:45] ============= ttm_bo_validate_same_placement ==============
[08:25:45] [PASSED] System manager
[08:25:45] [PASSED] VRAM manager
[08:25:45] ========= [PASSED] ttm_bo_validate_same_placement ==========
[08:25:45] [PASSED] ttm_bo_validate_failed_alloc
[08:25:45] [PASSED] ttm_bo_validate_pinned
[08:25:45] [PASSED] ttm_bo_validate_busy_placement
[08:25:45] ================ ttm_bo_validate_multihop =================
[08:25:45] [PASSED] Buffer object for userspace
[08:25:45] [PASSED] Kernel buffer object
[08:25:45] [PASSED] Shared buffer object
[08:25:45] ============ [PASSED] ttm_bo_validate_multihop =============
[08:25:45] ========== ttm_bo_validate_no_placement_signaled ==========
[08:25:45] [PASSED] Buffer object in system domain, no page vector
[08:25:45] [PASSED] Buffer object in system domain with an existing page vector
[08:25:45] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[08:25:45] ======== ttm_bo_validate_no_placement_not_signaled ========
[08:25:45] [PASSED] Buffer object for userspace
[08:25:45] [PASSED] Kernel buffer object
[08:25:45] [PASSED] Shared buffer object
[08:25:45] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[08:25:45] [PASSED] ttm_bo_validate_move_fence_signaled
[08:25:45] ========= ttm_bo_validate_move_fence_not_signaled =========
[08:25:45] [PASSED] Waits for GPU
[08:25:45] [PASSED] Tries to lock straight away
[08:25:45] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[08:25:45] [PASSED] ttm_bo_validate_swapout
[08:25:45] [PASSED] ttm_bo_validate_happy_evict
[08:25:45] [PASSED] ttm_bo_validate_all_pinned_evict
[08:25:45] [PASSED] ttm_bo_validate_allowed_only_evict
[08:25:45] [PASSED] ttm_bo_validate_deleted_evict
[08:25:45] [PASSED] ttm_bo_validate_busy_domain_evict
[08:25:45] [PASSED] ttm_bo_validate_evict_gutting
[08:25:45] [PASSED] ttm_bo_validate_recrusive_evict
[08:25:45] ================= [PASSED] ttm_bo_validate =================
[08:25:45] ============================================================
[08:25:45] Testing complete. Ran 102 tests: passed: 102
[08:25:45] Elapsed time: 11.989s total, 1.829s configuring, 9.945s building, 0.182s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✗ Xe.CI.BAT: failure for drm/xe/ras: Fix invalid health error code (rev2)
2026-08-04 5:12 [PATCH v1] drm/xe/ras: Fix invalid health error code Raag Jadav
` (5 preceding siblings ...)
2026-08-05 8:25 ` ✓ CI.KUnit: success for drm/xe/ras: Fix invalid health error code (rev2) Patchwork
@ 2026-08-05 9:32 ` Patchwork
2026-08-05 16:34 ` ✓ Xe.CI.FULL: success " Patchwork
7 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-08-05 9:32 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2058 bytes --]
== Series Details ==
Series: drm/xe/ras: Fix invalid health error code (rev2)
URL : https://patchwork.freedesktop.org/series/171545/
State : failure
== Summary ==
CI Bug Log - changes from xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23_BAT -> xe-pw-171545v2_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-171545v2_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-171545v2_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (14 -> 1)
------------------------------
ERROR: It appears as if the changes made in xe-pw-171545v2_BAT prevented too many machines from booting.
Missing (13): bat-bmg-1 bat-lnl-2 bat-ptl-1 bat-lnl-1 bat-ptl-vm bat-ptl-2 bat-bmg-vm bat-atsm-2 bat-bmg-3 bat-wcl-1 bat-wcl-2 bat-nvls-1 bat-adlp-7
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-171545v2_BAT:
### IGT changes ###
#### Warnings ####
* igt@kms_pipe_crc_basic@nonblocking-crc:
- bat-nvls-2: [SKIP][1] ([Intel XE#8740]) -> [SKIP][2] +30 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/bat-nvls-2/igt@kms_pipe_crc_basic@nonblocking-crc.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/bat-nvls-2/igt@kms_pipe_crc_basic@nonblocking-crc.html
[Intel XE#8740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8740
Build changes
-------------
* Linux: xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23 -> xe-pw-171545v2
IGT_9038: 9038
xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23: c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23
xe-pw-171545v2: 171545v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/index.html
[-- Attachment #2: Type: text/html, Size: 2640 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Xe.CI.FULL: success for drm/xe/ras: Fix invalid health error code (rev2)
2026-08-04 5:12 [PATCH v1] drm/xe/ras: Fix invalid health error code Raag Jadav
` (6 preceding siblings ...)
2026-08-05 9:32 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-08-05 16:34 ` Patchwork
7 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-08-05 16:34 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 20325 bytes --]
== Series Details ==
Series: drm/xe/ras: Fix invalid health error code (rev2)
URL : https://patchwork.freedesktop.org/series/171545/
State : success
== Summary ==
CI Bug Log - changes from xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23_FULL -> xe-pw-171545v2_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-171545v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-bmg: [PASS][1] -> [FAIL][2] ([Intel XE#3718] / [Intel XE#6078]) +1 other test fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_bw@connected-linear-tiling-3-displays-target-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#7679])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-4/igt@kms_bw@connected-linear-tiling-3-displays-target-1920x1080p.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [PASS][4] -> [FAIL][5] ([Intel XE#7809])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-9/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [PASS][6] -> [FAIL][7] ([Intel XE#301]) +1 other test fail
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [PASS][8] -> [FAIL][9] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2311])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#4141]) +1 other test skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#7061] / [Intel XE#7356])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-pri-indfb-multidraw:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2313]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-2/igt@kms_frontbuffer_tracking@psrhdr-2p-pri-indfb-multidraw.html
* igt@kms_pm_dc@dc3co-vpb-framegap:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-7/igt@kms_pm_dc@dc3co-vpb-framegap.html
* igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#8396]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-7/igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888.html
* igt@kms_psr@pr-cursor-plane-move:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2234] / [Intel XE#2850])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-7/igt@kms_psr@pr-cursor-plane-move.html
* igt@xe_exec_multi_queue@many-queues-userptr:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#8364])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-7/igt@xe_exec_multi_queue@many-queues-userptr.html
* igt@xe_exec_reset@cm-multi-queue-gt-reset:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#8369])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-7/igt@xe_exec_reset@cm-multi-queue-gt-reset.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_sriov_init:
- shard-bmg: [PASS][19] -> [ABORT][20] ([Intel XE#8007])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-8/igt@xe_fault_injection@inject-fault-probe-function-xe_sriov_init.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-6/igt@xe_fault_injection@inject-fault-probe-function-xe_sriov_init.html
#### Possible fixes ####
* igt@core_hotunplug@hotreplug-lateclose:
- shard-bmg: [SKIP][21] ([Intel XE#8749]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@core_hotunplug@hotreplug-lateclose.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@core_hotunplug@hotreplug-lateclose.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [INCOMPLETE][23] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][24] +1 other test pass
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-lnl: [FAIL][25] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][27] ([Intel XE#1503]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-3/igt@kms_hdr@invalid-hdr.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-7/igt@kms_hdr@invalid-hdr.html
* igt@xe_compute_preempt@compute-threadgroup-preempt@engine-drm_xe_engine_class_compute:
- shard-bmg: [DMESG-WARN][29] ([Intel XE#7774]) -> [PASS][30] +1 other test pass
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@xe_compute_preempt@compute-threadgroup-preempt@engine-drm_xe_engine_class_compute.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@xe_compute_preempt@compute-threadgroup-preempt@engine-drm_xe_engine_class_compute.html
* igt@xe_exec_system_allocator@many-64k-malloc-prefetch-madvise:
- shard-bmg: [SKIP][31] ([Intel XE#8589]) -> [PASS][32] +54 other tests pass
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@xe_exec_system_allocator@many-64k-malloc-prefetch-madvise.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@xe_exec_system_allocator@many-64k-malloc-prefetch-madvise.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early:
- shard-bmg: [ABORT][33] ([Intel XE#8007]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-1/igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-2/igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early.html
#### Warnings ####
* igt@kms_big_fb@x-tiled-64bpp-rotate-90:
- shard-bmg: [SKIP][35] ([Intel XE#8589]) -> [SKIP][36] ([Intel XE#2327])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-180:
- shard-bmg: [FAIL][37] -> [SKIP][38] ([Intel XE#1124])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
- shard-bmg: [SKIP][39] ([Intel XE#8589]) -> [SKIP][40] ([Intel XE#2887]) +2 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_chamelium_hpd@dp-hpd-after-hibernate:
- shard-bmg: [SKIP][41] ([Intel XE#8589]) -> [SKIP][42] ([Intel XE#2252])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_chamelium_hpd@dp-hpd-after-hibernate.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_chamelium_hpd@dp-hpd-after-hibernate.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][43] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935]) -> [SKIP][44] ([Intel XE#309] / [Intel XE#7343])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-lnl-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_dsc@dsc-basic:
- shard-bmg: [SKIP][45] ([Intel XE#8589]) -> [SKIP][46] ([Intel XE#8265])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_dsc@dsc-basic.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_dsc@dsc-basic.html
* igt@kms_fbcon_fbt@fbc:
- shard-bmg: [SKIP][47] ([Intel XE#8589]) -> [SKIP][48] ([Intel XE#4156] / [Intel XE#7425])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_fbcon_fbt@fbc.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_fbcon_fbt@fbc.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][49] ([Intel XE#301] / [Intel XE#3149]) -> [FAIL][50] ([Intel XE#301])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-2p-rte:
- shard-bmg: [SKIP][51] ([Intel XE#8589]) -> [SKIP][52] ([Intel XE#4141]) +2 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-rte.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-rte.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-shrfb-plflip-blt:
- shard-bmg: [SKIP][53] ([Intel XE#8589]) -> [SKIP][54] ([Intel XE#2311]) +4 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-shrfb-plflip-blt.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-mmap-wc:
- shard-bmg: [SKIP][55] ([Intel XE#8589]) -> [SKIP][56] ([Intel XE#7061])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-mmap-wc.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt:
- shard-bmg: [SKIP][57] ([Intel XE#8589]) -> [SKIP][58] ([Intel XE#2313]) +4 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-argb161616f-draw-mmap-wc:
- shard-bmg: [SKIP][59] ([Intel XE#8589]) -> [SKIP][60] ([Intel XE#7061] / [Intel XE#7356])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-mmap-wc.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-mmap-wc.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-bmg: [SKIP][61] ([Intel XE#8589]) -> [SKIP][62] ([Intel XE#1489])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][63] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][64] ([Intel XE#2509] / [Intel XE#7437])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vrr@lobf:
- shard-bmg: [SKIP][65] ([Intel XE#8589]) -> [SKIP][66] ([Intel XE#2168] / [Intel XE#7444])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@kms_vrr@lobf.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@kms_vrr@lobf.html
* igt@xe_exec_multi_queue@few-execs-dyn-priority:
- shard-bmg: [SKIP][67] ([Intel XE#8589]) -> [SKIP][68] ([Intel XE#8364]) +1 other test skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@xe_exec_multi_queue@few-execs-dyn-priority.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@xe_exec_multi_queue@few-execs-dyn-priority.html
* igt@xe_pat@xa-app-transient-media-off:
- shard-bmg: [SKIP][69] ([Intel XE#8589]) -> [SKIP][70] ([Intel XE#7590])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23/shard-bmg-5/igt@xe_pat@xa-app-transient-media-off.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/shard-bmg-1/igt@xe_pat@xa-app-transient-media-off.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7444]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7444
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#7774]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7774
[Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
[Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
[Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
[Intel XE#8589]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8589
[Intel XE#8749]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8749
Build changes
-------------
* Linux: xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23 -> xe-pw-171545v2
IGT_9038: 9038
xe-5543-c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23: c2cb32e2a8efaf9fa8d472f7bf3d5fe77ea7ec23
xe-pw-171545v2: 171545v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171545v2/index.html
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2026-08-04 5:12 [PATCH v1] drm/xe/ras: Fix invalid health error code Raag Jadav
2026-08-04 5:23 ` ✓ CI.KUnit: success for " Patchwork
2026-08-04 6:36 ` [PATCH v1] " Tauro, Riana
2026-08-04 6:56 ` Michal Wajdeczko
2026-08-04 8:07 ` Raag Jadav
2026-08-04 8:31 ` Tauro, Riana
2026-08-04 10:16 ` Raag Jadav
2026-08-04 6:41 ` ✓ Xe.CI.FULL: success for " Patchwork
2026-08-04 13:37 ` ✓ CI.KUnit: " Patchwork
2026-08-05 5:58 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-08-05 8:25 ` ✓ CI.KUnit: success for drm/xe/ras: Fix invalid health error code (rev2) Patchwork
2026-08-05 9:32 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-08-05 16:34 ` ✓ Xe.CI.FULL: success " Patchwork
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