[PATCH 0/3] drm/xe/ggtt: fix stale GGTT mappings on unmap

[PATCH 0/3] drm/xe/ggtt: fix stale GGTT mappings on unmap

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

This series addresses two related GGTT teardown issues on multi-queue
platforms:

First issue: unmapped GGTT ranges resolve to the scratch page. Because
scratch is a valid PTE, a re-walk of a freed range never faults, so any
stale TLB translation left behind is masked - the freed range silently
reads scratch instead of surfacing the problem. On multi-queue platforms
Patch 1 does not allocate the scratch page at all, so the whole GGTT -
initial clear and unmap alike - holds PTE=0 and faults consistently for
the entire boot. Other platforms keep scratch and are unchanged.

Second issue: engines cache GGTT translations in their own TLBs. The
existing GGTT invalidation (xe_tlb_inval_ggtt()) does not reach those
engine-side TLBs, so after an unmap an engine can keep hitting the stale
translation and read the old page. Patches 2 and 3 add and use a full
(INVAL_FULL, intra-VF) invalidation to drain the engine TLBs on unmap.

Patch 1: drm/xe/ggtt: fault on unmapped GGTT for multi-queue platforms
    Skip allocating the GGTT scratch page on multi-queue platforms so
    cleared and unmapped ranges hold PTE=0 and a stale-TLB access to a
    freed range faults instead of silently landing on scratch.

Patch 2: drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT
         invalidation helper
    xe_tlb_inval_ggtt_full() + GuC backend flush engine TLBs across all
    engines within the requesting VF.

Patch 3: drm/xe/ggtt: invalidate engine GGTT TLBs for multi-queue GTs
    Issue the invalidation on the unmap path, gated on the GT having any
    multi-queue engine class, for both the primary and media GTs.
    Draining the engine TLB on teardown guarantees a recycled range's
    next occupant cannot hit the predecessor's cached translation.

v2:
    - Add xe_gt_has_multi_queue() helper and gate on it (Niranjana).
    - Add xe_tlb_inval_issue_op_wait() and refactor the GGTT
      invalidation entry points onto it (Niranjana).
    - Other nits.

v3:
    - Patch 1: drop the scratch page entirely on multi-queue platforms
      instead of toggling scratch vs faulting at unmap, so the behaviour
      is consistent for the whole boot (Matt Brost).
    - Patch 2: avoid the CT-state TOCTOU; (Matt Brost).
    - Patch 3: invalidate both the primary and media GTs, similar to
      xe_ggtt_invalidate() (Matt Brost)

v4:
    - Patch 2: propagate real send errors instead of masking them as
      -ECANCELED (Sashiko).

Tangudu Tilak Tirumalesh (3):
  drm/xe/ggtt: fault on unmapped GGTT for multi-queue platforms
  drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation
    helper
  drm/xe/ggtt: invalidate engine GGTT TLBs for multi-queue GTs

 drivers/gpu/drm/xe/xe_ggtt.c            | 68 +++++++++++++++++++------
 drivers/gpu/drm/xe/xe_gt.h              | 13 +++++
 drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 25 +++++++++
 drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 ++++++++++++---
 drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
 drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++
 6 files changed, 137 insertions(+), 22 deletions(-)

-- 
2.46.0

[PATCH 1/3] drm/xe/ggtt: fault on unmapped GGTT for multi-queue platforms

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

On multi-queue platforms an engine can retain a stale GGTT TLB entry
for a range that has since been unmapped and recycled. When unmapped
GGTT entries resolve to the scratch page, such a stale access lands on
scratch silently instead of faulting, masking the error.

On multi-queue platforms, skip allocating the GGTT scratch page so
cleared and unmapped ranges hold PTE=0. The whole GGTT then
consistently faults on unmapped access for the entire boot; other
platforms keep the scratch page and are unaffected.

v2:
- Add xe_gt_has_multi_queue() helper and address nits (Niranjana)
v3:
- Drop scratch entirely instead of toggling per-unmap (Matt Brost)

Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
---
 drivers/gpu/drm/xe/xe_ggtt.c | 39 ++++++++++++++++++++++--------------
 drivers/gpu/drm/xe/xe_gt.h   | 13 ++++++++++++
 2 files changed, 37 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 8ec23862477f..bd65100283e3 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -20,6 +20,7 @@
 #include "regs/xe_regs.h"
 #include "xe_assert.h"
 #include "xe_bo.h"
+#include "xe_gt.h"
 #include "xe_gt_printk.h"
 #include "xe_gt_types.h"
 #include "xe_map.h"
@@ -533,27 +534,35 @@ void xe_ggtt_node_remove(struct xe_ggtt_node *node, bool invalidate)
 int xe_ggtt_init(struct xe_ggtt *ggtt)
 {
 	struct xe_device *xe = tile_to_xe(ggtt->tile);
-	unsigned int flags;
 	int err;
 
 	/*
-	 * So we don't need to worry about 64K GGTT layout when dealing with
-	 * scratch entries, rather keep the scratch page in system memory on
-	 * platforms where 64K pages are needed for VRAM.
+	 * Multi-queue platforms leave unmapped GGTT faulting (no scratch) so a
+	 * stale engine TLB entry can't silently resolve to the scratch page.
 	 */
-	flags = 0;
-	if (ggtt->flags & XE_GGTT_FLAGS_64K)
-		flags |= XE_BO_FLAG_SYSTEM;
-	else
-		flags |= XE_BO_FLAG_VRAM_IF_DGFX(ggtt->tile);
+	if (!xe_gt_has_multi_queue(ggtt->tile->primary_gt)) {
+		unsigned int flags = 0;
+
+		/*
+		 * So we don't need to worry about 64K GGTT layout when dealing
+		 * with scratch entries, rather keep the scratch page in system
+		 * memory on platforms where 64K pages are needed for VRAM.
+		 */
+		if (ggtt->flags & XE_GGTT_FLAGS_64K)
+			flags |= XE_BO_FLAG_SYSTEM;
+		else
+			flags |= XE_BO_FLAG_VRAM_IF_DGFX(ggtt->tile);
 
-	ggtt->scratch = xe_managed_bo_create_pin_map(xe, ggtt->tile, XE_PAGE_SIZE, flags);
-	if (IS_ERR(ggtt->scratch)) {
-		err = PTR_ERR(ggtt->scratch);
-		goto err;
-	}
+		ggtt->scratch = xe_managed_bo_create_pin_map(xe, ggtt->tile,
+							     XE_PAGE_SIZE, flags);
+		if (IS_ERR(ggtt->scratch)) {
+			err = PTR_ERR(ggtt->scratch);
+			goto err;
+		}
 
-	xe_map_memset(xe, &ggtt->scratch->vmap, 0, 0, xe_bo_size(ggtt->scratch));
+		xe_map_memset(xe, &ggtt->scratch->vmap, 0, 0,
+			      xe_bo_size(ggtt->scratch));
+	}
 
 	xe_ggtt_initial_clear(ggtt);
 
diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
index 65a4655b0994..92d934d50244 100644
--- a/drivers/gpu/drm/xe/xe_gt.h
+++ b/drivers/gpu/drm/xe/xe_gt.h
@@ -160,4 +160,17 @@ static inline bool xe_gt_supports_multi_queue(const struct xe_gt *gt,
 	return gt->info.multi_queue_engine_class_mask & BIT(class);
 }
 
+/**
+ * xe_gt_has_multi_queue() - Check if gt supports multi-queue on
+ * any engine class.
+ *
+ * @gt: the GT object (may be NULL)
+ *
+ * Return: true if any engine class on @gt supports multi queue, else false
+ */
+static inline bool xe_gt_has_multi_queue(const struct xe_gt *gt)
+{
+	return gt && gt->info.multi_queue_engine_class_mask;
+}
+
 #endif
-- 
2.46.0

Re: [PATCH 1/3] drm/xe/ggtt: fault on unmapped GGTT for multi-queue platforms

[Niranjana Vishwanathapura]

On Wed, Aug 26, 2026 at 04:55:31PM +0530, tilak.tirumalesh.tangudu@intel.com wrote:
>From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>
>On multi-queue platforms an engine can retain a stale GGTT TLB entry
>for a range that has since been unmapped and recycled. When unmapped
>GGTT entries resolve to the scratch page, such a stale access lands on
>scratch silently instead of faulting, masking the error.
>
>On multi-queue platforms, skip allocating the GGTT scratch page so
>cleared and unmapped ranges hold PTE=0. The whole GGTT then
>consistently faults on unmapped access for the entire boot; other
>platforms keep the scratch page and are unaffected.
>
>v2:
>- Add xe_gt_has_multi_queue() helper and address nits (Niranjana)
>v3:
>- Drop scratch entirely instead of toggling per-unmap (Matt Brost)
>
>Assisted-by: Claude:claude-opus-4-8
>Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>---
> drivers/gpu/drm/xe/xe_ggtt.c | 39 ++++++++++++++++++++++--------------
> drivers/gpu/drm/xe/xe_gt.h   | 13 ++++++++++++
> 2 files changed, 37 insertions(+), 15 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
>index 8ec23862477f..bd65100283e3 100644
>--- a/drivers/gpu/drm/xe/xe_ggtt.c
>+++ b/drivers/gpu/drm/xe/xe_ggtt.c
>@@ -20,6 +20,7 @@
> #include "regs/xe_regs.h"
> #include "xe_assert.h"
> #include "xe_bo.h"
>+#include "xe_gt.h"
> #include "xe_gt_printk.h"
> #include "xe_gt_types.h"
> #include "xe_map.h"
>@@ -533,27 +534,35 @@ void xe_ggtt_node_remove(struct xe_ggtt_node *node, bool invalidate)
> int xe_ggtt_init(struct xe_ggtt *ggtt)
> {
> 	struct xe_device *xe = tile_to_xe(ggtt->tile);
>-	unsigned int flags;
> 	int err;
>
> 	/*
>-	 * So we don't need to worry about 64K GGTT layout when dealing with
>-	 * scratch entries, rather keep the scratch page in system memory on
>-	 * platforms where 64K pages are needed for VRAM.
>+	 * Multi-queue platforms leave unmapped GGTT faulting (no scratch) so a
>+	 * stale engine TLB entry can't silently resolve to the scratch page.
> 	 */

NIT...Comment sounds bit misleading, propbably good to reword.
May be, "For multi-queue platforms..."

LGTM,
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

>-	flags = 0;
>-	if (ggtt->flags & XE_GGTT_FLAGS_64K)
>-		flags |= XE_BO_FLAG_SYSTEM;
>-	else
>-		flags |= XE_BO_FLAG_VRAM_IF_DGFX(ggtt->tile);
>+	if (!xe_gt_has_multi_queue(ggtt->tile->primary_gt)) {
>+		unsigned int flags = 0;
>+
>+		/*
>+		 * So we don't need to worry about 64K GGTT layout when dealing
>+		 * with scratch entries, rather keep the scratch page in system
>+		 * memory on platforms where 64K pages are needed for VRAM.
>+		 */
>+		if (ggtt->flags & XE_GGTT_FLAGS_64K)
>+			flags |= XE_BO_FLAG_SYSTEM;
>+		else
>+			flags |= XE_BO_FLAG_VRAM_IF_DGFX(ggtt->tile);
>
>-	ggtt->scratch = xe_managed_bo_create_pin_map(xe, ggtt->tile, XE_PAGE_SIZE, flags);
>-	if (IS_ERR(ggtt->scratch)) {
>-		err = PTR_ERR(ggtt->scratch);
>-		goto err;
>-	}
>+		ggtt->scratch = xe_managed_bo_create_pin_map(xe, ggtt->tile,
>+							     XE_PAGE_SIZE, flags);
>+		if (IS_ERR(ggtt->scratch)) {
>+			err = PTR_ERR(ggtt->scratch);
>+			goto err;
>+		}
>
>-	xe_map_memset(xe, &ggtt->scratch->vmap, 0, 0, xe_bo_size(ggtt->scratch));
>+		xe_map_memset(xe, &ggtt->scratch->vmap, 0, 0,
>+			      xe_bo_size(ggtt->scratch));
>+	}
>
> 	xe_ggtt_initial_clear(ggtt);
>
>diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
>index 65a4655b0994..92d934d50244 100644
>--- a/drivers/gpu/drm/xe/xe_gt.h
>+++ b/drivers/gpu/drm/xe/xe_gt.h
>@@ -160,4 +160,17 @@ static inline bool xe_gt_supports_multi_queue(const struct xe_gt *gt,
> 	return gt->info.multi_queue_engine_class_mask & BIT(class);
> }
>
>+/**
>+ * xe_gt_has_multi_queue() - Check if gt supports multi-queue on
>+ * any engine class.
>+ *
>+ * @gt: the GT object (may be NULL)
>+ *
>+ * Return: true if any engine class on @gt supports multi queue, else false
>+ */
>+static inline bool xe_gt_has_multi_queue(const struct xe_gt *gt)
>+{
>+	return gt && gt->info.multi_queue_engine_class_mask;
>+}
>+
> #endif
>-- 
>2.46.0
>

Re: [PATCH 1/3] drm/xe/ggtt: fault on unmapped GGTT for multi-queue platforms

[Matt Roper]

On Wed, Aug 26, 2026 at 04:55:31PM +0530, tilak.tirumalesh.tangudu@intel.com wrote:
> From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> 
> On multi-queue platforms an engine can retain a stale GGTT TLB entry
> for a range that has since been unmapped and recycled. When unmapped
> GGTT entries resolve to the scratch page, such a stale access lands on
> scratch silently instead of faulting, masking the error.

Drive-by question; I haven't reviewed the changes in depth.  How does
multi-queue relate to GGTT here?  Multi-queue submission is something
userspace can do, but those userspace submissions can't access the GGTT,
only the PPGTT.  GGTT accesses would only come from privileged
instructions that the KMD inserts into the ring and I don't think those
are ever multi-queue.  Am I overlooking something?  It seems like GGTT
and multi-queue should be orthogonal.


Matt

> 
> On multi-queue platforms, skip allocating the GGTT scratch page so
> cleared and unmapped ranges hold PTE=0. The whole GGTT then
> consistently faults on unmapped access for the entire boot; other
> platforms keep the scratch page and are unaffected.
> 
> v2:
> - Add xe_gt_has_multi_queue() helper and address nits (Niranjana)
> v3:
> - Drop scratch entirely instead of toggling per-unmap (Matt Brost)
> 
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_ggtt.c | 39 ++++++++++++++++++++++--------------
>  drivers/gpu/drm/xe/xe_gt.h   | 13 ++++++++++++
>  2 files changed, 37 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index 8ec23862477f..bd65100283e3 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -20,6 +20,7 @@
>  #include "regs/xe_regs.h"
>  #include "xe_assert.h"
>  #include "xe_bo.h"
> +#include "xe_gt.h"
>  #include "xe_gt_printk.h"
>  #include "xe_gt_types.h"
>  #include "xe_map.h"
> @@ -533,27 +534,35 @@ void xe_ggtt_node_remove(struct xe_ggtt_node *node, bool invalidate)
>  int xe_ggtt_init(struct xe_ggtt *ggtt)
>  {
>  	struct xe_device *xe = tile_to_xe(ggtt->tile);
> -	unsigned int flags;
>  	int err;
>  
>  	/*
> -	 * So we don't need to worry about 64K GGTT layout when dealing with
> -	 * scratch entries, rather keep the scratch page in system memory on
> -	 * platforms where 64K pages are needed for VRAM.
> +	 * Multi-queue platforms leave unmapped GGTT faulting (no scratch) so a
> +	 * stale engine TLB entry can't silently resolve to the scratch page.
>  	 */
> -	flags = 0;
> -	if (ggtt->flags & XE_GGTT_FLAGS_64K)
> -		flags |= XE_BO_FLAG_SYSTEM;
> -	else
> -		flags |= XE_BO_FLAG_VRAM_IF_DGFX(ggtt->tile);
> +	if (!xe_gt_has_multi_queue(ggtt->tile->primary_gt)) {
> +		unsigned int flags = 0;
> +
> +		/*
> +		 * So we don't need to worry about 64K GGTT layout when dealing
> +		 * with scratch entries, rather keep the scratch page in system
> +		 * memory on platforms where 64K pages are needed for VRAM.
> +		 */
> +		if (ggtt->flags & XE_GGTT_FLAGS_64K)
> +			flags |= XE_BO_FLAG_SYSTEM;
> +		else
> +			flags |= XE_BO_FLAG_VRAM_IF_DGFX(ggtt->tile);
>  
> -	ggtt->scratch = xe_managed_bo_create_pin_map(xe, ggtt->tile, XE_PAGE_SIZE, flags);
> -	if (IS_ERR(ggtt->scratch)) {
> -		err = PTR_ERR(ggtt->scratch);
> -		goto err;
> -	}
> +		ggtt->scratch = xe_managed_bo_create_pin_map(xe, ggtt->tile,
> +							     XE_PAGE_SIZE, flags);
> +		if (IS_ERR(ggtt->scratch)) {
> +			err = PTR_ERR(ggtt->scratch);
> +			goto err;
> +		}
>  
> -	xe_map_memset(xe, &ggtt->scratch->vmap, 0, 0, xe_bo_size(ggtt->scratch));
> +		xe_map_memset(xe, &ggtt->scratch->vmap, 0, 0,
> +			      xe_bo_size(ggtt->scratch));
> +	}
>  
>  	xe_ggtt_initial_clear(ggtt);
>  
> diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
> index 65a4655b0994..92d934d50244 100644
> --- a/drivers/gpu/drm/xe/xe_gt.h
> +++ b/drivers/gpu/drm/xe/xe_gt.h
> @@ -160,4 +160,17 @@ static inline bool xe_gt_supports_multi_queue(const struct xe_gt *gt,
>  	return gt->info.multi_queue_engine_class_mask & BIT(class);
>  }
>  
> +/**
> + * xe_gt_has_multi_queue() - Check if gt supports multi-queue on
> + * any engine class.
> + *
> + * @gt: the GT object (may be NULL)
> + *
> + * Return: true if any engine class on @gt supports multi queue, else false
> + */
> +static inline bool xe_gt_has_multi_queue(const struct xe_gt *gt)
> +{
> +	return gt && gt->info.multi_queue_engine_class_mask;
> +}
> +
>  #endif
> -- 
> 2.46.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 1/3] drm/xe/ggtt: fault on unmapped GGTT for multi-queue platforms

[Matthew Brost]

On Wed, Aug 26, 2026 at 01:10:34PM -0700, Matt Roper wrote:
> On Wed, Aug 26, 2026 at 04:55:31PM +0530, tilak.tirumalesh.tangudu@intel.com wrote:
> > From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> > 
> > On multi-queue platforms an engine can retain a stale GGTT TLB entry
> > for a range that has since been unmapped and recycled. When unmapped
> > GGTT entries resolve to the scratch page, such a stale access lands on
> > scratch silently instead of faulting, masking the error.
> 
> Drive-by question; I haven't reviewed the changes in depth.  How does
> multi-queue relate to GGTT here?  Multi-queue submission is something

The ring buffer is GGTT mapped (?), multi-q doesn't context switch like
normal q, if we missed TLB invalidations we get slient errors as scratch
could be prefetched into the TLBs - this is my *guess*. More below.

> userspace can do, but those userspace submissions can't access the GGTT,
> only the PPGTT.  GGTT accesses would only come from privileged
> instructions that the KMD inserts into the ring and I don't think those
> are ever multi-queue.  Am I overlooking something?  It seems like GGTT
> and multi-queue should be orthogonal.
> 

Also my question from the last rev has yet to be answered:

I'm a little confused about the rationale here. Can you elaborate on why
this is being done?

I'm inferring this is done to detect missing TLB invalidations but this
is not stated anywhere - i.e., a reader of the code can't lookat the at
the git log or comments in the code to figure why multi-q doesn't use
scratch and everyone else does. Likewise the commit message should or
code comment should answer Matt's R question as well.

Matt

> 
> Matt
> 
> > 
> > On multi-queue platforms, skip allocating the GGTT scratch page so
> > cleared and unmapped ranges hold PTE=0. The whole GGTT then
> > consistently faults on unmapped access for the entire boot; other
> > platforms keep the scratch page and are unaffected.
> > 
> > v2:
> > - Add xe_gt_has_multi_queue() helper and address nits (Niranjana)
> > v3:
> > - Drop scratch entirely instead of toggling per-unmap (Matt Brost)
> > 
> > Assisted-by: Claude:claude-opus-4-8
> > Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> > ---
> >  drivers/gpu/drm/xe/xe_ggtt.c | 39 ++++++++++++++++++++++--------------
> >  drivers/gpu/drm/xe/xe_gt.h   | 13 ++++++++++++
> >  2 files changed, 37 insertions(+), 15 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> > index 8ec23862477f..bd65100283e3 100644
> > --- a/drivers/gpu/drm/xe/xe_ggtt.c
> > +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> > @@ -20,6 +20,7 @@
> >  #include "regs/xe_regs.h"
> >  #include "xe_assert.h"
> >  #include "xe_bo.h"
> > +#include "xe_gt.h"
> >  #include "xe_gt_printk.h"
> >  #include "xe_gt_types.h"
> >  #include "xe_map.h"
> > @@ -533,27 +534,35 @@ void xe_ggtt_node_remove(struct xe_ggtt_node *node, bool invalidate)
> >  int xe_ggtt_init(struct xe_ggtt *ggtt)
> >  {
> >  	struct xe_device *xe = tile_to_xe(ggtt->tile);
> > -	unsigned int flags;
> >  	int err;
> >  
> >  	/*
> > -	 * So we don't need to worry about 64K GGTT layout when dealing with
> > -	 * scratch entries, rather keep the scratch page in system memory on
> > -	 * platforms where 64K pages are needed for VRAM.
> > +	 * Multi-queue platforms leave unmapped GGTT faulting (no scratch) so a
> > +	 * stale engine TLB entry can't silently resolve to the scratch page.
> >  	 */
> > -	flags = 0;
> > -	if (ggtt->flags & XE_GGTT_FLAGS_64K)
> > -		flags |= XE_BO_FLAG_SYSTEM;
> > -	else
> > -		flags |= XE_BO_FLAG_VRAM_IF_DGFX(ggtt->tile);
> > +	if (!xe_gt_has_multi_queue(ggtt->tile->primary_gt)) {
> > +		unsigned int flags = 0;
> > +
> > +		/*
> > +		 * So we don't need to worry about 64K GGTT layout when dealing
> > +		 * with scratch entries, rather keep the scratch page in system
> > +		 * memory on platforms where 64K pages are needed for VRAM.
> > +		 */
> > +		if (ggtt->flags & XE_GGTT_FLAGS_64K)
> > +			flags |= XE_BO_FLAG_SYSTEM;
> > +		else
> > +			flags |= XE_BO_FLAG_VRAM_IF_DGFX(ggtt->tile);
> >  
> > -	ggtt->scratch = xe_managed_bo_create_pin_map(xe, ggtt->tile, XE_PAGE_SIZE, flags);
> > -	if (IS_ERR(ggtt->scratch)) {
> > -		err = PTR_ERR(ggtt->scratch);
> > -		goto err;
> > -	}
> > +		ggtt->scratch = xe_managed_bo_create_pin_map(xe, ggtt->tile,
> > +							     XE_PAGE_SIZE, flags);
> > +		if (IS_ERR(ggtt->scratch)) {
> > +			err = PTR_ERR(ggtt->scratch);
> > +			goto err;
> > +		}
> >  
> > -	xe_map_memset(xe, &ggtt->scratch->vmap, 0, 0, xe_bo_size(ggtt->scratch));
> > +		xe_map_memset(xe, &ggtt->scratch->vmap, 0, 0,
> > +			      xe_bo_size(ggtt->scratch));
> > +	}
> >  
> >  	xe_ggtt_initial_clear(ggtt);
> >  
> > diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
> > index 65a4655b0994..92d934d50244 100644
> > --- a/drivers/gpu/drm/xe/xe_gt.h
> > +++ b/drivers/gpu/drm/xe/xe_gt.h
> > @@ -160,4 +160,17 @@ static inline bool xe_gt_supports_multi_queue(const struct xe_gt *gt,
> >  	return gt->info.multi_queue_engine_class_mask & BIT(class);
> >  }
> >  
> > +/**
> > + * xe_gt_has_multi_queue() - Check if gt supports multi-queue on
> > + * any engine class.
> > + *
> > + * @gt: the GT object (may be NULL)
> > + *
> > + * Return: true if any engine class on @gt supports multi queue, else false
> > + */
> > +static inline bool xe_gt_has_multi_queue(const struct xe_gt *gt)
> > +{
> > +	return gt && gt->info.multi_queue_engine_class_mask;
> > +}
> > +
> >  #endif
> > -- 
> > 2.46.0
> > 
> 
> -- 
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation

RE: [PATCH 1/3] drm/xe/ggtt: fault on unmapped GGTT for multi-queue platforms

[Tangudu, Tilak Tirumalesh]

> -----Original Message-----
> From: Brost, Matthew <matthew.brost@intel.com>
> Sent: 27 August 2026 01:54
> To: Roper, Matthew D <matthew.d.roper@intel.com>
> Cc: Tangudu, Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>;
> Vishwanathapura, Niranjana <niranjana.vishwanathapura@intel.com>; intel-
> xe@lists.freedesktop.org
> Subject: Re: [PATCH 1/3] drm/xe/ggtt: fault on unmapped GGTT for multi-queue
> platforms
> 
> On Wed, Aug 26, 2026 at 01:10:34PM -0700, Matt Roper wrote:
> > On Wed, Aug 26, 2026 at 04:55:31PM +0530,
> tilak.tirumalesh.tangudu@intel.com wrote:
> > > From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> > >
> > > On multi-queue platforms an engine can retain a stale GGTT TLB entry
> > > for a range that has since been unmapped and recycled. When unmapped
> > > GGTT entries resolve to the scratch page, such a stale access lands
> > > on scratch silently instead of faulting, masking the error.
> >
> > Drive-by question; I haven't reviewed the changes in depth.  How does
> > multi-queue relate to GGTT here?  Multi-queue submission is something
> 
> The ring buffer is GGTT mapped (?), multi-q doesn't context switch like normal
> q, if we missed TLB invalidations we get slient errors as scratch could be
> prefetched into the TLBs - this is my *guess*. More below.
> 
> > userspace can do, but those userspace submissions can't access the
> > GGTT, only the PPGTT.  GGTT accesses would only come from privileged
> > instructions that the KMD inserts into the ring and I don't think
> > those are ever multi-queue.  Am I overlooking something?  It seems
> > like GGTT and multi-queue should be orthogonal.
> >
> 
> Also my question from the last rev has yet to be answered:
> 
> I'm a little confused about the rationale here. Can you elaborate on why this is
> being done?

Apologies for the response miss .
> 
> I'm inferring this is done to detect missing TLB invalidations but this is not
> stated anywhere - i.e., a reader of the code can't lookat the at the git log or
> comments in the code to figure why multi-q doesn't use scratch and everyone
> else does. Likewise the commit message should or code comment should
> answer Matt's R question as well.
> 
> Matt

During secondary queue append, Guc does lite restore and skips full context restore, so
TLB invalidations are missed.  This was observed while running multi queue tests
on another OS. We now detect the miss and do explicit flush on unmap.

I will add this in commit message and will add one liner comment in the code
Tilak

> 
> >
> > Matt
> >
> > >
> > > On multi-queue platforms, skip allocating the GGTT scratch page so
> > > cleared and unmapped ranges hold PTE=0. The whole GGTT then
> > > consistently faults on unmapped access for the entire boot; other
> > > platforms keep the scratch page and are unaffected.
> > >
> > > v2:
> > > - Add xe_gt_has_multi_queue() helper and address nits (Niranjana)
> > > v3:
> > > - Drop scratch entirely instead of toggling per-unmap (Matt Brost)
> > >
> > > Assisted-by: Claude:claude-opus-4-8
> > > Signed-off-by: Tangudu Tilak Tirumalesh
> > > <tilak.tirumalesh.tangudu@intel.com>
> > > ---
> > >  drivers/gpu/drm/xe/xe_ggtt.c | 39 ++++++++++++++++++++++--------------
> > >  drivers/gpu/drm/xe/xe_gt.h   | 13 ++++++++++++
> > >  2 files changed, 37 insertions(+), 15 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_ggtt.c
> > > b/drivers/gpu/drm/xe/xe_ggtt.c index 8ec23862477f..bd65100283e3
> > > 100644
> > > --- a/drivers/gpu/drm/xe/xe_ggtt.c
> > > +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> > > @@ -20,6 +20,7 @@
> > >  #include "regs/xe_regs.h"
> > >  #include "xe_assert.h"
> > >  #include "xe_bo.h"
> > > +#include "xe_gt.h"
> > >  #include "xe_gt_printk.h"
> > >  #include "xe_gt_types.h"
> > >  #include "xe_map.h"
> > > @@ -533,27 +534,35 @@ void xe_ggtt_node_remove(struct xe_ggtt_node
> > > *node, bool invalidate)  int xe_ggtt_init(struct xe_ggtt *ggtt)  {
> > >  	struct xe_device *xe = tile_to_xe(ggtt->tile);
> > > -	unsigned int flags;
> > >  	int err;
> > >
> > >  	/*
> > > -	 * So we don't need to worry about 64K GGTT layout when dealing with
> > > -	 * scratch entries, rather keep the scratch page in system memory on
> > > -	 * platforms where 64K pages are needed for VRAM.
> > > +	 * Multi-queue platforms leave unmapped GGTT faulting (no scratch) so
> a
> > > +	 * stale engine TLB entry can't silently resolve to the scratch page.
> > >  	 */
> > > -	flags = 0;
> > > -	if (ggtt->flags & XE_GGTT_FLAGS_64K)
> > > -		flags |= XE_BO_FLAG_SYSTEM;
> > > -	else
> > > -		flags |= XE_BO_FLAG_VRAM_IF_DGFX(ggtt->tile);
> > > +	if (!xe_gt_has_multi_queue(ggtt->tile->primary_gt)) {
> > > +		unsigned int flags = 0;
> > > +
> > > +		/*
> > > +		 * So we don't need to worry about 64K GGTT layout when
> dealing
> > > +		 * with scratch entries, rather keep the scratch page in system
> > > +		 * memory on platforms where 64K pages are needed for
> VRAM.
> > > +		 */
> > > +		if (ggtt->flags & XE_GGTT_FLAGS_64K)
> > > +			flags |= XE_BO_FLAG_SYSTEM;
> > > +		else
> > > +			flags |= XE_BO_FLAG_VRAM_IF_DGFX(ggtt->tile);
> > >
> > > -	ggtt->scratch = xe_managed_bo_create_pin_map(xe, ggtt->tile,
> XE_PAGE_SIZE, flags);
> > > -	if (IS_ERR(ggtt->scratch)) {
> > > -		err = PTR_ERR(ggtt->scratch);
> > > -		goto err;
> > > -	}
> > > +		ggtt->scratch = xe_managed_bo_create_pin_map(xe, ggtt->tile,
> > > +							     XE_PAGE_SIZE,
> flags);
> > > +		if (IS_ERR(ggtt->scratch)) {
> > > +			err = PTR_ERR(ggtt->scratch);
> > > +			goto err;
> > > +		}
> > >
> > > -	xe_map_memset(xe, &ggtt->scratch->vmap, 0, 0, xe_bo_size(ggtt-
> >scratch));
> > > +		xe_map_memset(xe, &ggtt->scratch->vmap, 0, 0,
> > > +			      xe_bo_size(ggtt->scratch));
> > > +	}
> > >
> > >  	xe_ggtt_initial_clear(ggtt);
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
> > > index 65a4655b0994..92d934d50244 100644
> > > --- a/drivers/gpu/drm/xe/xe_gt.h
> > > +++ b/drivers/gpu/drm/xe/xe_gt.h
> > > @@ -160,4 +160,17 @@ static inline bool
> xe_gt_supports_multi_queue(const struct xe_gt *gt,
> > >  	return gt->info.multi_queue_engine_class_mask & BIT(class);  }
> > >
> > > +/**
> > > + * xe_gt_has_multi_queue() - Check if gt supports multi-queue on
> > > + * any engine class.
> > > + *
> > > + * @gt: the GT object (may be NULL)
> > > + *
> > > + * Return: true if any engine class on @gt supports multi queue,
> > > +else false  */ static inline bool xe_gt_has_multi_queue(const
> > > +struct xe_gt *gt) {
> > > +	return gt && gt->info.multi_queue_engine_class_mask;
> > > +}
> > > +
> > >  #endif
> > > --
> > > 2.46.0
> > >
> >
> > --
> > Matt Roper
> > Graphics Software Engineer
> > Linux GPU Platform Enablement
> > Intel Corporation

[PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Add xe_tlb_inval_ggtt_full() and its GuC backend
send_tlb_inval_ggtt_full() for full engine TLB invalidation
within the requesting VF across all engines.

v2:
- Refactor with new helper xe_tlb_inval_issue_op_wait() and address
  nits (Niranjana)
v3:
- Avoid TOCTOU issue around CT state (Matt Brost)
v4:
- Propagate real send errors instead of masking as -ECANCELED (Sashiko)

Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 25 +++++++++++++++
 drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 +++++++++++++++++++++----
 drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
 drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++++
 4 files changed, 72 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
index 046d0655122f..665483bf2e67 100644
--- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
@@ -98,6 +98,29 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
 	return -ECANCELED;
 }
 
+/*
+ * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across all engines
+ * within the VF.
+ */
+static int send_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval, u32 seqno)
+{
+	struct xe_guc *guc = tlb_inval->private;
+	u32 action[] = {
+		XE_GUC_ACTION_TLB_INVALIDATION,
+		seqno,
+		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
+	};
+	int ret;
+
+	ret = send_tlb_inval(guc, action, ARRAY_SIZE(action));
+
+	/* CT unavailable means nothing runs on the engines; treat as cancelled. */
+	if (ret == -ENODEV || ret == -ECANCELED)
+		return -ECANCELED;
+
+	return ret;
+}
+
 static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
 			     u64 gpu_addr)
 {
@@ -346,6 +369,7 @@ static long tlb_inval_timeout_delay(struct xe_tlb_inval *tlb_inval)
 static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
 	.all = send_tlb_inval_all,
 	.ggtt = send_tlb_inval_ggtt,
+	.ggtt_full = send_tlb_inval_ggtt_full,
 	.ppgtt = send_tlb_inval_asid_ppgtt,
 	.initialized = tlb_inval_initialized,
 	.flush = tlb_inval_flush,
@@ -354,6 +378,7 @@ static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
 
 static const struct xe_tlb_inval_ops guc_tlb_inval_ctx_ops = {
 	.ggtt = send_tlb_inval_ggtt,
+	.ggtt_full = send_tlb_inval_ggtt_full,
 	.all = send_tlb_inval_all,
 	.ppgtt = send_tlb_inval_ctx_ppgtt,
 	.initialized = tlb_inval_initialized,
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index bbd21d393062..7c3bf32d9258 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -301,26 +301,56 @@ int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
 }
 
 /**
- * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
+ * xe_tlb_inval_issue_op_wait() - Issue a TLB invalidation and wait
  * @tlb_inval: TLB invalidation client
- *
- * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
- * caller can use the invalidation fence to wait for completion.
+ * @op: backend invalidation hook to issue
  *
  * Return: 0 on success, negative error code on error
  */
-int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
+static int xe_tlb_inval_issue_op_wait(struct xe_tlb_inval *tlb_inval,
+				      int (*op)(struct xe_tlb_inval *tlb_inval, u32 seqno))
 {
 	struct xe_tlb_inval_fence fence, *fence_ptr = &fence;
 	int ret;
 
 	xe_tlb_inval_fence_init(tlb_inval, fence_ptr, true);
-	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, tlb_inval->ops->ggtt);
+	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, op);
 	xe_tlb_inval_fence_wait(fence_ptr);
 
 	return ret;
 }
 
+/**
+ * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
+ * @tlb_inval: TLB invalidation client
+ *
+ * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
+ * caller can use the invalidation fence to wait for completion.
+ *
+ * Return: 0 on success, negative error code on error
+ */
+int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
+{
+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt);
+}
+
+/**
+ * xe_tlb_inval_ggtt_full() - Full engine TLB invalidation within a VF
+ * @tlb_inval: TLB invalidation client
+ *
+ * Issue INVAL_FULL (intra vf) to flush engine TLBs across all engines
+ * within the requesting VF.
+ *
+ * Return: 0 on success, negative error code on error
+ */
+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval)
+{
+	if (!tlb_inval->ops->ggtt_full)
+		return -EOPNOTSUPP;
+
+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt_full);
+}
+
 /**
  * xe_tlb_inval_range() - Issue a TLB invalidation for an address range
  * @tlb_inval: TLB invalidation client
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
index a76b7823a5f2..665072b4b81d 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
@@ -20,6 +20,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
 int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
 		     struct xe_tlb_inval_fence *fence);
 int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval);
 void xe_tlb_inval_vm(struct xe_tlb_inval *tlb_inval, struct xe_vm *vm);
 int xe_tlb_inval_range(struct xe_tlb_inval *tlb_inval,
 		       struct xe_tlb_inval_fence *fence,
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
index 3d1797d186fd..d77be1aedc91 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
@@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
 	 */
 	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
 
+	/**
+	 * @ggtt_full: Full engine TLB invalidation within a VF
+	 * @tlb_inval: TLB invalidation client
+	 * @seqno: Seqno of TLB invalidation
+	 *
+	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
+	 * failure
+	 */
+	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);
+
 	/**
 	 * @ppgtt: Invalidate per-process translation TLBs
 	 * @tlb_inval: TLB invalidation client
-- 
2.46.0

Re: [PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[Niranjana Vishwanathapura]

On Wed, Aug 26, 2026 at 04:55:32PM +0530, tilak.tirumalesh.tangudu@intel.com wrote:
>From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>
>Add xe_tlb_inval_ggtt_full() and its GuC backend
>send_tlb_inval_ggtt_full() for full engine TLB invalidation
>within the requesting VF across all engines.
>
>v2:
>- Refactor with new helper xe_tlb_inval_issue_op_wait() and address
>  nits (Niranjana)
>v3:
>- Avoid TOCTOU issue around CT state (Matt Brost)
>v4:
>- Propagate real send errors instead of masking as -ECANCELED (Sashiko)
>
>Assisted-by: Claude:claude-opus-4-8
>Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>---
> drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 25 +++++++++++++++
> drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 +++++++++++++++++++++----
> drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
> drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++++
> 4 files changed, 72 insertions(+), 6 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
>index 046d0655122f..665483bf2e67 100644
>--- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
>+++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
>@@ -98,6 +98,29 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
> 	return -ECANCELED;
> }
>
>+/*
>+ * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across all engines
>+ * within the VF.
>+ */
>+static int send_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval, u32 seqno)
>+{
>+	struct xe_guc *guc = tlb_inval->private;
>+	u32 action[] = {
>+		XE_GUC_ACTION_TLB_INVALIDATION,
>+		seqno,
>+		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
>+	};
>+	int ret;
>+
>+	ret = send_tlb_inval(guc, action, ARRAY_SIZE(action));
>+
>+	/* CT unavailable means nothing runs on the engines; treat as cancelled. */
>+	if (ret == -ENODEV || ret == -ECANCELED)
>+		return -ECANCELED;

Looks like we don't need the check 'ret == -ECANCELED' here (redundent).
Basically, we only need,
if (ret == -ENODEV)
      ret = -ECANCELED;

Also, It seems bit odd that other functions like send_tlb_inval_all(),
send_tlb_inval_lmmtt() etc, has similar structure and similar documentation in
xe_tlb_inval_types.h (regarding -ECANCELED), but doesn't do this conversion.
So, they are not treating XE_GUC_CT_STATE_DISABLED (where guc_ct_send returns
ENODEV) as a 'cancelled' state. May be here also we should do that for now,
if we need fix, then it will be a fix for all of these callback functions later.

Niranjana

>+
>+	return ret;
>+}
>+
> static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
> 			     u64 gpu_addr)
> {
>@@ -346,6 +369,7 @@ static long tlb_inval_timeout_delay(struct xe_tlb_inval *tlb_inval)
> static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
> 	.all = send_tlb_inval_all,
> 	.ggtt = send_tlb_inval_ggtt,
>+	.ggtt_full = send_tlb_inval_ggtt_full,
> 	.ppgtt = send_tlb_inval_asid_ppgtt,
> 	.initialized = tlb_inval_initialized,
> 	.flush = tlb_inval_flush,
>@@ -354,6 +378,7 @@ static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
>
> static const struct xe_tlb_inval_ops guc_tlb_inval_ctx_ops = {
> 	.ggtt = send_tlb_inval_ggtt,
>+	.ggtt_full = send_tlb_inval_ggtt_full,
> 	.all = send_tlb_inval_all,
> 	.ppgtt = send_tlb_inval_ctx_ppgtt,
> 	.initialized = tlb_inval_initialized,
>diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
>index bbd21d393062..7c3bf32d9258 100644
>--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
>+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
>@@ -301,26 +301,56 @@ int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> }
>
> /**
>- * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
>+ * xe_tlb_inval_issue_op_wait() - Issue a TLB invalidation and wait
>  * @tlb_inval: TLB invalidation client
>- *
>- * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
>- * caller can use the invalidation fence to wait for completion.
>+ * @op: backend invalidation hook to issue
>  *
>  * Return: 0 on success, negative error code on error
>  */
>-int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
>+static int xe_tlb_inval_issue_op_wait(struct xe_tlb_inval *tlb_inval,
>+				      int (*op)(struct xe_tlb_inval *tlb_inval, u32 seqno))
> {
> 	struct xe_tlb_inval_fence fence, *fence_ptr = &fence;
> 	int ret;
>
> 	xe_tlb_inval_fence_init(tlb_inval, fence_ptr, true);
>-	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, tlb_inval->ops->ggtt);
>+	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, op);
> 	xe_tlb_inval_fence_wait(fence_ptr);
>
> 	return ret;
> }
>
>+/**
>+ * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
>+ * @tlb_inval: TLB invalidation client
>+ *
>+ * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
>+ * caller can use the invalidation fence to wait for completion.
>+ *
>+ * Return: 0 on success, negative error code on error
>+ */
>+int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
>+{
>+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt);
>+}
>+
>+/**
>+ * xe_tlb_inval_ggtt_full() - Full engine TLB invalidation within a VF
>+ * @tlb_inval: TLB invalidation client
>+ *
>+ * Issue INVAL_FULL (intra vf) to flush engine TLBs across all engines
>+ * within the requesting VF.
>+ *
>+ * Return: 0 on success, negative error code on error
>+ */
>+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval)
>+{
>+	if (!tlb_inval->ops->ggtt_full)
>+		return -EOPNOTSUPP;
>+
>+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt_full);
>+}
>+
> /**
>  * xe_tlb_inval_range() - Issue a TLB invalidation for an address range
>  * @tlb_inval: TLB invalidation client
>diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
>index a76b7823a5f2..665072b4b81d 100644
>--- a/drivers/gpu/drm/xe/xe_tlb_inval.h
>+++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
>@@ -20,6 +20,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
> int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> 		     struct xe_tlb_inval_fence *fence);
> int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
>+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval);
> void xe_tlb_inval_vm(struct xe_tlb_inval *tlb_inval, struct xe_vm *vm);
> int xe_tlb_inval_range(struct xe_tlb_inval *tlb_inval,
> 		       struct xe_tlb_inval_fence *fence,
>diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
>index 3d1797d186fd..d77be1aedc91 100644
>--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
>+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
>@@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
> 	 */
> 	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
>
>+	/**
>+	 * @ggtt_full: Full engine TLB invalidation within a VF
>+	 * @tlb_inval: TLB invalidation client
>+	 * @seqno: Seqno of TLB invalidation
>+	 *
>+	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
>+	 * failure
>+	 */
>+	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);
>+
> 	/**
> 	 * @ppgtt: Invalidate per-process translation TLBs
> 	 * @tlb_inval: TLB invalidation client
>-- 
>2.46.0
>

Re: [PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[Matthew Brost]

On Wed, Aug 26, 2026 at 12:30:56PM -0700, Niranjana Vishwanathapura wrote:
> On Wed, Aug 26, 2026 at 04:55:32PM +0530, tilak.tirumalesh.tangudu@intel.com wrote:
> > From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> > 
> > Add xe_tlb_inval_ggtt_full() and its GuC backend
> > send_tlb_inval_ggtt_full() for full engine TLB invalidation
> > within the requesting VF across all engines.
> > 
> > v2:
> > - Refactor with new helper xe_tlb_inval_issue_op_wait() and address
> >  nits (Niranjana)
> > v3:
> > - Avoid TOCTOU issue around CT state (Matt Brost)
> > v4:
> > - Propagate real send errors instead of masking as -ECANCELED (Sashiko)
> > 
> > Assisted-by: Claude:claude-opus-4-8
> > Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 25 +++++++++++++++
> > drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 +++++++++++++++++++++----
> > drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
> > drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++++
> > 4 files changed, 72 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > index 046d0655122f..665483bf2e67 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > @@ -98,6 +98,29 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
> > 	return -ECANCELED;
> > }
> > 
> > +/*
> > + * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across all engines
> > + * within the VF.
> > + */
> > +static int send_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval, u32 seqno)
> > +{
> > +	struct xe_guc *guc = tlb_inval->private;
> > +	u32 action[] = {
> > +		XE_GUC_ACTION_TLB_INVALIDATION,
> > +		seqno,
> > +		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
> > +	};
> > +	int ret;
> > +
> > +	ret = send_tlb_inval(guc, action, ARRAY_SIZE(action));
> > +
> > +	/* CT unavailable means nothing runs on the engines; treat as cancelled. */
> > +	if (ret == -ENODEV || ret == -ECANCELED)
> > +		return -ECANCELED;
> 
> Looks like we don't need the check 'ret == -ECANCELED' here (redundent).
> Basically, we only need,
> if (ret == -ENODEV)
>      ret = -ECANCELED;

I think actually -ENODEV is needed because it is odd corner that only
GGTT invalidations can legitimently hit with a blind CT send which was
my suggestion.

-ENODEV is the return if the CT is disabled (cold boot start)
-ECANCELED is return if the CT is stopped (runtime toggle)

GGTT invalidations can be issued during cold boots as these are kernel
objects, PPGTT cannot because these are user objects.

Thus, I think this actually correct in the current code.

Matt

> 
> Also, It seems bit odd that other functions like send_tlb_inval_all(),
> send_tlb_inval_lmmtt() etc, has similar structure and similar documentation in
> xe_tlb_inval_types.h (regarding -ECANCELED), but doesn't do this conversion.
> So, they are not treating XE_GUC_CT_STATE_DISABLED (where guc_ct_send returns
> ENODEV) as a 'cancelled' state. May be here also we should do that for now,
> if we need fix, then it will be a fix for all of these callback functions later.
> 
> Niranjana
> 
> > +
> > +	return ret;
> > +}
> > +
> > static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
> > 			     u64 gpu_addr)
> > {
> > @@ -346,6 +369,7 @@ static long tlb_inval_timeout_delay(struct xe_tlb_inval *tlb_inval)
> > static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
> > 	.all = send_tlb_inval_all,
> > 	.ggtt = send_tlb_inval_ggtt,
> > +	.ggtt_full = send_tlb_inval_ggtt_full,
> > 	.ppgtt = send_tlb_inval_asid_ppgtt,
> > 	.initialized = tlb_inval_initialized,
> > 	.flush = tlb_inval_flush,
> > @@ -354,6 +378,7 @@ static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
> > 
> > static const struct xe_tlb_inval_ops guc_tlb_inval_ctx_ops = {
> > 	.ggtt = send_tlb_inval_ggtt,
> > +	.ggtt_full = send_tlb_inval_ggtt_full,
> > 	.all = send_tlb_inval_all,
> > 	.ppgtt = send_tlb_inval_ctx_ppgtt,
> > 	.initialized = tlb_inval_initialized,
> > diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
> > index bbd21d393062..7c3bf32d9258 100644
> > --- a/drivers/gpu/drm/xe/xe_tlb_inval.c
> > +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
> > @@ -301,26 +301,56 @@ int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> > }
> > 
> > /**
> > - * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
> > + * xe_tlb_inval_issue_op_wait() - Issue a TLB invalidation and wait
> >  * @tlb_inval: TLB invalidation client
> > - *
> > - * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
> > - * caller can use the invalidation fence to wait for completion.
> > + * @op: backend invalidation hook to issue
> >  *
> >  * Return: 0 on success, negative error code on error
> >  */
> > -int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
> > +static int xe_tlb_inval_issue_op_wait(struct xe_tlb_inval *tlb_inval,
> > +				      int (*op)(struct xe_tlb_inval *tlb_inval, u32 seqno))
> > {
> > 	struct xe_tlb_inval_fence fence, *fence_ptr = &fence;
> > 	int ret;
> > 
> > 	xe_tlb_inval_fence_init(tlb_inval, fence_ptr, true);
> > -	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, tlb_inval->ops->ggtt);
> > +	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, op);
> > 	xe_tlb_inval_fence_wait(fence_ptr);
> > 
> > 	return ret;
> > }
> > 
> > +/**
> > + * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
> > + * @tlb_inval: TLB invalidation client
> > + *
> > + * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
> > + * caller can use the invalidation fence to wait for completion.
> > + *
> > + * Return: 0 on success, negative error code on error
> > + */
> > +int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
> > +{
> > +	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt);
> > +}
> > +
> > +/**
> > + * xe_tlb_inval_ggtt_full() - Full engine TLB invalidation within a VF
> > + * @tlb_inval: TLB invalidation client
> > + *
> > + * Issue INVAL_FULL (intra vf) to flush engine TLBs across all engines
> > + * within the requesting VF.
> > + *
> > + * Return: 0 on success, negative error code on error
> > + */
> > +int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval)
> > +{
> > +	if (!tlb_inval->ops->ggtt_full)
> > +		return -EOPNOTSUPP;
> > +
> > +	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt_full);
> > +}
> > +
> > /**
> >  * xe_tlb_inval_range() - Issue a TLB invalidation for an address range
> >  * @tlb_inval: TLB invalidation client
> > diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
> > index a76b7823a5f2..665072b4b81d 100644
> > --- a/drivers/gpu/drm/xe/xe_tlb_inval.h
> > +++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
> > @@ -20,6 +20,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
> > int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> > 		     struct xe_tlb_inval_fence *fence);
> > int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
> > +int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval);
> > void xe_tlb_inval_vm(struct xe_tlb_inval *tlb_inval, struct xe_vm *vm);
> > int xe_tlb_inval_range(struct xe_tlb_inval *tlb_inval,
> > 		       struct xe_tlb_inval_fence *fence,
> > diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > index 3d1797d186fd..d77be1aedc91 100644
> > --- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > +++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > @@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
> > 	 */
> > 	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
> > 
> > +	/**
> > +	 * @ggtt_full: Full engine TLB invalidation within a VF
> > +	 * @tlb_inval: TLB invalidation client
> > +	 * @seqno: Seqno of TLB invalidation
> > +	 *
> > +	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
> > +	 * failure
> > +	 */
> > +	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);
> > +
> > 	/**
> > 	 * @ppgtt: Invalidate per-process translation TLBs
> > 	 * @tlb_inval: TLB invalidation client
> > -- 
> > 2.46.0
> > 

Re: [PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[Matthew Brost]

On Wed, Aug 26, 2026 at 12:48:02PM -0700, Matthew Brost wrote:
> On Wed, Aug 26, 2026 at 12:30:56PM -0700, Niranjana Vishwanathapura wrote:
> > On Wed, Aug 26, 2026 at 04:55:32PM +0530, tilak.tirumalesh.tangudu@intel.com wrote:
> > > From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> > > 
> > > Add xe_tlb_inval_ggtt_full() and its GuC backend
> > > send_tlb_inval_ggtt_full() for full engine TLB invalidation
> > > within the requesting VF across all engines.
> > > 
> > > v2:
> > > - Refactor with new helper xe_tlb_inval_issue_op_wait() and address
> > >  nits (Niranjana)
> > > v3:
> > > - Avoid TOCTOU issue around CT state (Matt Brost)
> > > v4:
> > > - Propagate real send errors instead of masking as -ECANCELED (Sashiko)
> > > 
> > > Assisted-by: Claude:claude-opus-4-8
> > > Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> > > ---
> > > drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 25 +++++++++++++++
> > > drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 +++++++++++++++++++++----
> > > drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
> > > drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++++
> > > 4 files changed, 72 insertions(+), 6 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > > index 046d0655122f..665483bf2e67 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > > +++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > > @@ -98,6 +98,29 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
> > > 	return -ECANCELED;
> > > }
> > > 
> > > +/*
> > > + * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across all engines
> > > + * within the VF.
> > > + */
> > > +static int send_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval, u32 seqno)
> > > +{
> > > +	struct xe_guc *guc = tlb_inval->private;
> > > +	u32 action[] = {
> > > +		XE_GUC_ACTION_TLB_INVALIDATION,
> > > +		seqno,
> > > +		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
> > > +	};
> > > +	int ret;
> > > +
> > > +	ret = send_tlb_inval(guc, action, ARRAY_SIZE(action));
> > > +
> > > +	/* CT unavailable means nothing runs on the engines; treat as cancelled. */
> > > +	if (ret == -ENODEV || ret == -ECANCELED)
> > > +		return -ECANCELED;
> > 
> > Looks like we don't need the check 'ret == -ECANCELED' here (redundent).
> > Basically, we only need,
> > if (ret == -ENODEV)
> >      ret = -ECANCELED;
> 
> I think actually -ENODEV is needed because it is odd corner that only
> GGTT invalidations can legitimently hit with a blind CT send which was
> my suggestion.
> 
> -ENODEV is the return if the CT is disabled (cold boot start)
> -ECANCELED is return if the CT is stopped (runtime toggle)
> 
> GGTT invalidations can be issued during cold boots as these are kernel
> objects, PPGTT cannot because these are user objects.
> 
> Thus, I think this actually correct in the current code.
> 

Opps one more thing - iirc wedge devices return a different error code,
but that might be getting revert. We should check on that as I think
wedged needs to be handle here.

Matt

> Matt
> 
> > 
> > Also, It seems bit odd that other functions like send_tlb_inval_all(),
> > send_tlb_inval_lmmtt() etc, has similar structure and similar documentation in
> > xe_tlb_inval_types.h (regarding -ECANCELED), but doesn't do this conversion.
> > So, they are not treating XE_GUC_CT_STATE_DISABLED (where guc_ct_send returns
> > ENODEV) as a 'cancelled' state. May be here also we should do that for now,
> > if we need fix, then it will be a fix for all of these callback functions later.
> > 
> > Niranjana
> > 
> > > +
> > > +	return ret;
> > > +}
> > > +
> > > static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
> > > 			     u64 gpu_addr)
> > > {
> > > @@ -346,6 +369,7 @@ static long tlb_inval_timeout_delay(struct xe_tlb_inval *tlb_inval)
> > > static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
> > > 	.all = send_tlb_inval_all,
> > > 	.ggtt = send_tlb_inval_ggtt,
> > > +	.ggtt_full = send_tlb_inval_ggtt_full,
> > > 	.ppgtt = send_tlb_inval_asid_ppgtt,
> > > 	.initialized = tlb_inval_initialized,
> > > 	.flush = tlb_inval_flush,
> > > @@ -354,6 +378,7 @@ static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
> > > 
> > > static const struct xe_tlb_inval_ops guc_tlb_inval_ctx_ops = {
> > > 	.ggtt = send_tlb_inval_ggtt,
> > > +	.ggtt_full = send_tlb_inval_ggtt_full,
> > > 	.all = send_tlb_inval_all,
> > > 	.ppgtt = send_tlb_inval_ctx_ppgtt,
> > > 	.initialized = tlb_inval_initialized,
> > > diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
> > > index bbd21d393062..7c3bf32d9258 100644
> > > --- a/drivers/gpu/drm/xe/xe_tlb_inval.c
> > > +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
> > > @@ -301,26 +301,56 @@ int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> > > }
> > > 
> > > /**
> > > - * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
> > > + * xe_tlb_inval_issue_op_wait() - Issue a TLB invalidation and wait
> > >  * @tlb_inval: TLB invalidation client
> > > - *
> > > - * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
> > > - * caller can use the invalidation fence to wait for completion.
> > > + * @op: backend invalidation hook to issue
> > >  *
> > >  * Return: 0 on success, negative error code on error
> > >  */
> > > -int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
> > > +static int xe_tlb_inval_issue_op_wait(struct xe_tlb_inval *tlb_inval,
> > > +				      int (*op)(struct xe_tlb_inval *tlb_inval, u32 seqno))
> > > {
> > > 	struct xe_tlb_inval_fence fence, *fence_ptr = &fence;
> > > 	int ret;
> > > 
> > > 	xe_tlb_inval_fence_init(tlb_inval, fence_ptr, true);
> > > -	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, tlb_inval->ops->ggtt);
> > > +	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, op);
> > > 	xe_tlb_inval_fence_wait(fence_ptr);
> > > 
> > > 	return ret;
> > > }
> > > 
> > > +/**
> > > + * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
> > > + * @tlb_inval: TLB invalidation client
> > > + *
> > > + * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
> > > + * caller can use the invalidation fence to wait for completion.
> > > + *
> > > + * Return: 0 on success, negative error code on error
> > > + */
> > > +int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
> > > +{
> > > +	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt);
> > > +}
> > > +
> > > +/**
> > > + * xe_tlb_inval_ggtt_full() - Full engine TLB invalidation within a VF
> > > + * @tlb_inval: TLB invalidation client
> > > + *
> > > + * Issue INVAL_FULL (intra vf) to flush engine TLBs across all engines
> > > + * within the requesting VF.
> > > + *
> > > + * Return: 0 on success, negative error code on error
> > > + */
> > > +int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval)
> > > +{
> > > +	if (!tlb_inval->ops->ggtt_full)
> > > +		return -EOPNOTSUPP;
> > > +
> > > +	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt_full);
> > > +}
> > > +
> > > /**
> > >  * xe_tlb_inval_range() - Issue a TLB invalidation for an address range
> > >  * @tlb_inval: TLB invalidation client
> > > diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
> > > index a76b7823a5f2..665072b4b81d 100644
> > > --- a/drivers/gpu/drm/xe/xe_tlb_inval.h
> > > +++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
> > > @@ -20,6 +20,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
> > > int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> > > 		     struct xe_tlb_inval_fence *fence);
> > > int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
> > > +int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval);
> > > void xe_tlb_inval_vm(struct xe_tlb_inval *tlb_inval, struct xe_vm *vm);
> > > int xe_tlb_inval_range(struct xe_tlb_inval *tlb_inval,
> > > 		       struct xe_tlb_inval_fence *fence,
> > > diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > > index 3d1797d186fd..d77be1aedc91 100644
> > > --- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > > +++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > > @@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
> > > 	 */
> > > 	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
> > > 
> > > +	/**
> > > +	 * @ggtt_full: Full engine TLB invalidation within a VF
> > > +	 * @tlb_inval: TLB invalidation client
> > > +	 * @seqno: Seqno of TLB invalidation
> > > +	 *
> > > +	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
> > > +	 * failure
> > > +	 */
> > > +	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);
> > > +
> > > 	/**
> > > 	 * @ppgtt: Invalidate per-process translation TLBs
> > > 	 * @tlb_inval: TLB invalidation client
> > > -- 
> > > 2.46.0
> > > 

RE: [PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[Tangudu, Tilak Tirumalesh]

> -----Original Message-----
> From: Brost, Matthew <matthew.brost@intel.com>
> Sent: 27 August 2026 01:21
> To: Vishwanathapura, Niranjana <niranjana.vishwanathapura@intel.com>
> Cc: Tangudu, Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>; intel-
> xe@lists.freedesktop.org
> Subject: Re: [PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT
> invalidation helper
> 
> On Wed, Aug 26, 2026 at 12:48:02PM -0700, Matthew Brost wrote:
> > On Wed, Aug 26, 2026 at 12:30:56PM -0700, Niranjana Vishwanathapura
> wrote:
> > > On Wed, Aug 26, 2026 at 04:55:32PM +0530,
> tilak.tirumalesh.tangudu@intel.com wrote:
> > > > From: Tangudu Tilak Tirumalesh
> > > > <tilak.tirumalesh.tangudu@intel.com>
> > > >
> > > > Add xe_tlb_inval_ggtt_full() and its GuC backend
> > > > send_tlb_inval_ggtt_full() for full engine TLB invalidation within
> > > > the requesting VF across all engines.
> > > >
> > > > v2:
> > > > - Refactor with new helper xe_tlb_inval_issue_op_wait() and
> > > > address  nits (Niranjana)
> > > > v3:
> > > > - Avoid TOCTOU issue around CT state (Matt Brost)
> > > > v4:
> > > > - Propagate real send errors instead of masking as -ECANCELED
> > > > (Sashiko)
> > > >
> > > > Assisted-by: Claude:claude-opus-4-8
> > > > Signed-off-by: Tangudu Tilak Tirumalesh
> > > > <tilak.tirumalesh.tangudu@intel.com>
> > > > ---
> > > > drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 25 +++++++++++++++
> > > > drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 +++++++++++++++++++++----
> > > > drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
> > > > drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++++
> > > > 4 files changed, 72 insertions(+), 6 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > > > b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > > > index 046d0655122f..665483bf2e67 100644
> > > > --- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > > > +++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > > > @@ -98,6 +98,29 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval
> *tlb_inval, u32 seqno)
> > > > 	return -ECANCELED;
> > > > }
> > > >
> > > > +/*
> > > > + * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across
> > > > +all engines
> > > > + * within the VF.
> > > > + */
> > > > +static int send_tlb_inval_ggtt_full(struct xe_tlb_inval
> > > > +*tlb_inval, u32 seqno) {
> > > > +	struct xe_guc *guc = tlb_inval->private;
> > > > +	u32 action[] = {
> > > > +		XE_GUC_ACTION_TLB_INVALIDATION,
> > > > +		seqno,
> > > > +		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
> > > > +	};
> > > > +	int ret;
> > > > +
> > > > +	ret = send_tlb_inval(guc, action, ARRAY_SIZE(action));
> > > > +
> > > > +	/* CT unavailable means nothing runs on the engines; treat as
> cancelled. */
> > > > +	if (ret == -ENODEV || ret == -ECANCELED)
> > > > +		return -ECANCELED;
> > >
> > > Looks like we don't need the check 'ret == -ECANCELED' here (redundent).
> > > Basically, we only need,
> > > if (ret == -ENODEV)
> > >      ret = -ECANCELED;
> >
> > I think actually -ENODEV is needed because it is odd corner that only
> > GGTT invalidations can legitimently hit with a blind CT send which was
> > my suggestion.
> >
> > -ENODEV is the return if the CT is disabled (cold boot start)
> > -ECANCELED is return if the CT is stopped (runtime toggle)
> >
> > GGTT invalidations can be issued during cold boots as these are kernel
> > objects, PPGTT cannot because these are user objects.
> >
> > Thus, I think this actually correct in the current code.
> >
> 
> Opps one more thing - iirc wedge devices return a different error code, but that
> might be getting revert. We should check on that as I think wedged needs to be
> handle here.
> 
> Matt
wedge devices return ENOTRECOVERABLE now, can I go with the below?
    if (ret == -ENODEV || ret == -ENOTRECOVERABLE)
        return -ECANCELED;


-Tilak
> 
> > Matt
> >
> > >
> > > Also, It seems bit odd that other functions like
> > > send_tlb_inval_all(),
> > > send_tlb_inval_lmmtt() etc, has similar structure and similar
> > > documentation in xe_tlb_inval_types.h (regarding -ECANCELED), but doesn't
> do this conversion.
> > > So, they are not treating XE_GUC_CT_STATE_DISABLED (where
> > > guc_ct_send returns
> > > ENODEV) as a 'cancelled' state. May be here also we should do that
> > > for now, if we need fix, then it will be a fix for all of these callback functions
> later.
> > >
> > > Niranjana
> > >
> > > > +
> > > > +	return ret;
> > > > +}
> > > > +
> > > > static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
> > > > 			     u64 gpu_addr)
> > > > {
> > > > @@ -346,6 +369,7 @@ static long tlb_inval_timeout_delay(struct
> > > > xe_tlb_inval *tlb_inval) static const struct xe_tlb_inval_ops
> guc_tlb_inval_asid_ops = {
> > > > 	.all = send_tlb_inval_all,
> > > > 	.ggtt = send_tlb_inval_ggtt,
> > > > +	.ggtt_full = send_tlb_inval_ggtt_full,
> > > > 	.ppgtt = send_tlb_inval_asid_ppgtt,
> > > > 	.initialized = tlb_inval_initialized,
> > > > 	.flush = tlb_inval_flush,
> > > > @@ -354,6 +378,7 @@ static const struct xe_tlb_inval_ops
> > > > guc_tlb_inval_asid_ops = {
> > > >
> > > > static const struct xe_tlb_inval_ops guc_tlb_inval_ctx_ops = {
> > > > 	.ggtt = send_tlb_inval_ggtt,
> > > > +	.ggtt_full = send_tlb_inval_ggtt_full,
> > > > 	.all = send_tlb_inval_all,
> > > > 	.ppgtt = send_tlb_inval_ctx_ppgtt,
> > > > 	.initialized = tlb_inval_initialized, diff --git
> > > > a/drivers/gpu/drm/xe/xe_tlb_inval.c
> > > > b/drivers/gpu/drm/xe/xe_tlb_inval.c
> > > > index bbd21d393062..7c3bf32d9258 100644
> > > > --- a/drivers/gpu/drm/xe/xe_tlb_inval.c
> > > > +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
> > > > @@ -301,26 +301,56 @@ int xe_tlb_inval_all(struct xe_tlb_inval
> > > > *tlb_inval, }
> > > >
> > > > /**
> > > > - * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
> > > > + * xe_tlb_inval_issue_op_wait() - Issue a TLB invalidation and
> > > > + wait
> > > >  * @tlb_inval: TLB invalidation client
> > > > - *
> > > > - * Issue a TLB invalidation for the GGTT. Completion of TLB is
> > > > asynchronous and
> > > > - * caller can use the invalidation fence to wait for completion.
> > > > + * @op: backend invalidation hook to issue
> > > >  *
> > > >  * Return: 0 on success, negative error code on error  */ -int
> > > > xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
> > > > +static int xe_tlb_inval_issue_op_wait(struct xe_tlb_inval *tlb_inval,
> > > > +				      int (*op)(struct xe_tlb_inval *tlb_inval, u32
> seqno))
> > > > {
> > > > 	struct xe_tlb_inval_fence fence, *fence_ptr = &fence;
> > > > 	int ret;
> > > >
> > > > 	xe_tlb_inval_fence_init(tlb_inval, fence_ptr, true);
> > > > -	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, tlb_inval->ops->ggtt);
> > > > +	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, op);
> > > > 	xe_tlb_inval_fence_wait(fence_ptr);
> > > >
> > > > 	return ret;
> > > > }
> > > >
> > > > +/**
> > > > + * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
> > > > + * @tlb_inval: TLB invalidation client
> > > > + *
> > > > + * Issue a TLB invalidation for the GGTT. Completion of TLB is
> > > > +asynchronous and
> > > > + * caller can use the invalidation fence to wait for completion.
> > > > + *
> > > > + * Return: 0 on success, negative error code on error  */ int
> > > > +xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval) {
> > > > +	return xe_tlb_inval_issue_op_wait(tlb_inval,
> > > > +tlb_inval->ops->ggtt); }
> > > > +
> > > > +/**
> > > > + * xe_tlb_inval_ggtt_full() - Full engine TLB invalidation within
> > > > +a VF
> > > > + * @tlb_inval: TLB invalidation client
> > > > + *
> > > > + * Issue INVAL_FULL (intra vf) to flush engine TLBs across all
> > > > +engines
> > > > + * within the requesting VF.
> > > > + *
> > > > + * Return: 0 on success, negative error code on error  */ int
> > > > +xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval) {
> > > > +	if (!tlb_inval->ops->ggtt_full)
> > > > +		return -EOPNOTSUPP;
> > > > +
> > > > +	return xe_tlb_inval_issue_op_wait(tlb_inval,
> > > > +tlb_inval->ops->ggtt_full); }
> > > > +
> > > > /**
> > > >  * xe_tlb_inval_range() - Issue a TLB invalidation for an address
> > > > range
> > > >  * @tlb_inval: TLB invalidation client diff --git
> > > > a/drivers/gpu/drm/xe/xe_tlb_inval.h
> > > > b/drivers/gpu/drm/xe/xe_tlb_inval.h
> > > > index a76b7823a5f2..665072b4b81d 100644
> > > > --- a/drivers/gpu/drm/xe/xe_tlb_inval.h
> > > > +++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
> > > > @@ -20,6 +20,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval
> > > > *tlb_inval); int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> > > > 		     struct xe_tlb_inval_fence *fence); int
> > > > xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
> > > > +int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval);
> > > > void xe_tlb_inval_vm(struct xe_tlb_inval *tlb_inval, struct xe_vm
> > > > *vm); int xe_tlb_inval_range(struct xe_tlb_inval *tlb_inval,
> > > > 		       struct xe_tlb_inval_fence *fence, diff --git
> > > > a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > > > b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > > > index 3d1797d186fd..d77be1aedc91 100644
> > > > --- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > > > +++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > > > @@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
> > > > 	 */
> > > > 	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
> > > >
> > > > +	/**
> > > > +	 * @ggtt_full: Full engine TLB invalidation within a VF
> > > > +	 * @tlb_inval: TLB invalidation client
> > > > +	 * @seqno: Seqno of TLB invalidation
> > > > +	 *
> > > > +	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
> > > > +	 * failure
> > > > +	 */
> > > > +	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);
> > > > +
> > > > 	/**
> > > > 	 * @ppgtt: Invalidate per-process translation TLBs
> > > > 	 * @tlb_inval: TLB invalidation client
> > > > --
> > > > 2.46.0
> > > >

[PATCH 3/3] drm/xe/ggtt: invalidate engine GGTT TLBs for multi-queue GTs

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Engines cache GGTT translations in their own TLBs, which the
xe_tlb_inval_ggtt() does not touch.
After a GGTT unmap the engines can still hit the stale translation and
read the old page.

Issue an INVAL_FULL (intra vf) invalidation on GGTT unmap, gated on the
GT having any multi-queue engine class.

v2:
- Use xe_gt_has_multi_queue() helper and address nits (Niranjana)
v3:
- Invalidate both the primary and media GTs, similar to
  xe_ggtt_invalidate() (Matt Brost)

Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
---
 drivers/gpu/drm/xe/xe_ggtt.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index bd65100283e3..cc43089de34d 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -451,6 +451,7 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
 ALLOW_ERROR_INJECTION(xe_ggtt_init_early, ERRNO); /* See xe_pci_probe() */
 
 static void xe_ggtt_invalidate(struct xe_ggtt *ggtt);
+static void xe_ggtt_invalidate_engine(struct xe_ggtt *ggtt);
 
 static void xe_ggtt_initial_clear(struct xe_ggtt *ggtt)
 {
@@ -482,8 +483,11 @@ static void ggtt_node_remove(struct xe_ggtt_node *node)
 		xe_ggtt_clear(ggtt, xe_ggtt_node_addr(node), xe_ggtt_node_size(node));
 	drm_mm_remove_node(&node->base);
 	node->base.size = 0;
-	if (bound && node->invalidate_on_remove)
+	if (bound && node->invalidate_on_remove) {
 		xe_ggtt_invalidate(ggtt);
+		/* Drain engine TLBs so a recycled range can't hit a stale entry. */
+		xe_ggtt_invalidate_engine(ggtt);
+	}
 	mutex_unlock(&ggtt->lock);
 
 	ggtt_node_fini(node);
@@ -600,6 +604,29 @@ static void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
 	ggtt_invalidate_gt_tlb(ggtt->tile->media_gt);
 }
 
+static void ggtt_invalidate_gt_engine_tlb(struct xe_gt *gt)
+{
+	int err;
+
+	if (!xe_gt_has_multi_queue(gt))
+		return;
+
+	err = xe_tlb_inval_ggtt_full(&gt->tlb_inval);
+	xe_gt_WARN(gt, err, "Failed to invalidate engine GGTT TLBs (%pe)",
+		   ERR_PTR(err));
+}
+
+/*
+ * Drain engine-side GGTT TLBs on teardown so a recycled range's next
+ * occupant can't hit a predecessor's cached translation.
+ */
+static void xe_ggtt_invalidate_engine(struct xe_ggtt *ggtt)
+{
+	/* Each GT in a tile has its own engine TLBs to drain */
+	ggtt_invalidate_gt_engine_tlb(ggtt->tile->primary_gt);
+	ggtt_invalidate_gt_engine_tlb(ggtt->tile->media_gt);
+}
+
 /**
  * xe_ggtt_shift_nodes() - Shift GGTT nodes to adjust for a change in usable address range.
  * @ggtt: the &xe_ggtt struct instance
-- 
2.46.0

Re: [PATCH 3/3] drm/xe/ggtt: invalidate engine GGTT TLBs for multi-queue GTs

[Niranjana Vishwanathapura]

On Wed, Aug 26, 2026 at 04:55:33PM +0530, tilak.tirumalesh.tangudu@intel.com wrote:
>From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>
>Engines cache GGTT translations in their own TLBs, which the
>xe_tlb_inval_ggtt() does not touch.
>After a GGTT unmap the engines can still hit the stale translation and
>read the old page.
>
>Issue an INVAL_FULL (intra vf) invalidation on GGTT unmap, gated on the
>GT having any multi-queue engine class.
>
>v2:
>- Use xe_gt_has_multi_queue() helper and address nits (Niranjana)
>v3:
>- Invalidate both the primary and media GTs, similar to
>  xe_ggtt_invalidate() (Matt Brost)
>
>Assisted-by: Claude:claude-opus-4-8
>Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>---
> drivers/gpu/drm/xe/xe_ggtt.c | 29 ++++++++++++++++++++++++++++-
> 1 file changed, 28 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
>index bd65100283e3..cc43089de34d 100644
>--- a/drivers/gpu/drm/xe/xe_ggtt.c
>+++ b/drivers/gpu/drm/xe/xe_ggtt.c
>@@ -451,6 +451,7 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
> ALLOW_ERROR_INJECTION(xe_ggtt_init_early, ERRNO); /* See xe_pci_probe() */
>
> static void xe_ggtt_invalidate(struct xe_ggtt *ggtt);
>+static void xe_ggtt_invalidate_engine(struct xe_ggtt *ggtt);
>
> static void xe_ggtt_initial_clear(struct xe_ggtt *ggtt)
> {
>@@ -482,8 +483,11 @@ static void ggtt_node_remove(struct xe_ggtt_node *node)
> 		xe_ggtt_clear(ggtt, xe_ggtt_node_addr(node), xe_ggtt_node_size(node));
> 	drm_mm_remove_node(&node->base);
> 	node->base.size = 0;
>-	if (bound && node->invalidate_on_remove)
>+	if (bound && node->invalidate_on_remove) {
> 		xe_ggtt_invalidate(ggtt);
>+		/* Drain engine TLBs so a recycled range can't hit a stale entry. */
>+		xe_ggtt_invalidate_engine(ggtt);
>+	}
> 	mutex_unlock(&ggtt->lock);
>
> 	ggtt_node_fini(node);
>@@ -600,6 +604,29 @@ static void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
> 	ggtt_invalidate_gt_tlb(ggtt->tile->media_gt);
> }
>
>+static void ggtt_invalidate_gt_engine_tlb(struct xe_gt *gt)
>+{
>+	int err;
>+
>+	if (!xe_gt_has_multi_queue(gt))
>+		return;

Acutally, this would require an explanation here as to why we are
doing it only for multi queue here. Or, we should pass a bitmask of GT types
that require an invalidation while invoking xe_ggtt_invalidate_engine().
As these are all static functions here, I think a comment here that should
be good enough.

Also, may be check for '!gt' also to keep is similar to ggtt_invalidate_gt_tlb.

Otherwise, LGTM
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

Niranjana

>+
>+	err = xe_tlb_inval_ggtt_full(&gt->tlb_inval);
>+	xe_gt_WARN(gt, err, "Failed to invalidate engine GGTT TLBs (%pe)",
>+		   ERR_PTR(err));
>+}
>+
>+/*
>+ * Drain engine-side GGTT TLBs on teardown so a recycled range's next
>+ * occupant can't hit a predecessor's cached translation.
>+ */
>+static void xe_ggtt_invalidate_engine(struct xe_ggtt *ggtt)
>+{
>+	/* Each GT in a tile has its own engine TLBs to drain */
>+	ggtt_invalidate_gt_engine_tlb(ggtt->tile->primary_gt);
>+	ggtt_invalidate_gt_engine_tlb(ggtt->tile->media_gt);
>+}
>+
> /**
>  * xe_ggtt_shift_nodes() - Shift GGTT nodes to adjust for a change in usable address range.
>  * @ggtt: the &xe_ggtt struct instance
>-- 
>2.46.0
>

Re: [PATCH 3/3] drm/xe/ggtt: invalidate engine GGTT TLBs for multi-queue GTs

[Matthew Brost]

On Wed, Aug 26, 2026 at 04:55:33PM +0530, tilak.tirumalesh.tangudu@intel.com wrote:
> From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> 
> Engines cache GGTT translations in their own TLBs, which the
> xe_tlb_inval_ggtt() does not touch.
> After a GGTT unmap the engines can still hit the stale translation and
> read the old page.
> 
> Issue an INVAL_FULL (intra vf) invalidation on GGTT unmap, gated on the
> GT having any multi-queue engine class.
> 
> v2:
> - Use xe_gt_has_multi_queue() helper and address nits (Niranjana)
> v3:
> - Invalidate both the primary and media GTs, similar to
>   xe_ggtt_invalidate() (Matt Brost)
> 
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_ggtt.c | 29 ++++++++++++++++++++++++++++-
>  1 file changed, 28 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index bd65100283e3..cc43089de34d 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -451,6 +451,7 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
>  ALLOW_ERROR_INJECTION(xe_ggtt_init_early, ERRNO); /* See xe_pci_probe() */
>  
>  static void xe_ggtt_invalidate(struct xe_ggtt *ggtt);
> +static void xe_ggtt_invalidate_engine(struct xe_ggtt *ggtt);
>  
>  static void xe_ggtt_initial_clear(struct xe_ggtt *ggtt)
>  {
> @@ -482,8 +483,11 @@ static void ggtt_node_remove(struct xe_ggtt_node *node)
>  		xe_ggtt_clear(ggtt, xe_ggtt_node_addr(node), xe_ggtt_node_size(node));
>  	drm_mm_remove_node(&node->base);
>  	node->base.size = 0;
> -	if (bound && node->invalidate_on_remove)
> +	if (bound && node->invalidate_on_remove) {
>  		xe_ggtt_invalidate(ggtt);
> +		/* Drain engine TLBs so a recycled range can't hit a stale entry. */
> +		xe_ggtt_invalidate_engine(ggtt);
> +	}
>  	mutex_unlock(&ggtt->lock);
>  
>  	ggtt_node_fini(node);
> @@ -600,6 +604,29 @@ static void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
>  	ggtt_invalidate_gt_tlb(ggtt->tile->media_gt);
>  }
>  
> +static void ggtt_invalidate_gt_engine_tlb(struct xe_gt *gt)
> +{
> +	int err;
> +
> +	if (!xe_gt_has_multi_queue(gt))
> +		return;
> +
> +	err = xe_tlb_inval_ggtt_full(&gt->tlb_inval);
> +	xe_gt_WARN(gt, err, "Failed to invalidate engine GGTT TLBs (%pe)",
> +		   ERR_PTR(err));
> +}
> +
> +/*
> + * Drain engine-side GGTT TLBs on teardown so a recycled range's next
> + * occupant can't hit a predecessor's cached translation.
> + */
> +static void xe_ggtt_invalidate_engine(struct xe_ggtt *ggtt)
> +{
> +	/* Each GT in a tile has its own engine TLBs to drain */
> +	ggtt_invalidate_gt_engine_tlb(ggtt->tile->primary_gt);
> +	ggtt_invalidate_gt_engine_tlb(ggtt->tile->media_gt);
> +}
> +
>  /**
>   * xe_ggtt_shift_nodes() - Shift GGTT nodes to adjust for a change in usable address range.
>   * @ggtt: the &xe_ggtt struct instance
> -- 
> 2.46.0
> 

✓ CI.KUnit: success for drm/xe/ggtt: fix stale GGTT mappings on unmap (rev4)

[Patchwork]

== Series Details ==

Series: drm/xe/ggtt: fix stale GGTT mappings on unmap (rev4)
URL   : https://patchwork.freedesktop.org/series/172559/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:33:29] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:33:33] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:34:05] Starting KUnit Kernel (1/1)...
[11:34:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:34:05] ================== guc_buf (11 subtests) ===================
[11:34:05] [PASSED] test_smallest
[11:34:05] [PASSED] test_largest
[11:34:05] [PASSED] test_granular
[11:34:05] [PASSED] test_unique
[11:34:05] [PASSED] test_overlap
[11:34:05] [PASSED] test_reusable
[11:34:05] [PASSED] test_too_big
[11:34:05] [PASSED] test_flush
[11:34:05] [PASSED] test_lookup
[11:34:05] [PASSED] test_data
[11:34:05] [PASSED] test_class
[11:34:05] ===================== [PASSED] guc_buf =====================
[11:34:05] =================== guc_dbm (7 subtests) ===================
[11:34:05] [PASSED] test_empty
[11:34:05] [PASSED] test_default
[11:34:05] ======================== test_size  ========================
[11:34:05] [PASSED] 4
[11:34:05] [PASSED] 8
[11:34:05] [PASSED] 32
[11:34:05] [PASSED] 256
[11:34:05] ==================== [PASSED] test_size ====================
[11:34:05] ======================= test_reuse  ========================
[11:34:05] [PASSED] 4
[11:34:05] [PASSED] 8
[11:34:05] [PASSED] 32
[11:34:05] [PASSED] 256
[11:34:05] =================== [PASSED] test_reuse ====================
[11:34:05] =================== test_range_overlap  ====================
[11:34:05] [PASSED] 4
[11:34:05] [PASSED] 8
[11:34:05] [PASSED] 32
[11:34:05] [PASSED] 256
[11:34:05] =============== [PASSED] test_range_overlap ================
[11:34:05] =================== test_range_compact  ====================
[11:34:05] [PASSED] 4
[11:34:05] [PASSED] 8
[11:34:05] [PASSED] 32
[11:34:05] [PASSED] 256
[11:34:05] =============== [PASSED] test_range_compact ================
[11:34:05] ==================== test_range_spare  =====================
[11:34:05] [PASSED] 4
[11:34:05] [PASSED] 8
[11:34:05] [PASSED] 32
[11:34:05] [PASSED] 256
[11:34:05] ================ [PASSED] test_range_spare =================
[11:34:05] ===================== [PASSED] guc_dbm =====================
[11:34:05] =================== guc_idm (6 subtests) ===================
[11:34:05] [PASSED] bad_init
[11:34:05] [PASSED] no_init
[11:34:05] [PASSED] init_fini
[11:34:06] [PASSED] check_used
[11:34:06] [PASSED] check_quota
[11:34:06] [PASSED] check_all
[11:34:06] ===================== [PASSED] guc_idm =====================
[11:34:06] =============== guc_klv_helpers (9 subtests) ===============
[11:34:06] [PASSED] test_count
[11:34:06] [PASSED] test_encode_u32
[11:34:06] [PASSED] test_encode_u64
[11:34:06] [PASSED] test_encode_string
[11:34:06] [PASSED] test_encode_object_raw
[11:34:06] [PASSED] test_encode_object_klv
[11:34:06] [PASSED] test_encode_object_nested
[11:34:06] [PASSED] test_encode_object_basic
[11:34:06] [PASSED] test_print
[11:34:06] ================= [PASSED] guc_klv_helpers =================
[11:34:06] =================== xe_log (4 subtests) ====================
[11:34:06] [PASSED] demo_cper
[11:34:06] [PASSED] demo_dmesg
[11:34:06] ======================= test_dmesg  ========================
[11:34:06] [PASSED] test_fatal
[11:34:06] [PASSED] test_fatal_tile
[11:34:06] [PASSED] test_fatal_gt
[11:34:06] [PASSED] test_fatal_comp
[11:34:06] [PASSED] test_fatal_comp_tile
[11:34:06] [PASSED] test_fatal_comp_gt
[11:34:06] [PASSED] test_fatal_all
[11:34:06] [PASSED] test_recoverable
[11:34:06] [PASSED] test_recoverable_tile
[11:34:06] [PASSED] test_recoverable_gt
[11:34:06] [PASSED] test_recoverable_comp
[11:34:06] [PASSED] test_recoverable_comp_tile
[11:34:06] [PASSED] test_recoverable_comp_gt
[11:34:06] [PASSED] test_recoverable_all
[11:34:06] [PASSED] test_info
[11:34:06] [PASSED] test_info_tile
[11:34:06] [PASSED] test_info_gt
[11:34:06] [PASSED] test_info_err
[11:34:06] [PASSED] test_info_comp
[11:34:06] [PASSED] test_info_comp_tile
[11:34:06] [PASSED] test_info_comp_gt
[11:34:06] [PASSED] test_info_all
[11:34:06] [PASSED] test_hw_fatal
[11:34:06] [PASSED] test_hw_recoverable
[11:34:06] [PASSED] test_hw_corrected
[11:34:06] [PASSED] test_hw_informational
[11:34:06] =================== [PASSED] test_dmesg ====================
[11:34:06] ====================== test_invalid  =======================
[11:34:06] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[11:34:06] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[11:34:06] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[11:34:06] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[11:34:06] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[11:34:06] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[11:34:06] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[11:34:06] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[11:34:06] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[11:34:06] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[11:34:06] ================== [SKIPPED] test_invalid ==================
[11:34:06] ===================== [PASSED] xe_log ======================
[11:34:06] ================== no_relay (3 subtests) ===================
[11:34:06] [PASSED] xe_drops_guc2pf_if_not_ready
[11:34:06] [PASSED] xe_drops_guc2vf_if_not_ready
[11:34:06] [PASSED] xe_rejects_send_if_not_ready
[11:34:06] ==================== [PASSED] no_relay =====================
[11:34:06] ================== pf_relay (14 subtests) ==================
[11:34:06] [PASSED] pf_rejects_guc2pf_too_short
[11:34:06] [PASSED] pf_rejects_guc2pf_too_long
[11:34:06] [PASSED] pf_rejects_guc2pf_no_payload
[11:34:06] [PASSED] pf_fails_no_payload
[11:34:06] [PASSED] pf_fails_bad_origin
[11:34:06] [PASSED] pf_fails_bad_type
[11:34:06] [PASSED] pf_txn_reports_error
[11:34:06] [PASSED] pf_txn_sends_pf2guc
[11:34:06] [PASSED] pf_sends_pf2guc
[11:34:06] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:34:06] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:34:06] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:34:06] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:34:06] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:34:06] ==================== [PASSED] pf_relay =====================
[11:34:06] ================== vf_relay (3 subtests) ===================
[11:34:06] [PASSED] vf_rejects_guc2vf_too_short
[11:34:06] [PASSED] vf_rejects_guc2vf_too_long
[11:34:06] [PASSED] vf_rejects_guc2vf_no_payload
[11:34:06] ==================== [PASSED] vf_relay =====================
[11:34:06] ================ pf_gt_config (9 subtests) =================
[11:34:06] [PASSED] fair_contexts_1vf
[11:34:06] [PASSED] fair_doorbells_1vf
[11:34:06] [PASSED] fair_ggtt_1vf
[11:34:06] ====================== fair_vram_1vf  ======================
[11:34:06] [PASSED] 3.50 GiB
[11:34:06] [PASSED] 11.5 GiB
[11:34:06] [PASSED] 15.5 GiB
[11:34:06] [PASSED] 31.5 GiB
[11:34:06] [PASSED] 63.5 GiB
[11:34:06] [PASSED] 1.91 GiB
[11:34:06] ================== [PASSED] fair_vram_1vf ==================
[11:34:06] ================ fair_vram_1vf_admin_only  =================
[11:34:06] [PASSED] 3.50 GiB
[11:34:06] [PASSED] 11.5 GiB
[11:34:06] [PASSED] 15.5 GiB
[11:34:06] [PASSED] 31.5 GiB
[11:34:06] [PASSED] 63.5 GiB
[11:34:06] [PASSED] 1.91 GiB
[11:34:06] ============ [PASSED] fair_vram_1vf_admin_only =============
[11:34:06] ====================== fair_contexts  ======================
[11:34:06] [PASSED] 1 VF
[11:34:06] [PASSED] 2 VFs
[11:34:06] [PASSED] 3 VFs
[11:34:06] [PASSED] 4 VFs
[11:34:06] [PASSED] 5 VFs
[11:34:06] [PASSED] 6 VFs
[11:34:06] [PASSED] 7 VFs
[11:34:06] [PASSED] 8 VFs
[11:34:06] [PASSED] 9 VFs
[11:34:06] [PASSED] 10 VFs
[11:34:06] [PASSED] 11 VFs
[11:34:06] [PASSED] 12 VFs
[11:34:06] [PASSED] 13 VFs
[11:34:06] [PASSED] 14 VFs
[11:34:06] [PASSED] 15 VFs
[11:34:06] [PASSED] 16 VFs
[11:34:06] [PASSED] 17 VFs
[11:34:06] [PASSED] 18 VFs
[11:34:06] [PASSED] 19 VFs
[11:34:06] [PASSED] 20 VFs
[11:34:06] [PASSED] 21 VFs
[11:34:06] [PASSED] 22 VFs
[11:34:06] [PASSED] 23 VFs
[11:34:06] [PASSED] 24 VFs
[11:34:06] [PASSED] 25 VFs
[11:34:06] [PASSED] 26 VFs
[11:34:06] [PASSED] 27 VFs
[11:34:06] [PASSED] 28 VFs
[11:34:06] [PASSED] 29 VFs
[11:34:06] [PASSED] 30 VFs
[11:34:06] [PASSED] 31 VFs
[11:34:06] [PASSED] 32 VFs
[11:34:06] [PASSED] 33 VFs
[11:34:06] [PASSED] 34 VFs
[11:34:06] [PASSED] 35 VFs
[11:34:06] [PASSED] 36 VFs
[11:34:06] [PASSED] 37 VFs
[11:34:06] [PASSED] 38 VFs
[11:34:06] [PASSED] 39 VFs
[11:34:06] [PASSED] 40 VFs
[11:34:06] [PASSED] 41 VFs
[11:34:06] [PASSED] 42 VFs
[11:34:06] [PASSED] 43 VFs
[11:34:06] [PASSED] 44 VFs
[11:34:06] [PASSED] 45 VFs
[11:34:06] [PASSED] 46 VFs
[11:34:06] [PASSED] 47 VFs
[11:34:06] [PASSED] 48 VFs
[11:34:06] [PASSED] 49 VFs
[11:34:06] [PASSED] 50 VFs
[11:34:06] [PASSED] 51 VFs
[11:34:06] [PASSED] 52 VFs
[11:34:06] [PASSED] 53 VFs
[11:34:06] [PASSED] 54 VFs
[11:34:06] [PASSED] 55 VFs
[11:34:06] [PASSED] 56 VFs
[11:34:06] [PASSED] 57 VFs
[11:34:06] [PASSED] 58 VFs
[11:34:06] [PASSED] 59 VFs
[11:34:06] [PASSED] 60 VFs
[11:34:06] [PASSED] 61 VFs
[11:34:06] [PASSED] 62 VFs
[11:34:06] [PASSED] 63 VFs
[11:34:06] ================== [PASSED] fair_contexts ==================
[11:34:06] ===================== fair_doorbells  ======================
[11:34:06] [PASSED] 1 VF
[11:34:06] [PASSED] 2 VFs
[11:34:06] [PASSED] 3 VFs
[11:34:06] [PASSED] 4 VFs
[11:34:06] [PASSED] 5 VFs
[11:34:06] [PASSED] 6 VFs
[11:34:06] [PASSED] 7 VFs
[11:34:06] [PASSED] 8 VFs
[11:34:06] [PASSED] 9 VFs
[11:34:06] [PASSED] 10 VFs
[11:34:06] [PASSED] 11 VFs
[11:34:06] [PASSED] 12 VFs
[11:34:06] [PASSED] 13 VFs
[11:34:06] [PASSED] 14 VFs
[11:34:06] [PASSED] 15 VFs
[11:34:06] [PASSED] 16 VFs
[11:34:06] [PASSED] 17 VFs
[11:34:06] [PASSED] 18 VFs
[11:34:06] [PASSED] 19 VFs
[11:34:06] [PASSED] 20 VFs
[11:34:06] [PASSED] 21 VFs
[11:34:06] [PASSED] 22 VFs
[11:34:06] [PASSED] 23 VFs
[11:34:06] [PASSED] 24 VFs
[11:34:06] [PASSED] 25 VFs
[11:34:06] [PASSED] 26 VFs
[11:34:06] [PASSED] 27 VFs
[11:34:06] [PASSED] 28 VFs
[11:34:06] [PASSED] 29 VFs
[11:34:06] [PASSED] 30 VFs
[11:34:06] [PASSED] 31 VFs
[11:34:06] [PASSED] 32 VFs
[11:34:06] [PASSED] 33 VFs
[11:34:06] [PASSED] 34 VFs
[11:34:06] [PASSED] 35 VFs
[11:34:06] [PASSED] 36 VFs
[11:34:06] [PASSED] 37 VFs
[11:34:06] [PASSED] 38 VFs
[11:34:06] [PASSED] 39 VFs
[11:34:06] [PASSED] 40 VFs
[11:34:06] [PASSED] 41 VFs
[11:34:06] [PASSED] 42 VFs
[11:34:06] [PASSED] 43 VFs
[11:34:06] [PASSED] 44 VFs
[11:34:06] [PASSED] 45 VFs
[11:34:06] [PASSED] 46 VFs
[11:34:06] [PASSED] 47 VFs
[11:34:06] [PASSED] 48 VFs
[11:34:06] [PASSED] 49 VFs
[11:34:06] [PASSED] 50 VFs
[11:34:06] [PASSED] 51 VFs
[11:34:06] [PASSED] 52 VFs
[11:34:06] [PASSED] 53 VFs
[11:34:06] [PASSED] 54 VFs
[11:34:06] [PASSED] 55 VFs
[11:34:06] [PASSED] 56 VFs
[11:34:06] [PASSED] 57 VFs
[11:34:06] [PASSED] 58 VFs
[11:34:06] [PASSED] 59 VFs
[11:34:06] [PASSED] 60 VFs
[11:34:06] [PASSED] 61 VFs
[11:34:06] [PASSED] 62 VFs
[11:34:06] [PASSED] 63 VFs
[11:34:06] ================= [PASSED] fair_doorbells ==================
[11:34:06] ======================== fair_ggtt  ========================
[11:34:06] [PASSED] 1 VF
[11:34:06] [PASSED] 2 VFs
[11:34:06] [PASSED] 3 VFs
[11:34:06] [PASSED] 4 VFs
[11:34:06] [PASSED] 5 VFs
[11:34:06] [PASSED] 6 VFs
[11:34:06] [PASSED] 7 VFs
[11:34:06] [PASSED] 8 VFs
[11:34:06] [PASSED] 9 VFs
[11:34:06] [PASSED] 10 VFs
[11:34:06] [PASSED] 11 VFs
[11:34:06] [PASSED] 12 VFs
[11:34:06] [PASSED] 13 VFs
[11:34:06] [PASSED] 14 VFs
[11:34:06] [PASSED] 15 VFs
[11:34:06] [PASSED] 16 VFs
[11:34:06] [PASSED] 17 VFs
[11:34:06] [PASSED] 18 VFs
[11:34:06] [PASSED] 19 VFs
[11:34:06] [PASSED] 20 VFs
[11:34:06] [PASSED] 21 VFs
[11:34:06] [PASSED] 22 VFs
[11:34:06] [PASSED] 23 VFs
[11:34:06] [PASSED] 24 VFs
[11:34:06] [PASSED] 25 VFs
[11:34:06] [PASSED] 26 VFs
[11:34:06] [PASSED] 27 VFs
[11:34:06] [PASSED] 28 VFs
[11:34:06] [PASSED] 29 VFs
[11:34:06] [PASSED] 30 VFs
[11:34:06] [PASSED] 31 VFs
[11:34:06] [PASSED] 32 VFs
[11:34:06] [PASSED] 33 VFs
[11:34:06] [PASSED] 34 VFs
[11:34:06] [PASSED] 35 VFs
[11:34:06] [PASSED] 36 VFs
[11:34:06] [PASSED] 37 VFs
[11:34:06] [PASSED] 38 VFs
[11:34:06] [PASSED] 39 VFs
[11:34:06] [PASSED] 40 VFs
[11:34:06] [PASSED] 41 VFs
[11:34:06] [PASSED] 42 VFs
[11:34:06] [PASSED] 43 VFs
[11:34:06] [PASSED] 44 VFs
[11:34:06] [PASSED] 45 VFs
[11:34:06] [PASSED] 46 VFs
[11:34:06] [PASSED] 47 VFs
[11:34:06] [PASSED] 48 VFs
[11:34:06] [PASSED] 49 VFs
[11:34:06] [PASSED] 50 VFs
[11:34:06] [PASSED] 51 VFs
[11:34:06] [PASSED] 52 VFs
[11:34:06] [PASSED] 53 VFs
[11:34:06] [PASSED] 54 VFs
[11:34:06] [PASSED] 55 VFs
[11:34:06] [PASSED] 56 VFs
[11:34:06] [PASSED] 57 VFs
[11:34:06] [PASSED] 58 VFs
[11:34:06] [PASSED] 59 VFs
[11:34:06] [PASSED] 60 VFs
[11:34:06] [PASSED] 61 VFs
[11:34:06] [PASSED] 62 VFs
[11:34:06] [PASSED] 63 VFs
[11:34:06] ==================== [PASSED] fair_ggtt ====================
[11:34:06] ======================== fair_vram  ========================
[11:34:06] [PASSED] 1 VF
[11:34:06] [PASSED] 2 VFs
[11:34:06] [PASSED] 3 VFs
[11:34:06] [PASSED] 4 VFs
[11:34:06] [PASSED] 5 VFs
[11:34:06] [PASSED] 6 VFs
[11:34:06] [PASSED] 7 VFs
[11:34:06] [PASSED] 8 VFs
[11:34:06] [PASSED] 9 VFs
[11:34:06] [PASSED] 10 VFs
[11:34:06] [PASSED] 11 VFs
[11:34:06] [PASSED] 12 VFs
[11:34:06] [PASSED] 13 VFs
[11:34:06] [PASSED] 14 VFs
[11:34:06] [PASSED] 15 VFs
[11:34:06] [PASSED] 16 VFs
[11:34:06] [PASSED] 17 VFs
[11:34:06] [PASSED] 18 VFs
[11:34:06] [PASSED] 19 VFs
[11:34:06] [PASSED] 20 VFs
[11:34:06] [PASSED] 21 VFs
[11:34:06] [PASSED] 22 VFs
[11:34:06] [PASSED] 23 VFs
[11:34:06] [PASSED] 24 VFs
[11:34:06] [PASSED] 25 VFs
[11:34:06] [PASSED] 26 VFs
[11:34:06] [PASSED] 27 VFs
[11:34:06] [PASSED] 28 VFs
[11:34:06] [PASSED] 29 VFs
[11:34:06] [PASSED] 30 VFs
[11:34:06] [PASSED] 31 VFs
[11:34:06] [PASSED] 32 VFs
[11:34:06] [PASSED] 33 VFs
[11:34:06] [PASSED] 34 VFs
[11:34:06] [PASSED] 35 VFs
[11:34:06] [PASSED] 36 VFs
[11:34:06] [PASSED] 37 VFs
[11:34:06] [PASSED] 38 VFs
[11:34:06] [PASSED] 39 VFs
[11:34:06] [PASSED] 40 VFs
[11:34:06] [PASSED] 41 VFs
[11:34:06] [PASSED] 42 VFs
[11:34:06] [PASSED] 43 VFs
[11:34:06] [PASSED] 44 VFs
[11:34:06] [PASSED] 45 VFs
[11:34:06] [PASSED] 46 VFs
[11:34:06] [PASSED] 47 VFs
[11:34:06] [PASSED] 48 VFs
[11:34:06] [PASSED] 49 VFs
[11:34:06] [PASSED] 50 VFs
[11:34:06] [PASSED] 51 VFs
[11:34:06] [PASSED] 52 VFs
[11:34:06] [PASSED] 53 VFs
[11:34:06] [PASSED] 54 VFs
[11:34:06] [PASSED] 55 VFs
[11:34:06] [PASSED] 56 VFs
[11:34:06] [PASSED] 57 VFs
[11:34:06] [PASSED] 58 VFs
[11:34:06] [PASSED] 59 VFs
[11:34:06] [PASSED] 60 VFs
[11:34:06] [PASSED] 61 VFs
[11:34:06] [PASSED] 62 VFs
[11:34:06] [PASSED] 63 VFs
[11:34:06] ==================== [PASSED] fair_vram ====================
[11:34:06] ================== [PASSED] pf_gt_config ===================
[11:34:06] ===================== lmtt (1 subtest) =====================
[11:34:06] ======================== test_ops  =========================
[11:34:06] [PASSED] 2-level
[11:34:06] [PASSED] multi-level
[11:34:06] ==================== [PASSED] test_ops =====================
[11:34:06] ====================== [PASSED] lmtt =======================
[11:34:06] ================= sriov_packet (1 subtest) =================
[11:34:06] [PASSED] test_descriptor_init
[11:34:06] ================== [PASSED] sriov_packet ===================
[11:34:06] ================= pf_service (11 subtests) =================
[11:34:06] [PASSED] pf_negotiate_any
[11:34:06] [PASSED] pf_negotiate_base_match
[11:34:06] [PASSED] pf_negotiate_base_newer
[11:34:06] [PASSED] pf_negotiate_base_next
[11:34:06] [SKIPPED] pf_negotiate_base_older (no older minor)
[11:34:06] [PASSED] pf_negotiate_base_prev
[11:34:06] [PASSED] pf_negotiate_latest_match
[11:34:06] [PASSED] pf_negotiate_latest_newer
[11:34:06] [PASSED] pf_negotiate_latest_next
[11:34:06] [SKIPPED] pf_negotiate_latest_older (no older minor)
[11:34:06] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[11:34:06] =================== [PASSED] pf_service ====================
[11:34:06] ================= xe_guc_g2g (2 subtests) ==================
[11:34:06] ============== xe_live_guc_g2g_kunit_default  ==============
[11:34:06] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:34:06] ============== xe_live_guc_g2g_kunit_allmem  ===============
[11:34:06] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:34:06] =================== [SKIPPED] xe_guc_g2g ===================
[11:34:06] =================== xe_mocs (2 subtests) ===================
[11:34:06] ================ xe_live_mocs_kernel_kunit  ================
[11:34:06] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:34:06] ================ xe_live_mocs_reset_kunit  =================
[11:34:06] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:34:06] ==================== [SKIPPED] xe_mocs =====================
[11:34:06] ================= xe_migrate (2 subtests) ==================
[11:34:06] ================= xe_migrate_sanity_kunit  =================
[11:34:06] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:34:06] ================== xe_validate_ccs_kunit  ==================
[11:34:06] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:34:06] =================== [SKIPPED] xe_migrate ===================
[11:34:06] ================== xe_dma_buf (1 subtest) ==================
[11:34:06] ==================== xe_dma_buf_kunit  =====================
[11:34:06] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:34:06] =================== [SKIPPED] xe_dma_buf ===================
[11:34:06] ================= xe_bo_shrink (1 subtest) =================
[11:34:06] =================== xe_bo_shrink_kunit  ====================
[11:34:06] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:34:06] ================== [SKIPPED] xe_bo_shrink ==================
[11:34:06] ==================== xe_bo (2 subtests) ====================
[11:34:06] ================== xe_ccs_migrate_kunit  ===================
[11:34:06] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:34:06] ==================== xe_bo_evict_kunit  ====================
[11:34:06] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:34:06] ===================== [SKIPPED] xe_bo ======================
[11:34:06] =================== xe_any (9 subtests) ====================
[11:34:06] [PASSED] test_to_xe
[11:34:06] [PASSED] test_to_dev
[11:34:06] [PASSED] test_to_pdev
[11:34:06] [PASSED] test_to_drm
[11:34:06] [PASSED] test_if_pdev
[11:34:06] [PASSED] test_if_xe
[11:34:06] [PASSED] test_if_tile
[11:34:06] [PASSED] test_if_gt
[11:34:06] [PASSED] test_to_id
[11:34:06] ===================== [PASSED] xe_any ======================
[11:34:06] ==================== args (13 subtests) ====================
[11:34:06] [PASSED] count_args_test
[11:34:06] [PASSED] call_args_example
[11:34:06] [PASSED] call_args_test
[11:34:06] [PASSED] drop_first_arg_example
[11:34:06] [PASSED] drop_first_arg_test
[11:34:06] [PASSED] first_arg_example
[11:34:06] [PASSED] first_arg_test
[11:34:06] [PASSED] last_arg_example
[11:34:06] [PASSED] last_arg_test
[11:34:06] [PASSED] pick_arg_example
[11:34:06] [PASSED] if_args_example
[11:34:06] [PASSED] if_args_test
[11:34:06] [PASSED] sep_comma_example
[11:34:06] ====================== [PASSED] args =======================
[11:34:06] =================== xe_pci (3 subtests) ====================
[11:34:06] ==================== check_graphics_ip  ====================
[11:34:06] [PASSED] 12.00 Xe_LP
[11:34:06] [PASSED] 12.10 Xe_LP+
[11:34:06] [PASSED] 12.55 Xe_HPG
[11:34:06] [PASSED] 12.60 Xe_HPC
[11:34:06] [PASSED] 12.70 Xe_LPG
[11:34:06] [PASSED] 12.71 Xe_LPG
[11:34:06] [PASSED] 12.74 Xe_LPG+
[11:34:06] [PASSED] 20.01 Xe2_HPG
[11:34:06] [PASSED] 20.02 Xe2_HPG
[11:34:06] [PASSED] 20.04 Xe2_LPG
[11:34:06] [PASSED] 30.00 Xe3_LPG
[11:34:06] [PASSED] 30.01 Xe3_LPG
[11:34:06] [PASSED] 30.03 Xe3_LPG
[11:34:06] [PASSED] 30.04 Xe3_LPG
[11:34:06] [PASSED] 30.05 Xe3_LPG
[11:34:06] [PASSED] 35.10 Xe3p_LPG
[11:34:06] [PASSED] 35.11 Xe3p_XPC
[11:34:06] ================ [PASSED] check_graphics_ip ================
[11:34:06] ===================== check_media_ip  ======================
[11:34:06] [PASSED] 12.00 Xe_M
[11:34:06] [PASSED] 12.55 Xe_HPM
[11:34:06] [PASSED] 13.00 Xe_LPM+
[11:34:06] [PASSED] 13.01 Xe2_HPM
[11:34:06] [PASSED] 20.00 Xe2_LPM
[11:34:06] [PASSED] 30.00 Xe3_LPM
[11:34:06] [PASSED] 30.02 Xe3_LPM
[11:34:06] [PASSED] 35.00 Xe3p_LPM
[11:34:06] [PASSED] 35.03 Xe3p_HPM
[11:34:06] ================= [PASSED] check_media_ip ==================
[11:34:06] =================== check_platform_desc  ===================
[11:34:06] [PASSED] 0x9A60 (TIGERLAKE)
[11:34:06] [PASSED] 0x9A68 (TIGERLAKE)
[11:34:06] [PASSED] 0x9A70 (TIGERLAKE)
[11:34:06] [PASSED] 0x9A40 (TIGERLAKE)
[11:34:06] [PASSED] 0x9A49 (TIGERLAKE)
[11:34:06] [PASSED] 0x9A59 (TIGERLAKE)
[11:34:06] [PASSED] 0x9A78 (TIGERLAKE)
[11:34:06] [PASSED] 0x9AC0 (TIGERLAKE)
[11:34:06] [PASSED] 0x9AC9 (TIGERLAKE)
[11:34:06] [PASSED] 0x9AD9 (TIGERLAKE)
[11:34:06] [PASSED] 0x9AF8 (TIGERLAKE)
[11:34:06] [PASSED] 0x4C80 (ROCKETLAKE)
[11:34:06] [PASSED] 0x4C8A (ROCKETLAKE)
[11:34:06] [PASSED] 0x4C8B (ROCKETLAKE)
[11:34:06] [PASSED] 0x4C8C (ROCKETLAKE)
[11:34:06] [PASSED] 0x4C90 (ROCKETLAKE)
[11:34:06] [PASSED] 0x4C9A (ROCKETLAKE)
[11:34:06] [PASSED] 0x4680 (ALDERLAKE_S)
[11:34:06] [PASSED] 0x4682 (ALDERLAKE_S)
[11:34:06] [PASSED] 0x4688 (ALDERLAKE_S)
[11:34:06] [PASSED] 0x468A (ALDERLAKE_S)
[11:34:06] [PASSED] 0x468B (ALDERLAKE_S)
[11:34:06] [PASSED] 0x4690 (ALDERLAKE_S)
[11:34:06] [PASSED] 0x4692 (ALDERLAKE_S)
[11:34:06] [PASSED] 0x4693 (ALDERLAKE_S)
[11:34:06] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46AA (ALDERLAKE_P)
[11:34:06] [PASSED] 0x462A (ALDERLAKE_P)
[11:34:06] [PASSED] 0x4626 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x4628 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46B0 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:34:06] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:34:06] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:34:06] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:34:06] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:34:06] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:34:06] [PASSED] 0xA721 (ALDERLAKE_P)
[11:34:06] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:34:06] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:34:06] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:34:06] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:34:06] [PASSED] 0xA720 (ALDERLAKE_P)
[11:34:06] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:34:06] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:34:06] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:34:06] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:34:06] [PASSED] 0xA780 (ALDERLAKE_S)
[11:34:06] [PASSED] 0xA781 (ALDERLAKE_S)
[11:34:06] [PASSED] 0xA782 (ALDERLAKE_S)
[11:34:06] [PASSED] 0xA783 (ALDERLAKE_S)
[11:34:06] [PASSED] 0xA788 (ALDERLAKE_S)
[11:34:06] [PASSED] 0xA789 (ALDERLAKE_S)
[11:34:06] [PASSED] 0xA78A (ALDERLAKE_S)
[11:34:06] [PASSED] 0xA78B (ALDERLAKE_S)
[11:34:06] [PASSED] 0x4905 (DG1)
[11:34:06] [PASSED] 0x4906 (DG1)
[11:34:06] [PASSED] 0x4907 (DG1)
[11:34:06] [PASSED] 0x4908 (DG1)
[11:34:06] [PASSED] 0x4909 (DG1)
[11:34:06] [PASSED] 0x56C0 (DG2)
[11:34:06] [PASSED] 0x56C2 (DG2)
[11:34:06] [PASSED] 0x56C1 (DG2)
[11:34:06] [PASSED] 0x7D51 (METEORLAKE)
[11:34:06] [PASSED] 0x7DD1 (METEORLAKE)
[11:34:06] [PASSED] 0x7D41 (METEORLAKE)
[11:34:06] [PASSED] 0x7D67 (METEORLAKE)
[11:34:06] [PASSED] 0xB640 (METEORLAKE)
[11:34:06] [PASSED] 0x56A0 (DG2)
[11:34:06] [PASSED] 0x56A1 (DG2)
[11:34:06] [PASSED] 0x56A2 (DG2)
[11:34:06] [PASSED] 0x56BE (DG2)
[11:34:06] [PASSED] 0x56BF (DG2)
[11:34:06] [PASSED] 0x5690 (DG2)
[11:34:06] [PASSED] 0x5691 (DG2)
[11:34:06] [PASSED] 0x5692 (DG2)
[11:34:06] [PASSED] 0x56A5 (DG2)
[11:34:06] [PASSED] 0x56A6 (DG2)
[11:34:06] [PASSED] 0x56B0 (DG2)
[11:34:06] [PASSED] 0x56B1 (DG2)
[11:34:06] [PASSED] 0x56BA (DG2)
[11:34:06] [PASSED] 0x56BB (DG2)
[11:34:06] [PASSED] 0x56BC (DG2)
[11:34:06] [PASSED] 0x56BD (DG2)
[11:34:06] [PASSED] 0x5693 (DG2)
[11:34:06] [PASSED] 0x5694 (DG2)
[11:34:06] [PASSED] 0x5695 (DG2)
[11:34:06] [PASSED] 0x56A3 (DG2)
[11:34:06] [PASSED] 0x56A4 (DG2)
[11:34:06] [PASSED] 0x56B2 (DG2)
[11:34:06] [PASSED] 0x56B3 (DG2)
[11:34:06] [PASSED] 0x5696 (DG2)
[11:34:06] [PASSED] 0x5697 (DG2)
[11:34:06] [PASSED] 0xB69 (PVC)
[11:34:06] [PASSED] 0xB6E (PVC)
[11:34:06] [PASSED] 0xBD4 (PVC)
[11:34:06] [PASSED] 0xBD5 (PVC)
[11:34:06] [PASSED] 0xBD6 (PVC)
[11:34:06] [PASSED] 0xBD7 (PVC)
[11:34:06] [PASSED] 0xBD8 (PVC)
[11:34:06] [PASSED] 0xBD9 (PVC)
[11:34:06] [PASSED] 0xBDA (PVC)
[11:34:06] [PASSED] 0xBDB (PVC)
[11:34:06] [PASSED] 0xBE0 (PVC)
[11:34:06] [PASSED] 0xBE1 (PVC)
[11:34:06] [PASSED] 0xBE5 (PVC)
[11:34:06] [PASSED] 0x7D40 (METEORLAKE)
[11:34:06] [PASSED] 0x7D45 (METEORLAKE)
[11:34:06] [PASSED] 0x7D55 (METEORLAKE)
[11:34:06] [PASSED] 0x7D60 (METEORLAKE)
[11:34:06] [PASSED] 0x7DD5 (METEORLAKE)
[11:34:06] [PASSED] 0x6420 (LUNARLAKE)
[11:34:06] [PASSED] 0x64A0 (LUNARLAKE)
[11:34:06] [PASSED] 0x64B0 (LUNARLAKE)
[11:34:06] [PASSED] 0xE202 (BATTLEMAGE)
[11:34:06] [PASSED] 0xE209 (BATTLEMAGE)
[11:34:06] [PASSED] 0xE20B (BATTLEMAGE)
[11:34:06] [PASSED] 0xE20C (BATTLEMAGE)
[11:34:06] [PASSED] 0xE20D (BATTLEMAGE)
[11:34:06] [PASSED] 0xE210 (BATTLEMAGE)
[11:34:06] [PASSED] 0xE211 (BATTLEMAGE)
[11:34:06] [PASSED] 0xE212 (BATTLEMAGE)
[11:34:06] [PASSED] 0xE216 (BATTLEMAGE)
[11:34:06] [PASSED] 0xE220 (BATTLEMAGE)
[11:34:06] [PASSED] 0xE221 (BATTLEMAGE)
[11:34:06] [PASSED] 0xE222 (BATTLEMAGE)
[11:34:06] [PASSED] 0xE223 (BATTLEMAGE)
[11:34:06] [PASSED] 0xB080 (PANTHERLAKE)
[11:34:06] [PASSED] 0xB081 (PANTHERLAKE)
[11:34:06] [PASSED] 0xB082 (PANTHERLAKE)
[11:34:06] [PASSED] 0xB083 (PANTHERLAKE)
[11:34:06] [PASSED] 0xB084 (PANTHERLAKE)
[11:34:06] [PASSED] 0xB085 (PANTHERLAKE)
[11:34:06] [PASSED] 0xB086 (PANTHERLAKE)
[11:34:06] [PASSED] 0xB087 (PANTHERLAKE)
[11:34:06] [PASSED] 0xB08F (PANTHERLAKE)
[11:34:06] [PASSED] 0xB090 (PANTHERLAKE)
[11:34:06] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:34:06] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:34:06] [PASSED] 0xFD80 (PANTHERLAKE)
[11:34:06] [PASSED] 0xFD81 (PANTHERLAKE)
[11:34:06] [PASSED] 0xD740 (NOVALAKE_S)
[11:34:06] [PASSED] 0xD741 (NOVALAKE_S)
[11:34:06] [PASSED] 0xD742 (NOVALAKE_S)
[11:34:06] [PASSED] 0xD743 (NOVALAKE_S)
[11:34:06] [PASSED] 0xD745 (NOVALAKE_S)
[11:34:06] [PASSED] 0xD74A (NOVALAKE_S)
[11:34:06] [PASSED] 0xD74B (NOVALAKE_S)
[11:34:06] [PASSED] 0x674C (CRESCENTISLAND)
[11:34:06] [PASSED] 0x674D (CRESCENTISLAND)
[11:34:06] [PASSED] 0x674E (CRESCENTISLAND)
[11:34:06] [PASSED] 0x674F (CRESCENTISLAND)
[11:34:06] [PASSED] 0x6750 (CRESCENTISLAND)
[11:34:06] [PASSED] 0xD750 (NOVALAKE_P)
[11:34:06] [PASSED] 0xD751 (NOVALAKE_P)
[11:34:06] [PASSED] 0xD752 (NOVALAKE_P)
[11:34:06] [PASSED] 0xD753 (NOVALAKE_P)
[11:34:06] [PASSED] 0xD754 (NOVALAKE_P)
[11:34:06] [PASSED] 0xD755 (NOVALAKE_P)
[11:34:06] [PASSED] 0xD756 (NOVALAKE_P)
[11:34:06] [PASSED] 0xD757 (NOVALAKE_P)
[11:34:06] [PASSED] 0xD75F (NOVALAKE_P)
[11:34:06] =============== [PASSED] check_platform_desc ===============
[11:34:06] ===================== [PASSED] xe_pci ======================
[11:34:06] ============= xe_rtp_tables_test (5 subtests) ==============
[11:34:06] ================== xe_rtp_table_gt_test  ===================
[11:34:06] [PASSED] gt_was/14011060649
[11:34:06] [PASSED] gt_was/14011059788
[11:34:06] [PASSED] gt_was/14015795083
[11:34:06] [PASSED] gt_was/16021867713
[11:34:06] [PASSED] gt_was/14019449301
[11:34:06] [PASSED] gt_was/16028005424
[11:34:06] [PASSED] gt_was/14026578760
[11:34:06] [PASSED] gt_was/1409420604
[11:34:06] [PASSED] gt_was/1408615072
[11:34:06] [PASSED] gt_was/22010523718
[11:34:06] [PASSED] gt_was/14011006942
[11:34:06] [PASSED] gt_was/14014830051
[11:34:06] [PASSED] gt_was/18018781329
[11:34:06] [PASSED] gt_was/1509235366
[11:34:06] [PASSED] gt_was/18018781329
[11:34:06] [PASSED] gt_was/16016694945
[11:34:06] [PASSED] gt_was/14018575942
[11:34:06] [PASSED] gt_was/22016670082
[11:34:06] [PASSED] gt_was/22016670082
[11:34:06] [PASSED] gt_was/14017421178
[11:34:06] [PASSED] gt_was/16025250150
[11:34:06] [PASSED] gt_was/14021871409
[11:34:06] [PASSED] gt_was/16021865536
[11:34:06] [PASSED] gt_was/14021486841
[11:34:06] [PASSED] gt_was/14025160223
[11:34:06] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[11:34:06] [PASSED] gt_was/14025635424
[11:34:06] [PASSED] gt_was/16028005424
[11:34:06] ============== [PASSED] xe_rtp_table_gt_test ===============
[11:34:06] ================== xe_rtp_table_gt_test  ===================
[11:34:06] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[11:34:06] [PASSED] gt_tunings/Tuning: 32B Access Enable
[11:34:06] [PASSED] gt_tunings/Tuning: L3 cache
[11:34:06] [PASSED] gt_tunings/Tuning: L3 cache - media
[11:34:06] [PASSED] gt_tunings/Tuning: Compression Overfetch
[11:34:06] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[11:34:06] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[11:34:06] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[11:34:06] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[11:34:06] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[11:34:06] [PASSED] gt_tunings/Tuning: Stateless compression control
[11:34:06] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[11:34:06] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[11:34:06] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[11:34:06] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[11:34:06] ============== [PASSED] xe_rtp_table_gt_test ===============
[11:34:06] ================== xe_rtp_table_oob_test  ==================
[11:34:06] [PASSED] oob_was/1607983814
[11:34:06] [PASSED] oob_was/16010904313
[11:34:06] [PASSED] oob_was/18022495364
[11:34:06] [PASSED] oob_was/22012773006
[11:34:06] [PASSED] oob_was/14014475959
[11:34:06] [PASSED] oob_was/22011391025
[11:34:06] [PASSED] oob_was/22012727170
[11:34:06] [PASSED] oob_was/22012727685
[11:34:06] [PASSED] oob_was/22016596838
[11:34:06] [PASSED] oob_was/18020744125
[11:34:06] [PASSED] oob_was/1409600907
[11:34:06] [PASSED] oob_was/22014953428
[11:34:06] [PASSED] oob_was/16017236439
[11:34:06] [PASSED] oob_was/14019821291
[11:34:06] [PASSED] oob_was/14015076503
[11:34:06] [PASSED] oob_was/14018913170
[11:34:06] [PASSED] oob_was/14018094691
[11:34:06] [PASSED] oob_was/18024947630
[11:34:06] [PASSED] oob_was/16022287689
[11:34:06] [PASSED] oob_was/13011645652
[11:34:06] [PASSED] oob_was/14022293748
[11:34:06] [PASSED] oob_was/22019794406
[11:34:06] [PASSED] oob_was/22019338487
[11:34:06] [PASSED] oob_was/16023588340
[11:34:06] [PASSED] oob_was/14019789679
[11:34:06] [PASSED] oob_was/14022866841
[11:34:06] [PASSED] oob_was/16021333562
[11:34:06] [PASSED] oob_was/14016712196
[11:34:06] [PASSED] oob_was/14015568240
[11:34:06] [PASSED] oob_was/18013179988
[11:34:06] [PASSED] oob_was/1508761755
[11:34:06] [PASSED] oob_was/16023105232
[11:34:06] [PASSED] oob_was/16026508708
[11:34:06] [PASSED] oob_was/14020001231
[11:34:06] [PASSED] oob_was/16023683509
[11:34:06] [PASSED] oob_was/14025515070
[11:34:06] [PASSED] oob_was/15015404425_disable
[11:34:06] [PASSED] oob_was/16026007364
[11:34:06] [PASSED] oob_was/14020316580
[11:34:06] [PASSED] oob_was/14025883347
[11:34:06] [PASSED] oob_was/16029380221
[11:34:06] [PASSED] oob_was/22022079272
[11:34:06] [PASSED] oob_was/16029897822
[11:34:06] [PASSED] oob_was/14027054324
[11:34:06] ============== [PASSED] xe_rtp_table_oob_test ==============
[11:34:06] ================ xe_rtp_table_dev_oob_test  ================
[11:34:06] [PASSED] device_oob_was/22010954014
[11:34:06] [PASSED] device_oob_was/15015404425
[11:34:06] [PASSED] device_oob_was/22019338487_display
[11:34:06] [PASSED] device_oob_was/14022085890
[11:34:06] [PASSED] device_oob_was/14026539277
[11:34:06] [PASSED] device_oob_was/14026633728
[11:34:06] [PASSED] device_oob_was/14026746987
[11:34:06] [PASSED] device_oob_was/14026779378
[11:34:06] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[11:34:06] ========== xe_rtp_table_missing_upper_bound_test  ==========
[11:34:06] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[11:34:06] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[11:34:06] [PASSED] register_whitelist/1806527549
[11:34:06] [PASSED] register_whitelist/allow_read_ctx_timestamp
[11:34:06] [PASSED] register_whitelist/allow_read_queue_timestamp
[11:34:06] [PASSED] register_whitelist/16014440446
[11:34:06] [PASSED] register_whitelist/16017236439
[11:34:06] [PASSED] register_whitelist/16020183090
[11:34:06] [PASSED] register_whitelist/14024997852
[11:34:06] [PASSED] register_whitelist/14024997852
[11:34:06] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[11:34:06] =============== [PASSED] xe_rtp_tables_test ================
[11:34:06] =================== xe_rtp (3 subtests) ====================
[11:34:06] =================== xe_rtp_rules_tests  ====================
[11:34:06] [PASSED] no
[11:34:06] [PASSED] yes
[11:34:06] [PASSED] no-and-no
[11:34:06] [PASSED] no-and-yes
[11:34:06] [PASSED] yes-and-no
[11:34:06] [PASSED] yes-and-yes
[11:34:06] [PASSED] no-or-no
[11:34:06] [PASSED] no-or-yes
[11:34:06] [PASSED] yes-or-no
[11:34:06] [PASSED] yes-or-yes
[11:34:06] [PASSED] no-yes-or-yes-no
[11:34:06] [PASSED] no-yes-or-yes-yes
[11:34:06] [PASSED] yes-yes-or-no-yes
[11:34:06] [PASSED] yes-yes-or-yes-yes
[11:34:06] [PASSED] no-no-or-yes-or-no
[11:34:06] [PASSED] or
[11:34:06] [PASSED] or-yes
[11:34:06] [PASSED] or-no
[11:34:06] [PASSED] yes-or
[11:34:06] [PASSED] no-or
[11:34:06] [PASSED] no-or-or-yes
[11:34:06] [PASSED] yes-or-or-no
[11:34:06] [PASSED] no-or-or-no
[11:34:06] [PASSED] missing-context-engine-class
[11:34:06] [PASSED] missing-context-engine-class-or-yes
[11:34:06] [PASSED] missing-context-engine-class-or-or-yes
[11:34:06] =============== [PASSED] xe_rtp_rules_tests ================
[11:34:06] =============== xe_rtp_process_to_sr_tests  ================
[11:34:06] [PASSED] coalesce-same-reg
[11:34:06] [PASSED] coalesce-same-reg-literal-and-func
[11:34:06] [PASSED] no-match-no-add
[11:34:06] [PASSED] two-regs-two-entries
[11:34:06] [PASSED] clr-one-set-other
[11:34:06] [PASSED] set-field
[11:34:06] [PASSED] conflict-duplicate
[11:34:06] [PASSED] conflict-not-disjoint
[11:34:06] [PASSED] conflict-not-disjoint-literal-and-func
[11:34:06] [PASSED] conflict-reg-type
[11:34:06] [PASSED] bad-mcr-reg-forced-to-regular
[11:34:06] [PASSED] bad-regular-reg-forced-to-mcr
[11:34:06] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:34:06] ================== xe_rtp_process_tests  ===================
[11:34:06] [PASSED] active1
[11:34:06] [PASSED] active2
[11:34:06] [PASSED] active-inactive
[11:34:06] [PASSED] inactive-active
[11:34:06] [PASSED] inactive-active-inactive
[11:34:06] [PASSED] inactive-inactive-inactive
[11:34:06] ============== [PASSED] xe_rtp_process_tests ===============
[11:34:06] ===================== [PASSED] xe_rtp ======================
[11:34:06] ==================== xe_wa (1 subtest) =====================
[11:34:06] ======================== xe_wa_gt  =========================
[11:34:06] [PASSED] TIGERLAKE B0
[11:34:06] [PASSED] DG1 A0
[11:34:06] [PASSED] DG1 B0
[11:34:06] [PASSED] ALDERLAKE_S A0
[11:34:06] [PASSED] ALDERLAKE_S B0
[11:34:06] [PASSED] ALDERLAKE_S C0
[11:34:06] [PASSED] ALDERLAKE_S D0
[11:34:06] [PASSED] ALDERLAKE_P A0
[11:34:06] [PASSED] ALDERLAKE_P B0
[11:34:06] [PASSED] ALDERLAKE_P C0
[11:34:06] [PASSED] ALDERLAKE_S RPLS D0
[11:34:06] [PASSED] ALDERLAKE_P RPLU E0
[11:34:06] [PASSED] DG2 G10 C0
[11:34:06] [PASSED] DG2 G11 B1
[11:34:06] [PASSED] DG2 G12 A1
[11:34:06] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:34:06] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:34:06] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:34:06] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:34:06] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:34:06] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:34:06] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:34:06] ==================== [PASSED] xe_wa_gt =====================
[11:34:06] ====================== [PASSED] xe_wa ======================
[11:34:06] ============================================================
[11:34:06] Testing complete. Ran 789 tests: passed: 761, skipped: 28
[11:34:06] Elapsed time: 37.152s total, 4.404s configuring, 32.033s building, 0.676s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:34:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:34:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:34:33] Starting KUnit Kernel (1/1)...
[11:34:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:34:33] ============ drm_test_pick_cmdline (2 subtests) ============
[11:34:33] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:34:33] =============== drm_test_pick_cmdline_named  ===============
[11:34:33] [PASSED] NTSC
[11:34:33] [PASSED] NTSC-J
[11:34:33] [PASSED] PAL
[11:34:33] [PASSED] PAL-M
[11:34:33] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:34:33] ============== [PASSED] drm_test_pick_cmdline ==============
[11:34:33] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:34:33] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:34:33] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:34:33] =========== drm_validate_clone_mode (2 subtests) ===========
[11:34:33] ============== drm_test_check_in_clone_mode  ===============
[11:34:33] [PASSED] in_clone_mode
[11:34:33] [PASSED] not_in_clone_mode
[11:34:33] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:34:33] =============== drm_test_check_valid_clones  ===============
[11:34:33] [PASSED] not_in_clone_mode
[11:34:33] [PASSED] valid_clone
[11:34:33] [PASSED] invalid_clone
[11:34:33] =========== [PASSED] drm_test_check_valid_clones ===========
[11:34:33] ============= [PASSED] drm_validate_clone_mode =============
[11:34:33] ============= drm_validate_modeset (1 subtest) =============
[11:34:33] [PASSED] drm_test_check_connector_changed_modeset
[11:34:33] ============== [PASSED] drm_validate_modeset ===============
[11:34:33] ====== drm_test_bridge_get_current_state (1 subtest) =======
[11:34:33] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:34:33] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:34:33] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:34:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:34:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:34:33] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[11:34:33] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:34:33] ============== drm_bridge_alloc (2 subtests) ===============
[11:34:33] [PASSED] drm_test_drm_bridge_alloc_basic
[11:34:33] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:34:33] ================ [PASSED] drm_bridge_alloc =================
[11:34:33] ============= drm_bridge_bus_fmt (5 subtests) ==============
[11:34:33] [PASSED] drm_test_bridge_rgb_yuv_rgb
[11:34:33] [PASSED] drm_test_bridge_must_convert_to_yuv444
[11:34:33] [PASSED] drm_test_bridge_hdmi_auto_rgb
[11:34:33] [PASSED] drm_test_bridge_auto_first
[11:34:33] [PASSED] drm_test_bridge_rgb_yuv_no_path
[11:34:33] =============== [PASSED] drm_bridge_bus_fmt ================
[11:34:33] ============= drm_cmdline_parser (40 subtests) =============
[11:34:33] [PASSED] drm_test_cmdline_force_d_only
[11:34:33] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:34:33] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:34:33] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:34:33] [PASSED] drm_test_cmdline_force_e_only
[11:34:33] [PASSED] drm_test_cmdline_res
[11:34:33] [PASSED] drm_test_cmdline_res_vesa
[11:34:33] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:34:33] [PASSED] drm_test_cmdline_res_rblank
[11:34:33] [PASSED] drm_test_cmdline_res_bpp
[11:34:33] [PASSED] drm_test_cmdline_res_refresh
[11:34:33] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:34:33] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:34:33] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:34:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:34:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:34:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:34:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:34:33] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:34:33] [PASSED] drm_test_cmdline_res_margins_force_on
[11:34:33] [PASSED] drm_test_cmdline_res_vesa_margins
[11:34:33] [PASSED] drm_test_cmdline_name
[11:34:33] [PASSED] drm_test_cmdline_name_bpp
[11:34:33] [PASSED] drm_test_cmdline_name_option
[11:34:33] [PASSED] drm_test_cmdline_name_bpp_option
[11:34:33] [PASSED] drm_test_cmdline_rotate_0
[11:34:33] [PASSED] drm_test_cmdline_rotate_90
[11:34:33] [PASSED] drm_test_cmdline_rotate_180
[11:34:33] [PASSED] drm_test_cmdline_rotate_270
[11:34:33] [PASSED] drm_test_cmdline_hmirror
[11:34:33] [PASSED] drm_test_cmdline_vmirror
[11:34:33] [PASSED] drm_test_cmdline_margin_options
[11:34:33] [PASSED] drm_test_cmdline_multiple_options
[11:34:33] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:34:33] [PASSED] drm_test_cmdline_extra_and_option
[11:34:33] [PASSED] drm_test_cmdline_freestanding_options
[11:34:33] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:34:33] [PASSED] drm_test_cmdline_panel_orientation
[11:34:33] ================ drm_test_cmdline_invalid  =================
[11:34:33] [PASSED] margin_only
[11:34:33] [PASSED] interlace_only
[11:34:33] [PASSED] res_missing_x
[11:34:33] [PASSED] res_missing_y
[11:34:33] [PASSED] res_bad_y
[11:34:33] [PASSED] res_missing_y_bpp
[11:34:33] [PASSED] res_bad_bpp
[11:34:33] [PASSED] res_bad_refresh
[11:34:33] [PASSED] res_bpp_refresh_force_on_off
[11:34:33] [PASSED] res_invalid_mode
[11:34:33] [PASSED] res_bpp_wrong_place_mode
[11:34:33] [PASSED] name_bpp_refresh
[11:34:33] [PASSED] name_refresh
[11:34:33] [PASSED] name_refresh_wrong_mode
[11:34:33] [PASSED] name_refresh_invalid_mode
[11:34:33] [PASSED] rotate_multiple
[11:34:33] [PASSED] rotate_invalid_val
[11:34:33] [PASSED] rotate_truncated
[11:34:33] [PASSED] invalid_option
[11:34:33] [PASSED] invalid_tv_option
[11:34:33] [PASSED] truncated_tv_option
[11:34:33] ============ [PASSED] drm_test_cmdline_invalid =============
[11:34:33] =============== drm_test_cmdline_tv_options  ===============
[11:34:33] [PASSED] NTSC
[11:34:33] [PASSED] NTSC_443
[11:34:33] [PASSED] NTSC_J
[11:34:33] [PASSED] PAL
[11:34:33] [PASSED] PAL_M
[11:34:33] [PASSED] PAL_N
[11:34:33] [PASSED] SECAM
[11:34:33] [PASSED] MONO_525
[11:34:33] [PASSED] MONO_625
[11:34:33] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:34:33] =============== [PASSED] drm_cmdline_parser ================
[11:34:33] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:34:33] [PASSED] drm_test_connector_hdmi_init_valid
[11:34:33] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:34:33] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:34:33] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:34:33] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:34:33] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:34:33] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:34:33] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:34:33] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[11:34:33] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:34:33] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:34:33] [PASSED] supported_formats=0x5 yuv420_allowed=1
[11:34:33] [PASSED] supported_formats=0x5 yuv420_allowed=0
[11:34:33] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:34:33] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:34:33] [PASSED] drm_test_connector_hdmi_init_null_product
[11:34:33] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:34:33] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:34:33] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:34:33] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:34:33] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:34:33] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:34:33] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:34:33] ========= drm_test_connector_hdmi_init_type_valid  =========
[11:34:33] [PASSED] HDMI-A
[11:34:33] [PASSED] HDMI-B
[11:34:33] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:34:33] ======== drm_test_connector_hdmi_init_type_invalid  ========
[11:34:33] [PASSED] Unknown
[11:34:33] [PASSED] VGA
[11:34:33] [PASSED] DVI-I
[11:34:33] [PASSED] DVI-D
[11:34:33] [PASSED] DVI-A
[11:34:33] [PASSED] Composite
[11:34:33] [PASSED] SVIDEO
[11:34:33] [PASSED] LVDS
[11:34:33] [PASSED] Component
[11:34:33] [PASSED] DIN
[11:34:33] [PASSED] DP
[11:34:33] [PASSED] TV
[11:34:33] [PASSED] eDP
[11:34:33] [PASSED] Virtual
[11:34:33] [PASSED] DSI
[11:34:33] [PASSED] DPI
[11:34:33] [PASSED] Writeback
[11:34:33] [PASSED] SPI
[11:34:33] [PASSED] USB
[11:34:33] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:34:33] ============ [PASSED] drmm_connector_hdmi_init =============
[11:34:33] ============= drmm_connector_init (3 subtests) =============
[11:34:33] [PASSED] drm_test_drmm_connector_init
[11:34:33] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:34:33] ========= drm_test_drmm_connector_init_type_valid  =========
[11:34:33] [PASSED] Unknown
[11:34:33] [PASSED] VGA
[11:34:33] [PASSED] DVI-I
[11:34:33] [PASSED] DVI-D
[11:34:33] [PASSED] DVI-A
[11:34:33] [PASSED] Composite
[11:34:33] [PASSED] SVIDEO
[11:34:33] [PASSED] LVDS
[11:34:33] [PASSED] Component
[11:34:33] [PASSED] DIN
[11:34:33] [PASSED] DP
[11:34:33] [PASSED] HDMI-A
[11:34:33] [PASSED] HDMI-B
[11:34:33] [PASSED] TV
[11:34:33] [PASSED] eDP
[11:34:33] [PASSED] Virtual
[11:34:33] [PASSED] DSI
[11:34:33] [PASSED] DPI
[11:34:33] [PASSED] Writeback
[11:34:33] [PASSED] SPI
[11:34:33] [PASSED] USB
[11:34:33] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:34:33] =============== [PASSED] drmm_connector_init ===============
[11:34:33] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_init
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:34:33] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[11:34:33] [PASSED] Unknown
[11:34:33] [PASSED] VGA
[11:34:33] [PASSED] DVI-I
[11:34:33] [PASSED] DVI-D
[11:34:33] [PASSED] DVI-A
[11:34:33] [PASSED] Composite
[11:34:33] [PASSED] SVIDEO
[11:34:33] [PASSED] LVDS
[11:34:33] [PASSED] Component
[11:34:33] [PASSED] DIN
[11:34:33] [PASSED] DP
[11:34:33] [PASSED] HDMI-A
[11:34:33] [PASSED] HDMI-B
[11:34:33] [PASSED] TV
[11:34:33] [PASSED] eDP
[11:34:33] [PASSED] Virtual
[11:34:33] [PASSED] DSI
[11:34:33] [PASSED] DPI
[11:34:33] [PASSED] Writeback
[11:34:33] [PASSED] SPI
[11:34:33] [PASSED] USB
[11:34:33] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:34:33] ======== drm_test_drm_connector_dynamic_init_name  =========
[11:34:33] [PASSED] Unknown
[11:34:33] [PASSED] VGA
[11:34:33] [PASSED] DVI-I
[11:34:33] [PASSED] DVI-D
[11:34:33] [PASSED] DVI-A
[11:34:33] [PASSED] Composite
[11:34:33] [PASSED] SVIDEO
[11:34:33] [PASSED] LVDS
[11:34:33] [PASSED] Component
[11:34:33] [PASSED] DIN
[11:34:33] [PASSED] DP
[11:34:33] [PASSED] HDMI-A
[11:34:33] [PASSED] HDMI-B
[11:34:33] [PASSED] TV
[11:34:33] [PASSED] eDP
[11:34:33] [PASSED] Virtual
[11:34:33] [PASSED] DSI
[11:34:33] [PASSED] DPI
[11:34:33] [PASSED] Writeback
[11:34:33] [PASSED] SPI
[11:34:33] [PASSED] USB
[11:34:33] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:34:33] =========== [PASSED] drm_connector_dynamic_init ============
[11:34:33] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:34:33] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:34:33] ======= drm_connector_dynamic_register (7 subtests) ========
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:34:33] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:34:33] ========= [PASSED] drm_connector_dynamic_register ==========
[11:34:33] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:34:33] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:34:33] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:34:33] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:34:33] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:34:33] ========== drm_test_get_tv_mode_from_name_valid  ===========
[11:34:33] [PASSED] NTSC
[11:34:33] [PASSED] NTSC-443
[11:34:33] [PASSED] NTSC-J
[11:34:33] [PASSED] PAL
[11:34:33] [PASSED] PAL-M
[11:34:33] [PASSED] PAL-N
[11:34:33] [PASSED] SECAM
[11:34:33] [PASSED] Mono
[11:34:33] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:34:33] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:34:33] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:34:33] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:34:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:34:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:34:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:34:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:34:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:34:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:34:33] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[11:34:33] [PASSED] VIC 96
[11:34:33] [PASSED] VIC 97
[11:34:33] [PASSED] VIC 101
[11:34:33] [PASSED] VIC 102
[11:34:33] [PASSED] VIC 106
[11:34:33] [PASSED] VIC 107
[11:34:33] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:34:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:34:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:34:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:34:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:34:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:34:33] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:34:33] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:34:33] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[11:34:33] [PASSED] Automatic
[11:34:33] [PASSED] Full
[11:34:33] [PASSED] Limited 16:235
[11:34:33] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:34:33] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:34:33] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:34:33] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:34:33] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[11:34:33] [PASSED] RGB
[11:34:33] [PASSED] YUV 4:2:0
[11:34:33] [PASSED] YUV 4:2:2
[11:34:33] [PASSED] YUV 4:4:4
[11:34:33] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:34:33] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:34:33] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:34:33] ============= drm_damage_helper (21 subtests) ==============
[11:34:33] [PASSED] drm_test_damage_iter_no_damage
[11:34:33] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:34:33] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:34:33] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:34:33] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:34:33] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:34:33] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:34:33] [PASSED] drm_test_damage_iter_simple_damage
[11:34:33] [PASSED] drm_test_damage_iter_single_damage
[11:34:33] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:34:33] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:34:33] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:34:33] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:34:33] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:34:33] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:34:33] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:34:33] [PASSED] drm_test_damage_iter_damage
[11:34:33] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:34:33] [PASSED] drm_test_damage_iter_damage_one_outside
[11:34:33] [PASSED] drm_test_damage_iter_damage_src_moved
[11:34:33] [PASSED] drm_test_damage_iter_damage_not_visible
[11:34:33] ================ [PASSED] drm_damage_helper ================
[11:34:33] ============== drm_dp_mst_helper (3 subtests) ==============
[11:34:33] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[11:34:33] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:34:33] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:34:33] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:34:33] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:34:33] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:34:33] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:34:33] ============== drm_test_dp_mst_calc_pbn_div  ===============
[11:34:33] [PASSED] Link rate 2000000 lane count 4
[11:34:33] [PASSED] Link rate 2000000 lane count 2
[11:34:33] [PASSED] Link rate 2000000 lane count 1
[11:34:33] [PASSED] Link rate 1350000 lane count 4
[11:34:33] [PASSED] Link rate 1350000 lane count 2
[11:34:33] [PASSED] Link rate 1350000 lane count 1
[11:34:33] [PASSED] Link rate 1000000 lane count 4
[11:34:33] [PASSED] Link rate 1000000 lane count 2
[11:34:33] [PASSED] Link rate 1000000 lane count 1
[11:34:33] [PASSED] Link rate 810000 lane count 4
[11:34:33] [PASSED] Link rate 810000 lane count 2
[11:34:33] [PASSED] Link rate 810000 lane count 1
[11:34:33] [PASSED] Link rate 540000 lane count 4
[11:34:33] [PASSED] Link rate 540000 lane count 2
[11:34:33] [PASSED] Link rate 540000 lane count 1
[11:34:33] [PASSED] Link rate 270000 lane count 4
[11:34:33] [PASSED] Link rate 270000 lane count 2
[11:34:33] [PASSED] Link rate 270000 lane count 1
[11:34:33] [PASSED] Link rate 162000 lane count 4
[11:34:33] [PASSED] Link rate 162000 lane count 2
[11:34:33] [PASSED] Link rate 162000 lane count 1
[11:34:33] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:34:33] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[11:34:33] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:34:33] [PASSED] DP_POWER_UP_PHY with port number
[11:34:33] [PASSED] DP_POWER_DOWN_PHY with port number
[11:34:33] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:34:33] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:34:33] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:34:33] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:34:33] [PASSED] DP_QUERY_PAYLOAD with port number
[11:34:33] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:34:33] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:34:33] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:34:33] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:34:33] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:34:33] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:34:33] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:34:33] [PASSED] DP_REMOTE_I2C_READ with port number
[11:34:33] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:34:33] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:34:33] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:34:33] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:34:33] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:34:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:34:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:34:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:34:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:34:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:34:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:34:33] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:34:33] ================ [PASSED] drm_dp_mst_helper ================
[11:34:33] ================== drm_exec (7 subtests) ===================
[11:34:33] [PASSED] sanitycheck
[11:34:33] [PASSED] test_lock
[11:34:33] [PASSED] test_lock_unlock
[11:34:33] [PASSED] test_duplicates
[11:34:33] [PASSED] test_prepare
[11:34:33] [PASSED] test_prepare_array
[11:34:33] [PASSED] test_multiple_loops
[11:34:33] ==================== [PASSED] drm_exec =====================
[11:34:33] =========== drm_format_helper_test (17 subtests) ===========
[11:34:33] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:34:33] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:34:33] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:34:33] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:34:33] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:34:33] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:34:33] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:34:33] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:34:33] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:34:33] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:34:33] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:34:33] ============== drm_test_fb_xrgb8888_to_mono  ===============
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:34:33] ==================== drm_test_fb_swab  =====================
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ================ [PASSED] drm_test_fb_swab =================
[11:34:33] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:34:33] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[11:34:33] [PASSED] single_pixel_source_buffer
[11:34:33] [PASSED] single_pixel_clip_rectangle
[11:34:33] [PASSED] well_known_colors
[11:34:33] [PASSED] destination_pitch
[11:34:33] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:34:33] ================= drm_test_fb_clip_offset  =================
[11:34:33] [PASSED] pass through
[11:34:33] [PASSED] horizontal offset
[11:34:33] [PASSED] vertical offset
[11:34:33] [PASSED] horizontal and vertical offset
[11:34:33] [PASSED] horizontal offset (custom pitch)
[11:34:33] [PASSED] vertical offset (custom pitch)
[11:34:33] [PASSED] horizontal and vertical offset (custom pitch)
[11:34:33] ============= [PASSED] drm_test_fb_clip_offset =============
[11:34:33] =================== drm_test_fb_memcpy  ====================
[11:34:33] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:34:33] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:34:33] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:34:33] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:34:33] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:34:33] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:34:33] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:34:33] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:34:33] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:34:33] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:34:33] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:34:33] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:34:33] =============== [PASSED] drm_test_fb_memcpy ================
[11:34:33] ============= [PASSED] drm_format_helper_test ==============
[11:34:33] ================= drm_format (18 subtests) =================
[11:34:33] [PASSED] drm_test_format_block_width_invalid
[11:34:33] [PASSED] drm_test_format_block_width_one_plane
[11:34:33] [PASSED] drm_test_format_block_width_two_plane
[11:34:33] [PASSED] drm_test_format_block_width_three_plane
[11:34:33] [PASSED] drm_test_format_block_width_tiled
[11:34:33] [PASSED] drm_test_format_block_height_invalid
[11:34:33] [PASSED] drm_test_format_block_height_one_plane
[11:34:33] [PASSED] drm_test_format_block_height_two_plane
[11:34:33] [PASSED] drm_test_format_block_height_three_plane
[11:34:33] [PASSED] drm_test_format_block_height_tiled
[11:34:33] [PASSED] drm_test_format_min_pitch_invalid
[11:34:33] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:34:33] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:34:33] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:34:33] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:34:33] [PASSED] drm_test_format_min_pitch_two_plane
[11:34:33] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:34:33] [PASSED] drm_test_format_min_pitch_tiled
[11:34:33] =================== [PASSED] drm_format ====================
[11:34:33] ============== drm_framebuffer (10 subtests) ===============
[11:34:33] ========== drm_test_framebuffer_check_src_coords  ==========
[11:34:33] [PASSED] Success: source fits into fb
[11:34:33] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:34:33] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:34:33] [PASSED] Fail: overflowing fb with source width
[11:34:33] [PASSED] Fail: overflowing fb with source height
[11:34:33] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:34:33] [PASSED] drm_test_framebuffer_cleanup
[11:34:33] =============== drm_test_framebuffer_create  ===============
[11:34:33] [PASSED] ABGR8888 normal sizes
[11:34:33] [PASSED] ABGR8888 max sizes
[11:34:33] [PASSED] ABGR8888 pitch greater than min required
[11:34:33] [PASSED] ABGR8888 pitch less than min required
[11:34:33] [PASSED] ABGR8888 Invalid width
[11:34:33] [PASSED] ABGR8888 Invalid buffer handle
[11:34:33] [PASSED] No pixel format
[11:34:33] [PASSED] ABGR8888 Width 0
[11:34:33] [PASSED] ABGR8888 Height 0
[11:34:33] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:34:33] [PASSED] ABGR8888 Large buffer offset
[11:34:33] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:34:33] [PASSED] ABGR8888 Invalid flag
[11:34:33] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:34:33] [PASSED] ABGR8888 Valid buffer modifier
[11:34:33] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:34:33] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:34:33] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:34:33] [PASSED] NV12 Normal sizes
[11:34:33] [PASSED] NV12 Max sizes
[11:34:33] [PASSED] NV12 Invalid pitch
[11:34:33] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:34:33] [PASSED] NV12 different  modifier per-plane
[11:34:33] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:34:33] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:34:33] [PASSED] NV12 Modifier for inexistent plane
[11:34:33] [PASSED] NV12 Handle for inexistent plane
[11:34:33] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:34:33] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:34:33] [PASSED] YVU420 Normal sizes
[11:34:33] [PASSED] YVU420 Max sizes
[11:34:33] [PASSED] YVU420 Invalid pitch
[11:34:33] [PASSED] YVU420 Different pitches
[11:34:33] [PASSED] YVU420 Different buffer offsets/pitches
[11:34:33] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:34:33] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:34:33] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:34:33] [PASSED] YVU420 Valid modifier
[11:34:33] [PASSED] YVU420 Different modifiers per plane
[11:34:33] [PASSED] YVU420 Modifier for inexistent plane
[11:34:33] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:34:33] [PASSED] X0L2 Normal sizes
[11:34:33] [PASSED] X0L2 Max sizes
[11:34:33] [PASSED] X0L2 Invalid pitch
[11:34:33] [PASSED] X0L2 Pitch greater than minimum required
[11:34:33] [PASSED] X0L2 Handle for inexistent plane
[11:34:33] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:34:33] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:34:33] [PASSED] X0L2 Valid modifier
[11:34:33] [PASSED] X0L2 Modifier for inexistent plane
[11:34:33] =========== [PASSED] drm_test_framebuffer_create ===========
[11:34:33] [PASSED] drm_test_framebuffer_free
[11:34:33] [PASSED] drm_test_framebuffer_init
[11:34:33] [PASSED] drm_test_framebuffer_init_bad_format
[11:34:33] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:34:33] [PASSED] drm_test_framebuffer_lookup
[11:34:33] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:34:33] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:34:33] ================= [PASSED] drm_framebuffer =================
[11:34:33] ================ drm_gem_shmem (8 subtests) ================
[11:34:33] [PASSED] drm_gem_shmem_test_obj_create
[11:34:33] [PASSED] drm_gem_shmem_test_obj_create_private
[11:34:33] [PASSED] drm_gem_shmem_test_pin_pages
[11:34:33] [PASSED] drm_gem_shmem_test_vmap
[11:34:33] [PASSED] drm_gem_shmem_test_get_sg_table
[11:34:33] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:34:33] [PASSED] drm_gem_shmem_test_madvise
[11:34:33] [PASSED] drm_gem_shmem_test_purge
[11:34:33] ================== [PASSED] drm_gem_shmem ==================
[11:34:33] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[11:34:33] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:34:33] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:34:33] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:34:33] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:34:33] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:34:33] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:34:33] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[11:34:33] [PASSED] Automatic
[11:34:33] [PASSED] Full
[11:34:33] [PASSED] Limited 16:235
[11:34:33] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:34:33] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:34:33] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:34:33] [PASSED] drm_test_check_disable_connector
[11:34:33] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:34:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:34:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:34:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:34:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:34:33] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:34:33] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:34:33] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:34:33] [PASSED] drm_test_check_output_bpc_dvi
[11:34:33] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:34:33] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:34:33] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:34:33] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:34:33] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:34:33] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:34:33] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:34:33] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:34:33] ============ drm_test_check_hdmi_color_format  =============
[11:34:33] [PASSED] AUTO -> RGB
[11:34:33] [PASSED] YCBCR422 -> YUV422
[11:34:33] [PASSED] YCBCR420 -> YUV420
[11:34:33] [PASSED] YCBCR444 -> YUV444
[11:34:33] [PASSED] RGB -> RGB
[11:34:33] ======== [PASSED] drm_test_check_hdmi_color_format =========
[11:34:33] ======== drm_test_check_hdmi_color_format_420_only  ========
[11:34:33] [PASSED] RGB should fail
[11:34:33] [PASSED] YUV444 should fail
[11:34:33] [PASSED] YUV422 should fail
[11:34:33] [PASSED] YUV420 should work
[11:34:33] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[11:34:33] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:34:33] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:34:33] [PASSED] drm_test_check_broadcast_rgb_value
[11:34:33] [PASSED] drm_test_check_bpc_8_value
[11:34:33] [PASSED] drm_test_check_bpc_10_value
[11:34:33] [PASSED] drm_test_check_bpc_12_value
[11:34:33] [PASSED] drm_test_check_format_value
[11:34:33] [PASSED] drm_test_check_tmds_char_value
[11:34:33] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:34:33] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[11:34:33] [PASSED] drm_test_check_mode_valid
[11:34:33] [PASSED] drm_test_check_mode_valid_reject
[11:34:33] [PASSED] drm_test_check_mode_valid_reject_rate
[11:34:33] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:34:33] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[11:34:33] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[11:34:33] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[11:34:33] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:34:33] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[11:34:33] [PASSED] drm_test_check_infoframes
[11:34:33] [PASSED] drm_test_check_reject_avi_infoframe
[11:34:33] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[11:34:33] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[11:34:33] [PASSED] drm_test_check_reject_audio_infoframe
[11:34:33] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[11:34:33] ================= drm_managed (2 subtests) =================
[11:34:33] [PASSED] drm_test_managed_release_action
[11:34:33] [PASSED] drm_test_managed_run_action
[11:34:33] =================== [PASSED] drm_managed ===================
[11:34:33] =================== drm_mm (6 subtests) ====================
[11:34:33] [PASSED] drm_test_mm_init
[11:34:33] [PASSED] drm_test_mm_debug
[11:34:33] [PASSED] drm_test_mm_align32
[11:34:33] [PASSED] drm_test_mm_align64
[11:34:33] [PASSED] drm_test_mm_lowest
[11:34:33] [PASSED] drm_test_mm_highest
[11:34:33] ===================== [PASSED] drm_mm ======================
[11:34:33] ============= drm_modes_analog_tv (5 subtests) =============
[11:34:33] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:34:33] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:34:33] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:34:33] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:34:33] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:34:33] =============== [PASSED] drm_modes_analog_tv ===============
[11:34:33] ============== drm_plane_helper (2 subtests) ===============
[11:34:33] =============== drm_test_check_plane_state  ================
[11:34:33] [PASSED] clipping_simple
[11:34:33] [PASSED] clipping_rotate_reflect
[11:34:33] [PASSED] positioning_simple
[11:34:33] [PASSED] upscaling
[11:34:33] [PASSED] downscaling
[11:34:33] [PASSED] rounding1
[11:34:33] [PASSED] rounding2
[11:34:33] [PASSED] rounding3
[11:34:33] [PASSED] rounding4
[11:34:33] =========== [PASSED] drm_test_check_plane_state ============
[11:34:33] =========== drm_test_check_invalid_plane_state  ============
[11:34:33] [PASSED] positioning_invalid
[11:34:33] [PASSED] upscaling_invalid
[11:34:33] [PASSED] downscaling_invalid
[11:34:33] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:34:33] ================ [PASSED] drm_plane_helper =================
[11:34:33] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:34:33] ====== drm_test_connector_helper_tv_get_modes_check  =======
[11:34:33] [PASSED] None
[11:34:33] [PASSED] PAL
[11:34:33] [PASSED] NTSC
[11:34:33] [PASSED] Both, NTSC Default
[11:34:33] [PASSED] Both, PAL Default
[11:34:33] [PASSED] Both, NTSC Default, with PAL on command-line
[11:34:33] [PASSED] Both, PAL Default, with NTSC on command-line
[11:34:33] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:34:33] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:34:33] ================== drm_rect (9 subtests) ===================
[11:34:33] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:34:33] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:34:33] [PASSED] drm_test_rect_clip_scaled_clipped
[11:34:33] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:34:33] ================= drm_test_rect_intersect  =================
[11:34:33] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:34:33] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:34:33] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:34:33] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:34:33] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:34:33] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:34:33] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:34:33] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:34:33] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:34:33] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:34:33] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:34:33] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:34:33] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:34:33] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:34:33] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:34:33] ============= [PASSED] drm_test_rect_intersect =============
[11:34:33] ================ drm_test_rect_calc_hscale  ================
[11:34:33] [PASSED] normal use
[11:34:33] [PASSED] out of max range
[11:34:33] [PASSED] out of min range
[11:34:33] [PASSED] zero dst
[11:34:33] [PASSED] negative src
[11:34:33] [PASSED] negative dst
[11:34:33] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:34:33] ================ drm_test_rect_calc_vscale  ================
[11:34:33] [PASSED] normal use
[11:34:33] [PASSED] out of max range
[11:34:33] [PASSED] out of min range
[11:34:33] [PASSED] zero dst
[11:34:33] [PASSED] negative src
[11:34:33] [PASSED] negative dst
[11:34:33] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:34:33] ================== drm_test_rect_rotate  ===================
[11:34:33] [PASSED] reflect-x
[11:34:33] [PASSED] reflect-y
[11:34:33] [PASSED] rotate-0
[11:34:33] [PASSED] rotate-90
[11:34:33] [PASSED] rotate-180
[11:34:33] [PASSED] rotate-270
[11:34:33] ============== [PASSED] drm_test_rect_rotate ===============
[11:34:33] ================ drm_test_rect_rotate_inv  =================
[11:34:33] [PASSED] reflect-x
[11:34:33] [PASSED] reflect-y
[11:34:33] [PASSED] rotate-0
[11:34:33] [PASSED] rotate-90
[11:34:33] [PASSED] rotate-180
[11:34:33] [PASSED] rotate-270
[11:34:33] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:34:33] ==================== [PASSED] drm_rect =====================
[11:34:33] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:34:33] ============ drm_test_sysfb_build_fourcc_list  =============
[11:34:33] [PASSED] no native formats
[11:34:33] [PASSED] XRGB8888 as native format
[11:34:33] [PASSED] remove duplicates
[11:34:33] [PASSED] convert alpha formats
[11:34:33] [PASSED] random formats
[11:34:33] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:34:33] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:34:33] ================== drm_fixp (2 subtests) ===================
[11:34:33] [PASSED] drm_test_int2fixp
[11:34:33] [PASSED] drm_test_sm2fixp
[11:34:33] ==================== [PASSED] drm_fixp =====================
[11:34:33] ============================================================
[11:34:33] Testing complete. Ran 637 tests: passed: 637
[11:34:33] Elapsed time: 26.838s total, 1.821s configuring, 24.798s building, 0.195s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:34:33] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:34:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:34:45] Starting KUnit Kernel (1/1)...
[11:34:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:34:45] ================= ttm_device (5 subtests) ==================
[11:34:45] [PASSED] ttm_device_init_basic
[11:34:45] [PASSED] ttm_device_init_multiple
[11:34:45] [PASSED] ttm_device_fini_basic
[11:34:45] [PASSED] ttm_device_init_no_vma_man
[11:34:45] ================== ttm_device_init_pools  ==================
[11:34:45] [PASSED] No DMA allocations, no DMA32 required
[11:34:45] [PASSED] DMA allocations, DMA32 required
[11:34:45] [PASSED] No DMA allocations, DMA32 required
[11:34:45] [PASSED] DMA allocations, no DMA32 required
[11:34:45] ============== [PASSED] ttm_device_init_pools ==============
[11:34:45] =================== [PASSED] ttm_device ====================
[11:34:45] ================== ttm_pool (8 subtests) ===================
[11:34:45] ================== ttm_pool_alloc_basic  ===================
[11:34:45] [PASSED] One page
[11:34:45] [PASSED] More than one page
[11:34:45] [PASSED] Above the allocation limit
[11:34:45] [PASSED] One page, with coherent DMA mappings enabled
[11:34:45] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:34:45] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:34:45] ============== ttm_pool_alloc_basic_dma_addr  ==============
[11:34:45] [PASSED] One page
[11:34:45] [PASSED] More than one page
[11:34:45] [PASSED] Above the allocation limit
[11:34:45] [PASSED] One page, with coherent DMA mappings enabled
[11:34:45] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:34:45] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:34:45] [PASSED] ttm_pool_alloc_order_caching_match
[11:34:45] [PASSED] ttm_pool_alloc_caching_mismatch
[11:34:45] [PASSED] ttm_pool_alloc_order_mismatch
[11:34:45] [PASSED] ttm_pool_free_dma_alloc
[11:34:45] [PASSED] ttm_pool_free_no_dma_alloc
[11:34:45] [PASSED] ttm_pool_fini_basic
[11:34:45] ==================== [PASSED] ttm_pool =====================
[11:34:45] ================ ttm_resource (8 subtests) =================
[11:34:45] ================= ttm_resource_init_basic  =================
[11:34:45] [PASSED] Init resource in TTM_PL_SYSTEM
[11:34:45] [PASSED] Init resource in TTM_PL_VRAM
[11:34:45] [PASSED] Init resource in a private placement
[11:34:45] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:34:45] ============= [PASSED] ttm_resource_init_basic =============
[11:34:45] [PASSED] ttm_resource_init_pinned
[11:34:45] [PASSED] ttm_resource_fini_basic
[11:34:45] [PASSED] ttm_resource_manager_init_basic
[11:34:45] [PASSED] ttm_resource_manager_usage_basic
[11:34:45] [PASSED] ttm_resource_manager_set_used_basic
[11:34:45] [PASSED] ttm_sys_man_alloc_basic
[11:34:45] [PASSED] ttm_sys_man_free_basic
[11:34:45] ================== [PASSED] ttm_resource ===================
[11:34:45] =================== ttm_tt (15 subtests) ===================
[11:34:45] ==================== ttm_tt_init_basic  ====================
[11:34:45] [PASSED] Page-aligned size
[11:34:45] [PASSED] Extra pages requested
[11:34:45] ================ [PASSED] ttm_tt_init_basic ================
[11:34:45] [PASSED] ttm_tt_init_misaligned
[11:34:45] [PASSED] ttm_tt_fini_basic
[11:34:45] [PASSED] ttm_tt_fini_sg
[11:34:45] [PASSED] ttm_tt_fini_shmem
[11:34:45] [PASSED] ttm_tt_create_basic
[11:34:45] [PASSED] ttm_tt_create_invalid_bo_type
[11:34:45] [PASSED] ttm_tt_create_ttm_exists
[11:34:45] [PASSED] ttm_tt_create_failed
[11:34:45] [PASSED] ttm_tt_destroy_basic
[11:34:45] [PASSED] ttm_tt_populate_null_ttm
[11:34:45] [PASSED] ttm_tt_populate_populated_ttm
[11:34:45] [PASSED] ttm_tt_unpopulate_basic
[11:34:45] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:34:45] [PASSED] ttm_tt_swapin_basic
[11:34:45] ===================== [PASSED] ttm_tt ======================
[11:34:45] =================== ttm_bo (14 subtests) ===================
[11:34:45] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[11:34:45] [PASSED] Cannot be interrupted and sleeps
[11:34:45] [PASSED] Cannot be interrupted, locks straight away
[11:34:45] [PASSED] Can be interrupted, sleeps
[11:34:45] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:34:45] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:34:45] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:34:45] [PASSED] ttm_bo_reserve_double_resv
[11:34:45] [PASSED] ttm_bo_reserve_interrupted
[11:34:45] [PASSED] ttm_bo_reserve_deadlock
[11:34:45] [PASSED] ttm_bo_unreserve_basic
[11:34:45] [PASSED] ttm_bo_unreserve_pinned
[11:34:45] [PASSED] ttm_bo_unreserve_bulk
[11:34:45] [PASSED] ttm_bo_fini_basic
[11:34:45] [PASSED] ttm_bo_fini_shared_resv
[11:34:45] [PASSED] ttm_bo_pin_basic
[11:34:45] [PASSED] ttm_bo_pin_unpin_resource
[11:34:45] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:34:45] ===================== [PASSED] ttm_bo ======================
[11:34:45] ============== ttm_bo_validate (22 subtests) ===============
[11:34:45] ============== ttm_bo_init_reserved_sys_man  ===============
[11:34:45] [PASSED] Buffer object for userspace
[11:34:45] [PASSED] Kernel buffer object
[11:34:45] [PASSED] Shared buffer object
[11:34:45] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:34:45] ============== ttm_bo_init_reserved_mock_man  ==============
[11:34:45] [PASSED] Buffer object for userspace
[11:34:45] [PASSED] Kernel buffer object
[11:34:45] [PASSED] Shared buffer object
[11:34:45] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:34:45] [PASSED] ttm_bo_init_reserved_resv
[11:34:45] ================== ttm_bo_validate_basic  ==================
[11:34:45] [PASSED] Buffer object for userspace
[11:34:45] [PASSED] Kernel buffer object
[11:34:45] [PASSED] Shared buffer object
[11:34:45] ============== [PASSED] ttm_bo_validate_basic ==============
[11:34:45] [PASSED] ttm_bo_validate_invalid_placement
[11:34:45] ============= ttm_bo_validate_same_placement  ==============
[11:34:45] [PASSED] System manager
[11:34:45] [PASSED] VRAM manager
[11:34:45] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:34:45] [PASSED] ttm_bo_validate_failed_alloc
[11:34:45] [PASSED] ttm_bo_validate_pinned
[11:34:45] [PASSED] ttm_bo_validate_busy_placement
[11:34:45] ================ ttm_bo_validate_multihop  =================
[11:34:45] [PASSED] Buffer object for userspace
[11:34:45] [PASSED] Kernel buffer object
[11:34:45] [PASSED] Shared buffer object
[11:34:45] ============ [PASSED] ttm_bo_validate_multihop =============
[11:34:45] ========== ttm_bo_validate_no_placement_signaled  ==========
[11:34:45] [PASSED] Buffer object in system domain, no page vector
[11:34:45] [PASSED] Buffer object in system domain with an existing page vector
[11:34:45] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:34:45] ======== ttm_bo_validate_no_placement_not_signaled  ========
[11:34:45] [PASSED] Buffer object for userspace
[11:34:45] [PASSED] Kernel buffer object
[11:34:45] [PASSED] Shared buffer object
[11:34:45] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:34:45] [PASSED] ttm_bo_validate_move_fence_signaled
[11:34:45] ========= ttm_bo_validate_move_fence_not_signaled  =========
[11:34:45] [PASSED] Waits for GPU
[11:34:45] [PASSED] Tries to lock straight away
[11:34:45] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:34:45] [PASSED] ttm_bo_validate_swapout
[11:34:45] [PASSED] ttm_bo_validate_happy_evict
[11:34:45] [PASSED] ttm_bo_validate_all_pinned_evict
[11:34:45] [PASSED] ttm_bo_validate_allowed_only_evict
[11:34:45] [PASSED] ttm_bo_validate_deleted_evict
[11:34:45] [PASSED] ttm_bo_validate_busy_domain_evict
[11:34:45] [PASSED] ttm_bo_validate_evict_gutting
[11:34:45] [PASSED] ttm_bo_validate_recrusive_evict
[11:34:45] ================= [PASSED] ttm_bo_validate =================
[11:34:45] ============================================================
[11:34:45] Testing complete. Ran 102 tests: passed: 102
[11:34:45] Elapsed time: 12.031s total, 1.824s configuring, 9.992s building, 0.176s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[11:34:45] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:34:47] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:34:56] Starting KUnit Kernel (1/1)...
[11:34:56] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:34:56] =============== dma-buf-fence (12 subtests) ================
[11:34:56] [PASSED] test_sanitycheck
[11:34:56] [PASSED] test_signaling
[11:34:56] [PASSED] test_add_callback
[11:34:56] [PASSED] test_late_add_callback
[11:34:56] [PASSED] test_rm_callback
[11:34:56] [PASSED] test_late_rm_callback
[11:34:56] [PASSED] test_status
[11:34:56] [PASSED] test_error
[11:34:56] [PASSED] test_wait
[11:34:56] [PASSED] test_wait_timeout
[11:34:56] [PASSED] test_stub
[11:34:56] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[11:34:56] ================== [PASSED] dma-buf-fence ==================
[11:34:56] ============ dma-buf-fence-chain (11 subtests) =============
[11:34:56] [PASSED] test_sanitycheck
[11:34:56] [PASSED] test_find_seqno
[11:34:56] [PASSED] test_find_signaled
[11:34:56] [PASSED] test_find_out_of_order
[11:35:01] [PASSED] test_find_gap
[11:35:01] [PASSED] test_find_race
[11:35:01] [PASSED] test_signal_forward
[11:35:01] [PASSED] test_signal_backward
[11:35:01] [PASSED] test_wait_forward
[11:35:01] [PASSED] test_wait_backward
[11:35:01] [PASSED] test_wait_random
[11:35:01] =============== [PASSED] dma-buf-fence-chain ===============
[11:35:01] ============ dma-buf-fence-unwrap (10 subtests) ============
[11:35:01] [PASSED] test_sanitycheck
[11:35:01] [PASSED] test_unwrap_array
[11:35:01] [PASSED] test_unwrap_chain
[11:35:01] [PASSED] test_unwrap_chain_array
[11:35:01] [PASSED] test_unwrap_merge
[11:35:01] [PASSED] test_unwrap_merge_duplicate
[11:35:01] [PASSED] test_unwrap_merge_seqno
[11:35:01] [PASSED] test_unwrap_merge_order
[11:35:01] [PASSED] test_unwrap_merge_complex
[11:35:01] [PASSED] test_unwrap_merge_complex_seqno
[11:35:01] ============== [PASSED] dma-buf-fence-unwrap ===============
[11:35:01] ================ dma-buf-resv (5 subtests) =================
[11:35:01] [PASSED] test_sanitycheck
[11:35:01] ===================== test_signaling  ======================
[11:35:01] [PASSED] kernel
[11:35:01] [PASSED] write
[11:35:01] [PASSED] read
[11:35:01] [PASSED] bookkeep
[11:35:01] ================= [PASSED] test_signaling ==================
[11:35:01] ====================== test_for_each  ======================
[11:35:01] [PASSED] kernel
[11:35:01] [PASSED] write
[11:35:01] [PASSED] read
[11:35:01] [PASSED] bookkeep
[11:35:01] ================== [PASSED] test_for_each ==================
[11:35:01] ================= test_for_each_unlocked  ==================
[11:35:01] [PASSED] kernel
[11:35:01] [PASSED] write
[11:35:01] [PASSED] read
[11:35:01] [PASSED] bookkeep
[11:35:01] ============= [PASSED] test_for_each_unlocked ==============
[11:35:01] ===================== test_get_fences  =====================
[11:35:01] [PASSED] kernel
[11:35:01] [PASSED] write
[11:35:01] [PASSED] read
[11:35:01] [PASSED] bookkeep
[11:35:01] ================= [PASSED] test_get_fences =================
[11:35:01] ================== [PASSED] dma-buf-resv ===================
[11:35:01] ============================================================
[11:35:01] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[11:35:01] Elapsed time: 15.900s total, 1.857s configuring, 8.722s building, 5.278s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe/ggtt: fix stale GGTT mappings on unmap (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4845 bytes --]

== Series Details ==

Series: drm/xe/ggtt: fix stale GGTT mappings on unmap (rev4)
URL   : https://patchwork.freedesktop.org/series/172559/
State : success

== Summary ==

CI Bug Log - changes from xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3_BAT -> xe-pw-172559v4_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 13)
------------------------------

  Additional (1): bat-bmg-2 

Known issues
------------

  Here are the changes found in xe-pw-172559v4_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@write:
    - bat-bmg-2:          NOTRUN -> [SKIP][1] ([Intel XE#2134]) +4 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/bat-bmg-2/igt@fbdev@write.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-bmg-2:          NOTRUN -> [SKIP][2] ([Intel XE#2233])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/bat-bmg-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
    - bat-bmg-2:          NOTRUN -> [SKIP][3] ([Intel XE#2489] / [Intel XE#3419]) +13 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/bat-bmg-2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html

  * igt@kms_flip@basic-flip-vs-modeset:
    - bat-bmg-2:          NOTRUN -> [SKIP][4] ([Intel XE#2482]) +3 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/bat-bmg-2/igt@kms_flip@basic-flip-vs-modeset.html

  * igt@kms_frontbuffer_tracking@basic:
    - bat-bmg-2:          NOTRUN -> [SKIP][5] ([Intel XE#2434] / [Intel XE#2548] / [Intel XE#6314])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/bat-bmg-2/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - bat-bmg-2:          NOTRUN -> [SKIP][6] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/bat-bmg-2/igt@kms_psr@psr-sprite-plane-onoff.html

  * igt@xe_exec_multi_queue@priority:
    - bat-bmg-2:          NOTRUN -> [SKIP][7] ([Intel XE#8364]) +13 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/bat-bmg-2/igt@xe_exec_multi_queue@priority.html

  * igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
    - bat-bmg-2:          NOTRUN -> [SKIP][8] ([Intel XE#2229])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-bmg-2:          NOTRUN -> [SKIP][9] ([Intel XE#1420] / [Intel XE#7590])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/bat-bmg-2/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelp:
    - bat-bmg-2:          NOTRUN -> [SKIP][10] ([Intel XE#2245] / [Intel XE#7590])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/bat-bmg-2/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pat@pat-index-xelpg:
    - bat-bmg-2:          NOTRUN -> [SKIP][11] ([Intel XE#2236] / [Intel XE#7590])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/bat-bmg-2/igt@xe_pat@pat-index-xelpg.html

  
  [Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2434]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2434
  [Intel XE#2482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2482
  [Intel XE#2489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2489
  [Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#3419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3419
  [Intel XE#6314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6314
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364


Build changes
-------------

  * Linux: xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3 -> xe-pw-172559v4

  IGT_9075: 9075
  xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3: 65c21c0124ae9521c7719c330d56bb9d33b2efc3
  xe-pw-172559v4: 172559v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/index.html

[-- Attachment #2: Type: text/html, Size: 5757 bytes --]

✗ Xe.CI.FULL: failure for drm/xe/ggtt: fix stale GGTT mappings on unmap (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 28296 bytes --]

== Series Details ==

Series: drm/xe/ggtt: fix stale GGTT mappings on unmap (rev4)
URL   : https://patchwork.freedesktop.org/series/172559/
State : failure

== Summary ==

CI Bug Log - changes from xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3_FULL -> xe-pw-172559v4_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-172559v4_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-172559v4_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-172559v4_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_sequence@get-idle:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][1] +1 other test incomplete
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-4/igt@kms_sequence@get-idle.html

  
Known issues
------------

  Here are the changes found in xe-pw-172559v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@x-tiled-16bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][2] ([Intel XE#2327])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#1124]) +7 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#7679])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html

  * igt@kms_bw@linear-tiling-2-displays-target-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#367])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_bw@linear-tiling-2-displays-target-3840x2160p.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#3432]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2887]) +6 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs.html

  * igt@kms_cdclk@mode-transition:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2724] / [Intel XE#7449])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium_color@ctm-red-to-blue:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2325] / [Intel XE#7358])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@kms_chamelium_color@ctm-red-to-blue.html

  * igt@kms_chamelium_color_pipeline@plane-lut3d-green-only:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#7358]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_chamelium_color_pipeline@plane-lut3d-green-only.html

  * igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2252]) +4 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html

  * igt@kms_content_protection@mei-interface:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#7642])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@suspend-resume:
    - shard-bmg:          NOTRUN -> [FAIL][13] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@kms_content_protection@suspend-resume.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          NOTRUN -> [FAIL][14] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-offscreen-32x32:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2320]) +2 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_cursor_crc@cursor-offscreen-32x32.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2286] / [Intel XE#6035])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dsc@dsc-fractional-bpp-bigjoiner:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#8265]) +2 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_dsc@dsc-fractional-bpp-bigjoiner.html

  * igt@kms_feature_discovery@dsc:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#8586])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_feature_discovery@dsc.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [PASS][19] -> [FAIL][20] ([Intel XE#301])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-lnl:          [PASS][21] -> [FAIL][22] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#7178] / [Intel XE#7349])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#7061] / [Intel XE#7356])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#4141]) +10 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-rgb565-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2311]) +33 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-rgb565-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2313]) +38 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-abgr161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#7061])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_frontbuffer_tracking@psrhdr-abgr161616f-draw-mmap-wc.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#7308])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#4090] / [Intel XE#7443])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-4/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_pipe_stress@stress-xrgb8888-ytiled:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#4329] / [Intel XE#6912] / [Intel XE#7375])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#8303]) +1 other test skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#7283])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html

  * igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888.html

  * igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#8396]) +1 other test skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420.html

  * igt@kms_pm_dc@dc5-pageflip-negative:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#6927])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_pm_dc@dc5-pageflip-negative.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#1489]) +3 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2387] / [Intel XE#7429])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@psr2-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2234] / [Intel XE#2850]) +8 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_psr@psr2-suspend.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#3904] / [Intel XE#7342])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#1435] / [Intel XE#8695])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@kms_sharpness_filter@invalid-filter-with-scaler:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#6503])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@kms_sharpness_filter@invalid-filter-with-scaler.html

  * igt@xe_configfs@ctx-restore-mid-bb-invalid:
    - shard-bmg:          [PASS][44] -> [ABORT][45] ([Intel XE#8007]) +2 other tests abort
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3/shard-bmg-4/igt@xe_configfs@ctx-restore-mid-bb-invalid.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@xe_configfs@ctx-restore-mid-bb-invalid.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [PASS][46] -> [INCOMPLETE][47] ([Intel XE#6321] / [Intel XE#8355])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3/shard-bmg-8/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-9/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_evict@evict-small-multi-queue-cm:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#8370]) +1 other test skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@xe_evict@evict-small-multi-queue-cm.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#2322] / [Intel XE#7372]) +3 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-rebind.html

  * igt@xe_exec_fault_mode@twice-multi-queue-imm:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#8374]) +9 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@xe_exec_fault_mode@twice-multi-queue-imm.html

  * igt@xe_exec_multi_queue@two-queues-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#8364]) +19 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@xe_exec_multi_queue@two-queues-userptr.html

  * igt@xe_exec_reset@gt-stress-reset-pm-transition:
    - shard-bmg:          [PASS][52] -> [DMESG-WARN][53] ([Intel XE#8649])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3/shard-bmg-7/igt@xe_exec_reset@gt-stress-reset-pm-transition.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-4/igt@xe_exec_reset@gt-stress-reset-pm-transition.html

  * igt@xe_exec_reset@multi-queue-gt-reset:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#8369])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@xe_exec_reset@multi-queue-gt-reset.html

  * igt@xe_exec_system_allocator@process-many-stride-mmap-huge-nomemset:
    - shard-bmg:          [PASS][55] -> [FAIL][56] ([Intel XE#8528])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3/shard-bmg-3/igt@xe_exec_system_allocator@process-many-stride-mmap-huge-nomemset.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-9/igt@xe_exec_system_allocator@process-many-stride-mmap-huge-nomemset.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#8378]) +2 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-mixed-rebind.html

  * igt@xe_multigpu_svm@mgpu-atomic-op-basic:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#6964]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@xe_multigpu_svm@mgpu-atomic-op-basic.html

  * igt@xe_page_reclaim@boundary-split:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#7793])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@xe_page_reclaim@boundary-split.html

  * igt@xe_pat@pat-index-xehpc:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#1420] / [Intel XE#7590])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pm@d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2284] / [Intel XE#7370])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@xe_pm@d3cold-basic-exec.html

  * igt@xe_pxp@pxp-stale-queue-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#4733] / [Intel XE#7417]) +1 other test skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@xe_pxp@pxp-stale-queue-post-suspend.html

  * igt@xe_query@multigpu-query-uc-fw-version-huc:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#944]) +1 other test skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@xe_query@multigpu-query-uc-fw-version-huc.html

  * igt@xe_sriov_scheduling@default-enabled-fair-scheduling@numvfs-random-gt0-rcs0:
    - shard-bmg:          NOTRUN -> [FAIL][64] ([Intel XE#7992]) +1 other test fail
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@xe_sriov_scheduling@default-enabled-fair-scheduling@numvfs-random-gt0-rcs0.html

  * igt@xe_sriov_scheduling@default-enabled-fair-scheduling@numvfs-random-gt1-vcs0:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#8617])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@xe_sriov_scheduling@default-enabled-fair-scheduling@numvfs-random-gt1-vcs0.html

  * igt@xe_survivability@runtime-survivability:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][66] ([Intel XE#8966])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@xe_survivability@runtime-survivability.html

  
#### Possible fixes ####

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [INCOMPLETE][67] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][68] +1 other test pass
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_flip@2x-absolute-wf_vblank@bc-dp2-hdmi-a3:
    - shard-bmg:          [INCOMPLETE][69] ([Intel XE#8155]) -> [PASS][70] +1 other test pass
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3/shard-bmg-9/igt@kms_flip@2x-absolute-wf_vblank@bc-dp2-hdmi-a3.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-1/igt@kms_flip@2x-absolute-wf_vblank@bc-dp2-hdmi-a3.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early:
    - shard-bmg:          [ABORT][71] ([Intel XE#8007]) -> [PASS][72] +1 other test pass
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3/shard-bmg-3/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-10/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html

  
#### Warnings ####

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-lnl:          [SKIP][73] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935]) -> [SKIP][74] ([Intel XE#309] / [Intel XE#7343])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-lnl-5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [SKIP][75] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][76] ([Intel XE#1729] / [Intel XE#7424])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html

  * igt@xe_wedged@wedged-at-any-timeout:
    - shard-bmg:          [DMESG-WARN][77] ([Intel XE#8963]) -> [ABORT][78] ([Intel XE#8007] / [Intel XE#8963])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3/shard-bmg-6/igt@xe_wedged@wedged-at-any-timeout.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/shard-bmg-3/igt@xe_wedged@wedged-at-any-timeout.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
  [Intel XE#6927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6927
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7375
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
  [Intel XE#7443]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7443
  [Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
  [Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8155]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8155
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8528]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8528
  [Intel XE#8586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8586
  [Intel XE#8617]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8617
  [Intel XE#8649]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8649
  [Intel XE#8695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8695
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#8966]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8966
  [Intel XE#9003]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9003
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3 -> xe-pw-172559v4

  IGT_9075: 9075
  xe-5646-65c21c0124ae9521c7719c330d56bb9d33b2efc3: 65c21c0124ae9521c7719c330d56bb9d33b2efc3
  xe-pw-172559v4: 172559v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172559v4/index.html

[-- Attachment #2: Type: text/html, Size: 30796 bytes --]

[PATCH 0/3] drm/xe/ggtt: fix stale GGTT mappings on unmap

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

This series addresses two related GGTT teardown issues on multi-queue
platforms:

First issue: unmapped GGTT ranges resolve to the scratch page. Because
scratch is a valid PTE, a re-walk of a freed range never faults, so any
stale TLB translation left behind is masked - the freed range silently
reads scratch instead of surfacing the problem. On multi-queue platforms
Patch 1 does not allocate the scratch page at all, so the whole GGTT -
initial clear and unmap alike - holds PTE=0 and faults consistently for
the entire boot. Other platforms keep scratch and are unchanged.

Second issue: engines cache GGTT translations in their own TLBs. A
full context restore on engine switch normally flushes them, but on
multi-queue GuC does a lite-restore on secondary queue append and
skips the full context restore, so those engine TLB invalidations are
missed. The existing GGTT invalidation (xe_tlb_inval_ggtt()) does not
reach the engine-side TLBs either, so after an unmap an engine can
keep hitting the stale translation and read the old page. Patches 2
and 3 add and use a full (INVAL_FULL, intra-VF) invalidation to drain
the engine TLBs on unmap.

Patch 1: drm/xe/ggtt: fault on unmapped GGTT for multi-queue platforms
    Skip allocating the GGTT scratch page on multi-queue platforms so
    cleared and unmapped ranges hold PTE=0. A missed engine TLB
    invalidation (see above) then faults instead of silently landing
    on scratch.

Patch 2: drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT
         invalidation helper
    xe_tlb_inval_ggtt_full() + GuC backend flush engine TLBs across all
    engines within the requesting VF.

Patch 3: drm/xe/ggtt: invalidate engine GGTT TLBs for multi-queue GTs
    Issue the invalidation on the unmap path, gated on the GT having any
    multi-queue engine class, for both the primary and media GTs.
    Draining the engine TLB on teardown guarantees a recycled range's
    next occupant cannot hit the predecessor's cached translation.

v2:
    - Add xe_gt_has_multi_queue() helper and gate on it (Niranjana).
    - Add xe_tlb_inval_issue_op_wait() and refactor the GGTT
      invalidation entry points onto it (Niranjana).
    - Other nits.

v3:
    - Patch 1: drop the scratch page entirely on multi-queue platforms
      instead of toggling scratch vs faulting at unmap, so the behaviour
      is consistent for the whole boot (Matt Brost).
    - Patch 2: avoid the CT-state TOCTOU (Matt Brost).
    - Patch 3: invalidate both the primary and media GTs, similar to
      xe_ggtt_invalidate() (Matt Brost).

v4:
    - Patch 2: propagate real send errors instead of masking them as
      -ECANCELED (Sashiko).

v5:
    - Patch 1: document the rationale - GuC lite-restore on secondary
      queue append skips the full context restore, so engine TLB
      invalidations are missed (Matt Roper, Matt Brost).
    - Patch 2: handle -ENOTRECOVERABLE (wedged) alongside -ENODEV, and
      drop the redundant -ECANCELED check (Matt Brost, Niranjana).
    - Patch 3: guard NULL gt for parity with ggtt_invalidate_gt_tlb()
      and explain the multi-queue-only engine flush (Niranjana).

Tangudu Tilak Tirumalesh (3):
  drm/xe/ggtt: fault on unmapped GGTT for multi-queue platforms
  drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation
    helper
  drm/xe/ggtt: invalidate engine GGTT TLBs for multi-queue GTs

 drivers/gpu/drm/xe/xe_ggtt.c            | 74 +++++++++++++++++++------
 drivers/gpu/drm/xe/xe_gt.h              | 13 +++++
 drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 29 ++++++++++
 drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 ++++++++++++--
 drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
 drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++
 6 files changed, 147 insertions(+), 22 deletions(-)

-- 
2.46.0

[PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Add xe_tlb_inval_ggtt_full() and its GuC backend
send_tlb_inval_ggtt_full() for full engine TLB invalidation
within the requesting VF across all engines.

v2:
- Refactor with new helper xe_tlb_inval_issue_op_wait() and address
  nits (Niranjana)
v3:
- Avoid TOCTOU issue around CT state (Matt Brost)
v4:
- Propagate real send errors instead of masking as -ECANCELED (Sashiko)
v5:
- Handle -ENOTRECOVERABLE (wedged), drop redundant -ECANCELED
  (Matt Brost, Niranjana)

Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 29 +++++++++++++++++
 drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 +++++++++++++++++++++----
 drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
 drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++++
 4 files changed, 76 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
index 046d0655122f..111fef781b2a 100644
--- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
@@ -98,6 +98,33 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
 	return -ECANCELED;
 }
 
+/*
+ * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across all engines
+ * within the VF.
+ */
+static int send_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval, u32 seqno)
+{
+	struct xe_guc *guc = tlb_inval->private;
+	u32 action[] = {
+		XE_GUC_ACTION_TLB_INVALIDATION,
+		seqno,
+		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
+	};
+	int ret;
+
+	ret = send_tlb_inval(guc, action, ARRAY_SIZE(action));
+
+	/*
+	 * send_tlb_inval() may return -ENODEV (CT disabled at cold boot) or
+	 * -ENOTRECOVERABLE (device wedged); nothing runs on the engines in
+	 * either case, so treat as cancelled.
+	 */
+	if (ret == -ENODEV || ret == -ENOTRECOVERABLE)
+		return -ECANCELED;
+
+	return ret;
+}
+
 static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
 			     u64 gpu_addr)
 {
@@ -346,6 +373,7 @@ static long tlb_inval_timeout_delay(struct xe_tlb_inval *tlb_inval)
 static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
 	.all = send_tlb_inval_all,
 	.ggtt = send_tlb_inval_ggtt,
+	.ggtt_full = send_tlb_inval_ggtt_full,
 	.ppgtt = send_tlb_inval_asid_ppgtt,
 	.initialized = tlb_inval_initialized,
 	.flush = tlb_inval_flush,
@@ -354,6 +382,7 @@ static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
 
 static const struct xe_tlb_inval_ops guc_tlb_inval_ctx_ops = {
 	.ggtt = send_tlb_inval_ggtt,
+	.ggtt_full = send_tlb_inval_ggtt_full,
 	.all = send_tlb_inval_all,
 	.ppgtt = send_tlb_inval_ctx_ppgtt,
 	.initialized = tlb_inval_initialized,
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index bbd21d393062..7c3bf32d9258 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -301,26 +301,56 @@ int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
 }
 
 /**
- * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
+ * xe_tlb_inval_issue_op_wait() - Issue a TLB invalidation and wait
  * @tlb_inval: TLB invalidation client
- *
- * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
- * caller can use the invalidation fence to wait for completion.
+ * @op: backend invalidation hook to issue
  *
  * Return: 0 on success, negative error code on error
  */
-int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
+static int xe_tlb_inval_issue_op_wait(struct xe_tlb_inval *tlb_inval,
+				      int (*op)(struct xe_tlb_inval *tlb_inval, u32 seqno))
 {
 	struct xe_tlb_inval_fence fence, *fence_ptr = &fence;
 	int ret;
 
 	xe_tlb_inval_fence_init(tlb_inval, fence_ptr, true);
-	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, tlb_inval->ops->ggtt);
+	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, op);
 	xe_tlb_inval_fence_wait(fence_ptr);
 
 	return ret;
 }
 
+/**
+ * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
+ * @tlb_inval: TLB invalidation client
+ *
+ * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
+ * caller can use the invalidation fence to wait for completion.
+ *
+ * Return: 0 on success, negative error code on error
+ */
+int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
+{
+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt);
+}
+
+/**
+ * xe_tlb_inval_ggtt_full() - Full engine TLB invalidation within a VF
+ * @tlb_inval: TLB invalidation client
+ *
+ * Issue INVAL_FULL (intra vf) to flush engine TLBs across all engines
+ * within the requesting VF.
+ *
+ * Return: 0 on success, negative error code on error
+ */
+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval)
+{
+	if (!tlb_inval->ops->ggtt_full)
+		return -EOPNOTSUPP;
+
+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt_full);
+}
+
 /**
  * xe_tlb_inval_range() - Issue a TLB invalidation for an address range
  * @tlb_inval: TLB invalidation client
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
index a76b7823a5f2..665072b4b81d 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
@@ -20,6 +20,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
 int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
 		     struct xe_tlb_inval_fence *fence);
 int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval);
 void xe_tlb_inval_vm(struct xe_tlb_inval *tlb_inval, struct xe_vm *vm);
 int xe_tlb_inval_range(struct xe_tlb_inval *tlb_inval,
 		       struct xe_tlb_inval_fence *fence,
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
index 3d1797d186fd..d77be1aedc91 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
@@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
 	 */
 	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
 
+	/**
+	 * @ggtt_full: Full engine TLB invalidation within a VF
+	 * @tlb_inval: TLB invalidation client
+	 * @seqno: Seqno of TLB invalidation
+	 *
+	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
+	 * failure
+	 */
+	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);
+
 	/**
 	 * @ppgtt: Invalidate per-process translation TLBs
 	 * @tlb_inval: TLB invalidation client
-- 
2.46.0

Re: [PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[Niranjana Vishwanathapura]

On Thu, Aug 27, 2026 at 01:50:10PM +0530, tilak.tirumalesh.tangudu@intel.com wrote:
>From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>
>Add xe_tlb_inval_ggtt_full() and its GuC backend
>send_tlb_inval_ggtt_full() for full engine TLB invalidation
>within the requesting VF across all engines.
>
>v2:
>- Refactor with new helper xe_tlb_inval_issue_op_wait() and address
>  nits (Niranjana)
>v3:
>- Avoid TOCTOU issue around CT state (Matt Brost)
>v4:
>- Propagate real send errors instead of masking as -ECANCELED (Sashiko)
>v5:
>- Handle -ENOTRECOVERABLE (wedged), drop redundant -ECANCELED
>  (Matt Brost, Niranjana)
>
>Assisted-by: Claude:claude-opus-4-8
>Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>---
> drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 29 +++++++++++++++++
> drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 +++++++++++++++++++++----
> drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
> drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++++
> 4 files changed, 76 insertions(+), 6 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
>index 046d0655122f..111fef781b2a 100644
>--- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
>+++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
>@@ -98,6 +98,33 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
> 	return -ECANCELED;
> }
>
>+/*
>+ * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across all engines
>+ * within the VF.
>+ */
>+static int send_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval, u32 seqno)
>+{
>+	struct xe_guc *guc = tlb_inval->private;
>+	u32 action[] = {
>+		XE_GUC_ACTION_TLB_INVALIDATION,
>+		seqno,
>+		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
>+	};
>+	int ret;
>+
>+	ret = send_tlb_inval(guc, action, ARRAY_SIZE(action));
>+
>+	/*
>+	 * send_tlb_inval() may return -ENODEV (CT disabled at cold boot) or
>+	 * -ENOTRECOVERABLE (device wedged); nothing runs on the engines in
>+	 * either case, so treat as cancelled.
>+	 */
>+	if (ret == -ENODEV || ret == -ENOTRECOVERABLE)
>+		return -ECANCELED;

I am not sure about ENOTRECOVERABLE check here. Other invalidation
functions don't have it, and I am not sure if wedged is considered
mid-reset as the document for tlb functions says for ECANCELED.
I saw Matt mentioned that ENOTRECOVERABLE check might get a revert?
I will leave it for Matt to review this part.

Other than that, patch looks good.
Acked-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>


>+
>+	return ret;
>+}
>+
> static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
> 			     u64 gpu_addr)
> {
>@@ -346,6 +373,7 @@ static long tlb_inval_timeout_delay(struct xe_tlb_inval *tlb_inval)
> static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
> 	.all = send_tlb_inval_all,
> 	.ggtt = send_tlb_inval_ggtt,
>+	.ggtt_full = send_tlb_inval_ggtt_full,
> 	.ppgtt = send_tlb_inval_asid_ppgtt,
> 	.initialized = tlb_inval_initialized,
> 	.flush = tlb_inval_flush,
>@@ -354,6 +382,7 @@ static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
>
> static const struct xe_tlb_inval_ops guc_tlb_inval_ctx_ops = {
> 	.ggtt = send_tlb_inval_ggtt,
>+	.ggtt_full = send_tlb_inval_ggtt_full,
> 	.all = send_tlb_inval_all,
> 	.ppgtt = send_tlb_inval_ctx_ppgtt,
> 	.initialized = tlb_inval_initialized,
>diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
>index bbd21d393062..7c3bf32d9258 100644
>--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
>+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
>@@ -301,26 +301,56 @@ int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> }
>
> /**
>- * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
>+ * xe_tlb_inval_issue_op_wait() - Issue a TLB invalidation and wait
>  * @tlb_inval: TLB invalidation client
>- *
>- * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
>- * caller can use the invalidation fence to wait for completion.
>+ * @op: backend invalidation hook to issue
>  *
>  * Return: 0 on success, negative error code on error
>  */
>-int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
>+static int xe_tlb_inval_issue_op_wait(struct xe_tlb_inval *tlb_inval,
>+				      int (*op)(struct xe_tlb_inval *tlb_inval, u32 seqno))
> {
> 	struct xe_tlb_inval_fence fence, *fence_ptr = &fence;
> 	int ret;
>
> 	xe_tlb_inval_fence_init(tlb_inval, fence_ptr, true);
>-	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, tlb_inval->ops->ggtt);
>+	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, op);
> 	xe_tlb_inval_fence_wait(fence_ptr);
>
> 	return ret;
> }
>
>+/**
>+ * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
>+ * @tlb_inval: TLB invalidation client
>+ *
>+ * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
>+ * caller can use the invalidation fence to wait for completion.
>+ *
>+ * Return: 0 on success, negative error code on error
>+ */
>+int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
>+{
>+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt);
>+}
>+
>+/**
>+ * xe_tlb_inval_ggtt_full() - Full engine TLB invalidation within a VF
>+ * @tlb_inval: TLB invalidation client
>+ *
>+ * Issue INVAL_FULL (intra vf) to flush engine TLBs across all engines
>+ * within the requesting VF.
>+ *
>+ * Return: 0 on success, negative error code on error
>+ */
>+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval)
>+{
>+	if (!tlb_inval->ops->ggtt_full)
>+		return -EOPNOTSUPP;
>+
>+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt_full);
>+}
>+
> /**
>  * xe_tlb_inval_range() - Issue a TLB invalidation for an address range
>  * @tlb_inval: TLB invalidation client
>diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
>index a76b7823a5f2..665072b4b81d 100644
>--- a/drivers/gpu/drm/xe/xe_tlb_inval.h
>+++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
>@@ -20,6 +20,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
> int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> 		     struct xe_tlb_inval_fence *fence);
> int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
>+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval);
> void xe_tlb_inval_vm(struct xe_tlb_inval *tlb_inval, struct xe_vm *vm);
> int xe_tlb_inval_range(struct xe_tlb_inval *tlb_inval,
> 		       struct xe_tlb_inval_fence *fence,
>diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
>index 3d1797d186fd..d77be1aedc91 100644
>--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
>+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
>@@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
> 	 */
> 	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
>
>+	/**
>+	 * @ggtt_full: Full engine TLB invalidation within a VF
>+	 * @tlb_inval: TLB invalidation client
>+	 * @seqno: Seqno of TLB invalidation
>+	 *
>+	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
>+	 * failure
>+	 */
>+	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);
>+
> 	/**
> 	 * @ppgtt: Invalidate per-process translation TLBs
> 	 * @tlb_inval: TLB invalidation client
>-- 
>2.46.0
>

Re: [PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[Matthew Brost]

On Thu, Aug 27, 2026 at 09:58:56AM -0700, Niranjana Vishwanathapura wrote:
> On Thu, Aug 27, 2026 at 01:50:10PM +0530, tilak.tirumalesh.tangudu@intel.com wrote:
> > From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> > 
> > Add xe_tlb_inval_ggtt_full() and its GuC backend
> > send_tlb_inval_ggtt_full() for full engine TLB invalidation
> > within the requesting VF across all engines.
> > 
> > v2:
> > - Refactor with new helper xe_tlb_inval_issue_op_wait() and address
> >  nits (Niranjana)
> > v3:
> > - Avoid TOCTOU issue around CT state (Matt Brost)
> > v4:
> > - Propagate real send errors instead of masking as -ECANCELED (Sashiko)
> > v5:
> > - Handle -ENOTRECOVERABLE (wedged), drop redundant -ECANCELED
> >  (Matt Brost, Niranjana)
> > 
> > Assisted-by: Claude:claude-opus-4-8
> > Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 29 +++++++++++++++++
> > drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 +++++++++++++++++++++----
> > drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
> > drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++++
> > 4 files changed, 76 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > index 046d0655122f..111fef781b2a 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> > @@ -98,6 +98,33 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
> > 	return -ECANCELED;
> > }
> > 
> > +/*
> > + * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across all engines
> > + * within the VF.
> > + */
> > +static int send_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval, u32 seqno)
> > +{
> > +	struct xe_guc *guc = tlb_inval->private;
> > +	u32 action[] = {
> > +		XE_GUC_ACTION_TLB_INVALIDATION,
> > +		seqno,
> > +		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
> > +	};
> > +	int ret;
> > +
> > +	ret = send_tlb_inval(guc, action, ARRAY_SIZE(action));
> > +
> > +	/*
> > +	 * send_tlb_inval() may return -ENODEV (CT disabled at cold boot) or
> > +	 * -ENOTRECOVERABLE (device wedged); nothing runs on the engines in
> > +	 * either case, so treat as cancelled.
> > +	 */
> > +	if (ret == -ENODEV || ret == -ENOTRECOVERABLE)
> > +		return -ECANCELED;
> 
> I am not sure about ENOTRECOVERABLE check here. Other invalidation
> functions don't have it, and I am not sure if wedged is considered

I think that an oversight that when the ENOTRECOVERABLE wedge changed
merged, this code didn't get updated.

> mid-reset as the document for tlb functions says for ECANCELED.
> I saw Matt mentioned that ENOTRECOVERABLE check might get a revert?

I think it will revert sooner or later, but it is in current code, so
at moment I believe is correct.

Let's just keep on Raag's patch that will revert this and if it merges,
we adjust this code.

With that:
Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> I will leave it for Matt to review this part.
> 
> Other than that, patch looks good.
> Acked-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
> 
> 
> > +
> > +	return ret;
> > +}
> > +
> > static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
> > 			     u64 gpu_addr)
> > {
> > @@ -346,6 +373,7 @@ static long tlb_inval_timeout_delay(struct xe_tlb_inval *tlb_inval)
> > static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
> > 	.all = send_tlb_inval_all,
> > 	.ggtt = send_tlb_inval_ggtt,
> > +	.ggtt_full = send_tlb_inval_ggtt_full,
> > 	.ppgtt = send_tlb_inval_asid_ppgtt,
> > 	.initialized = tlb_inval_initialized,
> > 	.flush = tlb_inval_flush,
> > @@ -354,6 +382,7 @@ static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
> > 
> > static const struct xe_tlb_inval_ops guc_tlb_inval_ctx_ops = {
> > 	.ggtt = send_tlb_inval_ggtt,
> > +	.ggtt_full = send_tlb_inval_ggtt_full,
> > 	.all = send_tlb_inval_all,
> > 	.ppgtt = send_tlb_inval_ctx_ppgtt,
> > 	.initialized = tlb_inval_initialized,
> > diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
> > index bbd21d393062..7c3bf32d9258 100644
> > --- a/drivers/gpu/drm/xe/xe_tlb_inval.c
> > +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
> > @@ -301,26 +301,56 @@ int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> > }
> > 
> > /**
> > - * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
> > + * xe_tlb_inval_issue_op_wait() - Issue a TLB invalidation and wait
> >  * @tlb_inval: TLB invalidation client
> > - *
> > - * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
> > - * caller can use the invalidation fence to wait for completion.
> > + * @op: backend invalidation hook to issue
> >  *
> >  * Return: 0 on success, negative error code on error
> >  */
> > -int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
> > +static int xe_tlb_inval_issue_op_wait(struct xe_tlb_inval *tlb_inval,
> > +				      int (*op)(struct xe_tlb_inval *tlb_inval, u32 seqno))
> > {
> > 	struct xe_tlb_inval_fence fence, *fence_ptr = &fence;
> > 	int ret;
> > 
> > 	xe_tlb_inval_fence_init(tlb_inval, fence_ptr, true);
> > -	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, tlb_inval->ops->ggtt);
> > +	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, op);
> > 	xe_tlb_inval_fence_wait(fence_ptr);
> > 
> > 	return ret;
> > }
> > 
> > +/**
> > + * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
> > + * @tlb_inval: TLB invalidation client
> > + *
> > + * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
> > + * caller can use the invalidation fence to wait for completion.
> > + *
> > + * Return: 0 on success, negative error code on error
> > + */
> > +int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
> > +{
> > +	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt);
> > +}
> > +
> > +/**
> > + * xe_tlb_inval_ggtt_full() - Full engine TLB invalidation within a VF
> > + * @tlb_inval: TLB invalidation client
> > + *
> > + * Issue INVAL_FULL (intra vf) to flush engine TLBs across all engines
> > + * within the requesting VF.
> > + *
> > + * Return: 0 on success, negative error code on error
> > + */
> > +int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval)
> > +{
> > +	if (!tlb_inval->ops->ggtt_full)
> > +		return -EOPNOTSUPP;
> > +
> > +	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt_full);
> > +}
> > +
> > /**
> >  * xe_tlb_inval_range() - Issue a TLB invalidation for an address range
> >  * @tlb_inval: TLB invalidation client
> > diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
> > index a76b7823a5f2..665072b4b81d 100644
> > --- a/drivers/gpu/drm/xe/xe_tlb_inval.h
> > +++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
> > @@ -20,6 +20,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
> > int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> > 		     struct xe_tlb_inval_fence *fence);
> > int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
> > +int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval);
> > void xe_tlb_inval_vm(struct xe_tlb_inval *tlb_inval, struct xe_vm *vm);
> > int xe_tlb_inval_range(struct xe_tlb_inval *tlb_inval,
> > 		       struct xe_tlb_inval_fence *fence,
> > diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > index 3d1797d186fd..d77be1aedc91 100644
> > --- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > +++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> > @@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
> > 	 */
> > 	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
> > 
> > +	/**
> > +	 * @ggtt_full: Full engine TLB invalidation within a VF
> > +	 * @tlb_inval: TLB invalidation client
> > +	 * @seqno: Seqno of TLB invalidation
> > +	 *
> > +	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
> > +	 * failure
> > +	 */
> > +	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);
> > +
> > 	/**
> > 	 * @ppgtt: Invalidate per-process translation TLBs
> > 	 * @tlb_inval: TLB invalidation client
> > -- 
> > 2.46.0
> > 

[PATCH 0/3] drm/xe/ggtt: fix stale GGTT mappings on unmap

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

This series addresses two related GGTT teardown issues on multi-queue
platforms:

First issue: unmapped GGTT ranges resolve to the scratch page. Because
scratch is a valid PTE, a re-walk of a freed range never faults, so any
stale TLB translation left behind is masked - the freed range silently
reads scratch instead of surfacing the problem. On multi-queue platforms
Patch 1 does not allocate the scratch page at all, so the whole GGTT -
initial clear and unmap alike - holds PTE=0 and faults consistently for
the entire boot. Other platforms keep scratch and are unchanged.

Second issue: engines cache GGTT translations in their own TLBs. The
existing GGTT invalidation (xe_tlb_inval_ggtt()) does not reach those
engine-side TLBs, so after an unmap an engine can keep hitting the stale
translation and read the old page. Patches 2 and 3 add and use a full
(INVAL_FULL, intra-VF) invalidation to drain the engine TLBs on unmap.

Patch 1: drm/xe/ggtt: fault on unmapped GGTT for multi-queue platforms
    Skip allocating the GGTT scratch page on multi-queue platforms so
    cleared and unmapped ranges hold PTE=0 and a stale-TLB access to a
    freed range faults instead of silently landing on scratch.

Patch 2: drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT
         invalidation helper
    xe_tlb_inval_ggtt_full() + GuC backend flush engine TLBs across all
    engines within the requesting VF.

Patch 3: drm/xe/ggtt: invalidate engine GGTT TLBs for multi-queue GTs
    Issue the invalidation on the unmap path, gated on the GT having any
    multi-queue engine class, for both the primary and media GTs.
    Draining the engine TLB on teardown guarantees a recycled range's
    next occupant cannot hit the predecessor's cached translation.

v2:
    - Add xe_gt_has_multi_queue() helper and gate on it (Niranjana).
    - Add xe_tlb_inval_issue_op_wait() and refactor the GGTT
      invalidation entry points onto it (Niranjana).
    - Other nits.

v3:
    - Patch 1: drop the scratch page entirely on multi-queue platforms
      instead of toggling scratch vs faulting at unmap, so the behaviour
      is consistent for the whole boot (Matt Brost).
    - Patch 2: avoid the CT-state TOCTOU; (Matt Brost).
    - Patch 3: invalidate both the primary and media GTs, similar to
      xe_ggtt_invalidate() (Matt Brost)

Tangudu Tilak Tirumalesh (3):
  drm/xe/ggtt: fault on unmapped GGTT for multi-queue platforms
  drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation
    helper
  drm/xe/ggtt: invalidate engine GGTT TLBs for multi-queue GTs

 drivers/gpu/drm/xe/xe_ggtt.c            | 68 +++++++++++++++++++------
 drivers/gpu/drm/xe/xe_gt.h              | 13 +++++
 drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 21 ++++++++
 drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 ++++++++++++---
 drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
 drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++
 6 files changed, 133 insertions(+), 22 deletions(-)

-- 
2.46.0

[PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Add xe_tlb_inval_ggtt_full() and its GuC backend
send_tlb_inval_ggtt_full() for full engine TLB invalidation
within the requesting VF across all engines.

v2:
- Refactor with new helper xe_tlb_inval_issue_op_wait() and address
  nits (Niranjana)
v3:
- Avoid TOCTOU issue around CT state (Matt Brost)

Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 21 +++++++++++++
 drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 +++++++++++++++++++++----
 drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
 drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++++
 4 files changed, 68 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
index 046d0655122f..c2f56be833a2 100644
--- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
@@ -98,6 +98,25 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
 	return -ECANCELED;
 }
 
+/*
+ * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across all engines
+ * within the VF.
+ */
+static int send_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval, u32 seqno)
+{
+	struct xe_guc *guc = tlb_inval->private;
+	u32 action[] = {
+		XE_GUC_ACTION_TLB_INVALIDATION,
+		seqno,
+		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
+	};
+
+	if (send_tlb_inval(guc, action, ARRAY_SIZE(action)))
+		return -ECANCELED;
+
+	return 0;
+}
+
 static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
 			     u64 gpu_addr)
 {
@@ -346,6 +365,7 @@ static long tlb_inval_timeout_delay(struct xe_tlb_inval *tlb_inval)
 static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
 	.all = send_tlb_inval_all,
 	.ggtt = send_tlb_inval_ggtt,
+	.ggtt_full = send_tlb_inval_ggtt_full,
 	.ppgtt = send_tlb_inval_asid_ppgtt,
 	.initialized = tlb_inval_initialized,
 	.flush = tlb_inval_flush,
@@ -354,6 +374,7 @@ static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
 
 static const struct xe_tlb_inval_ops guc_tlb_inval_ctx_ops = {
 	.ggtt = send_tlb_inval_ggtt,
+	.ggtt_full = send_tlb_inval_ggtt_full,
 	.all = send_tlb_inval_all,
 	.ppgtt = send_tlb_inval_ctx_ppgtt,
 	.initialized = tlb_inval_initialized,
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index bbd21d393062..7c3bf32d9258 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -301,26 +301,56 @@ int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
 }
 
 /**
- * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
+ * xe_tlb_inval_issue_op_wait() - Issue a TLB invalidation and wait
  * @tlb_inval: TLB invalidation client
- *
- * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
- * caller can use the invalidation fence to wait for completion.
+ * @op: backend invalidation hook to issue
  *
  * Return: 0 on success, negative error code on error
  */
-int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
+static int xe_tlb_inval_issue_op_wait(struct xe_tlb_inval *tlb_inval,
+				      int (*op)(struct xe_tlb_inval *tlb_inval, u32 seqno))
 {
 	struct xe_tlb_inval_fence fence, *fence_ptr = &fence;
 	int ret;
 
 	xe_tlb_inval_fence_init(tlb_inval, fence_ptr, true);
-	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, tlb_inval->ops->ggtt);
+	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, op);
 	xe_tlb_inval_fence_wait(fence_ptr);
 
 	return ret;
 }
 
+/**
+ * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
+ * @tlb_inval: TLB invalidation client
+ *
+ * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
+ * caller can use the invalidation fence to wait for completion.
+ *
+ * Return: 0 on success, negative error code on error
+ */
+int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
+{
+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt);
+}
+
+/**
+ * xe_tlb_inval_ggtt_full() - Full engine TLB invalidation within a VF
+ * @tlb_inval: TLB invalidation client
+ *
+ * Issue INVAL_FULL (intra vf) to flush engine TLBs across all engines
+ * within the requesting VF.
+ *
+ * Return: 0 on success, negative error code on error
+ */
+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval)
+{
+	if (!tlb_inval->ops->ggtt_full)
+		return -EOPNOTSUPP;
+
+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt_full);
+}
+
 /**
  * xe_tlb_inval_range() - Issue a TLB invalidation for an address range
  * @tlb_inval: TLB invalidation client
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
index a76b7823a5f2..665072b4b81d 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
@@ -20,6 +20,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
 int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
 		     struct xe_tlb_inval_fence *fence);
 int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval);
 void xe_tlb_inval_vm(struct xe_tlb_inval *tlb_inval, struct xe_vm *vm);
 int xe_tlb_inval_range(struct xe_tlb_inval *tlb_inval,
 		       struct xe_tlb_inval_fence *fence,
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
index 3d1797d186fd..d77be1aedc91 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
@@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
 	 */
 	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
 
+	/**
+	 * @ggtt_full: Full engine TLB invalidation within a VF
+	 * @tlb_inval: TLB invalidation client
+	 * @seqno: Seqno of TLB invalidation
+	 *
+	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
+	 * failure
+	 */
+	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);
+
 	/**
 	 * @ppgtt: Invalidate per-process translation TLBs
 	 * @tlb_inval: TLB invalidation client
-- 
2.46.0

Re: [PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] send_tlb_inval_ggtt_full() converts all transmission errors to -ECANCELED, which are silently ignored by the caller, causing TLB invalidation failures to be treated as success.
--

commit 1e4a83a630897165bf2a8c3138c9949149a7404b
Author: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

This commit introduces the xe_tlb_inval_ggtt_full() helper and its GuC
backend send_tlb_inval_ggtt_full(). It implements full engine TLB
invalidation within the requesting VF across all engines.

> diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> index 046d0655122f1..c2f56be833a29 100644
> --- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> +++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
[ ... ]
> @@ -98,6 +98,25 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
>  	return -ECANCELED;
>  }
>  
> +/*
> + * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across all engines
> + * within the VF.
> + */
> +static int send_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval, u32 seqno)
> +{
> +	struct xe_guc *guc = tlb_inval->private;
> +	u32 action[] = {
> +		XE_GUC_ACTION_TLB_INVALIDATION,
> +		seqno,
> +		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
> +	};
> +
> +	if (send_tlb_inval(guc, action, ARRAY_SIZE(action)))
> +		return -ECANCELED;

[Severity: High]
Does squashing all transmission errors from send_tlb_inval() into -ECANCELED
mask failures?

If send_tlb_inval() fails (e.g., returning -EBUSY when the CT buffer is full
under heavy load), this returns -ECANCELED. The pre-existing macro
xe_tlb_inval_issue() translates -ECANCELED into a synchronous success (0)
and signals the fence, hiding the failure from upper layers:

    __ret = op((__tlb_inval), (__fence)->seqno, ##args);
    ...
    __ret == -ECANCELED ? 0 : __ret;

This could cause the hardware to proceed with stale translations in the TLB,
potentially leading to memory corruption or use-after-free if the memory has
been reallocated.

> +
> +	return 0;
> +}
[ ... ]
> diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> index 3d1797d186fd7..d77be1aedc918 100644
> --- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> +++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
[ ... ]
> @@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
>  	 */
>  	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
>  
> +	/**
> +	 * @ggtt_full: Full engine TLB invalidation within a VF
> +	 * @tlb_inval: TLB invalidation client
> +	 * @seqno: Seqno of TLB invalidation
> +	 *
> +	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
> +	 * failure
> +	 */
> +	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);

[Severity: High]
Could we pass the actual error code back instead? The documentation here
specifies the contract expects "error on failure", but the implementation in
send_tlb_inval_ggtt_full() unconditionally returns -ECANCELED instead of the
real error from send_tlb_inval(), which violates this contract.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260826103156.3233208-1-tilak.tirumalesh.tangudu@intel.com?part=2

[PATCH 0/3] drm/xe/ggtt: fix stale GGTT mappings on unmap

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

This series addresses two related GGTT teardown issues on multi-
queue platforms:

First issue: the unmap path mapped freed ranges to the scratch page.
Because scratch is a valid PTE, a re-walk of a freed range never
faults, so any stale TLB translation left behind is masked - the freed
range silently reads scratch instead of surfacing the problem. On
multi-queue platforms Patch 1 writes PTE=0 on unmap instead; other
platforms keep scratch, so free-hole and init-time handling are
unchanged.

Second issue: engines cache GGTT translations in their own TLBs. The
existing GGTT invalidation (xe_tlb_inval_ggtt()) does not reach those
engine-side TLBs, so after an unmap an engine can keep hitting the
stale translation and read the old page. Patches 2 and 3 add and use a
FULL_INTRA_VF invalidation to drain the engine TLBs on unmap.

Patch 1: drm/xe/ggtt: stop mapping unmapped GGTT pages to scratch
    On multi-queue platforms write PTE=0 on unmap so a stale-TLB
    access to a freed range faults instead of silently landing on
    scratch.

Patch 2: drm/xe/tlb_inval: add FULL_INTRA_VF GGTT invalidation helper
    xe_tlb_inval_ggtt_full() + GuC backend flush engine TLBs across
    all engines in the requesting VF partition.

Patch 3: drm/xe/ggtt: invalidate engine GGTT TLBs for multi-queue GTs
    Issue the FULL_INTRA_VF invalidation on the unmap path, gated on
    the GT having any multi-queue engine class. Draining the engine
    TLB on teardown guarantees a recycled range's next occupant cannot
    hit the predecessor's cached translation.

v2: Add xe_gt_has_multi_queue() helper and refactor.
    Add xe_tlb_inval_issue_op_wait and refactor.
    Other knits.

Tangudu Tilak Tirumalesh (3):
  drm/xe/ggtt: stop mapping unmapped GGTT pages to scratch
  drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation
    helper
  drm/xe/ggtt: invalidate engine GGTT TLBs for multi-queue GTs

 drivers/gpu/drm/xe/xe_ggtt.c            | 70 ++++++++++++++++++++-----
 drivers/gpu/drm/xe/xe_gt.h              | 13 +++++
 drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 21 ++++++++
 drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 ++++++++++++---
 drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
 drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++
 6 files changed, 137 insertions(+), 20 deletions(-)

-- 
2.46.0

[PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Add xe_tlb_inval_ggtt_full() and its GuC backend
send_tlb_inval_ggtt_full() for full engine TLB invalidation
within the requesting VF across all engines.

v2: Refactor with new helper xe_tlb_inval_issue_op_wait()
    and other knits. -Niranjana

Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 21 +++++++++++++
 drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 +++++++++++++++++++++----
 drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
 drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++++
 4 files changed, 68 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
index 046d0655122f..08dc2ee4cbff 100644
--- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
@@ -98,6 +98,25 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
 	return -ECANCELED;
 }
 
+/*
+ * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across all engines
+ * within the VF.
+ */
+static int send_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval, u32 seqno)
+{
+	struct xe_guc *guc = tlb_inval->private;
+	u32 action[] = {
+		XE_GUC_ACTION_TLB_INVALIDATION,
+		seqno,
+		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
+	};
+
+	if (!xe_guc_ct_enabled(&guc->ct) || !guc->submission_state.enabled)
+		return -ECANCELED;
+
+	return send_tlb_inval(guc, action, ARRAY_SIZE(action));
+}
+
 static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
 			     u64 gpu_addr)
 {
@@ -346,6 +365,7 @@ static long tlb_inval_timeout_delay(struct xe_tlb_inval *tlb_inval)
 static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
 	.all = send_tlb_inval_all,
 	.ggtt = send_tlb_inval_ggtt,
+	.ggtt_full = send_tlb_inval_ggtt_full,
 	.ppgtt = send_tlb_inval_asid_ppgtt,
 	.initialized = tlb_inval_initialized,
 	.flush = tlb_inval_flush,
@@ -354,6 +374,7 @@ static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
 
 static const struct xe_tlb_inval_ops guc_tlb_inval_ctx_ops = {
 	.ggtt = send_tlb_inval_ggtt,
+	.ggtt_full = send_tlb_inval_ggtt_full,
 	.all = send_tlb_inval_all,
 	.ppgtt = send_tlb_inval_ctx_ppgtt,
 	.initialized = tlb_inval_initialized,
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index bbd21d393062..7c3bf32d9258 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -301,26 +301,56 @@ int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
 }
 
 /**
- * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
+ * xe_tlb_inval_issue_op_wait() - Issue a TLB invalidation and wait
  * @tlb_inval: TLB invalidation client
- *
- * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
- * caller can use the invalidation fence to wait for completion.
+ * @op: backend invalidation hook to issue
  *
  * Return: 0 on success, negative error code on error
  */
-int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
+static int xe_tlb_inval_issue_op_wait(struct xe_tlb_inval *tlb_inval,
+				      int (*op)(struct xe_tlb_inval *tlb_inval, u32 seqno))
 {
 	struct xe_tlb_inval_fence fence, *fence_ptr = &fence;
 	int ret;
 
 	xe_tlb_inval_fence_init(tlb_inval, fence_ptr, true);
-	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, tlb_inval->ops->ggtt);
+	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, op);
 	xe_tlb_inval_fence_wait(fence_ptr);
 
 	return ret;
 }
 
+/**
+ * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
+ * @tlb_inval: TLB invalidation client
+ *
+ * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
+ * caller can use the invalidation fence to wait for completion.
+ *
+ * Return: 0 on success, negative error code on error
+ */
+int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
+{
+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt);
+}
+
+/**
+ * xe_tlb_inval_ggtt_full() - Full engine TLB invalidation within a VF
+ * @tlb_inval: TLB invalidation client
+ *
+ * Issue INVAL_FULL (intra vf) to flush engine TLBs across all engines
+ * within the requesting VF.
+ *
+ * Return: 0 on success, negative error code on error
+ */
+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval)
+{
+	if (!tlb_inval->ops->ggtt_full)
+		return -EOPNOTSUPP;
+
+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt_full);
+}
+
 /**
  * xe_tlb_inval_range() - Issue a TLB invalidation for an address range
  * @tlb_inval: TLB invalidation client
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
index a76b7823a5f2..665072b4b81d 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
@@ -20,6 +20,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
 int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
 		     struct xe_tlb_inval_fence *fence);
 int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval);
 void xe_tlb_inval_vm(struct xe_tlb_inval *tlb_inval, struct xe_vm *vm);
 int xe_tlb_inval_range(struct xe_tlb_inval *tlb_inval,
 		       struct xe_tlb_inval_fence *fence,
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
index 3d1797d186fd..d77be1aedc91 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
@@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
 	 */
 	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
 
+	/**
+	 * @ggtt_full: Full engine TLB invalidation within a VF
+	 * @tlb_inval: TLB invalidation client
+	 * @seqno: Seqno of TLB invalidation
+	 *
+	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
+	 * failure
+	 */
+	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);
+
 	/**
 	 * @ppgtt: Invalidate per-process translation TLBs
 	 * @tlb_inval: TLB invalidation client
-- 
2.46.0

Re: [PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[Niranjana Vishwanathapura]

On Mon, Aug 24, 2026 at 10:04:57PM +0530, tilak.tirumalesh.tangudu@intel.com wrote:
>From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>
>Add xe_tlb_inval_ggtt_full() and its GuC backend
>send_tlb_inval_ggtt_full() for full engine TLB invalidation
>within the requesting VF across all engines.
>
>v2: Refactor with new helper xe_tlb_inval_issue_op_wait()
>    and other knits. -Niranjana
>
>Assisted-by: Claude:claude-opus-4-8
>Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>---
> drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 21 +++++++++++++
> drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 +++++++++++++++++++++----
> drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
> drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++++
> 4 files changed, 68 insertions(+), 6 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
>index 046d0655122f..08dc2ee4cbff 100644
>--- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
>+++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
>@@ -98,6 +98,25 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
> 	return -ECANCELED;
> }
>
>+/*
>+ * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across all engines
>+ * within the VF.
>+ */
>+static int send_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval, u32 seqno)
>+{
>+	struct xe_guc *guc = tlb_inval->private;
>+	u32 action[] = {
>+		XE_GUC_ACTION_TLB_INVALIDATION,
>+		seqno,
>+		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
>+	};
>+
>+	if (!xe_guc_ct_enabled(&guc->ct) || !guc->submission_state.enabled)
>+		return -ECANCELED;
>+
>+	return send_tlb_inval(guc, action, ARRAY_SIZE(action));
>+}
>+
> static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
> 			     u64 gpu_addr)
> {
>@@ -346,6 +365,7 @@ static long tlb_inval_timeout_delay(struct xe_tlb_inval *tlb_inval)
> static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
> 	.all = send_tlb_inval_all,
> 	.ggtt = send_tlb_inval_ggtt,
>+	.ggtt_full = send_tlb_inval_ggtt_full,
> 	.ppgtt = send_tlb_inval_asid_ppgtt,
> 	.initialized = tlb_inval_initialized,
> 	.flush = tlb_inval_flush,
>@@ -354,6 +374,7 @@ static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
>
> static const struct xe_tlb_inval_ops guc_tlb_inval_ctx_ops = {
> 	.ggtt = send_tlb_inval_ggtt,
>+	.ggtt_full = send_tlb_inval_ggtt_full,
> 	.all = send_tlb_inval_all,
> 	.ppgtt = send_tlb_inval_ctx_ppgtt,
> 	.initialized = tlb_inval_initialized,
>diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
>index bbd21d393062..7c3bf32d9258 100644
>--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
>+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
>@@ -301,26 +301,56 @@ int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> }
>
> /**
>- * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
>+ * xe_tlb_inval_issue_op_wait() - Issue a TLB invalidation and wait
>  * @tlb_inval: TLB invalidation client
>- *
>- * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
>- * caller can use the invalidation fence to wait for completion.
>+ * @op: backend invalidation hook to issue
>  *
>  * Return: 0 on success, negative error code on error
>  */

Kernel-doc not really required for static functions, general comment (or no comment)
would do.

Anycase, LGTM.
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

>-int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
>+static int xe_tlb_inval_issue_op_wait(struct xe_tlb_inval *tlb_inval,
>+				      int (*op)(struct xe_tlb_inval *tlb_inval, u32 seqno))
> {
> 	struct xe_tlb_inval_fence fence, *fence_ptr = &fence;
> 	int ret;
>
> 	xe_tlb_inval_fence_init(tlb_inval, fence_ptr, true);
>-	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, tlb_inval->ops->ggtt);
>+	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, op);
> 	xe_tlb_inval_fence_wait(fence_ptr);
>
> 	return ret;
> }
>
>+/**
>+ * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
>+ * @tlb_inval: TLB invalidation client
>+ *
>+ * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
>+ * caller can use the invalidation fence to wait for completion.
>+ *
>+ * Return: 0 on success, negative error code on error
>+ */
>+int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
>+{
>+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt);
>+}
>+
>+/**
>+ * xe_tlb_inval_ggtt_full() - Full engine TLB invalidation within a VF
>+ * @tlb_inval: TLB invalidation client
>+ *
>+ * Issue INVAL_FULL (intra vf) to flush engine TLBs across all engines
>+ * within the requesting VF.
>+ *
>+ * Return: 0 on success, negative error code on error
>+ */
>+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval)
>+{
>+	if (!tlb_inval->ops->ggtt_full)
>+		return -EOPNOTSUPP;
>+
>+	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt_full);
>+}
>+
> /**
>  * xe_tlb_inval_range() - Issue a TLB invalidation for an address range
>  * @tlb_inval: TLB invalidation client
>diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
>index a76b7823a5f2..665072b4b81d 100644
>--- a/drivers/gpu/drm/xe/xe_tlb_inval.h
>+++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
>@@ -20,6 +20,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
> int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
> 		     struct xe_tlb_inval_fence *fence);
> int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
>+int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval);
> void xe_tlb_inval_vm(struct xe_tlb_inval *tlb_inval, struct xe_vm *vm);
> int xe_tlb_inval_range(struct xe_tlb_inval *tlb_inval,
> 		       struct xe_tlb_inval_fence *fence,
>diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
>index 3d1797d186fd..d77be1aedc91 100644
>--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
>+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
>@@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
> 	 */
> 	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
>
>+	/**
>+	 * @ggtt_full: Full engine TLB invalidation within a VF
>+	 * @tlb_inval: TLB invalidation client
>+	 * @seqno: Seqno of TLB invalidation
>+	 *
>+	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
>+	 * failure
>+	 */
>+	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);
>+
> 	/**
> 	 * @ppgtt: Invalidate per-process translation TLBs
> 	 * @tlb_inval: TLB invalidation client
>-- 
>2.46.0
>

Re: [PATCH 2/3] drm/xe/tlb_inval: add xe_tlb_inval_ggtt_full() GGTT invalidation helper

[Matthew Brost]

On Mon, Aug 24, 2026 at 10:04:57PM +0530, tilak.tirumalesh.tangudu@intel.com wrote:
> From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> 
> Add xe_tlb_inval_ggtt_full() and its GuC backend
> send_tlb_inval_ggtt_full() for full engine TLB invalidation
> within the requesting VF across all engines.
> 
> v2: Refactor with new helper xe_tlb_inval_issue_op_wait()
>     and other knits. -Niranjana
> 
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_guc_tlb_inval.c   | 21 +++++++++++++
>  drivers/gpu/drm/xe/xe_tlb_inval.c       | 42 +++++++++++++++++++++----
>  drivers/gpu/drm/xe/xe_tlb_inval.h       |  1 +
>  drivers/gpu/drm/xe/xe_tlb_inval_types.h | 10 ++++++
>  4 files changed, 68 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> index 046d0655122f..08dc2ee4cbff 100644
> --- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> +++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
> @@ -98,6 +98,25 @@ static int send_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval, u32 seqno)
>  	return -ECANCELED;
>  }
>  
> +/*
> + * Emit INVAL_FULL (intra vf) to invalidate engine TLBs across all engines
> + * within the VF.
> + */
> +static int send_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval, u32 seqno)
> +{
> +	struct xe_guc *guc = tlb_inval->private;
> +	u32 action[] = {
> +		XE_GUC_ACTION_TLB_INVALIDATION,
> +		seqno,
> +		MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
> +	};
> +
> +	if (!xe_guc_ct_enabled(&guc->ct) || !guc->submission_state.enabled)

This is a TOCTOU issue. For example, the CT state can change immediately
after the check,

send_tlb_inval_ggtt() has the same problem and likely isn't 100% correct
either.

I'd prefer that we don't make this situation any worse.

Would something like this work?

ret = send_tlb_inval(guc, action, ARRAY_SIZE(action));
if (ret)
	return -ECANCELED;

This would allow the CT layer, under the appropriate lock, to determine
whether it is still alive. If the GuC CT is no longer live, we know that
nothing can be running on the engines, so returning -ECANCELED would
signal the fence appropriately.

Everything else LGTM.

Matt

> +		return -ECANCELED;
> +
> +	return send_tlb_inval(guc, action, ARRAY_SIZE(action));
> +}
> +
>  static int send_page_reclaim(struct xe_guc *guc, u32 seqno,
>  			     u64 gpu_addr)
>  {
> @@ -346,6 +365,7 @@ static long tlb_inval_timeout_delay(struct xe_tlb_inval *tlb_inval)
>  static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
>  	.all = send_tlb_inval_all,
>  	.ggtt = send_tlb_inval_ggtt,
> +	.ggtt_full = send_tlb_inval_ggtt_full,
>  	.ppgtt = send_tlb_inval_asid_ppgtt,
>  	.initialized = tlb_inval_initialized,
>  	.flush = tlb_inval_flush,
> @@ -354,6 +374,7 @@ static const struct xe_tlb_inval_ops guc_tlb_inval_asid_ops = {
>  
>  static const struct xe_tlb_inval_ops guc_tlb_inval_ctx_ops = {
>  	.ggtt = send_tlb_inval_ggtt,
> +	.ggtt_full = send_tlb_inval_ggtt_full,
>  	.all = send_tlb_inval_all,
>  	.ppgtt = send_tlb_inval_ctx_ppgtt,
>  	.initialized = tlb_inval_initialized,
> diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
> index bbd21d393062..7c3bf32d9258 100644
> --- a/drivers/gpu/drm/xe/xe_tlb_inval.c
> +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
> @@ -301,26 +301,56 @@ int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
>  }
>  
>  /**
> - * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
> + * xe_tlb_inval_issue_op_wait() - Issue a TLB invalidation and wait
>   * @tlb_inval: TLB invalidation client
> - *
> - * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
> - * caller can use the invalidation fence to wait for completion.
> + * @op: backend invalidation hook to issue
>   *
>   * Return: 0 on success, negative error code on error
>   */
> -int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
> +static int xe_tlb_inval_issue_op_wait(struct xe_tlb_inval *tlb_inval,
> +				      int (*op)(struct xe_tlb_inval *tlb_inval, u32 seqno))
>  {
>  	struct xe_tlb_inval_fence fence, *fence_ptr = &fence;
>  	int ret;
>  
>  	xe_tlb_inval_fence_init(tlb_inval, fence_ptr, true);
> -	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, tlb_inval->ops->ggtt);
> +	ret = xe_tlb_inval_issue(tlb_inval, fence_ptr, op);
>  	xe_tlb_inval_fence_wait(fence_ptr);
>  
>  	return ret;
>  }
>  
> +/**
> + * xe_tlb_inval_ggtt() - Issue a TLB invalidation for the GGTT
> + * @tlb_inval: TLB invalidation client
> + *
> + * Issue a TLB invalidation for the GGTT. Completion of TLB is asynchronous and
> + * caller can use the invalidation fence to wait for completion.
> + *
> + * Return: 0 on success, negative error code on error
> + */
> +int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval)
> +{
> +	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt);
> +}
> +
> +/**
> + * xe_tlb_inval_ggtt_full() - Full engine TLB invalidation within a VF
> + * @tlb_inval: TLB invalidation client
> + *
> + * Issue INVAL_FULL (intra vf) to flush engine TLBs across all engines
> + * within the requesting VF.
> + *
> + * Return: 0 on success, negative error code on error
> + */
> +int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval)
> +{
> +	if (!tlb_inval->ops->ggtt_full)
> +		return -EOPNOTSUPP;
> +
> +	return xe_tlb_inval_issue_op_wait(tlb_inval, tlb_inval->ops->ggtt_full);
> +}
> +
>  /**
>   * xe_tlb_inval_range() - Issue a TLB invalidation for an address range
>   * @tlb_inval: TLB invalidation client
> diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
> index a76b7823a5f2..665072b4b81d 100644
> --- a/drivers/gpu/drm/xe/xe_tlb_inval.h
> +++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
> @@ -20,6 +20,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
>  int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
>  		     struct xe_tlb_inval_fence *fence);
>  int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
> +int xe_tlb_inval_ggtt_full(struct xe_tlb_inval *tlb_inval);
>  void xe_tlb_inval_vm(struct xe_tlb_inval *tlb_inval, struct xe_vm *vm);
>  int xe_tlb_inval_range(struct xe_tlb_inval *tlb_inval,
>  		       struct xe_tlb_inval_fence *fence,
> diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> index 3d1797d186fd..d77be1aedc91 100644
> --- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> +++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> @@ -36,6 +36,16 @@ struct xe_tlb_inval_ops {
>  	 */
>  	int (*ggtt)(struct xe_tlb_inval *tlb_inval, u32 seqno);
>  
> +	/**
> +	 * @ggtt_full: Full engine TLB invalidation within a VF
> +	 * @tlb_inval: TLB invalidation client
> +	 * @seqno: Seqno of TLB invalidation
> +	 *
> +	 * Return 0 on success, -ECANCELED if backend is mid-reset, error on
> +	 * failure
> +	 */
> +	int (*ggtt_full)(struct xe_tlb_inval *tlb_inval, u32 seqno);
> +
>  	/**
>  	 * @ppgtt: Invalidate per-process translation TLBs
>  	 * @tlb_inval: TLB invalidation client
> -- 
> 2.46.0
>