From: Raag Jadav <raag.jadav@intel.com>
To: Badal Nilawar <badal.nilawar@intel.com>
Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
rodrigo.vivi@intel.com, daniele.ceraolospurio@intel.com,
riana.tauro@intel.com, mallesh.koujalagi@intel.com,
aravind.iddamsetty@intel.com, michal.wajdeczko@intel.com,
himal.prasad.ghimiray@intel.com, arvind.yadav@intel.com,
syed.abdul.muqthyar.ahmed@intel.com, nitin.r.gote@intel.com
Subject: Re: [PATCH v3 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting
Date: Wed, 9 Sep 2026 08:12:03 +0200 [thread overview]
Message-ID: <aqD4syBajVA2sZPy@black.igk.intel.com> (raw)
In-Reply-To: <ap_gdX1GeLLatl2H@black.igk.intel.com>
On Tue, Sep 08, 2026 at 12:16:27PM +0200, Raag Jadav wrote:
> On Sun, Sep 06, 2026 at 10:56:07PM +0530, Badal Nilawar wrote:
> > Retrieve error counter record required to build a CPER record when
> > one not provided by the caller.
> >
> > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_cper.c | 15 ++++++
> > drivers/gpu/drm/xe/xe_ras.c | 100 ++++++++++++++++++++++-------------
> > drivers/gpu/drm/xe/xe_ras.h | 3 ++
> > 3 files changed, 80 insertions(+), 38 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
> > index e8017e3ee3a0..f04a91223a43 100644
> > --- a/drivers/gpu/drm/xe/xe_cper.c
> > +++ b/drivers/gpu/drm/xe/xe_cper.c
> > @@ -9,6 +9,8 @@
> >
> > #include "xe_cper.h"
> > #include "xe_device.h"
> > +#include "xe_printk.h"
> > +#include "xe_ras.h"
> > #include "xe_ras_types.h"
> >
> > /**
> > @@ -26,6 +28,8 @@ void xe_emit_hardware_error_cper(struct pci_dev *pdev, int cper_sev, enum xe_sig
> > struct xe_ras_get_counter_response *response)
> > {
> > struct xe_device *xe = pdev_to_xe_device(pdev);
> > + struct xe_ras_get_counter_response local_resp = {};
> > + struct xe_ras_get_counter_response *counter_response = response;
> >
> > if (!xe)
> > return;
> > @@ -33,5 +37,16 @@ void xe_emit_hardware_error_cper(struct pci_dev *pdev, int cper_sev, enum xe_sig
> > if ((int)sigid >= INTEL_SIGID_GPU_XE_HARDWARE_START)
> > return;
> >
> > + if (!counter || !xe_ras_counter_is_valid(xe, counter))
>
> Why? Should we even be at this point without a valid counter?
ras_counter_is_valid() is already part of get_counter() and !counter
should be covered by IS_ERR_OR_NULL() in patch 1, which makes the entire
condition redundant.
> > + return;
> > +
> > + if (!counter_response) {
> > + counter_response = &local_resp;
> > + if (xe_ras_get_counter_response(xe, counter, counter_response)) {
>
> Dumb question, shouldn't the whole xe_emit_hardware_error_cper() be the
> consequence of get_counter() and not the other way around?
Thanks for the offline pointers. From what I understand this is diverging
from the original hw cper design and correct for whatever we have in place.
Raag
> > + xe_err(xe, "[RAS]: CPER: failed to get counter, skipping record\n");
> > + return;
> > + }
> > + }
> > +
> > /* TODO */
> > }
next prev parent reply other threads:[~2026-09-09 6:12 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-06 17:26 [PATCH v3 00/12] Add CPER logging support for CRI Badal Nilawar
2026-09-06 17:16 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev3) Patchwork
2026-09-06 17:18 ` ✓ CI.KUnit: success " Patchwork
2026-09-06 17:26 ` [PATCH v3 01/12] drm/xe/cper: Hardware error CPER reporting from xe_log Badal Nilawar
2026-09-06 17:21 ` sashiko-bot
2026-09-07 12:38 ` Michal Wajdeczko
2026-09-10 11:39 ` Nilawar, Badal
2026-09-08 10:12 ` Raag Jadav
2026-09-10 12:33 ` Nilawar, Badal
2026-09-06 17:26 ` [PATCH v3 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
2026-09-06 17:23 ` sashiko-bot
2026-09-08 10:16 ` Raag Jadav
2026-09-09 6:12 ` Raag Jadav [this message]
2026-09-10 12:59 ` Nilawar, Badal
2026-09-10 13:19 ` Raag Jadav
2026-09-06 17:26 ` [PATCH v3 03/12] drm/xe/cper: Add Intel specific CPER structures Badal Nilawar
2026-09-07 13:13 ` Michal Wajdeczko
2026-09-10 11:57 ` Nilawar, Badal
2026-09-08 10:18 ` Raag Jadav
2026-09-10 13:36 ` Nilawar, Badal
2026-09-06 17:26 ` [PATCH v3 04/12] drm/xe/cper: Prepare CPER record Badal Nilawar
2026-09-06 17:27 ` sashiko-bot
2026-09-08 10:20 ` Raag Jadav
2026-09-06 17:26 ` [PATCH v3 05/12] drm/xe/xe_ras: Add support to retrieve info queue data for CRI Badal Nilawar
2026-09-06 17:17 ` sashiko-bot
2026-09-09 8:03 ` Raag Jadav
2026-09-06 17:26 ` [PATCH v3 06/12] drm/xe/cper: Prepare Intel CPER error info records Badal Nilawar
2026-09-06 17:30 ` sashiko-bot
2026-09-09 11:58 ` Raag Jadav
2026-09-06 17:26 ` [PATCH v3 07/12] drm/xe/cper: Log CPER records for aggregate counter retrival Badal Nilawar
2026-09-06 17:23 ` sashiko-bot
2026-09-10 6:27 ` Raag Jadav
2026-09-10 22:29 ` Rodrigo Vivi
2026-09-06 17:26 ` [PATCH v3 08/12] drm/xe/xe_ras: Report device memory errors using SIGID Badal Nilawar
2026-09-06 17:27 ` sashiko-bot
2026-09-06 17:26 ` [PATCH v3 09/12] drm/xe/xe_ras: Report core compute " Badal Nilawar
2026-09-06 17:21 ` sashiko-bot
2026-09-06 17:26 ` [PATCH v3 10/12] drm/xe/xe_ras: Report soc internal " Badal Nilawar
2026-09-06 17:26 ` [PATCH v3 11/12] drm/xe/xe_ras: Report correctable " Badal Nilawar
2026-09-06 17:27 ` sashiko-bot
2026-09-06 17:26 ` [PATCH v3 12/12] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
2026-09-06 17:28 ` sashiko-bot
2026-09-10 7:58 ` Raag Jadav
2026-09-06 17:55 ` ✓ Xe.CI.BAT: success for Add CPER logging support for CRI (rev3) Patchwork
2026-09-06 19:02 ` ✗ Xe.CI.FULL: failure " Patchwork
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