* [PATCH 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries
@ 2026-10-17 3:18 Zongyao Bai
2026-10-17 3:18 ` [PATCH 1/3] drm/xe/forcewake: add delayed release with hysteresis Zongyao Bai
` (8 more replies)
0 siblings, 9 replies; 17+ messages in thread
From: Zongyao Bai @ 2026-10-17 3:18 UTC (permalink / raw)
To: intel-xe; +Cc: rodrigo.vivi, Zongyao Bai
Engine-cycle queries are issued repeatedly by profilers such as VTune
and PTI to correlate CPU and GPU timestamps, for example through Level
Zero zeDeviceGetGlobalTimestamps(). Each query wakes the engine
forcewake domain and puts it to sleep again, and waiting for both
acknowledgments dominates the query latency.
This series adds an opt-in delayed release to forcewake. After the
final reference to a domain is dropped with xe_force_wake_put_delay(),
the domain stays awake for a short hold time, and a get within that
time reuses it without another wake request or ACK wait. The domain is
put to sleep from a delayed work in process context, so the sleep ACK
is waited for as in a regular put. The work sleeps only domains whose
hold time expired and that are still unreferenced, and requeues itself
for the rest. The hold time is a couple of jiffies.
Delayed release must not outlive the device being powered off, reset
or removed. System and runtime suspend flush it: the pending work is
canceled and the held domains are put to sleep, while delayed release
stays available after resume. GT shutdown, device removal and
post-registration probe failure stop it: the work is disabled for good,
and a later delayed put puts the domain to sleep right away.
Only engine-cycle queries opt in. All other forcewake users keep
releasing immediately.
Zongyao Bai (3):
drm/xe/forcewake: add delayed release with hysteresis
drm/xe/forcewake: flush delayed release at power and teardown
boundaries
drm/xe/query: use delayed forcewake release for engine-cycle queries
drivers/gpu/drm/xe/xe_device.c | 11 ++
drivers/gpu/drm/xe/xe_force_wake.c | 228 ++++++++++++++++++++---
drivers/gpu/drm/xe/xe_force_wake.h | 39 +++-
drivers/gpu/drm/xe/xe_force_wake_types.h | 42 +++++
drivers/gpu/drm/xe/xe_gt.c | 15 +-
drivers/gpu/drm/xe/xe_query.c | 2 +-
6 files changed, 305 insertions(+), 32 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 1/3] drm/xe/forcewake: add delayed release with hysteresis
2026-10-17 3:18 [PATCH 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries Zongyao Bai
@ 2026-10-17 3:18 ` Zongyao Bai
2026-11-09 20:55 ` Rodrigo Vivi
2026-10-17 3:18 ` [PATCH 2/3] drm/xe/forcewake: flush delayed release at power and teardown boundaries Zongyao Bai
` (7 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Zongyao Bai @ 2026-10-17 3:18 UTC (permalink / raw)
To: intel-xe; +Cc: rodrigo.vivi, Zongyao Bai
Add xe_force_wake_put_delay(), which keeps a domain awake for a short hold
time after its last reference is dropped instead of putting it to sleep
immediately. A xe_force_wake_get() within that time reuses the awake domain
without a wake request and ACK wait, which makes repeated short accesses
cheaper.
The domain is put to sleep from a delayed work, in process context, so
the sleep ACK can be waited for in the same way as a regular put. The work
sleeps only the domains whose hold time expired and which still have no
reference, and requeues itself for the rest. The hold time is a couple of
jiffies.
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_force_wake.c | 184 ++++++++++++++++++++---
drivers/gpu/drm/xe/xe_force_wake.h | 21 ++-
drivers/gpu/drm/xe/xe_force_wake_types.h | 14 ++
drivers/gpu/drm/xe/xe_gt.c | 5 +-
4 files changed, 197 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index 197e2197bd0a..71517bc4ffe6 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -6,16 +6,22 @@
#include "xe_force_wake.h"
#include <drm/drm_util.h>
+#include <linux/device.h>
+#include <linux/workqueue.h>
#include "regs/xe_gt_regs.h"
#include "regs/xe_reg_defs.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
#include "xe_mmio.h"
+#include "xe_pm.h"
#include "xe_sriov.h"
#define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
+/* Minimum hold of a delayed release, in jiffies. */
+#define XE_FORCE_WAKE_HOLD_JIFFIES 2
+
static const char *str_wake_sleep(bool wake)
{
return wake ? "wake" : "sleep";
@@ -42,12 +48,22 @@ static void init_domain(struct xe_force_wake *fw,
mark_domain_initialized(fw, id);
}
-void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
+static void xe_force_wake_disable_work(void *arg)
+{
+ struct xe_force_wake *fw = arg;
+
+ disable_delayed_work_sync(&fw->delayed_release_work);
+}
+
+static void xe_force_wake_delayed_release_work(struct work_struct *work);
+
+int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
{
struct xe_device *xe = gt_to_xe(gt);
fw->gt = gt;
spin_lock_init(&fw->lock);
+ INIT_DELAYED_WORK(&fw->delayed_release_work, xe_force_wake_delayed_release_work);
if (xe->info.graphics_verx100 >= 1270) {
init_domain(fw, XE_FW_DOMAIN_ID_GT,
@@ -58,6 +74,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
FORCEWAKE_GT,
FORCEWAKE_ACK_GT);
}
+
+ return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_disable_work, fw);
}
void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
@@ -187,8 +205,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
spin_lock_irqsave(&fw->lock, flags);
for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
if (!domain->ref++) {
- awake_rqst |= BIT(domain->id);
- domain_wake(gt, domain);
+ if (fw->delayed_domains & BIT(domain->id)) {
+ /* Still awake from a delayed release: reuse it. */
+ fw->delayed_domains &= ~BIT(domain->id);
+ } else {
+ awake_rqst |= BIT(domain->id);
+ domain_wake(gt, domain);
+ }
}
ref_incr |= BIT(domain->id);
}
@@ -212,23 +235,46 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
return ref_incr;
}
-/**
- * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
- * @fw: Pointer to the force wake structure
- * @fw_ref: return of xe_force_wake_get()
- *
- * This function reduces the reference counts for domains in fw_ref. If
- * refcount for any of the specified domain reaches 0, it puts the domain to sleep
- * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
- * Warns in case of timeout of ack from domain.
+/*
+ * Put the @mask domains to sleep and wait for the acknowledgment. Must be
+ * called with fw->lock held. Returns the mask of domains that failed to
+ * acknowledge.
*/
-void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
+static unsigned int xe_force_wake_sleep_locked(struct xe_force_wake *fw,
+ unsigned int mask)
{
struct xe_gt *gt = fw->gt;
struct xe_force_wake_domain *domain;
- unsigned int tmp, sleep = 0;
+ unsigned int tmp, ack_fail = 0;
+
+ lockdep_assert_held(&fw->lock);
+
+ for_each_fw_domain_masked(domain, mask, fw, tmp)
+ domain_sleep(gt, domain);
+
+ for_each_fw_domain_masked(domain, mask, fw, tmp) {
+ if (domain_sleep_wait(gt, domain) == 0)
+ fw->awake_domains &= ~BIT(domain->id);
+ else
+ ack_fail |= BIT(domain->id);
+ }
+
+ return ack_fail;
+}
+
+static void xe_force_wake_warn_sleep_fail(struct xe_gt *gt, unsigned int ack_fail)
+{
+ xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
+ str_plural(hweight_long(ack_fail)), ack_fail);
+}
+
+static void __xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref,
+ bool delayed)
+{
+ struct xe_gt *gt = fw->gt;
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp, sleep = 0, ack_fail;
unsigned long flags;
- int ack_fail = 0;
/*
* Avoid unnecessary lock and unlock when the function is called
@@ -244,21 +290,111 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
for_each_fw_domain_masked(domain, fw_ref, fw, tmp) {
xe_gt_assert(gt, domain->ref);
- if (!--domain->ref) {
+ if (--domain->ref)
+ continue;
+
+ if (delayed) {
+ domain->hold_until = jiffies + XE_FORCE_WAKE_HOLD_JIFFIES;
+ fw->delayed_domains |= BIT(domain->id);
+ /*
+ * queue_delayed_work() returns false both when the work
+ * is already pending and when flush/stop has disabled
+ * it. A pending worker releases the domain later, a
+ * disabled one never will, so release it right away.
+ *
+ * If the worker starts and clears PENDING between the
+ * two checks, it is misread as disabled and released
+ * early. That is safe: the delayed bit is cleared
+ * under fw->lock, so the worker does not see the
+ * domain and does not sleep it again. Only this one
+ * hold is lost.
+ */
+ if (!queue_delayed_work(system_percpu_wq, &fw->delayed_release_work,
+ XE_FORCE_WAKE_HOLD_JIFFIES) &&
+ !delayed_work_pending(&fw->delayed_release_work)) {
+ fw->delayed_domains &= ~BIT(domain->id);
+ sleep |= BIT(domain->id);
+ }
+ } else {
sleep |= BIT(domain->id);
- domain_sleep(gt, domain);
}
}
- for_each_fw_domain_masked(domain, sleep, fw, tmp) {
- if (domain_sleep_wait(gt, domain) == 0)
- fw->awake_domains &= ~BIT(domain->id);
- else
- ack_fail |= BIT(domain->id);
+ ack_fail = xe_force_wake_sleep_locked(fw, sleep);
+ spin_unlock_irqrestore(&fw->lock, flags);
+
+ xe_force_wake_warn_sleep_fail(gt, ack_fail);
+}
+
+/**
+ * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
+ * @fw: Pointer to the force wake structure
+ * @fw_ref: return of xe_force_wake_get()
+ *
+ * This function reduces the reference counts for domains in fw_ref. If
+ * refcount for any of the specified domain reaches 0, it puts the domain to sleep
+ * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
+ * Warns in case of timeout of ack from domain.
+ */
+void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
+{
+ __xe_force_wake_put(fw, fw_ref, false);
+}
+
+/**
+ * xe_force_wake_put_delay - Decrement the refcount, delaying the sleep request
+ * @fw: Pointer to the force wake structure
+ * @fw_ref: return of xe_force_wake_get()
+ *
+ * Like xe_force_wake_put(), but a domain whose refcount reaches 0 is kept
+ * awake for a short hold time instead of being put to sleep right away. An
+ * xe_force_wake_get() during that time reuses the awake domain without a
+ * wake request, which makes repeated short accesses cheaper. The domain is
+ * put to sleep by a worker once the hold time expires without a new user.
+ *
+ * Meant for opt-in hot paths that are expected to be repeated shortly after.
+ */
+void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref)
+{
+ __xe_force_wake_put(fw, fw_ref, true);
+}
+
+/*
+ * Put the delayed domains whose hold time expired to sleep, and requeue for
+ * the remaining ones.
+ */
+static void xe_force_wake_delayed_release_work(struct work_struct *work)
+{
+ struct xe_force_wake *fw = container_of(to_delayed_work(work),
+ struct xe_force_wake, delayed_release_work);
+ struct xe_gt *gt = fw->gt;
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp, expired = 0, ack_fail;
+ unsigned long flags, next = 0;
+ bool remaining = false;
+
+ xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
+
+ spin_lock_irqsave(&fw->lock, flags);
+ for_each_fw_domain_masked(domain, fw->delayed_domains, fw, tmp) {
+ if (time_before(jiffies, domain->hold_until)) {
+ if (!remaining || time_before(domain->hold_until, next))
+ next = domain->hold_until;
+ remaining = true;
+ continue;
+ }
+
+ expired |= BIT(domain->id);
+ fw->delayed_domains &= ~BIT(domain->id);
}
+
+ ack_fail = xe_force_wake_sleep_locked(fw, expired);
+
+ if (remaining)
+ queue_delayed_work(system_percpu_wq, &fw->delayed_release_work,
+ next - jiffies);
spin_unlock_irqrestore(&fw->lock, flags);
- xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
- str_plural(hweight_long(ack_fail)), ack_fail);
+ xe_force_wake_warn_sleep_fail(gt, ack_fail);
}
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
index e2721f205d6c..35a2252c762a 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.h
+++ b/drivers/gpu/drm/xe/xe_force_wake.h
@@ -11,13 +11,14 @@
struct xe_gt;
-void xe_force_wake_init_gt(struct xe_gt *gt,
- struct xe_force_wake *fw);
+int xe_force_wake_init_gt(struct xe_gt *gt,
+ struct xe_force_wake *fw);
void xe_force_wake_init_engines(struct xe_gt *gt,
struct xe_force_wake *fw);
unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
enum xe_force_wake_domains domains);
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
+void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref);
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
@@ -103,6 +104,22 @@ DEFINE_CLASS(xe_force_wake, struct xe_force_wake_ref,
#define xe_with_force_wake(ref, fw, domains) \
__xe_with_force_wake(ref, fw, domains, __UNIQUE_ID(done))
+/*
+ * Same as the xe_force_wake class, but the domains are released with
+ * xe_force_wake_put_delay().
+ */
+DEFINE_CLASS(xe_force_wake_delay, struct xe_force_wake_ref,
+ xe_force_wake_put_delay(_T.fw, _T.domains),
+ xe_force_wake_constructor(fw, domains),
+ struct xe_force_wake *fw, unsigned int domains);
+
+#define __xe_with_force_wake_delay(ref, fw, domains, done) \
+ for (CLASS(xe_force_wake_delay, ref)(fw, domains), *(done) = NULL; \
+ !(done); (done) = (void *)1)
+
+#define xe_with_force_wake_delay(ref, fw, domains) \
+ __xe_with_force_wake_delay(ref, fw, domains, __UNIQUE_ID(done))
+
/*
* Used when xe_force_wake_constructor() has already been called by another
* function and the current function is responsible for releasing the forcewake
diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
index 14b7b86e801b..5c16511c6f36 100644
--- a/drivers/gpu/drm/xe/xe_force_wake_types.h
+++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
@@ -8,6 +8,7 @@
#include <linux/mutex.h>
#include <linux/types.h>
+#include <linux/workqueue.h>
#include "regs/xe_reg_defs.h"
@@ -82,6 +83,11 @@ struct xe_force_wake_domain {
u32 mask;
/** @ref: domain reference */
u32 ref;
+ /**
+ * @hold_until: jiffies value until which a delayed release keeps the
+ * domain awake. Protected by &xe_force_wake.lock.
+ */
+ unsigned long hold_until;
};
/**
@@ -101,6 +107,14 @@ struct xe_force_wake {
spinlock_t lock;
/** @awake_domains: mask of all domains awake */
unsigned int awake_domains;
+ /**
+ * @delayed_domains: mask of unreferenced domains that are kept awake
+ * until @delayed_release_work puts them to sleep. A subset of
+ * @awake_domains.
+ */
+ unsigned int delayed_domains;
+ /** @delayed_release_work: puts expired @delayed_domains to sleep */
+ struct delayed_work delayed_release_work;
/** @initialized_domains: mask of all initialized domains */
unsigned int initialized_domains;
/** @domains: force wake domains */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 775c826b68b4..5ed96807fe34 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -515,7 +515,10 @@ int xe_gt_init_early(struct xe_gt *gt)
xe_wa_process_gt_oob(gt);
- xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ if (err)
+ return err;
+
spin_lock_init(>->global_invl_lock);
err = xe_gt_tlb_inval_init_early(gt);
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 2/3] drm/xe/forcewake: flush delayed release at power and teardown boundaries
2026-10-17 3:18 [PATCH 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries Zongyao Bai
2026-10-17 3:18 ` [PATCH 1/3] drm/xe/forcewake: add delayed release with hysteresis Zongyao Bai
@ 2026-10-17 3:18 ` Zongyao Bai
2026-10-17 3:18 ` [PATCH 3/3] drm/xe/query: use delayed forcewake release for engine-cycle queries Zongyao Bai
` (6 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Zongyao Bai @ 2026-10-17 3:18 UTC (permalink / raw)
To: intel-xe; +Cc: rodrigo.vivi, Zongyao Bai
Add xe_force_wake_flush(), which cancels the delayed release work and
puts the domains it was holding to sleep. Use it, through a scoped class
that flushes after the final put, in system suspend and runtime suspend,
before the device is powered off. Delayed release stays enabled for use
after resume.
Add xe_force_wake_stop(), which also disables the work for good. Use it
in GT shutdown, after the reset, and on device removal and
post-registration probe failure. A delayed put that finds the work
disabled puts the domain to sleep right away, so nothing is left awake
after the stop.
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_device.c | 11 ++++++
drivers/gpu/drm/xe/xe_force_wake.c | 44 ++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_force_wake.h | 18 ++++++++++
drivers/gpu/drm/xe/xe_force_wake_types.h | 28 +++++++++++++++
drivers/gpu/drm/xe/xe_gt.c | 10 +++---
5 files changed, 107 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 6c214799b65b..15ba0158aae5 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -886,6 +886,15 @@ static void xe_uid_probe(struct xe_device *xe)
xe->device_uid = xe_mmio_read64_2x32(xe_root_tile_mmio(xe), CRI_DEVICE_UID);
}
+static void xe_device_force_wake_stop(struct xe_device *xe)
+{
+ struct xe_gt *gt;
+ u8 id;
+
+ for_each_gt(gt, xe, id)
+ xe_force_wake_stop(gt_to_fw(gt));
+}
+
int xe_device_probe(struct xe_device *xe)
{
struct xe_tile *tile;
@@ -1117,6 +1126,7 @@ int xe_device_probe(struct xe_device *xe)
err_unregister_display:
xe_display_unregister(xe);
drm_dev_unregister(&xe->drm);
+ xe_device_force_wake_stop(xe);
return err;
}
@@ -1126,6 +1136,7 @@ void xe_device_remove(struct xe_device *xe)
xe_display_unregister(xe);
drm_dev_unplug(&xe->drm);
+ xe_device_force_wake_stop(xe);
xe_bo_pci_dev_remove_all(xe);
}
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index 71517bc4ffe6..8aaf52c5aec4 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -397,6 +397,50 @@ static void xe_force_wake_delayed_release_work(struct work_struct *work)
xe_force_wake_warn_sleep_fail(gt, ack_fail);
}
+static void xe_force_wake_settle_delayed(struct xe_force_wake *fw)
+{
+ unsigned int ack_fail;
+ unsigned long flags;
+
+ spin_lock_irqsave(&fw->lock, flags);
+ ack_fail = xe_force_wake_sleep_locked(fw, fw->delayed_domains);
+ fw->delayed_domains = 0;
+ spin_unlock_irqrestore(&fw->lock, flags);
+
+ xe_force_wake_warn_sleep_fail(fw->gt, ack_fail);
+}
+
+/**
+ * xe_force_wake_flush - Put all delayed domains to sleep now
+ * @fw: Pointer to the force wake structure
+ *
+ * Cancel the pending delayed release and put the domains it was holding awake
+ * to sleep right away. Delayed release stays enabled, so it can be used again
+ * after resume.
+ *
+ * Used before powering the device off, once no forcewake reference is held
+ * and no new delayed release can start.
+ */
+void xe_force_wake_flush(struct xe_force_wake *fw)
+{
+ cancel_delayed_work_sync(&fw->delayed_release_work);
+ xe_force_wake_settle_delayed(fw);
+}
+
+/**
+ * xe_force_wake_stop - Stop delayed release for good
+ * @fw: Pointer to the force wake structure
+ *
+ * Like xe_force_wake_flush(), but also disable the delayed release work, so it
+ * cannot run again. Used on device removal and shutdown, once no forcewake
+ * user that may release with xe_force_wake_put_delay() is left.
+ */
+void xe_force_wake_stop(struct xe_force_wake *fw)
+{
+ disable_delayed_work_sync(&fw->delayed_release_work);
+ xe_force_wake_settle_delayed(fw);
+}
+
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
{
switch (id) {
diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
index 35a2252c762a..89cf8fbef8e4 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.h
+++ b/drivers/gpu/drm/xe/xe_force_wake.h
@@ -19,6 +19,8 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
enum xe_force_wake_domains domains);
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref);
+void xe_force_wake_flush(struct xe_force_wake *fw);
+void xe_force_wake_stop(struct xe_force_wake *fw);
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
@@ -104,6 +106,22 @@ DEFINE_CLASS(xe_force_wake, struct xe_force_wake_ref,
#define xe_with_force_wake(ref, fw, domains) \
__xe_with_force_wake(ref, fw, domains, __UNIQUE_ID(done))
+/*
+ * Same as the xe_force_wake class, but flush the delayed release after the
+ * domains are put. For paths that power the device off.
+ */
+static inline void xe_force_wake_put_and_flush(struct xe_force_wake *fw,
+ unsigned int fw_ref)
+{
+ xe_force_wake_put(fw, fw_ref);
+ xe_force_wake_flush(fw);
+}
+
+DEFINE_CLASS(xe_force_wake_flush, struct xe_force_wake_ref,
+ xe_force_wake_put_and_flush(_T.fw, _T.domains),
+ xe_force_wake_constructor(fw, domains),
+ struct xe_force_wake *fw, unsigned int domains);
+
/*
* Same as the xe_force_wake class, but the domains are released with
* xe_force_wake_put_delay().
diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
index 5c16511c6f36..63e87ff9cad2 100644
--- a/drivers/gpu/drm/xe/xe_force_wake_types.h
+++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
@@ -99,6 +99,34 @@ struct xe_force_wake_domain {
* Currently only used for GT power domains (where the term "forcewake" is used
* in the hardware documentation), although the interface could be extended to
* power wells in other parts of the hardware in the future.
+ *
+ * Delayed-release state flow of a domain, protected by @lock:
+ *
+ * +------------+ +--------------+
+ * | ASLEEP | ------- get: wake -------------> | REFERENCED |
+ * | ref == 0 | <------ final put: sleep ------- | ref > 0 |
+ * +------------+ +--------------+
+ * ^ | ^
+ * | final put_delay | |
+ * | | | get: reuse
+ * | | | no MMIO
+ * | v |
+ * | +--------------+
+ * | | DELAYED HOLD |
+ * +---- worker after @hold_until, --------- | ref == 0 |
+ * or flush/stop: sleep +--------------+
+ * | ^
+ * | |
+ * +----------+
+ * worker before @hold_until: requeue
+ *
+ * Once @delayed_release_work has been disabled, a final put_delay behaves
+ * like a final put and DELAYED HOLD becomes unreachable.
+ *
+ * ASLEEP: neither @awake_domains nor @delayed_domains has the domain.
+ * REFERENCED: @awake_domains has the domain, @delayed_domains does not.
+ * DELAYED HOLD: both masks have the domain; @delayed_release_work is
+ * pending. Each final put_delay moves @hold_until forward.
*/
struct xe_force_wake {
/** @gt: back pointers to GT */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 5ed96807fe34..a0a238f1a451 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -1025,7 +1025,7 @@ int xe_gt_suspend(struct xe_gt *gt)
xe_gt_dbg(gt, "suspending\n");
xe_gt_sanitize(gt);
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ CLASS(xe_force_wake_flush, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
return -ETIMEDOUT;
@@ -1048,8 +1048,10 @@ int xe_gt_suspend(struct xe_gt *gt)
void xe_gt_shutdown(struct xe_gt *gt)
{
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
- do_gt_reset(gt);
+ xe_with_force_wake(fw_ref, gt_to_fw(gt), XE_FORCEWAKE_ALL)
+ do_gt_reset(gt);
+
+ xe_force_wake_stop(gt_to_fw(gt));
}
/**
@@ -1104,7 +1106,7 @@ int xe_gt_runtime_suspend(struct xe_gt *gt)
{
xe_gt_dbg(gt, "runtime suspending\n");
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ CLASS(xe_force_wake_flush, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
xe_gt_err(gt, "runtime suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
return -ETIMEDOUT;
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 3/3] drm/xe/query: use delayed forcewake release for engine-cycle queries
2026-10-17 3:18 [PATCH 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries Zongyao Bai
2026-10-17 3:18 ` [PATCH 1/3] drm/xe/forcewake: add delayed release with hysteresis Zongyao Bai
2026-10-17 3:18 ` [PATCH 2/3] drm/xe/forcewake: flush delayed release at power and teardown boundaries Zongyao Bai
@ 2026-10-17 3:18 ` Zongyao Bai
2026-10-17 3:25 ` ✗ CI.checkpatch: warning for drm/xe/forcewake: add delayed " Patchwork
` (5 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Zongyao Bai @ 2026-10-17 3:18 UTC (permalink / raw)
To: intel-xe; +Cc: rodrigo.vivi, Zongyao Bai
Engine-cycle queries are issued repeatedly by profilers such as VTune and
PTI to correlate CPU and GPU timestamps, for example through Level Zero
zeDeviceGetGlobalTimestamps(). Each query wakes the engine forcewake
domain and puts it to sleep again, and waiting for both acknowledgments
dominates the latency.
Release the domain with xe_force_wake_put_delay() so that a burst of
queries reuses the awake domain instead of waking it again. Other forcewake
users keep releasing immediately.
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index dc975f595368..86c4e1dfc101 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -157,7 +157,7 @@ query_engine_cycles(struct xe_device *xe,
fw_domain = xe_hw_engine_to_fw_domain(hwe);
- xe_with_force_wake(fw_ref, gt_to_fw(gt), fw_domain) {
+ xe_with_force_wake_delay(fw_ref, gt_to_fw(gt), fw_domain) {
if (!xe_force_wake_ref_has_domain(fw_ref.domains, fw_domain))
return -EIO;
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe/forcewake: add delayed release for engine-cycle queries
2026-10-17 3:18 [PATCH 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries Zongyao Bai
` (2 preceding siblings ...)
2026-10-17 3:18 ` [PATCH 3/3] drm/xe/query: use delayed forcewake release for engine-cycle queries Zongyao Bai
@ 2026-10-17 3:25 ` Patchwork
2026-10-17 3:27 ` ✓ CI.KUnit: success " Patchwork
` (4 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-10-17 3:25 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
== Series Details ==
Series: drm/xe/forcewake: add delayed release for engine-cycle queries
URL : https://patchwork.freedesktop.org/series/176324/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
6bef5ce5c74dc76b4ee69ab2832c0d1fd63c91c7
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit b5beca4050ff309dbe33925729579bcff1a7e9e3
Author: Zongyao Bai <zongyao.bai@intel.com>
Date: Sat Oct 17 03:18:56 2026 +0000
drm/xe/query: use delayed forcewake release for engine-cycle queries
Engine-cycle queries are issued repeatedly by profilers such as VTune and
PTI to correlate CPU and GPU timestamps, for example through Level Zero
zeDeviceGetGlobalTimestamps(). Each query wakes the engine forcewake
domain and puts it to sleep again, and waiting for both acknowledgments
dominates the latency.
Release the domain with xe_force_wake_put_delay() so that a burst of
queries reuses the awake domain instead of waking it again. Other forcewake
users keep releasing immediately.
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
+ /mt/dim checkpatch 173c9ebb628f22cdfb18e080e0ef46b728649f89 drm-intel
c406eb511f73 drm/xe/forcewake: add delayed release with hysteresis
-:310: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'done' - possible side-effects?
#310: FILE: drivers/gpu/drm/xe/xe_force_wake.h:116:
+#define __xe_with_force_wake_delay(ref, fw, domains, done) \
+ for (CLASS(xe_force_wake_delay, ref)(fw, domains), *(done) = NULL; \
+ !(done); (done) = (void *)1)
total: 0 errors, 0 warnings, 1 checks, 327 lines checked
a758900e8cf0 drm/xe/forcewake: flush delayed release at power and teardown boundaries
b5beca4050ff drm/xe/query: use delayed forcewake release for engine-cycle queries
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ CI.KUnit: success for drm/xe/forcewake: add delayed release for engine-cycle queries
2026-10-17 3:18 [PATCH 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries Zongyao Bai
` (3 preceding siblings ...)
2026-10-17 3:25 ` ✗ CI.checkpatch: warning for drm/xe/forcewake: add delayed " Patchwork
@ 2026-10-17 3:27 ` Patchwork
2026-10-17 3:27 ` [PATCH 0/3] " Simon Richter
` (3 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-10-17 3:27 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
== Series Details ==
Series: drm/xe/forcewake: add delayed release for engine-cycle queries
URL : https://patchwork.freedesktop.org/series/176324/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[03:25:39] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:25:43] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:26:04] Starting KUnit Kernel (1/1)...
[03:26:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:26:04] ================= gpu_buddy (14 subtests) ==================
[03:26:04] [PASSED] gpu_test_buddy_alloc_limit
[03:26:04] [PASSED] gpu_test_buddy_alloc_optimistic
[03:26:04] [PASSED] gpu_test_buddy_alloc_pessimistic
[03:26:04] [PASSED] gpu_test_buddy_alloc_pathological
[03:26:04] [PASSED] gpu_test_buddy_alloc_contiguous
[03:26:04] [PASSED] gpu_test_buddy_alloc_clear
[03:26:04] [PASSED] gpu_test_buddy_alloc_range
[03:26:04] [PASSED] gpu_test_buddy_alloc_range_bias
[03:26:05] [PASSED] gpu_test_buddy_fragmentation_performance
[03:26:06] [PASSED] gpu_test_buddy_dirty_tracker_performance
[03:26:06] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[03:26:06] [PASSED] gpu_test_buddy_offset_aligned_allocation
[03:26:06] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[03:26:06] [PASSED] gpu_test_buddy_addr_to_block
[03:26:06] ==================== [PASSED] gpu_buddy ====================
[03:26:06] ============================================================
[03:26:06] Testing complete. Ran 14 tests: passed: 14
[03:26:06] Elapsed time: 26.935s total, 4.495s configuring, 20.522s building, 1.864s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[03:26:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:26:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:26:47] Starting KUnit Kernel (1/1)...
[03:26:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:26:48] ================== guc_buf (11 subtests) ===================
[03:26:48] [PASSED] test_smallest
[03:26:48] [PASSED] test_largest
[03:26:48] [PASSED] test_granular
[03:26:48] [PASSED] test_unique
[03:26:48] [PASSED] test_overlap
[03:26:48] [PASSED] test_reusable
[03:26:48] [PASSED] test_too_big
[03:26:48] [PASSED] test_flush
[03:26:48] [PASSED] test_lookup
[03:26:48] [PASSED] test_data
[03:26:48] [PASSED] test_class
[03:26:48] ===================== [PASSED] guc_buf =====================
[03:26:48] =================== guc_dbm (7 subtests) ===================
[03:26:48] [PASSED] test_empty
[03:26:48] [PASSED] test_default
[03:26:48] ======================== test_size ========================
[03:26:48] [PASSED] 4
[03:26:48] [PASSED] 8
[03:26:48] [PASSED] 32
[03:26:48] [PASSED] 256
[03:26:48] ==================== [PASSED] test_size ====================
[03:26:48] ======================= test_reuse ========================
[03:26:48] [PASSED] 4
[03:26:48] [PASSED] 8
[03:26:48] [PASSED] 32
[03:26:48] [PASSED] 256
[03:26:48] =================== [PASSED] test_reuse ====================
[03:26:48] =================== test_range_overlap ====================
[03:26:48] [PASSED] 4
[03:26:48] [PASSED] 8
[03:26:48] [PASSED] 32
[03:26:48] [PASSED] 256
[03:26:48] =============== [PASSED] test_range_overlap ================
[03:26:48] =================== test_range_compact ====================
[03:26:48] [PASSED] 4
[03:26:48] [PASSED] 8
[03:26:48] [PASSED] 32
[03:26:48] [PASSED] 256
[03:26:48] =============== [PASSED] test_range_compact ================
[03:26:48] ==================== test_range_spare =====================
[03:26:48] [PASSED] 4
[03:26:48] [PASSED] 8
[03:26:48] [PASSED] 32
[03:26:48] [PASSED] 256
[03:26:48] ================ [PASSED] test_range_spare =================
[03:26:48] ===================== [PASSED] guc_dbm =====================
[03:26:48] ================== guc_idm (22 subtests) ===================
[03:26:48] [PASSED] bad_init
[03:26:48] [PASSED] no_init
[03:26:48] [PASSED] init_fini
[03:26:48] [PASSED] check_init_small
[03:26:48] [PASSED] check_init_shared
[03:26:48] [PASSED] check_used
[03:26:48] [PASSED] check_quota
[03:26:48] [PASSED] check_all
[03:26:48] [PASSED] check_limits
[03:26:48] [PASSED] check_overlap
[03:26:48] [PASSED] check_overlap_alloc
[03:26:48] [PASSED] check_overlap_release
[03:26:48] [PASSED] check_overlap_partial_init
[03:26:48] [PASSED] check_overlap_partial_shared_range_blocking
[03:26:48] [PASSED] check_used_usable
[03:26:48] [PASSED] check_used_shareable
[03:26:48] [PASSED] check_used_mixed
[03:26:48] [PASSED] check_release_usable_range
[03:26:48] [PASSED] check_release_shareable_range
[03:26:48] [PASSED] check_split_boundaries
[03:26:48] [PASSED] check_shareable_spare
[03:26:48] [PASSED] check_shareable_spare_fragmented_tail
[03:26:48] ===================== [PASSED] guc_idm =====================
[03:26:48] ============== guc_klv_helpers (13 subtests) ===============
[03:26:48] [PASSED] test_count
[03:26:48] [PASSED] test_encode_u32
[03:26:48] [PASSED] test_encode_u64
[03:26:48] [PASSED] test_encode_string
[03:26:48] [PASSED] test_encode_object_raw
[03:26:48] [PASSED] test_encode_object_klv
[03:26:48] [PASSED] test_encode_object_nested
[03:26:48] [PASSED] test_encode_object_basic
[03:26:48] ===================== test_decode_u16 =====================
[03:26:48] [PASSED] empty
[03:26:48] [PASSED] valid
[03:26:48] [PASSED] max
[03:26:48] [PASSED] big
[03:26:48] [PASSED] long
[03:26:48] ================= [PASSED] test_decode_u16 =================
[03:26:48] ===================== test_decode_u32 =====================
[03:26:48] [PASSED] empty
[03:26:48] [PASSED] valid
[03:26:48] [PASSED] max
[03:26:48] [PASSED] long
[03:26:48] ================= [PASSED] test_decode_u32 =================
[03:26:48] ===================== test_decode_u64 =====================
[03:26:48] [PASSED] empty
[03:26:48] [PASSED] short
[03:26:48] [PASSED] valid
[03:26:48] [PASSED] max
[03:26:48] [PASSED] long
[03:26:48] ================= [PASSED] test_decode_u64 =================
[03:26:48] ===================== test_decode_str =====================
[03:26:48] [PASSED] empty
[03:26:48] [PASSED] one
[03:26:48] [PASSED] one_trash
[03:26:48] [PASSED] two
[03:26:48] [PASSED] two_trash
[03:26:48] [PASSED] three
[03:26:48] [PASSED] dword
[03:26:48] [PASSED] four
[03:26:48] [PASSED] five
[03:26:48] [PASSED] six
[03:26:48] [PASSED] seven
[03:26:48] [PASSED] qword
[03:26:48] ================= [PASSED] test_decode_str =================
[03:26:48] [PASSED] test_print
[03:26:48] ================= [PASSED] guc_klv_helpers =================
[03:26:48] =================== xe_log (4 subtests) ====================
[03:26:48] [PASSED] demo_cper
[03:26:48] [PASSED] demo_dmesg
[03:26:48] ======================= test_dmesg ========================
[03:26:48] [PASSED] test_fatal
[03:26:48] [PASSED] test_fatal_tile
[03:26:48] [PASSED] test_fatal_gt
[03:26:48] [PASSED] test_fatal_comp
[03:26:48] [PASSED] test_fatal_comp_tile
[03:26:48] [PASSED] test_fatal_comp_gt
[03:26:48] [PASSED] test_fatal_all
[03:26:48] [PASSED] test_recoverable
[03:26:48] [PASSED] test_recoverable_tile
[03:26:48] [PASSED] test_recoverable_gt
[03:26:48] [PASSED] test_recoverable_comp
[03:26:48] [PASSED] test_recoverable_comp_tile
[03:26:48] [PASSED] test_recoverable_comp_gt
[03:26:48] [PASSED] test_recoverable_all
[03:26:48] [PASSED] test_info
[03:26:48] [PASSED] test_info_tile
[03:26:48] [PASSED] test_info_gt
[03:26:48] [PASSED] test_info_err
[03:26:48] [PASSED] test_info_comp
[03:26:48] [PASSED] test_info_comp_tile
[03:26:48] [PASSED] test_info_comp_gt
[03:26:48] [PASSED] test_info_all
[03:26:48] [PASSED] test_hw_fatal
[03:26:48] [PASSED] test_hw_recoverable
[03:26:48] [PASSED] test_hw_corrected
[03:26:48] [PASSED] test_hw_informational
[03:26:48] =================== [PASSED] test_dmesg ====================
[03:26:48] ====================== test_invalid =======================
[03:26:48] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[03:26:48] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[03:26:48] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[03:26:48] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[03:26:48] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[03:26:48] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[03:26:48] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[03:26:48] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[03:26:48] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[03:26:48] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[03:26:48] ================== [SKIPPED] test_invalid ==================
[03:26:48] ===================== [PASSED] xe_log ======================
[03:26:48] ================== no_relay (3 subtests) ===================
[03:26:48] [PASSED] xe_drops_guc2pf_if_not_ready
[03:26:48] [PASSED] xe_drops_guc2vf_if_not_ready
[03:26:48] [PASSED] xe_rejects_send_if_not_ready
[03:26:48] ==================== [PASSED] no_relay =====================
[03:26:48] ================== pf_relay (14 subtests) ==================
[03:26:48] [PASSED] pf_rejects_guc2pf_too_short
[03:26:48] [PASSED] pf_rejects_guc2pf_too_long
[03:26:48] [PASSED] pf_rejects_guc2pf_no_payload
[03:26:48] [PASSED] pf_fails_no_payload
[03:26:48] [PASSED] pf_fails_bad_origin
[03:26:48] [PASSED] pf_fails_bad_type
[03:26:48] [PASSED] pf_txn_reports_error
[03:26:48] [PASSED] pf_txn_sends_pf2guc
[03:26:48] [PASSED] pf_sends_pf2guc
[03:26:48] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[03:26:48] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[03:26:48] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[03:26:48] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[03:26:48] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[03:26:48] ==================== [PASSED] pf_relay =====================
[03:26:48] ================== vf_relay (3 subtests) ===================
[03:26:48] [PASSED] vf_rejects_guc2vf_too_short
[03:26:48] [PASSED] vf_rejects_guc2vf_too_long
[03:26:48] [PASSED] vf_rejects_guc2vf_no_payload
[03:26:48] ==================== [PASSED] vf_relay =====================
[03:26:48] ================ pf_gt_config (9 subtests) =================
[03:26:48] [PASSED] fair_contexts_1vf
[03:26:48] [PASSED] fair_doorbells_1vf
[03:26:48] [PASSED] fair_ggtt_1vf
[03:26:48] ====================== fair_vram_1vf ======================
[03:26:48] [PASSED] 3.50 GiB
[03:26:48] [PASSED] 11.5 GiB
[03:26:48] [PASSED] 15.5 GiB
[03:26:48] [PASSED] 31.5 GiB
[03:26:48] [PASSED] 63.5 GiB
[03:26:48] [PASSED] 1.91 GiB
[03:26:48] ================== [PASSED] fair_vram_1vf ==================
[03:26:48] ================ fair_vram_1vf_admin_only =================
[03:26:48] [PASSED] 3.50 GiB
[03:26:48] [PASSED] 11.5 GiB
[03:26:48] [PASSED] 15.5 GiB
[03:26:48] [PASSED] 31.5 GiB
[03:26:48] [PASSED] 63.5 GiB
[03:26:48] [PASSED] 1.91 GiB
[03:26:48] ============ [PASSED] fair_vram_1vf_admin_only =============
[03:26:48] ====================== fair_contexts ======================
[03:26:48] [PASSED] 1 VF
[03:26:48] [PASSED] 2 VFs
[03:26:48] [PASSED] 3 VFs
[03:26:48] [PASSED] 4 VFs
[03:26:48] [PASSED] 5 VFs
[03:26:48] [PASSED] 6 VFs
[03:26:48] [PASSED] 7 VFs
[03:26:48] [PASSED] 8 VFs
[03:26:48] [PASSED] 9 VFs
[03:26:48] [PASSED] 10 VFs
[03:26:48] [PASSED] 11 VFs
[03:26:48] [PASSED] 12 VFs
[03:26:48] [PASSED] 13 VFs
[03:26:48] [PASSED] 14 VFs
[03:26:48] [PASSED] 15 VFs
[03:26:48] [PASSED] 16 VFs
[03:26:48] [PASSED] 17 VFs
[03:26:48] [PASSED] 18 VFs
[03:26:48] [PASSED] 19 VFs
[03:26:48] [PASSED] 20 VFs
[03:26:48] [PASSED] 21 VFs
[03:26:48] [PASSED] 22 VFs
[03:26:48] [PASSED] 23 VFs
[03:26:48] [PASSED] 24 VFs
[03:26:48] [PASSED] 25 VFs
[03:26:48] [PASSED] 26 VFs
[03:26:48] [PASSED] 27 VFs
[03:26:48] [PASSED] 28 VFs
[03:26:48] [PASSED] 29 VFs
[03:26:48] [PASSED] 30 VFs
[03:26:48] [PASSED] 31 VFs
[03:26:48] [PASSED] 32 VFs
[03:26:48] [PASSED] 33 VFs
[03:26:48] [PASSED] 34 VFs
[03:26:48] [PASSED] 35 VFs
[03:26:48] [PASSED] 36 VFs
[03:26:48] [PASSED] 37 VFs
[03:26:48] [PASSED] 38 VFs
[03:26:48] [PASSED] 39 VFs
[03:26:48] [PASSED] 40 VFs
[03:26:48] [PASSED] 41 VFs
[03:26:48] [PASSED] 42 VFs
[03:26:48] [PASSED] 43 VFs
[03:26:48] [PASSED] 44 VFs
[03:26:48] [PASSED] 45 VFs
[03:26:48] [PASSED] 46 VFs
[03:26:48] [PASSED] 47 VFs
[03:26:48] [PASSED] 48 VFs
[03:26:48] [PASSED] 49 VFs
[03:26:48] [PASSED] 50 VFs
[03:26:48] [PASSED] 51 VFs
[03:26:48] [PASSED] 52 VFs
[03:26:48] [PASSED] 53 VFs
[03:26:48] [PASSED] 54 VFs
[03:26:48] [PASSED] 55 VFs
[03:26:48] [PASSED] 56 VFs
[03:26:48] [PASSED] 57 VFs
[03:26:48] [PASSED] 58 VFs
[03:26:48] [PASSED] 59 VFs
[03:26:48] [PASSED] 60 VFs
[03:26:48] [PASSED] 61 VFs
[03:26:48] [PASSED] 62 VFs
[03:26:48] [PASSED] 63 VFs
[03:26:48] ================== [PASSED] fair_contexts ==================
[03:26:48] ===================== fair_doorbells ======================
[03:26:48] [PASSED] 1 VF
[03:26:48] [PASSED] 2 VFs
[03:26:48] [PASSED] 3 VFs
[03:26:48] [PASSED] 4 VFs
[03:26:48] [PASSED] 5 VFs
[03:26:48] [PASSED] 6 VFs
[03:26:48] [PASSED] 7 VFs
[03:26:48] [PASSED] 8 VFs
[03:26:48] [PASSED] 9 VFs
[03:26:48] [PASSED] 10 VFs
[03:26:48] [PASSED] 11 VFs
[03:26:48] [PASSED] 12 VFs
[03:26:48] [PASSED] 13 VFs
[03:26:48] [PASSED] 14 VFs
[03:26:48] [PASSED] 15 VFs
[03:26:48] [PASSED] 16 VFs
[03:26:48] [PASSED] 17 VFs
[03:26:48] [PASSED] 18 VFs
[03:26:48] [PASSED] 19 VFs
[03:26:48] [PASSED] 20 VFs
[03:26:48] [PASSED] 21 VFs
[03:26:48] [PASSED] 22 VFs
[03:26:48] [PASSED] 23 VFs
[03:26:48] [PASSED] 24 VFs
[03:26:48] [PASSED] 25 VFs
[03:26:48] [PASSED] 26 VFs
[03:26:48] [PASSED] 27 VFs
[03:26:48] [PASSED] 28 VFs
[03:26:48] [PASSED] 29 VFs
[03:26:48] [PASSED] 30 VFs
[03:26:48] [PASSED] 31 VFs
[03:26:48] [PASSED] 32 VFs
[03:26:48] [PASSED] 33 VFs
[03:26:48] [PASSED] 34 VFs
[03:26:48] [PASSED] 35 VFs
[03:26:48] [PASSED] 36 VFs
[03:26:48] [PASSED] 37 VFs
[03:26:48] [PASSED] 38 VFs
[03:26:48] [PASSED] 39 VFs
[03:26:48] [PASSED] 40 VFs
[03:26:48] [PASSED] 41 VFs
[03:26:48] [PASSED] 42 VFs
[03:26:48] [PASSED] 43 VFs
[03:26:48] [PASSED] 44 VFs
[03:26:48] [PASSED] 45 VFs
[03:26:48] [PASSED] 46 VFs
[03:26:48] [PASSED] 47 VFs
[03:26:48] [PASSED] 48 VFs
[03:26:48] [PASSED] 49 VFs
[03:26:48] [PASSED] 50 VFs
[03:26:48] [PASSED] 51 VFs
[03:26:48] [PASSED] 52 VFs
[03:26:48] [PASSED] 53 VFs
[03:26:48] [PASSED] 54 VFs
[03:26:48] [PASSED] 55 VFs
[03:26:48] [PASSED] 56 VFs
[03:26:48] [PASSED] 57 VFs
[03:26:48] [PASSED] 58 VFs
[03:26:48] [PASSED] 59 VFs
[03:26:48] [PASSED] 60 VFs
[03:26:48] [PASSED] 61 VFs
[03:26:48] [PASSED] 62 VFs
[03:26:48] [PASSED] 63 VFs
[03:26:48] ================= [PASSED] fair_doorbells ==================
[03:26:48] ======================== fair_ggtt ========================
[03:26:48] [PASSED] 1 VF
[03:26:48] [PASSED] 2 VFs
[03:26:48] [PASSED] 3 VFs
[03:26:48] [PASSED] 4 VFs
[03:26:48] [PASSED] 5 VFs
[03:26:48] [PASSED] 6 VFs
[03:26:48] [PASSED] 7 VFs
[03:26:48] [PASSED] 8 VFs
[03:26:48] [PASSED] 9 VFs
[03:26:48] [PASSED] 10 VFs
[03:26:48] [PASSED] 11 VFs
[03:26:48] [PASSED] 12 VFs
[03:26:48] [PASSED] 13 VFs
[03:26:48] [PASSED] 14 VFs
[03:26:48] [PASSED] 15 VFs
[03:26:48] [PASSED] 16 VFs
[03:26:48] [PASSED] 17 VFs
[03:26:48] [PASSED] 18 VFs
[03:26:48] [PASSED] 19 VFs
[03:26:48] [PASSED] 20 VFs
[03:26:48] [PASSED] 21 VFs
[03:26:48] [PASSED] 22 VFs
[03:26:48] [PASSED] 23 VFs
[03:26:48] [PASSED] 24 VFs
[03:26:48] [PASSED] 25 VFs
[03:26:48] [PASSED] 26 VFs
[03:26:48] [PASSED] 27 VFs
[03:26:48] [PASSED] 28 VFs
[03:26:48] [PASSED] 29 VFs
[03:26:48] [PASSED] 30 VFs
[03:26:48] [PASSED] 31 VFs
[03:26:48] [PASSED] 32 VFs
[03:26:48] [PASSED] 33 VFs
[03:26:48] [PASSED] 34 VFs
[03:26:48] [PASSED] 35 VFs
[03:26:48] [PASSED] 36 VFs
[03:26:48] [PASSED] 37 VFs
[03:26:48] [PASSED] 38 VFs
[03:26:48] [PASSED] 39 VFs
[03:26:48] [PASSED] 40 VFs
[03:26:48] [PASSED] 41 VFs
[03:26:48] [PASSED] 42 VFs
[03:26:48] [PASSED] 43 VFs
[03:26:48] [PASSED] 44 VFs
[03:26:48] [PASSED] 45 VFs
[03:26:48] [PASSED] 46 VFs
[03:26:48] [PASSED] 47 VFs
[03:26:48] [PASSED] 48 VFs
[03:26:48] [PASSED] 49 VFs
[03:26:48] [PASSED] 50 VFs
[03:26:48] [PASSED] 51 VFs
[03:26:48] [PASSED] 52 VFs
[03:26:48] [PASSED] 53 VFs
[03:26:48] [PASSED] 54 VFs
[03:26:48] [PASSED] 55 VFs
[03:26:48] [PASSED] 56 VFs
[03:26:48] [PASSED] 57 VFs
[03:26:48] [PASSED] 58 VFs
[03:26:48] [PASSED] 59 VFs
[03:26:48] [PASSED] 60 VFs
[03:26:48] [PASSED] 61 VFs
[03:26:48] [PASSED] 62 VFs
[03:26:48] [PASSED] 63 VFs
[03:26:48] ==================== [PASSED] fair_ggtt ====================
[03:26:48] ======================== fair_vram ========================
[03:26:48] [PASSED] 1 VF
[03:26:48] [PASSED] 2 VFs
[03:26:48] [PASSED] 3 VFs
[03:26:48] [PASSED] 4 VFs
[03:26:48] [PASSED] 5 VFs
[03:26:48] [PASSED] 6 VFs
[03:26:48] [PASSED] 7 VFs
[03:26:48] [PASSED] 8 VFs
[03:26:48] [PASSED] 9 VFs
[03:26:48] [PASSED] 10 VFs
[03:26:48] [PASSED] 11 VFs
[03:26:48] [PASSED] 12 VFs
[03:26:48] [PASSED] 13 VFs
[03:26:48] [PASSED] 14 VFs
[03:26:48] [PASSED] 15 VFs
[03:26:48] [PASSED] 16 VFs
[03:26:48] [PASSED] 17 VFs
[03:26:48] [PASSED] 18 VFs
[03:26:48] [PASSED] 19 VFs
[03:26:48] [PASSED] 20 VFs
[03:26:48] [PASSED] 21 VFs
[03:26:48] [PASSED] 22 VFs
[03:26:48] [PASSED] 23 VFs
[03:26:48] [PASSED] 24 VFs
[03:26:48] [PASSED] 25 VFs
[03:26:48] [PASSED] 26 VFs
[03:26:48] [PASSED] 27 VFs
[03:26:48] [PASSED] 28 VFs
[03:26:48] [PASSED] 29 VFs
[03:26:48] [PASSED] 30 VFs
[03:26:48] [PASSED] 31 VFs
[03:26:48] [PASSED] 32 VFs
[03:26:48] [PASSED] 33 VFs
[03:26:48] [PASSED] 34 VFs
[03:26:48] [PASSED] 35 VFs
[03:26:48] [PASSED] 36 VFs
[03:26:48] [PASSED] 37 VFs
[03:26:48] [PASSED] 38 VFs
[03:26:48] [PASSED] 39 VFs
[03:26:48] [PASSED] 40 VFs
[03:26:48] [PASSED] 41 VFs
[03:26:48] [PASSED] 42 VFs
[03:26:48] [PASSED] 43 VFs
[03:26:48] [PASSED] 44 VFs
[03:26:48] [PASSED] 45 VFs
[03:26:48] [PASSED] 46 VFs
[03:26:48] [PASSED] 47 VFs
[03:26:48] [PASSED] 48 VFs
[03:26:48] [PASSED] 49 VFs
[03:26:48] [PASSED] 50 VFs
[03:26:48] [PASSED] 51 VFs
[03:26:48] [PASSED] 52 VFs
[03:26:48] [PASSED] 53 VFs
[03:26:48] [PASSED] 54 VFs
[03:26:48] [PASSED] 55 VFs
[03:26:48] [PASSED] 56 VFs
[03:26:48] [PASSED] 57 VFs
[03:26:48] [PASSED] 58 VFs
[03:26:48] [PASSED] 59 VFs
[03:26:48] [PASSED] 60 VFs
[03:26:48] [PASSED] 61 VFs
[03:26:48] [PASSED] 62 VFs
[03:26:48] [PASSED] 63 VFs
[03:26:48] ==================== [PASSED] fair_vram ====================
[03:26:48] ================== [PASSED] pf_gt_config ===================
[03:26:48] ===================== lmtt (1 subtest) =====================
[03:26:48] ======================== test_ops =========================
[03:26:48] [PASSED] 2-level
[03:26:48] [PASSED] multi-level
[03:26:48] ==================== [PASSED] test_ops =====================
[03:26:48] ====================== [PASSED] lmtt =======================
[03:26:48] ================= sriov_packet (1 subtest) =================
[03:26:48] [PASSED] test_descriptor_init
[03:26:48] ================== [PASSED] sriov_packet ===================
[03:26:48] ================= pf_service (11 subtests) =================
[03:26:48] [PASSED] pf_negotiate_any
[03:26:48] [PASSED] pf_negotiate_base_match
[03:26:48] [PASSED] pf_negotiate_base_newer
[03:26:48] [PASSED] pf_negotiate_base_next
[03:26:48] [SKIPPED] pf_negotiate_base_older (no older minor)
[03:26:48] [PASSED] pf_negotiate_base_prev
[03:26:48] [PASSED] pf_negotiate_latest_match
[03:26:48] [PASSED] pf_negotiate_latest_newer
[03:26:48] [PASSED] pf_negotiate_latest_next
[03:26:48] [SKIPPED] pf_negotiate_latest_older (no older minor)
[03:26:48] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[03:26:48] =================== [PASSED] pf_service ====================
[03:26:48] ================= xe_guc_g2g (2 subtests) ==================
[03:26:48] ============== xe_live_guc_g2g_kunit_default ==============
[03:26:48] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[03:26:48] ============== xe_live_guc_g2g_kunit_allmem ===============
[03:26:48] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[03:26:48] =================== [SKIPPED] xe_guc_g2g ===================
[03:26:48] =================== xe_mocs (2 subtests) ===================
[03:26:48] ================ xe_live_mocs_kernel_kunit ================
[03:26:48] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[03:26:48] ================ xe_live_mocs_reset_kunit =================
[03:26:48] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[03:26:48] ==================== [SKIPPED] xe_mocs =====================
[03:26:48] ================= xe_migrate (2 subtests) ==================
[03:26:48] ================= xe_migrate_sanity_kunit =================
[03:26:48] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[03:26:48] ================== xe_validate_ccs_kunit ==================
[03:26:48] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[03:26:48] =================== [SKIPPED] xe_migrate ===================
[03:26:48] ================== xe_dma_buf (1 subtest) ==================
[03:26:48] ==================== xe_dma_buf_kunit =====================
[03:26:48] ================ [SKIPPED] xe_dma_buf_kunit ================
[03:26:48] =================== [SKIPPED] xe_dma_buf ===================
[03:26:48] ================= xe_bo_shrink (1 subtest) =================
[03:26:48] =================== xe_bo_shrink_kunit ====================
[03:26:48] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[03:26:48] ================== [SKIPPED] xe_bo_shrink ==================
[03:26:48] ==================== xe_bo (2 subtests) ====================
[03:26:48] ================== xe_ccs_migrate_kunit ===================
[03:26:48] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[03:26:48] ==================== xe_bo_evict_kunit ====================
[03:26:48] =============== [SKIPPED] xe_bo_evict_kunit ================
[03:26:48] ===================== [SKIPPED] xe_bo ======================
[03:26:48] =================== xe_any (9 subtests) ====================
[03:26:48] [PASSED] test_to_xe
[03:26:48] [PASSED] test_to_dev
[03:26:48] [PASSED] test_to_pdev
[03:26:48] [PASSED] test_to_drm
[03:26:48] [PASSED] test_if_pdev
[03:26:48] [PASSED] test_if_xe
[03:26:48] [PASSED] test_if_tile
[03:26:48] [PASSED] test_if_gt
[03:26:48] [PASSED] test_to_id
[03:26:48] ===================== [PASSED] xe_any ======================
[03:26:48] ==================== args (13 subtests) ====================
[03:26:48] [PASSED] count_args_test
[03:26:48] [PASSED] call_args_example
[03:26:48] [PASSED] call_args_test
[03:26:48] [PASSED] drop_first_arg_example
[03:26:48] [PASSED] drop_first_arg_test
[03:26:48] [PASSED] first_arg_example
[03:26:48] [PASSED] first_arg_test
[03:26:48] [PASSED] last_arg_example
[03:26:48] [PASSED] last_arg_test
[03:26:48] [PASSED] pick_arg_example
[03:26:48] [PASSED] if_args_example
[03:26:48] [PASSED] if_args_test
[03:26:48] [PASSED] sep_comma_example
[03:26:48] ====================== [PASSED] args =======================
[03:26:48] =================== xe_pci (3 subtests) ====================
[03:26:48] ==================== check_graphics_ip ====================
[03:26:48] [PASSED] 12.00 Xe_LP
[03:26:48] [PASSED] 12.10 Xe_LP+
[03:26:48] [PASSED] 12.55 Xe_HPG
[03:26:48] [PASSED] 12.60 Xe_HPC
[03:26:48] [PASSED] 12.70 Xe_LPG
[03:26:48] [PASSED] 12.71 Xe_LPG
[03:26:48] [PASSED] 12.74 Xe_LPG+
[03:26:48] [PASSED] 20.01 Xe2_HPG
[03:26:48] [PASSED] 20.02 Xe2_HPG
[03:26:48] [PASSED] 20.04 Xe2_LPG
[03:26:48] [PASSED] 30.00 Xe3_LPG
[03:26:48] [PASSED] 30.01 Xe3_LPG
[03:26:48] [PASSED] 30.03 Xe3_LPG
[03:26:48] [PASSED] 30.04 Xe3_LPG
[03:26:48] [PASSED] 30.05 Xe3_LPG
[03:26:48] [PASSED] 35.10 Xe3p_LPG
[03:26:48] [PASSED] 35.11 Xe3p_XPC
[03:26:48] ================ [PASSED] check_graphics_ip ================
[03:26:48] ===================== check_media_ip ======================
[03:26:48] [PASSED] 12.00 Xe_M
[03:26:48] [PASSED] 12.55 Xe_HPM
[03:26:48] [PASSED] 13.00 Xe_LPM+
[03:26:48] [PASSED] 13.01 Xe2_HPM
[03:26:48] [PASSED] 20.00 Xe2_LPM
[03:26:48] [PASSED] 30.00 Xe3_LPM
[03:26:48] [PASSED] 30.02 Xe3_LPM
[03:26:48] [PASSED] 35.00 Xe3p_LPM
[03:26:48] [PASSED] 35.03 Xe3p_HPM
[03:26:48] ================= [PASSED] check_media_ip ==================
[03:26:48] =================== check_platform_desc ===================
[03:26:48] [PASSED] 0x9A60 (TIGERLAKE)
[03:26:48] [PASSED] 0x9A68 (TIGERLAKE)
[03:26:48] [PASSED] 0x9A70 (TIGERLAKE)
[03:26:48] [PASSED] 0x9A40 (TIGERLAKE)
[03:26:48] [PASSED] 0x9A49 (TIGERLAKE)
[03:26:48] [PASSED] 0x9A59 (TIGERLAKE)
[03:26:48] [PASSED] 0x9A78 (TIGERLAKE)
[03:26:48] [PASSED] 0x9AC0 (TIGERLAKE)
[03:26:48] [PASSED] 0x9AC9 (TIGERLAKE)
[03:26:48] [PASSED] 0x9AD9 (TIGERLAKE)
[03:26:48] [PASSED] 0x9AF8 (TIGERLAKE)
[03:26:48] [PASSED] 0x4C80 (ROCKETLAKE)
[03:26:48] [PASSED] 0x4C8A (ROCKETLAKE)
[03:26:48] [PASSED] 0x4C8B (ROCKETLAKE)
[03:26:48] [PASSED] 0x4C8C (ROCKETLAKE)
[03:26:48] [PASSED] 0x4C90 (ROCKETLAKE)
[03:26:48] [PASSED] 0x4C9A (ROCKETLAKE)
[03:26:48] [PASSED] 0x4680 (ALDERLAKE_S)
[03:26:48] [PASSED] 0x4682 (ALDERLAKE_S)
[03:26:48] [PASSED] 0x4688 (ALDERLAKE_S)
[03:26:48] [PASSED] 0x468A (ALDERLAKE_S)
[03:26:48] [PASSED] 0x468B (ALDERLAKE_S)
[03:26:48] [PASSED] 0x4690 (ALDERLAKE_S)
[03:26:48] [PASSED] 0x4692 (ALDERLAKE_S)
[03:26:48] [PASSED] 0x4693 (ALDERLAKE_S)
[03:26:48] [PASSED] 0x46A0 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46A1 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46A2 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46A3 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46A6 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46A8 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46AA (ALDERLAKE_P)
[03:26:48] [PASSED] 0x462A (ALDERLAKE_P)
[03:26:48] [PASSED] 0x4626 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x4628 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46B0 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46B1 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46B2 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46B3 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46C0 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46C1 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46C2 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46C3 (ALDERLAKE_P)
[03:26:48] [PASSED] 0x46D0 (ALDERLAKE_N)
[03:26:48] [PASSED] 0x46D1 (ALDERLAKE_N)
[03:26:48] [PASSED] 0x46D2 (ALDERLAKE_N)
[03:26:48] [PASSED] 0x46D3 (ALDERLAKE_N)
[03:26:48] [PASSED] 0x46D4 (ALDERLAKE_N)
[03:26:48] [PASSED] 0xA721 (ALDERLAKE_P)
[03:26:48] [PASSED] 0xA7A1 (ALDERLAKE_P)
[03:26:48] [PASSED] 0xA7A9 (ALDERLAKE_P)
[03:26:48] [PASSED] 0xA7AC (ALDERLAKE_P)
[03:26:48] [PASSED] 0xA7AD (ALDERLAKE_P)
[03:26:48] [PASSED] 0xA720 (ALDERLAKE_P)
[03:26:48] [PASSED] 0xA7A0 (ALDERLAKE_P)
[03:26:48] [PASSED] 0xA7A8 (ALDERLAKE_P)
[03:26:48] [PASSED] 0xA7AA (ALDERLAKE_P)
[03:26:48] [PASSED] 0xA7AB (ALDERLAKE_P)
[03:26:48] [PASSED] 0xA780 (ALDERLAKE_S)
[03:26:48] [PASSED] 0xA781 (ALDERLAKE_S)
[03:26:48] [PASSED] 0xA782 (ALDERLAKE_S)
[03:26:48] [PASSED] 0xA783 (ALDERLAKE_S)
[03:26:48] [PASSED] 0xA788 (ALDERLAKE_S)
[03:26:48] [PASSED] 0xA789 (ALDERLAKE_S)
[03:26:48] [PASSED] 0xA78A (ALDERLAKE_S)
[03:26:48] [PASSED] 0xA78B (ALDERLAKE_S)
[03:26:48] [PASSED] 0x4905 (DG1)
[03:26:48] [PASSED] 0x4906 (DG1)
[03:26:48] [PASSED] 0x4907 (DG1)
[03:26:48] [PASSED] 0x4908 (DG1)
[03:26:48] [PASSED] 0x4909 (DG1)
[03:26:48] [PASSED] 0x56C0 (DG2)
[03:26:48] [PASSED] 0x56C2 (DG2)
[03:26:48] [PASSED] 0x56C1 (DG2)
[03:26:48] [PASSED] 0x7D51 (METEORLAKE)
[03:26:48] [PASSED] 0x7DD1 (METEORLAKE)
[03:26:48] [PASSED] 0x7D41 (METEORLAKE)
[03:26:48] [PASSED] 0x7D67 (METEORLAKE)
[03:26:48] [PASSED] 0xB640 (METEORLAKE)
[03:26:48] [PASSED] 0x56A0 (DG2)
[03:26:48] [PASSED] 0x56A1 (DG2)
[03:26:48] [PASSED] 0x56A2 (DG2)
[03:26:48] [PASSED] 0x56BE (DG2)
[03:26:48] [PASSED] 0x56BF (DG2)
[03:26:48] [PASSED] 0x5690 (DG2)
[03:26:48] [PASSED] 0x5691 (DG2)
[03:26:48] [PASSED] 0x5692 (DG2)
[03:26:48] [PASSED] 0x56A5 (DG2)
[03:26:48] [PASSED] 0x56A6 (DG2)
[03:26:48] [PASSED] 0x56B0 (DG2)
[03:26:48] [PASSED] 0x56B1 (DG2)
[03:26:48] [PASSED] 0x56BA (DG2)
[03:26:48] [PASSED] 0x56BB (DG2)
[03:26:48] [PASSED] 0x56BC (DG2)
[03:26:48] [PASSED] 0x56BD (DG2)
[03:26:48] [PASSED] 0x5693 (DG2)
[03:26:48] [PASSED] 0x5694 (DG2)
[03:26:48] [PASSED] 0x5695 (DG2)
[03:26:48] [PASSED] 0x56A3 (DG2)
[03:26:48] [PASSED] 0x56A4 (DG2)
[03:26:48] [PASSED] 0x56B2 (DG2)
[03:26:48] [PASSED] 0x56B3 (DG2)
[03:26:48] [PASSED] 0x5696 (DG2)
[03:26:48] [PASSED] 0x5697 (DG2)
[03:26:48] [PASSED] 0xB69 (PVC)
[03:26:48] [PASSED] 0xB6E (PVC)
[03:26:48] [PASSED] 0xBD4 (PVC)
[03:26:48] [PASSED] 0xBD5 (PVC)
[03:26:48] [PASSED] 0xBD6 (PVC)
[03:26:48] [PASSED] 0xBD7 (PVC)
[03:26:48] [PASSED] 0xBD8 (PVC)
[03:26:48] [PASSED] 0xBD9 (PVC)
[03:26:48] [PASSED] 0xBDA (PVC)
[03:26:48] [PASSED] 0xBDB (PVC)
[03:26:48] [PASSED] 0xBE0 (PVC)
[03:26:48] [PASSED] 0xBE1 (PVC)
[03:26:48] [PASSED] 0xBE5 (PVC)
[03:26:48] [PASSED] 0x7D40 (METEORLAKE)
[03:26:48] [PASSED] 0x7D45 (METEORLAKE)
[03:26:48] [PASSED] 0x7D55 (METEORLAKE)
[03:26:48] [PASSED] 0x7D60 (METEORLAKE)
[03:26:48] [PASSED] 0x7DD5 (METEORLAKE)
[03:26:48] [PASSED] 0x6420 (LUNARLAKE)
[03:26:48] [PASSED] 0x64A0 (LUNARLAKE)
[03:26:48] [PASSED] 0x64B0 (LUNARLAKE)
[03:26:48] [PASSED] 0xE202 (BATTLEMAGE)
[03:26:48] [PASSED] 0xE209 (BATTLEMAGE)
[03:26:48] [PASSED] 0xE20B (BATTLEMAGE)
[03:26:48] [PASSED] 0xE20C (BATTLEMAGE)
[03:26:48] [PASSED] 0xE20D (BATTLEMAGE)
[03:26:48] [PASSED] 0xE210 (BATTLEMAGE)
[03:26:48] [PASSED] 0xE211 (BATTLEMAGE)
[03:26:48] [PASSED] 0xE212 (BATTLEMAGE)
[03:26:48] [PASSED] 0xE216 (BATTLEMAGE)
[03:26:48] [PASSED] 0xE220 (BATTLEMAGE)
[03:26:48] [PASSED] 0xE221 (BATTLEMAGE)
[03:26:48] [PASSED] 0xE222 (BATTLEMAGE)
[03:26:48] [PASSED] 0xE223 (BATTLEMAGE)
[03:26:48] [PASSED] 0xB080 (PANTHERLAKE)
[03:26:48] [PASSED] 0xB081 (PANTHERLAKE)
[03:26:48] [PASSED] 0xB082 (PANTHERLAKE)
[03:26:48] [PASSED] 0xB083 (PANTHERLAKE)
[03:26:48] [PASSED] 0xB084 (PANTHERLAKE)
[03:26:48] [PASSED] 0xB085 (PANTHERLAKE)
[03:26:48] [PASSED] 0xB086 (PANTHERLAKE)
[03:26:48] [PASSED] 0xB087 (PANTHERLAKE)
[03:26:48] [PASSED] 0xB08F (PANTHERLAKE)
[03:26:48] [PASSED] 0xB090 (PANTHERLAKE)
[03:26:48] [PASSED] 0xB0A0 (PANTHERLAKE)
[03:26:48] [PASSED] 0xB0A1 (PANTHERLAKE)
[03:26:48] [PASSED] 0xB0B0 (PANTHERLAKE)
[03:26:48] [PASSED] 0xFD80 (PANTHERLAKE)
[03:26:48] [PASSED] 0xFD81 (PANTHERLAKE)
[03:26:48] [PASSED] 0xD740 (NOVALAKE_S)
[03:26:48] [PASSED] 0xD741 (NOVALAKE_S)
[03:26:48] [PASSED] 0xD742 (NOVALAKE_S)
[03:26:48] [PASSED] 0xD743 (NOVALAKE_S)
[03:26:48] [PASSED] 0xD745 (NOVALAKE_S)
[03:26:48] [PASSED] 0xD74A (NOVALAKE_S)
[03:26:48] [PASSED] 0xD74B (NOVALAKE_S)
[03:26:48] [PASSED] 0x674C (CRESCENTISLAND)
[03:26:48] [PASSED] 0x674D (CRESCENTISLAND)
[03:26:48] [PASSED] 0x674E (CRESCENTISLAND)
[03:26:48] [PASSED] 0x674F (CRESCENTISLAND)
[03:26:48] [PASSED] 0x6750 (CRESCENTISLAND)
[03:26:48] [PASSED] 0x6751 (CRESCENTISLAND)
[03:26:48] [PASSED] 0xD750 (NOVALAKE_P)
[03:26:48] [PASSED] 0xD751 (NOVALAKE_P)
[03:26:48] [PASSED] 0xD752 (NOVALAKE_P)
[03:26:48] [PASSED] 0xD753 (NOVALAKE_P)
[03:26:48] [PASSED] 0xD754 (NOVALAKE_P)
[03:26:48] [PASSED] 0xD755 (NOVALAKE_P)
[03:26:48] [PASSED] 0xD756 (NOVALAKE_P)
[03:26:48] [PASSED] 0xD757 (NOVALAKE_P)
[03:26:48] [PASSED] 0xD75F (NOVALAKE_P)
[03:26:48] =============== [PASSED] check_platform_desc ===============
[03:26:48] ===================== [PASSED] xe_pci ======================
[03:26:48] ============= xe_rtp_tables_test (5 subtests) ==============
[03:26:48] ================== xe_rtp_table_gt_test ===================
[03:26:48] [PASSED] gt_was/14011060649
[03:26:48] [PASSED] gt_was/14011059788
[03:26:48] [PASSED] gt_was/14015795083
[03:26:48] [PASSED] gt_was/16021867713
[03:26:48] [PASSED] gt_was/14019449301
[03:26:48] [PASSED] gt_was/16028005424
[03:26:48] [PASSED] gt_was/14026578760
[03:26:48] [PASSED] gt_was/1409420604
[03:26:48] [PASSED] gt_was/1408615072
[03:26:48] [PASSED] gt_was/22010523718
[03:26:48] [PASSED] gt_was/14011006942
[03:26:48] [PASSED] gt_was/14014830051
[03:26:48] [PASSED] gt_was/18018781329
[03:26:48] [PASSED] gt_was/1509235366
[03:26:48] [PASSED] gt_was/18018781329
[03:26:48] [PASSED] gt_was/16016694945
[03:26:48] [PASSED] gt_was/14018575942
[03:26:48] [PASSED] gt_was/22016670082
[03:26:48] [PASSED] gt_was/22016670082
[03:26:48] [PASSED] gt_was/14017421178
[03:26:48] [PASSED] gt_was/16025250150
[03:26:48] [PASSED] gt_was/14021871409
[03:26:48] [PASSED] gt_was/16021865536
[03:26:48] [PASSED] gt_was/14021486841
[03:26:48] [PASSED] gt_was/14025160223
[03:26:48] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[03:26:48] [PASSED] gt_was/14025635424
[03:26:48] [PASSED] gt_was/16028005424
[03:26:48] ============== [PASSED] xe_rtp_table_gt_test ===============
[03:26:48] ================== xe_rtp_table_gt_test ===================
[03:26:48] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[03:26:48] [PASSED] gt_tunings/Tuning: 32B Access Enable
[03:26:48] [PASSED] gt_tunings/Tuning: L3 cache
[03:26:48] [PASSED] gt_tunings/Tuning: L3 cache - media
[03:26:48] [PASSED] gt_tunings/Tuning: Compression Overfetch
[03:26:48] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[03:26:48] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[03:26:48] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[03:26:48] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[03:26:48] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[03:26:48] [PASSED] gt_tunings/Tuning: Stateless compression control
[03:26:48] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[03:26:48] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[03:26:48] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[03:26:48] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[03:26:48] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[03:26:48] ============== [PASSED] xe_rtp_table_gt_test ===============
[03:26:48] ================== xe_rtp_table_oob_test ==================
[03:26:48] [PASSED] oob_was/1607983814
[03:26:48] [PASSED] oob_was/16010904313
[03:26:48] [PASSED] oob_was/18022495364
[03:26:48] [PASSED] oob_was/22012773006
[03:26:48] [PASSED] oob_was/14014475959
[03:26:48] [PASSED] oob_was/22011391025
[03:26:48] [PASSED] oob_was/22012727170
[03:26:48] [PASSED] oob_was/22012727685
[03:26:48] [PASSED] oob_was/22016596838
[03:26:48] [PASSED] oob_was/18020744125
[03:26:48] [PASSED] oob_was/1409600907
[03:26:48] [PASSED] oob_was/22014953428
[03:26:48] [PASSED] oob_was/16017236439
[03:26:48] [PASSED] oob_was/14019821291
[03:26:48] [PASSED] oob_was/14015076503
[03:26:48] [PASSED] oob_was/22016122933
[03:26:48] [PASSED] oob_was/14018913170
[03:26:48] [PASSED] oob_was/14018094691
[03:26:48] [PASSED] oob_was/18024947630
[03:26:48] [PASSED] oob_was/16022287689
[03:26:48] [PASSED] oob_was/13011645652
[03:26:48] [PASSED] oob_was/14022293748
[03:26:48] [PASSED] oob_was/22019794406
[03:26:48] [PASSED] oob_was/22019338487
[03:26:48] [PASSED] oob_was/16023588340
[03:26:48] [PASSED] oob_was/14019789679
[03:26:48] [PASSED] oob_was/14022866841
[03:26:48] [PASSED] oob_was/16021333562
[03:26:48] [PASSED] oob_was/14016712196
[03:26:48] [PASSED] oob_was/14015568240
[03:26:48] [PASSED] oob_was/18013179988
[03:26:48] [PASSED] oob_was/1508761755
[03:26:48] [PASSED] oob_was/16023105232
[03:26:48] [PASSED] oob_was/16026508708
[03:26:48] [PASSED] oob_was/14020001231
[03:26:48] [PASSED] oob_was/16023683509
[03:26:48] [PASSED] oob_was/14025515070
[03:26:48] [PASSED] oob_was/15015404425_disable
[03:26:48] [PASSED] oob_was/16026007364
[03:26:48] [PASSED] oob_was/14020316580
[03:26:48] [PASSED] oob_was/14025883347
[03:26:48] [PASSED] oob_was/16029380221
[03:26:48] [PASSED] oob_was/22022079272
[03:26:48] [PASSED] oob_was/16029897822
[03:26:48] [PASSED] oob_was/14027054324
[03:26:48] [PASSED] oob_was/14025941587
[03:26:48] [PASSED] oob_was/16030224309
[03:26:48] ============== [PASSED] xe_rtp_table_oob_test ==============
[03:26:48] ================ xe_rtp_table_dev_oob_test ================
[03:26:48] [PASSED] device_oob_was/22010954014
[03:26:48] [PASSED] device_oob_was/15015404425
[03:26:48] [PASSED] device_oob_was/22019338487_display
[03:26:48] [PASSED] device_oob_was/14022085890
[03:26:48] [PASSED] device_oob_was/14026539277
[03:26:48] [PASSED] device_oob_was/14026633728
[03:26:48] [PASSED] device_oob_was/14026746987
[03:26:48] [PASSED] device_oob_was/14026779378
[03:26:48] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[03:26:48] ========== xe_rtp_table_missing_upper_bound_test ==========
[03:26:48] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[03:26:48] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[03:26:48] [PASSED] register_whitelist/1806527549
[03:26:48] [PASSED] register_whitelist/allow_read_ctx_timestamp
[03:26:48] [PASSED] register_whitelist/allow_read_queue_timestamp
[03:26:48] [PASSED] register_whitelist/16014440446
[03:26:48] [PASSED] register_whitelist/16017236439
[03:26:48] [PASSED] register_whitelist/16020183090
[03:26:48] [PASSED] register_whitelist/14024997852
[03:26:48] [PASSED] register_whitelist/14024997852
[03:26:48] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[03:26:48] =============== [PASSED] xe_rtp_tables_test ================
[03:26:48] =================== xe_rtp (3 subtests) ====================
[03:26:48] =================== xe_rtp_rules_tests ====================
[03:26:48] [PASSED] no
[03:26:48] [PASSED] yes
[03:26:48] [PASSED] no-and-no
[03:26:48] [PASSED] no-and-yes
[03:26:48] [PASSED] yes-and-no
[03:26:48] [PASSED] yes-and-yes
[03:26:48] [PASSED] no-or-no
[03:26:48] [PASSED] no-or-yes
[03:26:48] [PASSED] yes-or-no
[03:26:48] [PASSED] yes-or-yes
[03:26:48] [PASSED] no-yes-or-yes-no
[03:26:48] [PASSED] no-yes-or-yes-yes
[03:26:48] [PASSED] yes-yes-or-no-yes
[03:26:48] [PASSED] yes-yes-or-yes-yes
[03:26:48] [PASSED] no-no-or-yes-or-no
[03:26:48] [PASSED] or
[03:26:48] [PASSED] or-yes
[03:26:48] [PASSED] or-no
[03:26:48] [PASSED] yes-or
[03:26:48] [PASSED] no-or
[03:26:48] [PASSED] no-or-or-yes
[03:26:48] [PASSED] yes-or-or-no
[03:26:48] [PASSED] no-or-or-no
[03:26:48] [PASSED] missing-context-engine-class
[03:26:48] [PASSED] missing-context-engine-class-or-yes
[03:26:48] [PASSED] missing-context-engine-class-or-or-yes
[03:26:48] =============== [PASSED] xe_rtp_rules_tests ================
[03:26:48] =============== xe_rtp_process_to_sr_tests ================
[03:26:48] [PASSED] coalesce-same-reg
[03:26:48] [PASSED] coalesce-same-reg-literal-and-func
[03:26:48] [PASSED] no-match-no-add
[03:26:48] [PASSED] two-regs-two-entries
[03:26:48] [PASSED] clr-one-set-other
[03:26:48] [PASSED] set-field
[03:26:48] [PASSED] conflict-duplicate
[03:26:48] [PASSED] conflict-not-disjoint
[03:26:48] [PASSED] conflict-not-disjoint-literal-and-func
[03:26:48] [PASSED] conflict-reg-type
[03:26:48] [PASSED] bad-mcr-reg-forced-to-regular
[03:26:48] [PASSED] bad-regular-reg-forced-to-mcr
[03:26:48] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[03:26:48] ================== xe_rtp_process_tests ===================
[03:26:48] [PASSED] active1
[03:26:48] [PASSED] active2
[03:26:48] [PASSED] active-inactive
[03:26:48] [PASSED] inactive-active
[03:26:48] [PASSED] inactive-active-inactive
[03:26:48] [PASSED] inactive-inactive-inactive
[03:26:48] ============== [PASSED] xe_rtp_process_tests ===============
[03:26:48] ===================== [PASSED] xe_rtp ======================
[03:26:48] ==================== xe_wa (1 subtest) =====================
[03:26:48] ======================== xe_wa_gt =========================
[03:26:48] [PASSED] TIGERLAKE B0
[03:26:48] [PASSED] DG1 A0
[03:26:48] [PASSED] DG1 B0
[03:26:48] [PASSED] ALDERLAKE_S A0
[03:26:48] [PASSED] ALDERLAKE_S B0
[03:26:48] [PASSED] ALDERLAKE_S C0
[03:26:48] [PASSED] ALDERLAKE_S D0
[03:26:48] [PASSED] ALDERLAKE_P A0
[03:26:48] [PASSED] ALDERLAKE_P B0
[03:26:48] [PASSED] ALDERLAKE_P C0
[03:26:48] [PASSED] ALDERLAKE_S RPLS D0
[03:26:48] [PASSED] ALDERLAKE_P RPLU E0
[03:26:48] [PASSED] DG2 G10 C0
[03:26:48] [PASSED] DG2 G11 B1
[03:26:48] [PASSED] DG2 G12 A1
[03:26:48] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[03:26:48] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[03:26:48] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[03:26:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[03:26:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[03:26:48] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[03:26:48] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[03:26:48] ==================== [PASSED] xe_wa_gt =====================
[03:26:48] ====================== [PASSED] xe_wa ======================
[03:26:48] ============================================================
[03:26:48] Testing complete. Ran 837 tests: passed: 809, skipped: 28
[03:26:48] Elapsed time: 42.201s total, 1.858s configuring, 39.576s building, 0.725s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[03:26:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:26:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:27:15] Starting KUnit Kernel (1/1)...
[03:27:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:27:15] ============ drm_test_pick_cmdline (2 subtests) ============
[03:27:15] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[03:27:15] =============== drm_test_pick_cmdline_named ===============
[03:27:15] [PASSED] NTSC
[03:27:15] [PASSED] NTSC-J
[03:27:15] [PASSED] PAL
[03:27:15] [PASSED] PAL-M
[03:27:15] =========== [PASSED] drm_test_pick_cmdline_named ===========
[03:27:15] ============== [PASSED] drm_test_pick_cmdline ==============
[03:27:15] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[03:27:15] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[03:27:15] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[03:27:15] =========== drm_validate_clone_mode (2 subtests) ===========
[03:27:15] ============== drm_test_check_in_clone_mode ===============
[03:27:15] [PASSED] in_clone_mode
[03:27:15] [PASSED] not_in_clone_mode
[03:27:15] ========== [PASSED] drm_test_check_in_clone_mode ===========
[03:27:15] =============== drm_test_check_valid_clones ===============
[03:27:15] [PASSED] not_in_clone_mode
[03:27:15] [PASSED] valid_clone
[03:27:15] [PASSED] invalid_clone
[03:27:15] =========== [PASSED] drm_test_check_valid_clones ===========
[03:27:15] ============= [PASSED] drm_validate_clone_mode =============
[03:27:15] ============= drm_validate_modeset (1 subtest) =============
[03:27:15] [PASSED] drm_test_check_connector_changed_modeset
[03:27:15] ============== [PASSED] drm_validate_modeset ===============
[03:27:15] ====== drm_test_bridge_get_current_state (1 subtest) =======
[03:27:15] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[03:27:15] ======== [PASSED] drm_test_bridge_get_current_state ========
[03:27:15] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[03:27:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[03:27:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[03:27:15] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[03:27:15] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[03:27:15] ============== drm_bridge_alloc (2 subtests) ===============
[03:27:15] [PASSED] drm_test_drm_bridge_alloc_basic
[03:27:15] [PASSED] drm_test_drm_bridge_alloc_get_put
[03:27:15] ================ [PASSED] drm_bridge_alloc =================
[03:27:15] ============= drm_bridge_bus_fmt (5 subtests) ==============
[03:27:15] [PASSED] drm_test_bridge_rgb_yuv_rgb
[03:27:15] [PASSED] drm_test_bridge_must_convert_to_yuv444
[03:27:15] [PASSED] drm_test_bridge_hdmi_auto_rgb
[03:27:15] [PASSED] drm_test_bridge_auto_first
[03:27:15] [PASSED] drm_test_bridge_rgb_yuv_no_path
[03:27:15] =============== [PASSED] drm_bridge_bus_fmt ================
[03:27:15] ============= drm_cmdline_parser (40 subtests) =============
[03:27:15] [PASSED] drm_test_cmdline_force_d_only
[03:27:15] [PASSED] drm_test_cmdline_force_D_only_dvi
[03:27:15] [PASSED] drm_test_cmdline_force_D_only_hdmi
[03:27:15] [PASSED] drm_test_cmdline_force_D_only_not_digital
[03:27:15] [PASSED] drm_test_cmdline_force_e_only
[03:27:15] [PASSED] drm_test_cmdline_res
[03:27:15] [PASSED] drm_test_cmdline_res_vesa
[03:27:15] [PASSED] drm_test_cmdline_res_vesa_rblank
[03:27:15] [PASSED] drm_test_cmdline_res_rblank
[03:27:15] [PASSED] drm_test_cmdline_res_bpp
[03:27:15] [PASSED] drm_test_cmdline_res_refresh
[03:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh
[03:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[03:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[03:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[03:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[03:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[03:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[03:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[03:27:15] [PASSED] drm_test_cmdline_res_margins_force_on
[03:27:15] [PASSED] drm_test_cmdline_res_vesa_margins
[03:27:15] [PASSED] drm_test_cmdline_name
[03:27:15] [PASSED] drm_test_cmdline_name_bpp
[03:27:15] [PASSED] drm_test_cmdline_name_option
[03:27:15] [PASSED] drm_test_cmdline_name_bpp_option
[03:27:15] [PASSED] drm_test_cmdline_rotate_0
[03:27:15] [PASSED] drm_test_cmdline_rotate_90
[03:27:15] [PASSED] drm_test_cmdline_rotate_180
[03:27:15] [PASSED] drm_test_cmdline_rotate_270
[03:27:15] [PASSED] drm_test_cmdline_hmirror
[03:27:15] [PASSED] drm_test_cmdline_vmirror
[03:27:15] [PASSED] drm_test_cmdline_margin_options
[03:27:15] [PASSED] drm_test_cmdline_multiple_options
[03:27:15] [PASSED] drm_test_cmdline_bpp_extra_and_option
[03:27:15] [PASSED] drm_test_cmdline_extra_and_option
[03:27:15] [PASSED] drm_test_cmdline_freestanding_options
[03:27:15] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[03:27:15] [PASSED] drm_test_cmdline_panel_orientation
[03:27:15] ================ drm_test_cmdline_invalid =================
[03:27:15] [PASSED] margin_only
[03:27:15] [PASSED] interlace_only
[03:27:15] [PASSED] res_missing_x
[03:27:15] [PASSED] res_missing_y
[03:27:15] [PASSED] res_bad_y
[03:27:15] [PASSED] res_missing_y_bpp
[03:27:15] [PASSED] res_bad_bpp
[03:27:15] [PASSED] res_bad_refresh
[03:27:15] [PASSED] res_bpp_refresh_force_on_off
[03:27:15] [PASSED] res_invalid_mode
[03:27:15] [PASSED] res_bpp_wrong_place_mode
[03:27:15] [PASSED] name_bpp_refresh
[03:27:15] [PASSED] name_refresh
[03:27:15] [PASSED] name_refresh_wrong_mode
[03:27:15] [PASSED] name_refresh_invalid_mode
[03:27:15] [PASSED] rotate_multiple
[03:27:15] [PASSED] rotate_invalid_val
[03:27:15] [PASSED] rotate_truncated
[03:27:15] [PASSED] invalid_option
[03:27:15] [PASSED] invalid_tv_option
[03:27:15] [PASSED] truncated_tv_option
[03:27:15] ============ [PASSED] drm_test_cmdline_invalid =============
[03:27:15] =============== drm_test_cmdline_tv_options ===============
[03:27:15] [PASSED] NTSC
[03:27:15] [PASSED] NTSC_443
[03:27:15] [PASSED] NTSC_J
[03:27:15] [PASSED] PAL
[03:27:15] [PASSED] PAL_M
[03:27:15] [PASSED] PAL_N
[03:27:15] [PASSED] SECAM
[03:27:15] [PASSED] MONO_525
[03:27:15] [PASSED] MONO_625
[03:27:15] =========== [PASSED] drm_test_cmdline_tv_options ===========
[03:27:15] =============== [PASSED] drm_cmdline_parser ================
[03:27:15] ========== drmm_connector_hdmi_init (20 subtests) ==========
[03:27:15] [PASSED] drm_test_connector_hdmi_init_valid
[03:27:15] [PASSED] drm_test_connector_hdmi_init_bpc_8
[03:27:15] [PASSED] drm_test_connector_hdmi_init_bpc_10
[03:27:15] [PASSED] drm_test_connector_hdmi_init_bpc_12
[03:27:15] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[03:27:15] [PASSED] drm_test_connector_hdmi_init_bpc_null
[03:27:15] [PASSED] drm_test_connector_hdmi_init_formats_empty
[03:27:15] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[03:27:15] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[03:27:15] [PASSED] supported_formats=0x9 yuv420_allowed=1
[03:27:15] [PASSED] supported_formats=0x9 yuv420_allowed=0
[03:27:15] [PASSED] supported_formats=0x5 yuv420_allowed=1
[03:27:15] [PASSED] supported_formats=0x5 yuv420_allowed=0
[03:27:15] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[03:27:15] [PASSED] drm_test_connector_hdmi_init_null_ddc
[03:27:15] [PASSED] drm_test_connector_hdmi_init_null_product
[03:27:15] [PASSED] drm_test_connector_hdmi_init_null_vendor
[03:27:15] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[03:27:15] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[03:27:15] [PASSED] drm_test_connector_hdmi_init_product_valid
[03:27:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[03:27:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[03:27:15] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[03:27:15] ========= drm_test_connector_hdmi_init_type_valid =========
[03:27:15] [PASSED] HDMI-A
[03:27:15] [PASSED] HDMI-B
[03:27:15] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[03:27:15] ======== drm_test_connector_hdmi_init_type_invalid ========
[03:27:15] [PASSED] Unknown
[03:27:15] [PASSED] VGA
[03:27:15] [PASSED] DVI-I
[03:27:15] [PASSED] DVI-D
[03:27:15] [PASSED] DVI-A
[03:27:15] [PASSED] Composite
[03:27:15] [PASSED] SVIDEO
[03:27:15] [PASSED] LVDS
[03:27:15] [PASSED] Component
[03:27:15] [PASSED] DIN
[03:27:15] [PASSED] DP
[03:27:15] [PASSED] TV
[03:27:15] [PASSED] eDP
[03:27:15] [PASSED] Virtual
[03:27:15] [PASSED] DSI
[03:27:15] [PASSED] DPI
[03:27:15] [PASSED] Writeback
[03:27:15] [PASSED] SPI
[03:27:15] [PASSED] USB
[03:27:15] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[03:27:15] ============ [PASSED] drmm_connector_hdmi_init =============
[03:27:15] ============= drmm_connector_init (3 subtests) =============
[03:27:15] [PASSED] drm_test_drmm_connector_init
[03:27:15] [PASSED] drm_test_drmm_connector_init_null_ddc
[03:27:15] ========= drm_test_drmm_connector_init_type_valid =========
[03:27:15] [PASSED] Unknown
[03:27:15] [PASSED] VGA
[03:27:15] [PASSED] DVI-I
[03:27:15] [PASSED] DVI-D
[03:27:15] [PASSED] DVI-A
[03:27:15] [PASSED] Composite
[03:27:15] [PASSED] SVIDEO
[03:27:15] [PASSED] LVDS
[03:27:15] [PASSED] Component
[03:27:15] [PASSED] DIN
[03:27:15] [PASSED] DP
[03:27:15] [PASSED] HDMI-A
[03:27:15] [PASSED] HDMI-B
[03:27:15] [PASSED] TV
[03:27:15] [PASSED] eDP
[03:27:15] [PASSED] Virtual
[03:27:15] [PASSED] DSI
[03:27:15] [PASSED] DPI
[03:27:15] [PASSED] Writeback
[03:27:15] [PASSED] SPI
[03:27:15] [PASSED] USB
[03:27:15] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[03:27:15] =============== [PASSED] drmm_connector_init ===============
[03:27:15] ========= drm_connector_dynamic_init (6 subtests) ==========
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_init
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_init_properties
[03:27:15] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[03:27:15] [PASSED] Unknown
[03:27:15] [PASSED] VGA
[03:27:15] [PASSED] DVI-I
[03:27:15] [PASSED] DVI-D
[03:27:15] [PASSED] DVI-A
[03:27:15] [PASSED] Composite
[03:27:15] [PASSED] SVIDEO
[03:27:15] [PASSED] LVDS
[03:27:15] [PASSED] Component
[03:27:15] [PASSED] DIN
[03:27:15] [PASSED] DP
[03:27:15] [PASSED] HDMI-A
[03:27:15] [PASSED] HDMI-B
[03:27:15] [PASSED] TV
[03:27:15] [PASSED] eDP
[03:27:15] [PASSED] Virtual
[03:27:15] [PASSED] DSI
[03:27:15] [PASSED] DPI
[03:27:15] [PASSED] Writeback
[03:27:15] [PASSED] SPI
[03:27:15] [PASSED] USB
[03:27:15] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[03:27:15] ======== drm_test_drm_connector_dynamic_init_name =========
[03:27:15] [PASSED] Unknown
[03:27:15] [PASSED] VGA
[03:27:15] [PASSED] DVI-I
[03:27:15] [PASSED] DVI-D
[03:27:15] [PASSED] DVI-A
[03:27:15] [PASSED] Composite
[03:27:15] [PASSED] SVIDEO
[03:27:15] [PASSED] LVDS
[03:27:15] [PASSED] Component
[03:27:15] [PASSED] DIN
[03:27:15] [PASSED] DP
[03:27:15] [PASSED] HDMI-A
[03:27:15] [PASSED] HDMI-B
[03:27:15] [PASSED] TV
[03:27:15] [PASSED] eDP
[03:27:15] [PASSED] Virtual
[03:27:15] [PASSED] DSI
[03:27:15] [PASSED] DPI
[03:27:15] [PASSED] Writeback
[03:27:15] [PASSED] SPI
[03:27:15] [PASSED] USB
[03:27:15] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[03:27:15] =========== [PASSED] drm_connector_dynamic_init ============
[03:27:15] ==== drm_connector_dynamic_register_early (4 subtests) =====
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[03:27:15] ====== [PASSED] drm_connector_dynamic_register_early =======
[03:27:15] ======= drm_connector_dynamic_register (7 subtests) ========
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[03:27:15] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[03:27:15] ========= [PASSED] drm_connector_dynamic_register ==========
[03:27:15] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[03:27:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[03:27:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[03:27:15] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[03:27:15] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[03:27:15] ========== drm_test_get_tv_mode_from_name_valid ===========
[03:27:15] [PASSED] NTSC
[03:27:15] [PASSED] NTSC-443
[03:27:15] [PASSED] NTSC-J
[03:27:15] [PASSED] PAL
[03:27:15] [PASSED] PAL-M
[03:27:15] [PASSED] PAL-N
[03:27:15] [PASSED] SECAM
[03:27:15] [PASSED] Mono
[03:27:15] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[03:27:15] [PASSED] drm_test_get_tv_mode_from_name_truncated
[03:27:15] ============ [PASSED] drm_get_tv_mode_from_name ============
[03:27:15] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[03:27:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[03:27:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[03:27:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[03:27:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[03:27:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[03:27:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[03:27:15] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[03:27:15] [PASSED] VIC 96
[03:27:15] [PASSED] VIC 97
[03:27:15] [PASSED] VIC 101
[03:27:15] [PASSED] VIC 102
[03:27:15] [PASSED] VIC 106
[03:27:15] [PASSED] VIC 107
[03:27:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[03:27:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[03:27:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[03:27:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[03:27:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[03:27:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[03:27:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[03:27:15] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[03:27:15] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[03:27:15] [PASSED] Automatic
[03:27:15] [PASSED] Full
[03:27:15] [PASSED] Limited 16:235
[03:27:15] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[03:27:15] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[03:27:15] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[03:27:15] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[03:27:15] === drm_test_drm_hdmi_connector_get_output_format_name ====
[03:27:15] [PASSED] RGB
[03:27:15] [PASSED] YUV 4:2:0
[03:27:15] [PASSED] YUV 4:2:2
[03:27:15] [PASSED] YUV 4:4:4
[03:27:15] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[03:27:15] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[03:27:15] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[03:27:15] ============= drm_damage_helper (21 subtests) ==============
[03:27:15] [PASSED] drm_test_damage_iter_no_damage
[03:27:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[03:27:15] [PASSED] drm_test_damage_iter_no_damage_src_moved
[03:27:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[03:27:15] [PASSED] drm_test_damage_iter_no_damage_not_visible
[03:27:15] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[03:27:15] [PASSED] drm_test_damage_iter_no_damage_no_fb
[03:27:15] [PASSED] drm_test_damage_iter_simple_damage
[03:27:15] [PASSED] drm_test_damage_iter_single_damage
[03:27:15] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[03:27:15] [PASSED] drm_test_damage_iter_single_damage_outside_src
[03:27:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[03:27:15] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[03:27:15] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[03:27:15] [PASSED] drm_test_damage_iter_single_damage_src_moved
[03:27:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[03:27:15] [PASSED] drm_test_damage_iter_damage
[03:27:15] [PASSED] drm_test_damage_iter_damage_one_intersect
[03:27:15] [PASSED] drm_test_damage_iter_damage_one_outside
[03:27:15] [PASSED] drm_test_damage_iter_damage_src_moved
[03:27:15] [PASSED] drm_test_damage_iter_damage_not_visible
[03:27:15] ================ [PASSED] drm_damage_helper ================
[03:27:15] ============== drm_dp_mst_helper (3 subtests) ==============
[03:27:15] ============== drm_test_dp_mst_calc_pbn_mode ==============
[03:27:15] [PASSED] Clock 154000 BPP 30 DSC disabled
[03:27:15] [PASSED] Clock 234000 BPP 30 DSC disabled
[03:27:15] [PASSED] Clock 297000 BPP 24 DSC disabled
[03:27:15] [PASSED] Clock 332880 BPP 24 DSC enabled
[03:27:15] [PASSED] Clock 324540 BPP 24 DSC enabled
[03:27:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[03:27:15] ============== drm_test_dp_mst_calc_pbn_div ===============
[03:27:15] [PASSED] Link rate 2000000 lane count 4
[03:27:15] [PASSED] Link rate 2000000 lane count 2
[03:27:15] [PASSED] Link rate 2000000 lane count 1
[03:27:15] [PASSED] Link rate 1350000 lane count 4
[03:27:15] [PASSED] Link rate 1350000 lane count 2
[03:27:15] [PASSED] Link rate 1350000 lane count 1
[03:27:15] [PASSED] Link rate 1000000 lane count 4
[03:27:15] [PASSED] Link rate 1000000 lane count 2
[03:27:15] [PASSED] Link rate 1000000 lane count 1
[03:27:15] [PASSED] Link rate 810000 lane count 4
[03:27:15] [PASSED] Link rate 810000 lane count 2
[03:27:15] [PASSED] Link rate 810000 lane count 1
[03:27:15] [PASSED] Link rate 540000 lane count 4
[03:27:15] [PASSED] Link rate 540000 lane count 2
[03:27:15] [PASSED] Link rate 540000 lane count 1
[03:27:15] [PASSED] Link rate 270000 lane count 4
[03:27:15] [PASSED] Link rate 270000 lane count 2
[03:27:15] [PASSED] Link rate 270000 lane count 1
[03:27:15] [PASSED] Link rate 162000 lane count 4
[03:27:15] [PASSED] Link rate 162000 lane count 2
[03:27:15] [PASSED] Link rate 162000 lane count 1
[03:27:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[03:27:15] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[03:27:15] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[03:27:15] [PASSED] DP_POWER_UP_PHY with port number
[03:27:15] [PASSED] DP_POWER_DOWN_PHY with port number
[03:27:15] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[03:27:15] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[03:27:15] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[03:27:15] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[03:27:15] [PASSED] DP_QUERY_PAYLOAD with port number
[03:27:15] [PASSED] DP_QUERY_PAYLOAD with VCPI
[03:27:15] [PASSED] DP_REMOTE_DPCD_READ with port number
[03:27:15] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[03:27:15] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[03:27:15] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[03:27:15] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[03:27:15] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[03:27:15] [PASSED] DP_REMOTE_I2C_READ with port number
[03:27:15] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[03:27:15] [PASSED] DP_REMOTE_I2C_READ with transactions array
[03:27:15] [PASSED] DP_REMOTE_I2C_WRITE with port number
[03:27:15] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[03:27:15] [PASSED] DP_REMOTE_I2C_WRITE with data array
[03:27:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[03:27:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[03:27:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[03:27:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[03:27:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[03:27:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[03:27:15] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[03:27:15] ================ [PASSED] drm_dp_mst_helper ================
[03:27:15] ================== drm_exec (7 subtests) ===================
[03:27:15] [PASSED] sanitycheck
[03:27:15] [PASSED] test_lock
[03:27:15] [PASSED] test_lock_unlock
[03:27:15] [PASSED] test_duplicates
[03:27:15] [PASSED] test_prepare
[03:27:15] [PASSED] test_prepare_array
[03:27:15] [PASSED] test_multiple_loops
[03:27:15] ==================== [PASSED] drm_exec =====================
[03:27:15] =========== drm_format_helper_test (17 subtests) ===========
[03:27:15] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[03:27:15] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[03:27:15] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[03:27:15] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[03:27:15] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[03:27:15] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[03:27:15] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[03:27:15] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[03:27:15] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[03:27:15] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[03:27:15] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[03:27:15] ============== drm_test_fb_xrgb8888_to_mono ===============
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[03:27:15] ==================== drm_test_fb_swab =====================
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ================ [PASSED] drm_test_fb_swab =================
[03:27:15] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[03:27:15] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[03:27:15] [PASSED] single_pixel_source_buffer
[03:27:15] [PASSED] single_pixel_clip_rectangle
[03:27:15] [PASSED] well_known_colors
[03:27:15] [PASSED] destination_pitch
[03:27:15] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[03:27:15] ================= drm_test_fb_clip_offset =================
[03:27:15] [PASSED] pass through
[03:27:15] [PASSED] horizontal offset
[03:27:15] [PASSED] vertical offset
[03:27:15] [PASSED] horizontal and vertical offset
[03:27:15] [PASSED] horizontal offset (custom pitch)
[03:27:15] [PASSED] vertical offset (custom pitch)
[03:27:15] [PASSED] horizontal and vertical offset (custom pitch)
[03:27:15] ============= [PASSED] drm_test_fb_clip_offset =============
[03:27:15] =================== drm_test_fb_memcpy ====================
[03:27:15] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[03:27:15] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[03:27:15] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[03:27:15] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[03:27:15] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[03:27:15] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[03:27:15] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[03:27:15] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[03:27:15] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[03:27:15] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[03:27:15] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[03:27:15] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[03:27:15] =============== [PASSED] drm_test_fb_memcpy ================
[03:27:15] ============= [PASSED] drm_format_helper_test ==============
[03:27:15] ================= drm_format (18 subtests) =================
[03:27:15] [PASSED] drm_test_format_block_width_invalid
[03:27:15] [PASSED] drm_test_format_block_width_one_plane
[03:27:15] [PASSED] drm_test_format_block_width_two_plane
[03:27:15] [PASSED] drm_test_format_block_width_three_plane
[03:27:15] [PASSED] drm_test_format_block_width_tiled
[03:27:15] [PASSED] drm_test_format_block_height_invalid
[03:27:15] [PASSED] drm_test_format_block_height_one_plane
[03:27:15] [PASSED] drm_test_format_block_height_two_plane
[03:27:15] [PASSED] drm_test_format_block_height_three_plane
[03:27:15] [PASSED] drm_test_format_block_height_tiled
[03:27:15] [PASSED] drm_test_format_min_pitch_invalid
[03:27:15] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[03:27:15] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[03:27:15] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[03:27:15] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[03:27:15] [PASSED] drm_test_format_min_pitch_two_plane
[03:27:15] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[03:27:15] [PASSED] drm_test_format_min_pitch_tiled
[03:27:15] =================== [PASSED] drm_format ====================
[03:27:15] ============== drm_framebuffer (10 subtests) ===============
[03:27:15] ========== drm_test_framebuffer_check_src_coords ==========
[03:27:15] [PASSED] Success: source fits into fb
[03:27:15] [PASSED] Fail: overflowing fb with x-axis coordinate
[03:27:15] [PASSED] Fail: overflowing fb with y-axis coordinate
[03:27:15] [PASSED] Fail: overflowing fb with source width
[03:27:15] [PASSED] Fail: overflowing fb with source height
[03:27:15] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[03:27:15] [PASSED] drm_test_framebuffer_cleanup
[03:27:15] =============== drm_test_framebuffer_create ===============
[03:27:15] [PASSED] ABGR8888 normal sizes
[03:27:15] [PASSED] ABGR8888 max sizes
[03:27:15] [PASSED] ABGR8888 pitch greater than min required
[03:27:15] [PASSED] ABGR8888 pitch less than min required
[03:27:15] [PASSED] ABGR8888 Invalid width
[03:27:15] [PASSED] ABGR8888 Invalid buffer handle
[03:27:15] [PASSED] No pixel format
[03:27:15] [PASSED] ABGR8888 Width 0
[03:27:15] [PASSED] ABGR8888 Height 0
[03:27:15] [PASSED] ABGR8888 Out of bound height * pitch combination
[03:27:15] [PASSED] ABGR8888 Large buffer offset
[03:27:15] [PASSED] ABGR8888 Buffer offset for inexistent plane
[03:27:15] [PASSED] ABGR8888 Invalid flag
[03:27:15] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[03:27:15] [PASSED] ABGR8888 Valid buffer modifier
[03:27:15] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[03:27:15] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[03:27:15] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[03:27:15] [PASSED] NV12 Normal sizes
[03:27:15] [PASSED] NV12 Max sizes
[03:27:15] [PASSED] NV12 Invalid pitch
[03:27:15] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[03:27:15] [PASSED] NV12 different modifier per-plane
[03:27:15] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[03:27:15] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[03:27:15] [PASSED] NV12 Modifier for inexistent plane
[03:27:15] [PASSED] NV12 Handle for inexistent plane
[03:27:15] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[03:27:15] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[03:27:15] [PASSED] YVU420 Normal sizes
[03:27:15] [PASSED] YVU420 Max sizes
[03:27:15] [PASSED] YVU420 Invalid pitch
[03:27:15] [PASSED] YVU420 Different pitches
[03:27:15] [PASSED] YVU420 Different buffer offsets/pitches
[03:27:15] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[03:27:15] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[03:27:15] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[03:27:15] [PASSED] YVU420 Valid modifier
[03:27:15] [PASSED] YVU420 Different modifiers per plane
[03:27:15] [PASSED] YVU420 Modifier for inexistent plane
[03:27:15] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[03:27:15] [PASSED] X0L2 Normal sizes
[03:27:15] [PASSED] X0L2 Max sizes
[03:27:15] [PASSED] X0L2 Invalid pitch
[03:27:15] [PASSED] X0L2 Pitch greater than minimum required
[03:27:15] [PASSED] X0L2 Handle for inexistent plane
[03:27:15] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[03:27:15] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[03:27:15] [PASSED] X0L2 Valid modifier
[03:27:15] [PASSED] X0L2 Modifier for inexistent plane
[03:27:15] =========== [PASSED] drm_test_framebuffer_create ===========
[03:27:15] [PASSED] drm_test_framebuffer_free
[03:27:15] [PASSED] drm_test_framebuffer_init
[03:27:15] [PASSED] drm_test_framebuffer_init_bad_format
[03:27:15] [PASSED] drm_test_framebuffer_init_dev_mismatch
[03:27:15] [PASSED] drm_test_framebuffer_lookup
[03:27:15] [PASSED] drm_test_framebuffer_lookup_inexistent
[03:27:15] [PASSED] drm_test_framebuffer_modifiers_not_supported
[03:27:15] ================= [PASSED] drm_framebuffer =================
[03:27:15] ================ drm_gem_shmem (8 subtests) ================
[03:27:15] [PASSED] drm_gem_shmem_test_obj_create
[03:27:15] [PASSED] drm_gem_shmem_test_obj_create_private
[03:27:15] [PASSED] drm_gem_shmem_test_pin_pages
[03:27:15] [PASSED] drm_gem_shmem_test_vmap
[03:27:15] [PASSED] drm_gem_shmem_test_get_sg_table
[03:27:15] [PASSED] drm_gem_shmem_test_get_pages_sgt
[03:27:15] [PASSED] drm_gem_shmem_test_madvise
[03:27:15] [PASSED] drm_gem_shmem_test_purge
[03:27:15] ================== [PASSED] drm_gem_shmem ==================
[03:27:15] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[03:27:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[03:27:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[03:27:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[03:27:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[03:27:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[03:27:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[03:27:15] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[03:27:15] [PASSED] Automatic
[03:27:15] [PASSED] Full
[03:27:15] [PASSED] Limited 16:235
[03:27:15] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[03:27:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[03:27:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[03:27:15] [PASSED] drm_test_check_disable_connector
[03:27:15] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[03:27:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[03:27:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[03:27:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[03:27:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[03:27:15] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[03:27:15] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[03:27:15] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[03:27:15] [PASSED] drm_test_check_output_bpc_dvi
[03:27:15] [PASSED] drm_test_check_output_bpc_format_vic_1
[03:27:15] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[03:27:15] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[03:27:15] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[03:27:15] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[03:27:15] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[03:27:15] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[03:27:15] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[03:27:15] ============ drm_test_check_hdmi_color_format =============
[03:27:15] [PASSED] AUTO -> RGB
[03:27:15] [PASSED] YCBCR422 -> YUV422
[03:27:15] [PASSED] YCBCR420 -> YUV420
[03:27:15] [PASSED] YCBCR444 -> YUV444
[03:27:15] [PASSED] RGB -> RGB
[03:27:15] ======== [PASSED] drm_test_check_hdmi_color_format =========
[03:27:15] ======== drm_test_check_hdmi_color_format_420_only ========
[03:27:15] [PASSED] RGB should fail
[03:27:15] [PASSED] YUV444 should fail
[03:27:15] [PASSED] YUV422 should fail
[03:27:15] [PASSED] YUV420 should work
[03:27:15] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[03:27:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[03:27:15] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[03:27:15] [PASSED] drm_test_check_broadcast_rgb_value
[03:27:15] [PASSED] drm_test_check_bpc_8_value
[03:27:15] [PASSED] drm_test_check_bpc_10_value
[03:27:15] [PASSED] drm_test_check_bpc_12_value
[03:27:15] [PASSED] drm_test_check_format_value
[03:27:15] [PASSED] drm_test_check_tmds_char_value
[03:27:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[03:27:15] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[03:27:15] [PASSED] drm_test_check_mode_valid
[03:27:15] [PASSED] drm_test_check_mode_valid_reject
[03:27:15] [PASSED] drm_test_check_mode_valid_reject_rate
[03:27:15] [PASSED] drm_test_check_mode_valid_reject_max_clock
[03:27:15] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[03:27:16] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[03:27:16] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[03:27:16] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[03:27:16] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[03:27:16] [PASSED] drm_test_check_infoframes
[03:27:16] [PASSED] drm_test_check_reject_avi_infoframe
[03:27:16] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[03:27:16] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[03:27:16] [PASSED] drm_test_check_reject_audio_infoframe
[03:27:16] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[03:27:16] ================= drm_managed (2 subtests) =================
[03:27:16] [PASSED] drm_test_managed_release_action
[03:27:16] [PASSED] drm_test_managed_run_action
[03:27:16] =================== [PASSED] drm_managed ===================
[03:27:16] =================== drm_mm (6 subtests) ====================
[03:27:16] [PASSED] drm_test_mm_init
[03:27:16] [PASSED] drm_test_mm_debug
[03:27:16] [PASSED] drm_test_mm_align32
[03:27:16] [PASSED] drm_test_mm_align64
[03:27:16] [PASSED] drm_test_mm_lowest
[03:27:16] [PASSED] drm_test_mm_highest
[03:27:16] ===================== [PASSED] drm_mm ======================
[03:27:16] ============= drm_modes_analog_tv (5 subtests) =============
[03:27:16] [PASSED] drm_test_modes_analog_tv_mono_576i
[03:27:16] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[03:27:16] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[03:27:16] [PASSED] drm_test_modes_analog_tv_pal_576i
[03:27:16] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[03:27:16] =============== [PASSED] drm_modes_analog_tv ===============
[03:27:16] ============== drm_panic_helper (3 subtests) ===============
[03:27:16] ============= drm_test_panic_screen_user_map ==============
[03:27:16] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[03:27:16] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[03:27:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[03:27:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[03:27:16] ========= [PASSED] drm_test_panic_screen_user_map ==========
[03:27:16] ============= drm_test_panic_screen_user_page =============
[03:27:16] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[03:27:16] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[03:27:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[03:27:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[03:27:16] ========= [PASSED] drm_test_panic_screen_user_page =========
[03:27:16] ========== drm_test_panic_screen_user_set_pixel ===========
[03:27:16] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[03:27:16] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[03:27:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[03:27:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[03:27:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[03:27:16] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[03:27:16] ================ [PASSED] drm_panic_helper =================
[03:27:16] ============== drm_plane_helper (2 subtests) ===============
[03:27:16] =============== drm_test_check_plane_state ================
[03:27:16] [PASSED] clipping_simple
[03:27:16] [PASSED] clipping_rotate_reflect
[03:27:16] [PASSED] positioning_simple
[03:27:16] [PASSED] upscaling
[03:27:16] [PASSED] downscaling
[03:27:16] [PASSED] rounding1
[03:27:16] [PASSED] rounding2
[03:27:16] [PASSED] rounding3
[03:27:16] [PASSED] rounding4
[03:27:16] =========== [PASSED] drm_test_check_plane_state ============
[03:27:16] =========== drm_test_check_invalid_plane_state ============
[03:27:16] [PASSED] positioning_invalid
[03:27:16] [PASSED] upscaling_invalid
[03:27:16] [PASSED] downscaling_invalid
[03:27:16] ======= [PASSED] drm_test_check_invalid_plane_state ========
[03:27:16] ================ [PASSED] drm_plane_helper =================
[03:27:16] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[03:27:16] ====== drm_test_connector_helper_tv_get_modes_check =======
[03:27:16] [PASSED] None
[03:27:16] [PASSED] PAL
[03:27:16] [PASSED] NTSC
[03:27:16] [PASSED] Both, NTSC Default
[03:27:16] [PASSED] Both, PAL Default
[03:27:16] [PASSED] Both, NTSC Default, with PAL on command-line
[03:27:16] [PASSED] Both, PAL Default, with NTSC on command-line
[03:27:16] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[03:27:16] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[03:27:16] ================== drm_rect (9 subtests) ===================
[03:27:16] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[03:27:16] [PASSED] drm_test_rect_clip_scaled_not_clipped
[03:27:16] [PASSED] drm_test_rect_clip_scaled_clipped
[03:27:16] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[03:27:16] ================= drm_test_rect_intersect =================
[03:27:16] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[03:27:16] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[03:27:16] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[03:27:16] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[03:27:16] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[03:27:16] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[03:27:16] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[03:27:16] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[03:27:16] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[03:27:16] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[03:27:16] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[03:27:16] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[03:27:16] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[03:27:16] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[03:27:16] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[03:27:16] ============= [PASSED] drm_test_rect_intersect =============
[03:27:16] ================ drm_test_rect_calc_hscale ================
[03:27:16] [PASSED] normal use
[03:27:16] [PASSED] out of max range
[03:27:16] [PASSED] out of min range
[03:27:16] [PASSED] zero dst
[03:27:16] [PASSED] negative src
[03:27:16] [PASSED] negative dst
[03:27:16] ============ [PASSED] drm_test_rect_calc_hscale ============
[03:27:16] ================ drm_test_rect_calc_vscale ================
[03:27:16] [PASSED] normal use
[03:27:16] [PASSED] out of max range
[03:27:16] [PASSED] out of min range
[03:27:16] [PASSED] zero dst
[03:27:16] [PASSED] negative src
[03:27:16] [PASSED] negative dst
[03:27:16] ============ [PASSED] drm_test_rect_calc_vscale ============
[03:27:16] ================== drm_test_rect_rotate ===================
[03:27:16] [PASSED] reflect-x
[03:27:16] [PASSED] reflect-y
[03:27:16] [PASSED] rotate-0
[03:27:16] [PASSED] rotate-90
[03:27:16] [PASSED] rotate-180
[03:27:16] [PASSED] rotate-270
[03:27:16] ============== [PASSED] drm_test_rect_rotate ===============
[03:27:16] ================ drm_test_rect_rotate_inv =================
[03:27:16] [PASSED] reflect-x
[03:27:16] [PASSED] reflect-y
[03:27:16] [PASSED] rotate-0
[03:27:16] [PASSED] rotate-90
[03:27:16] [PASSED] rotate-180
[03:27:16] [PASSED] rotate-270
[03:27:16] ============ [PASSED] drm_test_rect_rotate_inv =============
[03:27:16] ==================== [PASSED] drm_rect =====================
[03:27:16] ============ drm_sysfb_modeset_test (1 subtest) ============
[03:27:16] ============ drm_test_sysfb_build_fourcc_list =============
[03:27:16] [PASSED] no native formats
[03:27:16] [PASSED] XRGB8888 as native format
[03:27:16] [PASSED] remove duplicates
[03:27:16] [PASSED] convert alpha formats
[03:27:16] [PASSED] random formats
[03:27:16] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[03:27:16] ============= [PASSED] drm_sysfb_modeset_test ==============
[03:27:16] ================== drm_fixp (2 subtests) ===================
[03:27:16] [PASSED] drm_test_int2fixp
[03:27:16] [PASSED] drm_test_sm2fixp
[03:27:16] ==================== [PASSED] drm_fixp =====================
[03:27:16] ============================================================
[03:27:16] Testing complete. Ran 667 tests: passed: 667
[03:27:16] Elapsed time: 27.464s total, 1.841s configuring, 25.155s building, 0.415s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[03:27:16] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:27:18] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:27:28] Starting KUnit Kernel (1/1)...
[03:27:28] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:27:28] ================= ttm_device (5 subtests) ==================
[03:27:28] [PASSED] ttm_device_init_basic
[03:27:28] [PASSED] ttm_device_init_multiple
[03:27:28] [PASSED] ttm_device_fini_basic
[03:27:28] [PASSED] ttm_device_init_no_vma_man
[03:27:28] ================== ttm_device_init_pools ==================
[03:27:28] [PASSED] No DMA allocations, no DMA32 required
[03:27:28] [PASSED] DMA allocations, DMA32 required
[03:27:28] [PASSED] No DMA allocations, DMA32 required
[03:27:28] [PASSED] DMA allocations, no DMA32 required
[03:27:28] ============== [PASSED] ttm_device_init_pools ==============
[03:27:28] =================== [PASSED] ttm_device ====================
[03:27:28] ================== ttm_pool (8 subtests) ===================
[03:27:28] ================== ttm_pool_alloc_basic ===================
[03:27:28] [PASSED] One page
[03:27:28] [PASSED] More than one page
[03:27:28] [PASSED] Above the allocation limit
[03:27:28] [PASSED] One page, with coherent DMA mappings enabled
[03:27:28] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[03:27:28] ============== [PASSED] ttm_pool_alloc_basic ===============
[03:27:28] ============== ttm_pool_alloc_basic_dma_addr ==============
[03:27:28] [PASSED] One page
[03:27:28] [PASSED] More than one page
[03:27:28] [PASSED] Above the allocation limit
[03:27:28] [PASSED] One page, with coherent DMA mappings enabled
[03:27:28] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[03:27:28] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[03:27:28] [PASSED] ttm_pool_alloc_order_caching_match
[03:27:28] [PASSED] ttm_pool_alloc_caching_mismatch
[03:27:28] [PASSED] ttm_pool_alloc_order_mismatch
[03:27:28] [PASSED] ttm_pool_free_dma_alloc
[03:27:28] [PASSED] ttm_pool_free_no_dma_alloc
[03:27:28] [PASSED] ttm_pool_fini_basic
[03:27:28] ==================== [PASSED] ttm_pool =====================
[03:27:28] ================ ttm_resource (8 subtests) =================
[03:27:28] ================= ttm_resource_init_basic =================
[03:27:28] [PASSED] Init resource in TTM_PL_SYSTEM
[03:27:28] [PASSED] Init resource in TTM_PL_VRAM
[03:27:28] [PASSED] Init resource in a private placement
[03:27:28] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[03:27:28] ============= [PASSED] ttm_resource_init_basic =============
[03:27:28] [PASSED] ttm_resource_init_pinned
[03:27:28] [PASSED] ttm_resource_fini_basic
[03:27:28] [PASSED] ttm_resource_manager_init_basic
[03:27:28] [PASSED] ttm_resource_manager_usage_basic
[03:27:28] [PASSED] ttm_resource_manager_set_used_basic
[03:27:28] [PASSED] ttm_sys_man_alloc_basic
[03:27:28] [PASSED] ttm_sys_man_free_basic
[03:27:28] ================== [PASSED] ttm_resource ===================
[03:27:28] =================== ttm_tt (15 subtests) ===================
[03:27:28] ==================== ttm_tt_init_basic ====================
[03:27:28] [PASSED] Page-aligned size
[03:27:28] [PASSED] Extra pages requested
[03:27:28] ================ [PASSED] ttm_tt_init_basic ================
[03:27:28] [PASSED] ttm_tt_init_misaligned
[03:27:28] [PASSED] ttm_tt_fini_basic
[03:27:28] [PASSED] ttm_tt_fini_sg
[03:27:28] [PASSED] ttm_tt_fini_shmem
[03:27:28] [PASSED] ttm_tt_create_basic
[03:27:28] [PASSED] ttm_tt_create_invalid_bo_type
[03:27:28] [PASSED] ttm_tt_create_ttm_exists
[03:27:28] [PASSED] ttm_tt_create_failed
[03:27:28] [PASSED] ttm_tt_destroy_basic
[03:27:28] [PASSED] ttm_tt_populate_null_ttm
[03:27:28] [PASSED] ttm_tt_populate_populated_ttm
[03:27:28] [PASSED] ttm_tt_unpopulate_basic
[03:27:28] [PASSED] ttm_tt_unpopulate_empty_ttm
[03:27:28] [PASSED] ttm_tt_swapin_basic
[03:27:28] ===================== [PASSED] ttm_tt ======================
[03:27:28] =================== ttm_bo (14 subtests) ===================
[03:27:28] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[03:27:28] [PASSED] Cannot be interrupted and sleeps
[03:27:28] [PASSED] Cannot be interrupted, locks straight away
[03:27:28] [PASSED] Can be interrupted, sleeps
[03:27:28] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[03:27:28] [PASSED] ttm_bo_reserve_locked_no_sleep
[03:27:28] [PASSED] ttm_bo_reserve_no_wait_ticket
[03:27:28] [PASSED] ttm_bo_reserve_double_resv
[03:27:28] [PASSED] ttm_bo_reserve_interrupted
[03:27:28] [PASSED] ttm_bo_reserve_deadlock
[03:27:28] [PASSED] ttm_bo_unreserve_basic
[03:27:28] [PASSED] ttm_bo_unreserve_pinned
[03:27:28] [PASSED] ttm_bo_unreserve_bulk
[03:27:28] [PASSED] ttm_bo_fini_basic
[03:27:28] [PASSED] ttm_bo_fini_shared_resv
[03:27:28] [PASSED] ttm_bo_pin_basic
[03:27:28] [PASSED] ttm_bo_pin_unpin_resource
[03:27:28] [PASSED] ttm_bo_multiple_pin_one_unpin
[03:27:28] ===================== [PASSED] ttm_bo ======================
[03:27:28] ============== ttm_bo_validate (22 subtests) ===============
[03:27:28] ============== ttm_bo_init_reserved_sys_man ===============
[03:27:28] [PASSED] Buffer object for userspace
[03:27:28] [PASSED] Kernel buffer object
[03:27:28] [PASSED] Shared buffer object
[03:27:28] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[03:27:28] ============== ttm_bo_init_reserved_mock_man ==============
[03:27:28] [PASSED] Buffer object for userspace
[03:27:28] [PASSED] Kernel buffer object
[03:27:28] [PASSED] Shared buffer object
[03:27:28] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[03:27:28] [PASSED] ttm_bo_init_reserved_resv
[03:27:28] ================== ttm_bo_validate_basic ==================
[03:27:28] [PASSED] Buffer object for userspace
[03:27:28] [PASSED] Kernel buffer object
[03:27:28] [PASSED] Shared buffer object
[03:27:28] ============== [PASSED] ttm_bo_validate_basic ==============
[03:27:28] [PASSED] ttm_bo_validate_invalid_placement
[03:27:28] ============= ttm_bo_validate_same_placement ==============
[03:27:28] [PASSED] System manager
[03:27:28] [PASSED] VRAM manager
[03:27:28] ========= [PASSED] ttm_bo_validate_same_placement ==========
[03:27:28] [PASSED] ttm_bo_validate_failed_alloc
[03:27:28] [PASSED] ttm_bo_validate_pinned
[03:27:28] [PASSED] ttm_bo_validate_busy_placement
[03:27:28] ================ ttm_bo_validate_multihop =================
[03:27:28] [PASSED] Buffer object for userspace
[03:27:28] [PASSED] Kernel buffer object
[03:27:28] [PASSED] Shared buffer object
[03:27:28] ============ [PASSED] ttm_bo_validate_multihop =============
[03:27:28] ========== ttm_bo_validate_no_placement_signaled ==========
[03:27:28] [PASSED] Buffer object in system domain, no page vector
[03:27:28] [PASSED] Buffer object in system domain with an existing page vector
[03:27:28] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[03:27:28] ======== ttm_bo_validate_no_placement_not_signaled ========
[03:27:28] [PASSED] Buffer object for userspace
[03:27:28] [PASSED] Kernel buffer object
[03:27:28] [PASSED] Shared buffer object
[03:27:28] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[03:27:28] [PASSED] ttm_bo_validate_move_fence_signaled
[03:27:28] ========= ttm_bo_validate_move_fence_not_signaled =========
[03:27:28] [PASSED] Waits for GPU
[03:27:28] [PASSED] Tries to lock straight away
[03:27:28] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[03:27:28] [PASSED] ttm_bo_validate_swapout
[03:27:28] [PASSED] ttm_bo_validate_happy_evict
[03:27:28] [PASSED] ttm_bo_validate_all_pinned_evict
[03:27:28] [PASSED] ttm_bo_validate_allowed_only_evict
[03:27:28] [PASSED] ttm_bo_validate_deleted_evict
[03:27:28] [PASSED] ttm_bo_validate_busy_domain_evict
[03:27:28] [PASSED] ttm_bo_validate_evict_gutting
[03:27:28] [PASSED] ttm_bo_validate_recrusive_evict
[03:27:28] ================= [PASSED] ttm_bo_validate =================
[03:27:28] ============================================================
[03:27:28] Testing complete. Ran 102 tests: passed: 102
[03:27:28] Elapsed time: 12.302s total, 1.847s configuring, 10.240s building, 0.183s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[03:27:28] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:27:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:27:39] Starting KUnit Kernel (1/1)...
[03:27:39] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:27:39] =============== dma-buf-fence (12 subtests) ================
[03:27:39] [PASSED] test_sanitycheck
[03:27:39] [PASSED] test_signaling
[03:27:39] [PASSED] test_add_callback
[03:27:39] [PASSED] test_late_add_callback
[03:27:39] [PASSED] test_rm_callback
[03:27:39] [PASSED] test_late_rm_callback
[03:27:39] [PASSED] test_status
[03:27:39] [PASSED] test_error
[03:27:39] [PASSED] test_wait
[03:27:39] [PASSED] test_wait_timeout
[03:27:39] [PASSED] test_stub
[03:27:39] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[03:27:39] ================== [PASSED] dma-buf-fence ==================
[03:27:39] ============ dma-buf-fence-chain (11 subtests) =============
[03:27:39] [PASSED] test_sanitycheck
[03:27:39] [PASSED] test_find_seqno
[03:27:39] [PASSED] test_find_signaled
[03:27:39] [PASSED] test_find_out_of_order
[03:27:44] [PASSED] test_find_gap
[03:27:44] [PASSED] test_find_race
[03:27:44] [PASSED] test_signal_forward
[03:27:44] [PASSED] test_signal_backward
[03:27:44] [PASSED] test_wait_forward
[03:27:44] [PASSED] test_wait_backward
[03:27:44] [PASSED] test_wait_random
[03:27:44] =============== [PASSED] dma-buf-fence-chain ===============
[03:27:44] ============ dma-buf-fence-unwrap (11 subtests) ============
[03:27:44] [PASSED] test_sanitycheck
[03:27:44] [PASSED] test_unwrap_array
[03:27:44] [PASSED] test_unwrap_chain
[03:27:44] [PASSED] test_unwrap_chain_array
[03:27:44] [PASSED] test_unwrap_merge
[03:27:44] [PASSED] test_unwrap_merge_duplicate
[03:27:44] [PASSED] test_unwrap_merge_seqno
[03:27:44] [PASSED] test_unwrap_merge_order
[03:27:44] [PASSED] test_unwrap_merge_complex
[03:27:44] [PASSED] test_unwrap_merge_complex_seqno
[03:27:44] [PASSED] test_dedup_empty
[03:27:44] ============== [PASSED] dma-buf-fence-unwrap ===============
[03:27:44] ================ dma-buf-resv (5 subtests) =================
[03:27:44] [PASSED] test_sanitycheck
[03:27:44] ===================== test_signaling ======================
[03:27:44] [PASSED] kernel
[03:27:44] [PASSED] write
[03:27:44] [PASSED] read
[03:27:44] [PASSED] bookkeep
[03:27:44] ================= [PASSED] test_signaling ==================
[03:27:44] ====================== test_for_each ======================
[03:27:44] [PASSED] kernel
[03:27:44] [PASSED] write
[03:27:44] [PASSED] read
[03:27:44] [PASSED] bookkeep
[03:27:44] ================== [PASSED] test_for_each ==================
[03:27:44] ================= test_for_each_unlocked ==================
[03:27:44] [PASSED] kernel
[03:27:44] [PASSED] write
[03:27:44] [PASSED] read
[03:27:44] [PASSED] bookkeep
[03:27:44] ============= [PASSED] test_for_each_unlocked ==============
[03:27:44] ===================== test_get_fences =====================
[03:27:44] [PASSED] kernel
[03:27:44] [PASSED] write
[03:27:44] [PASSED] read
[03:27:44] [PASSED] bookkeep
[03:27:44] ================= [PASSED] test_get_fences =================
[03:27:44] ================== [PASSED] dma-buf-resv ===================
[03:27:44] ============================================================
[03:27:44] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[03:27:44] Elapsed time: 15.952s total, 1.829s configuring, 8.849s building, 5.260s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries
2026-10-17 3:18 [PATCH 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries Zongyao Bai
` (4 preceding siblings ...)
2026-10-17 3:27 ` ✓ CI.KUnit: success " Patchwork
@ 2026-10-17 3:27 ` Simon Richter
2026-10-17 4:07 ` ✓ Xe.CI.BAT: success for " Patchwork
` (2 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Simon Richter @ 2026-10-17 3:27 UTC (permalink / raw)
To: intel-xe
[-- Attachment #1.1: Type: text/plain, Size: 588 bytes --]
Hi,
On 10/17/26 12:18, Zongyao Bai wrote:
> Engine-cycle queries are issued repeatedly by profilers such as VTune
> and PTI to correlate CPU and GPU timestamps, for example through Level
> Zero zeDeviceGetGlobalTimestamps(). Each query wakes the engine
> forcewake domain and puts it to sleep again, and waiting for both
> acknowledgments dominates the query latency.
I suppose that
https://patchwork.freedesktop.org/series/175962/
will want to do something similar, although my suspicion is that with
delayed release, the sensor refresh stops working.
Simon
[-- Attachment #2: OpenPGP digital signature --]
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^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe/forcewake: add delayed release for engine-cycle queries
2026-10-17 3:18 [PATCH 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries Zongyao Bai
` (5 preceding siblings ...)
2026-10-17 3:27 ` [PATCH 0/3] " Simon Richter
@ 2026-10-17 4:07 ` Patchwork
2026-10-17 5:48 ` ✓ Xe.CI.FULL: " Patchwork
2026-11-10 22:05 ` [PATCH v2 0/3] " Zongyao Bai
8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-10-17 4:07 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 976 bytes --]
== Series Details ==
Series: drm/xe/forcewake: add delayed release for engine-cycle queries
URL : https://patchwork.freedesktop.org/series/176324/
State : success
== Summary ==
CI Bug Log - changes from xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89_BAT -> xe-pw-176324v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (15 -> 15)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89 -> xe-pw-176324v1
IGT_9150: 18811c476bfde62ffbb4c0af55cd6f57e36e0dca @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89: 173c9ebb628f22cdfb18e080e0ef46b728649f89
xe-pw-176324v1: 176324v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/index.html
[-- Attachment #2: Type: text/html, Size: 1524 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ Xe.CI.FULL: success for drm/xe/forcewake: add delayed release for engine-cycle queries
2026-10-17 3:18 [PATCH 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries Zongyao Bai
` (6 preceding siblings ...)
2026-10-17 4:07 ` ✓ Xe.CI.BAT: success for " Patchwork
@ 2026-10-17 5:48 ` Patchwork
2026-11-10 22:05 ` [PATCH v2 0/3] " Zongyao Bai
8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-10-17 5:48 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 41688 bytes --]
== Series Details ==
Series: drm/xe/forcewake: add delayed release for engine-cycle queries
URL : https://patchwork.freedesktop.org/series/176324/
State : success
== Summary ==
CI Bug Log - changes from xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89_FULL -> xe-pw-176324v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (3 -> 3)
------------------------------
No changes in participating hosts
New tests
---------
New tests have been introduced between xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89_FULL and xe-pw-176324v1_FULL:
### New IGT tests (7) ###
* igt@kms_invalid_mode@bad-hsync-end@pipe-d-dp-1:
- Statuses : 1 pass(s)
- Exec time: [0.03] s
* igt@kms_invalid_mode@clock-too-high@pipe-d-dp-1:
- Statuses : 1 pass(s)
- Exec time: [0.01] s
* igt@kms_invalid_mode@zero-clock@pipe-d-dp-1:
- Statuses : 1 pass(s)
- Exec time: [0.02] s
* igt@kms_vblank@query-forked-busy@pipe-d-dp-1:
- Statuses : 1 pass(s)
- Exec time: [2.51] s
* igt@kms_vblank@ts-continuation-idle@pipe-d-dp-1:
- Statuses : 1 pass(s)
- Exec time: [0.31] s
* igt@kms_vblank@wait-busy-hang@pipe-d-dp-1:
- Statuses : 1 pass(s)
- Exec time: [2.46] s
* igt@kms_vblank@wait-idle-hang@pipe-d-dp-1:
- Statuses : 1 pass(s)
- Exec time: [2.32] s
Known issues
------------
Here are the changes found in xe-pw-176324v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@intel_hwmon@hwmon-write:
- shard-ptl: NOTRUN -> [SKIP][1] ([Intel XE#7225])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@intel_hwmon@hwmon-write.html
* igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
- shard-bmg: NOTRUN -> [SKIP][2] ([Intel XE#7059] / [Intel XE#7085])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#2327]) +2 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#1124]) +1 other test skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-ptl: NOTRUN -> [SKIP][5] ([Intel XE#5808]) +1 other test skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_bw@connected-linear-tiling-2-displays-target-2560x1440p:
- shard-ptl: NOTRUN -> [SKIP][6] ([Intel XE#7679])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_bw@connected-linear-tiling-2-displays-target-2560x1440p.html
* igt@kms_bw@linear-tiling-3-displays-target-1920x1080p:
- shard-ptl: NOTRUN -> [SKIP][7] ([Intel XE#367]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_bw@linear-tiling-3-displays-target-1920x1080p.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs:
- shard-ptl: NOTRUN -> [SKIP][8] ([Intel XE#5822]) +2 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs@pipe-b-dp-2:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2652]) +3 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-3/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs@pipe-b-dp-2.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2887]) +7 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-c-edp-1:
- shard-ptl: [PASS][11] -> [ABORT][12] ([Intel XE#7084] / [Intel XE#9364])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-ptl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-c-edp-1.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-c-edp-1.html
* igt@kms_chamelium_color@ctm-blue-to-red:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2325] / [Intel XE#7358])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_chamelium_color@ctm-blue-to-red.html
* igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
- shard-ptl: NOTRUN -> [SKIP][14] ([Intel XE#2252]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
* igt@kms_chamelium_edid@dp-edid-resolution-list:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2252]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_chamelium_edid@dp-edid-resolution-list.html
* igt@kms_chamelium_sharpness_filter@filter-basic:
- shard-ptl: NOTRUN -> [SKIP][16] ([Intel XE#6507])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_chamelium_sharpness_filter@filter-basic.html
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-4:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#6969]) +7 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-4.html
* igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][18] ([Intel XE#3304] / [Intel XE#7374]) +1 other test fail
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2.html
* igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][19] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-5/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2320]) +2 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-ptl: NOTRUN -> [SKIP][21] ([Intel XE#5846])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2321] / [Intel XE#7355])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-7/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-ptl: NOTRUN -> [SKIP][23] ([Intel XE#5962]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#1508])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-ptl: NOTRUN -> [SKIP][25] ([Intel XE#9533])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dsc@dsc-with-bpc-ultrajoiner:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#8265])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_dsc@dsc-with-bpc-ultrajoiner.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#8680])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_feature_discovery@chamelium:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#2372] / [Intel XE#7359])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@display-3x:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2373] / [Intel XE#7448])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@kms_feature_discovery@display-3x.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-bmg: [PASS][30] -> [DMESG-WARN][31] ([Intel XE#9365]) +2 other tests dmesg-warn
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-bmg-9/igt@kms_flip@flip-vs-suspend-interruptible.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-3/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#7178] / [Intel XE#7351]) +2 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
- shard-ptl: NOTRUN -> [SKIP][33] ([Intel XE#7178])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yuv-linear-to-32bpp-yuv-linear-reflect-x:
- shard-ptl: NOTRUN -> [SKIP][34] ([Intel XE#7179])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@kms_flip_scaled_crc@flip-32bpp-yuv-linear-to-32bpp-yuv-linear-reflect-x.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-blt:
- shard-ptl: NOTRUN -> [SKIP][35] ([Intel XE#5800] / [Intel XE#6312]) +1 other test skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrshdr-slowdraw:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2311]) +22 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrshdr-slowdraw.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#4141]) +6 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-ptl: NOTRUN -> [SKIP][38] ([Intel XE#5812]) +11 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-ptl: NOTRUN -> [SKIP][39] ([Intel XE#6312]) +5 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#7061] / [Intel XE#7356]) +2 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#7061]) +3 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-render.html
* igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-move:
- shard-ptl: NOTRUN -> [SKIP][42] ([Intel XE#7865]) +2 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-spr-indfb-move:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#2313]) +27 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-spr-indfb-move.html
* igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-2-xrgb16161616f:
- shard-bmg: [PASS][44] -> [ABORT][45] ([Intel XE#9362] / [Intel XE#9438]) +1 other test abort
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-bmg-4/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-2-xrgb16161616f.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-2-xrgb16161616f.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#7591])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier:
- shard-ptl: NOTRUN -> [SKIP][47] ([Intel XE#7283])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier.html
* igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#7283]) +3 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-b:
- shard-ptl: NOTRUN -> [SKIP][49] ([Intel XE#6886]) +4 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-b.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_rpm@package-g7:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#6814] / [Intel XE#7428])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_pm_rpm@package-g7.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#1489]) +4 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-7/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#2387] / [Intel XE#7429])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-7/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-ptl: NOTRUN -> [SKIP][54] ([Intel XE#7413])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@fbc-psr-sprite-render:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@kms_psr@fbc-psr-sprite-render.html
* igt@kms_psr@fbc-psr2-primary-page-flip@edp-1:
- shard-ptl: NOTRUN -> [SKIP][56] ([Intel XE#1406] / [Intel XE#5835]) +1 other test skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_psr@fbc-psr2-primary-page-flip@edp-1.html
* igt@kms_psr@pr-sprite-plane-onoff:
- shard-ptl: NOTRUN -> [SKIP][57] ([Intel XE#1406])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_psr@pr-sprite-plane-onoff.html
* igt@kms_psr@psr2-primary-render:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#2234])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_psr@psr2-primary-render.html
* igt@kms_psr@psr2-suspend@edp-1:
- shard-ptl: [PASS][59] -> [INCOMPLETE][60] ([Intel XE#9497]) +1 other test incomplete
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-ptl-6/igt@kms_psr@psr2-suspend@edp-1.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-7/igt@kms_psr@psr2-suspend@edp-1.html
* igt@kms_rotation_crc@sprite-rotation-90:
- shard-ptl: NOTRUN -> [SKIP][61] ([Intel XE#5821])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@kms_rotation_crc@sprite-rotation-90.html
* igt@kms_setmode@invalid-clone-exclusive-crtc:
- shard-ptl: NOTRUN -> [SKIP][62] ([Intel XE#5910])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_setmode@invalid-clone-exclusive-crtc.html
* igt@kms_sharpness_filter@filter-toggle:
- shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#6503]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_sharpness_filter@filter-toggle.html
* igt@kms_vblank@ts-continuation-dpms-suspend:
- shard-bmg: [PASS][64] -> [DMESG-WARN][65] ([Intel XE#9365] / [Intel XE#9465])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-bmg-5/igt@kms_vblank@ts-continuation-dpms-suspend.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@kms_vblank@ts-continuation-dpms-suspend.html
* igt@kms_vrr@lobf-dc3co:
- shard-ptl: NOTRUN -> [SKIP][66] ([Intel XE#8397])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@kms_vrr@lobf-dc3co.html
* igt@xe_ccs@suspend-resume:
- shard-ptl: NOTRUN -> [ABORT][67] ([Intel XE#9362]) +1 other test abort
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@xe_ccs@suspend-resume.html
* igt@xe_evict@evict-mixed-threads-small:
- shard-ptl: NOTRUN -> [SKIP][68] ([Intel XE#5764]) +3 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@xe_evict@evict-mixed-threads-small.html
* igt@xe_exec_balancer@many-execqueues-cm-parallel-basic:
- shard-ptl: NOTRUN -> [SKIP][69] ([Intel XE#7482]) +1 other test skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@xe_exec_balancer@many-execqueues-cm-parallel-basic.html
* igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][70] ([Intel XE#2322] / [Intel XE#7372]) +2 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue:
- shard-ptl: NOTRUN -> [SKIP][71] ([Intel XE#5575] / [Intel XE#7484]) +1 other test skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@xe_exec_basic@multigpu-once-bindexecqueue.html
* igt@xe_exec_fault_mode@many-multi-queue-rebind:
- shard-bmg: NOTRUN -> [SKIP][72] ([Intel XE#8374]) +5 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-7/igt@xe_exec_fault_mode@many-multi-queue-rebind.html
* igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority:
- shard-bmg: NOTRUN -> [SKIP][73] ([Intel XE#8364]) +14 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority.html
* igt@xe_exec_multi_queue@two-queues-preempt-mode-userptr-invalidate:
- shard-ptl: NOTRUN -> [SKIP][74] ([Intel XE#8364]) +3 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@xe_exec_multi_queue@two-queues-preempt-mode-userptr-invalidate.html
* igt@xe_exec_reset@multi-queue-cat-error-on-secondary:
- shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#8369])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@xe_exec_reset@multi-queue-cat-error-on-secondary.html
* igt@xe_exec_reset@multi-queue-gt-reset:
- shard-ptl: NOTRUN -> [SKIP][76] ([Intel XE#8369])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@xe_exec_reset@multi-queue-gt-reset.html
* igt@xe_exec_threads@threads-hang-userptr-invalidate-race:
- shard-ptl: [PASS][77] -> [FAIL][78] ([Intel XE#9096])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-ptl-3/igt@xe_exec_threads@threads-hang-userptr-invalidate-race.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@xe_exec_threads@threads-hang-userptr-invalidate-race.html
* igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate:
- shard-ptl: NOTRUN -> [SKIP][79] ([Intel XE#8378])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-2/igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate.html
* igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr:
- shard-bmg: NOTRUN -> [SKIP][80] ([Intel XE#8378]) +5 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr.html
* igt@xe_gpgpu_fill@offset-4x4:
- shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#7954])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@xe_gpgpu_fill@offset-4x4.html
* igt@xe_mmap@small-bar:
- shard-ptl: NOTRUN -> [SKIP][82] ([Intel XE#5867])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@xe_mmap@small-bar.html
* igt@xe_multigpu_svm@mgpu-latency-basic:
- shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#6964])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@xe_multigpu_svm@mgpu-latency-basic.html
* igt@xe_page_reclaim@basic-mixed:
- shard-bmg: NOTRUN -> [SKIP][84] ([Intel XE#7793])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@xe_page_reclaim@basic-mixed.html
* igt@xe_pat@pat-index-xelp:
- shard-bmg: NOTRUN -> [SKIP][85] ([Intel XE#2245] / [Intel XE#7590])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@xe_pat@pat-index-xelp.html
* igt@xe_pat@xa-app-transient-media-off:
- shard-bmg: NOTRUN -> [SKIP][86] ([Intel XE#7590])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-7/igt@xe_pat@xa-app-transient-media-off.html
* igt@xe_pm@d3cold-multiple-execs:
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#2284] / [Intel XE#7370])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@xe_pm@d3cold-multiple-execs.html
* igt@xe_pm@s2idle-basic-exec:
- shard-ptl: [PASS][88] -> [FAIL][89] ([Intel XE#9496])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-ptl-6/igt@xe_pm@s2idle-basic-exec.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-7/igt@xe_pm@s2idle-basic-exec.html
* igt@xe_pm@s2idle-vm-bind-unbind-all:
- shard-ptl: [PASS][90] -> [ABORT][91] ([Intel XE#9362]) +4 other tests abort
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-ptl-2/igt@xe_pm@s2idle-vm-bind-unbind-all.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-5/igt@xe_pm@s2idle-vm-bind-unbind-all.html
* igt@xe_pm@s3-basic:
- shard-ptl: NOTRUN -> [SKIP][92] ([Intel XE#6867])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@xe_pm@s3-basic.html
* igt@xe_pm@s4-mocs:
- shard-bmg: [PASS][93] -> [ABORT][94] ([Intel XE#9093])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-bmg-8/igt@xe_pm@s4-mocs.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-9/igt@xe_pm@s4-mocs.html
- shard-lnl: [PASS][95] -> [ABORT][96] ([Intel XE#9362]) +1 other test abort
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-lnl-5/igt@xe_pm@s4-mocs.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-lnl-5/igt@xe_pm@s4-mocs.html
* igt@xe_pxp@pxp-termination-key-update-post-suspend:
- shard-bmg: NOTRUN -> [SKIP][97] ([Intel XE#4733] / [Intel XE#7417]) +1 other test skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@xe_pxp@pxp-termination-key-update-post-suspend.html
* igt@xe_query@multigpu-query-pxp-status:
- shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#944])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@xe_query@multigpu-query-pxp-status.html
* igt@xe_query@multigpu-query-topology:
- shard-ptl: NOTRUN -> [SKIP][99] ([Intel XE#6019])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@xe_query@multigpu-query-topology.html
#### Possible fixes ####
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [INCOMPLETE][100] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][101] +1 other test pass
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-edp-1:
- shard-ptl: [ABORT][102] ([Intel XE#7084] / [Intel XE#9378]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-ptl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-edp-1.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-edp-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-edp-1:
- shard-ptl: [DMESG-WARN][104] ([Intel XE#9412]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-ptl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-edp-1.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-edp-1.html
* igt@kms_flip@2x-flip-vs-suspend:
- shard-bmg: [ABORT][106] ([Intel XE#9362]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-bmg-4/igt@kms_flip@2x-flip-vs-suspend.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-7/igt@kms_flip@2x-flip-vs-suspend.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@d-edp1:
- shard-ptl: [FAIL][108] ([Intel XE#3149] / [Intel XE#3321]) -> [PASS][109] +1 other test pass
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-ptl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-edp1.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [FAIL][110] ([Intel XE#301]) -> [PASS][111] +1 other test pass
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@xe_module_load@reload:
- shard-bmg: [ABORT][112] ([Intel XE#9463]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-bmg-1/igt@xe_module_load@reload.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-2/igt@xe_module_load@reload.html
* igt@xe_pmu@engine-activity-accuracy-90:
- shard-lnl: [FAIL][114] ([Intel XE#9461]) -> [PASS][115] +1 other test pass
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-lnl-3/igt@xe_pmu@engine-activity-accuracy-90.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-lnl-5/igt@xe_pmu@engine-activity-accuracy-90.html
* igt@xe_pmu@engine-activity-suspend:
- shard-ptl: [ABORT][116] ([Intel XE#9362]) -> [PASS][117] +2 other tests pass
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-ptl-4/igt@xe_pmu@engine-activity-suspend.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-4/igt@xe_pmu@engine-activity-suspend.html
#### Warnings ####
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-ptl: [ABORT][118] ([Intel XE#7084] / [Intel XE#9378]) -> [ABORT][119] ([Intel XE#7084] / [Intel XE#9364])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-ptl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][120] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][121] ([Intel XE#3544])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][122] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][123] ([Intel XE#1729] / [Intel XE#7424])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][124] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][125] ([Intel XE#2426] / [Intel XE#5848])
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@xe_pm@s4-mocs:
- shard-ptl: [ABORT][126] ([Intel XE#9362]) -> [INCOMPLETE][127] ([Intel XE#9339])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89/shard-ptl-6/igt@xe_pm@s4-mocs.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/shard-ptl-7/igt@xe_pm@s4-mocs.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2372
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
[Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
[Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
[Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
[Intel XE#5821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5821
[Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
[Intel XE#5835]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5835
[Intel XE#5846]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5846
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#5867]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5867
[Intel XE#5910]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5910
[Intel XE#5962]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5962
[Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
[Intel XE#6814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6814
[Intel XE#6867]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6867
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
[Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
[Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
[Intel XE#7225]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7225
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7359
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
[Intel XE#7413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7413
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7428
[Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7448]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7448
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#7591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7591
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7954]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7954
[Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8397
[Intel XE#8680]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8680
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#9093]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9093
[Intel XE#9096]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9096
[Intel XE#9339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9339
[Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
[Intel XE#9364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9364
[Intel XE#9365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9365
[Intel XE#9378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9378
[Intel XE#9412]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9412
[Intel XE#9438]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9438
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#9461]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9461
[Intel XE#9463]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9463
[Intel XE#9465]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9465
[Intel XE#9496]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9496
[Intel XE#9497]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9497
[Intel XE#9533]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9533
Build changes
-------------
* Linux: xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89 -> xe-pw-176324v1
IGT_9150: 18811c476bfde62ffbb4c0af55cd6f57e36e0dca @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5964-173c9ebb628f22cdfb18e080e0ef46b728649f89: 173c9ebb628f22cdfb18e080e0ef46b728649f89
xe-pw-176324v1: 176324v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176324v1/index.html
[-- Attachment #2: Type: text/html, Size: 46576 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 1/3] drm/xe/forcewake: add delayed release with hysteresis
2026-10-17 3:18 ` [PATCH 1/3] drm/xe/forcewake: add delayed release with hysteresis Zongyao Bai
@ 2026-11-09 20:55 ` Rodrigo Vivi
2026-11-10 1:00 ` Bai, Zongyao
0 siblings, 1 reply; 17+ messages in thread
From: Rodrigo Vivi @ 2026-11-09 20:55 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
On Sat, Oct 17, 2026 at 03:18:54AM +0000, Zongyao Bai wrote:
> Add xe_force_wake_put_delay(), which keeps a domain awake for a short hold
> time after its last reference is dropped instead of putting it to sleep
> immediately. A xe_force_wake_get() within that time reuses the awake domain
> without a wake request and ACK wait, which makes repeated short accesses
> cheaper.
>
> The domain is put to sleep from a delayed work, in process context, so
> the sleep ACK can be waited for in the same way as a regular put. The work
> sleeps only the domains whose hold time expired and which still have no
> reference, and requeues itself for the rest. The hold time is a couple of
> jiffies.
>
> Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
> ---
> drivers/gpu/drm/xe/xe_force_wake.c | 184 ++++++++++++++++++++---
> drivers/gpu/drm/xe/xe_force_wake.h | 21 ++-
> drivers/gpu/drm/xe/xe_force_wake_types.h | 14 ++
> drivers/gpu/drm/xe/xe_gt.c | 5 +-
> 4 files changed, 197 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
> index 197e2197bd0a..71517bc4ffe6 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.c
> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
> @@ -6,16 +6,22 @@
> #include "xe_force_wake.h"
>
> #include <drm/drm_util.h>
> +#include <linux/device.h>
> +#include <linux/workqueue.h>
>
> #include "regs/xe_gt_regs.h"
> #include "regs/xe_reg_defs.h"
> #include "xe_gt.h"
> #include "xe_gt_printk.h"
> #include "xe_mmio.h"
> +#include "xe_pm.h"
> #include "xe_sriov.h"
>
> #define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
>
> +/* Minimum hold of a delayed release, in jiffies. */
> +#define XE_FORCE_WAKE_HOLD_JIFFIES 2
please define in msec and use msec_to_jiffies()
> +
> static const char *str_wake_sleep(bool wake)
> {
> return wake ? "wake" : "sleep";
> @@ -42,12 +48,22 @@ static void init_domain(struct xe_force_wake *fw,
> mark_domain_initialized(fw, id);
> }
>
> -void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> +static void xe_force_wake_disable_work(void *arg)
> +{
> + struct xe_force_wake *fw = arg;
> +
> + disable_delayed_work_sync(&fw->delayed_release_work);
> +}
> +
> +static void xe_force_wake_delayed_release_work(struct work_struct *work);
> +
> +int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> {
> struct xe_device *xe = gt_to_xe(gt);
>
> fw->gt = gt;
> spin_lock_init(&fw->lock);
> + INIT_DELAYED_WORK(&fw->delayed_release_work, xe_force_wake_delayed_release_work);
>
> if (xe->info.graphics_verx100 >= 1270) {
> init_domain(fw, XE_FW_DOMAIN_ID_GT,
> @@ -58,6 +74,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> FORCEWAKE_GT,
> FORCEWAKE_ACK_GT);
> }
> +
> + return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_disable_work, fw);
> }
>
> void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
> @@ -187,8 +205,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> spin_lock_irqsave(&fw->lock, flags);
> for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
> if (!domain->ref++) {
> - awake_rqst |= BIT(domain->id);
> - domain_wake(gt, domain);
> + if (fw->delayed_domains & BIT(domain->id)) {
> + /* Still awake from a delayed release: reuse it. */
> + fw->delayed_domains &= ~BIT(domain->id);
> + } else {
> + awake_rqst |= BIT(domain->id);
> + domain_wake(gt, domain);
> + }
> }
> ref_incr |= BIT(domain->id);
> }
> @@ -212,23 +235,46 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> return ref_incr;
> }
>
> -/**
> - * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
> - * @fw: Pointer to the force wake structure
> - * @fw_ref: return of xe_force_wake_get()
> - *
> - * This function reduces the reference counts for domains in fw_ref. If
> - * refcount for any of the specified domain reaches 0, it puts the domain to sleep
> - * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
> - * Warns in case of timeout of ack from domain.
> +/*
> + * Put the @mask domains to sleep and wait for the acknowledgment. Must be
> + * called with fw->lock held. Returns the mask of domains that failed to
> + * acknowledge.
> */
> -void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> +static unsigned int xe_force_wake_sleep_locked(struct xe_force_wake *fw,
> + unsigned int mask)
> {
> struct xe_gt *gt = fw->gt;
> struct xe_force_wake_domain *domain;
> - unsigned int tmp, sleep = 0;
> + unsigned int tmp, ack_fail = 0;
> +
> + lockdep_assert_held(&fw->lock);
> +
> + for_each_fw_domain_masked(domain, mask, fw, tmp)
> + domain_sleep(gt, domain);
> +
> + for_each_fw_domain_masked(domain, mask, fw, tmp) {
> + if (domain_sleep_wait(gt, domain) == 0)
> + fw->awake_domains &= ~BIT(domain->id);
> + else
> + ack_fail |= BIT(domain->id);
> + }
> +
> + return ack_fail;
> +}
> +
> +static void xe_force_wake_warn_sleep_fail(struct xe_gt *gt, unsigned int ack_fail)
> +{
> + xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
> + str_plural(hweight_long(ack_fail)), ack_fail);
> +}
> +
> +static void __xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref,
> + bool delayed)
perhaps instead of bool we pass the msec of delay instead?
> +{
> + struct xe_gt *gt = fw->gt;
> + struct xe_force_wake_domain *domain;
> + unsigned int tmp, sleep = 0, ack_fail;
> unsigned long flags;
> - int ack_fail = 0;
>
> /*
> * Avoid unnecessary lock and unlock when the function is called
> @@ -244,21 +290,111 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> for_each_fw_domain_masked(domain, fw_ref, fw, tmp) {
> xe_gt_assert(gt, domain->ref);
>
> - if (!--domain->ref) {
> + if (--domain->ref)
> + continue;
> +
> + if (delayed) {
> + domain->hold_until = jiffies + XE_FORCE_WAKE_HOLD_JIFFIES;
> + fw->delayed_domains |= BIT(domain->id);
> + /*
> + * queue_delayed_work() returns false both when the work
> + * is already pending and when flush/stop has disabled
> + * it. A pending worker releases the domain later, a
> + * disabled one never will, so release it right away.
> + *
> + * If the worker starts and clears PENDING between the
> + * two checks, it is misread as disabled and released
> + * early. That is safe: the delayed bit is cleared
> + * under fw->lock, so the worker does not see the
> + * domain and does not sleep it again. Only this one
> + * hold is lost.
> + */
> + if (!queue_delayed_work(system_percpu_wq, &fw->delayed_release_work,
> + XE_FORCE_WAKE_HOLD_JIFFIES) &&
> + !delayed_work_pending(&fw->delayed_release_work)) {
This is confusing... perhaps a fw->delayed_enabled bool that is set and cleared
under fw->lock by stop, is cleaner removing race and comment above...
> + fw->delayed_domains &= ~BIT(domain->id);
> + sleep |= BIT(domain->id);
> + }
> + } else {
> sleep |= BIT(domain->id);
> - domain_sleep(gt, domain);
> }
> }
> - for_each_fw_domain_masked(domain, sleep, fw, tmp) {
> - if (domain_sleep_wait(gt, domain) == 0)
> - fw->awake_domains &= ~BIT(domain->id);
> - else
> - ack_fail |= BIT(domain->id);
> + ack_fail = xe_force_wake_sleep_locked(fw, sleep);
> + spin_unlock_irqrestore(&fw->lock, flags);
> +
> + xe_force_wake_warn_sleep_fail(gt, ack_fail);
> +}
> +
> +/**
> + * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
> + * @fw: Pointer to the force wake structure
> + * @fw_ref: return of xe_force_wake_get()
> + *
> + * This function reduces the reference counts for domains in fw_ref. If
> + * refcount for any of the specified domain reaches 0, it puts the domain to sleep
> + * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
> + * Warns in case of timeout of ack from domain.
> + */
> +void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> +{
> + __xe_force_wake_put(fw, fw_ref, false);
> +}
> +
> +/**
> + * xe_force_wake_put_delay - Decrement the refcount, delaying the sleep request
> + * @fw: Pointer to the force wake structure
> + * @fw_ref: return of xe_force_wake_get()
> + *
> + * Like xe_force_wake_put(), but a domain whose refcount reaches 0 is kept
> + * awake for a short hold time instead of being put to sleep right away. An
> + * xe_force_wake_get() during that time reuses the awake domain without a
> + * wake request, which makes repeated short accesses cheaper. The domain is
> + * put to sleep by a worker once the hold time expires without a new user.
> + *
> + * Meant for opt-in hot paths that are expected to be repeated shortly after.
> + */
> +void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref)
> +{
> + __xe_force_wake_put(fw, fw_ref, true);
> +}
> +
> +/*
> + * Put the delayed domains whose hold time expired to sleep, and requeue for
> + * the remaining ones.
> + */
> +static void xe_force_wake_delayed_release_work(struct work_struct *work)
> +{
> + struct xe_force_wake *fw = container_of(to_delayed_work(work),
> + struct xe_force_wake, delayed_release_work);
> + struct xe_gt *gt = fw->gt;
> + struct xe_force_wake_domain *domain;
> + unsigned int tmp, expired = 0, ack_fail;
> + unsigned long flags, next = 0;
> + bool remaining = false;
> +
> + xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
what about a get_if_active variant or something like that instead this
fragile assert?
> +
> + spin_lock_irqsave(&fw->lock, flags);
> + for_each_fw_domain_masked(domain, fw->delayed_domains, fw, tmp) {
> + if (time_before(jiffies, domain->hold_until)) {
> + if (!remaining || time_before(domain->hold_until, next))
> + next = domain->hold_until;
> + remaining = true;
> + continue;
> + }
> +
> + expired |= BIT(domain->id);
> + fw->delayed_domains &= ~BIT(domain->id);
> }
> +
> + ack_fail = xe_force_wake_sleep_locked(fw, expired);
> +
> + if (remaining)
> + queue_delayed_work(system_percpu_wq, &fw->delayed_release_work,
> + next - jiffies);
> spin_unlock_irqrestore(&fw->lock, flags);
>
> - xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
> - str_plural(hweight_long(ack_fail)), ack_fail);
> + xe_force_wake_warn_sleep_fail(gt, ack_fail);
> }
>
> const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
> index e2721f205d6c..35a2252c762a 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.h
> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
> @@ -11,13 +11,14 @@
>
> struct xe_gt;
>
> -void xe_force_wake_init_gt(struct xe_gt *gt,
> - struct xe_force_wake *fw);
> +int xe_force_wake_init_gt(struct xe_gt *gt,
> + struct xe_force_wake *fw);
> void xe_force_wake_init_engines(struct xe_gt *gt,
> struct xe_force_wake *fw);
> unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> enum xe_force_wake_domains domains);
> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
> +void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref);
>
> const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
>
> @@ -103,6 +104,22 @@ DEFINE_CLASS(xe_force_wake, struct xe_force_wake_ref,
> #define xe_with_force_wake(ref, fw, domains) \
> __xe_with_force_wake(ref, fw, domains, __UNIQUE_ID(done))
>
> +/*
> + * Same as the xe_force_wake class, but the domains are released with
> + * xe_force_wake_put_delay().
> + */
> +DEFINE_CLASS(xe_force_wake_delay, struct xe_force_wake_ref,
> + xe_force_wake_put_delay(_T.fw, _T.domains),
> + xe_force_wake_constructor(fw, domains),
> + struct xe_force_wake *fw, unsigned int domains);
> +
> +#define __xe_with_force_wake_delay(ref, fw, domains, done) \
> + for (CLASS(xe_force_wake_delay, ref)(fw, domains), *(done) = NULL; \
> + !(done); (done) = (void *)1)
> +
> +#define xe_with_force_wake_delay(ref, fw, domains) \
> + __xe_with_force_wake_delay(ref, fw, domains, __UNIQUE_ID(done))
> +
> /*
> * Used when xe_force_wake_constructor() has already been called by another
> * function and the current function is responsible for releasing the forcewake
> diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
> index 14b7b86e801b..5c16511c6f36 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake_types.h
> +++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
> @@ -8,6 +8,7 @@
>
> #include <linux/mutex.h>
> #include <linux/types.h>
> +#include <linux/workqueue.h>
>
> #include "regs/xe_reg_defs.h"
>
> @@ -82,6 +83,11 @@ struct xe_force_wake_domain {
> u32 mask;
> /** @ref: domain reference */
> u32 ref;
> + /**
> + * @hold_until: jiffies value until which a delayed release keeps the
> + * domain awake. Protected by &xe_force_wake.lock.
> + */
> + unsigned long hold_until;
> };
>
> /**
> @@ -101,6 +107,14 @@ struct xe_force_wake {
> spinlock_t lock;
> /** @awake_domains: mask of all domains awake */
> unsigned int awake_domains;
> + /**
> + * @delayed_domains: mask of unreferenced domains that are kept awake
> + * until @delayed_release_work puts them to sleep. A subset of
> + * @awake_domains.
> + */
> + unsigned int delayed_domains;
> + /** @delayed_release_work: puts expired @delayed_domains to sleep */
> + struct delayed_work delayed_release_work;
> /** @initialized_domains: mask of all initialized domains */
> unsigned int initialized_domains;
> /** @domains: force wake domains */
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 775c826b68b4..5ed96807fe34 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -515,7 +515,10 @@ int xe_gt_init_early(struct xe_gt *gt)
>
> xe_wa_process_gt_oob(gt);
>
> - xe_force_wake_init_gt(gt, gt_to_fw(gt));
> + err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
> + if (err)
> + return err;
> +
> spin_lock_init(>->global_invl_lock);
>
> err = xe_gt_tlb_inval_init_early(gt);
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 1/3] drm/xe/forcewake: add delayed release with hysteresis
2026-11-09 20:55 ` Rodrigo Vivi
@ 2026-11-10 1:00 ` Bai, Zongyao
0 siblings, 0 replies; 17+ messages in thread
From: Bai, Zongyao @ 2026-11-10 1:00 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-xe
Thank you Vivi for the reviewing!
On 11/9/2026 12:55 PM, Rodrigo Vivi wrote:
> On Sat, Oct 17, 2026 at 03:18:54AM +0000, Zongyao Bai wrote:
>> Add xe_force_wake_put_delay(), which keeps a domain awake for a short hold
>> time after its last reference is dropped instead of putting it to sleep
>> immediately. A xe_force_wake_get() within that time reuses the awake domain
>> without a wake request and ACK wait, which makes repeated short accesses
>> cheaper.
>>
>> The domain is put to sleep from a delayed work, in process context, so
>> the sleep ACK can be waited for in the same way as a regular put. The work
>> sleeps only the domains whose hold time expired and which still have no
>> reference, and requeues itself for the rest. The hold time is a couple of
>> jiffies.
>>
>> Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_force_wake.c | 184 ++++++++++++++++++++---
>> drivers/gpu/drm/xe/xe_force_wake.h | 21 ++-
>> drivers/gpu/drm/xe/xe_force_wake_types.h | 14 ++
>> drivers/gpu/drm/xe/xe_gt.c | 5 +-
>> 4 files changed, 197 insertions(+), 27 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
>> index 197e2197bd0a..71517bc4ffe6 100644
>> --- a/drivers/gpu/drm/xe/xe_force_wake.c
>> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
>> @@ -6,16 +6,22 @@
>> #include "xe_force_wake.h"
>>
>> #include <drm/drm_util.h>
>> +#include <linux/device.h>
>> +#include <linux/workqueue.h>
>>
>> #include "regs/xe_gt_regs.h"
>> #include "regs/xe_reg_defs.h"
>> #include "xe_gt.h"
>> #include "xe_gt_printk.h"
>> #include "xe_mmio.h"
>> +#include "xe_pm.h"
>> #include "xe_sriov.h"
>>
>> #define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
>>
>> +/* Minimum hold of a delayed release, in jiffies. */
>> +#define XE_FORCE_WAKE_HOLD_JIFFIES 2
> please define in msec and use msec_to_jiffies()
Got it.
will change to: XE_FORCE_WAKE_HOLD_MS
>
>> +
>> static const char *str_wake_sleep(bool wake)
>> {
>> return wake ? "wake" : "sleep";
>> @@ -42,12 +48,22 @@ static void init_domain(struct xe_force_wake *fw,
>> mark_domain_initialized(fw, id);
>> }
>>
>> -void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
>> +static void xe_force_wake_disable_work(void *arg)
>> +{
>> + struct xe_force_wake *fw = arg;
>> +
>> + disable_delayed_work_sync(&fw->delayed_release_work);
>> +}
>> +
>> +static void xe_force_wake_delayed_release_work(struct work_struct *work);
>> +
>> +int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
>> {
>> struct xe_device *xe = gt_to_xe(gt);
>>
>> fw->gt = gt;
>> spin_lock_init(&fw->lock);
>> + INIT_DELAYED_WORK(&fw->delayed_release_work, xe_force_wake_delayed_release_work);
>>
>> if (xe->info.graphics_verx100 >= 1270) {
>> init_domain(fw, XE_FW_DOMAIN_ID_GT,
>> @@ -58,6 +74,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
>> FORCEWAKE_GT,
>> FORCEWAKE_ACK_GT);
>> }
>> +
>> + return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_disable_work, fw);
>> }
>>
>> void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
>> @@ -187,8 +205,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
>> spin_lock_irqsave(&fw->lock, flags);
>> for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
>> if (!domain->ref++) {
>> - awake_rqst |= BIT(domain->id);
>> - domain_wake(gt, domain);
>> + if (fw->delayed_domains & BIT(domain->id)) {
>> + /* Still awake from a delayed release: reuse it. */
>> + fw->delayed_domains &= ~BIT(domain->id);
>> + } else {
>> + awake_rqst |= BIT(domain->id);
>> + domain_wake(gt, domain);
>> + }
>> }
>> ref_incr |= BIT(domain->id);
>> }
>> @@ -212,23 +235,46 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
>> return ref_incr;
>> }
>>
>> -/**
>> - * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
>> - * @fw: Pointer to the force wake structure
>> - * @fw_ref: return of xe_force_wake_get()
>> - *
>> - * This function reduces the reference counts for domains in fw_ref. If
>> - * refcount for any of the specified domain reaches 0, it puts the domain to sleep
>> - * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
>> - * Warns in case of timeout of ack from domain.
>> +/*
>> + * Put the @mask domains to sleep and wait for the acknowledgment. Must be
>> + * called with fw->lock held. Returns the mask of domains that failed to
>> + * acknowledge.
>> */
>> -void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
>> +static unsigned int xe_force_wake_sleep_locked(struct xe_force_wake *fw,
>> + unsigned int mask)
>> {
>> struct xe_gt *gt = fw->gt;
>> struct xe_force_wake_domain *domain;
>> - unsigned int tmp, sleep = 0;
>> + unsigned int tmp, ack_fail = 0;
>> +
>> + lockdep_assert_held(&fw->lock);
>> +
>> + for_each_fw_domain_masked(domain, mask, fw, tmp)
>> + domain_sleep(gt, domain);
>> +
>> + for_each_fw_domain_masked(domain, mask, fw, tmp) {
>> + if (domain_sleep_wait(gt, domain) == 0)
>> + fw->awake_domains &= ~BIT(domain->id);
>> + else
>> + ack_fail |= BIT(domain->id);
>> + }
>> +
>> + return ack_fail;
>> +}
>> +
>> +static void xe_force_wake_warn_sleep_fail(struct xe_gt *gt, unsigned int ack_fail)
>> +{
>> + xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
>> + str_plural(hweight_long(ack_fail)), ack_fail);
>> +}
>> +
>> +static void __xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref,
>> + bool delayed)
> perhaps instead of bool we pass the msec of delay instead?
Get it. Will change to:
__xe_force_wake_put(fw, ref, unsigned int hold_ms)
hold_ms = 0 /* sleep immediately */
hold_ms = XE_FORCE_WAKE_HOLD_MS /* delayed release */
>
>> +{
>> + struct xe_gt *gt = fw->gt;
>> + struct xe_force_wake_domain *domain;
>> + unsigned int tmp, sleep = 0, ack_fail;
>> unsigned long flags;
>> - int ack_fail = 0;
>>
>> /*
>> * Avoid unnecessary lock and unlock when the function is called
>> @@ -244,21 +290,111 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
>> for_each_fw_domain_masked(domain, fw_ref, fw, tmp) {
>> xe_gt_assert(gt, domain->ref);
>>
>> - if (!--domain->ref) {
>> + if (--domain->ref)
>> + continue;
>> +
>> + if (delayed) {
>> + domain->hold_until = jiffies + XE_FORCE_WAKE_HOLD_JIFFIES;
>> + fw->delayed_domains |= BIT(domain->id);
>> + /*
>> + * queue_delayed_work() returns false both when the work
>> + * is already pending and when flush/stop has disabled
>> + * it. A pending worker releases the domain later, a
>> + * disabled one never will, so release it right away.
>> + *
>> + * If the worker starts and clears PENDING between the
>> + * two checks, it is misread as disabled and released
>> + * early. That is safe: the delayed bit is cleared
>> + * under fw->lock, so the worker does not see the
>> + * domain and does not sleep it again. Only this one
>> + * hold is lost.
>> + */
>> + if (!queue_delayed_work(system_percpu_wq, &fw->delayed_release_work,
>> + XE_FORCE_WAKE_HOLD_JIFFIES) &&
>> + !delayed_work_pending(&fw->delayed_release_work)) {
> This is confusing... perhaps a fw->delayed_enabled bool that is set and cleared
> under fw->lock by stop, is cleaner removing race and comment above...
Yeah, it's not worth to save a parameter here.
Got it, will change to:
+ if (hold_ms && fw->delayed_enabled) {
+ unsigned long hold = msecs_to_jiffies(hold_ms);
+
+ domain->hold_until = jiffies + hold;
fw->delayed_domains |= BIT(domain->id);
+ queue_delayed_work(system_percpu_wq,
&fw->delayed_release_work, hold);
And init it as true, and
in xe_force_wake_stop() -> fw->delayed_enabled = false;
in xe_force_wake_disable_work() -> fw->delayed_enabled = false;
>
>> + fw->delayed_domains &= ~BIT(domain->id);
>> + sleep |= BIT(domain->id);
>> + }
>> + } else {
>> sleep |= BIT(domain->id);
>> - domain_sleep(gt, domain);
>> }
>> }
>> - for_each_fw_domain_masked(domain, sleep, fw, tmp) {
>> - if (domain_sleep_wait(gt, domain) == 0)
>> - fw->awake_domains &= ~BIT(domain->id);
>> - else
>> - ack_fail |= BIT(domain->id);
>> + ack_fail = xe_force_wake_sleep_locked(fw, sleep);
>> + spin_unlock_irqrestore(&fw->lock, flags);
>> +
>> + xe_force_wake_warn_sleep_fail(gt, ack_fail);
>> +}
>> +
>> +/**
>> + * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
>> + * @fw: Pointer to the force wake structure
>> + * @fw_ref: return of xe_force_wake_get()
>> + *
>> + * This function reduces the reference counts for domains in fw_ref. If
>> + * refcount for any of the specified domain reaches 0, it puts the domain to sleep
>> + * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
>> + * Warns in case of timeout of ack from domain.
>> + */
>> +void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
>> +{
>> + __xe_force_wake_put(fw, fw_ref, false);
>> +}
>> +
>> +/**
>> + * xe_force_wake_put_delay - Decrement the refcount, delaying the sleep request
>> + * @fw: Pointer to the force wake structure
>> + * @fw_ref: return of xe_force_wake_get()
>> + *
>> + * Like xe_force_wake_put(), but a domain whose refcount reaches 0 is kept
>> + * awake for a short hold time instead of being put to sleep right away. An
>> + * xe_force_wake_get() during that time reuses the awake domain without a
>> + * wake request, which makes repeated short accesses cheaper. The domain is
>> + * put to sleep by a worker once the hold time expires without a new user.
>> + *
>> + * Meant for opt-in hot paths that are expected to be repeated shortly after.
>> + */
>> +void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref)
>> +{
>> + __xe_force_wake_put(fw, fw_ref, true);
>> +}
>> +
>> +/*
>> + * Put the delayed domains whose hold time expired to sleep, and requeue for
>> + * the remaining ones.
>> + */
>> +static void xe_force_wake_delayed_release_work(struct work_struct *work)
>> +{
>> + struct xe_force_wake *fw = container_of(to_delayed_work(work),
>> + struct xe_force_wake, delayed_release_work);
>> + struct xe_gt *gt = fw->gt;
>> + struct xe_force_wake_domain *domain;
>> + unsigned int tmp, expired = 0, ack_fail;
>> + unsigned long flags, next = 0;
>> + bool remaining = false;
>> +
>> + xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
> what about a get_if_active variant or something like that instead this
> fragile assert?
Agree! It's much better, will change to:
+ if (!xe_pm_runtime_get_if_active(xe))
+ return;
>
>> +
>> + spin_lock_irqsave(&fw->lock, flags);
>> + for_each_fw_domain_masked(domain, fw->delayed_domains, fw, tmp) {
>> + if (time_before(jiffies, domain->hold_until)) {
>> + if (!remaining || time_before(domain->hold_until, next))
>> + next = domain->hold_until;
>> + remaining = true;
>> + continue;
>> + }
>> +
>> + expired |= BIT(domain->id);
>> + fw->delayed_domains &= ~BIT(domain->id);
>> }
>> +
>> + ack_fail = xe_force_wake_sleep_locked(fw, expired);
>> +
>> + if (remaining)
>> + queue_delayed_work(system_percpu_wq, &fw->delayed_release_work,
>> + next - jiffies);
>> spin_unlock_irqrestore(&fw->lock, flags);
>>
>> - xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
>> - str_plural(hweight_long(ack_fail)), ack_fail);
>> + xe_force_wake_warn_sleep_fail(gt, ack_fail);
>> }
>>
>> const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
>> index e2721f205d6c..35a2252c762a 100644
>> --- a/drivers/gpu/drm/xe/xe_force_wake.h
>> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
>> @@ -11,13 +11,14 @@
>>
>> struct xe_gt;
>>
>> -void xe_force_wake_init_gt(struct xe_gt *gt,
>> - struct xe_force_wake *fw);
>> +int xe_force_wake_init_gt(struct xe_gt *gt,
>> + struct xe_force_wake *fw);
>> void xe_force_wake_init_engines(struct xe_gt *gt,
>> struct xe_force_wake *fw);
>> unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
>> enum xe_force_wake_domains domains);
>> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
>> +void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref);
>>
>> const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
>>
>> @@ -103,6 +104,22 @@ DEFINE_CLASS(xe_force_wake, struct xe_force_wake_ref,
>> #define xe_with_force_wake(ref, fw, domains) \
>> __xe_with_force_wake(ref, fw, domains, __UNIQUE_ID(done))
>>
>> +/*
>> + * Same as the xe_force_wake class, but the domains are released with
>> + * xe_force_wake_put_delay().
>> + */
>> +DEFINE_CLASS(xe_force_wake_delay, struct xe_force_wake_ref,
>> + xe_force_wake_put_delay(_T.fw, _T.domains),
>> + xe_force_wake_constructor(fw, domains),
>> + struct xe_force_wake *fw, unsigned int domains);
>> +
>> +#define __xe_with_force_wake_delay(ref, fw, domains, done) \
>> + for (CLASS(xe_force_wake_delay, ref)(fw, domains), *(done) = NULL; \
>> + !(done); (done) = (void *)1)
>> +
>> +#define xe_with_force_wake_delay(ref, fw, domains) \
>> + __xe_with_force_wake_delay(ref, fw, domains, __UNIQUE_ID(done))
>> +
>> /*
>> * Used when xe_force_wake_constructor() has already been called by another
>> * function and the current function is responsible for releasing the forcewake
>> diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
>> index 14b7b86e801b..5c16511c6f36 100644
>> --- a/drivers/gpu/drm/xe/xe_force_wake_types.h
>> +++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
>> @@ -8,6 +8,7 @@
>>
>> #include <linux/mutex.h>
>> #include <linux/types.h>
>> +#include <linux/workqueue.h>
>>
>> #include "regs/xe_reg_defs.h"
>>
>> @@ -82,6 +83,11 @@ struct xe_force_wake_domain {
>> u32 mask;
>> /** @ref: domain reference */
>> u32 ref;
>> + /**
>> + * @hold_until: jiffies value until which a delayed release keeps the
>> + * domain awake. Protected by &xe_force_wake.lock.
>> + */
>> + unsigned long hold_until;
>> };
>>
>> /**
>> @@ -101,6 +107,14 @@ struct xe_force_wake {
>> spinlock_t lock;
>> /** @awake_domains: mask of all domains awake */
>> unsigned int awake_domains;
>> + /**
>> + * @delayed_domains: mask of unreferenced domains that are kept awake
>> + * until @delayed_release_work puts them to sleep. A subset of
>> + * @awake_domains.
>> + */
>> + unsigned int delayed_domains;
>> + /** @delayed_release_work: puts expired @delayed_domains to sleep */
>> + struct delayed_work delayed_release_work;
>> /** @initialized_domains: mask of all initialized domains */
>> unsigned int initialized_domains;
>> /** @domains: force wake domains */
>> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
>> index 775c826b68b4..5ed96807fe34 100644
>> --- a/drivers/gpu/drm/xe/xe_gt.c
>> +++ b/drivers/gpu/drm/xe/xe_gt.c
>> @@ -515,7 +515,10 @@ int xe_gt_init_early(struct xe_gt *gt)
>>
>> xe_wa_process_gt_oob(gt);
>>
>> - xe_force_wake_init_gt(gt, gt_to_fw(gt));
>> + err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
>> + if (err)
>> + return err;
>> +
>> spin_lock_init(>->global_invl_lock);
>>
>> err = xe_gt_tlb_inval_init_early(gt);
>> --
>> 2.43.0
>>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v2 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries
2026-10-17 3:18 [PATCH 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries Zongyao Bai
` (7 preceding siblings ...)
2026-10-17 5:48 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-11-10 22:05 ` Zongyao Bai
2026-11-10 22:05 ` [PATCH v2 1/3] drm/xe/forcewake: add delayed release with hysteresis Zongyao Bai
` (2 more replies)
8 siblings, 3 replies; 17+ messages in thread
From: Zongyao Bai @ 2026-11-10 22:05 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, rodrigo.vivi, Zongyao Bai
Engine-cycle queries are issued repeatedly by profilers such as VTune
and PTI to correlate CPU and GPU timestamps, for example through Level
Zero zeDeviceGetGlobalTimestamps(). Each query wakes the engine
forcewake domain and puts it to sleep again, and waiting for both
acknowledgments dominates the query latency.
This series adds an opt-in delayed release to forcewake. After the
final reference to a domain is dropped with xe_force_wake_put_delay(),
the domain stays awake for a short hold time, and a get within that
time reuses it without another wake request or ACK wait. The domain is
put to sleep from a delayed work in process context, so the sleep ACK
is waited for as in a regular put. The work sleeps only domains whose
hold time expired and that are still unreferenced, and requeues itself
for the rest. The hold time is 5 ms, and never less than two jiffies.
Delayed release must not outlive the device being powered off, reset
or removed. System and runtime suspend flush it: the pending work is
canceled and the held domains are put to sleep, while delayed release
stays available after resume. GT shutdown, device removal and
post-registration probe failure stop it: the work is disabled for good,
and a later delayed put puts the domain to sleep right away.
Only engine-cycle queries opt in. All other forcewake users keep
releasing immediately.
v2:
- Define the hold time in milliseconds and convert it with
msecs_to_jiffies(), keeping it at least two jiffies. (Rodrigo)
- Pass the hold time to __xe_force_wake_put() instead of a bool, with
0 meaning an immediate release. (Rodrigo)
- Replace the queue_delayed_work()/delayed_work_pending() check with a
delayed_enabled flag protected by the forcewake lock and cleared by
xe_force_wake_stop(). (Rodrigo)
- Use xe_pm_runtime_get_if_active() in the delayed work instead of
asserting that the device is not runtime suspended. (Rodrigo)
- Rebase on drm-xe-next (4af7fae27dc6).
Zongyao Bai (3):
drm/xe/forcewake: add delayed release with hysteresis
drm/xe/forcewake: flush delayed release at power and teardown
boundaries
drm/xe/query: use delayed forcewake release for engine-cycle queries
drivers/gpu/drm/xe/xe_device.c | 11 ++
drivers/gpu/drm/xe/xe_force_wake.c | 235 ++++++++++++++++++++---
drivers/gpu/drm/xe/xe_force_wake.h | 39 +++-
drivers/gpu/drm/xe/xe_force_wake_types.h | 48 +++++
drivers/gpu/drm/xe/xe_gt.c | 15 +-
drivers/gpu/drm/xe/xe_query.c | 2 +-
6 files changed, 318 insertions(+), 32 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v2 1/3] drm/xe/forcewake: add delayed release with hysteresis
2026-11-10 22:05 ` [PATCH v2 0/3] " Zongyao Bai
@ 2026-11-10 22:05 ` Zongyao Bai
2026-11-10 22:34 ` sashiko-bot
2026-11-10 22:05 ` [PATCH v2 2/3] drm/xe/forcewake: flush delayed release at power and teardown boundaries Zongyao Bai
2026-11-10 22:05 ` [PATCH v2 3/3] drm/xe/query: use delayed forcewake release for engine-cycle queries Zongyao Bai
2 siblings, 1 reply; 17+ messages in thread
From: Zongyao Bai @ 2026-11-10 22:05 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, rodrigo.vivi, Zongyao Bai
Add xe_force_wake_put_delay(), which keeps a domain awake for a short hold
time after its last reference is dropped instead of putting it to sleep
immediately. A xe_force_wake_get() within that time reuses the awake domain
without a wake request and ACK wait, which makes repeated short accesses
cheaper.
The domain is put to sleep from a delayed work, in process context, so
the sleep ACK can be waited for in the same way as a regular put. The work
sleeps only the domains whose hold time expired and which still have no
reference, and requeues itself for the rest. The hold time is 5 ms, but
never less than two jiffies.
Delayed release can be disabled for good under the forcewake lock, after
which a put_delay() releases the domain right away.
Suggested-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_force_wake.c | 191 ++++++++++++++++++++---
drivers/gpu/drm/xe/xe_force_wake.h | 21 ++-
drivers/gpu/drm/xe/xe_force_wake_types.h | 19 +++
drivers/gpu/drm/xe/xe_gt.c | 5 +-
4 files changed, 209 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index 197e2197bd0a..d09d138c1084 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -6,16 +6,28 @@
#include "xe_force_wake.h"
#include <drm/drm_util.h>
+#include <linux/device.h>
+#include <linux/workqueue.h>
#include "regs/xe_gt_regs.h"
#include "regs/xe_reg_defs.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
#include "xe_mmio.h"
+#include "xe_pm.h"
#include "xe_sriov.h"
#define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
+/* Hold time of a delayed release. */
+#define XE_FORCE_WAKE_HOLD_MS 5
+
+/* Keep the hold at two jiffies or more, so it spans a full tick on any HZ. */
+static unsigned long xe_force_wake_hold_jiffies(unsigned int hold_ms)
+{
+ return max(msecs_to_jiffies(hold_ms), 2UL);
+}
+
static const char *str_wake_sleep(bool wake)
{
return wake ? "wake" : "sleep";
@@ -42,12 +54,33 @@ static void init_domain(struct xe_force_wake *fw,
mark_domain_initialized(fw, id);
}
-void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
+static void xe_force_wake_disable_delayed(struct xe_force_wake *fw)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&fw->lock, flags);
+ fw->delayed_enabled = false;
+ spin_unlock_irqrestore(&fw->lock, flags);
+
+ /* Not under fw->lock, the worker takes it. */
+ disable_delayed_work_sync(&fw->delayed_release_work);
+}
+
+static void xe_force_wake_disable_work(void *arg)
+{
+ xe_force_wake_disable_delayed(arg);
+}
+
+static void xe_force_wake_delayed_release_work(struct work_struct *work);
+
+int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
{
struct xe_device *xe = gt_to_xe(gt);
fw->gt = gt;
spin_lock_init(&fw->lock);
+ INIT_DELAYED_WORK(&fw->delayed_release_work, xe_force_wake_delayed_release_work);
+ fw->delayed_enabled = true;
if (xe->info.graphics_verx100 >= 1270) {
init_domain(fw, XE_FW_DOMAIN_ID_GT,
@@ -58,6 +91,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
FORCEWAKE_GT,
FORCEWAKE_ACK_GT);
}
+
+ return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_disable_work, fw);
}
void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
@@ -187,8 +222,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
spin_lock_irqsave(&fw->lock, flags);
for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
if (!domain->ref++) {
- awake_rqst |= BIT(domain->id);
- domain_wake(gt, domain);
+ if (fw->delayed_domains & BIT(domain->id)) {
+ /* Still awake from a delayed release: reuse it. */
+ fw->delayed_domains &= ~BIT(domain->id);
+ } else {
+ awake_rqst |= BIT(domain->id);
+ domain_wake(gt, domain);
+ }
}
ref_incr |= BIT(domain->id);
}
@@ -212,23 +252,46 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
return ref_incr;
}
-/**
- * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
- * @fw: Pointer to the force wake structure
- * @fw_ref: return of xe_force_wake_get()
- *
- * This function reduces the reference counts for domains in fw_ref. If
- * refcount for any of the specified domain reaches 0, it puts the domain to sleep
- * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
- * Warns in case of timeout of ack from domain.
+/*
+ * Put the @mask domains to sleep and wait for the acknowledgment. Must be
+ * called with fw->lock held. Returns the mask of domains that failed to
+ * acknowledge.
*/
-void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
+static unsigned int xe_force_wake_sleep_locked(struct xe_force_wake *fw,
+ unsigned int mask)
{
struct xe_gt *gt = fw->gt;
struct xe_force_wake_domain *domain;
- unsigned int tmp, sleep = 0;
+ unsigned int tmp, ack_fail = 0;
+
+ lockdep_assert_held(&fw->lock);
+
+ for_each_fw_domain_masked(domain, mask, fw, tmp)
+ domain_sleep(gt, domain);
+
+ for_each_fw_domain_masked(domain, mask, fw, tmp) {
+ if (domain_sleep_wait(gt, domain) == 0)
+ fw->awake_domains &= ~BIT(domain->id);
+ else
+ ack_fail |= BIT(domain->id);
+ }
+
+ return ack_fail;
+}
+
+static void xe_force_wake_warn_sleep_fail(struct xe_gt *gt, unsigned int ack_fail)
+{
+ xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
+ str_plural(hweight_long(ack_fail)), ack_fail);
+}
+
+static void __xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref,
+ unsigned int hold_ms)
+{
+ struct xe_gt *gt = fw->gt;
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp, sleep = 0, ack_fail;
unsigned long flags;
- int ack_fail = 0;
/*
* Avoid unnecessary lock and unlock when the function is called
@@ -244,21 +307,101 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
for_each_fw_domain_masked(domain, fw_ref, fw, tmp) {
xe_gt_assert(gt, domain->ref);
- if (!--domain->ref) {
+ if (--domain->ref)
+ continue;
+
+ if (hold_ms && fw->delayed_enabled) {
+ unsigned long hold = xe_force_wake_hold_jiffies(hold_ms);
+
+ domain->hold_until = jiffies + hold;
+ fw->delayed_domains |= BIT(domain->id);
+ /* No-op if pending, the worker requeues for the latest hold. */
+ queue_delayed_work(system_percpu_wq,
+ &fw->delayed_release_work, hold);
+ } else {
sleep |= BIT(domain->id);
- domain_sleep(gt, domain);
}
}
- for_each_fw_domain_masked(domain, sleep, fw, tmp) {
- if (domain_sleep_wait(gt, domain) == 0)
- fw->awake_domains &= ~BIT(domain->id);
- else
- ack_fail |= BIT(domain->id);
+ ack_fail = xe_force_wake_sleep_locked(fw, sleep);
+ spin_unlock_irqrestore(&fw->lock, flags);
+
+ xe_force_wake_warn_sleep_fail(gt, ack_fail);
+}
+
+/**
+ * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
+ * @fw: Pointer to the force wake structure
+ * @fw_ref: return of xe_force_wake_get()
+ *
+ * This function reduces the reference counts for domains in fw_ref. If
+ * refcount for any of the specified domain reaches 0, it puts the domain to sleep
+ * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
+ * Warns in case of timeout of ack from domain.
+ */
+void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
+{
+ __xe_force_wake_put(fw, fw_ref, 0);
+}
+
+/**
+ * xe_force_wake_put_delay - Decrement the refcount, delaying the sleep request
+ * @fw: Pointer to the force wake structure
+ * @fw_ref: return of xe_force_wake_get()
+ *
+ * Like xe_force_wake_put(), but a domain whose refcount reaches 0 is kept
+ * awake for a short hold time instead of being put to sleep right away. An
+ * xe_force_wake_get() during that time reuses the awake domain without a
+ * wake request, which makes repeated short accesses cheaper. The domain is
+ * put to sleep by a worker once the hold time expires without a new user.
+ *
+ * Meant for opt-in hot paths that are expected to be repeated shortly after.
+ */
+void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref)
+{
+ __xe_force_wake_put(fw, fw_ref, XE_FORCE_WAKE_HOLD_MS);
+}
+
+/*
+ * Put the delayed domains whose hold time expired to sleep, and requeue for
+ * the remaining ones.
+ */
+static void xe_force_wake_delayed_release_work(struct work_struct *work)
+{
+ struct xe_force_wake *fw = container_of(to_delayed_work(work),
+ struct xe_force_wake, delayed_release_work);
+ struct xe_gt *gt = fw->gt;
+ struct xe_device *xe = gt_to_xe(gt);
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp, expired = 0, ack_fail;
+ unsigned long flags, next = 0;
+ bool remaining = false;
+
+ /* Never resume from here, the suspend flush settles delayed domains. */
+ if (!xe_pm_runtime_get_if_active(xe))
+ return;
+
+ spin_lock_irqsave(&fw->lock, flags);
+ for_each_fw_domain_masked(domain, fw->delayed_domains, fw, tmp) {
+ if (time_before(jiffies, domain->hold_until)) {
+ if (!remaining || time_before(domain->hold_until, next))
+ next = domain->hold_until;
+ remaining = true;
+ continue;
+ }
+
+ expired |= BIT(domain->id);
+ fw->delayed_domains &= ~BIT(domain->id);
}
+
+ ack_fail = xe_force_wake_sleep_locked(fw, expired);
+
+ if (remaining)
+ queue_delayed_work(system_percpu_wq, &fw->delayed_release_work,
+ next - jiffies);
spin_unlock_irqrestore(&fw->lock, flags);
- xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
- str_plural(hweight_long(ack_fail)), ack_fail);
+ xe_force_wake_warn_sleep_fail(gt, ack_fail);
+ xe_pm_runtime_put(xe);
}
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
index e2721f205d6c..35a2252c762a 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.h
+++ b/drivers/gpu/drm/xe/xe_force_wake.h
@@ -11,13 +11,14 @@
struct xe_gt;
-void xe_force_wake_init_gt(struct xe_gt *gt,
- struct xe_force_wake *fw);
+int xe_force_wake_init_gt(struct xe_gt *gt,
+ struct xe_force_wake *fw);
void xe_force_wake_init_engines(struct xe_gt *gt,
struct xe_force_wake *fw);
unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
enum xe_force_wake_domains domains);
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
+void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref);
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
@@ -103,6 +104,22 @@ DEFINE_CLASS(xe_force_wake, struct xe_force_wake_ref,
#define xe_with_force_wake(ref, fw, domains) \
__xe_with_force_wake(ref, fw, domains, __UNIQUE_ID(done))
+/*
+ * Same as the xe_force_wake class, but the domains are released with
+ * xe_force_wake_put_delay().
+ */
+DEFINE_CLASS(xe_force_wake_delay, struct xe_force_wake_ref,
+ xe_force_wake_put_delay(_T.fw, _T.domains),
+ xe_force_wake_constructor(fw, domains),
+ struct xe_force_wake *fw, unsigned int domains);
+
+#define __xe_with_force_wake_delay(ref, fw, domains, done) \
+ for (CLASS(xe_force_wake_delay, ref)(fw, domains), *(done) = NULL; \
+ !(done); (done) = (void *)1)
+
+#define xe_with_force_wake_delay(ref, fw, domains) \
+ __xe_with_force_wake_delay(ref, fw, domains, __UNIQUE_ID(done))
+
/*
* Used when xe_force_wake_constructor() has already been called by another
* function and the current function is responsible for releasing the forcewake
diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
index 14b7b86e801b..95bcc9ec2d74 100644
--- a/drivers/gpu/drm/xe/xe_force_wake_types.h
+++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
@@ -8,6 +8,7 @@
#include <linux/mutex.h>
#include <linux/types.h>
+#include <linux/workqueue.h>
#include "regs/xe_reg_defs.h"
@@ -82,6 +83,11 @@ struct xe_force_wake_domain {
u32 mask;
/** @ref: domain reference */
u32 ref;
+ /**
+ * @hold_until: jiffies value until which a delayed release keeps the
+ * domain awake. Protected by &xe_force_wake.lock.
+ */
+ unsigned long hold_until;
};
/**
@@ -101,6 +107,19 @@ struct xe_force_wake {
spinlock_t lock;
/** @awake_domains: mask of all domains awake */
unsigned int awake_domains;
+ /**
+ * @delayed_domains: mask of unreferenced domains that are kept awake
+ * until @delayed_release_work puts them to sleep. A subset of
+ * @awake_domains.
+ */
+ unsigned int delayed_domains;
+ /**
+ * @delayed_enabled: whether xe_force_wake_put_delay() may keep a domain
+ * awake. Protected by @lock.
+ */
+ bool delayed_enabled;
+ /** @delayed_release_work: puts expired @delayed_domains to sleep */
+ struct delayed_work delayed_release_work;
/** @initialized_domains: mask of all initialized domains */
unsigned int initialized_domains;
/** @domains: force wake domains */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index b751b5044f3c..98c4464d9cd0 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -487,7 +487,10 @@ int xe_gt_init_early(struct xe_gt *gt)
xe_wa_process_gt_oob(gt);
- xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ if (err)
+ return err;
+
spin_lock_init(>->global_invl_lock);
err = xe_gt_tlb_inval_init_early(gt);
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 2/3] drm/xe/forcewake: flush delayed release at power and teardown boundaries
2026-11-10 22:05 ` [PATCH v2 0/3] " Zongyao Bai
2026-11-10 22:05 ` [PATCH v2 1/3] drm/xe/forcewake: add delayed release with hysteresis Zongyao Bai
@ 2026-11-10 22:05 ` Zongyao Bai
2026-11-10 22:26 ` sashiko-bot
2026-11-10 22:05 ` [PATCH v2 3/3] drm/xe/query: use delayed forcewake release for engine-cycle queries Zongyao Bai
2 siblings, 1 reply; 17+ messages in thread
From: Zongyao Bai @ 2026-11-10 22:05 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, rodrigo.vivi, Zongyao Bai
Add xe_force_wake_flush(), which cancels the delayed release work and
puts the domains it was holding to sleep. Use it, through a scoped class
that flushes after the final put, in system suspend and runtime suspend,
before the device is powered off. Delayed release stays enabled for use
after resume.
Add xe_force_wake_stop(), which also disables the work for good. Use it
in GT shutdown, after the reset, and on device removal and
post-registration probe failure. A put_delay() after the stop puts the
domain to sleep right away, so nothing is left awake after the stop.
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_device.c | 11 ++++++
drivers/gpu/drm/xe/xe_force_wake.c | 44 ++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_force_wake.h | 18 ++++++++++
drivers/gpu/drm/xe/xe_force_wake_types.h | 29 ++++++++++++++++
drivers/gpu/drm/xe/xe_gt.c | 10 +++---
5 files changed, 108 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 273e2c45fea9..f6d769900e43 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -897,6 +897,15 @@ static void xe_uid_probe(struct xe_device *xe)
xe->device_uid = xe_mmio_read64_2x32(xe_root_tile_mmio(xe), CRI_DEVICE_UID);
}
+static void xe_device_force_wake_stop(struct xe_device *xe)
+{
+ struct xe_gt *gt;
+ u8 id;
+
+ for_each_gt(gt, xe, id)
+ xe_force_wake_stop(gt_to_fw(gt));
+}
+
int xe_device_probe(struct xe_device *xe)
{
struct xe_tile *tile;
@@ -1112,6 +1121,7 @@ int xe_device_probe(struct xe_device *xe)
err_unregister_display:
xe_display_unregister(xe);
drm_dev_unregister(&xe->drm);
+ xe_device_force_wake_stop(xe);
return err;
}
@@ -1121,6 +1131,7 @@ void xe_device_remove(struct xe_device *xe)
xe_display_unregister(xe);
drm_dev_unplug(&xe->drm);
+ xe_device_force_wake_stop(xe);
xe_bo_pci_dev_remove_all(xe);
}
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index d09d138c1084..0a4c03a52b57 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -404,6 +404,50 @@ static void xe_force_wake_delayed_release_work(struct work_struct *work)
xe_pm_runtime_put(xe);
}
+static void xe_force_wake_settle_delayed(struct xe_force_wake *fw)
+{
+ unsigned int ack_fail;
+ unsigned long flags;
+
+ spin_lock_irqsave(&fw->lock, flags);
+ ack_fail = xe_force_wake_sleep_locked(fw, fw->delayed_domains);
+ fw->delayed_domains = 0;
+ spin_unlock_irqrestore(&fw->lock, flags);
+
+ xe_force_wake_warn_sleep_fail(fw->gt, ack_fail);
+}
+
+/**
+ * xe_force_wake_flush - Put all delayed domains to sleep now
+ * @fw: Pointer to the force wake structure
+ *
+ * Cancel the pending delayed release and put the domains it was holding awake
+ * to sleep right away. Delayed release stays enabled, so it can be used again
+ * after resume.
+ *
+ * Used before powering the device off, once no forcewake reference is held
+ * and no new delayed release can start.
+ */
+void xe_force_wake_flush(struct xe_force_wake *fw)
+{
+ cancel_delayed_work_sync(&fw->delayed_release_work);
+ xe_force_wake_settle_delayed(fw);
+}
+
+/**
+ * xe_force_wake_stop - Stop delayed release for good
+ * @fw: Pointer to the force wake structure
+ *
+ * Like xe_force_wake_flush(), but also disable delayed release, so it cannot
+ * start again. Used on device removal and shutdown, once no forcewake
+ * user that may release with xe_force_wake_put_delay() is left.
+ */
+void xe_force_wake_stop(struct xe_force_wake *fw)
+{
+ xe_force_wake_disable_delayed(fw);
+ xe_force_wake_settle_delayed(fw);
+}
+
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
{
switch (id) {
diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
index 35a2252c762a..89cf8fbef8e4 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.h
+++ b/drivers/gpu/drm/xe/xe_force_wake.h
@@ -19,6 +19,8 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
enum xe_force_wake_domains domains);
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref);
+void xe_force_wake_flush(struct xe_force_wake *fw);
+void xe_force_wake_stop(struct xe_force_wake *fw);
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
@@ -104,6 +106,22 @@ DEFINE_CLASS(xe_force_wake, struct xe_force_wake_ref,
#define xe_with_force_wake(ref, fw, domains) \
__xe_with_force_wake(ref, fw, domains, __UNIQUE_ID(done))
+/*
+ * Same as the xe_force_wake class, but flush the delayed release after the
+ * domains are put. For paths that power the device off.
+ */
+static inline void xe_force_wake_put_and_flush(struct xe_force_wake *fw,
+ unsigned int fw_ref)
+{
+ xe_force_wake_put(fw, fw_ref);
+ xe_force_wake_flush(fw);
+}
+
+DEFINE_CLASS(xe_force_wake_flush, struct xe_force_wake_ref,
+ xe_force_wake_put_and_flush(_T.fw, _T.domains),
+ xe_force_wake_constructor(fw, domains),
+ struct xe_force_wake *fw, unsigned int domains);
+
/*
* Same as the xe_force_wake class, but the domains are released with
* xe_force_wake_put_delay().
diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
index 95bcc9ec2d74..5ad289670319 100644
--- a/drivers/gpu/drm/xe/xe_force_wake_types.h
+++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
@@ -99,6 +99,35 @@ struct xe_force_wake_domain {
* Currently only used for GT power domains (where the term "forcewake" is used
* in the hardware documentation), although the interface could be extended to
* power wells in other parts of the hardware in the future.
+ *
+ * Delayed-release state flow of a domain, protected by @lock:
+ *
+ * +------------+ +--------------+
+ * | ASLEEP | ------- get: wake -------------> | REFERENCED |
+ * | ref == 0 | <------ final put: sleep ------- | ref > 0 |
+ * +------------+ +--------------+
+ * ^ | ^
+ * | final put_delay | |
+ * | | | get: reuse
+ * | | | no MMIO
+ * | v |
+ * | +--------------+
+ * | | DELAYED HOLD |
+ * +---- worker after @hold_until, --------- | ref == 0 |
+ * or flush/stop: sleep +--------------+
+ * | ^
+ * | |
+ * +----------+
+ * worker before @hold_until: requeue
+ *
+ * Once @delayed_enabled is cleared, a final put_delay behaves like a final
+ * put and DELAYED HOLD becomes unreachable.
+ *
+ * ASLEEP: neither @awake_domains nor @delayed_domains has the domain.
+ * REFERENCED: @awake_domains has the domain, @delayed_domains does not.
+ * DELAYED HOLD: both masks have the domain; @delayed_release_work is
+ * pending or running. Each final put_delay moves
+ * @hold_until forward.
*/
struct xe_force_wake {
/** @gt: back pointers to GT */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 98c4464d9cd0..2be58bb09180 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -1008,7 +1008,7 @@ int xe_gt_suspend(struct xe_gt *gt)
xe_gt_dbg(gt, "suspending\n");
xe_gt_sanitize(gt);
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ CLASS(xe_force_wake_flush, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
return -ETIMEDOUT;
@@ -1031,8 +1031,10 @@ int xe_gt_suspend(struct xe_gt *gt)
void xe_gt_shutdown(struct xe_gt *gt)
{
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
- do_gt_reset(gt);
+ xe_with_force_wake(fw_ref, gt_to_fw(gt), XE_FORCEWAKE_ALL)
+ do_gt_reset(gt);
+
+ xe_force_wake_stop(gt_to_fw(gt));
}
/**
@@ -1100,7 +1102,7 @@ int xe_gt_runtime_suspend(struct xe_gt *gt)
{
xe_gt_dbg(gt, "runtime suspending\n");
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ CLASS(xe_force_wake_flush, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
xe_gt_err(gt, "runtime suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
return -ETIMEDOUT;
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 3/3] drm/xe/query: use delayed forcewake release for engine-cycle queries
2026-11-10 22:05 ` [PATCH v2 0/3] " Zongyao Bai
2026-11-10 22:05 ` [PATCH v2 1/3] drm/xe/forcewake: add delayed release with hysteresis Zongyao Bai
2026-11-10 22:05 ` [PATCH v2 2/3] drm/xe/forcewake: flush delayed release at power and teardown boundaries Zongyao Bai
@ 2026-11-10 22:05 ` Zongyao Bai
2 siblings, 0 replies; 17+ messages in thread
From: Zongyao Bai @ 2026-11-10 22:05 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, rodrigo.vivi, Zongyao Bai
Engine-cycle queries are issued repeatedly by profilers such as VTune and
PTI to correlate CPU and GPU timestamps, for example through Level Zero
zeDeviceGetGlobalTimestamps(). Each query wakes the engine forcewake
domain and puts it to sleep again, and waiting for both acknowledgments
dominates the latency.
Release the domain with xe_force_wake_put_delay() so that a burst of
queries reuses the awake domain instead of waking it again. Other forcewake
users keep releasing immediately.
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index dc975f595368..86c4e1dfc101 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -157,7 +157,7 @@ query_engine_cycles(struct xe_device *xe,
fw_domain = xe_hw_engine_to_fw_domain(hwe);
- xe_with_force_wake(fw_ref, gt_to_fw(gt), fw_domain) {
+ xe_with_force_wake_delay(fw_ref, gt_to_fw(gt), fw_domain) {
if (!xe_force_wake_ref_has_domain(fw_ref.domains, fw_domain))
return -EIO;
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH v2 2/3] drm/xe/forcewake: flush delayed release at power and teardown boundaries
2026-11-10 22:05 ` [PATCH v2 2/3] drm/xe/forcewake: flush delayed release at power and teardown boundaries Zongyao Bai
@ 2026-11-10 22:26 ` sashiko-bot
0 siblings, 0 replies; 17+ messages in thread
From: sashiko-bot @ 2026-11-10 22:26 UTC (permalink / raw)
To: Zongyao Bai, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] drm/xe/forcewake: delayed domains stranded if runtime suspend
aborts
--
commit f7553aeb9060950e90243740fda0d4e4ec003892
Author: Zongyao Bai <zongyao.bai@intel.com>
drm/xe/forcewake: flush delayed release at power and teardown boundaries
This commit adds xe_force_wake_flush() and xe_force_wake_stop() to cancel
delayed forcewake releases and put delayed domains to sleep across suspend,
shutdown, and device removal paths.
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 5ed96807fe342..a0a238f1a4515 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
[ ... ]
> @@ -1104,7 +1106,7 @@ int xe_gt_runtime_suspend(struct xe_gt *gt)
> {
> xe_gt_dbg(gt, "runtime suspending\n");
>
> - CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
> + CLASS(xe_force_wake_flush, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
> if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
> xe_gt_err(gt, "runtime suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
> return -ETIMEDOUT;
[Severity: Medium]
Can an aborted runtime suspend leave fw->delayed_domains awake with no
worker pending?
Once rpm_suspend() sets the device status to RPM_SUSPENDING,
xe_pm_runtime_get_if_active() returns false, so
xe_force_wake_delayed_release_work() exits early without sleeping
fw->delayed_domains or requeuing itself, relying on the suspend flush here
and in xe_gt_suspend().
However, xe_pm_runtime_suspend() can fail before reaching this flush on all
GTs:
drivers/gpu/drm/xe/xe_pm.c:xe_pm_runtime_suspend() {
...
if (xe->d3cold.allowed) {
err = xe_bo_evict_all(xe);
if (err)
goto out_resume;
}
for_each_gt(gt, xe, id) {
err = xe->d3cold.allowed ? xe_gt_suspend(gt) : xe_gt_runtime_suspend(gt);
if (err)
goto out_resume;
}
...
}
If xe_bo_evict_all() fails, or an earlier GT fails in the loop, rpm_suspend()
restores the device status to RPM_ACTIVE without flushing the remaining GTs.
Any domain in fw->delayed_domains whose worker ran during the RPM_SUSPENDING
window then stays awake with ref == 0 and delayed_release_work inactive,
violating the DELAYED HOLD invariant documented in struct xe_force_wake and
preventing GT C6 power saving until a later forcewake access or suspend.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261110220542.432595-1-zongyao.bai@intel.com?part=2
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/3] drm/xe/forcewake: add delayed release with hysteresis
2026-11-10 22:05 ` [PATCH v2 1/3] drm/xe/forcewake: add delayed release with hysteresis Zongyao Bai
@ 2026-11-10 22:34 ` sashiko-bot
0 siblings, 0 replies; 17+ messages in thread
From: sashiko-bot @ 2026-11-10 22:34 UTC (permalink / raw)
To: Zongyao Bai, intel-xe
Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [Medium] drm/xe: delayed forcewake domains stranded when
rpm_get_if_active fails
- [Low] drm/xe/forcewake: xe_force_wake_assert_held() passes on delayed
domains
--
commit 4a71af2399dc0153d2185a60b2aa48a76a02006c
Author: Zongyao Bai <zongyao.bai@intel.com>
drm/xe/forcewake: add delayed release with hysteresis
This commit adds xe_force_wake_put_delay() and a delayed release worker to
keep forcewake domains awake for a short hold period after their last
reference is dropped.
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
> index 197e2197bd0a3..d09d138c10840 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.c
> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
[ ... ]
> @@ -244,21 +307,101 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> for_each_fw_domain_masked(domain, fw_ref, fw, tmp) {
> xe_gt_assert(gt, domain->ref);
>
> - if (!--domain->ref) {
> + if (--domain->ref)
> + continue;
> +
> + if (hold_ms && fw->delayed_enabled) {
> + unsigned long hold = xe_force_wake_hold_jiffies(hold_ms);
> +
> + domain->hold_until = jiffies + hold;
> + fw->delayed_domains |= BIT(domain->id);
> + /* No-op if pending, the worker requeues for the latest hold. */
> + queue_delayed_work(system_percpu_wq,
> + &fw->delayed_release_work, hold);
> + } else {
> sleep |= BIT(domain->id);
> - domain_sleep(gt, domain);
> }
> }
[Severity: Low]
Does keeping BIT(domain->id) set in fw->awake_domains while a domain is in
fw->delayed_domains cause xe_force_wake_assert_held() to pass even when no
caller holds a reference?
drivers/gpu/drm/xe/xe_force_wake.h:xe_force_wake_assert_held() {
xe_gt_assert(fw->gt, domain != XE_FORCEWAKE_ALL);
xe_gt_assert(fw->gt, fw->awake_domains & domain);
}
During the delayed hold window, domain->ref is 0 and
xe_force_wake_delayed_release_work() can put the domain to sleep on
another CPU at any time, but xe_force_wake_assert_held() only checks
fw->awake_domains & domain without excluding fw->delayed_domains.
> + ack_fail = xe_force_wake_sleep_locked(fw, sleep);
> spin_unlock_irqrestore(&fw->lock, flags);
>
> + xe_force_wake_warn_sleep_fail(gt, ack_fail);
> +}
[ ... ]
> +static void xe_force_wake_delayed_release_work(struct work_struct *work)
> +{
> + struct xe_force_wake *fw = container_of(to_delayed_work(work),
> + struct xe_force_wake, delayed_release_work);
> + struct xe_gt *gt = fw->gt;
> + struct xe_device *xe = gt_to_xe(gt);
> + struct xe_force_wake_domain *domain;
> + unsigned int tmp, expired = 0, ack_fail;
> + unsigned long flags, next = 0;
> + bool remaining = false;
> +
> + /* Never resume from here, the suspend flush settles delayed domains. */
> + if (!xe_pm_runtime_get_if_active(xe))
> + return;
[Severity: Medium]
Can returning early here without sleeping expired domains or requeuing
fw->delayed_release_work leave fw->delayed_domains stranded awake?
Although commit "drm/xe/forcewake: flush delayed release at power and
teardown boundaries" flushes delayed domains in xe_gt_suspend() and
xe_gt_runtime_suspend(), xe_pm_runtime_get_if_active() returns false as
soon as rpm_suspend() sets dev->power.runtime_status to RPM_SUSPENDING.
If xe_force_wake_delayed_release_work() runs while xe_pm_runtime_suspend()
is in xe_pxp_pm_suspend(), xe_bo_evict_all(), or an earlier GT's suspend,
and that step fails and jumps to out_resume, the remaining GTs are never
flushed and runtime_status returns to RPM_ACTIVE with their delayed
domains still awake and no worker pending, preventing C6 entry. In
addition, when CONFIG_PM is disabled, pm_runtime_get_if_active() returns
-EINVAL, so xe_pm_runtime_get_if_active() is always false and delayed
domains are never released.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261110220542.432595-1-zongyao.bai@intel.com?part=1
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2026-11-10 22:34 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-17 3:18 [PATCH 0/3] drm/xe/forcewake: add delayed release for engine-cycle queries Zongyao Bai
2026-10-17 3:18 ` [PATCH 1/3] drm/xe/forcewake: add delayed release with hysteresis Zongyao Bai
2026-11-09 20:55 ` Rodrigo Vivi
2026-11-10 1:00 ` Bai, Zongyao
2026-10-17 3:18 ` [PATCH 2/3] drm/xe/forcewake: flush delayed release at power and teardown boundaries Zongyao Bai
2026-10-17 3:18 ` [PATCH 3/3] drm/xe/query: use delayed forcewake release for engine-cycle queries Zongyao Bai
2026-10-17 3:25 ` ✗ CI.checkpatch: warning for drm/xe/forcewake: add delayed " Patchwork
2026-10-17 3:27 ` ✓ CI.KUnit: success " Patchwork
2026-10-17 3:27 ` [PATCH 0/3] " Simon Richter
2026-10-17 4:07 ` ✓ Xe.CI.BAT: success for " Patchwork
2026-10-17 5:48 ` ✓ Xe.CI.FULL: " Patchwork
2026-11-10 22:05 ` [PATCH v2 0/3] " Zongyao Bai
2026-11-10 22:05 ` [PATCH v2 1/3] drm/xe/forcewake: add delayed release with hysteresis Zongyao Bai
2026-11-10 22:34 ` sashiko-bot
2026-11-10 22:05 ` [PATCH v2 2/3] drm/xe/forcewake: flush delayed release at power and teardown boundaries Zongyao Bai
2026-11-10 22:26 ` sashiko-bot
2026-11-10 22:05 ` [PATCH v2 3/3] drm/xe/query: use delayed forcewake release for engine-cycle queries Zongyao Bai
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