* [PATCH 0/4] drm/i915/dp: Use the VBT eDP fast link training params
@ 2026-11-10 11:54 Lee Shawn C
2026-11-10 11:54 ` [PATCH 1/4] drm/i915/bios: Split out parsing the " Lee Shawn C
` (6 more replies)
0 siblings, 7 replies; 13+ messages in thread
From: Lee Shawn C @ 2026-11-10 11:54 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Ville Syrjälä
The VBT provides per-panel eDP fast link training params, which the
driver parses but doesn't use. Use them when fast link training is
enabled in the VBT:
- Patch 1-2: parse the params only if the enable bit is set.
- Patch 3: start link training from the VBT vswing/pre-emphasis levels.
- Patch 4: use the VBT link rate and lane count.
The existing AUX handshake based link training sequence is kept; link
training without AUX handshake is not implemented.
Lee Shawn C (4):
drm/i915/bios: Split out parsing the eDP fast link training params
drm/i915/bios: Parse eDP fast link training params only if enabled
drm/i915/dp: Start eDP link training from VBT fast link train
vswing/pre-emphasis levels
drm/i915/dp: Use the VBT fast link training link config for eDP
drivers/gpu/drm/i915/display/intel_bios.c | 85 ++++++++++++++-----
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 58 +++++++++++++
.../drm/i915/display/intel_dp_link_training.c | 76 +++++++++++++++++
4 files changed, 197 insertions(+), 23 deletions(-)
--
2.53.0
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/4] drm/i915/bios: Split out parsing the eDP fast link training params
2026-11-10 11:54 [PATCH 0/4] drm/i915/dp: Use the VBT eDP fast link training params Lee Shawn C
@ 2026-11-10 11:54 ` Lee Shawn C
2026-11-10 11:54 ` [PATCH 2/4] drm/i915/bios: Parse eDP fast link training params only if enabled Lee Shawn C
` (5 subsequent siblings)
6 siblings, 0 replies; 13+ messages in thread
From: Lee Shawn C @ 2026-11-10 11:54 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Ville Syrjälä
Move parsing eDP fast link training link rate, lane count,
pre-emphasis and voltage swing params from parse_edp() to a separate
function, in preparation for parsing these params only if fast link
training is enabled.
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 61 +++++++++++++----------
1 file changed, 35 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 7b6a6f8c3cf1..6b2924c56cae 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1440,34 +1440,13 @@ static void vbt_edp_to_pps_delays(struct intel_pps_delays *pps,
}
static void
-parse_edp(struct intel_display *display,
- struct intel_panel *panel)
+parse_edp_fast_link_params(struct intel_display *display,
+ struct intel_panel *panel,
+ const struct bdb_edp *edp)
{
- const struct bdb_edp *edp;
- const struct edp_fast_link_params *edp_link_params;
int panel_type = panel->vbt.panel_type;
-
- edp = bdb_find_section(display, BDB_EDP);
- if (!edp)
- return;
-
- switch (panel_bits(edp->color_depth, panel_type, 2)) {
- case EDP_18BPP:
- panel->vbt.edp.bpp = 18;
- break;
- case EDP_24BPP:
- panel->vbt.edp.bpp = 24;
- break;
- case EDP_30BPP:
- panel->vbt.edp.bpp = 30;
- break;
- }
-
- /* Get the eDP sequencing and link info */
- edp_link_params = &edp->fast_link_params[panel_type];
-
- vbt_edp_to_pps_delays(&panel->vbt.edp.pps,
- &edp->power_seqs[panel_type]);
+ const struct edp_fast_link_params *edp_link_params =
+ &edp->fast_link_params[panel_type];
if (display->vbt.version >= 224) {
panel->vbt.edp.rate =
@@ -1547,6 +1526,36 @@ parse_edp(struct intel_display *display,
edp_link_params->vswing);
break;
}
+}
+
+static void
+parse_edp(struct intel_display *display,
+ struct intel_panel *panel)
+{
+ const struct bdb_edp *edp;
+ int panel_type = panel->vbt.panel_type;
+
+ edp = bdb_find_section(display, BDB_EDP);
+ if (!edp)
+ return;
+
+ switch (panel_bits(edp->color_depth, panel_type, 2)) {
+ case EDP_18BPP:
+ panel->vbt.edp.bpp = 18;
+ break;
+ case EDP_24BPP:
+ panel->vbt.edp.bpp = 24;
+ break;
+ case EDP_30BPP:
+ panel->vbt.edp.bpp = 30;
+ break;
+ }
+
+ /* Get the eDP sequencing info */
+ vbt_edp_to_pps_delays(&panel->vbt.edp.pps,
+ &edp->power_seqs[panel_type]);
+
+ parse_edp_fast_link_params(display, panel, edp);
if (display->vbt.version >= 173) {
u8 vswing;
--
2.53.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 2/4] drm/i915/bios: Parse eDP fast link training params only if enabled
2026-11-10 11:54 [PATCH 0/4] drm/i915/dp: Use the VBT eDP fast link training params Lee Shawn C
2026-11-10 11:54 ` [PATCH 1/4] drm/i915/bios: Split out parsing the " Lee Shawn C
@ 2026-11-10 11:54 ` Lee Shawn C
2026-11-10 12:07 ` sashiko-bot
2026-11-10 12:31 ` Ville Syrjälä
2026-11-10 11:54 ` [PATCH 3/4] drm/i915/dp: Start eDP link training from VBT fast link train vswing/pre-emphasis levels Lee Shawn C
` (4 subsequent siblings)
6 siblings, 2 replies; 13+ messages in thread
From: Lee Shawn C @ 2026-11-10 11:54 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Ville Syrjälä
The VBT eDP fast link training params are parsed regardless of the
per-panel fast link training enable bit (VBT 182+), which itself is not
parsed. Parse the enable bit into panel->vbt.edp.fast_link_training and
parse the params only if it is set.
VBT default fast link training lane count is 1, while hardly any
eDP panel uses a single lane, so treat a lane count of 1 as not
specified, like a rate of 0, leaving the selection to the driver.
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 34 +++++++++++++++++--
.../drm/i915/display/intel_display_types.h | 1 +
2 files changed, 33 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 6b2924c56cae..378f8b60b4a0 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1448,6 +1448,12 @@ parse_edp_fast_link_params(struct intel_display *display,
const struct edp_fast_link_params *edp_link_params =
&edp->fast_link_params[panel_type];
+ if (display->vbt.version < 182 ||
+ !panel_bool(edp->fast_link_training, panel_type))
+ return;
+
+ panel->vbt.edp.fast_link_training = true;
+
if (display->vbt.version >= 224) {
panel->vbt.edp.rate =
edp->edp_fast_link_training_rate[panel_type] * 20;
@@ -1526,6 +1532,29 @@ parse_edp_fast_link_params(struct intel_display *display,
edp_link_params->vswing);
break;
}
+
+ /*
+ * The fast link training rate is limited by the eDP max port link
+ * rate: FLT rate = min(FLT rate, eDP max port link rate).
+ */
+ if (panel->vbt.edp.rate && panel->vbt.edp.max_link_rate)
+ panel->vbt.edp.rate = min(panel->vbt.edp.rate,
+ panel->vbt.edp.max_link_rate);
+
+ /*
+ * The VBT default fast link training lane count is 1, while hardly
+ * any eDP panel uses a single lane. Treat a lane count of 1 as not
+ * specified, leaving the lane count selection to the driver, the
+ * same way as a fast link training rate of 0.
+ */
+ if (panel->vbt.edp.lanes == 1)
+ panel->vbt.edp.lanes = 0;
+
+ drm_dbg_kms(display->drm,
+ "VBT eDP fast link training enabled: rate %d, lanes %d, vswing %d, pre-emphasis %d\n",
+ panel->vbt.edp.rate, panel->vbt.edp.lanes,
+ panel->vbt.edp.vswing >> DP_TRAIN_VOLTAGE_SWING_SHIFT,
+ panel->vbt.edp.preemphasis >> DP_TRAIN_PRE_EMPHASIS_SHIFT);
}
static void
@@ -1555,8 +1584,6 @@ parse_edp(struct intel_display *display,
vbt_edp_to_pps_delays(&panel->vbt.edp.pps,
&edp->power_seqs[panel_type]);
- parse_edp_fast_link_params(display, panel, edp);
-
if (display->vbt.version >= 173) {
u8 vswing;
@@ -1577,6 +1604,9 @@ parse_edp(struct intel_display *display,
panel->vbt.edp.max_link_rate =
edp->edp_max_port_link_rate[panel_type] * 20;
+ /* Depends on max_link_rate */
+ parse_edp_fast_link_params(display, panel, edp);
+
if (display->vbt.version >= 251)
panel->vbt.edp.dsc_disable =
panel_bool(edp->edp_dsc_disable, panel_type);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 90a5d29169c6..11f90ab1654c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -354,6 +354,7 @@ struct intel_vbt_panel_data {
int bpp;
struct intel_pps_delays pps;
u8 drrs_msa_timing_delay;
+ bool fast_link_training;
bool low_vswing;
bool hobl;
bool dsc_disable;
--
2.53.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 3/4] drm/i915/dp: Start eDP link training from VBT fast link train vswing/pre-emphasis levels
2026-11-10 11:54 [PATCH 0/4] drm/i915/dp: Use the VBT eDP fast link training params Lee Shawn C
2026-11-10 11:54 ` [PATCH 1/4] drm/i915/bios: Split out parsing the " Lee Shawn C
2026-11-10 11:54 ` [PATCH 2/4] drm/i915/bios: Parse eDP fast link training params only if enabled Lee Shawn C
@ 2026-11-10 11:54 ` Lee Shawn C
2026-11-10 12:14 ` sashiko-bot
2026-11-10 11:54 ` [PATCH 4/4] drm/i915/dp: Use the VBT fast link training link config for eDP Lee Shawn C
` (3 subsequent siblings)
6 siblings, 1 reply; 13+ messages in thread
From: Lee Shawn C @ 2026-11-10 11:54 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Ville Syrjälä
Link training starts clock recovery at voltage swing/pre-emphasis level
0. If the VBT enables fast link training for eDP, start from VBT's fast
link training vswing/pre-emphasis levels instead. The sink's adjust
requests are still followed as before.
If link training with the VBT levels fails, the retry starts from level
0 as before, since the VBT levels are only used while link recovery is
idle.
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
.../drm/i915/display/intel_dp_link_training.c | 76 +++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 8c58cc5ddd40..836834505c56 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -423,6 +423,7 @@
*
* See also:
* - DOC: DisplayPort link training
+ * - link_recovery_is_idle()
* - link_recovery_autoretrain_pending()
* - link_recovery_autoretrain_allowed()
* - link_recovery_has_no_fallback()
@@ -456,6 +457,12 @@ static struct intel_dp_link_training *connector_to_link_training(struct intel_co
return intel_attached_dp(connector)->link.training;
}
+static bool
+link_recovery_is_idle(struct intel_dp_link_training *link_training)
+{
+ return link_training->recovery_state == INTEL_DP_LINK_RECOVERY_IDLE;
+}
+
static void intel_dp_reset_lttpr_common_caps(struct intel_dp *intel_dp)
{
memset(intel_dp->lttpr_common_caps, 0, sizeof(intel_dp->lttpr_common_caps));
@@ -1026,6 +1033,71 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
encoder->set_signal_levels(encoder, crtc_state);
}
+/*
+ * Use the VBT eDP fast link training vswing/pre-emphasis levels as the
+ * starting point of link training, if the VBT enables fast link training
+ * for the panel and the link config matches the VBT fast link training
+ * params the levels were provided for. Only do this while link recovery
+ * is idle, so that the retry after a failed link training starts from
+ * the default levels.
+ */
+static bool
+intel_dp_use_vbt_fast_link_levels(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ enum drm_dp_phy dp_phy)
+{
+ const struct intel_panel *panel = &intel_dp->attached_connector->panel;
+
+ if (dp_phy != DP_PHY_DPRX || !intel_dp_is_edp(intel_dp) ||
+ intel_dp_is_uhbr(crtc_state))
+ return false;
+
+ if (!panel->vbt.edp.fast_link_training)
+ return false;
+
+ if (panel->vbt.edp.rate &&
+ panel->vbt.edp.rate != crtc_state->port_clock)
+ return false;
+
+ if (panel->vbt.edp.lanes &&
+ panel->vbt.edp.lanes != crtc_state->lane_count)
+ return false;
+
+ return link_recovery_is_idle(intel_dp->link.training);
+}
+
+/*
+ * Clamp the VBT levels to the PHY limits in the same way as the levels
+ * requested by the sink in intel_dp_get_lane_adjust_vswing_preemph().
+ */
+static void
+intel_dp_init_train_set_from_vbt(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ enum drm_dp_phy dp_phy)
+{
+ const struct intel_panel *panel = &intel_dp->attached_connector->panel;
+ u8 v = panel->vbt.edp.vswing;
+ u8 p = panel->vbt.edp.preemphasis;
+ u8 preemph_max, voltage_max;
+
+ preemph_max = intel_dp_phy_preemph_max(intel_dp, dp_phy);
+ if (p >= preemph_max)
+ p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
+
+ v = min(v, dp_voltage_max(p));
+
+ voltage_max = intel_dp_phy_voltage_max(intel_dp, crtc_state, dp_phy);
+ if (v >= voltage_max)
+ v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
+
+ memset(intel_dp->train_set, v | p, sizeof(intel_dp->train_set));
+
+ lt_dbg(intel_dp, dp_phy,
+ "Using VBT fast link training levels: vswing %d, pre-emphasis %d\n",
+ (v & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT,
+ (p & DP_TRAIN_PRE_EMPHASIS_MASK) >> DP_TRAIN_PRE_EMPHASIS_SHIFT);
+}
+
static bool
intel_dp_reset_link_train(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
@@ -1033,6 +1105,10 @@ intel_dp_reset_link_train(struct intel_dp *intel_dp,
u8 dp_train_pat)
{
memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
+
+ if (intel_dp_use_vbt_fast_link_levels(intel_dp, crtc_state, dp_phy))
+ intel_dp_init_train_set_from_vbt(intel_dp, crtc_state, dp_phy);
+
intel_dp_set_signal_levels(intel_dp, crtc_state, dp_phy);
return intel_dp_set_link_train(intel_dp, crtc_state, dp_phy, dp_train_pat);
}
--
2.53.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 4/4] drm/i915/dp: Use the VBT fast link training link config for eDP
2026-11-10 11:54 [PATCH 0/4] drm/i915/dp: Use the VBT eDP fast link training params Lee Shawn C
` (2 preceding siblings ...)
2026-11-10 11:54 ` [PATCH 3/4] drm/i915/dp: Start eDP link training from VBT fast link train vswing/pre-emphasis levels Lee Shawn C
@ 2026-11-10 11:54 ` Lee Shawn C
2026-11-10 12:14 ` sashiko-bot
2026-11-10 12:05 ` ✓ CI.KUnit: success for drm/i915/dp: Use the VBT eDP fast link training params Patchwork
` (2 subsequent siblings)
6 siblings, 1 reply; 13+ messages in thread
From: Lee Shawn C @ 2026-11-10 11:54 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Ville Syrjälä
When eDP fast link training is enabled, restrict the link configs
considered during compute config to VBT fast link training link
rate and lane count.
If none of the allowed link configs match, ignore the VBT params and
select the link config as before.
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 58 +++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ef164a797618..0390bd62d759 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2824,6 +2824,62 @@ intel_dp_compute_m_n_ratio_limits(struct intel_dp *intel_dp,
return true;
}
+/*
+ * If the VBT enables eDP fast link training for the panel, restrict the
+ * candidate link configs to the VBT fast link training link rate and/or
+ * lane count (a zero value means no restriction for that parameter). The
+ * filter is intersected with any filter already set in @limits. If no
+ * allowed config matches (e.g. the VBT values are not supported by the
+ * source/sink, or link training fallback has disabled all such configs),
+ * the VBT params are ignored.
+ */
+static void
+intel_dp_apply_vbt_edp_link_config(struct intel_dp *intel_dp,
+ struct intel_connector *connector,
+ struct link_config_limits *limits)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+ struct intel_dp_link_caps *link_caps = intel_dp->link.caps;
+ struct intel_dp_link_caps_filter vbt_filter = INTEL_DP_LINK_CAPS_FILTER_NONE;
+ struct intel_dp_link_caps_iter iter;
+ struct intel_dp_link_config config;
+ int vbt_rate = connector->panel.vbt.edp.rate;
+ int vbt_lanes = connector->panel.vbt.edp.lanes;
+
+ if (!intel_dp_is_edp(intel_dp) ||
+ !connector->panel.vbt.edp.fast_link_training ||
+ (!vbt_rate && !vbt_lanes))
+ return;
+
+ intel_dp_link_caps_iter_start(&iter, link_caps,
+ intel_dp_link_caps_connector_compute_order(connector),
+ limits->link_config_filter);
+ for_each_dp_link_config(&iter, &config) {
+ if (vbt_rate && config.rate != vbt_rate)
+ continue;
+ if (vbt_lanes && config.lane_count != vbt_lanes)
+ continue;
+
+ intel_dp_link_caps_filter_add(link_caps, &vbt_filter, &config);
+ }
+ intel_dp_link_caps_iter_end(&iter);
+
+ if (!vbt_filter.config_mask) {
+ drm_dbg_kms(display->drm,
+ "[CONNECTOR:%d:%s] VBT eDP link config (lanes %d, rate %d) not in allowed link configs, ignoring\n",
+ connector->base.base.id, connector->base.name,
+ vbt_lanes, vbt_rate);
+ return;
+ }
+
+ drm_dbg_kms(display->drm,
+ "[CONNECTOR:%d:%s] Limiting link configs to VBT eDP lanes %d, rate %d\n",
+ connector->base.base.id, connector->base.name,
+ vbt_lanes, vbt_rate);
+
+ limits->link_config_filter = vbt_filter;
+}
+
bool
intel_dp_compute_config_limits(struct intel_dp *intel_dp,
struct drm_connector_state *conn_state,
@@ -2940,6 +2996,8 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
limits->link_config_filter = new_filter;
}
+ intel_dp_apply_vbt_edp_link_config(intel_dp, connector, limits);
+
if (!intel_dp_compute_m_n_ratio_limits(intel_dp, conn_state, crtc_state, limits))
return false;
--
2.53.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* ✓ CI.KUnit: success for drm/i915/dp: Use the VBT eDP fast link training params
2026-11-10 11:54 [PATCH 0/4] drm/i915/dp: Use the VBT eDP fast link training params Lee Shawn C
` (3 preceding siblings ...)
2026-11-10 11:54 ` [PATCH 4/4] drm/i915/dp: Use the VBT fast link training link config for eDP Lee Shawn C
@ 2026-11-10 12:05 ` Patchwork
2026-11-10 12:42 ` ✓ Xe.CI.BAT: " Patchwork
2026-11-10 15:35 ` ✓ Xe.CI.FULL: " Patchwork
6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-11-10 12:05 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-xe
== Series Details ==
Series: drm/i915/dp: Use the VBT eDP fast link training params
URL : https://patchwork.freedesktop.org/series/178196/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[12:03:24] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:03:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:03:50] Starting KUnit Kernel (1/1)...
[12:03:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:03:50] ================= gpu_buddy (14 subtests) ==================
[12:03:50] [PASSED] gpu_test_buddy_alloc_limit
[12:03:50] [PASSED] gpu_test_buddy_alloc_optimistic
[12:03:50] [PASSED] gpu_test_buddy_alloc_pessimistic
[12:03:50] [PASSED] gpu_test_buddy_alloc_pathological
[12:03:50] [PASSED] gpu_test_buddy_alloc_contiguous
[12:03:50] [PASSED] gpu_test_buddy_alloc_clear
[12:03:50] [PASSED] gpu_test_buddy_alloc_range
[12:03:51] [PASSED] gpu_test_buddy_alloc_range_bias
[12:03:51] [PASSED] gpu_test_buddy_fragmentation_performance
[12:03:52] [PASSED] gpu_test_buddy_dirty_tracker_performance
[12:03:52] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[12:03:52] [PASSED] gpu_test_buddy_offset_aligned_allocation
[12:03:52] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[12:03:52] [PASSED] gpu_test_buddy_addr_to_block
[12:03:52] ==================== [PASSED] gpu_buddy ====================
[12:03:52] ============================================================
[12:03:52] Testing complete. Ran 14 tests: passed: 14
[12:03:52] Elapsed time: 27.700s total, 5.135s configuring, 20.647s building, 1.873s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:03:52] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:03:55] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:04:34] Starting KUnit Kernel (1/1)...
[12:04:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:04:34] ================== guc_buf (11 subtests) ===================
[12:04:34] [PASSED] test_smallest
[12:04:34] [PASSED] test_largest
[12:04:34] [PASSED] test_granular
[12:04:34] [PASSED] test_unique
[12:04:34] [PASSED] test_overlap
[12:04:34] [PASSED] test_reusable
[12:04:34] [PASSED] test_too_big
[12:04:34] [PASSED] test_flush
[12:04:34] [PASSED] test_lookup
[12:04:34] [PASSED] test_data
[12:04:34] [PASSED] test_class
[12:04:34] ===================== [PASSED] guc_buf =====================
[12:04:34] =================== guc_dbm (7 subtests) ===================
[12:04:34] [PASSED] test_empty
[12:04:34] [PASSED] test_default
[12:04:34] ======================== test_size ========================
[12:04:34] [PASSED] 4
[12:04:34] [PASSED] 8
[12:04:34] [PASSED] 32
[12:04:34] [PASSED] 256
[12:04:34] ==================== [PASSED] test_size ====================
[12:04:34] ======================= test_reuse ========================
[12:04:34] [PASSED] 4
[12:04:34] [PASSED] 8
[12:04:34] [PASSED] 32
[12:04:34] [PASSED] 256
[12:04:34] =================== [PASSED] test_reuse ====================
[12:04:34] =================== test_range_overlap ====================
[12:04:34] [PASSED] 4
[12:04:34] [PASSED] 8
[12:04:34] [PASSED] 32
[12:04:34] [PASSED] 256
[12:04:34] =============== [PASSED] test_range_overlap ================
[12:04:34] =================== test_range_compact ====================
[12:04:34] [PASSED] 4
[12:04:34] [PASSED] 8
[12:04:34] [PASSED] 32
[12:04:34] [PASSED] 256
[12:04:34] =============== [PASSED] test_range_compact ================
[12:04:34] ==================== test_range_spare =====================
[12:04:34] [PASSED] 4
[12:04:34] [PASSED] 8
[12:04:34] [PASSED] 32
[12:04:34] [PASSED] 256
[12:04:34] ================ [PASSED] test_range_spare =================
[12:04:34] ===================== [PASSED] guc_dbm =====================
[12:04:34] ================== guc_idm (22 subtests) ===================
[12:04:34] [PASSED] bad_init
[12:04:34] [PASSED] no_init
[12:04:34] [PASSED] init_fini
[12:04:34] [PASSED] check_init_small
[12:04:34] [PASSED] check_init_shared
[12:04:34] [PASSED] check_used
[12:04:34] [PASSED] check_quota
[12:04:34] [PASSED] check_all
[12:04:34] [PASSED] check_limits
[12:04:34] [PASSED] check_overlap
[12:04:34] [PASSED] check_overlap_alloc
[12:04:34] [PASSED] check_overlap_release
[12:04:34] [PASSED] check_overlap_partial_init
[12:04:34] [PASSED] check_overlap_partial_shared_range_blocking
[12:04:34] [PASSED] check_used_usable
[12:04:34] [PASSED] check_used_shareable
[12:04:34] [PASSED] check_used_mixed
[12:04:34] [PASSED] check_release_usable_range
[12:04:34] [PASSED] check_release_shareable_range
[12:04:34] [PASSED] check_split_boundaries
[12:04:34] [PASSED] check_shareable_spare
[12:04:34] [PASSED] check_shareable_spare_fragmented_tail
[12:04:34] ===================== [PASSED] guc_idm =====================
[12:04:34] ============== guc_klv_helpers (13 subtests) ===============
[12:04:34] [PASSED] test_count
[12:04:34] [PASSED] test_encode_u32
[12:04:34] [PASSED] test_encode_u64
[12:04:34] [PASSED] test_encode_string
[12:04:34] [PASSED] test_encode_object_raw
[12:04:34] [PASSED] test_encode_object_klv
[12:04:34] [PASSED] test_encode_object_nested
[12:04:34] [PASSED] test_encode_object_basic
[12:04:34] ===================== test_decode_u16 =====================
[12:04:34] [PASSED] empty
[12:04:34] [PASSED] valid
[12:04:34] [PASSED] max
[12:04:34] [PASSED] big
[12:04:34] [PASSED] long
[12:04:34] ================= [PASSED] test_decode_u16 =================
[12:04:34] ===================== test_decode_u32 =====================
[12:04:34] [PASSED] empty
[12:04:34] [PASSED] valid
[12:04:34] [PASSED] max
[12:04:34] [PASSED] long
[12:04:34] ================= [PASSED] test_decode_u32 =================
[12:04:34] ===================== test_decode_u64 =====================
[12:04:34] [PASSED] empty
[12:04:34] [PASSED] short
[12:04:34] [PASSED] valid
[12:04:34] [PASSED] max
[12:04:34] [PASSED] long
[12:04:34] ================= [PASSED] test_decode_u64 =================
[12:04:34] ===================== test_decode_str =====================
[12:04:34] [PASSED] empty
[12:04:34] [PASSED] one
[12:04:34] [PASSED] one_trash
[12:04:34] [PASSED] two
[12:04:34] [PASSED] two_trash
[12:04:34] [PASSED] three
[12:04:34] [PASSED] dword
[12:04:34] [PASSED] four
[12:04:34] [PASSED] five
[12:04:34] [PASSED] six
[12:04:34] [PASSED] seven
[12:04:34] [PASSED] qword
[12:04:34] ================= [PASSED] test_decode_str =================
[12:04:34] [PASSED] test_print
[12:04:34] ================= [PASSED] guc_klv_helpers =================
[12:04:34] =================== xe_log (4 subtests) ====================
[12:04:34] [PASSED] demo_cper
[12:04:34] [PASSED] demo_dmesg
[12:04:34] ======================= test_dmesg ========================
[12:04:34] [PASSED] test_fatal
[12:04:34] [PASSED] test_fatal_tile
[12:04:34] [PASSED] test_fatal_gt
[12:04:34] [PASSED] test_fatal_comp
[12:04:34] [PASSED] test_fatal_comp_tile
[12:04:34] [PASSED] test_fatal_comp_gt
[12:04:34] [PASSED] test_fatal_all
[12:04:34] [PASSED] test_recoverable
[12:04:34] [PASSED] test_recoverable_tile
[12:04:34] [PASSED] test_recoverable_gt
[12:04:34] [PASSED] test_recoverable_comp
[12:04:34] [PASSED] test_recoverable_comp_tile
[12:04:34] [PASSED] test_recoverable_comp_gt
[12:04:34] [PASSED] test_recoverable_all
[12:04:34] [PASSED] test_info
[12:04:34] [PASSED] test_info_tile
[12:04:34] [PASSED] test_info_gt
[12:04:34] [PASSED] test_info_err
[12:04:34] [PASSED] test_info_comp
[12:04:34] [PASSED] test_info_comp_tile
[12:04:34] [PASSED] test_info_comp_gt
[12:04:34] [PASSED] test_info_all
[12:04:34] [PASSED] test_hw_fatal
[12:04:34] [PASSED] test_hw_recoverable
[12:04:34] [PASSED] test_hw_corrected
[12:04:34] [PASSED] test_hw_informational
[12:04:34] =================== [PASSED] test_dmesg ====================
[12:04:34] ====================== test_invalid =======================
[12:04:34] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[12:04:34] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[12:04:34] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[12:04:34] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[12:04:34] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[12:04:34] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[12:04:34] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[12:04:34] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[12:04:34] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[12:04:34] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[12:04:34] ================== [SKIPPED] test_invalid ==================
[12:04:34] ===================== [PASSED] xe_log ======================
[12:04:34] ================== no_relay (3 subtests) ===================
[12:04:34] [PASSED] xe_drops_guc2pf_if_not_ready
[12:04:34] [PASSED] xe_drops_guc2vf_if_not_ready
[12:04:34] [PASSED] xe_rejects_send_if_not_ready
[12:04:34] ==================== [PASSED] no_relay =====================
[12:04:34] ================== pf_relay (14 subtests) ==================
[12:04:34] [PASSED] pf_rejects_guc2pf_too_short
[12:04:34] [PASSED] pf_rejects_guc2pf_too_long
[12:04:34] [PASSED] pf_rejects_guc2pf_no_payload
[12:04:34] [PASSED] pf_fails_no_payload
[12:04:34] [PASSED] pf_fails_bad_origin
[12:04:34] [PASSED] pf_fails_bad_type
[12:04:34] [PASSED] pf_txn_reports_error
[12:04:34] [PASSED] pf_txn_sends_pf2guc
[12:04:34] [PASSED] pf_sends_pf2guc
[12:04:34] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:04:34] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:04:34] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:04:34] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:04:34] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:04:34] ==================== [PASSED] pf_relay =====================
[12:04:34] ================== vf_relay (3 subtests) ===================
[12:04:34] [PASSED] vf_rejects_guc2vf_too_short
[12:04:34] [PASSED] vf_rejects_guc2vf_too_long
[12:04:34] [PASSED] vf_rejects_guc2vf_no_payload
[12:04:34] ==================== [PASSED] vf_relay =====================
[12:04:34] ================ pf_gt_config (9 subtests) =================
[12:04:34] [PASSED] fair_contexts_1vf
[12:04:34] [PASSED] fair_doorbells_1vf
[12:04:34] [PASSED] fair_ggtt_1vf
[12:04:34] ====================== fair_vram_1vf ======================
[12:04:34] [PASSED] 3.50 GiB
[12:04:34] [PASSED] 11.5 GiB
[12:04:34] [PASSED] 15.5 GiB
[12:04:34] [PASSED] 31.5 GiB
[12:04:34] [PASSED] 63.5 GiB
[12:04:34] [PASSED] 1.91 GiB
[12:04:34] ================== [PASSED] fair_vram_1vf ==================
[12:04:34] ================ fair_vram_1vf_admin_only =================
[12:04:34] [PASSED] 3.50 GiB
[12:04:34] [PASSED] 11.5 GiB
[12:04:34] [PASSED] 15.5 GiB
[12:04:34] [PASSED] 31.5 GiB
[12:04:34] [PASSED] 63.5 GiB
[12:04:34] [PASSED] 1.91 GiB
[12:04:34] ============ [PASSED] fair_vram_1vf_admin_only =============
[12:04:34] ====================== fair_contexts ======================
[12:04:34] [PASSED] 1 VF
[12:04:34] [PASSED] 2 VFs
[12:04:34] [PASSED] 3 VFs
[12:04:34] [PASSED] 4 VFs
[12:04:34] [PASSED] 5 VFs
[12:04:34] [PASSED] 6 VFs
[12:04:34] [PASSED] 7 VFs
[12:04:34] [PASSED] 8 VFs
[12:04:34] [PASSED] 9 VFs
[12:04:34] [PASSED] 10 VFs
[12:04:34] [PASSED] 11 VFs
[12:04:34] [PASSED] 12 VFs
[12:04:34] [PASSED] 13 VFs
[12:04:34] [PASSED] 14 VFs
[12:04:34] [PASSED] 15 VFs
[12:04:34] [PASSED] 16 VFs
[12:04:34] [PASSED] 17 VFs
[12:04:34] [PASSED] 18 VFs
[12:04:34] [PASSED] 19 VFs
[12:04:34] [PASSED] 20 VFs
[12:04:34] [PASSED] 21 VFs
[12:04:34] [PASSED] 22 VFs
[12:04:34] [PASSED] 23 VFs
[12:04:34] [PASSED] 24 VFs
[12:04:34] [PASSED] 25 VFs
[12:04:34] [PASSED] 26 VFs
[12:04:34] [PASSED] 27 VFs
[12:04:34] [PASSED] 28 VFs
[12:04:34] [PASSED] 29 VFs
[12:04:34] [PASSED] 30 VFs
[12:04:34] [PASSED] 31 VFs
[12:04:34] [PASSED] 32 VFs
[12:04:34] [PASSED] 33 VFs
[12:04:34] [PASSED] 34 VFs
[12:04:34] [PASSED] 35 VFs
[12:04:34] [PASSED] 36 VFs
[12:04:34] [PASSED] 37 VFs
[12:04:34] [PASSED] 38 VFs
[12:04:34] [PASSED] 39 VFs
[12:04:34] [PASSED] 40 VFs
[12:04:34] [PASSED] 41 VFs
[12:04:34] [PASSED] 42 VFs
[12:04:34] [PASSED] 43 VFs
[12:04:34] [PASSED] 44 VFs
[12:04:34] [PASSED] 45 VFs
[12:04:34] [PASSED] 46 VFs
[12:04:34] [PASSED] 47 VFs
[12:04:34] [PASSED] 48 VFs
[12:04:34] [PASSED] 49 VFs
[12:04:34] [PASSED] 50 VFs
[12:04:34] [PASSED] 51 VFs
[12:04:34] [PASSED] 52 VFs
[12:04:34] [PASSED] 53 VFs
[12:04:34] [PASSED] 54 VFs
[12:04:34] [PASSED] 55 VFs
[12:04:34] [PASSED] 56 VFs
[12:04:34] [PASSED] 57 VFs
[12:04:34] [PASSED] 58 VFs
[12:04:34] [PASSED] 59 VFs
[12:04:34] [PASSED] 60 VFs
[12:04:34] [PASSED] 61 VFs
[12:04:34] [PASSED] 62 VFs
[12:04:34] [PASSED] 63 VFs
[12:04:34] ================== [PASSED] fair_contexts ==================
[12:04:34] ===================== fair_doorbells ======================
[12:04:34] [PASSED] 1 VF
[12:04:34] [PASSED] 2 VFs
[12:04:34] [PASSED] 3 VFs
[12:04:34] [PASSED] 4 VFs
[12:04:34] [PASSED] 5 VFs
[12:04:34] [PASSED] 6 VFs
[12:04:34] [PASSED] 7 VFs
[12:04:34] [PASSED] 8 VFs
[12:04:34] [PASSED] 9 VFs
[12:04:34] [PASSED] 10 VFs
[12:04:34] [PASSED] 11 VFs
[12:04:34] [PASSED] 12 VFs
[12:04:34] [PASSED] 13 VFs
[12:04:34] [PASSED] 14 VFs
[12:04:34] [PASSED] 15 VFs
[12:04:34] [PASSED] 16 VFs
[12:04:34] [PASSED] 17 VFs
[12:04:34] [PASSED] 18 VFs
[12:04:34] [PASSED] 19 VFs
[12:04:34] [PASSED] 20 VFs
[12:04:34] [PASSED] 21 VFs
[12:04:34] [PASSED] 22 VFs
[12:04:34] [PASSED] 23 VFs
[12:04:34] [PASSED] 24 VFs
[12:04:34] [PASSED] 25 VFs
[12:04:34] [PASSED] 26 VFs
[12:04:34] [PASSED] 27 VFs
[12:04:34] [PASSED] 28 VFs
[12:04:34] [PASSED] 29 VFs
[12:04:34] [PASSED] 30 VFs
[12:04:34] [PASSED] 31 VFs
[12:04:34] [PASSED] 32 VFs
[12:04:34] [PASSED] 33 VFs
[12:04:34] [PASSED] 34 VFs
[12:04:34] [PASSED] 35 VFs
[12:04:34] [PASSED] 36 VFs
[12:04:34] [PASSED] 37 VFs
[12:04:34] [PASSED] 38 VFs
[12:04:34] [PASSED] 39 VFs
[12:04:34] [PASSED] 40 VFs
[12:04:34] [PASSED] 41 VFs
[12:04:34] [PASSED] 42 VFs
[12:04:34] [PASSED] 43 VFs
[12:04:34] [PASSED] 44 VFs
[12:04:34] [PASSED] 45 VFs
[12:04:34] [PASSED] 46 VFs
[12:04:34] [PASSED] 47 VFs
[12:04:34] [PASSED] 48 VFs
[12:04:34] [PASSED] 49 VFs
[12:04:34] [PASSED] 50 VFs
[12:04:34] [PASSED] 51 VFs
[12:04:34] [PASSED] 52 VFs
[12:04:34] [PASSED] 53 VFs
[12:04:34] [PASSED] 54 VFs
[12:04:34] [PASSED] 55 VFs
[12:04:34] [PASSED] 56 VFs
[12:04:34] [PASSED] 57 VFs
[12:04:34] [PASSED] 58 VFs
[12:04:34] [PASSED] 59 VFs
[12:04:34] [PASSED] 60 VFs
[12:04:34] [PASSED] 61 VFs
[12:04:34] [PASSED] 62 VFs
[12:04:34] [PASSED] 63 VFs
[12:04:34] ================= [PASSED] fair_doorbells ==================
[12:04:34] ======================== fair_ggtt ========================
[12:04:34] [PASSED] 1 VF
[12:04:34] [PASSED] 2 VFs
[12:04:34] [PASSED] 3 VFs
[12:04:34] [PASSED] 4 VFs
[12:04:34] [PASSED] 5 VFs
[12:04:34] [PASSED] 6 VFs
[12:04:34] [PASSED] 7 VFs
[12:04:34] [PASSED] 8 VFs
[12:04:34] [PASSED] 9 VFs
[12:04:34] [PASSED] 10 VFs
[12:04:34] [PASSED] 11 VFs
[12:04:34] [PASSED] 12 VFs
[12:04:34] [PASSED] 13 VFs
[12:04:34] [PASSED] 14 VFs
[12:04:34] [PASSED] 15 VFs
[12:04:34] [PASSED] 16 VFs
[12:04:34] [PASSED] 17 VFs
[12:04:34] [PASSED] 18 VFs
[12:04:34] [PASSED] 19 VFs
[12:04:34] [PASSED] 20 VFs
[12:04:34] [PASSED] 21 VFs
[12:04:34] [PASSED] 22 VFs
[12:04:34] [PASSED] 23 VFs
[12:04:34] [PASSED] 24 VFs
[12:04:34] [PASSED] 25 VFs
[12:04:34] [PASSED] 26 VFs
[12:04:34] [PASSED] 27 VFs
[12:04:34] [PASSED] 28 VFs
[12:04:34] [PASSED] 29 VFs
[12:04:34] [PASSED] 30 VFs
[12:04:34] [PASSED] 31 VFs
[12:04:34] [PASSED] 32 VFs
[12:04:34] [PASSED] 33 VFs
[12:04:34] [PASSED] 34 VFs
[12:04:34] [PASSED] 35 VFs
[12:04:34] [PASSED] 36 VFs
[12:04:34] [PASSED] 37 VFs
[12:04:34] [PASSED] 38 VFs
[12:04:34] [PASSED] 39 VFs
[12:04:34] [PASSED] 40 VFs
[12:04:35] [PASSED] 41 VFs
[12:04:35] [PASSED] 42 VFs
[12:04:35] [PASSED] 43 VFs
[12:04:35] [PASSED] 44 VFs
[12:04:35] [PASSED] 45 VFs
[12:04:35] [PASSED] 46 VFs
[12:04:35] [PASSED] 47 VFs
[12:04:35] [PASSED] 48 VFs
[12:04:35] [PASSED] 49 VFs
[12:04:35] [PASSED] 50 VFs
[12:04:35] [PASSED] 51 VFs
[12:04:35] [PASSED] 52 VFs
[12:04:35] [PASSED] 53 VFs
[12:04:35] [PASSED] 54 VFs
[12:04:35] [PASSED] 55 VFs
[12:04:35] [PASSED] 56 VFs
[12:04:35] [PASSED] 57 VFs
[12:04:35] [PASSED] 58 VFs
[12:04:35] [PASSED] 59 VFs
[12:04:35] [PASSED] 60 VFs
[12:04:35] [PASSED] 61 VFs
[12:04:35] [PASSED] 62 VFs
[12:04:35] [PASSED] 63 VFs
[12:04:35] ==================== [PASSED] fair_ggtt ====================
[12:04:35] ======================== fair_vram ========================
[12:04:35] [PASSED] 1 VF
[12:04:35] [PASSED] 2 VFs
[12:04:35] [PASSED] 3 VFs
[12:04:35] [PASSED] 4 VFs
[12:04:35] [PASSED] 5 VFs
[12:04:35] [PASSED] 6 VFs
[12:04:35] [PASSED] 7 VFs
[12:04:35] [PASSED] 8 VFs
[12:04:35] [PASSED] 9 VFs
[12:04:35] [PASSED] 10 VFs
[12:04:35] [PASSED] 11 VFs
[12:04:35] [PASSED] 12 VFs
[12:04:35] [PASSED] 13 VFs
[12:04:35] [PASSED] 14 VFs
[12:04:35] [PASSED] 15 VFs
[12:04:35] [PASSED] 16 VFs
[12:04:35] [PASSED] 17 VFs
[12:04:35] [PASSED] 18 VFs
[12:04:35] [PASSED] 19 VFs
[12:04:35] [PASSED] 20 VFs
[12:04:35] [PASSED] 21 VFs
[12:04:35] [PASSED] 22 VFs
[12:04:35] [PASSED] 23 VFs
[12:04:35] [PASSED] 24 VFs
[12:04:35] [PASSED] 25 VFs
[12:04:35] [PASSED] 26 VFs
[12:04:35] [PASSED] 27 VFs
[12:04:35] [PASSED] 28 VFs
[12:04:35] [PASSED] 29 VFs
[12:04:35] [PASSED] 30 VFs
[12:04:35] [PASSED] 31 VFs
[12:04:35] [PASSED] 32 VFs
[12:04:35] [PASSED] 33 VFs
[12:04:35] [PASSED] 34 VFs
[12:04:35] [PASSED] 35 VFs
[12:04:35] [PASSED] 36 VFs
[12:04:35] [PASSED] 37 VFs
[12:04:35] [PASSED] 38 VFs
[12:04:35] [PASSED] 39 VFs
[12:04:35] [PASSED] 40 VFs
[12:04:35] [PASSED] 41 VFs
[12:04:35] [PASSED] 42 VFs
[12:04:35] [PASSED] 43 VFs
[12:04:35] [PASSED] 44 VFs
[12:04:35] [PASSED] 45 VFs
[12:04:35] [PASSED] 46 VFs
[12:04:35] [PASSED] 47 VFs
[12:04:35] [PASSED] 48 VFs
[12:04:35] [PASSED] 49 VFs
[12:04:35] [PASSED] 50 VFs
[12:04:35] [PASSED] 51 VFs
[12:04:35] [PASSED] 52 VFs
[12:04:35] [PASSED] 53 VFs
[12:04:35] [PASSED] 54 VFs
[12:04:35] [PASSED] 55 VFs
[12:04:35] [PASSED] 56 VFs
[12:04:35] [PASSED] 57 VFs
[12:04:35] [PASSED] 58 VFs
[12:04:35] [PASSED] 59 VFs
[12:04:35] [PASSED] 60 VFs
[12:04:35] [PASSED] 61 VFs
[12:04:35] [PASSED] 62 VFs
[12:04:35] [PASSED] 63 VFs
[12:04:35] ==================== [PASSED] fair_vram ====================
[12:04:35] ================== [PASSED] pf_gt_config ===================
[12:04:35] ===================== lmtt (1 subtest) =====================
[12:04:35] ======================== test_ops =========================
[12:04:35] [PASSED] 2-level
[12:04:35] [PASSED] multi-level
[12:04:35] ==================== [PASSED] test_ops =====================
[12:04:35] ====================== [PASSED] lmtt =======================
[12:04:35] ================= sriov_packet (1 subtest) =================
[12:04:35] [PASSED] test_descriptor_init
[12:04:35] ================== [PASSED] sriov_packet ===================
[12:04:35] ================= pf_service (11 subtests) =================
[12:04:35] [PASSED] pf_negotiate_any
[12:04:35] [PASSED] pf_negotiate_base_match
[12:04:35] [PASSED] pf_negotiate_base_newer
[12:04:35] [PASSED] pf_negotiate_base_next
[12:04:35] [SKIPPED] pf_negotiate_base_older (no older minor)
[12:04:35] [PASSED] pf_negotiate_base_prev
[12:04:35] [PASSED] pf_negotiate_latest_match
[12:04:35] [PASSED] pf_negotiate_latest_newer
[12:04:35] [PASSED] pf_negotiate_latest_next
[12:04:35] [SKIPPED] pf_negotiate_latest_older (no older minor)
[12:04:35] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[12:04:35] =================== [PASSED] pf_service ====================
[12:04:35] ================= xe_guc_g2g (2 subtests) ==================
[12:04:35] ============== xe_live_guc_g2g_kunit_default ==============
[12:04:35] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:04:35] ============== xe_live_guc_g2g_kunit_allmem ===============
[12:04:35] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:04:35] =================== [SKIPPED] xe_guc_g2g ===================
[12:04:35] =================== xe_mocs (2 subtests) ===================
[12:04:35] ================ xe_live_mocs_kernel_kunit ================
[12:04:35] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:04:35] ================ xe_live_mocs_reset_kunit =================
[12:04:35] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:04:35] ==================== [SKIPPED] xe_mocs =====================
[12:04:35] ================= xe_migrate (3 subtests) ==================
[12:04:35] ================= xe_migrate_sanity_kunit =================
[12:04:35] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:04:35] ================== xe_validate_ccs_kunit ==================
[12:04:35] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:04:35] ============= xe_migrate_access_memory_kunit ==============
[12:04:35] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[12:04:35] =================== [SKIPPED] xe_migrate ===================
[12:04:35] ================== xe_dma_buf (1 subtest) ==================
[12:04:35] ==================== xe_dma_buf_kunit =====================
[12:04:35] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:04:35] =================== [SKIPPED] xe_dma_buf ===================
[12:04:35] ================= xe_bo_shrink (1 subtest) =================
[12:04:35] =================== xe_bo_shrink_kunit ====================
[12:04:35] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:04:35] ================== [SKIPPED] xe_bo_shrink ==================
[12:04:35] ==================== xe_bo (2 subtests) ====================
[12:04:35] ================== xe_ccs_migrate_kunit ===================
[12:04:35] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:04:35] ==================== xe_bo_evict_kunit ====================
[12:04:35] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:04:35] ===================== [SKIPPED] xe_bo ======================
[12:04:35] =================== xe_any (9 subtests) ====================
[12:04:35] [PASSED] test_to_xe
[12:04:35] [PASSED] test_to_dev
[12:04:35] [PASSED] test_to_pdev
[12:04:35] [PASSED] test_to_drm
[12:04:35] [PASSED] test_if_pdev
[12:04:35] [PASSED] test_if_xe
[12:04:35] [PASSED] test_if_tile
[12:04:35] [PASSED] test_if_gt
[12:04:35] [PASSED] test_to_id
[12:04:35] ===================== [PASSED] xe_any ======================
[12:04:35] ==================== args (13 subtests) ====================
[12:04:35] [PASSED] count_args_test
[12:04:35] [PASSED] call_args_example
[12:04:35] [PASSED] call_args_test
[12:04:35] [PASSED] drop_first_arg_example
[12:04:35] [PASSED] drop_first_arg_test
[12:04:35] [PASSED] first_arg_example
[12:04:35] [PASSED] first_arg_test
[12:04:35] [PASSED] last_arg_example
[12:04:35] [PASSED] last_arg_test
[12:04:35] [PASSED] pick_arg_example
[12:04:35] [PASSED] if_args_example
[12:04:35] [PASSED] if_args_test
[12:04:35] [PASSED] sep_comma_example
[12:04:35] ====================== [PASSED] args =======================
[12:04:35] =================== xe_pci (3 subtests) ====================
[12:04:35] ==================== check_graphics_ip ====================
[12:04:35] [PASSED] 12.00 Xe_LP
[12:04:35] [PASSED] 12.10 Xe_LP+
[12:04:35] [PASSED] 12.55 Xe_HPG
[12:04:35] [PASSED] 12.60 Xe_HPC
[12:04:35] [PASSED] 12.70 Xe_LPG
[12:04:35] [PASSED] 12.71 Xe_LPG
[12:04:35] [PASSED] 12.74 Xe_LPG+
[12:04:35] [PASSED] 20.01 Xe2_HPG
[12:04:35] [PASSED] 20.02 Xe2_HPG
[12:04:35] [PASSED] 20.04 Xe2_LPG
[12:04:35] [PASSED] 30.00 Xe3_LPG
[12:04:35] [PASSED] 30.01 Xe3_LPG
[12:04:35] [PASSED] 30.03 Xe3_LPG
[12:04:35] [PASSED] 30.04 Xe3_LPG
[12:04:35] [PASSED] 30.05 Xe3_LPG
[12:04:35] [PASSED] 35.10 Xe3p_LPG
[12:04:35] [PASSED] 35.11 Xe3p_XPC
[12:04:35] ================ [PASSED] check_graphics_ip ================
[12:04:35] ===================== check_media_ip ======================
[12:04:35] [PASSED] 12.00 Xe_M
[12:04:35] [PASSED] 12.55 Xe_HPM
[12:04:35] [PASSED] 13.00 Xe_LPM+
[12:04:35] [PASSED] 13.01 Xe2_HPM
[12:04:35] [PASSED] 20.00 Xe2_LPM
[12:04:35] [PASSED] 30.00 Xe3_LPM
[12:04:35] [PASSED] 30.02 Xe3_LPM
[12:04:35] [PASSED] 35.00 Xe3p_LPM
[12:04:35] [PASSED] 35.03 Xe3p_HPM
[12:04:35] ================= [PASSED] check_media_ip ==================
[12:04:35] =================== check_platform_desc ===================
[12:04:35] [PASSED] 0x9A60 (TIGERLAKE)
[12:04:35] [PASSED] 0x9A68 (TIGERLAKE)
[12:04:35] [PASSED] 0x9A70 (TIGERLAKE)
[12:04:35] [PASSED] 0x9A40 (TIGERLAKE)
[12:04:35] [PASSED] 0x9A49 (TIGERLAKE)
[12:04:35] [PASSED] 0x9A59 (TIGERLAKE)
[12:04:35] [PASSED] 0x9A78 (TIGERLAKE)
[12:04:35] [PASSED] 0x9AC0 (TIGERLAKE)
[12:04:35] [PASSED] 0x9AC9 (TIGERLAKE)
[12:04:35] [PASSED] 0x9AD9 (TIGERLAKE)
[12:04:35] [PASSED] 0x9AF8 (TIGERLAKE)
[12:04:35] [PASSED] 0x4C80 (ROCKETLAKE)
[12:04:35] [PASSED] 0x4C8A (ROCKETLAKE)
[12:04:35] [PASSED] 0x4C8B (ROCKETLAKE)
[12:04:35] [PASSED] 0x4C8C (ROCKETLAKE)
[12:04:35] [PASSED] 0x4C90 (ROCKETLAKE)
[12:04:35] [PASSED] 0x4C9A (ROCKETLAKE)
[12:04:35] [PASSED] 0x4680 (ALDERLAKE_S)
[12:04:35] [PASSED] 0x4682 (ALDERLAKE_S)
[12:04:35] [PASSED] 0x4688 (ALDERLAKE_S)
[12:04:35] [PASSED] 0x468A (ALDERLAKE_S)
[12:04:35] [PASSED] 0x468B (ALDERLAKE_S)
[12:04:35] [PASSED] 0x4690 (ALDERLAKE_S)
[12:04:35] [PASSED] 0x4692 (ALDERLAKE_S)
[12:04:35] [PASSED] 0x4693 (ALDERLAKE_S)
[12:04:35] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46AA (ALDERLAKE_P)
[12:04:35] [PASSED] 0x462A (ALDERLAKE_P)
[12:04:35] [PASSED] 0x4626 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x4628 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:04:35] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:04:35] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:04:35] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:04:35] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:04:35] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:04:35] [PASSED] 0xA721 (ALDERLAKE_P)
[12:04:35] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:04:35] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:04:35] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:04:35] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:04:35] [PASSED] 0xA720 (ALDERLAKE_P)
[12:04:35] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:04:35] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:04:35] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:04:35] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:04:35] [PASSED] 0xA780 (ALDERLAKE_S)
[12:04:35] [PASSED] 0xA781 (ALDERLAKE_S)
[12:04:35] [PASSED] 0xA782 (ALDERLAKE_S)
[12:04:35] [PASSED] 0xA783 (ALDERLAKE_S)
[12:04:35] [PASSED] 0xA788 (ALDERLAKE_S)
[12:04:35] [PASSED] 0xA789 (ALDERLAKE_S)
[12:04:35] [PASSED] 0xA78A (ALDERLAKE_S)
[12:04:35] [PASSED] 0xA78B (ALDERLAKE_S)
[12:04:35] [PASSED] 0x4905 (DG1)
[12:04:35] [PASSED] 0x4906 (DG1)
[12:04:35] [PASSED] 0x4907 (DG1)
[12:04:35] [PASSED] 0x4908 (DG1)
[12:04:35] [PASSED] 0x4909 (DG1)
[12:04:35] [PASSED] 0x56C0 (DG2)
[12:04:35] [PASSED] 0x56C2 (DG2)
[12:04:35] [PASSED] 0x56C1 (DG2)
[12:04:35] [PASSED] 0x7D51 (METEORLAKE)
[12:04:35] [PASSED] 0x7DD1 (METEORLAKE)
[12:04:35] [PASSED] 0x7D41 (METEORLAKE)
[12:04:35] [PASSED] 0x7D67 (METEORLAKE)
[12:04:35] [PASSED] 0xB640 (METEORLAKE)
[12:04:35] [PASSED] 0x56A0 (DG2)
[12:04:35] [PASSED] 0x56A1 (DG2)
[12:04:35] [PASSED] 0x56A2 (DG2)
[12:04:35] [PASSED] 0x56BE (DG2)
[12:04:35] [PASSED] 0x56BF (DG2)
[12:04:35] [PASSED] 0x5690 (DG2)
[12:04:35] [PASSED] 0x5691 (DG2)
[12:04:35] [PASSED] 0x5692 (DG2)
[12:04:35] [PASSED] 0x56A5 (DG2)
[12:04:35] [PASSED] 0x56A6 (DG2)
[12:04:35] [PASSED] 0x56B0 (DG2)
[12:04:35] [PASSED] 0x56B1 (DG2)
[12:04:35] [PASSED] 0x56BA (DG2)
[12:04:35] [PASSED] 0x56BB (DG2)
[12:04:35] [PASSED] 0x56BC (DG2)
[12:04:35] [PASSED] 0x56BD (DG2)
[12:04:35] [PASSED] 0x5693 (DG2)
[12:04:35] [PASSED] 0x5694 (DG2)
[12:04:35] [PASSED] 0x5695 (DG2)
[12:04:35] [PASSED] 0x56A3 (DG2)
[12:04:35] [PASSED] 0x56A4 (DG2)
[12:04:35] [PASSED] 0x56B2 (DG2)
[12:04:35] [PASSED] 0x56B3 (DG2)
[12:04:35] [PASSED] 0x5696 (DG2)
[12:04:35] [PASSED] 0x5697 (DG2)
[12:04:35] [PASSED] 0xB69 (PVC)
[12:04:35] [PASSED] 0xB6E (PVC)
[12:04:35] [PASSED] 0xBD4 (PVC)
[12:04:35] [PASSED] 0xBD5 (PVC)
[12:04:35] [PASSED] 0xBD6 (PVC)
[12:04:35] [PASSED] 0xBD7 (PVC)
[12:04:35] [PASSED] 0xBD8 (PVC)
[12:04:35] [PASSED] 0xBD9 (PVC)
[12:04:35] [PASSED] 0xBDA (PVC)
[12:04:35] [PASSED] 0xBDB (PVC)
[12:04:35] [PASSED] 0xBE0 (PVC)
[12:04:35] [PASSED] 0xBE1 (PVC)
[12:04:35] [PASSED] 0xBE5 (PVC)
[12:04:35] [PASSED] 0x7D40 (METEORLAKE)
[12:04:35] [PASSED] 0x7D45 (METEORLAKE)
[12:04:35] [PASSED] 0x7D55 (METEORLAKE)
[12:04:35] [PASSED] 0x7D60 (METEORLAKE)
[12:04:35] [PASSED] 0x7DD5 (METEORLAKE)
[12:04:35] [PASSED] 0x6420 (LUNARLAKE)
[12:04:35] [PASSED] 0x64A0 (LUNARLAKE)
[12:04:35] [PASSED] 0x64B0 (LUNARLAKE)
[12:04:35] [PASSED] 0xE202 (BATTLEMAGE)
[12:04:35] [PASSED] 0xE209 (BATTLEMAGE)
[12:04:35] [PASSED] 0xE20B (BATTLEMAGE)
[12:04:35] [PASSED] 0xE20C (BATTLEMAGE)
[12:04:35] [PASSED] 0xE20D (BATTLEMAGE)
[12:04:35] [PASSED] 0xE210 (BATTLEMAGE)
[12:04:35] [PASSED] 0xE211 (BATTLEMAGE)
[12:04:35] [PASSED] 0xE212 (BATTLEMAGE)
[12:04:35] [PASSED] 0xE216 (BATTLEMAGE)
[12:04:35] [PASSED] 0xE220 (BATTLEMAGE)
[12:04:35] [PASSED] 0xE221 (BATTLEMAGE)
[12:04:35] [PASSED] 0xE222 (BATTLEMAGE)
[12:04:35] [PASSED] 0xE223 (BATTLEMAGE)
[12:04:35] [PASSED] 0xB080 (PANTHERLAKE)
[12:04:35] [PASSED] 0xB081 (PANTHERLAKE)
[12:04:35] [PASSED] 0xB082 (PANTHERLAKE)
[12:04:35] [PASSED] 0xB083 (PANTHERLAKE)
[12:04:35] [PASSED] 0xB084 (PANTHERLAKE)
[12:04:35] [PASSED] 0xB085 (PANTHERLAKE)
[12:04:35] [PASSED] 0xB086 (PANTHERLAKE)
[12:04:35] [PASSED] 0xB087 (PANTHERLAKE)
[12:04:35] [PASSED] 0xB08F (PANTHERLAKE)
[12:04:35] [PASSED] 0xB090 (PANTHERLAKE)
[12:04:35] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:04:35] [PASSED] 0xB0A1 (PANTHERLAKE)
[12:04:35] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:04:35] [PASSED] 0xFD80 (PANTHERLAKE)
[12:04:35] [PASSED] 0xFD81 (PANTHERLAKE)
[12:04:35] [PASSED] 0xD740 (NOVALAKE_S)
[12:04:35] [PASSED] 0xD741 (NOVALAKE_S)
[12:04:35] [PASSED] 0xD742 (NOVALAKE_S)
[12:04:35] [PASSED] 0xD743 (NOVALAKE_S)
[12:04:35] [PASSED] 0xD745 (NOVALAKE_S)
[12:04:35] [PASSED] 0xD74A (NOVALAKE_S)
[12:04:35] [PASSED] 0xD74B (NOVALAKE_S)
[12:04:35] [PASSED] 0x674C (CRESCENTISLAND)
[12:04:35] [PASSED] 0x674D (CRESCENTISLAND)
[12:04:35] [PASSED] 0x674E (CRESCENTISLAND)
[12:04:35] [PASSED] 0x674F (CRESCENTISLAND)
[12:04:35] [PASSED] 0x6750 (CRESCENTISLAND)
[12:04:35] [PASSED] 0x6751 (CRESCENTISLAND)
[12:04:35] [PASSED] 0x6752 (CRESCENTISLAND)
[12:04:35] [PASSED] 0xD750 (NOVALAKE_P)
[12:04:35] [PASSED] 0xD751 (NOVALAKE_P)
[12:04:35] [PASSED] 0xD752 (NOVALAKE_P)
[12:04:35] [PASSED] 0xD753 (NOVALAKE_P)
[12:04:35] [PASSED] 0xD754 (NOVALAKE_P)
[12:04:35] [PASSED] 0xD755 (NOVALAKE_P)
[12:04:35] [PASSED] 0xD756 (NOVALAKE_P)
[12:04:35] [PASSED] 0xD757 (NOVALAKE_P)
[12:04:35] [PASSED] 0xD75F (NOVALAKE_P)
[12:04:35] =============== [PASSED] check_platform_desc ===============
[12:04:35] ===================== [PASSED] xe_pci ======================
[12:04:35] ============= xe_rtp_tables_test (5 subtests) ==============
[12:04:35] ================== xe_rtp_table_gt_test ===================
[12:04:35] [PASSED] gt_was/14011060649
[12:04:35] [PASSED] gt_was/14011059788
[12:04:35] [PASSED] gt_was/14015795083
[12:04:35] [PASSED] gt_was/16021867713
[12:04:35] [PASSED] gt_was/14019449301
[12:04:35] [PASSED] gt_was/16028005424
[12:04:35] [PASSED] gt_was/14026578760
[12:04:35] [PASSED] gt_was/1409420604
[12:04:35] [PASSED] gt_was/1408615072
[12:04:35] [PASSED] gt_was/22010523718
[12:04:35] [PASSED] gt_was/14011006942
[12:04:35] [PASSED] gt_was/14014830051
[12:04:35] [PASSED] gt_was/18018781329
[12:04:35] [PASSED] gt_was/1509235366
[12:04:35] [PASSED] gt_was/18018781329
[12:04:35] [PASSED] gt_was/16016694945
[12:04:35] [PASSED] gt_was/14018575942
[12:04:35] [PASSED] gt_was/22016670082
[12:04:35] [PASSED] gt_was/22016670082
[12:04:35] [PASSED] gt_was/14017421178
[12:04:35] [PASSED] gt_was/16025250150
[12:04:35] [PASSED] gt_was/14021871409
[12:04:35] [PASSED] gt_was/16021865536
[12:04:35] [PASSED] gt_was/14021486841
[12:04:35] [PASSED] gt_was/14025160223
[12:04:35] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[12:04:35] [PASSED] gt_was/14025635424
[12:04:35] [PASSED] gt_was/16028005424
[12:04:35] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:04:35] ================== xe_rtp_table_gt_test ===================
[12:04:35] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[12:04:35] [PASSED] gt_tunings/Tuning: 32B Access Enable
[12:04:35] [PASSED] gt_tunings/Tuning: L3 cache
[12:04:35] [PASSED] gt_tunings/Tuning: L3 cache - media
[12:04:35] [PASSED] gt_tunings/Tuning: Compression Overfetch
[12:04:35] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[12:04:35] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[12:04:35] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[12:04:35] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[12:04:35] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[12:04:35] [PASSED] gt_tunings/Tuning: Stateless compression control
[12:04:35] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[12:04:35] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[12:04:35] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[12:04:35] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[12:04:35] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[12:04:35] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:04:35] ================== xe_rtp_table_oob_test ==================
[12:04:35] [PASSED] oob_was/1607983814
[12:04:35] [PASSED] oob_was/16010904313
[12:04:35] [PASSED] oob_was/18022495364
[12:04:35] [PASSED] oob_was/22012773006
[12:04:35] [PASSED] oob_was/14014475959
[12:04:35] [PASSED] oob_was/22011391025
[12:04:35] [PASSED] oob_was/22012727170
[12:04:35] [PASSED] oob_was/22012727685
[12:04:35] [PASSED] oob_was/22016596838
[12:04:35] [PASSED] oob_was/18020744125
[12:04:35] [PASSED] oob_was/1409600907
[12:04:35] [PASSED] oob_was/22014953428
[12:04:35] [PASSED] oob_was/16017236439
[12:04:35] [PASSED] oob_was/14019821291
[12:04:35] [PASSED] oob_was/14015076503
[12:04:35] [PASSED] oob_was/22016122933
[12:04:35] [PASSED] oob_was/14018913170
[12:04:35] [PASSED] oob_was/14018094691
[12:04:35] [PASSED] oob_was/18024947630
[12:04:35] [PASSED] oob_was/16022287689
[12:04:35] [PASSED] oob_was/13011645652
[12:04:35] [PASSED] oob_was/14022293748
[12:04:35] [PASSED] oob_was/22019794406
[12:04:35] [PASSED] oob_was/22019338487
[12:04:35] [PASSED] oob_was/16023588340
[12:04:35] [PASSED] oob_was/14019789679
[12:04:35] [PASSED] oob_was/14022866841
[12:04:35] [PASSED] oob_was/16021333562
[12:04:35] [PASSED] oob_was/14016712196
[12:04:35] [PASSED] oob_was/14015568240
[12:04:35] [PASSED] oob_was/18013179988
[12:04:35] [PASSED] oob_was/1508761755
[12:04:35] [PASSED] oob_was/16023105232
[12:04:35] [PASSED] oob_was/16026508708
[12:04:35] [PASSED] oob_was/14020001231
[12:04:35] [PASSED] oob_was/16023683509
[12:04:35] [PASSED] oob_was/14025515070
[12:04:35] [PASSED] oob_was/15015404425_disable
[12:04:35] [PASSED] oob_was/16026007364
[12:04:35] [PASSED] oob_was/14020316580
[12:04:35] [PASSED] oob_was/14025883347
[12:04:35] [PASSED] oob_was/16029380221
[12:04:35] [PASSED] oob_was/22022079272
[12:04:35] [PASSED] oob_was/16029897822
[12:04:35] [PASSED] oob_was/14026539277
[12:04:35] [PASSED] oob_was/14027054324
[12:04:35] [PASSED] oob_was/14025941587
[12:04:35] [PASSED] oob_was/16030224309
[12:04:35] [PASSED] oob_was/14028709524
[12:04:35] [PASSED] oob_was/14028250015
[12:04:35] [PASSED] oob_was/16031259911
[12:04:35] ============== [PASSED] xe_rtp_table_oob_test ==============
[12:04:35] ================ xe_rtp_table_dev_oob_test ================
[12:04:35] [PASSED] device_oob_was/22010954014
[12:04:35] [PASSED] device_oob_was/15015404425
[12:04:35] [PASSED] device_oob_was/22019338487_display
[12:04:35] [PASSED] device_oob_was/14022085890
[12:04:35] [PASSED] device_oob_was/14026633728
[12:04:35] [PASSED] device_oob_was/14026746987
[12:04:35] [PASSED] device_oob_was/14026779378
[12:04:35] [PASSED] device_oob_was/14028586678
[12:04:35] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[12:04:35] ========== xe_rtp_table_missing_upper_bound_test ==========
[12:04:35] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[12:04:35] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[12:04:35] [PASSED] register_whitelist/1806527549
[12:04:35] [PASSED] register_whitelist/allow_read_ctx_timestamp
[12:04:35] [PASSED] register_whitelist/allow_read_queue_timestamp
[12:04:35] [PASSED] register_whitelist/16014440446
[12:04:35] [PASSED] register_whitelist/16017236439
[12:04:35] [PASSED] register_whitelist/16020183090
[12:04:35] [PASSED] register_whitelist/14024997852
[12:04:35] [PASSED] register_whitelist/14024997852
[12:04:35] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[12:04:35] =============== [PASSED] xe_rtp_tables_test ================
[12:04:35] =================== xe_rtp (3 subtests) ====================
[12:04:35] =================== xe_rtp_rules_tests ====================
[12:04:35] [PASSED] no
[12:04:35] [PASSED] yes
[12:04:35] [PASSED] no-and-no
[12:04:35] [PASSED] no-and-yes
[12:04:35] [PASSED] yes-and-no
[12:04:35] [PASSED] yes-and-yes
[12:04:35] [PASSED] no-or-no
[12:04:35] [PASSED] no-or-yes
[12:04:35] [PASSED] yes-or-no
[12:04:35] [PASSED] yes-or-yes
[12:04:35] [PASSED] no-yes-or-yes-no
[12:04:35] [PASSED] no-yes-or-yes-yes
[12:04:35] [PASSED] yes-yes-or-no-yes
[12:04:35] [PASSED] yes-yes-or-yes-yes
[12:04:35] [PASSED] no-no-or-yes-or-no
[12:04:35] [PASSED] or
[12:04:35] [PASSED] or-yes
[12:04:35] [PASSED] or-no
[12:04:35] [PASSED] yes-or
[12:04:35] [PASSED] no-or
[12:04:35] [PASSED] no-or-or-yes
[12:04:35] [PASSED] yes-or-or-no
[12:04:35] [PASSED] no-or-or-no
[12:04:35] [PASSED] missing-context-engine-class
[12:04:35] [PASSED] missing-context-engine-class-or-yes
[12:04:35] [PASSED] missing-context-engine-class-or-or-yes
[12:04:35] =============== [PASSED] xe_rtp_rules_tests ================
[12:04:35] =============== xe_rtp_process_to_sr_tests ================
[12:04:35] [PASSED] coalesce-same-reg
[12:04:35] [PASSED] coalesce-same-reg-literal-and-func
[12:04:35] [PASSED] no-match-no-add
[12:04:35] [PASSED] two-regs-two-entries
[12:04:35] [PASSED] clr-one-set-other
[12:04:35] [PASSED] set-field
[12:04:35] [PASSED] conflict-duplicate
[12:04:35] [PASSED] conflict-not-disjoint
[12:04:35] [PASSED] conflict-not-disjoint-literal-and-func
[12:04:35] [PASSED] conflict-reg-type
[12:04:35] [PASSED] bad-mcr-reg-forced-to-regular
[12:04:35] [PASSED] bad-regular-reg-forced-to-mcr
[12:04:35] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:04:35] ================== xe_rtp_process_tests ===================
[12:04:35] [PASSED] active1
[12:04:35] [PASSED] active2
[12:04:35] [PASSED] active-inactive
[12:04:35] [PASSED] inactive-active
[12:04:35] [PASSED] inactive-active-inactive
[12:04:35] [PASSED] inactive-inactive-inactive
[12:04:35] ============== [PASSED] xe_rtp_process_tests ===============
[12:04:35] ===================== [PASSED] xe_rtp ======================
[12:04:35] ==================== xe_wa (1 subtest) =====================
[12:04:35] ======================== xe_wa_gt =========================
[12:04:35] [PASSED] TIGERLAKE B0
[12:04:35] [PASSED] DG1 A0
[12:04:35] [PASSED] DG1 B0
[12:04:35] [PASSED] ALDERLAKE_S A0
[12:04:35] [PASSED] ALDERLAKE_S B0
[12:04:35] [PASSED] ALDERLAKE_S C0
[12:04:35] [PASSED] ALDERLAKE_S D0
[12:04:35] [PASSED] ALDERLAKE_P A0
[12:04:35] [PASSED] ALDERLAKE_P B0
[12:04:35] [PASSED] ALDERLAKE_P C0
[12:04:35] [PASSED] ALDERLAKE_S RPLS D0
[12:04:35] [PASSED] ALDERLAKE_P RPLU E0
[12:04:35] [PASSED] DG2 G10 C0
[12:04:35] [PASSED] DG2 G11 B1
[12:04:35] [PASSED] DG2 G12 A1
[12:04:35] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:04:35] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:04:35] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:04:35] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:04:35] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:04:35] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:04:35] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:04:35] ==================== [PASSED] xe_wa_gt =====================
[12:04:35] ====================== [PASSED] xe_wa ======================
[12:04:35] ============================================================
[12:04:35] Testing complete. Ran 843 tests: passed: 814, skipped: 29
[12:04:35] Elapsed time: 42.481s total, 2.553s configuring, 39.162s building, 0.721s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:04:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:04:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:05:03] Starting KUnit Kernel (1/1)...
[12:05:03] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:05:03] ============ drm_test_pick_cmdline (2 subtests) ============
[12:05:03] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:05:03] =============== drm_test_pick_cmdline_named ===============
[12:05:03] [PASSED] NTSC
[12:05:03] [PASSED] NTSC-J
[12:05:03] [PASSED] PAL
[12:05:03] [PASSED] PAL-M
[12:05:03] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:05:03] ============== [PASSED] drm_test_pick_cmdline ==============
[12:05:03] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:05:03] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:05:03] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:05:03] =========== drm_validate_clone_mode (2 subtests) ===========
[12:05:03] ============== drm_test_check_in_clone_mode ===============
[12:05:03] [PASSED] in_clone_mode
[12:05:03] [PASSED] not_in_clone_mode
[12:05:03] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:05:03] =============== drm_test_check_valid_clones ===============
[12:05:03] [PASSED] not_in_clone_mode
[12:05:03] [PASSED] valid_clone
[12:05:03] [PASSED] invalid_clone
[12:05:03] =========== [PASSED] drm_test_check_valid_clones ===========
[12:05:03] ============= [PASSED] drm_validate_clone_mode =============
[12:05:03] ============= drm_validate_modeset (1 subtest) =============
[12:05:03] [PASSED] drm_test_check_connector_changed_modeset
[12:05:03] ============== [PASSED] drm_validate_modeset ===============
[12:05:03] ====== drm_test_bridge_get_current_state (1 subtest) =======
[12:05:03] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:05:03] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:05:03] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:05:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:05:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:05:03] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[12:05:03] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:05:03] ============== drm_bridge_alloc (2 subtests) ===============
[12:05:03] [PASSED] drm_test_drm_bridge_alloc_basic
[12:05:03] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:05:03] ================ [PASSED] drm_bridge_alloc =================
[12:05:03] ============= drm_bridge_bus_fmt (5 subtests) ==============
[12:05:03] [PASSED] drm_test_bridge_rgb_yuv_rgb
[12:05:03] [PASSED] drm_test_bridge_must_convert_to_yuv444
[12:05:03] [PASSED] drm_test_bridge_hdmi_auto_rgb
[12:05:03] [PASSED] drm_test_bridge_auto_first
[12:05:03] [PASSED] drm_test_bridge_rgb_yuv_no_path
[12:05:03] =============== [PASSED] drm_bridge_bus_fmt ================
[12:05:03] ============= drm_cmdline_parser (40 subtests) =============
[12:05:03] [PASSED] drm_test_cmdline_force_d_only
[12:05:03] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:05:03] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:05:03] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:05:03] [PASSED] drm_test_cmdline_force_e_only
[12:05:03] [PASSED] drm_test_cmdline_res
[12:05:03] [PASSED] drm_test_cmdline_res_vesa
[12:05:03] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:05:03] [PASSED] drm_test_cmdline_res_rblank
[12:05:03] [PASSED] drm_test_cmdline_res_bpp
[12:05:03] [PASSED] drm_test_cmdline_res_refresh
[12:05:03] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:05:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:05:03] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:05:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:05:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:05:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:05:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:05:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:05:03] [PASSED] drm_test_cmdline_res_margins_force_on
[12:05:03] [PASSED] drm_test_cmdline_res_vesa_margins
[12:05:03] [PASSED] drm_test_cmdline_name
[12:05:03] [PASSED] drm_test_cmdline_name_bpp
[12:05:03] [PASSED] drm_test_cmdline_name_option
[12:05:03] [PASSED] drm_test_cmdline_name_bpp_option
[12:05:03] [PASSED] drm_test_cmdline_rotate_0
[12:05:03] [PASSED] drm_test_cmdline_rotate_90
[12:05:03] [PASSED] drm_test_cmdline_rotate_180
[12:05:03] [PASSED] drm_test_cmdline_rotate_270
[12:05:03] [PASSED] drm_test_cmdline_hmirror
[12:05:03] [PASSED] drm_test_cmdline_vmirror
[12:05:03] [PASSED] drm_test_cmdline_margin_options
[12:05:03] [PASSED] drm_test_cmdline_multiple_options
[12:05:03] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:05:03] [PASSED] drm_test_cmdline_extra_and_option
[12:05:03] [PASSED] drm_test_cmdline_freestanding_options
[12:05:03] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:05:03] [PASSED] drm_test_cmdline_panel_orientation
[12:05:03] ================ drm_test_cmdline_invalid =================
[12:05:03] [PASSED] margin_only
[12:05:03] [PASSED] interlace_only
[12:05:03] [PASSED] res_missing_x
[12:05:03] [PASSED] res_missing_y
[12:05:03] [PASSED] res_bad_y
[12:05:03] [PASSED] res_missing_y_bpp
[12:05:03] [PASSED] res_bad_bpp
[12:05:03] [PASSED] res_bad_refresh
[12:05:03] [PASSED] res_bpp_refresh_force_on_off
[12:05:03] [PASSED] res_invalid_mode
[12:05:03] [PASSED] res_bpp_wrong_place_mode
[12:05:03] [PASSED] name_bpp_refresh
[12:05:03] [PASSED] name_refresh
[12:05:03] [PASSED] name_refresh_wrong_mode
[12:05:03] [PASSED] name_refresh_invalid_mode
[12:05:03] [PASSED] rotate_multiple
[12:05:03] [PASSED] rotate_invalid_val
[12:05:03] [PASSED] rotate_truncated
[12:05:03] [PASSED] invalid_option
[12:05:03] [PASSED] invalid_tv_option
[12:05:03] [PASSED] truncated_tv_option
[12:05:03] ============ [PASSED] drm_test_cmdline_invalid =============
[12:05:03] =============== drm_test_cmdline_tv_options ===============
[12:05:03] [PASSED] NTSC
[12:05:03] [PASSED] NTSC_443
[12:05:03] [PASSED] NTSC_J
[12:05:03] [PASSED] PAL
[12:05:03] [PASSED] PAL_M
[12:05:03] [PASSED] PAL_N
[12:05:03] [PASSED] SECAM
[12:05:03] [PASSED] MONO_525
[12:05:03] [PASSED] MONO_625
[12:05:03] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:05:03] =============== [PASSED] drm_cmdline_parser ================
[12:05:03] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:05:03] [PASSED] drm_test_connector_hdmi_init_valid
[12:05:03] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:05:03] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:05:03] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:05:03] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:05:03] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:05:03] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:05:03] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:05:03] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:05:03] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:05:03] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:05:03] [PASSED] supported_formats=0x5 yuv420_allowed=1
[12:05:03] [PASSED] supported_formats=0x5 yuv420_allowed=0
[12:05:03] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:05:03] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:05:03] [PASSED] drm_test_connector_hdmi_init_null_product
[12:05:03] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:05:03] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:05:03] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:05:03] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:05:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:05:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:05:03] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:05:03] ========= drm_test_connector_hdmi_init_type_valid =========
[12:05:03] [PASSED] HDMI-A
[12:05:03] [PASSED] HDMI-B
[12:05:03] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:05:03] ======== drm_test_connector_hdmi_init_type_invalid ========
[12:05:03] [PASSED] Unknown
[12:05:03] [PASSED] VGA
[12:05:03] [PASSED] DVI-I
[12:05:03] [PASSED] DVI-D
[12:05:03] [PASSED] DVI-A
[12:05:03] [PASSED] Composite
[12:05:03] [PASSED] SVIDEO
[12:05:03] [PASSED] LVDS
[12:05:03] [PASSED] Component
[12:05:03] [PASSED] DIN
[12:05:03] [PASSED] DP
[12:05:03] [PASSED] TV
[12:05:03] [PASSED] eDP
[12:05:03] [PASSED] Virtual
[12:05:03] [PASSED] DSI
[12:05:03] [PASSED] DPI
[12:05:03] [PASSED] Writeback
[12:05:03] [PASSED] SPI
[12:05:03] [PASSED] USB
[12:05:03] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:05:03] ============ [PASSED] drmm_connector_hdmi_init =============
[12:05:03] ============= drmm_connector_init (3 subtests) =============
[12:05:03] [PASSED] drm_test_drmm_connector_init
[12:05:03] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:05:03] ========= drm_test_drmm_connector_init_type_valid =========
[12:05:03] [PASSED] Unknown
[12:05:03] [PASSED] VGA
[12:05:03] [PASSED] DVI-I
[12:05:03] [PASSED] DVI-D
[12:05:03] [PASSED] DVI-A
[12:05:03] [PASSED] Composite
[12:05:03] [PASSED] SVIDEO
[12:05:03] [PASSED] LVDS
[12:05:03] [PASSED] Component
[12:05:03] [PASSED] DIN
[12:05:03] [PASSED] DP
[12:05:03] [PASSED] HDMI-A
[12:05:03] [PASSED] HDMI-B
[12:05:03] [PASSED] TV
[12:05:03] [PASSED] eDP
[12:05:03] [PASSED] Virtual
[12:05:03] [PASSED] DSI
[12:05:03] [PASSED] DPI
[12:05:03] [PASSED] Writeback
[12:05:03] [PASSED] SPI
[12:05:03] [PASSED] USB
[12:05:03] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:05:03] =============== [PASSED] drmm_connector_init ===============
[12:05:03] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_init
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:05:03] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[12:05:03] [PASSED] Unknown
[12:05:03] [PASSED] VGA
[12:05:03] [PASSED] DVI-I
[12:05:03] [PASSED] DVI-D
[12:05:03] [PASSED] DVI-A
[12:05:03] [PASSED] Composite
[12:05:03] [PASSED] SVIDEO
[12:05:03] [PASSED] LVDS
[12:05:03] [PASSED] Component
[12:05:03] [PASSED] DIN
[12:05:03] [PASSED] DP
[12:05:03] [PASSED] HDMI-A
[12:05:03] [PASSED] HDMI-B
[12:05:03] [PASSED] TV
[12:05:03] [PASSED] eDP
[12:05:03] [PASSED] Virtual
[12:05:03] [PASSED] DSI
[12:05:03] [PASSED] DPI
[12:05:03] [PASSED] Writeback
[12:05:03] [PASSED] SPI
[12:05:03] [PASSED] USB
[12:05:03] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:05:03] ======== drm_test_drm_connector_dynamic_init_name =========
[12:05:03] [PASSED] Unknown
[12:05:03] [PASSED] VGA
[12:05:03] [PASSED] DVI-I
[12:05:03] [PASSED] DVI-D
[12:05:03] [PASSED] DVI-A
[12:05:03] [PASSED] Composite
[12:05:03] [PASSED] SVIDEO
[12:05:03] [PASSED] LVDS
[12:05:03] [PASSED] Component
[12:05:03] [PASSED] DIN
[12:05:03] [PASSED] DP
[12:05:03] [PASSED] HDMI-A
[12:05:03] [PASSED] HDMI-B
[12:05:03] [PASSED] TV
[12:05:03] [PASSED] eDP
[12:05:03] [PASSED] Virtual
[12:05:03] [PASSED] DSI
[12:05:03] [PASSED] DPI
[12:05:03] [PASSED] Writeback
[12:05:03] [PASSED] SPI
[12:05:03] [PASSED] USB
[12:05:03] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:05:03] =========== [PASSED] drm_connector_dynamic_init ============
[12:05:03] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:05:03] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:05:03] ======= drm_connector_dynamic_register (7 subtests) ========
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:05:03] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:05:03] ========= [PASSED] drm_connector_dynamic_register ==========
[12:05:03] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:05:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:05:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:05:03] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:05:03] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:05:03] ========== drm_test_get_tv_mode_from_name_valid ===========
[12:05:03] [PASSED] NTSC
[12:05:03] [PASSED] NTSC-443
[12:05:03] [PASSED] NTSC-J
[12:05:03] [PASSED] PAL
[12:05:03] [PASSED] PAL-M
[12:05:03] [PASSED] PAL-N
[12:05:03] [PASSED] SECAM
[12:05:03] [PASSED] Mono
[12:05:03] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:05:03] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:05:03] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:05:03] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:05:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:05:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:05:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:05:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:05:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:05:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:05:03] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[12:05:03] [PASSED] VIC 96
[12:05:03] [PASSED] VIC 97
[12:05:03] [PASSED] VIC 101
[12:05:03] [PASSED] VIC 102
[12:05:03] [PASSED] VIC 106
[12:05:03] [PASSED] VIC 107
[12:05:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:05:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:05:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:05:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:05:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:05:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:05:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:05:03] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:05:03] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[12:05:03] [PASSED] Automatic
[12:05:03] [PASSED] Full
[12:05:03] [PASSED] Limited 16:235
[12:05:03] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:05:03] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:05:03] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:05:03] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:05:03] === drm_test_drm_hdmi_connector_get_output_format_name ====
[12:05:03] [PASSED] RGB
[12:05:03] [PASSED] YUV 4:2:0
[12:05:03] [PASSED] YUV 4:2:2
[12:05:03] [PASSED] YUV 4:4:4
[12:05:03] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:05:03] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:05:03] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:05:03] ============= drm_damage_helper (21 subtests) ==============
[12:05:03] [PASSED] drm_test_damage_iter_no_damage
[12:05:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:05:03] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:05:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:05:03] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:05:03] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:05:03] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:05:03] [PASSED] drm_test_damage_iter_simple_damage
[12:05:03] [PASSED] drm_test_damage_iter_single_damage
[12:05:03] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:05:03] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:05:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:05:03] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:05:03] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:05:03] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:05:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:05:03] [PASSED] drm_test_damage_iter_damage
[12:05:03] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:05:03] [PASSED] drm_test_damage_iter_damage_one_outside
[12:05:03] [PASSED] drm_test_damage_iter_damage_src_moved
[12:05:03] [PASSED] drm_test_damage_iter_damage_not_visible
[12:05:03] ================ [PASSED] drm_damage_helper ================
[12:05:03] ============== drm_dp_mst_helper (3 subtests) ==============
[12:05:03] ============== drm_test_dp_mst_calc_pbn_mode ==============
[12:05:03] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:05:03] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:05:03] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:05:03] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:05:03] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:05:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:05:03] ============== drm_test_dp_mst_calc_pbn_div ===============
[12:05:03] [PASSED] Link rate 2000000 lane count 4
[12:05:03] [PASSED] Link rate 2000000 lane count 2
[12:05:03] [PASSED] Link rate 2000000 lane count 1
[12:05:03] [PASSED] Link rate 1350000 lane count 4
[12:05:03] [PASSED] Link rate 1350000 lane count 2
[12:05:03] [PASSED] Link rate 1350000 lane count 1
[12:05:03] [PASSED] Link rate 1000000 lane count 4
[12:05:03] [PASSED] Link rate 1000000 lane count 2
[12:05:03] [PASSED] Link rate 1000000 lane count 1
[12:05:03] [PASSED] Link rate 810000 lane count 4
[12:05:03] [PASSED] Link rate 810000 lane count 2
[12:05:03] [PASSED] Link rate 810000 lane count 1
[12:05:03] [PASSED] Link rate 540000 lane count 4
[12:05:03] [PASSED] Link rate 540000 lane count 2
[12:05:03] [PASSED] Link rate 540000 lane count 1
[12:05:03] [PASSED] Link rate 270000 lane count 4
[12:05:03] [PASSED] Link rate 270000 lane count 2
[12:05:03] [PASSED] Link rate 270000 lane count 1
[12:05:03] [PASSED] Link rate 162000 lane count 4
[12:05:03] [PASSED] Link rate 162000 lane count 2
[12:05:03] [PASSED] Link rate 162000 lane count 1
[12:05:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:05:03] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[12:05:03] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:05:03] [PASSED] DP_POWER_UP_PHY with port number
[12:05:03] [PASSED] DP_POWER_DOWN_PHY with port number
[12:05:03] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:05:03] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:05:03] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:05:03] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:05:03] [PASSED] DP_QUERY_PAYLOAD with port number
[12:05:03] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:05:03] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:05:03] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:05:03] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:05:03] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:05:03] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:05:03] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:05:03] [PASSED] DP_REMOTE_I2C_READ with port number
[12:05:03] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:05:03] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:05:03] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:05:03] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:05:03] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:05:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:05:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:05:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:05:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:05:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:05:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:05:03] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:05:03] ================ [PASSED] drm_dp_mst_helper ================
[12:05:03] ================== drm_exec (7 subtests) ===================
[12:05:03] [PASSED] sanitycheck
[12:05:03] [PASSED] test_lock
[12:05:03] [PASSED] test_lock_unlock
[12:05:03] [PASSED] test_duplicates
[12:05:03] [PASSED] test_prepare
[12:05:03] [PASSED] test_prepare_array
[12:05:03] [PASSED] test_multiple_loops
[12:05:03] ==================== [PASSED] drm_exec =====================
[12:05:03] =========== drm_format_helper_test (17 subtests) ===========
[12:05:03] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:05:03] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:05:03] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:05:03] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:05:03] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:05:03] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:05:03] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:05:03] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:05:03] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:05:03] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:05:03] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:05:03] ============== drm_test_fb_xrgb8888_to_mono ===============
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:05:03] ==================== drm_test_fb_swab =====================
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ================ [PASSED] drm_test_fb_swab =================
[12:05:03] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:05:03] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[12:05:03] [PASSED] single_pixel_source_buffer
[12:05:03] [PASSED] single_pixel_clip_rectangle
[12:05:03] [PASSED] well_known_colors
[12:05:03] [PASSED] destination_pitch
[12:05:03] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:05:03] ================= drm_test_fb_clip_offset =================
[12:05:03] [PASSED] pass through
[12:05:03] [PASSED] horizontal offset
[12:05:03] [PASSED] vertical offset
[12:05:03] [PASSED] horizontal and vertical offset
[12:05:03] [PASSED] horizontal offset (custom pitch)
[12:05:04] [PASSED] vertical offset (custom pitch)
[12:05:04] [PASSED] horizontal and vertical offset (custom pitch)
[12:05:04] ============= [PASSED] drm_test_fb_clip_offset =============
[12:05:04] =================== drm_test_fb_memcpy ====================
[12:05:04] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:05:04] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:05:04] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:05:04] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:05:04] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:05:04] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:05:04] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:05:04] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:05:04] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:05:04] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:05:04] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:05:04] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:05:04] =============== [PASSED] drm_test_fb_memcpy ================
[12:05:04] ============= [PASSED] drm_format_helper_test ==============
[12:05:04] ================= drm_format (18 subtests) =================
[12:05:04] [PASSED] drm_test_format_block_width_invalid
[12:05:04] [PASSED] drm_test_format_block_width_one_plane
[12:05:04] [PASSED] drm_test_format_block_width_two_plane
[12:05:04] [PASSED] drm_test_format_block_width_three_plane
[12:05:04] [PASSED] drm_test_format_block_width_tiled
[12:05:04] [PASSED] drm_test_format_block_height_invalid
[12:05:04] [PASSED] drm_test_format_block_height_one_plane
[12:05:04] [PASSED] drm_test_format_block_height_two_plane
[12:05:04] [PASSED] drm_test_format_block_height_three_plane
[12:05:04] [PASSED] drm_test_format_block_height_tiled
[12:05:04] [PASSED] drm_test_format_min_pitch_invalid
[12:05:04] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:05:04] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:05:04] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:05:04] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:05:04] [PASSED] drm_test_format_min_pitch_two_plane
[12:05:04] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:05:04] [PASSED] drm_test_format_min_pitch_tiled
[12:05:04] =================== [PASSED] drm_format ====================
[12:05:04] ============== drm_framebuffer (10 subtests) ===============
[12:05:04] ========== drm_test_framebuffer_check_src_coords ==========
[12:05:04] [PASSED] Success: source fits into fb
[12:05:04] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:05:04] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:05:04] [PASSED] Fail: overflowing fb with source width
[12:05:04] [PASSED] Fail: overflowing fb with source height
[12:05:04] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:05:04] [PASSED] drm_test_framebuffer_cleanup
[12:05:04] =============== drm_test_framebuffer_create ===============
[12:05:04] [PASSED] ABGR8888 normal sizes
[12:05:04] [PASSED] ABGR8888 max sizes
[12:05:04] [PASSED] ABGR8888 pitch greater than min required
[12:05:04] [PASSED] ABGR8888 pitch less than min required
[12:05:04] [PASSED] ABGR8888 Invalid width
[12:05:04] [PASSED] ABGR8888 Invalid buffer handle
[12:05:04] [PASSED] No pixel format
[12:05:04] [PASSED] ABGR8888 Width 0
[12:05:04] [PASSED] ABGR8888 Height 0
[12:05:04] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:05:04] [PASSED] ABGR8888 Large buffer offset
[12:05:04] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:05:04] [PASSED] ABGR8888 Invalid flag
[12:05:04] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:05:04] [PASSED] ABGR8888 Valid buffer modifier
[12:05:04] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:05:04] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:05:04] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:05:04] [PASSED] NV12 Normal sizes
[12:05:04] [PASSED] NV12 Max sizes
[12:05:04] [PASSED] NV12 Invalid pitch
[12:05:04] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:05:04] [PASSED] NV12 different modifier per-plane
[12:05:04] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:05:04] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:05:04] [PASSED] NV12 Modifier for inexistent plane
[12:05:04] [PASSED] NV12 Handle for inexistent plane
[12:05:04] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:05:04] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:05:04] [PASSED] YVU420 Normal sizes
[12:05:04] [PASSED] YVU420 Max sizes
[12:05:04] [PASSED] YVU420 Invalid pitch
[12:05:04] [PASSED] YVU420 Different pitches
[12:05:04] [PASSED] YVU420 Different buffer offsets/pitches
[12:05:04] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:05:04] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:05:04] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:05:04] [PASSED] YVU420 Valid modifier
[12:05:04] [PASSED] YVU420 Different modifiers per plane
[12:05:04] [PASSED] YVU420 Modifier for inexistent plane
[12:05:04] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:05:04] [PASSED] X0L2 Normal sizes
[12:05:04] [PASSED] X0L2 Max sizes
[12:05:04] [PASSED] X0L2 Invalid pitch
[12:05:04] [PASSED] X0L2 Pitch greater than minimum required
[12:05:04] [PASSED] X0L2 Handle for inexistent plane
[12:05:04] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:05:04] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:05:04] [PASSED] X0L2 Valid modifier
[12:05:04] [PASSED] X0L2 Modifier for inexistent plane
[12:05:04] =========== [PASSED] drm_test_framebuffer_create ===========
[12:05:04] [PASSED] drm_test_framebuffer_free
[12:05:04] [PASSED] drm_test_framebuffer_init
[12:05:04] [PASSED] drm_test_framebuffer_init_bad_format
[12:05:04] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:05:04] [PASSED] drm_test_framebuffer_lookup
[12:05:04] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:05:04] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:05:04] ================= [PASSED] drm_framebuffer =================
[12:05:04] ================ drm_gem_shmem (8 subtests) ================
[12:05:04] [PASSED] drm_gem_shmem_test_obj_create
[12:05:04] [PASSED] drm_gem_shmem_test_obj_create_private
[12:05:04] [PASSED] drm_gem_shmem_test_pin_pages
[12:05:04] [PASSED] drm_gem_shmem_test_vmap
[12:05:04] [PASSED] drm_gem_shmem_test_get_sg_table
[12:05:04] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:05:04] [PASSED] drm_gem_shmem_test_madvise
[12:05:04] [PASSED] drm_gem_shmem_test_purge
[12:05:04] ================== [PASSED] drm_gem_shmem ==================
[12:05:04] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[12:05:04] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:05:04] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:05:04] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:05:04] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:05:04] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:05:04] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:05:04] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[12:05:04] [PASSED] Automatic
[12:05:04] [PASSED] Full
[12:05:04] [PASSED] Limited 16:235
[12:05:04] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:05:04] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:05:04] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:05:04] [PASSED] drm_test_check_disable_connector
[12:05:04] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:05:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:05:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:05:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:05:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:05:04] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:05:04] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:05:04] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:05:04] [PASSED] drm_test_check_output_bpc_dvi
[12:05:04] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:05:04] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:05:04] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:05:04] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:05:04] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:05:04] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:05:04] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:05:04] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:05:04] ============ drm_test_check_hdmi_color_format =============
[12:05:04] [PASSED] AUTO -> RGB
[12:05:04] [PASSED] YCBCR422 -> YUV422
[12:05:04] [PASSED] YCBCR420 -> YUV420
[12:05:04] [PASSED] YCBCR444 -> YUV444
[12:05:04] [PASSED] RGB -> RGB
[12:05:04] ======== [PASSED] drm_test_check_hdmi_color_format =========
[12:05:04] ======== drm_test_check_hdmi_color_format_420_only ========
[12:05:04] [PASSED] RGB should fail
[12:05:04] [PASSED] YUV444 should fail
[12:05:04] [PASSED] YUV422 should fail
[12:05:04] [PASSED] YUV420 should work
[12:05:04] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[12:05:04] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:05:04] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:05:04] [PASSED] drm_test_check_broadcast_rgb_value
[12:05:04] [PASSED] drm_test_check_bpc_8_value
[12:05:04] [PASSED] drm_test_check_bpc_10_value
[12:05:04] [PASSED] drm_test_check_bpc_12_value
[12:05:04] [PASSED] drm_test_check_format_value
[12:05:04] [PASSED] drm_test_check_tmds_char_value
[12:05:04] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:05:04] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[12:05:04] [PASSED] drm_test_check_mode_valid
[12:05:04] [PASSED] drm_test_check_mode_valid_reject
[12:05:04] [PASSED] drm_test_check_mode_valid_reject_rate
[12:05:04] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:05:04] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[12:05:04] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[12:05:04] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[12:05:04] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:05:04] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[12:05:04] [PASSED] drm_test_check_infoframes
[12:05:04] [PASSED] drm_test_check_reject_avi_infoframe
[12:05:04] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[12:05:04] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[12:05:04] [PASSED] drm_test_check_reject_audio_infoframe
[12:05:04] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[12:05:04] ================= drm_managed (2 subtests) =================
[12:05:04] [PASSED] drm_test_managed_release_action
[12:05:04] [PASSED] drm_test_managed_run_action
[12:05:04] =================== [PASSED] drm_managed ===================
[12:05:04] =================== drm_mm (6 subtests) ====================
[12:05:04] [PASSED] drm_test_mm_init
[12:05:04] [PASSED] drm_test_mm_debug
[12:05:04] [PASSED] drm_test_mm_align32
[12:05:04] [PASSED] drm_test_mm_align64
[12:05:04] [PASSED] drm_test_mm_lowest
[12:05:04] [PASSED] drm_test_mm_highest
[12:05:04] ===================== [PASSED] drm_mm ======================
[12:05:04] ============= drm_modes_analog_tv (5 subtests) =============
[12:05:04] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:05:04] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:05:04] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:05:04] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:05:04] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:05:04] =============== [PASSED] drm_modes_analog_tv ===============
[12:05:04] ============== drm_panic_helper (3 subtests) ===============
[12:05:04] ============= drm_test_panic_screen_user_map ==============
[12:05:04] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:05:04] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:05:04] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:05:04] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:05:04] ========= [PASSED] drm_test_panic_screen_user_map ==========
[12:05:04] ============= drm_test_panic_screen_user_page =============
[12:05:04] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:05:04] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:05:04] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:05:04] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:05:04] ========= [PASSED] drm_test_panic_screen_user_page =========
[12:05:04] ========== drm_test_panic_screen_user_set_pixel ===========
[12:05:04] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:05:04] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:05:04] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:05:04] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:05:04] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:05:04] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[12:05:04] ================ [PASSED] drm_panic_helper =================
[12:05:04] ============== drm_plane_helper (2 subtests) ===============
[12:05:04] =============== drm_test_check_plane_state ================
[12:05:04] [PASSED] clipping_simple
[12:05:04] [PASSED] clipping_rotate_reflect
[12:05:04] [PASSED] positioning_simple
[12:05:04] [PASSED] upscaling
[12:05:04] [PASSED] downscaling
[12:05:04] [PASSED] rounding1
[12:05:04] [PASSED] rounding2
[12:05:04] [PASSED] rounding3
[12:05:04] [PASSED] rounding4
[12:05:04] =========== [PASSED] drm_test_check_plane_state ============
[12:05:04] =========== drm_test_check_invalid_plane_state ============
[12:05:04] [PASSED] positioning_invalid
[12:05:04] [PASSED] upscaling_invalid
[12:05:04] [PASSED] downscaling_invalid
[12:05:04] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:05:04] ================ [PASSED] drm_plane_helper =================
[12:05:04] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:05:04] ====== drm_test_connector_helper_tv_get_modes_check =======
[12:05:04] [PASSED] None
[12:05:04] [PASSED] PAL
[12:05:04] [PASSED] NTSC
[12:05:04] [PASSED] Both, NTSC Default
[12:05:04] [PASSED] Both, PAL Default
[12:05:04] [PASSED] Both, NTSC Default, with PAL on command-line
[12:05:04] [PASSED] Both, PAL Default, with NTSC on command-line
[12:05:04] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:05:04] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:05:04] ================== drm_rect (9 subtests) ===================
[12:05:04] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:05:04] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:05:04] [PASSED] drm_test_rect_clip_scaled_clipped
[12:05:04] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:05:04] ================= drm_test_rect_intersect =================
[12:05:04] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:05:04] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:05:04] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:05:04] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:05:04] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:05:04] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:05:04] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:05:04] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:05:04] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:05:04] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:05:04] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:05:04] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:05:04] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:05:04] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:05:04] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:05:04] ============= [PASSED] drm_test_rect_intersect =============
[12:05:04] ================ drm_test_rect_calc_hscale ================
[12:05:04] [PASSED] normal use
[12:05:04] [PASSED] out of max range
[12:05:04] [PASSED] out of min range
[12:05:04] [PASSED] zero dst
[12:05:04] [PASSED] negative src
[12:05:04] [PASSED] negative dst
[12:05:04] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:05:04] ================ drm_test_rect_calc_vscale ================
[12:05:04] [PASSED] normal use
[12:05:04] [PASSED] out of max range
[12:05:04] [PASSED] out of min range
[12:05:04] [PASSED] zero dst
[12:05:04] [PASSED] negative src
[12:05:04] [PASSED] negative dst
[12:05:04] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:05:04] ================== drm_test_rect_rotate ===================
[12:05:04] [PASSED] reflect-x
[12:05:04] [PASSED] reflect-y
[12:05:04] [PASSED] rotate-0
[12:05:04] [PASSED] rotate-90
[12:05:04] [PASSED] rotate-180
[12:05:04] [PASSED] rotate-270
[12:05:04] ============== [PASSED] drm_test_rect_rotate ===============
[12:05:04] ================ drm_test_rect_rotate_inv =================
[12:05:04] [PASSED] reflect-x
[12:05:04] [PASSED] reflect-y
[12:05:04] [PASSED] rotate-0
[12:05:04] [PASSED] rotate-90
[12:05:04] [PASSED] rotate-180
[12:05:04] [PASSED] rotate-270
[12:05:04] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:05:04] ==================== [PASSED] drm_rect =====================
[12:05:04] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:05:04] ============ drm_test_sysfb_build_fourcc_list =============
[12:05:04] [PASSED] no native formats
[12:05:04] [PASSED] XRGB8888 as native format
[12:05:04] [PASSED] remove duplicates
[12:05:04] [PASSED] convert alpha formats
[12:05:04] [PASSED] random formats
[12:05:04] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:05:04] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:05:04] ================== drm_fixp (2 subtests) ===================
[12:05:04] [PASSED] drm_test_int2fixp
[12:05:04] [PASSED] drm_test_sm2fixp
[12:05:04] ==================== [PASSED] drm_fixp =====================
[12:05:04] ============================================================
[12:05:04] Testing complete. Ran 667 tests: passed: 667
[12:05:04] Elapsed time: 28.977s total, 2.576s configuring, 25.934s building, 0.416s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:05:04] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:05:07] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:05:17] Starting KUnit Kernel (1/1)...
[12:05:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:05:17] ================= ttm_device (5 subtests) ==================
[12:05:17] [PASSED] ttm_device_init_basic
[12:05:17] [PASSED] ttm_device_init_multiple
[12:05:17] [PASSED] ttm_device_fini_basic
[12:05:17] [PASSED] ttm_device_init_no_vma_man
[12:05:17] ================== ttm_device_init_pools ==================
[12:05:17] [PASSED] No DMA allocations, no DMA32 required
[12:05:17] [PASSED] DMA allocations, DMA32 required
[12:05:17] [PASSED] No DMA allocations, DMA32 required
[12:05:17] [PASSED] DMA allocations, no DMA32 required
[12:05:17] ============== [PASSED] ttm_device_init_pools ==============
[12:05:17] =================== [PASSED] ttm_device ====================
[12:05:17] ================== ttm_pool (8 subtests) ===================
[12:05:17] ================== ttm_pool_alloc_basic ===================
[12:05:17] [PASSED] One page
[12:05:17] [PASSED] More than one page
[12:05:17] [PASSED] Above the allocation limit
[12:05:17] [PASSED] One page, with coherent DMA mappings enabled
[12:05:17] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:05:17] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:05:17] ============== ttm_pool_alloc_basic_dma_addr ==============
[12:05:17] [PASSED] One page
[12:05:17] [PASSED] More than one page
[12:05:17] [PASSED] Above the allocation limit
[12:05:17] [PASSED] One page, with coherent DMA mappings enabled
[12:05:17] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:05:17] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:05:17] [PASSED] ttm_pool_alloc_order_caching_match
[12:05:17] [PASSED] ttm_pool_alloc_caching_mismatch
[12:05:17] [PASSED] ttm_pool_alloc_order_mismatch
[12:05:17] [PASSED] ttm_pool_free_dma_alloc
[12:05:17] [PASSED] ttm_pool_free_no_dma_alloc
[12:05:17] [PASSED] ttm_pool_fini_basic
[12:05:17] ==================== [PASSED] ttm_pool =====================
[12:05:17] ================ ttm_resource (8 subtests) =================
[12:05:17] ================= ttm_resource_init_basic =================
[12:05:17] [PASSED] Init resource in TTM_PL_SYSTEM
[12:05:17] [PASSED] Init resource in TTM_PL_VRAM
[12:05:17] [PASSED] Init resource in a private placement
[12:05:17] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:05:17] ============= [PASSED] ttm_resource_init_basic =============
[12:05:17] [PASSED] ttm_resource_init_pinned
[12:05:17] [PASSED] ttm_resource_fini_basic
[12:05:17] [PASSED] ttm_resource_manager_init_basic
[12:05:17] [PASSED] ttm_resource_manager_usage_basic
[12:05:17] [PASSED] ttm_resource_manager_set_used_basic
[12:05:17] [PASSED] ttm_sys_man_alloc_basic
[12:05:17] [PASSED] ttm_sys_man_free_basic
[12:05:17] ================== [PASSED] ttm_resource ===================
[12:05:17] =================== ttm_tt (15 subtests) ===================
[12:05:17] ==================== ttm_tt_init_basic ====================
[12:05:17] [PASSED] Page-aligned size
[12:05:17] [PASSED] Extra pages requested
[12:05:17] ================ [PASSED] ttm_tt_init_basic ================
[12:05:17] [PASSED] ttm_tt_init_misaligned
[12:05:17] [PASSED] ttm_tt_fini_basic
[12:05:17] [PASSED] ttm_tt_fini_sg
[12:05:17] [PASSED] ttm_tt_fini_shmem
[12:05:17] [PASSED] ttm_tt_create_basic
[12:05:17] [PASSED] ttm_tt_create_invalid_bo_type
[12:05:17] [PASSED] ttm_tt_create_ttm_exists
[12:05:17] [PASSED] ttm_tt_create_failed
[12:05:17] [PASSED] ttm_tt_destroy_basic
[12:05:17] [PASSED] ttm_tt_populate_null_ttm
[12:05:17] [PASSED] ttm_tt_populate_populated_ttm
[12:05:17] [PASSED] ttm_tt_unpopulate_basic
[12:05:17] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:05:17] [PASSED] ttm_tt_swapin_basic
[12:05:17] ===================== [PASSED] ttm_tt ======================
[12:05:17] =================== ttm_bo (14 subtests) ===================
[12:05:17] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[12:05:17] [PASSED] Cannot be interrupted and sleeps
[12:05:17] [PASSED] Cannot be interrupted, locks straight away
[12:05:17] [PASSED] Can be interrupted, sleeps
[12:05:17] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:05:17] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:05:17] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:05:17] [PASSED] ttm_bo_reserve_double_resv
[12:05:17] [PASSED] ttm_bo_reserve_interrupted
[12:05:17] [PASSED] ttm_bo_reserve_deadlock
[12:05:17] [PASSED] ttm_bo_unreserve_basic
[12:05:17] [PASSED] ttm_bo_unreserve_pinned
[12:05:17] [PASSED] ttm_bo_unreserve_bulk
[12:05:17] [PASSED] ttm_bo_fini_basic
[12:05:17] [PASSED] ttm_bo_fini_shared_resv
[12:05:17] [PASSED] ttm_bo_pin_basic
[12:05:17] [PASSED] ttm_bo_pin_unpin_resource
[12:05:17] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:05:17] ===================== [PASSED] ttm_bo ======================
[12:05:17] ============== ttm_bo_validate (22 subtests) ===============
[12:05:17] ============== ttm_bo_init_reserved_sys_man ===============
[12:05:17] [PASSED] Buffer object for userspace
[12:05:17] [PASSED] Kernel buffer object
[12:05:17] [PASSED] Shared buffer object
[12:05:17] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:05:17] ============== ttm_bo_init_reserved_mock_man ==============
[12:05:17] [PASSED] Buffer object for userspace
[12:05:17] [PASSED] Kernel buffer object
[12:05:17] [PASSED] Shared buffer object
[12:05:17] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:05:17] [PASSED] ttm_bo_init_reserved_resv
[12:05:17] ================== ttm_bo_validate_basic ==================
[12:05:17] [PASSED] Buffer object for userspace
[12:05:17] [PASSED] Kernel buffer object
[12:05:17] [PASSED] Shared buffer object
[12:05:17] ============== [PASSED] ttm_bo_validate_basic ==============
[12:05:17] [PASSED] ttm_bo_validate_invalid_placement
[12:05:17] ============= ttm_bo_validate_same_placement ==============
[12:05:17] [PASSED] System manager
[12:05:17] [PASSED] VRAM manager
[12:05:17] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:05:17] [PASSED] ttm_bo_validate_failed_alloc
[12:05:17] [PASSED] ttm_bo_validate_pinned
[12:05:17] [PASSED] ttm_bo_validate_busy_placement
[12:05:17] ================ ttm_bo_validate_multihop =================
[12:05:17] [PASSED] Buffer object for userspace
[12:05:17] [PASSED] Kernel buffer object
[12:05:17] [PASSED] Shared buffer object
[12:05:17] ============ [PASSED] ttm_bo_validate_multihop =============
[12:05:17] ========== ttm_bo_validate_no_placement_signaled ==========
[12:05:17] [PASSED] Buffer object in system domain, no page vector
[12:05:17] [PASSED] Buffer object in system domain with an existing page vector
[12:05:17] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:05:17] ======== ttm_bo_validate_no_placement_not_signaled ========
[12:05:17] [PASSED] Buffer object for userspace
[12:05:17] [PASSED] Kernel buffer object
[12:05:17] [PASSED] Shared buffer object
[12:05:17] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:05:17] [PASSED] ttm_bo_validate_move_fence_signaled
[12:05:17] ========= ttm_bo_validate_move_fence_not_signaled =========
[12:05:17] [PASSED] Waits for GPU
[12:05:17] [PASSED] Tries to lock straight away
[12:05:17] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:05:17] [PASSED] ttm_bo_validate_swapout
[12:05:17] [PASSED] ttm_bo_validate_happy_evict
[12:05:17] [PASSED] ttm_bo_validate_all_pinned_evict
[12:05:17] [PASSED] ttm_bo_validate_allowed_only_evict
[12:05:17] [PASSED] ttm_bo_validate_deleted_evict
[12:05:17] [PASSED] ttm_bo_validate_busy_domain_evict
[12:05:17] [PASSED] ttm_bo_validate_evict_gutting
[12:05:17] [PASSED] ttm_bo_validate_recrusive_evict
[12:05:17] ================= [PASSED] ttm_bo_validate =================
[12:05:17] ============================================================
[12:05:17] Testing complete. Ran 102 tests: passed: 102
[12:05:17] Elapsed time: 13.049s total, 2.514s configuring, 10.270s building, 0.215s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[12:05:17] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:05:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:05:29] Starting KUnit Kernel (1/1)...
[12:05:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:05:29] =============== dma-buf-fence (12 subtests) ================
[12:05:29] [PASSED] test_sanitycheck
[12:05:29] [PASSED] test_signaling
[12:05:29] [PASSED] test_add_callback
[12:05:29] [PASSED] test_late_add_callback
[12:05:29] [PASSED] test_rm_callback
[12:05:29] [PASSED] test_late_rm_callback
[12:05:29] [PASSED] test_status
[12:05:29] [PASSED] test_error
[12:05:29] [PASSED] test_wait
[12:05:29] [PASSED] test_wait_timeout
[12:05:29] [PASSED] test_stub
[12:05:29] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[12:05:29] ================== [PASSED] dma-buf-fence ==================
[12:05:29] ============ dma-buf-fence-chain (11 subtests) =============
[12:05:29] [PASSED] test_sanitycheck
[12:05:29] [PASSED] test_find_seqno
[12:05:29] [PASSED] test_find_signaled
[12:05:29] [PASSED] test_find_out_of_order
[12:05:34] [PASSED] test_find_gap
[12:05:34] [PASSED] test_find_race
[12:05:34] [PASSED] test_signal_forward
[12:05:34] [PASSED] test_signal_backward
[12:05:34] [PASSED] test_wait_forward
[12:05:34] [PASSED] test_wait_backward
[12:05:34] [PASSED] test_wait_random
[12:05:34] =============== [PASSED] dma-buf-fence-chain ===============
[12:05:34] ============ dma-buf-fence-unwrap (11 subtests) ============
[12:05:34] [PASSED] test_sanitycheck
[12:05:34] [PASSED] test_unwrap_array
[12:05:34] [PASSED] test_unwrap_chain
[12:05:34] [PASSED] test_unwrap_chain_array
[12:05:34] [PASSED] test_unwrap_merge
[12:05:34] [PASSED] test_unwrap_merge_duplicate
[12:05:34] [PASSED] test_unwrap_merge_seqno
[12:05:34] [PASSED] test_unwrap_merge_order
[12:05:34] [PASSED] test_unwrap_merge_complex
[12:05:34] [PASSED] test_unwrap_merge_complex_seqno
[12:05:34] [PASSED] test_dedup_empty
[12:05:34] ============== [PASSED] dma-buf-fence-unwrap ===============
[12:05:34] ================ dma-buf-resv (5 subtests) =================
[12:05:34] [PASSED] test_sanitycheck
[12:05:34] ===================== test_signaling ======================
[12:05:34] [PASSED] kernel
[12:05:34] [PASSED] write
[12:05:34] [PASSED] read
[12:05:34] [PASSED] bookkeep
[12:05:34] ================= [PASSED] test_signaling ==================
[12:05:34] ====================== test_for_each ======================
[12:05:34] [PASSED] kernel
[12:05:34] [PASSED] write
[12:05:34] [PASSED] read
[12:05:34] [PASSED] bookkeep
[12:05:34] ================== [PASSED] test_for_each ==================
[12:05:34] ================= test_for_each_unlocked ==================
[12:05:34] [PASSED] kernel
[12:05:34] [PASSED] write
[12:05:34] [PASSED] read
[12:05:34] [PASSED] bookkeep
[12:05:34] ============= [PASSED] test_for_each_unlocked ==============
[12:05:34] ===================== test_get_fences =====================
[12:05:34] [PASSED] kernel
[12:05:34] [PASSED] write
[12:05:34] [PASSED] read
[12:05:34] [PASSED] bookkeep
[12:05:34] ================= [PASSED] test_get_fences =================
[12:05:34] ================== [PASSED] dma-buf-resv ===================
[12:05:34] ============================================================
[12:05:34] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[12:05:34] Elapsed time: 16.763s total, 2.485s configuring, 8.956s building, 5.267s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/4] drm/i915/bios: Parse eDP fast link training params only if enabled
2026-11-10 11:54 ` [PATCH 2/4] drm/i915/bios: Parse eDP fast link training params only if enabled Lee Shawn C
@ 2026-11-10 12:07 ` sashiko-bot
2026-11-10 12:31 ` Ville Syrjälä
1 sibling, 0 replies; 13+ messages in thread
From: sashiko-bot @ 2026-11-10 12:07 UTC (permalink / raw)
To: Lee Shawn C, intel-gfx, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] drm/i915/bios: commit message omits clamping rate to
max_link_rate
--
commit 3610be7f547f32532810e072a6b6707742df692f
Author: Lee Shawn C <shawn.c.lee@intel.com>
drm/i915/bios: Parse eDP fast link training params only if enabled
This commit parses the VBT eDP fast link training enable bit and only
populates the fast link training parameters when that bit is set, while
also normalizing the parsed rate and lane count values.
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 6b2924c56cae3..378f8b60b4a09 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
[ ... ]
> @@ -1526,6 +1532,29 @@ parse_edp_fast_link_params(struct intel_display *display,
> edp_link_params->vswing);
> break;
> }
> +
> + /*
> + * The fast link training rate is limited by the eDP max port link
> + * rate: FLT rate = min(FLT rate, eDP max port link rate).
> + */
> + if (panel->vbt.edp.rate && panel->vbt.edp.max_link_rate)
> + panel->vbt.edp.rate = min(panel->vbt.edp.rate,
> + panel->vbt.edp.max_link_rate);
[Severity: Low]
This isn't a bug, but the commit message does not mention clamping
panel->vbt.edp.rate to panel->vbt.edp.max_link_rate or reordering
parse_edp_fast_link_params() in parse_edp() after max_link_rate is parsed.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261110115432.894616-1-shawn.c.lee@intel.com?part=2
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 3/4] drm/i915/dp: Start eDP link training from VBT fast link train vswing/pre-emphasis levels
2026-11-10 11:54 ` [PATCH 3/4] drm/i915/dp: Start eDP link training from VBT fast link train vswing/pre-emphasis levels Lee Shawn C
@ 2026-11-10 12:14 ` sashiko-bot
0 siblings, 0 replies; 13+ messages in thread
From: sashiko-bot @ 2026-11-10 12:14 UTC (permalink / raw)
To: Lee Shawn C, intel-gfx, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] drm/i915/dp: intel_dp_link_training_clock_recovery() assumes
initial level 0
--
commit 6c36eea023572273fb066c2544c30e572e659dc6
Author: Lee Shawn C <shawn.c.lee@intel.com>
drm/i915/dp: Start eDP link training from VBT fast link train vswing/pre-emphasis levels
This commit initializes intel_dp->train_set from the VBT fast link
training voltage swing and pre-emphasis levels at the start of eDP clock
recovery when link recovery is idle.
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index ac1aff6edf052..3de74eb1d3d4a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
[ ... ]
> @@ -1032,6 +1104,10 @@ intel_dp_reset_link_train(struct intel_dp *intel_dp,
> u8 dp_train_pat)
> {
> memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
> +
> + if (intel_dp_use_vbt_fast_link_levels(intel_dp, crtc_state, dp_phy))
> + intel_dp_init_train_set_from_vbt(intel_dp, crtc_state, dp_phy);
> +
> intel_dp_set_signal_levels(intel_dp, crtc_state, dp_phy);
> return intel_dp_set_link_train(intel_dp, crtc_state, dp_phy, dp_train_pat);
> }
[Severity: Medium]
Does starting intel_dp_reset_link_train() at non-zero VBT levels throw off
the retry and max-vswing tracking in
intel_dp_link_training_clock_recovery()?
drivers/gpu/drm/i915/display/intel_dp_link_training.c:intel_dp_link_training_clock_recovery() {
u8 old_link_status[DP_LINK_STATUS_SIZE] = {};
int voltage_tries, cr_tries, max_cr_tries;
u8 link_status[DP_LINK_STATUS_SIZE];
bool max_vswing_reached = false;
...
if (!intel_dp_reset_link_train(intel_dp, crtc_state, dp_phy,
DP_TRAINING_PATTERN_1 |
DP_LINK_SCRAMBLING_DISABLE)) {
...
voltage_tries = 1;
for (cr_tries = 0; cr_tries < max_cr_tries; ++cr_tries) {
...
if (max_vswing_reached) {
intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
lt_dbg(intel_dp, dp_phy, "Max Voltage Swing reached\n");
return false;
}
...
if (!intel_dp_adjust_request_changed(crtc_state, old_link_status, link_status))
++voltage_tries;
else
voltage_tries = 1;
memcpy(old_link_status, link_status, sizeof(link_status));
if (intel_dp_link_max_vswing_reached(intel_dp, crtc_state))
max_vswing_reached = true;
}
}
old_link_status starts zero-initialized, representing voltage swing 0 and
pre-emphasis 0. When intel_dp_reset_link_train() programs non-zero VBT
levels and the first poll does not lock, intel_dp_adjust_request_changed()
compares the sink's first adjust request against (0, 0) instead of the VBT
levels: if the sink requests the same VBT levels, voltage_tries is reset
to 1 instead of incrementing to 2 (trying those levels 6 times instead of
5), whereas if the sink requests (0, 0), voltage_tries increments to 2 on
the first attempt at (0, 0) (aborting after 4 tries instead of 5).
Also, max_vswing_reached is initialized to false before
intel_dp_reset_link_train(), so if the initial VBT levels already hit the
maximum voltage swing, the first loop iteration does not notice that max
vswing was already reached.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261110115432.894616-1-shawn.c.lee@intel.com?part=3
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 4/4] drm/i915/dp: Use the VBT fast link training link config for eDP
2026-11-10 11:54 ` [PATCH 4/4] drm/i915/dp: Use the VBT fast link training link config for eDP Lee Shawn C
@ 2026-11-10 12:14 ` sashiko-bot
0 siblings, 0 replies; 13+ messages in thread
From: sashiko-bot @ 2026-11-10 12:14 UTC (permalink / raw)
To: Lee Shawn C, intel-gfx, intel-xe
Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [High] drm/i915/dp: use_max_params overrides
intel_dp_apply_vbt_edp_link_config()
- [High] drm/i915/dp: no M/N or BW fallback in
intel_dp_apply_vbt_edp_link_config()
--
commit 46497d5cbedd717d0790bb659b620e0c9e18c67c
Author: Lee Shawn C <shawn.c.lee@intel.com>
drm/i915/dp: Use the VBT fast link training link config for eDP
This commit restricts the candidate eDP link configurations during compute
config to the rate and lane count specified by the VBT fast link training
parameters when fast link training is enabled.
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ef164a7976187..0390bd62d7596 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2824,6 +2824,62 @@ intel_dp_compute_m_n_ratio_limits(struct intel_dp *intel_dp,
> return true;
> }
>
> +/*
> + * If the VBT enables eDP fast link training for the panel, restrict the
> + * candidate link configs to the VBT fast link training link rate and/or
> + * lane count (a zero value means no restriction for that parameter). The
> + * filter is intersected with any filter already set in @limits. If no
> + * allowed config matches (e.g. the VBT values are not supported by the
> + * source/sink, or link training fallback has disabled all such configs),
> + * the VBT params are ignored.
> + */
> +static void
> +intel_dp_apply_vbt_edp_link_config(struct intel_dp *intel_dp,
> + struct intel_connector *connector,
> + struct link_config_limits *limits)
> +{
> + struct intel_display *display = to_intel_display(intel_dp);
> + struct intel_dp_link_caps *link_caps = intel_dp->link.caps;
> + struct intel_dp_link_caps_filter vbt_filter = INTEL_DP_LINK_CAPS_FILTER_NONE;
> + struct intel_dp_link_caps_iter iter;
> + struct intel_dp_link_config config;
> + int vbt_rate = connector->panel.vbt.edp.rate;
> + int vbt_lanes = connector->panel.vbt.edp.lanes;
> +
> + if (!intel_dp_is_edp(intel_dp) ||
> + !connector->panel.vbt.edp.fast_link_training ||
> + (!vbt_rate && !vbt_lanes))
> + return;
> +
> + intel_dp_link_caps_iter_start(&iter, link_caps,
> + intel_dp_link_caps_connector_compute_order(connector),
> + limits->link_config_filter);
> + for_each_dp_link_config(&iter, &config) {
> + if (vbt_rate && config.rate != vbt_rate)
> + continue;
> + if (vbt_lanes && config.lane_count != vbt_lanes)
> + continue;
> +
> + intel_dp_link_caps_filter_add(link_caps, &vbt_filter, &config);
> + }
> + intel_dp_link_caps_iter_end(&iter);
> +
> + if (!vbt_filter.config_mask) {
> + drm_dbg_kms(display->drm,
> + "[CONNECTOR:%d:%s] VBT eDP link config (lanes %d, rate %d) not in allowed link configs, ignoring\n",
> + connector->base.base.id, connector->base.name,
> + vbt_lanes, vbt_rate);
> + return;
> + }
> +
> + drm_dbg_kms(display->drm,
> + "[CONNECTOR:%d:%s] Limiting link configs to VBT eDP lanes %d, rate %d\n",
> + connector->base.base.id, connector->base.name,
> + vbt_lanes, vbt_rate);
> +
> + limits->link_config_filter = vbt_filter;
> +}
> +
> bool
> intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> struct drm_connector_state *conn_state,
> @@ -2940,6 +2996,8 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> limits->link_config_filter = new_filter;
> }
>
> + intel_dp_apply_vbt_edp_link_config(intel_dp, connector, limits);
[Severity: High]
Does calling intel_dp_apply_vbt_edp_link_config() after the
intel_dp->use_max_params block cause non-maximum VBT configs to be
ignored whenever use_max_params is set?
intel_edp_init_dpcd() initializes intel_dp->use_max_params = true for all
eDP < 1.4 panels, and intel_dp_compute_config_limits() narrows
limits->link_config_filter to the single max_config entry before calling
intel_dp_apply_vbt_edp_link_config(). Any VBT rate or lane count lower
than max_config will not match that single-entry filter, so the VBT config
is ignored and intel_dp_use_vbt_fast_link_levels() also returns false.
On eDP >= 1.4 panels, if link training fails on the VBT config, the first
fallback step in intel_dp_get_link_train_fallback_values() sets
intel_dp->use_max_params = true and returns 0 without disabling the
failed config in link_caps:
drivers/gpu/drm/i915/display/intel_dp_link_training.c:intel_dp_get_link_train_fallback_values() {
if (intel_dp_is_edp(intel_dp) && !intel_dp->use_max_params) {
lt_dbg(intel_dp, DP_PHY_DPRX,
"Retrying Link training for eDP with max parameters\n");
intel_dp->use_max_params = true;
return 0;
}
}
If the VBT config was already max_config, the retry repeats the exact
same failed config; if it was lower than max_config, the failed VBT
config stays enabled in link_caps and will be selected again if
max_config later fails and falls back.
> +
> if (!intel_dp_compute_m_n_ratio_limits(intel_dp, conn_state, crtc_state, limits))
> return false;
[Severity: High]
Can restricting limits->link_config_filter to vbt_filter cause the
modeset to fail instead of falling back when the VBT config cannot
support the mode's M/N ratio or required bandwidth?
If the VBT specifies a rate or lane count that is present in link_caps
(for example RBR 1.62 Gbps, which is encoded as 0 in VBT versions
182..223) but is too low for the panel's mode, vbt_filter is non-empty
and overwrites limits->link_config_filter.
When vbt_rate violates the Link M/N ratio limit,
intel_dp_compute_m_n_ratio_limits() then sees no valid configs in
limits->link_config_filter and fails intel_dp_compute_config_limits()
even if higher rates in link_caps would pass. Even if the M/N check
passes, intel_dp_compute_link_config_wide() only searches
limits->link_config_filter and returns -EINVAL when the VBT config lacks
bandwidth for the mode, which fails the modeset on non-DSC eDP panels (or
picks the under-provisioned VBT config without a bandwidth check in
dsc_compute_compressed_bpp() on DSC-capable eDP panels).
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261110115432.894616-1-shawn.c.lee@intel.com?part=4
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/4] drm/i915/bios: Parse eDP fast link training params only if enabled
2026-11-10 11:54 ` [PATCH 2/4] drm/i915/bios: Parse eDP fast link training params only if enabled Lee Shawn C
2026-11-10 12:07 ` sashiko-bot
@ 2026-11-10 12:31 ` Ville Syrjälä
2026-11-11 8:07 ` Lee, Shawn C
1 sibling, 1 reply; 13+ messages in thread
From: Ville Syrjälä @ 2026-11-10 12:31 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-gfx, intel-xe, Jani Nikula
On Tue, Nov 10, 2026 at 11:54:30AM +0000, Lee Shawn C wrote:
> The VBT eDP fast link training params are parsed regardless of the
> per-panel fast link training enable bit (VBT 182+), which itself is not
> parsed. Parse the enable bit into panel->vbt.edp.fast_link_training and
> parse the params only if it is set.
>
> VBT default fast link training lane count is 1, while hardly any
> eDP panel uses a single lane, so treat a lane count of 1 as not
> specified, like a rate of 0, leaving the selection to the driver.
>
> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 34 +++++++++++++++++--
> .../drm/i915/display/intel_display_types.h | 1 +
> 2 files changed, 33 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 6b2924c56cae..378f8b60b4a0 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1448,6 +1448,12 @@ parse_edp_fast_link_params(struct intel_display *display,
> const struct edp_fast_link_params *edp_link_params =
> &edp->fast_link_params[panel_type];
>
> + if (display->vbt.version < 182 ||
> + !panel_bool(edp->fast_link_training, panel_type))
> + return;
> +
> + panel->vbt.edp.fast_link_training = true;
> +
> if (display->vbt.version >= 224) {
> panel->vbt.edp.rate =
> edp->edp_fast_link_training_rate[panel_type] * 20;
> @@ -1526,6 +1532,29 @@ parse_edp_fast_link_params(struct intel_display *display,
> edp_link_params->vswing);
> break;
> }
> +
> + /*
> + * The fast link training rate is limited by the eDP max port link
> + * rate: FLT rate = min(FLT rate, eDP max port link rate).
> + */
> + if (panel->vbt.edp.rate && panel->vbt.edp.max_link_rate)
> + panel->vbt.edp.rate = min(panel->vbt.edp.rate,
> + panel->vbt.edp.max_link_rate);
The Windows driver discards the fast link training parameters
if the rate exceeds the max.
It also requires DP_NO_AUX_HANDSHAKE_LINK_TRAINING. Without that
it will not use the fast link training parameters, even for a full
link training.
> +
> + /*
> + * The VBT default fast link training lane count is 1, while hardly
> + * any eDP panel uses a single lane. Treat a lane count of 1 as not
> + * specified, leaving the lane count selection to the driver, the
> + * same way as a fast link training rate of 0.
> + */
> + if (panel->vbt.edp.lanes == 1)
> + panel->vbt.edp.lanes = 0;
> +
> + drm_dbg_kms(display->drm,
> + "VBT eDP fast link training enabled: rate %d, lanes %d, vswing %d, pre-emphasis %d\n",
> + panel->vbt.edp.rate, panel->vbt.edp.lanes,
> + panel->vbt.edp.vswing >> DP_TRAIN_VOLTAGE_SWING_SHIFT,
> + panel->vbt.edp.preemphasis >> DP_TRAIN_PRE_EMPHASIS_SHIFT);
> }
>
> static void
> @@ -1555,8 +1584,6 @@ parse_edp(struct intel_display *display,
> vbt_edp_to_pps_delays(&panel->vbt.edp.pps,
> &edp->power_seqs[panel_type]);
>
> - parse_edp_fast_link_params(display, panel, edp);
> -
> if (display->vbt.version >= 173) {
> u8 vswing;
>
> @@ -1577,6 +1604,9 @@ parse_edp(struct intel_display *display,
> panel->vbt.edp.max_link_rate =
> edp->edp_max_port_link_rate[panel_type] * 20;
>
> + /* Depends on max_link_rate */
> + parse_edp_fast_link_params(display, panel, edp);
> +
> if (display->vbt.version >= 251)
> panel->vbt.edp.dsc_disable =
> panel_bool(edp->edp_dsc_disable, panel_type);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 90a5d29169c6..11f90ab1654c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -354,6 +354,7 @@ struct intel_vbt_panel_data {
> int bpp;
> struct intel_pps_delays pps;
> u8 drrs_msa_timing_delay;
> + bool fast_link_training;
> bool low_vswing;
> bool hobl;
> bool dsc_disable;
> --
> 2.53.0
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/dp: Use the VBT eDP fast link training params
2026-11-10 11:54 [PATCH 0/4] drm/i915/dp: Use the VBT eDP fast link training params Lee Shawn C
` (4 preceding siblings ...)
2026-11-10 12:05 ` ✓ CI.KUnit: success for drm/i915/dp: Use the VBT eDP fast link training params Patchwork
@ 2026-11-10 12:42 ` Patchwork
2026-11-10 15:35 ` ✓ Xe.CI.FULL: " Patchwork
6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-11-10 12:42 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 877 bytes --]
== Series Details ==
Series: drm/i915/dp: Use the VBT eDP fast link training params
URL : https://patchwork.freedesktop.org/series/178196/
State : success
== Summary ==
CI Bug Log - changes from xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b_BAT -> xe-pw-178196v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (15 -> 15)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b -> xe-pw-178196v1
IGT_9182: 9182
xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b: 77735854d8c336ccfd33eebc2ff03a3c5e13523b
xe-pw-178196v1: 178196v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/index.html
[-- Attachment #2: Type: text/html, Size: 1425 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Xe.CI.FULL: success for drm/i915/dp: Use the VBT eDP fast link training params
2026-11-10 11:54 [PATCH 0/4] drm/i915/dp: Use the VBT eDP fast link training params Lee Shawn C
` (5 preceding siblings ...)
2026-11-10 12:42 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-11-10 15:35 ` Patchwork
6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-11-10 15:35 UTC (permalink / raw)
To: Lee Shawn C; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 12448 bytes --]
== Series Details ==
Series: drm/i915/dp: Use the VBT eDP fast link training params
URL : https://patchwork.freedesktop.org/series/178196/
State : success
== Summary ==
CI Bug Log - changes from xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b_FULL -> xe-pw-178196v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (3 -> 3)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-178196v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-bmg: [PASS][1] -> [FAIL][2] ([Intel XE#3718] / [Intel XE#6078])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-bmg-8/igt@kms_async_flips@alternate-sync-async-flip.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2:
- shard-bmg: [PASS][3] -> [FAIL][4] ([Intel XE#6078])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-bmg-8/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic:
- shard-ptl: [PASS][5] -> [DMESG-FAIL][6] ([Intel XE#1727]) +1 other test dmesg-fail
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-ptl-7/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-ptl-3/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic.html
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-a-edp-1-4:
- shard-ptl: [PASS][7] -> [DMESG-WARN][8] ([Intel XE#1727])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-ptl-7/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-a-edp-1-4.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-ptl-3/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-a-edp-1-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-b-dp-1:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2652]) +3 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-bmg-7/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-b-dp-1.html
* igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs-cc:
- shard-ptl: NOTRUN -> [SKIP][10] ([Intel XE#5822])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-ptl-4/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_content_protection@atomic@pipe-a-dp-1:
- shard-bmg: NOTRUN -> [FAIL][11] ([Intel XE#3304])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-bmg-7/igt@kms_content_protection@atomic@pipe-a-dp-1.html
* igt@kms_content_protection@uevent-hdcp14@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][12] ([Intel XE#6707] / [Intel XE#7439])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-bmg-9/igt@kms_content_protection@uevent-hdcp14@pipe-a-dp-2.html
* igt@kms_dsc@dsc-with-bpc:
- shard-ptl: NOTRUN -> [SKIP][13] ([Intel XE#5907])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-ptl-4/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_flip@2x-dpms-vs-vblank-race:
- shard-bmg: [PASS][14] -> [FAIL][15] ([Intel XE#3098])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-bmg-7/igt@kms_flip@2x-dpms-vs-vblank-race.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-bmg-9/igt@kms_flip@2x-dpms-vs-vblank-race.html
* igt@kms_flip@2x-dpms-vs-vblank-race@ab-dp2-hdmi-a3:
- shard-bmg: NOTRUN -> [FAIL][16] ([Intel XE#3098])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-bmg-9/igt@kms_flip@2x-dpms-vs-vblank-race@ab-dp2-hdmi-a3.html
* igt@kms_flip@modeset-vs-vblank-race-interruptible:
- shard-lnl: [PASS][17] -> [FAIL][18] ([Intel XE#3098]) +1 other test fail
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-lnl-5/igt@kms_flip@modeset-vs-vblank-race-interruptible.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-lnl-3/igt@kms_flip@modeset-vs-vblank-race-interruptible.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-shrfb-plflip-blt:
- shard-ptl: NOTRUN -> [SKIP][19] ([Intel XE#5812])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-ptl-4/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][20] -> [SKIP][21] ([Intel XE#1503])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-bmg-8/igt@kms_hdr@invalid-hdr.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-bmg-9/igt@kms_hdr@invalid-hdr.html
* igt@kms_vrr@cmrr-video-mode@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#9271]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-lnl-4/igt@kms_vrr@cmrr-video-mode@pipe-a-edp-1.html
* igt@xe_evict@evict-beng-mixed-many-threads-large:
- shard-ptl: NOTRUN -> [SKIP][23] ([Intel XE#5764])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-ptl-4/igt@xe_evict@evict-beng-mixed-many-threads-large.html
* igt@xe_exec_balancer@twice-virtual-basic:
- shard-ptl: NOTRUN -> [SKIP][24] ([Intel XE#7482])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-ptl-4/igt@xe_exec_balancer@twice-virtual-basic.html
* igt@xe_exec_multi_queue@few-execs-preempt-mode-dyn-priority-smem:
- shard-ptl: NOTRUN -> [SKIP][25] ([Intel XE#8364])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-ptl-4/igt@xe_exec_multi_queue@few-execs-preempt-mode-dyn-priority-smem.html
* igt@xe_exec_reset@gt-stress-reset-bo-invalidation:
- shard-bmg: [PASS][26] -> [DMESG-WARN][27] ([Intel XE#8652])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-bmg-10/igt@xe_exec_reset@gt-stress-reset-bo-invalidation.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-bmg-7/igt@xe_exec_reset@gt-stress-reset-bo-invalidation.html
* igt@xe_pm@s4-basic-exec:
- shard-ptl: [PASS][28] -> [ABORT][29] ([Intel XE#9362])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-ptl-1/igt@xe_pm@s4-basic-exec.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-ptl-3/igt@xe_pm@s4-basic-exec.html
* igt@xe_pm@s4-vm-bind-unbind-all:
- shard-lnl: [PASS][30] -> [DMESG-WARN][31] ([Intel XE#7727])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-lnl-8/igt@xe_pm@s4-vm-bind-unbind-all.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-lnl-4/igt@xe_pm@s4-vm-bind-unbind-all.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [FAIL][32] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][33] +1 other test pass
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_setmode@basic:
- shard-bmg: [FAIL][34] ([Intel XE#8618]) -> [PASS][35]
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-bmg-7/igt@kms_setmode@basic.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-bmg-9/igt@kms_setmode@basic.html
* igt@kms_vrr@flip-suspend@pipe-a-edp-1:
- shard-ptl: [FAIL][36] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][37] +1 other test pass
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-ptl-7/igt@kms_vrr@flip-suspend@pipe-a-edp-1.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-ptl-7/igt@kms_vrr@flip-suspend@pipe-a-edp-1.html
#### Warnings ####
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][38] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935]) -> [SKIP][39] ([Intel XE#309] / [Intel XE#7343])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-lnl-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][40] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][41] ([Intel XE#3544])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b/shard-bmg-2/igt@kms_hdr@brightness-with-hdr.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
[Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
[Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
[Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
[Intel XE#5907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5907
[Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
[Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
[Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7727
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8618]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8618
[Intel XE#8652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8652
[Intel XE#9271]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9271
[Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
Build changes
-------------
* Linux: xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b -> xe-pw-178196v1
IGT_9182: 9182
xe-6101-77735854d8c336ccfd33eebc2ff03a3c5e13523b: 77735854d8c336ccfd33eebc2ff03a3c5e13523b
xe-pw-178196v1: 178196v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178196v1/index.html
[-- Attachment #2: Type: text/html, Size: 14047 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH 2/4] drm/i915/bios: Parse eDP fast link training params only if enabled
2026-11-10 12:31 ` Ville Syrjälä
@ 2026-11-11 8:07 ` Lee, Shawn C
0 siblings, 0 replies; 13+ messages in thread
From: Lee, Shawn C @ 2026-11-11 8:07 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
Jani Nikula
On Tue, Nov 10, 2026 at 8:31:00PM +0000, Ville Syrjälä wrote:
>On Tue, Nov 10, 2026 at 11:54:30AM +0000, Lee Shawn C wrote:
>> The VBT eDP fast link training params are parsed regardless of the
>> per-panel fast link training enable bit (VBT 182+), which itself is
>> not parsed. Parse the enable bit into
>> panel->vbt.edp.fast_link_training and parse the params only if it is set.
>>
>> VBT default fast link training lane count is 1, while hardly any eDP
>> panel uses a single lane, so treat a lane count of 1 as not specified,
>> like a rate of 0, leaving the selection to the driver.
>>
>> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_bios.c | 34 +++++++++++++++++--
>> .../drm/i915/display/intel_display_types.h | 1 +
>> 2 files changed, 33 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
>> b/drivers/gpu/drm/i915/display/intel_bios.c
>> index 6b2924c56cae..378f8b60b4a0 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
>> @@ -1448,6 +1448,12 @@ parse_edp_fast_link_params(struct intel_display *display,
>> const struct edp_fast_link_params *edp_link_params =
>> &edp->fast_link_params[panel_type];
>>
>> + if (display->vbt.version < 182 ||
>> + !panel_bool(edp->fast_link_training, panel_type))
>> + return;
>> +
>> + panel->vbt.edp.fast_link_training = true;
>> +
>> if (display->vbt.version >= 224) {
>> panel->vbt.edp.rate =
>> edp->edp_fast_link_training_rate[panel_type] * 20; @@ -1526,6
>> +1532,29 @@ parse_edp_fast_link_params(struct intel_display *display,
>> edp_link_params->vswing);
>> break;
>> }
>> +
>> + /*
>> + * The fast link training rate is limited by the eDP max port link
>> + * rate: FLT rate = min(FLT rate, eDP max port link rate).
>> + */
>> + if (panel->vbt.edp.rate && panel->vbt.edp.max_link_rate)
>> + panel->vbt.edp.rate = min(panel->vbt.edp.rate,
>> + panel->vbt.edp.max_link_rate);
>
>The Windows driver discards the fast link training parameters if the rate exceeds the max.
>
Will do the same in v2.
>It also requires DP_NO_AUX_HANDSHAKE_LINK_TRAINING. Without that it will not use the fast link training parameters, even for a full link training.
>
Will use the params only if drm_dp_fast_training_cap() is true for the sink.
Thanks for the review, Ville!
>> +
>> + /*
>> + * The VBT default fast link training lane count is 1, while hardly
>> + * any eDP panel uses a single lane. Treat a lane count of 1 as not
>> + * specified, leaving the lane count selection to the driver, the
>> + * same way as a fast link training rate of 0.
>> + */
>> + if (panel->vbt.edp.lanes == 1)
>> + panel->vbt.edp.lanes = 0;
>> +
>> + drm_dbg_kms(display->drm,
>> + "VBT eDP fast link training enabled: rate %d, lanes %d, vswing %d, pre-emphasis %d\n",
>> + panel->vbt.edp.rate, panel->vbt.edp.lanes,
>> + panel->vbt.edp.vswing >> DP_TRAIN_VOLTAGE_SWING_SHIFT,
>> + panel->vbt.edp.preemphasis >> DP_TRAIN_PRE_EMPHASIS_SHIFT);
>> }
>>
>> static void
>> @@ -1555,8 +1584,6 @@ parse_edp(struct intel_display *display,
>> vbt_edp_to_pps_delays(&panel->vbt.edp.pps,
>> &edp->power_seqs[panel_type]);
>>
>> - parse_edp_fast_link_params(display, panel, edp);
>> -
>> if (display->vbt.version >= 173) {
>> u8 vswing;
>>
>> @@ -1577,6 +1604,9 @@ parse_edp(struct intel_display *display,
>> panel->vbt.edp.max_link_rate =
>> edp->edp_max_port_link_rate[panel_type] * 20;
>>
>> + /* Depends on max_link_rate */
>> + parse_edp_fast_link_params(display, panel, edp);
>> +
>> if (display->vbt.version >= 251)
>> panel->vbt.edp.dsc_disable =
>> panel_bool(edp->edp_dsc_disable, panel_type); diff --git
>> a/drivers/gpu/drm/i915/display/intel_display_types.h
>> b/drivers/gpu/drm/i915/display/intel_display_types.h
>> index 90a5d29169c6..11f90ab1654c 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>> @@ -354,6 +354,7 @@ struct intel_vbt_panel_data {
>> int bpp;
>> struct intel_pps_delays pps;
>> u8 drrs_msa_timing_delay;
>> + bool fast_link_training;
>> bool low_vswing;
>> bool hobl;
>> bool dsc_disable;
>> --
>> 2.53.0
>
>--
>Ville Syrjälä
>Intel
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2026-11-11 8:07 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-11-10 11:54 [PATCH 0/4] drm/i915/dp: Use the VBT eDP fast link training params Lee Shawn C
2026-11-10 11:54 ` [PATCH 1/4] drm/i915/bios: Split out parsing the " Lee Shawn C
2026-11-10 11:54 ` [PATCH 2/4] drm/i915/bios: Parse eDP fast link training params only if enabled Lee Shawn C
2026-11-10 12:07 ` sashiko-bot
2026-11-10 12:31 ` Ville Syrjälä
2026-11-11 8:07 ` Lee, Shawn C
2026-11-10 11:54 ` [PATCH 3/4] drm/i915/dp: Start eDP link training from VBT fast link train vswing/pre-emphasis levels Lee Shawn C
2026-11-10 12:14 ` sashiko-bot
2026-11-10 11:54 ` [PATCH 4/4] drm/i915/dp: Use the VBT fast link training link config for eDP Lee Shawn C
2026-11-10 12:14 ` sashiko-bot
2026-11-10 12:05 ` ✓ CI.KUnit: success for drm/i915/dp: Use the VBT eDP fast link training params Patchwork
2026-11-10 12:42 ` ✓ Xe.CI.BAT: " Patchwork
2026-11-10 15:35 ` ✓ Xe.CI.FULL: " Patchwork
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