* [PATCH] drm/i915/dip: Write the DIP header last with SDP transmission lines
@ 2026-11-11 10:35 Chaitanya Kumar Borah
2026-11-11 11:08 ` ✓ CI.KUnit: success for " Patchwork
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: Chaitanya Kumar Borah @ 2026-11-11 10:35 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: Chaitanya Kumar Borah, stable, Ankit Nautiyal, Suraj Kandpal
On platforms with SDP transmission line registers, the packets anchored
to them are double buffered in the transcoder (TC) clock domain. The packet
registers are in the core display (CD) clock domain and the whole packet is
clock crossed on the write of the header (dword 0), so Bspec requires the
data to be programmed first and the header last.
hsw_write_infoframe() writes the header first, so the packet is crossed
before its payload is in place and the previous payload keeps being sent.
This hits the AS SDP, and the VSC SDP whenever an AS SDP is enabled, which
is whenever VRR is possible since commit 6a1712052859 ("drm/i915/dp: Enable
AS SDP whenever VRR is possible or PR !async"). With CMN_SDP_TL, enabled by
commit bfa597238073 ("drm/i915/dip: Enable Common SDP Transmission line"),
it also hits the GMP and VSC SDPs: on NVL, entering HDR on an eDP panel
leaves the image discoloured and scaled until the headers are rewritten.
Write the payload, including the ECC zero fill, first and the header last
on platforms with EMP_AS_SDP_TL. CD domain packets have no ordering
requirement and Bspec recommends the same order for all packets, so use it
for all of them. Older platforms keep the current order.
Bspec: 75640, 71197, 74384
Fixes: e1123e617e51 ("drm/i915/vrr: Program EMP_AS_SDP_TL for DP AS SDP")
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/17732
Cc: <stable@vger.kernel.org> # v6.17+
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
Notes:
Fixes tag rationale
The Fixes tag points at commit e1123e617e51 ("drm/i915/vrr: Program
EMP_AS_SDP_TL for DP AS SDP"). The AS SDP has been written header first
since it was added by commit 8845021b7331 ("drm/i915/display: Read/Write
Adaptive Sync SDP"), but EMP_AS_SDP_TL, which holds the double buffer
point and the transmission line of the AS SDP on BMG and LNL+, was only
programmed from that commit on. From then on the driver relies on that
register to anchor the AS SDP, and the VSC SDP whenever an AS SDP is
enabled, and the programming note of the register asks for the packet
data first and the header last. The two later commits cited in the commit
message only widened the exposure: the first enabled the AS SDP whenever
VRR is possible and the second added CMN_SDP_TL for the GMP and VSC SDPs.
Alternatives considered:
- 6a1712052859 (v7.2): AS SDP on whenever VRR is possible. The PTL
report is fixed by reverting it. Narrower than the spec argument, as
it only covers v7.2 and later.
- bfa597238073 (7.4): CMN_SDP_TL. The NVL regression, verified on
hardware, but covered by the older tag as every kernel with it also
has e1123e617e51.
- 8845021b7331 (v6.10): first header first AS SDP write, but
EMP_AS_SDP_TL was not programmed until e1123e617e51, so exposure
before it could not be shown.
Not verified:
- The failure was observed on NVL with CMN_SDP_TL (rewriting the GMP and
VSC headers makes the panel recover). The AS SDP and the VSC SDP with
an AS SDP on BMG, LNL and PTL follow from the Bspec requirement and
were not reproduced here.
- No reproduction on kernels older than v7.2.
- Stable backports need the HAS_EMP_AS_SDP_TL gate adapted, as it is
defined in intel_dip.h, which is new in 7.4.
drivers/gpu/drm/i915/display/intel_hdmi.c | 21 +++++++++++++++++----
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 4ec0db8d93fb..3ecf017b3176 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -51,6 +51,7 @@
#include "intel_cx0_phy.h"
#include "intel_ddi.h"
#include "intel_de.h"
+#include "intel_dip.h"
#include "intel_display_driver.h"
#include "intel_display_regs.h"
#include "intel_display_types.h"
@@ -524,6 +525,15 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
const u32 *data = frame;
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
intel_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(display, cpu_transcoder);
+ /*
+ * On platforms with the SDP transmission line registers some of the
+ * packets are double buffered in the transcoder clock domain, and the
+ * packet is clock crossed on the write of the header (dword 0). Program
+ * the payload first and the header last, so that the whole packet gets
+ * crossed. Packets double buffered in the core display clock domain
+ * have no ordering requirement, so use the same order for all of them.
+ */
+ bool header_last = HAS_EMP_AS_SDP_TL(display);
int data_size;
int i;
u32 val = intel_de_read(display, ctl_reg);
@@ -535,18 +545,21 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
val &= ~hsw_infoframe_enable(type);
intel_de_write(display, ctl_reg, val);
- for (i = 0; i < len; i += 4) {
+ for (i = header_last ? 4 : 0; i < len; i += 4)
intel_de_write(display,
hsw_dip_data_reg(display, cpu_transcoder, type, i >> 2),
- *data);
- data++;
- }
+ data[i >> 2]);
/* Write every possible data byte to force correct ECC calculation. */
for (; i < data_size; i += 4)
intel_de_write(display,
hsw_dip_data_reg(display, cpu_transcoder, type, i >> 2),
0);
+ if (header_last)
+ intel_de_write(display,
+ hsw_dip_data_reg(display, cpu_transcoder, type, 0),
+ data[0]);
+
/* Wa_14013475917 */
if (!(IS_DISPLAY_VER(display, 13, 14) && crtc_state->has_psr &&
!crtc_state->has_panel_replay && type == DP_SDP_VSC))
--
2.50.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✓ CI.KUnit: success for drm/i915/dip: Write the DIP header last with SDP transmission lines
2026-11-11 10:35 [PATCH] drm/i915/dip: Write the DIP header last with SDP transmission lines Chaitanya Kumar Borah
@ 2026-11-11 11:08 ` Patchwork
2026-11-11 11:36 ` [PATCH] " Ville Syrjälä
` (3 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2026-11-11 11:08 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe
== Series Details ==
Series: drm/i915/dip: Write the DIP header last with SDP transmission lines
URL : https://patchwork.freedesktop.org/series/178304/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[11:06:05] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:06:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:06:30] Starting KUnit Kernel (1/1)...
[11:06:30] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:06:30] ================= gpu_buddy (14 subtests) ==================
[11:06:30] [PASSED] gpu_test_buddy_alloc_limit
[11:06:30] [PASSED] gpu_test_buddy_alloc_optimistic
[11:06:30] [PASSED] gpu_test_buddy_alloc_pessimistic
[11:06:30] [PASSED] gpu_test_buddy_alloc_pathological
[11:06:30] [PASSED] gpu_test_buddy_alloc_contiguous
[11:06:30] [PASSED] gpu_test_buddy_alloc_clear
[11:06:30] [PASSED] gpu_test_buddy_alloc_range
[11:06:31] [PASSED] gpu_test_buddy_alloc_range_bias
[11:06:31] [PASSED] gpu_test_buddy_fragmentation_performance
[11:06:32] [PASSED] gpu_test_buddy_dirty_tracker_performance
[11:06:32] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[11:06:32] [PASSED] gpu_test_buddy_offset_aligned_allocation
[11:06:32] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[11:06:32] [PASSED] gpu_test_buddy_addr_to_block
[11:06:32] ==================== [PASSED] gpu_buddy ====================
[11:06:32] ============================================================
[11:06:32] Testing complete. Ran 14 tests: passed: 14
[11:06:32] Elapsed time: 27.492s total, 5.097s configuring, 20.477s building, 1.880s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:06:32] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:06:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:07:13] Starting KUnit Kernel (1/1)...
[11:07:13] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:07:13] ================== guc_buf (11 subtests) ===================
[11:07:13] [PASSED] test_smallest
[11:07:13] [PASSED] test_largest
[11:07:13] [PASSED] test_granular
[11:07:13] [PASSED] test_unique
[11:07:13] [PASSED] test_overlap
[11:07:13] [PASSED] test_reusable
[11:07:13] [PASSED] test_too_big
[11:07:13] [PASSED] test_flush
[11:07:13] [PASSED] test_lookup
[11:07:13] [PASSED] test_data
[11:07:13] [PASSED] test_class
[11:07:13] ===================== [PASSED] guc_buf =====================
[11:07:13] =================== guc_dbm (7 subtests) ===================
[11:07:13] [PASSED] test_empty
[11:07:13] [PASSED] test_default
[11:07:13] ======================== test_size ========================
[11:07:13] [PASSED] 4
[11:07:13] [PASSED] 8
[11:07:13] [PASSED] 32
[11:07:13] [PASSED] 256
[11:07:13] ==================== [PASSED] test_size ====================
[11:07:13] ======================= test_reuse ========================
[11:07:13] [PASSED] 4
[11:07:13] [PASSED] 8
[11:07:13] [PASSED] 32
[11:07:13] [PASSED] 256
[11:07:13] =================== [PASSED] test_reuse ====================
[11:07:13] =================== test_range_overlap ====================
[11:07:13] [PASSED] 4
[11:07:13] [PASSED] 8
[11:07:13] [PASSED] 32
[11:07:13] [PASSED] 256
[11:07:13] =============== [PASSED] test_range_overlap ================
[11:07:13] =================== test_range_compact ====================
[11:07:13] [PASSED] 4
[11:07:13] [PASSED] 8
[11:07:13] [PASSED] 32
[11:07:13] [PASSED] 256
[11:07:13] =============== [PASSED] test_range_compact ================
[11:07:13] ==================== test_range_spare =====================
[11:07:13] [PASSED] 4
[11:07:13] [PASSED] 8
[11:07:13] [PASSED] 32
[11:07:13] [PASSED] 256
[11:07:13] ================ [PASSED] test_range_spare =================
[11:07:13] ===================== [PASSED] guc_dbm =====================
[11:07:13] ================== guc_idm (22 subtests) ===================
[11:07:13] [PASSED] bad_init
[11:07:13] [PASSED] no_init
[11:07:13] [PASSED] init_fini
[11:07:13] [PASSED] check_init_small
[11:07:13] [PASSED] check_init_shared
[11:07:13] [PASSED] check_used
[11:07:13] [PASSED] check_quota
[11:07:13] [PASSED] check_all
[11:07:13] [PASSED] check_limits
[11:07:13] [PASSED] check_overlap
[11:07:13] [PASSED] check_overlap_alloc
[11:07:13] [PASSED] check_overlap_release
[11:07:13] [PASSED] check_overlap_partial_init
[11:07:13] [PASSED] check_overlap_partial_shared_range_blocking
[11:07:13] [PASSED] check_used_usable
[11:07:13] [PASSED] check_used_shareable
[11:07:13] [PASSED] check_used_mixed
[11:07:13] [PASSED] check_release_usable_range
[11:07:13] [PASSED] check_release_shareable_range
[11:07:13] [PASSED] check_split_boundaries
[11:07:13] [PASSED] check_shareable_spare
[11:07:13] [PASSED] check_shareable_spare_fragmented_tail
[11:07:13] ===================== [PASSED] guc_idm =====================
[11:07:13] ============== guc_klv_helpers (13 subtests) ===============
[11:07:13] [PASSED] test_count
[11:07:13] [PASSED] test_encode_u32
[11:07:13] [PASSED] test_encode_u64
[11:07:13] [PASSED] test_encode_string
[11:07:13] [PASSED] test_encode_object_raw
[11:07:13] [PASSED] test_encode_object_klv
[11:07:13] [PASSED] test_encode_object_nested
[11:07:13] [PASSED] test_encode_object_basic
[11:07:13] ===================== test_decode_u16 =====================
[11:07:13] [PASSED] empty
[11:07:13] [PASSED] valid
[11:07:13] [PASSED] max
[11:07:13] [PASSED] big
[11:07:13] [PASSED] long
[11:07:13] ================= [PASSED] test_decode_u16 =================
[11:07:13] ===================== test_decode_u32 =====================
[11:07:13] [PASSED] empty
[11:07:13] [PASSED] valid
[11:07:13] [PASSED] max
[11:07:13] [PASSED] long
[11:07:13] ================= [PASSED] test_decode_u32 =================
[11:07:13] ===================== test_decode_u64 =====================
[11:07:13] [PASSED] empty
[11:07:13] [PASSED] short
[11:07:13] [PASSED] valid
[11:07:13] [PASSED] max
[11:07:13] [PASSED] long
[11:07:13] ================= [PASSED] test_decode_u64 =================
[11:07:13] ===================== test_decode_str =====================
[11:07:13] [PASSED] empty
[11:07:13] [PASSED] one
[11:07:13] [PASSED] one_trash
[11:07:13] [PASSED] two
[11:07:13] [PASSED] two_trash
[11:07:13] [PASSED] three
[11:07:13] [PASSED] dword
[11:07:13] [PASSED] four
[11:07:13] [PASSED] five
[11:07:13] [PASSED] six
[11:07:13] [PASSED] seven
[11:07:13] [PASSED] qword
[11:07:13] ================= [PASSED] test_decode_str =================
[11:07:13] [PASSED] test_print
[11:07:13] ================= [PASSED] guc_klv_helpers =================
[11:07:13] =================== xe_log (4 subtests) ====================
[11:07:13] [PASSED] demo_cper
[11:07:13] [PASSED] demo_dmesg
[11:07:13] ======================= test_dmesg ========================
[11:07:13] [PASSED] test_fatal
[11:07:13] [PASSED] test_fatal_tile
[11:07:13] [PASSED] test_fatal_gt
[11:07:13] [PASSED] test_fatal_comp
[11:07:13] [PASSED] test_fatal_comp_tile
[11:07:13] [PASSED] test_fatal_comp_gt
[11:07:13] [PASSED] test_fatal_all
[11:07:13] [PASSED] test_recoverable
[11:07:13] [PASSED] test_recoverable_tile
[11:07:13] [PASSED] test_recoverable_gt
[11:07:13] [PASSED] test_recoverable_comp
[11:07:13] [PASSED] test_recoverable_comp_tile
[11:07:13] [PASSED] test_recoverable_comp_gt
[11:07:13] [PASSED] test_recoverable_all
[11:07:13] [PASSED] test_info
[11:07:13] [PASSED] test_info_tile
[11:07:13] [PASSED] test_info_gt
[11:07:13] [PASSED] test_info_err
[11:07:13] [PASSED] test_info_comp
[11:07:13] [PASSED] test_info_comp_tile
[11:07:13] [PASSED] test_info_comp_gt
[11:07:13] [PASSED] test_info_all
[11:07:13] [PASSED] test_hw_fatal
[11:07:13] [PASSED] test_hw_recoverable
[11:07:13] [PASSED] test_hw_corrected
[11:07:13] [PASSED] test_hw_informational
[11:07:13] =================== [PASSED] test_dmesg ====================
[11:07:13] ====================== test_invalid =======================
[11:07:13] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[11:07:13] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[11:07:13] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[11:07:13] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[11:07:13] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[11:07:13] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[11:07:13] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[11:07:13] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[11:07:13] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[11:07:13] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[11:07:13] ================== [SKIPPED] test_invalid ==================
[11:07:13] ===================== [PASSED] xe_log ======================
[11:07:13] ================== no_relay (3 subtests) ===================
[11:07:13] [PASSED] xe_drops_guc2pf_if_not_ready
[11:07:13] [PASSED] xe_drops_guc2vf_if_not_ready
[11:07:13] [PASSED] xe_rejects_send_if_not_ready
[11:07:13] ==================== [PASSED] no_relay =====================
[11:07:13] ================== pf_relay (14 subtests) ==================
[11:07:13] [PASSED] pf_rejects_guc2pf_too_short
[11:07:13] [PASSED] pf_rejects_guc2pf_too_long
[11:07:13] [PASSED] pf_rejects_guc2pf_no_payload
[11:07:13] [PASSED] pf_fails_no_payload
[11:07:13] [PASSED] pf_fails_bad_origin
[11:07:13] [PASSED] pf_fails_bad_type
[11:07:13] [PASSED] pf_txn_reports_error
[11:07:13] [PASSED] pf_txn_sends_pf2guc
[11:07:13] [PASSED] pf_sends_pf2guc
[11:07:13] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:07:13] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:07:13] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:07:13] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:07:13] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:07:13] ==================== [PASSED] pf_relay =====================
[11:07:13] ================== vf_relay (3 subtests) ===================
[11:07:13] [PASSED] vf_rejects_guc2vf_too_short
[11:07:13] [PASSED] vf_rejects_guc2vf_too_long
[11:07:13] [PASSED] vf_rejects_guc2vf_no_payload
[11:07:13] ==================== [PASSED] vf_relay =====================
[11:07:13] ================ pf_gt_config (9 subtests) =================
[11:07:13] [PASSED] fair_contexts_1vf
[11:07:13] [PASSED] fair_doorbells_1vf
[11:07:13] [PASSED] fair_ggtt_1vf
[11:07:13] ====================== fair_vram_1vf ======================
[11:07:13] [PASSED] 3.50 GiB
[11:07:13] [PASSED] 11.5 GiB
[11:07:13] [PASSED] 15.5 GiB
[11:07:13] [PASSED] 31.5 GiB
[11:07:13] [PASSED] 63.5 GiB
[11:07:13] [PASSED] 1.91 GiB
[11:07:13] ================== [PASSED] fair_vram_1vf ==================
[11:07:13] ================ fair_vram_1vf_admin_only =================
[11:07:13] [PASSED] 3.50 GiB
[11:07:13] [PASSED] 11.5 GiB
[11:07:13] [PASSED] 15.5 GiB
[11:07:13] [PASSED] 31.5 GiB
[11:07:13] [PASSED] 63.5 GiB
[11:07:13] [PASSED] 1.91 GiB
[11:07:13] ============ [PASSED] fair_vram_1vf_admin_only =============
[11:07:13] ====================== fair_contexts ======================
[11:07:13] [PASSED] 1 VF
[11:07:13] [PASSED] 2 VFs
[11:07:13] [PASSED] 3 VFs
[11:07:13] [PASSED] 4 VFs
[11:07:13] [PASSED] 5 VFs
[11:07:13] [PASSED] 6 VFs
[11:07:13] [PASSED] 7 VFs
[11:07:13] [PASSED] 8 VFs
[11:07:13] [PASSED] 9 VFs
[11:07:13] [PASSED] 10 VFs
[11:07:13] [PASSED] 11 VFs
[11:07:13] [PASSED] 12 VFs
[11:07:13] [PASSED] 13 VFs
[11:07:13] [PASSED] 14 VFs
[11:07:13] [PASSED] 15 VFs
[11:07:13] [PASSED] 16 VFs
[11:07:13] [PASSED] 17 VFs
[11:07:13] [PASSED] 18 VFs
[11:07:13] [PASSED] 19 VFs
[11:07:13] [PASSED] 20 VFs
[11:07:13] [PASSED] 21 VFs
[11:07:13] [PASSED] 22 VFs
[11:07:13] [PASSED] 23 VFs
[11:07:13] [PASSED] 24 VFs
[11:07:13] [PASSED] 25 VFs
[11:07:13] [PASSED] 26 VFs
[11:07:13] [PASSED] 27 VFs
[11:07:13] [PASSED] 28 VFs
[11:07:13] [PASSED] 29 VFs
[11:07:13] [PASSED] 30 VFs
[11:07:13] [PASSED] 31 VFs
[11:07:13] [PASSED] 32 VFs
[11:07:13] [PASSED] 33 VFs
[11:07:13] [PASSED] 34 VFs
[11:07:13] [PASSED] 35 VFs
[11:07:13] [PASSED] 36 VFs
[11:07:13] [PASSED] 37 VFs
[11:07:13] [PASSED] 38 VFs
[11:07:13] [PASSED] 39 VFs
[11:07:13] [PASSED] 40 VFs
[11:07:13] [PASSED] 41 VFs
[11:07:13] [PASSED] 42 VFs
[11:07:13] [PASSED] 43 VFs
[11:07:13] [PASSED] 44 VFs
[11:07:13] [PASSED] 45 VFs
[11:07:13] [PASSED] 46 VFs
[11:07:13] [PASSED] 47 VFs
[11:07:13] [PASSED] 48 VFs
[11:07:13] [PASSED] 49 VFs
[11:07:13] [PASSED] 50 VFs
[11:07:13] [PASSED] 51 VFs
[11:07:13] [PASSED] 52 VFs
[11:07:13] [PASSED] 53 VFs
[11:07:13] [PASSED] 54 VFs
[11:07:13] [PASSED] 55 VFs
[11:07:13] [PASSED] 56 VFs
[11:07:13] [PASSED] 57 VFs
[11:07:13] [PASSED] 58 VFs
[11:07:13] [PASSED] 59 VFs
[11:07:13] [PASSED] 60 VFs
[11:07:13] [PASSED] 61 VFs
[11:07:13] [PASSED] 62 VFs
[11:07:13] [PASSED] 63 VFs
[11:07:13] ================== [PASSED] fair_contexts ==================
[11:07:13] ===================== fair_doorbells ======================
[11:07:13] [PASSED] 1 VF
[11:07:13] [PASSED] 2 VFs
[11:07:13] [PASSED] 3 VFs
[11:07:13] [PASSED] 4 VFs
[11:07:13] [PASSED] 5 VFs
[11:07:13] [PASSED] 6 VFs
[11:07:13] [PASSED] 7 VFs
[11:07:13] [PASSED] 8 VFs
[11:07:13] [PASSED] 9 VFs
[11:07:13] [PASSED] 10 VFs
[11:07:13] [PASSED] 11 VFs
[11:07:13] [PASSED] 12 VFs
[11:07:13] [PASSED] 13 VFs
[11:07:13] [PASSED] 14 VFs
[11:07:13] [PASSED] 15 VFs
[11:07:13] [PASSED] 16 VFs
[11:07:13] [PASSED] 17 VFs
[11:07:13] [PASSED] 18 VFs
[11:07:13] [PASSED] 19 VFs
[11:07:13] [PASSED] 20 VFs
[11:07:13] [PASSED] 21 VFs
[11:07:13] [PASSED] 22 VFs
[11:07:13] [PASSED] 23 VFs
[11:07:13] [PASSED] 24 VFs
[11:07:13] [PASSED] 25 VFs
[11:07:13] [PASSED] 26 VFs
[11:07:13] [PASSED] 27 VFs
[11:07:13] [PASSED] 28 VFs
[11:07:13] [PASSED] 29 VFs
[11:07:13] [PASSED] 30 VFs
[11:07:13] [PASSED] 31 VFs
[11:07:13] [PASSED] 32 VFs
[11:07:13] [PASSED] 33 VFs
[11:07:13] [PASSED] 34 VFs
[11:07:13] [PASSED] 35 VFs
[11:07:13] [PASSED] 36 VFs
[11:07:13] [PASSED] 37 VFs
[11:07:13] [PASSED] 38 VFs
[11:07:13] [PASSED] 39 VFs
[11:07:13] [PASSED] 40 VFs
[11:07:13] [PASSED] 41 VFs
[11:07:13] [PASSED] 42 VFs
[11:07:13] [PASSED] 43 VFs
[11:07:13] [PASSED] 44 VFs
[11:07:13] [PASSED] 45 VFs
[11:07:13] [PASSED] 46 VFs
[11:07:13] [PASSED] 47 VFs
[11:07:13] [PASSED] 48 VFs
[11:07:13] [PASSED] 49 VFs
[11:07:13] [PASSED] 50 VFs
[11:07:13] [PASSED] 51 VFs
[11:07:13] [PASSED] 52 VFs
[11:07:13] [PASSED] 53 VFs
[11:07:13] [PASSED] 54 VFs
[11:07:13] [PASSED] 55 VFs
[11:07:13] [PASSED] 56 VFs
[11:07:13] [PASSED] 57 VFs
[11:07:13] [PASSED] 58 VFs
[11:07:13] [PASSED] 59 VFs
[11:07:13] [PASSED] 60 VFs
[11:07:13] [PASSED] 61 VFs
[11:07:13] [PASSED] 62 VFs
[11:07:13] [PASSED] 63 VFs
[11:07:13] ================= [PASSED] fair_doorbells ==================
[11:07:13] ======================== fair_ggtt ========================
[11:07:13] [PASSED] 1 VF
[11:07:13] [PASSED] 2 VFs
[11:07:13] [PASSED] 3 VFs
[11:07:13] [PASSED] 4 VFs
[11:07:13] [PASSED] 5 VFs
[11:07:13] [PASSED] 6 VFs
[11:07:13] [PASSED] 7 VFs
[11:07:13] [PASSED] 8 VFs
[11:07:13] [PASSED] 9 VFs
[11:07:13] [PASSED] 10 VFs
[11:07:13] [PASSED] 11 VFs
[11:07:13] [PASSED] 12 VFs
[11:07:13] [PASSED] 13 VFs
[11:07:13] [PASSED] 14 VFs
[11:07:13] [PASSED] 15 VFs
[11:07:13] [PASSED] 16 VFs
[11:07:13] [PASSED] 17 VFs
[11:07:13] [PASSED] 18 VFs
[11:07:13] [PASSED] 19 VFs
[11:07:13] [PASSED] 20 VFs
[11:07:13] [PASSED] 21 VFs
[11:07:13] [PASSED] 22 VFs
[11:07:13] [PASSED] 23 VFs
[11:07:13] [PASSED] 24 VFs
[11:07:13] [PASSED] 25 VFs
[11:07:13] [PASSED] 26 VFs
[11:07:13] [PASSED] 27 VFs
[11:07:13] [PASSED] 28 VFs
[11:07:13] [PASSED] 29 VFs
[11:07:13] [PASSED] 30 VFs
[11:07:13] [PASSED] 31 VFs
[11:07:13] [PASSED] 32 VFs
[11:07:13] [PASSED] 33 VFs
[11:07:13] [PASSED] 34 VFs
[11:07:13] [PASSED] 35 VFs
[11:07:13] [PASSED] 36 VFs
[11:07:13] [PASSED] 37 VFs
[11:07:13] [PASSED] 38 VFs
[11:07:13] [PASSED] 39 VFs
[11:07:13] [PASSED] 40 VFs
[11:07:13] [PASSED] 41 VFs
[11:07:13] [PASSED] 42 VFs
[11:07:13] [PASSED] 43 VFs
[11:07:13] [PASSED] 44 VFs
[11:07:13] [PASSED] 45 VFs
[11:07:13] [PASSED] 46 VFs
[11:07:13] [PASSED] 47 VFs
[11:07:13] [PASSED] 48 VFs
[11:07:13] [PASSED] 49 VFs
[11:07:13] [PASSED] 50 VFs
[11:07:13] [PASSED] 51 VFs
[11:07:13] [PASSED] 52 VFs
[11:07:13] [PASSED] 53 VFs
[11:07:13] [PASSED] 54 VFs
[11:07:13] [PASSED] 55 VFs
[11:07:13] [PASSED] 56 VFs
[11:07:13] [PASSED] 57 VFs
[11:07:13] [PASSED] 58 VFs
[11:07:13] [PASSED] 59 VFs
[11:07:13] [PASSED] 60 VFs
[11:07:13] [PASSED] 61 VFs
[11:07:13] [PASSED] 62 VFs
[11:07:13] [PASSED] 63 VFs
[11:07:13] ==================== [PASSED] fair_ggtt ====================
[11:07:13] ======================== fair_vram ========================
[11:07:13] [PASSED] 1 VF
[11:07:13] [PASSED] 2 VFs
[11:07:13] [PASSED] 3 VFs
[11:07:13] [PASSED] 4 VFs
[11:07:13] [PASSED] 5 VFs
[11:07:13] [PASSED] 6 VFs
[11:07:13] [PASSED] 7 VFs
[11:07:13] [PASSED] 8 VFs
[11:07:13] [PASSED] 9 VFs
[11:07:13] [PASSED] 10 VFs
[11:07:14] [PASSED] 11 VFs
[11:07:14] [PASSED] 12 VFs
[11:07:14] [PASSED] 13 VFs
[11:07:14] [PASSED] 14 VFs
[11:07:14] [PASSED] 15 VFs
[11:07:14] [PASSED] 16 VFs
[11:07:14] [PASSED] 17 VFs
[11:07:14] [PASSED] 18 VFs
[11:07:14] [PASSED] 19 VFs
[11:07:14] [PASSED] 20 VFs
[11:07:14] [PASSED] 21 VFs
[11:07:14] [PASSED] 22 VFs
[11:07:14] [PASSED] 23 VFs
[11:07:14] [PASSED] 24 VFs
[11:07:14] [PASSED] 25 VFs
[11:07:14] [PASSED] 26 VFs
[11:07:14] [PASSED] 27 VFs
[11:07:14] [PASSED] 28 VFs
[11:07:14] [PASSED] 29 VFs
[11:07:14] [PASSED] 30 VFs
[11:07:14] [PASSED] 31 VFs
[11:07:14] [PASSED] 32 VFs
[11:07:14] [PASSED] 33 VFs
[11:07:14] [PASSED] 34 VFs
[11:07:14] [PASSED] 35 VFs
[11:07:14] [PASSED] 36 VFs
[11:07:14] [PASSED] 37 VFs
[11:07:14] [PASSED] 38 VFs
[11:07:14] [PASSED] 39 VFs
[11:07:14] [PASSED] 40 VFs
[11:07:14] [PASSED] 41 VFs
[11:07:14] [PASSED] 42 VFs
[11:07:14] [PASSED] 43 VFs
[11:07:14] [PASSED] 44 VFs
[11:07:14] [PASSED] 45 VFs
[11:07:14] [PASSED] 46 VFs
[11:07:14] [PASSED] 47 VFs
[11:07:14] [PASSED] 48 VFs
[11:07:14] [PASSED] 49 VFs
[11:07:14] [PASSED] 50 VFs
[11:07:14] [PASSED] 51 VFs
[11:07:14] [PASSED] 52 VFs
[11:07:14] [PASSED] 53 VFs
[11:07:14] [PASSED] 54 VFs
[11:07:14] [PASSED] 55 VFs
[11:07:14] [PASSED] 56 VFs
[11:07:14] [PASSED] 57 VFs
[11:07:14] [PASSED] 58 VFs
[11:07:14] [PASSED] 59 VFs
[11:07:14] [PASSED] 60 VFs
[11:07:14] [PASSED] 61 VFs
[11:07:14] [PASSED] 62 VFs
[11:07:14] [PASSED] 63 VFs
[11:07:14] ==================== [PASSED] fair_vram ====================
[11:07:14] ================== [PASSED] pf_gt_config ===================
[11:07:14] ===================== lmtt (1 subtest) =====================
[11:07:14] ======================== test_ops =========================
[11:07:14] [PASSED] 2-level
[11:07:14] [PASSED] multi-level
[11:07:14] ==================== [PASSED] test_ops =====================
[11:07:14] ====================== [PASSED] lmtt =======================
[11:07:14] ================= sriov_packet (1 subtest) =================
[11:07:14] [PASSED] test_descriptor_init
[11:07:14] ================== [PASSED] sriov_packet ===================
[11:07:14] ================= pf_service (11 subtests) =================
[11:07:14] [PASSED] pf_negotiate_any
[11:07:14] [PASSED] pf_negotiate_base_match
[11:07:14] [PASSED] pf_negotiate_base_newer
[11:07:14] [PASSED] pf_negotiate_base_next
[11:07:14] [SKIPPED] pf_negotiate_base_older (no older minor)
[11:07:14] [PASSED] pf_negotiate_base_prev
[11:07:14] [PASSED] pf_negotiate_latest_match
[11:07:14] [PASSED] pf_negotiate_latest_newer
[11:07:14] [PASSED] pf_negotiate_latest_next
[11:07:14] [SKIPPED] pf_negotiate_latest_older (no older minor)
[11:07:14] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[11:07:14] =================== [PASSED] pf_service ====================
[11:07:14] ================= xe_guc_g2g (2 subtests) ==================
[11:07:14] ============== xe_live_guc_g2g_kunit_default ==============
[11:07:14] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:07:14] ============== xe_live_guc_g2g_kunit_allmem ===============
[11:07:14] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:07:14] =================== [SKIPPED] xe_guc_g2g ===================
[11:07:14] =================== xe_mocs (2 subtests) ===================
[11:07:14] ================ xe_live_mocs_kernel_kunit ================
[11:07:14] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:07:14] ================ xe_live_mocs_reset_kunit =================
[11:07:14] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:07:14] ==================== [SKIPPED] xe_mocs =====================
[11:07:14] ================= xe_migrate (3 subtests) ==================
[11:07:14] ================= xe_migrate_sanity_kunit =================
[11:07:14] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:07:14] ================== xe_validate_ccs_kunit ==================
[11:07:14] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:07:14] ============= xe_migrate_access_memory_kunit ==============
[11:07:14] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[11:07:14] =================== [SKIPPED] xe_migrate ===================
[11:07:14] ================== xe_dma_buf (1 subtest) ==================
[11:07:14] ==================== xe_dma_buf_kunit =====================
[11:07:14] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:07:14] =================== [SKIPPED] xe_dma_buf ===================
[11:07:14] ================= xe_bo_shrink (1 subtest) =================
[11:07:14] =================== xe_bo_shrink_kunit ====================
[11:07:14] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:07:14] ================== [SKIPPED] xe_bo_shrink ==================
[11:07:14] ==================== xe_bo (2 subtests) ====================
[11:07:14] ================== xe_ccs_migrate_kunit ===================
[11:07:14] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:07:14] ==================== xe_bo_evict_kunit ====================
[11:07:14] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:07:14] ===================== [SKIPPED] xe_bo ======================
[11:07:14] =================== xe_any (9 subtests) ====================
[11:07:14] [PASSED] test_to_xe
[11:07:14] [PASSED] test_to_dev
[11:07:14] [PASSED] test_to_pdev
[11:07:14] [PASSED] test_to_drm
[11:07:14] [PASSED] test_if_pdev
[11:07:14] [PASSED] test_if_xe
[11:07:14] [PASSED] test_if_tile
[11:07:14] [PASSED] test_if_gt
[11:07:14] [PASSED] test_to_id
[11:07:14] ===================== [PASSED] xe_any ======================
[11:07:14] ==================== args (13 subtests) ====================
[11:07:14] [PASSED] count_args_test
[11:07:14] [PASSED] call_args_example
[11:07:14] [PASSED] call_args_test
[11:07:14] [PASSED] drop_first_arg_example
[11:07:14] [PASSED] drop_first_arg_test
[11:07:14] [PASSED] first_arg_example
[11:07:14] [PASSED] first_arg_test
[11:07:14] [PASSED] last_arg_example
[11:07:14] [PASSED] last_arg_test
[11:07:14] [PASSED] pick_arg_example
[11:07:14] [PASSED] if_args_example
[11:07:14] [PASSED] if_args_test
[11:07:14] [PASSED] sep_comma_example
[11:07:14] ====================== [PASSED] args =======================
[11:07:14] =================== xe_pci (3 subtests) ====================
[11:07:14] ==================== check_graphics_ip ====================
[11:07:14] [PASSED] 12.00 Xe_LP
[11:07:14] [PASSED] 12.10 Xe_LP+
[11:07:14] [PASSED] 12.55 Xe_HPG
[11:07:14] [PASSED] 12.60 Xe_HPC
[11:07:14] [PASSED] 12.70 Xe_LPG
[11:07:14] [PASSED] 12.71 Xe_LPG
[11:07:14] [PASSED] 12.74 Xe_LPG+
[11:07:14] [PASSED] 20.01 Xe2_HPG
[11:07:14] [PASSED] 20.02 Xe2_HPG
[11:07:14] [PASSED] 20.04 Xe2_LPG
[11:07:14] [PASSED] 30.00 Xe3_LPG
[11:07:14] [PASSED] 30.01 Xe3_LPG
[11:07:14] [PASSED] 30.03 Xe3_LPG
[11:07:14] [PASSED] 30.04 Xe3_LPG
[11:07:14] [PASSED] 30.05 Xe3_LPG
[11:07:14] [PASSED] 35.10 Xe3p_LPG
[11:07:14] [PASSED] 35.11 Xe3p_XPC
[11:07:14] ================ [PASSED] check_graphics_ip ================
[11:07:14] ===================== check_media_ip ======================
[11:07:14] [PASSED] 12.00 Xe_M
[11:07:14] [PASSED] 12.55 Xe_HPM
[11:07:14] [PASSED] 13.00 Xe_LPM+
[11:07:14] [PASSED] 13.01 Xe2_HPM
[11:07:14] [PASSED] 20.00 Xe2_LPM
[11:07:14] [PASSED] 30.00 Xe3_LPM
[11:07:14] [PASSED] 30.02 Xe3_LPM
[11:07:14] [PASSED] 35.00 Xe3p_LPM
[11:07:14] [PASSED] 35.03 Xe3p_HPM
[11:07:14] ================= [PASSED] check_media_ip ==================
[11:07:14] =================== check_platform_desc ===================
[11:07:14] [PASSED] 0x9A60 (TIGERLAKE)
[11:07:14] [PASSED] 0x9A68 (TIGERLAKE)
[11:07:14] [PASSED] 0x9A70 (TIGERLAKE)
[11:07:14] [PASSED] 0x9A40 (TIGERLAKE)
[11:07:14] [PASSED] 0x9A49 (TIGERLAKE)
[11:07:14] [PASSED] 0x9A59 (TIGERLAKE)
[11:07:14] [PASSED] 0x9A78 (TIGERLAKE)
[11:07:14] [PASSED] 0x9AC0 (TIGERLAKE)
[11:07:14] [PASSED] 0x9AC9 (TIGERLAKE)
[11:07:14] [PASSED] 0x9AD9 (TIGERLAKE)
[11:07:14] [PASSED] 0x9AF8 (TIGERLAKE)
[11:07:14] [PASSED] 0x4C80 (ROCKETLAKE)
[11:07:14] [PASSED] 0x4C8A (ROCKETLAKE)
[11:07:14] [PASSED] 0x4C8B (ROCKETLAKE)
[11:07:14] [PASSED] 0x4C8C (ROCKETLAKE)
[11:07:14] [PASSED] 0x4C90 (ROCKETLAKE)
[11:07:14] [PASSED] 0x4C9A (ROCKETLAKE)
[11:07:14] [PASSED] 0x4680 (ALDERLAKE_S)
[11:07:14] [PASSED] 0x4682 (ALDERLAKE_S)
[11:07:14] [PASSED] 0x4688 (ALDERLAKE_S)
[11:07:14] [PASSED] 0x468A (ALDERLAKE_S)
[11:07:14] [PASSED] 0x468B (ALDERLAKE_S)
[11:07:14] [PASSED] 0x4690 (ALDERLAKE_S)
[11:07:14] [PASSED] 0x4692 (ALDERLAKE_S)
[11:07:14] [PASSED] 0x4693 (ALDERLAKE_S)
[11:07:14] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46AA (ALDERLAKE_P)
[11:07:14] [PASSED] 0x462A (ALDERLAKE_P)
[11:07:14] [PASSED] 0x4626 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x4628 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46B0 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:07:14] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:07:14] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:07:14] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:07:14] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:07:14] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:07:14] [PASSED] 0xA721 (ALDERLAKE_P)
[11:07:14] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:07:14] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:07:14] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:07:14] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:07:14] [PASSED] 0xA720 (ALDERLAKE_P)
[11:07:14] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:07:14] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:07:14] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:07:14] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:07:14] [PASSED] 0xA780 (ALDERLAKE_S)
[11:07:14] [PASSED] 0xA781 (ALDERLAKE_S)
[11:07:14] [PASSED] 0xA782 (ALDERLAKE_S)
[11:07:14] [PASSED] 0xA783 (ALDERLAKE_S)
[11:07:14] [PASSED] 0xA788 (ALDERLAKE_S)
[11:07:14] [PASSED] 0xA789 (ALDERLAKE_S)
[11:07:14] [PASSED] 0xA78A (ALDERLAKE_S)
[11:07:14] [PASSED] 0xA78B (ALDERLAKE_S)
[11:07:14] [PASSED] 0x4905 (DG1)
[11:07:14] [PASSED] 0x4906 (DG1)
[11:07:14] [PASSED] 0x4907 (DG1)
[11:07:14] [PASSED] 0x4908 (DG1)
[11:07:14] [PASSED] 0x4909 (DG1)
[11:07:14] [PASSED] 0x56C0 (DG2)
[11:07:14] [PASSED] 0x56C2 (DG2)
[11:07:14] [PASSED] 0x56C1 (DG2)
[11:07:14] [PASSED] 0x7D51 (METEORLAKE)
[11:07:14] [PASSED] 0x7DD1 (METEORLAKE)
[11:07:14] [PASSED] 0x7D41 (METEORLAKE)
[11:07:14] [PASSED] 0x7D67 (METEORLAKE)
[11:07:14] [PASSED] 0xB640 (METEORLAKE)
[11:07:14] [PASSED] 0x56A0 (DG2)
[11:07:14] [PASSED] 0x56A1 (DG2)
[11:07:14] [PASSED] 0x56A2 (DG2)
[11:07:14] [PASSED] 0x56BE (DG2)
[11:07:14] [PASSED] 0x56BF (DG2)
[11:07:14] [PASSED] 0x5690 (DG2)
[11:07:14] [PASSED] 0x5691 (DG2)
[11:07:14] [PASSED] 0x5692 (DG2)
[11:07:14] [PASSED] 0x56A5 (DG2)
[11:07:14] [PASSED] 0x56A6 (DG2)
[11:07:14] [PASSED] 0x56B0 (DG2)
[11:07:14] [PASSED] 0x56B1 (DG2)
[11:07:14] [PASSED] 0x56BA (DG2)
[11:07:14] [PASSED] 0x56BB (DG2)
[11:07:14] [PASSED] 0x56BC (DG2)
[11:07:14] [PASSED] 0x56BD (DG2)
[11:07:14] [PASSED] 0x5693 (DG2)
[11:07:14] [PASSED] 0x5694 (DG2)
[11:07:14] [PASSED] 0x5695 (DG2)
[11:07:14] [PASSED] 0x56A3 (DG2)
[11:07:14] [PASSED] 0x56A4 (DG2)
[11:07:14] [PASSED] 0x56B2 (DG2)
[11:07:14] [PASSED] 0x56B3 (DG2)
[11:07:14] [PASSED] 0x5696 (DG2)
[11:07:14] [PASSED] 0x5697 (DG2)
[11:07:14] [PASSED] 0xB69 (PVC)
[11:07:14] [PASSED] 0xB6E (PVC)
[11:07:14] [PASSED] 0xBD4 (PVC)
[11:07:14] [PASSED] 0xBD5 (PVC)
[11:07:14] [PASSED] 0xBD6 (PVC)
[11:07:14] [PASSED] 0xBD7 (PVC)
[11:07:14] [PASSED] 0xBD8 (PVC)
[11:07:14] [PASSED] 0xBD9 (PVC)
[11:07:14] [PASSED] 0xBDA (PVC)
[11:07:14] [PASSED] 0xBDB (PVC)
[11:07:14] [PASSED] 0xBE0 (PVC)
[11:07:14] [PASSED] 0xBE1 (PVC)
[11:07:14] [PASSED] 0xBE5 (PVC)
[11:07:14] [PASSED] 0x7D40 (METEORLAKE)
[11:07:14] [PASSED] 0x7D45 (METEORLAKE)
[11:07:14] [PASSED] 0x7D55 (METEORLAKE)
[11:07:14] [PASSED] 0x7D60 (METEORLAKE)
[11:07:14] [PASSED] 0x7DD5 (METEORLAKE)
[11:07:14] [PASSED] 0x6420 (LUNARLAKE)
[11:07:14] [PASSED] 0x64A0 (LUNARLAKE)
[11:07:14] [PASSED] 0x64B0 (LUNARLAKE)
[11:07:14] [PASSED] 0xE202 (BATTLEMAGE)
[11:07:14] [PASSED] 0xE209 (BATTLEMAGE)
[11:07:14] [PASSED] 0xE20B (BATTLEMAGE)
[11:07:14] [PASSED] 0xE20C (BATTLEMAGE)
[11:07:14] [PASSED] 0xE20D (BATTLEMAGE)
[11:07:14] [PASSED] 0xE210 (BATTLEMAGE)
[11:07:14] [PASSED] 0xE211 (BATTLEMAGE)
[11:07:14] [PASSED] 0xE212 (BATTLEMAGE)
[11:07:14] [PASSED] 0xE216 (BATTLEMAGE)
[11:07:14] [PASSED] 0xE220 (BATTLEMAGE)
[11:07:14] [PASSED] 0xE221 (BATTLEMAGE)
[11:07:14] [PASSED] 0xE222 (BATTLEMAGE)
[11:07:14] [PASSED] 0xE223 (BATTLEMAGE)
[11:07:14] [PASSED] 0xB080 (PANTHERLAKE)
[11:07:14] [PASSED] 0xB081 (PANTHERLAKE)
[11:07:14] [PASSED] 0xB082 (PANTHERLAKE)
[11:07:14] [PASSED] 0xB083 (PANTHERLAKE)
[11:07:14] [PASSED] 0xB084 (PANTHERLAKE)
[11:07:14] [PASSED] 0xB085 (PANTHERLAKE)
[11:07:14] [PASSED] 0xB086 (PANTHERLAKE)
[11:07:14] [PASSED] 0xB087 (PANTHERLAKE)
[11:07:14] [PASSED] 0xB08F (PANTHERLAKE)
[11:07:14] [PASSED] 0xB090 (PANTHERLAKE)
[11:07:14] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:07:14] [PASSED] 0xB0A1 (PANTHERLAKE)
[11:07:14] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:07:14] [PASSED] 0xFD80 (PANTHERLAKE)
[11:07:14] [PASSED] 0xFD81 (PANTHERLAKE)
[11:07:14] [PASSED] 0xD740 (NOVALAKE_S)
[11:07:14] [PASSED] 0xD741 (NOVALAKE_S)
[11:07:14] [PASSED] 0xD742 (NOVALAKE_S)
[11:07:14] [PASSED] 0xD743 (NOVALAKE_S)
[11:07:14] [PASSED] 0xD745 (NOVALAKE_S)
[11:07:14] [PASSED] 0xD74A (NOVALAKE_S)
[11:07:14] [PASSED] 0xD74B (NOVALAKE_S)
[11:07:14] [PASSED] 0x674C (CRESCENTISLAND)
[11:07:14] [PASSED] 0x674D (CRESCENTISLAND)
[11:07:14] [PASSED] 0x674E (CRESCENTISLAND)
[11:07:14] [PASSED] 0x674F (CRESCENTISLAND)
[11:07:14] [PASSED] 0x6750 (CRESCENTISLAND)
[11:07:14] [PASSED] 0x6751 (CRESCENTISLAND)
[11:07:14] [PASSED] 0x6752 (CRESCENTISLAND)
[11:07:14] [PASSED] 0xD750 (NOVALAKE_P)
[11:07:14] [PASSED] 0xD751 (NOVALAKE_P)
[11:07:14] [PASSED] 0xD752 (NOVALAKE_P)
[11:07:14] [PASSED] 0xD753 (NOVALAKE_P)
[11:07:14] [PASSED] 0xD754 (NOVALAKE_P)
[11:07:14] [PASSED] 0xD755 (NOVALAKE_P)
[11:07:14] [PASSED] 0xD756 (NOVALAKE_P)
[11:07:14] [PASSED] 0xD757 (NOVALAKE_P)
[11:07:14] [PASSED] 0xD75F (NOVALAKE_P)
[11:07:14] =============== [PASSED] check_platform_desc ===============
[11:07:14] ===================== [PASSED] xe_pci ======================
[11:07:14] ============= xe_rtp_tables_test (5 subtests) ==============
[11:07:14] ================== xe_rtp_table_gt_test ===================
[11:07:14] [PASSED] gt_was/14011060649
[11:07:14] [PASSED] gt_was/14011059788
[11:07:14] [PASSED] gt_was/14015795083
[11:07:14] [PASSED] gt_was/16021867713
[11:07:14] [PASSED] gt_was/14019449301
[11:07:14] [PASSED] gt_was/16028005424
[11:07:14] [PASSED] gt_was/14026578760
[11:07:14] [PASSED] gt_was/1409420604
[11:07:14] [PASSED] gt_was/1408615072
[11:07:14] [PASSED] gt_was/22010523718
[11:07:14] [PASSED] gt_was/14011006942
[11:07:14] [PASSED] gt_was/14014830051
[11:07:14] [PASSED] gt_was/18018781329
[11:07:14] [PASSED] gt_was/1509235366
[11:07:14] [PASSED] gt_was/18018781329
[11:07:14] [PASSED] gt_was/16016694945
[11:07:14] [PASSED] gt_was/14018575942
[11:07:14] [PASSED] gt_was/22016670082
[11:07:14] [PASSED] gt_was/22016670082
[11:07:14] [PASSED] gt_was/14017421178
[11:07:14] [PASSED] gt_was/16025250150
[11:07:14] [PASSED] gt_was/14021871409
[11:07:14] [PASSED] gt_was/16021865536
[11:07:14] [PASSED] gt_was/14021486841
[11:07:14] [PASSED] gt_was/14025160223
[11:07:14] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[11:07:14] [PASSED] gt_was/14025635424
[11:07:14] [PASSED] gt_was/16028005424
[11:07:14] ============== [PASSED] xe_rtp_table_gt_test ===============
[11:07:14] ================== xe_rtp_table_gt_test ===================
[11:07:14] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[11:07:14] [PASSED] gt_tunings/Tuning: 32B Access Enable
[11:07:14] [PASSED] gt_tunings/Tuning: L3 cache
[11:07:14] [PASSED] gt_tunings/Tuning: L3 cache - media
[11:07:14] [PASSED] gt_tunings/Tuning: Compression Overfetch
[11:07:14] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[11:07:14] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[11:07:14] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[11:07:14] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[11:07:14] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[11:07:14] [PASSED] gt_tunings/Tuning: Stateless compression control
[11:07:14] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[11:07:14] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[11:07:14] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[11:07:14] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[11:07:14] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[11:07:14] ============== [PASSED] xe_rtp_table_gt_test ===============
[11:07:14] ================== xe_rtp_table_oob_test ==================
[11:07:14] [PASSED] oob_was/1607983814
[11:07:14] [PASSED] oob_was/16010904313
[11:07:14] [PASSED] oob_was/18022495364
[11:07:14] [PASSED] oob_was/22012773006
[11:07:14] [PASSED] oob_was/14014475959
[11:07:14] [PASSED] oob_was/22011391025
[11:07:14] [PASSED] oob_was/22012727170
[11:07:14] [PASSED] oob_was/22012727685
[11:07:14] [PASSED] oob_was/22016596838
[11:07:14] [PASSED] oob_was/18020744125
[11:07:14] [PASSED] oob_was/1409600907
[11:07:14] [PASSED] oob_was/22014953428
[11:07:14] [PASSED] oob_was/16017236439
[11:07:14] [PASSED] oob_was/14019821291
[11:07:14] [PASSED] oob_was/14015076503
[11:07:14] [PASSED] oob_was/22016122933
[11:07:14] [PASSED] oob_was/14018913170
[11:07:14] [PASSED] oob_was/14018094691
[11:07:14] [PASSED] oob_was/18024947630
[11:07:14] [PASSED] oob_was/16022287689
[11:07:14] [PASSED] oob_was/13011645652
[11:07:14] [PASSED] oob_was/14022293748
[11:07:14] [PASSED] oob_was/22019794406
[11:07:14] [PASSED] oob_was/22019338487
[11:07:14] [PASSED] oob_was/16023588340
[11:07:14] [PASSED] oob_was/14019789679
[11:07:14] [PASSED] oob_was/14022866841
[11:07:14] [PASSED] oob_was/16021333562
[11:07:14] [PASSED] oob_was/14016712196
[11:07:14] [PASSED] oob_was/14015568240
[11:07:14] [PASSED] oob_was/18013179988
[11:07:14] [PASSED] oob_was/1508761755
[11:07:14] [PASSED] oob_was/16023105232
[11:07:14] [PASSED] oob_was/16026508708
[11:07:14] [PASSED] oob_was/14020001231
[11:07:14] [PASSED] oob_was/16023683509
[11:07:14] [PASSED] oob_was/14025515070
[11:07:14] [PASSED] oob_was/15015404425_disable
[11:07:14] [PASSED] oob_was/16026007364
[11:07:14] [PASSED] oob_was/14020316580
[11:07:14] [PASSED] oob_was/14025883347
[11:07:14] [PASSED] oob_was/16029380221
[11:07:14] [PASSED] oob_was/22022079272
[11:07:14] [PASSED] oob_was/16029897822
[11:07:14] [PASSED] oob_was/14026539277
[11:07:14] [PASSED] oob_was/14027054324
[11:07:14] [PASSED] oob_was/14025941587
[11:07:14] [PASSED] oob_was/16030224309
[11:07:14] [PASSED] oob_was/14028709524
[11:07:14] [PASSED] oob_was/14028250015
[11:07:14] [PASSED] oob_was/16031259911
[11:07:14] ============== [PASSED] xe_rtp_table_oob_test ==============
[11:07:14] ================ xe_rtp_table_dev_oob_test ================
[11:07:14] [PASSED] device_oob_was/22010954014
[11:07:14] [PASSED] device_oob_was/15015404425
[11:07:14] [PASSED] device_oob_was/22019338487_display
[11:07:14] [PASSED] device_oob_was/14022085890
[11:07:14] [PASSED] device_oob_was/14026633728
[11:07:14] [PASSED] device_oob_was/14026746987
[11:07:14] [PASSED] device_oob_was/14026779378
[11:07:14] [PASSED] device_oob_was/14028586678
[11:07:14] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[11:07:14] ========== xe_rtp_table_missing_upper_bound_test ==========
[11:07:14] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[11:07:14] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[11:07:14] [PASSED] register_whitelist/1806527549
[11:07:14] [PASSED] register_whitelist/allow_read_ctx_timestamp
[11:07:14] [PASSED] register_whitelist/allow_read_queue_timestamp
[11:07:14] [PASSED] register_whitelist/16014440446
[11:07:14] [PASSED] register_whitelist/16017236439
[11:07:14] [PASSED] register_whitelist/16020183090
[11:07:14] [PASSED] register_whitelist/14024997852
[11:07:14] [PASSED] register_whitelist/14024997852
[11:07:14] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[11:07:14] =============== [PASSED] xe_rtp_tables_test ================
[11:07:14] =================== xe_rtp (3 subtests) ====================
[11:07:14] =================== xe_rtp_rules_tests ====================
[11:07:14] [PASSED] no
[11:07:14] [PASSED] yes
[11:07:14] [PASSED] no-and-no
[11:07:14] [PASSED] no-and-yes
[11:07:14] [PASSED] yes-and-no
[11:07:14] [PASSED] yes-and-yes
[11:07:14] [PASSED] no-or-no
[11:07:14] [PASSED] no-or-yes
[11:07:14] [PASSED] yes-or-no
[11:07:14] [PASSED] yes-or-yes
[11:07:14] [PASSED] no-yes-or-yes-no
[11:07:14] [PASSED] no-yes-or-yes-yes
[11:07:14] [PASSED] yes-yes-or-no-yes
[11:07:14] [PASSED] yes-yes-or-yes-yes
[11:07:14] [PASSED] no-no-or-yes-or-no
[11:07:14] [PASSED] or
[11:07:14] [PASSED] or-yes
[11:07:14] [PASSED] or-no
[11:07:14] [PASSED] yes-or
[11:07:14] [PASSED] no-or
[11:07:14] [PASSED] no-or-or-yes
[11:07:14] [PASSED] yes-or-or-no
[11:07:14] [PASSED] no-or-or-no
[11:07:14] [PASSED] missing-context-engine-class
[11:07:14] [PASSED] missing-context-engine-class-or-yes
[11:07:14] [PASSED] missing-context-engine-class-or-or-yes
[11:07:14] =============== [PASSED] xe_rtp_rules_tests ================
[11:07:14] =============== xe_rtp_process_to_sr_tests ================
[11:07:14] [PASSED] coalesce-same-reg
[11:07:14] [PASSED] coalesce-same-reg-literal-and-func
[11:07:14] [PASSED] no-match-no-add
[11:07:14] [PASSED] two-regs-two-entries
[11:07:14] [PASSED] clr-one-set-other
[11:07:14] [PASSED] set-field
[11:07:14] [PASSED] conflict-duplicate
[11:07:14] [PASSED] conflict-not-disjoint
[11:07:14] [PASSED] conflict-not-disjoint-literal-and-func
[11:07:14] [PASSED] conflict-reg-type
[11:07:14] [PASSED] bad-mcr-reg-forced-to-regular
[11:07:14] [PASSED] bad-regular-reg-forced-to-mcr
[11:07:14] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:07:14] ================== xe_rtp_process_tests ===================
[11:07:14] [PASSED] active1
[11:07:14] [PASSED] active2
[11:07:14] [PASSED] active-inactive
[11:07:14] [PASSED] inactive-active
[11:07:14] [PASSED] inactive-active-inactive
[11:07:14] [PASSED] inactive-inactive-inactive
[11:07:14] ============== [PASSED] xe_rtp_process_tests ===============
[11:07:14] ===================== [PASSED] xe_rtp ======================
[11:07:14] ==================== xe_wa (1 subtest) =====================
[11:07:14] ======================== xe_wa_gt =========================
[11:07:14] [PASSED] TIGERLAKE B0
[11:07:14] [PASSED] DG1 A0
[11:07:14] [PASSED] DG1 B0
[11:07:14] [PASSED] ALDERLAKE_S A0
[11:07:14] [PASSED] ALDERLAKE_S B0
[11:07:14] [PASSED] ALDERLAKE_S C0
[11:07:14] [PASSED] ALDERLAKE_S D0
[11:07:14] [PASSED] ALDERLAKE_P A0
[11:07:14] [PASSED] ALDERLAKE_P B0
[11:07:14] [PASSED] ALDERLAKE_P C0
[11:07:14] [PASSED] ALDERLAKE_S RPLS D0
[11:07:14] [PASSED] ALDERLAKE_P RPLU E0
[11:07:14] [PASSED] DG2 G10 C0
[11:07:14] [PASSED] DG2 G11 B1
[11:07:14] [PASSED] DG2 G12 A1
[11:07:14] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:07:14] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:07:14] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:07:14] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:07:14] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:07:14] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:07:14] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:07:14] ==================== [PASSED] xe_wa_gt =====================
[11:07:14] ====================== [PASSED] xe_wa ======================
[11:07:14] ============================================================
[11:07:14] Testing complete. Ran 843 tests: passed: 814, skipped: 29
[11:07:14] Elapsed time: 41.508s total, 2.508s configuring, 38.234s building, 0.714s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:07:14] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:07:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:07:42] Starting KUnit Kernel (1/1)...
[11:07:42] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:07:42] ============ drm_test_pick_cmdline (2 subtests) ============
[11:07:42] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:07:42] =============== drm_test_pick_cmdline_named ===============
[11:07:42] [PASSED] NTSC
[11:07:42] [PASSED] NTSC-J
[11:07:42] [PASSED] PAL
[11:07:42] [PASSED] PAL-M
[11:07:42] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:07:42] ============== [PASSED] drm_test_pick_cmdline ==============
[11:07:42] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:07:42] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:07:42] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:07:42] =========== drm_validate_clone_mode (2 subtests) ===========
[11:07:42] ============== drm_test_check_in_clone_mode ===============
[11:07:42] [PASSED] in_clone_mode
[11:07:42] [PASSED] not_in_clone_mode
[11:07:42] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:07:42] =============== drm_test_check_valid_clones ===============
[11:07:42] [PASSED] not_in_clone_mode
[11:07:42] [PASSED] valid_clone
[11:07:42] [PASSED] invalid_clone
[11:07:42] =========== [PASSED] drm_test_check_valid_clones ===========
[11:07:42] ============= [PASSED] drm_validate_clone_mode =============
[11:07:42] ============= drm_validate_modeset (1 subtest) =============
[11:07:42] [PASSED] drm_test_check_connector_changed_modeset
[11:07:42] ============== [PASSED] drm_validate_modeset ===============
[11:07:42] ====== drm_test_bridge_get_current_state (1 subtest) =======
[11:07:42] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:07:42] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:07:42] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:07:42] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:07:42] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:07:42] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[11:07:42] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:07:42] ============== drm_bridge_alloc (2 subtests) ===============
[11:07:42] [PASSED] drm_test_drm_bridge_alloc_basic
[11:07:42] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:07:42] ================ [PASSED] drm_bridge_alloc =================
[11:07:42] ============= drm_bridge_bus_fmt (5 subtests) ==============
[11:07:42] [PASSED] drm_test_bridge_rgb_yuv_rgb
[11:07:42] [PASSED] drm_test_bridge_must_convert_to_yuv444
[11:07:42] [PASSED] drm_test_bridge_hdmi_auto_rgb
[11:07:42] [PASSED] drm_test_bridge_auto_first
[11:07:42] [PASSED] drm_test_bridge_rgb_yuv_no_path
[11:07:42] =============== [PASSED] drm_bridge_bus_fmt ================
[11:07:42] ============= drm_cmdline_parser (40 subtests) =============
[11:07:42] [PASSED] drm_test_cmdline_force_d_only
[11:07:42] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:07:42] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:07:42] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:07:42] [PASSED] drm_test_cmdline_force_e_only
[11:07:42] [PASSED] drm_test_cmdline_res
[11:07:42] [PASSED] drm_test_cmdline_res_vesa
[11:07:42] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:07:42] [PASSED] drm_test_cmdline_res_rblank
[11:07:42] [PASSED] drm_test_cmdline_res_bpp
[11:07:42] [PASSED] drm_test_cmdline_res_refresh
[11:07:42] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:07:42] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:07:42] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:07:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:07:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:07:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:07:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:07:42] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:07:42] [PASSED] drm_test_cmdline_res_margins_force_on
[11:07:42] [PASSED] drm_test_cmdline_res_vesa_margins
[11:07:42] [PASSED] drm_test_cmdline_name
[11:07:42] [PASSED] drm_test_cmdline_name_bpp
[11:07:42] [PASSED] drm_test_cmdline_name_option
[11:07:42] [PASSED] drm_test_cmdline_name_bpp_option
[11:07:42] [PASSED] drm_test_cmdline_rotate_0
[11:07:42] [PASSED] drm_test_cmdline_rotate_90
[11:07:42] [PASSED] drm_test_cmdline_rotate_180
[11:07:42] [PASSED] drm_test_cmdline_rotate_270
[11:07:42] [PASSED] drm_test_cmdline_hmirror
[11:07:42] [PASSED] drm_test_cmdline_vmirror
[11:07:42] [PASSED] drm_test_cmdline_margin_options
[11:07:42] [PASSED] drm_test_cmdline_multiple_options
[11:07:42] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:07:42] [PASSED] drm_test_cmdline_extra_and_option
[11:07:42] [PASSED] drm_test_cmdline_freestanding_options
[11:07:42] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:07:42] [PASSED] drm_test_cmdline_panel_orientation
[11:07:42] ================ drm_test_cmdline_invalid =================
[11:07:42] [PASSED] margin_only
[11:07:42] [PASSED] interlace_only
[11:07:42] [PASSED] res_missing_x
[11:07:42] [PASSED] res_missing_y
[11:07:42] [PASSED] res_bad_y
[11:07:42] [PASSED] res_missing_y_bpp
[11:07:42] [PASSED] res_bad_bpp
[11:07:42] [PASSED] res_bad_refresh
[11:07:42] [PASSED] res_bpp_refresh_force_on_off
[11:07:42] [PASSED] res_invalid_mode
[11:07:42] [PASSED] res_bpp_wrong_place_mode
[11:07:42] [PASSED] name_bpp_refresh
[11:07:42] [PASSED] name_refresh
[11:07:42] [PASSED] name_refresh_wrong_mode
[11:07:42] [PASSED] name_refresh_invalid_mode
[11:07:42] [PASSED] rotate_multiple
[11:07:42] [PASSED] rotate_invalid_val
[11:07:42] [PASSED] rotate_truncated
[11:07:42] [PASSED] invalid_option
[11:07:42] [PASSED] invalid_tv_option
[11:07:42] [PASSED] truncated_tv_option
[11:07:42] ============ [PASSED] drm_test_cmdline_invalid =============
[11:07:42] =============== drm_test_cmdline_tv_options ===============
[11:07:42] [PASSED] NTSC
[11:07:42] [PASSED] NTSC_443
[11:07:42] [PASSED] NTSC_J
[11:07:42] [PASSED] PAL
[11:07:42] [PASSED] PAL_M
[11:07:42] [PASSED] PAL_N
[11:07:42] [PASSED] SECAM
[11:07:42] [PASSED] MONO_525
[11:07:42] [PASSED] MONO_625
[11:07:42] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:07:42] =============== [PASSED] drm_cmdline_parser ================
[11:07:42] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:07:42] [PASSED] drm_test_connector_hdmi_init_valid
[11:07:42] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:07:42] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:07:42] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:07:42] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:07:42] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:07:42] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:07:42] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:07:42] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:07:42] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:07:42] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:07:42] [PASSED] supported_formats=0x5 yuv420_allowed=1
[11:07:42] [PASSED] supported_formats=0x5 yuv420_allowed=0
[11:07:42] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:07:42] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:07:42] [PASSED] drm_test_connector_hdmi_init_null_product
[11:07:42] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:07:42] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:07:42] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:07:42] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:07:42] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:07:42] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:07:42] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:07:42] ========= drm_test_connector_hdmi_init_type_valid =========
[11:07:42] [PASSED] HDMI-A
[11:07:42] [PASSED] HDMI-B
[11:07:42] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:07:42] ======== drm_test_connector_hdmi_init_type_invalid ========
[11:07:42] [PASSED] Unknown
[11:07:42] [PASSED] VGA
[11:07:42] [PASSED] DVI-I
[11:07:42] [PASSED] DVI-D
[11:07:42] [PASSED] DVI-A
[11:07:42] [PASSED] Composite
[11:07:42] [PASSED] SVIDEO
[11:07:42] [PASSED] LVDS
[11:07:42] [PASSED] Component
[11:07:42] [PASSED] DIN
[11:07:42] [PASSED] DP
[11:07:42] [PASSED] TV
[11:07:42] [PASSED] eDP
[11:07:42] [PASSED] Virtual
[11:07:42] [PASSED] DSI
[11:07:42] [PASSED] DPI
[11:07:42] [PASSED] Writeback
[11:07:42] [PASSED] SPI
[11:07:42] [PASSED] USB
[11:07:42] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:07:42] ============ [PASSED] drmm_connector_hdmi_init =============
[11:07:42] ============= drmm_connector_init (3 subtests) =============
[11:07:42] [PASSED] drm_test_drmm_connector_init
[11:07:42] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:07:42] ========= drm_test_drmm_connector_init_type_valid =========
[11:07:42] [PASSED] Unknown
[11:07:42] [PASSED] VGA
[11:07:42] [PASSED] DVI-I
[11:07:42] [PASSED] DVI-D
[11:07:42] [PASSED] DVI-A
[11:07:42] [PASSED] Composite
[11:07:42] [PASSED] SVIDEO
[11:07:42] [PASSED] LVDS
[11:07:42] [PASSED] Component
[11:07:42] [PASSED] DIN
[11:07:42] [PASSED] DP
[11:07:42] [PASSED] HDMI-A
[11:07:42] [PASSED] HDMI-B
[11:07:42] [PASSED] TV
[11:07:42] [PASSED] eDP
[11:07:42] [PASSED] Virtual
[11:07:42] [PASSED] DSI
[11:07:42] [PASSED] DPI
[11:07:42] [PASSED] Writeback
[11:07:42] [PASSED] SPI
[11:07:42] [PASSED] USB
[11:07:42] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:07:42] =============== [PASSED] drmm_connector_init ===============
[11:07:42] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_init
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:07:42] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[11:07:42] [PASSED] Unknown
[11:07:42] [PASSED] VGA
[11:07:42] [PASSED] DVI-I
[11:07:42] [PASSED] DVI-D
[11:07:42] [PASSED] DVI-A
[11:07:42] [PASSED] Composite
[11:07:42] [PASSED] SVIDEO
[11:07:42] [PASSED] LVDS
[11:07:42] [PASSED] Component
[11:07:42] [PASSED] DIN
[11:07:42] [PASSED] DP
[11:07:42] [PASSED] HDMI-A
[11:07:42] [PASSED] HDMI-B
[11:07:42] [PASSED] TV
[11:07:42] [PASSED] eDP
[11:07:42] [PASSED] Virtual
[11:07:42] [PASSED] DSI
[11:07:42] [PASSED] DPI
[11:07:42] [PASSED] Writeback
[11:07:42] [PASSED] SPI
[11:07:42] [PASSED] USB
[11:07:42] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:07:42] ======== drm_test_drm_connector_dynamic_init_name =========
[11:07:42] [PASSED] Unknown
[11:07:42] [PASSED] VGA
[11:07:42] [PASSED] DVI-I
[11:07:42] [PASSED] DVI-D
[11:07:42] [PASSED] DVI-A
[11:07:42] [PASSED] Composite
[11:07:42] [PASSED] SVIDEO
[11:07:42] [PASSED] LVDS
[11:07:42] [PASSED] Component
[11:07:42] [PASSED] DIN
[11:07:42] [PASSED] DP
[11:07:42] [PASSED] HDMI-A
[11:07:42] [PASSED] HDMI-B
[11:07:42] [PASSED] TV
[11:07:42] [PASSED] eDP
[11:07:42] [PASSED] Virtual
[11:07:42] [PASSED] DSI
[11:07:42] [PASSED] DPI
[11:07:42] [PASSED] Writeback
[11:07:42] [PASSED] SPI
[11:07:42] [PASSED] USB
[11:07:42] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:07:42] =========== [PASSED] drm_connector_dynamic_init ============
[11:07:42] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:07:42] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:07:42] ======= drm_connector_dynamic_register (7 subtests) ========
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:07:42] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:07:42] ========= [PASSED] drm_connector_dynamic_register ==========
[11:07:42] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:07:42] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:07:42] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:07:42] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:07:42] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:07:42] ========== drm_test_get_tv_mode_from_name_valid ===========
[11:07:42] [PASSED] NTSC
[11:07:42] [PASSED] NTSC-443
[11:07:42] [PASSED] NTSC-J
[11:07:42] [PASSED] PAL
[11:07:42] [PASSED] PAL-M
[11:07:42] [PASSED] PAL-N
[11:07:42] [PASSED] SECAM
[11:07:42] [PASSED] Mono
[11:07:42] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:07:42] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:07:42] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:07:42] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:07:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:07:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:07:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:07:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:07:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:07:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:07:42] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[11:07:42] [PASSED] VIC 96
[11:07:42] [PASSED] VIC 97
[11:07:42] [PASSED] VIC 101
[11:07:42] [PASSED] VIC 102
[11:07:42] [PASSED] VIC 106
[11:07:42] [PASSED] VIC 107
[11:07:42] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:07:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:07:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:07:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:07:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:07:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:07:42] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:07:42] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:07:42] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[11:07:42] [PASSED] Automatic
[11:07:42] [PASSED] Full
[11:07:42] [PASSED] Limited 16:235
[11:07:42] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:07:42] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:07:42] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:07:42] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:07:42] === drm_test_drm_hdmi_connector_get_output_format_name ====
[11:07:42] [PASSED] RGB
[11:07:42] [PASSED] YUV 4:2:0
[11:07:42] [PASSED] YUV 4:2:2
[11:07:42] [PASSED] YUV 4:4:4
[11:07:42] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:07:42] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:07:42] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:07:42] ============= drm_damage_helper (21 subtests) ==============
[11:07:42] [PASSED] drm_test_damage_iter_no_damage
[11:07:42] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:07:42] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:07:42] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:07:42] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:07:42] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:07:42] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:07:42] [PASSED] drm_test_damage_iter_simple_damage
[11:07:42] [PASSED] drm_test_damage_iter_single_damage
[11:07:42] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:07:42] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:07:42] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:07:42] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:07:42] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:07:42] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:07:42] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:07:42] [PASSED] drm_test_damage_iter_damage
[11:07:42] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:07:42] [PASSED] drm_test_damage_iter_damage_one_outside
[11:07:42] [PASSED] drm_test_damage_iter_damage_src_moved
[11:07:42] [PASSED] drm_test_damage_iter_damage_not_visible
[11:07:42] ================ [PASSED] drm_damage_helper ================
[11:07:42] ============== drm_dp_mst_helper (3 subtests) ==============
[11:07:42] ============== drm_test_dp_mst_calc_pbn_mode ==============
[11:07:42] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:07:42] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:07:42] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:07:42] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:07:42] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:07:42] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:07:42] ============== drm_test_dp_mst_calc_pbn_div ===============
[11:07:42] [PASSED] Link rate 2000000 lane count 4
[11:07:42] [PASSED] Link rate 2000000 lane count 2
[11:07:42] [PASSED] Link rate 2000000 lane count 1
[11:07:42] [PASSED] Link rate 1350000 lane count 4
[11:07:42] [PASSED] Link rate 1350000 lane count 2
[11:07:42] [PASSED] Link rate 1350000 lane count 1
[11:07:42] [PASSED] Link rate 1000000 lane count 4
[11:07:42] [PASSED] Link rate 1000000 lane count 2
[11:07:42] [PASSED] Link rate 1000000 lane count 1
[11:07:42] [PASSED] Link rate 810000 lane count 4
[11:07:42] [PASSED] Link rate 810000 lane count 2
[11:07:42] [PASSED] Link rate 810000 lane count 1
[11:07:42] [PASSED] Link rate 540000 lane count 4
[11:07:42] [PASSED] Link rate 540000 lane count 2
[11:07:42] [PASSED] Link rate 540000 lane count 1
[11:07:42] [PASSED] Link rate 270000 lane count 4
[11:07:42] [PASSED] Link rate 270000 lane count 2
[11:07:42] [PASSED] Link rate 270000 lane count 1
[11:07:42] [PASSED] Link rate 162000 lane count 4
[11:07:42] [PASSED] Link rate 162000 lane count 2
[11:07:42] [PASSED] Link rate 162000 lane count 1
[11:07:42] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:07:42] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[11:07:42] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:07:42] [PASSED] DP_POWER_UP_PHY with port number
[11:07:42] [PASSED] DP_POWER_DOWN_PHY with port number
[11:07:42] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:07:42] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:07:42] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:07:42] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:07:42] [PASSED] DP_QUERY_PAYLOAD with port number
[11:07:42] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:07:42] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:07:42] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:07:42] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:07:42] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:07:42] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:07:42] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:07:42] [PASSED] DP_REMOTE_I2C_READ with port number
[11:07:42] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:07:42] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:07:42] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:07:42] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:07:42] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:07:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:07:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:07:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:07:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:07:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:07:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:07:42] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:07:42] ================ [PASSED] drm_dp_mst_helper ================
[11:07:42] ================== drm_exec (7 subtests) ===================
[11:07:42] [PASSED] sanitycheck
[11:07:42] [PASSED] test_lock
[11:07:42] [PASSED] test_lock_unlock
[11:07:42] [PASSED] test_duplicates
[11:07:42] [PASSED] test_prepare
[11:07:42] [PASSED] test_prepare_array
[11:07:42] [PASSED] test_multiple_loops
[11:07:42] ==================== [PASSED] drm_exec =====================
[11:07:42] =========== drm_format_helper_test (17 subtests) ===========
[11:07:42] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:07:42] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:07:42] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:07:42] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:07:42] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:07:42] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:07:42] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:07:42] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:07:42] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:07:42] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:07:42] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:07:42] ============== drm_test_fb_xrgb8888_to_mono ===============
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:07:42] ==================== drm_test_fb_swab =====================
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ================ [PASSED] drm_test_fb_swab =================
[11:07:42] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:07:42] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[11:07:42] [PASSED] single_pixel_source_buffer
[11:07:42] [PASSED] single_pixel_clip_rectangle
[11:07:42] [PASSED] well_known_colors
[11:07:42] [PASSED] destination_pitch
[11:07:42] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:07:42] ================= drm_test_fb_clip_offset =================
[11:07:42] [PASSED] pass through
[11:07:42] [PASSED] horizontal offset
[11:07:42] [PASSED] vertical offset
[11:07:42] [PASSED] horizontal and vertical offset
[11:07:42] [PASSED] horizontal offset (custom pitch)
[11:07:42] [PASSED] vertical offset (custom pitch)
[11:07:42] [PASSED] horizontal and vertical offset (custom pitch)
[11:07:42] ============= [PASSED] drm_test_fb_clip_offset =============
[11:07:42] =================== drm_test_fb_memcpy ====================
[11:07:42] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:07:42] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:07:42] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:07:42] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:07:42] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:07:42] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:07:42] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:07:42] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:07:42] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:07:42] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:07:42] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:07:42] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:07:42] =============== [PASSED] drm_test_fb_memcpy ================
[11:07:42] ============= [PASSED] drm_format_helper_test ==============
[11:07:42] ================= drm_format (18 subtests) =================
[11:07:42] [PASSED] drm_test_format_block_width_invalid
[11:07:42] [PASSED] drm_test_format_block_width_one_plane
[11:07:42] [PASSED] drm_test_format_block_width_two_plane
[11:07:42] [PASSED] drm_test_format_block_width_three_plane
[11:07:42] [PASSED] drm_test_format_block_width_tiled
[11:07:42] [PASSED] drm_test_format_block_height_invalid
[11:07:42] [PASSED] drm_test_format_block_height_one_plane
[11:07:42] [PASSED] drm_test_format_block_height_two_plane
[11:07:42] [PASSED] drm_test_format_block_height_three_plane
[11:07:42] [PASSED] drm_test_format_block_height_tiled
[11:07:42] [PASSED] drm_test_format_min_pitch_invalid
[11:07:42] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:07:42] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:07:42] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:07:42] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:07:42] [PASSED] drm_test_format_min_pitch_two_plane
[11:07:42] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:07:42] [PASSED] drm_test_format_min_pitch_tiled
[11:07:42] =================== [PASSED] drm_format ====================
[11:07:42] ============== drm_framebuffer (10 subtests) ===============
[11:07:42] ========== drm_test_framebuffer_check_src_coords ==========
[11:07:42] [PASSED] Success: source fits into fb
[11:07:42] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:07:42] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:07:42] [PASSED] Fail: overflowing fb with source width
[11:07:42] [PASSED] Fail: overflowing fb with source height
[11:07:42] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:07:42] [PASSED] drm_test_framebuffer_cleanup
[11:07:42] =============== drm_test_framebuffer_create ===============
[11:07:42] [PASSED] ABGR8888 normal sizes
[11:07:42] [PASSED] ABGR8888 max sizes
[11:07:42] [PASSED] ABGR8888 pitch greater than min required
[11:07:42] [PASSED] ABGR8888 pitch less than min required
[11:07:42] [PASSED] ABGR8888 Invalid width
[11:07:42] [PASSED] ABGR8888 Invalid buffer handle
[11:07:42] [PASSED] No pixel format
[11:07:42] [PASSED] ABGR8888 Width 0
[11:07:42] [PASSED] ABGR8888 Height 0
[11:07:42] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:07:42] [PASSED] ABGR8888 Large buffer offset
[11:07:42] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:07:42] [PASSED] ABGR8888 Invalid flag
[11:07:42] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:07:42] [PASSED] ABGR8888 Valid buffer modifier
[11:07:42] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:07:42] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:07:42] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:07:42] [PASSED] NV12 Normal sizes
[11:07:42] [PASSED] NV12 Max sizes
[11:07:42] [PASSED] NV12 Invalid pitch
[11:07:42] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:07:42] [PASSED] NV12 different modifier per-plane
[11:07:42] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:07:42] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:07:42] [PASSED] NV12 Modifier for inexistent plane
[11:07:42] [PASSED] NV12 Handle for inexistent plane
[11:07:42] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:07:42] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:07:42] [PASSED] YVU420 Normal sizes
[11:07:42] [PASSED] YVU420 Max sizes
[11:07:42] [PASSED] YVU420 Invalid pitch
[11:07:42] [PASSED] YVU420 Different pitches
[11:07:42] [PASSED] YVU420 Different buffer offsets/pitches
[11:07:42] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:07:42] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:07:42] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:07:42] [PASSED] YVU420 Valid modifier
[11:07:42] [PASSED] YVU420 Different modifiers per plane
[11:07:42] [PASSED] YVU420 Modifier for inexistent plane
[11:07:42] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:07:42] [PASSED] X0L2 Normal sizes
[11:07:42] [PASSED] X0L2 Max sizes
[11:07:42] [PASSED] X0L2 Invalid pitch
[11:07:42] [PASSED] X0L2 Pitch greater than minimum required
[11:07:42] [PASSED] X0L2 Handle for inexistent plane
[11:07:42] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:07:42] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:07:42] [PASSED] X0L2 Valid modifier
[11:07:42] [PASSED] X0L2 Modifier for inexistent plane
[11:07:42] =========== [PASSED] drm_test_framebuffer_create ===========
[11:07:42] [PASSED] drm_test_framebuffer_free
[11:07:42] [PASSED] drm_test_framebuffer_init
[11:07:42] [PASSED] drm_test_framebuffer_init_bad_format
[11:07:42] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:07:42] [PASSED] drm_test_framebuffer_lookup
[11:07:42] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:07:42] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:07:42] ================= [PASSED] drm_framebuffer =================
[11:07:42] ================ drm_gem_shmem (8 subtests) ================
[11:07:42] [PASSED] drm_gem_shmem_test_obj_create
[11:07:42] [PASSED] drm_gem_shmem_test_obj_create_private
[11:07:42] [PASSED] drm_gem_shmem_test_pin_pages
[11:07:42] [PASSED] drm_gem_shmem_test_vmap
[11:07:42] [PASSED] drm_gem_shmem_test_get_sg_table
[11:07:42] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:07:42] [PASSED] drm_gem_shmem_test_madvise
[11:07:42] [PASSED] drm_gem_shmem_test_purge
[11:07:42] ================== [PASSED] drm_gem_shmem ==================
[11:07:42] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[11:07:42] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:07:42] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:07:42] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:07:42] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:07:42] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:07:42] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:07:42] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[11:07:42] [PASSED] Automatic
[11:07:42] [PASSED] Full
[11:07:42] [PASSED] Limited 16:235
[11:07:42] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:07:42] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:07:42] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:07:42] [PASSED] drm_test_check_disable_connector
[11:07:42] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:07:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:07:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:07:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:07:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:07:42] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:07:42] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:07:42] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:07:42] [PASSED] drm_test_check_output_bpc_dvi
[11:07:42] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:07:42] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:07:42] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:07:42] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:07:42] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:07:42] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:07:42] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:07:42] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:07:42] ============ drm_test_check_hdmi_color_format =============
[11:07:42] [PASSED] AUTO -> RGB
[11:07:42] [PASSED] YCBCR422 -> YUV422
[11:07:42] [PASSED] YCBCR420 -> YUV420
[11:07:42] [PASSED] YCBCR444 -> YUV444
[11:07:42] [PASSED] RGB -> RGB
[11:07:42] ======== [PASSED] drm_test_check_hdmi_color_format =========
[11:07:42] ======== drm_test_check_hdmi_color_format_420_only ========
[11:07:42] [PASSED] RGB should fail
[11:07:42] [PASSED] YUV444 should fail
[11:07:42] [PASSED] YUV422 should fail
[11:07:42] [PASSED] YUV420 should work
[11:07:42] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[11:07:42] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:07:42] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:07:42] [PASSED] drm_test_check_broadcast_rgb_value
[11:07:42] [PASSED] drm_test_check_bpc_8_value
[11:07:42] [PASSED] drm_test_check_bpc_10_value
[11:07:42] [PASSED] drm_test_check_bpc_12_value
[11:07:42] [PASSED] drm_test_check_format_value
[11:07:42] [PASSED] drm_test_check_tmds_char_value
[11:07:42] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:07:42] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[11:07:42] [PASSED] drm_test_check_mode_valid
[11:07:42] [PASSED] drm_test_check_mode_valid_reject
[11:07:42] [PASSED] drm_test_check_mode_valid_reject_rate
[11:07:42] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:07:42] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[11:07:42] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[11:07:42] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[11:07:42] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:07:42] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[11:07:42] [PASSED] drm_test_check_infoframes
[11:07:42] [PASSED] drm_test_check_reject_avi_infoframe
[11:07:42] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[11:07:42] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[11:07:42] [PASSED] drm_test_check_reject_audio_infoframe
[11:07:42] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[11:07:42] ================= drm_managed (2 subtests) =================
[11:07:42] [PASSED] drm_test_managed_release_action
[11:07:42] [PASSED] drm_test_managed_run_action
[11:07:42] =================== [PASSED] drm_managed ===================
[11:07:42] =================== drm_mm (6 subtests) ====================
[11:07:42] [PASSED] drm_test_mm_init
[11:07:42] [PASSED] drm_test_mm_debug
[11:07:42] [PASSED] drm_test_mm_align32
[11:07:42] [PASSED] drm_test_mm_align64
[11:07:42] [PASSED] drm_test_mm_lowest
[11:07:42] [PASSED] drm_test_mm_highest
[11:07:42] ===================== [PASSED] drm_mm ======================
[11:07:42] ============= drm_modes_analog_tv (5 subtests) =============
[11:07:42] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:07:42] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:07:42] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:07:42] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:07:42] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:07:42] =============== [PASSED] drm_modes_analog_tv ===============
[11:07:42] ============== drm_panic_helper (3 subtests) ===============
[11:07:42] ============= drm_test_panic_screen_user_map ==============
[11:07:42] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[11:07:42] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[11:07:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[11:07:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[11:07:42] ========= [PASSED] drm_test_panic_screen_user_map ==========
[11:07:42] ============= drm_test_panic_screen_user_page =============
[11:07:42] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[11:07:42] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[11:07:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[11:07:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[11:07:42] ========= [PASSED] drm_test_panic_screen_user_page =========
[11:07:42] ========== drm_test_panic_screen_user_set_pixel ===========
[11:07:42] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[11:07:42] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[11:07:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[11:07:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[11:07:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[11:07:42] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[11:07:42] ================ [PASSED] drm_panic_helper =================
[11:07:42] ============== drm_plane_helper (2 subtests) ===============
[11:07:42] =============== drm_test_check_plane_state ================
[11:07:42] [PASSED] clipping_simple
[11:07:42] [PASSED] clipping_rotate_reflect
[11:07:42] [PASSED] positioning_simple
[11:07:42] [PASSED] upscaling
[11:07:42] [PASSED] downscaling
[11:07:42] [PASSED] rounding1
[11:07:42] [PASSED] rounding2
[11:07:42] [PASSED] rounding3
[11:07:42] [PASSED] rounding4
[11:07:42] =========== [PASSED] drm_test_check_plane_state ============
[11:07:42] =========== drm_test_check_invalid_plane_state ============
[11:07:42] [PASSED] positioning_invalid
[11:07:42] [PASSED] upscaling_invalid
[11:07:42] [PASSED] downscaling_invalid
[11:07:42] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:07:42] ================ [PASSED] drm_plane_helper =================
[11:07:42] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:07:42] ====== drm_test_connector_helper_tv_get_modes_check =======
[11:07:42] [PASSED] None
[11:07:42] [PASSED] PAL
[11:07:42] [PASSED] NTSC
[11:07:42] [PASSED] Both, NTSC Default
[11:07:42] [PASSED] Both, PAL Default
[11:07:42] [PASSED] Both, NTSC Default, with PAL on command-line
[11:07:42] [PASSED] Both, PAL Default, with NTSC on command-line
[11:07:42] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:07:42] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:07:42] ================== drm_rect (9 subtests) ===================
[11:07:42] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:07:42] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:07:42] [PASSED] drm_test_rect_clip_scaled_clipped
[11:07:42] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:07:42] ================= drm_test_rect_intersect =================
[11:07:42] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:07:42] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:07:42] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:07:42] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:07:42] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:07:42] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:07:42] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:07:42] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:07:42] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:07:42] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:07:42] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:07:42] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:07:42] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:07:42] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:07:42] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:07:42] ============= [PASSED] drm_test_rect_intersect =============
[11:07:42] ================ drm_test_rect_calc_hscale ================
[11:07:42] [PASSED] normal use
[11:07:42] [PASSED] out of max range
[11:07:42] [PASSED] out of min range
[11:07:42] [PASSED] zero dst
[11:07:42] [PASSED] negative src
[11:07:42] [PASSED] negative dst
[11:07:42] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:07:42] ================ drm_test_rect_calc_vscale ================
[11:07:42] [PASSED] normal use
[11:07:42] [PASSED] out of max range
[11:07:42] [PASSED] out of min range
[11:07:42] [PASSED] zero dst
[11:07:42] [PASSED] negative src
[11:07:42] [PASSED] negative dst
[11:07:42] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:07:42] ================== drm_test_rect_rotate ===================
[11:07:42] [PASSED] reflect-x
[11:07:42] [PASSED] reflect-y
[11:07:42] [PASSED] rotate-0
[11:07:42] [PASSED] rotate-90
[11:07:42] [PASSED] rotate-180
[11:07:42] [PASSED] rotate-270
[11:07:42] ============== [PASSED] drm_test_rect_rotate ===============
[11:07:42] ================ drm_test_rect_rotate_inv =================
[11:07:42] [PASSED] reflect-x
[11:07:42] [PASSED] reflect-y
[11:07:42] [PASSED] rotate-0
[11:07:42] [PASSED] rotate-90
[11:07:42] [PASSED] rotate-180
[11:07:42] [PASSED] rotate-270
[11:07:42] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:07:42] ==================== [PASSED] drm_rect =====================
[11:07:42] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:07:42] ============ drm_test_sysfb_build_fourcc_list =============
[11:07:42] [PASSED] no native formats
[11:07:42] [PASSED] XRGB8888 as native format
[11:07:42] [PASSED] remove duplicates
[11:07:42] [PASSED] convert alpha formats
[11:07:42] [PASSED] random formats
[11:07:42] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:07:42] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:07:42] ================== drm_fixp (2 subtests) ===================
[11:07:42] [PASSED] drm_test_int2fixp
[11:07:42] [PASSED] drm_test_sm2fixp
[11:07:42] ==================== [PASSED] drm_fixp =====================
[11:07:42] ============================================================
[11:07:42] Testing complete. Ran 667 tests: passed: 667
[11:07:42] Elapsed time: 28.145s total, 2.521s configuring, 25.158s building, 0.463s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:07:42] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:07:45] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:07:55] Starting KUnit Kernel (1/1)...
[11:07:55] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:07:55] ================= ttm_device (5 subtests) ==================
[11:07:55] [PASSED] ttm_device_init_basic
[11:07:55] [PASSED] ttm_device_init_multiple
[11:07:55] [PASSED] ttm_device_fini_basic
[11:07:55] [PASSED] ttm_device_init_no_vma_man
[11:07:55] ================== ttm_device_init_pools ==================
[11:07:55] [PASSED] No DMA allocations, no DMA32 required
[11:07:55] [PASSED] DMA allocations, DMA32 required
[11:07:55] [PASSED] No DMA allocations, DMA32 required
[11:07:55] [PASSED] DMA allocations, no DMA32 required
[11:07:55] ============== [PASSED] ttm_device_init_pools ==============
[11:07:55] =================== [PASSED] ttm_device ====================
[11:07:55] ================== ttm_pool (8 subtests) ===================
[11:07:55] ================== ttm_pool_alloc_basic ===================
[11:07:55] [PASSED] One page
[11:07:55] [PASSED] More than one page
[11:07:55] [PASSED] Above the allocation limit
[11:07:55] [PASSED] One page, with coherent DMA mappings enabled
[11:07:55] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:07:55] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:07:55] ============== ttm_pool_alloc_basic_dma_addr ==============
[11:07:55] [PASSED] One page
[11:07:55] [PASSED] More than one page
[11:07:55] [PASSED] Above the allocation limit
[11:07:55] [PASSED] One page, with coherent DMA mappings enabled
[11:07:55] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:07:55] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:07:55] [PASSED] ttm_pool_alloc_order_caching_match
[11:07:55] [PASSED] ttm_pool_alloc_caching_mismatch
[11:07:55] [PASSED] ttm_pool_alloc_order_mismatch
[11:07:55] [PASSED] ttm_pool_free_dma_alloc
[11:07:55] [PASSED] ttm_pool_free_no_dma_alloc
[11:07:55] [PASSED] ttm_pool_fini_basic
[11:07:55] ==================== [PASSED] ttm_pool =====================
[11:07:55] ================ ttm_resource (8 subtests) =================
[11:07:55] ================= ttm_resource_init_basic =================
[11:07:55] [PASSED] Init resource in TTM_PL_SYSTEM
[11:07:55] [PASSED] Init resource in TTM_PL_VRAM
[11:07:55] [PASSED] Init resource in a private placement
[11:07:55] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:07:55] ============= [PASSED] ttm_resource_init_basic =============
[11:07:55] [PASSED] ttm_resource_init_pinned
[11:07:55] [PASSED] ttm_resource_fini_basic
[11:07:55] [PASSED] ttm_resource_manager_init_basic
[11:07:55] [PASSED] ttm_resource_manager_usage_basic
[11:07:55] [PASSED] ttm_resource_manager_set_used_basic
[11:07:55] [PASSED] ttm_sys_man_alloc_basic
[11:07:55] [PASSED] ttm_sys_man_free_basic
[11:07:55] ================== [PASSED] ttm_resource ===================
[11:07:55] =================== ttm_tt (15 subtests) ===================
[11:07:55] ==================== ttm_tt_init_basic ====================
[11:07:55] [PASSED] Page-aligned size
[11:07:55] [PASSED] Extra pages requested
[11:07:55] ================ [PASSED] ttm_tt_init_basic ================
[11:07:55] [PASSED] ttm_tt_init_misaligned
[11:07:55] [PASSED] ttm_tt_fini_basic
[11:07:55] [PASSED] ttm_tt_fini_sg
[11:07:55] [PASSED] ttm_tt_fini_shmem
[11:07:55] [PASSED] ttm_tt_create_basic
[11:07:55] [PASSED] ttm_tt_create_invalid_bo_type
[11:07:55] [PASSED] ttm_tt_create_ttm_exists
[11:07:55] [PASSED] ttm_tt_create_failed
[11:07:55] [PASSED] ttm_tt_destroy_basic
[11:07:55] [PASSED] ttm_tt_populate_null_ttm
[11:07:55] [PASSED] ttm_tt_populate_populated_ttm
[11:07:55] [PASSED] ttm_tt_unpopulate_basic
[11:07:55] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:07:55] [PASSED] ttm_tt_swapin_basic
[11:07:55] ===================== [PASSED] ttm_tt ======================
[11:07:55] =================== ttm_bo (14 subtests) ===================
[11:07:55] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[11:07:55] [PASSED] Cannot be interrupted and sleeps
[11:07:55] [PASSED] Cannot be interrupted, locks straight away
[11:07:55] [PASSED] Can be interrupted, sleeps
[11:07:55] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:07:55] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:07:55] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:07:55] [PASSED] ttm_bo_reserve_double_resv
[11:07:55] [PASSED] ttm_bo_reserve_interrupted
[11:07:55] [PASSED] ttm_bo_reserve_deadlock
[11:07:55] [PASSED] ttm_bo_unreserve_basic
[11:07:55] [PASSED] ttm_bo_unreserve_pinned
[11:07:55] [PASSED] ttm_bo_unreserve_bulk
[11:07:55] [PASSED] ttm_bo_fini_basic
[11:07:55] [PASSED] ttm_bo_fini_shared_resv
[11:07:55] [PASSED] ttm_bo_pin_basic
[11:07:55] [PASSED] ttm_bo_pin_unpin_resource
[11:07:55] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:07:55] ===================== [PASSED] ttm_bo ======================
[11:07:55] ============== ttm_bo_validate (22 subtests) ===============
[11:07:55] ============== ttm_bo_init_reserved_sys_man ===============
[11:07:55] [PASSED] Buffer object for userspace
[11:07:55] [PASSED] Kernel buffer object
[11:07:55] [PASSED] Shared buffer object
[11:07:55] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:07:55] ============== ttm_bo_init_reserved_mock_man ==============
[11:07:55] [PASSED] Buffer object for userspace
[11:07:55] [PASSED] Kernel buffer object
[11:07:55] [PASSED] Shared buffer object
[11:07:55] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:07:55] [PASSED] ttm_bo_init_reserved_resv
[11:07:55] ================== ttm_bo_validate_basic ==================
[11:07:55] [PASSED] Buffer object for userspace
[11:07:55] [PASSED] Kernel buffer object
[11:07:55] [PASSED] Shared buffer object
[11:07:55] ============== [PASSED] ttm_bo_validate_basic ==============
[11:07:55] [PASSED] ttm_bo_validate_invalid_placement
[11:07:55] ============= ttm_bo_validate_same_placement ==============
[11:07:55] [PASSED] System manager
[11:07:55] [PASSED] VRAM manager
[11:07:55] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:07:55] [PASSED] ttm_bo_validate_failed_alloc
[11:07:55] [PASSED] ttm_bo_validate_pinned
[11:07:55] [PASSED] ttm_bo_validate_busy_placement
[11:07:55] ================ ttm_bo_validate_multihop =================
[11:07:55] [PASSED] Buffer object for userspace
[11:07:55] [PASSED] Kernel buffer object
[11:07:55] [PASSED] Shared buffer object
[11:07:55] ============ [PASSED] ttm_bo_validate_multihop =============
[11:07:55] ========== ttm_bo_validate_no_placement_signaled ==========
[11:07:55] [PASSED] Buffer object in system domain, no page vector
[11:07:55] [PASSED] Buffer object in system domain with an existing page vector
[11:07:55] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:07:55] ======== ttm_bo_validate_no_placement_not_signaled ========
[11:07:55] [PASSED] Buffer object for userspace
[11:07:55] [PASSED] Kernel buffer object
[11:07:55] [PASSED] Shared buffer object
[11:07:55] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:07:55] [PASSED] ttm_bo_validate_move_fence_signaled
[11:07:55] ========= ttm_bo_validate_move_fence_not_signaled =========
[11:07:55] [PASSED] Waits for GPU
[11:07:55] [PASSED] Tries to lock straight away
[11:07:55] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:07:55] [PASSED] ttm_bo_validate_swapout
[11:07:55] [PASSED] ttm_bo_validate_happy_evict
[11:07:55] [PASSED] ttm_bo_validate_all_pinned_evict
[11:07:55] [PASSED] ttm_bo_validate_allowed_only_evict
[11:07:55] [PASSED] ttm_bo_validate_deleted_evict
[11:07:55] [PASSED] ttm_bo_validate_busy_domain_evict
[11:07:55] [PASSED] ttm_bo_validate_evict_gutting
[11:07:55] [PASSED] ttm_bo_validate_recrusive_evict
[11:07:55] ================= [PASSED] ttm_bo_validate =================
[11:07:55] ============================================================
[11:07:55] Testing complete. Ran 102 tests: passed: 102
[11:07:55] Elapsed time: 12.755s total, 2.528s configuring, 10.012s building, 0.177s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[11:07:55] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:07:57] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:08:06] Starting KUnit Kernel (1/1)...
[11:08:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:08:06] =============== dma-buf-fence (12 subtests) ================
[11:08:06] [PASSED] test_sanitycheck
[11:08:06] [PASSED] test_signaling
[11:08:06] [PASSED] test_add_callback
[11:08:06] [PASSED] test_late_add_callback
[11:08:06] [PASSED] test_rm_callback
[11:08:06] [PASSED] test_late_rm_callback
[11:08:06] [PASSED] test_status
[11:08:06] [PASSED] test_error
[11:08:06] [PASSED] test_wait
[11:08:06] [PASSED] test_wait_timeout
[11:08:06] [PASSED] test_stub
[11:08:06] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[11:08:06] ================== [PASSED] dma-buf-fence ==================
[11:08:06] ============ dma-buf-fence-chain (11 subtests) =============
[11:08:06] [PASSED] test_sanitycheck
[11:08:06] [PASSED] test_find_seqno
[11:08:06] [PASSED] test_find_signaled
[11:08:06] [PASSED] test_find_out_of_order
[11:08:11] [PASSED] test_find_gap
[11:08:11] [PASSED] test_find_race
[11:08:11] [PASSED] test_signal_forward
[11:08:12] [PASSED] test_signal_backward
[11:08:12] [PASSED] test_wait_forward
[11:08:12] [PASSED] test_wait_backward
[11:08:12] [PASSED] test_wait_random
[11:08:12] =============== [PASSED] dma-buf-fence-chain ===============
[11:08:12] ============ dma-buf-fence-unwrap (11 subtests) ============
[11:08:12] [PASSED] test_sanitycheck
[11:08:12] [PASSED] test_unwrap_array
[11:08:12] [PASSED] test_unwrap_chain
[11:08:12] [PASSED] test_unwrap_chain_array
[11:08:12] [PASSED] test_unwrap_merge
[11:08:12] [PASSED] test_unwrap_merge_duplicate
[11:08:12] [PASSED] test_unwrap_merge_seqno
[11:08:12] [PASSED] test_unwrap_merge_order
[11:08:12] [PASSED] test_unwrap_merge_complex
[11:08:12] [PASSED] test_unwrap_merge_complex_seqno
[11:08:12] [PASSED] test_dedup_empty
[11:08:12] ============== [PASSED] dma-buf-fence-unwrap ===============
[11:08:12] ================ dma-buf-resv (5 subtests) =================
[11:08:12] [PASSED] test_sanitycheck
[11:08:12] ===================== test_signaling ======================
[11:08:12] [PASSED] kernel
[11:08:12] [PASSED] write
[11:08:12] [PASSED] read
[11:08:12] [PASSED] bookkeep
[11:08:12] ================= [PASSED] test_signaling ==================
[11:08:12] ====================== test_for_each ======================
[11:08:12] [PASSED] kernel
[11:08:12] [PASSED] write
[11:08:12] [PASSED] read
[11:08:12] [PASSED] bookkeep
[11:08:12] ================== [PASSED] test_for_each ==================
[11:08:12] ================= test_for_each_unlocked ==================
[11:08:12] [PASSED] kernel
[11:08:12] [PASSED] write
[11:08:12] [PASSED] read
[11:08:12] [PASSED] bookkeep
[11:08:12] ============= [PASSED] test_for_each_unlocked ==============
[11:08:12] ===================== test_get_fences =====================
[11:08:12] [PASSED] kernel
[11:08:12] [PASSED] write
[11:08:12] [PASSED] read
[11:08:12] [PASSED] bookkeep
[11:08:12] ================= [PASSED] test_get_fences =================
[11:08:12] ================== [PASSED] dma-buf-resv ===================
[11:08:12] ============================================================
[11:08:12] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[11:08:12] Elapsed time: 16.620s total, 2.490s configuring, 8.758s building, 5.340s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915/dip: Write the DIP header last with SDP transmission lines
2026-11-11 10:35 [PATCH] drm/i915/dip: Write the DIP header last with SDP transmission lines Chaitanya Kumar Borah
2026-11-11 11:08 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-11-11 11:36 ` Ville Syrjälä
2026-11-11 12:56 ` Borah, Chaitanya Kumar
2026-11-11 11:50 ` ✓ Xe.CI.BAT: success for " Patchwork
` (2 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: Ville Syrjälä @ 2026-11-11 11:36 UTC (permalink / raw)
To: Chaitanya Kumar Borah
Cc: intel-xe, intel-gfx, stable, Ankit Nautiyal, Suraj Kandpal
On Wed, Nov 11, 2026 at 04:05:42PM +0530, Chaitanya Kumar Borah wrote:
> On platforms with SDP transmission line registers, the packets anchored
> to them are double buffered in the transcoder (TC) clock domain. The packet
> registers are in the core display (CD) clock domain and the whole packet is
> clock crossed on the write of the header (dword 0), so Bspec requires the
> data to be programmed first and the header last.
>
> hsw_write_infoframe() writes the header first, so the packet is crossed
> before its payload is in place and the previous payload keeps being sent.
> This hits the AS SDP, and the VSC SDP whenever an AS SDP is enabled, which
> is whenever VRR is possible since commit 6a1712052859 ("drm/i915/dp: Enable
> AS SDP whenever VRR is possible or PR !async"). With CMN_SDP_TL, enabled by
> commit bfa597238073 ("drm/i915/dip: Enable Common SDP Transmission line"),
> it also hits the GMP and VSC SDPs: on NVL, entering HDR on an eDP panel
> leaves the image discoloured and scaled until the headers are rewritten.
>
> Write the payload, including the ECC zero fill, first and the header last
> on platforms with EMP_AS_SDP_TL. CD domain packets have no ordering
> requirement and Bspec recommends the same order for all packets, so use it
> for all of them. Older platforms keep the current order.
>
> Bspec: 75640, 71197, 74384
> Fixes: e1123e617e51 ("drm/i915/vrr: Program EMP_AS_SDP_TL for DP AS SDP")
> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/17732
> Cc: <stable@vger.kernel.org> # v6.17+
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Cc: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
>
> Notes:
> Fixes tag rationale
>
> The Fixes tag points at commit e1123e617e51 ("drm/i915/vrr: Program
> EMP_AS_SDP_TL for DP AS SDP"). The AS SDP has been written header first
> since it was added by commit 8845021b7331 ("drm/i915/display: Read/Write
> Adaptive Sync SDP"), but EMP_AS_SDP_TL, which holds the double buffer
> point and the transmission line of the AS SDP on BMG and LNL+, was only
> programmed from that commit on. From then on the driver relies on that
> register to anchor the AS SDP, and the VSC SDP whenever an AS SDP is
> enabled, and the programming note of the register asks for the packet
> data first and the header last. The two later commits cited in the commit
> message only widened the exposure: the first enabled the AS SDP whenever
> VRR is possible and the second added CMN_SDP_TL for the GMP and VSC SDPs.
>
> Alternatives considered:
> - 6a1712052859 (v7.2): AS SDP on whenever VRR is possible. The PTL
> report is fixed by reverting it. Narrower than the spec argument, as
> it only covers v7.2 and later.
> - bfa597238073 (7.4): CMN_SDP_TL. The NVL regression, verified on
> hardware, but covered by the older tag as every kernel with it also
> has e1123e617e51.
> - 8845021b7331 (v6.10): first header first AS SDP write, but
> EMP_AS_SDP_TL was not programmed until e1123e617e51, so exposure
> before it could not be shown.
>
> Not verified:
> - The failure was observed on NVL with CMN_SDP_TL (rewriting the GMP and
> VSC headers makes the panel recover). The AS SDP and the VSC SDP with
> an AS SDP on BMG, LNL and PTL follow from the Bspec requirement and
> were not reproduced here.
> - No reproduction on kernels older than v7.2.
> - Stable backports need the HAS_EMP_AS_SDP_TL gate adapted, as it is
> defined in intel_dip.h, which is new in 7.4.
>
> drivers/gpu/drm/i915/display/intel_hdmi.c | 21 +++++++++++++++++----
> 1 file changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 4ec0db8d93fb..3ecf017b3176 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -51,6 +51,7 @@
> #include "intel_cx0_phy.h"
> #include "intel_ddi.h"
> #include "intel_de.h"
> +#include "intel_dip.h"
> #include "intel_display_driver.h"
> #include "intel_display_regs.h"
> #include "intel_display_types.h"
> @@ -524,6 +525,15 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
> const u32 *data = frame;
> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> intel_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(display, cpu_transcoder);
> + /*
> + * On platforms with the SDP transmission line registers some of the
> + * packets are double buffered in the transcoder clock domain, and the
> + * packet is clock crossed on the write of the header (dword 0). Program
> + * the payload first and the header last, so that the whole packet gets
> + * crossed. Packets double buffered in the core display clock domain
> + * have no ordering requirement, so use the same order for all of them.
> + */
> + bool header_last = HAS_EMP_AS_SDP_TL(display);
> int data_size;
> int i;
> u32 val = intel_de_read(display, ctl_reg);
> @@ -535,18 +545,21 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
> val &= ~hsw_infoframe_enable(type);
> intel_de_write(display, ctl_reg, val);
>
> - for (i = 0; i < len; i += 4) {
> + for (i = header_last ? 4 : 0; i < len; i += 4)
IMO just always use the "write header last" approach.
> intel_de_write(display,
> hsw_dip_data_reg(display, cpu_transcoder, type, i >> 2),
> - *data);
> - data++;
> - }
> + data[i >> 2]);
Making 'i' the dword index rather than the byte index might make this
code a bit nicer. The only slight concern is whether len%4!=0 might
be true. Maybe just have the caller always align it for good measure.
But let's stick to the byte based thing for now to avoid adding more
noise to this patch, and clean it up later.
> /* Write every possible data byte to force correct ECC calculation. */
> for (; i < data_size; i += 4)
> intel_de_write(display,
> hsw_dip_data_reg(display, cpu_transcoder, type, i >> 2),
> 0);
>
> + if (header_last)
> + intel_de_write(display,
> + hsw_dip_data_reg(display, cpu_transcoder, type, 0),
> + data[0]);
> +
> /* Wa_14013475917 */
> if (!(IS_DISPLAY_VER(display, 13, 14) && crtc_state->has_psr &&
> !crtc_state->has_panel_replay && type == DP_SDP_VSC))
> --
> 2.50.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/dip: Write the DIP header last with SDP transmission lines
2026-11-11 10:35 [PATCH] drm/i915/dip: Write the DIP header last with SDP transmission lines Chaitanya Kumar Borah
2026-11-11 11:08 ` ✓ CI.KUnit: success for " Patchwork
2026-11-11 11:36 ` [PATCH] " Ville Syrjälä
@ 2026-11-11 11:50 ` Patchwork
2026-11-11 12:16 ` [PATCH] " Xiao Lu
2026-11-11 18:19 ` ✓ Xe.CI.FULL: success for " Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2026-11-11 11:50 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 890 bytes --]
== Series Details ==
Series: drm/i915/dip: Write the DIP header last with SDP transmission lines
URL : https://patchwork.freedesktop.org/series/178304/
State : success
== Summary ==
CI Bug Log - changes from xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c_BAT -> xe-pw-178304v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (15 -> 15)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c -> xe-pw-178304v1
IGT_9186: 9186
xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c: 2077fe24e29527c2b5cb634ffbc3725893f5c54c
xe-pw-178304v1: 178304v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/index.html
[-- Attachment #2: Type: text/html, Size: 1438 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915/dip: Write the DIP header last with SDP transmission lines
2026-11-11 10:35 [PATCH] drm/i915/dip: Write the DIP header last with SDP transmission lines Chaitanya Kumar Borah
` (2 preceding siblings ...)
2026-11-11 11:50 ` ✓ Xe.CI.BAT: success for " Patchwork
@ 2026-11-11 12:16 ` Xiao Lu
2026-11-11 12:26 ` Xiao Lu
2026-11-11 13:17 ` Borah, Chaitanya Kumar
2026-11-11 18:19 ` ✓ Xe.CI.FULL: success for " Patchwork
4 siblings, 2 replies; 9+ messages in thread
From: Xiao Lu @ 2026-11-11 12:16 UTC (permalink / raw)
To: chaitanya.kumar.borah
Cc: intel-gfx, intel-xe, ankit.k.nautiyal, suraj.kandpal, Xiao Lu
Hi Chaitanya,
On Wed, 11 Nov 2026 16:05:42 +0530, Chaitanya Kumar Borah wrote:
> On platforms with SDP transmission line registers, the packets anchored
> to them are double buffered in the transcoder (TC) clock domain. The packet
> registers are in the core display (CD) clock domain and the whole packet is
> clock crossed on the write of the header (dword 0), so Bspec requires the
> data to be programmed first and the header last.
>
> hsw_write_infoframe() writes the header first, so the packet is crossed
> before its payload is in place and the previous payload keeps being sent.
This is the same change, with the same reasoning (Bspec 75640), as the one
I posted for Xe2+ two weeks ago:
https://patchwork.freedesktop.org/patch/763779/
Message-ID: <20261028112423.2445450-1-xiaolu.xie@intel.com>
Yours looks like the better base for that part, as HAS_EMP_AS_SDP_TL also
covers BMG and it has the Fixes: and stable tags, so I'm happy to rebase on
top of it.
[...]
> Alternatives considered:
> - 6a1712052859 (v7.2): AS SDP on whenever VRR is possible. The PTL
> report is fixed by reverting it. Narrower than the spec argument, as
> it only covers v7.2 and later.
Is that PTL report this one?
https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9693
Our patch was written for it: an eDP panel dropping the VSC SDP after some
HDR modesets on PTL, with different VSC ECC registers compared to the
working case. The reporter tested our patch on the affected machine and
commented in the issue that the test passes.
[...]
> + if (header_last)
> + intel_de_write(display,
> + hsw_dip_data_reg(display, cpu_transcoder, type, 0),
> + data[0]);
> +
> /* Wa_14013475917 */
> if (!(IS_DISPLAY_VER(display, 13, 14) && crtc_state->has_psr &&
> !crtc_state->has_panel_replay && type == DP_SDP_VSC))
There is one more hunk in our patch that yours does not have. Right below
this, hsw_write_infoframe() ORs VSC_DIP_HW_DATA_SW_HEA into VIDEO_DIP_CTL
for the VSC SDP. VSC_SELECT is a two bit field (VSC_SELECT_MASK), so a
stale value is not replaced but merged with the new one, e.g. 1 | 2 results
in 3. We clear the field before setting it, and also clear it in
intel_dp_set_infoframes() when the SDPs get disabled.
Was leaving that out intentional, e.g. because the field is guaranteed to be
clear at that point, or is it something that was missed? If it is needed, I
can send it as a separate patch on top of yours.
Thanks,
Xiao
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915/dip: Write the DIP header last with SDP transmission lines
2026-11-11 12:16 ` [PATCH] " Xiao Lu
@ 2026-11-11 12:26 ` Xiao Lu
2026-11-11 13:17 ` Borah, Chaitanya Kumar
1 sibling, 0 replies; 9+ messages in thread
From: Xiao Lu @ 2026-11-11 12:26 UTC (permalink / raw)
To: ville.syrjala
Cc: chaitanya.kumar.borah, intel-gfx, intel-xe, ankit.k.nautiyal,
suraj.kandpal, Xiao Lu
Hi Ville,
Adding you, as you reviewed this patch and I missed you on the Cc list of
my mail below.
On Wed, 11 Nov 2026 12:16:53, Xiao Lu wrote:
> VSC_SELECT is a two bit field (VSC_SELECT_MASK), so a stale value is not
> replaced but merged with the new one, e.g. 1 | 2 results in 3. We clear the
> field before setting it, and also clear it in intel_dp_set_infoframes()
> when the SDPs get disabled.
>
> Was leaving that out intentional, e.g. because the field is guaranteed to be
> clear at that point, or is it something that was missed?
hsw_write_infoframe() ORs VSC_DIP_HW_DATA_SW_HEA into VIDEO_DIP_CTL for the
VSC SDP without clearing VSC_SELECT first. Do you know if that needs
clearing, or is the field known to be clear there? If it does, I can send it
as a separate patch on top of Chaitanya's.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915/dip: Write the DIP header last with SDP transmission lines
2026-11-11 11:36 ` [PATCH] " Ville Syrjälä
@ 2026-11-11 12:56 ` Borah, Chaitanya Kumar
0 siblings, 0 replies; 9+ messages in thread
From: Borah, Chaitanya Kumar @ 2026-11-11 12:56 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe, intel-gfx, stable, Ankit Nautiyal, Suraj Kandpal
On 11/11/2026 5:06 PM, Ville Syrjälä wrote:
> On Wed, Nov 11, 2026 at 04:05:42PM +0530, Chaitanya Kumar Borah wrote:
>> On platforms with SDP transmission line registers, the packets anchored
>> to them are double buffered in the transcoder (TC) clock domain. The packet
>> registers are in the core display (CD) clock domain and the whole packet is
>> clock crossed on the write of the header (dword 0), so Bspec requires the
>> data to be programmed first and the header last.
>>
>> hsw_write_infoframe() writes the header first, so the packet is crossed
>> before its payload is in place and the previous payload keeps being sent.
>> This hits the AS SDP, and the VSC SDP whenever an AS SDP is enabled, which
>> is whenever VRR is possible since commit 6a1712052859 ("drm/i915/dp: Enable
>> AS SDP whenever VRR is possible or PR !async"). With CMN_SDP_TL, enabled by
>> commit bfa597238073 ("drm/i915/dip: Enable Common SDP Transmission line"),
>> it also hits the GMP and VSC SDPs: on NVL, entering HDR on an eDP panel
>> leaves the image discoloured and scaled until the headers are rewritten.
>>
>> Write the payload, including the ECC zero fill, first and the header last
>> on platforms with EMP_AS_SDP_TL. CD domain packets have no ordering
>> requirement and Bspec recommends the same order for all packets, so use it
>> for all of them. Older platforms keep the current order.
>>
>> Bspec: 75640, 71197, 74384
>> Fixes: e1123e617e51 ("drm/i915/vrr: Program EMP_AS_SDP_TL for DP AS SDP")
>> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/17732
>> Cc: <stable@vger.kernel.org> # v6.17+
>> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Cc: Suraj Kandpal <suraj.kandpal@intel.com>
>> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>> ---
>>
>> Notes:
>> Fixes tag rationale
>>
>> The Fixes tag points at commit e1123e617e51 ("drm/i915/vrr: Program
>> EMP_AS_SDP_TL for DP AS SDP"). The AS SDP has been written header first
>> since it was added by commit 8845021b7331 ("drm/i915/display: Read/Write
>> Adaptive Sync SDP"), but EMP_AS_SDP_TL, which holds the double buffer
>> point and the transmission line of the AS SDP on BMG and LNL+, was only
>> programmed from that commit on. From then on the driver relies on that
>> register to anchor the AS SDP, and the VSC SDP whenever an AS SDP is
>> enabled, and the programming note of the register asks for the packet
>> data first and the header last. The two later commits cited in the commit
>> message only widened the exposure: the first enabled the AS SDP whenever
>> VRR is possible and the second added CMN_SDP_TL for the GMP and VSC SDPs.
>>
>> Alternatives considered:
>> - 6a1712052859 (v7.2): AS SDP on whenever VRR is possible. The PTL
>> report is fixed by reverting it. Narrower than the spec argument, as
>> it only covers v7.2 and later.
>> - bfa597238073 (7.4): CMN_SDP_TL. The NVL regression, verified on
>> hardware, but covered by the older tag as every kernel with it also
>> has e1123e617e51.
>> - 8845021b7331 (v6.10): first header first AS SDP write, but
>> EMP_AS_SDP_TL was not programmed until e1123e617e51, so exposure
>> before it could not be shown.
>>
>> Not verified:
>> - The failure was observed on NVL with CMN_SDP_TL (rewriting the GMP and
>> VSC headers makes the panel recover). The AS SDP and the VSC SDP with
>> an AS SDP on BMG, LNL and PTL follow from the Bspec requirement and
>> were not reproduced here.
>> - No reproduction on kernels older than v7.2.
>> - Stable backports need the HAS_EMP_AS_SDP_TL gate adapted, as it is
>> defined in intel_dip.h, which is new in 7.4.
>>
>> drivers/gpu/drm/i915/display/intel_hdmi.c | 21 +++++++++++++++++----
>> 1 file changed, 17 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
>> index 4ec0db8d93fb..3ecf017b3176 100644
>> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
>> @@ -51,6 +51,7 @@
>> #include "intel_cx0_phy.h"
>> #include "intel_ddi.h"
>> #include "intel_de.h"
>> +#include "intel_dip.h"
>> #include "intel_display_driver.h"
>> #include "intel_display_regs.h"
>> #include "intel_display_types.h"
>> @@ -524,6 +525,15 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
>> const u32 *data = frame;
>> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>> intel_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(display, cpu_transcoder);
>> + /*
>> + * On platforms with the SDP transmission line registers some of the
>> + * packets are double buffered in the transcoder clock domain, and the
>> + * packet is clock crossed on the write of the header (dword 0). Program
>> + * the payload first and the header last, so that the whole packet gets
>> + * crossed. Packets double buffered in the core display clock domain
>> + * have no ordering requirement, so use the same order for all of them.
>> + */
>> + bool header_last = HAS_EMP_AS_SDP_TL(display);
>> int data_size;
>> int i;
>> u32 val = intel_de_read(display, ctl_reg);
>> @@ -535,18 +545,21 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
>> val &= ~hsw_infoframe_enable(type);
>> intel_de_write(display, ctl_reg, val);
>>
>> - for (i = 0; i < len; i += 4) {
>> + for (i = header_last ? 4 : 0; i < len; i += 4)
>
> IMO just always use the "write header last" approach.
>
Agreed. I was trying to keep the exposure minimal but this should be
harmless given the registers are either not double-buffered or double
buffered without an arming register in the older platforms.
>> intel_de_write(display,
>> hsw_dip_data_reg(display, cpu_transcoder, type, i >> 2),
>> - *data);
>> - data++;
>> - }
>> + data[i >> 2]);
>
> Making 'i' the dword index rather than the byte index might make this
> code a bit nicer. The only slight concern is whether len%4!=0 might
> be true. Maybe just have the caller always align it for good measure.
> But let's stick to the byte based thing for now to avoid adding more
> noise to this patch, and clean it up later.
>
Noted for later.
>> /* Write every possible data byte to force correct ECC calculation. */
>> for (; i < data_size; i += 4)
>> intel_de_write(display,
>> hsw_dip_data_reg(display, cpu_transcoder, type, i >> 2),
>> 0);
>>
>> + if (header_last)
>> + intel_de_write(display,
>> + hsw_dip_data_reg(display, cpu_transcoder, type, 0),
>> + data[0]);
>> +
>> /* Wa_14013475917 */
>> if (!(IS_DISPLAY_VER(display, 13, 14) && crtc_state->has_psr &&
>> !crtc_state->has_panel_replay && type == DP_SDP_VSC))
>> --
>> 2.50.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915/dip: Write the DIP header last with SDP transmission lines
2026-11-11 12:16 ` [PATCH] " Xiao Lu
2026-11-11 12:26 ` Xiao Lu
@ 2026-11-11 13:17 ` Borah, Chaitanya Kumar
1 sibling, 0 replies; 9+ messages in thread
From: Borah, Chaitanya Kumar @ 2026-11-11 13:17 UTC (permalink / raw)
To: Xiao Lu; +Cc: intel-gfx, intel-xe, ankit.k.nautiyal, suraj.kandpal
Hello Xiao,
On 11/11/2026 5:46 PM, Xiao Lu wrote:
> Hi Chaitanya,
>
> On Wed, 11 Nov 2026 16:05:42 +0530, Chaitanya Kumar Borah wrote:
>> On platforms with SDP transmission line registers, the packets anchored
>> to them are double buffered in the transcoder (TC) clock domain. The packet
>> registers are in the core display (CD) clock domain and the whole packet is
>> clock crossed on the write of the header (dword 0), so Bspec requires the
>> data to be programmed first and the header last.
>>
>> hsw_write_infoframe() writes the header first, so the packet is crossed
>> before its payload is in place and the previous payload keeps being sent.
>
> This is the same change, with the same reasoning (Bspec 75640), as the one
> I posted for Xe2+ two weeks ago:
>
> https://patchwork.freedesktop.org/patch/763779/
> Message-ID: <20261028112423.2445450-1-xiaolu.xie@intel.com>
>
> Yours looks like the better base for that part, as HAS_EMP_AS_SDP_TL also
> covers BMG and it has the Fixes: and stable tags, so I'm happy to rebase on
> top of it.
>
> [...]
>
>> Alternatives considered:
>> - 6a1712052859 (v7.2): AS SDP on whenever VRR is possible. The PTL
>> report is fixed by reverting it. Narrower than the spec argument, as
>> it only covers v7.2 and later.
>
> Is that PTL report this one?
>
> https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9693
>
> Our patch was written for it: an eDP panel dropping the VSC SDP after some
> HDR modesets on PTL, with different VSC ECC registers compared to the
> working case. The reporter tested our patch on the affected machine and
> commented in the issue that the test passes.
>
> [...]
>
Thanks for the pointer to your earlier patch. Sorry, I missed it. The
PTL issue I was referring to was a different one:
https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9746
where reverting 6a1712052859 ("drm/i915/dp: Enable AS SDP whenever VRR
is possible or PR !async") helps, but it looks like the same problem as
seen in
https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/17732
>> + if (header_last)
>> + intel_de_write(display,
>> + hsw_dip_data_reg(display, cpu_transcoder, type, 0),
>> + data[0]);
>> +
>> /* Wa_14013475917 */
>> if (!(IS_DISPLAY_VER(display, 13, 14) && crtc_state->has_psr &&
>> !crtc_state->has_panel_replay && type == DP_SDP_VSC))
>
> There is one more hunk in our patch that yours does not have. Right below
> this, hsw_write_infoframe() ORs VSC_DIP_HW_DATA_SW_HEA into VIDEO_DIP_CTL
> for the VSC SDP. VSC_SELECT is a two bit field (VSC_SELECT_MASK), so a
> stale value is not replaced but merged with the new one, e.g. 1 | 2 results
> in 3. We clear the field before setting it, and also clear it in
> intel_dp_set_infoframes() when the SDPs get disabled.
>
> Was leaving that out intentional, e.g. because the field is guaranteed to be
> clear at that point, or is it something that was missed? If it is needed, I
> can send it as a separate patch on top of yours.
>
I didn't look at VSC_SELECT, as the header write order alone fixed what
I was seeing. The driver only ever writes the "data only" value there,
so a stale value would have to come from state the driver didn't write
(e.g. BIOS) but I reckon clearing it first is harmless. You can post it
on top of v2 where I plan to drop the HAS_EMP_AS_SDP_TL check, as Ville
suggested.
==
Chaitanya
> Thanks,
> Xiao
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Xe.CI.FULL: success for drm/i915/dip: Write the DIP header last with SDP transmission lines
2026-11-11 10:35 [PATCH] drm/i915/dip: Write the DIP header last with SDP transmission lines Chaitanya Kumar Borah
` (3 preceding siblings ...)
2026-11-11 12:16 ` [PATCH] " Xiao Lu
@ 2026-11-11 18:19 ` Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2026-11-11 18:19 UTC (permalink / raw)
To: Borah, Chaitanya Kumar; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 34760 bytes --]
== Series Details ==
Series: drm/i915/dip: Write the DIP header last with SDP transmission lines
URL : https://patchwork.freedesktop.org/series/178304/
State : success
== Summary ==
CI Bug Log - changes from xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c_FULL -> xe-pw-178304v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (3 -> 3)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-178304v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_3d@basic:
- shard-lnl: NOTRUN -> [SKIP][1] ([Intel XE#6011])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_3d@basic.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][2] ([Intel XE#2327])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-90:
- shard-lnl: NOTRUN -> [SKIP][3] ([Intel XE#1124])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_big_fb@yf-tiled-32bpp-rotate-90.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc:
- shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#2887])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#2887])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-9/igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-b-dp-1:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2652]) +7 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-7/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-b-dp-1.html
* igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt2020:
- shard-lnl: NOTRUN -> [SKIP][7] ([Intel XE#7358])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt2020.html
* igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#373])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k.html
* igt@kms_content_protection@atomic-hdcp14@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][9] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +2 other tests fail
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_content_protection@atomic-hdcp14@pipe-a-dp-2.html
* igt@kms_content_protection@suspend-resume@pipe-a-dp-1:
- shard-bmg: NOTRUN -> [FAIL][10] ([Intel XE#3304])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-7/igt@kms_content_protection@suspend-resume@pipe-a-dp-1.html
* igt@kms_cursor_crc@cursor-offscreen-64x21:
- shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#1424])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_cursor_crc@cursor-offscreen-64x21.html
* igt@kms_cursor_edge_walk@256x256-left-edge@pipe-a-dp-2:
- shard-bmg: [PASS][12] -> [FAIL][13] ([Intel XE#9736]) +1 other test fail
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-10/igt@kms_cursor_edge_walk@256x256-left-edge@pipe-a-dp-2.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-5/igt@kms_cursor_edge_walk@256x256-left-edge@pipe-a-dp-2.html
* igt@kms_dsc@dsc-with-bpc-formats-bigjoiner:
- shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#8265])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_dsc@dsc-with-bpc-formats-bigjoiner.html
* igt@kms_flip@2x-flip-vs-dpms:
- shard-lnl: NOTRUN -> [SKIP][15] ([Intel XE#1421])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_flip@2x-flip-vs-dpms.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [PASS][16] -> [FAIL][17] ([Intel XE#301] / [Intel XE#3149])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#7178] / [Intel XE#7351])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2311]) +5 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-onoff:
- shard-lnl: NOTRUN -> [SKIP][20] ([Intel XE#656] / [Intel XE#7905]) +2 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-pgflip-blt:
- shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#6312] / [Intel XE#651])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#6312]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-cur-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][23] ([Intel XE#7905]) +4 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][24] ([Intel XE#7865]) +2 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2313]) +2 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#7061] / [Intel XE#7356])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-render:
- shard-ptl: NOTRUN -> [SKIP][27] ([Intel XE#5812]) +1 other test skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-ptl-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-lnl: NOTRUN -> [SKIP][28] ([Intel XE#4596] / [Intel XE#5854])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888:
- shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888.html
* igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420:
- shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#8396]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#1489])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf:
- shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][34] ([Intel XE#4608])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][35] ([Intel XE#4608] / [Intel XE#7304])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf@pipe-b-edp-1.html
* igt@kms_psr@fbc-psr2-dpms:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_psr@fbc-psr2-dpms.html
* igt@kms_psr@fbc-psr2-no-drrs:
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#1406] / [Intel XE#7345])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_psr@fbc-psr2-no-drrs.html
* igt@kms_psr@fbc-psr2-no-drrs@edp-1:
- shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#1406] / [Intel XE#4609] / [Intel XE#7345])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_psr@fbc-psr2-no-drrs@edp-1.html
* igt@kms_vrr@flip-suspend@pipe-a-edp-1:
- shard-ptl: [PASS][39] -> [FAIL][40] ([Intel XE#4227] / [Intel XE#7397]) +1 other test fail
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-ptl-8/igt@kms_vrr@flip-suspend@pipe-a-edp-1.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-ptl-3/igt@kms_vrr@flip-suspend@pipe-a-edp-1.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#1091] / [Intel XE#2849])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@sriov_basic@enable-vfs-autoprobe-off.html
* igt@xe_exec_balancer@many-parallel-userptr-invalidate-race:
- shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#7482])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@xe_exec_balancer@many-parallel-userptr-invalidate-race.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-rebind:
- shard-lnl: NOTRUN -> [SKIP][43] ([Intel XE#1392])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-rebind.html
* igt@xe_exec_fault_mode@many-execqueues-multi-queue-rebind-prefetch:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#8374])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@xe_exec_fault_mode@many-execqueues-multi-queue-rebind-prefetch.html
* igt@xe_exec_multi_queue@few-execs-preempt-mode-close-fd-smem:
- shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#8364])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@xe_exec_multi_queue@few-execs-preempt-mode-close-fd-smem.html
* igt@xe_exec_multi_queue@many-queues-preempt-mode-fault-userptr:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#8364]) +1 other test skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@xe_exec_multi_queue@many-queues-preempt-mode-fault-userptr.html
* igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr:
- shard-lnl: NOTRUN -> [SKIP][47] ([Intel XE#8378])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr.html
* igt@xe_exec_threads@threads-multi-queue-mixed-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#8378]) +1 other test skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-9/igt@xe_exec_threads@threads-multi-queue-mixed-userptr-invalidate.html
* igt@xe_page_reclaim@binds-full-pd:
- shard-lnl: NOTRUN -> [SKIP][49] ([Intel XE#7793])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@xe_page_reclaim@binds-full-pd.html
* igt@xe_pm@s4-mocs:
- shard-ptl: [PASS][50] -> [ABORT][51] ([Intel XE#9362])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-ptl-3/igt@xe_pm@s4-mocs.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-ptl-4/igt@xe_pm@s4-mocs.html
* igt@xe_pm@s4-multiple-execs:
- shard-ptl: [PASS][52] -> [DMESG-WARN][53] ([Intel XE#7727])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-ptl-3/igt@xe_pm@s4-multiple-execs.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-ptl-4/igt@xe_pm@s4-multiple-execs.html
* igt@xe_pm_residency@gt-c6-freeze@gt1:
- shard-bmg: [PASS][54] -> [FAIL][55] ([Intel XE#9254])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-1/igt@xe_pm_residency@gt-c6-freeze@gt1.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-3/igt@xe_pm_residency@gt-c6-freeze@gt1.html
* igt@xe_prefetch_fault@l2-prefetch-fault:
- shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#8815])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-9/igt@xe_prefetch_fault@l2-prefetch-fault.html
#### Possible fixes ####
* igt@kms_bw@linear-tiling-1-displays-target-2160x1440p:
- shard-bmg: [SKIP][57] ([Intel XE#367]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_bw@linear-tiling-1-displays-target-2160x1440p.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-target-2160x1440p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [INCOMPLETE][59] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][60] +1 other test pass
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [FAIL][61] ([Intel XE#301]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-bmg: [INCOMPLETE][63] ([Intel XE#2597] / [Intel XE#8155]) -> [PASS][64] +1 other test pass
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-7/igt@kms_flip@flip-vs-suspend-interruptible.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-ptl: [INCOMPLETE][65] -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-ptl-8/igt@kms_pm_backlight@fade-with-suspend.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-ptl-3/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-bmg: [SKIP][67] -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_pm_rpm@modeset-non-lpsp.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute:
- shard-bmg: [DMESG-FAIL][69] -> [PASS][70] +1 other test pass
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html
* igt@xe_exec_fault_mode@atomic-many:
- shard-bmg: [FAIL][71] ([Intel XE#8578]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-1/igt@xe_exec_fault_mode@atomic-many.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-3/igt@xe_exec_fault_mode@atomic-many.html
* igt@xe_exec_reset@gt-stress-reset-bo-invalidation:
- shard-ptl: [DMESG-WARN][73] ([Intel XE#8652]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-ptl-4/igt@xe_exec_reset@gt-stress-reset-bo-invalidation.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-ptl-8/igt@xe_exec_reset@gt-stress-reset-bo-invalidation.html
* igt@xe_mmap@bad-flags:
- shard-bmg: [SKIP][75] ([Intel XE#8589]) -> [PASS][76] +68 other tests pass
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@xe_mmap@bad-flags.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@xe_mmap@bad-flags.html
* igt@xe_pm@s4-mocs:
- shard-lnl: [DMESG-WARN][77] ([Intel XE#7727]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-lnl-3/igt@xe_pm@s4-mocs.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-1/igt@xe_pm@s4-mocs.html
* igt@xe_pm_residency@gt-c6-freeze@gt0:
- shard-bmg: [FAIL][79] ([Intel XE#9254]) -> [PASS][80]
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-1/igt@xe_pm_residency@gt-c6-freeze@gt0.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-3/igt@xe_pm_residency@gt-c6-freeze@gt0.html
#### Warnings ####
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs:
- shard-bmg: [SKIP][81] ([Intel XE#8589]) -> [SKIP][82] ([Intel XE#2887]) +1 other test skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs.html
* igt@kms_chamelium_hpd@dp-hpd-storm:
- shard-bmg: [SKIP][83] ([Intel XE#8589]) -> [SKIP][84] ([Intel XE#2252]) +1 other test skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_chamelium_hpd@dp-hpd-storm.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_chamelium_hpd@dp-hpd-storm.html
* igt@kms_content_protection@atomic-hdcp14:
- shard-bmg: [SKIP][85] ([Intel XE#8589]) -> [FAIL][86] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_content_protection@atomic-hdcp14.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_content_protection@atomic-hdcp14.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-lnl: [FAIL][87] ([Intel XE#301]) -> [FAIL][88] ([Intel XE#301] / [Intel XE#3149])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
- shard-bmg: [SKIP][89] ([Intel XE#8589]) -> [SKIP][90] ([Intel XE#7178] / [Intel XE#7351])
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary:
- shard-bmg: [SKIP][91] ([Intel XE#8589]) -> [SKIP][92] ([Intel XE#2311]) +4 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][93] ([Intel XE#8589]) -> [SKIP][94] ([Intel XE#2313]) +2 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-render:
- shard-bmg: [SKIP][95] ([Intel XE#8589]) -> [SKIP][96] ([Intel XE#7061] / [Intel XE#7356])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-render.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-render.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping:
- shard-bmg: [SKIP][97] ([Intel XE#8589]) -> [SKIP][98] ([Intel XE#7283])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf:
- shard-bmg: [SKIP][99] ([Intel XE#8589]) -> [SKIP][100] ([Intel XE#1489])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf.html
* igt@kms_rotation_crc@bad-tiling:
- shard-bmg: [SKIP][101] ([Intel XE#8589]) -> [SKIP][102] ([Intel XE#3904] / [Intel XE#7342])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_rotation_crc@bad-tiling.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_rotation_crc@bad-tiling.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-bmg: [SKIP][103] ([Intel XE#8589]) -> [SKIP][104] ([Intel XE#2330] / [Intel XE#5813])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][105] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][106] ([Intel XE#1729] / [Intel XE#7424])
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-rebind:
- shard-bmg: [SKIP][107] ([Intel XE#8589]) -> [SKIP][108] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-rebind.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-rebind.html
* igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind-prefetch:
- shard-bmg: [SKIP][109] ([Intel XE#8589]) -> [SKIP][110] ([Intel XE#8374]) +1 other test skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind-prefetch.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind-prefetch.html
* igt@xe_exec_multi_queue@max-queues-close-fd:
- shard-bmg: [SKIP][111] ([Intel XE#8589]) -> [SKIP][112] ([Intel XE#8364]) +2 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@xe_exec_multi_queue@max-queues-close-fd.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@xe_exec_multi_queue@max-queues-close-fd.html
* igt@xe_exec_reset@multi-queue-cat-error:
- shard-bmg: [SKIP][113] ([Intel XE#8589]) -> [SKIP][114] ([Intel XE#8369])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@xe_exec_reset@multi-queue-cat-error.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@xe_exec_reset@multi-queue-cat-error.html
* igt@xe_page_reclaim@binds-null-vma:
- shard-bmg: [SKIP][115] ([Intel XE#8589]) -> [SKIP][116] ([Intel XE#7793])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c/shard-bmg-3/igt@xe_page_reclaim@binds-null-vma.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/shard-bmg-4/igt@xe_page_reclaim@binds-null-vma.html
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
[Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
[Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
[Intel XE#6011]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6011
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
[Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7727
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
[Intel XE#8155]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8155
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
[Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
[Intel XE#8578]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8578
[Intel XE#8589]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8589
[Intel XE#8652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8652
[Intel XE#8815]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8815
[Intel XE#9254]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9254
[Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
[Intel XE#9736]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9736
Build changes
-------------
* Linux: xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c -> xe-pw-178304v1
IGT_9186: 9186
xe-6108-2077fe24e29527c2b5cb634ffbc3725893f5c54c: 2077fe24e29527c2b5cb634ffbc3725893f5c54c
xe-pw-178304v1: 178304v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-178304v1/index.html
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-- links below jump to the message on this page --
2026-11-11 10:35 [PATCH] drm/i915/dip: Write the DIP header last with SDP transmission lines Chaitanya Kumar Borah
2026-11-11 11:08 ` ✓ CI.KUnit: success for " Patchwork
2026-11-11 11:36 ` [PATCH] " Ville Syrjälä
2026-11-11 12:56 ` Borah, Chaitanya Kumar
2026-11-11 11:50 ` ✓ Xe.CI.BAT: success for " Patchwork
2026-11-11 12:16 ` [PATCH] " Xiao Lu
2026-11-11 12:26 ` Xiao Lu
2026-11-11 13:17 ` Borah, Chaitanya Kumar
2026-11-11 18:19 ` ✓ Xe.CI.FULL: success for " Patchwork
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