* [PATCH 0/6] More PF improvements
@ 2025-09-30 23:35 Michal Wajdeczko
2025-09-30 23:35 ` [PATCH 1/6] drm/xe/pf: Add top level functions to control VFs Michal Wajdeczko
` (9 more replies)
0 siblings, 10 replies; 23+ messages in thread
From: Michal Wajdeczko @ 2025-09-30 23:35 UTC (permalink / raw)
To: intel-xe; +Cc: Michal Wajdeczko
Michal Wajdeczko (6):
drm/xe/pf: Add top level functions to control VFs
drm/xe/pf: Log only top level VF state changes
drm/xe/pf: Expose VF control operations over debugfs
drm/xe/pf: Unify VF state tracking log
drm/xe/pf: Split VF FLR processing function
drm/xe/pf: Synchronize VF FLR between all GTs
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 102 ++++++++++--
drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h | 2 +
.../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 2 +
drivers/gpu/drm/xe/xe_pci_sriov.c | 8 +-
drivers/gpu/drm/xe/xe_sriov_pf_control.c | 151 ++++++++++++++++++
drivers/gpu/drm/xe/xe_sriov_pf_control.h | 17 ++
drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c | 93 +++++++++++
8 files changed, 360 insertions(+), 16 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_sriov_pf_control.c
create mode 100644 drivers/gpu/drm/xe/xe_sriov_pf_control.h
--
2.47.1
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH 1/6] drm/xe/pf: Add top level functions to control VFs
2025-09-30 23:35 [PATCH 0/6] More PF improvements Michal Wajdeczko
@ 2025-09-30 23:35 ` Michal Wajdeczko
2025-10-01 7:34 ` Matthew Brost
2025-10-02 21:26 ` Michał Winiarski
2025-09-30 23:35 ` [PATCH 2/6] drm/xe/pf: Log only top level VF state changes Michal Wajdeczko
` (8 subsequent siblings)
9 siblings, 2 replies; 23+ messages in thread
From: Michal Wajdeczko @ 2025-09-30 23:35 UTC (permalink / raw)
To: intel-xe; +Cc: Michal Wajdeczko
We already have control functions that we use to control the VF
state on the per-GT basis, but that is low level detail from the
user point of view, who rather expects VF-level functions.
For now add simple functions that just iterate over all GTs and
call per-GT control function. We will soon allow to use some of
them from the user facing interfaces like debugfs.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_pci_sriov.c | 8 +-
drivers/gpu/drm/xe/xe_sriov_pf_control.c | 104 +++++++++++++++++++++++
drivers/gpu/drm/xe/xe_sriov_pf_control.h | 16 ++++
4 files changed, 124 insertions(+), 5 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_sriov_pf_control.c
create mode 100644 drivers/gpu/drm/xe/xe_sriov_pf_control.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 3c5d2388997d..84321fad3265 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -174,6 +174,7 @@ xe-$(CONFIG_PCI_IOV) += \
xe_lmtt_ml.o \
xe_pci_sriov.o \
xe_sriov_pf.o \
+ xe_sriov_pf_control.o \
xe_sriov_pf_debugfs.o \
xe_sriov_pf_service.o \
xe_tile_sriov_pf_debugfs.o
diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c
index af05db07162e..9c1c9e669b04 100644
--- a/drivers/gpu/drm/xe/xe_pci_sriov.c
+++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
@@ -17,6 +17,7 @@
#include "xe_pm.h"
#include "xe_sriov.h"
#include "xe_sriov_pf.h"
+#include "xe_sriov_pf_control.h"
#include "xe_sriov_pf_helpers.h"
#include "xe_sriov_printk.h"
@@ -60,13 +61,10 @@ static void pf_unprovision_vfs(struct xe_device *xe, unsigned int num_vfs)
static void pf_reset_vfs(struct xe_device *xe, unsigned int num_vfs)
{
- struct xe_gt *gt;
- unsigned int id;
unsigned int n;
- for_each_gt(gt, xe, id)
- for (n = 1; n <= num_vfs; n++)
- xe_gt_sriov_pf_control_trigger_flr(gt, n);
+ for (n = 1; n <= num_vfs; n++)
+ xe_sriov_pf_control_reset_vf(xe, n);
}
static struct pci_dev *xe_pci_pf_get_vf_dev(struct xe_device *xe, unsigned int vf_id)
diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
new file mode 100644
index 000000000000..56c0dd382262
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#include "xe_device.h"
+#include "xe_gt_sriov_pf_control.h"
+#include "xe_sriov_pf_control.h"
+
+/**
+ * xe_sriov_pf_control_pause_vf() - Pause a VF on all GTs.
+ * @xe: the &xe_device
+ * @vfid: the VF identifier (can't be 0 == PFID)
+ *
+ * This function is for PF only.
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int xe_sriov_pf_control_pause_vf(struct xe_device *xe, unsigned int vfid)
+{
+ struct xe_gt *gt;
+ unsigned int id;
+ int result = 0;
+ int err;
+
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_sriov_pf_control_pause_vf(gt, vfid);
+ result = result ? -EUCLEAN : err;
+ }
+
+ return result;
+}
+
+/**
+ * xe_sriov_pf_control_resume_vf() - Resume a VF on all GTs.
+ * @xe: the &xe_device
+ * @vfid: the VF identifier
+ *
+ * This function is for PF only.
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int xe_sriov_pf_control_resume_vf(struct xe_device *xe, unsigned int vfid)
+{
+ struct xe_gt *gt;
+ unsigned int id;
+ int result = 0;
+ int err;
+
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_sriov_pf_control_resume_vf(gt, vfid);
+ result = result ? -EUCLEAN : err;
+ }
+
+ return result;
+}
+
+/**
+ * xe_sriov_pf_control_stop_vf - Stop a VF on all GTs.
+ * @xe: the &xe_device
+ * @vfid: the VF identifier
+ *
+ * This function is for PF only.
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int xe_sriov_pf_control_stop_vf(struct xe_device *xe, unsigned int vfid)
+{
+ struct xe_gt *gt;
+ unsigned int id;
+ int result = 0;
+ int err;
+
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_sriov_pf_control_stop_vf(gt, vfid);
+ result = result ? -EUCLEAN : err;
+ }
+
+ return result;
+}
+
+/**
+ * xe_sriov_pf_control_reset_vf() - Perform a VF reset (FLR).
+ * @xe: the &xe_device
+ * @vfid: the VF identifier
+ *
+ * This function is for PF only.
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid)
+{
+ struct xe_gt *gt;
+ unsigned int id;
+ int result = 0;
+ int err;
+
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_sriov_pf_control_trigger_flr(gt, vfid);
+ result = result ? -EUCLEAN : err;
+ }
+
+ return result;
+}
diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.h b/drivers/gpu/drm/xe/xe_sriov_pf_control.h
new file mode 100644
index 000000000000..9bf059f746d4
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef _XE_SRIOV_PF_CONTROL_H_
+#define _XE_SRIOV_PF_CONTROL_H_
+
+struct xe_device;
+
+int xe_sriov_pf_control_pause_vf(struct xe_device *xe, unsigned int vfid);
+int xe_sriov_pf_control_resume_vf(struct xe_device *xe, unsigned int vfid);
+int xe_sriov_pf_control_stop_vf(struct xe_device *xe, unsigned int vfid);
+int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid);
+
+#endif
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 2/6] drm/xe/pf: Log only top level VF state changes
2025-09-30 23:35 [PATCH 0/6] More PF improvements Michal Wajdeczko
2025-09-30 23:35 ` [PATCH 1/6] drm/xe/pf: Add top level functions to control VFs Michal Wajdeczko
@ 2025-09-30 23:35 ` Michal Wajdeczko
2025-10-02 21:33 ` Michał Winiarski
2025-09-30 23:35 ` [PATCH 3/6] drm/xe/pf: Expose VF control operations over debugfs Michal Wajdeczko
` (7 subsequent siblings)
9 siblings, 1 reply; 23+ messages in thread
From: Michal Wajdeczko @ 2025-09-30 23:35 UTC (permalink / raw)
To: intel-xe; +Cc: Michal Wajdeczko
The user likely only care about top level VF state changes, any VF
state logs on the per-GT basis can be demoted to the debug level.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 6 +++---
drivers/gpu/drm/xe/xe_sriov_pf_control.c | 19 ++++++++++++++++---
2 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
index 4f7fff892bc0..e582f4d60015 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
@@ -616,7 +616,7 @@ int xe_gt_sriov_pf_control_pause_vf(struct xe_gt *gt, unsigned int vfid)
}
if (pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED)) {
- xe_gt_sriov_info(gt, "VF%u paused!\n", vfid);
+ xe_gt_sriov_dbg(gt, "VF%u paused!\n", vfid);
return 0;
}
@@ -755,7 +755,7 @@ int xe_gt_sriov_pf_control_resume_vf(struct xe_gt *gt, unsigned int vfid)
return err;
if (pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESUMED)) {
- xe_gt_sriov_info(gt, "VF%u resumed!\n", vfid);
+ xe_gt_sriov_dbg(gt, "VF%u resumed!\n", vfid);
return 0;
}
@@ -896,7 +896,7 @@ int xe_gt_sriov_pf_control_stop_vf(struct xe_gt *gt, unsigned int vfid)
return err;
if (pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_STOPPED)) {
- xe_gt_sriov_info(gt, "VF%u stopped!\n", vfid);
+ xe_gt_sriov_dbg(gt, "VF%u stopped!\n", vfid);
return 0;
}
diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
index 56c0dd382262..fdadd4fbe985 100644
--- a/drivers/gpu/drm/xe/xe_sriov_pf_control.c
+++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
@@ -6,6 +6,7 @@
#include "xe_device.h"
#include "xe_gt_sriov_pf_control.h"
#include "xe_sriov_pf_control.h"
+#include "xe_sriov_printk.h"
/**
* xe_sriov_pf_control_pause_vf() - Pause a VF on all GTs.
@@ -28,7 +29,11 @@ int xe_sriov_pf_control_pause_vf(struct xe_device *xe, unsigned int vfid)
result = result ? -EUCLEAN : err;
}
- return result;
+ if (result)
+ return result;
+
+ xe_sriov_info(xe, "VF%u paused!\n", vfid);
+ return 0;
}
/**
@@ -52,7 +57,11 @@ int xe_sriov_pf_control_resume_vf(struct xe_device *xe, unsigned int vfid)
result = result ? -EUCLEAN : err;
}
- return result;
+ if (result)
+ return result;
+
+ xe_sriov_info(xe, "VF%u resumed!\n", vfid);
+ return 0;
}
/**
@@ -76,7 +85,11 @@ int xe_sriov_pf_control_stop_vf(struct xe_device *xe, unsigned int vfid)
result = result ? -EUCLEAN : err;
}
- return result;
+ if (result)
+ return result;
+
+ xe_sriov_info(xe, "VF%u stopped!\n", vfid);
+ return 0;
}
/**
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 3/6] drm/xe/pf: Expose VF control operations over debugfs
2025-09-30 23:35 [PATCH 0/6] More PF improvements Michal Wajdeczko
2025-09-30 23:35 ` [PATCH 1/6] drm/xe/pf: Add top level functions to control VFs Michal Wajdeczko
2025-09-30 23:35 ` [PATCH 2/6] drm/xe/pf: Log only top level VF state changes Michal Wajdeczko
@ 2025-09-30 23:35 ` Michal Wajdeczko
2025-10-01 7:30 ` Matthew Brost
2025-10-02 21:37 ` Michał Winiarski
2025-09-30 23:35 ` [PATCH 4/6] drm/xe/pf: Unify VF state tracking log Michal Wajdeczko
` (6 subsequent siblings)
9 siblings, 2 replies; 23+ messages in thread
From: Michal Wajdeczko @ 2025-09-30 23:35 UTC (permalink / raw)
To: intel-xe; +Cc: Michal Wajdeczko
To allow the user to control the activity of individual VFs,
expose basic VF control operations (pause, resume, stop, reset)
over the debugfs as write-only files:
/sys/kernel/debug/dri/BDF/sriov/
├── vf1
│ ├── pause
│ ├── reset
│ ├── resume
│ ├── stop
│ :
├── vf2
: :
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c | 93 ++++++++++++++++++++++++
1 file changed, 93 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c b/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c
index 2ab0b1f4818a..97636ed86fb8 100644
--- a/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c
@@ -8,13 +8,41 @@
#include "xe_device.h"
#include "xe_device_types.h"
+#include "xe_pm.h"
#include "xe_sriov_pf.h"
+#include "xe_sriov_pf_control.h"
#include "xe_sriov_pf_debugfs.h"
#include "xe_sriov_pf_helpers.h"
#include "xe_sriov_pf_service.h"
#include "xe_sriov_printk.h"
#include "xe_tile_sriov_pf_debugfs.h"
+/*
+ * /sys/kernel/debug/dri/BDF/
+ * ├── sriov # d_inode->i_private = (xe_device*)
+ * │ ├── pf # d_inode->i_private = (xe_device*)
+ * │ ├── vf1 # d_inode->i_private = VFID(1)
+ * : :
+ * │ ├── vfN # d_inode->i_private = VFID(N)
+ */
+
+static void *extract_priv(struct dentry *d)
+{
+ return d->d_inode->i_private;
+}
+
+static struct xe_device *extract_xe(struct dentry *d)
+{
+ return extract_priv(d->d_parent);
+}
+
+static unsigned int extract_vfid(struct dentry *d)
+{
+ void *p = extract_priv(d);
+
+ return p == extract_xe(d) ? PFID : (uintptr_t)p;
+}
+
static int simple_show(struct seq_file *m, void *data)
{
struct drm_printer p = drm_seq_file_printer(m);
@@ -39,6 +67,70 @@ static void pf_populate_pf(struct xe_device *xe, struct dentry *pfdent)
drm_debugfs_create_files(debugfs_list, ARRAY_SIZE(debugfs_list), pfdent, minor);
}
+/*
+ * /sys/kernel/debug/dri/BDF/
+ * ├── sriov
+ * │ ├── vf1
+ * │ │ ├── pause
+ * │ │ ├── reset
+ * │ │ ├── resume
+ * │ │ ├── stop
+ * │ │ :
+ * │ ├── vf2
+ * │ │ ├── ...
+ */
+
+static ssize_t from_file_write_to_vf_call(struct file *file, const char __user *userbuf,
+ size_t count, loff_t *ppos,
+ int (*call)(struct xe_device *, unsigned int))
+{
+ struct dentry *dent = file_dentry(file)->d_parent;
+ struct xe_device *xe = extract_xe(dent);
+ unsigned int vfid = extract_vfid(dent);
+ bool yes;
+ int ret;
+
+ if (*ppos)
+ return -EINVAL;
+ ret = kstrtobool_from_user(userbuf, count, &yes);
+ if (ret < 0)
+ return ret;
+ if (yes) {
+ xe_pm_runtime_get(xe);
+ ret = call(xe, vfid);
+ xe_pm_runtime_put(xe);
+ }
+ if (ret < 0)
+ return ret;
+ return count;
+}
+
+#define DEFINE_VF_CONTROL_ATTRIBUTE(OP) \
+static int OP##_show(struct seq_file *s, void *unused) \
+{ \
+ return 0; \
+} \
+static ssize_t OP##_write(struct file *file, const char __user *userbuf, \
+ size_t count, loff_t *ppos) \
+{ \
+ return from_file_write_to_vf_call(file, userbuf, count, ppos, \
+ xe_sriov_pf_control_##OP); \
+} \
+DEFINE_SHOW_STORE_ATTRIBUTE(OP)
+
+DEFINE_VF_CONTROL_ATTRIBUTE(pause_vf);
+DEFINE_VF_CONTROL_ATTRIBUTE(resume_vf);
+DEFINE_VF_CONTROL_ATTRIBUTE(stop_vf);
+DEFINE_VF_CONTROL_ATTRIBUTE(reset_vf);
+
+static void pf_populate_vf(struct xe_device *xe, struct dentry *vfdent)
+{
+ debugfs_create_file("pause", 0200, vfdent, xe, &pause_vf_fops);
+ debugfs_create_file("resume", 0200, vfdent, xe, &resume_vf_fops);
+ debugfs_create_file("stop", 0200, vfdent, xe, &stop_vf_fops);
+ debugfs_create_file("reset", 0200, vfdent, xe, &reset_vf_fops);
+}
+
static void pf_populate_with_tiles(struct xe_device *xe, struct dentry *dent, unsigned int vfid)
{
struct xe_tile *tile;
@@ -103,6 +195,7 @@ void xe_sriov_pf_debugfs_register(struct xe_device *xe, struct dentry *root)
return;
vfdent->d_inode->i_private = (void *)(uintptr_t)VFID(n);
+ pf_populate_vf(xe, vfdent);
pf_populate_with_tiles(xe, vfdent, VFID(n));
}
}
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 4/6] drm/xe/pf: Unify VF state tracking log
2025-09-30 23:35 [PATCH 0/6] More PF improvements Michal Wajdeczko
` (2 preceding siblings ...)
2025-09-30 23:35 ` [PATCH 3/6] drm/xe/pf: Expose VF control operations over debugfs Michal Wajdeczko
@ 2025-09-30 23:35 ` Michal Wajdeczko
2025-10-02 21:46 ` Michał Winiarski
2025-09-30 23:35 ` [PATCH 5/6] drm/xe/pf: Split VF FLR processing function Michal Wajdeczko
` (5 subsequent siblings)
9 siblings, 1 reply; 23+ messages in thread
From: Michal Wajdeczko @ 2025-09-30 23:35 UTC (permalink / raw)
To: intel-xe; +Cc: Michal Wajdeczko
By using single function that dumps VF state transition, final
logs are easier to analyze as there is always the same call site
in every debug message.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
index e582f4d60015..90fb69b0e041 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
@@ -271,12 +271,19 @@ static bool pf_expect_vf_not_state(struct xe_gt *gt, unsigned int vfid,
return result;
}
+static void pf_track_vf_state(struct xe_gt *gt, unsigned int vfid,
+ enum xe_gt_sriov_control_bits bit,
+ const char *what)
+{
+ xe_gt_sriov_dbg_verbose(gt, "VF%u state %s(%d) %s\n",
+ vfid, control_bit_to_string(bit), bit, what);
+}
+
static bool pf_enter_vf_state(struct xe_gt *gt, unsigned int vfid,
enum xe_gt_sriov_control_bits bit)
{
if (!test_and_set_bit(bit, pf_peek_vf_state(gt, vfid))) {
- xe_gt_sriov_dbg_verbose(gt, "VF%u state %s(%d) enter\n",
- vfid, control_bit_to_string(bit), bit);
+ pf_track_vf_state(gt, vfid, bit, "enter");
return true;
}
return false;
@@ -286,8 +293,7 @@ static bool pf_exit_vf_state(struct xe_gt *gt, unsigned int vfid,
enum xe_gt_sriov_control_bits bit)
{
if (test_and_clear_bit(bit, pf_peek_vf_state(gt, vfid))) {
- xe_gt_sriov_dbg_verbose(gt, "VF%u state %s(%d) exit\n",
- vfid, control_bit_to_string(bit), bit);
+ pf_track_vf_state(gt, vfid, bit, "exit");
return true;
}
return false;
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 5/6] drm/xe/pf: Split VF FLR processing function
2025-09-30 23:35 [PATCH 0/6] More PF improvements Michal Wajdeczko
` (3 preceding siblings ...)
2025-09-30 23:35 ` [PATCH 4/6] drm/xe/pf: Unify VF state tracking log Michal Wajdeczko
@ 2025-09-30 23:35 ` Michal Wajdeczko
2025-10-02 21:47 ` Michał Winiarski
2025-09-30 23:35 ` [PATCH 6/6] drm/xe/pf: Synchronize VF FLR between all GTs Michal Wajdeczko
` (4 subsequent siblings)
9 siblings, 1 reply; 23+ messages in thread
From: Michal Wajdeczko @ 2025-09-30 23:35 UTC (permalink / raw)
To: intel-xe; +Cc: Michal Wajdeczko
On multi-GT platforms (like PTL) we may want to run VF FLR on each
GuC (render and media) in parallel. Split our FLR function to allow
to wait for GT VF FLR completion separately.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 26 ++++++++++++++++++---
drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h | 1 +
drivers/gpu/drm/xe/xe_sriov_pf_control.c | 5 ++++
3 files changed, 29 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
index 90fb69b0e041..491918d6b93b 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
@@ -1173,11 +1173,31 @@ static void pf_enter_vf_flr_guc_done(struct xe_gt *gt, unsigned int vfid)
*/
int xe_gt_sriov_pf_control_trigger_flr(struct xe_gt *gt, unsigned int vfid)
{
- unsigned long timeout = pf_get_default_timeout(XE_GT_SRIOV_STATE_FLR_WIP);
- int err;
-
pf_enter_vf_flr_wip(gt, vfid);
+ return 0;
+}
+
+/**
+ * xe_gt_sriov_pf_control_wait_flr() - Wait for a VF FLR to complete.
+ * @gt: the &xe_gt
+ * @vfid: the VF identifier
+ *
+ * This function is for PF only.
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int xe_gt_sriov_pf_control_wait_flr(struct xe_gt *gt, unsigned int vfid)
+{
+ unsigned long timeout = pf_get_default_timeout(XE_GT_SRIOV_STATE_FLR_WIP);
+ int err;
+
+ if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_FAILED))
+ return -EIO;
+
+ if (!pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_WIP))
+ return 0;
+
err = pf_wait_vf_wip_done(gt, vfid, timeout);
if (err) {
xe_gt_sriov_notice(gt, "VF%u FLR didn't finish in %u ms (%pe)\n",
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h
index c85e64f099cc..fd256866f628 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h
@@ -18,6 +18,7 @@ int xe_gt_sriov_pf_control_pause_vf(struct xe_gt *gt, unsigned int vfid);
int xe_gt_sriov_pf_control_resume_vf(struct xe_gt *gt, unsigned int vfid);
int xe_gt_sriov_pf_control_stop_vf(struct xe_gt *gt, unsigned int vfid);
int xe_gt_sriov_pf_control_trigger_flr(struct xe_gt *gt, unsigned int vfid);
+int xe_gt_sriov_pf_control_wait_flr(struct xe_gt *gt, unsigned int vfid);
#ifdef CONFIG_PCI_IOV
int xe_gt_sriov_pf_control_process_guc2pf(struct xe_gt *gt, const u32 *msg, u32 len);
diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
index fdadd4fbe985..e1c54a8feb07 100644
--- a/drivers/gpu/drm/xe/xe_sriov_pf_control.c
+++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
@@ -113,5 +113,10 @@ int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid)
result = result ? -EUCLEAN : err;
}
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_sriov_pf_control_wait_flr(gt, vfid);
+ result = result ? -EUCLEAN : err;
+ }
+
return result;
}
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6/6] drm/xe/pf: Synchronize VF FLR between all GTs
2025-09-30 23:35 [PATCH 0/6] More PF improvements Michal Wajdeczko
` (4 preceding siblings ...)
2025-09-30 23:35 ` [PATCH 5/6] drm/xe/pf: Split VF FLR processing function Michal Wajdeczko
@ 2025-09-30 23:35 ` Michal Wajdeczko
2025-10-01 7:32 ` Matthew Brost
2025-10-02 21:57 ` Michał Winiarski
2025-10-01 0:59 ` ✗ CI.checkpatch: warning for More PF improvements Patchwork
` (3 subsequent siblings)
9 siblings, 2 replies; 23+ messages in thread
From: Michal Wajdeczko @ 2025-09-30 23:35 UTC (permalink / raw)
To: intel-xe; +Cc: Michal Wajdeczko
The PF part of the VF FLR processing shall be done after all GuCs
confirm that they finished their part VF FLR processing, otherwise
PF may start clearing VF's GGTT that other GuC may still accessing.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 56 ++++++++++++++++++-
drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h | 1 +
.../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 2 +
drivers/gpu/drm/xe/xe_sriov_pf_control.c | 29 ++++++++++
drivers/gpu/drm/xe/xe_sriov_pf_control.h | 1 +
5 files changed, 88 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
index 491918d6b93b..2e6bd3d1fe1d 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
@@ -18,6 +18,7 @@
#include "xe_gt_sriov_printk.h"
#include "xe_guc_ct.h"
#include "xe_sriov.h"
+#include "xe_sriov_pf_control.h"
#include "xe_sriov_pf_service.h"
#include "xe_tile.h"
@@ -170,6 +171,7 @@ static const char *control_bit_to_string(enum xe_gt_sriov_control_bits bit)
CASE2STR(FLR_SEND_START);
CASE2STR(FLR_WAIT_GUC);
CASE2STR(FLR_GUC_DONE);
+ CASE2STR(FLR_SYNC);
CASE2STR(FLR_RESET_CONFIG);
CASE2STR(FLR_RESET_DATA);
CASE2STR(FLR_RESET_MMIO);
@@ -940,6 +942,10 @@ int xe_gt_sriov_pf_control_stop_vf(struct xe_gt *gt, unsigned int vfid)
* : v : | |
* : FLR_GUC_DONE : | |
* : | : | |
+ * : | o--<--sync : | |
+ * : |/ / : | |
+ * : FLR_SYNC--o : | |
+ * : | : | |
* : FLR_RESET_CONFIG---failed--->-----------o--------+-----------o
* : | : | |
* : FLR_RESET_DATA : | |
@@ -1147,12 +1153,38 @@ static bool pf_exit_vf_flr_send_start(struct xe_gt *gt, unsigned int vfid)
return true;
}
+static bool pf_exit_vf_flr_sync(struct xe_gt *gt, unsigned int vfid)
+{
+ if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC))
+ return false;
+
+ pf_enter_vf_flr_reset_config(gt, vfid);
+ return true;
+}
+
+static void pf_enter_vf_flr_sync(struct xe_gt *gt, unsigned int vfid)
+{
+ int ret;
+
+ if (!pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC))
+ pf_enter_vf_state_machine_bug(gt, vfid);
+
+ ret = xe_sriov_pf_control_sync_flr(gt_to_xe(gt), vfid);
+ if (ret < 0) {
+ xe_gt_sriov_dbg_verbose(gt, "FLR checkpoint %pe\n", ERR_PTR(ret));
+ pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC);
+ } else {
+ xe_gt_sriov_dbg_verbose(gt, "FLR checkpoint pass\n");
+ pf_expect_vf_not_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC);
+ }
+}
+
static bool pf_exit_vf_flr_guc_done(struct xe_gt *gt, unsigned int vfid)
{
if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_GUC_DONE))
return false;
- pf_enter_vf_flr_reset_config(gt, vfid);
+ pf_enter_vf_flr_sync(gt, vfid);
return true;
}
@@ -1178,6 +1210,28 @@ int xe_gt_sriov_pf_control_trigger_flr(struct xe_gt *gt, unsigned int vfid)
return 0;
}
+/**
+ * xe_gt_sriov_pf_control_sync_flr() - Synchronize on the VF FLR checkpoint.
+ * @gt: the &xe_gt
+ * @vfid: the VF identifier
+ * @sync: if true it will allow to exit the checkpoint
+ *
+ * Return: non-zero if FLR checkpoint has been reached, zero if the is no FLR
+ * in progress, or a negative error code on the FLR busy or failed.
+ */
+int xe_gt_sriov_pf_control_sync_flr(struct xe_gt *gt, unsigned int vfid, bool sync)
+{
+ if (sync && pf_exit_vf_flr_sync(gt, vfid))
+ return 1;
+ if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC))
+ return 1;
+ if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_WIP))
+ return -EBUSY;
+ if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_FAILED))
+ return -EIO;
+ return 0;
+}
+
/**
* xe_gt_sriov_pf_control_wait_flr() - Wait for a VF FLR to complete.
* @gt: the &xe_gt
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h
index fd256866f628..8a72ef3778d4 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h
@@ -18,6 +18,7 @@ int xe_gt_sriov_pf_control_pause_vf(struct xe_gt *gt, unsigned int vfid);
int xe_gt_sriov_pf_control_resume_vf(struct xe_gt *gt, unsigned int vfid);
int xe_gt_sriov_pf_control_stop_vf(struct xe_gt *gt, unsigned int vfid);
int xe_gt_sriov_pf_control_trigger_flr(struct xe_gt *gt, unsigned int vfid);
+int xe_gt_sriov_pf_control_sync_flr(struct xe_gt *gt, unsigned int vfid, bool sync);
int xe_gt_sriov_pf_control_wait_flr(struct xe_gt *gt, unsigned int vfid);
#ifdef CONFIG_PCI_IOV
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h
index f02f941b4ad2..c80b7e77f1ad 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h
@@ -18,6 +18,7 @@
* @XE_GT_SRIOV_STATE_FLR_SEND_START: indicates that the PF wants to send a FLR START command.
* @XE_GT_SRIOV_STATE_FLR_WAIT_GUC: indicates that the PF awaits for a response from the GuC.
* @XE_GT_SRIOV_STATE_FLR_GUC_DONE: indicates that the PF has received a response from the GuC.
+ * @XE_GT_SRIOV_STATE_FLR_SYNC: indicates that the PF awaits to synchronize with other GuCs.
* @XE_GT_SRIOV_STATE_FLR_RESET_CONFIG: indicates that the PF needs to clear VF's resources.
* @XE_GT_SRIOV_STATE_FLR_RESET_DATA: indicates that the PF needs to clear VF's data.
* @XE_GT_SRIOV_STATE_FLR_RESET_MMIO: indicates that the PF needs to reset VF's registers.
@@ -47,6 +48,7 @@ enum xe_gt_sriov_control_bits {
XE_GT_SRIOV_STATE_FLR_SEND_START,
XE_GT_SRIOV_STATE_FLR_WAIT_GUC,
XE_GT_SRIOV_STATE_FLR_GUC_DONE,
+ XE_GT_SRIOV_STATE_FLR_SYNC,
XE_GT_SRIOV_STATE_FLR_RESET_CONFIG,
XE_GT_SRIOV_STATE_FLR_RESET_DATA,
XE_GT_SRIOV_STATE_FLR_RESET_MMIO,
diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
index e1c54a8feb07..416d00a03fbb 100644
--- a/drivers/gpu/drm/xe/xe_sriov_pf_control.c
+++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
@@ -120,3 +120,32 @@ int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid)
return result;
}
+
+/**
+ * xe_sriov_pf_control_sync_flr() - Synchronize a VF FLR between all GTs.
+ * @xe: the &xe_device
+ * @vfid: the VF identifier
+ *
+ * This function is for PF only.
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int xe_sriov_pf_control_sync_flr(struct xe_device *xe, unsigned int vfid)
+{
+ struct xe_gt *gt;
+ unsigned int id;
+ int ret;
+
+ for_each_gt(gt, xe, id) {
+ ret = xe_gt_sriov_pf_control_sync_flr(gt, vfid, false);
+ if (ret < 0)
+ return ret;
+ }
+ for_each_gt(gt, xe, id) {
+ ret = xe_gt_sriov_pf_control_sync_flr(gt, vfid, true);
+ if (ret < 0)
+ return ret;
+ }
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.h b/drivers/gpu/drm/xe/xe_sriov_pf_control.h
index 9bf059f746d4..2d52d0ac1b28 100644
--- a/drivers/gpu/drm/xe/xe_sriov_pf_control.h
+++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.h
@@ -12,5 +12,6 @@ int xe_sriov_pf_control_pause_vf(struct xe_device *xe, unsigned int vfid);
int xe_sriov_pf_control_resume_vf(struct xe_device *xe, unsigned int vfid);
int xe_sriov_pf_control_stop_vf(struct xe_device *xe, unsigned int vfid);
int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid);
+int xe_sriov_pf_control_sync_flr(struct xe_device *xe, unsigned int vfid);
#endif
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* ✗ CI.checkpatch: warning for More PF improvements
2025-09-30 23:35 [PATCH 0/6] More PF improvements Michal Wajdeczko
` (5 preceding siblings ...)
2025-09-30 23:35 ` [PATCH 6/6] drm/xe/pf: Synchronize VF FLR between all GTs Michal Wajdeczko
@ 2025-10-01 0:59 ` Patchwork
2025-10-01 1:00 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
9 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2025-10-01 0:59 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
== Series Details ==
Series: More PF improvements
URL : https://patchwork.freedesktop.org/series/155265/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
fbd08a78c3a3bb17964db2a326514c69c1dca660
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 76ada15dc94a7ba3d320c53c15dd593c62ba21bb
Author: Michal Wajdeczko <michal.wajdeczko@intel.com>
Date: Wed Oct 1 01:35:24 2025 +0200
drm/xe/pf: Synchronize VF FLR between all GTs
The PF part of the VF FLR processing shall be done after all GuCs
confirm that they finished their part VF FLR processing, otherwise
PF may start clearing VF's GGTT that other GuC may still accessing.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
+ /mt/dim checkpatch 23f8be57505c80e5b57dec249df8a3cc053eb947 drm-intel
fefecfc0cb58 drm/xe/pf: Add top level functions to control VFs
-:57: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#57:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 149 lines checked
d3cbe6cb1bc5 drm/xe/pf: Log only top level VF state changes
7f953fbe1753 drm/xe/pf: Expose VF control operations over debugfs
382bf04a2e97 drm/xe/pf: Unify VF state tracking log
5d37582f2e39 drm/xe/pf: Split VF FLR processing function
76ada15dc94a drm/xe/pf: Synchronize VF FLR between all GTs
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ CI.KUnit: success for More PF improvements
2025-09-30 23:35 [PATCH 0/6] More PF improvements Michal Wajdeczko
` (6 preceding siblings ...)
2025-10-01 0:59 ` ✗ CI.checkpatch: warning for More PF improvements Patchwork
@ 2025-10-01 1:00 ` Patchwork
2025-10-01 1:35 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-01 3:56 ` ✓ Xe.CI.Full: " Patchwork
9 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2025-10-01 1:00 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
== Series Details ==
Series: More PF improvements
URL : https://patchwork.freedesktop.org/series/155265/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[00:59:16] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:59:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:59:49] Starting KUnit Kernel (1/1)...
[00:59:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:59:50] ================== guc_buf (11 subtests) ===================
[00:59:50] [PASSED] test_smallest
[00:59:50] [PASSED] test_largest
[00:59:50] [PASSED] test_granular
[00:59:50] [PASSED] test_unique
[00:59:50] [PASSED] test_overlap
[00:59:50] [PASSED] test_reusable
[00:59:50] [PASSED] test_too_big
[00:59:50] [PASSED] test_flush
[00:59:50] [PASSED] test_lookup
[00:59:50] [PASSED] test_data
[00:59:50] [PASSED] test_class
[00:59:50] ===================== [PASSED] guc_buf =====================
[00:59:50] =================== guc_dbm (7 subtests) ===================
[00:59:50] [PASSED] test_empty
[00:59:50] [PASSED] test_default
[00:59:50] ======================== test_size ========================
[00:59:50] [PASSED] 4
[00:59:50] [PASSED] 8
[00:59:50] [PASSED] 32
[00:59:50] [PASSED] 256
[00:59:50] ==================== [PASSED] test_size ====================
[00:59:50] ======================= test_reuse ========================
[00:59:50] [PASSED] 4
[00:59:50] [PASSED] 8
[00:59:50] [PASSED] 32
[00:59:50] [PASSED] 256
[00:59:50] =================== [PASSED] test_reuse ====================
[00:59:50] =================== test_range_overlap ====================
[00:59:50] [PASSED] 4
[00:59:50] [PASSED] 8
[00:59:50] [PASSED] 32
[00:59:50] [PASSED] 256
[00:59:50] =============== [PASSED] test_range_overlap ================
[00:59:50] =================== test_range_compact ====================
[00:59:50] [PASSED] 4
[00:59:50] [PASSED] 8
[00:59:50] [PASSED] 32
[00:59:50] [PASSED] 256
[00:59:50] =============== [PASSED] test_range_compact ================
[00:59:50] ==================== test_range_spare =====================
[00:59:50] [PASSED] 4
[00:59:50] [PASSED] 8
[00:59:50] [PASSED] 32
[00:59:50] [PASSED] 256
[00:59:50] ================ [PASSED] test_range_spare =================
[00:59:50] ===================== [PASSED] guc_dbm =====================
[00:59:50] =================== guc_idm (6 subtests) ===================
[00:59:50] [PASSED] bad_init
[00:59:50] [PASSED] no_init
[00:59:50] [PASSED] init_fini
[00:59:50] [PASSED] check_used
[00:59:50] [PASSED] check_quota
[00:59:50] [PASSED] check_all
[00:59:50] ===================== [PASSED] guc_idm =====================
[00:59:50] ================== no_relay (3 subtests) ===================
[00:59:50] [PASSED] xe_drops_guc2pf_if_not_ready
[00:59:50] [PASSED] xe_drops_guc2vf_if_not_ready
[00:59:50] [PASSED] xe_rejects_send_if_not_ready
[00:59:50] ==================== [PASSED] no_relay =====================
[00:59:50] ================== pf_relay (14 subtests) ==================
[00:59:50] [PASSED] pf_rejects_guc2pf_too_short
[00:59:50] [PASSED] pf_rejects_guc2pf_too_long
[00:59:50] [PASSED] pf_rejects_guc2pf_no_payload
[00:59:50] [PASSED] pf_fails_no_payload
[00:59:50] [PASSED] pf_fails_bad_origin
[00:59:50] [PASSED] pf_fails_bad_type
[00:59:50] [PASSED] pf_txn_reports_error
[00:59:50] [PASSED] pf_txn_sends_pf2guc
[00:59:50] [PASSED] pf_sends_pf2guc
[00:59:50] [SKIPPED] pf_loopback_nop
[00:59:50] [SKIPPED] pf_loopback_echo
[00:59:50] [SKIPPED] pf_loopback_fail
[00:59:50] [SKIPPED] pf_loopback_busy
[00:59:50] [SKIPPED] pf_loopback_retry
[00:59:50] ==================== [PASSED] pf_relay =====================
[00:59:50] ================== vf_relay (3 subtests) ===================
[00:59:50] [PASSED] vf_rejects_guc2vf_too_short
[00:59:50] [PASSED] vf_rejects_guc2vf_too_long
[00:59:50] [PASSED] vf_rejects_guc2vf_no_payload
[00:59:50] ==================== [PASSED] vf_relay =====================
[00:59:50] ===================== lmtt (1 subtest) =====================
[00:59:50] ======================== test_ops =========================
[00:59:50] [PASSED] 2-level
[00:59:50] [PASSED] multi-level
[00:59:50] ==================== [PASSED] test_ops =====================
[00:59:50] ====================== [PASSED] lmtt =======================
[00:59:50] ================= pf_service (11 subtests) =================
[00:59:50] [PASSED] pf_negotiate_any
[00:59:50] [PASSED] pf_negotiate_base_match
[00:59:50] [PASSED] pf_negotiate_base_newer
[00:59:50] [PASSED] pf_negotiate_base_next
[00:59:50] [SKIPPED] pf_negotiate_base_older
[00:59:50] [PASSED] pf_negotiate_base_prev
[00:59:50] [PASSED] pf_negotiate_latest_match
[00:59:50] [PASSED] pf_negotiate_latest_newer
[00:59:50] [PASSED] pf_negotiate_latest_next
[00:59:50] [SKIPPED] pf_negotiate_latest_older
[00:59:50] [SKIPPED] pf_negotiate_latest_prev
[00:59:50] =================== [PASSED] pf_service ====================
[00:59:50] ================= xe_guc_g2g (2 subtests) ==================
[00:59:50] ============== xe_live_guc_g2g_kunit_default ==============
[00:59:50] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[00:59:50] ============== xe_live_guc_g2g_kunit_allmem ===============
[00:59:50] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[00:59:50] =================== [SKIPPED] xe_guc_g2g ===================
[00:59:50] =================== xe_mocs (2 subtests) ===================
[00:59:50] ================ xe_live_mocs_kernel_kunit ================
[00:59:50] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[00:59:50] ================ xe_live_mocs_reset_kunit =================
[00:59:50] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[00:59:50] ==================== [SKIPPED] xe_mocs =====================
[00:59:50] ================= xe_migrate (2 subtests) ==================
[00:59:50] ================= xe_migrate_sanity_kunit =================
[00:59:50] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[00:59:50] ================== xe_validate_ccs_kunit ==================
[00:59:50] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[00:59:50] =================== [SKIPPED] xe_migrate ===================
[00:59:50] ================== xe_dma_buf (1 subtest) ==================
[00:59:50] ==================== xe_dma_buf_kunit =====================
[00:59:50] ================ [SKIPPED] xe_dma_buf_kunit ================
[00:59:50] =================== [SKIPPED] xe_dma_buf ===================
[00:59:50] ================= xe_bo_shrink (1 subtest) =================
[00:59:50] =================== xe_bo_shrink_kunit ====================
[00:59:50] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[00:59:50] ================== [SKIPPED] xe_bo_shrink ==================
[00:59:50] ==================== xe_bo (2 subtests) ====================
[00:59:50] ================== xe_ccs_migrate_kunit ===================
[00:59:50] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[00:59:50] ==================== xe_bo_evict_kunit ====================
[00:59:50] =============== [SKIPPED] xe_bo_evict_kunit ================
[00:59:50] ===================== [SKIPPED] xe_bo ======================
[00:59:50] ==================== args (11 subtests) ====================
[00:59:50] [PASSED] count_args_test
[00:59:50] [PASSED] call_args_example
[00:59:50] [PASSED] call_args_test
[00:59:50] [PASSED] drop_first_arg_example
[00:59:50] [PASSED] drop_first_arg_test
[00:59:50] [PASSED] first_arg_example
[00:59:50] [PASSED] first_arg_test
[00:59:50] [PASSED] last_arg_example
[00:59:50] [PASSED] last_arg_test
[00:59:50] [PASSED] pick_arg_example
[00:59:50] [PASSED] sep_comma_example
[00:59:50] ====================== [PASSED] args =======================
[00:59:50] =================== xe_pci (3 subtests) ====================
[00:59:50] ==================== check_graphics_ip ====================
[00:59:50] [PASSED] 12.00 Xe_LP
[00:59:50] [PASSED] 12.10 Xe_LP+
[00:59:50] [PASSED] 12.55 Xe_HPG
[00:59:50] [PASSED] 12.60 Xe_HPC
[00:59:50] [PASSED] 12.70 Xe_LPG
[00:59:50] [PASSED] 12.71 Xe_LPG
[00:59:50] [PASSED] 12.74 Xe_LPG+
[00:59:50] [PASSED] 20.01 Xe2_HPG
[00:59:50] [PASSED] 20.02 Xe2_HPG
[00:59:50] [PASSED] 20.04 Xe2_LPG
[00:59:50] [PASSED] 30.00 Xe3_LPG
[00:59:50] [PASSED] 30.01 Xe3_LPG
[00:59:50] [PASSED] 30.03 Xe3_LPG
[00:59:50] ================ [PASSED] check_graphics_ip ================
[00:59:50] ===================== check_media_ip ======================
[00:59:50] [PASSED] 12.00 Xe_M
[00:59:50] [PASSED] 12.55 Xe_HPM
[00:59:50] [PASSED] 13.00 Xe_LPM+
[00:59:50] [PASSED] 13.01 Xe2_HPM
[00:59:50] [PASSED] 20.00 Xe2_LPM
[00:59:50] [PASSED] 30.00 Xe3_LPM
[00:59:50] [PASSED] 30.02 Xe3_LPM
[00:59:50] ================= [PASSED] check_media_ip ==================
[00:59:50] ================= check_platform_gt_count =================
[00:59:50] [PASSED] 0x9A60 (TIGERLAKE)
[00:59:50] [PASSED] 0x9A68 (TIGERLAKE)
[00:59:50] [PASSED] 0x9A70 (TIGERLAKE)
[00:59:50] [PASSED] 0x9A40 (TIGERLAKE)
[00:59:50] [PASSED] 0x9A49 (TIGERLAKE)
[00:59:50] [PASSED] 0x9A59 (TIGERLAKE)
[00:59:50] [PASSED] 0x9A78 (TIGERLAKE)
[00:59:50] [PASSED] 0x9AC0 (TIGERLAKE)
[00:59:50] [PASSED] 0x9AC9 (TIGERLAKE)
[00:59:50] [PASSED] 0x9AD9 (TIGERLAKE)
[00:59:50] [PASSED] 0x9AF8 (TIGERLAKE)
[00:59:50] [PASSED] 0x4C80 (ROCKETLAKE)
[00:59:50] [PASSED] 0x4C8A (ROCKETLAKE)
[00:59:50] [PASSED] 0x4C8B (ROCKETLAKE)
[00:59:50] [PASSED] 0x4C8C (ROCKETLAKE)
[00:59:50] [PASSED] 0x4C90 (ROCKETLAKE)
[00:59:50] [PASSED] 0x4C9A (ROCKETLAKE)
[00:59:50] [PASSED] 0x4680 (ALDERLAKE_S)
[00:59:50] [PASSED] 0x4682 (ALDERLAKE_S)
[00:59:50] [PASSED] 0x4688 (ALDERLAKE_S)
[00:59:50] [PASSED] 0x468A (ALDERLAKE_S)
[00:59:50] [PASSED] 0x468B (ALDERLAKE_S)
[00:59:50] [PASSED] 0x4690 (ALDERLAKE_S)
[00:59:50] [PASSED] 0x4692 (ALDERLAKE_S)
[00:59:50] [PASSED] 0x4693 (ALDERLAKE_S)
[00:59:50] [PASSED] 0x46A0 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46A1 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46A2 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46A3 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46A6 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46A8 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46AA (ALDERLAKE_P)
[00:59:50] [PASSED] 0x462A (ALDERLAKE_P)
[00:59:50] [PASSED] 0x4626 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x4628 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46B0 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46B1 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46B2 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46B3 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46C0 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46C1 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46C2 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46C3 (ALDERLAKE_P)
[00:59:50] [PASSED] 0x46D0 (ALDERLAKE_N)
[00:59:50] [PASSED] 0x46D1 (ALDERLAKE_N)
[00:59:50] [PASSED] 0x46D2 (ALDERLAKE_N)
[00:59:50] [PASSED] 0x46D3 (ALDERLAKE_N)
[00:59:50] [PASSED] 0x46D4 (ALDERLAKE_N)
[00:59:50] [PASSED] 0xA721 (ALDERLAKE_P)
[00:59:50] [PASSED] 0xA7A1 (ALDERLAKE_P)
[00:59:50] [PASSED] 0xA7A9 (ALDERLAKE_P)
[00:59:50] [PASSED] 0xA7AC (ALDERLAKE_P)
[00:59:50] [PASSED] 0xA7AD (ALDERLAKE_P)
[00:59:50] [PASSED] 0xA720 (ALDERLAKE_P)
[00:59:50] [PASSED] 0xA7A0 (ALDERLAKE_P)
[00:59:50] [PASSED] 0xA7A8 (ALDERLAKE_P)
[00:59:50] [PASSED] 0xA7AA (ALDERLAKE_P)
[00:59:50] [PASSED] 0xA7AB (ALDERLAKE_P)
[00:59:50] [PASSED] 0xA780 (ALDERLAKE_S)
[00:59:50] [PASSED] 0xA781 (ALDERLAKE_S)
[00:59:50] [PASSED] 0xA782 (ALDERLAKE_S)
[00:59:50] [PASSED] 0xA783 (ALDERLAKE_S)
[00:59:50] [PASSED] 0xA788 (ALDERLAKE_S)
[00:59:50] [PASSED] 0xA789 (ALDERLAKE_S)
[00:59:50] [PASSED] 0xA78A (ALDERLAKE_S)
[00:59:50] [PASSED] 0xA78B (ALDERLAKE_S)
[00:59:50] [PASSED] 0x4905 (DG1)
[00:59:50] [PASSED] 0x4906 (DG1)
[00:59:50] [PASSED] 0x4907 (DG1)
[00:59:50] [PASSED] 0x4908 (DG1)
[00:59:50] [PASSED] 0x4909 (DG1)
[00:59:50] [PASSED] 0x56C0 (DG2)
[00:59:50] [PASSED] 0x56C2 (DG2)
[00:59:50] [PASSED] 0x56C1 (DG2)
[00:59:50] [PASSED] 0x7D51 (METEORLAKE)
[00:59:50] [PASSED] 0x7DD1 (METEORLAKE)
[00:59:50] [PASSED] 0x7D41 (METEORLAKE)
[00:59:50] [PASSED] 0x7D67 (METEORLAKE)
[00:59:50] [PASSED] 0xB640 (METEORLAKE)
[00:59:50] [PASSED] 0x56A0 (DG2)
[00:59:50] [PASSED] 0x56A1 (DG2)
[00:59:50] [PASSED] 0x56A2 (DG2)
[00:59:50] [PASSED] 0x56BE (DG2)
[00:59:50] [PASSED] 0x56BF (DG2)
[00:59:50] [PASSED] 0x5690 (DG2)
[00:59:50] [PASSED] 0x5691 (DG2)
[00:59:50] [PASSED] 0x5692 (DG2)
[00:59:50] [PASSED] 0x56A5 (DG2)
[00:59:50] [PASSED] 0x56A6 (DG2)
[00:59:50] [PASSED] 0x56B0 (DG2)
[00:59:50] [PASSED] 0x56B1 (DG2)
[00:59:50] [PASSED] 0x56BA (DG2)
[00:59:50] [PASSED] 0x56BB (DG2)
[00:59:50] [PASSED] 0x56BC (DG2)
[00:59:50] [PASSED] 0x56BD (DG2)
[00:59:50] [PASSED] 0x5693 (DG2)
[00:59:50] [PASSED] 0x5694 (DG2)
[00:59:50] [PASSED] 0x5695 (DG2)
[00:59:50] [PASSED] 0x56A3 (DG2)
[00:59:50] [PASSED] 0x56A4 (DG2)
[00:59:50] [PASSED] 0x56B2 (DG2)
[00:59:50] [PASSED] 0x56B3 (DG2)
[00:59:50] [PASSED] 0x5696 (DG2)
[00:59:50] [PASSED] 0x5697 (DG2)
[00:59:50] [PASSED] 0xB69 (PVC)
[00:59:50] [PASSED] 0xB6E (PVC)
[00:59:50] [PASSED] 0xBD4 (PVC)
[00:59:50] [PASSED] 0xBD5 (PVC)
[00:59:50] [PASSED] 0xBD6 (PVC)
[00:59:50] [PASSED] 0xBD7 (PVC)
[00:59:50] [PASSED] 0xBD8 (PVC)
[00:59:50] [PASSED] 0xBD9 (PVC)
[00:59:50] [PASSED] 0xBDA (PVC)
[00:59:50] [PASSED] 0xBDB (PVC)
[00:59:50] [PASSED] 0xBE0 (PVC)
[00:59:50] [PASSED] 0xBE1 (PVC)
[00:59:50] [PASSED] 0xBE5 (PVC)
[00:59:50] [PASSED] 0x7D40 (METEORLAKE)
[00:59:50] [PASSED] 0x7D45 (METEORLAKE)
[00:59:50] [PASSED] 0x7D55 (METEORLAKE)
[00:59:50] [PASSED] 0x7D60 (METEORLAKE)
[00:59:50] [PASSED] 0x7DD5 (METEORLAKE)
[00:59:50] [PASSED] 0x6420 (LUNARLAKE)
[00:59:50] [PASSED] 0x64A0 (LUNARLAKE)
[00:59:50] [PASSED] 0x64B0 (LUNARLAKE)
[00:59:50] [PASSED] 0xE202 (BATTLEMAGE)
[00:59:50] [PASSED] 0xE209 (BATTLEMAGE)
[00:59:50] [PASSED] 0xE20B (BATTLEMAGE)
[00:59:50] [PASSED] 0xE20C (BATTLEMAGE)
[00:59:50] [PASSED] 0xE20D (BATTLEMAGE)
[00:59:50] [PASSED] 0xE210 (BATTLEMAGE)
[00:59:50] [PASSED] 0xE211 (BATTLEMAGE)
[00:59:50] [PASSED] 0xE212 (BATTLEMAGE)
[00:59:50] [PASSED] 0xE216 (BATTLEMAGE)
[00:59:50] [PASSED] 0xE220 (BATTLEMAGE)
[00:59:50] [PASSED] 0xE221 (BATTLEMAGE)
[00:59:50] [PASSED] 0xE222 (BATTLEMAGE)
[00:59:50] [PASSED] 0xE223 (BATTLEMAGE)
[00:59:50] [PASSED] 0xB080 (PANTHERLAKE)
[00:59:50] [PASSED] 0xB081 (PANTHERLAKE)
[00:59:50] [PASSED] 0xB082 (PANTHERLAKE)
[00:59:50] [PASSED] 0xB083 (PANTHERLAKE)
[00:59:50] [PASSED] 0xB084 (PANTHERLAKE)
[00:59:50] [PASSED] 0xB085 (PANTHERLAKE)
[00:59:50] [PASSED] 0xB086 (PANTHERLAKE)
[00:59:50] [PASSED] 0xB087 (PANTHERLAKE)
[00:59:50] [PASSED] 0xB08F (PANTHERLAKE)
[00:59:50] [PASSED] 0xB090 (PANTHERLAKE)
[00:59:50] [PASSED] 0xB0A0 (PANTHERLAKE)
[00:59:50] [PASSED] 0xB0B0 (PANTHERLAKE)
[00:59:50] [PASSED] 0xFD80 (PANTHERLAKE)
[00:59:50] [PASSED] 0xFD81 (PANTHERLAKE)
[00:59:50] ============= [PASSED] check_platform_gt_count =============
[00:59:50] ===================== [PASSED] xe_pci ======================
[00:59:50] =================== xe_rtp (2 subtests) ====================
[00:59:50] =============== xe_rtp_process_to_sr_tests ================
[00:59:50] [PASSED] coalesce-same-reg
[00:59:50] [PASSED] no-match-no-add
[00:59:50] [PASSED] match-or
[00:59:50] [PASSED] match-or-xfail
[00:59:50] [PASSED] no-match-no-add-multiple-rules
[00:59:50] [PASSED] two-regs-two-entries
[00:59:50] [PASSED] clr-one-set-other
[00:59:50] [PASSED] set-field
[00:59:50] [PASSED] conflict-duplicate
[00:59:50] [PASSED] conflict-not-disjoint
[00:59:50] [PASSED] conflict-reg-type
[00:59:50] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[00:59:50] ================== xe_rtp_process_tests ===================
[00:59:50] [PASSED] active1
[00:59:50] [PASSED] active2
[00:59:50] [PASSED] active-inactive
[00:59:50] [PASSED] inactive-active
[00:59:50] [PASSED] inactive-1st_or_active-inactive
[00:59:50] [PASSED] inactive-2nd_or_active-inactive
[00:59:50] [PASSED] inactive-last_or_active-inactive
[00:59:50] [PASSED] inactive-no_or_active-inactive
[00:59:50] ============== [PASSED] xe_rtp_process_tests ===============
[00:59:50] ===================== [PASSED] xe_rtp ======================
[00:59:50] ==================== xe_wa (1 subtest) =====================
[00:59:50] ======================== xe_wa_gt =========================
[00:59:50] [PASSED] TIGERLAKE B0
[00:59:50] [PASSED] DG1 A0
[00:59:50] [PASSED] DG1 B0
[00:59:50] [PASSED] ALDERLAKE_S A0
[00:59:50] [PASSED] ALDERLAKE_S B0
stty: 'standard input': Inappropriate ioctl for device
[00:59:50] [PASSED] ALDERLAKE_S C0
[00:59:50] [PASSED] ALDERLAKE_S D0
[00:59:50] [PASSED] ALDERLAKE_P A0
[00:59:50] [PASSED] ALDERLAKE_P B0
[00:59:50] [PASSED] ALDERLAKE_P C0
[00:59:50] [PASSED] ALDERLAKE_S RPLS D0
[00:59:50] [PASSED] ALDERLAKE_P RPLU E0
[00:59:50] [PASSED] DG2 G10 C0
[00:59:50] [PASSED] DG2 G11 B1
[00:59:50] [PASSED] DG2 G12 A1
[00:59:50] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[00:59:50] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[00:59:50] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[00:59:50] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[00:59:50] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[00:59:50] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[00:59:50] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[00:59:50] ==================== [PASSED] xe_wa_gt =====================
[00:59:50] ====================== [PASSED] xe_wa ======================
[00:59:50] ============================================================
[00:59:50] Testing complete. Ran 306 tests: passed: 288, skipped: 18
[00:59:50] Elapsed time: 33.874s total, 4.331s configuring, 29.176s building, 0.334s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[00:59:50] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:59:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[01:00:15] Starting KUnit Kernel (1/1)...
[01:00:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:00:15] ============ drm_test_pick_cmdline (2 subtests) ============
[01:00:15] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[01:00:15] =============== drm_test_pick_cmdline_named ===============
[01:00:15] [PASSED] NTSC
[01:00:15] [PASSED] NTSC-J
[01:00:15] [PASSED] PAL
[01:00:15] [PASSED] PAL-M
[01:00:15] =========== [PASSED] drm_test_pick_cmdline_named ===========
[01:00:15] ============== [PASSED] drm_test_pick_cmdline ==============
[01:00:15] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[01:00:15] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[01:00:15] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[01:00:15] =========== drm_validate_clone_mode (2 subtests) ===========
[01:00:15] ============== drm_test_check_in_clone_mode ===============
[01:00:15] [PASSED] in_clone_mode
[01:00:15] [PASSED] not_in_clone_mode
[01:00:15] ========== [PASSED] drm_test_check_in_clone_mode ===========
[01:00:15] =============== drm_test_check_valid_clones ===============
[01:00:15] [PASSED] not_in_clone_mode
[01:00:15] [PASSED] valid_clone
[01:00:15] [PASSED] invalid_clone
[01:00:15] =========== [PASSED] drm_test_check_valid_clones ===========
[01:00:15] ============= [PASSED] drm_validate_clone_mode =============
[01:00:15] ============= drm_validate_modeset (1 subtest) =============
[01:00:15] [PASSED] drm_test_check_connector_changed_modeset
[01:00:15] ============== [PASSED] drm_validate_modeset ===============
[01:00:15] ====== drm_test_bridge_get_current_state (2 subtests) ======
[01:00:15] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[01:00:15] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[01:00:15] ======== [PASSED] drm_test_bridge_get_current_state ========
[01:00:15] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[01:00:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[01:00:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[01:00:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[01:00:15] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[01:00:15] ============== drm_bridge_alloc (2 subtests) ===============
[01:00:15] [PASSED] drm_test_drm_bridge_alloc_basic
[01:00:15] [PASSED] drm_test_drm_bridge_alloc_get_put
[01:00:15] ================ [PASSED] drm_bridge_alloc =================
[01:00:15] ================== drm_buddy (7 subtests) ==================
[01:00:15] [PASSED] drm_test_buddy_alloc_limit
[01:00:15] [PASSED] drm_test_buddy_alloc_optimistic
[01:00:15] [PASSED] drm_test_buddy_alloc_pessimistic
[01:00:15] [PASSED] drm_test_buddy_alloc_pathological
[01:00:15] [PASSED] drm_test_buddy_alloc_contiguous
[01:00:15] [PASSED] drm_test_buddy_alloc_clear
[01:00:15] [PASSED] drm_test_buddy_alloc_range_bias
[01:00:15] ==================== [PASSED] drm_buddy ====================
[01:00:15] ============= drm_cmdline_parser (40 subtests) =============
[01:00:15] [PASSED] drm_test_cmdline_force_d_only
[01:00:15] [PASSED] drm_test_cmdline_force_D_only_dvi
[01:00:15] [PASSED] drm_test_cmdline_force_D_only_hdmi
[01:00:15] [PASSED] drm_test_cmdline_force_D_only_not_digital
[01:00:15] [PASSED] drm_test_cmdline_force_e_only
[01:00:15] [PASSED] drm_test_cmdline_res
[01:00:15] [PASSED] drm_test_cmdline_res_vesa
[01:00:15] [PASSED] drm_test_cmdline_res_vesa_rblank
[01:00:15] [PASSED] drm_test_cmdline_res_rblank
[01:00:15] [PASSED] drm_test_cmdline_res_bpp
[01:00:15] [PASSED] drm_test_cmdline_res_refresh
[01:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh
[01:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[01:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[01:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[01:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[01:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[01:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[01:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[01:00:15] [PASSED] drm_test_cmdline_res_margins_force_on
[01:00:15] [PASSED] drm_test_cmdline_res_vesa_margins
[01:00:15] [PASSED] drm_test_cmdline_name
[01:00:15] [PASSED] drm_test_cmdline_name_bpp
[01:00:15] [PASSED] drm_test_cmdline_name_option
[01:00:15] [PASSED] drm_test_cmdline_name_bpp_option
[01:00:15] [PASSED] drm_test_cmdline_rotate_0
[01:00:15] [PASSED] drm_test_cmdline_rotate_90
[01:00:15] [PASSED] drm_test_cmdline_rotate_180
[01:00:15] [PASSED] drm_test_cmdline_rotate_270
[01:00:15] [PASSED] drm_test_cmdline_hmirror
[01:00:15] [PASSED] drm_test_cmdline_vmirror
[01:00:15] [PASSED] drm_test_cmdline_margin_options
[01:00:15] [PASSED] drm_test_cmdline_multiple_options
[01:00:15] [PASSED] drm_test_cmdline_bpp_extra_and_option
[01:00:15] [PASSED] drm_test_cmdline_extra_and_option
[01:00:15] [PASSED] drm_test_cmdline_freestanding_options
[01:00:15] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[01:00:15] [PASSED] drm_test_cmdline_panel_orientation
[01:00:15] ================ drm_test_cmdline_invalid =================
[01:00:15] [PASSED] margin_only
[01:00:15] [PASSED] interlace_only
[01:00:15] [PASSED] res_missing_x
[01:00:15] [PASSED] res_missing_y
[01:00:15] [PASSED] res_bad_y
[01:00:15] [PASSED] res_missing_y_bpp
[01:00:15] [PASSED] res_bad_bpp
[01:00:15] [PASSED] res_bad_refresh
[01:00:15] [PASSED] res_bpp_refresh_force_on_off
[01:00:15] [PASSED] res_invalid_mode
[01:00:15] [PASSED] res_bpp_wrong_place_mode
[01:00:15] [PASSED] name_bpp_refresh
[01:00:15] [PASSED] name_refresh
[01:00:15] [PASSED] name_refresh_wrong_mode
[01:00:15] [PASSED] name_refresh_invalid_mode
[01:00:15] [PASSED] rotate_multiple
[01:00:15] [PASSED] rotate_invalid_val
[01:00:15] [PASSED] rotate_truncated
[01:00:15] [PASSED] invalid_option
[01:00:15] [PASSED] invalid_tv_option
[01:00:15] [PASSED] truncated_tv_option
[01:00:15] ============ [PASSED] drm_test_cmdline_invalid =============
[01:00:15] =============== drm_test_cmdline_tv_options ===============
[01:00:15] [PASSED] NTSC
[01:00:15] [PASSED] NTSC_443
[01:00:15] [PASSED] NTSC_J
[01:00:15] [PASSED] PAL
[01:00:15] [PASSED] PAL_M
[01:00:15] [PASSED] PAL_N
[01:00:15] [PASSED] SECAM
[01:00:15] [PASSED] MONO_525
[01:00:15] [PASSED] MONO_625
[01:00:15] =========== [PASSED] drm_test_cmdline_tv_options ===========
[01:00:15] =============== [PASSED] drm_cmdline_parser ================
[01:00:15] ========== drmm_connector_hdmi_init (20 subtests) ==========
[01:00:15] [PASSED] drm_test_connector_hdmi_init_valid
[01:00:15] [PASSED] drm_test_connector_hdmi_init_bpc_8
[01:00:15] [PASSED] drm_test_connector_hdmi_init_bpc_10
[01:00:15] [PASSED] drm_test_connector_hdmi_init_bpc_12
[01:00:15] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[01:00:15] [PASSED] drm_test_connector_hdmi_init_bpc_null
[01:00:15] [PASSED] drm_test_connector_hdmi_init_formats_empty
[01:00:15] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[01:00:15] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[01:00:15] [PASSED] supported_formats=0x9 yuv420_allowed=1
[01:00:15] [PASSED] supported_formats=0x9 yuv420_allowed=0
[01:00:15] [PASSED] supported_formats=0x3 yuv420_allowed=1
[01:00:15] [PASSED] supported_formats=0x3 yuv420_allowed=0
[01:00:15] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[01:00:15] [PASSED] drm_test_connector_hdmi_init_null_ddc
[01:00:15] [PASSED] drm_test_connector_hdmi_init_null_product
[01:00:15] [PASSED] drm_test_connector_hdmi_init_null_vendor
[01:00:15] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[01:00:15] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[01:00:15] [PASSED] drm_test_connector_hdmi_init_product_valid
[01:00:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[01:00:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[01:00:15] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[01:00:15] ========= drm_test_connector_hdmi_init_type_valid =========
[01:00:15] [PASSED] HDMI-A
[01:00:15] [PASSED] HDMI-B
[01:00:15] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[01:00:15] ======== drm_test_connector_hdmi_init_type_invalid ========
[01:00:15] [PASSED] Unknown
[01:00:15] [PASSED] VGA
[01:00:15] [PASSED] DVI-I
[01:00:15] [PASSED] DVI-D
[01:00:15] [PASSED] DVI-A
[01:00:15] [PASSED] Composite
[01:00:15] [PASSED] SVIDEO
[01:00:15] [PASSED] LVDS
[01:00:15] [PASSED] Component
[01:00:15] [PASSED] DIN
[01:00:15] [PASSED] DP
[01:00:15] [PASSED] TV
[01:00:15] [PASSED] eDP
[01:00:15] [PASSED] Virtual
[01:00:15] [PASSED] DSI
[01:00:15] [PASSED] DPI
[01:00:15] [PASSED] Writeback
[01:00:15] [PASSED] SPI
[01:00:15] [PASSED] USB
[01:00:15] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[01:00:15] ============ [PASSED] drmm_connector_hdmi_init =============
[01:00:15] ============= drmm_connector_init (3 subtests) =============
[01:00:15] [PASSED] drm_test_drmm_connector_init
[01:00:15] [PASSED] drm_test_drmm_connector_init_null_ddc
[01:00:15] ========= drm_test_drmm_connector_init_type_valid =========
[01:00:15] [PASSED] Unknown
[01:00:15] [PASSED] VGA
[01:00:15] [PASSED] DVI-I
[01:00:15] [PASSED] DVI-D
[01:00:15] [PASSED] DVI-A
[01:00:15] [PASSED] Composite
[01:00:15] [PASSED] SVIDEO
[01:00:15] [PASSED] LVDS
[01:00:15] [PASSED] Component
[01:00:15] [PASSED] DIN
[01:00:15] [PASSED] DP
[01:00:15] [PASSED] HDMI-A
[01:00:15] [PASSED] HDMI-B
[01:00:15] [PASSED] TV
[01:00:15] [PASSED] eDP
[01:00:15] [PASSED] Virtual
[01:00:15] [PASSED] DSI
[01:00:15] [PASSED] DPI
[01:00:15] [PASSED] Writeback
[01:00:15] [PASSED] SPI
[01:00:15] [PASSED] USB
[01:00:15] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[01:00:15] =============== [PASSED] drmm_connector_init ===============
[01:00:15] ========= drm_connector_dynamic_init (6 subtests) ==========
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_init
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_init_properties
[01:00:15] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[01:00:15] [PASSED] Unknown
[01:00:15] [PASSED] VGA
[01:00:15] [PASSED] DVI-I
[01:00:15] [PASSED] DVI-D
[01:00:15] [PASSED] DVI-A
[01:00:15] [PASSED] Composite
[01:00:15] [PASSED] SVIDEO
[01:00:15] [PASSED] LVDS
[01:00:15] [PASSED] Component
[01:00:15] [PASSED] DIN
[01:00:15] [PASSED] DP
[01:00:15] [PASSED] HDMI-A
[01:00:15] [PASSED] HDMI-B
[01:00:15] [PASSED] TV
[01:00:15] [PASSED] eDP
[01:00:15] [PASSED] Virtual
[01:00:15] [PASSED] DSI
[01:00:15] [PASSED] DPI
[01:00:15] [PASSED] Writeback
[01:00:15] [PASSED] SPI
[01:00:15] [PASSED] USB
[01:00:15] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[01:00:15] ======== drm_test_drm_connector_dynamic_init_name =========
[01:00:15] [PASSED] Unknown
[01:00:15] [PASSED] VGA
[01:00:15] [PASSED] DVI-I
[01:00:15] [PASSED] DVI-D
[01:00:15] [PASSED] DVI-A
[01:00:15] [PASSED] Composite
[01:00:15] [PASSED] SVIDEO
[01:00:15] [PASSED] LVDS
[01:00:15] [PASSED] Component
[01:00:15] [PASSED] DIN
[01:00:15] [PASSED] DP
[01:00:15] [PASSED] HDMI-A
[01:00:15] [PASSED] HDMI-B
[01:00:15] [PASSED] TV
[01:00:15] [PASSED] eDP
[01:00:15] [PASSED] Virtual
[01:00:15] [PASSED] DSI
[01:00:15] [PASSED] DPI
[01:00:15] [PASSED] Writeback
[01:00:15] [PASSED] SPI
[01:00:15] [PASSED] USB
[01:00:15] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[01:00:15] =========== [PASSED] drm_connector_dynamic_init ============
[01:00:15] ==== drm_connector_dynamic_register_early (4 subtests) =====
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[01:00:15] ====== [PASSED] drm_connector_dynamic_register_early =======
[01:00:15] ======= drm_connector_dynamic_register (7 subtests) ========
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[01:00:15] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[01:00:15] ========= [PASSED] drm_connector_dynamic_register ==========
[01:00:15] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[01:00:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[01:00:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[01:00:15] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[01:00:15] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[01:00:15] ========== drm_test_get_tv_mode_from_name_valid ===========
[01:00:15] [PASSED] NTSC
[01:00:15] [PASSED] NTSC-443
[01:00:15] [PASSED] NTSC-J
[01:00:15] [PASSED] PAL
[01:00:15] [PASSED] PAL-M
[01:00:15] [PASSED] PAL-N
[01:00:15] [PASSED] SECAM
[01:00:15] [PASSED] Mono
[01:00:15] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[01:00:15] [PASSED] drm_test_get_tv_mode_from_name_truncated
[01:00:15] ============ [PASSED] drm_get_tv_mode_from_name ============
[01:00:15] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[01:00:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[01:00:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[01:00:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[01:00:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[01:00:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[01:00:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[01:00:15] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[01:00:15] [PASSED] VIC 96
[01:00:15] [PASSED] VIC 97
[01:00:15] [PASSED] VIC 101
[01:00:15] [PASSED] VIC 102
[01:00:15] [PASSED] VIC 106
[01:00:15] [PASSED] VIC 107
[01:00:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[01:00:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[01:00:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[01:00:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[01:00:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[01:00:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[01:00:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[01:00:15] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[01:00:15] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[01:00:15] [PASSED] Automatic
[01:00:15] [PASSED] Full
[01:00:15] [PASSED] Limited 16:235
[01:00:15] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[01:00:15] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[01:00:15] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[01:00:15] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[01:00:15] === drm_test_drm_hdmi_connector_get_output_format_name ====
[01:00:15] [PASSED] RGB
[01:00:15] [PASSED] YUV 4:2:0
[01:00:15] [PASSED] YUV 4:2:2
[01:00:15] [PASSED] YUV 4:4:4
[01:00:15] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[01:00:15] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[01:00:15] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[01:00:15] ============= drm_damage_helper (21 subtests) ==============
[01:00:15] [PASSED] drm_test_damage_iter_no_damage
[01:00:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[01:00:15] [PASSED] drm_test_damage_iter_no_damage_src_moved
[01:00:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[01:00:15] [PASSED] drm_test_damage_iter_no_damage_not_visible
[01:00:15] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[01:00:15] [PASSED] drm_test_damage_iter_no_damage_no_fb
[01:00:15] [PASSED] drm_test_damage_iter_simple_damage
[01:00:15] [PASSED] drm_test_damage_iter_single_damage
[01:00:15] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[01:00:15] [PASSED] drm_test_damage_iter_single_damage_outside_src
[01:00:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[01:00:15] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[01:00:15] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[01:00:15] [PASSED] drm_test_damage_iter_single_damage_src_moved
[01:00:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[01:00:15] [PASSED] drm_test_damage_iter_damage
[01:00:15] [PASSED] drm_test_damage_iter_damage_one_intersect
[01:00:15] [PASSED] drm_test_damage_iter_damage_one_outside
[01:00:15] [PASSED] drm_test_damage_iter_damage_src_moved
[01:00:15] [PASSED] drm_test_damage_iter_damage_not_visible
[01:00:15] ================ [PASSED] drm_damage_helper ================
[01:00:15] ============== drm_dp_mst_helper (3 subtests) ==============
[01:00:15] ============== drm_test_dp_mst_calc_pbn_mode ==============
[01:00:15] [PASSED] Clock 154000 BPP 30 DSC disabled
[01:00:15] [PASSED] Clock 234000 BPP 30 DSC disabled
[01:00:15] [PASSED] Clock 297000 BPP 24 DSC disabled
[01:00:15] [PASSED] Clock 332880 BPP 24 DSC enabled
[01:00:15] [PASSED] Clock 324540 BPP 24 DSC enabled
[01:00:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[01:00:15] ============== drm_test_dp_mst_calc_pbn_div ===============
[01:00:15] [PASSED] Link rate 2000000 lane count 4
[01:00:15] [PASSED] Link rate 2000000 lane count 2
[01:00:15] [PASSED] Link rate 2000000 lane count 1
[01:00:15] [PASSED] Link rate 1350000 lane count 4
[01:00:15] [PASSED] Link rate 1350000 lane count 2
[01:00:15] [PASSED] Link rate 1350000 lane count 1
[01:00:15] [PASSED] Link rate 1000000 lane count 4
[01:00:15] [PASSED] Link rate 1000000 lane count 2
[01:00:15] [PASSED] Link rate 1000000 lane count 1
[01:00:15] [PASSED] Link rate 810000 lane count 4
[01:00:15] [PASSED] Link rate 810000 lane count 2
[01:00:15] [PASSED] Link rate 810000 lane count 1
[01:00:15] [PASSED] Link rate 540000 lane count 4
[01:00:15] [PASSED] Link rate 540000 lane count 2
[01:00:15] [PASSED] Link rate 540000 lane count 1
[01:00:15] [PASSED] Link rate 270000 lane count 4
[01:00:15] [PASSED] Link rate 270000 lane count 2
[01:00:15] [PASSED] Link rate 270000 lane count 1
[01:00:15] [PASSED] Link rate 162000 lane count 4
[01:00:15] [PASSED] Link rate 162000 lane count 2
[01:00:15] [PASSED] Link rate 162000 lane count 1
[01:00:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[01:00:15] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[01:00:15] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[01:00:15] [PASSED] DP_POWER_UP_PHY with port number
[01:00:15] [PASSED] DP_POWER_DOWN_PHY with port number
[01:00:15] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[01:00:15] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[01:00:15] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[01:00:15] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[01:00:15] [PASSED] DP_QUERY_PAYLOAD with port number
[01:00:15] [PASSED] DP_QUERY_PAYLOAD with VCPI
[01:00:15] [PASSED] DP_REMOTE_DPCD_READ with port number
[01:00:15] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[01:00:15] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[01:00:15] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[01:00:15] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[01:00:15] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[01:00:15] [PASSED] DP_REMOTE_I2C_READ with port number
[01:00:15] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[01:00:15] [PASSED] DP_REMOTE_I2C_READ with transactions array
[01:00:15] [PASSED] DP_REMOTE_I2C_WRITE with port number
[01:00:15] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[01:00:15] [PASSED] DP_REMOTE_I2C_WRITE with data array
[01:00:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[01:00:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[01:00:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[01:00:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[01:00:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[01:00:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[01:00:15] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[01:00:15] ================ [PASSED] drm_dp_mst_helper ================
[01:00:15] ================== drm_exec (7 subtests) ===================
[01:00:15] [PASSED] sanitycheck
[01:00:15] [PASSED] test_lock
[01:00:15] [PASSED] test_lock_unlock
[01:00:15] [PASSED] test_duplicates
[01:00:15] [PASSED] test_prepare
[01:00:15] [PASSED] test_prepare_array
[01:00:15] [PASSED] test_multiple_loops
[01:00:15] ==================== [PASSED] drm_exec =====================
[01:00:15] =========== drm_format_helper_test (17 subtests) ===========
[01:00:15] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[01:00:15] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[01:00:15] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[01:00:15] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[01:00:15] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[01:00:15] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[01:00:15] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[01:00:15] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[01:00:15] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[01:00:15] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[01:00:15] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[01:00:15] ============== drm_test_fb_xrgb8888_to_mono ===============
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[01:00:15] ==================== drm_test_fb_swab =====================
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ================ [PASSED] drm_test_fb_swab =================
[01:00:15] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[01:00:15] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[01:00:15] [PASSED] single_pixel_source_buffer
[01:00:15] [PASSED] single_pixel_clip_rectangle
[01:00:15] [PASSED] well_known_colors
[01:00:15] [PASSED] destination_pitch
[01:00:15] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[01:00:15] ================= drm_test_fb_clip_offset =================
[01:00:15] [PASSED] pass through
[01:00:15] [PASSED] horizontal offset
[01:00:15] [PASSED] vertical offset
[01:00:15] [PASSED] horizontal and vertical offset
[01:00:15] [PASSED] horizontal offset (custom pitch)
[01:00:15] [PASSED] vertical offset (custom pitch)
[01:00:15] [PASSED] horizontal and vertical offset (custom pitch)
[01:00:15] ============= [PASSED] drm_test_fb_clip_offset =============
[01:00:15] =================== drm_test_fb_memcpy ====================
[01:00:15] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[01:00:15] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[01:00:15] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[01:00:15] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[01:00:15] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[01:00:15] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[01:00:15] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[01:00:15] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[01:00:15] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[01:00:15] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[01:00:15] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[01:00:15] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[01:00:15] =============== [PASSED] drm_test_fb_memcpy ================
[01:00:15] ============= [PASSED] drm_format_helper_test ==============
[01:00:15] ================= drm_format (18 subtests) =================
[01:00:15] [PASSED] drm_test_format_block_width_invalid
[01:00:15] [PASSED] drm_test_format_block_width_one_plane
[01:00:15] [PASSED] drm_test_format_block_width_two_plane
[01:00:15] [PASSED] drm_test_format_block_width_three_plane
[01:00:15] [PASSED] drm_test_format_block_width_tiled
[01:00:15] [PASSED] drm_test_format_block_height_invalid
[01:00:15] [PASSED] drm_test_format_block_height_one_plane
[01:00:15] [PASSED] drm_test_format_block_height_two_plane
[01:00:15] [PASSED] drm_test_format_block_height_three_plane
[01:00:15] [PASSED] drm_test_format_block_height_tiled
[01:00:15] [PASSED] drm_test_format_min_pitch_invalid
[01:00:15] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[01:00:15] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[01:00:15] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[01:00:15] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[01:00:15] [PASSED] drm_test_format_min_pitch_two_plane
[01:00:15] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[01:00:15] [PASSED] drm_test_format_min_pitch_tiled
[01:00:15] =================== [PASSED] drm_format ====================
[01:00:15] ============== drm_framebuffer (10 subtests) ===============
[01:00:15] ========== drm_test_framebuffer_check_src_coords ==========
[01:00:15] [PASSED] Success: source fits into fb
[01:00:15] [PASSED] Fail: overflowing fb with x-axis coordinate
[01:00:15] [PASSED] Fail: overflowing fb with y-axis coordinate
[01:00:15] [PASSED] Fail: overflowing fb with source width
[01:00:15] [PASSED] Fail: overflowing fb with source height
[01:00:15] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[01:00:15] [PASSED] drm_test_framebuffer_cleanup
[01:00:15] =============== drm_test_framebuffer_create ===============
[01:00:15] [PASSED] ABGR8888 normal sizes
[01:00:15] [PASSED] ABGR8888 max sizes
[01:00:15] [PASSED] ABGR8888 pitch greater than min required
[01:00:15] [PASSED] ABGR8888 pitch less than min required
[01:00:15] [PASSED] ABGR8888 Invalid width
[01:00:15] [PASSED] ABGR8888 Invalid buffer handle
[01:00:15] [PASSED] No pixel format
[01:00:15] [PASSED] ABGR8888 Width 0
[01:00:15] [PASSED] ABGR8888 Height 0
[01:00:15] [PASSED] ABGR8888 Out of bound height * pitch combination
[01:00:15] [PASSED] ABGR8888 Large buffer offset
[01:00:15] [PASSED] ABGR8888 Buffer offset for inexistent plane
[01:00:15] [PASSED] ABGR8888 Invalid flag
[01:00:15] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[01:00:15] [PASSED] ABGR8888 Valid buffer modifier
[01:00:15] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[01:00:15] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[01:00:15] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[01:00:15] [PASSED] NV12 Normal sizes
[01:00:15] [PASSED] NV12 Max sizes
[01:00:15] [PASSED] NV12 Invalid pitch
[01:00:15] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[01:00:15] [PASSED] NV12 different modifier per-plane
[01:00:15] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[01:00:15] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[01:00:15] [PASSED] NV12 Modifier for inexistent plane
[01:00:15] [PASSED] NV12 Handle for inexistent plane
[01:00:15] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[01:00:15] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[01:00:15] [PASSED] YVU420 Normal sizes
[01:00:15] [PASSED] YVU420 Max sizes
[01:00:15] [PASSED] YVU420 Invalid pitch
[01:00:15] [PASSED] YVU420 Different pitches
[01:00:15] [PASSED] YVU420 Different buffer offsets/pitches
[01:00:15] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[01:00:15] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[01:00:15] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[01:00:15] [PASSED] YVU420 Valid modifier
[01:00:15] [PASSED] YVU420 Different modifiers per plane
[01:00:15] [PASSED] YVU420 Modifier for inexistent plane
[01:00:15] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[01:00:15] [PASSED] X0L2 Normal sizes
[01:00:15] [PASSED] X0L2 Max sizes
[01:00:15] [PASSED] X0L2 Invalid pitch
[01:00:15] [PASSED] X0L2 Pitch greater than minimum required
[01:00:15] [PASSED] X0L2 Handle for inexistent plane
[01:00:15] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[01:00:15] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[01:00:15] [PASSED] X0L2 Valid modifier
[01:00:15] [PASSED] X0L2 Modifier for inexistent plane
[01:00:15] =========== [PASSED] drm_test_framebuffer_create ===========
[01:00:15] [PASSED] drm_test_framebuffer_free
[01:00:15] [PASSED] drm_test_framebuffer_init
[01:00:15] [PASSED] drm_test_framebuffer_init_bad_format
[01:00:15] [PASSED] drm_test_framebuffer_init_dev_mismatch
[01:00:15] [PASSED] drm_test_framebuffer_lookup
[01:00:15] [PASSED] drm_test_framebuffer_lookup_inexistent
[01:00:15] [PASSED] drm_test_framebuffer_modifiers_not_supported
[01:00:15] ================= [PASSED] drm_framebuffer =================
[01:00:15] ================ drm_gem_shmem (8 subtests) ================
[01:00:15] [PASSED] drm_gem_shmem_test_obj_create
[01:00:15] [PASSED] drm_gem_shmem_test_obj_create_private
[01:00:15] [PASSED] drm_gem_shmem_test_pin_pages
[01:00:15] [PASSED] drm_gem_shmem_test_vmap
[01:00:15] [PASSED] drm_gem_shmem_test_get_pages_sgt
[01:00:15] [PASSED] drm_gem_shmem_test_get_sg_table
[01:00:15] [PASSED] drm_gem_shmem_test_madvise
[01:00:15] [PASSED] drm_gem_shmem_test_purge
[01:00:15] ================== [PASSED] drm_gem_shmem ==================
[01:00:15] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[01:00:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[01:00:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[01:00:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[01:00:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[01:00:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[01:00:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[01:00:15] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[01:00:15] [PASSED] Automatic
[01:00:15] [PASSED] Full
[01:00:15] [PASSED] Limited 16:235
[01:00:15] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[01:00:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[01:00:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[01:00:15] [PASSED] drm_test_check_disable_connector
[01:00:15] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[01:00:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[01:00:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[01:00:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[01:00:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[01:00:15] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[01:00:15] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[01:00:15] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[01:00:15] [PASSED] drm_test_check_output_bpc_dvi
[01:00:15] [PASSED] drm_test_check_output_bpc_format_vic_1
[01:00:15] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[01:00:15] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[01:00:15] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[01:00:15] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[01:00:15] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[01:00:15] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[01:00:15] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[01:00:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[01:00:15] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[01:00:15] [PASSED] drm_test_check_broadcast_rgb_value
[01:00:15] [PASSED] drm_test_check_bpc_8_value
[01:00:15] [PASSED] drm_test_check_bpc_10_value
[01:00:15] [PASSED] drm_test_check_bpc_12_value
[01:00:15] [PASSED] drm_test_check_format_value
[01:00:15] [PASSED] drm_test_check_tmds_char_value
[01:00:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[01:00:15] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[01:00:15] [PASSED] drm_test_check_mode_valid
[01:00:15] [PASSED] drm_test_check_mode_valid_reject
[01:00:15] [PASSED] drm_test_check_mode_valid_reject_rate
[01:00:15] [PASSED] drm_test_check_mode_valid_reject_max_clock
[01:00:15] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[01:00:15] ================= drm_managed (2 subtests) =================
[01:00:15] [PASSED] drm_test_managed_release_action
[01:00:15] [PASSED] drm_test_managed_run_action
[01:00:15] =================== [PASSED] drm_managed ===================
[01:00:15] =================== drm_mm (6 subtests) ====================
[01:00:15] [PASSED] drm_test_mm_init
[01:00:15] [PASSED] drm_test_mm_debug
[01:00:15] [PASSED] drm_test_mm_align32
[01:00:15] [PASSED] drm_test_mm_align64
[01:00:15] [PASSED] drm_test_mm_lowest
[01:00:15] [PASSED] drm_test_mm_highest
[01:00:15] ===================== [PASSED] drm_mm ======================
[01:00:15] ============= drm_modes_analog_tv (5 subtests) =============
[01:00:15] [PASSED] drm_test_modes_analog_tv_mono_576i
[01:00:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[01:00:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[01:00:15] [PASSED] drm_test_modes_analog_tv_pal_576i
[01:00:15] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[01:00:15] =============== [PASSED] drm_modes_analog_tv ===============
[01:00:15] ============== drm_plane_helper (2 subtests) ===============
[01:00:15] =============== drm_test_check_plane_state ================
[01:00:15] [PASSED] clipping_simple
[01:00:15] [PASSED] clipping_rotate_reflect
[01:00:15] [PASSED] positioning_simple
[01:00:15] [PASSED] upscaling
[01:00:15] [PASSED] downscaling
[01:00:15] [PASSED] rounding1
[01:00:15] [PASSED] rounding2
[01:00:15] [PASSED] rounding3
[01:00:15] [PASSED] rounding4
[01:00:15] =========== [PASSED] drm_test_check_plane_state ============
[01:00:15] =========== drm_test_check_invalid_plane_state ============
[01:00:15] [PASSED] positioning_invalid
[01:00:15] [PASSED] upscaling_invalid
[01:00:15] [PASSED] downscaling_invalid
[01:00:15] ======= [PASSED] drm_test_check_invalid_plane_state ========
[01:00:15] ================ [PASSED] drm_plane_helper =================
[01:00:15] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[01:00:15] ====== drm_test_connector_helper_tv_get_modes_check =======
[01:00:15] [PASSED] None
[01:00:15] [PASSED] PAL
[01:00:15] [PASSED] NTSC
[01:00:15] [PASSED] Both, NTSC Default
[01:00:15] [PASSED] Both, PAL Default
[01:00:15] [PASSED] Both, NTSC Default, with PAL on command-line
[01:00:15] [PASSED] Both, PAL Default, with NTSC on command-line
[01:00:15] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[01:00:15] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[01:00:15] ================== drm_rect (9 subtests) ===================
[01:00:15] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[01:00:15] [PASSED] drm_test_rect_clip_scaled_not_clipped
[01:00:15] [PASSED] drm_test_rect_clip_scaled_clipped
[01:00:15] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[01:00:15] ================= drm_test_rect_intersect =================
[01:00:15] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[01:00:15] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[01:00:15] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[01:00:15] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[01:00:15] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[01:00:15] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[01:00:15] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[01:00:15] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[01:00:15] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[01:00:15] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[01:00:15] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[01:00:15] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[01:00:15] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[01:00:15] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[01:00:15] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[01:00:15] ============= [PASSED] drm_test_rect_intersect =============
[01:00:15] ================ drm_test_rect_calc_hscale ================
[01:00:15] [PASSED] normal use
[01:00:15] [PASSED] out of max range
[01:00:15] [PASSED] out of min range
[01:00:15] [PASSED] zero dst
[01:00:15] [PASSED] negative src
[01:00:15] [PASSED] negative dst
[01:00:15] ============ [PASSED] drm_test_rect_calc_hscale ============
[01:00:15] ================ drm_test_rect_calc_vscale ================
[01:00:15] [PASSED] normal use
[01:00:15] [PASSED] out of max range
[01:00:15] [PASSED] out of min range
[01:00:15] [PASSED] zero dst
[01:00:15] [PASSED] negative src
stty: 'standard input': Inappropriate ioctl for device
[01:00:15] [PASSED] negative dst
[01:00:15] ============ [PASSED] drm_test_rect_calc_vscale ============
[01:00:15] ================== drm_test_rect_rotate ===================
[01:00:15] [PASSED] reflect-x
[01:00:15] [PASSED] reflect-y
[01:00:15] [PASSED] rotate-0
[01:00:15] [PASSED] rotate-90
[01:00:15] [PASSED] rotate-180
[01:00:15] [PASSED] rotate-270
[01:00:15] ============== [PASSED] drm_test_rect_rotate ===============
[01:00:15] ================ drm_test_rect_rotate_inv =================
[01:00:15] [PASSED] reflect-x
[01:00:15] [PASSED] reflect-y
[01:00:15] [PASSED] rotate-0
[01:00:15] [PASSED] rotate-90
[01:00:15] [PASSED] rotate-180
[01:00:15] [PASSED] rotate-270
[01:00:15] ============ [PASSED] drm_test_rect_rotate_inv =============
[01:00:15] ==================== [PASSED] drm_rect =====================
[01:00:15] ============ drm_sysfb_modeset_test (1 subtest) ============
[01:00:15] ============ drm_test_sysfb_build_fourcc_list =============
[01:00:15] [PASSED] no native formats
[01:00:15] [PASSED] XRGB8888 as native format
[01:00:15] [PASSED] remove duplicates
[01:00:15] [PASSED] convert alpha formats
[01:00:15] [PASSED] random formats
[01:00:15] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[01:00:15] ============= [PASSED] drm_sysfb_modeset_test ==============
[01:00:15] ============================================================
[01:00:15] Testing complete. Ran 621 tests: passed: 621
[01:00:15] Elapsed time: 25.273s total, 1.712s configuring, 23.393s building, 0.146s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[01:00:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:00:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[01:00:26] Starting KUnit Kernel (1/1)...
[01:00:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:00:26] ================= ttm_device (5 subtests) ==================
[01:00:26] [PASSED] ttm_device_init_basic
[01:00:26] [PASSED] ttm_device_init_multiple
[01:00:26] [PASSED] ttm_device_fini_basic
[01:00:26] [PASSED] ttm_device_init_no_vma_man
[01:00:26] ================== ttm_device_init_pools ==================
[01:00:26] [PASSED] No DMA allocations, no DMA32 required
[01:00:26] [PASSED] DMA allocations, DMA32 required
[01:00:26] [PASSED] No DMA allocations, DMA32 required
[01:00:26] [PASSED] DMA allocations, no DMA32 required
[01:00:26] ============== [PASSED] ttm_device_init_pools ==============
[01:00:26] =================== [PASSED] ttm_device ====================
[01:00:26] ================== ttm_pool (8 subtests) ===================
[01:00:26] ================== ttm_pool_alloc_basic ===================
[01:00:26] [PASSED] One page
[01:00:26] [PASSED] More than one page
[01:00:26] [PASSED] Above the allocation limit
[01:00:26] [PASSED] One page, with coherent DMA mappings enabled
[01:00:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[01:00:26] ============== [PASSED] ttm_pool_alloc_basic ===============
[01:00:26] ============== ttm_pool_alloc_basic_dma_addr ==============
[01:00:26] [PASSED] One page
[01:00:26] [PASSED] More than one page
[01:00:26] [PASSED] Above the allocation limit
[01:00:26] [PASSED] One page, with coherent DMA mappings enabled
[01:00:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[01:00:26] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[01:00:26] [PASSED] ttm_pool_alloc_order_caching_match
[01:00:26] [PASSED] ttm_pool_alloc_caching_mismatch
[01:00:26] [PASSED] ttm_pool_alloc_order_mismatch
[01:00:26] [PASSED] ttm_pool_free_dma_alloc
[01:00:26] [PASSED] ttm_pool_free_no_dma_alloc
[01:00:26] [PASSED] ttm_pool_fini_basic
[01:00:26] ==================== [PASSED] ttm_pool =====================
[01:00:26] ================ ttm_resource (8 subtests) =================
[01:00:26] ================= ttm_resource_init_basic =================
[01:00:26] [PASSED] Init resource in TTM_PL_SYSTEM
[01:00:26] [PASSED] Init resource in TTM_PL_VRAM
[01:00:26] [PASSED] Init resource in a private placement
[01:00:26] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[01:00:26] ============= [PASSED] ttm_resource_init_basic =============
[01:00:26] [PASSED] ttm_resource_init_pinned
[01:00:26] [PASSED] ttm_resource_fini_basic
[01:00:26] [PASSED] ttm_resource_manager_init_basic
[01:00:26] [PASSED] ttm_resource_manager_usage_basic
[01:00:26] [PASSED] ttm_resource_manager_set_used_basic
[01:00:26] [PASSED] ttm_sys_man_alloc_basic
[01:00:26] [PASSED] ttm_sys_man_free_basic
[01:00:26] ================== [PASSED] ttm_resource ===================
[01:00:26] =================== ttm_tt (15 subtests) ===================
[01:00:26] ==================== ttm_tt_init_basic ====================
[01:00:26] [PASSED] Page-aligned size
[01:00:26] [PASSED] Extra pages requested
[01:00:26] ================ [PASSED] ttm_tt_init_basic ================
[01:00:26] [PASSED] ttm_tt_init_misaligned
[01:00:26] [PASSED] ttm_tt_fini_basic
[01:00:26] [PASSED] ttm_tt_fini_sg
[01:00:26] [PASSED] ttm_tt_fini_shmem
[01:00:26] [PASSED] ttm_tt_create_basic
[01:00:26] [PASSED] ttm_tt_create_invalid_bo_type
[01:00:26] [PASSED] ttm_tt_create_ttm_exists
[01:00:26] [PASSED] ttm_tt_create_failed
[01:00:26] [PASSED] ttm_tt_destroy_basic
[01:00:26] [PASSED] ttm_tt_populate_null_ttm
[01:00:26] [PASSED] ttm_tt_populate_populated_ttm
[01:00:26] [PASSED] ttm_tt_unpopulate_basic
[01:00:26] [PASSED] ttm_tt_unpopulate_empty_ttm
[01:00:26] [PASSED] ttm_tt_swapin_basic
[01:00:26] ===================== [PASSED] ttm_tt ======================
[01:00:26] =================== ttm_bo (14 subtests) ===================
[01:00:26] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[01:00:26] [PASSED] Cannot be interrupted and sleeps
[01:00:26] [PASSED] Cannot be interrupted, locks straight away
[01:00:26] [PASSED] Can be interrupted, sleeps
[01:00:26] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[01:00:26] [PASSED] ttm_bo_reserve_locked_no_sleep
[01:00:26] [PASSED] ttm_bo_reserve_no_wait_ticket
[01:00:26] [PASSED] ttm_bo_reserve_double_resv
[01:00:26] [PASSED] ttm_bo_reserve_interrupted
[01:00:26] [PASSED] ttm_bo_reserve_deadlock
[01:00:26] [PASSED] ttm_bo_unreserve_basic
[01:00:26] [PASSED] ttm_bo_unreserve_pinned
[01:00:26] [PASSED] ttm_bo_unreserve_bulk
[01:00:26] [PASSED] ttm_bo_fini_basic
[01:00:26] [PASSED] ttm_bo_fini_shared_resv
[01:00:26] [PASSED] ttm_bo_pin_basic
[01:00:26] [PASSED] ttm_bo_pin_unpin_resource
[01:00:26] [PASSED] ttm_bo_multiple_pin_one_unpin
[01:00:26] ===================== [PASSED] ttm_bo ======================
[01:00:26] ============== ttm_bo_validate (21 subtests) ===============
[01:00:26] ============== ttm_bo_init_reserved_sys_man ===============
[01:00:26] [PASSED] Buffer object for userspace
[01:00:26] [PASSED] Kernel buffer object
[01:00:26] [PASSED] Shared buffer object
[01:00:26] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[01:00:26] ============== ttm_bo_init_reserved_mock_man ==============
[01:00:26] [PASSED] Buffer object for userspace
[01:00:26] [PASSED] Kernel buffer object
[01:00:26] [PASSED] Shared buffer object
[01:00:26] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[01:00:26] [PASSED] ttm_bo_init_reserved_resv
[01:00:26] ================== ttm_bo_validate_basic ==================
[01:00:26] [PASSED] Buffer object for userspace
[01:00:26] [PASSED] Kernel buffer object
[01:00:26] [PASSED] Shared buffer object
[01:00:26] ============== [PASSED] ttm_bo_validate_basic ==============
[01:00:26] [PASSED] ttm_bo_validate_invalid_placement
[01:00:26] ============= ttm_bo_validate_same_placement ==============
[01:00:26] [PASSED] System manager
[01:00:26] [PASSED] VRAM manager
[01:00:26] ========= [PASSED] ttm_bo_validate_same_placement ==========
[01:00:26] [PASSED] ttm_bo_validate_failed_alloc
[01:00:26] [PASSED] ttm_bo_validate_pinned
[01:00:26] [PASSED] ttm_bo_validate_busy_placement
[01:00:26] ================ ttm_bo_validate_multihop =================
[01:00:26] [PASSED] Buffer object for userspace
[01:00:26] [PASSED] Kernel buffer object
[01:00:26] [PASSED] Shared buffer object
[01:00:26] ============ [PASSED] ttm_bo_validate_multihop =============
[01:00:26] ========== ttm_bo_validate_no_placement_signaled ==========
[01:00:26] [PASSED] Buffer object in system domain, no page vector
[01:00:26] [PASSED] Buffer object in system domain with an existing page vector
[01:00:26] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[01:00:26] ======== ttm_bo_validate_no_placement_not_signaled ========
[01:00:26] [PASSED] Buffer object for userspace
[01:00:26] [PASSED] Kernel buffer object
[01:00:26] [PASSED] Shared buffer object
[01:00:26] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[01:00:26] [PASSED] ttm_bo_validate_move_fence_signaled
[01:00:26] ========= ttm_bo_validate_move_fence_not_signaled =========
[01:00:26] [PASSED] Waits for GPU
[01:00:26] [PASSED] Tries to lock straight away
[01:00:26] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[01:00:26] [PASSED] ttm_bo_validate_happy_evict
[01:00:26] [PASSED] ttm_bo_validate_all_pinned_evict
[01:00:26] [PASSED] ttm_bo_validate_allowed_only_evict
[01:00:26] [PASSED] ttm_bo_validate_deleted_evict
[01:00:26] [PASSED] ttm_bo_validate_busy_domain_evict
[01:00:26] [PASSED] ttm_bo_validate_evict_gutting
[01:00:26] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[01:00:26] ================= [PASSED] ttm_bo_validate =================
[01:00:26] ============================================================
[01:00:26] Testing complete. Ran 101 tests: passed: 101
[01:00:26] Elapsed time: 11.075s total, 1.714s configuring, 9.144s building, 0.183s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ Xe.CI.BAT: success for More PF improvements
2025-09-30 23:35 [PATCH 0/6] More PF improvements Michal Wajdeczko
` (7 preceding siblings ...)
2025-10-01 1:00 ` ✓ CI.KUnit: success " Patchwork
@ 2025-10-01 1:35 ` Patchwork
2025-10-01 3:56 ` ✓ Xe.CI.Full: " Patchwork
9 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2025-10-01 1:35 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 934 bytes --]
== Series Details ==
Series: More PF improvements
URL : https://patchwork.freedesktop.org/series/155265/
State : success
== Summary ==
CI Bug Log - changes from xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947_BAT -> xe-pw-155265v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947 -> xe-pw-155265v1
IGT_8564: fd0f7b3639b26971567b7a9d64ba5174d5d3db5a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947: 23f8be57505c80e5b57dec249df8a3cc053eb947
xe-pw-155265v1: 155265v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/index.html
[-- Attachment #2: Type: text/html, Size: 1482 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ Xe.CI.Full: success for More PF improvements
2025-09-30 23:35 [PATCH 0/6] More PF improvements Michal Wajdeczko
` (8 preceding siblings ...)
2025-10-01 1:35 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-10-01 3:56 ` Patchwork
9 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2025-10-01 3:56 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 34856 bytes --]
== Series Details ==
Series: More PF improvements
URL : https://patchwork.freedesktop.org/series/155265/
State : success
== Summary ==
CI Bug Log - changes from xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947_FULL -> xe-pw-155265v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
New tests
---------
New tests have been introduced between xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947_FULL and xe-pw-155265v1_FULL:
### New IGT tests (9) ###
* igt@kms_plane_alpha_blend@alpha-7efc@pipe-c-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.51] s
* igt@kms_plane_alpha_blend@alpha-basic@pipe-c-edp-1:
- Statuses : 1 pass(s)
- Exec time: [3.50] s
* igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-c-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.54] s
* igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-c-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.51] s
* igt@kms_plane_alpha_blend@constant-alpha-max@pipe-c-edp-1:
- Statuses : 1 pass(s)
- Exec time: [2.16] s
* igt@kms_plane_alpha_blend@constant-alpha-mid@pipe-c-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.72] s
* igt@kms_plane_alpha_blend@constant-alpha-min@pipe-c-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.76] s
* igt@kms_plane_alpha_blend@coverage-7efc@pipe-c-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.40] s
* igt@kms_plane_alpha_blend@coverage-vs-premult-vs-constant@pipe-c-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.48] s
Known issues
------------
Here are the changes found in xe-pw-155265v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-a-hdmi-a-1:
- shard-adlp: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#2953] / [Intel XE#4173]) +5 other tests dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-adlp-4/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-a-hdmi-a-1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-adlp-2/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-a-hdmi-a-1.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-0:
- shard-dg2-set2: NOTRUN -> [SKIP][3] ([Intel XE#1124]) +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#2328])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-2/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
- shard-bmg: [PASS][5] -> [SKIP][6] ([Intel XE#2314] / [Intel XE#2894])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
* igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc@pipe-c-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][7] ([Intel XE#787]) +118 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc@pipe-c-dp-2.html
* igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][8] ([Intel XE#455] / [Intel XE#787]) +17 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][9] ([Intel XE#2907])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-6:
- shard-dg2-set2: [PASS][10] -> [INCOMPLETE][11] ([Intel XE#1727] / [Intel XE#3113])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-6.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4:
- shard-dg2-set2: [PASS][12] -> [INCOMPLETE][13] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
* igt@kms_cdclk@mode-transition@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][14] ([Intel XE#4417]) +3 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_cdclk@mode-transition@pipe-a-dp-2.html
* igt@kms_chamelium_color@degamma:
- shard-dg2-set2: NOTRUN -> [SKIP][15] ([Intel XE#306])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_chamelium_color@degamma.html
* igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [FAIL][16] ([Intel XE#1178])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html
* igt@kms_content_protection@uevent@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][17] ([Intel XE#1188])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-436/igt@kms_content_protection@uevent@pipe-a-dp-4.html
* igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
- shard-bmg: [PASS][18] -> [SKIP][19] ([Intel XE#2291]) +6 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-8/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
* igt@kms_dsc@dsc-basic:
- shard-dg2-set2: NOTRUN -> [SKIP][20] ([Intel XE#455]) +2 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_dsc@dsc-basic.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-bmg: [PASS][21] -> [SKIP][22] ([Intel XE#2316]) +5 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-3/igt@kms_flip@2x-nonexisting-fb.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1:
- shard-adlp: [PASS][23] -> [DMESG-WARN][24] ([Intel XE#4543]) +6 other tests dmesg-warn
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-adlp-4/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-adlp-2/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [PASS][25] -> [FAIL][26] ([Intel XE#301] / [Intel XE#3149])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2311]) +1 other test skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-pgflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#651]) +2 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#653]) +6 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_hdr@static-toggle:
- shard-bmg: [PASS][30] -> [SKIP][31] ([Intel XE#1503])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-8/igt@kms_hdr@static-toggle.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@kms_hdr@static-toggle.html
* igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256:
- shard-dg2-set2: NOTRUN -> [FAIL][32] ([Intel XE#616]) +3 other tests fail
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-435/igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-bmg: [PASS][33] -> [SKIP][34] ([Intel XE#4596])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-4.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][35] ([Intel XE#2938])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_psr@fbc-psr-sprite-plane-move:
- shard-dg2-set2: NOTRUN -> [SKIP][36] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_psr@fbc-psr-sprite-plane-move.html
* igt@kms_setmode@invalid-clone-single-crtc-stealing:
- shard-bmg: [PASS][37] -> [SKIP][38] ([Intel XE#1435])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-2/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
* igt@kms_vrr@negative-basic:
- shard-bmg: [PASS][39] -> [SKIP][40] ([Intel XE#1499])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-2/igt@kms_vrr@negative-basic.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@kms_vrr@negative-basic.html
* igt@xe_eudebug@basic-vm-access-parameters:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#4837])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-2/igt@xe_eudebug@basic-vm-access-parameters.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
- shard-dg2-set2: [PASS][42] -> [SKIP][43] ([Intel XE#1392]) +2 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-dg2-436/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
- shard-dg2-set2: NOTRUN -> [SKIP][44] ([Intel XE#1392]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
* igt@xe_exec_fault_mode@many-bindexecqueue-userptr-rebind-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][45] ([Intel XE#288]) +4 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@xe_exec_fault_mode@many-bindexecqueue-userptr-rebind-imm.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-lr:
- shard-dg2-set2: NOTRUN -> [SKIP][46] ([Intel XE#2360])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-busy-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][47] ([Intel XE#4915]) +30 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-busy-nomemset.html
* igt@xe_oa@invalid-oa-format-id:
- shard-dg2-set2: NOTRUN -> [SKIP][48] ([Intel XE#3573])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@xe_oa@invalid-oa-format-id.html
* igt@xe_pxp@pxp-stale-queue-post-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][49] ([Intel XE#4733])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@xe_pxp@pxp-stale-queue-post-suspend.html
* igt@xe_query@multigpu-query-gt-list:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#944])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-2/igt@xe_query@multigpu-query-gt-list.html
* igt@xe_render_copy@render-stress-4-copies:
- shard-dg2-set2: NOTRUN -> [SKIP][51] ([Intel XE#4814])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@xe_render_copy@render-stress-4-copies.html
#### Possible fixes ####
* igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1:
- shard-adlp: [FAIL][52] ([Intel XE#3908]) -> [PASS][53] +1 other test pass
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-adlp-6/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-adlp-1/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [INCOMPLETE][54] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
- shard-bmg: [SKIP][56] ([Intel XE#2291]) -> [PASS][57] +2 other tests pass
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-bmg: [FAIL][58] ([Intel XE#1475]) -> [PASS][59]
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_dp_aux_dev:
- shard-bmg: [SKIP][60] ([Intel XE#3009]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-6/igt@kms_dp_aux_dev.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-1/igt@kms_dp_aux_dev.html
* igt@kms_flip@2x-plain-flip:
- shard-bmg: [SKIP][62] ([Intel XE#2316]) -> [PASS][63] +3 other tests pass
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-6/igt@kms_flip@2x-plain-flip.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-3/igt@kms_flip@2x-plain-flip.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [FAIL][64] ([Intel XE#301]) -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip@flip-vs-rmfb-interruptible:
- shard-adlp: [DMESG-WARN][66] ([Intel XE#5208]) -> [PASS][67] +1 other test pass
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-adlp-9/igt@kms_flip@flip-vs-rmfb-interruptible.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-adlp-9/igt@kms_flip@flip-vs-rmfb-interruptible.html
* igt@kms_flip@flip-vs-rmfb@d-hdmi-a1:
- shard-adlp: [DMESG-WARN][68] ([Intel XE#4543]) -> [PASS][69] +6 other tests pass
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-adlp-6/igt@kms_flip@flip-vs-rmfb@d-hdmi-a1.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-adlp-1/igt@kms_flip@flip-vs-rmfb@d-hdmi-a1.html
* igt@kms_flip@flip-vs-suspend:
- shard-adlp: [DMESG-WARN][70] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][71] +3 other tests pass
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-adlp-9/igt@kms_flip@flip-vs-suspend.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-adlp-3/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y:
- shard-adlp: [DMESG-FAIL][72] ([Intel XE#4543]) -> [PASS][73] +1 other test pass
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-adlp-1/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y:
- shard-adlp: [FAIL][74] ([Intel XE#1874]) -> [PASS][75]
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-adlp-1/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
* igt@kms_hdr@static-toggle-suspend:
- shard-bmg: [SKIP][76] ([Intel XE#1503]) -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-3/igt@kms_hdr@static-toggle-suspend.html
* igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
- shard-dg2-set2: [SKIP][78] ([Intel XE#1392]) -> [PASS][79] +6 other tests pass
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-436/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
* igt@xe_exec_reset@cm-close-fd:
- shard-adlp: [DMESG-WARN][80] -> [PASS][81]
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-adlp-3/igt@xe_exec_reset@cm-close-fd.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-adlp-9/igt@xe_exec_reset@cm-close-fd.html
* igt@xe_exec_reset@parallel-gt-reset:
- shard-bmg: [DMESG-WARN][82] ([Intel XE#3876]) -> [PASS][83]
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-3/igt@xe_exec_reset@parallel-gt-reset.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@xe_exec_reset@parallel-gt-reset.html
* {igt@xe_exec_system_allocator@many-large-new-prefetch}:
- shard-bmg: [CRASH][84] ([Intel XE#6192]) -> [PASS][85] +6 other tests pass
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-4/igt@xe_exec_system_allocator@many-large-new-prefetch.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@xe_exec_system_allocator@many-large-new-prefetch.html
* {igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma}:
- shard-lnl: [FAIL][86] -> [PASS][87]
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-lnl-4/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-lnl-4/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
* {igt@xe_exec_system_allocator@twice-malloc-prefetch}:
- shard-lnl: [CRASH][88] ([Intel XE#6192]) -> [PASS][89] +7 other tests pass
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-lnl-4/igt@xe_exec_system_allocator@twice-malloc-prefetch.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-lnl-4/igt@xe_exec_system_allocator@twice-malloc-prefetch.html
* igt@xe_exec_threads@threads-bal-mixed-fd-userptr-rebind:
- shard-bmg: [DMESG-FAIL][90] ([Intel XE#3876]) -> [PASS][91] +1 other test pass
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-3/igt@xe_exec_threads@threads-bal-mixed-fd-userptr-rebind.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@xe_exec_threads@threads-bal-mixed-fd-userptr-rebind.html
#### Warnings ####
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-adlp: [DMESG-FAIL][92] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543]) -> [DMESG-FAIL][93] ([Intel XE#4543])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-adlp-9/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-adlp-3/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_content_protection@srm:
- shard-bmg: [FAIL][94] ([Intel XE#1178]) -> [SKIP][95] ([Intel XE#2341])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-2/igt@kms_content_protection@srm.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@kms_content_protection@srm.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-lnl: [FAIL][96] ([Intel XE#301]) -> [FAIL][97] ([Intel XE#301] / [Intel XE#3149])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-panning-vs-hang@d-hdmi-a1:
- shard-adlp: [TIMEOUT][98] ([Intel XE#4543]) -> [DMESG-WARN][99] ([Intel XE#4543]) +1 other test dmesg-warn
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-adlp-1/igt@kms_flip@flip-vs-panning-vs-hang@d-hdmi-a1.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-adlp-3/igt@kms_flip@flip-vs-panning-vs-hang@d-hdmi-a1.html
* igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw:
- shard-bmg: [SKIP][100] ([Intel XE#2312]) -> [SKIP][101] ([Intel XE#2311]) +9 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt:
- shard-bmg: [SKIP][102] ([Intel XE#2312]) -> [SKIP][103] ([Intel XE#5390])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-bmg: [SKIP][104] ([Intel XE#5390]) -> [SKIP][105] ([Intel XE#2312]) +6 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-blt:
- shard-bmg: [SKIP][106] ([Intel XE#2311]) -> [SKIP][107] ([Intel XE#2312]) +17 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-blt.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move:
- shard-bmg: [SKIP][108] ([Intel XE#2313]) -> [SKIP][109] ([Intel XE#2312]) +16 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt:
- shard-bmg: [SKIP][110] ([Intel XE#2312]) -> [SKIP][111] ([Intel XE#2313]) +9 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][112] ([Intel XE#3544]) -> [SKIP][113] ([Intel XE#3374] / [Intel XE#3544])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_pm_dc@dc9-dpms:
- shard-adlp: [FAIL][114] ([Intel XE#3325]) -> [SKIP][115] ([Intel XE#734])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-adlp-8/igt@kms_pm_dc@dc9-dpms.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-adlp-4/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-set2: [SKIP][116] ([Intel XE#362]) -> [FAIL][117] ([Intel XE#1729])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-436/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-dg2-set2: [SKIP][118] ([Intel XE#1500]) -> [SKIP][119] ([Intel XE#362])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947/shard-dg2-435/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1475]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1475
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3325
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#6192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6192
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#734]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/734
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947 -> xe-pw-155265v1
IGT_8564: fd0f7b3639b26971567b7a9d64ba5174d5d3db5a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3850-23f8be57505c80e5b57dec249df8a3cc053eb947: 23f8be57505c80e5b57dec249df8a3cc053eb947
xe-pw-155265v1: 155265v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155265v1/index.html
[-- Attachment #2: Type: text/html, Size: 40043 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 3/6] drm/xe/pf: Expose VF control operations over debugfs
2025-09-30 23:35 ` [PATCH 3/6] drm/xe/pf: Expose VF control operations over debugfs Michal Wajdeczko
@ 2025-10-01 7:30 ` Matthew Brost
2025-10-01 8:21 ` Michal Wajdeczko
2025-10-02 21:37 ` Michał Winiarski
1 sibling, 1 reply; 23+ messages in thread
From: Matthew Brost @ 2025-10-01 7:30 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
On Wed, Oct 01, 2025 at 01:35:21AM +0200, Michal Wajdeczko wrote:
> To allow the user to control the activity of individual VFs,
> expose basic VF control operations (pause, resume, stop, reset)
> over the debugfs as write-only files:
>
What is the reasoning for adding these? Once we have VFIO driver will
these ever be used? Are there posted IGTs which use these?
Matt
> /sys/kernel/debug/dri/BDF/sriov/
> ├── vf1
> │ ├── pause
> │ ├── reset
> │ ├── resume
> │ ├── stop
> │ :
> ├── vf2
> : :
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> ---
> drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c | 93 ++++++++++++++++++++++++
> 1 file changed, 93 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c b/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c
> index 2ab0b1f4818a..97636ed86fb8 100644
> --- a/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c
> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c
> @@ -8,13 +8,41 @@
>
> #include "xe_device.h"
> #include "xe_device_types.h"
> +#include "xe_pm.h"
> #include "xe_sriov_pf.h"
> +#include "xe_sriov_pf_control.h"
> #include "xe_sriov_pf_debugfs.h"
> #include "xe_sriov_pf_helpers.h"
> #include "xe_sriov_pf_service.h"
> #include "xe_sriov_printk.h"
> #include "xe_tile_sriov_pf_debugfs.h"
>
> +/*
> + * /sys/kernel/debug/dri/BDF/
> + * ├── sriov # d_inode->i_private = (xe_device*)
> + * │ ├── pf # d_inode->i_private = (xe_device*)
> + * │ ├── vf1 # d_inode->i_private = VFID(1)
> + * : :
> + * │ ├── vfN # d_inode->i_private = VFID(N)
> + */
> +
> +static void *extract_priv(struct dentry *d)
> +{
> + return d->d_inode->i_private;
> +}
> +
> +static struct xe_device *extract_xe(struct dentry *d)
> +{
> + return extract_priv(d->d_parent);
> +}
> +
> +static unsigned int extract_vfid(struct dentry *d)
> +{
> + void *p = extract_priv(d);
> +
> + return p == extract_xe(d) ? PFID : (uintptr_t)p;
> +}
> +
> static int simple_show(struct seq_file *m, void *data)
> {
> struct drm_printer p = drm_seq_file_printer(m);
> @@ -39,6 +67,70 @@ static void pf_populate_pf(struct xe_device *xe, struct dentry *pfdent)
> drm_debugfs_create_files(debugfs_list, ARRAY_SIZE(debugfs_list), pfdent, minor);
> }
>
> +/*
> + * /sys/kernel/debug/dri/BDF/
> + * ├── sriov
> + * │ ├── vf1
> + * │ │ ├── pause
> + * │ │ ├── reset
> + * │ │ ├── resume
> + * │ │ ├── stop
> + * │ │ :
> + * │ ├── vf2
> + * │ │ ├── ...
> + */
> +
> +static ssize_t from_file_write_to_vf_call(struct file *file, const char __user *userbuf,
> + size_t count, loff_t *ppos,
> + int (*call)(struct xe_device *, unsigned int))
> +{
> + struct dentry *dent = file_dentry(file)->d_parent;
> + struct xe_device *xe = extract_xe(dent);
> + unsigned int vfid = extract_vfid(dent);
> + bool yes;
> + int ret;
> +
> + if (*ppos)
> + return -EINVAL;
> + ret = kstrtobool_from_user(userbuf, count, &yes);
> + if (ret < 0)
> + return ret;
> + if (yes) {
> + xe_pm_runtime_get(xe);
> + ret = call(xe, vfid);
> + xe_pm_runtime_put(xe);
> + }
> + if (ret < 0)
> + return ret;
> + return count;
> +}
> +
> +#define DEFINE_VF_CONTROL_ATTRIBUTE(OP) \
> +static int OP##_show(struct seq_file *s, void *unused) \
> +{ \
> + return 0; \
> +} \
> +static ssize_t OP##_write(struct file *file, const char __user *userbuf, \
> + size_t count, loff_t *ppos) \
> +{ \
> + return from_file_write_to_vf_call(file, userbuf, count, ppos, \
> + xe_sriov_pf_control_##OP); \
> +} \
> +DEFINE_SHOW_STORE_ATTRIBUTE(OP)
> +
> +DEFINE_VF_CONTROL_ATTRIBUTE(pause_vf);
> +DEFINE_VF_CONTROL_ATTRIBUTE(resume_vf);
> +DEFINE_VF_CONTROL_ATTRIBUTE(stop_vf);
> +DEFINE_VF_CONTROL_ATTRIBUTE(reset_vf);
> +
> +static void pf_populate_vf(struct xe_device *xe, struct dentry *vfdent)
> +{
> + debugfs_create_file("pause", 0200, vfdent, xe, &pause_vf_fops);
> + debugfs_create_file("resume", 0200, vfdent, xe, &resume_vf_fops);
> + debugfs_create_file("stop", 0200, vfdent, xe, &stop_vf_fops);
> + debugfs_create_file("reset", 0200, vfdent, xe, &reset_vf_fops);
> +}
> +
> static void pf_populate_with_tiles(struct xe_device *xe, struct dentry *dent, unsigned int vfid)
> {
> struct xe_tile *tile;
> @@ -103,6 +195,7 @@ void xe_sriov_pf_debugfs_register(struct xe_device *xe, struct dentry *root)
> return;
> vfdent->d_inode->i_private = (void *)(uintptr_t)VFID(n);
>
> + pf_populate_vf(xe, vfdent);
> pf_populate_with_tiles(xe, vfdent, VFID(n));
> }
> }
> --
> 2.47.1
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 6/6] drm/xe/pf: Synchronize VF FLR between all GTs
2025-09-30 23:35 ` [PATCH 6/6] drm/xe/pf: Synchronize VF FLR between all GTs Michal Wajdeczko
@ 2025-10-01 7:32 ` Matthew Brost
2025-10-01 8:27 ` Michal Wajdeczko
2025-10-02 21:57 ` Michał Winiarski
1 sibling, 1 reply; 23+ messages in thread
From: Matthew Brost @ 2025-10-01 7:32 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
On Wed, Oct 01, 2025 at 01:35:24AM +0200, Michal Wajdeczko wrote:
> The PF part of the VF FLR processing shall be done after all GuCs
> confirm that they finished their part VF FLR processing, otherwise
> PF may start clearing VF's GGTT that other GuC may still accessing.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> ---
> drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 56 ++++++++++++++++++-
> drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h | 1 +
> .../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 2 +
> drivers/gpu/drm/xe/xe_sriov_pf_control.c | 29 ++++++++++
> drivers/gpu/drm/xe/xe_sriov_pf_control.h | 1 +
> 5 files changed, 88 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
> index 491918d6b93b..2e6bd3d1fe1d 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
> @@ -18,6 +18,7 @@
> #include "xe_gt_sriov_printk.h"
> #include "xe_guc_ct.h"
> #include "xe_sriov.h"
> +#include "xe_sriov_pf_control.h"
> #include "xe_sriov_pf_service.h"
> #include "xe_tile.h"
>
> @@ -170,6 +171,7 @@ static const char *control_bit_to_string(enum xe_gt_sriov_control_bits bit)
> CASE2STR(FLR_SEND_START);
> CASE2STR(FLR_WAIT_GUC);
> CASE2STR(FLR_GUC_DONE);
> + CASE2STR(FLR_SYNC);
> CASE2STR(FLR_RESET_CONFIG);
> CASE2STR(FLR_RESET_DATA);
> CASE2STR(FLR_RESET_MMIO);
> @@ -940,6 +942,10 @@ int xe_gt_sriov_pf_control_stop_vf(struct xe_gt *gt, unsigned int vfid)
> * : v : | |
> * : FLR_GUC_DONE : | |
> * : | : | |
> + * : | o--<--sync : | |
> + * : |/ / : | |
> + * : FLR_SYNC--o : | |
> + * : | : | |
> * : FLR_RESET_CONFIG---failed--->-----------o--------+-----------o
> * : | : | |
> * : FLR_RESET_DATA : | |
> @@ -1147,12 +1153,38 @@ static bool pf_exit_vf_flr_send_start(struct xe_gt *gt, unsigned int vfid)
> return true;
> }
>
> +static bool pf_exit_vf_flr_sync(struct xe_gt *gt, unsigned int vfid)
> +{
> + if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC))
> + return false;
> +
> + pf_enter_vf_flr_reset_config(gt, vfid);
> + return true;
> +}
> +
> +static void pf_enter_vf_flr_sync(struct xe_gt *gt, unsigned int vfid)
> +{
> + int ret;
> +
> + if (!pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC))
> + pf_enter_vf_state_machine_bug(gt, vfid);
> +
> + ret = xe_sriov_pf_control_sync_flr(gt_to_xe(gt), vfid);
> + if (ret < 0) {
> + xe_gt_sriov_dbg_verbose(gt, "FLR checkpoint %pe\n", ERR_PTR(ret));
> + pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC);
> + } else {
> + xe_gt_sriov_dbg_verbose(gt, "FLR checkpoint pass\n");
> + pf_expect_vf_not_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC);
> + }
> +}
> +
> static bool pf_exit_vf_flr_guc_done(struct xe_gt *gt, unsigned int vfid)
> {
> if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_GUC_DONE))
> return false;
>
> - pf_enter_vf_flr_reset_config(gt, vfid);
> + pf_enter_vf_flr_sync(gt, vfid);
> return true;
> }
>
> @@ -1178,6 +1210,28 @@ int xe_gt_sriov_pf_control_trigger_flr(struct xe_gt *gt, unsigned int vfid)
> return 0;
> }
>
> +/**
> + * xe_gt_sriov_pf_control_sync_flr() - Synchronize on the VF FLR checkpoint.
> + * @gt: the &xe_gt
> + * @vfid: the VF identifier
> + * @sync: if true it will allow to exit the checkpoint
> + *
> + * Return: non-zero if FLR checkpoint has been reached, zero if the is no FLR
> + * in progress, or a negative error code on the FLR busy or failed.
> + */
> +int xe_gt_sriov_pf_control_sync_flr(struct xe_gt *gt, unsigned int vfid, bool sync)
> +{
> + if (sync && pf_exit_vf_flr_sync(gt, vfid))
> + return 1;
> + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC))
> + return 1;
This looks a funny the return 1 / 0 / -errno pattern. The caller of this
function only checks for -errno.
Matt
> + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_WIP))
> + return -EBUSY;
> + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_FAILED))
> + return -EIO;
> + return 0;
> +}
> +
> /**
> * xe_gt_sriov_pf_control_wait_flr() - Wait for a VF FLR to complete.
> * @gt: the &xe_gt
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h
> index fd256866f628..8a72ef3778d4 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h
> @@ -18,6 +18,7 @@ int xe_gt_sriov_pf_control_pause_vf(struct xe_gt *gt, unsigned int vfid);
> int xe_gt_sriov_pf_control_resume_vf(struct xe_gt *gt, unsigned int vfid);
> int xe_gt_sriov_pf_control_stop_vf(struct xe_gt *gt, unsigned int vfid);
> int xe_gt_sriov_pf_control_trigger_flr(struct xe_gt *gt, unsigned int vfid);
> +int xe_gt_sriov_pf_control_sync_flr(struct xe_gt *gt, unsigned int vfid, bool sync);
> int xe_gt_sriov_pf_control_wait_flr(struct xe_gt *gt, unsigned int vfid);
>
> #ifdef CONFIG_PCI_IOV
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h
> index f02f941b4ad2..c80b7e77f1ad 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h
> @@ -18,6 +18,7 @@
> * @XE_GT_SRIOV_STATE_FLR_SEND_START: indicates that the PF wants to send a FLR START command.
> * @XE_GT_SRIOV_STATE_FLR_WAIT_GUC: indicates that the PF awaits for a response from the GuC.
> * @XE_GT_SRIOV_STATE_FLR_GUC_DONE: indicates that the PF has received a response from the GuC.
> + * @XE_GT_SRIOV_STATE_FLR_SYNC: indicates that the PF awaits to synchronize with other GuCs.
> * @XE_GT_SRIOV_STATE_FLR_RESET_CONFIG: indicates that the PF needs to clear VF's resources.
> * @XE_GT_SRIOV_STATE_FLR_RESET_DATA: indicates that the PF needs to clear VF's data.
> * @XE_GT_SRIOV_STATE_FLR_RESET_MMIO: indicates that the PF needs to reset VF's registers.
> @@ -47,6 +48,7 @@ enum xe_gt_sriov_control_bits {
> XE_GT_SRIOV_STATE_FLR_SEND_START,
> XE_GT_SRIOV_STATE_FLR_WAIT_GUC,
> XE_GT_SRIOV_STATE_FLR_GUC_DONE,
> + XE_GT_SRIOV_STATE_FLR_SYNC,
> XE_GT_SRIOV_STATE_FLR_RESET_CONFIG,
> XE_GT_SRIOV_STATE_FLR_RESET_DATA,
> XE_GT_SRIOV_STATE_FLR_RESET_MMIO,
> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
> index e1c54a8feb07..416d00a03fbb 100644
> --- a/drivers/gpu/drm/xe/xe_sriov_pf_control.c
> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
> @@ -120,3 +120,32 @@ int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid)
>
> return result;
> }
> +
> +/**
> + * xe_sriov_pf_control_sync_flr() - Synchronize a VF FLR between all GTs.
> + * @xe: the &xe_device
> + * @vfid: the VF identifier
> + *
> + * This function is for PF only.
> + *
> + * Return: 0 on success or a negative error code on failure.
> + */
> +int xe_sriov_pf_control_sync_flr(struct xe_device *xe, unsigned int vfid)
> +{
> + struct xe_gt *gt;
> + unsigned int id;
> + int ret;
> +
> + for_each_gt(gt, xe, id) {
> + ret = xe_gt_sriov_pf_control_sync_flr(gt, vfid, false);
> + if (ret < 0)
> + return ret;
> + }
> + for_each_gt(gt, xe, id) {
> + ret = xe_gt_sriov_pf_control_sync_flr(gt, vfid, true);
> + if (ret < 0)
> + return ret;
> + }
> +
> + return 0;
> +}
> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.h b/drivers/gpu/drm/xe/xe_sriov_pf_control.h
> index 9bf059f746d4..2d52d0ac1b28 100644
> --- a/drivers/gpu/drm/xe/xe_sriov_pf_control.h
> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.h
> @@ -12,5 +12,6 @@ int xe_sriov_pf_control_pause_vf(struct xe_device *xe, unsigned int vfid);
> int xe_sriov_pf_control_resume_vf(struct xe_device *xe, unsigned int vfid);
> int xe_sriov_pf_control_stop_vf(struct xe_device *xe, unsigned int vfid);
> int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid);
> +int xe_sriov_pf_control_sync_flr(struct xe_device *xe, unsigned int vfid);
>
> #endif
> --
> 2.47.1
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 1/6] drm/xe/pf: Add top level functions to control VFs
2025-09-30 23:35 ` [PATCH 1/6] drm/xe/pf: Add top level functions to control VFs Michal Wajdeczko
@ 2025-10-01 7:34 ` Matthew Brost
2025-10-01 8:03 ` Michal Wajdeczko
2025-10-02 21:26 ` Michał Winiarski
1 sibling, 1 reply; 23+ messages in thread
From: Matthew Brost @ 2025-10-01 7:34 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
On Wed, Oct 01, 2025 at 01:35:19AM +0200, Michal Wajdeczko wrote:
> We already have control functions that we use to control the VF
> state on the per-GT basis, but that is low level detail from the
> user point of view, who rather expects VF-level functions.
>
> For now add simple functions that just iterate over all GTs and
> call per-GT control function. We will soon allow to use some of
> them from the user facing interfaces like debugfs.
>
Will the VFIO driver hook into the level control like xe_sriov_pf_control.c?
Matt
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> ---
> drivers/gpu/drm/xe/Makefile | 1 +
> drivers/gpu/drm/xe/xe_pci_sriov.c | 8 +-
> drivers/gpu/drm/xe/xe_sriov_pf_control.c | 104 +++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_sriov_pf_control.h | 16 ++++
> 4 files changed, 124 insertions(+), 5 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_sriov_pf_control.c
> create mode 100644 drivers/gpu/drm/xe/xe_sriov_pf_control.h
>
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 3c5d2388997d..84321fad3265 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -174,6 +174,7 @@ xe-$(CONFIG_PCI_IOV) += \
> xe_lmtt_ml.o \
> xe_pci_sriov.o \
> xe_sriov_pf.o \
> + xe_sriov_pf_control.o \
> xe_sriov_pf_debugfs.o \
> xe_sriov_pf_service.o \
> xe_tile_sriov_pf_debugfs.o
> diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c
> index af05db07162e..9c1c9e669b04 100644
> --- a/drivers/gpu/drm/xe/xe_pci_sriov.c
> +++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
> @@ -17,6 +17,7 @@
> #include "xe_pm.h"
> #include "xe_sriov.h"
> #include "xe_sriov_pf.h"
> +#include "xe_sriov_pf_control.h"
> #include "xe_sriov_pf_helpers.h"
> #include "xe_sriov_printk.h"
>
> @@ -60,13 +61,10 @@ static void pf_unprovision_vfs(struct xe_device *xe, unsigned int num_vfs)
>
> static void pf_reset_vfs(struct xe_device *xe, unsigned int num_vfs)
> {
> - struct xe_gt *gt;
> - unsigned int id;
> unsigned int n;
>
> - for_each_gt(gt, xe, id)
> - for (n = 1; n <= num_vfs; n++)
> - xe_gt_sriov_pf_control_trigger_flr(gt, n);
> + for (n = 1; n <= num_vfs; n++)
> + xe_sriov_pf_control_reset_vf(xe, n);
> }
>
> static struct pci_dev *xe_pci_pf_get_vf_dev(struct xe_device *xe, unsigned int vf_id)
> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
> new file mode 100644
> index 000000000000..56c0dd382262
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
> @@ -0,0 +1,104 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#include "xe_device.h"
> +#include "xe_gt_sriov_pf_control.h"
> +#include "xe_sriov_pf_control.h"
> +
> +/**
> + * xe_sriov_pf_control_pause_vf() - Pause a VF on all GTs.
> + * @xe: the &xe_device
> + * @vfid: the VF identifier (can't be 0 == PFID)
> + *
> + * This function is for PF only.
> + *
> + * Return: 0 on success or a negative error code on failure.
> + */
> +int xe_sriov_pf_control_pause_vf(struct xe_device *xe, unsigned int vfid)
> +{
> + struct xe_gt *gt;
> + unsigned int id;
> + int result = 0;
> + int err;
> +
> + for_each_gt(gt, xe, id) {
> + err = xe_gt_sriov_pf_control_pause_vf(gt, vfid);
> + result = result ? -EUCLEAN : err;
> + }
> +
> + return result;
> +}
> +
> +/**
> + * xe_sriov_pf_control_resume_vf() - Resume a VF on all GTs.
> + * @xe: the &xe_device
> + * @vfid: the VF identifier
> + *
> + * This function is for PF only.
> + *
> + * Return: 0 on success or a negative error code on failure.
> + */
> +int xe_sriov_pf_control_resume_vf(struct xe_device *xe, unsigned int vfid)
> +{
> + struct xe_gt *gt;
> + unsigned int id;
> + int result = 0;
> + int err;
> +
> + for_each_gt(gt, xe, id) {
> + err = xe_gt_sriov_pf_control_resume_vf(gt, vfid);
> + result = result ? -EUCLEAN : err;
> + }
> +
> + return result;
> +}
> +
> +/**
> + * xe_sriov_pf_control_stop_vf - Stop a VF on all GTs.
> + * @xe: the &xe_device
> + * @vfid: the VF identifier
> + *
> + * This function is for PF only.
> + *
> + * Return: 0 on success or a negative error code on failure.
> + */
> +int xe_sriov_pf_control_stop_vf(struct xe_device *xe, unsigned int vfid)
> +{
> + struct xe_gt *gt;
> + unsigned int id;
> + int result = 0;
> + int err;
> +
> + for_each_gt(gt, xe, id) {
> + err = xe_gt_sriov_pf_control_stop_vf(gt, vfid);
> + result = result ? -EUCLEAN : err;
> + }
> +
> + return result;
> +}
> +
> +/**
> + * xe_sriov_pf_control_reset_vf() - Perform a VF reset (FLR).
> + * @xe: the &xe_device
> + * @vfid: the VF identifier
> + *
> + * This function is for PF only.
> + *
> + * Return: 0 on success or a negative error code on failure.
> + */
> +int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid)
> +{
> + struct xe_gt *gt;
> + unsigned int id;
> + int result = 0;
> + int err;
> +
> + for_each_gt(gt, xe, id) {
> + err = xe_gt_sriov_pf_control_trigger_flr(gt, vfid);
> + result = result ? -EUCLEAN : err;
> + }
> +
> + return result;
> +}
> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.h b/drivers/gpu/drm/xe/xe_sriov_pf_control.h
> new file mode 100644
> index 000000000000..9bf059f746d4
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.h
> @@ -0,0 +1,16 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef _XE_SRIOV_PF_CONTROL_H_
> +#define _XE_SRIOV_PF_CONTROL_H_
> +
> +struct xe_device;
> +
> +int xe_sriov_pf_control_pause_vf(struct xe_device *xe, unsigned int vfid);
> +int xe_sriov_pf_control_resume_vf(struct xe_device *xe, unsigned int vfid);
> +int xe_sriov_pf_control_stop_vf(struct xe_device *xe, unsigned int vfid);
> +int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid);
> +
> +#endif
> --
> 2.47.1
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 1/6] drm/xe/pf: Add top level functions to control VFs
2025-10-01 7:34 ` Matthew Brost
@ 2025-10-01 8:03 ` Michal Wajdeczko
0 siblings, 0 replies; 23+ messages in thread
From: Michal Wajdeczko @ 2025-10-01 8:03 UTC (permalink / raw)
To: Matthew Brost, Michał Winiarski; +Cc: intel-xe
On 10/1/2025 9:34 AM, Matthew Brost wrote:
> On Wed, Oct 01, 2025 at 01:35:19AM +0200, Michal Wajdeczko wrote:
>> We already have control functions that we use to control the VF
>> state on the per-GT basis, but that is low level detail from the
>> user point of view, who rather expects VF-level functions.
>>
>> For now add simple functions that just iterate over all GTs and
>> call per-GT control function. We will soon allow to use some of
>> them from the user facing interfaces like debugfs.
>>
>
> Will the VFIO driver hook into the level control like xe_sriov_pf_control.c?
>
it should, but likely through a small glue layer that will convert
from pci_dev to xe_device
+ Michal to confirm
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 3/6] drm/xe/pf: Expose VF control operations over debugfs
2025-10-01 7:30 ` Matthew Brost
@ 2025-10-01 8:21 ` Michal Wajdeczko
0 siblings, 0 replies; 23+ messages in thread
From: Michal Wajdeczko @ 2025-10-01 8:21 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
On 10/1/2025 9:30 AM, Matthew Brost wrote:
> On Wed, Oct 01, 2025 at 01:35:21AM +0200, Michal Wajdeczko wrote:
>> To allow the user to control the activity of individual VFs,
>> expose basic VF control operations (pause, resume, stop, reset)
>> over the debugfs as write-only files:
>>
>
> What is the reasoning for adding these? Once we have VFIO driver will
> these ever be used? Are there posted IGTs which use these?
direct exposure of the VF PAUSE/RESUME/STOP operations to the user is
a part of the VF adverse events handling, where after triggering uevent
(this is also WIP) the admin should be able to temporary silence the VF
which does not meet thresholds
and the long term goal is to expose all these operations mainly over
sysfs, but for early hardening, it's added to debugfs first
the IGT(s) to exercise that new attributes will follow, but probably
after adding full state tracking of the VF (similar to what was done
on GT-level) to protect against unsupported flows (like trying to
pause already stopped VF) without triggering GuC errors
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 6/6] drm/xe/pf: Synchronize VF FLR between all GTs
2025-10-01 7:32 ` Matthew Brost
@ 2025-10-01 8:27 ` Michal Wajdeczko
0 siblings, 0 replies; 23+ messages in thread
From: Michal Wajdeczko @ 2025-10-01 8:27 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
On 10/1/2025 9:32 AM, Matthew Brost wrote:
> On Wed, Oct 01, 2025 at 01:35:24AM +0200, Michal Wajdeczko wrote:
>> The PF part of the VF FLR processing shall be done after all GuCs
>> confirm that they finished their part VF FLR processing, otherwise
>> PF may start clearing VF's GGTT that other GuC may still accessing.
>>
>> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 56 ++++++++++++++++++-
>> drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h | 1 +
>> .../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 2 +
>> drivers/gpu/drm/xe/xe_sriov_pf_control.c | 29 ++++++++++
>> drivers/gpu/drm/xe/xe_sriov_pf_control.h | 1 +
>> 5 files changed, 88 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
>> index 491918d6b93b..2e6bd3d1fe1d 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c
>> @@ -18,6 +18,7 @@
>> #include "xe_gt_sriov_printk.h"
>> #include "xe_guc_ct.h"
>> #include "xe_sriov.h"
>> +#include "xe_sriov_pf_control.h"
>> #include "xe_sriov_pf_service.h"
>> #include "xe_tile.h"
>>
>> @@ -170,6 +171,7 @@ static const char *control_bit_to_string(enum xe_gt_sriov_control_bits bit)
>> CASE2STR(FLR_SEND_START);
>> CASE2STR(FLR_WAIT_GUC);
>> CASE2STR(FLR_GUC_DONE);
>> + CASE2STR(FLR_SYNC);
>> CASE2STR(FLR_RESET_CONFIG);
>> CASE2STR(FLR_RESET_DATA);
>> CASE2STR(FLR_RESET_MMIO);
>> @@ -940,6 +942,10 @@ int xe_gt_sriov_pf_control_stop_vf(struct xe_gt *gt, unsigned int vfid)
>> * : v : | |
>> * : FLR_GUC_DONE : | |
>> * : | : | |
>> + * : | o--<--sync : | |
>> + * : |/ / : | |
>> + * : FLR_SYNC--o : | |
>> + * : | : | |
>> * : FLR_RESET_CONFIG---failed--->-----------o--------+-----------o
>> * : | : | |
>> * : FLR_RESET_DATA : | |
>> @@ -1147,12 +1153,38 @@ static bool pf_exit_vf_flr_send_start(struct xe_gt *gt, unsigned int vfid)
>> return true;
>> }
>>
>> +static bool pf_exit_vf_flr_sync(struct xe_gt *gt, unsigned int vfid)
>> +{
>> + if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC))
>> + return false;
>> +
>> + pf_enter_vf_flr_reset_config(gt, vfid);
>> + return true;
>> +}
>> +
>> +static void pf_enter_vf_flr_sync(struct xe_gt *gt, unsigned int vfid)
>> +{
>> + int ret;
>> +
>> + if (!pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC))
>> + pf_enter_vf_state_machine_bug(gt, vfid);
>> +
>> + ret = xe_sriov_pf_control_sync_flr(gt_to_xe(gt), vfid);
>> + if (ret < 0) {
>> + xe_gt_sriov_dbg_verbose(gt, "FLR checkpoint %pe\n", ERR_PTR(ret));
>> + pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC);
>> + } else {
>> + xe_gt_sriov_dbg_verbose(gt, "FLR checkpoint pass\n");
>> + pf_expect_vf_not_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC);
>> + }
>> +}
>> +
>> static bool pf_exit_vf_flr_guc_done(struct xe_gt *gt, unsigned int vfid)
>> {
>> if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_GUC_DONE))
>> return false;
>>
>> - pf_enter_vf_flr_reset_config(gt, vfid);
>> + pf_enter_vf_flr_sync(gt, vfid);
>> return true;
>> }
>>
>> @@ -1178,6 +1210,28 @@ int xe_gt_sriov_pf_control_trigger_flr(struct xe_gt *gt, unsigned int vfid)
>> return 0;
>> }
>>
>> +/**
>> + * xe_gt_sriov_pf_control_sync_flr() - Synchronize on the VF FLR checkpoint.
>> + * @gt: the &xe_gt
>> + * @vfid: the VF identifier
>> + * @sync: if true it will allow to exit the checkpoint
>> + *
>> + * Return: non-zero if FLR checkpoint has been reached, zero if the is no FLR
>> + * in progress, or a negative error code on the FLR busy or failed.
>> + */
>> +int xe_gt_sriov_pf_control_sync_flr(struct xe_gt *gt, unsigned int vfid, bool sync)
>> +{
>> + if (sync && pf_exit_vf_flr_sync(gt, vfid))
>> + return 1;
>> + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_SYNC))
>> + return 1;
>
> This looks a funny the return 1 / 0 / -errno pattern. The caller of this
> function only checks for -errno.
true, it's because what was included in this patch is a simplified version
of the caller, I had the other one that was also trying to verify that FLR
has indeed started, but finally dropped it as not critical for this series
>
> Matt
>
>> + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_WIP))
>> + return -EBUSY;
>> + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_FAILED))
>> + return -EIO;
>> + return 0;
>> +}
>> +
>> /**
>> * xe_gt_sriov_pf_control_wait_flr() - Wait for a VF FLR to complete.
>> * @gt: the &xe_gt
>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h
>> index fd256866f628..8a72ef3778d4 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h
>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h
>> @@ -18,6 +18,7 @@ int xe_gt_sriov_pf_control_pause_vf(struct xe_gt *gt, unsigned int vfid);
>> int xe_gt_sriov_pf_control_resume_vf(struct xe_gt *gt, unsigned int vfid);
>> int xe_gt_sriov_pf_control_stop_vf(struct xe_gt *gt, unsigned int vfid);
>> int xe_gt_sriov_pf_control_trigger_flr(struct xe_gt *gt, unsigned int vfid);
>> +int xe_gt_sriov_pf_control_sync_flr(struct xe_gt *gt, unsigned int vfid, bool sync);
>> int xe_gt_sriov_pf_control_wait_flr(struct xe_gt *gt, unsigned int vfid);
>>
>> #ifdef CONFIG_PCI_IOV
>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h
>> index f02f941b4ad2..c80b7e77f1ad 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h
>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h
>> @@ -18,6 +18,7 @@
>> * @XE_GT_SRIOV_STATE_FLR_SEND_START: indicates that the PF wants to send a FLR START command.
>> * @XE_GT_SRIOV_STATE_FLR_WAIT_GUC: indicates that the PF awaits for a response from the GuC.
>> * @XE_GT_SRIOV_STATE_FLR_GUC_DONE: indicates that the PF has received a response from the GuC.
>> + * @XE_GT_SRIOV_STATE_FLR_SYNC: indicates that the PF awaits to synchronize with other GuCs.
>> * @XE_GT_SRIOV_STATE_FLR_RESET_CONFIG: indicates that the PF needs to clear VF's resources.
>> * @XE_GT_SRIOV_STATE_FLR_RESET_DATA: indicates that the PF needs to clear VF's data.
>> * @XE_GT_SRIOV_STATE_FLR_RESET_MMIO: indicates that the PF needs to reset VF's registers.
>> @@ -47,6 +48,7 @@ enum xe_gt_sriov_control_bits {
>> XE_GT_SRIOV_STATE_FLR_SEND_START,
>> XE_GT_SRIOV_STATE_FLR_WAIT_GUC,
>> XE_GT_SRIOV_STATE_FLR_GUC_DONE,
>> + XE_GT_SRIOV_STATE_FLR_SYNC,
>> XE_GT_SRIOV_STATE_FLR_RESET_CONFIG,
>> XE_GT_SRIOV_STATE_FLR_RESET_DATA,
>> XE_GT_SRIOV_STATE_FLR_RESET_MMIO,
>> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.c b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
>> index e1c54a8feb07..416d00a03fbb 100644
>> --- a/drivers/gpu/drm/xe/xe_sriov_pf_control.c
>> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.c
>> @@ -120,3 +120,32 @@ int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid)
>>
>> return result;
>> }
>> +
>> +/**
>> + * xe_sriov_pf_control_sync_flr() - Synchronize a VF FLR between all GTs.
>> + * @xe: the &xe_device
>> + * @vfid: the VF identifier
>> + *
>> + * This function is for PF only.
>> + *
>> + * Return: 0 on success or a negative error code on failure.
>> + */
>> +int xe_sriov_pf_control_sync_flr(struct xe_device *xe, unsigned int vfid)
>> +{
>> + struct xe_gt *gt;
>> + unsigned int id;
>> + int ret;
>> +
>> + for_each_gt(gt, xe, id) {
>> + ret = xe_gt_sriov_pf_control_sync_flr(gt, vfid, false);
>> + if (ret < 0)
>> + return ret;
>> + }
>> + for_each_gt(gt, xe, id) {
>> + ret = xe_gt_sriov_pf_control_sync_flr(gt, vfid, true);
>> + if (ret < 0)
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.h b/drivers/gpu/drm/xe/xe_sriov_pf_control.h
>> index 9bf059f746d4..2d52d0ac1b28 100644
>> --- a/drivers/gpu/drm/xe/xe_sriov_pf_control.h
>> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.h
>> @@ -12,5 +12,6 @@ int xe_sriov_pf_control_pause_vf(struct xe_device *xe, unsigned int vfid);
>> int xe_sriov_pf_control_resume_vf(struct xe_device *xe, unsigned int vfid);
>> int xe_sriov_pf_control_stop_vf(struct xe_device *xe, unsigned int vfid);
>> int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid);
>> +int xe_sriov_pf_control_sync_flr(struct xe_device *xe, unsigned int vfid);
>>
>> #endif
>> --
>> 2.47.1
>>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 1/6] drm/xe/pf: Add top level functions to control VFs
2025-09-30 23:35 ` [PATCH 1/6] drm/xe/pf: Add top level functions to control VFs Michal Wajdeczko
2025-10-01 7:34 ` Matthew Brost
@ 2025-10-02 21:26 ` Michał Winiarski
1 sibling, 0 replies; 23+ messages in thread
From: Michał Winiarski @ 2025-10-02 21:26 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
On Wed, Oct 01, 2025 at 01:35:19AM +0200, Michal Wajdeczko wrote:
> We already have control functions that we use to control the VF
> state on the per-GT basis, but that is low level detail from the
> user point of view, who rather expects VF-level functions.
>
> For now add simple functions that just iterate over all GTs and
> call per-GT control function. We will soon allow to use some of
> them from the user facing interfaces like debugfs.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Thanks,
-Michał
> ---
> drivers/gpu/drm/xe/Makefile | 1 +
> drivers/gpu/drm/xe/xe_pci_sriov.c | 8 +-
> drivers/gpu/drm/xe/xe_sriov_pf_control.c | 104 +++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_sriov_pf_control.h | 16 ++++
> 4 files changed, 124 insertions(+), 5 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_sriov_pf_control.c
> create mode 100644 drivers/gpu/drm/xe/xe_sriov_pf_control.h
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 2/6] drm/xe/pf: Log only top level VF state changes
2025-09-30 23:35 ` [PATCH 2/6] drm/xe/pf: Log only top level VF state changes Michal Wajdeczko
@ 2025-10-02 21:33 ` Michał Winiarski
0 siblings, 0 replies; 23+ messages in thread
From: Michał Winiarski @ 2025-10-02 21:33 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
On Wed, Oct 01, 2025 at 01:35:20AM +0200, Michal Wajdeczko wrote:
> The user likely only care about top level VF state changes, any VF
> state logs on the per-GT basis can be demoted to the debug level.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Thanks,
-Michał
> ---
> drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 6 +++---
> drivers/gpu/drm/xe/xe_sriov_pf_control.c | 19 ++++++++++++++++---
> 2 files changed, 19 insertions(+), 6 deletions(-)
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 3/6] drm/xe/pf: Expose VF control operations over debugfs
2025-09-30 23:35 ` [PATCH 3/6] drm/xe/pf: Expose VF control operations over debugfs Michal Wajdeczko
2025-10-01 7:30 ` Matthew Brost
@ 2025-10-02 21:37 ` Michał Winiarski
1 sibling, 0 replies; 23+ messages in thread
From: Michał Winiarski @ 2025-10-02 21:37 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
On Wed, Oct 01, 2025 at 01:35:21AM +0200, Michal Wajdeczko wrote:
> To allow the user to control the activity of individual VFs,
> expose basic VF control operations (pause, resume, stop, reset)
> over the debugfs as write-only files:
>
> /sys/kernel/debug/dri/BDF/sriov/
> ├── vf1
> │ ├── pause
> │ ├── reset
> │ ├── resume
> │ ├── stop
> │ :
> ├── vf2
> : :
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Thanks,
-Michał
> ---
> drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c | 93 ++++++++++++++++++++++++
> 1 file changed, 93 insertions(+)
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 4/6] drm/xe/pf: Unify VF state tracking log
2025-09-30 23:35 ` [PATCH 4/6] drm/xe/pf: Unify VF state tracking log Michal Wajdeczko
@ 2025-10-02 21:46 ` Michał Winiarski
0 siblings, 0 replies; 23+ messages in thread
From: Michał Winiarski @ 2025-10-02 21:46 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
On Wed, Oct 01, 2025 at 01:35:22AM +0200, Michal Wajdeczko wrote:
> By using single function that dumps VF state transition, final
> logs are easier to analyze as there is always the same call site
> in every debug message.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Thanks,
-Michał
> ---
> drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 14 ++++++++++----
> 1 file changed, 10 insertions(+), 4 deletions(-)
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 5/6] drm/xe/pf: Split VF FLR processing function
2025-09-30 23:35 ` [PATCH 5/6] drm/xe/pf: Split VF FLR processing function Michal Wajdeczko
@ 2025-10-02 21:47 ` Michał Winiarski
0 siblings, 0 replies; 23+ messages in thread
From: Michał Winiarski @ 2025-10-02 21:47 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
On Wed, Oct 01, 2025 at 01:35:23AM +0200, Michal Wajdeczko wrote:
> On multi-GT platforms (like PTL) we may want to run VF FLR on each
> GuC (render and media) in parallel. Split our FLR function to allow
> to wait for GT VF FLR completion separately.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Thanks,
-Michał
> ---
> drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 26 ++++++++++++++++++---
> drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h | 1 +
> drivers/gpu/drm/xe/xe_sriov_pf_control.c | 5 ++++
> 3 files changed, 29 insertions(+), 3 deletions(-)
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 6/6] drm/xe/pf: Synchronize VF FLR between all GTs
2025-09-30 23:35 ` [PATCH 6/6] drm/xe/pf: Synchronize VF FLR between all GTs Michal Wajdeczko
2025-10-01 7:32 ` Matthew Brost
@ 2025-10-02 21:57 ` Michał Winiarski
1 sibling, 0 replies; 23+ messages in thread
From: Michał Winiarski @ 2025-10-02 21:57 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-xe
On Wed, Oct 01, 2025 at 01:35:24AM +0200, Michal Wajdeczko wrote:
> The PF part of the VF FLR processing shall be done after all GuCs
> confirm that they finished their part VF FLR processing, otherwise
> PF may start clearing VF's GGTT that other GuC may still accessing.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Thanks,
-Michał
> ---
> drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 56 ++++++++++++++++++-
> drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h | 1 +
> .../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 2 +
> drivers/gpu/drm/xe/xe_sriov_pf_control.c | 29 ++++++++++
> drivers/gpu/drm/xe/xe_sriov_pf_control.h | 1 +
> 5 files changed, 88 insertions(+), 1 deletion(-)
^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2025-10-02 21:57 UTC | newest]
Thread overview: 23+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-09-30 23:35 [PATCH 0/6] More PF improvements Michal Wajdeczko
2025-09-30 23:35 ` [PATCH 1/6] drm/xe/pf: Add top level functions to control VFs Michal Wajdeczko
2025-10-01 7:34 ` Matthew Brost
2025-10-01 8:03 ` Michal Wajdeczko
2025-10-02 21:26 ` Michał Winiarski
2025-09-30 23:35 ` [PATCH 2/6] drm/xe/pf: Log only top level VF state changes Michal Wajdeczko
2025-10-02 21:33 ` Michał Winiarski
2025-09-30 23:35 ` [PATCH 3/6] drm/xe/pf: Expose VF control operations over debugfs Michal Wajdeczko
2025-10-01 7:30 ` Matthew Brost
2025-10-01 8:21 ` Michal Wajdeczko
2025-10-02 21:37 ` Michał Winiarski
2025-09-30 23:35 ` [PATCH 4/6] drm/xe/pf: Unify VF state tracking log Michal Wajdeczko
2025-10-02 21:46 ` Michał Winiarski
2025-09-30 23:35 ` [PATCH 5/6] drm/xe/pf: Split VF FLR processing function Michal Wajdeczko
2025-10-02 21:47 ` Michał Winiarski
2025-09-30 23:35 ` [PATCH 6/6] drm/xe/pf: Synchronize VF FLR between all GTs Michal Wajdeczko
2025-10-01 7:32 ` Matthew Brost
2025-10-01 8:27 ` Michal Wajdeczko
2025-10-02 21:57 ` Michał Winiarski
2025-10-01 0:59 ` ✗ CI.checkpatch: warning for More PF improvements Patchwork
2025-10-01 1:00 ` ✓ CI.KUnit: success " Patchwork
2025-10-01 1:35 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-01 3:56 ` ✓ Xe.CI.Full: " Patchwork
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