* [PATCH v1] drm/i915/display: Add command line param for DC balance
@ 2026-08-28 8:50 Mitul Golani
2026-08-28 9:06 ` ✗ CI.checkpatch: warning for " Patchwork
` (6 more replies)
0 siblings, 7 replies; 10+ messages in thread
From: Mitul Golani @ 2026-08-28 8:50 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, ankit.k.nautiyal
Add a new module parameter 'enable_dc_balance' to allow enabling or
disabling the VRR DC balance feature at runtime. The DC balance
computation in intel_vrr_dc_balance_compute_config() now honours this
parameter, so the feature can be toggled without recompiling.
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_vrr.c | 4 +++-
3 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 2aed110c5b09..ed3aa84c5d43 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -120,6 +120,9 @@ intel_display_param_named_unsafe(enable_psr, int, 0400,
"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
"Default: -1 (use per-chip default)");
+intel_display_param_named_unsafe(enable_dc_balance, int, 0400,
+ "Enable DC Balance (0=disabled, 1=enable). Default: 1 (use per-chip default)");
+
intel_display_param_named_unsafe(enable_panel_replay, int, 0400,
"Enable Panel Replay (0=disabled, 1=enabled). Default: -1 (use per-chip default)");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index b95ecf728daa..8c28c27e2c46 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -46,6 +46,7 @@ struct drm_printer;
param(bool, enable_dp_mst, true, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
+ param(int, enable_dc_balance, false, 0600) \
param(int, enable_panel_replay, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
param(bool, enable_psr2_sel_fetch, true, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index e36db1174440..1698c54e258b 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -439,10 +439,12 @@ static bool intel_vrr_dc_balance_possible(const struct intel_crtc_state *crtc_st
static void
intel_vrr_dc_balance_compute_config(struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
int guardband_usec, adjustment_usec;
struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
- if (!intel_vrr_dc_balance_possible(crtc_state) || !crtc_state->vrr.enable)
+ if (!intel_vrr_dc_balance_possible(crtc_state) ||
+ !crtc_state->vrr.enable || !display->params.enable_dc_balance)
return;
crtc_state->vrr.dc_balance.vmax = crtc_state->vrr.vmax;
--
2.48.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* ✗ CI.checkpatch: warning for drm/i915/display: Add command line param for DC balance
2026-08-28 8:50 [PATCH v1] drm/i915/display: Add command line param for DC balance Mitul Golani
@ 2026-08-28 9:06 ` Patchwork
2026-08-28 9:07 ` [PATCH v1] " sashiko-bot
` (5 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-08-28 9:06 UTC (permalink / raw)
To: Mitul Golani; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Add command line param for DC balance
URL : https://patchwork.freedesktop.org/series/172945/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit f95435b7d41b8b31dfd5a759247c169f3e00ca56
Author: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Date: Fri Aug 28 14:20:36 2026 +0530
drm/i915/display: Add command line param for DC balance
Add a new module parameter 'enable_dc_balance' to allow enabling or
disabling the VRR DC balance feature at runtime. The DC balance
computation in intel_vrr_dc_balance_compute_config() now honours this
parameter, so the feature can be toggled without recompiling.
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
+ /mt/dim checkpatch 5901f93eb5a007e8b7c21ca2b5bfae5958467832 drm-intel
f95435b7d41b drm/i915/display: Add command line param for DC balance
-:22: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#22: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:124:
+intel_display_param_named_unsafe(enable_dc_balance, int, 0400,
+ "Enable DC Balance (0=disabled, 1=enable). Default: 1 (use per-chip default)");
total: 0 errors, 0 warnings, 1 checks, 29 lines checked
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1] drm/i915/display: Add command line param for DC balance
2026-08-28 8:50 [PATCH v1] drm/i915/display: Add command line param for DC balance Mitul Golani
2026-08-28 9:06 ` ✗ CI.checkpatch: warning for " Patchwork
@ 2026-08-28 9:07 ` sashiko-bot
2026-08-28 9:07 ` ✓ CI.KUnit: success for " Patchwork
` (4 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: sashiko-bot @ 2026-08-28 9:07 UTC (permalink / raw)
To: Mitul Golani; +Cc: intel-gfx, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The `enable_dc_balance` module parameter is initialized to `false` (0), unintentionally disabling the VRR DC balancing feature by default and contradicting the intended default behavior.
--
commit ce08e2bbe0ea201e24fac54e608cc7792b588403
Author: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
drm/i915/display: Add command line param for DC balance
This commit adds a new module parameter enable_dc_balance to allow enabling
or disabling the VRR DC balance feature at runtime. The DC balance
computation in intel_vrr_dc_balance_compute_config() is updated to honor
this parameter.
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 2aed110c5b090..ed3aa84c5d43d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -120,6 +120,9 @@ intel_display_param_named_unsafe(enable_psr, int, 0400,
[ ... ]
> +intel_display_param_named_unsafe(enable_dc_balance, int, 0400,
> + "Enable DC Balance (0=disabled, 1=enable). Default: 1 (use per-chip default)");
[Severity: Medium]
The parameter documentation in intel_display_param_named_unsafe() states
that the default value is 1, but the underlying parameter definition sets
it to false.
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index b95ecf728daab..8c28c27e2c46c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -46,6 +46,7 @@ struct drm_printer;
[ ... ]
> param(int, enable_psr, -1, 0600) \
> + param(int, enable_dc_balance, false, 0600) \
[Severity: Medium]
Does this unintentionally disable the VRR DC balance feature by default?
The macro initializes enable_dc_balance to false (0), contradicting the
intended default documented above.
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 51e4f3309b8b1..cfc0cfbff017a 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -386,10 +386,12 @@ static bool intel_vrr_dc_balance_possible(const struct intel_crtc_state *crtc_st
> static void
> intel_vrr_dc_balance_compute_config(struct intel_crtc_state *crtc_state)
> {
[ ... ]
> - if (!intel_vrr_dc_balance_possible(crtc_state) || !crtc_state->vrr.enable)
> + if (!intel_vrr_dc_balance_possible(crtc_state) ||
> + !crtc_state->vrr.enable || !display->params.enable_dc_balance)
> return;
[Severity: Medium]
Because the parameter defaults to 0, !display->params.enable_dc_balance
evaluates to true here. Can this cause intel_vrr_dc_balance_compute_config()
to silently bail out early, disabling the feature by default on all
configurations?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260828085037.1430881-1-mitulkumar.ajitkumar.golani@intel.com?part=1
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ CI.KUnit: success for drm/i915/display: Add command line param for DC balance
2026-08-28 8:50 [PATCH v1] drm/i915/display: Add command line param for DC balance Mitul Golani
2026-08-28 9:06 ` ✗ CI.checkpatch: warning for " Patchwork
2026-08-28 9:07 ` [PATCH v1] " sashiko-bot
@ 2026-08-28 9:07 ` Patchwork
2026-08-28 9:46 ` ✓ Xe.CI.BAT: " Patchwork
` (3 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-08-28 9:07 UTC (permalink / raw)
To: Mitul Golani; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Add command line param for DC balance
URL : https://patchwork.freedesktop.org/series/172945/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[09:06:18] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:06:22] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:06:54] Starting KUnit Kernel (1/1)...
[09:06:54] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:06:55] ================== guc_buf (11 subtests) ===================
[09:06:55] [PASSED] test_smallest
[09:06:55] [PASSED] test_largest
[09:06:55] [PASSED] test_granular
[09:06:55] [PASSED] test_unique
[09:06:55] [PASSED] test_overlap
[09:06:55] [PASSED] test_reusable
[09:06:55] [PASSED] test_too_big
[09:06:55] [PASSED] test_flush
[09:06:55] [PASSED] test_lookup
[09:06:55] [PASSED] test_data
[09:06:55] [PASSED] test_class
[09:06:55] ===================== [PASSED] guc_buf =====================
[09:06:55] =================== guc_dbm (7 subtests) ===================
[09:06:55] [PASSED] test_empty
[09:06:55] [PASSED] test_default
[09:06:55] ======================== test_size ========================
[09:06:55] [PASSED] 4
[09:06:55] [PASSED] 8
[09:06:55] [PASSED] 32
[09:06:55] [PASSED] 256
[09:06:55] ==================== [PASSED] test_size ====================
[09:06:55] ======================= test_reuse ========================
[09:06:55] [PASSED] 4
[09:06:55] [PASSED] 8
[09:06:55] [PASSED] 32
[09:06:55] [PASSED] 256
[09:06:55] =================== [PASSED] test_reuse ====================
[09:06:55] =================== test_range_overlap ====================
[09:06:55] [PASSED] 4
[09:06:55] [PASSED] 8
[09:06:55] [PASSED] 32
[09:06:55] [PASSED] 256
[09:06:55] =============== [PASSED] test_range_overlap ================
[09:06:55] =================== test_range_compact ====================
[09:06:55] [PASSED] 4
[09:06:55] [PASSED] 8
[09:06:55] [PASSED] 32
[09:06:55] [PASSED] 256
[09:06:55] =============== [PASSED] test_range_compact ================
[09:06:55] ==================== test_range_spare =====================
[09:06:55] [PASSED] 4
[09:06:55] [PASSED] 8
[09:06:55] [PASSED] 32
[09:06:55] [PASSED] 256
[09:06:55] ================ [PASSED] test_range_spare =================
[09:06:55] ===================== [PASSED] guc_dbm =====================
[09:06:55] =================== guc_idm (6 subtests) ===================
[09:06:55] [PASSED] bad_init
[09:06:55] [PASSED] no_init
[09:06:55] [PASSED] init_fini
[09:06:55] [PASSED] check_used
[09:06:55] [PASSED] check_quota
[09:06:55] [PASSED] check_all
[09:06:55] ===================== [PASSED] guc_idm =====================
[09:06:55] =============== guc_klv_helpers (9 subtests) ===============
[09:06:55] [PASSED] test_count
[09:06:55] [PASSED] test_encode_u32
[09:06:55] [PASSED] test_encode_u64
[09:06:55] [PASSED] test_encode_string
[09:06:55] [PASSED] test_encode_object_raw
[09:06:55] [PASSED] test_encode_object_klv
[09:06:55] [PASSED] test_encode_object_nested
[09:06:55] [PASSED] test_encode_object_basic
[09:06:55] [PASSED] test_print
[09:06:55] ================= [PASSED] guc_klv_helpers =================
[09:06:55] =================== xe_log (4 subtests) ====================
[09:06:55] [PASSED] demo_cper
[09:06:55] [PASSED] demo_dmesg
[09:06:55] ======================= test_dmesg ========================
[09:06:55] [PASSED] test_fatal
[09:06:55] [PASSED] test_fatal_tile
[09:06:55] [PASSED] test_fatal_gt
[09:06:55] [PASSED] test_fatal_comp
[09:06:55] [PASSED] test_fatal_comp_tile
[09:06:55] [PASSED] test_fatal_comp_gt
[09:06:55] [PASSED] test_fatal_all
[09:06:55] [PASSED] test_recoverable
[09:06:55] [PASSED] test_recoverable_tile
[09:06:55] [PASSED] test_recoverable_gt
[09:06:55] [PASSED] test_recoverable_comp
[09:06:55] [PASSED] test_recoverable_comp_tile
[09:06:55] [PASSED] test_recoverable_comp_gt
[09:06:55] [PASSED] test_recoverable_all
[09:06:55] [PASSED] test_info
[09:06:55] [PASSED] test_info_tile
[09:06:55] [PASSED] test_info_gt
[09:06:55] [PASSED] test_info_err
[09:06:55] [PASSED] test_info_comp
[09:06:55] [PASSED] test_info_comp_tile
[09:06:55] [PASSED] test_info_comp_gt
[09:06:55] [PASSED] test_info_all
[09:06:55] [PASSED] test_hw_fatal
[09:06:55] [PASSED] test_hw_recoverable
[09:06:55] [PASSED] test_hw_corrected
[09:06:55] [PASSED] test_hw_informational
[09:06:55] =================== [PASSED] test_dmesg ====================
[09:06:55] ====================== test_invalid =======================
[09:06:55] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[09:06:55] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[09:06:55] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[09:06:55] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[09:06:55] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[09:06:55] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[09:06:55] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[09:06:55] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[09:06:55] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[09:06:55] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[09:06:55] ================== [SKIPPED] test_invalid ==================
[09:06:55] ===================== [PASSED] xe_log ======================
[09:06:55] ================== no_relay (3 subtests) ===================
[09:06:55] [PASSED] xe_drops_guc2pf_if_not_ready
[09:06:55] [PASSED] xe_drops_guc2vf_if_not_ready
[09:06:55] [PASSED] xe_rejects_send_if_not_ready
[09:06:55] ==================== [PASSED] no_relay =====================
[09:06:55] ================== pf_relay (14 subtests) ==================
[09:06:55] [PASSED] pf_rejects_guc2pf_too_short
[09:06:55] [PASSED] pf_rejects_guc2pf_too_long
[09:06:55] [PASSED] pf_rejects_guc2pf_no_payload
[09:06:55] [PASSED] pf_fails_no_payload
[09:06:55] [PASSED] pf_fails_bad_origin
[09:06:55] [PASSED] pf_fails_bad_type
[09:06:55] [PASSED] pf_txn_reports_error
[09:06:55] [PASSED] pf_txn_sends_pf2guc
[09:06:55] [PASSED] pf_sends_pf2guc
[09:06:55] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:06:55] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:06:55] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:06:55] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:06:55] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:06:55] ==================== [PASSED] pf_relay =====================
[09:06:55] ================== vf_relay (3 subtests) ===================
[09:06:55] [PASSED] vf_rejects_guc2vf_too_short
[09:06:55] [PASSED] vf_rejects_guc2vf_too_long
[09:06:55] [PASSED] vf_rejects_guc2vf_no_payload
[09:06:55] ==================== [PASSED] vf_relay =====================
[09:06:55] ================ pf_gt_config (9 subtests) =================
[09:06:55] [PASSED] fair_contexts_1vf
[09:06:55] [PASSED] fair_doorbells_1vf
[09:06:55] [PASSED] fair_ggtt_1vf
[09:06:55] ====================== fair_vram_1vf ======================
[09:06:55] [PASSED] 3.50 GiB
[09:06:55] [PASSED] 11.5 GiB
[09:06:55] [PASSED] 15.5 GiB
[09:06:55] [PASSED] 31.5 GiB
[09:06:55] [PASSED] 63.5 GiB
[09:06:55] [PASSED] 1.91 GiB
[09:06:55] ================== [PASSED] fair_vram_1vf ==================
[09:06:55] ================ fair_vram_1vf_admin_only =================
[09:06:55] [PASSED] 3.50 GiB
[09:06:55] [PASSED] 11.5 GiB
[09:06:55] [PASSED] 15.5 GiB
[09:06:55] [PASSED] 31.5 GiB
[09:06:55] [PASSED] 63.5 GiB
[09:06:55] [PASSED] 1.91 GiB
[09:06:55] ============ [PASSED] fair_vram_1vf_admin_only =============
[09:06:55] ====================== fair_contexts ======================
[09:06:55] [PASSED] 1 VF
[09:06:55] [PASSED] 2 VFs
[09:06:55] [PASSED] 3 VFs
[09:06:55] [PASSED] 4 VFs
[09:06:55] [PASSED] 5 VFs
[09:06:55] [PASSED] 6 VFs
[09:06:55] [PASSED] 7 VFs
[09:06:55] [PASSED] 8 VFs
[09:06:55] [PASSED] 9 VFs
[09:06:55] [PASSED] 10 VFs
[09:06:55] [PASSED] 11 VFs
[09:06:55] [PASSED] 12 VFs
[09:06:55] [PASSED] 13 VFs
[09:06:55] [PASSED] 14 VFs
[09:06:55] [PASSED] 15 VFs
[09:06:55] [PASSED] 16 VFs
[09:06:55] [PASSED] 17 VFs
[09:06:55] [PASSED] 18 VFs
[09:06:55] [PASSED] 19 VFs
[09:06:55] [PASSED] 20 VFs
[09:06:55] [PASSED] 21 VFs
[09:06:55] [PASSED] 22 VFs
[09:06:55] [PASSED] 23 VFs
[09:06:55] [PASSED] 24 VFs
[09:06:55] [PASSED] 25 VFs
[09:06:55] [PASSED] 26 VFs
[09:06:55] [PASSED] 27 VFs
[09:06:55] [PASSED] 28 VFs
[09:06:55] [PASSED] 29 VFs
[09:06:55] [PASSED] 30 VFs
[09:06:55] [PASSED] 31 VFs
[09:06:55] [PASSED] 32 VFs
[09:06:55] [PASSED] 33 VFs
[09:06:55] [PASSED] 34 VFs
[09:06:55] [PASSED] 35 VFs
[09:06:55] [PASSED] 36 VFs
[09:06:55] [PASSED] 37 VFs
[09:06:55] [PASSED] 38 VFs
[09:06:55] [PASSED] 39 VFs
[09:06:55] [PASSED] 40 VFs
[09:06:55] [PASSED] 41 VFs
[09:06:55] [PASSED] 42 VFs
[09:06:55] [PASSED] 43 VFs
[09:06:55] [PASSED] 44 VFs
[09:06:55] [PASSED] 45 VFs
[09:06:55] [PASSED] 46 VFs
[09:06:55] [PASSED] 47 VFs
[09:06:55] [PASSED] 48 VFs
[09:06:55] [PASSED] 49 VFs
[09:06:55] [PASSED] 50 VFs
[09:06:55] [PASSED] 51 VFs
[09:06:55] [PASSED] 52 VFs
[09:06:55] [PASSED] 53 VFs
[09:06:55] [PASSED] 54 VFs
[09:06:55] [PASSED] 55 VFs
[09:06:55] [PASSED] 56 VFs
[09:06:55] [PASSED] 57 VFs
[09:06:55] [PASSED] 58 VFs
[09:06:55] [PASSED] 59 VFs
[09:06:55] [PASSED] 60 VFs
[09:06:55] [PASSED] 61 VFs
[09:06:55] [PASSED] 62 VFs
[09:06:55] [PASSED] 63 VFs
[09:06:55] ================== [PASSED] fair_contexts ==================
[09:06:55] ===================== fair_doorbells ======================
[09:06:55] [PASSED] 1 VF
[09:06:55] [PASSED] 2 VFs
[09:06:55] [PASSED] 3 VFs
[09:06:55] [PASSED] 4 VFs
[09:06:55] [PASSED] 5 VFs
[09:06:55] [PASSED] 6 VFs
[09:06:55] [PASSED] 7 VFs
[09:06:55] [PASSED] 8 VFs
[09:06:55] [PASSED] 9 VFs
[09:06:55] [PASSED] 10 VFs
[09:06:55] [PASSED] 11 VFs
[09:06:55] [PASSED] 12 VFs
[09:06:55] [PASSED] 13 VFs
[09:06:55] [PASSED] 14 VFs
[09:06:55] [PASSED] 15 VFs
[09:06:55] [PASSED] 16 VFs
[09:06:55] [PASSED] 17 VFs
[09:06:55] [PASSED] 18 VFs
[09:06:55] [PASSED] 19 VFs
[09:06:55] [PASSED] 20 VFs
[09:06:55] [PASSED] 21 VFs
[09:06:55] [PASSED] 22 VFs
[09:06:55] [PASSED] 23 VFs
[09:06:55] [PASSED] 24 VFs
[09:06:55] [PASSED] 25 VFs
[09:06:55] [PASSED] 26 VFs
[09:06:55] [PASSED] 27 VFs
[09:06:55] [PASSED] 28 VFs
[09:06:55] [PASSED] 29 VFs
[09:06:55] [PASSED] 30 VFs
[09:06:55] [PASSED] 31 VFs
[09:06:55] [PASSED] 32 VFs
[09:06:55] [PASSED] 33 VFs
[09:06:55] [PASSED] 34 VFs
[09:06:55] [PASSED] 35 VFs
[09:06:55] [PASSED] 36 VFs
[09:06:55] [PASSED] 37 VFs
[09:06:55] [PASSED] 38 VFs
[09:06:55] [PASSED] 39 VFs
[09:06:55] [PASSED] 40 VFs
[09:06:55] [PASSED] 41 VFs
[09:06:55] [PASSED] 42 VFs
[09:06:55] [PASSED] 43 VFs
[09:06:55] [PASSED] 44 VFs
[09:06:55] [PASSED] 45 VFs
[09:06:55] [PASSED] 46 VFs
[09:06:55] [PASSED] 47 VFs
[09:06:55] [PASSED] 48 VFs
[09:06:55] [PASSED] 49 VFs
[09:06:55] [PASSED] 50 VFs
[09:06:55] [PASSED] 51 VFs
[09:06:55] [PASSED] 52 VFs
[09:06:55] [PASSED] 53 VFs
[09:06:55] [PASSED] 54 VFs
[09:06:55] [PASSED] 55 VFs
[09:06:55] [PASSED] 56 VFs
[09:06:55] [PASSED] 57 VFs
[09:06:55] [PASSED] 58 VFs
[09:06:55] [PASSED] 59 VFs
[09:06:55] [PASSED] 60 VFs
[09:06:55] [PASSED] 61 VFs
[09:06:55] [PASSED] 62 VFs
[09:06:55] [PASSED] 63 VFs
[09:06:55] ================= [PASSED] fair_doorbells ==================
[09:06:55] ======================== fair_ggtt ========================
[09:06:55] [PASSED] 1 VF
[09:06:55] [PASSED] 2 VFs
[09:06:55] [PASSED] 3 VFs
[09:06:55] [PASSED] 4 VFs
[09:06:55] [PASSED] 5 VFs
[09:06:55] [PASSED] 6 VFs
[09:06:55] [PASSED] 7 VFs
[09:06:55] [PASSED] 8 VFs
[09:06:55] [PASSED] 9 VFs
[09:06:55] [PASSED] 10 VFs
[09:06:55] [PASSED] 11 VFs
[09:06:55] [PASSED] 12 VFs
[09:06:55] [PASSED] 13 VFs
[09:06:55] [PASSED] 14 VFs
[09:06:55] [PASSED] 15 VFs
[09:06:55] [PASSED] 16 VFs
[09:06:55] [PASSED] 17 VFs
[09:06:55] [PASSED] 18 VFs
[09:06:55] [PASSED] 19 VFs
[09:06:55] [PASSED] 20 VFs
[09:06:55] [PASSED] 21 VFs
[09:06:55] [PASSED] 22 VFs
[09:06:55] [PASSED] 23 VFs
[09:06:55] [PASSED] 24 VFs
[09:06:55] [PASSED] 25 VFs
[09:06:55] [PASSED] 26 VFs
[09:06:55] [PASSED] 27 VFs
[09:06:55] [PASSED] 28 VFs
[09:06:55] [PASSED] 29 VFs
[09:06:55] [PASSED] 30 VFs
[09:06:55] [PASSED] 31 VFs
[09:06:55] [PASSED] 32 VFs
[09:06:55] [PASSED] 33 VFs
[09:06:55] [PASSED] 34 VFs
[09:06:55] [PASSED] 35 VFs
[09:06:55] [PASSED] 36 VFs
[09:06:55] [PASSED] 37 VFs
[09:06:55] [PASSED] 38 VFs
[09:06:55] [PASSED] 39 VFs
[09:06:55] [PASSED] 40 VFs
[09:06:55] [PASSED] 41 VFs
[09:06:55] [PASSED] 42 VFs
[09:06:55] [PASSED] 43 VFs
[09:06:55] [PASSED] 44 VFs
[09:06:55] [PASSED] 45 VFs
[09:06:55] [PASSED] 46 VFs
[09:06:55] [PASSED] 47 VFs
[09:06:55] [PASSED] 48 VFs
[09:06:55] [PASSED] 49 VFs
[09:06:55] [PASSED] 50 VFs
[09:06:55] [PASSED] 51 VFs
[09:06:55] [PASSED] 52 VFs
[09:06:55] [PASSED] 53 VFs
[09:06:55] [PASSED] 54 VFs
[09:06:55] [PASSED] 55 VFs
[09:06:55] [PASSED] 56 VFs
[09:06:55] [PASSED] 57 VFs
[09:06:55] [PASSED] 58 VFs
[09:06:55] [PASSED] 59 VFs
[09:06:55] [PASSED] 60 VFs
[09:06:55] [PASSED] 61 VFs
[09:06:55] [PASSED] 62 VFs
[09:06:55] [PASSED] 63 VFs
[09:06:55] ==================== [PASSED] fair_ggtt ====================
[09:06:55] ======================== fair_vram ========================
[09:06:55] [PASSED] 1 VF
[09:06:55] [PASSED] 2 VFs
[09:06:55] [PASSED] 3 VFs
[09:06:55] [PASSED] 4 VFs
[09:06:55] [PASSED] 5 VFs
[09:06:55] [PASSED] 6 VFs
[09:06:55] [PASSED] 7 VFs
[09:06:55] [PASSED] 8 VFs
[09:06:55] [PASSED] 9 VFs
[09:06:55] [PASSED] 10 VFs
[09:06:55] [PASSED] 11 VFs
[09:06:55] [PASSED] 12 VFs
[09:06:55] [PASSED] 13 VFs
[09:06:55] [PASSED] 14 VFs
[09:06:55] [PASSED] 15 VFs
[09:06:55] [PASSED] 16 VFs
[09:06:55] [PASSED] 17 VFs
[09:06:55] [PASSED] 18 VFs
[09:06:55] [PASSED] 19 VFs
[09:06:55] [PASSED] 20 VFs
[09:06:55] [PASSED] 21 VFs
[09:06:55] [PASSED] 22 VFs
[09:06:55] [PASSED] 23 VFs
[09:06:55] [PASSED] 24 VFs
[09:06:55] [PASSED] 25 VFs
[09:06:55] [PASSED] 26 VFs
[09:06:55] [PASSED] 27 VFs
[09:06:55] [PASSED] 28 VFs
[09:06:55] [PASSED] 29 VFs
[09:06:55] [PASSED] 30 VFs
[09:06:55] [PASSED] 31 VFs
[09:06:55] [PASSED] 32 VFs
[09:06:55] [PASSED] 33 VFs
[09:06:55] [PASSED] 34 VFs
[09:06:55] [PASSED] 35 VFs
[09:06:55] [PASSED] 36 VFs
[09:06:55] [PASSED] 37 VFs
[09:06:55] [PASSED] 38 VFs
[09:06:55] [PASSED] 39 VFs
[09:06:55] [PASSED] 40 VFs
[09:06:55] [PASSED] 41 VFs
[09:06:55] [PASSED] 42 VFs
[09:06:55] [PASSED] 43 VFs
[09:06:55] [PASSED] 44 VFs
[09:06:55] [PASSED] 45 VFs
[09:06:55] [PASSED] 46 VFs
[09:06:55] [PASSED] 47 VFs
[09:06:55] [PASSED] 48 VFs
[09:06:55] [PASSED] 49 VFs
[09:06:55] [PASSED] 50 VFs
[09:06:55] [PASSED] 51 VFs
[09:06:55] [PASSED] 52 VFs
[09:06:55] [PASSED] 53 VFs
[09:06:55] [PASSED] 54 VFs
[09:06:55] [PASSED] 55 VFs
[09:06:55] [PASSED] 56 VFs
[09:06:55] [PASSED] 57 VFs
[09:06:55] [PASSED] 58 VFs
[09:06:55] [PASSED] 59 VFs
[09:06:55] [PASSED] 60 VFs
[09:06:55] [PASSED] 61 VFs
[09:06:55] [PASSED] 62 VFs
[09:06:55] [PASSED] 63 VFs
[09:06:55] ==================== [PASSED] fair_vram ====================
[09:06:55] ================== [PASSED] pf_gt_config ===================
[09:06:55] ===================== lmtt (1 subtest) =====================
[09:06:55] ======================== test_ops =========================
[09:06:55] [PASSED] 2-level
[09:06:55] [PASSED] multi-level
[09:06:55] ==================== [PASSED] test_ops =====================
[09:06:55] ====================== [PASSED] lmtt =======================
[09:06:55] ================= sriov_packet (1 subtest) =================
[09:06:55] [PASSED] test_descriptor_init
[09:06:55] ================== [PASSED] sriov_packet ===================
[09:06:55] ================= pf_service (11 subtests) =================
[09:06:55] [PASSED] pf_negotiate_any
[09:06:55] [PASSED] pf_negotiate_base_match
[09:06:55] [PASSED] pf_negotiate_base_newer
[09:06:55] [PASSED] pf_negotiate_base_next
[09:06:55] [SKIPPED] pf_negotiate_base_older (no older minor)
[09:06:55] [PASSED] pf_negotiate_base_prev
[09:06:55] [PASSED] pf_negotiate_latest_match
[09:06:55] [PASSED] pf_negotiate_latest_newer
[09:06:55] [PASSED] pf_negotiate_latest_next
[09:06:55] [SKIPPED] pf_negotiate_latest_older (no older minor)
[09:06:55] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[09:06:55] =================== [PASSED] pf_service ====================
[09:06:55] ================= xe_guc_g2g (2 subtests) ==================
[09:06:55] ============== xe_live_guc_g2g_kunit_default ==============
[09:06:55] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[09:06:55] ============== xe_live_guc_g2g_kunit_allmem ===============
[09:06:55] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[09:06:55] =================== [SKIPPED] xe_guc_g2g ===================
[09:06:55] =================== xe_mocs (2 subtests) ===================
[09:06:55] ================ xe_live_mocs_kernel_kunit ================
[09:06:55] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[09:06:55] ================ xe_live_mocs_reset_kunit =================
[09:06:55] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[09:06:55] ==================== [SKIPPED] xe_mocs =====================
[09:06:55] ================= xe_migrate (2 subtests) ==================
[09:06:55] ================= xe_migrate_sanity_kunit =================
[09:06:55] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[09:06:55] ================== xe_validate_ccs_kunit ==================
[09:06:55] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[09:06:55] =================== [SKIPPED] xe_migrate ===================
[09:06:55] ================== xe_dma_buf (1 subtest) ==================
[09:06:55] ==================== xe_dma_buf_kunit =====================
[09:06:55] ================ [SKIPPED] xe_dma_buf_kunit ================
[09:06:55] =================== [SKIPPED] xe_dma_buf ===================
[09:06:55] ================= xe_bo_shrink (1 subtest) =================
[09:06:55] =================== xe_bo_shrink_kunit ====================
[09:06:55] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[09:06:55] ================== [SKIPPED] xe_bo_shrink ==================
[09:06:55] ==================== xe_bo (2 subtests) ====================
[09:06:55] ================== xe_ccs_migrate_kunit ===================
[09:06:55] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[09:06:55] ==================== xe_bo_evict_kunit ====================
[09:06:55] =============== [SKIPPED] xe_bo_evict_kunit ================
[09:06:55] ===================== [SKIPPED] xe_bo ======================
[09:06:55] =================== xe_any (9 subtests) ====================
[09:06:55] [PASSED] test_to_xe
[09:06:55] [PASSED] test_to_dev
[09:06:55] [PASSED] test_to_pdev
[09:06:55] [PASSED] test_to_drm
[09:06:55] [PASSED] test_if_pdev
[09:06:55] [PASSED] test_if_xe
[09:06:55] [PASSED] test_if_tile
[09:06:55] [PASSED] test_if_gt
[09:06:55] [PASSED] test_to_id
[09:06:55] ===================== [PASSED] xe_any ======================
[09:06:55] ==================== args (13 subtests) ====================
[09:06:55] [PASSED] count_args_test
[09:06:55] [PASSED] call_args_example
[09:06:55] [PASSED] call_args_test
[09:06:55] [PASSED] drop_first_arg_example
[09:06:55] [PASSED] drop_first_arg_test
[09:06:55] [PASSED] first_arg_example
[09:06:55] [PASSED] first_arg_test
[09:06:55] [PASSED] last_arg_example
[09:06:55] [PASSED] last_arg_test
[09:06:55] [PASSED] pick_arg_example
[09:06:55] [PASSED] if_args_example
[09:06:55] [PASSED] if_args_test
[09:06:55] [PASSED] sep_comma_example
[09:06:55] ====================== [PASSED] args =======================
[09:06:55] =================== xe_pci (3 subtests) ====================
[09:06:55] ==================== check_graphics_ip ====================
[09:06:55] [PASSED] 12.00 Xe_LP
[09:06:55] [PASSED] 12.10 Xe_LP+
[09:06:55] [PASSED] 12.55 Xe_HPG
[09:06:55] [PASSED] 12.60 Xe_HPC
[09:06:55] [PASSED] 12.70 Xe_LPG
[09:06:55] [PASSED] 12.71 Xe_LPG
[09:06:55] [PASSED] 12.74 Xe_LPG+
[09:06:55] [PASSED] 20.01 Xe2_HPG
[09:06:55] [PASSED] 20.02 Xe2_HPG
[09:06:55] [PASSED] 20.04 Xe2_LPG
[09:06:55] [PASSED] 30.00 Xe3_LPG
[09:06:55] [PASSED] 30.01 Xe3_LPG
[09:06:55] [PASSED] 30.03 Xe3_LPG
[09:06:55] [PASSED] 30.04 Xe3_LPG
[09:06:55] [PASSED] 30.05 Xe3_LPG
[09:06:55] [PASSED] 35.10 Xe3p_LPG
[09:06:55] [PASSED] 35.11 Xe3p_XPC
[09:06:55] ================ [PASSED] check_graphics_ip ================
[09:06:55] ===================== check_media_ip ======================
[09:06:55] [PASSED] 12.00 Xe_M
[09:06:55] [PASSED] 12.55 Xe_HPM
[09:06:55] [PASSED] 13.00 Xe_LPM+
[09:06:55] [PASSED] 13.01 Xe2_HPM
[09:06:55] [PASSED] 20.00 Xe2_LPM
[09:06:55] [PASSED] 30.00 Xe3_LPM
[09:06:55] [PASSED] 30.02 Xe3_LPM
[09:06:55] [PASSED] 35.00 Xe3p_LPM
[09:06:55] [PASSED] 35.03 Xe3p_HPM
[09:06:55] ================= [PASSED] check_media_ip ==================
[09:06:55] =================== check_platform_desc ===================
[09:06:55] [PASSED] 0x9A60 (TIGERLAKE)
[09:06:55] [PASSED] 0x9A68 (TIGERLAKE)
[09:06:55] [PASSED] 0x9A70 (TIGERLAKE)
[09:06:55] [PASSED] 0x9A40 (TIGERLAKE)
[09:06:55] [PASSED] 0x9A49 (TIGERLAKE)
[09:06:55] [PASSED] 0x9A59 (TIGERLAKE)
[09:06:55] [PASSED] 0x9A78 (TIGERLAKE)
[09:06:55] [PASSED] 0x9AC0 (TIGERLAKE)
[09:06:55] [PASSED] 0x9AC9 (TIGERLAKE)
[09:06:55] [PASSED] 0x9AD9 (TIGERLAKE)
[09:06:55] [PASSED] 0x9AF8 (TIGERLAKE)
[09:06:55] [PASSED] 0x4C80 (ROCKETLAKE)
[09:06:55] [PASSED] 0x4C8A (ROCKETLAKE)
[09:06:55] [PASSED] 0x4C8B (ROCKETLAKE)
[09:06:55] [PASSED] 0x4C8C (ROCKETLAKE)
[09:06:55] [PASSED] 0x4C90 (ROCKETLAKE)
[09:06:55] [PASSED] 0x4C9A (ROCKETLAKE)
[09:06:55] [PASSED] 0x4680 (ALDERLAKE_S)
[09:06:55] [PASSED] 0x4682 (ALDERLAKE_S)
[09:06:55] [PASSED] 0x4688 (ALDERLAKE_S)
[09:06:55] [PASSED] 0x468A (ALDERLAKE_S)
[09:06:55] [PASSED] 0x468B (ALDERLAKE_S)
[09:06:55] [PASSED] 0x4690 (ALDERLAKE_S)
[09:06:55] [PASSED] 0x4692 (ALDERLAKE_S)
[09:06:55] [PASSED] 0x4693 (ALDERLAKE_S)
[09:06:55] [PASSED] 0x46A0 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46A1 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46A2 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46A3 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46A6 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46A8 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46AA (ALDERLAKE_P)
[09:06:55] [PASSED] 0x462A (ALDERLAKE_P)
[09:06:55] [PASSED] 0x4626 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x4628 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46B0 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46B1 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46B2 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46B3 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46C0 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46C1 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46C2 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46C3 (ALDERLAKE_P)
[09:06:55] [PASSED] 0x46D0 (ALDERLAKE_N)
[09:06:55] [PASSED] 0x46D1 (ALDERLAKE_N)
[09:06:55] [PASSED] 0x46D2 (ALDERLAKE_N)
[09:06:55] [PASSED] 0x46D3 (ALDERLAKE_N)
[09:06:55] [PASSED] 0x46D4 (ALDERLAKE_N)
[09:06:55] [PASSED] 0xA721 (ALDERLAKE_P)
[09:06:55] [PASSED] 0xA7A1 (ALDERLAKE_P)
[09:06:55] [PASSED] 0xA7A9 (ALDERLAKE_P)
[09:06:55] [PASSED] 0xA7AC (ALDERLAKE_P)
[09:06:55] [PASSED] 0xA7AD (ALDERLAKE_P)
[09:06:55] [PASSED] 0xA720 (ALDERLAKE_P)
[09:06:55] [PASSED] 0xA7A0 (ALDERLAKE_P)
[09:06:55] [PASSED] 0xA7A8 (ALDERLAKE_P)
[09:06:55] [PASSED] 0xA7AA (ALDERLAKE_P)
[09:06:55] [PASSED] 0xA7AB (ALDERLAKE_P)
[09:06:55] [PASSED] 0xA780 (ALDERLAKE_S)
[09:06:55] [PASSED] 0xA781 (ALDERLAKE_S)
[09:06:55] [PASSED] 0xA782 (ALDERLAKE_S)
[09:06:55] [PASSED] 0xA783 (ALDERLAKE_S)
[09:06:55] [PASSED] 0xA788 (ALDERLAKE_S)
[09:06:55] [PASSED] 0xA789 (ALDERLAKE_S)
[09:06:55] [PASSED] 0xA78A (ALDERLAKE_S)
[09:06:55] [PASSED] 0xA78B (ALDERLAKE_S)
[09:06:55] [PASSED] 0x4905 (DG1)
[09:06:55] [PASSED] 0x4906 (DG1)
[09:06:55] [PASSED] 0x4907 (DG1)
[09:06:55] [PASSED] 0x4908 (DG1)
[09:06:55] [PASSED] 0x4909 (DG1)
[09:06:55] [PASSED] 0x56C0 (DG2)
[09:06:55] [PASSED] 0x56C2 (DG2)
[09:06:55] [PASSED] 0x56C1 (DG2)
[09:06:55] [PASSED] 0x7D51 (METEORLAKE)
[09:06:55] [PASSED] 0x7DD1 (METEORLAKE)
[09:06:55] [PASSED] 0x7D41 (METEORLAKE)
[09:06:55] [PASSED] 0x7D67 (METEORLAKE)
[09:06:55] [PASSED] 0xB640 (METEORLAKE)
[09:06:55] [PASSED] 0x56A0 (DG2)
[09:06:55] [PASSED] 0x56A1 (DG2)
[09:06:55] [PASSED] 0x56A2 (DG2)
[09:06:55] [PASSED] 0x56BE (DG2)
[09:06:55] [PASSED] 0x56BF (DG2)
[09:06:55] [PASSED] 0x5690 (DG2)
[09:06:55] [PASSED] 0x5691 (DG2)
[09:06:55] [PASSED] 0x5692 (DG2)
[09:06:55] [PASSED] 0x56A5 (DG2)
[09:06:55] [PASSED] 0x56A6 (DG2)
[09:06:55] [PASSED] 0x56B0 (DG2)
[09:06:55] [PASSED] 0x56B1 (DG2)
[09:06:55] [PASSED] 0x56BA (DG2)
[09:06:55] [PASSED] 0x56BB (DG2)
[09:06:55] [PASSED] 0x56BC (DG2)
[09:06:55] [PASSED] 0x56BD (DG2)
[09:06:55] [PASSED] 0x5693 (DG2)
[09:06:55] [PASSED] 0x5694 (DG2)
[09:06:55] [PASSED] 0x5695 (DG2)
[09:06:55] [PASSED] 0x56A3 (DG2)
[09:06:55] [PASSED] 0x56A4 (DG2)
[09:06:55] [PASSED] 0x56B2 (DG2)
[09:06:55] [PASSED] 0x56B3 (DG2)
[09:06:55] [PASSED] 0x5696 (DG2)
[09:06:55] [PASSED] 0x5697 (DG2)
[09:06:55] [PASSED] 0xB69 (PVC)
[09:06:55] [PASSED] 0xB6E (PVC)
[09:06:55] [PASSED] 0xBD4 (PVC)
[09:06:55] [PASSED] 0xBD5 (PVC)
[09:06:55] [PASSED] 0xBD6 (PVC)
[09:06:55] [PASSED] 0xBD7 (PVC)
[09:06:55] [PASSED] 0xBD8 (PVC)
[09:06:55] [PASSED] 0xBD9 (PVC)
[09:06:55] [PASSED] 0xBDA (PVC)
[09:06:55] [PASSED] 0xBDB (PVC)
[09:06:55] [PASSED] 0xBE0 (PVC)
[09:06:55] [PASSED] 0xBE1 (PVC)
[09:06:55] [PASSED] 0xBE5 (PVC)
[09:06:55] [PASSED] 0x7D40 (METEORLAKE)
[09:06:55] [PASSED] 0x7D45 (METEORLAKE)
[09:06:55] [PASSED] 0x7D55 (METEORLAKE)
[09:06:55] [PASSED] 0x7D60 (METEORLAKE)
[09:06:55] [PASSED] 0x7DD5 (METEORLAKE)
[09:06:55] [PASSED] 0x6420 (LUNARLAKE)
[09:06:55] [PASSED] 0x64A0 (LUNARLAKE)
[09:06:55] [PASSED] 0x64B0 (LUNARLAKE)
[09:06:55] [PASSED] 0xE202 (BATTLEMAGE)
[09:06:55] [PASSED] 0xE209 (BATTLEMAGE)
[09:06:55] [PASSED] 0xE20B (BATTLEMAGE)
[09:06:55] [PASSED] 0xE20C (BATTLEMAGE)
[09:06:55] [PASSED] 0xE20D (BATTLEMAGE)
[09:06:55] [PASSED] 0xE210 (BATTLEMAGE)
[09:06:55] [PASSED] 0xE211 (BATTLEMAGE)
[09:06:55] [PASSED] 0xE212 (BATTLEMAGE)
[09:06:55] [PASSED] 0xE216 (BATTLEMAGE)
[09:06:55] [PASSED] 0xE220 (BATTLEMAGE)
[09:06:55] [PASSED] 0xE221 (BATTLEMAGE)
[09:06:55] [PASSED] 0xE222 (BATTLEMAGE)
[09:06:55] [PASSED] 0xE223 (BATTLEMAGE)
[09:06:55] [PASSED] 0xB080 (PANTHERLAKE)
[09:06:55] [PASSED] 0xB081 (PANTHERLAKE)
[09:06:55] [PASSED] 0xB082 (PANTHERLAKE)
[09:06:55] [PASSED] 0xB083 (PANTHERLAKE)
[09:06:55] [PASSED] 0xB084 (PANTHERLAKE)
[09:06:55] [PASSED] 0xB085 (PANTHERLAKE)
[09:06:55] [PASSED] 0xB086 (PANTHERLAKE)
[09:06:55] [PASSED] 0xB087 (PANTHERLAKE)
[09:06:55] [PASSED] 0xB08F (PANTHERLAKE)
[09:06:55] [PASSED] 0xB090 (PANTHERLAKE)
[09:06:55] [PASSED] 0xB0A0 (PANTHERLAKE)
[09:06:55] [PASSED] 0xB0B0 (PANTHERLAKE)
[09:06:55] [PASSED] 0xFD80 (PANTHERLAKE)
[09:06:55] [PASSED] 0xFD81 (PANTHERLAKE)
[09:06:55] [PASSED] 0xD740 (NOVALAKE_S)
[09:06:55] [PASSED] 0xD741 (NOVALAKE_S)
[09:06:55] [PASSED] 0xD742 (NOVALAKE_S)
[09:06:55] [PASSED] 0xD743 (NOVALAKE_S)
[09:06:55] [PASSED] 0xD745 (NOVALAKE_S)
[09:06:55] [PASSED] 0xD74A (NOVALAKE_S)
[09:06:55] [PASSED] 0xD74B (NOVALAKE_S)
[09:06:55] [PASSED] 0x674C (CRESCENTISLAND)
[09:06:55] [PASSED] 0x674D (CRESCENTISLAND)
[09:06:55] [PASSED] 0x674E (CRESCENTISLAND)
[09:06:55] [PASSED] 0x674F (CRESCENTISLAND)
[09:06:55] [PASSED] 0x6750 (CRESCENTISLAND)
[09:06:55] [PASSED] 0xD750 (NOVALAKE_P)
[09:06:55] [PASSED] 0xD751 (NOVALAKE_P)
[09:06:55] [PASSED] 0xD752 (NOVALAKE_P)
[09:06:55] [PASSED] 0xD753 (NOVALAKE_P)
[09:06:55] [PASSED] 0xD754 (NOVALAKE_P)
[09:06:55] [PASSED] 0xD755 (NOVALAKE_P)
[09:06:55] [PASSED] 0xD756 (NOVALAKE_P)
[09:06:55] [PASSED] 0xD757 (NOVALAKE_P)
[09:06:55] [PASSED] 0xD75F (NOVALAKE_P)
[09:06:55] =============== [PASSED] check_platform_desc ===============
[09:06:55] ===================== [PASSED] xe_pci ======================
[09:06:55] ============= xe_rtp_tables_test (5 subtests) ==============
[09:06:55] ================== xe_rtp_table_gt_test ===================
[09:06:55] [PASSED] gt_was/14011060649
[09:06:55] [PASSED] gt_was/14011059788
[09:06:55] [PASSED] gt_was/14015795083
[09:06:55] [PASSED] gt_was/16021867713
[09:06:55] [PASSED] gt_was/14019449301
[09:06:55] [PASSED] gt_was/16028005424
[09:06:55] [PASSED] gt_was/14026578760
[09:06:55] [PASSED] gt_was/1409420604
[09:06:55] [PASSED] gt_was/1408615072
[09:06:55] [PASSED] gt_was/22010523718
[09:06:55] [PASSED] gt_was/14011006942
[09:06:55] [PASSED] gt_was/14014830051
[09:06:55] [PASSED] gt_was/18018781329
[09:06:55] [PASSED] gt_was/1509235366
[09:06:55] [PASSED] gt_was/18018781329
[09:06:55] [PASSED] gt_was/16016694945
[09:06:55] [PASSED] gt_was/14018575942
[09:06:55] [PASSED] gt_was/22016670082
[09:06:55] [PASSED] gt_was/22016670082
[09:06:55] [PASSED] gt_was/14017421178
[09:06:55] [PASSED] gt_was/16025250150
[09:06:55] [PASSED] gt_was/14021871409
[09:06:55] [PASSED] gt_was/16021865536
[09:06:55] [PASSED] gt_was/14021486841
[09:06:55] [PASSED] gt_was/14025160223
[09:06:55] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[09:06:55] [PASSED] gt_was/14025635424
[09:06:55] [PASSED] gt_was/16028005424
[09:06:55] ============== [PASSED] xe_rtp_table_gt_test ===============
[09:06:55] ================== xe_rtp_table_gt_test ===================
[09:06:55] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[09:06:55] [PASSED] gt_tunings/Tuning: 32B Access Enable
[09:06:55] [PASSED] gt_tunings/Tuning: L3 cache
[09:06:55] [PASSED] gt_tunings/Tuning: L3 cache - media
[09:06:55] [PASSED] gt_tunings/Tuning: Compression Overfetch
[09:06:55] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[09:06:55] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[09:06:55] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[09:06:55] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[09:06:55] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[09:06:55] [PASSED] gt_tunings/Tuning: Stateless compression control
[09:06:55] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[09:06:55] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[09:06:55] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[09:06:55] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[09:06:55] ============== [PASSED] xe_rtp_table_gt_test ===============
[09:06:55] ================== xe_rtp_table_oob_test ==================
[09:06:55] [PASSED] oob_was/1607983814
[09:06:55] [PASSED] oob_was/16010904313
[09:06:55] [PASSED] oob_was/18022495364
[09:06:55] [PASSED] oob_was/22012773006
[09:06:55] [PASSED] oob_was/14014475959
[09:06:55] [PASSED] oob_was/22011391025
[09:06:55] [PASSED] oob_was/22012727170
[09:06:55] [PASSED] oob_was/22012727685
[09:06:55] [PASSED] oob_was/22016596838
[09:06:55] [PASSED] oob_was/18020744125
[09:06:55] [PASSED] oob_was/1409600907
[09:06:55] [PASSED] oob_was/22014953428
[09:06:55] [PASSED] oob_was/16017236439
[09:06:55] [PASSED] oob_was/14019821291
[09:06:55] [PASSED] oob_was/14015076503
[09:06:55] [PASSED] oob_was/14018913170
[09:06:55] [PASSED] oob_was/14018094691
[09:06:55] [PASSED] oob_was/18024947630
[09:06:55] [PASSED] oob_was/16022287689
[09:06:55] [PASSED] oob_was/13011645652
[09:06:55] [PASSED] oob_was/14022293748
[09:06:55] [PASSED] oob_was/22019794406
[09:06:55] [PASSED] oob_was/22019338487
[09:06:55] [PASSED] oob_was/16023588340
[09:06:55] [PASSED] oob_was/14019789679
[09:06:55] [PASSED] oob_was/14022866841
[09:06:55] [PASSED] oob_was/16021333562
[09:06:55] [PASSED] oob_was/14016712196
[09:06:55] [PASSED] oob_was/14015568240
[09:06:55] [PASSED] oob_was/18013179988
[09:06:55] [PASSED] oob_was/1508761755
[09:06:55] [PASSED] oob_was/16023105232
[09:06:55] [PASSED] oob_was/16026508708
[09:06:55] [PASSED] oob_was/14020001231
[09:06:55] [PASSED] oob_was/16023683509
[09:06:55] [PASSED] oob_was/14025515070
[09:06:55] [PASSED] oob_was/15015404425_disable
[09:06:55] [PASSED] oob_was/16026007364
[09:06:55] [PASSED] oob_was/14020316580
[09:06:55] [PASSED] oob_was/14025883347
[09:06:55] [PASSED] oob_was/16029380221
[09:06:55] [PASSED] oob_was/22022079272
[09:06:55] [PASSED] oob_was/16029897822
[09:06:55] [PASSED] oob_was/14027054324
[09:06:55] ============== [PASSED] xe_rtp_table_oob_test ==============
[09:06:55] ================ xe_rtp_table_dev_oob_test ================
[09:06:55] [PASSED] device_oob_was/22010954014
[09:06:55] [PASSED] device_oob_was/15015404425
[09:06:55] [PASSED] device_oob_was/22019338487_display
[09:06:55] [PASSED] device_oob_was/14022085890
[09:06:55] [PASSED] device_oob_was/14026539277
[09:06:55] [PASSED] device_oob_was/14026633728
[09:06:55] [PASSED] device_oob_was/14026746987
[09:06:55] [PASSED] device_oob_was/14026779378
[09:06:55] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[09:06:55] ========== xe_rtp_table_missing_upper_bound_test ==========
[09:06:55] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[09:06:55] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[09:06:55] [PASSED] register_whitelist/1806527549
[09:06:55] [PASSED] register_whitelist/allow_read_ctx_timestamp
[09:06:55] [PASSED] register_whitelist/allow_read_queue_timestamp
[09:06:55] [PASSED] register_whitelist/16014440446
[09:06:55] [PASSED] register_whitelist/16017236439
[09:06:55] [PASSED] register_whitelist/16020183090
[09:06:55] [PASSED] register_whitelist/14024997852
[09:06:55] [PASSED] register_whitelist/14024997852
[09:06:55] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[09:06:55] =============== [PASSED] xe_rtp_tables_test ================
[09:06:55] =================== xe_rtp (3 subtests) ====================
[09:06:55] =================== xe_rtp_rules_tests ====================
[09:06:55] [PASSED] no
[09:06:55] [PASSED] yes
[09:06:55] [PASSED] no-and-no
[09:06:55] [PASSED] no-and-yes
[09:06:55] [PASSED] yes-and-no
[09:06:55] [PASSED] yes-and-yes
[09:06:55] [PASSED] no-or-no
[09:06:55] [PASSED] no-or-yes
[09:06:55] [PASSED] yes-or-no
[09:06:55] [PASSED] yes-or-yes
[09:06:55] [PASSED] no-yes-or-yes-no
[09:06:55] [PASSED] no-yes-or-yes-yes
[09:06:55] [PASSED] yes-yes-or-no-yes
[09:06:55] [PASSED] yes-yes-or-yes-yes
[09:06:55] [PASSED] no-no-or-yes-or-no
[09:06:55] [PASSED] or
[09:06:55] [PASSED] or-yes
[09:06:55] [PASSED] or-no
[09:06:55] [PASSED] yes-or
[09:06:55] [PASSED] no-or
[09:06:55] [PASSED] no-or-or-yes
[09:06:55] [PASSED] yes-or-or-no
[09:06:55] [PASSED] no-or-or-no
[09:06:55] [PASSED] missing-context-engine-class
[09:06:55] [PASSED] missing-context-engine-class-or-yes
[09:06:55] [PASSED] missing-context-engine-class-or-or-yes
[09:06:55] =============== [PASSED] xe_rtp_rules_tests ================
[09:06:55] =============== xe_rtp_process_to_sr_tests ================
[09:06:55] [PASSED] coalesce-same-reg
[09:06:55] [PASSED] coalesce-same-reg-literal-and-func
[09:06:55] [PASSED] no-match-no-add
[09:06:55] [PASSED] two-regs-two-entries
[09:06:55] [PASSED] clr-one-set-other
[09:06:55] [PASSED] set-field
[09:06:55] [PASSED] conflict-duplicate
[09:06:55] [PASSED] conflict-not-disjoint
[09:06:55] [PASSED] conflict-not-disjoint-literal-and-func
[09:06:55] [PASSED] conflict-reg-type
[09:06:55] [PASSED] bad-mcr-reg-forced-to-regular
[09:06:55] [PASSED] bad-regular-reg-forced-to-mcr
[09:06:55] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[09:06:55] ================== xe_rtp_process_tests ===================
[09:06:55] [PASSED] active1
[09:06:55] [PASSED] active2
[09:06:55] [PASSED] active-inactive
[09:06:55] [PASSED] inactive-active
[09:06:55] [PASSED] inactive-active-inactive
[09:06:55] [PASSED] inactive-inactive-inactive
[09:06:55] ============== [PASSED] xe_rtp_process_tests ===============
[09:06:55] ===================== [PASSED] xe_rtp ======================
[09:06:55] ==================== xe_wa (1 subtest) =====================
[09:06:55] ======================== xe_wa_gt =========================
[09:06:55] [PASSED] TIGERLAKE B0
[09:06:55] [PASSED] DG1 A0
[09:06:55] [PASSED] DG1 B0
[09:06:55] [PASSED] ALDERLAKE_S A0
[09:06:55] [PASSED] ALDERLAKE_S B0
[09:06:55] [PASSED] ALDERLAKE_S C0
[09:06:55] [PASSED] ALDERLAKE_S D0
[09:06:55] [PASSED] ALDERLAKE_P A0
[09:06:55] [PASSED] ALDERLAKE_P B0
[09:06:55] [PASSED] ALDERLAKE_P C0
[09:06:55] [PASSED] ALDERLAKE_S RPLS D0
[09:06:55] [PASSED] ALDERLAKE_P RPLU E0
[09:06:55] [PASSED] DG2 G10 C0
[09:06:55] [PASSED] DG2 G11 B1
[09:06:55] [PASSED] DG2 G12 A1
[09:06:55] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:06:55] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:06:55] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[09:06:55] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[09:06:55] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[09:06:55] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[09:06:55] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[09:06:55] ==================== [PASSED] xe_wa_gt =====================
[09:06:55] ====================== [PASSED] xe_wa ======================
[09:06:55] ============================================================
[09:06:55] Testing complete. Ran 789 tests: passed: 761, skipped: 28
[09:06:55] Elapsed time: 37.504s total, 4.321s configuring, 32.467s building, 0.683s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[09:06:55] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:06:57] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:07:22] Starting KUnit Kernel (1/1)...
[09:07:22] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:07:22] ============ drm_test_pick_cmdline (2 subtests) ============
[09:07:22] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[09:07:22] =============== drm_test_pick_cmdline_named ===============
[09:07:22] [PASSED] NTSC
[09:07:22] [PASSED] NTSC-J
[09:07:22] [PASSED] PAL
[09:07:22] [PASSED] PAL-M
[09:07:22] =========== [PASSED] drm_test_pick_cmdline_named ===========
[09:07:22] ============== [PASSED] drm_test_pick_cmdline ==============
[09:07:22] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[09:07:22] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[09:07:22] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[09:07:22] =========== drm_validate_clone_mode (2 subtests) ===========
[09:07:22] ============== drm_test_check_in_clone_mode ===============
[09:07:22] [PASSED] in_clone_mode
[09:07:22] [PASSED] not_in_clone_mode
[09:07:22] ========== [PASSED] drm_test_check_in_clone_mode ===========
[09:07:22] =============== drm_test_check_valid_clones ===============
[09:07:22] [PASSED] not_in_clone_mode
[09:07:22] [PASSED] valid_clone
[09:07:22] [PASSED] invalid_clone
[09:07:22] =========== [PASSED] drm_test_check_valid_clones ===========
[09:07:22] ============= [PASSED] drm_validate_clone_mode =============
[09:07:22] ============= drm_validate_modeset (1 subtest) =============
[09:07:22] [PASSED] drm_test_check_connector_changed_modeset
[09:07:22] ============== [PASSED] drm_validate_modeset ===============
[09:07:22] ====== drm_test_bridge_get_current_state (1 subtest) =======
[09:07:22] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[09:07:22] ======== [PASSED] drm_test_bridge_get_current_state ========
[09:07:22] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[09:07:22] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[09:07:22] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[09:07:22] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[09:07:22] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[09:07:22] ============== drm_bridge_alloc (2 subtests) ===============
[09:07:22] [PASSED] drm_test_drm_bridge_alloc_basic
[09:07:22] [PASSED] drm_test_drm_bridge_alloc_get_put
[09:07:22] ================ [PASSED] drm_bridge_alloc =================
[09:07:22] ============= drm_bridge_bus_fmt (5 subtests) ==============
[09:07:22] [PASSED] drm_test_bridge_rgb_yuv_rgb
[09:07:22] [PASSED] drm_test_bridge_must_convert_to_yuv444
[09:07:22] [PASSED] drm_test_bridge_hdmi_auto_rgb
[09:07:22] [PASSED] drm_test_bridge_auto_first
[09:07:22] [PASSED] drm_test_bridge_rgb_yuv_no_path
[09:07:22] =============== [PASSED] drm_bridge_bus_fmt ================
[09:07:22] ============= drm_cmdline_parser (40 subtests) =============
[09:07:22] [PASSED] drm_test_cmdline_force_d_only
[09:07:22] [PASSED] drm_test_cmdline_force_D_only_dvi
[09:07:22] [PASSED] drm_test_cmdline_force_D_only_hdmi
[09:07:22] [PASSED] drm_test_cmdline_force_D_only_not_digital
[09:07:22] [PASSED] drm_test_cmdline_force_e_only
[09:07:22] [PASSED] drm_test_cmdline_res
[09:07:22] [PASSED] drm_test_cmdline_res_vesa
[09:07:22] [PASSED] drm_test_cmdline_res_vesa_rblank
[09:07:22] [PASSED] drm_test_cmdline_res_rblank
[09:07:22] [PASSED] drm_test_cmdline_res_bpp
[09:07:22] [PASSED] drm_test_cmdline_res_refresh
[09:07:22] [PASSED] drm_test_cmdline_res_bpp_refresh
[09:07:22] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[09:07:22] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[09:07:22] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[09:07:22] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[09:07:22] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[09:07:22] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[09:07:22] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[09:07:22] [PASSED] drm_test_cmdline_res_margins_force_on
[09:07:22] [PASSED] drm_test_cmdline_res_vesa_margins
[09:07:22] [PASSED] drm_test_cmdline_name
[09:07:22] [PASSED] drm_test_cmdline_name_bpp
[09:07:22] [PASSED] drm_test_cmdline_name_option
[09:07:22] [PASSED] drm_test_cmdline_name_bpp_option
[09:07:22] [PASSED] drm_test_cmdline_rotate_0
[09:07:22] [PASSED] drm_test_cmdline_rotate_90
[09:07:22] [PASSED] drm_test_cmdline_rotate_180
[09:07:22] [PASSED] drm_test_cmdline_rotate_270
[09:07:22] [PASSED] drm_test_cmdline_hmirror
[09:07:22] [PASSED] drm_test_cmdline_vmirror
[09:07:22] [PASSED] drm_test_cmdline_margin_options
[09:07:22] [PASSED] drm_test_cmdline_multiple_options
[09:07:22] [PASSED] drm_test_cmdline_bpp_extra_and_option
[09:07:22] [PASSED] drm_test_cmdline_extra_and_option
[09:07:22] [PASSED] drm_test_cmdline_freestanding_options
[09:07:22] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[09:07:22] [PASSED] drm_test_cmdline_panel_orientation
[09:07:22] ================ drm_test_cmdline_invalid =================
[09:07:22] [PASSED] margin_only
[09:07:22] [PASSED] interlace_only
[09:07:22] [PASSED] res_missing_x
[09:07:22] [PASSED] res_missing_y
[09:07:22] [PASSED] res_bad_y
[09:07:22] [PASSED] res_missing_y_bpp
[09:07:22] [PASSED] res_bad_bpp
[09:07:22] [PASSED] res_bad_refresh
[09:07:22] [PASSED] res_bpp_refresh_force_on_off
[09:07:22] [PASSED] res_invalid_mode
[09:07:22] [PASSED] res_bpp_wrong_place_mode
[09:07:22] [PASSED] name_bpp_refresh
[09:07:22] [PASSED] name_refresh
[09:07:22] [PASSED] name_refresh_wrong_mode
[09:07:22] [PASSED] name_refresh_invalid_mode
[09:07:22] [PASSED] rotate_multiple
[09:07:22] [PASSED] rotate_invalid_val
[09:07:22] [PASSED] rotate_truncated
[09:07:22] [PASSED] invalid_option
[09:07:22] [PASSED] invalid_tv_option
[09:07:22] [PASSED] truncated_tv_option
[09:07:22] ============ [PASSED] drm_test_cmdline_invalid =============
[09:07:22] =============== drm_test_cmdline_tv_options ===============
[09:07:22] [PASSED] NTSC
[09:07:22] [PASSED] NTSC_443
[09:07:22] [PASSED] NTSC_J
[09:07:22] [PASSED] PAL
[09:07:22] [PASSED] PAL_M
[09:07:22] [PASSED] PAL_N
[09:07:22] [PASSED] SECAM
[09:07:22] [PASSED] MONO_525
[09:07:22] [PASSED] MONO_625
[09:07:22] =========== [PASSED] drm_test_cmdline_tv_options ===========
[09:07:22] =============== [PASSED] drm_cmdline_parser ================
[09:07:22] ========== drmm_connector_hdmi_init (20 subtests) ==========
[09:07:22] [PASSED] drm_test_connector_hdmi_init_valid
[09:07:22] [PASSED] drm_test_connector_hdmi_init_bpc_8
[09:07:22] [PASSED] drm_test_connector_hdmi_init_bpc_10
[09:07:22] [PASSED] drm_test_connector_hdmi_init_bpc_12
[09:07:22] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[09:07:22] [PASSED] drm_test_connector_hdmi_init_bpc_null
[09:07:22] [PASSED] drm_test_connector_hdmi_init_formats_empty
[09:07:22] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[09:07:22] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:07:22] [PASSED] supported_formats=0x9 yuv420_allowed=1
[09:07:22] [PASSED] supported_formats=0x9 yuv420_allowed=0
[09:07:22] [PASSED] supported_formats=0x5 yuv420_allowed=1
[09:07:22] [PASSED] supported_formats=0x5 yuv420_allowed=0
[09:07:22] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:07:22] [PASSED] drm_test_connector_hdmi_init_null_ddc
[09:07:22] [PASSED] drm_test_connector_hdmi_init_null_product
[09:07:22] [PASSED] drm_test_connector_hdmi_init_null_vendor
[09:07:22] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[09:07:22] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[09:07:22] [PASSED] drm_test_connector_hdmi_init_product_valid
[09:07:22] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[09:07:22] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[09:07:22] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[09:07:22] ========= drm_test_connector_hdmi_init_type_valid =========
[09:07:22] [PASSED] HDMI-A
[09:07:22] [PASSED] HDMI-B
[09:07:22] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[09:07:22] ======== drm_test_connector_hdmi_init_type_invalid ========
[09:07:22] [PASSED] Unknown
[09:07:22] [PASSED] VGA
[09:07:22] [PASSED] DVI-I
[09:07:22] [PASSED] DVI-D
[09:07:22] [PASSED] DVI-A
[09:07:22] [PASSED] Composite
[09:07:22] [PASSED] SVIDEO
[09:07:22] [PASSED] LVDS
[09:07:22] [PASSED] Component
[09:07:22] [PASSED] DIN
[09:07:22] [PASSED] DP
[09:07:22] [PASSED] TV
[09:07:22] [PASSED] eDP
[09:07:22] [PASSED] Virtual
[09:07:22] [PASSED] DSI
[09:07:22] [PASSED] DPI
[09:07:22] [PASSED] Writeback
[09:07:22] [PASSED] SPI
[09:07:22] [PASSED] USB
[09:07:22] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[09:07:22] ============ [PASSED] drmm_connector_hdmi_init =============
[09:07:22] ============= drmm_connector_init (3 subtests) =============
[09:07:22] [PASSED] drm_test_drmm_connector_init
[09:07:22] [PASSED] drm_test_drmm_connector_init_null_ddc
[09:07:22] ========= drm_test_drmm_connector_init_type_valid =========
[09:07:22] [PASSED] Unknown
[09:07:22] [PASSED] VGA
[09:07:22] [PASSED] DVI-I
[09:07:22] [PASSED] DVI-D
[09:07:22] [PASSED] DVI-A
[09:07:22] [PASSED] Composite
[09:07:22] [PASSED] SVIDEO
[09:07:22] [PASSED] LVDS
[09:07:22] [PASSED] Component
[09:07:22] [PASSED] DIN
[09:07:22] [PASSED] DP
[09:07:22] [PASSED] HDMI-A
[09:07:22] [PASSED] HDMI-B
[09:07:22] [PASSED] TV
[09:07:22] [PASSED] eDP
[09:07:22] [PASSED] Virtual
[09:07:22] [PASSED] DSI
[09:07:22] [PASSED] DPI
[09:07:22] [PASSED] Writeback
[09:07:22] [PASSED] SPI
[09:07:22] [PASSED] USB
[09:07:22] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[09:07:22] =============== [PASSED] drmm_connector_init ===============
[09:07:22] ========= drm_connector_dynamic_init (6 subtests) ==========
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_init
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_init_properties
[09:07:22] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[09:07:22] [PASSED] Unknown
[09:07:22] [PASSED] VGA
[09:07:22] [PASSED] DVI-I
[09:07:22] [PASSED] DVI-D
[09:07:22] [PASSED] DVI-A
[09:07:22] [PASSED] Composite
[09:07:22] [PASSED] SVIDEO
[09:07:22] [PASSED] LVDS
[09:07:22] [PASSED] Component
[09:07:22] [PASSED] DIN
[09:07:22] [PASSED] DP
[09:07:22] [PASSED] HDMI-A
[09:07:22] [PASSED] HDMI-B
[09:07:22] [PASSED] TV
[09:07:22] [PASSED] eDP
[09:07:22] [PASSED] Virtual
[09:07:22] [PASSED] DSI
[09:07:22] [PASSED] DPI
[09:07:22] [PASSED] Writeback
[09:07:22] [PASSED] SPI
[09:07:22] [PASSED] USB
[09:07:22] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[09:07:22] ======== drm_test_drm_connector_dynamic_init_name =========
[09:07:22] [PASSED] Unknown
[09:07:22] [PASSED] VGA
[09:07:22] [PASSED] DVI-I
[09:07:22] [PASSED] DVI-D
[09:07:22] [PASSED] DVI-A
[09:07:22] [PASSED] Composite
[09:07:22] [PASSED] SVIDEO
[09:07:22] [PASSED] LVDS
[09:07:22] [PASSED] Component
[09:07:22] [PASSED] DIN
[09:07:22] [PASSED] DP
[09:07:22] [PASSED] HDMI-A
[09:07:22] [PASSED] HDMI-B
[09:07:22] [PASSED] TV
[09:07:22] [PASSED] eDP
[09:07:22] [PASSED] Virtual
[09:07:22] [PASSED] DSI
[09:07:22] [PASSED] DPI
[09:07:22] [PASSED] Writeback
[09:07:22] [PASSED] SPI
[09:07:22] [PASSED] USB
[09:07:22] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[09:07:22] =========== [PASSED] drm_connector_dynamic_init ============
[09:07:22] ==== drm_connector_dynamic_register_early (4 subtests) =====
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[09:07:22] ====== [PASSED] drm_connector_dynamic_register_early =======
[09:07:22] ======= drm_connector_dynamic_register (7 subtests) ========
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[09:07:22] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[09:07:22] ========= [PASSED] drm_connector_dynamic_register ==========
[09:07:22] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[09:07:22] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[09:07:22] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[09:07:22] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[09:07:22] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[09:07:22] ========== drm_test_get_tv_mode_from_name_valid ===========
[09:07:22] [PASSED] NTSC
[09:07:22] [PASSED] NTSC-443
[09:07:22] [PASSED] NTSC-J
[09:07:22] [PASSED] PAL
[09:07:22] [PASSED] PAL-M
[09:07:22] [PASSED] PAL-N
[09:07:22] [PASSED] SECAM
[09:07:22] [PASSED] Mono
[09:07:22] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[09:07:22] [PASSED] drm_test_get_tv_mode_from_name_truncated
[09:07:22] ============ [PASSED] drm_get_tv_mode_from_name ============
[09:07:22] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[09:07:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[09:07:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[09:07:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[09:07:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[09:07:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[09:07:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[09:07:22] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[09:07:22] [PASSED] VIC 96
[09:07:22] [PASSED] VIC 97
[09:07:22] [PASSED] VIC 101
[09:07:22] [PASSED] VIC 102
[09:07:22] [PASSED] VIC 106
[09:07:22] [PASSED] VIC 107
[09:07:22] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[09:07:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[09:07:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[09:07:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[09:07:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[09:07:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[09:07:22] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[09:07:22] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[09:07:22] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[09:07:22] [PASSED] Automatic
[09:07:22] [PASSED] Full
[09:07:22] [PASSED] Limited 16:235
[09:07:22] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[09:07:22] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[09:07:22] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[09:07:22] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[09:07:22] === drm_test_drm_hdmi_connector_get_output_format_name ====
[09:07:22] [PASSED] RGB
[09:07:22] [PASSED] YUV 4:2:0
[09:07:22] [PASSED] YUV 4:2:2
[09:07:22] [PASSED] YUV 4:4:4
[09:07:22] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[09:07:22] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[09:07:22] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[09:07:22] ============= drm_damage_helper (21 subtests) ==============
[09:07:22] [PASSED] drm_test_damage_iter_no_damage
[09:07:22] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[09:07:22] [PASSED] drm_test_damage_iter_no_damage_src_moved
[09:07:22] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[09:07:22] [PASSED] drm_test_damage_iter_no_damage_not_visible
[09:07:22] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[09:07:22] [PASSED] drm_test_damage_iter_no_damage_no_fb
[09:07:22] [PASSED] drm_test_damage_iter_simple_damage
[09:07:22] [PASSED] drm_test_damage_iter_single_damage
[09:07:22] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[09:07:22] [PASSED] drm_test_damage_iter_single_damage_outside_src
[09:07:22] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[09:07:22] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[09:07:22] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[09:07:22] [PASSED] drm_test_damage_iter_single_damage_src_moved
[09:07:22] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[09:07:22] [PASSED] drm_test_damage_iter_damage
[09:07:22] [PASSED] drm_test_damage_iter_damage_one_intersect
[09:07:22] [PASSED] drm_test_damage_iter_damage_one_outside
[09:07:22] [PASSED] drm_test_damage_iter_damage_src_moved
[09:07:22] [PASSED] drm_test_damage_iter_damage_not_visible
[09:07:22] ================ [PASSED] drm_damage_helper ================
[09:07:22] ============== drm_dp_mst_helper (3 subtests) ==============
[09:07:22] ============== drm_test_dp_mst_calc_pbn_mode ==============
[09:07:22] [PASSED] Clock 154000 BPP 30 DSC disabled
[09:07:22] [PASSED] Clock 234000 BPP 30 DSC disabled
[09:07:22] [PASSED] Clock 297000 BPP 24 DSC disabled
[09:07:22] [PASSED] Clock 332880 BPP 24 DSC enabled
[09:07:22] [PASSED] Clock 324540 BPP 24 DSC enabled
[09:07:22] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[09:07:22] ============== drm_test_dp_mst_calc_pbn_div ===============
[09:07:22] [PASSED] Link rate 2000000 lane count 4
[09:07:22] [PASSED] Link rate 2000000 lane count 2
[09:07:22] [PASSED] Link rate 2000000 lane count 1
[09:07:22] [PASSED] Link rate 1350000 lane count 4
[09:07:22] [PASSED] Link rate 1350000 lane count 2
[09:07:22] [PASSED] Link rate 1350000 lane count 1
[09:07:22] [PASSED] Link rate 1000000 lane count 4
[09:07:22] [PASSED] Link rate 1000000 lane count 2
[09:07:22] [PASSED] Link rate 1000000 lane count 1
[09:07:22] [PASSED] Link rate 810000 lane count 4
[09:07:22] [PASSED] Link rate 810000 lane count 2
[09:07:22] [PASSED] Link rate 810000 lane count 1
[09:07:22] [PASSED] Link rate 540000 lane count 4
[09:07:22] [PASSED] Link rate 540000 lane count 2
[09:07:22] [PASSED] Link rate 540000 lane count 1
[09:07:22] [PASSED] Link rate 270000 lane count 4
[09:07:22] [PASSED] Link rate 270000 lane count 2
[09:07:22] [PASSED] Link rate 270000 lane count 1
[09:07:22] [PASSED] Link rate 162000 lane count 4
[09:07:22] [PASSED] Link rate 162000 lane count 2
[09:07:22] [PASSED] Link rate 162000 lane count 1
[09:07:22] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[09:07:22] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[09:07:22] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[09:07:22] [PASSED] DP_POWER_UP_PHY with port number
[09:07:22] [PASSED] DP_POWER_DOWN_PHY with port number
[09:07:22] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[09:07:22] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[09:07:22] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[09:07:22] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[09:07:22] [PASSED] DP_QUERY_PAYLOAD with port number
[09:07:22] [PASSED] DP_QUERY_PAYLOAD with VCPI
[09:07:22] [PASSED] DP_REMOTE_DPCD_READ with port number
[09:07:22] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[09:07:22] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[09:07:22] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[09:07:22] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[09:07:22] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[09:07:22] [PASSED] DP_REMOTE_I2C_READ with port number
[09:07:22] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[09:07:22] [PASSED] DP_REMOTE_I2C_READ with transactions array
[09:07:22] [PASSED] DP_REMOTE_I2C_WRITE with port number
[09:07:22] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[09:07:22] [PASSED] DP_REMOTE_I2C_WRITE with data array
[09:07:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[09:07:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[09:07:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[09:07:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[09:07:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[09:07:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[09:07:22] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[09:07:22] ================ [PASSED] drm_dp_mst_helper ================
[09:07:22] ================== drm_exec (7 subtests) ===================
[09:07:22] [PASSED] sanitycheck
[09:07:22] [PASSED] test_lock
[09:07:22] [PASSED] test_lock_unlock
[09:07:22] [PASSED] test_duplicates
[09:07:22] [PASSED] test_prepare
[09:07:22] [PASSED] test_prepare_array
[09:07:22] [PASSED] test_multiple_loops
[09:07:22] ==================== [PASSED] drm_exec =====================
[09:07:22] =========== drm_format_helper_test (17 subtests) ===========
[09:07:22] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[09:07:22] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[09:07:22] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[09:07:22] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[09:07:22] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[09:07:22] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[09:07:22] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[09:07:22] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[09:07:22] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[09:07:22] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[09:07:22] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[09:07:22] ============== drm_test_fb_xrgb8888_to_mono ===============
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[09:07:22] ==================== drm_test_fb_swab =====================
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ================ [PASSED] drm_test_fb_swab =================
[09:07:22] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[09:07:22] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[09:07:22] [PASSED] single_pixel_source_buffer
[09:07:22] [PASSED] single_pixel_clip_rectangle
[09:07:22] [PASSED] well_known_colors
[09:07:22] [PASSED] destination_pitch
[09:07:22] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[09:07:22] ================= drm_test_fb_clip_offset =================
[09:07:22] [PASSED] pass through
[09:07:22] [PASSED] horizontal offset
[09:07:22] [PASSED] vertical offset
[09:07:22] [PASSED] horizontal and vertical offset
[09:07:22] [PASSED] horizontal offset (custom pitch)
[09:07:22] [PASSED] vertical offset (custom pitch)
[09:07:22] [PASSED] horizontal and vertical offset (custom pitch)
[09:07:22] ============= [PASSED] drm_test_fb_clip_offset =============
[09:07:22] =================== drm_test_fb_memcpy ====================
[09:07:22] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[09:07:22] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[09:07:22] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[09:07:22] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[09:07:22] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[09:07:22] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[09:07:22] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[09:07:22] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[09:07:22] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[09:07:22] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[09:07:22] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[09:07:22] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[09:07:22] =============== [PASSED] drm_test_fb_memcpy ================
[09:07:22] ============= [PASSED] drm_format_helper_test ==============
[09:07:22] ================= drm_format (18 subtests) =================
[09:07:22] [PASSED] drm_test_format_block_width_invalid
[09:07:22] [PASSED] drm_test_format_block_width_one_plane
[09:07:22] [PASSED] drm_test_format_block_width_two_plane
[09:07:22] [PASSED] drm_test_format_block_width_three_plane
[09:07:22] [PASSED] drm_test_format_block_width_tiled
[09:07:22] [PASSED] drm_test_format_block_height_invalid
[09:07:22] [PASSED] drm_test_format_block_height_one_plane
[09:07:22] [PASSED] drm_test_format_block_height_two_plane
[09:07:22] [PASSED] drm_test_format_block_height_three_plane
[09:07:22] [PASSED] drm_test_format_block_height_tiled
[09:07:22] [PASSED] drm_test_format_min_pitch_invalid
[09:07:22] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[09:07:22] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[09:07:22] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[09:07:22] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[09:07:22] [PASSED] drm_test_format_min_pitch_two_plane
[09:07:22] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[09:07:22] [PASSED] drm_test_format_min_pitch_tiled
[09:07:22] =================== [PASSED] drm_format ====================
[09:07:22] ============== drm_framebuffer (10 subtests) ===============
[09:07:22] ========== drm_test_framebuffer_check_src_coords ==========
[09:07:22] [PASSED] Success: source fits into fb
[09:07:22] [PASSED] Fail: overflowing fb with x-axis coordinate
[09:07:22] [PASSED] Fail: overflowing fb with y-axis coordinate
[09:07:22] [PASSED] Fail: overflowing fb with source width
[09:07:22] [PASSED] Fail: overflowing fb with source height
[09:07:22] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[09:07:22] [PASSED] drm_test_framebuffer_cleanup
[09:07:22] =============== drm_test_framebuffer_create ===============
[09:07:22] [PASSED] ABGR8888 normal sizes
[09:07:22] [PASSED] ABGR8888 max sizes
[09:07:22] [PASSED] ABGR8888 pitch greater than min required
[09:07:22] [PASSED] ABGR8888 pitch less than min required
[09:07:22] [PASSED] ABGR8888 Invalid width
[09:07:22] [PASSED] ABGR8888 Invalid buffer handle
[09:07:22] [PASSED] No pixel format
[09:07:22] [PASSED] ABGR8888 Width 0
[09:07:22] [PASSED] ABGR8888 Height 0
[09:07:22] [PASSED] ABGR8888 Out of bound height * pitch combination
[09:07:22] [PASSED] ABGR8888 Large buffer offset
[09:07:22] [PASSED] ABGR8888 Buffer offset for inexistent plane
[09:07:22] [PASSED] ABGR8888 Invalid flag
[09:07:22] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[09:07:22] [PASSED] ABGR8888 Valid buffer modifier
[09:07:22] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[09:07:22] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[09:07:22] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[09:07:22] [PASSED] NV12 Normal sizes
[09:07:22] [PASSED] NV12 Max sizes
[09:07:22] [PASSED] NV12 Invalid pitch
[09:07:22] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[09:07:22] [PASSED] NV12 different modifier per-plane
[09:07:22] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[09:07:22] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[09:07:22] [PASSED] NV12 Modifier for inexistent plane
[09:07:22] [PASSED] NV12 Handle for inexistent plane
[09:07:22] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[09:07:22] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[09:07:22] [PASSED] YVU420 Normal sizes
[09:07:22] [PASSED] YVU420 Max sizes
[09:07:22] [PASSED] YVU420 Invalid pitch
[09:07:22] [PASSED] YVU420 Different pitches
[09:07:22] [PASSED] YVU420 Different buffer offsets/pitches
[09:07:22] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[09:07:22] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[09:07:22] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[09:07:22] [PASSED] YVU420 Valid modifier
[09:07:22] [PASSED] YVU420 Different modifiers per plane
[09:07:22] [PASSED] YVU420 Modifier for inexistent plane
[09:07:22] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[09:07:22] [PASSED] X0L2 Normal sizes
[09:07:22] [PASSED] X0L2 Max sizes
[09:07:22] [PASSED] X0L2 Invalid pitch
[09:07:22] [PASSED] X0L2 Pitch greater than minimum required
[09:07:22] [PASSED] X0L2 Handle for inexistent plane
[09:07:22] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[09:07:22] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[09:07:22] [PASSED] X0L2 Valid modifier
[09:07:22] [PASSED] X0L2 Modifier for inexistent plane
[09:07:22] =========== [PASSED] drm_test_framebuffer_create ===========
[09:07:22] [PASSED] drm_test_framebuffer_free
[09:07:22] [PASSED] drm_test_framebuffer_init
[09:07:22] [PASSED] drm_test_framebuffer_init_bad_format
[09:07:22] [PASSED] drm_test_framebuffer_init_dev_mismatch
[09:07:22] [PASSED] drm_test_framebuffer_lookup
[09:07:22] [PASSED] drm_test_framebuffer_lookup_inexistent
[09:07:22] [PASSED] drm_test_framebuffer_modifiers_not_supported
[09:07:22] ================= [PASSED] drm_framebuffer =================
[09:07:22] ================ drm_gem_shmem (8 subtests) ================
[09:07:22] [PASSED] drm_gem_shmem_test_obj_create
[09:07:22] [PASSED] drm_gem_shmem_test_obj_create_private
[09:07:22] [PASSED] drm_gem_shmem_test_pin_pages
[09:07:22] [PASSED] drm_gem_shmem_test_vmap
[09:07:22] [PASSED] drm_gem_shmem_test_get_sg_table
[09:07:22] [PASSED] drm_gem_shmem_test_get_pages_sgt
[09:07:22] [PASSED] drm_gem_shmem_test_madvise
[09:07:22] [PASSED] drm_gem_shmem_test_purge
[09:07:22] ================== [PASSED] drm_gem_shmem ==================
[09:07:22] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[09:07:22] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[09:07:22] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[09:07:22] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[09:07:22] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[09:07:22] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[09:07:22] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[09:07:22] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[09:07:22] [PASSED] Automatic
[09:07:22] [PASSED] Full
[09:07:22] [PASSED] Limited 16:235
[09:07:22] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[09:07:22] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[09:07:22] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[09:07:22] [PASSED] drm_test_check_disable_connector
[09:07:22] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[09:07:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[09:07:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[09:07:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[09:07:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[09:07:22] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[09:07:22] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[09:07:22] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[09:07:22] [PASSED] drm_test_check_output_bpc_dvi
[09:07:22] [PASSED] drm_test_check_output_bpc_format_vic_1
[09:07:22] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[09:07:22] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[09:07:22] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[09:07:22] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[09:07:22] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[09:07:22] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[09:07:22] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[09:07:22] ============ drm_test_check_hdmi_color_format =============
[09:07:22] [PASSED] AUTO -> RGB
[09:07:22] [PASSED] YCBCR422 -> YUV422
[09:07:22] [PASSED] YCBCR420 -> YUV420
[09:07:22] [PASSED] YCBCR444 -> YUV444
[09:07:22] [PASSED] RGB -> RGB
[09:07:22] ======== [PASSED] drm_test_check_hdmi_color_format =========
[09:07:22] ======== drm_test_check_hdmi_color_format_420_only ========
[09:07:22] [PASSED] RGB should fail
[09:07:22] [PASSED] YUV444 should fail
[09:07:22] [PASSED] YUV422 should fail
[09:07:22] [PASSED] YUV420 should work
[09:07:22] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[09:07:22] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[09:07:22] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[09:07:22] [PASSED] drm_test_check_broadcast_rgb_value
[09:07:22] [PASSED] drm_test_check_bpc_8_value
[09:07:22] [PASSED] drm_test_check_bpc_10_value
[09:07:22] [PASSED] drm_test_check_bpc_12_value
[09:07:22] [PASSED] drm_test_check_format_value
[09:07:22] [PASSED] drm_test_check_tmds_char_value
[09:07:22] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[09:07:22] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[09:07:22] [PASSED] drm_test_check_mode_valid
[09:07:22] [PASSED] drm_test_check_mode_valid_reject
[09:07:22] [PASSED] drm_test_check_mode_valid_reject_rate
[09:07:22] [PASSED] drm_test_check_mode_valid_reject_max_clock
[09:07:22] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[09:07:22] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[09:07:22] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[09:07:22] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[09:07:22] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[09:07:22] [PASSED] drm_test_check_infoframes
[09:07:22] [PASSED] drm_test_check_reject_avi_infoframe
[09:07:22] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[09:07:22] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[09:07:22] [PASSED] drm_test_check_reject_audio_infoframe
[09:07:22] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[09:07:22] ================= drm_managed (2 subtests) =================
[09:07:22] [PASSED] drm_test_managed_release_action
[09:07:22] [PASSED] drm_test_managed_run_action
[09:07:22] =================== [PASSED] drm_managed ===================
[09:07:22] =================== drm_mm (6 subtests) ====================
[09:07:22] [PASSED] drm_test_mm_init
[09:07:22] [PASSED] drm_test_mm_debug
[09:07:22] [PASSED] drm_test_mm_align32
[09:07:22] [PASSED] drm_test_mm_align64
[09:07:22] [PASSED] drm_test_mm_lowest
[09:07:22] [PASSED] drm_test_mm_highest
[09:07:22] ===================== [PASSED] drm_mm ======================
[09:07:22] ============= drm_modes_analog_tv (5 subtests) =============
[09:07:22] [PASSED] drm_test_modes_analog_tv_mono_576i
[09:07:22] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[09:07:22] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[09:07:22] [PASSED] drm_test_modes_analog_tv_pal_576i
[09:07:22] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[09:07:22] =============== [PASSED] drm_modes_analog_tv ===============
[09:07:22] ============== drm_plane_helper (2 subtests) ===============
[09:07:22] =============== drm_test_check_plane_state ================
[09:07:22] [PASSED] clipping_simple
[09:07:22] [PASSED] clipping_rotate_reflect
[09:07:22] [PASSED] positioning_simple
[09:07:22] [PASSED] upscaling
[09:07:22] [PASSED] downscaling
[09:07:22] [PASSED] rounding1
[09:07:22] [PASSED] rounding2
[09:07:22] [PASSED] rounding3
[09:07:22] [PASSED] rounding4
[09:07:22] =========== [PASSED] drm_test_check_plane_state ============
[09:07:22] =========== drm_test_check_invalid_plane_state ============
[09:07:22] [PASSED] positioning_invalid
[09:07:22] [PASSED] upscaling_invalid
[09:07:22] [PASSED] downscaling_invalid
[09:07:22] ======= [PASSED] drm_test_check_invalid_plane_state ========
[09:07:22] ================ [PASSED] drm_plane_helper =================
[09:07:22] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[09:07:22] ====== drm_test_connector_helper_tv_get_modes_check =======
[09:07:22] [PASSED] None
[09:07:22] [PASSED] PAL
[09:07:22] [PASSED] NTSC
[09:07:22] [PASSED] Both, NTSC Default
[09:07:22] [PASSED] Both, PAL Default
[09:07:22] [PASSED] Both, NTSC Default, with PAL on command-line
[09:07:22] [PASSED] Both, PAL Default, with NTSC on command-line
[09:07:22] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[09:07:22] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[09:07:22] ================== drm_rect (9 subtests) ===================
[09:07:22] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[09:07:22] [PASSED] drm_test_rect_clip_scaled_not_clipped
[09:07:22] [PASSED] drm_test_rect_clip_scaled_clipped
[09:07:22] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[09:07:22] ================= drm_test_rect_intersect =================
[09:07:22] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[09:07:22] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[09:07:22] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[09:07:22] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[09:07:22] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[09:07:22] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[09:07:22] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[09:07:22] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[09:07:22] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[09:07:22] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[09:07:22] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[09:07:22] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[09:07:22] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[09:07:22] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[09:07:22] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[09:07:22] ============= [PASSED] drm_test_rect_intersect =============
[09:07:22] ================ drm_test_rect_calc_hscale ================
[09:07:22] [PASSED] normal use
[09:07:22] [PASSED] out of max range
[09:07:22] [PASSED] out of min range
[09:07:22] [PASSED] zero dst
[09:07:22] [PASSED] negative src
[09:07:22] [PASSED] negative dst
[09:07:22] ============ [PASSED] drm_test_rect_calc_hscale ============
[09:07:22] ================ drm_test_rect_calc_vscale ================
[09:07:22] [PASSED] normal use
[09:07:22] [PASSED] out of max range
[09:07:22] [PASSED] out of min range
[09:07:22] [PASSED] zero dst
[09:07:22] [PASSED] negative src
[09:07:22] [PASSED] negative dst
[09:07:22] ============ [PASSED] drm_test_rect_calc_vscale ============
[09:07:22] ================== drm_test_rect_rotate ===================
[09:07:22] [PASSED] reflect-x
[09:07:22] [PASSED] reflect-y
[09:07:22] [PASSED] rotate-0
[09:07:22] [PASSED] rotate-90
[09:07:22] [PASSED] rotate-180
[09:07:22] [PASSED] rotate-270
[09:07:22] ============== [PASSED] drm_test_rect_rotate ===============
[09:07:22] ================ drm_test_rect_rotate_inv =================
[09:07:22] [PASSED] reflect-x
[09:07:22] [PASSED] reflect-y
[09:07:22] [PASSED] rotate-0
[09:07:22] [PASSED] rotate-90
[09:07:22] [PASSED] rotate-180
[09:07:22] [PASSED] rotate-270
[09:07:22] ============ [PASSED] drm_test_rect_rotate_inv =============
[09:07:22] ==================== [PASSED] drm_rect =====================
[09:07:22] ============ drm_sysfb_modeset_test (1 subtest) ============
[09:07:22] ============ drm_test_sysfb_build_fourcc_list =============
[09:07:22] [PASSED] no native formats
[09:07:22] [PASSED] XRGB8888 as native format
[09:07:22] [PASSED] remove duplicates
[09:07:22] [PASSED] convert alpha formats
[09:07:22] [PASSED] random formats
[09:07:22] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[09:07:22] ============= [PASSED] drm_sysfb_modeset_test ==============
[09:07:22] ================== drm_fixp (2 subtests) ===================
[09:07:22] [PASSED] drm_test_int2fixp
[09:07:22] [PASSED] drm_test_sm2fixp
[09:07:22] ==================== [PASSED] drm_fixp =====================
[09:07:22] ============================================================
[09:07:22] Testing complete. Ran 637 tests: passed: 637
[09:07:22] Elapsed time: 26.583s total, 1.811s configuring, 24.608s building, 0.139s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[09:07:22] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:07:24] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:07:34] Starting KUnit Kernel (1/1)...
[09:07:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:07:34] ================= ttm_device (5 subtests) ==================
[09:07:34] [PASSED] ttm_device_init_basic
[09:07:34] [PASSED] ttm_device_init_multiple
[09:07:34] [PASSED] ttm_device_fini_basic
[09:07:34] [PASSED] ttm_device_init_no_vma_man
[09:07:34] ================== ttm_device_init_pools ==================
[09:07:34] [PASSED] No DMA allocations, no DMA32 required
[09:07:34] [PASSED] DMA allocations, DMA32 required
[09:07:34] [PASSED] No DMA allocations, DMA32 required
[09:07:34] [PASSED] DMA allocations, no DMA32 required
[09:07:34] ============== [PASSED] ttm_device_init_pools ==============
[09:07:34] =================== [PASSED] ttm_device ====================
[09:07:34] ================== ttm_pool (8 subtests) ===================
[09:07:34] ================== ttm_pool_alloc_basic ===================
[09:07:34] [PASSED] One page
[09:07:34] [PASSED] More than one page
[09:07:34] [PASSED] Above the allocation limit
[09:07:34] [PASSED] One page, with coherent DMA mappings enabled
[09:07:34] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:07:34] ============== [PASSED] ttm_pool_alloc_basic ===============
[09:07:34] ============== ttm_pool_alloc_basic_dma_addr ==============
[09:07:34] [PASSED] One page
[09:07:34] [PASSED] More than one page
[09:07:34] [PASSED] Above the allocation limit
[09:07:34] [PASSED] One page, with coherent DMA mappings enabled
[09:07:34] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:07:34] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[09:07:34] [PASSED] ttm_pool_alloc_order_caching_match
[09:07:34] [PASSED] ttm_pool_alloc_caching_mismatch
[09:07:34] [PASSED] ttm_pool_alloc_order_mismatch
[09:07:34] [PASSED] ttm_pool_free_dma_alloc
[09:07:34] [PASSED] ttm_pool_free_no_dma_alloc
[09:07:34] [PASSED] ttm_pool_fini_basic
[09:07:34] ==================== [PASSED] ttm_pool =====================
[09:07:34] ================ ttm_resource (8 subtests) =================
[09:07:34] ================= ttm_resource_init_basic =================
[09:07:34] [PASSED] Init resource in TTM_PL_SYSTEM
[09:07:34] [PASSED] Init resource in TTM_PL_VRAM
[09:07:34] [PASSED] Init resource in a private placement
[09:07:34] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[09:07:34] ============= [PASSED] ttm_resource_init_basic =============
[09:07:34] [PASSED] ttm_resource_init_pinned
[09:07:34] [PASSED] ttm_resource_fini_basic
[09:07:34] [PASSED] ttm_resource_manager_init_basic
[09:07:34] [PASSED] ttm_resource_manager_usage_basic
[09:07:34] [PASSED] ttm_resource_manager_set_used_basic
[09:07:34] [PASSED] ttm_sys_man_alloc_basic
[09:07:34] [PASSED] ttm_sys_man_free_basic
[09:07:34] ================== [PASSED] ttm_resource ===================
[09:07:34] =================== ttm_tt (15 subtests) ===================
[09:07:34] ==================== ttm_tt_init_basic ====================
[09:07:34] [PASSED] Page-aligned size
[09:07:34] [PASSED] Extra pages requested
[09:07:34] ================ [PASSED] ttm_tt_init_basic ================
[09:07:34] [PASSED] ttm_tt_init_misaligned
[09:07:34] [PASSED] ttm_tt_fini_basic
[09:07:34] [PASSED] ttm_tt_fini_sg
[09:07:34] [PASSED] ttm_tt_fini_shmem
[09:07:34] [PASSED] ttm_tt_create_basic
[09:07:34] [PASSED] ttm_tt_create_invalid_bo_type
[09:07:34] [PASSED] ttm_tt_create_ttm_exists
[09:07:34] [PASSED] ttm_tt_create_failed
[09:07:34] [PASSED] ttm_tt_destroy_basic
[09:07:34] [PASSED] ttm_tt_populate_null_ttm
[09:07:34] [PASSED] ttm_tt_populate_populated_ttm
[09:07:34] [PASSED] ttm_tt_unpopulate_basic
[09:07:34] [PASSED] ttm_tt_unpopulate_empty_ttm
[09:07:34] [PASSED] ttm_tt_swapin_basic
[09:07:34] ===================== [PASSED] ttm_tt ======================
[09:07:34] =================== ttm_bo (14 subtests) ===================
[09:07:34] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[09:07:34] [PASSED] Cannot be interrupted and sleeps
[09:07:34] [PASSED] Cannot be interrupted, locks straight away
[09:07:34] [PASSED] Can be interrupted, sleeps
[09:07:34] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[09:07:34] [PASSED] ttm_bo_reserve_locked_no_sleep
[09:07:34] [PASSED] ttm_bo_reserve_no_wait_ticket
[09:07:34] [PASSED] ttm_bo_reserve_double_resv
[09:07:34] [PASSED] ttm_bo_reserve_interrupted
[09:07:34] [PASSED] ttm_bo_reserve_deadlock
[09:07:34] [PASSED] ttm_bo_unreserve_basic
[09:07:34] [PASSED] ttm_bo_unreserve_pinned
[09:07:34] [PASSED] ttm_bo_unreserve_bulk
[09:07:34] [PASSED] ttm_bo_fini_basic
[09:07:34] [PASSED] ttm_bo_fini_shared_resv
[09:07:34] [PASSED] ttm_bo_pin_basic
[09:07:34] [PASSED] ttm_bo_pin_unpin_resource
[09:07:34] [PASSED] ttm_bo_multiple_pin_one_unpin
[09:07:34] ===================== [PASSED] ttm_bo ======================
[09:07:34] ============== ttm_bo_validate (22 subtests) ===============
[09:07:34] ============== ttm_bo_init_reserved_sys_man ===============
[09:07:34] [PASSED] Buffer object for userspace
[09:07:34] [PASSED] Kernel buffer object
[09:07:34] [PASSED] Shared buffer object
[09:07:34] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[09:07:34] ============== ttm_bo_init_reserved_mock_man ==============
[09:07:34] [PASSED] Buffer object for userspace
[09:07:34] [PASSED] Kernel buffer object
[09:07:34] [PASSED] Shared buffer object
[09:07:34] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[09:07:34] [PASSED] ttm_bo_init_reserved_resv
[09:07:34] ================== ttm_bo_validate_basic ==================
[09:07:34] [PASSED] Buffer object for userspace
[09:07:34] [PASSED] Kernel buffer object
[09:07:34] [PASSED] Shared buffer object
[09:07:34] ============== [PASSED] ttm_bo_validate_basic ==============
[09:07:34] [PASSED] ttm_bo_validate_invalid_placement
[09:07:34] ============= ttm_bo_validate_same_placement ==============
[09:07:34] [PASSED] System manager
[09:07:34] [PASSED] VRAM manager
[09:07:34] ========= [PASSED] ttm_bo_validate_same_placement ==========
[09:07:34] [PASSED] ttm_bo_validate_failed_alloc
[09:07:34] [PASSED] ttm_bo_validate_pinned
[09:07:34] [PASSED] ttm_bo_validate_busy_placement
[09:07:34] ================ ttm_bo_validate_multihop =================
[09:07:34] [PASSED] Buffer object for userspace
[09:07:34] [PASSED] Kernel buffer object
[09:07:34] [PASSED] Shared buffer object
[09:07:34] ============ [PASSED] ttm_bo_validate_multihop =============
[09:07:34] ========== ttm_bo_validate_no_placement_signaled ==========
[09:07:34] [PASSED] Buffer object in system domain, no page vector
[09:07:34] [PASSED] Buffer object in system domain with an existing page vector
[09:07:34] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[09:07:34] ======== ttm_bo_validate_no_placement_not_signaled ========
[09:07:34] [PASSED] Buffer object for userspace
[09:07:34] [PASSED] Kernel buffer object
[09:07:34] [PASSED] Shared buffer object
[09:07:34] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[09:07:34] [PASSED] ttm_bo_validate_move_fence_signaled
[09:07:34] ========= ttm_bo_validate_move_fence_not_signaled =========
[09:07:34] [PASSED] Waits for GPU
[09:07:34] [PASSED] Tries to lock straight away
[09:07:34] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[09:07:34] [PASSED] ttm_bo_validate_swapout
[09:07:34] [PASSED] ttm_bo_validate_happy_evict
[09:07:34] [PASSED] ttm_bo_validate_all_pinned_evict
[09:07:34] [PASSED] ttm_bo_validate_allowed_only_evict
[09:07:34] [PASSED] ttm_bo_validate_deleted_evict
[09:07:34] [PASSED] ttm_bo_validate_busy_domain_evict
[09:07:34] [PASSED] ttm_bo_validate_evict_gutting
[09:07:34] [PASSED] ttm_bo_validate_recrusive_evict
[09:07:34] ================= [PASSED] ttm_bo_validate =================
[09:07:34] ============================================================
[09:07:34] Testing complete. Ran 102 tests: passed: 102
[09:07:34] Elapsed time: 12.050s total, 1.787s configuring, 10.049s building, 0.180s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[09:07:34] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:07:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:07:45] Starting KUnit Kernel (1/1)...
[09:07:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:07:45] =============== dma-buf-fence (12 subtests) ================
[09:07:45] [PASSED] test_sanitycheck
[09:07:45] [PASSED] test_signaling
[09:07:45] [PASSED] test_add_callback
[09:07:45] [PASSED] test_late_add_callback
[09:07:45] [PASSED] test_rm_callback
[09:07:45] [PASSED] test_late_rm_callback
[09:07:45] [PASSED] test_status
[09:07:45] [PASSED] test_error
[09:07:45] [PASSED] test_wait
[09:07:45] [PASSED] test_wait_timeout
[09:07:45] [PASSED] test_stub
[09:07:45] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[09:07:45] ================== [PASSED] dma-buf-fence ==================
[09:07:45] ============ dma-buf-fence-chain (11 subtests) =============
[09:07:45] [PASSED] test_sanitycheck
[09:07:45] [PASSED] test_find_seqno
[09:07:45] [PASSED] test_find_signaled
[09:07:45] [PASSED] test_find_out_of_order
[09:07:50] [PASSED] test_find_gap
[09:07:50] [PASSED] test_find_race
[09:07:50] [PASSED] test_signal_forward
[09:07:50] [PASSED] test_signal_backward
[09:07:50] [PASSED] test_wait_forward
[09:07:50] [PASSED] test_wait_backward
[09:07:50] [PASSED] test_wait_random
[09:07:50] =============== [PASSED] dma-buf-fence-chain ===============
[09:07:50] ============ dma-buf-fence-unwrap (10 subtests) ============
[09:07:50] [PASSED] test_sanitycheck
[09:07:50] [PASSED] test_unwrap_array
[09:07:50] [PASSED] test_unwrap_chain
[09:07:50] [PASSED] test_unwrap_chain_array
[09:07:50] [PASSED] test_unwrap_merge
[09:07:50] [PASSED] test_unwrap_merge_duplicate
[09:07:50] [PASSED] test_unwrap_merge_seqno
[09:07:50] [PASSED] test_unwrap_merge_order
[09:07:50] [PASSED] test_unwrap_merge_complex
[09:07:50] [PASSED] test_unwrap_merge_complex_seqno
[09:07:50] ============== [PASSED] dma-buf-fence-unwrap ===============
[09:07:50] ================ dma-buf-resv (5 subtests) =================
[09:07:50] [PASSED] test_sanitycheck
[09:07:50] ===================== test_signaling ======================
[09:07:50] [PASSED] kernel
[09:07:50] [PASSED] write
[09:07:50] [PASSED] read
[09:07:50] [PASSED] bookkeep
[09:07:50] ================= [PASSED] test_signaling ==================
[09:07:50] ====================== test_for_each ======================
[09:07:50] [PASSED] kernel
[09:07:50] [PASSED] write
[09:07:50] [PASSED] read
[09:07:50] [PASSED] bookkeep
[09:07:50] ================== [PASSED] test_for_each ==================
[09:07:50] ================= test_for_each_unlocked ==================
[09:07:50] [PASSED] kernel
[09:07:50] [PASSED] write
[09:07:50] [PASSED] read
[09:07:50] [PASSED] bookkeep
[09:07:50] ============= [PASSED] test_for_each_unlocked ==============
[09:07:50] ===================== test_get_fences =====================
[09:07:50] [PASSED] kernel
[09:07:50] [PASSED] write
[09:07:50] [PASSED] read
[09:07:50] [PASSED] bookkeep
[09:07:50] ================= [PASSED] test_get_fences =================
[09:07:50] ================== [PASSED] dma-buf-resv ===================
[09:07:50] ============================================================
[09:07:50] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[09:07:50] Elapsed time: 15.848s total, 1.813s configuring, 8.664s building, 5.366s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/display: Add command line param for DC balance
2026-08-28 8:50 [PATCH v1] drm/i915/display: Add command line param for DC balance Mitul Golani
` (2 preceding siblings ...)
2026-08-28 9:07 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-08-28 9:46 ` Patchwork
2026-08-28 10:15 ` [PATCH v1] " Borah, Chaitanya Kumar
` (2 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-08-28 9:46 UTC (permalink / raw)
To: Mitul Golani; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 878 bytes --]
== Series Details ==
Series: drm/i915/display: Add command line param for DC balance
URL : https://patchwork.freedesktop.org/series/172945/
State : success
== Summary ==
CI Bug Log - changes from xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832_BAT -> xe-pw-172945v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832 -> xe-pw-172945v1
IGT_9078: 9078
xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832: 5901f93eb5a007e8b7c21ca2b5bfae5958467832
xe-pw-172945v1: 172945v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/index.html
[-- Attachment #2: Type: text/html, Size: 1426 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1] drm/i915/display: Add command line param for DC balance
2026-08-28 8:50 [PATCH v1] drm/i915/display: Add command line param for DC balance Mitul Golani
` (3 preceding siblings ...)
2026-08-28 9:46 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-08-28 10:15 ` Borah, Chaitanya Kumar
2026-09-04 5:53 ` Golani, Mitulkumar Ajitkumar
2026-08-28 11:00 ` ✓ Xe.CI.FULL: success for " Patchwork
2026-09-04 8:28 ` [PATCH v1] " Jani Nikula
6 siblings, 1 reply; 10+ messages in thread
From: Borah, Chaitanya Kumar @ 2026-08-28 10:15 UTC (permalink / raw)
To: Mitul Golani, intel-gfx; +Cc: intel-xe, ankit.k.nautiyal
On 8/28/2026 2:20 PM, Mitul Golani wrote:
> Add a new module parameter 'enable_dc_balance' to allow enabling or
> disabling the VRR DC balance feature at runtime. The DC balance
> computation in intel_vrr_dc_balance_compute_config() now honours this
> parameter, so the feature can be toggled without recompiling.
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_vrr.c | 4 +++-
> 3 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 2aed110c5b09..ed3aa84c5d43 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -120,6 +120,9 @@ intel_display_param_named_unsafe(enable_psr, int, 0400,
> "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> "Default: -1 (use per-chip default)");
>
> +intel_display_param_named_unsafe(enable_dc_balance, int, 0400,
> + "Enable DC Balance (0=disabled, 1=enable). Default: 1 (use per-chip default)");
> +
> intel_display_param_named_unsafe(enable_panel_replay, int, 0400,
> "Enable Panel Replay (0=disabled, 1=enabled). Default: -1 (use per-chip default)");
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index b95ecf728daa..8c28c27e2c46 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -46,6 +46,7 @@ struct drm_printer;
> param(bool, enable_dp_mst, true, 0600) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> + param(int, enable_dc_balance, false, 0600) \
You mean true?
> param(int, enable_panel_replay, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> param(bool, enable_psr2_sel_fetch, true, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index e36db1174440..1698c54e258b 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -439,10 +439,12 @@ static bool intel_vrr_dc_balance_possible(const struct intel_crtc_state *crtc_st
> static void
> intel_vrr_dc_balance_compute_config(struct intel_crtc_state *crtc_state)
> {
> + struct intel_display *display = to_intel_display(crtc_state);
> int guardband_usec, adjustment_usec;
> struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>
> - if (!intel_vrr_dc_balance_possible(crtc_state) || !crtc_state->vrr.enable)
> + if (!intel_vrr_dc_balance_possible(crtc_state) ||
> + !crtc_state->vrr.enable || !display->params.enable_dc_balance)
> return;
>
> crtc_state->vrr.dc_balance.vmax = crtc_state->vrr.vmax;
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.FULL: success for drm/i915/display: Add command line param for DC balance
2026-08-28 8:50 [PATCH v1] drm/i915/display: Add command line param for DC balance Mitul Golani
` (4 preceding siblings ...)
2026-08-28 10:15 ` [PATCH v1] " Borah, Chaitanya Kumar
@ 2026-08-28 11:00 ` Patchwork
2026-09-04 8:28 ` [PATCH v1] " Jani Nikula
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-08-28 11:00 UTC (permalink / raw)
To: Mitul Golani; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 31479 bytes --]
== Series Details ==
Series: drm/i915/display: Add command line param for DC balance
URL : https://patchwork.freedesktop.org/series/172945/
State : success
== Summary ==
CI Bug Log - changes from xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832_FULL -> xe-pw-172945v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-172945v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-bmg: [PASS][1] -> [FAIL][2] ([Intel XE#3718] / [Intel XE#6078]) +1 other test fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-lnl: NOTRUN -> [SKIP][3] ([Intel XE#1407])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0:
- shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#1124])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#1124]) +3 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_bw@connected-linear-tiling-2-displays-target-1920x1080p:
- shard-lnl: NOTRUN -> [SKIP][6] ([Intel XE#7679])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_bw@connected-linear-tiling-2-displays-target-1920x1080p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2887]) +3 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-7/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#2887])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-dp-2:
- shard-bmg: [PASS][9] -> [INCOMPLETE][10] ([Intel XE#7084] / [Intel XE#8150])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-dp-2.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-dp-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#3432])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
* igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#7358])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d.html
* igt@kms_chamelium_edid@dp-edid-resolution-list:
- shard-lnl: NOTRUN -> [SKIP][13] ([Intel XE#373])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_chamelium_edid@dp-edid-resolution-list.html
* igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#2252])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-0:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#6969]) +10 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-0.html
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#6969] / [Intel XE#7006]) +1 other test skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2.html
* igt@kms_content_protection@uevent:
- shard-bmg: NOTRUN -> [FAIL][17] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-7/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-onscreen-32x10:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2320])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-7/igt@kms_cursor_crc@cursor-onscreen-32x10.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2321] / [Intel XE#7355])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [PASS][20] -> [FAIL][21] ([Intel XE#7809])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#4354] / [Intel XE#7386])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dsc@dsc-with-formats:
- shard-lnl: NOTRUN -> [SKIP][23] ([Intel XE#8265])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_dsc@dsc-with-formats.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc-bigjoiner:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#8265]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_dsc@dsc-with-output-formats-with-bpc-bigjoiner.html
* igt@kms_feature_discovery@display-4x:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#1138] / [Intel XE#7344])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_feature_discovery@display-4x.html
* igt@kms_flip@2x-plain-flip-ts-check-interruptible:
- shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#1421])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [PASS][27] -> [FAIL][28] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#7178] / [Intel XE#7349])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#7178] / [Intel XE#7349])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#7178] / [Intel XE#7351])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-onoff:
- shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#656] / [Intel XE#7905]) +3 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-render:
- shard-lnl: NOTRUN -> [SKIP][35] ([Intel XE#7061] / [Intel XE#7356])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2311]) +14 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-shrfb-scaledprimary:
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#6312] / [Intel XE#651]) +1 other test skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_frontbuffer_tracking@drrs-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#4141]) +2 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-move:
- shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#6312]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#7399])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-pri-shrfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#2313]) +15 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-render:
- shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#7061])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-render.html
* igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-indfb-msflip-blt:
- shard-lnl: NOTRUN -> [SKIP][43] ([Intel XE#7905]) +6 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@plane-fbc-rte:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2350] / [Intel XE#7503])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_frontbuffer_tracking@plane-fbc-rte.html
* igt@kms_frontbuffer_tracking@psrhdr-suspend:
- shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#7865]) +5 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_frontbuffer_tracking@psrhdr-suspend.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#4298] / [Intel XE#5873])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#6911] / [Intel XE#7378])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_plane@pixel-format-yf-tiled-ccs-modifier:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#7283])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier.html
* igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#8076])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y.html
* igt@kms_plane_lowres@tiling-y:
- shard-lnl: NOTRUN -> [SKIP][50] ([Intel XE#599])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_multiple@2x-tiling-x:
- shard-lnl: NOTRUN -> [SKIP][51] ([Intel XE#4596] / [Intel XE#5854])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_plane_multiple@2x-tiling-x.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-lnl: NOTRUN -> [SKIP][52] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_dc@dc3co-vpb-simulation@psr2-yuv420:
- shard-lnl: NOTRUN -> [SKIP][53] ([Intel XE#8396]) +1 other test skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_pm_dc@dc3co-vpb-simulation@psr2-yuv420.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#1489]) +2 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@psr2-suspend:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#2234] / [Intel XE#2850]) +4 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_psr@psr2-suspend.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#1127] / [Intel XE#5813])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_rotation_crc@sprite-rotation-90:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#3904] / [Intel XE#7342])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_rotation_crc@sprite-rotation-90.html
* igt@kms_sharpness_filter@invalid-filter-with-scaler:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#6503])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@kms_sharpness_filter@invalid-filter-with-scaler.html
* igt@sriov_basic@pf-unbind-with-vf-probed:
- shard-bmg: NOTRUN -> [ABORT][59] ([Intel XE#8868])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@sriov_basic@pf-unbind-with-vf-probed.html
* igt@xe_evict@evict-beng-mixed-threads-large:
- shard-lnl: NOTRUN -> [SKIP][60] ([Intel XE#6540] / [Intel XE#688])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@xe_evict@evict-beng-mixed-threads-large.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [PASS][61] -> [INCOMPLETE][62] ([Intel XE#6321] / [Intel XE#8355])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832/shard-bmg-1/igt@xe_evict@evict-mixed-many-threads-small.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-3/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_exec_balancer@once-cm-parallel-userptr:
- shard-lnl: NOTRUN -> [SKIP][63] ([Intel XE#7482]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@xe_exec_balancer@once-cm-parallel-userptr.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
- shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html
* igt@xe_exec_fault_mode@many-execqueues-multi-queue-imm:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#8374]) +2 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@xe_exec_fault_mode@many-execqueues-multi-queue-imm.html
* igt@xe_exec_fault_mode@twice-multi-queue-rebind-prefetch:
- shard-lnl: NOTRUN -> [SKIP][66] ([Intel XE#8374]) +1 other test skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@xe_exec_fault_mode@twice-multi-queue-rebind-prefetch.html
* igt@xe_exec_multi_queue@few-execs-preempt-mode-basic-smem:
- shard-lnl: NOTRUN -> [SKIP][67] ([Intel XE#8364]) +4 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@xe_exec_multi_queue@few-execs-preempt-mode-basic-smem.html
* igt@xe_exec_multi_queue@two-queues-priority:
- shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#8364]) +6 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@xe_exec_multi_queue@two-queues-priority.html
* igt@xe_exec_reset@gt-stress-reset-mixed-engine-usage:
- shard-bmg: [PASS][69] -> [INCOMPLETE][70] ([Intel XE#9041])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832/shard-bmg-7/igt@xe_exec_reset@gt-stress-reset-mixed-engine-usage.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-10/igt@xe_exec_reset@gt-stress-reset-mixed-engine-usage.html
* igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-rebind:
- shard-bmg: NOTRUN -> [SKIP][71] ([Intel XE#8378]) +1 other test skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-7/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-rebind.html
* igt@xe_exec_threads@threads-multi-queue-userptr-rebind:
- shard-lnl: NOTRUN -> [SKIP][72] ([Intel XE#8378]) +1 other test skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@xe_exec_threads@threads-multi-queue-userptr-rebind.html
* igt@xe_gt_freq@freq_suspend:
- shard-lnl: NOTRUN -> [SKIP][73] ([Intel XE#584] / [Intel XE#7369])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@xe_gt_freq@freq_suspend.html
* igt@xe_multigpu_svm@mgpu-pagefault-prefetch:
- shard-lnl: NOTRUN -> [SKIP][74] ([Intel XE#6964])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@xe_multigpu_svm@mgpu-pagefault-prefetch.html
* igt@xe_pat@l2-flush-opt-svm-pat-restrict:
- shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#7590] / [Intel XE#7772])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@xe_pat@l2-flush-opt-svm-pat-restrict.html
* igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_render0:
- shard-bmg: [PASS][76] -> [FAIL][77] ([Intel XE#8555])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832/shard-bmg-3/igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_render0.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-1/igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_render0.html
* igt@xe_prefetch_fault@prefetch-fault-svm:
- shard-bmg: NOTRUN -> [SKIP][78] ([Intel XE#7599])
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-7/igt@xe_prefetch_fault@prefetch-fault-svm.html
* igt@xe_pxp@regular-src-to-pxp-dest-rendercopy:
- shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#4733] / [Intel XE#7417])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-7/igt@xe_pxp@regular-src-to-pxp-dest-rendercopy.html
* igt@xe_query@multigpu-query-uc-fw-version-huc:
- shard-bmg: NOTRUN -> [SKIP][80] ([Intel XE#944])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@xe_query@multigpu-query-uc-fw-version-huc.html
* igt@xe_sriov_admin@default-sched-attributes-vfs-disabled:
- shard-lnl: NOTRUN -> [SKIP][81] ([Intel XE#7174])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@xe_sriov_admin@default-sched-attributes-vfs-disabled.html
* igt@xe_sriov_scheduling@equal-throughput-normal-priority:
- shard-lnl: NOTRUN -> [SKIP][82] ([Intel XE#8339])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-6/igt@xe_sriov_scheduling@equal-throughput-normal-priority.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [FAIL][83] ([Intel XE#301]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][85] ([Intel XE#1503]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-7/igt@kms_hdr@invalid-hdr.html
* igt@xe_configfs@gt-types-allowed:
- shard-bmg: [ABORT][87] ([Intel XE#8007]) -> [PASS][88] +1 other test pass
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832/shard-bmg-8/igt@xe_configfs@gt-types-allowed.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-8/igt@xe_configfs@gt-types-allowed.html
* igt@xe_exec_system_allocator@many-stride-mmap-remap-ro-eocheck:
- shard-bmg: [ABORT][89] -> [PASS][90]
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832/shard-bmg-5/igt@xe_exec_system_allocator@many-stride-mmap-remap-ro-eocheck.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-7/igt@xe_exec_system_allocator@many-stride-mmap-remap-ro-eocheck.html
* igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_video_enhance0:
- shard-bmg: [FAIL][91] ([Intel XE#8555]) -> [PASS][92] +4 other tests pass
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832/shard-bmg-3/igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_video_enhance0.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/shard-bmg-1/igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_video_enhance0.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2350
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
[Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873
[Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
[Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
[Intel XE#7006]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7006
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
[Intel XE#7174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7174
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7344]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7344
[Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7378
[Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
[Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7503
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#7772]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7772
[Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8076]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8076
[Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8339
[Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
[Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
[Intel XE#8555]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8555
[Intel XE#8868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8868
[Intel XE#9041]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9041
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832 -> xe-pw-172945v1
IGT_9078: 9078
xe-5659-5901f93eb5a007e8b7c21ca2b5bfae5958467832: 5901f93eb5a007e8b7c21ca2b5bfae5958467832
xe-pw-172945v1: 172945v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172945v1/index.html
[-- Attachment #2: Type: text/html, Size: 35124 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH v1] drm/i915/display: Add command line param for DC balance
2026-08-28 10:15 ` [PATCH v1] " Borah, Chaitanya Kumar
@ 2026-09-04 5:53 ` Golani, Mitulkumar Ajitkumar
2026-09-04 8:44 ` Jani Nikula
0 siblings, 1 reply; 10+ messages in thread
From: Golani, Mitulkumar Ajitkumar @ 2026-09-04 5:53 UTC (permalink / raw)
To: Borah, Chaitanya Kumar, intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, Nautiyal, Ankit K
> -----Original Message-----
> From: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com>
> Sent: 28 August 2026 15:46
> To: Golani, Mitulkumar Ajitkumar <mitulkumar.ajitkumar.golani@intel.com>;
> intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org; Nautiyal, Ankit K
> <ankit.k.nautiyal@intel.com>
> Subject: Re: [PATCH v1] drm/i915/display: Add command line param for DC
> balance
>
>
>
> On 8/28/2026 2:20 PM, Mitul Golani wrote:
> > Add a new module parameter 'enable_dc_balance' to allow enabling or
> > disabling the VRR DC balance feature at runtime. The DC balance
> > computation in intel_vrr_dc_balance_compute_config() now honours this
> > parameter, so the feature can be toggled without recompiling.
> >
> > Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> > drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> > drivers/gpu/drm/i915/display/intel_vrr.c | 4 +++-
> > 3 files changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > index 2aed110c5b09..ed3aa84c5d43 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > @@ -120,6 +120,9 @@ intel_display_param_named_unsafe(enable_psr, int,
> 0400,
> > "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> > "Default: -1 (use per-chip default)");
> >
> > +intel_display_param_named_unsafe(enable_dc_balance, int, 0400,
> > + "Enable DC Balance (0=disabled, 1=enable). Default: 1 (use per-chip
> > +default)");
> > +
> > intel_display_param_named_unsafe(enable_panel_replay, int, 0400,
> > "Enable Panel Replay (0=disabled, 1=enabled). Default: -1 (use
> > per-chip default)");
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> > b/drivers/gpu/drm/i915/display/intel_display_params.h
> > index b95ecf728daa..8c28c27e2c46 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> > @@ -46,6 +46,7 @@ struct drm_printer;
> > param(bool, enable_dp_mst, true, 0600) \
> > param(int, enable_fbc, -1, 0600) \
> > param(int, enable_psr, -1, 0600) \
> > + param(int, enable_dc_balance, false, 0600) \
>
> You mean true?
Yes should be true by default. I will update in next revision.
Thanks
>
> > param(int, enable_panel_replay, -1, 0600) \
> > param(bool, psr_safest_params, false, 0400) \
> > param(bool, enable_psr2_sel_fetch, true, 0400) \ diff --git
> > a/drivers/gpu/drm/i915/display/intel_vrr.c
> > b/drivers/gpu/drm/i915/display/intel_vrr.c
> > index e36db1174440..1698c54e258b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> > @@ -439,10 +439,12 @@ static bool intel_vrr_dc_balance_possible(const
> struct intel_crtc_state *crtc_st
> > static void
> > intel_vrr_dc_balance_compute_config(struct intel_crtc_state *crtc_state)
> > {
> > + struct intel_display *display = to_intel_display(crtc_state);
> > int guardband_usec, adjustment_usec;
> > struct drm_display_mode *adjusted_mode =
> > &crtc_state->hw.adjusted_mode;
> >
> > - if (!intel_vrr_dc_balance_possible(crtc_state) || !crtc_state-
> >vrr.enable)
> > + if (!intel_vrr_dc_balance_possible(crtc_state) ||
> > + !crtc_state->vrr.enable || !display->params.enable_dc_balance)
> > return;
> >
> > crtc_state->vrr.dc_balance.vmax = crtc_state->vrr.vmax;
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1] drm/i915/display: Add command line param for DC balance
2026-08-28 8:50 [PATCH v1] drm/i915/display: Add command line param for DC balance Mitul Golani
` (5 preceding siblings ...)
2026-08-28 11:00 ` ✓ Xe.CI.FULL: success for " Patchwork
@ 2026-09-04 8:28 ` Jani Nikula
6 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2026-09-04 8:28 UTC (permalink / raw)
To: Mitul Golani, intel-gfx; +Cc: intel-xe, ankit.k.nautiyal
On Fri, 28 Aug 2026, Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> wrote:
> Add a new module parameter 'enable_dc_balance' to allow enabling or
> disabling the VRR DC balance feature at runtime. The DC balance
> computation in intel_vrr_dc_balance_compute_config() now honours this
> parameter, so the feature can be toggled without recompiling.
Why? Everything in the commit message above is obvious, and can be
trivially deduced from the code changes, but I'm none the wiser why this
change is needed.
Also, what's the specific need for this to be a module parameter? No new
module parameters should be added without strong justification. Could
this be a debugfs knob instead?
Module parameters are, as the name suggests, per module, not per device.
BR,
Jani.
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_vrr.c | 4 +++-
> 3 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 2aed110c5b09..ed3aa84c5d43 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -120,6 +120,9 @@ intel_display_param_named_unsafe(enable_psr, int, 0400,
> "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> "Default: -1 (use per-chip default)");
>
> +intel_display_param_named_unsafe(enable_dc_balance, int, 0400,
> + "Enable DC Balance (0=disabled, 1=enable). Default: 1 (use per-chip default)");
> +
> intel_display_param_named_unsafe(enable_panel_replay, int, 0400,
> "Enable Panel Replay (0=disabled, 1=enabled). Default: -1 (use per-chip default)");
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index b95ecf728daa..8c28c27e2c46 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -46,6 +46,7 @@ struct drm_printer;
> param(bool, enable_dp_mst, true, 0600) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> + param(int, enable_dc_balance, false, 0600) \
> param(int, enable_panel_replay, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> param(bool, enable_psr2_sel_fetch, true, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index e36db1174440..1698c54e258b 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -439,10 +439,12 @@ static bool intel_vrr_dc_balance_possible(const struct intel_crtc_state *crtc_st
> static void
> intel_vrr_dc_balance_compute_config(struct intel_crtc_state *crtc_state)
> {
> + struct intel_display *display = to_intel_display(crtc_state);
> int guardband_usec, adjustment_usec;
> struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>
> - if (!intel_vrr_dc_balance_possible(crtc_state) || !crtc_state->vrr.enable)
> + if (!intel_vrr_dc_balance_possible(crtc_state) ||
> + !crtc_state->vrr.enable || !display->params.enable_dc_balance)
> return;
>
> crtc_state->vrr.dc_balance.vmax = crtc_state->vrr.vmax;
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH v1] drm/i915/display: Add command line param for DC balance
2026-09-04 5:53 ` Golani, Mitulkumar Ajitkumar
@ 2026-09-04 8:44 ` Jani Nikula
0 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2026-09-04 8:44 UTC (permalink / raw)
To: Golani, Mitulkumar Ajitkumar, Borah, Chaitanya Kumar,
intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, Nautiyal, Ankit K
On Fri, 04 Sep 2026, "Golani, Mitulkumar Ajitkumar" <mitulkumar.ajitkumar.golani@intel.com> wrote:
>> -----Original Message-----
>> From: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com>
>> Sent: 28 August 2026 15:46
>> To: Golani, Mitulkumar Ajitkumar <mitulkumar.ajitkumar.golani@intel.com>;
>> intel-gfx@lists.freedesktop.org
>> Cc: intel-xe@lists.freedesktop.org; Nautiyal, Ankit K
>> <ankit.k.nautiyal@intel.com>
>> Subject: Re: [PATCH v1] drm/i915/display: Add command line param for DC
>> balance
>>
>>
>>
>> On 8/28/2026 2:20 PM, Mitul Golani wrote:
>> > Add a new module parameter 'enable_dc_balance' to allow enabling or
>> > disabling the VRR DC balance feature at runtime. The DC balance
>> > computation in intel_vrr_dc_balance_compute_config() now honours this
>> > parameter, so the feature can be toggled without recompiling.
>> >
>> > Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
>> > ---
>> > drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
>> > drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
>> > drivers/gpu/drm/i915/display/intel_vrr.c | 4 +++-
>> > 3 files changed, 7 insertions(+), 1 deletion(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
>> > b/drivers/gpu/drm/i915/display/intel_display_params.c
>> > index 2aed110c5b09..ed3aa84c5d43 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
>> > @@ -120,6 +120,9 @@ intel_display_param_named_unsafe(enable_psr, int,
>> 0400,
>> > "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
>> > "Default: -1 (use per-chip default)");
>> >
>> > +intel_display_param_named_unsafe(enable_dc_balance, int, 0400,
>> > + "Enable DC Balance (0=disabled, 1=enable). Default: 1 (use per-chip
>> > +default)");
>> > +
>> > intel_display_param_named_unsafe(enable_panel_replay, int, 0400,
>> > "Enable Panel Replay (0=disabled, 1=enabled). Default: -1 (use
>> > per-chip default)");
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
>> > b/drivers/gpu/drm/i915/display/intel_display_params.h
>> > index b95ecf728daa..8c28c27e2c46 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_display_params.h
>> > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
>> > @@ -46,6 +46,7 @@ struct drm_printer;
>> > param(bool, enable_dp_mst, true, 0600) \
>> > param(int, enable_fbc, -1, 0600) \
>> > param(int, enable_psr, -1, 0600) \
>> > + param(int, enable_dc_balance, false, 0600) \
>>
>> You mean true?
>
> Yes should be true by default. I will update in next revision.
My comment on the rationale of the whole module parameter is more
important, but if we end up with this, the parameter types and values
need to match, i.e. int and integers, bool and true/false.
BR,
Jani.
>
> Thanks
>
>>
>> > param(int, enable_panel_replay, -1, 0600) \
>> > param(bool, psr_safest_params, false, 0400) \
>> > param(bool, enable_psr2_sel_fetch, true, 0400) \ diff --git
>> > a/drivers/gpu/drm/i915/display/intel_vrr.c
>> > b/drivers/gpu/drm/i915/display/intel_vrr.c
>> > index e36db1174440..1698c54e258b 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>> > @@ -439,10 +439,12 @@ static bool intel_vrr_dc_balance_possible(const
>> struct intel_crtc_state *crtc_st
>> > static void
>> > intel_vrr_dc_balance_compute_config(struct intel_crtc_state *crtc_state)
>> > {
>> > + struct intel_display *display = to_intel_display(crtc_state);
>> > int guardband_usec, adjustment_usec;
>> > struct drm_display_mode *adjusted_mode =
>> > &crtc_state->hw.adjusted_mode;
>> >
>> > - if (!intel_vrr_dc_balance_possible(crtc_state) || !crtc_state-
>> >vrr.enable)
>> > + if (!intel_vrr_dc_balance_possible(crtc_state) ||
>> > + !crtc_state->vrr.enable || !display->params.enable_dc_balance)
>> > return;
>> >
>> > crtc_state->vrr.dc_balance.vmax = crtc_state->vrr.vmax;
>
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 10+ messages in thread
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2026-08-28 8:50 [PATCH v1] drm/i915/display: Add command line param for DC balance Mitul Golani
2026-08-28 9:06 ` ✗ CI.checkpatch: warning for " Patchwork
2026-08-28 9:07 ` [PATCH v1] " sashiko-bot
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2026-08-28 10:15 ` [PATCH v1] " Borah, Chaitanya Kumar
2026-09-04 5:53 ` Golani, Mitulkumar Ajitkumar
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