* [PATCH v4 0/2] drm/xe: drm/xe: Separate out GuC RC code
@ 2025-12-23 8:51 Vinay Belgaumkar
2025-12-23 8:51 ` [PATCH v4 1/2] drm/xe: Decouple GuC RC code from xe_guc_pc Vinay Belgaumkar
` (5 more replies)
0 siblings, 6 replies; 10+ messages in thread
From: Vinay Belgaumkar @ 2025-12-23 8:51 UTC (permalink / raw)
To: intel-xe; +Cc: Vinay Belgaumkar
This allows us to independently toggle GuC RC feature.
v2: Address review comments (Michal W)
v3: Add info about guc_rc, guc_pc and gtidle interaction (Michal W)
v4: Address remaining comments from v3 (Michal W)
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Vinay Belgaumkar (2):
drm/xe: Decouple GuC RC code from xe_guc_pc
drm/xe: Add a wrapper for set/unset params
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_gt.c | 1 -
drivers/gpu/drm/xe/xe_guc.c | 6 ++
drivers/gpu/drm/xe/xe_guc_pc.c | 108 +++++++--------------
drivers/gpu/drm/xe/xe_guc_pc.h | 3 +-
drivers/gpu/drm/xe/xe_guc_rc.c | 165 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_rc.h | 18 ++++
drivers/gpu/drm/xe/xe_oa.c | 9 +-
drivers/gpu/drm/xe/xe_uc.c | 10 +-
drivers/gpu/drm/xe/xe_uc.h | 1 -
10 files changed, 232 insertions(+), 90 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_guc_rc.c
create mode 100644 drivers/gpu/drm/xe/xe_guc_rc.h
--
2.38.1
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v4 1/2] drm/xe: Decouple GuC RC code from xe_guc_pc
2025-12-23 8:51 [PATCH v4 0/2] drm/xe: drm/xe: Separate out GuC RC code Vinay Belgaumkar
@ 2025-12-23 8:51 ` Vinay Belgaumkar
2026-01-07 5:50 ` Riana Tauro
2025-12-23 8:51 ` [PATCH v4 2/2] drm/xe: Add a wrapper for set/unset params Vinay Belgaumkar
` (4 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Vinay Belgaumkar @ 2025-12-23 8:51 UTC (permalink / raw)
To: intel-xe; +Cc: Vinay Belgaumkar
Move enable/disable GuC RC logic into the new file. This will
allow us to independently enable/disable GuC RC and not rely
on SLPC related functions. GuC already provides separate H2G
interfaces to setup GuC RC and SLPC.
v2: Comments (Michal W), remove duplicate c6_enable calls from
xe_guc_pc.
v3: Clarify crosss interactions between xe_guc_rc and xe_guc_pc
(Michal W)
v4: More comments (Michal W)
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_gt.c | 1 -
drivers/gpu/drm/xe/xe_guc.c | 6 ++
drivers/gpu/drm/xe/xe_guc_pc.c | 68 +++-------------
drivers/gpu/drm/xe/xe_guc_pc.h | 1 -
drivers/gpu/drm/xe/xe_guc_rc.c | 139 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_rc.h | 15 ++++
drivers/gpu/drm/xe/xe_uc.c | 10 +--
drivers/gpu/drm/xe/xe_uc.h | 1 -
9 files changed, 178 insertions(+), 64 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_guc_rc.c
create mode 100644 drivers/gpu/drm/xe/xe_guc_rc.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 89dc48cd73e2..928fdb925c13 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -74,6 +74,7 @@ xe-y += xe_bb.o \
xe_guc_log.o \
xe_guc_pagefault.o \
xe_guc_pc.o \
+ xe_guc_rc.o \
xe_guc_submit.o \
xe_guc_tlb_inval.o \
xe_heci_gsc.o \
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 313ce83ab0e5..9ee328aa6579 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -822,7 +822,6 @@ static void gt_reset_worker(struct work_struct *w)
if (IS_SRIOV_PF(gt_to_xe(gt)))
xe_gt_sriov_pf_stop_prepare(gt);
- xe_uc_gucrc_disable(>->uc);
xe_uc_stop_prepare(>->uc);
xe_pagefault_reset(gt_to_xe(gt), gt);
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 44360437beeb..beac4050c4dc 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -35,6 +35,7 @@
#include "xe_guc_klv_helpers.h"
#include "xe_guc_log.h"
#include "xe_guc_pc.h"
+#include "xe_guc_rc.h"
#include "xe_guc_relay.h"
#include "xe_guc_submit.h"
#include "xe_memirq.h"
@@ -869,6 +870,10 @@ int xe_guc_init_post_hwconfig(struct xe_guc *guc)
if (ret)
return ret;
+ ret = xe_guc_rc_init(guc);
+ if (ret)
+ return ret;
+
ret = xe_guc_engine_activity_init(guc);
if (ret)
return ret;
@@ -1609,6 +1614,7 @@ void xe_guc_stop_prepare(struct xe_guc *guc)
if (!IS_SRIOV_VF(guc_to_xe(guc))) {
int err;
+ xe_guc_rc_disable(guc);
err = xe_guc_pc_stop(&guc->pc);
xe_gt_WARN(guc_to_gt(guc), err, "Failed to stop GuC PC: %pe\n",
ERR_PTR(err));
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
index 54702a0fd05b..3e7173130066 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.c
+++ b/drivers/gpu/drm/xe/xe_guc_pc.c
@@ -92,6 +92,17 @@
* Render-C states is also a GuC PC feature that is now enabled in Xe for
* all platforms.
*
+ * Implementation details:
+ * -----------------------
+ * The implementation for GuC Power Management features is split as follows:
+ *
+ * xe_guc_rc: Logic for handling GuC RC
+ * xe_gt_idle: Host side logic for RC6 and Coarse Power gating (CPG)
+ * xe_guc_pc: Logic for all other SLPC related features
+ *
+ * There is some cross interaction between these where host C6 will need to be
+ * enabled when we plan to skip GuC RC. Also, the GuC RC mode is currently
+ * overridden through 0x3003 which is an SLPC H2G call.
*/
static struct xe_guc *pc_to_guc(struct xe_guc_pc *pc)
@@ -253,22 +264,6 @@ static int pc_action_unset_param(struct xe_guc_pc *pc, u8 id)
return ret;
}
-static int pc_action_setup_gucrc(struct xe_guc_pc *pc, u32 mode)
-{
- struct xe_guc_ct *ct = pc_to_ct(pc);
- u32 action[] = {
- GUC_ACTION_HOST2GUC_SETUP_PC_GUCRC,
- mode,
- };
- int ret;
-
- ret = xe_guc_ct_send(ct, action, ARRAY_SIZE(action), 0, 0);
- if (ret && !(xe_device_wedged(pc_to_xe(pc)) && ret == -ECANCELED))
- xe_gt_err(pc_to_gt(pc), "GuC RC enable mode=%u failed: %pe\n",
- mode, ERR_PTR(ret));
- return ret;
-}
-
static u32 decode_freq(u32 raw)
{
return DIV_ROUND_CLOSEST(raw * GT_FREQUENCY_MULTIPLIER,
@@ -1050,30 +1045,6 @@ int xe_guc_pc_restore_stashed_freq(struct xe_guc_pc *pc)
return ret;
}
-/**
- * xe_guc_pc_gucrc_disable - Disable GuC RC
- * @pc: Xe_GuC_PC instance
- *
- * Disables GuC RC by taking control of RC6 back from GuC.
- *
- * Return: 0 on success, negative error code on error.
- */
-int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc)
-{
- struct xe_device *xe = pc_to_xe(pc);
- struct xe_gt *gt = pc_to_gt(pc);
- int ret = 0;
-
- if (xe->info.skip_guc_pc)
- return 0;
-
- ret = pc_action_setup_gucrc(pc, GUCRC_HOST_CONTROL);
- if (ret)
- return ret;
-
- return xe_gt_idle_disable_c6(gt);
-}
-
/**
* xe_guc_pc_override_gucrc_mode - override GUCRC mode
* @pc: Xe_GuC_PC instance
@@ -1217,9 +1188,6 @@ int xe_guc_pc_start(struct xe_guc_pc *pc)
return -ETIMEDOUT;
if (xe->info.skip_guc_pc) {
- if (xe->info.platform != XE_PVC)
- xe_gt_idle_enable_c6(gt);
-
/* Request max possible since dynamic freq mgmt is not enabled */
pc_set_cur_freq(pc, UINT_MAX);
return 0;
@@ -1257,15 +1225,6 @@ int xe_guc_pc_start(struct xe_guc_pc *pc)
if (ret)
return ret;
- if (xe->info.platform == XE_PVC) {
- xe_guc_pc_gucrc_disable(pc);
- return 0;
- }
-
- ret = pc_action_setup_gucrc(pc, GUCRC_FIRMWARE_CONTROL);
- if (ret)
- return ret;
-
/* Enable SLPC Optimized Strategy for compute */
ret = pc_action_set_strategy(pc, SLPC_OPTIMIZED_STRATEGY_COMPUTE);
@@ -1285,10 +1244,8 @@ int xe_guc_pc_stop(struct xe_guc_pc *pc)
{
struct xe_device *xe = pc_to_xe(pc);
- if (xe->info.skip_guc_pc) {
- xe_gt_idle_disable_c6(pc_to_gt(pc));
+ if (xe->info.skip_guc_pc)
return 0;
- }
mutex_lock(&pc->freq_lock);
pc->freq_ready = false;
@@ -1310,7 +1267,6 @@ static void xe_guc_pc_fini_hw(void *arg)
return;
CLASS(xe_force_wake, fw_ref)(gt_to_fw(pc_to_gt(pc)), XE_FORCEWAKE_ALL);
- xe_guc_pc_gucrc_disable(pc);
XE_WARN_ON(xe_guc_pc_stop(pc));
/* Bind requested freq to mert_freq_cap before unload */
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.h b/drivers/gpu/drm/xe/xe_guc_pc.h
index 0e31396f103c..1b95873b262e 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.h
+++ b/drivers/gpu/drm/xe/xe_guc_pc.h
@@ -15,7 +15,6 @@ struct drm_printer;
int xe_guc_pc_init(struct xe_guc_pc *pc);
int xe_guc_pc_start(struct xe_guc_pc *pc);
int xe_guc_pc_stop(struct xe_guc_pc *pc);
-int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc);
int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode);
int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc);
void xe_guc_pc_print(struct xe_guc_pc *pc, struct drm_printer *p);
diff --git a/drivers/gpu/drm/xe/xe_guc_rc.c b/drivers/gpu/drm/xe/xe_guc_rc.c
new file mode 100644
index 000000000000..b7dab3158060
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_guc_rc.c
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#include <linux/device/devres.h>
+#include <drm/drm_print.h>
+
+#include "abi/guc_actions_slpc_abi.h"
+#include "xe_device.h"
+#include "xe_force_wake.h"
+#include "xe_gt.h"
+#include "xe_guc.h"
+#include "xe_gt_idle.h"
+#include "xe_gt_printk.h"
+#include "xe_guc_ct.h"
+#include "xe_guc_rc.h"
+#include "xe_pm.h"
+
+/**
+ * DOC: GuC RC (Render C-states)
+ *
+ * GuC handles the GT transition to deeper C-states in conjunction with Pcode.
+ * GuC RC can be enabled independently of the frequency component in SLPC,
+ * which is also controlled by GuC.
+ *
+ * This file will contain all H2G related logic for handling Render C-states.
+ * There are some calls to xe_gt_idle, where we enable host C6 when GuC RC is
+ * skipped. GuC RC is mostly independent of xe_guc_pc with the exception of
+ * functions that override the mode for which we have to rely on the SLPC H2G
+ * calls.
+ */
+
+static int guc_action_setup_gucrc(struct xe_guc *guc, u32 control)
+{
+ u32 action[] = {
+ GUC_ACTION_HOST2GUC_SETUP_PC_GUCRC,
+ control,
+ };
+ int ret;
+
+ ret = xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0);
+ if (ret && !(xe_device_wedged(guc_to_xe(guc)) && ret == -ECANCELED))
+ xe_gt_err(guc_to_gt(guc),
+ "GuC RC setup %s(%u) failed (%pe)\n",
+ control == GUCRC_HOST_CONTROL ? "HOST_CONTROL" :
+ control == GUCRC_FIRMWARE_CONTROL ? "FIRMWARE_CONTROL" :
+ "UNKNOWN", control, ERR_PTR(ret));
+ return ret;
+}
+
+/**
+ * xe_guc_rc_disable() - Disable GuC RC
+ * @guc: Xe GuC instance
+ *
+ * Disables GuC RC by taking control of RC6 back from GuC.
+ */
+void xe_guc_rc_disable(struct xe_guc *guc)
+{
+ struct xe_device *xe = guc_to_xe(guc);
+
+ if (xe->info.skip_guc_pc)
+ return;
+
+ if (guc_action_setup_gucrc(guc, GUCRC_HOST_CONTROL))
+ return;
+
+ XE_WARN_ON(xe_gt_idle_disable_c6(guc_to_gt(guc)));
+}
+
+static void xe_guc_rc_fini_hw(void *arg)
+{
+ struct xe_guc *guc = arg;
+ struct xe_device *xe = guc_to_xe(guc);
+ struct xe_gt *gt = guc_to_gt(guc);
+
+ if (xe_device_wedged(xe))
+ return;
+
+ CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
+ xe_guc_rc_disable(guc);
+}
+
+/**
+ * xe_guc_rc_init() - Initialize GuC RC
+ * @guc: Xe GuC instance
+ *
+ * Initializes GuC RC feature.
+ *
+ * Return: 0 on success, negative error code on error.
+ */
+int xe_guc_rc_init(struct xe_guc *guc)
+{
+ struct xe_device *xe = guc_to_xe(guc);
+
+ xe_gt_assert(guc_to_gt(guc), xe_device_uc_enabled(xe));
+
+ if (xe->info.skip_guc_pc)
+ return 0;
+
+ return devm_add_action_or_reset(xe->drm.dev, xe_guc_rc_fini_hw, guc);
+}
+
+static int xe_guc_rc_enable(struct xe_guc *guc)
+{
+ return guc_action_setup_gucrc(guc, GUCRC_FIRMWARE_CONTROL);
+}
+
+/**
+ * xe_guc_rc_start() - Enable GuC RC feature if applicable
+ * @guc: Xe GuC instance
+ *
+ * Enables GuC RC feature.
+ *
+ * Return: 0 on success, negative error code on error.
+ */
+int xe_guc_rc_start(struct xe_guc *guc)
+{
+ struct xe_device *xe = guc_to_xe(guc);
+ struct xe_gt *gt = guc_to_gt(guc);
+
+ xe_gt_assert(gt, xe_device_uc_enabled(xe));
+
+ CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
+ if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FW_GT))
+ return -ETIMEDOUT;
+
+ if (xe->info.platform == XE_PVC) {
+ xe_guc_rc_disable(guc);
+ return 0;
+ }
+
+ if (xe->info.skip_guc_pc) {
+ xe_gt_idle_enable_c6(gt);
+ return 0;
+ }
+
+ return xe_guc_rc_enable(guc);
+}
diff --git a/drivers/gpu/drm/xe/xe_guc_rc.h b/drivers/gpu/drm/xe/xe_guc_rc.h
new file mode 100644
index 000000000000..f2a6ae7f05d8
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_guc_rc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef _XE_GUC_RC_H_
+#define _XE_GUC_RC_H_
+
+struct xe_guc;
+
+void xe_guc_rc_disable(struct xe_guc *guc);
+int xe_guc_rc_start(struct xe_guc *guc);
+int xe_guc_rc_init(struct xe_guc *guc);
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index 157520ea1783..300b99acbd51 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -14,6 +14,7 @@
#include "xe_gt_sriov_vf.h"
#include "xe_guc.h"
#include "xe_guc_pc.h"
+#include "xe_guc_rc.h"
#include "xe_guc_engine_activity.h"
#include "xe_huc.h"
#include "xe_sriov.h"
@@ -216,6 +217,10 @@ int xe_uc_load_hw(struct xe_uc *uc)
if (ret)
goto err_out;
+ ret = xe_guc_rc_start(&uc->guc);
+ if (ret)
+ goto err_out;
+
xe_guc_engine_activity_enable_stats(&uc->guc);
/* We don't fail the driver load if HuC fails to auth */
@@ -244,11 +249,6 @@ int xe_uc_reset_prepare(struct xe_uc *uc)
return xe_guc_reset_prepare(&uc->guc);
}
-void xe_uc_gucrc_disable(struct xe_uc *uc)
-{
- XE_WARN_ON(xe_guc_pc_gucrc_disable(&uc->guc.pc));
-}
-
void xe_uc_stop_prepare(struct xe_uc *uc)
{
xe_gsc_stop_prepare(&uc->gsc);
diff --git a/drivers/gpu/drm/xe/xe_uc.h b/drivers/gpu/drm/xe/xe_uc.h
index 5398da1a8097..255a54a8f876 100644
--- a/drivers/gpu/drm/xe/xe_uc.h
+++ b/drivers/gpu/drm/xe/xe_uc.h
@@ -12,7 +12,6 @@ int xe_uc_init_noalloc(struct xe_uc *uc);
int xe_uc_init(struct xe_uc *uc);
int xe_uc_init_post_hwconfig(struct xe_uc *uc);
int xe_uc_load_hw(struct xe_uc *uc);
-void xe_uc_gucrc_disable(struct xe_uc *uc);
int xe_uc_reset_prepare(struct xe_uc *uc);
void xe_uc_runtime_resume(struct xe_uc *uc);
void xe_uc_runtime_suspend(struct xe_uc *uc);
--
2.38.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v4 2/2] drm/xe: Add a wrapper for set/unset params
2025-12-23 8:51 [PATCH v4 0/2] drm/xe: drm/xe: Separate out GuC RC code Vinay Belgaumkar
2025-12-23 8:51 ` [PATCH v4 1/2] drm/xe: Decouple GuC RC code from xe_guc_pc Vinay Belgaumkar
@ 2025-12-23 8:51 ` Vinay Belgaumkar
2026-01-07 6:01 ` Riana Tauro
2025-12-23 9:05 ` ✗ CI.checkpatch: warning for drm/xe: drm/xe: Separate out GuC RC code (rev3) Patchwork
` (3 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Vinay Belgaumkar @ 2025-12-23 8:51 UTC (permalink / raw)
To: intel-xe; +Cc: Vinay Belgaumkar
Also, extract out the GuC RC related set/unset param functions
into xe_guc_rc file. GuC still allows us to override GuC RC mode
using an SLPC H2G interface. Continue to use that interface, but
move the related code to the newly created xe_guc_rc file.
v2: xe_guc_rc functions to use guc pointer instead of gt (Michal W)
v3: Assert if runtime pm ref is not held (Michal W)
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
drivers/gpu/drm/xe/xe_guc_pc.c | 48 ++++++++++++++++------------------
drivers/gpu/drm/xe/xe_guc_pc.h | 2 ++
drivers/gpu/drm/xe/xe_guc_rc.c | 26 ++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_rc.h | 3 +++
drivers/gpu/drm/xe/xe_oa.c | 9 +++----
5 files changed, 58 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
index 3e7173130066..93f4d56c6f40 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.c
+++ b/drivers/gpu/drm/xe/xe_guc_pc.c
@@ -264,6 +264,29 @@ static int pc_action_unset_param(struct xe_guc_pc *pc, u8 id)
return ret;
}
+/**
+ * xe_guc_pc_action_set_param() - Set value of SLPC param
+ * @pc: Xe_GuC_PC instance
+ * @id: Param id
+ * @value: Value to set
+ */
+int xe_guc_pc_action_set_param(struct xe_guc_pc *pc, u8 id, u32 value)
+{
+ xe_device_assert_mem_access(pc_to_xe(pc));
+ return pc_action_set_param(pc, id, value);
+}
+
+/**
+ * xe_guc_pc_action_unset_param() - Revert to default value
+ * @pc: Xe_GuC_PC instance
+ * @id: Param id
+ */
+int xe_guc_pc_action_unset_param(struct xe_guc_pc *pc, u8 id)
+{
+ xe_device_assert_mem_access(pc_to_xe(pc));
+ return pc_action_unset_param(pc, id);
+}
+
static u32 decode_freq(u32 raw)
{
return DIV_ROUND_CLOSEST(raw * GT_FREQUENCY_MULTIPLIER,
@@ -1045,31 +1068,6 @@ int xe_guc_pc_restore_stashed_freq(struct xe_guc_pc *pc)
return ret;
}
-/**
- * xe_guc_pc_override_gucrc_mode - override GUCRC mode
- * @pc: Xe_GuC_PC instance
- * @mode: new value of the mode.
- *
- * Return: 0 on success, negative error code on error
- */
-int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode)
-{
- guard(xe_pm_runtime)(pc_to_xe(pc));
- return pc_action_set_param(pc, SLPC_PARAM_PWRGATE_RC_MODE, mode);
-}
-
-/**
- * xe_guc_pc_unset_gucrc_mode - unset GUCRC mode override
- * @pc: Xe_GuC_PC instance
- *
- * Return: 0 on success, negative error code on error
- */
-int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc)
-{
- guard(xe_pm_runtime)(pc_to_xe(pc));
- return pc_action_unset_param(pc, SLPC_PARAM_PWRGATE_RC_MODE);
-}
-
static void pc_init_pcode_freq(struct xe_guc_pc *pc)
{
u32 min = DIV_ROUND_CLOSEST(pc->rpn_freq, GT_FREQUENCY_MULTIPLIER);
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.h b/drivers/gpu/drm/xe/xe_guc_pc.h
index 1b95873b262e..00182a02a49e 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.h
+++ b/drivers/gpu/drm/xe/xe_guc_pc.h
@@ -18,6 +18,8 @@ int xe_guc_pc_stop(struct xe_guc_pc *pc);
int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode);
int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc);
void xe_guc_pc_print(struct xe_guc_pc *pc, struct drm_printer *p);
+int xe_guc_pc_action_set_param(struct xe_guc_pc *pc, u8 id, u32 value);
+int xe_guc_pc_action_unset_param(struct xe_guc_pc *pc, u8 id);
u32 xe_guc_pc_get_act_freq(struct xe_guc_pc *pc);
int xe_guc_pc_get_cur_freq(struct xe_guc_pc *pc, u32 *freq);
diff --git a/drivers/gpu/drm/xe/xe_guc_rc.c b/drivers/gpu/drm/xe/xe_guc_rc.c
index b7dab3158060..4d75babc4d28 100644
--- a/drivers/gpu/drm/xe/xe_guc_rc.c
+++ b/drivers/gpu/drm/xe/xe_guc_rc.c
@@ -14,6 +14,7 @@
#include "xe_gt_idle.h"
#include "xe_gt_printk.h"
#include "xe_guc_ct.h"
+#include "xe_guc_pc.h"
#include "xe_guc_rc.h"
#include "xe_pm.h"
@@ -137,3 +138,28 @@ int xe_guc_rc_start(struct xe_guc *guc)
return xe_guc_rc_enable(guc);
}
+
+/**
+ * xe_guc_rc_override_mode() - override GUCRC mode
+ * @guc: Xe GuC instance
+ * @mode: new value of the mode.
+ *
+ * Return: 0 on success, negative error code on error
+ */
+int xe_guc_rc_override_mode(struct xe_guc *guc, enum slpc_gucrc_mode mode)
+{
+ guard(xe_pm_runtime)(guc_to_xe(guc));
+ return xe_guc_pc_action_set_param(&guc->pc, SLPC_PARAM_PWRGATE_RC_MODE, mode);
+}
+
+/**
+ * xe_guc_rc_unset_mode() - revert to default mode
+ * @guc: Xe GuC instance
+ *
+ * Return: 0 on success, negative error code on error
+ */
+int xe_guc_rc_unset_mode(struct xe_guc *guc)
+{
+ guard(xe_pm_runtime)(guc_to_xe(guc));
+ return xe_guc_pc_action_unset_param(&guc->pc, SLPC_PARAM_PWRGATE_RC_MODE);
+}
diff --git a/drivers/gpu/drm/xe/xe_guc_rc.h b/drivers/gpu/drm/xe/xe_guc_rc.h
index f2a6ae7f05d8..581c66ed7e3a 100644
--- a/drivers/gpu/drm/xe/xe_guc_rc.h
+++ b/drivers/gpu/drm/xe/xe_guc_rc.h
@@ -7,9 +7,12 @@
#define _XE_GUC_RC_H_
struct xe_guc;
+enum slpc_gucrc_mode;
void xe_guc_rc_disable(struct xe_guc *guc);
int xe_guc_rc_start(struct xe_guc *guc);
int xe_guc_rc_init(struct xe_guc *guc);
+int xe_guc_rc_override_mode(struct xe_guc *guc, enum slpc_gucrc_mode mode);
+int xe_guc_rc_unset_mode(struct xe_guc *guc);
#endif
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index abf87fe0b345..ae811c9c5303 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -29,7 +29,7 @@
#include "xe_gt.h"
#include "xe_gt_mcr.h"
#include "xe_gt_printk.h"
-#include "xe_guc_pc.h"
+#include "xe_guc_rc.h"
#include "xe_macros.h"
#include "xe_mmio.h"
#include "xe_oa.h"
@@ -875,7 +875,7 @@ static void xe_oa_stream_destroy(struct xe_oa_stream *stream)
/* Wa_1509372804:pvc: Unset the override of GUCRC mode to enable rc6 */
if (stream->override_gucrc)
- xe_gt_WARN_ON(gt, xe_guc_pc_unset_gucrc_mode(>->uc.guc.pc));
+ xe_gt_WARN_ON(gt, xe_guc_rc_unset_mode(>->uc.guc));
xe_oa_free_configs(stream);
xe_file_put(stream->xef);
@@ -1765,8 +1765,7 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
* state. Prevent this by overriding GUCRC mode.
*/
if (XE_GT_WA(stream->gt, 1509372804)) {
- ret = xe_guc_pc_override_gucrc_mode(>->uc.guc.pc,
- SLPC_GUCRC_MODE_GUCRC_NO_RC6);
+ ret = xe_guc_rc_override_mode(>->uc.guc, SLPC_GUCRC_MODE_GUCRC_NO_RC6);
if (ret)
goto err_free_configs;
@@ -1824,7 +1823,7 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
xe_force_wake_put(gt_to_fw(gt), stream->fw_ref);
xe_pm_runtime_put(stream->oa->xe);
if (stream->override_gucrc)
- xe_gt_WARN_ON(gt, xe_guc_pc_unset_gucrc_mode(>->uc.guc.pc));
+ xe_gt_WARN_ON(gt, xe_guc_rc_unset_mode(>->uc.guc));
err_free_configs:
xe_oa_free_configs(stream);
exit:
--
2.38.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe: drm/xe: Separate out GuC RC code (rev3)
2025-12-23 8:51 [PATCH v4 0/2] drm/xe: drm/xe: Separate out GuC RC code Vinay Belgaumkar
2025-12-23 8:51 ` [PATCH v4 1/2] drm/xe: Decouple GuC RC code from xe_guc_pc Vinay Belgaumkar
2025-12-23 8:51 ` [PATCH v4 2/2] drm/xe: Add a wrapper for set/unset params Vinay Belgaumkar
@ 2025-12-23 9:05 ` Patchwork
2025-12-23 9:07 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2025-12-23 9:05 UTC (permalink / raw)
To: Vinay Belgaumkar; +Cc: intel-xe
== Series Details ==
Series: drm/xe: drm/xe: Separate out GuC RC code (rev3)
URL : https://patchwork.freedesktop.org/series/159128/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
99339247d1ae4378b24366da182e712bdc623311
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 8427b599ac9dffd849cf2acc79e5bb0e83fe508c
Author: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Date: Tue Dec 23 00:51:29 2025 -0800
drm/xe: Add a wrapper for set/unset params
Also, extract out the GuC RC related set/unset param functions
into xe_guc_rc file. GuC still allows us to override GuC RC mode
using an SLPC H2G interface. Continue to use that interface, but
move the related code to the newly created xe_guc_rc file.
v2: xe_guc_rc functions to use guc pointer instead of gt (Michal W)
v3: Assert if runtime pm ref is not held (Michal W)
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
+ /mt/dim checkpatch f101d56dc32350daa45c130ff7a6d46512f614a9 drm-intel
6d25df0ebcec drm/xe: Decouple GuC RC code from xe_guc_pc
-:211: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#211:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 345 lines checked
8427b599ac9d drm/xe: Add a wrapper for set/unset params
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ CI.KUnit: success for drm/xe: drm/xe: Separate out GuC RC code (rev3)
2025-12-23 8:51 [PATCH v4 0/2] drm/xe: drm/xe: Separate out GuC RC code Vinay Belgaumkar
` (2 preceding siblings ...)
2025-12-23 9:05 ` ✗ CI.checkpatch: warning for drm/xe: drm/xe: Separate out GuC RC code (rev3) Patchwork
@ 2025-12-23 9:07 ` Patchwork
2025-12-23 9:52 ` ✓ Xe.CI.BAT: " Patchwork
2025-12-23 18:58 ` ✓ Xe.CI.Full: " Patchwork
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2025-12-23 9:07 UTC (permalink / raw)
To: Vinay Belgaumkar; +Cc: intel-xe
== Series Details ==
Series: drm/xe: drm/xe: Separate out GuC RC code (rev3)
URL : https://patchwork.freedesktop.org/series/159128/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[09:05:59] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:06:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:06:37] Starting KUnit Kernel (1/1)...
[09:06:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:06:37] ================== guc_buf (11 subtests) ===================
[09:06:37] [PASSED] test_smallest
[09:06:37] [PASSED] test_largest
[09:06:37] [PASSED] test_granular
[09:06:37] [PASSED] test_unique
[09:06:37] [PASSED] test_overlap
[09:06:37] [PASSED] test_reusable
[09:06:37] [PASSED] test_too_big
[09:06:37] [PASSED] test_flush
[09:06:37] [PASSED] test_lookup
[09:06:37] [PASSED] test_data
[09:06:37] [PASSED] test_class
[09:06:37] ===================== [PASSED] guc_buf =====================
[09:06:37] =================== guc_dbm (7 subtests) ===================
[09:06:37] [PASSED] test_empty
[09:06:37] [PASSED] test_default
[09:06:37] ======================== test_size ========================
[09:06:37] [PASSED] 4
[09:06:37] [PASSED] 8
[09:06:37] [PASSED] 32
[09:06:37] [PASSED] 256
[09:06:37] ==================== [PASSED] test_size ====================
[09:06:37] ======================= test_reuse ========================
[09:06:37] [PASSED] 4
[09:06:37] [PASSED] 8
[09:06:37] [PASSED] 32
[09:06:37] [PASSED] 256
[09:06:37] =================== [PASSED] test_reuse ====================
[09:06:37] =================== test_range_overlap ====================
[09:06:37] [PASSED] 4
[09:06:37] [PASSED] 8
[09:06:37] [PASSED] 32
[09:06:37] [PASSED] 256
[09:06:37] =============== [PASSED] test_range_overlap ================
[09:06:37] =================== test_range_compact ====================
[09:06:37] [PASSED] 4
[09:06:37] [PASSED] 8
[09:06:37] [PASSED] 32
[09:06:37] [PASSED] 256
[09:06:37] =============== [PASSED] test_range_compact ================
[09:06:37] ==================== test_range_spare =====================
[09:06:37] [PASSED] 4
[09:06:37] [PASSED] 8
[09:06:37] [PASSED] 32
[09:06:37] [PASSED] 256
[09:06:37] ================ [PASSED] test_range_spare =================
[09:06:37] ===================== [PASSED] guc_dbm =====================
[09:06:37] =================== guc_idm (6 subtests) ===================
[09:06:37] [PASSED] bad_init
[09:06:37] [PASSED] no_init
[09:06:37] [PASSED] init_fini
[09:06:37] [PASSED] check_used
[09:06:37] [PASSED] check_quota
[09:06:37] [PASSED] check_all
[09:06:37] ===================== [PASSED] guc_idm =====================
[09:06:37] ================== no_relay (3 subtests) ===================
[09:06:37] [PASSED] xe_drops_guc2pf_if_not_ready
[09:06:37] [PASSED] xe_drops_guc2vf_if_not_ready
[09:06:37] [PASSED] xe_rejects_send_if_not_ready
[09:06:37] ==================== [PASSED] no_relay =====================
[09:06:37] ================== pf_relay (14 subtests) ==================
[09:06:37] [PASSED] pf_rejects_guc2pf_too_short
[09:06:37] [PASSED] pf_rejects_guc2pf_too_long
[09:06:37] [PASSED] pf_rejects_guc2pf_no_payload
[09:06:37] [PASSED] pf_fails_no_payload
[09:06:37] [PASSED] pf_fails_bad_origin
[09:06:37] [PASSED] pf_fails_bad_type
[09:06:37] [PASSED] pf_txn_reports_error
[09:06:37] [PASSED] pf_txn_sends_pf2guc
[09:06:37] [PASSED] pf_sends_pf2guc
[09:06:37] [SKIPPED] pf_loopback_nop
[09:06:37] [SKIPPED] pf_loopback_echo
[09:06:37] [SKIPPED] pf_loopback_fail
[09:06:37] [SKIPPED] pf_loopback_busy
[09:06:37] [SKIPPED] pf_loopback_retry
[09:06:37] ==================== [PASSED] pf_relay =====================
[09:06:37] ================== vf_relay (3 subtests) ===================
[09:06:37] [PASSED] vf_rejects_guc2vf_too_short
[09:06:37] [PASSED] vf_rejects_guc2vf_too_long
[09:06:37] [PASSED] vf_rejects_guc2vf_no_payload
[09:06:37] ==================== [PASSED] vf_relay =====================
[09:06:37] ================ pf_gt_config (6 subtests) =================
[09:06:37] [PASSED] fair_contexts_1vf
[09:06:37] [PASSED] fair_doorbells_1vf
[09:06:37] [PASSED] fair_ggtt_1vf
[09:06:37] ====================== fair_contexts ======================
[09:06:37] [PASSED] 1 VF
[09:06:37] [PASSED] 2 VFs
[09:06:37] [PASSED] 3 VFs
[09:06:37] [PASSED] 4 VFs
[09:06:37] [PASSED] 5 VFs
[09:06:37] [PASSED] 6 VFs
[09:06:37] [PASSED] 7 VFs
[09:06:37] [PASSED] 8 VFs
[09:06:37] [PASSED] 9 VFs
[09:06:37] [PASSED] 10 VFs
[09:06:37] [PASSED] 11 VFs
[09:06:37] [PASSED] 12 VFs
[09:06:37] [PASSED] 13 VFs
[09:06:37] [PASSED] 14 VFs
[09:06:37] [PASSED] 15 VFs
[09:06:37] [PASSED] 16 VFs
[09:06:37] [PASSED] 17 VFs
[09:06:37] [PASSED] 18 VFs
[09:06:37] [PASSED] 19 VFs
[09:06:37] [PASSED] 20 VFs
[09:06:37] [PASSED] 21 VFs
[09:06:37] [PASSED] 22 VFs
[09:06:37] [PASSED] 23 VFs
[09:06:37] [PASSED] 24 VFs
[09:06:37] [PASSED] 25 VFs
[09:06:37] [PASSED] 26 VFs
[09:06:37] [PASSED] 27 VFs
[09:06:37] [PASSED] 28 VFs
[09:06:37] [PASSED] 29 VFs
[09:06:37] [PASSED] 30 VFs
[09:06:37] [PASSED] 31 VFs
[09:06:37] [PASSED] 32 VFs
[09:06:37] [PASSED] 33 VFs
[09:06:37] [PASSED] 34 VFs
[09:06:37] [PASSED] 35 VFs
[09:06:37] [PASSED] 36 VFs
[09:06:37] [PASSED] 37 VFs
[09:06:37] [PASSED] 38 VFs
[09:06:37] [PASSED] 39 VFs
[09:06:37] [PASSED] 40 VFs
[09:06:37] [PASSED] 41 VFs
[09:06:37] [PASSED] 42 VFs
[09:06:37] [PASSED] 43 VFs
[09:06:37] [PASSED] 44 VFs
[09:06:37] [PASSED] 45 VFs
[09:06:37] [PASSED] 46 VFs
[09:06:37] [PASSED] 47 VFs
[09:06:37] [PASSED] 48 VFs
[09:06:37] [PASSED] 49 VFs
[09:06:37] [PASSED] 50 VFs
[09:06:37] [PASSED] 51 VFs
[09:06:37] [PASSED] 52 VFs
[09:06:37] [PASSED] 53 VFs
[09:06:37] [PASSED] 54 VFs
[09:06:37] [PASSED] 55 VFs
[09:06:37] [PASSED] 56 VFs
[09:06:37] [PASSED] 57 VFs
[09:06:37] [PASSED] 58 VFs
[09:06:37] [PASSED] 59 VFs
[09:06:37] [PASSED] 60 VFs
[09:06:37] [PASSED] 61 VFs
[09:06:37] [PASSED] 62 VFs
[09:06:37] [PASSED] 63 VFs
[09:06:37] ================== [PASSED] fair_contexts ==================
[09:06:37] ===================== fair_doorbells ======================
[09:06:37] [PASSED] 1 VF
[09:06:37] [PASSED] 2 VFs
[09:06:37] [PASSED] 3 VFs
[09:06:37] [PASSED] 4 VFs
[09:06:37] [PASSED] 5 VFs
[09:06:37] [PASSED] 6 VFs
[09:06:37] [PASSED] 7 VFs
[09:06:37] [PASSED] 8 VFs
[09:06:37] [PASSED] 9 VFs
[09:06:37] [PASSED] 10 VFs
[09:06:37] [PASSED] 11 VFs
[09:06:37] [PASSED] 12 VFs
[09:06:37] [PASSED] 13 VFs
[09:06:37] [PASSED] 14 VFs
[09:06:37] [PASSED] 15 VFs
[09:06:37] [PASSED] 16 VFs
[09:06:37] [PASSED] 17 VFs
[09:06:37] [PASSED] 18 VFs
[09:06:37] [PASSED] 19 VFs
[09:06:37] [PASSED] 20 VFs
[09:06:37] [PASSED] 21 VFs
[09:06:37] [PASSED] 22 VFs
[09:06:37] [PASSED] 23 VFs
[09:06:37] [PASSED] 24 VFs
[09:06:37] [PASSED] 25 VFs
[09:06:37] [PASSED] 26 VFs
[09:06:37] [PASSED] 27 VFs
[09:06:37] [PASSED] 28 VFs
[09:06:37] [PASSED] 29 VFs
[09:06:37] [PASSED] 30 VFs
[09:06:37] [PASSED] 31 VFs
[09:06:37] [PASSED] 32 VFs
[09:06:37] [PASSED] 33 VFs
[09:06:37] [PASSED] 34 VFs
[09:06:37] [PASSED] 35 VFs
[09:06:37] [PASSED] 36 VFs
[09:06:37] [PASSED] 37 VFs
[09:06:37] [PASSED] 38 VFs
[09:06:37] [PASSED] 39 VFs
[09:06:37] [PASSED] 40 VFs
[09:06:37] [PASSED] 41 VFs
[09:06:37] [PASSED] 42 VFs
[09:06:37] [PASSED] 43 VFs
[09:06:37] [PASSED] 44 VFs
[09:06:37] [PASSED] 45 VFs
[09:06:37] [PASSED] 46 VFs
[09:06:37] [PASSED] 47 VFs
[09:06:37] [PASSED] 48 VFs
[09:06:37] [PASSED] 49 VFs
[09:06:37] [PASSED] 50 VFs
[09:06:37] [PASSED] 51 VFs
[09:06:37] [PASSED] 52 VFs
[09:06:37] [PASSED] 53 VFs
[09:06:37] [PASSED] 54 VFs
[09:06:37] [PASSED] 55 VFs
[09:06:37] [PASSED] 56 VFs
[09:06:37] [PASSED] 57 VFs
[09:06:37] [PASSED] 58 VFs
[09:06:37] [PASSED] 59 VFs
[09:06:37] [PASSED] 60 VFs
[09:06:37] [PASSED] 61 VFs
[09:06:37] [PASSED] 62 VFs
[09:06:37] [PASSED] 63 VFs
[09:06:37] ================= [PASSED] fair_doorbells ==================
[09:06:37] ======================== fair_ggtt ========================
[09:06:37] [PASSED] 1 VF
[09:06:37] [PASSED] 2 VFs
[09:06:37] [PASSED] 3 VFs
[09:06:37] [PASSED] 4 VFs
[09:06:37] [PASSED] 5 VFs
[09:06:37] [PASSED] 6 VFs
[09:06:37] [PASSED] 7 VFs
[09:06:37] [PASSED] 8 VFs
[09:06:37] [PASSED] 9 VFs
[09:06:37] [PASSED] 10 VFs
[09:06:37] [PASSED] 11 VFs
[09:06:37] [PASSED] 12 VFs
[09:06:37] [PASSED] 13 VFs
[09:06:37] [PASSED] 14 VFs
[09:06:37] [PASSED] 15 VFs
[09:06:37] [PASSED] 16 VFs
[09:06:37] [PASSED] 17 VFs
[09:06:37] [PASSED] 18 VFs
[09:06:37] [PASSED] 19 VFs
[09:06:37] [PASSED] 20 VFs
[09:06:37] [PASSED] 21 VFs
[09:06:37] [PASSED] 22 VFs
[09:06:37] [PASSED] 23 VFs
[09:06:37] [PASSED] 24 VFs
[09:06:37] [PASSED] 25 VFs
[09:06:37] [PASSED] 26 VFs
[09:06:37] [PASSED] 27 VFs
[09:06:37] [PASSED] 28 VFs
[09:06:37] [PASSED] 29 VFs
[09:06:37] [PASSED] 30 VFs
[09:06:37] [PASSED] 31 VFs
[09:06:37] [PASSED] 32 VFs
[09:06:37] [PASSED] 33 VFs
[09:06:37] [PASSED] 34 VFs
[09:06:37] [PASSED] 35 VFs
[09:06:37] [PASSED] 36 VFs
[09:06:37] [PASSED] 37 VFs
[09:06:37] [PASSED] 38 VFs
[09:06:37] [PASSED] 39 VFs
[09:06:37] [PASSED] 40 VFs
[09:06:37] [PASSED] 41 VFs
[09:06:37] [PASSED] 42 VFs
[09:06:37] [PASSED] 43 VFs
[09:06:37] [PASSED] 44 VFs
[09:06:37] [PASSED] 45 VFs
[09:06:37] [PASSED] 46 VFs
[09:06:37] [PASSED] 47 VFs
[09:06:37] [PASSED] 48 VFs
[09:06:37] [PASSED] 49 VFs
[09:06:37] [PASSED] 50 VFs
[09:06:37] [PASSED] 51 VFs
[09:06:37] [PASSED] 52 VFs
[09:06:37] [PASSED] 53 VFs
[09:06:37] [PASSED] 54 VFs
[09:06:37] [PASSED] 55 VFs
[09:06:37] [PASSED] 56 VFs
[09:06:37] [PASSED] 57 VFs
[09:06:37] [PASSED] 58 VFs
[09:06:37] [PASSED] 59 VFs
[09:06:37] [PASSED] 60 VFs
[09:06:37] [PASSED] 61 VFs
[09:06:37] [PASSED] 62 VFs
[09:06:37] [PASSED] 63 VFs
[09:06:37] ==================== [PASSED] fair_ggtt ====================
[09:06:37] ================== [PASSED] pf_gt_config ===================
[09:06:37] ===================== lmtt (1 subtest) =====================
[09:06:37] ======================== test_ops =========================
[09:06:37] [PASSED] 2-level
[09:06:37] [PASSED] multi-level
[09:06:37] ==================== [PASSED] test_ops =====================
[09:06:37] ====================== [PASSED] lmtt =======================
[09:06:37] ================= pf_service (11 subtests) =================
[09:06:37] [PASSED] pf_negotiate_any
[09:06:37] [PASSED] pf_negotiate_base_match
[09:06:37] [PASSED] pf_negotiate_base_newer
[09:06:37] [PASSED] pf_negotiate_base_next
[09:06:37] [SKIPPED] pf_negotiate_base_older
[09:06:37] [PASSED] pf_negotiate_base_prev
[09:06:37] [PASSED] pf_negotiate_latest_match
[09:06:37] [PASSED] pf_negotiate_latest_newer
[09:06:37] [PASSED] pf_negotiate_latest_next
[09:06:37] [SKIPPED] pf_negotiate_latest_older
[09:06:37] [SKIPPED] pf_negotiate_latest_prev
[09:06:37] =================== [PASSED] pf_service ====================
[09:06:37] ================= xe_guc_g2g (2 subtests) ==================
[09:06:37] ============== xe_live_guc_g2g_kunit_default ==============
[09:06:37] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[09:06:37] ============== xe_live_guc_g2g_kunit_allmem ===============
[09:06:37] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[09:06:37] =================== [SKIPPED] xe_guc_g2g ===================
[09:06:37] =================== xe_mocs (2 subtests) ===================
[09:06:37] ================ xe_live_mocs_kernel_kunit ================
[09:06:37] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[09:06:37] ================ xe_live_mocs_reset_kunit =================
[09:06:37] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[09:06:37] ==================== [SKIPPED] xe_mocs =====================
[09:06:37] ================= xe_migrate (2 subtests) ==================
[09:06:37] ================= xe_migrate_sanity_kunit =================
[09:06:37] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[09:06:37] ================== xe_validate_ccs_kunit ==================
[09:06:37] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[09:06:37] =================== [SKIPPED] xe_migrate ===================
[09:06:37] ================== xe_dma_buf (1 subtest) ==================
[09:06:37] ==================== xe_dma_buf_kunit =====================
[09:06:37] ================ [SKIPPED] xe_dma_buf_kunit ================
[09:06:37] =================== [SKIPPED] xe_dma_buf ===================
[09:06:37] ================= xe_bo_shrink (1 subtest) =================
[09:06:37] =================== xe_bo_shrink_kunit ====================
[09:06:37] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[09:06:37] ================== [SKIPPED] xe_bo_shrink ==================
[09:06:37] ==================== xe_bo (2 subtests) ====================
[09:06:37] ================== xe_ccs_migrate_kunit ===================
[09:06:37] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[09:06:37] ==================== xe_bo_evict_kunit ====================
[09:06:37] =============== [SKIPPED] xe_bo_evict_kunit ================
[09:06:37] ===================== [SKIPPED] xe_bo ======================
[09:06:37] ==================== args (13 subtests) ====================
[09:06:37] [PASSED] count_args_test
[09:06:37] [PASSED] call_args_example
[09:06:37] [PASSED] call_args_test
[09:06:37] [PASSED] drop_first_arg_example
[09:06:37] [PASSED] drop_first_arg_test
[09:06:37] [PASSED] first_arg_example
[09:06:37] [PASSED] first_arg_test
[09:06:37] [PASSED] last_arg_example
[09:06:37] [PASSED] last_arg_test
[09:06:37] [PASSED] pick_arg_example
[09:06:37] [PASSED] if_args_example
[09:06:37] [PASSED] if_args_test
[09:06:37] [PASSED] sep_comma_example
[09:06:37] ====================== [PASSED] args =======================
[09:06:37] =================== xe_pci (3 subtests) ====================
[09:06:37] ==================== check_graphics_ip ====================
[09:06:37] [PASSED] 12.00 Xe_LP
[09:06:37] [PASSED] 12.10 Xe_LP+
[09:06:37] [PASSED] 12.55 Xe_HPG
[09:06:37] [PASSED] 12.60 Xe_HPC
[09:06:37] [PASSED] 12.70 Xe_LPG
[09:06:37] [PASSED] 12.71 Xe_LPG
[09:06:37] [PASSED] 12.74 Xe_LPG+
[09:06:37] [PASSED] 20.01 Xe2_HPG
[09:06:37] [PASSED] 20.02 Xe2_HPG
[09:06:37] [PASSED] 20.04 Xe2_LPG
[09:06:37] [PASSED] 30.00 Xe3_LPG
[09:06:37] [PASSED] 30.01 Xe3_LPG
[09:06:37] [PASSED] 30.03 Xe3_LPG
[09:06:37] [PASSED] 30.04 Xe3_LPG
[09:06:37] [PASSED] 30.05 Xe3_LPG
[09:06:37] [PASSED] 35.11 Xe3p_XPC
[09:06:37] ================ [PASSED] check_graphics_ip ================
[09:06:37] ===================== check_media_ip ======================
[09:06:37] [PASSED] 12.00 Xe_M
[09:06:37] [PASSED] 12.55 Xe_HPM
[09:06:37] [PASSED] 13.00 Xe_LPM+
[09:06:37] [PASSED] 13.01 Xe2_HPM
[09:06:37] [PASSED] 20.00 Xe2_LPM
[09:06:37] [PASSED] 30.00 Xe3_LPM
[09:06:37] [PASSED] 30.02 Xe3_LPM
[09:06:37] [PASSED] 35.00 Xe3p_LPM
[09:06:37] [PASSED] 35.03 Xe3p_HPM
[09:06:37] ================= [PASSED] check_media_ip ==================
[09:06:37] =================== check_platform_desc ===================
[09:06:37] [PASSED] 0x9A60 (TIGERLAKE)
[09:06:37] [PASSED] 0x9A68 (TIGERLAKE)
[09:06:37] [PASSED] 0x9A70 (TIGERLAKE)
[09:06:37] [PASSED] 0x9A40 (TIGERLAKE)
[09:06:37] [PASSED] 0x9A49 (TIGERLAKE)
[09:06:37] [PASSED] 0x9A59 (TIGERLAKE)
[09:06:37] [PASSED] 0x9A78 (TIGERLAKE)
[09:06:37] [PASSED] 0x9AC0 (TIGERLAKE)
[09:06:37] [PASSED] 0x9AC9 (TIGERLAKE)
[09:06:37] [PASSED] 0x9AD9 (TIGERLAKE)
[09:06:37] [PASSED] 0x9AF8 (TIGERLAKE)
[09:06:37] [PASSED] 0x4C80 (ROCKETLAKE)
[09:06:37] [PASSED] 0x4C8A (ROCKETLAKE)
[09:06:37] [PASSED] 0x4C8B (ROCKETLAKE)
[09:06:37] [PASSED] 0x4C8C (ROCKETLAKE)
[09:06:37] [PASSED] 0x4C90 (ROCKETLAKE)
[09:06:37] [PASSED] 0x4C9A (ROCKETLAKE)
[09:06:37] [PASSED] 0x4680 (ALDERLAKE_S)
[09:06:37] [PASSED] 0x4682 (ALDERLAKE_S)
[09:06:37] [PASSED] 0x4688 (ALDERLAKE_S)
[09:06:37] [PASSED] 0x468A (ALDERLAKE_S)
[09:06:37] [PASSED] 0x468B (ALDERLAKE_S)
[09:06:37] [PASSED] 0x4690 (ALDERLAKE_S)
[09:06:37] [PASSED] 0x4692 (ALDERLAKE_S)
[09:06:37] [PASSED] 0x4693 (ALDERLAKE_S)
[09:06:37] [PASSED] 0x46A0 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46A1 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46A2 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46A3 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46A6 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46A8 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46AA (ALDERLAKE_P)
[09:06:37] [PASSED] 0x462A (ALDERLAKE_P)
[09:06:37] [PASSED] 0x4626 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[09:06:37] [PASSED] 0x46B0 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46B1 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46B2 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46B3 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46C0 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46C1 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46C2 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46C3 (ALDERLAKE_P)
[09:06:37] [PASSED] 0x46D0 (ALDERLAKE_N)
[09:06:37] [PASSED] 0x46D1 (ALDERLAKE_N)
[09:06:37] [PASSED] 0x46D2 (ALDERLAKE_N)
[09:06:37] [PASSED] 0x46D3 (ALDERLAKE_N)
[09:06:37] [PASSED] 0x46D4 (ALDERLAKE_N)
[09:06:37] [PASSED] 0xA721 (ALDERLAKE_P)
[09:06:37] [PASSED] 0xA7A1 (ALDERLAKE_P)
[09:06:37] [PASSED] 0xA7A9 (ALDERLAKE_P)
[09:06:37] [PASSED] 0xA7AC (ALDERLAKE_P)
[09:06:37] [PASSED] 0xA7AD (ALDERLAKE_P)
[09:06:37] [PASSED] 0xA720 (ALDERLAKE_P)
[09:06:37] [PASSED] 0xA7A0 (ALDERLAKE_P)
[09:06:37] [PASSED] 0xA7A8 (ALDERLAKE_P)
[09:06:37] [PASSED] 0xA7AA (ALDERLAKE_P)
[09:06:37] [PASSED] 0xA7AB (ALDERLAKE_P)
[09:06:37] [PASSED] 0xA780 (ALDERLAKE_S)
[09:06:37] [PASSED] 0xA781 (ALDERLAKE_S)
[09:06:37] [PASSED] 0xA782 (ALDERLAKE_S)
[09:06:37] [PASSED] 0xA783 (ALDERLAKE_S)
[09:06:37] [PASSED] 0xA788 (ALDERLAKE_S)
[09:06:37] [PASSED] 0xA789 (ALDERLAKE_S)
[09:06:37] [PASSED] 0xA78A (ALDERLAKE_S)
[09:06:37] [PASSED] 0xA78B (ALDERLAKE_S)
[09:06:37] [PASSED] 0x4905 (DG1)
[09:06:37] [PASSED] 0x4906 (DG1)
[09:06:37] [PASSED] 0x4907 (DG1)
[09:06:37] [PASSED] 0x4908 (DG1)
[09:06:37] [PASSED] 0x4909 (DG1)
[09:06:37] [PASSED] 0x56C0 (DG2)
[09:06:37] [PASSED] 0x56C2 (DG2)
[09:06:37] [PASSED] 0x56C1 (DG2)
[09:06:37] [PASSED] 0x7D51 (METEORLAKE)
[09:06:37] [PASSED] 0x7DD1 (METEORLAKE)
[09:06:37] [PASSED] 0x7D41 (METEORLAKE)
[09:06:37] [PASSED] 0x7D67 (METEORLAKE)
[09:06:37] [PASSED] 0xB640 (METEORLAKE)
[09:06:37] [PASSED] 0x56A0 (DG2)
[09:06:37] [PASSED] 0x56A1 (DG2)
[09:06:37] [PASSED] 0x56A2 (DG2)
[09:06:37] [PASSED] 0x56BE (DG2)
[09:06:37] [PASSED] 0x56BF (DG2)
[09:06:37] [PASSED] 0x5690 (DG2)
[09:06:37] [PASSED] 0x5691 (DG2)
[09:06:37] [PASSED] 0x5692 (DG2)
[09:06:37] [PASSED] 0x56A5 (DG2)
[09:06:37] [PASSED] 0x56A6 (DG2)
[09:06:37] [PASSED] 0x56B0 (DG2)
[09:06:37] [PASSED] 0x56B1 (DG2)
[09:06:37] [PASSED] 0x56BA (DG2)
[09:06:37] [PASSED] 0x56BB (DG2)
[09:06:37] [PASSED] 0x56BC (DG2)
[09:06:37] [PASSED] 0x56BD (DG2)
[09:06:37] [PASSED] 0x5693 (DG2)
[09:06:37] [PASSED] 0x5694 (DG2)
[09:06:37] [PASSED] 0x5695 (DG2)
[09:06:37] [PASSED] 0x56A3 (DG2)
[09:06:37] [PASSED] 0x56A4 (DG2)
[09:06:37] [PASSED] 0x56B2 (DG2)
[09:06:37] [PASSED] 0x56B3 (DG2)
[09:06:37] [PASSED] 0x5696 (DG2)
[09:06:37] [PASSED] 0x5697 (DG2)
[09:06:37] [PASSED] 0xB69 (PVC)
[09:06:37] [PASSED] 0xB6E (PVC)
[09:06:37] [PASSED] 0xBD4 (PVC)
[09:06:37] [PASSED] 0xBD5 (PVC)
[09:06:37] [PASSED] 0xBD6 (PVC)
[09:06:37] [PASSED] 0xBD7 (PVC)
[09:06:37] [PASSED] 0xBD8 (PVC)
[09:06:37] [PASSED] 0xBD9 (PVC)
[09:06:37] [PASSED] 0xBDA (PVC)
[09:06:37] [PASSED] 0xBDB (PVC)
[09:06:37] [PASSED] 0xBE0 (PVC)
[09:06:37] [PASSED] 0xBE1 (PVC)
[09:06:37] [PASSED] 0xBE5 (PVC)
[09:06:37] [PASSED] 0x7D40 (METEORLAKE)
[09:06:37] [PASSED] 0x7D45 (METEORLAKE)
[09:06:37] [PASSED] 0x7D55 (METEORLAKE)
[09:06:37] [PASSED] 0x7D60 (METEORLAKE)
[09:06:37] [PASSED] 0x7DD5 (METEORLAKE)
[09:06:37] [PASSED] 0x6420 (LUNARLAKE)
[09:06:37] [PASSED] 0x64A0 (LUNARLAKE)
[09:06:37] [PASSED] 0x64B0 (LUNARLAKE)
[09:06:37] [PASSED] 0xE202 (BATTLEMAGE)
[09:06:37] [PASSED] 0xE209 (BATTLEMAGE)
[09:06:37] [PASSED] 0xE20B (BATTLEMAGE)
[09:06:37] [PASSED] 0xE20C (BATTLEMAGE)
[09:06:37] [PASSED] 0xE20D (BATTLEMAGE)
[09:06:37] [PASSED] 0xE210 (BATTLEMAGE)
[09:06:37] [PASSED] 0xE211 (BATTLEMAGE)
[09:06:37] [PASSED] 0xE212 (BATTLEMAGE)
[09:06:38] [PASSED] 0xE216 (BATTLEMAGE)
[09:06:38] [PASSED] 0xE220 (BATTLEMAGE)
[09:06:38] [PASSED] 0xE221 (BATTLEMAGE)
[09:06:38] [PASSED] 0xE222 (BATTLEMAGE)
[09:06:38] [PASSED] 0xE223 (BATTLEMAGE)
[09:06:38] [PASSED] 0xB080 (PANTHERLAKE)
[09:06:38] [PASSED] 0xB081 (PANTHERLAKE)
[09:06:38] [PASSED] 0xB082 (PANTHERLAKE)
[09:06:38] [PASSED] 0xB083 (PANTHERLAKE)
[09:06:38] [PASSED] 0xB084 (PANTHERLAKE)
[09:06:38] [PASSED] 0xB085 (PANTHERLAKE)
[09:06:38] [PASSED] 0xB086 (PANTHERLAKE)
[09:06:38] [PASSED] 0xB087 (PANTHERLAKE)
[09:06:38] [PASSED] 0xB08F (PANTHERLAKE)
[09:06:38] [PASSED] 0xB090 (PANTHERLAKE)
[09:06:38] [PASSED] 0xB0A0 (PANTHERLAKE)
[09:06:38] [PASSED] 0xB0B0 (PANTHERLAKE)
[09:06:38] [PASSED] 0xFD80 (PANTHERLAKE)
[09:06:38] [PASSED] 0xFD81 (PANTHERLAKE)
[09:06:38] [PASSED] 0xD740 (NOVALAKE_S)
[09:06:38] [PASSED] 0xD741 (NOVALAKE_S)
[09:06:38] [PASSED] 0xD742 (NOVALAKE_S)
[09:06:38] [PASSED] 0xD743 (NOVALAKE_S)
[09:06:38] [PASSED] 0xD744 (NOVALAKE_S)
[09:06:38] [PASSED] 0xD745 (NOVALAKE_S)
[09:06:38] [PASSED] 0x674C (CRESCENTISLAND)
[09:06:38] =============== [PASSED] check_platform_desc ===============
[09:06:38] ===================== [PASSED] xe_pci ======================
[09:06:38] =================== xe_rtp (2 subtests) ====================
[09:06:38] =============== xe_rtp_process_to_sr_tests ================
[09:06:38] [PASSED] coalesce-same-reg
[09:06:38] [PASSED] no-match-no-add
[09:06:38] [PASSED] match-or
[09:06:38] [PASSED] match-or-xfail
[09:06:38] [PASSED] no-match-no-add-multiple-rules
[09:06:38] [PASSED] two-regs-two-entries
[09:06:38] [PASSED] clr-one-set-other
[09:06:38] [PASSED] set-field
[09:06:38] [PASSED] conflict-duplicate
[09:06:38] [PASSED] conflict-not-disjoint
[09:06:38] [PASSED] conflict-reg-type
[09:06:38] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[09:06:38] ================== xe_rtp_process_tests ===================
[09:06:38] [PASSED] active1
[09:06:38] [PASSED] active2
[09:06:38] [PASSED] active-inactive
[09:06:38] [PASSED] inactive-active
[09:06:38] [PASSED] inactive-1st_or_active-inactive
[09:06:38] [PASSED] inactive-2nd_or_active-inactive
[09:06:38] [PASSED] inactive-last_or_active-inactive
[09:06:38] [PASSED] inactive-no_or_active-inactive
[09:06:38] ============== [PASSED] xe_rtp_process_tests ===============
[09:06:38] ===================== [PASSED] xe_rtp ======================
[09:06:38] ==================== xe_wa (1 subtest) =====================
[09:06:38] ======================== xe_wa_gt =========================
[09:06:38] [PASSED] TIGERLAKE B0
[09:06:38] [PASSED] DG1 A0
[09:06:38] [PASSED] DG1 B0
[09:06:38] [PASSED] ALDERLAKE_S A0
[09:06:38] [PASSED] ALDERLAKE_S B0
[09:06:38] [PASSED] ALDERLAKE_S C0
[09:06:38] [PASSED] ALDERLAKE_S D0
[09:06:38] [PASSED] ALDERLAKE_P A0
[09:06:38] [PASSED] ALDERLAKE_P B0
[09:06:38] [PASSED] ALDERLAKE_P C0
[09:06:38] [PASSED] ALDERLAKE_S RPLS D0
[09:06:38] [PASSED] ALDERLAKE_P RPLU E0
[09:06:38] [PASSED] DG2 G10 C0
[09:06:38] [PASSED] DG2 G11 B1
[09:06:38] [PASSED] DG2 G12 A1
[09:06:38] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:06:38] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:06:38] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[09:06:38] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[09:06:38] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[09:06:38] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[09:06:38] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[09:06:38] ==================== [PASSED] xe_wa_gt =====================
[09:06:38] ====================== [PASSED] xe_wa ======================
[09:06:38] ============================================================
[09:06:38] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[09:06:38] Elapsed time: 38.751s total, 4.163s configuring, 34.071s building, 0.470s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[09:06:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:06:39] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:07:06] Starting KUnit Kernel (1/1)...
[09:07:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:07:06] ============ drm_test_pick_cmdline (2 subtests) ============
[09:07:06] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[09:07:06] =============== drm_test_pick_cmdline_named ===============
[09:07:06] [PASSED] NTSC
[09:07:06] [PASSED] NTSC-J
[09:07:06] [PASSED] PAL
[09:07:07] [PASSED] PAL-M
[09:07:07] =========== [PASSED] drm_test_pick_cmdline_named ===========
[09:07:07] ============== [PASSED] drm_test_pick_cmdline ==============
[09:07:07] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[09:07:07] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[09:07:07] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[09:07:07] =========== drm_validate_clone_mode (2 subtests) ===========
[09:07:07] ============== drm_test_check_in_clone_mode ===============
[09:07:07] [PASSED] in_clone_mode
[09:07:07] [PASSED] not_in_clone_mode
[09:07:07] ========== [PASSED] drm_test_check_in_clone_mode ===========
[09:07:07] =============== drm_test_check_valid_clones ===============
[09:07:07] [PASSED] not_in_clone_mode
[09:07:07] [PASSED] valid_clone
[09:07:07] [PASSED] invalid_clone
[09:07:07] =========== [PASSED] drm_test_check_valid_clones ===========
[09:07:07] ============= [PASSED] drm_validate_clone_mode =============
[09:07:07] ============= drm_validate_modeset (1 subtest) =============
[09:07:07] [PASSED] drm_test_check_connector_changed_modeset
[09:07:07] ============== [PASSED] drm_validate_modeset ===============
[09:07:07] ====== drm_test_bridge_get_current_state (2 subtests) ======
[09:07:07] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[09:07:07] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[09:07:07] ======== [PASSED] drm_test_bridge_get_current_state ========
[09:07:07] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[09:07:07] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[09:07:07] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[09:07:07] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[09:07:07] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[09:07:07] ============== drm_bridge_alloc (2 subtests) ===============
[09:07:07] [PASSED] drm_test_drm_bridge_alloc_basic
[09:07:07] [PASSED] drm_test_drm_bridge_alloc_get_put
[09:07:07] ================ [PASSED] drm_bridge_alloc =================
[09:07:07] ================== drm_buddy (8 subtests) ==================
[09:07:07] [PASSED] drm_test_buddy_alloc_limit
[09:07:07] [PASSED] drm_test_buddy_alloc_optimistic
[09:07:07] [PASSED] drm_test_buddy_alloc_pessimistic
[09:07:07] [PASSED] drm_test_buddy_alloc_pathological
[09:07:07] [PASSED] drm_test_buddy_alloc_contiguous
[09:07:07] [PASSED] drm_test_buddy_alloc_clear
[09:07:07] [PASSED] drm_test_buddy_alloc_range_bias
[09:07:07] [PASSED] drm_test_buddy_fragmentation_performance
[09:07:07] ==================== [PASSED] drm_buddy ====================
[09:07:07] ============= drm_cmdline_parser (40 subtests) =============
[09:07:07] [PASSED] drm_test_cmdline_force_d_only
[09:07:07] [PASSED] drm_test_cmdline_force_D_only_dvi
[09:07:07] [PASSED] drm_test_cmdline_force_D_only_hdmi
[09:07:07] [PASSED] drm_test_cmdline_force_D_only_not_digital
[09:07:07] [PASSED] drm_test_cmdline_force_e_only
[09:07:07] [PASSED] drm_test_cmdline_res
[09:07:07] [PASSED] drm_test_cmdline_res_vesa
[09:07:07] [PASSED] drm_test_cmdline_res_vesa_rblank
[09:07:07] [PASSED] drm_test_cmdline_res_rblank
[09:07:07] [PASSED] drm_test_cmdline_res_bpp
[09:07:07] [PASSED] drm_test_cmdline_res_refresh
[09:07:07] [PASSED] drm_test_cmdline_res_bpp_refresh
[09:07:07] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[09:07:07] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[09:07:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[09:07:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[09:07:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[09:07:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[09:07:07] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[09:07:07] [PASSED] drm_test_cmdline_res_margins_force_on
[09:07:07] [PASSED] drm_test_cmdline_res_vesa_margins
[09:07:07] [PASSED] drm_test_cmdline_name
[09:07:07] [PASSED] drm_test_cmdline_name_bpp
[09:07:07] [PASSED] drm_test_cmdline_name_option
[09:07:07] [PASSED] drm_test_cmdline_name_bpp_option
[09:07:07] [PASSED] drm_test_cmdline_rotate_0
[09:07:07] [PASSED] drm_test_cmdline_rotate_90
[09:07:07] [PASSED] drm_test_cmdline_rotate_180
[09:07:07] [PASSED] drm_test_cmdline_rotate_270
[09:07:07] [PASSED] drm_test_cmdline_hmirror
[09:07:07] [PASSED] drm_test_cmdline_vmirror
[09:07:07] [PASSED] drm_test_cmdline_margin_options
[09:07:07] [PASSED] drm_test_cmdline_multiple_options
[09:07:07] [PASSED] drm_test_cmdline_bpp_extra_and_option
[09:07:07] [PASSED] drm_test_cmdline_extra_and_option
[09:07:07] [PASSED] drm_test_cmdline_freestanding_options
[09:07:07] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[09:07:07] [PASSED] drm_test_cmdline_panel_orientation
[09:07:07] ================ drm_test_cmdline_invalid =================
[09:07:07] [PASSED] margin_only
[09:07:07] [PASSED] interlace_only
[09:07:07] [PASSED] res_missing_x
[09:07:07] [PASSED] res_missing_y
[09:07:07] [PASSED] res_bad_y
[09:07:07] [PASSED] res_missing_y_bpp
[09:07:07] [PASSED] res_bad_bpp
[09:07:07] [PASSED] res_bad_refresh
[09:07:07] [PASSED] res_bpp_refresh_force_on_off
[09:07:07] [PASSED] res_invalid_mode
[09:07:07] [PASSED] res_bpp_wrong_place_mode
[09:07:07] [PASSED] name_bpp_refresh
[09:07:07] [PASSED] name_refresh
[09:07:07] [PASSED] name_refresh_wrong_mode
[09:07:07] [PASSED] name_refresh_invalid_mode
[09:07:07] [PASSED] rotate_multiple
[09:07:07] [PASSED] rotate_invalid_val
[09:07:07] [PASSED] rotate_truncated
[09:07:07] [PASSED] invalid_option
[09:07:07] [PASSED] invalid_tv_option
[09:07:07] [PASSED] truncated_tv_option
[09:07:07] ============ [PASSED] drm_test_cmdline_invalid =============
[09:07:07] =============== drm_test_cmdline_tv_options ===============
[09:07:07] [PASSED] NTSC
[09:07:07] [PASSED] NTSC_443
[09:07:07] [PASSED] NTSC_J
[09:07:07] [PASSED] PAL
[09:07:07] [PASSED] PAL_M
[09:07:07] [PASSED] PAL_N
[09:07:07] [PASSED] SECAM
[09:07:07] [PASSED] MONO_525
[09:07:07] [PASSED] MONO_625
[09:07:07] =========== [PASSED] drm_test_cmdline_tv_options ===========
[09:07:07] =============== [PASSED] drm_cmdline_parser ================
[09:07:07] ========== drmm_connector_hdmi_init (20 subtests) ==========
[09:07:07] [PASSED] drm_test_connector_hdmi_init_valid
[09:07:07] [PASSED] drm_test_connector_hdmi_init_bpc_8
[09:07:07] [PASSED] drm_test_connector_hdmi_init_bpc_10
[09:07:07] [PASSED] drm_test_connector_hdmi_init_bpc_12
[09:07:07] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[09:07:07] [PASSED] drm_test_connector_hdmi_init_bpc_null
[09:07:07] [PASSED] drm_test_connector_hdmi_init_formats_empty
[09:07:07] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[09:07:07] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:07:07] [PASSED] supported_formats=0x9 yuv420_allowed=1
[09:07:07] [PASSED] supported_formats=0x9 yuv420_allowed=0
[09:07:07] [PASSED] supported_formats=0x3 yuv420_allowed=1
[09:07:07] [PASSED] supported_formats=0x3 yuv420_allowed=0
[09:07:07] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:07:07] [PASSED] drm_test_connector_hdmi_init_null_ddc
[09:07:07] [PASSED] drm_test_connector_hdmi_init_null_product
[09:07:07] [PASSED] drm_test_connector_hdmi_init_null_vendor
[09:07:07] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[09:07:07] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[09:07:07] [PASSED] drm_test_connector_hdmi_init_product_valid
[09:07:07] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[09:07:07] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[09:07:07] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[09:07:07] ========= drm_test_connector_hdmi_init_type_valid =========
[09:07:07] [PASSED] HDMI-A
[09:07:07] [PASSED] HDMI-B
[09:07:07] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[09:07:07] ======== drm_test_connector_hdmi_init_type_invalid ========
[09:07:07] [PASSED] Unknown
[09:07:07] [PASSED] VGA
[09:07:07] [PASSED] DVI-I
[09:07:07] [PASSED] DVI-D
[09:07:07] [PASSED] DVI-A
[09:07:07] [PASSED] Composite
[09:07:07] [PASSED] SVIDEO
[09:07:07] [PASSED] LVDS
[09:07:07] [PASSED] Component
[09:07:07] [PASSED] DIN
[09:07:07] [PASSED] DP
[09:07:07] [PASSED] TV
[09:07:07] [PASSED] eDP
[09:07:07] [PASSED] Virtual
[09:07:07] [PASSED] DSI
[09:07:07] [PASSED] DPI
[09:07:07] [PASSED] Writeback
[09:07:07] [PASSED] SPI
[09:07:07] [PASSED] USB
[09:07:07] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[09:07:07] ============ [PASSED] drmm_connector_hdmi_init =============
[09:07:07] ============= drmm_connector_init (3 subtests) =============
[09:07:07] [PASSED] drm_test_drmm_connector_init
[09:07:07] [PASSED] drm_test_drmm_connector_init_null_ddc
[09:07:07] ========= drm_test_drmm_connector_init_type_valid =========
[09:07:07] [PASSED] Unknown
[09:07:07] [PASSED] VGA
[09:07:07] [PASSED] DVI-I
[09:07:07] [PASSED] DVI-D
[09:07:07] [PASSED] DVI-A
[09:07:07] [PASSED] Composite
[09:07:07] [PASSED] SVIDEO
[09:07:07] [PASSED] LVDS
[09:07:07] [PASSED] Component
[09:07:07] [PASSED] DIN
[09:07:07] [PASSED] DP
[09:07:07] [PASSED] HDMI-A
[09:07:07] [PASSED] HDMI-B
[09:07:07] [PASSED] TV
[09:07:07] [PASSED] eDP
[09:07:07] [PASSED] Virtual
[09:07:07] [PASSED] DSI
[09:07:07] [PASSED] DPI
[09:07:07] [PASSED] Writeback
[09:07:07] [PASSED] SPI
[09:07:07] [PASSED] USB
[09:07:07] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[09:07:07] =============== [PASSED] drmm_connector_init ===============
[09:07:07] ========= drm_connector_dynamic_init (6 subtests) ==========
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_init
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_init_properties
[09:07:07] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[09:07:07] [PASSED] Unknown
[09:07:07] [PASSED] VGA
[09:07:07] [PASSED] DVI-I
[09:07:07] [PASSED] DVI-D
[09:07:07] [PASSED] DVI-A
[09:07:07] [PASSED] Composite
[09:07:07] [PASSED] SVIDEO
[09:07:07] [PASSED] LVDS
[09:07:07] [PASSED] Component
[09:07:07] [PASSED] DIN
[09:07:07] [PASSED] DP
[09:07:07] [PASSED] HDMI-A
[09:07:07] [PASSED] HDMI-B
[09:07:07] [PASSED] TV
[09:07:07] [PASSED] eDP
[09:07:07] [PASSED] Virtual
[09:07:07] [PASSED] DSI
[09:07:07] [PASSED] DPI
[09:07:07] [PASSED] Writeback
[09:07:07] [PASSED] SPI
[09:07:07] [PASSED] USB
[09:07:07] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[09:07:07] ======== drm_test_drm_connector_dynamic_init_name =========
[09:07:07] [PASSED] Unknown
[09:07:07] [PASSED] VGA
[09:07:07] [PASSED] DVI-I
[09:07:07] [PASSED] DVI-D
[09:07:07] [PASSED] DVI-A
[09:07:07] [PASSED] Composite
[09:07:07] [PASSED] SVIDEO
[09:07:07] [PASSED] LVDS
[09:07:07] [PASSED] Component
[09:07:07] [PASSED] DIN
[09:07:07] [PASSED] DP
[09:07:07] [PASSED] HDMI-A
[09:07:07] [PASSED] HDMI-B
[09:07:07] [PASSED] TV
[09:07:07] [PASSED] eDP
[09:07:07] [PASSED] Virtual
[09:07:07] [PASSED] DSI
[09:07:07] [PASSED] DPI
[09:07:07] [PASSED] Writeback
[09:07:07] [PASSED] SPI
[09:07:07] [PASSED] USB
[09:07:07] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[09:07:07] =========== [PASSED] drm_connector_dynamic_init ============
[09:07:07] ==== drm_connector_dynamic_register_early (4 subtests) =====
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[09:07:07] ====== [PASSED] drm_connector_dynamic_register_early =======
[09:07:07] ======= drm_connector_dynamic_register (7 subtests) ========
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[09:07:07] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[09:07:07] ========= [PASSED] drm_connector_dynamic_register ==========
[09:07:07] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[09:07:07] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[09:07:07] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[09:07:07] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[09:07:07] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[09:07:07] ========== drm_test_get_tv_mode_from_name_valid ===========
[09:07:07] [PASSED] NTSC
[09:07:07] [PASSED] NTSC-443
[09:07:07] [PASSED] NTSC-J
[09:07:07] [PASSED] PAL
[09:07:07] [PASSED] PAL-M
[09:07:07] [PASSED] PAL-N
[09:07:07] [PASSED] SECAM
[09:07:07] [PASSED] Mono
[09:07:07] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[09:07:07] [PASSED] drm_test_get_tv_mode_from_name_truncated
[09:07:07] ============ [PASSED] drm_get_tv_mode_from_name ============
[09:07:07] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[09:07:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[09:07:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[09:07:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[09:07:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[09:07:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[09:07:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[09:07:07] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[09:07:07] [PASSED] VIC 96
[09:07:07] [PASSED] VIC 97
[09:07:07] [PASSED] VIC 101
[09:07:07] [PASSED] VIC 102
[09:07:07] [PASSED] VIC 106
[09:07:07] [PASSED] VIC 107
[09:07:07] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[09:07:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[09:07:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[09:07:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[09:07:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[09:07:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[09:07:07] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[09:07:07] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[09:07:07] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[09:07:07] [PASSED] Automatic
[09:07:07] [PASSED] Full
[09:07:07] [PASSED] Limited 16:235
[09:07:07] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[09:07:07] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[09:07:07] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[09:07:07] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[09:07:07] === drm_test_drm_hdmi_connector_get_output_format_name ====
[09:07:07] [PASSED] RGB
[09:07:07] [PASSED] YUV 4:2:0
[09:07:07] [PASSED] YUV 4:2:2
[09:07:07] [PASSED] YUV 4:4:4
[09:07:07] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[09:07:07] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[09:07:07] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[09:07:07] ============= drm_damage_helper (21 subtests) ==============
[09:07:07] [PASSED] drm_test_damage_iter_no_damage
[09:07:07] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[09:07:07] [PASSED] drm_test_damage_iter_no_damage_src_moved
[09:07:07] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[09:07:07] [PASSED] drm_test_damage_iter_no_damage_not_visible
[09:07:07] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[09:07:07] [PASSED] drm_test_damage_iter_no_damage_no_fb
[09:07:07] [PASSED] drm_test_damage_iter_simple_damage
[09:07:07] [PASSED] drm_test_damage_iter_single_damage
[09:07:07] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[09:07:07] [PASSED] drm_test_damage_iter_single_damage_outside_src
[09:07:07] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[09:07:07] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[09:07:07] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[09:07:07] [PASSED] drm_test_damage_iter_single_damage_src_moved
[09:07:07] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[09:07:07] [PASSED] drm_test_damage_iter_damage
[09:07:07] [PASSED] drm_test_damage_iter_damage_one_intersect
[09:07:07] [PASSED] drm_test_damage_iter_damage_one_outside
[09:07:07] [PASSED] drm_test_damage_iter_damage_src_moved
[09:07:07] [PASSED] drm_test_damage_iter_damage_not_visible
[09:07:07] ================ [PASSED] drm_damage_helper ================
[09:07:07] ============== drm_dp_mst_helper (3 subtests) ==============
[09:07:07] ============== drm_test_dp_mst_calc_pbn_mode ==============
[09:07:07] [PASSED] Clock 154000 BPP 30 DSC disabled
[09:07:07] [PASSED] Clock 234000 BPP 30 DSC disabled
[09:07:07] [PASSED] Clock 297000 BPP 24 DSC disabled
[09:07:07] [PASSED] Clock 332880 BPP 24 DSC enabled
[09:07:07] [PASSED] Clock 324540 BPP 24 DSC enabled
[09:07:07] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[09:07:07] ============== drm_test_dp_mst_calc_pbn_div ===============
[09:07:07] [PASSED] Link rate 2000000 lane count 4
[09:07:07] [PASSED] Link rate 2000000 lane count 2
[09:07:07] [PASSED] Link rate 2000000 lane count 1
[09:07:07] [PASSED] Link rate 1350000 lane count 4
[09:07:07] [PASSED] Link rate 1350000 lane count 2
[09:07:07] [PASSED] Link rate 1350000 lane count 1
[09:07:07] [PASSED] Link rate 1000000 lane count 4
[09:07:07] [PASSED] Link rate 1000000 lane count 2
[09:07:07] [PASSED] Link rate 1000000 lane count 1
[09:07:07] [PASSED] Link rate 810000 lane count 4
[09:07:07] [PASSED] Link rate 810000 lane count 2
[09:07:07] [PASSED] Link rate 810000 lane count 1
[09:07:07] [PASSED] Link rate 540000 lane count 4
[09:07:07] [PASSED] Link rate 540000 lane count 2
[09:07:07] [PASSED] Link rate 540000 lane count 1
[09:07:07] [PASSED] Link rate 270000 lane count 4
[09:07:07] [PASSED] Link rate 270000 lane count 2
[09:07:07] [PASSED] Link rate 270000 lane count 1
[09:07:07] [PASSED] Link rate 162000 lane count 4
[09:07:07] [PASSED] Link rate 162000 lane count 2
[09:07:07] [PASSED] Link rate 162000 lane count 1
[09:07:07] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[09:07:07] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[09:07:07] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[09:07:07] [PASSED] DP_POWER_UP_PHY with port number
[09:07:07] [PASSED] DP_POWER_DOWN_PHY with port number
[09:07:07] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[09:07:07] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[09:07:07] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[09:07:07] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[09:07:07] [PASSED] DP_QUERY_PAYLOAD with port number
[09:07:07] [PASSED] DP_QUERY_PAYLOAD with VCPI
[09:07:07] [PASSED] DP_REMOTE_DPCD_READ with port number
[09:07:07] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[09:07:07] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[09:07:07] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[09:07:07] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[09:07:07] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[09:07:07] [PASSED] DP_REMOTE_I2C_READ with port number
[09:07:07] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[09:07:07] [PASSED] DP_REMOTE_I2C_READ with transactions array
[09:07:07] [PASSED] DP_REMOTE_I2C_WRITE with port number
[09:07:07] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[09:07:07] [PASSED] DP_REMOTE_I2C_WRITE with data array
[09:07:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[09:07:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[09:07:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[09:07:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[09:07:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[09:07:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[09:07:07] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[09:07:07] ================ [PASSED] drm_dp_mst_helper ================
[09:07:07] ================== drm_exec (7 subtests) ===================
[09:07:07] [PASSED] sanitycheck
[09:07:07] [PASSED] test_lock
[09:07:07] [PASSED] test_lock_unlock
[09:07:07] [PASSED] test_duplicates
[09:07:07] [PASSED] test_prepare
[09:07:07] [PASSED] test_prepare_array
[09:07:07] [PASSED] test_multiple_loops
[09:07:07] ==================== [PASSED] drm_exec =====================
[09:07:07] =========== drm_format_helper_test (17 subtests) ===========
[09:07:07] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[09:07:07] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[09:07:07] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[09:07:07] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[09:07:07] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[09:07:07] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[09:07:07] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[09:07:07] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[09:07:07] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[09:07:07] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[09:07:07] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[09:07:07] ============== drm_test_fb_xrgb8888_to_mono ===============
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[09:07:07] ==================== drm_test_fb_swab =====================
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ================ [PASSED] drm_test_fb_swab =================
[09:07:07] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[09:07:07] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[09:07:07] [PASSED] single_pixel_source_buffer
[09:07:07] [PASSED] single_pixel_clip_rectangle
[09:07:07] [PASSED] well_known_colors
[09:07:07] [PASSED] destination_pitch
[09:07:07] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[09:07:07] ================= drm_test_fb_clip_offset =================
[09:07:07] [PASSED] pass through
[09:07:07] [PASSED] horizontal offset
[09:07:07] [PASSED] vertical offset
[09:07:07] [PASSED] horizontal and vertical offset
[09:07:07] [PASSED] horizontal offset (custom pitch)
[09:07:07] [PASSED] vertical offset (custom pitch)
[09:07:07] [PASSED] horizontal and vertical offset (custom pitch)
[09:07:07] ============= [PASSED] drm_test_fb_clip_offset =============
[09:07:07] =================== drm_test_fb_memcpy ====================
[09:07:07] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[09:07:07] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[09:07:07] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[09:07:07] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[09:07:07] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[09:07:07] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[09:07:07] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[09:07:07] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[09:07:07] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[09:07:07] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[09:07:07] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[09:07:07] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[09:07:07] =============== [PASSED] drm_test_fb_memcpy ================
[09:07:07] ============= [PASSED] drm_format_helper_test ==============
[09:07:07] ================= drm_format (18 subtests) =================
[09:07:07] [PASSED] drm_test_format_block_width_invalid
[09:07:07] [PASSED] drm_test_format_block_width_one_plane
[09:07:07] [PASSED] drm_test_format_block_width_two_plane
[09:07:07] [PASSED] drm_test_format_block_width_three_plane
[09:07:07] [PASSED] drm_test_format_block_width_tiled
[09:07:07] [PASSED] drm_test_format_block_height_invalid
[09:07:07] [PASSED] drm_test_format_block_height_one_plane
[09:07:07] [PASSED] drm_test_format_block_height_two_plane
[09:07:07] [PASSED] drm_test_format_block_height_three_plane
[09:07:07] [PASSED] drm_test_format_block_height_tiled
[09:07:07] [PASSED] drm_test_format_min_pitch_invalid
[09:07:07] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[09:07:07] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[09:07:07] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[09:07:07] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[09:07:07] [PASSED] drm_test_format_min_pitch_two_plane
[09:07:07] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[09:07:07] [PASSED] drm_test_format_min_pitch_tiled
[09:07:07] =================== [PASSED] drm_format ====================
[09:07:07] ============== drm_framebuffer (10 subtests) ===============
[09:07:07] ========== drm_test_framebuffer_check_src_coords ==========
[09:07:07] [PASSED] Success: source fits into fb
[09:07:07] [PASSED] Fail: overflowing fb with x-axis coordinate
[09:07:07] [PASSED] Fail: overflowing fb with y-axis coordinate
[09:07:07] [PASSED] Fail: overflowing fb with source width
[09:07:07] [PASSED] Fail: overflowing fb with source height
[09:07:07] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[09:07:07] [PASSED] drm_test_framebuffer_cleanup
[09:07:07] =============== drm_test_framebuffer_create ===============
[09:07:07] [PASSED] ABGR8888 normal sizes
[09:07:07] [PASSED] ABGR8888 max sizes
[09:07:07] [PASSED] ABGR8888 pitch greater than min required
[09:07:07] [PASSED] ABGR8888 pitch less than min required
[09:07:07] [PASSED] ABGR8888 Invalid width
[09:07:07] [PASSED] ABGR8888 Invalid buffer handle
[09:07:07] [PASSED] No pixel format
[09:07:07] [PASSED] ABGR8888 Width 0
[09:07:07] [PASSED] ABGR8888 Height 0
[09:07:07] [PASSED] ABGR8888 Out of bound height * pitch combination
[09:07:07] [PASSED] ABGR8888 Large buffer offset
[09:07:07] [PASSED] ABGR8888 Buffer offset for inexistent plane
[09:07:07] [PASSED] ABGR8888 Invalid flag
[09:07:07] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[09:07:07] [PASSED] ABGR8888 Valid buffer modifier
[09:07:07] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[09:07:07] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[09:07:07] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[09:07:07] [PASSED] NV12 Normal sizes
[09:07:07] [PASSED] NV12 Max sizes
[09:07:07] [PASSED] NV12 Invalid pitch
[09:07:07] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[09:07:07] [PASSED] NV12 different modifier per-plane
[09:07:07] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[09:07:07] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[09:07:07] [PASSED] NV12 Modifier for inexistent plane
[09:07:07] [PASSED] NV12 Handle for inexistent plane
[09:07:07] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[09:07:07] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[09:07:07] [PASSED] YVU420 Normal sizes
[09:07:07] [PASSED] YVU420 Max sizes
[09:07:07] [PASSED] YVU420 Invalid pitch
[09:07:07] [PASSED] YVU420 Different pitches
[09:07:07] [PASSED] YVU420 Different buffer offsets/pitches
[09:07:07] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[09:07:07] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[09:07:07] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[09:07:07] [PASSED] YVU420 Valid modifier
[09:07:07] [PASSED] YVU420 Different modifiers per plane
[09:07:07] [PASSED] YVU420 Modifier for inexistent plane
[09:07:07] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[09:07:07] [PASSED] X0L2 Normal sizes
[09:07:07] [PASSED] X0L2 Max sizes
[09:07:07] [PASSED] X0L2 Invalid pitch
[09:07:07] [PASSED] X0L2 Pitch greater than minimum required
[09:07:07] [PASSED] X0L2 Handle for inexistent plane
[09:07:07] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[09:07:07] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[09:07:07] [PASSED] X0L2 Valid modifier
[09:07:07] [PASSED] X0L2 Modifier for inexistent plane
[09:07:07] =========== [PASSED] drm_test_framebuffer_create ===========
[09:07:07] [PASSED] drm_test_framebuffer_free
[09:07:07] [PASSED] drm_test_framebuffer_init
[09:07:07] [PASSED] drm_test_framebuffer_init_bad_format
[09:07:07] [PASSED] drm_test_framebuffer_init_dev_mismatch
[09:07:07] [PASSED] drm_test_framebuffer_lookup
[09:07:07] [PASSED] drm_test_framebuffer_lookup_inexistent
[09:07:07] [PASSED] drm_test_framebuffer_modifiers_not_supported
[09:07:07] ================= [PASSED] drm_framebuffer =================
[09:07:07] ================ drm_gem_shmem (8 subtests) ================
[09:07:07] [PASSED] drm_gem_shmem_test_obj_create
[09:07:07] [PASSED] drm_gem_shmem_test_obj_create_private
[09:07:07] [PASSED] drm_gem_shmem_test_pin_pages
[09:07:07] [PASSED] drm_gem_shmem_test_vmap
[09:07:07] [PASSED] drm_gem_shmem_test_get_sg_table
[09:07:07] [PASSED] drm_gem_shmem_test_get_pages_sgt
[09:07:07] [PASSED] drm_gem_shmem_test_madvise
[09:07:07] [PASSED] drm_gem_shmem_test_purge
[09:07:07] ================== [PASSED] drm_gem_shmem ==================
[09:07:07] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[09:07:07] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[09:07:07] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[09:07:07] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[09:07:07] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[09:07:07] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[09:07:07] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[09:07:07] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[09:07:07] [PASSED] Automatic
[09:07:07] [PASSED] Full
[09:07:07] [PASSED] Limited 16:235
[09:07:07] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[09:07:07] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[09:07:07] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[09:07:07] [PASSED] drm_test_check_disable_connector
[09:07:07] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[09:07:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[09:07:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[09:07:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[09:07:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[09:07:07] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[09:07:07] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[09:07:07] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[09:07:07] [PASSED] drm_test_check_output_bpc_dvi
[09:07:07] [PASSED] drm_test_check_output_bpc_format_vic_1
[09:07:07] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[09:07:07] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[09:07:07] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[09:07:07] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[09:07:07] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[09:07:07] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[09:07:07] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[09:07:07] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[09:07:07] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[09:07:07] [PASSED] drm_test_check_broadcast_rgb_value
[09:07:07] [PASSED] drm_test_check_bpc_8_value
[09:07:07] [PASSED] drm_test_check_bpc_10_value
[09:07:07] [PASSED] drm_test_check_bpc_12_value
[09:07:07] [PASSED] drm_test_check_format_value
[09:07:07] [PASSED] drm_test_check_tmds_char_value
[09:07:07] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[09:07:07] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[09:07:07] [PASSED] drm_test_check_mode_valid
[09:07:07] [PASSED] drm_test_check_mode_valid_reject
[09:07:07] [PASSED] drm_test_check_mode_valid_reject_rate
[09:07:07] [PASSED] drm_test_check_mode_valid_reject_max_clock
[09:07:07] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[09:07:07] ================= drm_managed (2 subtests) =================
[09:07:07] [PASSED] drm_test_managed_release_action
[09:07:07] [PASSED] drm_test_managed_run_action
[09:07:07] =================== [PASSED] drm_managed ===================
[09:07:07] =================== drm_mm (6 subtests) ====================
[09:07:07] [PASSED] drm_test_mm_init
[09:07:07] [PASSED] drm_test_mm_debug
[09:07:07] [PASSED] drm_test_mm_align32
[09:07:07] [PASSED] drm_test_mm_align64
[09:07:07] [PASSED] drm_test_mm_lowest
[09:07:07] [PASSED] drm_test_mm_highest
[09:07:07] ===================== [PASSED] drm_mm ======================
[09:07:07] ============= drm_modes_analog_tv (5 subtests) =============
[09:07:07] [PASSED] drm_test_modes_analog_tv_mono_576i
[09:07:07] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[09:07:07] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[09:07:07] [PASSED] drm_test_modes_analog_tv_pal_576i
[09:07:07] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[09:07:07] =============== [PASSED] drm_modes_analog_tv ===============
[09:07:07] ============== drm_plane_helper (2 subtests) ===============
[09:07:07] =============== drm_test_check_plane_state ================
[09:07:07] [PASSED] clipping_simple
[09:07:07] [PASSED] clipping_rotate_reflect
[09:07:07] [PASSED] positioning_simple
[09:07:07] [PASSED] upscaling
[09:07:07] [PASSED] downscaling
[09:07:07] [PASSED] rounding1
[09:07:07] [PASSED] rounding2
[09:07:07] [PASSED] rounding3
[09:07:07] [PASSED] rounding4
[09:07:07] =========== [PASSED] drm_test_check_plane_state ============
[09:07:07] =========== drm_test_check_invalid_plane_state ============
[09:07:07] [PASSED] positioning_invalid
[09:07:07] [PASSED] upscaling_invalid
[09:07:07] [PASSED] downscaling_invalid
[09:07:07] ======= [PASSED] drm_test_check_invalid_plane_state ========
[09:07:07] ================ [PASSED] drm_plane_helper =================
[09:07:07] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[09:07:07] ====== drm_test_connector_helper_tv_get_modes_check =======
[09:07:07] [PASSED] None
[09:07:07] [PASSED] PAL
[09:07:07] [PASSED] NTSC
[09:07:07] [PASSED] Both, NTSC Default
[09:07:07] [PASSED] Both, PAL Default
[09:07:07] [PASSED] Both, NTSC Default, with PAL on command-line
[09:07:07] [PASSED] Both, PAL Default, with NTSC on command-line
[09:07:07] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[09:07:07] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[09:07:07] ================== drm_rect (9 subtests) ===================
[09:07:07] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[09:07:07] [PASSED] drm_test_rect_clip_scaled_not_clipped
[09:07:07] [PASSED] drm_test_rect_clip_scaled_clipped
[09:07:07] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[09:07:07] ================= drm_test_rect_intersect =================
[09:07:07] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[09:07:07] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[09:07:07] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[09:07:07] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[09:07:07] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[09:07:07] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[09:07:07] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[09:07:07] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[09:07:07] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[09:07:07] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[09:07:07] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[09:07:07] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[09:07:07] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[09:07:07] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[09:07:07] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[09:07:07] ============= [PASSED] drm_test_rect_intersect =============
[09:07:07] ================ drm_test_rect_calc_hscale ================
[09:07:07] [PASSED] normal use
[09:07:07] [PASSED] out of max range
[09:07:07] [PASSED] out of min range
[09:07:07] [PASSED] zero dst
[09:07:07] [PASSED] negative src
[09:07:07] [PASSED] negative dst
[09:07:07] ============ [PASSED] drm_test_rect_calc_hscale ============
[09:07:07] ================ drm_test_rect_calc_vscale ================
[09:07:07] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[09:07:07] [PASSED] out of max range
[09:07:07] [PASSED] out of min range
[09:07:07] [PASSED] zero dst
[09:07:07] [PASSED] negative src
[09:07:07] [PASSED] negative dst
[09:07:07] ============ [PASSED] drm_test_rect_calc_vscale ============
[09:07:07] ================== drm_test_rect_rotate ===================
[09:07:07] [PASSED] reflect-x
[09:07:07] [PASSED] reflect-y
[09:07:07] [PASSED] rotate-0
[09:07:07] [PASSED] rotate-90
[09:07:07] [PASSED] rotate-180
[09:07:07] [PASSED] rotate-270
[09:07:07] ============== [PASSED] drm_test_rect_rotate ===============
[09:07:07] ================ drm_test_rect_rotate_inv =================
[09:07:07] [PASSED] reflect-x
[09:07:07] [PASSED] reflect-y
[09:07:07] [PASSED] rotate-0
[09:07:07] [PASSED] rotate-90
[09:07:07] [PASSED] rotate-180
[09:07:07] [PASSED] rotate-270
[09:07:07] ============ [PASSED] drm_test_rect_rotate_inv =============
[09:07:07] ==================== [PASSED] drm_rect =====================
[09:07:07] ============ drm_sysfb_modeset_test (1 subtest) ============
[09:07:07] ============ drm_test_sysfb_build_fourcc_list =============
[09:07:07] [PASSED] no native formats
[09:07:07] [PASSED] XRGB8888 as native format
[09:07:07] [PASSED] remove duplicates
[09:07:07] [PASSED] convert alpha formats
[09:07:07] [PASSED] random formats
[09:07:07] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[09:07:07] ============= [PASSED] drm_sysfb_modeset_test ==============
[09:07:07] ================== drm_fixp (2 subtests) ===================
[09:07:07] [PASSED] drm_test_int2fixp
[09:07:07] [PASSED] drm_test_sm2fixp
[09:07:07] ==================== [PASSED] drm_fixp =====================
[09:07:07] ============================================================
[09:07:07] Testing complete. Ran 624 tests: passed: 624
[09:07:07] Elapsed time: 29.167s total, 1.583s configuring, 27.167s building, 0.362s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[09:07:07] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:07:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:07:18] Starting KUnit Kernel (1/1)...
[09:07:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:07:18] ================= ttm_device (5 subtests) ==================
[09:07:18] [PASSED] ttm_device_init_basic
[09:07:18] [PASSED] ttm_device_init_multiple
[09:07:18] [PASSED] ttm_device_fini_basic
[09:07:18] [PASSED] ttm_device_init_no_vma_man
[09:07:18] ================== ttm_device_init_pools ==================
[09:07:18] [PASSED] No DMA allocations, no DMA32 required
[09:07:18] [PASSED] DMA allocations, DMA32 required
[09:07:18] [PASSED] No DMA allocations, DMA32 required
[09:07:18] [PASSED] DMA allocations, no DMA32 required
[09:07:18] ============== [PASSED] ttm_device_init_pools ==============
[09:07:18] =================== [PASSED] ttm_device ====================
[09:07:18] ================== ttm_pool (8 subtests) ===================
[09:07:18] ================== ttm_pool_alloc_basic ===================
[09:07:18] [PASSED] One page
[09:07:18] [PASSED] More than one page
[09:07:18] [PASSED] Above the allocation limit
[09:07:18] [PASSED] One page, with coherent DMA mappings enabled
[09:07:18] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:07:18] ============== [PASSED] ttm_pool_alloc_basic ===============
[09:07:18] ============== ttm_pool_alloc_basic_dma_addr ==============
[09:07:18] [PASSED] One page
[09:07:18] [PASSED] More than one page
[09:07:18] [PASSED] Above the allocation limit
[09:07:18] [PASSED] One page, with coherent DMA mappings enabled
[09:07:18] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:07:18] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[09:07:18] [PASSED] ttm_pool_alloc_order_caching_match
[09:07:18] [PASSED] ttm_pool_alloc_caching_mismatch
[09:07:18] [PASSED] ttm_pool_alloc_order_mismatch
[09:07:18] [PASSED] ttm_pool_free_dma_alloc
[09:07:18] [PASSED] ttm_pool_free_no_dma_alloc
[09:07:18] [PASSED] ttm_pool_fini_basic
[09:07:18] ==================== [PASSED] ttm_pool =====================
[09:07:18] ================ ttm_resource (8 subtests) =================
[09:07:18] ================= ttm_resource_init_basic =================
[09:07:18] [PASSED] Init resource in TTM_PL_SYSTEM
[09:07:18] [PASSED] Init resource in TTM_PL_VRAM
[09:07:18] [PASSED] Init resource in a private placement
[09:07:18] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[09:07:18] ============= [PASSED] ttm_resource_init_basic =============
[09:07:18] [PASSED] ttm_resource_init_pinned
[09:07:18] [PASSED] ttm_resource_fini_basic
[09:07:18] [PASSED] ttm_resource_manager_init_basic
[09:07:18] [PASSED] ttm_resource_manager_usage_basic
[09:07:18] [PASSED] ttm_resource_manager_set_used_basic
[09:07:18] [PASSED] ttm_sys_man_alloc_basic
[09:07:18] [PASSED] ttm_sys_man_free_basic
[09:07:18] ================== [PASSED] ttm_resource ===================
[09:07:18] =================== ttm_tt (15 subtests) ===================
[09:07:18] ==================== ttm_tt_init_basic ====================
[09:07:18] [PASSED] Page-aligned size
[09:07:18] [PASSED] Extra pages requested
[09:07:18] ================ [PASSED] ttm_tt_init_basic ================
[09:07:18] [PASSED] ttm_tt_init_misaligned
[09:07:18] [PASSED] ttm_tt_fini_basic
[09:07:18] [PASSED] ttm_tt_fini_sg
[09:07:18] [PASSED] ttm_tt_fini_shmem
[09:07:18] [PASSED] ttm_tt_create_basic
[09:07:18] [PASSED] ttm_tt_create_invalid_bo_type
[09:07:18] [PASSED] ttm_tt_create_ttm_exists
[09:07:18] [PASSED] ttm_tt_create_failed
[09:07:18] [PASSED] ttm_tt_destroy_basic
[09:07:18] [PASSED] ttm_tt_populate_null_ttm
[09:07:18] [PASSED] ttm_tt_populate_populated_ttm
[09:07:18] [PASSED] ttm_tt_unpopulate_basic
[09:07:18] [PASSED] ttm_tt_unpopulate_empty_ttm
[09:07:18] [PASSED] ttm_tt_swapin_basic
[09:07:18] ===================== [PASSED] ttm_tt ======================
[09:07:18] =================== ttm_bo (14 subtests) ===================
[09:07:18] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[09:07:18] [PASSED] Cannot be interrupted and sleeps
[09:07:18] [PASSED] Cannot be interrupted, locks straight away
[09:07:18] [PASSED] Can be interrupted, sleeps
[09:07:18] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[09:07:18] [PASSED] ttm_bo_reserve_locked_no_sleep
[09:07:18] [PASSED] ttm_bo_reserve_no_wait_ticket
[09:07:18] [PASSED] ttm_bo_reserve_double_resv
[09:07:18] [PASSED] ttm_bo_reserve_interrupted
[09:07:18] [PASSED] ttm_bo_reserve_deadlock
[09:07:18] [PASSED] ttm_bo_unreserve_basic
[09:07:18] [PASSED] ttm_bo_unreserve_pinned
[09:07:18] [PASSED] ttm_bo_unreserve_bulk
[09:07:18] [PASSED] ttm_bo_fini_basic
[09:07:18] [PASSED] ttm_bo_fini_shared_resv
[09:07:18] [PASSED] ttm_bo_pin_basic
[09:07:18] [PASSED] ttm_bo_pin_unpin_resource
[09:07:18] [PASSED] ttm_bo_multiple_pin_one_unpin
[09:07:18] ===================== [PASSED] ttm_bo ======================
[09:07:18] ============== ttm_bo_validate (21 subtests) ===============
[09:07:18] ============== ttm_bo_init_reserved_sys_man ===============
[09:07:18] [PASSED] Buffer object for userspace
[09:07:18] [PASSED] Kernel buffer object
[09:07:18] [PASSED] Shared buffer object
[09:07:18] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[09:07:18] ============== ttm_bo_init_reserved_mock_man ==============
[09:07:18] [PASSED] Buffer object for userspace
[09:07:18] [PASSED] Kernel buffer object
[09:07:18] [PASSED] Shared buffer object
[09:07:18] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[09:07:18] [PASSED] ttm_bo_init_reserved_resv
[09:07:18] ================== ttm_bo_validate_basic ==================
[09:07:18] [PASSED] Buffer object for userspace
[09:07:18] [PASSED] Kernel buffer object
[09:07:18] [PASSED] Shared buffer object
[09:07:18] ============== [PASSED] ttm_bo_validate_basic ==============
[09:07:18] [PASSED] ttm_bo_validate_invalid_placement
[09:07:18] ============= ttm_bo_validate_same_placement ==============
[09:07:18] [PASSED] System manager
[09:07:18] [PASSED] VRAM manager
[09:07:18] ========= [PASSED] ttm_bo_validate_same_placement ==========
[09:07:18] [PASSED] ttm_bo_validate_failed_alloc
[09:07:18] [PASSED] ttm_bo_validate_pinned
[09:07:18] [PASSED] ttm_bo_validate_busy_placement
[09:07:18] ================ ttm_bo_validate_multihop =================
[09:07:18] [PASSED] Buffer object for userspace
[09:07:18] [PASSED] Kernel buffer object
[09:07:18] [PASSED] Shared buffer object
[09:07:18] ============ [PASSED] ttm_bo_validate_multihop =============
[09:07:18] ========== ttm_bo_validate_no_placement_signaled ==========
[09:07:18] [PASSED] Buffer object in system domain, no page vector
[09:07:18] [PASSED] Buffer object in system domain with an existing page vector
[09:07:18] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[09:07:18] ======== ttm_bo_validate_no_placement_not_signaled ========
[09:07:18] [PASSED] Buffer object for userspace
[09:07:18] [PASSED] Kernel buffer object
[09:07:18] [PASSED] Shared buffer object
[09:07:18] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[09:07:18] [PASSED] ttm_bo_validate_move_fence_signaled
[09:07:18] ========= ttm_bo_validate_move_fence_not_signaled =========
[09:07:18] [PASSED] Waits for GPU
[09:07:18] [PASSED] Tries to lock straight away
[09:07:18] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[09:07:18] [PASSED] ttm_bo_validate_happy_evict
[09:07:18] [PASSED] ttm_bo_validate_all_pinned_evict
[09:07:18] [PASSED] ttm_bo_validate_allowed_only_evict
[09:07:18] [PASSED] ttm_bo_validate_deleted_evict
[09:07:18] [PASSED] ttm_bo_validate_busy_domain_evict
[09:07:18] [PASSED] ttm_bo_validate_evict_gutting
[09:07:18] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[09:07:18] ================= [PASSED] ttm_bo_validate =================
[09:07:18] ============================================================
[09:07:18] Testing complete. Ran 101 tests: passed: 101
[09:07:18] Elapsed time: 11.098s total, 1.627s configuring, 9.254s building, 0.180s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe: drm/xe: Separate out GuC RC code (rev3)
2025-12-23 8:51 [PATCH v4 0/2] drm/xe: drm/xe: Separate out GuC RC code Vinay Belgaumkar
` (3 preceding siblings ...)
2025-12-23 9:07 ` ✓ CI.KUnit: success " Patchwork
@ 2025-12-23 9:52 ` Patchwork
2025-12-23 18:58 ` ✓ Xe.CI.Full: " Patchwork
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2025-12-23 9:52 UTC (permalink / raw)
To: Vinay Belgaumkar; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1499 bytes --]
== Series Details ==
Series: drm/xe: drm/xe: Separate out GuC RC code (rev3)
URL : https://patchwork.freedesktop.org/series/159128/
State : success
== Summary ==
CI Bug Log - changes from xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9_BAT -> xe-pw-159128v3_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-159128v3_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_waitfence@engine:
- bat-dg2-oem2: [PASS][1] -> [FAIL][2] ([Intel XE#6519])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/bat-dg2-oem2/igt@xe_waitfence@engine.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/bat-dg2-oem2/igt@xe_waitfence@engine.html
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
Build changes
-------------
* Linux: xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9 -> xe-pw-159128v3
IGT_8674: f38f4d8e9c65aff45ac807e646d06e38bc3193a2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9: f101d56dc32350daa45c130ff7a6d46512f614a9
xe-pw-159128v3: 159128v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/index.html
[-- Attachment #2: Type: text/html, Size: 2064 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.Full: success for drm/xe: drm/xe: Separate out GuC RC code (rev3)
2025-12-23 8:51 [PATCH v4 0/2] drm/xe: drm/xe: Separate out GuC RC code Vinay Belgaumkar
` (4 preceding siblings ...)
2025-12-23 9:52 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-12-23 18:58 ` Patchwork
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2025-12-23 18:58 UTC (permalink / raw)
To: Vinay Belgaumkar; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 60903 bytes --]
== Series Details ==
Series: drm/xe: drm/xe: Separate out GuC RC code (rev3)
URL : https://patchwork.freedesktop.org/series/159128/
State : success
== Summary ==
CI Bug Log - changes from xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9_FULL -> xe-pw-159128v3_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-159128v3_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2:
- shard-bmg: NOTRUN -> [FAIL][1] ([Intel XE#6078])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][2] ([Intel XE#2327])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-180:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#1124])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html
* igt@kms_bw@linear-tiling-1-displays-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#367])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html
* igt@kms_ccs@crc-primary-basic-yf-tiled-ccs:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#2887]) +1 other test skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_ccs@crc-primary-basic-yf-tiled-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#3432])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#2325])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_edid@dp-edid-resolution-list:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2252]) +2 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_chamelium_edid@dp-edid-resolution-list.html
* igt@kms_content_protection@legacy:
- shard-bmg: NOTRUN -> [FAIL][10] ([Intel XE#1178]) +1 other test fail
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_content_protection@legacy.html
* igt@kms_cursor_crc@cursor-rapid-movement-128x42:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2320])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-bmg: [PASS][12] -> [SKIP][13] ([Intel XE#2291]) +2 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-3/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [PASS][14] -> [FAIL][15] ([Intel XE#6715])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#1508])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible:
- shard-bmg: [PASS][17] -> [SKIP][18] ([Intel XE#2316]) +2 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-3/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend@c-hdmi-a3:
- shard-bmg: [PASS][19] -> [INCOMPLETE][20] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-1/igt@kms_flip@flip-vs-suspend@c-hdmi-a3.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-3/igt@kms_flip@flip-vs-suspend@c-hdmi-a3.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2293] / [Intel XE#2380])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2293]) +6 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#4141]) +3 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2311]) +6 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2352])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#2313]) +4 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff.html
* igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2:
- shard-bmg: [PASS][27] -> [ABORT][28] ([Intel XE#6740]) +1 other test abort
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-4/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3:
- shard-bmg: NOTRUN -> [ABORT][29] ([Intel XE#6740])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-8/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#6901])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_plane_multiple@2x-tiling-x:
- shard-bmg: [PASS][31] -> [SKIP][32] ([Intel XE#4596])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-x.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-x.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-bmg: [PASS][33] -> [SKIP][34] ([Intel XE#2571])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-2/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#6886]) +7 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b.html
* igt@kms_pm_backlight@bad-brightness:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#870])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_pm_backlight@bad-brightness.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#1406] / [Intel XE#1489]) +1 other test skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr@fbc-psr2-cursor-plane-move:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +3 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_psr@fbc-psr2-cursor-plane-move.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_rotation_crc@primary-rotation-90.html
* igt@kms_setmode@invalid-clone-exclusive-crtc:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#1435])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_setmode@invalid-clone-exclusive-crtc.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#2426])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@xe_eudebug@vma-ufence-faultable:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#4837])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@xe_eudebug@vma-ufence-faultable.html
* igt@xe_eudebug_online@pagefault-one-of-many:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#6665])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@xe_eudebug_online@pagefault-one-of-many.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2322])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html
* igt@xe_exec_multi_queue@few-execs-preempt-mode-fault-priority:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#6874]) +5 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@xe_exec_multi_queue@few-execs-preempt-mode-fault-priority.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma:
- shard-lnl: [PASS][46] -> [FAIL][47] ([Intel XE#5625])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-lnl-2/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-lnl-4/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
* igt@xe_exec_system_allocator@process-many-stride-mmap-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#4943]) +2 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@xe_exec_system_allocator@process-many-stride-mmap-huge-nomemset.html
* igt@xe_live_ktest@xe_eudebug:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#2833])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@xe_live_ktest@xe_eudebug.html
* igt@xe_pm@s4-d3cold-basic-exec:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2284])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@xe_pm@s4-d3cold-basic-exec.html
* igt@xe_pmu@engine-activity-accuracy-90:
- shard-lnl: [PASS][51] -> [FAIL][52] ([Intel XE#6251]) +2 other tests fail
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-lnl-2/igt@xe_pmu@engine-activity-accuracy-90.html
* igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#4733])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy.html
#### Possible fixes ####
* igt@core_hotunplug@hotreplug-lateclose:
- shard-bmg: [SKIP][54] ([Intel XE#6779]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@core_hotunplug@hotreplug-lateclose.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@core_hotunplug@hotreplug-lateclose.html
* igt@device_reset@unbind-reset-rebind:
- shard-bmg: [SKIP][56] ([Intel XE#6815]) -> [PASS][57]
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@device_reset@unbind-reset-rebind.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@device_reset@unbind-reset-rebind.html
* igt@fbdev@unaligned-read:
- shard-bmg: [SKIP][58] ([Intel XE#2134]) -> [PASS][59] +1 other test pass
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@fbdev@unaligned-read.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@fbdev@unaligned-read.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic:
- shard-bmg: [FAIL][60] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2:
- shard-bmg: [FAIL][62] ([Intel XE#6078]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [INCOMPLETE][64] ([Intel XE#3862]) -> [PASS][65] +1 other test pass
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-legacy:
- shard-bmg: [SKIP][66] ([Intel XE#2291]) -> [PASS][67]
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-legacy.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipb-legacy.html
* igt@kms_flip@2x-flip-vs-panning-vs-hang:
- shard-bmg: [SKIP][68] ([Intel XE#2316]) -> [PASS][69] +1 other test pass
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-4/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [FAIL][70] ([Intel XE#301]) -> [PASS][71] +1 other test pass
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-bmg: [ABORT][72] ([Intel XE#6740]) -> [PASS][73] +1 other test pass
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-9/igt@kms_hdr@invalid-metadata-sizes.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-7/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_pm_rpm@i2c:
- shard-bmg: [SKIP][74] ([Intel XE#6693]) -> [PASS][75] +5 other tests pass
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_pm_rpm@i2c.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_pm_rpm@i2c.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [INCOMPLETE][76] ([Intel XE#6321]) -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-8/igt@xe_evict@evict-mixed-many-threads-small.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_exec_system_allocator@once-mmap-race-nomemset:
- shard-bmg: [SKIP][78] ([Intel XE#6557] / [Intel XE#6703]) -> [PASS][79] +10 other tests pass
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_exec_system_allocator@once-mmap-race-nomemset.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@xe_exec_system_allocator@once-mmap-race-nomemset.html
* igt@xe_fault_injection@inject-fault-probe-function-wait_for_lmem_ready:
- shard-bmg: [SKIP][80] ([Intel XE#6703]) -> [PASS][81] +898 other tests pass
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_fault_injection@inject-fault-probe-function-wait_for_lmem_ready.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@xe_fault_injection@inject-fault-probe-function-wait_for_lmem_ready.html
* igt@xe_live_ktest@xe_bo:
- shard-bmg: [SKIP][82] ([Intel XE#2229]) -> [PASS][83] +1 other test pass
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_live_ktest@xe_bo.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@xe_live_ktest@xe_bo.html
* igt@xe_mmap@vram-system:
- shard-bmg: [DMESG-WARN][84] -> [PASS][85]
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-2/igt@xe_mmap@vram-system.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-8/igt@xe_mmap@vram-system.html
#### Warnings ####
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-bmg: [SKIP][86] ([Intel XE#6703]) -> [FAIL][87] ([Intel XE#3718] / [Intel XE#6078])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_big_fb@linear-64bpp-rotate-270:
- shard-bmg: [SKIP][88] ([Intel XE#6703]) -> [SKIP][89] ([Intel XE#2327]) +3 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_big_fb@linear-64bpp-rotate-270.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_big_fb@linear-64bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- shard-bmg: [SKIP][90] ([Intel XE#6703]) -> [SKIP][91] ([Intel XE#1124]) +15 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-bmg: [SKIP][92] ([Intel XE#6703]) -> [SKIP][93] ([Intel XE#607]) +1 other test skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p:
- shard-bmg: [SKIP][94] ([Intel XE#6703]) -> [SKIP][95] ([Intel XE#2314] / [Intel XE#2894])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-1-displays-2160x1440p:
- shard-bmg: [SKIP][96] ([Intel XE#6703]) -> [SKIP][97] ([Intel XE#367]) +3 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-bmg: [SKIP][98] ([Intel XE#6703]) -> [SKIP][99] ([Intel XE#3432]) +1 other test skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs:
- shard-bmg: [SKIP][100] ([Intel XE#6703]) -> [SKIP][101] ([Intel XE#2887]) +24 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs.html
* igt@kms_cdclk@plane-scaling:
- shard-bmg: [SKIP][102] ([Intel XE#6703]) -> [SKIP][103] ([Intel XE#2724]) +1 other test skip
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_cdclk@plane-scaling.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-bmg: [SKIP][104] ([Intel XE#6703]) -> [SKIP][105] ([Intel XE#2325]) +1 other test skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_chamelium_color@ctm-0-75.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-3/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
- shard-bmg: [SKIP][106] ([Intel XE#6703]) -> [SKIP][107] ([Intel XE#2252]) +13 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-bmg: [SKIP][108] ([Intel XE#6703]) -> [SKIP][109] ([Intel XE#2390]) +1 other test skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_content_protection@dp-mst-lic-type-1.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-3/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-bmg: [SKIP][110] ([Intel XE#6703]) -> [SKIP][111] ([Intel XE#2321]) +2 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_cursor_crc@cursor-offscreen-512x512.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-onscreen-max-size:
- shard-bmg: [SKIP][112] ([Intel XE#6703]) -> [SKIP][113] ([Intel XE#2320]) +6 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_cursor_crc@cursor-onscreen-max-size.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@kms_cursor_crc@cursor-onscreen-max-size.html
* igt@kms_cursor_crc@cursor-rapid-movement-256x85:
- shard-bmg: [SKIP][114] ([Intel XE#6557] / [Intel XE#6703]) -> [SKIP][115] ([Intel XE#2320])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [SKIP][116] ([Intel XE#6703]) -> [SKIP][117] ([Intel XE#2291])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [SKIP][118] ([Intel XE#6703]) -> [FAIL][119] ([Intel XE#5299])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-bmg: [SKIP][120] ([Intel XE#6703]) -> [SKIP][121] ([Intel XE#2286])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-bmg: [SKIP][122] ([Intel XE#6703]) -> [SKIP][123] ([Intel XE#4354])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_dp_link_training@non-uhbr-mst.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-bmg: [SKIP][124] ([Intel XE#6703]) -> [SKIP][125] ([Intel XE#2244]) +1 other test skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_dsc@dsc-fractional-bpp.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_fbcon_fbt@fbc:
- shard-bmg: [SKIP][126] ([Intel XE#6703]) -> [SKIP][127] ([Intel XE#4156])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_fbcon_fbt@fbc.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_fbcon_fbt@fbc.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-bmg: [SKIP][128] ([Intel XE#6703]) -> [SKIP][129] ([Intel XE#776])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_fbcon_fbt@psr-suspend.html
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_feature_discovery@dp-mst:
- shard-bmg: [SKIP][130] ([Intel XE#6703]) -> [SKIP][131] ([Intel XE#2375])
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_feature_discovery@dp-mst.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_feature_discovery@dp-mst.html
* igt@kms_feature_discovery@psr2:
- shard-bmg: [SKIP][132] ([Intel XE#6703]) -> [SKIP][133] ([Intel XE#2374])
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_feature_discovery@psr2.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop:
- shard-bmg: [SKIP][134] ([Intel XE#6703]) -> [SKIP][135] ([Intel XE#2316]) +3 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
- shard-bmg: [SKIP][136] ([Intel XE#6703]) -> [SKIP][137] ([Intel XE#2293] / [Intel XE#2380]) +5 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][138] ([Intel XE#6703]) -> [SKIP][139] ([Intel XE#2312]) +7 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: [SKIP][140] ([Intel XE#2311]) -> [SKIP][141] ([Intel XE#2312]) +7 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt:
- shard-bmg: [SKIP][142] ([Intel XE#6703]) -> [SKIP][143] ([Intel XE#4141]) +18 other tests skip
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt:
- shard-bmg: [SKIP][144] ([Intel XE#2312]) -> [SKIP][145] ([Intel XE#4141])
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
- shard-bmg: [SKIP][146] ([Intel XE#6557] / [Intel XE#6703]) -> [SKIP][147] ([Intel XE#4141])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][148] ([Intel XE#4141]) -> [SKIP][149] ([Intel XE#2312]) +2 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][150] ([Intel XE#2312]) -> [SKIP][151] ([Intel XE#2311]) +4 other tests skip
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-pgflip-blt.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render:
- shard-bmg: [SKIP][152] ([Intel XE#6703]) -> [SKIP][153] ([Intel XE#2311]) +38 other tests skip
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt:
- shard-bmg: [SKIP][154] ([Intel XE#6703]) -> [SKIP][155] ([Intel XE#2313]) +43 other tests skip
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff:
- shard-bmg: [SKIP][156] ([Intel XE#2312]) -> [SKIP][157] ([Intel XE#2313]) +3 other tests skip
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff:
- shard-bmg: [SKIP][158] ([Intel XE#2313]) -> [SKIP][159] ([Intel XE#2312]) +7 other tests skip
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][160] ([Intel XE#6703]) -> [SKIP][161] ([Intel XE#3374] / [Intel XE#3544])
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][162] ([Intel XE#6703]) -> [ABORT][163] ([Intel XE#6740])
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-2/igt@kms_hdr@invalid-hdr.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-8/igt@kms_hdr@invalid-hdr.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-bmg: [SKIP][164] ([Intel XE#6703]) -> [SKIP][165] ([Intel XE#6911])
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_joiner@basic-ultra-joiner.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_panel_fitting@legacy:
- shard-bmg: [SKIP][166] ([Intel XE#6703]) -> [SKIP][167] ([Intel XE#2486])
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_panel_fitting@legacy.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_panel_fitting@legacy.html
* igt@kms_pipe_stress@stress-xrgb8888-ytiled:
- shard-bmg: [SKIP][168] ([Intel XE#6703]) -> [SKIP][169] ([Intel XE#4329] / [Intel XE#6912])
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
- shard-lnl: [SKIP][170] ([Intel XE#4329]) -> [SKIP][171] ([Intel XE#4329] / [Intel XE#6912])
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-lnl-2/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-lnl-1/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
* igt@kms_plane_lowres@tiling-y:
- shard-bmg: [SKIP][172] ([Intel XE#6703]) -> [SKIP][173] ([Intel XE#2393])
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_plane_lowres@tiling-y.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-bmg: [SKIP][174] ([Intel XE#6703]) -> [SKIP][175] ([Intel XE#4596])
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-4.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_plane_multiple@tiling-yf:
- shard-bmg: [SKIP][176] ([Intel XE#6703]) -> [SKIP][177] ([Intel XE#5020])
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_plane_multiple@tiling-yf.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5:
- shard-bmg: [SKIP][178] ([Intel XE#6703]) -> [SKIP][179] ([Intel XE#6886]) +1 other test skip
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-bmg: [SKIP][180] ([Intel XE#6703]) -> [SKIP][181] ([Intel XE#2938])
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_pm_backlight@brightness-with-dpms.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_backlight@fade:
- shard-bmg: [SKIP][182] ([Intel XE#6703]) -> [SKIP][183] ([Intel XE#870])
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_pm_backlight@fade.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-3/igt@kms_pm_backlight@fade.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-bmg: [SKIP][184] ([Intel XE#6703]) -> [SKIP][185] ([Intel XE#3309])
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_pm_dc@dc5-retention-flops.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
- shard-bmg: [SKIP][186] ([Intel XE#1406] / [Intel XE#6703]) -> [SKIP][187] ([Intel XE#1406] / [Intel XE#1489]) +11 other tests skip
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-3/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html
* igt@kms_psr@psr2-no-drrs:
- shard-bmg: [SKIP][188] ([Intel XE#1406] / [Intel XE#6703]) -> [SKIP][189] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +19 other tests skip
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_psr@psr2-no-drrs.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_psr@psr2-no-drrs.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-bmg: [SKIP][190] ([Intel XE#1406] / [Intel XE#6703]) -> [SKIP][191] ([Intel XE#1406] / [Intel XE#2414])
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-bmg: [SKIP][192] ([Intel XE#6703]) -> [SKIP][193] ([Intel XE#2330])
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_sharpness_filter@filter-formats:
- shard-bmg: [SKIP][194] ([Intel XE#6703]) -> [SKIP][195] ([Intel XE#6503]) +4 other tests skip
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_sharpness_filter@filter-formats.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_sharpness_filter@filter-formats.html
* igt@kms_tv_load_detect@load-detect:
- shard-bmg: [SKIP][196] ([Intel XE#6557] / [Intel XE#6703]) -> [SKIP][197] ([Intel XE#2450])
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_tv_load_detect@load-detect.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@kms_tv_load_detect@load-detect.html
* igt@kms_vrr@flip-suspend:
- shard-bmg: [SKIP][198] ([Intel XE#6703]) -> [SKIP][199] ([Intel XE#1499]) +2 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@kms_vrr@flip-suspend.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@kms_vrr@flip-suspend.html
* igt@xe_eudebug@basic-vm-access-userptr:
- shard-bmg: [SKIP][200] ([Intel XE#6703]) -> [SKIP][201] ([Intel XE#4837]) +13 other tests skip
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_eudebug@basic-vm-access-userptr.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@xe_eudebug@basic-vm-access-userptr.html
* igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
- shard-bmg: [SKIP][202] ([Intel XE#6703]) -> [SKIP][203] ([Intel XE#4837] / [Intel XE#6665]) +7 other tests skip
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html
* igt@xe_eudebug_sriov@deny-eudebug:
- shard-bmg: [SKIP][204] ([Intel XE#6703]) -> [SKIP][205] ([Intel XE#5793])
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_eudebug_sriov@deny-eudebug.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@xe_eudebug_sriov@deny-eudebug.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate:
- shard-bmg: [SKIP][206] ([Intel XE#6703]) -> [SKIP][207] ([Intel XE#2322]) +10 other tests skip
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate.html
* igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority:
- shard-bmg: [SKIP][208] ([Intel XE#6703]) -> [SKIP][209] ([Intel XE#6874]) +43 other tests skip
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority.html
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority.html
* igt@xe_exec_system_allocator@many-64k-mmap-new-huge:
- shard-bmg: [SKIP][210] ([Intel XE#6703]) -> [SKIP][211] ([Intel XE#5007]) +1 other test skip
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_exec_system_allocator@many-64k-mmap-new-huge.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-3/igt@xe_exec_system_allocator@many-64k-mmap-new-huge.html
* igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset:
- shard-bmg: [SKIP][212] ([Intel XE#6703]) -> [SKIP][213] ([Intel XE#4943]) +36 other tests skip
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-1/igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset.html
* igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add:
- shard-bmg: [SKIP][214] ([Intel XE#6703]) -> [SKIP][215] ([Intel XE#6281])
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html
* igt@xe_mmap@small-bar:
- shard-bmg: [SKIP][216] ([Intel XE#6703]) -> [SKIP][217] ([Intel XE#586])
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_mmap@small-bar.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-3/igt@xe_mmap@small-bar.html
* igt@xe_pat@pat-index-xehpc:
- shard-bmg: [SKIP][218] ([Intel XE#6703]) -> [SKIP][219] ([Intel XE#1420])
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_pat@pat-index-xehpc.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelp:
- shard-bmg: [SKIP][220] ([Intel XE#6703]) -> [SKIP][221] ([Intel XE#2245])
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_pat@pat-index-xelp.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@xe_pat@pat-index-xelp.html
* igt@xe_pm@d3cold-basic:
- shard-bmg: [SKIP][222] ([Intel XE#6703]) -> [SKIP][223] ([Intel XE#2284]) +2 other tests skip
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-2/igt@xe_pm@d3cold-basic.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-8/igt@xe_pm@d3cold-basic.html
* igt@xe_pm@d3hot-i2c:
- shard-bmg: [SKIP][224] ([Intel XE#6703]) -> [SKIP][225] ([Intel XE#5742])
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_pm@d3hot-i2c.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-9/igt@xe_pm@d3hot-i2c.html
* igt@xe_pm@vram-d3cold-threshold:
- shard-bmg: [SKIP][226] ([Intel XE#6703]) -> [SKIP][227] ([Intel XE#579])
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_pm@vram-d3cold-threshold.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-4/igt@xe_pm@vram-d3cold-threshold.html
* igt@xe_pxp@pxp-termination-key-update-post-suspend:
- shard-bmg: [SKIP][228] ([Intel XE#6703]) -> [SKIP][229] ([Intel XE#4733]) +1 other test skip
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_pxp@pxp-termination-key-update-post-suspend.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@xe_pxp@pxp-termination-key-update-post-suspend.html
* igt@xe_query@multigpu-query-invalid-cs-cycles:
- shard-bmg: [SKIP][230] ([Intel XE#6703]) -> [SKIP][231] ([Intel XE#944]) +4 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9/shard-bmg-5/igt@xe_query@multigpu-query-invalid-cs-cycles.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/shard-bmg-2/igt@xe_query@multigpu-query-invalid-cs-cycles.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
[Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
[Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
[Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
[Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
[Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
[Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#5299]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5299
[Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
[Intel XE#5793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5793
[Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
[Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
[Intel XE#6281]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6281
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
[Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
[Intel XE#6693]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6693
[Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
[Intel XE#6715]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6715
[Intel XE#6740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6740
[Intel XE#6779]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6779
[Intel XE#6815]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6815
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
[Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
[Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9 -> xe-pw-159128v3
IGT_8674: f38f4d8e9c65aff45ac807e646d06e38bc3193a2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4295-f101d56dc32350daa45c130ff7a6d46512f614a9: f101d56dc32350daa45c130ff7a6d46512f614a9
xe-pw-159128v3: 159128v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159128v3/index.html
[-- Attachment #2: Type: text/html, Size: 73451 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 1/2] drm/xe: Decouple GuC RC code from xe_guc_pc
2025-12-23 8:51 ` [PATCH v4 1/2] drm/xe: Decouple GuC RC code from xe_guc_pc Vinay Belgaumkar
@ 2026-01-07 5:50 ` Riana Tauro
2026-01-12 23:36 ` Belgaumkar, Vinay
0 siblings, 1 reply; 10+ messages in thread
From: Riana Tauro @ 2026-01-07 5:50 UTC (permalink / raw)
To: Vinay Belgaumkar, intel-xe
Hi Vinay
On 12/23/2025 2:21 PM, Vinay Belgaumkar wrote:
> Move enable/disable GuC RC logic into the new file. This will
> allow us to independently enable/disable GuC RC and not rely
> on SLPC related functions. GuC already provides separate H2G
> interfaces to setup GuC RC and SLPC.
>
> v2: Comments (Michal W), remove duplicate c6_enable calls from
> xe_guc_pc.
>
> v3: Clarify crosss interactions between xe_guc_rc and xe_guc_pc
> (Michal W)
>
> v4: More comments (Michal W)
>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
> drivers/gpu/drm/xe/Makefile | 1 +
> drivers/gpu/drm/xe/xe_gt.c | 1 -
> drivers/gpu/drm/xe/xe_guc.c | 6 ++
> drivers/gpu/drm/xe/xe_guc_pc.c | 68 +++-------------
> drivers/gpu/drm/xe/xe_guc_pc.h | 1 -
> drivers/gpu/drm/xe/xe_guc_rc.c | 139 +++++++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_guc_rc.h | 15 ++++
> drivers/gpu/drm/xe/xe_uc.c | 10 +--
> drivers/gpu/drm/xe/xe_uc.h | 1 -
> 9 files changed, 178 insertions(+), 64 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_guc_rc.c
> create mode 100644 drivers/gpu/drm/xe/xe_guc_rc.h
>
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 89dc48cd73e2..928fdb925c13 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -74,6 +74,7 @@ xe-y += xe_bb.o \
> xe_guc_log.o \
> xe_guc_pagefault.o \
> xe_guc_pc.o \
> + xe_guc_rc.o \
> xe_guc_submit.o \
> xe_guc_tlb_inval.o \
> xe_heci_gsc.o \
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 313ce83ab0e5..9ee328aa6579 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -822,7 +822,6 @@ static void gt_reset_worker(struct work_struct *w)
> if (IS_SRIOV_PF(gt_to_xe(gt)))
> xe_gt_sriov_pf_stop_prepare(gt);
>
> - xe_uc_gucrc_disable(>->uc);
> xe_uc_stop_prepare(>->uc);
> xe_pagefault_reset(gt_to_xe(gt), gt);
>
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index 44360437beeb..beac4050c4dc 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -35,6 +35,7 @@
> #include "xe_guc_klv_helpers.h"
> #include "xe_guc_log.h"
> #include "xe_guc_pc.h"
> +#include "xe_guc_rc.h"
> #include "xe_guc_relay.h"
> #include "xe_guc_submit.h"
> #include "xe_memirq.h"
> @@ -869,6 +870,10 @@ int xe_guc_init_post_hwconfig(struct xe_guc *guc)
> if (ret)
> return ret;
>
> + ret = xe_guc_rc_init(guc);
> + if (ret)
> + return ret;
> +
> ret = xe_guc_engine_activity_init(guc);
> if (ret)
> return ret;
> @@ -1609,6 +1614,7 @@ void xe_guc_stop_prepare(struct xe_guc *guc)
> if (!IS_SRIOV_VF(guc_to_xe(guc))) {
> int err;
>
> + xe_guc_rc_disable(guc);
> err = xe_guc_pc_stop(&guc->pc);
> xe_gt_WARN(guc_to_gt(guc), err, "Failed to stop GuC PC: %pe\n",
> ERR_PTR(err));
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> index 54702a0fd05b..3e7173130066 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> @@ -92,6 +92,17 @@
> * Render-C states is also a GuC PC feature that is now enabled in Xe for
> * all platforms.
> *
> + * Implementation details:
> + * -----------------------
> + * The implementation for GuC Power Management features is split as follows:
> + *
> + * xe_guc_rc: Logic for handling GuC RC
> + * xe_gt_idle: Host side logic for RC6 and Coarse Power gating (CPG)
> + * xe_guc_pc: Logic for all other SLPC related features
> + *
> + * There is some cross interaction between these where host C6 will need to be
> + * enabled when we plan to skip GuC RC. Also, the GuC RC mode is currently
> + * overridden through 0x3003 which is an SLPC H2G call.
> */
>
> static struct xe_guc *pc_to_guc(struct xe_guc_pc *pc)
> @@ -253,22 +264,6 @@ static int pc_action_unset_param(struct xe_guc_pc *pc, u8 id)
> return ret;
> }
>
> -static int pc_action_setup_gucrc(struct xe_guc_pc *pc, u32 mode)
> -{
> - struct xe_guc_ct *ct = pc_to_ct(pc);
> - u32 action[] = {
> - GUC_ACTION_HOST2GUC_SETUP_PC_GUCRC,
> - mode,
> - };
> - int ret;
> -
> - ret = xe_guc_ct_send(ct, action, ARRAY_SIZE(action), 0, 0);
> - if (ret && !(xe_device_wedged(pc_to_xe(pc)) && ret == -ECANCELED))
> - xe_gt_err(pc_to_gt(pc), "GuC RC enable mode=%u failed: %pe\n",
> - mode, ERR_PTR(ret));
> - return ret;
> -}
> -
> static u32 decode_freq(u32 raw)
> {
> return DIV_ROUND_CLOSEST(raw * GT_FREQUENCY_MULTIPLIER,
> @@ -1050,30 +1045,6 @@ int xe_guc_pc_restore_stashed_freq(struct xe_guc_pc *pc)
> return ret;
> }
>
> -/**
> - * xe_guc_pc_gucrc_disable - Disable GuC RC
> - * @pc: Xe_GuC_PC instance
> - *
> - * Disables GuC RC by taking control of RC6 back from GuC.
> - *
> - * Return: 0 on success, negative error code on error.
> - */
> -int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc)
> -{
> - struct xe_device *xe = pc_to_xe(pc);
> - struct xe_gt *gt = pc_to_gt(pc);
> - int ret = 0;
> -
> - if (xe->info.skip_guc_pc)
> - return 0;
> -
> - ret = pc_action_setup_gucrc(pc, GUCRC_HOST_CONTROL);
> - if (ret)
> - return ret;
> -
> - return xe_gt_idle_disable_c6(gt);
> -}
> -
> /**
> * xe_guc_pc_override_gucrc_mode - override GUCRC mode
> * @pc: Xe_GuC_PC instance
> @@ -1217,9 +1188,6 @@ int xe_guc_pc_start(struct xe_guc_pc *pc)
> return -ETIMEDOUT;
>
> if (xe->info.skip_guc_pc) {
> - if (xe->info.platform != XE_PVC)
> - xe_gt_idle_enable_c6(gt);
> -
> /* Request max possible since dynamic freq mgmt is not enabled */
> pc_set_cur_freq(pc, UINT_MAX);
> return 0;
> @@ -1257,15 +1225,6 @@ int xe_guc_pc_start(struct xe_guc_pc *pc)
> if (ret)
> return ret;
>
> - if (xe->info.platform == XE_PVC) {
> - xe_guc_pc_gucrc_disable(pc);
> - return 0;
> - }
> -
> - ret = pc_action_setup_gucrc(pc, GUCRC_FIRMWARE_CONTROL);
> - if (ret)
> - return ret;
> -
> /* Enable SLPC Optimized Strategy for compute */
> ret = pc_action_set_strategy(pc, SLPC_OPTIMIZED_STRATEGY_COMPUTE);
>
> @@ -1285,10 +1244,8 @@ int xe_guc_pc_stop(struct xe_guc_pc *pc)
> {
> struct xe_device *xe = pc_to_xe(pc);
>
> - if (xe->info.skip_guc_pc) {
> - xe_gt_idle_disable_c6(pc_to_gt(pc));
> + if (xe->info.skip_guc_pc)
> return 0;
> - }
>
> mutex_lock(&pc->freq_lock);
> pc->freq_ready = false;
> @@ -1310,7 +1267,6 @@ static void xe_guc_pc_fini_hw(void *arg)
> return;
>
> CLASS(xe_force_wake, fw_ref)(gt_to_fw(pc_to_gt(pc)), XE_FORCEWAKE_ALL);
The forcewake can be removed too. Frequency registers don't need a forcewake
> - xe_guc_pc_gucrc_disable(pc);
> XE_WARN_ON(xe_guc_pc_stop(pc));
>
> /* Bind requested freq to mert_freq_cap before unload */
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.h b/drivers/gpu/drm/xe/xe_guc_pc.h
> index 0e31396f103c..1b95873b262e 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.h
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.h
> @@ -15,7 +15,6 @@ struct drm_printer;
> int xe_guc_pc_init(struct xe_guc_pc *pc);
> int xe_guc_pc_start(struct xe_guc_pc *pc);
> int xe_guc_pc_stop(struct xe_guc_pc *pc);
> -int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc);
> int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode);
> int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc);
> void xe_guc_pc_print(struct xe_guc_pc *pc, struct drm_printer *p);
> diff --git a/drivers/gpu/drm/xe/xe_guc_rc.c b/drivers/gpu/drm/xe/xe_guc_rc.c
> new file mode 100644
> index 000000000000..b7dab3158060
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_guc_rc.c
> @@ -0,0 +1,139 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#include <linux/device/devres.h>
> +#include <drm/drm_print.h>
> +
> +#include "abi/guc_actions_slpc_abi.h"
> +#include "xe_device.h"
> +#include "xe_force_wake.h"
> +#include "xe_gt.h"
> +#include "xe_guc.h"
> +#include "xe_gt_idle.h"
> +#include "xe_gt_printk.h"
> +#include "xe_guc_ct.h"
> +#include "xe_guc_rc.h"
> +#include "xe_pm.h"
> +
> +/**
> + * DOC: GuC RC (Render C-states)
> + *
> + * GuC handles the GT transition to deeper C-states in conjunction with Pcode.
> + * GuC RC can be enabled independently of the frequency component in SLPC,
> + * which is also controlled by GuC.
> + *
> + * This file will contain all H2G related logic for handling Render C-states.
> + * There are some calls to xe_gt_idle, where we enable host C6 when GuC RC is
> + * skipped. GuC RC is mostly independent of xe_guc_pc with the exception of
> + * functions that override the mode for which we have to rely on the SLPC H2G
> + * calls.
> + */
> +
> +static int guc_action_setup_gucrc(struct xe_guc *guc, u32 control)
> +{
> + u32 action[] = {
> + GUC_ACTION_HOST2GUC_SETUP_PC_GUCRC,
> + control,
> + };
> + int ret;
> +
> + ret = xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0);
> + if (ret && !(xe_device_wedged(guc_to_xe(guc)) && ret == -ECANCELED))
> + xe_gt_err(guc_to_gt(guc),
> + "GuC RC setup %s(%u) failed (%pe)\n",
> + control == GUCRC_HOST_CONTROL ? "HOST_CONTROL" :
> + control == GUCRC_FIRMWARE_CONTROL ? "FIRMWARE_CONTROL" :
> + "UNKNOWN", control, ERR_PTR(ret));
> + return ret;
> +}
> +
> +/**
> + * xe_guc_rc_disable() - Disable GuC RC
> + * @guc: Xe GuC instance
> + *
> + * Disables GuC RC by taking control of RC6 back from GuC.
> + */
> +void xe_guc_rc_disable(struct xe_guc *guc)
> +{
> + struct xe_device *xe = guc_to_xe(guc);
> +
> + if (xe->info.skip_guc_pc)
> + return;
guc_rc_start enables host c6 when guc_pc is skipped. So don't we have to
disable it in this call?
> +
> + if (guc_action_setup_gucrc(guc, GUCRC_HOST_CONTROL))
> + return;
> +
> + XE_WARN_ON(xe_gt_idle_disable_c6(guc_to_gt(guc)));
> +}
> +
> +static void xe_guc_rc_fini_hw(void *arg)
> +{
> + struct xe_guc *guc = arg;
> + struct xe_device *xe = guc_to_xe(guc);
> + struct xe_gt *gt = guc_to_gt(guc);
> +
> + if (xe_device_wedged(xe))
> + return;
> +
> + CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
> + xe_guc_rc_disable(guc);
> +}
> +
> +/**
> + * xe_guc_rc_init() - Initialize GuC RC
> + * @guc: Xe GuC instance
> + *
> + * Initializes GuC RC feature.
This function does not initialize GucRC. I think we can combine both
init and start as a single function.
> + *
> + * Return: 0 on success, negative error code on error.
> + */
> +int xe_guc_rc_init(struct xe_guc *guc)
> +{
> + struct xe_device *xe = guc_to_xe(guc);
> +
> + xe_gt_assert(guc_to_gt(guc), xe_device_uc_enabled(xe));
> +
> + if (xe->info.skip_guc_pc)
> + return 0;
> +
> + return devm_add_action_or_reset(xe->drm.dev, xe_guc_rc_fini_hw, guc);
> +}
> +
> +static int xe_guc_rc_enable(struct xe_guc *guc)
> +{
> + return guc_action_setup_gucrc(guc, GUCRC_FIRMWARE_CONTROL);
> +}
> +
> +/**
> + * xe_guc_rc_start() - Enable GuC RC feature if applicable
> + * @guc: Xe GuC instance
> + *
> + * Enables GuC RC feature.
Function name can be xe_guc_rc_enable to pair with disable
Thanks
Riana
> + *
> + * Return: 0 on success, negative error code on error.
> + */
> +int xe_guc_rc_start(struct xe_guc *guc)
> +{
> + struct xe_device *xe = guc_to_xe(guc);
> + struct xe_gt *gt = guc_to_gt(guc);
> +
> + xe_gt_assert(gt, xe_device_uc_enabled(xe));
> +
> + CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
> + if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FW_GT))
> + return -ETIMEDOUT;
> +
> + if (xe->info.platform == XE_PVC) {
> + xe_guc_rc_disable(guc);
> + return 0;
> + }
> +
> + if (xe->info.skip_guc_pc) {
> + xe_gt_idle_enable_c6(gt);
> + return 0;
> + }
> +
> + return xe_guc_rc_enable(guc);
> +}
> diff --git a/drivers/gpu/drm/xe/xe_guc_rc.h b/drivers/gpu/drm/xe/xe_guc_rc.h
> new file mode 100644
> index 000000000000..f2a6ae7f05d8
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_guc_rc.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef _XE_GUC_RC_H_
> +#define _XE_GUC_RC_H_
> +
> +struct xe_guc;
> +
> +void xe_guc_rc_disable(struct xe_guc *guc);
> +int xe_guc_rc_start(struct xe_guc *guc);
> +int xe_guc_rc_init(struct xe_guc *guc);
> +
> +#endif
> diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
> index 157520ea1783..300b99acbd51 100644
> --- a/drivers/gpu/drm/xe/xe_uc.c
> +++ b/drivers/gpu/drm/xe/xe_uc.c
> @@ -14,6 +14,7 @@
> #include "xe_gt_sriov_vf.h"
> #include "xe_guc.h"
> #include "xe_guc_pc.h"
> +#include "xe_guc_rc.h"
> #include "xe_guc_engine_activity.h"
> #include "xe_huc.h"
> #include "xe_sriov.h"
> @@ -216,6 +217,10 @@ int xe_uc_load_hw(struct xe_uc *uc)
> if (ret)
> goto err_out;
>
> + ret = xe_guc_rc_start(&uc->guc);
> + if (ret)
> + goto err_out;
> +
> xe_guc_engine_activity_enable_stats(&uc->guc);
>
> /* We don't fail the driver load if HuC fails to auth */
> @@ -244,11 +249,6 @@ int xe_uc_reset_prepare(struct xe_uc *uc)
> return xe_guc_reset_prepare(&uc->guc);
> }
>
> -void xe_uc_gucrc_disable(struct xe_uc *uc)
> -{
> - XE_WARN_ON(xe_guc_pc_gucrc_disable(&uc->guc.pc));
> -}
> -
> void xe_uc_stop_prepare(struct xe_uc *uc)
> {
> xe_gsc_stop_prepare(&uc->gsc);
> diff --git a/drivers/gpu/drm/xe/xe_uc.h b/drivers/gpu/drm/xe/xe_uc.h
> index 5398da1a8097..255a54a8f876 100644
> --- a/drivers/gpu/drm/xe/xe_uc.h
> +++ b/drivers/gpu/drm/xe/xe_uc.h
> @@ -12,7 +12,6 @@ int xe_uc_init_noalloc(struct xe_uc *uc);
> int xe_uc_init(struct xe_uc *uc);
> int xe_uc_init_post_hwconfig(struct xe_uc *uc);
> int xe_uc_load_hw(struct xe_uc *uc);
> -void xe_uc_gucrc_disable(struct xe_uc *uc);
> int xe_uc_reset_prepare(struct xe_uc *uc);
> void xe_uc_runtime_resume(struct xe_uc *uc);
> void xe_uc_runtime_suspend(struct xe_uc *uc);
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 2/2] drm/xe: Add a wrapper for set/unset params
2025-12-23 8:51 ` [PATCH v4 2/2] drm/xe: Add a wrapper for set/unset params Vinay Belgaumkar
@ 2026-01-07 6:01 ` Riana Tauro
0 siblings, 0 replies; 10+ messages in thread
From: Riana Tauro @ 2026-01-07 6:01 UTC (permalink / raw)
To: intel-xe
Hi Vinay
On 12/23/2025 2:21 PM, Vinay Belgaumkar wrote:
> Also, extract out the GuC RC related set/unset param functions
> into xe_guc_rc file. GuC still allows us to override GuC RC mode
> using an SLPC H2G interface. Continue to use that interface, but
> move the related code to the newly created xe_guc_rc file.
>
> v2: xe_guc_rc functions to use guc pointer instead of gt (Michal W)
> v3: Assert if runtime pm ref is not held (Michal W)
>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc_pc.c | 48 ++++++++++++++++------------------
> drivers/gpu/drm/xe/xe_guc_pc.h | 2 ++
> drivers/gpu/drm/xe/xe_guc_rc.c | 26 ++++++++++++++++++
> drivers/gpu/drm/xe/xe_guc_rc.h | 3 +++
> drivers/gpu/drm/xe/xe_oa.c | 9 +++----
> 5 files changed, 58 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> index 3e7173130066..93f4d56c6f40 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> @@ -264,6 +264,29 @@ static int pc_action_unset_param(struct xe_guc_pc *pc, u8 id)
> return ret;
> }
>
> +/**
> + * xe_guc_pc_action_set_param() - Set value of SLPC param
> + * @pc: Xe_GuC_PC instance
> + * @id: Param id
> + * @value: Value to set
Missing Description and return doc
> + */
> +int xe_guc_pc_action_set_param(struct xe_guc_pc *pc, u8 id, u32 value)
> +{
> + xe_device_assert_mem_access(pc_to_xe(pc));
> + return pc_action_set_param(pc, id, value);
> +}
> +
> +/**
> + * xe_guc_pc_action_unset_param() - Revert to default value
> + * @pc: Xe_GuC_PC instance
> + * @id: Param id
Missing Description and return doc
> + */
> +int xe_guc_pc_action_unset_param(struct xe_guc_pc *pc, u8 id)
> +{
> + xe_device_assert_mem_access(pc_to_xe(pc));
> + return pc_action_unset_param(pc, id);
> +}
> +
> static u32 decode_freq(u32 raw)
> {
> return DIV_ROUND_CLOSEST(raw * GT_FREQUENCY_MULTIPLIER,
> @@ -1045,31 +1068,6 @@ int xe_guc_pc_restore_stashed_freq(struct xe_guc_pc *pc)
> return ret;
> }
>
> -/**
> - * xe_guc_pc_override_gucrc_mode - override GUCRC mode
> - * @pc: Xe_GuC_PC instance
> - * @mode: new value of the mode.
> - *
> - * Return: 0 on success, negative error code on error
> - */
> -int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode)
> -{
> - guard(xe_pm_runtime)(pc_to_xe(pc));
> - return pc_action_set_param(pc, SLPC_PARAM_PWRGATE_RC_MODE, mode);
> -}
> -
> -/**
> - * xe_guc_pc_unset_gucrc_mode - unset GUCRC mode override
> - * @pc: Xe_GuC_PC instance
> - *
> - * Return: 0 on success, negative error code on error
> - */
> -int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc)
> -{
> - guard(xe_pm_runtime)(pc_to_xe(pc));
> - return pc_action_unset_param(pc, SLPC_PARAM_PWRGATE_RC_MODE);
> -}
> -
> static void pc_init_pcode_freq(struct xe_guc_pc *pc)
> {
> u32 min = DIV_ROUND_CLOSEST(pc->rpn_freq, GT_FREQUENCY_MULTIPLIER);
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.h b/drivers/gpu/drm/xe/xe_guc_pc.h
> index 1b95873b262e..00182a02a49e 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.h
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.h
> @@ -18,6 +18,8 @@ int xe_guc_pc_stop(struct xe_guc_pc *pc);
> int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode);
> int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc);
We can remove these functions and the enum
> void xe_guc_pc_print(struct xe_guc_pc *pc, struct drm_printer *p);
> +int xe_guc_pc_action_set_param(struct xe_guc_pc *pc, u8 id, u32 value);
> +int xe_guc_pc_action_unset_param(struct xe_guc_pc *pc, u8 id);
>
> u32 xe_guc_pc_get_act_freq(struct xe_guc_pc *pc);
> int xe_guc_pc_get_cur_freq(struct xe_guc_pc *pc, u32 *freq);
> diff --git a/drivers/gpu/drm/xe/xe_guc_rc.c b/drivers/gpu/drm/xe/xe_guc_rc.c
> index b7dab3158060..4d75babc4d28 100644
> --- a/drivers/gpu/drm/xe/xe_guc_rc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_rc.c
> @@ -14,6 +14,7 @@
> #include "xe_gt_idle.h"
> #include "xe_gt_printk.h"
> #include "xe_guc_ct.h"
> +#include "xe_guc_pc.h"
> #include "xe_guc_rc.h"
> #include "xe_pm.h"
>
> @@ -137,3 +138,28 @@ int xe_guc_rc_start(struct xe_guc *guc)
>
> return xe_guc_rc_enable(guc);
> }
> +
> +/**
> + * xe_guc_rc_override_mode() - override GUCRC mode
nit: This can be named set_mode
Thanks
Riana
> + * @guc: Xe GuC instance
> + * @mode: new value of the mode.
> + *
> + * Return: 0 on success, negative error code on error
> + */
> +int xe_guc_rc_override_mode(struct xe_guc *guc, enum slpc_gucrc_mode mode)
> +{
> + guard(xe_pm_runtime)(guc_to_xe(guc));
> + return xe_guc_pc_action_set_param(&guc->pc, SLPC_PARAM_PWRGATE_RC_MODE, mode);
> +}
> +
> +/**
> + * xe_guc_rc_unset_mode() - revert to default mode
> + * @guc: Xe GuC instance
> + *
> + * Return: 0 on success, negative error code on error
> + */
> +int xe_guc_rc_unset_mode(struct xe_guc *guc)
> +{
> + guard(xe_pm_runtime)(guc_to_xe(guc));
> + return xe_guc_pc_action_unset_param(&guc->pc, SLPC_PARAM_PWRGATE_RC_MODE);
> +}
> diff --git a/drivers/gpu/drm/xe/xe_guc_rc.h b/drivers/gpu/drm/xe/xe_guc_rc.h
> index f2a6ae7f05d8..581c66ed7e3a 100644
> --- a/drivers/gpu/drm/xe/xe_guc_rc.h
> +++ b/drivers/gpu/drm/xe/xe_guc_rc.h
> @@ -7,9 +7,12 @@
> #define _XE_GUC_RC_H_
>
> struct xe_guc;
> +enum slpc_gucrc_mode;
>
> void xe_guc_rc_disable(struct xe_guc *guc);
> int xe_guc_rc_start(struct xe_guc *guc);
> int xe_guc_rc_init(struct xe_guc *guc);
> +int xe_guc_rc_override_mode(struct xe_guc *guc, enum slpc_gucrc_mode mode);
> +int xe_guc_rc_unset_mode(struct xe_guc *guc);
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> index abf87fe0b345..ae811c9c5303 100644
> --- a/drivers/gpu/drm/xe/xe_oa.c
> +++ b/drivers/gpu/drm/xe/xe_oa.c
> @@ -29,7 +29,7 @@
> #include "xe_gt.h"
> #include "xe_gt_mcr.h"
> #include "xe_gt_printk.h"
> -#include "xe_guc_pc.h"
> +#include "xe_guc_rc.h"
> #include "xe_macros.h"
> #include "xe_mmio.h"
> #include "xe_oa.h"
> @@ -875,7 +875,7 @@ static void xe_oa_stream_destroy(struct xe_oa_stream *stream)
>
> /* Wa_1509372804:pvc: Unset the override of GUCRC mode to enable rc6 */
> if (stream->override_gucrc)
> - xe_gt_WARN_ON(gt, xe_guc_pc_unset_gucrc_mode(>->uc.guc.pc));
> + xe_gt_WARN_ON(gt, xe_guc_rc_unset_mode(>->uc.guc));
>
> xe_oa_free_configs(stream);
> xe_file_put(stream->xef);
> @@ -1765,8 +1765,7 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
> * state. Prevent this by overriding GUCRC mode.
> */
> if (XE_GT_WA(stream->gt, 1509372804)) {
> - ret = xe_guc_pc_override_gucrc_mode(>->uc.guc.pc,
> - SLPC_GUCRC_MODE_GUCRC_NO_RC6);
> + ret = xe_guc_rc_override_mode(>->uc.guc, SLPC_GUCRC_MODE_GUCRC_NO_RC6);
> if (ret)
> goto err_free_configs;
>
> @@ -1824,7 +1823,7 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
> xe_force_wake_put(gt_to_fw(gt), stream->fw_ref);
> xe_pm_runtime_put(stream->oa->xe);
> if (stream->override_gucrc)
> - xe_gt_WARN_ON(gt, xe_guc_pc_unset_gucrc_mode(>->uc.guc.pc));
> + xe_gt_WARN_ON(gt, xe_guc_rc_unset_mode(>->uc.guc));
> err_free_configs:
> xe_oa_free_configs(stream);
> exit:
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 1/2] drm/xe: Decouple GuC RC code from xe_guc_pc
2026-01-07 5:50 ` Riana Tauro
@ 2026-01-12 23:36 ` Belgaumkar, Vinay
0 siblings, 0 replies; 10+ messages in thread
From: Belgaumkar, Vinay @ 2026-01-12 23:36 UTC (permalink / raw)
To: Riana Tauro, intel-xe
On 1/6/2026 9:50 PM, Riana Tauro wrote:
> Hi Vinay
>
> On 12/23/2025 2:21 PM, Vinay Belgaumkar wrote:
>> Move enable/disable GuC RC logic into the new file. This will
>> allow us to independently enable/disable GuC RC and not rely
>> on SLPC related functions. GuC already provides separate H2G
>> interfaces to setup GuC RC and SLPC.
>>
>> v2: Comments (Michal W), remove duplicate c6_enable calls from
>> xe_guc_pc.
>>
>> v3: Clarify crosss interactions between xe_guc_rc and xe_guc_pc
>> (Michal W)
>>
>> v4: More comments (Michal W)
>>
>> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>> ---
>> drivers/gpu/drm/xe/Makefile | 1 +
>> drivers/gpu/drm/xe/xe_gt.c | 1 -
>> drivers/gpu/drm/xe/xe_guc.c | 6 ++
>> drivers/gpu/drm/xe/xe_guc_pc.c | 68 +++-------------
>> drivers/gpu/drm/xe/xe_guc_pc.h | 1 -
>> drivers/gpu/drm/xe/xe_guc_rc.c | 139 +++++++++++++++++++++++++++++++++
>> drivers/gpu/drm/xe/xe_guc_rc.h | 15 ++++
>> drivers/gpu/drm/xe/xe_uc.c | 10 +--
>> drivers/gpu/drm/xe/xe_uc.h | 1 -
>> 9 files changed, 178 insertions(+), 64 deletions(-)
>> create mode 100644 drivers/gpu/drm/xe/xe_guc_rc.c
>> create mode 100644 drivers/gpu/drm/xe/xe_guc_rc.h
>>
>> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
>> index 89dc48cd73e2..928fdb925c13 100644
>> --- a/drivers/gpu/drm/xe/Makefile
>> +++ b/drivers/gpu/drm/xe/Makefile
>> @@ -74,6 +74,7 @@ xe-y += xe_bb.o \
>> xe_guc_log.o \
>> xe_guc_pagefault.o \
>> xe_guc_pc.o \
>> + xe_guc_rc.o \
>> xe_guc_submit.o \
>> xe_guc_tlb_inval.o \
>> xe_heci_gsc.o \
>> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
>> index 313ce83ab0e5..9ee328aa6579 100644
>> --- a/drivers/gpu/drm/xe/xe_gt.c
>> +++ b/drivers/gpu/drm/xe/xe_gt.c
>> @@ -822,7 +822,6 @@ static void gt_reset_worker(struct work_struct *w)
>> if (IS_SRIOV_PF(gt_to_xe(gt)))
>> xe_gt_sriov_pf_stop_prepare(gt);
>> - xe_uc_gucrc_disable(>->uc);
>> xe_uc_stop_prepare(>->uc);
>> xe_pagefault_reset(gt_to_xe(gt), gt);
>> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
>> index 44360437beeb..beac4050c4dc 100644
>> --- a/drivers/gpu/drm/xe/xe_guc.c
>> +++ b/drivers/gpu/drm/xe/xe_guc.c
>> @@ -35,6 +35,7 @@
>> #include "xe_guc_klv_helpers.h"
>> #include "xe_guc_log.h"
>> #include "xe_guc_pc.h"
>> +#include "xe_guc_rc.h"
>> #include "xe_guc_relay.h"
>> #include "xe_guc_submit.h"
>> #include "xe_memirq.h"
>> @@ -869,6 +870,10 @@ int xe_guc_init_post_hwconfig(struct xe_guc *guc)
>> if (ret)
>> return ret;
>> + ret = xe_guc_rc_init(guc);
>> + if (ret)
>> + return ret;
>> +
>> ret = xe_guc_engine_activity_init(guc);
>> if (ret)
>> return ret;
>> @@ -1609,6 +1614,7 @@ void xe_guc_stop_prepare(struct xe_guc *guc)
>> if (!IS_SRIOV_VF(guc_to_xe(guc))) {
>> int err;
>> + xe_guc_rc_disable(guc);
>> err = xe_guc_pc_stop(&guc->pc);
>> xe_gt_WARN(guc_to_gt(guc), err, "Failed to stop GuC PC:
>> %pe\n",
>> ERR_PTR(err));
>> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c
>> b/drivers/gpu/drm/xe/xe_guc_pc.c
>> index 54702a0fd05b..3e7173130066 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
>> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
>> @@ -92,6 +92,17 @@
>> * Render-C states is also a GuC PC feature that is now enabled in
>> Xe for
>> * all platforms.
>> *
>> + * Implementation details:
>> + * -----------------------
>> + * The implementation for GuC Power Management features is split as
>> follows:
>> + *
>> + * xe_guc_rc: Logic for handling GuC RC
>> + * xe_gt_idle: Host side logic for RC6 and Coarse Power gating (CPG)
>> + * xe_guc_pc: Logic for all other SLPC related features
>> + *
>> + * There is some cross interaction between these where host C6 will
>> need to be
>> + * enabled when we plan to skip GuC RC. Also, the GuC RC mode is
>> currently
>> + * overridden through 0x3003 which is an SLPC H2G call.
>> */
>> static struct xe_guc *pc_to_guc(struct xe_guc_pc *pc)
>> @@ -253,22 +264,6 @@ static int pc_action_unset_param(struct
>> xe_guc_pc *pc, u8 id)
>> return ret;
>> }
>> -static int pc_action_setup_gucrc(struct xe_guc_pc *pc, u32 mode)
>> -{
>> - struct xe_guc_ct *ct = pc_to_ct(pc);
>> - u32 action[] = {
>> - GUC_ACTION_HOST2GUC_SETUP_PC_GUCRC,
>> - mode,
>> - };
>> - int ret;
>> -
>> - ret = xe_guc_ct_send(ct, action, ARRAY_SIZE(action), 0, 0);
>> - if (ret && !(xe_device_wedged(pc_to_xe(pc)) && ret == -ECANCELED))
>> - xe_gt_err(pc_to_gt(pc), "GuC RC enable mode=%u failed: %pe\n",
>> - mode, ERR_PTR(ret));
>> - return ret;
>> -}
>> -
>> static u32 decode_freq(u32 raw)
>> {
>> return DIV_ROUND_CLOSEST(raw * GT_FREQUENCY_MULTIPLIER,
>> @@ -1050,30 +1045,6 @@ int xe_guc_pc_restore_stashed_freq(struct
>> xe_guc_pc *pc)
>> return ret;
>> }
>> -/**
>> - * xe_guc_pc_gucrc_disable - Disable GuC RC
>> - * @pc: Xe_GuC_PC instance
>> - *
>> - * Disables GuC RC by taking control of RC6 back from GuC.
>> - *
>> - * Return: 0 on success, negative error code on error.
>> - */
>> -int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc)
>> -{
>> - struct xe_device *xe = pc_to_xe(pc);
>> - struct xe_gt *gt = pc_to_gt(pc);
>> - int ret = 0;
>> -
>> - if (xe->info.skip_guc_pc)
>> - return 0;
>> -
>> - ret = pc_action_setup_gucrc(pc, GUCRC_HOST_CONTROL);
>> - if (ret)
>> - return ret;
>> -
>> - return xe_gt_idle_disable_c6(gt);
>> -}
>> -
>> /**
>> * xe_guc_pc_override_gucrc_mode - override GUCRC mode
>> * @pc: Xe_GuC_PC instance
>> @@ -1217,9 +1188,6 @@ int xe_guc_pc_start(struct xe_guc_pc *pc)
>> return -ETIMEDOUT;
>> if (xe->info.skip_guc_pc) {
>> - if (xe->info.platform != XE_PVC)
>> - xe_gt_idle_enable_c6(gt);
>> -
>> /* Request max possible since dynamic freq mgmt is not
>> enabled */
>> pc_set_cur_freq(pc, UINT_MAX);
>> return 0;
>> @@ -1257,15 +1225,6 @@ int xe_guc_pc_start(struct xe_guc_pc *pc)
>> if (ret)
>> return ret;
>> - if (xe->info.platform == XE_PVC) {
>> - xe_guc_pc_gucrc_disable(pc);
>> - return 0;
>> - }
>> -
>> - ret = pc_action_setup_gucrc(pc, GUCRC_FIRMWARE_CONTROL);
>> - if (ret)
>> - return ret;
>> -
>> /* Enable SLPC Optimized Strategy for compute */
>> ret = pc_action_set_strategy(pc, SLPC_OPTIMIZED_STRATEGY_COMPUTE);
>> @@ -1285,10 +1244,8 @@ int xe_guc_pc_stop(struct xe_guc_pc *pc)
>> {
>> struct xe_device *xe = pc_to_xe(pc);
>> - if (xe->info.skip_guc_pc) {
>> - xe_gt_idle_disable_c6(pc_to_gt(pc));
>> + if (xe->info.skip_guc_pc)
>> return 0;
>> - }
>> mutex_lock(&pc->freq_lock);
>> pc->freq_ready = false;
>> @@ -1310,7 +1267,6 @@ static void xe_guc_pc_fini_hw(void *arg)
>> return;
>> CLASS(xe_force_wake, fw_ref)(gt_to_fw(pc_to_gt(pc)),
>> XE_FORCEWAKE_ALL);
>
> The forcewake can be removed too. Frequency registers don't need a
> forcewake
The usual ones don't. But this one needs to write to 0xA024 as part of
pc_set_cur_freq() before setting curr_freq. 0xA024 is not shadowed, so
will need fwake. Although, a GT force wake is sufficient here.
>
>> - xe_guc_pc_gucrc_disable(pc);
>> XE_WARN_ON(xe_guc_pc_stop(pc));
>> /* Bind requested freq to mert_freq_cap before unload */
>> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.h
>> b/drivers/gpu/drm/xe/xe_guc_pc.h
>> index 0e31396f103c..1b95873b262e 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_pc.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_pc.h
>> @@ -15,7 +15,6 @@ struct drm_printer;
>> int xe_guc_pc_init(struct xe_guc_pc *pc);
>> int xe_guc_pc_start(struct xe_guc_pc *pc);
>> int xe_guc_pc_stop(struct xe_guc_pc *pc);
>> -int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc);
>> int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum
>> slpc_gucrc_mode mode);
>> int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc);
>> void xe_guc_pc_print(struct xe_guc_pc *pc, struct drm_printer *p);
>> diff --git a/drivers/gpu/drm/xe/xe_guc_rc.c
>> b/drivers/gpu/drm/xe/xe_guc_rc.c
>> new file mode 100644
>> index 000000000000..b7dab3158060
>> --- /dev/null
>> +++ b/drivers/gpu/drm/xe/xe_guc_rc.c
>> @@ -0,0 +1,139 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2025 Intel Corporation
>> + */
>> +
>> +#include <linux/device/devres.h>
>> +#include <drm/drm_print.h>
>> +
>> +#include "abi/guc_actions_slpc_abi.h"
>> +#include "xe_device.h"
>> +#include "xe_force_wake.h"
>> +#include "xe_gt.h"
>> +#include "xe_guc.h"
>> +#include "xe_gt_idle.h"
>> +#include "xe_gt_printk.h"
>> +#include "xe_guc_ct.h"
>> +#include "xe_guc_rc.h"
>> +#include "xe_pm.h"
>> +
>> +/**
>> + * DOC: GuC RC (Render C-states)
>> + *
>> + * GuC handles the GT transition to deeper C-states in conjunction
>> with Pcode.
>> + * GuC RC can be enabled independently of the frequency component in
>> SLPC,
>> + * which is also controlled by GuC.
>> + *
>> + * This file will contain all H2G related logic for handling Render
>> C-states.
>> + * There are some calls to xe_gt_idle, where we enable host C6 when
>> GuC RC is
>> + * skipped. GuC RC is mostly independent of xe_guc_pc with the
>> exception of
>> + * functions that override the mode for which we have to rely on the
>> SLPC H2G
>> + * calls.
>> + */
>> +
>> +static int guc_action_setup_gucrc(struct xe_guc *guc, u32 control)
>> +{
>> + u32 action[] = {
>> + GUC_ACTION_HOST2GUC_SETUP_PC_GUCRC,
>> + control,
>> + };
>> + int ret;
>> +
>> + ret = xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0);
>> + if (ret && !(xe_device_wedged(guc_to_xe(guc)) && ret ==
>> -ECANCELED))
>> + xe_gt_err(guc_to_gt(guc),
>> + "GuC RC setup %s(%u) failed (%pe)\n",
>> + control == GUCRC_HOST_CONTROL ? "HOST_CONTROL" :
>> + control == GUCRC_FIRMWARE_CONTROL ? "FIRMWARE_CONTROL" :
>> + "UNKNOWN", control, ERR_PTR(ret));
>> + return ret;
>> +}
>> +
>> +/**
>> + * xe_guc_rc_disable() - Disable GuC RC
>> + * @guc: Xe GuC instance
>> + *
>> + * Disables GuC RC by taking control of RC6 back from GuC.
>> + */
>> +void xe_guc_rc_disable(struct xe_guc *guc)
>> +{
>> + struct xe_device *xe = guc_to_xe(guc);
>> +
>> + if (xe->info.skip_guc_pc)
>> + return;
>
> guc_rc_start enables host c6 when guc_pc is skipped. So don't we have to
> disable it in this call?
Yup, will update and cleanup the general path.
>
>
>> +
>> + if (guc_action_setup_gucrc(guc, GUCRC_HOST_CONTROL))
>> + return;
>> +
>> + XE_WARN_ON(xe_gt_idle_disable_c6(guc_to_gt(guc)));
>> +}
>> +
>> +static void xe_guc_rc_fini_hw(void *arg)
>> +{
>> + struct xe_guc *guc = arg;
>> + struct xe_device *xe = guc_to_xe(guc);
>> + struct xe_gt *gt = guc_to_gt(guc);
>> +
>> + if (xe_device_wedged(xe))
>> + return;
>> +
>> + CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
>> + xe_guc_rc_disable(guc);
>> +}
>> +
>> +/**
>> + * xe_guc_rc_init() - Initialize GuC RC
>> + * @guc: Xe GuC instance
>> + *
>> + * Initializes GuC RC feature.
>
> This function does not initialize GucRC. I think we can combine both
> init and start as a single function.
Yup, will just stick to enable/disable.
>
>> + *
>> + * Return: 0 on success, negative error code on error.
>> + */
>> +int xe_guc_rc_init(struct xe_guc *guc)
>> +{
>> + struct xe_device *xe = guc_to_xe(guc);
>> +
>> + xe_gt_assert(guc_to_gt(guc), xe_device_uc_enabled(xe));
>> +
>> + if (xe->info.skip_guc_pc)
>> + return 0;
>> +
>> + return devm_add_action_or_reset(xe->drm.dev, xe_guc_rc_fini_hw,
>> guc);
>> +}
>> +
>> +static int xe_guc_rc_enable(struct xe_guc *guc)
>> +{
>> + return guc_action_setup_gucrc(guc, GUCRC_FIRMWARE_CONTROL);
>> +}
>> +
>> +/**
>> + * xe_guc_rc_start() - Enable GuC RC feature if applicable
>> + * @guc: Xe GuC instance
>> + *
>> + * Enables GuC RC feature.
>
> Function name can be xe_guc_rc_enable to pair with disable
Agree.
Thanks,
Vinay.
>
> Thanks
> Riana
>
>> + *
>> + * Return: 0 on success, negative error code on error.
>> + */
>> +int xe_guc_rc_start(struct xe_guc *guc)
>> +{
>> + struct xe_device *xe = guc_to_xe(guc);
>> + struct xe_gt *gt = guc_to_gt(guc);
>> +
>> + xe_gt_assert(gt, xe_device_uc_enabled(xe));
>> +
>> + CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
>> + if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FW_GT))
>> + return -ETIMEDOUT;
>> +
>> + if (xe->info.platform == XE_PVC) {
>> + xe_guc_rc_disable(guc);
>> + return 0;
>> + }
>> +
>> + if (xe->info.skip_guc_pc) {
>> + xe_gt_idle_enable_c6(gt);
>> + return 0;
>> + }
>> +
>> + return xe_guc_rc_enable(guc);
>> +}
>> diff --git a/drivers/gpu/drm/xe/xe_guc_rc.h
>> b/drivers/gpu/drm/xe/xe_guc_rc.h
>> new file mode 100644
>> index 000000000000..f2a6ae7f05d8
>> --- /dev/null
>> +++ b/drivers/gpu/drm/xe/xe_guc_rc.h
>> @@ -0,0 +1,15 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright © 2025 Intel Corporation
>> + */
>> +
>> +#ifndef _XE_GUC_RC_H_
>> +#define _XE_GUC_RC_H_
>> +
>> +struct xe_guc;
>> +
>> +void xe_guc_rc_disable(struct xe_guc *guc);
>> +int xe_guc_rc_start(struct xe_guc *guc);
>> +int xe_guc_rc_init(struct xe_guc *guc);
>> +
>> +#endif
>> diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
>> index 157520ea1783..300b99acbd51 100644
>> --- a/drivers/gpu/drm/xe/xe_uc.c
>> +++ b/drivers/gpu/drm/xe/xe_uc.c
>> @@ -14,6 +14,7 @@
>> #include "xe_gt_sriov_vf.h"
>> #include "xe_guc.h"
>> #include "xe_guc_pc.h"
>> +#include "xe_guc_rc.h"
>> #include "xe_guc_engine_activity.h"
>> #include "xe_huc.h"
>> #include "xe_sriov.h"
>> @@ -216,6 +217,10 @@ int xe_uc_load_hw(struct xe_uc *uc)
>> if (ret)
>> goto err_out;
>> + ret = xe_guc_rc_start(&uc->guc);
>> + if (ret)
>> + goto err_out;
>> +
>> xe_guc_engine_activity_enable_stats(&uc->guc);
>> /* We don't fail the driver load if HuC fails to auth */
>> @@ -244,11 +249,6 @@ int xe_uc_reset_prepare(struct xe_uc *uc)
>> return xe_guc_reset_prepare(&uc->guc);
>> }
>> -void xe_uc_gucrc_disable(struct xe_uc *uc)
>> -{
>> - XE_WARN_ON(xe_guc_pc_gucrc_disable(&uc->guc.pc));
>> -}
>> -
>> void xe_uc_stop_prepare(struct xe_uc *uc)
>> {
>> xe_gsc_stop_prepare(&uc->gsc);
>> diff --git a/drivers/gpu/drm/xe/xe_uc.h b/drivers/gpu/drm/xe/xe_uc.h
>> index 5398da1a8097..255a54a8f876 100644
>> --- a/drivers/gpu/drm/xe/xe_uc.h
>> +++ b/drivers/gpu/drm/xe/xe_uc.h
>> @@ -12,7 +12,6 @@ int xe_uc_init_noalloc(struct xe_uc *uc);
>> int xe_uc_init(struct xe_uc *uc);
>> int xe_uc_init_post_hwconfig(struct xe_uc *uc);
>> int xe_uc_load_hw(struct xe_uc *uc);
>> -void xe_uc_gucrc_disable(struct xe_uc *uc);
>> int xe_uc_reset_prepare(struct xe_uc *uc);
>> void xe_uc_runtime_resume(struct xe_uc *uc);
>> void xe_uc_runtime_suspend(struct xe_uc *uc);
>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2026-01-12 23:36 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-12-23 8:51 [PATCH v4 0/2] drm/xe: drm/xe: Separate out GuC RC code Vinay Belgaumkar
2025-12-23 8:51 ` [PATCH v4 1/2] drm/xe: Decouple GuC RC code from xe_guc_pc Vinay Belgaumkar
2026-01-07 5:50 ` Riana Tauro
2026-01-12 23:36 ` Belgaumkar, Vinay
2025-12-23 8:51 ` [PATCH v4 2/2] drm/xe: Add a wrapper for set/unset params Vinay Belgaumkar
2026-01-07 6:01 ` Riana Tauro
2025-12-23 9:05 ` ✗ CI.checkpatch: warning for drm/xe: drm/xe: Separate out GuC RC code (rev3) Patchwork
2025-12-23 9:07 ` ✓ CI.KUnit: success " Patchwork
2025-12-23 9:52 ` ✓ Xe.CI.BAT: " Patchwork
2025-12-23 18:58 ` ✓ Xe.CI.Full: " Patchwork
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