* [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy
@ 2025-09-05 23:56 Daniele Ceraolo Spurio
2025-09-08 18:55 ` ✓ CI.KUnit: success for drm/xe/guc: Set RCS/CCS yield policy (rev2) Patchwork
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Daniele Ceraolo Spurio @ 2025-09-05 23:56 UTC (permalink / raw)
To: intel-xe
Cc: Daniele Ceraolo Spurio, Matthew Brost, John Harrison,
Vinay Belgaumkar
All recent platforms (including all the ones officially supported by the
Xe driver) do not allow concurrent execution of RCS and CCS workloads
from different address spaces, with the HW blocking the context switch
when it detects such a scenario.
The DUAL_QUEUE flag helps with this, by causing the GuC to not submit a
context it knows will not be able to execute. This, however, causes a new
problem: if RCS and CCS queues have pending workloads from different
address spaces, the GuC needs to choose from which of the 2 queues to
pick the next workload to execute. By default, the GuC prioritizes RCS
submissions over CCS ones, which can lead to CCS workloads being
significantly (or completely) starved of execution time.
The driver can tune this by setting a dedicated scheduling policy KLV;
this KLV allows the driver to specify a quantum (in ms) and a ratio
(percentage value between 0 and 100), and the GuC will prioritize the CCS
for that percentage of each quantum.
Given that we want to guarantee enough RCS throughput to avoid missing
frames, we set the yield policy to 20% of each 80ms interval.
v2: updated quantum and ratio, improved comment, use xe_guc_submit_disable
in gt_sanitize
Fixes: d9a1ae0d17bd ("drm/xe/guc: Enable WA_DUAL_QUEUE for newer platforms")
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
drivers/gpu/drm/xe/abi/guc_actions_abi.h | 1 +
drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 25 +++++++++
drivers/gpu/drm/xe/xe_gt.c | 2 +-
drivers/gpu/drm/xe/xe_guc.c | 6 +--
drivers/gpu/drm/xe/xe_guc_submit.c | 66 ++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_submit.h | 2 +
6 files changed, 97 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
index d8cf68a0516d..1baa969aaa7c 100644
--- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
@@ -117,6 +117,7 @@ enum xe_guc_action {
XE_GUC_ACTION_ENTER_S_STATE = 0x501,
XE_GUC_ACTION_EXIT_S_STATE = 0x502,
XE_GUC_ACTION_GLOBAL_SCHED_POLICY_CHANGE = 0x506,
+ XE_GUC_ACTION_UPDATE_SCHEDULING_POLICIES_KLV = 0x509,
XE_GUC_ACTION_SCHED_CONTEXT = 0x1000,
XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET = 0x1001,
XE_GUC_ACTION_SCHED_CONTEXT_MODE_DONE = 0x1002,
diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
index 0e78351c6ef5..265a135e7061 100644
--- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
@@ -17,6 +17,7 @@
* | 0 | 31:16 | **KEY** - KLV key identifier |
* | | | - `GuC Self Config KLVs`_ |
* | | | - `GuC Opt In Feature KLVs`_ |
+ * | | | - `GuC Scheduling Policies KLVs`_ |
* | | | - `GuC VGT Policy KLVs`_ |
* | | | - `GuC VF Configuration KLVs`_ |
* | | | |
@@ -152,6 +153,30 @@ enum {
#define GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH_KEY 0x4003
#define GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH_LEN 0u
+/**
+ * DOC: GuC Scheduling Policies KLVs
+ *
+ * `GuC KLV`_ keys available for use with UPDATE_SCHEDULING_POLICIES_KLV.
+ *
+ * _`GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD` : 0x1001
+ * Some platforms do not allow concurrent execution of RCS and CCS
+ * workloads from different address spaces. By default, the GuC prioritizes
+ * RCS submissions over CCS ones, which can lead to CCS workloads being
+ * significantly (or completely) starved of execution time. This KLV allows
+ * the driver to specify a quantum (in ms) and a ratio (percentage value
+ * between 0 and 100), and the GuC will prioritize the CCS for that
+ * percentage of each quantum. For example, specifying 100ms and 30% will
+ * make the GuC prioritize the CCS for 30ms of every 100ms.
+ * Note that this does not necessarly mean that RCS and CCS engines will
+ * only be active for their percentage of the quantum, as the restriction
+ * only kicks in if both classes are fully busy with non-compatible address
+ * spaces; i.e., if one engine is idle or running the same address space,
+ * a pending job on the other engine will still be submitted to the HW no
+ * matter what the ratio is
+ */
+#define GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD_KEY 0x1001
+#define GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD_LEN 2u
+
/**
* DOC: GuC VGT Policy KLVs
*
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 34505a6d93ed..3e0ad7e5b5df 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -98,7 +98,7 @@ void xe_gt_sanitize(struct xe_gt *gt)
* FIXME: if xe_uc_sanitize is called here, on TGL driver will not
* reload
*/
- gt->uc.guc.submission_state.enabled = false;
+ xe_guc_submit_disable(>->uc.guc);
}
static void xe_gt_enable_host_l2_vram(struct xe_gt *gt)
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index b3a6408a5760..ab1cc11a208c 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -888,9 +888,7 @@ int xe_guc_post_load_init(struct xe_guc *guc)
return ret;
}
- guc->submission_state.enabled = true;
-
- return 0;
+ return xe_guc_submit_enable(guc);
}
int xe_guc_reset(struct xe_guc *guc)
@@ -1602,7 +1600,7 @@ void xe_guc_sanitize(struct xe_guc *guc)
{
xe_uc_fw_sanitize(&guc->fw);
xe_guc_ct_disable(&guc->ct);
- guc->submission_state.enabled = false;
+ xe_guc_submit_disable(guc);
}
int xe_guc_reset_prepare(struct xe_guc *guc)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index bfc061da8f93..e377ba3a39b3 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -32,6 +32,7 @@
#include "xe_guc_ct.h"
#include "xe_guc_exec_queue_types.h"
#include "xe_guc_id_mgr.h"
+#include "xe_guc_klv_helpers.h"
#include "xe_guc_submit_types.h"
#include "xe_hw_engine.h"
#include "xe_hw_fence.h"
@@ -316,6 +317,71 @@ int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids)
return drmm_add_action_or_reset(&xe->drm, guc_submit_fini, guc);
}
+/*
+ * Given that we want to guarantee enough RCS throughput to avoid missing
+ * frames, we set the yield policy to 20% of each 80ms interval.
+ */
+#define RC_YIELD_DURATION 80 /* in ms */
+#define RC_YIELD_RATIO 20 /* in percent */
+static u32 *emit_render_compute_yield_klv(u32 *emit)
+{
+ *emit++ = PREP_GUC_KLV_TAG(SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD);
+ *emit++ = RC_YIELD_DURATION;
+ *emit++ = RC_YIELD_RATIO;
+
+ return emit;
+}
+
+#define SCHEDULING_POLICY_MAX_DWORDS 16
+static int guc_init_global_schedule_policy(struct xe_guc *guc)
+{
+ u32 data[SCHEDULING_POLICY_MAX_DWORDS];
+ u32 *emit = data;
+ u32 count = 0;
+ int ret;
+
+ if (GUC_SUBMIT_VER(guc) < MAKE_GUC_VER(1, 1, 0))
+ return 0;
+
+ *emit++ = XE_GUC_ACTION_UPDATE_SCHEDULING_POLICIES_KLV;
+
+ if (CCS_MASK(guc_to_gt(guc)))
+ emit = emit_render_compute_yield_klv(emit);
+
+ count = emit - data;
+ if (count > 1) {
+ xe_assert(guc_to_xe(guc), count <= SCHEDULING_POLICY_MAX_DWORDS);
+
+ ret = xe_guc_ct_send_block(&guc->ct, data, count);
+ if (ret < 0) {
+ xe_gt_err(guc_to_gt(guc),
+ "failed to enable GuC sheduling policies: %pe\n",
+ ERR_PTR(ret));
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+int xe_guc_submit_enable(struct xe_guc *guc)
+{
+ int ret;
+
+ ret = guc_init_global_schedule_policy(guc);
+ if (ret)
+ return ret;
+
+ guc->submission_state.enabled = true;
+
+ return 0;
+}
+
+void xe_guc_submit_disable(struct xe_guc *guc)
+{
+ guc->submission_state.enabled = false;
+}
+
static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa_count)
{
int i;
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
index 6b5df5d0956b..e20ccafdfab5 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.h
+++ b/drivers/gpu/drm/xe/xe_guc_submit.h
@@ -13,6 +13,8 @@ struct xe_exec_queue;
struct xe_guc;
int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids);
+int xe_guc_submit_enable(struct xe_guc *guc);
+void xe_guc_submit_disable(struct xe_guc *guc);
int xe_guc_submit_reset_prepare(struct xe_guc *guc);
void xe_guc_submit_reset_wait(struct xe_guc *guc);
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✓ CI.KUnit: success for drm/xe/guc: Set RCS/CCS yield policy (rev2)
2025-09-05 23:56 [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy Daniele Ceraolo Spurio
@ 2025-09-08 18:55 ` Patchwork
2025-09-08 19:37 ` ✓ Xe.CI.BAT: " Patchwork
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2025-09-08 18:55 UTC (permalink / raw)
To: Daniele Ceraolo Spurio; +Cc: intel-xe
== Series Details ==
Series: drm/xe/guc: Set RCS/CCS yield policy (rev2)
URL : https://patchwork.freedesktop.org/series/150910/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[18:54:19] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:54:23] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:54:52] Starting KUnit Kernel (1/1)...
[18:54:52] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:54:52] ================== guc_buf (11 subtests) ===================
[18:54:52] [PASSED] test_smallest
[18:54:52] [PASSED] test_largest
[18:54:52] [PASSED] test_granular
[18:54:52] [PASSED] test_unique
[18:54:52] [PASSED] test_overlap
[18:54:52] [PASSED] test_reusable
[18:54:52] [PASSED] test_too_big
[18:54:52] [PASSED] test_flush
[18:54:52] [PASSED] test_lookup
[18:54:52] [PASSED] test_data
[18:54:52] [PASSED] test_class
[18:54:52] ===================== [PASSED] guc_buf =====================
[18:54:52] =================== guc_dbm (7 subtests) ===================
[18:54:52] [PASSED] test_empty
[18:54:52] [PASSED] test_default
[18:54:52] ======================== test_size ========================
[18:54:52] [PASSED] 4
[18:54:52] [PASSED] 8
[18:54:52] [PASSED] 32
[18:54:52] [PASSED] 256
[18:54:52] ==================== [PASSED] test_size ====================
[18:54:52] ======================= test_reuse ========================
[18:54:52] [PASSED] 4
[18:54:52] [PASSED] 8
[18:54:52] [PASSED] 32
[18:54:52] [PASSED] 256
[18:54:52] =================== [PASSED] test_reuse ====================
[18:54:52] =================== test_range_overlap ====================
[18:54:52] [PASSED] 4
[18:54:52] [PASSED] 8
[18:54:52] [PASSED] 32
[18:54:52] [PASSED] 256
[18:54:52] =============== [PASSED] test_range_overlap ================
[18:54:52] =================== test_range_compact ====================
[18:54:52] [PASSED] 4
[18:54:52] [PASSED] 8
[18:54:52] [PASSED] 32
[18:54:52] [PASSED] 256
[18:54:52] =============== [PASSED] test_range_compact ================
[18:54:52] ==================== test_range_spare =====================
[18:54:52] [PASSED] 4
[18:54:52] [PASSED] 8
[18:54:52] [PASSED] 32
[18:54:52] [PASSED] 256
[18:54:52] ================ [PASSED] test_range_spare =================
[18:54:52] ===================== [PASSED] guc_dbm =====================
[18:54:52] =================== guc_idm (6 subtests) ===================
[18:54:52] [PASSED] bad_init
[18:54:52] [PASSED] no_init
[18:54:52] [PASSED] init_fini
[18:54:52] [PASSED] check_used
[18:54:52] [PASSED] check_quota
[18:54:52] [PASSED] check_all
[18:54:52] ===================== [PASSED] guc_idm =====================
[18:54:52] ================== no_relay (3 subtests) ===================
[18:54:52] [PASSED] xe_drops_guc2pf_if_not_ready
[18:54:52] [PASSED] xe_drops_guc2vf_if_not_ready
[18:54:52] [PASSED] xe_rejects_send_if_not_ready
[18:54:52] ==================== [PASSED] no_relay =====================
[18:54:52] ================== pf_relay (14 subtests) ==================
[18:54:52] [PASSED] pf_rejects_guc2pf_too_short
[18:54:52] [PASSED] pf_rejects_guc2pf_too_long
[18:54:52] [PASSED] pf_rejects_guc2pf_no_payload
[18:54:53] [PASSED] pf_fails_no_payload
[18:54:53] [PASSED] pf_fails_bad_origin
[18:54:53] [PASSED] pf_fails_bad_type
[18:54:53] [PASSED] pf_txn_reports_error
[18:54:53] [PASSED] pf_txn_sends_pf2guc
[18:54:53] [PASSED] pf_sends_pf2guc
[18:54:53] [SKIPPED] pf_loopback_nop
[18:54:53] [SKIPPED] pf_loopback_echo
[18:54:53] [SKIPPED] pf_loopback_fail
[18:54:53] [SKIPPED] pf_loopback_busy
[18:54:53] [SKIPPED] pf_loopback_retry
[18:54:53] ==================== [PASSED] pf_relay =====================
[18:54:53] ================== vf_relay (3 subtests) ===================
[18:54:53] [PASSED] vf_rejects_guc2vf_too_short
[18:54:53] [PASSED] vf_rejects_guc2vf_too_long
[18:54:53] [PASSED] vf_rejects_guc2vf_no_payload
[18:54:53] ==================== [PASSED] vf_relay =====================
[18:54:53] ===================== lmtt (1 subtest) =====================
[18:54:53] ======================== test_ops =========================
[18:54:53] [PASSED] 2-level
[18:54:53] [PASSED] multi-level
[18:54:53] ==================== [PASSED] test_ops =====================
[18:54:53] ====================== [PASSED] lmtt =======================
[18:54:53] ================= pf_service (11 subtests) =================
[18:54:53] [PASSED] pf_negotiate_any
[18:54:53] [PASSED] pf_negotiate_base_match
[18:54:53] [PASSED] pf_negotiate_base_newer
[18:54:53] [PASSED] pf_negotiate_base_next
[18:54:53] [SKIPPED] pf_negotiate_base_older
[18:54:53] [PASSED] pf_negotiate_base_prev
[18:54:53] [PASSED] pf_negotiate_latest_match
[18:54:53] [PASSED] pf_negotiate_latest_newer
[18:54:53] [PASSED] pf_negotiate_latest_next
[18:54:53] [SKIPPED] pf_negotiate_latest_older
[18:54:53] [SKIPPED] pf_negotiate_latest_prev
[18:54:53] =================== [PASSED] pf_service ====================
[18:54:53] =================== xe_mocs (2 subtests) ===================
[18:54:53] ================ xe_live_mocs_kernel_kunit ================
[18:54:53] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[18:54:53] ================ xe_live_mocs_reset_kunit =================
[18:54:53] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[18:54:53] ==================== [SKIPPED] xe_mocs =====================
[18:54:53] ================= xe_migrate (2 subtests) ==================
[18:54:53] ================= xe_migrate_sanity_kunit =================
[18:54:53] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[18:54:53] ================== xe_validate_ccs_kunit ==================
[18:54:53] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[18:54:53] =================== [SKIPPED] xe_migrate ===================
[18:54:53] ================== xe_dma_buf (1 subtest) ==================
[18:54:53] ==================== xe_dma_buf_kunit =====================
[18:54:53] ================ [SKIPPED] xe_dma_buf_kunit ================
[18:54:53] =================== [SKIPPED] xe_dma_buf ===================
[18:54:53] ================= xe_bo_shrink (1 subtest) =================
[18:54:53] =================== xe_bo_shrink_kunit ====================
[18:54:53] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[18:54:53] ================== [SKIPPED] xe_bo_shrink ==================
[18:54:53] ==================== xe_bo (2 subtests) ====================
[18:54:53] ================== xe_ccs_migrate_kunit ===================
[18:54:53] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[18:54:53] ==================== xe_bo_evict_kunit ====================
[18:54:53] =============== [SKIPPED] xe_bo_evict_kunit ================
[18:54:53] ===================== [SKIPPED] xe_bo ======================
[18:54:53] ==================== args (11 subtests) ====================
[18:54:53] [PASSED] count_args_test
[18:54:53] [PASSED] call_args_example
[18:54:53] [PASSED] call_args_test
[18:54:53] [PASSED] drop_first_arg_example
[18:54:53] [PASSED] drop_first_arg_test
[18:54:53] [PASSED] first_arg_example
[18:54:53] [PASSED] first_arg_test
[18:54:53] [PASSED] last_arg_example
[18:54:53] [PASSED] last_arg_test
[18:54:53] [PASSED] pick_arg_example
[18:54:53] [PASSED] sep_comma_example
[18:54:53] ====================== [PASSED] args =======================
[18:54:53] =================== xe_pci (3 subtests) ====================
[18:54:53] ==================== check_graphics_ip ====================
[18:54:53] [PASSED] 12.70 Xe_LPG
[18:54:53] [PASSED] 12.71 Xe_LPG
[18:54:53] [PASSED] 12.74 Xe_LPG+
[18:54:53] [PASSED] 20.01 Xe2_HPG
[18:54:53] [PASSED] 20.02 Xe2_HPG
[18:54:53] [PASSED] 20.04 Xe2_LPG
[18:54:53] [PASSED] 30.00 Xe3_LPG
[18:54:53] [PASSED] 30.01 Xe3_LPG
[18:54:53] [PASSED] 30.03 Xe3_LPG
[18:54:53] ================ [PASSED] check_graphics_ip ================
[18:54:53] ===================== check_media_ip ======================
[18:54:53] [PASSED] 13.00 Xe_LPM+
[18:54:53] [PASSED] 13.01 Xe2_HPM
[18:54:53] [PASSED] 20.00 Xe2_LPM
[18:54:53] [PASSED] 30.00 Xe3_LPM
[18:54:53] [PASSED] 30.02 Xe3_LPM
[18:54:53] ================= [PASSED] check_media_ip ==================
[18:54:53] ================= check_platform_gt_count =================
[18:54:53] [PASSED] 0x9A60 (TIGERLAKE)
[18:54:53] [PASSED] 0x9A68 (TIGERLAKE)
[18:54:53] [PASSED] 0x9A70 (TIGERLAKE)
[18:54:53] [PASSED] 0x9A40 (TIGERLAKE)
[18:54:53] [PASSED] 0x9A49 (TIGERLAKE)
[18:54:53] [PASSED] 0x9A59 (TIGERLAKE)
[18:54:53] [PASSED] 0x9A78 (TIGERLAKE)
[18:54:53] [PASSED] 0x9AC0 (TIGERLAKE)
[18:54:53] [PASSED] 0x9AC9 (TIGERLAKE)
[18:54:53] [PASSED] 0x9AD9 (TIGERLAKE)
[18:54:53] [PASSED] 0x9AF8 (TIGERLAKE)
[18:54:53] [PASSED] 0x4C80 (ROCKETLAKE)
[18:54:53] [PASSED] 0x4C8A (ROCKETLAKE)
[18:54:53] [PASSED] 0x4C8B (ROCKETLAKE)
[18:54:53] [PASSED] 0x4C8C (ROCKETLAKE)
[18:54:53] [PASSED] 0x4C90 (ROCKETLAKE)
[18:54:53] [PASSED] 0x4C9A (ROCKETLAKE)
[18:54:53] [PASSED] 0x4680 (ALDERLAKE_S)
[18:54:53] [PASSED] 0x4682 (ALDERLAKE_S)
[18:54:53] [PASSED] 0x4688 (ALDERLAKE_S)
[18:54:53] [PASSED] 0x468A (ALDERLAKE_S)
[18:54:53] [PASSED] 0x468B (ALDERLAKE_S)
[18:54:53] [PASSED] 0x4690 (ALDERLAKE_S)
[18:54:53] [PASSED] 0x4692 (ALDERLAKE_S)
[18:54:53] [PASSED] 0x4693 (ALDERLAKE_S)
[18:54:53] [PASSED] 0x46A0 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46A1 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46A2 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46A3 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46A6 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46A8 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46AA (ALDERLAKE_P)
[18:54:53] [PASSED] 0x462A (ALDERLAKE_P)
[18:54:53] [PASSED] 0x4626 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x4628 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46B0 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46B1 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46B2 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46B3 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46C0 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46C1 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46C2 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46C3 (ALDERLAKE_P)
[18:54:53] [PASSED] 0x46D0 (ALDERLAKE_N)
[18:54:53] [PASSED] 0x46D1 (ALDERLAKE_N)
[18:54:53] [PASSED] 0x46D2 (ALDERLAKE_N)
[18:54:53] [PASSED] 0x46D3 (ALDERLAKE_N)
[18:54:53] [PASSED] 0x46D4 (ALDERLAKE_N)
[18:54:53] [PASSED] 0xA721 (ALDERLAKE_P)
[18:54:53] [PASSED] 0xA7A1 (ALDERLAKE_P)
[18:54:53] [PASSED] 0xA7A9 (ALDERLAKE_P)
[18:54:53] [PASSED] 0xA7AC (ALDERLAKE_P)
[18:54:53] [PASSED] 0xA7AD (ALDERLAKE_P)
[18:54:53] [PASSED] 0xA720 (ALDERLAKE_P)
[18:54:53] [PASSED] 0xA7A0 (ALDERLAKE_P)
[18:54:53] [PASSED] 0xA7A8 (ALDERLAKE_P)
[18:54:53] [PASSED] 0xA7AA (ALDERLAKE_P)
[18:54:53] [PASSED] 0xA7AB (ALDERLAKE_P)
[18:54:53] [PASSED] 0xA780 (ALDERLAKE_S)
[18:54:53] [PASSED] 0xA781 (ALDERLAKE_S)
[18:54:53] [PASSED] 0xA782 (ALDERLAKE_S)
[18:54:53] [PASSED] 0xA783 (ALDERLAKE_S)
[18:54:53] [PASSED] 0xA788 (ALDERLAKE_S)
[18:54:53] [PASSED] 0xA789 (ALDERLAKE_S)
[18:54:53] [PASSED] 0xA78A (ALDERLAKE_S)
[18:54:53] [PASSED] 0xA78B (ALDERLAKE_S)
[18:54:53] [PASSED] 0x4905 (DG1)
[18:54:53] [PASSED] 0x4906 (DG1)
[18:54:53] [PASSED] 0x4907 (DG1)
[18:54:53] [PASSED] 0x4908 (DG1)
[18:54:53] [PASSED] 0x4909 (DG1)
[18:54:53] [PASSED] 0x56C0 (DG2)
[18:54:53] [PASSED] 0x56C2 (DG2)
[18:54:53] [PASSED] 0x56C1 (DG2)
[18:54:53] [PASSED] 0x7D51 (METEORLAKE)
[18:54:53] [PASSED] 0x7DD1 (METEORLAKE)
[18:54:53] [PASSED] 0x7D41 (METEORLAKE)
[18:54:53] [PASSED] 0x7D67 (METEORLAKE)
[18:54:53] [PASSED] 0xB640 (METEORLAKE)
[18:54:53] [PASSED] 0x56A0 (DG2)
[18:54:53] [PASSED] 0x56A1 (DG2)
[18:54:53] [PASSED] 0x56A2 (DG2)
[18:54:53] [PASSED] 0x56BE (DG2)
[18:54:53] [PASSED] 0x56BF (DG2)
[18:54:53] [PASSED] 0x5690 (DG2)
[18:54:53] [PASSED] 0x5691 (DG2)
[18:54:53] [PASSED] 0x5692 (DG2)
[18:54:53] [PASSED] 0x56A5 (DG2)
[18:54:53] [PASSED] 0x56A6 (DG2)
[18:54:53] [PASSED] 0x56B0 (DG2)
[18:54:53] [PASSED] 0x56B1 (DG2)
[18:54:53] [PASSED] 0x56BA (DG2)
[18:54:53] [PASSED] 0x56BB (DG2)
[18:54:53] [PASSED] 0x56BC (DG2)
[18:54:53] [PASSED] 0x56BD (DG2)
[18:54:53] [PASSED] 0x5693 (DG2)
[18:54:53] [PASSED] 0x5694 (DG2)
[18:54:53] [PASSED] 0x5695 (DG2)
[18:54:53] [PASSED] 0x56A3 (DG2)
[18:54:53] [PASSED] 0x56A4 (DG2)
[18:54:53] [PASSED] 0x56B2 (DG2)
[18:54:53] [PASSED] 0x56B3 (DG2)
[18:54:53] [PASSED] 0x5696 (DG2)
[18:54:53] [PASSED] 0x5697 (DG2)
[18:54:53] [PASSED] 0xB69 (PVC)
[18:54:53] [PASSED] 0xB6E (PVC)
[18:54:53] [PASSED] 0xBD4 (PVC)
[18:54:53] [PASSED] 0xBD5 (PVC)
[18:54:53] [PASSED] 0xBD6 (PVC)
[18:54:53] [PASSED] 0xBD7 (PVC)
[18:54:53] [PASSED] 0xBD8 (PVC)
[18:54:53] [PASSED] 0xBD9 (PVC)
[18:54:53] [PASSED] 0xBDA (PVC)
[18:54:53] [PASSED] 0xBDB (PVC)
[18:54:53] [PASSED] 0xBE0 (PVC)
[18:54:53] [PASSED] 0xBE1 (PVC)
[18:54:53] [PASSED] 0xBE5 (PVC)
[18:54:53] [PASSED] 0x7D40 (METEORLAKE)
[18:54:53] [PASSED] 0x7D45 (METEORLAKE)
[18:54:53] [PASSED] 0x7D55 (METEORLAKE)
[18:54:53] [PASSED] 0x7D60 (METEORLAKE)
[18:54:53] [PASSED] 0x7DD5 (METEORLAKE)
[18:54:53] [PASSED] 0x6420 (LUNARLAKE)
[18:54:53] [PASSED] 0x64A0 (LUNARLAKE)
[18:54:53] [PASSED] 0x64B0 (LUNARLAKE)
[18:54:53] [PASSED] 0xE202 (BATTLEMAGE)
[18:54:53] [PASSED] 0xE209 (BATTLEMAGE)
[18:54:53] [PASSED] 0xE20B (BATTLEMAGE)
[18:54:53] [PASSED] 0xE20C (BATTLEMAGE)
[18:54:53] [PASSED] 0xE20D (BATTLEMAGE)
[18:54:53] [PASSED] 0xE210 (BATTLEMAGE)
[18:54:53] [PASSED] 0xE211 (BATTLEMAGE)
[18:54:53] [PASSED] 0xE212 (BATTLEMAGE)
[18:54:53] [PASSED] 0xE216 (BATTLEMAGE)
[18:54:53] [PASSED] 0xE220 (BATTLEMAGE)
[18:54:53] [PASSED] 0xE221 (BATTLEMAGE)
[18:54:53] [PASSED] 0xE222 (BATTLEMAGE)
[18:54:53] [PASSED] 0xE223 (BATTLEMAGE)
[18:54:53] [PASSED] 0xB080 (PANTHERLAKE)
[18:54:53] [PASSED] 0xB081 (PANTHERLAKE)
[18:54:53] [PASSED] 0xB082 (PANTHERLAKE)
[18:54:53] [PASSED] 0xB083 (PANTHERLAKE)
[18:54:53] [PASSED] 0xB084 (PANTHERLAKE)
[18:54:53] [PASSED] 0xB085 (PANTHERLAKE)
[18:54:53] [PASSED] 0xB086 (PANTHERLAKE)
[18:54:53] [PASSED] 0xB087 (PANTHERLAKE)
[18:54:53] [PASSED] 0xB08F (PANTHERLAKE)
[18:54:53] [PASSED] 0xB090 (PANTHERLAKE)
[18:54:53] [PASSED] 0xB0A0 (PANTHERLAKE)
[18:54:53] [PASSED] 0xB0B0 (PANTHERLAKE)
[18:54:53] [PASSED] 0xFD80 (PANTHERLAKE)
[18:54:53] [PASSED] 0xFD81 (PANTHERLAKE)
[18:54:53] ============= [PASSED] check_platform_gt_count =============
[18:54:53] ===================== [PASSED] xe_pci ======================
[18:54:53] =================== xe_rtp (2 subtests) ====================
[18:54:53] =============== xe_rtp_process_to_sr_tests ================
[18:54:53] [PASSED] coalesce-same-reg
[18:54:53] [PASSED] no-match-no-add
[18:54:53] [PASSED] match-or
[18:54:53] [PASSED] match-or-xfail
[18:54:53] [PASSED] no-match-no-add-multiple-rules
[18:54:53] [PASSED] two-regs-two-entries
[18:54:53] [PASSED] clr-one-set-other
[18:54:53] [PASSED] set-field
[18:54:53] [PASSED] conflict-duplicate
[18:54:53] [PASSED] conflict-not-disjoint
[18:54:53] [PASSED] conflict-reg-type
[18:54:53] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[18:54:53] ================== xe_rtp_process_tests ===================
[18:54:53] [PASSED] active1
[18:54:53] [PASSED] active2
[18:54:53] [PASSED] active-inactive
[18:54:53] [PASSED] inactive-active
[18:54:53] [PASSED] inactive-1st_or_active-inactive
[18:54:53] [PASSED] inactive-2nd_or_active-inactive
[18:54:53] [PASSED] inactive-last_or_active-inactive
[18:54:53] [PASSED] inactive-no_or_active-inactive
[18:54:53] ============== [PASSED] xe_rtp_process_tests ===============
[18:54:53] ===================== [PASSED] xe_rtp ======================
[18:54:53] ==================== xe_wa (1 subtest) =====================
[18:54:53] ======================== xe_wa_gt =========================
[18:54:53] [PASSED] TIGERLAKE B0
[18:54:53] [PASSED] DG1 A0
[18:54:53] [PASSED] DG1 B0
[18:54:53] [PASSED] ALDERLAKE_S A0
[18:54:53] [PASSED] ALDERLAKE_S B0
[18:54:53] [PASSED] ALDERLAKE_S C0
[18:54:53] [PASSED] ALDERLAKE_S D0
[18:54:53] [PASSED] ALDERLAKE_P A0
[18:54:53] [PASSED] ALDERLAKE_P B0
[18:54:53] [PASSED] ALDERLAKE_P C0
[18:54:53] [PASSED] ALDERLAKE_S RPLS D0
[18:54:53] [PASSED] ALDERLAKE_P RPLU E0
[18:54:53] [PASSED] DG2 G10 C0
[18:54:53] [PASSED] DG2 G11 B1
[18:54:53] [PASSED] DG2 G12 A1
[18:54:53] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:54:53] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:54:53] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[18:54:53] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
stty: 'standard input': Inappropriate ioctl for device
[18:54:53] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[18:54:53] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[18:54:53] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[18:54:53] ==================== [PASSED] xe_wa_gt =====================
[18:54:53] ====================== [PASSED] xe_wa ======================
[18:54:53] ============================================================
[18:54:53] Testing complete. Ran 298 tests: passed: 282, skipped: 16
[18:54:53] Elapsed time: 33.506s total, 4.216s configuring, 28.923s building, 0.323s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[18:54:53] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:54:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:55:17] Starting KUnit Kernel (1/1)...
[18:55:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:55:17] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[18:55:17] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[18:55:17] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[18:55:17] =========== drm_validate_clone_mode (2 subtests) ===========
[18:55:17] ============== drm_test_check_in_clone_mode ===============
[18:55:17] [PASSED] in_clone_mode
[18:55:17] [PASSED] not_in_clone_mode
[18:55:17] ========== [PASSED] drm_test_check_in_clone_mode ===========
[18:55:17] =============== drm_test_check_valid_clones ===============
[18:55:17] [PASSED] not_in_clone_mode
[18:55:17] [PASSED] valid_clone
[18:55:17] [PASSED] invalid_clone
[18:55:17] =========== [PASSED] drm_test_check_valid_clones ===========
[18:55:17] ============= [PASSED] drm_validate_clone_mode =============
[18:55:17] ============= drm_validate_modeset (1 subtest) =============
[18:55:17] [PASSED] drm_test_check_connector_changed_modeset
[18:55:17] ============== [PASSED] drm_validate_modeset ===============
[18:55:17] ====== drm_test_bridge_get_current_state (2 subtests) ======
[18:55:17] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[18:55:17] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[18:55:17] ======== [PASSED] drm_test_bridge_get_current_state ========
[18:55:17] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[18:55:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[18:55:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[18:55:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[18:55:17] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[18:55:17] ============== drm_bridge_alloc (2 subtests) ===============
[18:55:17] [PASSED] drm_test_drm_bridge_alloc_basic
[18:55:17] [PASSED] drm_test_drm_bridge_alloc_get_put
[18:55:17] ================ [PASSED] drm_bridge_alloc =================
[18:55:17] ================== drm_buddy (7 subtests) ==================
[18:55:17] [PASSED] drm_test_buddy_alloc_limit
[18:55:17] [PASSED] drm_test_buddy_alloc_optimistic
[18:55:17] [PASSED] drm_test_buddy_alloc_pessimistic
[18:55:17] [PASSED] drm_test_buddy_alloc_pathological
[18:55:17] [PASSED] drm_test_buddy_alloc_contiguous
[18:55:17] [PASSED] drm_test_buddy_alloc_clear
[18:55:17] [PASSED] drm_test_buddy_alloc_range_bias
[18:55:17] ==================== [PASSED] drm_buddy ====================
[18:55:17] ============= drm_cmdline_parser (40 subtests) =============
[18:55:17] [PASSED] drm_test_cmdline_force_d_only
[18:55:17] [PASSED] drm_test_cmdline_force_D_only_dvi
[18:55:17] [PASSED] drm_test_cmdline_force_D_only_hdmi
[18:55:17] [PASSED] drm_test_cmdline_force_D_only_not_digital
[18:55:17] [PASSED] drm_test_cmdline_force_e_only
[18:55:17] [PASSED] drm_test_cmdline_res
[18:55:17] [PASSED] drm_test_cmdline_res_vesa
[18:55:17] [PASSED] drm_test_cmdline_res_vesa_rblank
[18:55:17] [PASSED] drm_test_cmdline_res_rblank
[18:55:17] [PASSED] drm_test_cmdline_res_bpp
[18:55:17] [PASSED] drm_test_cmdline_res_refresh
[18:55:17] [PASSED] drm_test_cmdline_res_bpp_refresh
[18:55:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[18:55:17] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[18:55:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[18:55:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[18:55:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[18:55:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[18:55:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[18:55:17] [PASSED] drm_test_cmdline_res_margins_force_on
[18:55:17] [PASSED] drm_test_cmdline_res_vesa_margins
[18:55:17] [PASSED] drm_test_cmdline_name
[18:55:17] [PASSED] drm_test_cmdline_name_bpp
[18:55:17] [PASSED] drm_test_cmdline_name_option
[18:55:17] [PASSED] drm_test_cmdline_name_bpp_option
[18:55:17] [PASSED] drm_test_cmdline_rotate_0
[18:55:17] [PASSED] drm_test_cmdline_rotate_90
[18:55:17] [PASSED] drm_test_cmdline_rotate_180
[18:55:17] [PASSED] drm_test_cmdline_rotate_270
[18:55:17] [PASSED] drm_test_cmdline_hmirror
[18:55:17] [PASSED] drm_test_cmdline_vmirror
[18:55:17] [PASSED] drm_test_cmdline_margin_options
[18:55:17] [PASSED] drm_test_cmdline_multiple_options
[18:55:17] [PASSED] drm_test_cmdline_bpp_extra_and_option
[18:55:17] [PASSED] drm_test_cmdline_extra_and_option
[18:55:17] [PASSED] drm_test_cmdline_freestanding_options
[18:55:17] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[18:55:17] [PASSED] drm_test_cmdline_panel_orientation
[18:55:17] ================ drm_test_cmdline_invalid =================
[18:55:17] [PASSED] margin_only
[18:55:17] [PASSED] interlace_only
[18:55:17] [PASSED] res_missing_x
[18:55:17] [PASSED] res_missing_y
[18:55:17] [PASSED] res_bad_y
[18:55:17] [PASSED] res_missing_y_bpp
[18:55:17] [PASSED] res_bad_bpp
[18:55:17] [PASSED] res_bad_refresh
[18:55:17] [PASSED] res_bpp_refresh_force_on_off
[18:55:17] [PASSED] res_invalid_mode
[18:55:17] [PASSED] res_bpp_wrong_place_mode
[18:55:17] [PASSED] name_bpp_refresh
[18:55:17] [PASSED] name_refresh
[18:55:17] [PASSED] name_refresh_wrong_mode
[18:55:17] [PASSED] name_refresh_invalid_mode
[18:55:17] [PASSED] rotate_multiple
[18:55:17] [PASSED] rotate_invalid_val
[18:55:17] [PASSED] rotate_truncated
[18:55:17] [PASSED] invalid_option
[18:55:17] [PASSED] invalid_tv_option
[18:55:17] [PASSED] truncated_tv_option
[18:55:17] ============ [PASSED] drm_test_cmdline_invalid =============
[18:55:17] =============== drm_test_cmdline_tv_options ===============
[18:55:17] [PASSED] NTSC
[18:55:17] [PASSED] NTSC_443
[18:55:17] [PASSED] NTSC_J
[18:55:17] [PASSED] PAL
[18:55:17] [PASSED] PAL_M
[18:55:17] [PASSED] PAL_N
[18:55:17] [PASSED] SECAM
[18:55:17] [PASSED] MONO_525
[18:55:17] [PASSED] MONO_625
[18:55:17] =========== [PASSED] drm_test_cmdline_tv_options ===========
[18:55:17] =============== [PASSED] drm_cmdline_parser ================
[18:55:17] ========== drmm_connector_hdmi_init (20 subtests) ==========
[18:55:17] [PASSED] drm_test_connector_hdmi_init_valid
[18:55:17] [PASSED] drm_test_connector_hdmi_init_bpc_8
[18:55:17] [PASSED] drm_test_connector_hdmi_init_bpc_10
[18:55:17] [PASSED] drm_test_connector_hdmi_init_bpc_12
[18:55:17] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[18:55:17] [PASSED] drm_test_connector_hdmi_init_bpc_null
[18:55:17] [PASSED] drm_test_connector_hdmi_init_formats_empty
[18:55:17] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[18:55:17] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:55:17] [PASSED] supported_formats=0x9 yuv420_allowed=1
[18:55:17] [PASSED] supported_formats=0x9 yuv420_allowed=0
[18:55:17] [PASSED] supported_formats=0x3 yuv420_allowed=1
[18:55:17] [PASSED] supported_formats=0x3 yuv420_allowed=0
[18:55:17] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:55:17] [PASSED] drm_test_connector_hdmi_init_null_ddc
[18:55:17] [PASSED] drm_test_connector_hdmi_init_null_product
[18:55:17] [PASSED] drm_test_connector_hdmi_init_null_vendor
[18:55:17] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[18:55:17] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[18:55:17] [PASSED] drm_test_connector_hdmi_init_product_valid
[18:55:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[18:55:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[18:55:17] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[18:55:17] ========= drm_test_connector_hdmi_init_type_valid =========
[18:55:17] [PASSED] HDMI-A
[18:55:17] [PASSED] HDMI-B
[18:55:17] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[18:55:17] ======== drm_test_connector_hdmi_init_type_invalid ========
[18:55:17] [PASSED] Unknown
[18:55:17] [PASSED] VGA
[18:55:17] [PASSED] DVI-I
[18:55:17] [PASSED] DVI-D
[18:55:17] [PASSED] DVI-A
[18:55:17] [PASSED] Composite
[18:55:17] [PASSED] SVIDEO
[18:55:17] [PASSED] LVDS
[18:55:17] [PASSED] Component
[18:55:17] [PASSED] DIN
[18:55:17] [PASSED] DP
[18:55:17] [PASSED] TV
[18:55:17] [PASSED] eDP
[18:55:17] [PASSED] Virtual
[18:55:17] [PASSED] DSI
[18:55:17] [PASSED] DPI
[18:55:17] [PASSED] Writeback
[18:55:17] [PASSED] SPI
[18:55:17] [PASSED] USB
[18:55:17] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[18:55:17] ============ [PASSED] drmm_connector_hdmi_init =============
[18:55:17] ============= drmm_connector_init (3 subtests) =============
[18:55:17] [PASSED] drm_test_drmm_connector_init
[18:55:17] [PASSED] drm_test_drmm_connector_init_null_ddc
[18:55:17] ========= drm_test_drmm_connector_init_type_valid =========
[18:55:17] [PASSED] Unknown
[18:55:17] [PASSED] VGA
[18:55:17] [PASSED] DVI-I
[18:55:17] [PASSED] DVI-D
[18:55:17] [PASSED] DVI-A
[18:55:17] [PASSED] Composite
[18:55:17] [PASSED] SVIDEO
[18:55:17] [PASSED] LVDS
[18:55:17] [PASSED] Component
[18:55:17] [PASSED] DIN
[18:55:17] [PASSED] DP
[18:55:17] [PASSED] HDMI-A
[18:55:17] [PASSED] HDMI-B
[18:55:17] [PASSED] TV
[18:55:17] [PASSED] eDP
[18:55:17] [PASSED] Virtual
[18:55:17] [PASSED] DSI
[18:55:17] [PASSED] DPI
[18:55:17] [PASSED] Writeback
[18:55:17] [PASSED] SPI
[18:55:17] [PASSED] USB
[18:55:17] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[18:55:17] =============== [PASSED] drmm_connector_init ===============
[18:55:17] ========= drm_connector_dynamic_init (6 subtests) ==========
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_init
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_init_properties
[18:55:17] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[18:55:17] [PASSED] Unknown
[18:55:17] [PASSED] VGA
[18:55:17] [PASSED] DVI-I
[18:55:17] [PASSED] DVI-D
[18:55:17] [PASSED] DVI-A
[18:55:17] [PASSED] Composite
[18:55:17] [PASSED] SVIDEO
[18:55:17] [PASSED] LVDS
[18:55:17] [PASSED] Component
[18:55:17] [PASSED] DIN
[18:55:17] [PASSED] DP
[18:55:17] [PASSED] HDMI-A
[18:55:17] [PASSED] HDMI-B
[18:55:17] [PASSED] TV
[18:55:17] [PASSED] eDP
[18:55:17] [PASSED] Virtual
[18:55:17] [PASSED] DSI
[18:55:17] [PASSED] DPI
[18:55:17] [PASSED] Writeback
[18:55:17] [PASSED] SPI
[18:55:17] [PASSED] USB
[18:55:17] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[18:55:17] ======== drm_test_drm_connector_dynamic_init_name =========
[18:55:17] [PASSED] Unknown
[18:55:17] [PASSED] VGA
[18:55:17] [PASSED] DVI-I
[18:55:17] [PASSED] DVI-D
[18:55:17] [PASSED] DVI-A
[18:55:17] [PASSED] Composite
[18:55:17] [PASSED] SVIDEO
[18:55:17] [PASSED] LVDS
[18:55:17] [PASSED] Component
[18:55:17] [PASSED] DIN
[18:55:17] [PASSED] DP
[18:55:17] [PASSED] HDMI-A
[18:55:17] [PASSED] HDMI-B
[18:55:17] [PASSED] TV
[18:55:17] [PASSED] eDP
[18:55:17] [PASSED] Virtual
[18:55:17] [PASSED] DSI
[18:55:17] [PASSED] DPI
[18:55:17] [PASSED] Writeback
[18:55:17] [PASSED] SPI
[18:55:17] [PASSED] USB
[18:55:17] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[18:55:17] =========== [PASSED] drm_connector_dynamic_init ============
[18:55:17] ==== drm_connector_dynamic_register_early (4 subtests) =====
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[18:55:17] ====== [PASSED] drm_connector_dynamic_register_early =======
[18:55:17] ======= drm_connector_dynamic_register (7 subtests) ========
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[18:55:17] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[18:55:17] ========= [PASSED] drm_connector_dynamic_register ==========
[18:55:17] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[18:55:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[18:55:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[18:55:17] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[18:55:17] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[18:55:17] ========== drm_test_get_tv_mode_from_name_valid ===========
[18:55:17] [PASSED] NTSC
[18:55:17] [PASSED] NTSC-443
[18:55:17] [PASSED] NTSC-J
[18:55:17] [PASSED] PAL
[18:55:17] [PASSED] PAL-M
[18:55:17] [PASSED] PAL-N
[18:55:17] [PASSED] SECAM
[18:55:17] [PASSED] Mono
[18:55:17] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[18:55:17] [PASSED] drm_test_get_tv_mode_from_name_truncated
[18:55:17] ============ [PASSED] drm_get_tv_mode_from_name ============
[18:55:17] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[18:55:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[18:55:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[18:55:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[18:55:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[18:55:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[18:55:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[18:55:17] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[18:55:17] [PASSED] VIC 96
[18:55:17] [PASSED] VIC 97
[18:55:17] [PASSED] VIC 101
[18:55:17] [PASSED] VIC 102
[18:55:17] [PASSED] VIC 106
[18:55:17] [PASSED] VIC 107
[18:55:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[18:55:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[18:55:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[18:55:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[18:55:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[18:55:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[18:55:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[18:55:17] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[18:55:17] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[18:55:17] [PASSED] Automatic
[18:55:17] [PASSED] Full
[18:55:17] [PASSED] Limited 16:235
[18:55:17] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[18:55:17] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[18:55:17] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[18:55:17] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[18:55:17] === drm_test_drm_hdmi_connector_get_output_format_name ====
[18:55:17] [PASSED] RGB
[18:55:17] [PASSED] YUV 4:2:0
[18:55:17] [PASSED] YUV 4:2:2
[18:55:17] [PASSED] YUV 4:4:4
[18:55:17] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[18:55:17] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[18:55:17] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[18:55:17] ============= drm_damage_helper (21 subtests) ==============
[18:55:17] [PASSED] drm_test_damage_iter_no_damage
[18:55:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[18:55:17] [PASSED] drm_test_damage_iter_no_damage_src_moved
[18:55:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[18:55:17] [PASSED] drm_test_damage_iter_no_damage_not_visible
[18:55:17] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[18:55:17] [PASSED] drm_test_damage_iter_no_damage_no_fb
[18:55:17] [PASSED] drm_test_damage_iter_simple_damage
[18:55:17] [PASSED] drm_test_damage_iter_single_damage
[18:55:17] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[18:55:17] [PASSED] drm_test_damage_iter_single_damage_outside_src
[18:55:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[18:55:17] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[18:55:17] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[18:55:17] [PASSED] drm_test_damage_iter_single_damage_src_moved
[18:55:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[18:55:17] [PASSED] drm_test_damage_iter_damage
[18:55:17] [PASSED] drm_test_damage_iter_damage_one_intersect
[18:55:17] [PASSED] drm_test_damage_iter_damage_one_outside
[18:55:17] [PASSED] drm_test_damage_iter_damage_src_moved
[18:55:17] [PASSED] drm_test_damage_iter_damage_not_visible
[18:55:17] ================ [PASSED] drm_damage_helper ================
[18:55:17] ============== drm_dp_mst_helper (3 subtests) ==============
[18:55:17] ============== drm_test_dp_mst_calc_pbn_mode ==============
[18:55:17] [PASSED] Clock 154000 BPP 30 DSC disabled
[18:55:17] [PASSED] Clock 234000 BPP 30 DSC disabled
[18:55:17] [PASSED] Clock 297000 BPP 24 DSC disabled
[18:55:17] [PASSED] Clock 332880 BPP 24 DSC enabled
[18:55:17] [PASSED] Clock 324540 BPP 24 DSC enabled
[18:55:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[18:55:17] ============== drm_test_dp_mst_calc_pbn_div ===============
[18:55:17] [PASSED] Link rate 2000000 lane count 4
[18:55:17] [PASSED] Link rate 2000000 lane count 2
[18:55:17] [PASSED] Link rate 2000000 lane count 1
[18:55:17] [PASSED] Link rate 1350000 lane count 4
[18:55:17] [PASSED] Link rate 1350000 lane count 2
[18:55:17] [PASSED] Link rate 1350000 lane count 1
[18:55:17] [PASSED] Link rate 1000000 lane count 4
[18:55:17] [PASSED] Link rate 1000000 lane count 2
[18:55:17] [PASSED] Link rate 1000000 lane count 1
[18:55:17] [PASSED] Link rate 810000 lane count 4
[18:55:17] [PASSED] Link rate 810000 lane count 2
[18:55:17] [PASSED] Link rate 810000 lane count 1
[18:55:17] [PASSED] Link rate 540000 lane count 4
[18:55:17] [PASSED] Link rate 540000 lane count 2
[18:55:17] [PASSED] Link rate 540000 lane count 1
[18:55:17] [PASSED] Link rate 270000 lane count 4
[18:55:17] [PASSED] Link rate 270000 lane count 2
[18:55:17] [PASSED] Link rate 270000 lane count 1
[18:55:17] [PASSED] Link rate 162000 lane count 4
[18:55:17] [PASSED] Link rate 162000 lane count 2
[18:55:17] [PASSED] Link rate 162000 lane count 1
[18:55:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[18:55:17] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[18:55:17] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[18:55:17] [PASSED] DP_POWER_UP_PHY with port number
[18:55:17] [PASSED] DP_POWER_DOWN_PHY with port number
[18:55:17] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[18:55:17] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[18:55:17] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[18:55:17] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[18:55:17] [PASSED] DP_QUERY_PAYLOAD with port number
[18:55:17] [PASSED] DP_QUERY_PAYLOAD with VCPI
[18:55:17] [PASSED] DP_REMOTE_DPCD_READ with port number
[18:55:17] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[18:55:17] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[18:55:17] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[18:55:17] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[18:55:17] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[18:55:17] [PASSED] DP_REMOTE_I2C_READ with port number
[18:55:17] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[18:55:17] [PASSED] DP_REMOTE_I2C_READ with transactions array
[18:55:17] [PASSED] DP_REMOTE_I2C_WRITE with port number
[18:55:17] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[18:55:17] [PASSED] DP_REMOTE_I2C_WRITE with data array
[18:55:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[18:55:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[18:55:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[18:55:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[18:55:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[18:55:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[18:55:17] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[18:55:17] ================ [PASSED] drm_dp_mst_helper ================
[18:55:17] ================== drm_exec (7 subtests) ===================
[18:55:17] [PASSED] sanitycheck
[18:55:17] [PASSED] test_lock
[18:55:17] [PASSED] test_lock_unlock
[18:55:17] [PASSED] test_duplicates
[18:55:17] [PASSED] test_prepare
[18:55:17] [PASSED] test_prepare_array
[18:55:17] [PASSED] test_multiple_loops
[18:55:17] ==================== [PASSED] drm_exec =====================
[18:55:17] =========== drm_format_helper_test (17 subtests) ===========
[18:55:17] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[18:55:17] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[18:55:17] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[18:55:17] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[18:55:17] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[18:55:17] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[18:55:17] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[18:55:17] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[18:55:17] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[18:55:17] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[18:55:17] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[18:55:17] ============== drm_test_fb_xrgb8888_to_mono ===============
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[18:55:17] ==================== drm_test_fb_swab =====================
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ================ [PASSED] drm_test_fb_swab =================
[18:55:17] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[18:55:17] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[18:55:17] [PASSED] single_pixel_source_buffer
[18:55:17] [PASSED] single_pixel_clip_rectangle
[18:55:17] [PASSED] well_known_colors
[18:55:17] [PASSED] destination_pitch
[18:55:17] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[18:55:17] ================= drm_test_fb_clip_offset =================
[18:55:17] [PASSED] pass through
[18:55:17] [PASSED] horizontal offset
[18:55:17] [PASSED] vertical offset
[18:55:17] [PASSED] horizontal and vertical offset
[18:55:17] [PASSED] horizontal offset (custom pitch)
[18:55:17] [PASSED] vertical offset (custom pitch)
[18:55:17] [PASSED] horizontal and vertical offset (custom pitch)
[18:55:17] ============= [PASSED] drm_test_fb_clip_offset =============
[18:55:17] =================== drm_test_fb_memcpy ====================
[18:55:17] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[18:55:17] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[18:55:17] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[18:55:17] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[18:55:17] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[18:55:17] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[18:55:17] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[18:55:17] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[18:55:17] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[18:55:17] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[18:55:17] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[18:55:17] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[18:55:17] =============== [PASSED] drm_test_fb_memcpy ================
[18:55:17] ============= [PASSED] drm_format_helper_test ==============
[18:55:17] ================= drm_format (18 subtests) =================
[18:55:17] [PASSED] drm_test_format_block_width_invalid
[18:55:17] [PASSED] drm_test_format_block_width_one_plane
[18:55:17] [PASSED] drm_test_format_block_width_two_plane
[18:55:17] [PASSED] drm_test_format_block_width_three_plane
[18:55:17] [PASSED] drm_test_format_block_width_tiled
[18:55:17] [PASSED] drm_test_format_block_height_invalid
[18:55:17] [PASSED] drm_test_format_block_height_one_plane
[18:55:17] [PASSED] drm_test_format_block_height_two_plane
[18:55:17] [PASSED] drm_test_format_block_height_three_plane
[18:55:17] [PASSED] drm_test_format_block_height_tiled
[18:55:17] [PASSED] drm_test_format_min_pitch_invalid
[18:55:17] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[18:55:17] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[18:55:17] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[18:55:17] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[18:55:17] [PASSED] drm_test_format_min_pitch_two_plane
[18:55:17] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[18:55:17] [PASSED] drm_test_format_min_pitch_tiled
[18:55:17] =================== [PASSED] drm_format ====================
[18:55:17] ============== drm_framebuffer (10 subtests) ===============
[18:55:17] ========== drm_test_framebuffer_check_src_coords ==========
[18:55:17] [PASSED] Success: source fits into fb
[18:55:17] [PASSED] Fail: overflowing fb with x-axis coordinate
[18:55:17] [PASSED] Fail: overflowing fb with y-axis coordinate
[18:55:17] [PASSED] Fail: overflowing fb with source width
[18:55:17] [PASSED] Fail: overflowing fb with source height
[18:55:17] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[18:55:17] [PASSED] drm_test_framebuffer_cleanup
[18:55:17] =============== drm_test_framebuffer_create ===============
[18:55:17] [PASSED] ABGR8888 normal sizes
[18:55:17] [PASSED] ABGR8888 max sizes
[18:55:17] [PASSED] ABGR8888 pitch greater than min required
[18:55:17] [PASSED] ABGR8888 pitch less than min required
[18:55:17] [PASSED] ABGR8888 Invalid width
[18:55:17] [PASSED] ABGR8888 Invalid buffer handle
[18:55:17] [PASSED] No pixel format
[18:55:17] [PASSED] ABGR8888 Width 0
[18:55:17] [PASSED] ABGR8888 Height 0
[18:55:17] [PASSED] ABGR8888 Out of bound height * pitch combination
[18:55:17] [PASSED] ABGR8888 Large buffer offset
[18:55:17] [PASSED] ABGR8888 Buffer offset for inexistent plane
[18:55:17] [PASSED] ABGR8888 Invalid flag
[18:55:17] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[18:55:17] [PASSED] ABGR8888 Valid buffer modifier
[18:55:17] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[18:55:17] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[18:55:17] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[18:55:17] [PASSED] NV12 Normal sizes
[18:55:17] [PASSED] NV12 Max sizes
[18:55:17] [PASSED] NV12 Invalid pitch
[18:55:17] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[18:55:17] [PASSED] NV12 different modifier per-plane
[18:55:17] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[18:55:17] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[18:55:17] [PASSED] NV12 Modifier for inexistent plane
[18:55:17] [PASSED] NV12 Handle for inexistent plane
[18:55:17] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[18:55:17] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[18:55:17] [PASSED] YVU420 Normal sizes
[18:55:17] [PASSED] YVU420 Max sizes
[18:55:17] [PASSED] YVU420 Invalid pitch
[18:55:17] [PASSED] YVU420 Different pitches
[18:55:17] [PASSED] YVU420 Different buffer offsets/pitches
[18:55:17] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[18:55:17] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[18:55:17] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[18:55:17] [PASSED] YVU420 Valid modifier
[18:55:17] [PASSED] YVU420 Different modifiers per plane
[18:55:17] [PASSED] YVU420 Modifier for inexistent plane
[18:55:17] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[18:55:17] [PASSED] X0L2 Normal sizes
[18:55:17] [PASSED] X0L2 Max sizes
[18:55:17] [PASSED] X0L2 Invalid pitch
[18:55:17] [PASSED] X0L2 Pitch greater than minimum required
[18:55:17] [PASSED] X0L2 Handle for inexistent plane
[18:55:17] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[18:55:17] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[18:55:17] [PASSED] X0L2 Valid modifier
[18:55:17] [PASSED] X0L2 Modifier for inexistent plane
[18:55:17] =========== [PASSED] drm_test_framebuffer_create ===========
[18:55:17] [PASSED] drm_test_framebuffer_free
[18:55:17] [PASSED] drm_test_framebuffer_init
[18:55:17] [PASSED] drm_test_framebuffer_init_bad_format
[18:55:17] [PASSED] drm_test_framebuffer_init_dev_mismatch
[18:55:17] [PASSED] drm_test_framebuffer_lookup
[18:55:17] [PASSED] drm_test_framebuffer_lookup_inexistent
[18:55:17] [PASSED] drm_test_framebuffer_modifiers_not_supported
[18:55:17] ================= [PASSED] drm_framebuffer =================
[18:55:17] ================ drm_gem_shmem (8 subtests) ================
[18:55:17] [PASSED] drm_gem_shmem_test_obj_create
[18:55:17] [PASSED] drm_gem_shmem_test_obj_create_private
[18:55:17] [PASSED] drm_gem_shmem_test_pin_pages
[18:55:17] [PASSED] drm_gem_shmem_test_vmap
[18:55:17] [PASSED] drm_gem_shmem_test_get_pages_sgt
[18:55:17] [PASSED] drm_gem_shmem_test_get_sg_table
[18:55:17] [PASSED] drm_gem_shmem_test_madvise
[18:55:17] [PASSED] drm_gem_shmem_test_purge
[18:55:17] ================== [PASSED] drm_gem_shmem ==================
[18:55:17] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[18:55:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[18:55:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[18:55:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[18:55:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[18:55:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[18:55:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[18:55:17] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[18:55:17] [PASSED] Automatic
[18:55:17] [PASSED] Full
[18:55:17] [PASSED] Limited 16:235
[18:55:17] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[18:55:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[18:55:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[18:55:17] [PASSED] drm_test_check_disable_connector
[18:55:17] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[18:55:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[18:55:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[18:55:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[18:55:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[18:55:17] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[18:55:17] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[18:55:17] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[18:55:17] [PASSED] drm_test_check_output_bpc_dvi
[18:55:17] [PASSED] drm_test_check_output_bpc_format_vic_1
[18:55:17] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[18:55:17] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[18:55:17] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[18:55:17] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[18:55:17] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[18:55:17] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[18:55:17] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[18:55:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[18:55:17] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[18:55:17] [PASSED] drm_test_check_broadcast_rgb_value
[18:55:17] [PASSED] drm_test_check_bpc_8_value
[18:55:17] [PASSED] drm_test_check_bpc_10_value
[18:55:17] [PASSED] drm_test_check_bpc_12_value
[18:55:17] [PASSED] drm_test_check_format_value
[18:55:17] [PASSED] drm_test_check_tmds_char_value
[18:55:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[18:55:17] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[18:55:17] [PASSED] drm_test_check_mode_valid
[18:55:17] [PASSED] drm_test_check_mode_valid_reject
[18:55:17] [PASSED] drm_test_check_mode_valid_reject_rate
[18:55:17] [PASSED] drm_test_check_mode_valid_reject_max_clock
[18:55:17] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[18:55:17] ================= drm_managed (2 subtests) =================
[18:55:17] [PASSED] drm_test_managed_release_action
[18:55:17] [PASSED] drm_test_managed_run_action
[18:55:17] =================== [PASSED] drm_managed ===================
[18:55:17] =================== drm_mm (6 subtests) ====================
[18:55:17] [PASSED] drm_test_mm_init
[18:55:17] [PASSED] drm_test_mm_debug
[18:55:17] [PASSED] drm_test_mm_align32
[18:55:17] [PASSED] drm_test_mm_align64
[18:55:17] [PASSED] drm_test_mm_lowest
[18:55:17] [PASSED] drm_test_mm_highest
[18:55:17] ===================== [PASSED] drm_mm ======================
[18:55:17] ============= drm_modes_analog_tv (5 subtests) =============
[18:55:17] [PASSED] drm_test_modes_analog_tv_mono_576i
[18:55:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[18:55:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[18:55:17] [PASSED] drm_test_modes_analog_tv_pal_576i
[18:55:17] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[18:55:17] =============== [PASSED] drm_modes_analog_tv ===============
[18:55:17] ============== drm_plane_helper (2 subtests) ===============
[18:55:17] =============== drm_test_check_plane_state ================
[18:55:17] [PASSED] clipping_simple
[18:55:17] [PASSED] clipping_rotate_reflect
[18:55:17] [PASSED] positioning_simple
[18:55:17] [PASSED] upscaling
[18:55:17] [PASSED] downscaling
[18:55:17] [PASSED] rounding1
[18:55:17] [PASSED] rounding2
[18:55:17] [PASSED] rounding3
[18:55:17] [PASSED] rounding4
[18:55:17] =========== [PASSED] drm_test_check_plane_state ============
[18:55:17] =========== drm_test_check_invalid_plane_state ============
[18:55:17] [PASSED] positioning_invalid
[18:55:17] [PASSED] upscaling_invalid
[18:55:17] [PASSED] downscaling_invalid
[18:55:17] ======= [PASSED] drm_test_check_invalid_plane_state ========
[18:55:17] ================ [PASSED] drm_plane_helper =================
[18:55:17] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[18:55:17] ====== drm_test_connector_helper_tv_get_modes_check =======
[18:55:17] [PASSED] None
[18:55:17] [PASSED] PAL
[18:55:17] [PASSED] NTSC
[18:55:17] [PASSED] Both, NTSC Default
[18:55:17] [PASSED] Both, PAL Default
[18:55:17] [PASSED] Both, NTSC Default, with PAL on command-line
[18:55:17] [PASSED] Both, PAL Default, with NTSC on command-line
[18:55:17] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[18:55:17] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[18:55:17] ================== drm_rect (9 subtests) ===================
[18:55:17] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[18:55:17] [PASSED] drm_test_rect_clip_scaled_not_clipped
[18:55:17] [PASSED] drm_test_rect_clip_scaled_clipped
[18:55:17] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[18:55:17] ================= drm_test_rect_intersect =================
[18:55:17] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[18:55:17] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[18:55:17] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[18:55:17] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[18:55:17] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[18:55:17] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[18:55:17] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[18:55:17] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[18:55:17] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[18:55:17] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[18:55:17] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[18:55:17] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[18:55:17] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[18:55:17] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[18:55:17] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[18:55:17] ============= [PASSED] drm_test_rect_intersect =============
[18:55:17] ================ drm_test_rect_calc_hscale ================
[18:55:17] [PASSED] normal use
[18:55:17] [PASSED] out of max range
[18:55:17] [PASSED] out of min range
[18:55:17] [PASSED] zero dst
[18:55:17] [PASSED] negative src
[18:55:17] [PASSED] negative dst
[18:55:17] ============ [PASSED] drm_test_rect_calc_hscale ============
[18:55:17] ================ drm_test_rect_calc_vscale ================
[18:55:17] [PASSED] normal use
[18:55:17] [PASSED] out of max range
[18:55:17] [PASSED] out of min range
[18:55:17] [PASSED] zero dst
[18:55:17] [PASSED] negative src
[18:55:17] [PASSED] negative dst
[18:55:17] ============ [PASSED] drm_test_rect_calc_vscale ============
[18:55:17] ================== drm_test_rect_rotate ===================
[18:55:17] [PASSED] reflect-x
[18:55:17] [PASSED] reflect-y
[18:55:17] [PASSED] rotate-0
[18:55:17] [PASSED] rotate-90
[18:55:17] [PASSED] rotate-180
[18:55:17] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[18:55:17] ============== [PASSED] drm_test_rect_rotate ===============
[18:55:17] ================ drm_test_rect_rotate_inv =================
[18:55:17] [PASSED] reflect-x
[18:55:17] [PASSED] reflect-y
[18:55:17] [PASSED] rotate-0
[18:55:17] [PASSED] rotate-90
[18:55:17] [PASSED] rotate-180
[18:55:17] [PASSED] rotate-270
[18:55:17] ============ [PASSED] drm_test_rect_rotate_inv =============
[18:55:17] ==================== [PASSED] drm_rect =====================
[18:55:17] ============ drm_sysfb_modeset_test (1 subtest) ============
[18:55:17] ============ drm_test_sysfb_build_fourcc_list =============
[18:55:17] [PASSED] no native formats
[18:55:17] [PASSED] XRGB8888 as native format
[18:55:17] [PASSED] remove duplicates
[18:55:17] [PASSED] convert alpha formats
[18:55:17] [PASSED] random formats
[18:55:17] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[18:55:17] ============= [PASSED] drm_sysfb_modeset_test ==============
[18:55:17] ============================================================
[18:55:17] Testing complete. Ran 616 tests: passed: 616
[18:55:17] Elapsed time: 24.686s total, 1.745s configuring, 22.771s building, 0.139s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[18:55:17] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:55:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:55:27] Starting KUnit Kernel (1/1)...
[18:55:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:55:27] ================= ttm_device (5 subtests) ==================
[18:55:27] [PASSED] ttm_device_init_basic
[18:55:27] [PASSED] ttm_device_init_multiple
[18:55:27] [PASSED] ttm_device_fini_basic
[18:55:27] [PASSED] ttm_device_init_no_vma_man
[18:55:27] ================== ttm_device_init_pools ==================
[18:55:27] [PASSED] No DMA allocations, no DMA32 required
[18:55:27] [PASSED] DMA allocations, DMA32 required
[18:55:27] [PASSED] No DMA allocations, DMA32 required
[18:55:27] [PASSED] DMA allocations, no DMA32 required
[18:55:27] ============== [PASSED] ttm_device_init_pools ==============
[18:55:27] =================== [PASSED] ttm_device ====================
[18:55:27] ================== ttm_pool (8 subtests) ===================
[18:55:27] ================== ttm_pool_alloc_basic ===================
[18:55:27] [PASSED] One page
[18:55:27] [PASSED] More than one page
[18:55:27] [PASSED] Above the allocation limit
[18:55:27] [PASSED] One page, with coherent DMA mappings enabled
[18:55:27] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:55:27] ============== [PASSED] ttm_pool_alloc_basic ===============
[18:55:27] ============== ttm_pool_alloc_basic_dma_addr ==============
[18:55:27] [PASSED] One page
[18:55:27] [PASSED] More than one page
[18:55:27] [PASSED] Above the allocation limit
[18:55:27] [PASSED] One page, with coherent DMA mappings enabled
[18:55:27] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:55:27] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[18:55:27] [PASSED] ttm_pool_alloc_order_caching_match
[18:55:27] [PASSED] ttm_pool_alloc_caching_mismatch
[18:55:27] [PASSED] ttm_pool_alloc_order_mismatch
[18:55:27] [PASSED] ttm_pool_free_dma_alloc
[18:55:27] [PASSED] ttm_pool_free_no_dma_alloc
[18:55:27] [PASSED] ttm_pool_fini_basic
[18:55:27] ==================== [PASSED] ttm_pool =====================
[18:55:27] ================ ttm_resource (8 subtests) =================
[18:55:27] ================= ttm_resource_init_basic =================
[18:55:27] [PASSED] Init resource in TTM_PL_SYSTEM
[18:55:27] [PASSED] Init resource in TTM_PL_VRAM
[18:55:27] [PASSED] Init resource in a private placement
[18:55:27] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[18:55:27] ============= [PASSED] ttm_resource_init_basic =============
[18:55:27] [PASSED] ttm_resource_init_pinned
[18:55:27] [PASSED] ttm_resource_fini_basic
[18:55:27] [PASSED] ttm_resource_manager_init_basic
[18:55:27] [PASSED] ttm_resource_manager_usage_basic
[18:55:27] [PASSED] ttm_resource_manager_set_used_basic
[18:55:27] [PASSED] ttm_sys_man_alloc_basic
[18:55:27] [PASSED] ttm_sys_man_free_basic
[18:55:27] ================== [PASSED] ttm_resource ===================
[18:55:27] =================== ttm_tt (15 subtests) ===================
[18:55:27] ==================== ttm_tt_init_basic ====================
[18:55:27] [PASSED] Page-aligned size
[18:55:27] [PASSED] Extra pages requested
[18:55:27] ================ [PASSED] ttm_tt_init_basic ================
[18:55:27] [PASSED] ttm_tt_init_misaligned
[18:55:27] [PASSED] ttm_tt_fini_basic
[18:55:27] [PASSED] ttm_tt_fini_sg
[18:55:27] [PASSED] ttm_tt_fini_shmem
[18:55:27] [PASSED] ttm_tt_create_basic
[18:55:27] [PASSED] ttm_tt_create_invalid_bo_type
[18:55:27] [PASSED] ttm_tt_create_ttm_exists
[18:55:27] [PASSED] ttm_tt_create_failed
[18:55:27] [PASSED] ttm_tt_destroy_basic
[18:55:27] [PASSED] ttm_tt_populate_null_ttm
[18:55:27] [PASSED] ttm_tt_populate_populated_ttm
[18:55:27] [PASSED] ttm_tt_unpopulate_basic
[18:55:27] [PASSED] ttm_tt_unpopulate_empty_ttm
[18:55:27] [PASSED] ttm_tt_swapin_basic
[18:55:27] ===================== [PASSED] ttm_tt ======================
[18:55:27] =================== ttm_bo (14 subtests) ===================
[18:55:27] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[18:55:27] [PASSED] Cannot be interrupted and sleeps
[18:55:27] [PASSED] Cannot be interrupted, locks straight away
[18:55:27] [PASSED] Can be interrupted, sleeps
[18:55:27] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[18:55:27] [PASSED] ttm_bo_reserve_locked_no_sleep
[18:55:27] [PASSED] ttm_bo_reserve_no_wait_ticket
[18:55:27] [PASSED] ttm_bo_reserve_double_resv
[18:55:27] [PASSED] ttm_bo_reserve_interrupted
[18:55:27] [PASSED] ttm_bo_reserve_deadlock
[18:55:27] [PASSED] ttm_bo_unreserve_basic
[18:55:27] [PASSED] ttm_bo_unreserve_pinned
[18:55:27] [PASSED] ttm_bo_unreserve_bulk
[18:55:27] [PASSED] ttm_bo_put_basic
[18:55:27] [PASSED] ttm_bo_put_shared_resv
[18:55:27] [PASSED] ttm_bo_pin_basic
[18:55:27] [PASSED] ttm_bo_pin_unpin_resource
[18:55:27] [PASSED] ttm_bo_multiple_pin_one_unpin
[18:55:27] ===================== [PASSED] ttm_bo ======================
[18:55:27] ============== ttm_bo_validate (21 subtests) ===============
[18:55:27] ============== ttm_bo_init_reserved_sys_man ===============
[18:55:27] [PASSED] Buffer object for userspace
[18:55:27] [PASSED] Kernel buffer object
[18:55:27] [PASSED] Shared buffer object
[18:55:27] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[18:55:27] ============== ttm_bo_init_reserved_mock_man ==============
[18:55:27] [PASSED] Buffer object for userspace
[18:55:27] [PASSED] Kernel buffer object
[18:55:27] [PASSED] Shared buffer object
[18:55:27] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[18:55:27] [PASSED] ttm_bo_init_reserved_resv
[18:55:27] ================== ttm_bo_validate_basic ==================
[18:55:27] [PASSED] Buffer object for userspace
[18:55:27] [PASSED] Kernel buffer object
[18:55:27] [PASSED] Shared buffer object
[18:55:27] ============== [PASSED] ttm_bo_validate_basic ==============
[18:55:27] [PASSED] ttm_bo_validate_invalid_placement
[18:55:27] ============= ttm_bo_validate_same_placement ==============
[18:55:27] [PASSED] System manager
[18:55:27] [PASSED] VRAM manager
[18:55:27] ========= [PASSED] ttm_bo_validate_same_placement ==========
[18:55:27] [PASSED] ttm_bo_validate_failed_alloc
[18:55:27] [PASSED] ttm_bo_validate_pinned
[18:55:27] [PASSED] ttm_bo_validate_busy_placement
[18:55:27] ================ ttm_bo_validate_multihop =================
[18:55:27] [PASSED] Buffer object for userspace
[18:55:27] [PASSED] Kernel buffer object
[18:55:27] [PASSED] Shared buffer object
[18:55:27] ============ [PASSED] ttm_bo_validate_multihop =============
[18:55:27] ========== ttm_bo_validate_no_placement_signaled ==========
[18:55:27] [PASSED] Buffer object in system domain, no page vector
[18:55:27] [PASSED] Buffer object in system domain with an existing page vector
[18:55:27] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[18:55:27] ======== ttm_bo_validate_no_placement_not_signaled ========
[18:55:27] [PASSED] Buffer object for userspace
[18:55:27] [PASSED] Kernel buffer object
[18:55:27] [PASSED] Shared buffer object
[18:55:27] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[18:55:27] [PASSED] ttm_bo_validate_move_fence_signaled
[18:55:27] ========= ttm_bo_validate_move_fence_not_signaled =========
[18:55:27] [PASSED] Waits for GPU
[18:55:27] [PASSED] Tries to lock straight away
[18:55:27] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[18:55:27] [PASSED] ttm_bo_validate_happy_evict
[18:55:27] [PASSED] ttm_bo_validate_all_pinned_evict
[18:55:27] [PASSED] ttm_bo_validate_allowed_only_evict
[18:55:27] [PASSED] ttm_bo_validate_deleted_evict
[18:55:27] [PASSED] ttm_bo_validate_busy_domain_evict
[18:55:27] [PASSED] ttm_bo_validate_evict_gutting
[18:55:27] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[18:55:27] ================= [PASSED] ttm_bo_validate =================
[18:55:27] ============================================================
[18:55:27] Testing complete. Ran 101 tests: passed: 101
[18:55:27] Elapsed time: 9.944s total, 1.744s configuring, 7.984s building, 0.185s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe/guc: Set RCS/CCS yield policy (rev2)
2025-09-05 23:56 [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy Daniele Ceraolo Spurio
2025-09-08 18:55 ` ✓ CI.KUnit: success for drm/xe/guc: Set RCS/CCS yield policy (rev2) Patchwork
@ 2025-09-08 19:37 ` Patchwork
2025-09-08 22:32 ` ✓ Xe.CI.Full: " Patchwork
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2025-09-08 19:37 UTC (permalink / raw)
To: Daniele Ceraolo Spurio; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2099 bytes --]
== Series Details ==
Series: drm/xe/guc: Set RCS/CCS yield policy (rev2)
URL : https://patchwork.freedesktop.org/series/150910/
State : success
== Summary ==
CI Bug Log - changes from xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b_BAT -> xe-pw-150910v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-150910v2_BAT that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
- bat-adlp-7: [DMESG-WARN][1] ([Intel XE#4543]) -> [PASS][2] +3 other tests pass
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
* igt@xe_vm@bind-execqueues-independent:
- {bat-ptl-vm}: [FAIL][3] ([Intel XE#5783]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/bat-ptl-vm/igt@xe_vm@bind-execqueues-independent.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/bat-ptl-vm/igt@xe_vm@bind-execqueues-independent.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#5783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5783
Build changes
-------------
* Linux: xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b -> xe-pw-150910v2
IGT_8524: 8524
xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b: 78cc74214b6f200319b53d36c4c0ce6974af8d5b
xe-pw-150910v2: 150910v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/index.html
[-- Attachment #2: Type: text/html, Size: 2708 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Xe.CI.Full: success for drm/xe/guc: Set RCS/CCS yield policy (rev2)
2025-09-05 23:56 [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy Daniele Ceraolo Spurio
2025-09-08 18:55 ` ✓ CI.KUnit: success for drm/xe/guc: Set RCS/CCS yield policy (rev2) Patchwork
2025-09-08 19:37 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-09-08 22:32 ` Patchwork
2025-09-09 1:53 ` [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy John Harrison
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2025-09-08 22:32 UTC (permalink / raw)
To: Daniele Ceraolo Spurio; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 55478 bytes --]
== Series Details ==
Series: drm/xe/guc: Set RCS/CCS yield policy (rev2)
URL : https://patchwork.freedesktop.org/series/150910/
State : success
== Summary ==
CI Bug Log - changes from xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b_FULL -> xe-pw-150910v2_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
New tests
---------
New tests have been introduced between xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b_FULL and xe-pw-150910v2_FULL:
### New IGT tests (3) ###
* igt@kms_cursor_crc@cursor-onscreen-256x85@pipe-d-hdmi-a-2:
- Statuses : 1 pass(s)
- Exec time: [2.26] s
* igt@kms_cursor_crc@cursor-sliding-128x128@pipe-d-hdmi-a-2:
- Statuses : 1 pass(s)
- Exec time: [3.70] s
* igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [1.51] s
Known issues
------------
Here are the changes found in xe-pw-150910v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1:
- shard-lnl: NOTRUN -> [FAIL][1] ([Intel XE#6084]) +3 other tests fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][2] ([Intel XE#2327]) +2 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][3] ([Intel XE#316])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#610])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#1124]) +7 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-3/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
- shard-dg2-set2: NOTRUN -> [SKIP][6] ([Intel XE#1124]) +9 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html
* igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2314] / [Intel XE#2894])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-1-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#367])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
- shard-dg2-set2: NOTRUN -> [SKIP][9] ([Intel XE#367]) +2 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2887]) +11 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][11] ([Intel XE#787]) +181 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#3432])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html
- shard-lnl: NOTRUN -> [SKIP][13] ([Intel XE#3432])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][14] ([Intel XE#2907]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][15] ([Intel XE#2887]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][16] ([Intel XE#455] / [Intel XE#787]) +36 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-432/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-dp-2.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#2724])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@plane-scaling@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][18] ([Intel XE#4416]) +3 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-dg2-set2: NOTRUN -> [SKIP][19] ([Intel XE#306])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_color@gamma:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2325])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_chamelium_color@gamma.html
* igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2252]) +5 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
* igt@kms_chamelium_frames@vga-frame-dump:
- shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#373])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_chamelium_frames@vga-frame-dump.html
* igt@kms_chamelium_hpd@hdmi-hpd:
- shard-dg2-set2: NOTRUN -> [SKIP][23] ([Intel XE#373]) +8 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@kms_chamelium_hpd@hdmi-hpd.html
* igt@kms_content_protection@atomic-dpms:
- shard-dg2-set2: NOTRUN -> [FAIL][24] ([Intel XE#1178]) +4 other tests fail
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][25] ([Intel XE#1178])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-4/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-dg2-set2: NOTRUN -> [SKIP][26] ([Intel XE#307])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@lic-type-1:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2341])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@kms_content_protection@lic-type-1.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#308]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2321]) +2 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_cursor_crc@cursor-random-512x512.html
- shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#2321])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_crc@cursor-rapid-movement-256x85:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#1424])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html
* igt@kms_cursor_crc@cursor-sliding-128x42:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#2320]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@kms_cursor_crc@cursor-sliding-128x42.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2291]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
- shard-bmg: [PASS][34] -> [SKIP][35] ([Intel XE#2291]) +2 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
- shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#309])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-dg2-set2: NOTRUN -> [SKIP][37] ([Intel XE#323])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#1508])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-3/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][39] ([Intel XE#4494] / [i915#3804])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#4331])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#2244]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#2244])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#4422])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-3/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
* igt@kms_feature_discovery@display-2x:
- shard-lnl: NOTRUN -> [SKIP][44] ([Intel XE#702])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_feature_discovery@display-2x.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-bmg: [PASS][45] -> [SKIP][46] ([Intel XE#2316]) +5 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-4/igt@kms_flip@2x-nonexisting-fb.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [PASS][47] -> [FAIL][48] ([Intel XE#301]) +1 other test fail
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1:
- shard-adlp: [PASS][49] -> [DMESG-WARN][50] ([Intel XE#2953] / [Intel XE#4173]) +6 other tests dmesg-warn
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-8/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-adlp-4/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html
* igt@kms_flip@plain-flip-interruptible@b-hdmi-a1:
- shard-adlp: [PASS][51] -> [DMESG-WARN][52] ([Intel XE#4543])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-9/igt@kms_flip@plain-flip-interruptible@b-hdmi-a1.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-adlp-1/igt@kms_flip@plain-flip-interruptible@b-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#2293] / [Intel XE#2380]) +3 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#2293]) +3 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
- shard-dg2-set2: NOTRUN -> [SKIP][55] ([Intel XE#455]) +13 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-1p-pri-indfb-multidraw:
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#651]) +2 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#2311]) +19 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
- shard-dg2-set2: NOTRUN -> [SKIP][58] ([Intel XE#651]) +29 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][59] ([Intel XE#5390]) +7 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#2312]) +3 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-plflip-blt:
- shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#656]) +6 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2313]) +17 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
- shard-dg2-set2: NOTRUN -> [SKIP][63] ([Intel XE#653]) +31 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#2352])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#346])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_joiner@invalid-modeset-big-joiner.html
- shard-dg2-set2: NOTRUN -> [SKIP][66] ([Intel XE#346])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@kms_joiner@invalid-modeset-big-joiner.html
- shard-lnl: NOTRUN -> [SKIP][67] ([Intel XE#346])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_pipe_stress@stress-xrgb8888-ytiled:
- shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#4329])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-dg2-set2: NOTRUN -> [SKIP][69] ([Intel XE#5021])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-dg2-set2: NOTRUN -> [SKIP][70] ([Intel XE#1122])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_dc@dc5-psr:
- shard-dg2-set2: NOTRUN -> [SKIP][71] ([Intel XE#1129])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-432/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@dc6-dpms:
- shard-adlp: [PASS][72] -> [FAIL][73] ([Intel XE#718])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-8/igt@kms_pm_dc@dc6-dpms.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-adlp-4/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_dc@deep-pkgc:
- shard-bmg: NOTRUN -> [SKIP][74] ([Intel XE#2505])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_pm_dc@deep-pkgc.html
- shard-dg2-set2: NOTRUN -> [SKIP][75] ([Intel XE#908])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@kms_pm_dc@deep-pkgc.html
- shard-lnl: NOTRUN -> [FAIL][76] ([Intel XE#2029])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_pm_dc@deep-pkgc.html
* igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
- shard-dg2-set2: NOTRUN -> [SKIP][77] ([Intel XE#1406] / [Intel XE#1489]) +6 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-432/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-plane-move-sf-dmg-area:
- shard-lnl: NOTRUN -> [SKIP][78] ([Intel XE#1406] / [Intel XE#2893])
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb:
- shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#1406] / [Intel XE#1489]) +6 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr2_su@page_flip-p010:
- shard-bmg: NOTRUN -> [SKIP][80] ([Intel XE#1406] / [Intel XE#2387])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_psr2_su@page_flip-p010.html
- shard-dg2-set2: NOTRUN -> [SKIP][81] ([Intel XE#1122] / [Intel XE#1406])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@kms_psr2_su@page_flip-p010.html
- shard-lnl: NOTRUN -> [SKIP][82] ([Intel XE#1128] / [Intel XE#1406])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@psr-sprite-plane-move:
- shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +6 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@kms_psr@psr-sprite-plane-move.html
* igt@kms_psr@psr2-basic:
- shard-dg2-set2: NOTRUN -> [SKIP][84] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +9 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_psr@psr2-basic.html
* igt@kms_psr@psr2-primary-render:
- shard-bmg: NOTRUN -> [SKIP][85] ([Intel XE#1406] / [Intel XE#2234])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_psr@psr2-primary-render.html
* igt@kms_rotation_crc@bad-tiling:
- shard-dg2-set2: NOTRUN -> [SKIP][86] ([Intel XE#3414])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@kms_rotation_crc@bad-tiling.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#3414] / [Intel XE#3904])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_setmode@clone-exclusive-crtc:
- shard-bmg: [PASS][88] -> [SKIP][89] ([Intel XE#1435])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-4/igt@kms_setmode@clone-exclusive-crtc.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_setmode@clone-exclusive-crtc.html
* igt@kms_vrr@seamless-rr-switch-drrs:
- shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#1499])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_vrr@seamless-rr-switch-drrs.html
- shard-lnl: NOTRUN -> [SKIP][91] ([Intel XE#1499])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@kms_vrr@seamless-rr-switch-drrs.html
* igt@xe_copy_basic@mem-copy-linear-0xfffe:
- shard-dg2-set2: NOTRUN -> [SKIP][92] ([Intel XE#1123]) +1 other test skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@xe_copy_basic@mem-copy-linear-0xfffe.html
* igt@xe_create@multigpu-create-massive-size:
- shard-bmg: NOTRUN -> [SKIP][93] ([Intel XE#2504])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@xe_create@multigpu-create-massive-size.html
* igt@xe_eu_stall@non-blocking-re-enable:
- shard-dg2-set2: NOTRUN -> [SKIP][94] ([Intel XE#5626]) +1 other test skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-432/igt@xe_eu_stall@non-blocking-re-enable.html
* igt@xe_eudebug@basic-close:
- shard-dg2-set2: NOTRUN -> [SKIP][95] ([Intel XE#4837]) +15 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@xe_eudebug@basic-close.html
* igt@xe_eudebug@discovery-race-vmbind:
- shard-bmg: NOTRUN -> [SKIP][96] ([Intel XE#4837]) +9 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@xe_eudebug@discovery-race-vmbind.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue:
- shard-dg2-set2: [PASS][97] -> [SKIP][98] ([Intel XE#1392]) +1 other test skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-466/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind:
- shard-dg2-set2: NOTRUN -> [SKIP][99] ([Intel XE#1392]) +1 other test skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind.html
* igt@xe_exec_basic@multigpu-no-exec-rebind:
- shard-bmg: NOTRUN -> [SKIP][100] ([Intel XE#2322]) +5 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@xe_exec_basic@multigpu-no-exec-rebind.html
- shard-lnl: NOTRUN -> [SKIP][101] ([Intel XE#1392]) +1 other test skip
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@xe_exec_basic@multigpu-no-exec-rebind.html
* igt@xe_exec_fault_mode@twice-invalid-fault:
- shard-dg2-set2: NOTRUN -> [SKIP][102] ([Intel XE#288]) +22 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@xe_exec_fault_mode@twice-invalid-fault.html
* igt@xe_exec_reset@parallel-gt-reset:
- shard-bmg: NOTRUN -> [DMESG-WARN][103] ([Intel XE#3876])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@xe_exec_reset@parallel-gt-reset.html
* igt@xe_exec_sip_eudebug@breakpoint-writesip:
- shard-lnl: NOTRUN -> [SKIP][104] ([Intel XE#4837]) +2 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@xe_exec_sip_eudebug@breakpoint-writesip.html
* igt@xe_exec_system_allocator@threads-many-mmap-new-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][105] ([Intel XE#4943]) +11 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@xe_exec_system_allocator@threads-many-mmap-new-huge-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc:
- shard-dg2-set2: NOTRUN -> [SKIP][106] ([Intel XE#4915]) +235 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-432/igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc.html
* igt@xe_exec_system_allocator@twice-large-mmap-free-huge-nomemset:
- shard-lnl: NOTRUN -> [SKIP][107] ([Intel XE#4943]) +1 other test skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@xe_exec_system_allocator@twice-large-mmap-free-huge-nomemset.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- shard-dg2-set2: NOTRUN -> [SKIP][108] ([Intel XE#2229])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-432/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
* igt@xe_media_fill@media-fill:
- shard-bmg: NOTRUN -> [SKIP][109] ([Intel XE#2459] / [Intel XE#2596])
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-8/igt@xe_media_fill@media-fill.html
* igt@xe_module_load@force-load:
- shard-dg2-set2: NOTRUN -> [SKIP][110] ([Intel XE#378])
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@xe_module_load@force-load.html
* igt@xe_oa@closed-fd-and-unmapped-access:
- shard-dg2-set2: NOTRUN -> [SKIP][111] ([Intel XE#3573]) +5 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-432/igt@xe_oa@closed-fd-and-unmapped-access.html
* igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p:
- shard-dg2-set2: NOTRUN -> [FAIL][112] ([Intel XE#1173]) +1 other test fail
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p.html
* igt@xe_pm@vram-d3cold-threshold:
- shard-bmg: NOTRUN -> [SKIP][113] ([Intel XE#579])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@xe_pm@vram-d3cold-threshold.html
* igt@xe_pmu@all-fn-engine-activity-load:
- shard-dg2-set2: NOTRUN -> [SKIP][114] ([Intel XE#4650]) +2 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@xe_pmu@all-fn-engine-activity-load.html
* igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][115] ([Intel XE#4733]) +2 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
* igt@xe_pxp@pxp-stale-queue-post-suspend:
- shard-bmg: NOTRUN -> [SKIP][116] ([Intel XE#4733]) +1 other test skip
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@xe_pxp@pxp-stale-queue-post-suspend.html
* igt@xe_query@multigpu-query-topology:
- shard-dg2-set2: NOTRUN -> [SKIP][117] ([Intel XE#944]) +3 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@xe_query@multigpu-query-topology.html
* igt@xe_query@multigpu-query-uc-fw-version-huc:
- shard-bmg: NOTRUN -> [SKIP][118] ([Intel XE#944])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@xe_query@multigpu-query-uc-fw-version-huc.html
* igt@xe_spin_batch@spin-mem-copy:
- shard-dg2-set2: NOTRUN -> [SKIP][119] ([Intel XE#4821])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@xe_spin_batch@spin-mem-copy.html
* igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs:
- shard-dg2-set2: NOTRUN -> [SKIP][120] ([Intel XE#4130])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html
#### Possible fixes ####
* igt@kms_async_flips@async-flip-suspend-resume@pipe-c-hdmi-a-1:
- shard-adlp: [DMESG-WARN][121] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][122] +5 other tests pass
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-3/igt@kms_async_flips@async-flip-suspend-resume@pipe-c-hdmi-a-1.html
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-adlp-9/igt@kms_async_flips@async-flip-suspend-resume@pipe-c-hdmi-a-1.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-adlp: [DMESG-FAIL][123] ([Intel XE#4543]) -> [PASS][124] +1 other test pass
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-4/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-adlp-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [INCOMPLETE][125] ([Intel XE#3862]) -> [PASS][126] +1 other test pass
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [INCOMPLETE][127] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [PASS][128]
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [DMESG-WARN][129] ([Intel XE#5354]) -> [PASS][130]
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-4/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-2/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [SKIP][131] ([Intel XE#2291]) -> [PASS][132] +1 other test pass
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [FAIL][133] ([Intel XE#4633]) -> [PASS][134]
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-bmg: [SKIP][135] ([Intel XE#1340]) -> [PASS][136]
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-4/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
- shard-bmg: [SKIP][137] ([Intel XE#2316]) -> [PASS][138] +6 other tests pass
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][139] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][140]
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-lnl: [FAIL][141] ([Intel XE#301]) -> [PASS][142]
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@plain-flip-interruptible@c-hdmi-a1:
- shard-adlp: [DMESG-WARN][143] ([Intel XE#4543]) -> [PASS][144]
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-9/igt@kms_flip@plain-flip-interruptible@c-hdmi-a1.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-adlp-1/igt@kms_flip@plain-flip-interruptible@c-hdmi-a1.html
* igt@kms_hdr@invalid-hdr:
- shard-dg2-set2: [SKIP][145] ([Intel XE#455]) -> [PASS][146]
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-435/igt@kms_hdr@invalid-hdr.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-463/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-bmg: [SKIP][147] ([Intel XE#1503]) -> [PASS][148]
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_hdr@invalid-metadata-sizes.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-1/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-bmg: [SKIP][149] ([Intel XE#4596]) -> [PASS][150]
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-4.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-bmg: [SKIP][151] ([Intel XE#1435]) -> [PASS][152]
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-1/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@xe_exec_basic@multigpu-once-basic-defer-bind:
- shard-dg2-set2: [INCOMPLETE][153] ([Intel XE#4842]) -> [PASS][154] +1 other test pass
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-433/igt@xe_exec_basic@multigpu-once-basic-defer-bind.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@xe_exec_basic@multigpu-once-basic-defer-bind.html
* igt@xe_exec_basic@multigpu-once-null-defer-bind:
- shard-dg2-set2: [SKIP][155] ([Intel XE#1392]) -> [PASS][156] +6 other tests pass
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-432/igt@xe_exec_basic@multigpu-once-null-defer-bind.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@xe_exec_basic@multigpu-once-null-defer-bind.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init:
- shard-dg2-set2: [DMESG-WARN][157] -> [PASS][158]
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-433/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
- shard-dg2-set2: [DMESG-WARN][159] ([Intel XE#5893]) -> [PASS][160]
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-436/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-436/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
* igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind:
- shard-dg2-set2: [ABORT][161] ([Intel XE#4847] / [Intel XE#5732]) -> [PASS][162]
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-436/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-434/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html
* igt@xe_pm@s2idle-basic-exec:
- shard-lnl: [ABORT][163] ([Intel XE#4847]) -> [PASS][164]
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-4/igt@xe_pm@s2idle-basic-exec.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-lnl-8/igt@xe_pm@s2idle-basic-exec.html
#### Warnings ####
* igt@kms_content_protection@atomic-dpms:
- shard-bmg: [SKIP][165] ([Intel XE#2341]) -> [FAIL][166] ([Intel XE#1178])
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_content_protection@atomic-dpms.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-4/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@legacy:
- shard-bmg: [FAIL][167] ([Intel XE#1178]) -> [SKIP][168] ([Intel XE#2341])
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-4/igt@kms_content_protection@legacy.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_content_protection@legacy.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][169] ([Intel XE#2312]) -> [SKIP][170] ([Intel XE#2311]) +13 other tests skip
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][171] ([Intel XE#2311]) -> [SKIP][172] ([Intel XE#2312]) +8 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][173] ([Intel XE#5390]) -> [SKIP][174] ([Intel XE#2312]) +1 other test skip
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][175] ([Intel XE#2312]) -> [SKIP][176] ([Intel XE#5390]) +6 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][177] ([Intel XE#2313]) -> [SKIP][178] ([Intel XE#2312]) +8 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][179] ([Intel XE#2312]) -> [SKIP][180] ([Intel XE#2313]) +16 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-bmg: [SKIP][181] ([Intel XE#4596]) -> [SKIP][182] ([Intel XE#5021])
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-y.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-dg2-set2: [SKIP][183] ([Intel XE#362]) -> [SKIP][184] ([Intel XE#1500])
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-dg2-435/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
- shard-bmg: [ABORT][185] ([Intel XE#5466] / [Intel XE#5530]) -> [ABORT][186] ([Intel XE#4917] / [Intel XE#5466] / [Intel XE#5530])
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-3/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/shard-bmg-4/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
[Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
[Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
[Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
[Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
[Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4416
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4494]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4494
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4821
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4842]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4842
[Intel XE#4847]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4847
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
[Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
[Intel XE#5530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5530
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#5732]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5732
[Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
[Intel XE#5890]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5890
[Intel XE#5893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5893
[Intel XE#6084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6084
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#702]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/702
[Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/908
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
Build changes
-------------
* Linux: xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b -> xe-pw-150910v2
IGT_8524: 8524
xe-3700-78cc74214b6f200319b53d36c4c0ce6974af8d5b: 78cc74214b6f200319b53d36c4c0ce6974af8d5b
xe-pw-150910v2: 150910v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150910v2/index.html
[-- Attachment #2: Type: text/html, Size: 63569 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy
2025-09-05 23:56 [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy Daniele Ceraolo Spurio
` (2 preceding siblings ...)
2025-09-08 22:32 ` ✓ Xe.CI.Full: " Patchwork
@ 2025-09-09 1:53 ` John Harrison
2025-09-09 15:27 ` Belgaumkar, Vinay
2025-09-15 13:59 ` Rodrigo Vivi
5 siblings, 0 replies; 7+ messages in thread
From: John Harrison @ 2025-09-09 1:53 UTC (permalink / raw)
To: Daniele Ceraolo Spurio, intel-xe; +Cc: Matthew Brost, Vinay Belgaumkar
On 9/5/2025 4:56 PM, Daniele Ceraolo Spurio wrote:
> All recent platforms (including all the ones officially supported by the
> Xe driver) do not allow concurrent execution of RCS and CCS workloads
> from different address spaces, with the HW blocking the context switch
> when it detects such a scenario.
> The DUAL_QUEUE flag helps with this, by causing the GuC to not submit a
> context it knows will not be able to execute. This, however, causes a new
> problem: if RCS and CCS queues have pending workloads from different
> address spaces, the GuC needs to choose from which of the 2 queues to
> pick the next workload to execute. By default, the GuC prioritizes RCS
> submissions over CCS ones, which can lead to CCS workloads being
> significantly (or completely) starved of execution time.
> The driver can tune this by setting a dedicated scheduling policy KLV;
> this KLV allows the driver to specify a quantum (in ms) and a ratio
> (percentage value between 0 and 100), and the GuC will prioritize the CCS
> for that percentage of each quantum.
> Given that we want to guarantee enough RCS throughput to avoid missing
> frames, we set the yield policy to 20% of each 80ms interval.
>
> v2: updated quantum and ratio, improved comment, use xe_guc_submit_disable
> in gt_sanitize
>
> Fixes: d9a1ae0d17bd ("drm/xe/guc: Enable WA_DUAL_QUEUE for newer platforms")
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/xe/abi/guc_actions_abi.h | 1 +
> drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 25 +++++++++
> drivers/gpu/drm/xe/xe_gt.c | 2 +-
> drivers/gpu/drm/xe/xe_guc.c | 6 +--
> drivers/gpu/drm/xe/xe_guc_submit.c | 66 ++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_guc_submit.h | 2 +
> 6 files changed, 97 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> index d8cf68a0516d..1baa969aaa7c 100644
> --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> @@ -117,6 +117,7 @@ enum xe_guc_action {
> XE_GUC_ACTION_ENTER_S_STATE = 0x501,
> XE_GUC_ACTION_EXIT_S_STATE = 0x502,
> XE_GUC_ACTION_GLOBAL_SCHED_POLICY_CHANGE = 0x506,
> + XE_GUC_ACTION_UPDATE_SCHEDULING_POLICIES_KLV = 0x509,
> XE_GUC_ACTION_SCHED_CONTEXT = 0x1000,
> XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET = 0x1001,
> XE_GUC_ACTION_SCHED_CONTEXT_MODE_DONE = 0x1002,
> diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> index 0e78351c6ef5..265a135e7061 100644
> --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> @@ -17,6 +17,7 @@
> * | 0 | 31:16 | **KEY** - KLV key identifier |
> * | | | - `GuC Self Config KLVs`_ |
> * | | | - `GuC Opt In Feature KLVs`_ |
> + * | | | - `GuC Scheduling Policies KLVs`_ |
> * | | | - `GuC VGT Policy KLVs`_ |
> * | | | - `GuC VF Configuration KLVs`_ |
> * | | | |
> @@ -152,6 +153,30 @@ enum {
> #define GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH_KEY 0x4003
> #define GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH_LEN 0u
>
> +/**
> + * DOC: GuC Scheduling Policies KLVs
> + *
> + * `GuC KLV`_ keys available for use with UPDATE_SCHEDULING_POLICIES_KLV.
> + *
> + * _`GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD` : 0x1001
> + * Some platforms do not allow concurrent execution of RCS and CCS
> + * workloads from different address spaces. By default, the GuC prioritizes
> + * RCS submissions over CCS ones, which can lead to CCS workloads being
> + * significantly (or completely) starved of execution time. This KLV allows
> + * the driver to specify a quantum (in ms) and a ratio (percentage value
> + * between 0 and 100), and the GuC will prioritize the CCS for that
> + * percentage of each quantum. For example, specifying 100ms and 30% will
> + * make the GuC prioritize the CCS for 30ms of every 100ms.
> + * Note that this does not necessarly mean that RCS and CCS engines will
> + * only be active for their percentage of the quantum, as the restriction
> + * only kicks in if both classes are fully busy with non-compatible address
> + * spaces; i.e., if one engine is idle or running the same address space,
> + * a pending job on the other engine will still be submitted to the HW no
> + * matter what the ratio is
> + */
> +#define GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD_KEY 0x1001
> +#define GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD_LEN 2u
> +
> /**
> * DOC: GuC VGT Policy KLVs
> *
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 34505a6d93ed..3e0ad7e5b5df 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -98,7 +98,7 @@ void xe_gt_sanitize(struct xe_gt *gt)
> * FIXME: if xe_uc_sanitize is called here, on TGL driver will not
> * reload
> */
> - gt->uc.guc.submission_state.enabled = false;
> + xe_guc_submit_disable(>->uc.guc);
> }
>
> static void xe_gt_enable_host_l2_vram(struct xe_gt *gt)
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index b3a6408a5760..ab1cc11a208c 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -888,9 +888,7 @@ int xe_guc_post_load_init(struct xe_guc *guc)
> return ret;
> }
>
> - guc->submission_state.enabled = true;
> -
> - return 0;
> + return xe_guc_submit_enable(guc);
> }
>
> int xe_guc_reset(struct xe_guc *guc)
> @@ -1602,7 +1600,7 @@ void xe_guc_sanitize(struct xe_guc *guc)
> {
> xe_uc_fw_sanitize(&guc->fw);
> xe_guc_ct_disable(&guc->ct);
> - guc->submission_state.enabled = false;
> + xe_guc_submit_disable(guc);
> }
>
> int xe_guc_reset_prepare(struct xe_guc *guc)
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index bfc061da8f93..e377ba3a39b3 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -32,6 +32,7 @@
> #include "xe_guc_ct.h"
> #include "xe_guc_exec_queue_types.h"
> #include "xe_guc_id_mgr.h"
> +#include "xe_guc_klv_helpers.h"
> #include "xe_guc_submit_types.h"
> #include "xe_hw_engine.h"
> #include "xe_hw_fence.h"
> @@ -316,6 +317,71 @@ int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids)
> return drmm_add_action_or_reset(&xe->drm, guc_submit_fini, guc);
> }
>
> +/*
> + * Given that we want to guarantee enough RCS throughput to avoid missing
> + * frames, we set the yield policy to 20% of each 80ms interval.
> + */
> +#define RC_YIELD_DURATION 80 /* in ms */
> +#define RC_YIELD_RATIO 20 /* in percent */
> +static u32 *emit_render_compute_yield_klv(u32 *emit)
> +{
> + *emit++ = PREP_GUC_KLV_TAG(SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD);
> + *emit++ = RC_YIELD_DURATION;
> + *emit++ = RC_YIELD_RATIO;
> +
> + return emit;
> +}
> +
> +#define SCHEDULING_POLICY_MAX_DWORDS 16
> +static int guc_init_global_schedule_policy(struct xe_guc *guc)
> +{
> + u32 data[SCHEDULING_POLICY_MAX_DWORDS];
> + u32 *emit = data;
> + u32 count = 0;
> + int ret;
> +
> + if (GUC_SUBMIT_VER(guc) < MAKE_GUC_VER(1, 1, 0))
> + return 0;
> +
> + *emit++ = XE_GUC_ACTION_UPDATE_SCHEDULING_POLICIES_KLV;
> +
> + if (CCS_MASK(guc_to_gt(guc)))
> + emit = emit_render_compute_yield_klv(emit);
> +
> + count = emit - data;
> + if (count > 1) {
> + xe_assert(guc_to_xe(guc), count <= SCHEDULING_POLICY_MAX_DWORDS);
> +
> + ret = xe_guc_ct_send_block(&guc->ct, data, count);
> + if (ret < 0) {
> + xe_gt_err(guc_to_gt(guc),
> + "failed to enable GuC sheduling policies: %pe\n",
> + ERR_PTR(ret));
> + return ret;
> + }
> + }
> +
> + return 0;
> +}
> +
> +int xe_guc_submit_enable(struct xe_guc *guc)
> +{
> + int ret;
> +
> + ret = guc_init_global_schedule_policy(guc);
> + if (ret)
> + return ret;
> +
> + guc->submission_state.enabled = true;
> +
> + return 0;
> +}
> +
> +void xe_guc_submit_disable(struct xe_guc *guc)
> +{
> + guc->submission_state.enabled = false;
> +}
> +
> static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa_count)
> {
> int i;
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
> index 6b5df5d0956b..e20ccafdfab5 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.h
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.h
> @@ -13,6 +13,8 @@ struct xe_exec_queue;
> struct xe_guc;
>
> int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids);
> +int xe_guc_submit_enable(struct xe_guc *guc);
> +void xe_guc_submit_disable(struct xe_guc *guc);
>
> int xe_guc_submit_reset_prepare(struct xe_guc *guc);
> void xe_guc_submit_reset_wait(struct xe_guc *guc);
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy
2025-09-05 23:56 [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy Daniele Ceraolo Spurio
` (3 preceding siblings ...)
2025-09-09 1:53 ` [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy John Harrison
@ 2025-09-09 15:27 ` Belgaumkar, Vinay
2025-09-15 13:59 ` Rodrigo Vivi
5 siblings, 0 replies; 7+ messages in thread
From: Belgaumkar, Vinay @ 2025-09-09 15:27 UTC (permalink / raw)
To: Daniele Ceraolo Spurio, intel-xe; +Cc: Matthew Brost, John Harrison
On 9/5/2025 4:56 PM, Daniele Ceraolo Spurio wrote:
> All recent platforms (including all the ones officially supported by the
> Xe driver) do not allow concurrent execution of RCS and CCS workloads
> from different address spaces, with the HW blocking the context switch
> when it detects such a scenario.
> The DUAL_QUEUE flag helps with this, by causing the GuC to not submit a
> context it knows will not be able to execute. This, however, causes a new
> problem: if RCS and CCS queues have pending workloads from different
> address spaces, the GuC needs to choose from which of the 2 queues to
> pick the next workload to execute. By default, the GuC prioritizes RCS
> submissions over CCS ones, which can lead to CCS workloads being
> significantly (or completely) starved of execution time.
> The driver can tune this by setting a dedicated scheduling policy KLV;
> this KLV allows the driver to specify a quantum (in ms) and a ratio
> (percentage value between 0 and 100), and the GuC will prioritize the CCS
> for that percentage of each quantum.
> Given that we want to guarantee enough RCS throughput to avoid missing
> frames, we set the yield policy to 20% of each 80ms interval.
>
> v2: updated quantum and ratio, improved comment, use xe_guc_submit_disable
> in gt_sanitize
>
> Fixes: d9a1ae0d17bd ("drm/xe/guc: Enable WA_DUAL_QUEUE for newer platforms")
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Tested-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
> drivers/gpu/drm/xe/abi/guc_actions_abi.h | 1 +
> drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 25 +++++++++
> drivers/gpu/drm/xe/xe_gt.c | 2 +-
> drivers/gpu/drm/xe/xe_guc.c | 6 +--
> drivers/gpu/drm/xe/xe_guc_submit.c | 66 ++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_guc_submit.h | 2 +
> 6 files changed, 97 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> index d8cf68a0516d..1baa969aaa7c 100644
> --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> @@ -117,6 +117,7 @@ enum xe_guc_action {
> XE_GUC_ACTION_ENTER_S_STATE = 0x501,
> XE_GUC_ACTION_EXIT_S_STATE = 0x502,
> XE_GUC_ACTION_GLOBAL_SCHED_POLICY_CHANGE = 0x506,
> + XE_GUC_ACTION_UPDATE_SCHEDULING_POLICIES_KLV = 0x509,
> XE_GUC_ACTION_SCHED_CONTEXT = 0x1000,
> XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET = 0x1001,
> XE_GUC_ACTION_SCHED_CONTEXT_MODE_DONE = 0x1002,
> diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> index 0e78351c6ef5..265a135e7061 100644
> --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> @@ -17,6 +17,7 @@
> * | 0 | 31:16 | **KEY** - KLV key identifier |
> * | | | - `GuC Self Config KLVs`_ |
> * | | | - `GuC Opt In Feature KLVs`_ |
> + * | | | - `GuC Scheduling Policies KLVs`_ |
> * | | | - `GuC VGT Policy KLVs`_ |
> * | | | - `GuC VF Configuration KLVs`_ |
> * | | | |
> @@ -152,6 +153,30 @@ enum {
> #define GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH_KEY 0x4003
> #define GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH_LEN 0u
>
> +/**
> + * DOC: GuC Scheduling Policies KLVs
> + *
> + * `GuC KLV`_ keys available for use with UPDATE_SCHEDULING_POLICIES_KLV.
> + *
> + * _`GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD` : 0x1001
> + * Some platforms do not allow concurrent execution of RCS and CCS
> + * workloads from different address spaces. By default, the GuC prioritizes
> + * RCS submissions over CCS ones, which can lead to CCS workloads being
> + * significantly (or completely) starved of execution time. This KLV allows
> + * the driver to specify a quantum (in ms) and a ratio (percentage value
> + * between 0 and 100), and the GuC will prioritize the CCS for that
> + * percentage of each quantum. For example, specifying 100ms and 30% will
> + * make the GuC prioritize the CCS for 30ms of every 100ms.
> + * Note that this does not necessarly mean that RCS and CCS engines will
> + * only be active for their percentage of the quantum, as the restriction
> + * only kicks in if both classes are fully busy with non-compatible address
> + * spaces; i.e., if one engine is idle or running the same address space,
> + * a pending job on the other engine will still be submitted to the HW no
> + * matter what the ratio is
> + */
> +#define GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD_KEY 0x1001
> +#define GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD_LEN 2u
> +
> /**
> * DOC: GuC VGT Policy KLVs
> *
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 34505a6d93ed..3e0ad7e5b5df 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -98,7 +98,7 @@ void xe_gt_sanitize(struct xe_gt *gt)
> * FIXME: if xe_uc_sanitize is called here, on TGL driver will not
> * reload
> */
> - gt->uc.guc.submission_state.enabled = false;
> + xe_guc_submit_disable(>->uc.guc);
> }
>
> static void xe_gt_enable_host_l2_vram(struct xe_gt *gt)
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index b3a6408a5760..ab1cc11a208c 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -888,9 +888,7 @@ int xe_guc_post_load_init(struct xe_guc *guc)
> return ret;
> }
>
> - guc->submission_state.enabled = true;
> -
> - return 0;
> + return xe_guc_submit_enable(guc);
> }
>
> int xe_guc_reset(struct xe_guc *guc)
> @@ -1602,7 +1600,7 @@ void xe_guc_sanitize(struct xe_guc *guc)
> {
> xe_uc_fw_sanitize(&guc->fw);
> xe_guc_ct_disable(&guc->ct);
> - guc->submission_state.enabled = false;
> + xe_guc_submit_disable(guc);
> }
>
> int xe_guc_reset_prepare(struct xe_guc *guc)
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index bfc061da8f93..e377ba3a39b3 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -32,6 +32,7 @@
> #include "xe_guc_ct.h"
> #include "xe_guc_exec_queue_types.h"
> #include "xe_guc_id_mgr.h"
> +#include "xe_guc_klv_helpers.h"
> #include "xe_guc_submit_types.h"
> #include "xe_hw_engine.h"
> #include "xe_hw_fence.h"
> @@ -316,6 +317,71 @@ int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids)
> return drmm_add_action_or_reset(&xe->drm, guc_submit_fini, guc);
> }
>
> +/*
> + * Given that we want to guarantee enough RCS throughput to avoid missing
> + * frames, we set the yield policy to 20% of each 80ms interval.
> + */
> +#define RC_YIELD_DURATION 80 /* in ms */
> +#define RC_YIELD_RATIO 20 /* in percent */
> +static u32 *emit_render_compute_yield_klv(u32 *emit)
> +{
> + *emit++ = PREP_GUC_KLV_TAG(SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD);
> + *emit++ = RC_YIELD_DURATION;
> + *emit++ = RC_YIELD_RATIO;
> +
> + return emit;
> +}
> +
> +#define SCHEDULING_POLICY_MAX_DWORDS 16
> +static int guc_init_global_schedule_policy(struct xe_guc *guc)
> +{
> + u32 data[SCHEDULING_POLICY_MAX_DWORDS];
> + u32 *emit = data;
> + u32 count = 0;
> + int ret;
> +
> + if (GUC_SUBMIT_VER(guc) < MAKE_GUC_VER(1, 1, 0))
> + return 0;
> +
> + *emit++ = XE_GUC_ACTION_UPDATE_SCHEDULING_POLICIES_KLV;
> +
> + if (CCS_MASK(guc_to_gt(guc)))
> + emit = emit_render_compute_yield_klv(emit);
> +
> + count = emit - data;
> + if (count > 1) {
> + xe_assert(guc_to_xe(guc), count <= SCHEDULING_POLICY_MAX_DWORDS);
> +
> + ret = xe_guc_ct_send_block(&guc->ct, data, count);
> + if (ret < 0) {
> + xe_gt_err(guc_to_gt(guc),
> + "failed to enable GuC sheduling policies: %pe\n",
> + ERR_PTR(ret));
> + return ret;
> + }
> + }
> +
> + return 0;
> +}
> +
> +int xe_guc_submit_enable(struct xe_guc *guc)
> +{
> + int ret;
> +
> + ret = guc_init_global_schedule_policy(guc);
> + if (ret)
> + return ret;
> +
> + guc->submission_state.enabled = true;
> +
> + return 0;
> +}
> +
> +void xe_guc_submit_disable(struct xe_guc *guc)
> +{
> + guc->submission_state.enabled = false;
> +}
> +
> static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa_count)
> {
> int i;
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
> index 6b5df5d0956b..e20ccafdfab5 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.h
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.h
> @@ -13,6 +13,8 @@ struct xe_exec_queue;
> struct xe_guc;
>
> int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids);
> +int xe_guc_submit_enable(struct xe_guc *guc);
> +void xe_guc_submit_disable(struct xe_guc *guc);
>
> int xe_guc_submit_reset_prepare(struct xe_guc *guc);
> void xe_guc_submit_reset_wait(struct xe_guc *guc);
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy
2025-09-05 23:56 [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy Daniele Ceraolo Spurio
` (4 preceding siblings ...)
2025-09-09 15:27 ` Belgaumkar, Vinay
@ 2025-09-15 13:59 ` Rodrigo Vivi
5 siblings, 0 replies; 7+ messages in thread
From: Rodrigo Vivi @ 2025-09-15 13:59 UTC (permalink / raw)
To: Daniele Ceraolo Spurio
Cc: intel-xe, Matthew Brost, John Harrison, Vinay Belgaumkar
On Fri, Sep 05, 2025 at 04:56:33PM -0700, Daniele Ceraolo Spurio wrote:
> All recent platforms (including all the ones officially supported by the
> Xe driver) do not allow concurrent execution of RCS and CCS workloads
> from different address spaces, with the HW blocking the context switch
> when it detects such a scenario.
> The DUAL_QUEUE flag helps with this, by causing the GuC to not submit a
> context it knows will not be able to execute. This, however, causes a new
> problem: if RCS and CCS queues have pending workloads from different
> address spaces, the GuC needs to choose from which of the 2 queues to
> pick the next workload to execute. By default, the GuC prioritizes RCS
> submissions over CCS ones, which can lead to CCS workloads being
> significantly (or completely) starved of execution time.
> The driver can tune this by setting a dedicated scheduling policy KLV;
> this KLV allows the driver to specify a quantum (in ms) and a ratio
> (percentage value between 0 and 100), and the GuC will prioritize the CCS
> for that percentage of each quantum.
> Given that we want to guarantee enough RCS throughput to avoid missing
> frames, we set the yield policy to 20% of each 80ms interval.
>
> v2: updated quantum and ratio, improved comment, use xe_guc_submit_disable
> in gt_sanitize
>
> Fixes: d9a1ae0d17bd ("drm/xe/guc: Enable WA_DUAL_QUEUE for newer platforms")
This patch doesn't backport cleanly to drm-xe-fixes since
xe_guc_submit_disable() doesn't exist there.
If really needed, please provide a backported version.
Thanks,
Rodrigo.
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
> drivers/gpu/drm/xe/abi/guc_actions_abi.h | 1 +
> drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 25 +++++++++
> drivers/gpu/drm/xe/xe_gt.c | 2 +-
> drivers/gpu/drm/xe/xe_guc.c | 6 +--
> drivers/gpu/drm/xe/xe_guc_submit.c | 66 ++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_guc_submit.h | 2 +
> 6 files changed, 97 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> index d8cf68a0516d..1baa969aaa7c 100644
> --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> @@ -117,6 +117,7 @@ enum xe_guc_action {
> XE_GUC_ACTION_ENTER_S_STATE = 0x501,
> XE_GUC_ACTION_EXIT_S_STATE = 0x502,
> XE_GUC_ACTION_GLOBAL_SCHED_POLICY_CHANGE = 0x506,
> + XE_GUC_ACTION_UPDATE_SCHEDULING_POLICIES_KLV = 0x509,
> XE_GUC_ACTION_SCHED_CONTEXT = 0x1000,
> XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET = 0x1001,
> XE_GUC_ACTION_SCHED_CONTEXT_MODE_DONE = 0x1002,
> diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> index 0e78351c6ef5..265a135e7061 100644
> --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> @@ -17,6 +17,7 @@
> * | 0 | 31:16 | **KEY** - KLV key identifier |
> * | | | - `GuC Self Config KLVs`_ |
> * | | | - `GuC Opt In Feature KLVs`_ |
> + * | | | - `GuC Scheduling Policies KLVs`_ |
> * | | | - `GuC VGT Policy KLVs`_ |
> * | | | - `GuC VF Configuration KLVs`_ |
> * | | | |
> @@ -152,6 +153,30 @@ enum {
> #define GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH_KEY 0x4003
> #define GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH_LEN 0u
>
> +/**
> + * DOC: GuC Scheduling Policies KLVs
> + *
> + * `GuC KLV`_ keys available for use with UPDATE_SCHEDULING_POLICIES_KLV.
> + *
> + * _`GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD` : 0x1001
> + * Some platforms do not allow concurrent execution of RCS and CCS
> + * workloads from different address spaces. By default, the GuC prioritizes
> + * RCS submissions over CCS ones, which can lead to CCS workloads being
> + * significantly (or completely) starved of execution time. This KLV allows
> + * the driver to specify a quantum (in ms) and a ratio (percentage value
> + * between 0 and 100), and the GuC will prioritize the CCS for that
> + * percentage of each quantum. For example, specifying 100ms and 30% will
> + * make the GuC prioritize the CCS for 30ms of every 100ms.
> + * Note that this does not necessarly mean that RCS and CCS engines will
> + * only be active for their percentage of the quantum, as the restriction
> + * only kicks in if both classes are fully busy with non-compatible address
> + * spaces; i.e., if one engine is idle or running the same address space,
> + * a pending job on the other engine will still be submitted to the HW no
> + * matter what the ratio is
> + */
> +#define GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD_KEY 0x1001
> +#define GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD_LEN 2u
> +
> /**
> * DOC: GuC VGT Policy KLVs
> *
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 34505a6d93ed..3e0ad7e5b5df 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -98,7 +98,7 @@ void xe_gt_sanitize(struct xe_gt *gt)
> * FIXME: if xe_uc_sanitize is called here, on TGL driver will not
> * reload
> */
> - gt->uc.guc.submission_state.enabled = false;
> + xe_guc_submit_disable(>->uc.guc);
> }
>
> static void xe_gt_enable_host_l2_vram(struct xe_gt *gt)
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index b3a6408a5760..ab1cc11a208c 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -888,9 +888,7 @@ int xe_guc_post_load_init(struct xe_guc *guc)
> return ret;
> }
>
> - guc->submission_state.enabled = true;
> -
> - return 0;
> + return xe_guc_submit_enable(guc);
> }
>
> int xe_guc_reset(struct xe_guc *guc)
> @@ -1602,7 +1600,7 @@ void xe_guc_sanitize(struct xe_guc *guc)
> {
> xe_uc_fw_sanitize(&guc->fw);
> xe_guc_ct_disable(&guc->ct);
> - guc->submission_state.enabled = false;
> + xe_guc_submit_disable(guc);
> }
>
> int xe_guc_reset_prepare(struct xe_guc *guc)
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index bfc061da8f93..e377ba3a39b3 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -32,6 +32,7 @@
> #include "xe_guc_ct.h"
> #include "xe_guc_exec_queue_types.h"
> #include "xe_guc_id_mgr.h"
> +#include "xe_guc_klv_helpers.h"
> #include "xe_guc_submit_types.h"
> #include "xe_hw_engine.h"
> #include "xe_hw_fence.h"
> @@ -316,6 +317,71 @@ int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids)
> return drmm_add_action_or_reset(&xe->drm, guc_submit_fini, guc);
> }
>
> +/*
> + * Given that we want to guarantee enough RCS throughput to avoid missing
> + * frames, we set the yield policy to 20% of each 80ms interval.
> + */
> +#define RC_YIELD_DURATION 80 /* in ms */
> +#define RC_YIELD_RATIO 20 /* in percent */
> +static u32 *emit_render_compute_yield_klv(u32 *emit)
> +{
> + *emit++ = PREP_GUC_KLV_TAG(SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD);
> + *emit++ = RC_YIELD_DURATION;
> + *emit++ = RC_YIELD_RATIO;
> +
> + return emit;
> +}
> +
> +#define SCHEDULING_POLICY_MAX_DWORDS 16
> +static int guc_init_global_schedule_policy(struct xe_guc *guc)
> +{
> + u32 data[SCHEDULING_POLICY_MAX_DWORDS];
> + u32 *emit = data;
> + u32 count = 0;
> + int ret;
> +
> + if (GUC_SUBMIT_VER(guc) < MAKE_GUC_VER(1, 1, 0))
> + return 0;
> +
> + *emit++ = XE_GUC_ACTION_UPDATE_SCHEDULING_POLICIES_KLV;
> +
> + if (CCS_MASK(guc_to_gt(guc)))
> + emit = emit_render_compute_yield_klv(emit);
> +
> + count = emit - data;
> + if (count > 1) {
> + xe_assert(guc_to_xe(guc), count <= SCHEDULING_POLICY_MAX_DWORDS);
> +
> + ret = xe_guc_ct_send_block(&guc->ct, data, count);
> + if (ret < 0) {
> + xe_gt_err(guc_to_gt(guc),
> + "failed to enable GuC sheduling policies: %pe\n",
> + ERR_PTR(ret));
> + return ret;
> + }
> + }
> +
> + return 0;
> +}
> +
> +int xe_guc_submit_enable(struct xe_guc *guc)
> +{
> + int ret;
> +
> + ret = guc_init_global_schedule_policy(guc);
> + if (ret)
> + return ret;
> +
> + guc->submission_state.enabled = true;
> +
> + return 0;
> +}
> +
> +void xe_guc_submit_disable(struct xe_guc *guc)
> +{
> + guc->submission_state.enabled = false;
> +}
> +
> static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa_count)
> {
> int i;
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
> index 6b5df5d0956b..e20ccafdfab5 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.h
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.h
> @@ -13,6 +13,8 @@ struct xe_exec_queue;
> struct xe_guc;
>
> int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids);
> +int xe_guc_submit_enable(struct xe_guc *guc);
> +void xe_guc_submit_disable(struct xe_guc *guc);
>
> int xe_guc_submit_reset_prepare(struct xe_guc *guc);
> void xe_guc_submit_reset_wait(struct xe_guc *guc);
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2025-09-15 13:59 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-09-05 23:56 [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy Daniele Ceraolo Spurio
2025-09-08 18:55 ` ✓ CI.KUnit: success for drm/xe/guc: Set RCS/CCS yield policy (rev2) Patchwork
2025-09-08 19:37 ` ✓ Xe.CI.BAT: " Patchwork
2025-09-08 22:32 ` ✓ Xe.CI.Full: " Patchwork
2025-09-09 1:53 ` [PATCH v2] drm/xe/guc: Set RCS/CCS yield policy John Harrison
2025-09-09 15:27 ` Belgaumkar, Vinay
2025-09-15 13:59 ` Rodrigo Vivi
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