From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH 07/11] drm/i915: Introduce pin_params.needs_physical
Date: Fri, 17 Apr 2026 12:50:55 +0300 [thread overview]
Message-ID: <be1ac262a723b245b01e20913d461905c2148e6d@intel.com> (raw)
In-Reply-To: <20260416174448.28264-8-ville.syrjala@linux.intel.com>
On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a new flag pin_params.needs_physical to inform the pinning
> code that the display needs a physical address and not GGTT
> address.
>
> This isn't strictly necessary as the current phys_alignment!=0
> check is enough in practice. But theoretically one could have
> needs_physical==true without any alignment requirements. And
> having an explicit flag feels a bit less magical.
Agreed.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 +
> drivers/gpu/drm/i915/i915_fb_pin.c | 3 ++-
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> index cf54a96569de..3e37e9874f50 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> @@ -21,6 +21,7 @@ struct intel_fb_pin_params {
> unsigned int vtd_guard;
> bool needs_cpu_lmem_access;
> bool needs_low_address;
> + bool needs_physical;
> };
>
> struct i915_vma *
> diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> index 97e4cdfd2447..bfe9a5342e13 100644
> --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> @@ -148,7 +148,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
> i915_gem_ww_ctx_init(&ww, true);
> retry:
> ret = i915_gem_object_lock(obj, &ww);
> - if (!ret && pin_params->phys_alignment)
> + if (!ret && pin_params->needs_physical)
> ret = i915_gem_object_attach_phys(obj, pin_params->phys_alignment);
> else if (!ret && HAS_LMEM(i915))
> ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
> @@ -271,6 +271,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
> .vtd_guard = intel_plane_fb_vtd_guard(plane_state),
> .needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
> .needs_low_address = intel_plane_needs_low_address(display),
> + .needs_physical = intel_plane_needs_physical(plane),
> };
> int fence_id = -1;
--
Jani Nikula, Intel
next prev parent reply other threads:[~2026-04-17 9:51 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-16 17:44 [PATCH 00/11] drm/i915: Eliminate FB usage from low level pinning code Ville Syrjala
2026-04-16 17:44 ` [PATCH 01/11] drm/xe/fb: Use the correct gtt view for remapped FBs Ville Syrjala
2026-04-16 17:44 ` [PATCH 02/11] drm/i915: Introduce struct intel_fb_pin_params Ville Syrjala
2026-04-17 9:40 ` Jani Nikula
2026-04-16 17:44 ` [PATCH 03/11] drm/i915: Extract intel_fb_needs_cpu_access() Ville Syrjala
2026-04-17 9:40 ` Jani Nikula
2026-04-16 17:44 ` [PATCH 04/11] drm/i915: Introduce pin_params.needs_cpu_lmem_access Ville Syrjala
2026-04-17 9:39 ` Jani Nikula
2026-04-17 11:33 ` Ville Syrjälä
2026-04-17 16:19 ` Ville Syrjälä
2026-04-16 17:44 ` [PATCH 05/11] drm/i915: Extract intel_plane_needs_low_address() Ville Syrjala
2026-04-17 9:43 ` Jani Nikula
2026-04-16 17:44 ` [PATCH 06/11] drm/i915: Introduce pin_params.needs_low_address Ville Syrjala
2026-04-17 9:48 ` Jani Nikula
2026-04-16 17:44 ` [PATCH 07/11] drm/i915: Introduce pin_params.needs_physical Ville Syrjala
2026-04-17 9:50 ` Jani Nikula [this message]
2026-04-16 17:44 ` [PATCH 08/11] drm/i915: Extract intel_plane_needs_fence() Ville Syrjala
2026-04-17 9:53 ` Jani Nikula
2026-04-16 17:44 ` [PATCH 09/11] drm/i915: Introduce pin_params.needs_fence Ville Syrjala
2026-04-17 9:58 ` Jani Nikula
2026-04-17 12:25 ` Ville Syrjälä
2026-04-16 17:44 ` [PATCH 10/11] drm/xe: Eliminate intel_fb_uses_dpt() call from __xe_pin_fb_vma() Ville Syrjala
2026-04-17 10:19 ` Jani Nikula
2026-04-16 17:44 ` [PATCH 11/11] drm/i915: Don't pass the framebuffer to low level pinning functions Ville Syrjala
2026-04-17 10:25 ` Jani Nikula
2026-04-16 17:52 ` ✓ CI.KUnit: success for drm/i915: Eliminate FB usage from low level pinning code Patchwork
2026-04-16 18:51 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-16 20:43 ` ✗ Xe.CI.FULL: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=be1ac262a723b245b01e20913d461905c2148e6d@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox