* ✓ CI.Patch_applied: success for PMU support for engine activity
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
@ 2025-02-06 10:40 ` Patchwork
2025-02-06 10:41 ` ✗ CI.checkpatch: warning " Patchwork
` (14 subsequent siblings)
15 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-06 10:40 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
== Series Details ==
Series: PMU support for engine activity
URL : https://patchwork.freedesktop.org/series/144408/
State : success
== Summary ==
=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: cc0ddf9cae27 drm-tip: 2025y-02m-06d-10h-05m-40s UTC integration manifest
=== git am output follows ===
.git/rebase-apply/patch:493: new blank line at EOF.
+
warning: 1 line adds whitespace errors.
Applying: drm/xe: Add engine activity support
Applying: drm/xe/trace: Add trace for engine activity
Applying: drm/xe/guc: Expose engine activity only for supported GuC version
Applying: drm/xe/xe_pmu: Add PMU support for engine activity
Applying: drm/xe/xe_pmu: Acquire forcewake on event init for engine events
Applying: drm/xe: Add support for per-function engine activity
Applying: drm/xe/xe_pmu: Add pmu support for per-function engine activity stats
Applying: drm/xe/pf: Enable per-function engine activity stats
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✗ CI.checkpatch: warning for PMU support for engine activity
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
2025-02-06 10:40 ` ✓ CI.Patch_applied: success for " Patchwork
@ 2025-02-06 10:41 ` Patchwork
2025-02-06 10:42 ` ✓ CI.KUnit: success " Patchwork
` (13 subsequent siblings)
15 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-06 10:41 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
== Series Details ==
Series: PMU support for engine activity
URL : https://patchwork.freedesktop.org/series/144408/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit c16b474886df2075cc0d04da08ea4b97ae6cbf44
Author: Riana Tauro <riana.tauro@intel.com>
Date: Thu Feb 6 16:13:57 2025 +0530
drm/xe/pf: Enable per-function engine activity stats
Enable per-function engine activity stats when
sriov_numvfs are set and disable when sriov_numvfs
are set to 0.
Also restart engine stats when VF's are reprovisioned
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
+ /mt/dim checkpatch cc0ddf9cae27ac39b4c0e69872e6a9412cb673f7 drm-intel
62056f6afe92 drm/xe: Add engine activity support
-:71: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#71:
new file mode 100644
-:529: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#529: FILE: drivers/gpu/drm/xe/xe_guc_fwif.h:220:
+ struct guc_engine_activity engine_activity[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
total: 0 errors, 2 warnings, 0 checks, 487 lines checked
5b4369b3ef0d drm/xe/trace: Add trace for engine activity
-:67: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#67: FILE: drivers/gpu/drm/xe/xe_trace_guc.h:109:
+ TP_STRUCT__entry(
-:84: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#84: FILE: drivers/gpu/drm/xe/xe_trace_guc.h:126:
+ TP_fast_assign(
total: 0 errors, 0 warnings, 2 checks, 84 lines checked
5bb2adadb86d drm/xe/guc: Expose engine activity only for supported GuC version
b6fd81e28a46 drm/xe/xe_pmu: Add PMU support for engine activity
-:298: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#298: FILE: drivers/gpu/drm/xe/xe_pmu.c:373:
+XE_EVENT_ATTR_NOUNIT(engine-active-ticks, engine_active_ticks, XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
^
-:298: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#298: FILE: drivers/gpu/drm/xe/xe_pmu.c:373:
+XE_EVENT_ATTR_NOUNIT(engine-active-ticks, engine_active_ticks, XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
^
-:299: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#299: FILE: drivers/gpu/drm/xe/xe_pmu.c:374:
+XE_EVENT_ATTR_NOUNIT(engine-total-ticks, engine_total_ticks, XE_PMU_EVENT_ENGINE_TOTAL_TICKS);
^
-:299: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#299: FILE: drivers/gpu/drm/xe/xe_pmu.c:374:
+XE_EVENT_ATTR_NOUNIT(engine-total-ticks, engine_total_ticks, XE_PMU_EVENT_ENGINE_TOTAL_TICKS);
^
total: 0 errors, 0 warnings, 4 checks, 277 lines checked
7280c5ab16c3 drm/xe/xe_pmu: Acquire forcewake on event init for engine events
b929c1e4ddca drm/xe: Add support for per-function engine activity
ae1f9ba4ef39 drm/xe/xe_pmu: Add pmu support for per-function engine activity stats
c16b474886df drm/xe/pf: Enable per-function engine activity stats
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✓ CI.KUnit: success for PMU support for engine activity
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
2025-02-06 10:40 ` ✓ CI.Patch_applied: success for " Patchwork
2025-02-06 10:41 ` ✗ CI.checkpatch: warning " Patchwork
@ 2025-02-06 10:42 ` Patchwork
2025-02-06 10:43 ` [PATCH v5 1/8] drm/xe: Add engine activity support Riana Tauro
` (12 subsequent siblings)
15 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-06 10:42 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
== Series Details ==
Series: PMU support for engine activity
URL : https://patchwork.freedesktop.org/series/144408/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:41:17] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:41:21] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
156 | u64 ioread64_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
163 | u64 ioread64_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
170 | u64 ioread64be_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
178 | u64 ioread64be_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
[10:41:47] Starting KUnit Kernel (1/1)...
[10:41:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:41:47] ================== guc_buf (11 subtests) ===================
[10:41:47] [PASSED] test_smallest
[10:41:47] [PASSED] test_largest
[10:41:47] [PASSED] test_granular
[10:41:47] [PASSED] test_unique
[10:41:47] [PASSED] test_overlap
[10:41:47] [PASSED] test_reusable
[10:41:47] [PASSED] test_too_big
[10:41:47] [PASSED] test_flush
[10:41:47] [PASSED] test_lookup
[10:41:47] [PASSED] test_data
[10:41:47] [PASSED] test_class
[10:41:47] ===================== [PASSED] guc_buf =====================
[10:41:47] =================== guc_dbm (7 subtests) ===================
[10:41:47] [PASSED] test_empty
[10:41:47] [PASSED] test_default
[10:41:47] ======================== test_size ========================
[10:41:47] [PASSED] 4
[10:41:47] [PASSED] 8
[10:41:47] [PASSED] 32
[10:41:47] [PASSED] 256
[10:41:47] ==================== [PASSED] test_size ====================
[10:41:47] ======================= test_reuse ========================
[10:41:47] [PASSED] 4
[10:41:47] [PASSED] 8
[10:41:47] [PASSED] 32
[10:41:47] [PASSED] 256
[10:41:47] =================== [PASSED] test_reuse ====================
[10:41:47] =================== test_range_overlap ====================
[10:41:47] [PASSED] 4
[10:41:47] [PASSED] 8
[10:41:47] [PASSED] 32
[10:41:47] [PASSED] 256
[10:41:47] =============== [PASSED] test_range_overlap ================
[10:41:47] =================== test_range_compact ====================
[10:41:47] [PASSED] 4
[10:41:47] [PASSED] 8
[10:41:47] [PASSED] 32
[10:41:47] [PASSED] 256
[10:41:47] =============== [PASSED] test_range_compact ================
[10:41:47] ==================== test_range_spare =====================
[10:41:47] [PASSED] 4
[10:41:47] [PASSED] 8
[10:41:47] [PASSED] 32
[10:41:47] [PASSED] 256
[10:41:47] ================ [PASSED] test_range_spare =================
[10:41:47] ===================== [PASSED] guc_dbm =====================
[10:41:47] =================== guc_idm (6 subtests) ===================
[10:41:47] [PASSED] bad_init
[10:41:47] [PASSED] no_init
[10:41:47] [PASSED] init_fini
[10:41:47] [PASSED] check_used
[10:41:47] [PASSED] check_quota
[10:41:47] [PASSED] check_all
[10:41:47] ===================== [PASSED] guc_idm =====================
[10:41:47] ================== no_relay (3 subtests) ===================
[10:41:47] [PASSED] xe_drops_guc2pf_if_not_ready
[10:41:47] [PASSED] xe_drops_guc2vf_if_not_ready
[10:41:47] [PASSED] xe_rejects_send_if_not_ready
[10:41:47] ==================== [PASSED] no_relay =====================
[10:41:47] ================== pf_relay (14 subtests) ==================
[10:41:47] [PASSED] pf_rejects_guc2pf_too_short
[10:41:47] [PASSED] pf_rejects_guc2pf_too_long
[10:41:47] [PASSED] pf_rejects_guc2pf_no_payload
[10:41:47] [PASSED] pf_fails_no_payload
[10:41:47] [PASSED] pf_fails_bad_origin
[10:41:47] [PASSED] pf_fails_bad_type
[10:41:47] [PASSED] pf_txn_reports_error
[10:41:47] [PASSED] pf_txn_sends_pf2guc
[10:41:47] [PASSED] pf_sends_pf2guc
[10:41:47] [SKIPPED] pf_loopback_nop
[10:41:47] [SKIPPED] pf_loopback_echo
[10:41:47] [SKIPPED] pf_loopback_fail
[10:41:47] [SKIPPED] pf_loopback_busy
[10:41:47] [SKIPPED] pf_loopback_retry
[10:41:47] ==================== [PASSED] pf_relay =====================
[10:41:47] ================== vf_relay (3 subtests) ===================
[10:41:47] [PASSED] vf_rejects_guc2vf_too_short
[10:41:47] [PASSED] vf_rejects_guc2vf_too_long
[10:41:47] [PASSED] vf_rejects_guc2vf_no_payload
[10:41:47] ==================== [PASSED] vf_relay =====================
[10:41:47] ================= pf_service (11 subtests) =================
[10:41:47] [PASSED] pf_negotiate_any
[10:41:47] [PASSED] pf_negotiate_base_match
[10:41:47] [PASSED] pf_negotiate_base_newer
[10:41:47] [PASSED] pf_negotiate_base_next
[10:41:47] [SKIPPED] pf_negotiate_base_older
[10:41:47] [PASSED] pf_negotiate_base_prev
[10:41:47] [PASSED] pf_negotiate_latest_match
[10:41:47] [PASSED] pf_negotiate_latest_newer
[10:41:47] [PASSED] pf_negotiate_latest_next
[10:41:47] [SKIPPED] pf_negotiate_latest_older
[10:41:47] [SKIPPED] pf_negotiate_latest_prev
[10:41:47] =================== [PASSED] pf_service ====================
[10:41:47] ===================== lmtt (1 subtest) =====================
[10:41:47] ======================== test_ops =========================
[10:41:47] [PASSED] 2-level
[10:41:47] [PASSED] multi-level
[10:41:47] ==================== [PASSED] test_ops =====================
[10:41:47] ====================== [PASSED] lmtt =======================
[10:41:47] =================== xe_mocs (2 subtests) ===================
[10:41:47] ================ xe_live_mocs_kernel_kunit ================
[10:41:47] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:41:47] ================ xe_live_mocs_reset_kunit =================
[10:41:47] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:41:47] ==================== [SKIPPED] xe_mocs =====================
[10:41:47] ================= xe_migrate (2 subtests) ==================
[10:41:47] ================= xe_migrate_sanity_kunit =================
[10:41:47] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:41:47] ================== xe_validate_ccs_kunit ==================
[10:41:47] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:41:47] =================== [SKIPPED] xe_migrate ===================
[10:41:47] ================== xe_dma_buf (1 subtest) ==================
[10:41:47] ==================== xe_dma_buf_kunit =====================
[10:41:47] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:41:47] =================== [SKIPPED] xe_dma_buf ===================
[10:41:47] ================= xe_bo_shrink (1 subtest) =================
[10:41:47] =================== xe_bo_shrink_kunit ====================
[10:41:47] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:41:47] ================== [SKIPPED] xe_bo_shrink ==================
[10:41:47] ==================== xe_bo (2 subtests) ====================
[10:41:47] ================== xe_ccs_migrate_kunit ===================
[10:41:47] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
stty: 'standard input': Inappropriate ioctl for device
[10:41:47] ==================== xe_bo_evict_kunit ====================
[10:41:47] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:41:47] ===================== [SKIPPED] xe_bo ======================
[10:41:47] ==================== args (11 subtests) ====================
[10:41:47] [PASSED] count_args_test
[10:41:47] [PASSED] call_args_example
[10:41:47] [PASSED] call_args_test
[10:41:47] [PASSED] drop_first_arg_example
[10:41:47] [PASSED] drop_first_arg_test
[10:41:47] [PASSED] first_arg_example
[10:41:47] [PASSED] first_arg_test
[10:41:47] [PASSED] last_arg_example
[10:41:47] [PASSED] last_arg_test
[10:41:47] [PASSED] pick_arg_example
[10:41:47] [PASSED] sep_comma_example
[10:41:47] ====================== [PASSED] args =======================
[10:41:47] =================== xe_pci (2 subtests) ====================
[10:41:47] [PASSED] xe_gmdid_graphics_ip
[10:41:47] [PASSED] xe_gmdid_media_ip
[10:41:47] ===================== [PASSED] xe_pci ======================
[10:41:47] =================== xe_rtp (2 subtests) ====================
[10:41:47] =============== xe_rtp_process_to_sr_tests ================
[10:41:47] [PASSED] coalesce-same-reg
[10:41:47] [PASSED] no-match-no-add
[10:41:47] [PASSED] match-or
[10:41:47] [PASSED] match-or-xfail
[10:41:47] [PASSED] no-match-no-add-multiple-rules
[10:41:47] [PASSED] two-regs-two-entries
[10:41:47] [PASSED] clr-one-set-other
[10:41:47] [PASSED] set-field
[10:41:47] [PASSED] conflict-duplicate
[10:41:47] [PASSED] conflict-not-disjoint
[10:41:47] [PASSED] conflict-reg-type
[10:41:47] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:41:47] ================== xe_rtp_process_tests ===================
[10:41:47] [PASSED] active1
[10:41:47] [PASSED] active2
[10:41:47] [PASSED] active-inactive
[10:41:47] [PASSED] inactive-active
[10:41:47] [PASSED] inactive-1st_or_active-inactive
[10:41:47] [PASSED] inactive-2nd_or_active-inactive
[10:41:47] [PASSED] inactive-last_or_active-inactive
[10:41:47] [PASSED] inactive-no_or_active-inactive
[10:41:47] ============== [PASSED] xe_rtp_process_tests ===============
[10:41:47] ===================== [PASSED] xe_rtp ======================
[10:41:47] ==================== xe_wa (1 subtest) =====================
[10:41:47] ======================== xe_wa_gt =========================
[10:41:47] [PASSED] TIGERLAKE (B0)
[10:41:47] [PASSED] DG1 (A0)
[10:41:47] [PASSED] DG1 (B0)
[10:41:47] [PASSED] ALDERLAKE_S (A0)
[10:41:47] [PASSED] ALDERLAKE_S (B0)
[10:41:47] [PASSED] ALDERLAKE_S (C0)
[10:41:47] [PASSED] ALDERLAKE_S (D0)
[10:41:47] [PASSED] ALDERLAKE_P (A0)
[10:41:47] [PASSED] ALDERLAKE_P (B0)
[10:41:47] [PASSED] ALDERLAKE_P (C0)
[10:41:47] [PASSED] ALDERLAKE_S_RPLS (D0)
[10:41:47] [PASSED] ALDERLAKE_P_RPLU (E0)
[10:41:47] [PASSED] DG2_G10 (C0)
[10:41:47] [PASSED] DG2_G11 (B1)
[10:41:47] [PASSED] DG2_G12 (A1)
[10:41:47] [PASSED] METEORLAKE (g:A0, m:A0)
[10:41:47] [PASSED] METEORLAKE (g:A0, m:A0)
[10:41:47] [PASSED] METEORLAKE (g:A0, m:A0)
[10:41:47] [PASSED] LUNARLAKE (g:A0, m:A0)
[10:41:47] [PASSED] LUNARLAKE (g:B0, m:A0)
[10:41:47] [PASSED] BATTLEMAGE (g:A0, m:A1)
[10:41:47] ==================== [PASSED] xe_wa_gt =====================
[10:41:47] ====================== [PASSED] xe_wa ======================
[10:41:47] ============================================================
[10:41:47] Testing complete. Ran 133 tests: passed: 117, skipped: 16
[10:41:47] Elapsed time: 30.495s total, 4.172s configuring, 26.006s building, 0.276s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:41:47] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:41:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
156 | u64 ioread64_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
163 | u64 ioread64_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
170 | u64 ioread64be_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
178 | u64 ioread64be_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
[10:42:10] Starting KUnit Kernel (1/1)...
[10:42:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:42:10] =========== drm_validate_clone_mode (2 subtests) ===========
[10:42:10] ============== drm_test_check_in_clone_mode ===============
[10:42:10] [PASSED] in_clone_mode
[10:42:10] [PASSED] not_in_clone_mode
[10:42:10] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:42:10] =============== drm_test_check_valid_clones ===============
[10:42:10] [PASSED] not_in_clone_mode
[10:42:10] [PASSED] valid_clone
[10:42:10] [PASSED] invalid_clone
[10:42:10] =========== [PASSED] drm_test_check_valid_clones ===========
[10:42:10] ============= [PASSED] drm_validate_clone_mode =============
[10:42:10] ============= drm_validate_modeset (1 subtest) =============
[10:42:10] [PASSED] drm_test_check_connector_changed_modeset
[10:42:10] ============== [PASSED] drm_validate_modeset ===============
[10:42:10] ================== drm_buddy (7 subtests) ==================
[10:42:10] [PASSED] drm_test_buddy_alloc_limit
[10:42:10] [PASSED] drm_test_buddy_alloc_optimistic
[10:42:10] [PASSED] drm_test_buddy_alloc_pessimistic
[10:42:10] [PASSED] drm_test_buddy_alloc_pathological
[10:42:10] [PASSED] drm_test_buddy_alloc_contiguous
[10:42:10] [PASSED] drm_test_buddy_alloc_clear
[10:42:10] [PASSED] drm_test_buddy_alloc_range_bias
[10:42:10] ==================== [PASSED] drm_buddy ====================
[10:42:10] ============= drm_cmdline_parser (40 subtests) =============
[10:42:10] [PASSED] drm_test_cmdline_force_d_only
[10:42:10] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:42:10] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:42:10] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:42:10] [PASSED] drm_test_cmdline_force_e_only
[10:42:10] [PASSED] drm_test_cmdline_res
[10:42:10] [PASSED] drm_test_cmdline_res_vesa
[10:42:10] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:42:10] [PASSED] drm_test_cmdline_res_rblank
[10:42:10] [PASSED] drm_test_cmdline_res_bpp
[10:42:10] [PASSED] drm_test_cmdline_res_refresh
[10:42:10] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:42:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:42:10] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:42:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:42:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:42:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:42:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:42:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:42:10] [PASSED] drm_test_cmdline_res_margins_force_on
[10:42:10] [PASSED] drm_test_cmdline_res_vesa_margins
[10:42:10] [PASSED] drm_test_cmdline_name
[10:42:10] [PASSED] drm_test_cmdline_name_bpp
[10:42:10] [PASSED] drm_test_cmdline_name_option
[10:42:10] [PASSED] drm_test_cmdline_name_bpp_option
[10:42:10] [PASSED] drm_test_cmdline_rotate_0
[10:42:10] [PASSED] drm_test_cmdline_rotate_90
[10:42:10] [PASSED] drm_test_cmdline_rotate_180
[10:42:10] [PASSED] drm_test_cmdline_rotate_270
[10:42:10] [PASSED] drm_test_cmdline_hmirror
[10:42:10] [PASSED] drm_test_cmdline_vmirror
[10:42:10] [PASSED] drm_test_cmdline_margin_options
[10:42:10] [PASSED] drm_test_cmdline_multiple_options
[10:42:10] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:42:10] [PASSED] drm_test_cmdline_extra_and_option
[10:42:10] [PASSED] drm_test_cmdline_freestanding_options
[10:42:10] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:42:10] [PASSED] drm_test_cmdline_panel_orientation
[10:42:10] ================ drm_test_cmdline_invalid =================
[10:42:10] [PASSED] margin_only
[10:42:10] [PASSED] interlace_only
[10:42:10] [PASSED] res_missing_x
[10:42:10] [PASSED] res_missing_y
[10:42:10] [PASSED] res_bad_y
[10:42:10] [PASSED] res_missing_y_bpp
[10:42:10] [PASSED] res_bad_bpp
[10:42:10] [PASSED] res_bad_refresh
[10:42:10] [PASSED] res_bpp_refresh_force_on_off
[10:42:10] [PASSED] res_invalid_mode
[10:42:10] [PASSED] res_bpp_wrong_place_mode
[10:42:10] [PASSED] name_bpp_refresh
[10:42:10] [PASSED] name_refresh
[10:42:10] [PASSED] name_refresh_wrong_mode
[10:42:10] [PASSED] name_refresh_invalid_mode
[10:42:10] [PASSED] rotate_multiple
[10:42:10] [PASSED] rotate_invalid_val
[10:42:10] [PASSED] rotate_truncated
[10:42:10] [PASSED] invalid_option
[10:42:10] [PASSED] invalid_tv_option
[10:42:10] [PASSED] truncated_tv_option
[10:42:10] ============ [PASSED] drm_test_cmdline_invalid =============
[10:42:10] =============== drm_test_cmdline_tv_options ===============
[10:42:10] [PASSED] NTSC
[10:42:10] [PASSED] NTSC_443
[10:42:10] [PASSED] NTSC_J
[10:42:10] [PASSED] PAL
[10:42:10] [PASSED] PAL_M
[10:42:10] [PASSED] PAL_N
[10:42:10] [PASSED] SECAM
[10:42:10] [PASSED] MONO_525
[10:42:10] [PASSED] MONO_625
[10:42:10] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:42:10] =============== [PASSED] drm_cmdline_parser ================
[10:42:10] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:42:10] [PASSED] drm_test_connector_hdmi_init_valid
[10:42:10] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:42:10] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:42:10] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:42:10] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:42:10] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:42:10] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:42:10] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:42:10] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:42:10] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:42:10] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:42:10] [PASSED] supported_formats=0x3 yuv420_allowed=1
[10:42:10] [PASSED] supported_formats=0x3 yuv420_allowed=0
[10:42:10] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:42:10] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:42:10] [PASSED] drm_test_connector_hdmi_init_null_product
[10:42:10] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:42:10] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:42:10] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:42:10] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:42:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:42:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:42:10] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:42:10] ========= drm_test_connector_hdmi_init_type_valid =========
[10:42:10] [PASSED] HDMI-A
[10:42:10] [PASSED] HDMI-B
[10:42:10] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:42:10] ======== drm_test_connector_hdmi_init_type_invalid ========
[10:42:10] [PASSED] Unknown
[10:42:10] [PASSED] VGA
[10:42:10] [PASSED] DVI-I
[10:42:10] [PASSED] DVI-D
[10:42:10] [PASSED] DVI-A
[10:42:10] [PASSED] Composite
[10:42:10] [PASSED] SVIDEO
[10:42:10] [PASSED] LVDS
[10:42:10] [PASSED] Component
[10:42:10] [PASSED] DIN
[10:42:10] [PASSED] DP
[10:42:10] [PASSED] TV
[10:42:10] [PASSED] eDP
[10:42:10] [PASSED] Virtual
[10:42:10] [PASSED] DSI
[10:42:10] [PASSED] DPI
[10:42:10] [PASSED] Writeback
[10:42:10] [PASSED] SPI
[10:42:10] [PASSED] USB
[10:42:10] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:42:10] ============ [PASSED] drmm_connector_hdmi_init =============
[10:42:10] ============= drmm_connector_init (3 subtests) =============
[10:42:10] [PASSED] drm_test_drmm_connector_init
[10:42:10] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:42:10] ========= drm_test_drmm_connector_init_type_valid =========
[10:42:10] [PASSED] Unknown
[10:42:10] [PASSED] VGA
[10:42:10] [PASSED] DVI-I
[10:42:10] [PASSED] DVI-D
[10:42:10] [PASSED] DVI-A
[10:42:10] [PASSED] Composite
[10:42:10] [PASSED] SVIDEO
[10:42:10] [PASSED] LVDS
[10:42:10] [PASSED] Component
[10:42:10] [PASSED] DIN
[10:42:10] [PASSED] DP
[10:42:10] [PASSED] HDMI-A
[10:42:10] [PASSED] HDMI-B
[10:42:10] [PASSED] TV
[10:42:10] [PASSED] eDP
[10:42:10] [PASSED] Virtual
[10:42:10] [PASSED] DSI
[10:42:10] [PASSED] DPI
[10:42:10] [PASSED] Writeback
[10:42:10] [PASSED] SPI
[10:42:10] [PASSED] USB
[10:42:10] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:42:10] =============== [PASSED] drmm_connector_init ===============
[10:42:10] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_init
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:42:10] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[10:42:10] [PASSED] Unknown
[10:42:10] [PASSED] VGA
[10:42:10] [PASSED] DVI-I
[10:42:10] [PASSED] DVI-D
[10:42:10] [PASSED] DVI-A
[10:42:10] [PASSED] Composite
[10:42:10] [PASSED] SVIDEO
[10:42:10] [PASSED] LVDS
[10:42:10] [PASSED] Component
[10:42:10] [PASSED] DIN
[10:42:10] [PASSED] DP
[10:42:10] [PASSED] HDMI-A
[10:42:10] [PASSED] HDMI-B
[10:42:10] [PASSED] TV
[10:42:10] [PASSED] eDP
[10:42:10] [PASSED] Virtual
[10:42:10] [PASSED] DSI
[10:42:10] [PASSED] DPI
[10:42:10] [PASSED] Writeback
[10:42:10] [PASSED] SPI
[10:42:10] [PASSED] USB
[10:42:10] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:42:10] ======== drm_test_drm_connector_dynamic_init_name =========
[10:42:10] [PASSED] Unknown
[10:42:10] [PASSED] VGA
[10:42:10] [PASSED] DVI-I
[10:42:10] [PASSED] DVI-D
[10:42:10] [PASSED] DVI-A
[10:42:10] [PASSED] Composite
[10:42:10] [PASSED] SVIDEO
[10:42:10] [PASSED] LVDS
[10:42:10] [PASSED] Component
[10:42:10] [PASSED] DIN
[10:42:10] [PASSED] DP
[10:42:10] [PASSED] HDMI-A
[10:42:10] [PASSED] HDMI-B
[10:42:10] [PASSED] TV
[10:42:10] [PASSED] eDP
[10:42:10] [PASSED] Virtual
[10:42:10] [PASSED] DSI
[10:42:10] [PASSED] DPI
[10:42:10] [PASSED] Writeback
[10:42:10] [PASSED] SPI
[10:42:10] [PASSED] USB
[10:42:10] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:42:10] =========== [PASSED] drm_connector_dynamic_init ============
[10:42:10] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:42:10] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:42:10] ======= drm_connector_dynamic_register (7 subtests) ========
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:42:10] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:42:10] ========= [PASSED] drm_connector_dynamic_register ==========
[10:42:10] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:42:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:42:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:42:10] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:42:10] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:42:10] ========== drm_test_get_tv_mode_from_name_valid ===========
[10:42:10] [PASSED] NTSC
[10:42:10] [PASSED] NTSC-443
[10:42:10] [PASSED] NTSC-J
[10:42:10] [PASSED] PAL
[10:42:10] [PASSED] PAL-M
[10:42:10] [PASSED] PAL-N
[10:42:10] [PASSED] SECAM
[10:42:10] [PASSED] Mono
[10:42:10] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:42:10] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:42:10] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:42:10] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:42:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:42:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:42:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:42:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:42:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:42:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:42:10] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[10:42:10] [PASSED] VIC 96
[10:42:10] [PASSED] VIC 97
[10:42:10] [PASSED] VIC 101
[10:42:10] [PASSED] VIC 102
[10:42:10] [PASSED] VIC 106
[10:42:10] [PASSED] VIC 107
[10:42:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:42:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:42:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:42:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:42:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:42:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:42:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:42:10] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:42:10] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[10:42:10] [PASSED] Automatic
[10:42:10] [PASSED] Full
[10:42:10] [PASSED] Limited 16:235
[10:42:10] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:42:10] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:42:10] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:42:10] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:42:10] === drm_test_drm_hdmi_connector_get_output_format_name ====
[10:42:10] [PASSED] RGB
[10:42:10] [PASSED] YUV 4:2:0
[10:42:10] [PASSED] YUV 4:2:2
[10:42:10] [PASSED] YUV 4:4:4
[10:42:10] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:42:10] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:42:10] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:42:10] ============= drm_damage_helper (21 subtests) ==============
[10:42:10] [PASSED] drm_test_damage_iter_no_damage
[10:42:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:42:10] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:42:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:42:10] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:42:10] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:42:10] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:42:10] [PASSED] drm_test_damage_iter_simple_damage
[10:42:10] [PASSED] drm_test_damage_iter_single_damage
[10:42:10] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:42:10] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:42:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:42:10] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:42:10] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:42:10] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:42:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:42:10] [PASSED] drm_test_damage_iter_damage
[10:42:10] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:42:10] [PASSED] drm_test_damage_iter_damage_one_outside
[10:42:10] [PASSED] drm_test_damage_iter_damage_src_moved
[10:42:10] [PASSED] drm_test_damage_iter_damage_not_visible
[10:42:10] ================ [PASSED] drm_damage_helper ================
[10:42:10] ============== drm_dp_mst_helper (3 subtests) ==============
[10:42:10] ============== drm_test_dp_mst_calc_pbn_mode ==============
[10:42:10] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:42:10] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:42:10] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:42:10] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:42:10] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:42:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:42:10] ============== drm_test_dp_mst_calc_pbn_div ===============
[10:42:10] [PASSED] Link rate 2000000 lane count 4
[10:42:10] [PASSED] Link rate 2000000 lane count 2
[10:42:10] [PASSED] Link rate 2000000 lane count 1
[10:42:10] [PASSED] Link rate 1350000 lane count 4
[10:42:10] [PASSED] Link rate 1350000 lane count 2
[10:42:10] [PASSED] Link rate 1350000 lane count 1
[10:42:10] [PASSED] Link rate 1000000 lane count 4
[10:42:10] [PASSED] Link rate 1000000 lane count 2
[10:42:10] [PASSED] Link rate 1000000 lane count 1
[10:42:10] [PASSED] Link rate 810000 lane count 4
[10:42:10] [PASSED] Link rate 810000 lane count 2
[10:42:10] [PASSED] Link rate 810000 lane count 1
[10:42:10] [PASSED] Link rate 540000 lane count 4
[10:42:10] [PASSED] Link rate 540000 lane count 2
[10:42:10] [PASSED] Link rate 540000 lane count 1
[10:42:10] [PASSED] Link rate 270000 lane count 4
[10:42:10] [PASSED] Link rate 270000 lane count 2
[10:42:10] [PASSED] Link rate 270000 lane count 1
[10:42:10] [PASSED] Link rate 162000 lane count 4
[10:42:10] [PASSED] Link rate 162000 lane count 2
[10:42:10] [PASSED] Link rate 162000 lane count 1
[10:42:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:42:10] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[10:42:10] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:42:10] [PASSED] DP_POWER_UP_PHY with port number
[10:42:10] [PASSED] DP_POWER_DOWN_PHY with port number
[10:42:10] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:42:10] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:42:10] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:42:10] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:42:10] [PASSED] DP_QUERY_PAYLOAD with port number
[10:42:10] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:42:10] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:42:10] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:42:10] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:42:10] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:42:10] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:42:10] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:42:10] [PASSED] DP_REMOTE_I2C_READ with port number
[10:42:10] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:42:10] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:42:10] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:42:10] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:42:10] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:42:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:42:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:42:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:42:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:42:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:42:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:42:10] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:42:10] ================ [PASSED] drm_dp_mst_helper ================
[10:42:10] ================== drm_exec (7 subtests) ===================
[10:42:10] [PASSED] sanitycheck
[10:42:10] [PASSED] test_lock
[10:42:10] [PASSED] test_lock_unlock
[10:42:10] [PASSED] test_duplicates
[10:42:10] [PASSED] test_prepare
[10:42:10] [PASSED] test_prepare_array
[10:42:10] [PASSED] test_multiple_loops
[10:42:10] ==================== [PASSED] drm_exec =====================
[10:42:10] =========== drm_format_helper_test (17 subtests) ===========
[10:42:10] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:42:10] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:42:10] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:42:10] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:42:10] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:42:10] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:42:10] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:42:10] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:42:10] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:42:10] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:42:10] ============== drm_test_fb_xrgb8888_to_mono ===============
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:42:10] ==================== drm_test_fb_swab =====================
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ================ [PASSED] drm_test_fb_swab =================
[10:42:10] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:42:10] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[10:42:10] [PASSED] single_pixel_source_buffer
[10:42:10] [PASSED] single_pixel_clip_rectangle
[10:42:10] [PASSED] well_known_colors
[10:42:10] [PASSED] destination_pitch
[10:42:10] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:42:10] ================= drm_test_fb_clip_offset =================
[10:42:10] [PASSED] pass through
[10:42:10] [PASSED] horizontal offset
[10:42:10] [PASSED] vertical offset
[10:42:10] [PASSED] horizontal and vertical offset
[10:42:10] [PASSED] horizontal offset (custom pitch)
[10:42:10] [PASSED] vertical offset (custom pitch)
[10:42:10] [PASSED] horizontal and vertical offset (custom pitch)
[10:42:10] ============= [PASSED] drm_test_fb_clip_offset =============
[10:42:10] ============== drm_test_fb_build_fourcc_list ==============
[10:42:10] [PASSED] no native formats
[10:42:10] [PASSED] XRGB8888 as native format
[10:42:10] [PASSED] remove duplicates
[10:42:10] [PASSED] convert alpha formats
[10:42:10] [PASSED] random formats
[10:42:10] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[10:42:10] =================== drm_test_fb_memcpy ====================
[10:42:10] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:42:10] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:42:10] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:42:10] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:42:10] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:42:10] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:42:10] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:42:10] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:42:10] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:42:10] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:42:10] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:42:10] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:42:10] =============== [PASSED] drm_test_fb_memcpy ================
[10:42:10] ============= [PASSED] drm_format_helper_test ==============
[10:42:10] ================= drm_format (18 subtests) =================
[10:42:10] [PASSED] drm_test_format_block_width_invalid
[10:42:10] [PASSED] drm_test_format_block_width_one_plane
[10:42:10] [PASSED] drm_test_format_block_width_two_plane
[10:42:10] [PASSED] drm_test_format_block_width_three_plane
[10:42:10] [PASSED] drm_test_format_block_width_tiled
[10:42:10] [PASSED] drm_test_format_block_height_invalid
[10:42:10] [PASSED] drm_test_format_block_height_one_plane
[10:42:10] [PASSED] drm_test_format_block_height_two_plane
[10:42:10] [PASSED] drm_test_format_block_height_three_plane
[10:42:10] [PASSED] drm_test_format_block_height_tiled
[10:42:10] [PASSED] drm_test_format_min_pitch_invalid
[10:42:10] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:42:10] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:42:10] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:42:10] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:42:10] [PASSED] drm_test_format_min_pitch_two_plane
[10:42:10] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:42:10] [PASSED] drm_test_format_min_pitch_tiled
[10:42:10] =================== [PASSED] drm_format ====================
[10:42:10] ============== drm_framebuffer (10 subtests) ===============
[10:42:10] ========== drm_test_framebuffer_check_src_coords ==========
[10:42:10] [PASSED] Success: source fits into fb
[10:42:10] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:42:10] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:42:10] [PASSED] Fail: overflowing fb with source width
[10:42:10] [PASSED] Fail: overflowing fb with source height
[10:42:10] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:42:10] [PASSED] drm_test_framebuffer_cleanup
[10:42:10] =============== drm_test_framebuffer_create ===============
[10:42:10] [PASSED] ABGR8888 normal sizes
[10:42:10] [PASSED] ABGR8888 max sizes
[10:42:10] [PASSED] ABGR8888 pitch greater than min required
[10:42:10] [PASSED] ABGR8888 pitch less than min required
[10:42:10] [PASSED] ABGR8888 Invalid width
[10:42:10] [PASSED] ABGR8888 Invalid buffer handle
[10:42:10] [PASSED] No pixel format
[10:42:10] [PASSED] ABGR8888 Width 0
[10:42:10] [PASSED] ABGR8888 Height 0
[10:42:10] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:42:10] [PASSED] ABGR8888 Large buffer offset
[10:42:10] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:42:10] [PASSED] ABGR8888 Invalid flag
[10:42:10] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:42:10] [PASSED] ABGR8888 Valid buffer modifier
[10:42:10] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:42:10] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:42:10] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:42:10] [PASSED] NV12 Normal sizes
[10:42:10] [PASSED] NV12 Max sizes
[10:42:10] [PASSED] NV12 Invalid pitch
[10:42:10] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:42:10] [PASSED] NV12 different modifier per-plane
[10:42:10] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:42:10] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:42:10] [PASSED] NV12 Modifier for inexistent plane
[10:42:10] [PASSED] NV12 Handle for inexistent plane
[10:42:10] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:42:10] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:42:10] [PASSED] YVU420 Normal sizes
[10:42:10] [PASSED] YVU420 Max sizes
[10:42:10] [PASSED] YVU420 Invalid pitch
[10:42:10] [PASSED] YVU420 Different pitches
[10:42:10] [PASSED] YVU420 Different buffer offsets/pitches
[10:42:10] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:42:10] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:42:10] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:42:10] [PASSED] YVU420 Valid modifier
[10:42:10] [PASSED] YVU420 Different modifiers per plane
[10:42:10] [PASSED] YVU420 Modifier for inexistent plane
[10:42:10] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:42:10] [PASSED] X0L2 Normal sizes
[10:42:10] [PASSED] X0L2 Max sizes
[10:42:10] [PASSED] X0L2 Invalid pitch
[10:42:10] [PASSED] X0L2 Pitch greater than minimum required
[10:42:10] [PASSED] X0L2 Handle for inexistent plane
[10:42:10] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:42:10] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:42:10] [PASSED] X0L2 Valid modifier
[10:42:10] [PASSED] X0L2 Modifier for inexistent plane
[10:42:10] =========== [PASSED] drm_test_framebuffer_create ===========
[10:42:10] [PASSED] drm_test_framebuffer_free
[10:42:10] [PASSED] drm_test_framebuffer_init
[10:42:10] [PASSED] drm_test_framebuffer_init_bad_format
[10:42:10] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:42:10] [PASSED] drm_test_framebuffer_lookup
[10:42:10] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:42:10] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:42:10] ================= [PASSED] drm_framebuffer =================
[10:42:10] ================ drm_gem_shmem (8 subtests) ================
[10:42:10] [PASSED] drm_gem_shmem_test_obj_create
[10:42:10] [PASSED] drm_gem_shmem_test_obj_create_private
[10:42:10] [PASSED] drm_gem_shmem_test_pin_pages
[10:42:10] [PASSED] drm_gem_shmem_test_vmap
[10:42:10] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:42:10] [PASSED] drm_gem_shmem_test_get_sg_table
[10:42:10] [PASSED] drm_gem_shmem_test_madvise
[10:42:10] [PASSED] drm_gem_shmem_test_purge
[10:42:10] ================== [PASSED] drm_gem_shmem ==================
[10:42:10] === drm_atomic_helper_connector_hdmi_check (23 subtests) ===
[10:42:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:42:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:42:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:42:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:42:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:42:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:42:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:42:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:42:10] [PASSED] drm_test_check_disable_connector
[10:42:10] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:42:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback
[10:42:10] [PASSED] drm_test_check_max_tmds_rate_format_fallback
[10:42:10] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:42:10] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:42:10] [PASSED] drm_test_check_output_bpc_dvi
[10:42:10] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:42:10] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:42:10] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:42:10] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:42:10] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:42:10] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:42:10] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:42:10] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:42:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:42:10] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:42:10] [PASSED] drm_test_check_broadcast_rgb_value
[10:42:10] [PASSED] drm_test_check_bpc_8_value
[10:42:10] [PASSED] drm_test_check_bpc_10_value
[10:42:10] [PASSED] drm_test_check_bpc_12_value
[10:42:10] [PASSED] drm_test_check_format_value
[10:42:10] [PASSED] drm_test_check_tmds_char_value
[10:42:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:42:10] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[10:42:10] [PASSED] drm_test_check_mode_valid
[10:42:10] [PASSED] drm_test_check_mode_valid_reject
[10:42:10] [PASSED] drm_test_check_mode_valid_reject_rate
[10:42:10] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:42:10] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:42:10] ================= drm_managed (2 subtests) =================
[10:42:10] [PASSED] drm_test_managed_release_action
[10:42:10] [PASSED] drm_test_managed_run_action
[10:42:10] =================== [PASSED] drm_managed ===================
[10:42:10] =================== drm_mm (6 subtests) ====================
[10:42:10] [PASSED] drm_test_mm_init
[10:42:10] [PASSED] drm_test_mm_debug
[10:42:10] [PASSED] drm_test_mm_align32
[10:42:10] [PASSED] drm_test_mm_align64
[10:42:10] [PASSED] drm_test_mm_lowest
[10:42:10] [PASSED] drm_test_mm_highest
[10:42:10] ===================== [PASSED] drm_mm ======================
[10:42:10] ============= drm_modes_analog_tv (5 subtests) =============
[10:42:10] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:42:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:42:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:42:10] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:42:10] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:42:10] =============== [PASSED] drm_modes_analog_tv ===============
[10:42:10] ============== drm_plane_helper (2 subtests) ===============
[10:42:10] =============== drm_test_check_plane_state ================
[10:42:10] [PASSED] clipping_simple
[10:42:10] [PASSED] clipping_rotate_reflect
[10:42:10] [PASSED] positioning_simple
[10:42:10] [PASSED] upscaling
[10:42:10] [PASSED] downscaling
[10:42:10] [PASSED] rounding1
[10:42:10] [PASSED] rounding2
[10:42:10] [PASSED] rounding3
[10:42:10] [PASSED] rounding4
[10:42:10] =========== [PASSED] drm_test_check_plane_state ============
[10:42:10] =========== drm_test_check_invalid_plane_state ============
[10:42:10] [PASSED] positioning_invalid
[10:42:10] [PASSED] upscaling_invalid
[10:42:10] [PASSED] downscaling_invalid
[10:42:10] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:42:10] ================ [PASSED] drm_plane_helper =================
[10:42:10] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:42:10] ====== drm_test_connector_helper_tv_get_modes_check =======
[10:42:10] [PASSED] None
[10:42:10] [PASSED] PAL
[10:42:10] [PASSED] NTSC
[10:42:10] [PASSED] Both, NTSC Default
[10:42:10] [PASSED] Both, PAL Default
[10:42:10] [PASSED] Both, NTSC Default, with PAL on command-line
[10:42:10] [PASSED] Both, PAL Default, with NTSC on command-line
[10:42:10] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:42:10] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:42:10] ================== drm_rect (9 subtests) ===================
[10:42:10] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:42:10] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:42:10] [PASSED] drm_test_rect_clip_scaled_clipped
[10:42:10] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:42:10] ================= drm_test_rect_intersect =================
[10:42:10] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:42:10] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:42:10] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:42:10] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:42:10] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:42:10] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:42:10] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:42:10] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:42:10] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:42:10] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:42:10] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:42:10] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:42:10] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:42:10] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:42:10] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:42:10] ============= [PASSED] drm_test_rect_intersect =============
[10:42:10] ================ drm_test_rect_calc_hscale ================
[10:42:10] [PASSED] normal use
[10:42:10] [PASSED] out of max range
[10:42:10] [PASSED] out of min range
[10:42:10] [PASSED] zero dst
[10:42:10] [PASSED] negative src
[10:42:10] [PASSED] negative dst
[10:42:10] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:42:10] ================ drm_test_rect_calc_vscale ================
[10:42:10] [PASSED] normal use
[10:42:10] [PASSED] out of max range
[10:42:10] [PASSED] out of min range
[10:42:10] [PASSED] zero dst
[10:42:10] [PASSED] negative src
[10:42:10] [PASSED] negative dst
[10:42:10] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:42:10] ================== drm_test_rect_rotate ===================
[10:42:10] [PASSED] reflect-x
[10:42:10] [PASSED] reflect-y
[10:42:10] [PASSED] rotate-0
[10:42:10] [PASSED] rotate-90
[10:42:10] [PASSED] rotate-180
[10:42:10] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[10:42:10] ============== [PASSED] drm_test_rect_rotate ===============
[10:42:10] ================ drm_test_rect_rotate_inv =================
[10:42:10] [PASSED] reflect-x
[10:42:10] [PASSED] reflect-y
[10:42:10] [PASSED] rotate-0
[10:42:10] [PASSED] rotate-90
[10:42:10] [PASSED] rotate-180
[10:42:10] [PASSED] rotate-270
[10:42:10] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:42:10] ==================== [PASSED] drm_rect =====================
[10:42:10] ============================================================
[10:42:10] Testing complete. Ran 598 tests: passed: 598
[10:42:10] Elapsed time: 22.809s total, 1.545s configuring, 21.098s building, 0.124s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[10:42:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:42:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
[10:42:20] Starting KUnit Kernel (1/1)...
[10:42:20] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:42:20] ================= ttm_device (5 subtests) ==================
[10:42:20] [PASSED] ttm_device_init_basic
[10:42:20] [PASSED] ttm_device_init_multiple
[10:42:20] [PASSED] ttm_device_fini_basic
[10:42:20] [PASSED] ttm_device_init_no_vma_man
[10:42:20] ================== ttm_device_init_pools ==================
[10:42:20] [PASSED] No DMA allocations, no DMA32 required
[10:42:20] [PASSED] DMA allocations, DMA32 required
[10:42:20] [PASSED] No DMA allocations, DMA32 required
[10:42:20] [PASSED] DMA allocations, no DMA32 required
[10:42:20] ============== [PASSED] ttm_device_init_pools ==============
[10:42:20] =================== [PASSED] ttm_device ====================
[10:42:20] ================== ttm_pool (8 subtests) ===================
[10:42:20] ================== ttm_pool_alloc_basic ===================
[10:42:20] [PASSED] One page
[10:42:20] [PASSED] More than one page
[10:42:20] [PASSED] Above the allocation limit
[10:42:20] [PASSED] One page, with coherent DMA mappings enabled
[10:42:20] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:42:20] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:42:20] ============== ttm_pool_alloc_basic_dma_addr ==============
[10:42:20] [PASSED] One page
[10:42:20] [PASSED] More than one page
[10:42:20] [PASSED] Above the allocation limit
[10:42:20] [PASSED] One page, with coherent DMA mappings enabled
[10:42:20] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:42:20] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:42:20] [PASSED] ttm_pool_alloc_order_caching_match
[10:42:20] [PASSED] ttm_pool_alloc_caching_mismatch
[10:42:20] [PASSED] ttm_pool_alloc_order_mismatch
[10:42:20] [PASSED] ttm_pool_free_dma_alloc
[10:42:20] [PASSED] ttm_pool_free_no_dma_alloc
[10:42:20] [PASSED] ttm_pool_fini_basic
[10:42:20] ==================== [PASSED] ttm_pool =====================
[10:42:20] ================ ttm_resource (8 subtests) =================
[10:42:20] ================= ttm_resource_init_basic =================
[10:42:20] [PASSED] Init resource in TTM_PL_SYSTEM
[10:42:20] [PASSED] Init resource in TTM_PL_VRAM
[10:42:20] [PASSED] Init resource in a private placement
[10:42:20] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[10:42:20] ============= [PASSED] ttm_resource_init_basic =============
[10:42:20] [PASSED] ttm_resource_init_pinned
[10:42:20] [PASSED] ttm_resource_fini_basic
[10:42:20] [PASSED] ttm_resource_manager_init_basic
[10:42:20] [PASSED] ttm_resource_manager_usage_basic
[10:42:20] [PASSED] ttm_resource_manager_set_used_basic
[10:42:20] [PASSED] ttm_sys_man_alloc_basic
[10:42:20] [PASSED] ttm_sys_man_free_basic
[10:42:20] ================== [PASSED] ttm_resource ===================
[10:42:20] =================== ttm_tt (15 subtests) ===================
[10:42:20] ==================== ttm_tt_init_basic ====================
[10:42:20] [PASSED] Page-aligned size
[10:42:20] [PASSED] Extra pages requested
[10:42:20] ================ [PASSED] ttm_tt_init_basic ================
[10:42:20] [PASSED] ttm_tt_init_misaligned
[10:42:20] [PASSED] ttm_tt_fini_basic
[10:42:20] [PASSED] ttm_tt_fini_sg
[10:42:20] [PASSED] ttm_tt_fini_shmem
[10:42:20] [PASSED] ttm_tt_create_basic
[10:42:20] [PASSED] ttm_tt_create_invalid_bo_type
[10:42:20] [PASSED] ttm_tt_create_ttm_exists
[10:42:20] [PASSED] ttm_tt_create_failed
[10:42:20] [PASSED] ttm_tt_destroy_basic
[10:42:20] [PASSED] ttm_tt_populate_null_ttm
[10:42:20] [PASSED] ttm_tt_populate_populated_ttm
[10:42:20] [PASSED] ttm_tt_unpopulate_basic
[10:42:20] [PASSED] ttm_tt_unpopulate_empty_ttm
[10:42:20] [PASSED] ttm_tt_swapin_basic
[10:42:20] ===================== [PASSED] ttm_tt ======================
[10:42:20] =================== ttm_bo (14 subtests) ===================
[10:42:20] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[10:42:20] [PASSED] Cannot be interrupted and sleeps
[10:42:20] [PASSED] Cannot be interrupted, locks straight away
[10:42:20] [PASSED] Can be interrupted, sleeps
[10:42:20] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[10:42:20] [PASSED] ttm_bo_reserve_locked_no_sleep
[10:42:20] [PASSED] ttm_bo_reserve_no_wait_ticket
[10:42:20] [PASSED] ttm_bo_reserve_double_resv
[10:42:20] [PASSED] ttm_bo_reserve_interrupted
[10:42:20] [PASSED] ttm_bo_reserve_deadlock
[10:42:20] [PASSED] ttm_bo_unreserve_basic
[10:42:20] [PASSED] ttm_bo_unreserve_pinned
[10:42:20] [PASSED] ttm_bo_unreserve_bulk
[10:42:20] [PASSED] ttm_bo_put_basic
[10:42:20] [PASSED] ttm_bo_put_shared_resv
[10:42:20] [PASSED] ttm_bo_pin_basic
[10:42:20] [PASSED] ttm_bo_pin_unpin_resource
[10:42:20] [PASSED] ttm_bo_multiple_pin_one_unpin
[10:42:20] ===================== [PASSED] ttm_bo ======================
[10:42:20] ============== ttm_bo_validate (22 subtests) ===============
[10:42:20] ============== ttm_bo_init_reserved_sys_man ===============
[10:42:20] [PASSED] Buffer object for userspace
[10:42:20] [PASSED] Kernel buffer object
[10:42:20] [PASSED] Shared buffer object
[10:42:20] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[10:42:20] ============== ttm_bo_init_reserved_mock_man ==============
[10:42:20] [PASSED] Buffer object for userspace
[10:42:20] [PASSED] Kernel buffer object
[10:42:20] [PASSED] Shared buffer object
[10:42:20] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[10:42:20] [PASSED] ttm_bo_init_reserved_resv
[10:42:20] ================== ttm_bo_validate_basic ==================
[10:42:20] [PASSED] Buffer object for userspace
[10:42:20] [PASSED] Kernel buffer object
[10:42:20] [PASSED] Shared buffer object
[10:42:20] ============== [PASSED] ttm_bo_validate_basic ==============
[10:42:20] [PASSED] ttm_bo_validate_invalid_placement
[10:42:20] ============= ttm_bo_validate_same_placement ==============
[10:42:20] [PASSED] System manager
[10:42:20] [PASSED] VRAM manager
[10:42:20] ========= [PASSED] ttm_bo_validate_same_placement ==========
[10:42:20] [PASSED] ttm_bo_validate_failed_alloc
[10:42:20] [PASSED] ttm_bo_validate_pinned
[10:42:20] [PASSED] ttm_bo_validate_busy_placement
[10:42:20] ================ ttm_bo_validate_multihop =================
[10:42:20] [PASSED] Buffer object for userspace
[10:42:20] [PASSED] Kernel buffer object
[10:42:20] [PASSED] Shared buffer object
[10:42:20] ============ [PASSED] ttm_bo_validate_multihop =============
[10:42:20] ========== ttm_bo_validate_no_placement_signaled ==========
[10:42:20] [PASSED] Buffer object in system domain, no page vector
[10:42:20] [PASSED] Buffer object in system domain with an existing page vector
[10:42:20] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[10:42:20] ======== ttm_bo_validate_no_placement_not_signaled ========
[10:42:20] [PASSED] Buffer object for userspace
[10:42:20] [PASSED] Kernel buffer object
[10:42:20] [PASSED] Shared buffer object
[10:42:20] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[10:42:20] [PASSED] ttm_bo_validate_move_fence_signaled
[10:42:20] ========= ttm_bo_validate_move_fence_not_signaled =========
[10:42:20] [PASSED] Waits for GPU
[10:42:20] [PASSED] Tries to lock straight away
[10:42:20] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[10:42:20] [PASSED] ttm_bo_validate_swapout
[10:42:20] [PASSED] ttm_bo_validate_happy_evict
[10:42:20] [PASSED] ttm_bo_validate_all_pinned_evict
[10:42:20] [PASSED] ttm_bo_validate_allowed_only_evict
[10:42:20] [PASSED] ttm_bo_validate_deleted_evict
[10:42:20] [PASSED] ttm_bo_validate_busy_domain_evict
[10:42:20] [PASSED] ttm_bo_validate_evict_gutting
[10:42:20] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[10:42:20] ================= [PASSED] ttm_bo_validate =================
[10:42:20] ============================================================
[10:42:20] Testing complete. Ran 102 tests: passed: 102
[10:42:20] Elapsed time: 9.979s total, 1.677s configuring, 7.685s building, 0.523s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v5 0/8] PMU support for engine activity
@ 2025-02-06 10:43 Riana Tauro
2025-02-06 10:40 ` ✓ CI.Patch_applied: success for " Patchwork
` (15 more replies)
0 siblings, 16 replies; 39+ messages in thread
From: Riana Tauro @ 2025-02-06 10:43 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, umesh.nerlige.ramappa,
lucas.demarchi, vinay.belgaumkar, soham.purkait
This series adds support for engine activity for native and PF and VF's
PMU provides two counters (engine-active-ticks, engine-total-ticks)
to calculate engine activity. When querying this, user must group
these 2 counters using the perf_event group mechanism to ensure
both counters are sampled together.
To list the events
./perf list
xe_0000_03_00.0/engine-active-ticks/ [Kernel PMU event]
xe_0000_03_00.0/engine-total-ticks/ [Kernel PMU event]
The formats to be used with the above are
gt - config:60-63
function - config:59-44
engine_class - config:20-27
engine_instance - config:12-19
The events can then be read using perf tool
./perf stat -e xe_<bdf>/engine-active-ticks,gt=<n>,engine_class=<n>,
engine_instance=<n>,function=<n>/,
xe_<bdf>/engine-total-ticks,gt=<n>,engine_class=<n>,
engine_instance=<n>,function<n>/
-I 1000
Engine activity can then be calculated as below
engine activity % = (engine active ticks/engine total ticks) * 100
Rev2: Add trace functions
fix cosmetic review comments
Rev3: add engine class and instance as parameters
replace busyness with engine activity
Rev4: add per-function engine activity
fix review comments
Rev5: Remove global for SRIOV
Add forcewake during init and destroy
fix other review comments
Riana Tauro (8):
drm/xe: Add engine activity support
drm/xe/trace: Add trace for engine activity
drm/xe/guc: Expose engine activity only for supported GuC version
drm/xe/xe_pmu: Add PMU support for engine activity
drm/xe/xe_pmu: Acquire forcewake on event init for engine events
drm/xe: Add support for per-function engine activity
drm/xe/xe_pmu: Add pmu support for per-function engine activity stats
drm/xe/pf: Enable per-function engine activity stats
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/abi/guc_actions_abi.h | 2 +
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 26 +-
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h | 1 +
drivers/gpu/drm/xe/xe_guc.c | 5 +
drivers/gpu/drm/xe/xe_guc_engine_activity.c | 514 ++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_engine_activity.h | 20 +
.../gpu/drm/xe/xe_guc_engine_activity_types.h | 98 ++++
drivers/gpu/drm/xe/xe_guc_fwif.h | 19 +
drivers/gpu/drm/xe/xe_guc_types.h | 4 +
drivers/gpu/drm/xe/xe_pci_sriov.c | 25 +
drivers/gpu/drm/xe/xe_pmu.c | 203 ++++++-
drivers/gpu/drm/xe/xe_pmu_types.h | 8 +
drivers/gpu/drm/xe/xe_trace_guc.h | 49 ++
drivers/gpu/drm/xe/xe_uc.c | 3 +
16 files changed, 965 insertions(+), 15 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_guc_engine_activity.c
create mode 100644 drivers/gpu/drm/xe/xe_guc_engine_activity.h
create mode 100644 drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
--
2.47.1
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v5 1/8] drm/xe: Add engine activity support
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (2 preceding siblings ...)
2025-02-06 10:42 ` ✓ CI.KUnit: success " Patchwork
@ 2025-02-06 10:43 ` Riana Tauro
2025-02-06 18:28 ` Michal Wajdeczko
2025-02-06 10:43 ` [PATCH v5 2/8] drm/xe/trace: Add trace for engine activity Riana Tauro
` (11 subsequent siblings)
15 siblings, 1 reply; 39+ messages in thread
From: Riana Tauro @ 2025-02-06 10:43 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, umesh.nerlige.ramappa,
lucas.demarchi, vinay.belgaumkar, soham.purkait
GuC provides support to read engine counters to calculate the
engine activity. KMD exposes two counters via the PMU interface to
calculate engine activity
Engine Active Ticks(engine-active-ticks) - active ticks of engine
Engine Total Ticks (engine-total-ticks) - total ticks of engine
Engine activity percentage can be calculated as below
Engine activity % = (engine active ticks/engine total ticks) * 100.
v2: fix cosmetic review comments
add forcewake for gpm_ts (Umesh)
v3: fix CI hooks error
change function parameters and unpin bo on error
of allocate_activity_buffers
fix kernel-doc (Umesh)
use engine activity (Umesh, Lucas)
rename xe_engine_activity to xe_guc_engine_*
fix commit message to use engine activity (Lucas, Umesh)
v4: remove forcewake as engine is already running
when reading gpm timestamp
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/abi/guc_actions_abi.h | 1 +
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +
drivers/gpu/drm/xe/xe_guc_engine_activity.c | 317 ++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_engine_activity.h | 18 +
.../gpu/drm/xe/xe_guc_engine_activity_types.h | 89 +++++
drivers/gpu/drm/xe/xe_guc_fwif.h | 19 ++
drivers/gpu/drm/xe/xe_guc_types.h | 4 +
8 files changed, 451 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_guc_engine_activity.c
create mode 100644 drivers/gpu/drm/xe/xe_guc_engine_activity.h
create mode 100644 drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 5ce65ccb3c08..aa5673f6aadf 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -33,6 +33,7 @@ xe-y += xe_bb.o \
xe_device_sysfs.o \
xe_dma_buf.o \
xe_drm_client.o \
+ xe_guc_engine_activity.o \
xe_exec.o \
xe_exec_queue.o \
xe_execlist.o \
diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
index fee385532fb0..ec516e838ee8 100644
--- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
@@ -140,6 +140,7 @@ enum xe_guc_action {
XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC = 0x4601,
XE_GUC_ACTION_CLIENT_SOFT_RESET = 0x5507,
XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A,
+ XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C,
XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000,
XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002,
XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003,
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 096859072396..124cc398798e 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -358,6 +358,8 @@
#define RENDER_AWAKE_STATUS REG_BIT(1)
#define MEDIA_SLICE0_AWAKE_STATUS REG_BIT(0)
+#define MISC_STATUS_0 XE_REG(0xa500)
+
#define FORCEWAKE_MEDIA_VDBOX(n) XE_REG(0xa540 + (n) * 4)
#define FORCEWAKE_MEDIA_VEBOX(n) XE_REG(0xa560 + (n) * 4)
#define FORCEWAKE_GSC XE_REG(0xa618)
diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
new file mode 100644
index 000000000000..088209b9c228
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
@@ -0,0 +1,317 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+#include "xe_guc_engine_activity.h"
+
+#include "abi/guc_actions_abi.h"
+#include "regs/xe_gt_regs.h"
+
+#include "xe_bo.h"
+#include "xe_force_wake.h"
+#include "xe_gt_printk.h"
+#include "xe_guc.h"
+#include "xe_guc_ct.h"
+#include "xe_hw_engine.h"
+#include "xe_map.h"
+#include "xe_mmio.h"
+
+#define TOTAL_QUANTA 0x8000
+
+static struct iosys_map engine_activity_map(struct xe_guc *guc, struct xe_hw_engine *hwe)
+{
+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
+ struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
+ u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
+ size_t offset = 0;
+
+ offset = offsetof(struct guc_engine_activity_data,
+ engine_activity[guc_class][hwe->logical_instance]);
+
+ return IOSYS_MAP_INIT_OFFSET(&buffer->activity_bo->vmap, offset);
+}
+
+static struct iosys_map engine_metadata_map(struct xe_guc *guc)
+{
+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
+ struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
+
+ return buffer->metadata_bo->vmap;
+}
+
+static int allocate_engine_activity_group(struct xe_guc *guc)
+{
+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
+ u32 num_activity_group = 1;
+
+ engine_activity->eag = kmalloc_array(num_activity_group,
+ sizeof(struct engine_activity_group),
+ GFP_KERNEL);
+
+ if (!engine_activity->eag)
+ return -ENOMEM;
+
+ memset(engine_activity->eag, 0, num_activity_group * sizeof(struct engine_activity_group));
+ engine_activity->num_activity_group = num_activity_group;
+
+ return 0;
+}
+
+static int allocate_engine_activity_buffers(struct xe_guc *guc,
+ struct engine_activity_buffer *buffer)
+{
+ u32 metadata_size = sizeof(struct guc_engine_activity_metadata);
+ u32 size = sizeof(struct guc_engine_activity_data);
+ struct xe_gt *gt = guc_to_gt(guc);
+ struct xe_tile *tile = gt_to_tile(gt);
+ struct xe_bo *bo, *metadata_bo;
+
+ metadata_bo = xe_managed_bo_create_pin_map(gt_to_xe(gt), tile, PAGE_ALIGN(metadata_size),
+ XE_BO_FLAG_SYSTEM |
+ XE_BO_FLAG_GGTT |
+ XE_BO_FLAG_GGTT_INVALIDATE);
+ if (IS_ERR(metadata_bo))
+ return PTR_ERR(metadata_bo);
+
+ bo = xe_managed_bo_create_pin_map(gt_to_xe(gt), tile, PAGE_ALIGN(size),
+ XE_BO_FLAG_VRAM_IF_DGFX(tile) |
+ XE_BO_FLAG_GGTT |
+ XE_BO_FLAG_GGTT_INVALIDATE);
+
+ if (IS_ERR(bo)) {
+ xe_bo_unpin_map_no_vm(metadata_bo);
+ return PTR_ERR(bo);
+ }
+
+ buffer->metadata_bo = metadata_bo;
+ buffer->activity_bo = bo;
+ return 0;
+}
+
+static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe)
+{
+ struct xe_guc *guc = &hwe->gt->uc.guc;
+ struct engine_activity_group *eag = &guc->engine_activity.eag[0];
+ u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
+
+ return &eag->engine[guc_class][hwe->logical_instance];
+}
+
+static u64 cpu_ns_to_guc_tsc_tick(ktime_t ns, u32 freq)
+{
+ return mul_u64_u32_div(ns, freq, NSEC_PER_SEC);
+}
+
+#define read_engine_activity_record(xe_, map_, field_) \
+ xe_map_rd_field(xe_, map_, 0, struct guc_engine_activity, field_)
+
+#define read_metadata_record(xe_, map_, field_) \
+ xe_map_rd_field(xe_, map_, 0, struct guc_engine_activity_metadata, field_)
+
+static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
+{
+ struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
+ struct guc_engine_activity *cached_activity = &ea->activity;
+ struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
+ struct iosys_map activity_map, metadata_map;
+ struct xe_device *xe = guc_to_xe(guc);
+ struct xe_gt *gt = guc_to_gt(guc);
+ u32 last_update_tick, global_change_num;
+ u64 active_ticks, gpm_ts;
+ u16 change_num;
+
+ activity_map = engine_activity_map(guc, hwe);
+ metadata_map = engine_metadata_map(guc);
+ global_change_num = read_metadata_record(xe, &metadata_map, global_change_num);
+
+ /* GuC has not initialized activity data yet, return 0 */
+ if (!global_change_num)
+ goto update;
+
+ if (global_change_num == cached_metadata->global_change_num)
+ goto update;
+ else
+ cached_metadata->global_change_num = global_change_num;
+
+ change_num = read_engine_activity_record(xe, &activity_map, change_num);
+
+ if (!change_num || change_num == cached_activity->change_num)
+ goto update;
+
+ /* read engine activity values */
+ last_update_tick = read_engine_activity_record(xe, &activity_map, last_update_tick);
+ active_ticks = read_engine_activity_record(xe, &activity_map, active_ticks);
+
+ /* activity calculations */
+ ea->running = !!last_update_tick;
+ ea->total += active_ticks - cached_activity->active_ticks;
+ ea->active = 0;
+
+ /* cache the counter */
+ cached_activity->change_num = change_num;
+ cached_activity->last_update_tick = last_update_tick;
+ cached_activity->active_ticks = active_ticks;
+
+update:
+ if (ea->running) {
+ gpm_ts = xe_mmio_read64_2x32(>->mmio, MISC_STATUS_0) >>
+ engine_activity->gpm_timestamp_shift;
+ ea->active = lower_32_bits(gpm_ts) - cached_activity->last_update_tick;
+ }
+
+ return ea->total + ea->active;
+}
+
+static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
+{
+ struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
+ struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
+ struct guc_engine_activity *cached_activity = &ea->activity;
+ struct iosys_map activity_map, metadata_map;
+ struct xe_device *xe = guc_to_xe(guc);
+ ktime_t now, cpu_delta;
+ u64 numerator;
+ u16 quanta_ratio;
+
+ activity_map = engine_activity_map(guc, hwe);
+ metadata_map = engine_metadata_map(guc);
+
+ if (!cached_metadata->guc_tsc_frequency_hz)
+ cached_metadata->guc_tsc_frequency_hz = read_metadata_record(xe, &metadata_map,
+ guc_tsc_frequency_hz);
+
+ quanta_ratio = read_engine_activity_record(xe, &activity_map, quanta_ratio);
+ cached_activity->quanta_ratio = quanta_ratio;
+
+ /* Total ticks calculations */
+ now = ktime_get();
+ cpu_delta = now - ea->last_cpu_ts;
+ ea->last_cpu_ts = now;
+ numerator = (ea->quanta_remainder_ns + cpu_delta) * cached_activity->quanta_ratio;
+ ea->quanta_ns += numerator / TOTAL_QUANTA;
+ ea->quanta_remainder_ns = numerator % TOTAL_QUANTA;
+ ea->quanta = cpu_ns_to_guc_tsc_tick(ea->quanta_ns, cached_metadata->guc_tsc_frequency_hz);
+
+ return ea->quanta;
+}
+
+static int enable_engine_activity_stats(struct xe_guc *guc)
+{
+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
+ struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
+ u32 metadata_ggtt_addr = xe_bo_ggtt_addr(buffer->metadata_bo);
+ u32 ggtt_addr = xe_bo_ggtt_addr(buffer->activity_bo);
+ int len = 0;
+ u32 action[5];
+
+ action[len++] = XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER;
+ action[len++] = metadata_ggtt_addr;
+ action[len++] = 0;
+ action[len++] = ggtt_addr;
+ action[len++] = 0;
+
+ /* Blocking here to ensure the buffers are ready before reading them */
+ return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action));
+}
+
+static void engine_activity_set_cpu_ts(struct xe_guc *guc)
+{
+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
+ struct engine_activity_group *eag = &engine_activity->eag[0];
+ int i, j;
+
+ for (i = 0; i < GUC_MAX_ENGINE_CLASSES; i++)
+ for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; j++)
+ eag->engine[i][j].last_cpu_ts = ktime_get();
+}
+
+static u32 gpm_timestamp_shift(struct xe_gt *gt)
+{
+ u32 reg;
+
+ reg = xe_mmio_read32(>->mmio, RPM_CONFIG0);
+
+ return 3 - REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
+}
+
+/**
+ * xe_guc_engine_activity_active_ticks - Get engine active ticks
+ * @hwe: The hw_engine object
+ *
+ * Return: accumulated ticks @hwe was active since engine activity stats were enabled.
+ */
+u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe)
+{
+ struct xe_guc *guc = &hwe->gt->uc.guc;
+
+ return get_engine_active_ticks(guc, hwe);
+}
+
+/**
+ * xe_guc_engine_activity_total_ticks - Get engine total ticks
+ * @hwe: The hw_engine object
+ *
+ * Return: accumulated quanta of ticks allocated for the engine
+ */
+u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe)
+{
+ struct xe_guc *guc = &hwe->gt->uc.guc;
+
+ return get_engine_total_ticks(guc, hwe);
+}
+
+/**
+ * xe_guc_engine_activity_enable_stats - Enable engine activity stats
+ * @guc: The GuC object
+ *
+ * Enable engine activity stats and set initial timestamps
+ */
+void xe_guc_engine_activity_enable_stats(struct xe_guc *guc)
+{
+ int ret;
+
+ ret = enable_engine_activity_stats(guc);
+ if (ret)
+ xe_gt_err(guc_to_gt(guc), "failed to enable activity stats%d\n", ret);
+ else
+ engine_activity_set_cpu_ts(guc);
+}
+
+static void engine_activity_fini(void *arg)
+{
+ struct xe_guc_engine_activity *engine_activity = arg;
+
+ kfree(engine_activity->eag);
+}
+
+/**
+ * xe_guc_engine_activity_init - Initialize the engine activity data
+ * @guc: The GuC object
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+int xe_guc_engine_activity_init(struct xe_guc *guc)
+{
+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
+ struct xe_gt *gt = guc_to_gt(guc);
+ int ret;
+
+ ret = allocate_engine_activity_group(guc);
+ if (ret) {
+ xe_gt_err(gt, "failed to allocate activity group %d\n", ret);
+ return ret;
+ }
+
+ ret = allocate_engine_activity_buffers(guc, &engine_activity->device_buffer);
+ if (ret) {
+ xe_gt_err(gt, "failed to allocate activity buffers%d\n", ret);
+ kfree(engine_activity->eag);
+ return ret;
+ }
+
+ engine_activity->gpm_timestamp_shift = gpm_timestamp_shift(gt);
+
+ return devm_add_action_or_reset(gt_to_xe(gt)->drm.dev, engine_activity_fini,
+ engine_activity);
+}
diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.h b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
new file mode 100644
index 000000000000..c00f3da5513d
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef _XE_GUC_ENGINE_ACTIVITY_H_
+#define _XE_GUC_ENGINE_ACTIVITY_H_
+
+#include <linux/types.h>
+
+struct xe_hw_engine;
+struct xe_guc;
+
+int xe_guc_engine_activity_init(struct xe_guc *guc);
+void xe_guc_engine_activity_enable_stats(struct xe_guc *guc);
+u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe);
+u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe);
+#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
new file mode 100644
index 000000000000..a2ab327d3eec
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
@@ -0,0 +1,89 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef _XE_GUC_ENGINE_ACTIVITY_TYPES_H_
+#define _XE_GUC_ENGINE_ACTIVITY_TYPES_H_
+
+#include <linux/types.h>
+
+#include "xe_guc_fwif.h"
+/**
+ * struct engine_activity - Engine specific activity data
+ *
+ * Contains engine specific activity data and snapshot of the
+ * structures from GuC
+ */
+struct engine_activity {
+ /** @active: current activity */
+ u64 active;
+
+ /** @last_cpu_ts: cpu timestamp in nsec of previous sample */
+ u64 last_cpu_ts;
+
+ /** @quanta: total quanta used on HW */
+ u64 quanta;
+
+ /** @quanta_ns: total quanta_ns used on HW */
+ u64 quanta_ns;
+
+ /**
+ * @quanta_remainder_ns: remainder when the CPU time is scaled as
+ * per the quanta_ratio. This remainder is used in subsequent
+ * quanta calculations.
+ */
+ u64 quanta_remainder_ns;
+
+ /** @total: total engine activity */
+ u64 total;
+
+ /** @running: true if engine is running some work */
+ bool running;
+
+ /** @metadata: snapshot of engine activity metadata */
+ struct guc_engine_activity_metadata metadata;
+
+ /** @activity: snapshot of engine activity counter */
+ struct guc_engine_activity activity;
+};
+
+/**
+ * struct engine_activity_group - Activity data for all engines
+ */
+struct engine_activity_group {
+ /** @engine: engine specific activity data */
+ struct engine_activity engine[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
+};
+
+/**
+ * struct engine_activity_buffer - engine activity buffers
+ *
+ * This contains the buffers allocated for metadata and activity data
+ */
+struct engine_activity_buffer {
+ /** @activity_bo: object allocated to hold activity data */
+ struct xe_bo *activity_bo;
+
+ /** @metadata_bo: object allocated to hold activity metadata */
+ struct xe_bo *metadata_bo;
+};
+
+/**
+ * struct xe_guc_engine_activity - Data used by engine activity implementation
+ */
+struct xe_guc_engine_activity {
+ /** @gpm_timestamp_shift: Right shift value for the gpm timestamp */
+ u32 gpm_timestamp_shift;
+
+ /** @num_activity_group: number of activity groups */
+ u32 num_activity_group;
+
+ /** @eag: holds the device level engine activity data */
+ struct engine_activity_group *eag;
+
+ /** @device_buffer: buffer object for global engine activity */
+ struct engine_activity_buffer device_buffer;
+};
+#endif
+
diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
index 057153f89b30..6f57578b07cb 100644
--- a/drivers/gpu/drm/xe/xe_guc_fwif.h
+++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
@@ -208,6 +208,25 @@ struct guc_engine_usage {
struct guc_engine_usage_record engines[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
} __packed;
+/* Engine Activity stats */
+struct guc_engine_activity {
+ u16 change_num;
+ u16 quanta_ratio;
+ u32 last_update_tick;
+ u64 active_ticks;
+} __packed;
+
+struct guc_engine_activity_data {
+ struct guc_engine_activity engine_activity[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
+} __packed;
+
+struct guc_engine_activity_metadata {
+ u32 guc_tsc_frequency_hz;
+ u32 lag_latency_usec;
+ u32 global_change_num;
+ u32 reserved;
+} __packed;
+
/* This action will be programmed in C1BC - SOFT_SCRATCH_15_REG */
enum xe_guc_recv_message {
XE_GUC_RECV_MSG_CRASH_DUMP_POSTED = BIT(1),
diff --git a/drivers/gpu/drm/xe/xe_guc_types.h b/drivers/gpu/drm/xe/xe_guc_types.h
index 573aa6308380..63bac64429a5 100644
--- a/drivers/gpu/drm/xe/xe_guc_types.h
+++ b/drivers/gpu/drm/xe/xe_guc_types.h
@@ -13,6 +13,7 @@
#include "xe_guc_ads_types.h"
#include "xe_guc_buf_types.h"
#include "xe_guc_ct_types.h"
+#include "xe_guc_engine_activity_types.h"
#include "xe_guc_fwif.h"
#include "xe_guc_log_types.h"
#include "xe_guc_pc_types.h"
@@ -103,6 +104,9 @@ struct xe_guc {
/** @relay: GuC Relay Communication used in SR-IOV */
struct xe_guc_relay relay;
+ /** @engine_activity: Device specific engine activity */
+ struct xe_guc_engine_activity engine_activity;
+
/**
* @notify_reg: Register which is written to notify GuC of H2G messages
*/
--
2.47.1
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v5 2/8] drm/xe/trace: Add trace for engine activity
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (3 preceding siblings ...)
2025-02-06 10:43 ` [PATCH v5 1/8] drm/xe: Add engine activity support Riana Tauro
@ 2025-02-06 10:43 ` Riana Tauro
2025-02-06 10:43 ` [PATCH v5 3/8] drm/xe/guc: Expose engine activity only for supported GuC version Riana Tauro
` (10 subsequent siblings)
15 siblings, 0 replies; 39+ messages in thread
From: Riana Tauro @ 2025-02-06 10:43 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, umesh.nerlige.ramappa,
lucas.demarchi, vinay.belgaumkar, soham.purkait
Add engine activity related information to trace events for
better debuggability
v2: add trace for engine activity (Umesh)
v3: use hex for quanta_ratio
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
drivers/gpu/drm/xe/xe_guc_engine_activity.c | 5 +++
drivers/gpu/drm/xe/xe_trace_guc.h | 49 +++++++++++++++++++++
2 files changed, 54 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
index 088209b9c228..9c08af273397 100644
--- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
@@ -15,6 +15,7 @@
#include "xe_hw_engine.h"
#include "xe_map.h"
#include "xe_mmio.h"
+#include "xe_trace_guc.h"
#define TOTAL_QUANTA 0x8000
@@ -160,6 +161,8 @@ static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
ea->active = lower_32_bits(gpm_ts) - cached_activity->last_update_tick;
}
+ trace_xe_guc_engine_activity(xe, ea, hwe->name, hwe->instance);
+
return ea->total + ea->active;
}
@@ -193,6 +196,8 @@ static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
ea->quanta_remainder_ns = numerator % TOTAL_QUANTA;
ea->quanta = cpu_ns_to_guc_tsc_tick(ea->quanta_ns, cached_metadata->guc_tsc_frequency_hz);
+ trace_xe_guc_engine_activity(xe, ea, hwe->name, hwe->instance);
+
return ea->quanta;
}
diff --git a/drivers/gpu/drm/xe/xe_trace_guc.h b/drivers/gpu/drm/xe/xe_trace_guc.h
index 23abdd55dc62..78949db9cfce 100644
--- a/drivers/gpu/drm/xe/xe_trace_guc.h
+++ b/drivers/gpu/drm/xe/xe_trace_guc.h
@@ -14,6 +14,7 @@
#include "xe_device_types.h"
#include "xe_guc_exec_queue_types.h"
+#include "xe_guc_engine_activity_types.h"
#define __dev_name_xe(xe) dev_name((xe)->drm.dev)
@@ -100,6 +101,54 @@ DEFINE_EVENT_PRINT(xe_guc_ctb, xe_guc_ctb_g2h,
);
+TRACE_EVENT(xe_guc_engine_activity,
+ TP_PROTO(struct xe_device *xe, struct engine_activity *ea, const char *name,
+ u16 instance),
+ TP_ARGS(xe, ea, name, instance),
+
+ TP_STRUCT__entry(
+ __string(dev, __dev_name_xe(xe))
+ __string(name, name)
+ __field(u32, global_change_num)
+ __field(u32, guc_tsc_frequency_hz)
+ __field(u32, lag_latency_usec)
+ __field(u16, instance)
+ __field(u16, change_num)
+ __field(u16, quanta_ratio)
+ __field(u32, last_update_tick)
+ __field(u64, active_ticks)
+ __field(u64, active)
+ __field(u64, total)
+ __field(u64, quanta)
+ __field(u64, last_cpu_ts)
+ ),
+
+ TP_fast_assign(
+ __assign_str(dev);
+ __assign_str(name);
+ __entry->global_change_num = ea->metadata.global_change_num;
+ __entry->guc_tsc_frequency_hz = ea->metadata.guc_tsc_frequency_hz;
+ __entry->lag_latency_usec = ea->metadata.lag_latency_usec;
+ __entry->instance = instance;
+ __entry->change_num = ea->activity.change_num;
+ __entry->quanta_ratio = ea->activity.quanta_ratio;
+ __entry->last_update_tick = ea->activity.last_update_tick;
+ __entry->active_ticks = ea->activity.active_ticks;
+ __entry->active = ea->active;
+ __entry->total = ea->total;
+ __entry->quanta = ea->quanta;
+ __entry->last_cpu_ts = ea->last_cpu_ts;
+ ),
+
+ TP_printk("dev=%s engine %s:%d Active=%llu, quanta=%llu, last_cpu_ts=%llu\n"
+ "Activity metadata: global_change_num=%u, guc_tsc_frequency_hz=%u lag_latency_usec=%u\n"
+ "Activity data: change_num=%u, quanta_ratio=0x%x, last_update_tick=%u, active_ticks=%llu\n",
+ __get_str(dev), __get_str(name), __entry->instance,
+ (__entry->active + __entry->total), __entry->quanta, __entry->last_cpu_ts,
+ __entry->global_change_num, __entry->guc_tsc_frequency_hz,
+ __entry->lag_latency_usec, __entry->change_num, __entry->quanta_ratio,
+ __entry->last_update_tick, __entry->active_ticks)
+);
#endif
/* This part must be outside protection */
--
2.47.1
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v5 3/8] drm/xe/guc: Expose engine activity only for supported GuC version
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (4 preceding siblings ...)
2025-02-06 10:43 ` [PATCH v5 2/8] drm/xe/trace: Add trace for engine activity Riana Tauro
@ 2025-02-06 10:43 ` Riana Tauro
2025-02-06 18:39 ` Michal Wajdeczko
2025-02-07 21:37 ` Umesh Nerlige Ramappa
2025-02-06 10:43 ` [PATCH v5 4/8] drm/xe/xe_pmu: Add PMU support for engine activity Riana Tauro
` (9 subsequent siblings)
15 siblings, 2 replies; 39+ messages in thread
From: Riana Tauro @ 2025-02-06 10:43 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, umesh.nerlige.ramappa,
lucas.demarchi, vinay.belgaumkar, soham.purkait, John Harrison,
Michal Wajdeczko
Engine activity is supported only on GuC submission version >= 1.14.1
Allow enabling/reading engine activity only on supported
GuC versions. Warn once if not supported.
v2: use guc interface version (John)
v3: do not use drm_WARN (Umesh)
v4: use variable for supported and use gt logs
use a friendlier log message (Michal)
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
drivers/gpu/drm/xe/xe_guc_engine_activity.c | 42 +++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_engine_activity.h | 1 +
.../gpu/drm/xe/xe_guc_engine_activity_types.h | 3 ++
3 files changed, 46 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
index 9c08af273397..5d67fe38639a 100644
--- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
@@ -89,6 +89,22 @@ static int allocate_engine_activity_buffers(struct xe_guc *guc,
return 0;
}
+static bool engine_activity_supported(struct xe_guc *guc)
+{
+ struct xe_uc_fw_version *version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
+ struct xe_gt *gt = guc_to_gt(guc);
+
+ /* engine activity stats is supported from GuC interface version (1.14.1) */
+ if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 14, 1))
+ return true;
+
+ xe_gt_warn(gt,
+ "engine activity stats unsupported in GuC interface v%u.%u.%u, v%u.%u.%u or newer required\n",
+ version->major, version->minor, version->patch, 1, 14, 1);
+
+ return false;
+}
+
static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe)
{
struct xe_guc *guc = &hwe->gt->uc.guc;
@@ -250,6 +266,9 @@ u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe)
{
struct xe_guc *guc = &hwe->gt->uc.guc;
+ if (!xe_guc_engine_activity_supported(guc))
+ return 0;
+
return get_engine_active_ticks(guc, hwe);
}
@@ -263,9 +282,27 @@ u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe)
{
struct xe_guc *guc = &hwe->gt->uc.guc;
+ if (!xe_guc_engine_activity_supported(guc))
+ return 0;
+
return get_engine_total_ticks(guc, hwe);
}
+/**
+ * xe_guc_engine_activity_supported - Check support for engine activity stats
+ * @guc: The GuC object
+ *
+ * Engine activity stats is supported from GuC interface version (1.14.1)
+ *
+ * Return: true if engine activity stats supported, false otherwise
+ */
+bool xe_guc_engine_activity_supported(struct xe_guc *guc)
+{
+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
+
+ return engine_activity->supported;
+}
+
/**
* xe_guc_engine_activity_enable_stats - Enable engine activity stats
* @guc: The GuC object
@@ -276,6 +313,9 @@ void xe_guc_engine_activity_enable_stats(struct xe_guc *guc)
{
int ret;
+ if (!xe_guc_engine_activity_supported(guc))
+ return;
+
ret = enable_engine_activity_stats(guc);
if (ret)
xe_gt_err(guc_to_gt(guc), "failed to enable activity stats%d\n", ret);
@@ -302,6 +342,8 @@ int xe_guc_engine_activity_init(struct xe_guc *guc)
struct xe_gt *gt = guc_to_gt(guc);
int ret;
+ engine_activity->supported = engine_activity_supported(guc);
+
ret = allocate_engine_activity_group(guc);
if (ret) {
xe_gt_err(gt, "failed to allocate activity group %d\n", ret);
diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.h b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
index c00f3da5513d..9d3ea3f67b6a 100644
--- a/drivers/gpu/drm/xe/xe_guc_engine_activity.h
+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
@@ -12,6 +12,7 @@ struct xe_hw_engine;
struct xe_guc;
int xe_guc_engine_activity_init(struct xe_guc *guc);
+bool xe_guc_engine_activity_supported(struct xe_guc *guc);
void xe_guc_engine_activity_enable_stats(struct xe_guc *guc);
u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe);
u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe);
diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
index a2ab327d3eec..81002c83d65e 100644
--- a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
@@ -79,6 +79,9 @@ struct xe_guc_engine_activity {
/** @num_activity_group: number of activity groups */
u32 num_activity_group;
+ /** @supported: checks if engine activity is supported */
+ bool supported;
+
/** @eag: holds the device level engine activity data */
struct engine_activity_group *eag;
--
2.47.1
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v5 4/8] drm/xe/xe_pmu: Add PMU support for engine activity
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (5 preceding siblings ...)
2025-02-06 10:43 ` [PATCH v5 3/8] drm/xe/guc: Expose engine activity only for supported GuC version Riana Tauro
@ 2025-02-06 10:43 ` Riana Tauro
2025-02-07 22:47 ` Umesh Nerlige Ramappa
2025-02-06 10:43 ` [PATCH v5 5/8] drm/xe/xe_pmu: Acquire forcewake on event init for engine events Riana Tauro
` (8 subsequent siblings)
15 siblings, 1 reply; 39+ messages in thread
From: Riana Tauro @ 2025-02-06 10:43 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, umesh.nerlige.ramappa,
lucas.demarchi, vinay.belgaumkar, soham.purkait
PMU provides two counters (engine-active-ticks, engine-total-ticks)
to calculate engine activity. When querying engine activity,
user must group these 2 counters using the perf_event
group mechanism to ensure both counters are sampled together.
To list the events
./perf list
xe_0000_03_00.0/engine-active-ticks/ [Kernel PMU event]
xe_0000_03_00.0/engine-total-ticks/ [Kernel PMU event]
The formats to be used with the above are
engine_instance - config:12-19
engine_class - config:20-27
gt - config:60-63
The events can then be read using perf tool
./perf stat -e xe_0000_03_00.0/engine-active-ticks,gt=0,
engine_class=0,engine_instance=0/,
xe_0000_03_00.0/engine-total-ticks,gt=0,
engine_class=0,engine_instance=0/ -I 1000
Engine activity can then be calculated as below
engine activity % = (engine active ticks/engine total ticks) * 100
v2: validate gt
rename total-ticks to engine-total-ticks
add helper to get hwe (Umesh)
v3: fix checkpatch warning
add details to documentation (Umesh)
remove ascii formats from documentation (Lucas)
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
drivers/gpu/drm/xe/xe_guc.c | 5 ++
drivers/gpu/drm/xe/xe_pmu.c | 136 ++++++++++++++++++++++++++++++++----
drivers/gpu/drm/xe/xe_uc.c | 3 +
3 files changed, 131 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 1619c0a52db9..bc1ff0a4e1e7 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -27,6 +27,7 @@
#include "xe_guc_capture.h"
#include "xe_guc_ct.h"
#include "xe_guc_db_mgr.h"
+#include "xe_guc_engine_activity.h"
#include "xe_guc_hwconfig.h"
#include "xe_guc_log.h"
#include "xe_guc_pc.h"
@@ -744,6 +745,10 @@ int xe_guc_init_post_hwconfig(struct xe_guc *guc)
if (ret)
return ret;
+ ret = xe_guc_engine_activity_init(guc);
+ if (ret)
+ return ret;
+
ret = xe_guc_buf_cache_init(&guc->buf);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
index 3910a82328ee..06a1c72a3838 100644
--- a/drivers/gpu/drm/xe/xe_pmu.c
+++ b/drivers/gpu/drm/xe/xe_pmu.c
@@ -8,15 +8,16 @@
#include "xe_device.h"
#include "xe_gt_idle.h"
+#include "xe_guc_engine_activity.h"
+#include "xe_hw_engine.h"
#include "xe_pm.h"
#include "xe_pmu.h"
/**
* DOC: Xe PMU (Performance Monitoring Unit)
*
- * Expose events/counters like GT-C6 residency and GT frequency to user land via
- * the perf interface. Events are per device. The GT can be selected with an
- * extra config sub-field (bits 60-63).
+ * Expose events/counters like GT-C6 residency, GT frequency and per-class-engine
+ * activity to user land via the perf interface. Events are per device.
*
* All events are listed in sysfs:
*
@@ -24,7 +25,18 @@
* $ ls /sys/bus/event_source/devices/xe_0000_00_02.0/events/
* $ ls /sys/bus/event_source/devices/xe_0000_00_02.0/format/
*
- * The format directory has info regarding the configs that can be used.
+ * The following format parameters are available to read events,
+ * but only few are valid with each event:
+ *
+ * gt[60:63] Selects gt for the event
+ * engine_class[20:27] Selects engine-class for event
+ * engine_instance[12:19] Selects the engine-instance for the event
+ *
+ * For engine specific events (engine-*), gt, engine_class and engine_instance parameters must be
+ * set as populated by DRM_XE_DEVICE_QUERY_ENGINES.
+ *
+ * For gt specific events (gt-*) gt parameter must be passed. All other parameters will be 0.
+ *
* The standard perf tool can be used to grep for a certain event as well.
* Example:
*
@@ -35,20 +47,34 @@
* $ perf stat -e <event_name,gt=> -I <interval>
*/
-#define XE_PMU_EVENT_GT_MASK GENMASK_ULL(63, 60)
-#define XE_PMU_EVENT_ID_MASK GENMASK_ULL(11, 0)
+#define XE_PMU_EVENT_GT_MASK GENMASK_ULL(63, 60)
+#define XE_PMU_EVENT_ENGINE_CLASS_MASK GENMASK_ULL(27, 20)
+#define XE_PMU_EVENT_ENGINE_INSTANCE_MASK GENMASK_ULL(19, 12)
+#define XE_PMU_EVENT_ID_MASK GENMASK_ULL(11, 0)
static unsigned int config_to_event_id(u64 config)
{
return FIELD_GET(XE_PMU_EVENT_ID_MASK, config);
}
+static unsigned int config_to_engine_class(u64 config)
+{
+ return FIELD_GET(XE_PMU_EVENT_ENGINE_CLASS_MASK, config);
+}
+
+static unsigned int config_to_engine_instance(u64 config)
+{
+ return FIELD_GET(XE_PMU_EVENT_ENGINE_INSTANCE_MASK, config);
+}
+
static unsigned int config_to_gt_id(u64 config)
{
return FIELD_GET(XE_PMU_EVENT_GT_MASK, config);
}
-#define XE_PMU_EVENT_GT_C6_RESIDENCY 0x01
+#define XE_PMU_EVENT_GT_C6_RESIDENCY 0x01
+#define XE_PMU_EVENT_ENGINE_ACTIVE_TICKS 0x02
+#define XE_PMU_EVENT_ENGINE_TOTAL_TICKS 0x03
static struct xe_gt *event_to_gt(struct perf_event *event)
{
@@ -58,6 +84,24 @@ static struct xe_gt *event_to_gt(struct perf_event *event)
return xe_device_get_gt(xe, gt);
}
+static struct xe_hw_engine *event_to_hwe(struct perf_event *event)
+{
+ struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
+ struct drm_xe_engine_class_instance eci;
+ u64 config = event->attr.config;
+ struct xe_hw_engine *hwe;
+
+ eci.engine_class = config_to_engine_class(config);
+ eci.engine_instance = config_to_engine_instance(config);
+ eci.gt_id = config_to_gt_id(config);
+
+ hwe = xe_hw_engine_lookup(xe, eci);
+ if (!hwe || xe_hw_engine_is_reserved(hwe))
+ return NULL;
+
+ return hwe;
+}
+
static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
unsigned int id)
{
@@ -68,6 +112,35 @@ static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
pmu->supported_events & BIT_ULL(id);
}
+static bool event_param_valid(struct perf_event *event)
+{
+ struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
+ unsigned int engine_class, engine_instance;
+ u64 config = event->attr.config;
+ struct xe_gt *gt;
+
+ gt = xe_device_get_gt(xe, config_to_gt_id(config));
+ if (!gt)
+ return false;
+
+ engine_class = config_to_engine_class(config);
+ engine_instance = config_to_engine_instance(config);
+
+ switch (config_to_event_id(config)) {
+ case XE_PMU_EVENT_GT_C6_RESIDENCY:
+ if (engine_class || engine_instance)
+ return false;
+ break;
+ case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
+ case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
+ if (!event_to_hwe(event))
+ return false;
+ break;
+ }
+
+ return true;
+}
+
static void xe_pmu_event_destroy(struct perf_event *event)
{
struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
@@ -104,6 +177,9 @@ static int xe_pmu_event_init(struct perf_event *event)
if (has_branch_stack(event))
return -EOPNOTSUPP;
+ if (!event_param_valid(event))
+ return -ENOENT;
+
if (!event->parent) {
drm_dev_get(&xe->drm);
xe_pm_runtime_get(xe);
@@ -113,16 +189,36 @@ static int xe_pmu_event_init(struct perf_event *event)
return 0;
}
-static u64 __xe_pmu_event_read(struct perf_event *event)
+static u64 read_engine_events(struct perf_event *event)
+{
+ struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
+ struct xe_hw_engine *hwe;
+ u64 val = 0;
+
+ hwe = event_to_hwe(event);
+ if (!hwe)
+ drm_warn(&xe->drm, "unknown pmu engine\n");
+ else if (config_to_event_id(event->attr.config) == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS)
+ val = xe_guc_engine_activity_active_ticks(hwe);
+ else
+ val = xe_guc_engine_activity_total_ticks(hwe);
+
+ return val;
+}
+
+static u64 __xe_pmu_event_read(struct perf_event *event, u64 prev)
{
struct xe_gt *gt = event_to_gt(event);
if (!gt)
- return 0;
+ return prev;
switch (config_to_event_id(event->attr.config)) {
case XE_PMU_EVENT_GT_C6_RESIDENCY:
return xe_gt_idle_residency_msec(>->gtidle);
+ case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
+ case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
+ return read_engine_events(event);
}
return 0;
@@ -135,7 +231,7 @@ static void xe_pmu_event_update(struct perf_event *event)
prev = local64_read(&hwc->prev_count);
do {
- new = __xe_pmu_event_read(event);
+ new = __xe_pmu_event_read(event, prev);
} while (!local64_try_cmpxchg(&hwc->prev_count, &prev, new));
local64_add(new - prev, &event->count);
@@ -161,7 +257,7 @@ static void xe_pmu_enable(struct perf_event *event)
* for all listeners. Even when the event was already enabled and has
* an existing non-zero value.
*/
- local64_set(&event->hw.prev_count, __xe_pmu_event_read(event));
+ local64_set(&event->hw.prev_count, __xe_pmu_event_read(event, 0));
}
static void xe_pmu_event_start(struct perf_event *event, int flags)
@@ -207,11 +303,15 @@ static void xe_pmu_event_del(struct perf_event *event, int flags)
xe_pmu_event_stop(event, PERF_EF_UPDATE);
}
-PMU_FORMAT_ATTR(gt, "config:60-63");
-PMU_FORMAT_ATTR(event, "config:0-11");
+PMU_FORMAT_ATTR(gt, "config:60-63");
+PMU_FORMAT_ATTR(engine_class, "config:20-27");
+PMU_FORMAT_ATTR(engine_instance, "config:12-19");
+PMU_FORMAT_ATTR(event, "config:0-11");
static struct attribute *pmu_format_attrs[] = {
&format_attr_event.attr,
+ &format_attr_engine_class.attr,
+ &format_attr_engine_instance.attr,
&format_attr_gt.attr,
NULL,
};
@@ -270,6 +370,8 @@ static ssize_t event_attr_show(struct device *dev,
XE_EVENT_ATTR_GROUP(v_, id_, &pmu_event_ ##v_.attr.attr)
XE_EVENT_ATTR_SIMPLE(gt-c6-residency, gt_c6_residency, XE_PMU_EVENT_GT_C6_RESIDENCY, "ms");
+XE_EVENT_ATTR_NOUNIT(engine-active-ticks, engine_active_ticks, XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
+XE_EVENT_ATTR_NOUNIT(engine-total-ticks, engine_total_ticks, XE_PMU_EVENT_ENGINE_TOTAL_TICKS);
static struct attribute *pmu_empty_event_attrs[] = {
/* Empty - all events are added as groups with .attr_update() */
@@ -283,15 +385,23 @@ static const struct attribute_group pmu_events_attr_group = {
static const struct attribute_group *pmu_events_attr_update[] = {
&pmu_group_gt_c6_residency,
+ &pmu_group_engine_active_ticks,
+ &pmu_group_engine_total_ticks,
NULL,
};
static void set_supported_events(struct xe_pmu *pmu)
{
struct xe_device *xe = container_of(pmu, typeof(*xe), pmu);
+ struct xe_gt *gt = xe_device_get_gt(xe, 0);
if (!xe->info.skip_guc_pc)
pmu->supported_events |= BIT_ULL(XE_PMU_EVENT_GT_C6_RESIDENCY);
+
+ if (xe_guc_engine_activity_supported(>->uc.guc)) {
+ pmu->supported_events |= BIT_ULL(XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
+ pmu->supported_events |= BIT_ULL(XE_PMU_EVENT_ENGINE_TOTAL_TICKS);
+ }
}
/**
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index 0d073a9987c2..769905036b35 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -14,6 +14,7 @@
#include "xe_gt_sriov_vf.h"
#include "xe_guc.h"
#include "xe_guc_pc.h"
+#include "xe_guc_engine_activity.h"
#include "xe_huc.h"
#include "xe_sriov.h"
#include "xe_uc_fw.h"
@@ -210,6 +211,8 @@ int xe_uc_init_hw(struct xe_uc *uc)
if (ret)
return ret;
+ xe_guc_engine_activity_enable_stats(&uc->guc);
+
/* We don't fail the driver load if HuC fails to auth, but let's warn */
ret = xe_huc_auth(&uc->huc, XE_HUC_AUTH_VIA_GUC);
xe_gt_assert(uc_to_gt(uc), !ret);
--
2.47.1
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v5 5/8] drm/xe/xe_pmu: Acquire forcewake on event init for engine events
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (6 preceding siblings ...)
2025-02-06 10:43 ` [PATCH v5 4/8] drm/xe/xe_pmu: Add PMU support for engine activity Riana Tauro
@ 2025-02-06 10:43 ` Riana Tauro
2025-02-07 3:09 ` Ghimiray, Himal Prasad
2025-02-06 10:43 ` [PATCH v5 6/8] drm/xe: Add support for per-function engine activity Riana Tauro
` (7 subsequent siblings)
15 siblings, 1 reply; 39+ messages in thread
From: Riana Tauro @ 2025-02-06 10:43 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, umesh.nerlige.ramappa,
lucas.demarchi, vinay.belgaumkar, soham.purkait, Rodrigo Vivi,
Himal Prasad Ghimiray
When the engine events are created, acquire GT forcewake to read gpm
timestamp required for the events and release on event destroy. This
cannot be done during read due to the raw spinlock held my pmu.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
drivers/gpu/drm/xe/xe_pmu.c | 47 +++++++++++++++++++++++++++++--
drivers/gpu/drm/xe/xe_pmu_types.h | 8 ++++++
2 files changed, 53 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
index 06a1c72a3838..5b5fe4424aba 100644
--- a/drivers/gpu/drm/xe/xe_pmu.c
+++ b/drivers/gpu/drm/xe/xe_pmu.c
@@ -7,6 +7,7 @@
#include <linux/device.h>
#include "xe_device.h"
+#include "xe_force_wake.h"
#include "xe_gt_idle.h"
#include "xe_guc_engine_activity.h"
#include "xe_hw_engine.h"
@@ -102,6 +103,36 @@ static struct xe_hw_engine *event_to_hwe(struct perf_event *event)
return hwe;
}
+static bool is_engine_event(u64 config)
+{
+ unsigned int event_id = config_to_event_id(config);
+
+ return (event_id == XE_PMU_EVENT_ENGINE_TOTAL_TICKS ||
+ event_id == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
+}
+
+static void event_gt_forcewake(struct perf_event *event)
+{
+ struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
+ u64 config = event->attr.config;
+ struct xe_pmu *pmu = &xe->pmu;
+ struct xe_gt *gt;
+ unsigned int fw_ref;
+
+ gt = xe_device_get_gt(xe, config_to_gt_id(config));
+ if (!gt || !is_engine_event(config))
+ return;
+
+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
+ if (!fw_ref)
+ return;
+
+ if (!pmu->fw_ref)
+ pmu->fw_ref = fw_ref;
+
+ pmu->fw_count++;
+}
+
static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
unsigned int id)
{
@@ -144,6 +175,13 @@ static bool event_param_valid(struct perf_event *event)
static void xe_pmu_event_destroy(struct perf_event *event)
{
struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
+ struct xe_pmu *pmu = &xe->pmu;
+ struct xe_gt *gt;
+
+ if (pmu->fw_count--) {
+ gt = xe_device_get_gt(xe, config_to_gt_id(event->attr.config));
+ xe_force_wake_put(gt_to_fw(gt), pmu->fw_ref);
+ }
drm_WARN_ON(&xe->drm, event->parent);
xe_pm_runtime_put(xe);
@@ -183,18 +221,23 @@ static int xe_pmu_event_init(struct perf_event *event)
if (!event->parent) {
drm_dev_get(&xe->drm);
xe_pm_runtime_get(xe);
+ event_gt_forcewake(event);
event->destroy = xe_pmu_event_destroy;
}
return 0;
}
-static u64 read_engine_events(struct perf_event *event)
+static u64 read_engine_events(struct perf_event *event, u64 prev)
{
struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
+ struct xe_pmu *pmu = &xe->pmu;
struct xe_hw_engine *hwe;
u64 val = 0;
+ if (!pmu->fw_count)
+ return prev;
+
hwe = event_to_hwe(event);
if (!hwe)
drm_warn(&xe->drm, "unknown pmu engine\n");
@@ -218,7 +261,7 @@ static u64 __xe_pmu_event_read(struct perf_event *event, u64 prev)
return xe_gt_idle_residency_msec(>->gtidle);
case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
- return read_engine_events(event);
+ return read_engine_events(event, prev);
}
return 0;
diff --git a/drivers/gpu/drm/xe/xe_pmu_types.h b/drivers/gpu/drm/xe/xe_pmu_types.h
index f5ba4d56622c..134b3400b19c 100644
--- a/drivers/gpu/drm/xe/xe_pmu_types.h
+++ b/drivers/gpu/drm/xe/xe_pmu_types.h
@@ -30,6 +30,14 @@ struct xe_pmu {
* @name: Name as registered with perf core.
*/
const char *name;
+ /**
+ * @fw_ref: force_wake ref
+ */
+ unsigned int fw_ref;
+ /**
+ * @fw_count: force_wake count
+ */
+ unsigned int fw_count;
/**
* @supported_events: Bitmap of supported events, indexed by event id
*/
--
2.47.1
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v5 6/8] drm/xe: Add support for per-function engine activity
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (7 preceding siblings ...)
2025-02-06 10:43 ` [PATCH v5 5/8] drm/xe/xe_pmu: Acquire forcewake on event init for engine events Riana Tauro
@ 2025-02-06 10:43 ` Riana Tauro
2025-02-06 19:06 ` Michal Wajdeczko
2025-02-06 10:43 ` [PATCH v5 7/8] drm/xe/xe_pmu: Add pmu support for per-function engine activity stats Riana Tauro
` (6 subsequent siblings)
15 siblings, 1 reply; 39+ messages in thread
From: Riana Tauro @ 2025-02-06 10:43 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, umesh.nerlige.ramappa,
lucas.demarchi, vinay.belgaumkar, soham.purkait, Michal Wajdeczko
Add support for function level engine activity stats.
This is enabled when sriov_numvfs is set and disabled when vf's
are disabled.
v2: remove unnecessary initialization
move offset to improve code readability (Umesh)
remove global for function engine activity (Lucas)
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
drivers/gpu/drm/xe/abi/guc_actions_abi.h | 1 +
drivers/gpu/drm/xe/xe_guc_engine_activity.c | 208 +++++++++++++++---
drivers/gpu/drm/xe/xe_guc_engine_activity.h | 5 +-
.../gpu/drm/xe/xe_guc_engine_activity_types.h | 8 +-
drivers/gpu/drm/xe/xe_pmu.c | 4 +-
5 files changed, 192 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
index ec516e838ee8..448afb86e05c 100644
--- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
@@ -141,6 +141,7 @@ enum xe_guc_action {
XE_GUC_ACTION_CLIENT_SOFT_RESET = 0x5507,
XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A,
XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C,
+ XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER = 0x550D,
XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000,
XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002,
XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003,
diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
index 5d67fe38639a..0ab9112466f1 100644
--- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
@@ -15,35 +15,62 @@
#include "xe_hw_engine.h"
#include "xe_map.h"
#include "xe_mmio.h"
+#include "xe_sriov_pf_helpers.h"
#include "xe_trace_guc.h"
#define TOTAL_QUANTA 0x8000
-static struct iosys_map engine_activity_map(struct xe_guc *guc, struct xe_hw_engine *hwe)
+static struct iosys_map engine_activity_map(struct xe_guc *guc, struct xe_hw_engine *hwe,
+ unsigned int index)
{
struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
- struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
+ struct engine_activity_buffer *buffer;
u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
- size_t offset = 0;
+ size_t offset;
+
+ if (engine_activity->num_functions) {
+ buffer = &engine_activity->function_buffer;
+ offset = sizeof(struct guc_engine_activity_data) * index;
+ } else {
+ buffer = &engine_activity->device_buffer;
+ offset = 0;
+ }
- offset = offsetof(struct guc_engine_activity_data,
+ offset += offsetof(struct guc_engine_activity_data,
engine_activity[guc_class][hwe->logical_instance]);
return IOSYS_MAP_INIT_OFFSET(&buffer->activity_bo->vmap, offset);
}
-static struct iosys_map engine_metadata_map(struct xe_guc *guc)
+static struct iosys_map engine_metadata_map(struct xe_guc *guc,
+ unsigned int index)
{
struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
- struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
+ struct engine_activity_buffer *buffer;
+ size_t offset;
+
+ if (engine_activity->num_functions) {
+ buffer = &engine_activity->function_buffer;
+ offset = sizeof(struct guc_engine_activity_metadata) * index;
+ } else {
+ buffer = &engine_activity->device_buffer;
+ offset = 0;
+ }
- return buffer->metadata_bo->vmap;
+ return IOSYS_MAP_INIT_OFFSET(&buffer->metadata_bo->vmap, offset);
}
static int allocate_engine_activity_group(struct xe_guc *guc)
{
struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
- u32 num_activity_group = 1;
+ struct xe_device *xe = guc_to_xe(guc);
+ u32 num_activity_group;
+
+ /*
+ * An additional activity group is allocated for PF
+ */
+ num_activity_group = IS_SRIOV_PF(xe) ? xe_sriov_pf_get_totalvfs(xe) + 1 : 1;
+
engine_activity->eag = kmalloc_array(num_activity_group,
sizeof(struct engine_activity_group),
@@ -59,10 +86,11 @@ static int allocate_engine_activity_group(struct xe_guc *guc)
}
static int allocate_engine_activity_buffers(struct xe_guc *guc,
- struct engine_activity_buffer *buffer)
+ struct engine_activity_buffer *buffer,
+ int count)
{
- u32 metadata_size = sizeof(struct guc_engine_activity_metadata);
- u32 size = sizeof(struct guc_engine_activity_data);
+ u32 metadata_size = sizeof(struct guc_engine_activity_metadata) * count;
+ u32 size = sizeof(struct guc_engine_activity_data) * count;
struct xe_gt *gt = guc_to_gt(guc);
struct xe_tile *tile = gt_to_tile(gt);
struct xe_bo *bo, *metadata_bo;
@@ -105,10 +133,17 @@ static bool engine_activity_supported(struct xe_guc *guc)
return false;
}
-static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe)
+static void free_engine_activity_buffers(struct engine_activity_buffer *buffer)
+{
+ xe_bo_unpin_map_no_vm(buffer->metadata_bo);
+ xe_bo_unpin_map_no_vm(buffer->activity_bo);
+}
+
+static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe,
+ unsigned int index)
{
struct xe_guc *guc = &hwe->gt->uc.guc;
- struct engine_activity_group *eag = &guc->engine_activity.eag[0];
+ struct engine_activity_group *eag = &guc->engine_activity.eag[index];
u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
return &eag->engine[guc_class][hwe->logical_instance];
@@ -125,9 +160,10 @@ static u64 cpu_ns_to_guc_tsc_tick(ktime_t ns, u32 freq)
#define read_metadata_record(xe_, map_, field_) \
xe_map_rd_field(xe_, map_, 0, struct guc_engine_activity_metadata, field_)
-static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
+static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe,
+ unsigned int index)
{
- struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
+ struct engine_activity *ea = hw_engine_to_engine_activity(hwe, index);
struct guc_engine_activity *cached_activity = &ea->activity;
struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
@@ -138,8 +174,8 @@ static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
u64 active_ticks, gpm_ts;
u16 change_num;
- activity_map = engine_activity_map(guc, hwe);
- metadata_map = engine_metadata_map(guc);
+ activity_map = engine_activity_map(guc, hwe, index);
+ metadata_map = engine_metadata_map(guc, index);
global_change_num = read_metadata_record(xe, &metadata_map, global_change_num);
/* GuC has not initialized activity data yet, return 0 */
@@ -182,9 +218,9 @@ static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
return ea->total + ea->active;
}
-static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
+static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe, unsigned int index)
{
- struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
+ struct engine_activity *ea = hw_engine_to_engine_activity(hwe, index);
struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
struct guc_engine_activity *cached_activity = &ea->activity;
struct iosys_map activity_map, metadata_map;
@@ -193,8 +229,8 @@ static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
u64 numerator;
u16 quanta_ratio;
- activity_map = engine_activity_map(guc, hwe);
- metadata_map = engine_metadata_map(guc);
+ activity_map = engine_activity_map(guc, hwe, index);
+ metadata_map = engine_metadata_map(guc, index);
if (!cached_metadata->guc_tsc_frequency_hz)
cached_metadata->guc_tsc_frequency_hz = read_metadata_record(xe, &metadata_map,
@@ -236,10 +272,35 @@ static int enable_engine_activity_stats(struct xe_guc *guc)
return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action));
}
-static void engine_activity_set_cpu_ts(struct xe_guc *guc)
+static int enable_function_engine_activity_stats(struct xe_guc *guc, bool enable)
{
struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
- struct engine_activity_group *eag = &engine_activity->eag[0];
+ u32 metadata_ggtt_addr = 0, ggtt_addr = 0, num_functions = 0;
+ struct engine_activity_buffer *buffer = &engine_activity->function_buffer;
+ u32 action[6];
+ int len = 0;
+
+ if (enable) {
+ metadata_ggtt_addr = xe_bo_ggtt_addr(buffer->metadata_bo);
+ ggtt_addr = xe_bo_ggtt_addr(buffer->activity_bo);
+ num_functions = engine_activity->num_functions;
+ }
+
+ action[len++] = XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER;
+ action[len++] = num_functions;
+ action[len++] = metadata_ggtt_addr;
+ action[len++] = 0;
+ action[len++] = ggtt_addr;
+ action[len++] = 0;
+
+ /* Blocking here to ensure the buffers are ready before reading them */
+ return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action));
+}
+
+static void engine_activity_set_cpu_ts(struct xe_guc *guc, unsigned int index)
+{
+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
+ struct engine_activity_group *eag = &engine_activity->eag[index];
int i, j;
for (i = 0; i < GUC_MAX_ENGINE_CLASSES; i++)
@@ -256,36 +317,106 @@ static u32 gpm_timestamp_shift(struct xe_gt *gt)
return 3 - REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
}
+static bool is_function_valid(struct xe_guc *guc, unsigned int fn_id)
+{
+ struct xe_device *xe = guc_to_xe(guc);
+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
+
+ if (!IS_SRIOV_PF(xe) && fn_id)
+ return false;
+
+ if (engine_activity->num_functions && fn_id >= engine_activity->num_functions)
+ return false;
+
+ return true;
+}
+
+static int engine_activity_disable_function_stats(struct xe_guc *guc, bool enable)
+{
+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
+ struct engine_activity_buffer *buffer = &engine_activity->function_buffer;
+ int ret;
+
+ if (!engine_activity->num_functions)
+ return 0;
+
+ ret = enable_function_engine_activity_stats(guc, enable);
+ if (ret)
+ return ret;
+
+ free_engine_activity_buffers(buffer);
+ engine_activity->num_functions = 0;
+
+ return 0;
+}
+
+static int engine_activity_enable_function_stats(struct xe_guc *guc, int num_vfs, bool enable)
+{
+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
+ struct engine_activity_buffer *buffer = &engine_activity->function_buffer;
+ int ret, i;
+
+ if (!num_vfs)
+ return 0;
+
+ /* This includes 1 PF and num_vfs */
+ engine_activity->num_functions = num_vfs + 1;
+
+ ret = allocate_engine_activity_buffers(guc, buffer, engine_activity->num_functions);
+ if (ret)
+ return ret;
+
+ ret = enable_function_engine_activity_stats(guc, enable);
+ if (ret) {
+ free_engine_activity_buffers(buffer);
+ engine_activity->num_functions = 0;
+ return ret;
+ }
+
+ for (i = 0; i < engine_activity->num_functions; i++)
+ engine_activity_set_cpu_ts(guc, i + 1);
+
+ return 0;
+}
+
/**
* xe_guc_engine_activity_active_ticks - Get engine active ticks
* @hwe: The hw_engine object
+ * @fn_id: function id to report on
*
* Return: accumulated ticks @hwe was active since engine activity stats were enabled.
*/
-u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe)
+u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe, unsigned int fn_id)
{
struct xe_guc *guc = &hwe->gt->uc.guc;
if (!xe_guc_engine_activity_supported(guc))
return 0;
- return get_engine_active_ticks(guc, hwe);
+ if (!is_function_valid(guc, fn_id))
+ return 0;
+
+ return get_engine_active_ticks(guc, hwe, fn_id);
}
/**
* xe_guc_engine_activity_total_ticks - Get engine total ticks
* @hwe: The hw_engine object
+ * @fn_id: function id to report on
*
* Return: accumulated quanta of ticks allocated for the engine
*/
-u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe)
+u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe, unsigned int fn_id)
{
struct xe_guc *guc = &hwe->gt->uc.guc;
if (!xe_guc_engine_activity_supported(guc))
return 0;
- return get_engine_total_ticks(guc, hwe);
+ if (!is_function_valid(guc, fn_id))
+ return 0;
+
+ return get_engine_total_ticks(guc, hwe, fn_id);
}
/**
@@ -303,6 +434,25 @@ bool xe_guc_engine_activity_supported(struct xe_guc *guc)
return engine_activity->supported;
}
+/**
+ * xe_guc_engine_activity_function_stats - Enable/Disable per-function engine activity stats
+ * @guc: The GuC object
+ * @num_vfs: number of vfs
+ * @enable: true to enable, false otherwise
+ *
+ * Return: 0 on success, negative error code otherwise
+ */
+int xe_guc_engine_activity_function_stats(struct xe_guc *guc, int num_vfs, bool enable)
+{
+ if (!xe_guc_engine_activity_supported(guc))
+ return 0;
+
+ if (enable)
+ return engine_activity_enable_function_stats(guc, num_vfs, enable);
+
+ return engine_activity_disable_function_stats(guc, enable);
+}
+
/**
* xe_guc_engine_activity_enable_stats - Enable engine activity stats
* @guc: The GuC object
@@ -320,7 +470,7 @@ void xe_guc_engine_activity_enable_stats(struct xe_guc *guc)
if (ret)
xe_gt_err(guc_to_gt(guc), "failed to enable activity stats%d\n", ret);
else
- engine_activity_set_cpu_ts(guc);
+ engine_activity_set_cpu_ts(guc, 0);
}
static void engine_activity_fini(void *arg)
@@ -350,7 +500,7 @@ int xe_guc_engine_activity_init(struct xe_guc *guc)
return ret;
}
- ret = allocate_engine_activity_buffers(guc, &engine_activity->device_buffer);
+ ret = allocate_engine_activity_buffers(guc, &engine_activity->device_buffer, 1);
if (ret) {
xe_gt_err(gt, "failed to allocate activity buffers%d\n", ret);
kfree(engine_activity->eag);
diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.h b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
index 9d3ea3f67b6a..765397b959e0 100644
--- a/drivers/gpu/drm/xe/xe_guc_engine_activity.h
+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
@@ -14,6 +14,7 @@ struct xe_guc;
int xe_guc_engine_activity_init(struct xe_guc *guc);
bool xe_guc_engine_activity_supported(struct xe_guc *guc);
void xe_guc_engine_activity_enable_stats(struct xe_guc *guc);
-u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe);
-u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe);
+int xe_guc_engine_activity_function_stats(struct xe_guc *guc, int num_vfs, bool enable);
+u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe, unsigned int fn_id);
+u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe, unsigned int fn_id);
#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
index 81002c83d65e..d95ec6a74b30 100644
--- a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
@@ -79,14 +79,20 @@ struct xe_guc_engine_activity {
/** @num_activity_group: number of activity groups */
u32 num_activity_group;
+ /** @num_functions: number of functions */
+ u32 num_functions;
+
/** @supported: checks if engine activity is supported */
bool supported;
- /** @eag: holds the device level engine activity data */
+ /** @eag: array with entries to hold engine activity stats of global, PF and VF's */
struct engine_activity_group *eag;
/** @device_buffer: buffer object for global engine activity */
struct engine_activity_buffer device_buffer;
+
+ /** @function_buffer: buffer object for per-function engine activity */
+ struct engine_activity_buffer function_buffer;
};
#endif
diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
index 5b5fe4424aba..a758fc517048 100644
--- a/drivers/gpu/drm/xe/xe_pmu.c
+++ b/drivers/gpu/drm/xe/xe_pmu.c
@@ -242,9 +242,9 @@ static u64 read_engine_events(struct perf_event *event, u64 prev)
if (!hwe)
drm_warn(&xe->drm, "unknown pmu engine\n");
else if (config_to_event_id(event->attr.config) == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS)
- val = xe_guc_engine_activity_active_ticks(hwe);
+ val = xe_guc_engine_activity_active_ticks(hwe, 0);
else
- val = xe_guc_engine_activity_total_ticks(hwe);
+ val = xe_guc_engine_activity_total_ticks(hwe, 0);
return val;
}
--
2.47.1
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v5 7/8] drm/xe/xe_pmu: Add pmu support for per-function engine activity stats
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (8 preceding siblings ...)
2025-02-06 10:43 ` [PATCH v5 6/8] drm/xe: Add support for per-function engine activity Riana Tauro
@ 2025-02-06 10:43 ` Riana Tauro
2025-02-06 19:15 ` Michal Wajdeczko
2025-02-06 10:43 ` [PATCH v5 8/8] drm/xe/pf: Enable " Riana Tauro
` (5 subsequent siblings)
15 siblings, 1 reply; 39+ messages in thread
From: Riana Tauro @ 2025-02-06 10:43 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, umesh.nerlige.ramappa,
lucas.demarchi, vinay.belgaumkar, soham.purkait, Michal Wajdeczko
Add pmu support for per-function engine activity
stats.
per-function engine activity is enabled when sriov_numvfs
are set. If sriov_numvfs is set to 2, then the applicable function
values are
0 - PF engine activity
1,2 - per-VF engine activity from PF
This can be read from perf tool as shown below
./perf stat -e xe_<bdf>/engine-active-ticks,gt=0,engine_class=0,
engine_instance=0,function=1/ -I 1000
v2: fix documentation (Umesh)
remove global for functions (Lucas, Michal)
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
drivers/gpu/drm/xe/xe_pmu.c | 38 ++++++++++++++++++++++++++++++-------
1 file changed, 31 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
index a758fc517048..66cf2ece97ec 100644
--- a/drivers/gpu/drm/xe/xe_pmu.c
+++ b/drivers/gpu/drm/xe/xe_pmu.c
@@ -13,6 +13,7 @@
#include "xe_hw_engine.h"
#include "xe_pm.h"
#include "xe_pmu.h"
+#include "xe_sriov_pf_helpers.h"
/**
* DOC: Xe PMU (Performance Monitoring Unit)
@@ -32,9 +33,10 @@
* gt[60:63] Selects gt for the event
* engine_class[20:27] Selects engine-class for event
* engine_instance[12:19] Selects the engine-instance for the event
+ * function[44:59] Selects the function of the event (SRIOV enabled)
*
* For engine specific events (engine-*), gt, engine_class and engine_instance parameters must be
- * set as populated by DRM_XE_DEVICE_QUERY_ENGINES.
+ * set as populated by DRM_XE_DEVICE_QUERY_ENGINES and function if SRIOV is enabled.
*
* For gt specific events (gt-*) gt parameter must be passed. All other parameters will be 0.
*
@@ -49,6 +51,7 @@
*/
#define XE_PMU_EVENT_GT_MASK GENMASK_ULL(63, 60)
+#define XE_PMU_EVENT_FUNCTION_MASK GENMASK_ULL(59, 44)
#define XE_PMU_EVENT_ENGINE_CLASS_MASK GENMASK_ULL(27, 20)
#define XE_PMU_EVENT_ENGINE_INSTANCE_MASK GENMASK_ULL(19, 12)
#define XE_PMU_EVENT_ID_MASK GENMASK_ULL(11, 0)
@@ -58,6 +61,11 @@ static unsigned int config_to_event_id(u64 config)
return FIELD_GET(XE_PMU_EVENT_ID_MASK, config);
}
+static unsigned int config_to_function_id(u64 config)
+{
+ return FIELD_GET(XE_PMU_EVENT_FUNCTION_MASK, config);
+}
+
static unsigned int config_to_engine_class(u64 config)
{
return FIELD_GET(XE_PMU_EVENT_ENGINE_CLASS_MASK, config);
@@ -146,7 +154,7 @@ static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
static bool event_param_valid(struct perf_event *event)
{
struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
- unsigned int engine_class, engine_instance;
+ unsigned int engine_class, engine_instance, function_id;
u64 config = event->attr.config;
struct xe_gt *gt;
@@ -154,18 +162,28 @@ static bool event_param_valid(struct perf_event *event)
if (!gt)
return false;
+ function_id = config_to_function_id(config);
+ if (function_id && !IS_SRIOV_PF(xe))
+ return false;
+
engine_class = config_to_engine_class(config);
engine_instance = config_to_engine_instance(config);
switch (config_to_event_id(config)) {
case XE_PMU_EVENT_GT_C6_RESIDENCY:
- if (engine_class || engine_instance)
+ if (engine_class || engine_instance || function_id)
return false;
break;
case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
if (!event_to_hwe(event))
return false;
+ /*
+ * PF(0) and total vfs when SRIOV is enabled
+ */
+ if (function_id > xe_sriov_pf_get_totalvfs(xe))
+ return false;
+
break;
}
@@ -233,18 +251,22 @@ static u64 read_engine_events(struct perf_event *event, u64 prev)
struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
struct xe_pmu *pmu = &xe->pmu;
struct xe_hw_engine *hwe;
- u64 val = 0;
+ unsigned int function_id;
+ u64 config, val = 0;
if (!pmu->fw_count)
return prev;
+ config = event->attr.config;
+ function_id = config_to_function_id(config);
+
hwe = event_to_hwe(event);
if (!hwe)
drm_warn(&xe->drm, "unknown pmu engine\n");
- else if (config_to_event_id(event->attr.config) == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS)
- val = xe_guc_engine_activity_active_ticks(hwe, 0);
+ else if (config_to_event_id(config) == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS)
+ val = xe_guc_engine_activity_active_ticks(hwe, function_id);
else
- val = xe_guc_engine_activity_total_ticks(hwe, 0);
+ val = xe_guc_engine_activity_total_ticks(hwe, function_id);
return val;
}
@@ -347,6 +369,7 @@ static void xe_pmu_event_del(struct perf_event *event, int flags)
}
PMU_FORMAT_ATTR(gt, "config:60-63");
+PMU_FORMAT_ATTR(function, "config:44-59");
PMU_FORMAT_ATTR(engine_class, "config:20-27");
PMU_FORMAT_ATTR(engine_instance, "config:12-19");
PMU_FORMAT_ATTR(event, "config:0-11");
@@ -355,6 +378,7 @@ static struct attribute *pmu_format_attrs[] = {
&format_attr_event.attr,
&format_attr_engine_class.attr,
&format_attr_engine_instance.attr,
+ &format_attr_function.attr,
&format_attr_gt.attr,
NULL,
};
--
2.47.1
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v5 8/8] drm/xe/pf: Enable per-function engine activity stats
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (9 preceding siblings ...)
2025-02-06 10:43 ` [PATCH v5 7/8] drm/xe/xe_pmu: Add pmu support for per-function engine activity stats Riana Tauro
@ 2025-02-06 10:43 ` Riana Tauro
2025-02-06 11:20 ` Riana Tauro
2025-02-06 19:29 ` Michal Wajdeczko
2025-02-06 10:58 ` ✓ CI.Build: success for PMU support for engine activity Patchwork
` (4 subsequent siblings)
15 siblings, 2 replies; 39+ messages in thread
From: Riana Tauro @ 2025-02-06 10:43 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, umesh.nerlige.ramappa,
lucas.demarchi, vinay.belgaumkar, soham.purkait, Michal Wajdeczko
Enable per-function engine activity stats when
sriov_numvfs are set and disable when sriov_numvfs
are set to 0.
Also restart engine stats when VF's are reprovisioned
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 26 ++++++++++++++++++++--
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h | 1 +
drivers/gpu/drm/xe/xe_pci_sriov.c | 25 +++++++++++++++++++++
3 files changed, 50 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
index b1d994d65589..25855dcb6e42 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
@@ -23,6 +23,7 @@
#include "xe_guc_buf.h"
#include "xe_guc_ct.h"
#include "xe_guc_db_mgr.h"
+#include "xe_guc_engine_activity.h"
#include "xe_guc_fwif.h"
#include "xe_guc_id_mgr.h"
#include "xe_guc_klv_helpers.h"
@@ -1972,6 +1973,21 @@ static void pf_reset_config_thresholds(struct xe_gt *gt, struct xe_gt_sriov_conf
#undef reset_threshold_config
}
+/**
+ * xe_gt_sriov_pf_engine_stats - Enable/Disable engine stats for PF and VFs
+ * @gt: the &xe_gt
+ * @num_vfs: number of VFs to enable
+ * @enable: enable/disable
+ *
+ * Enable or disable engine stats for PF and VF
+ *
+ * Return: 0 on success, negative error code otherwise
+ */
+int xe_gt_sriov_pf_config_engine_stats(struct xe_gt *gt, unsigned int num_vfs, bool enable)
+{
+ return xe_guc_engine_activity_function_stats(>->uc.guc, num_vfs, enable);
+}
+
static void pf_release_vf_config(struct xe_gt *gt, unsigned int vfid)
{
struct xe_gt_sriov_config *config = pf_pick_vf_config(gt, vfid);
@@ -2362,8 +2378,10 @@ int xe_gt_sriov_pf_config_restore(struct xe_gt *gt, unsigned int vfid,
*/
void xe_gt_sriov_pf_config_restart(struct xe_gt *gt)
{
- unsigned int n, total_vfs = xe_sriov_pf_get_totalvfs(gt_to_xe(gt));
- unsigned int fail = 0, skip = 0;
+ struct xe_device *xe = gt_to_xe(gt);
+ unsigned int n, total_vfs = xe_sriov_pf_get_totalvfs(xe);
+ u16 num_vfs = pci_num_vf(to_pci_dev(xe->drm.dev));
+ unsigned int fail = 0, skip = 0, ret = 0;
for (n = 1; n <= total_vfs; n++) {
if (xe_gt_sriov_pf_config_is_empty(gt, n))
@@ -2372,6 +2390,10 @@ void xe_gt_sriov_pf_config_restart(struct xe_gt *gt)
fail++;
}
+ ret = xe_gt_sriov_pf_config_engine_stats(gt, num_vfs, true);
+ if (ret)
+ xe_gt_sriov_dbg(gt, "Failed to enable engine stats for PF and VF's %d\n",
+ ret);
if (fail)
xe_gt_sriov_notice(gt, "Failed to push %u of %u VF%s configurations\n",
fail, total_vfs - skip, str_plural(total_vfs));
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h
index f894e9d4abba..a5585b178e6b 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h
@@ -62,6 +62,7 @@ int xe_gt_sriov_pf_config_restore(struct xe_gt *gt, unsigned int vfid,
const void *buf, size_t size);
bool xe_gt_sriov_pf_config_is_empty(struct xe_gt *gt, unsigned int vfid);
+int xe_gt_sriov_pf_config_engine_stats(struct xe_gt *gt, unsigned int num_vfs, bool enable);
void xe_gt_sriov_pf_config_restart(struct xe_gt *gt);
diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c
index aaceee748287..612e64efb43c 100644
--- a/drivers/gpu/drm/xe/xe_pci_sriov.c
+++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
@@ -62,6 +62,21 @@ static void pf_reset_vfs(struct xe_device *xe, unsigned int num_vfs)
xe_gt_sriov_pf_control_trigger_flr(gt, n);
}
+static int pf_engine_activity_stats(struct xe_device *xe, unsigned int num_vfs, bool enable)
+{
+ struct xe_gt *gt;
+ unsigned int id;
+ int ret = 0;
+
+ for_each_gt(gt, xe, id) {
+ ret = xe_gt_sriov_pf_config_engine_stats(gt, num_vfs, enable);
+ if (ret)
+ return ret;
+ }
+
+ return ret;
+}
+
static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
{
struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
@@ -94,6 +109,11 @@ static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
xe_sriov_info(xe, "Enabled %u of %u VF%s\n",
num_vfs, total_vfs, str_plural(total_vfs));
+
+ err = pf_engine_activity_stats(xe, num_vfs, true);
+ if (err < 0)
+ xe_sriov_warn(xe, "Failed to enable function activity stats\n");
+
return num_vfs;
failed:
@@ -110,6 +130,7 @@ static int pf_disable_vfs(struct xe_device *xe)
struct device *dev = xe->drm.dev;
struct pci_dev *pdev = to_pci_dev(dev);
u16 num_vfs = pci_num_vf(pdev);
+ int err;
xe_assert(xe, IS_SRIOV_PF(xe));
xe_sriov_dbg(xe, "disabling %u VF%s\n", num_vfs, str_plural(num_vfs));
@@ -117,6 +138,10 @@ static int pf_disable_vfs(struct xe_device *xe)
if (!num_vfs)
return 0;
+ err = pf_engine_activity_stats(xe, num_vfs, false);
+ if (err < 0)
+ xe_sriov_warn(xe, "Failed to disable function activity stats\n");
+
pci_disable_sriov(pdev);
pf_reset_vfs(xe, num_vfs);
--
2.47.1
^ permalink raw reply related [flat|nested] 39+ messages in thread
* ✓ CI.Build: success for PMU support for engine activity
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (10 preceding siblings ...)
2025-02-06 10:43 ` [PATCH v5 8/8] drm/xe/pf: Enable " Riana Tauro
@ 2025-02-06 10:58 ` Patchwork
2025-02-06 11:01 ` ✗ CI.Hooks: failure " Patchwork
` (3 subsequent siblings)
15 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-06 10:58 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
== Series Details ==
Series: PMU support for engine activity
URL : https://patchwork.freedesktop.org/series/144408/
State : success
== Summary ==
lib/modules/6.14.0-rc1-xe+/kernel/arch/x86/events/amd/
lib/modules/6.14.0-rc1-xe+/kernel/arch/x86/events/amd/amd-uncore.ko
lib/modules/6.14.0-rc1-xe+/kernel/arch/x86/events/rapl.ko
lib/modules/6.14.0-rc1-xe+/kernel/arch/x86/kvm/
lib/modules/6.14.0-rc1-xe+/kernel/arch/x86/kvm/kvm.ko
lib/modules/6.14.0-rc1-xe+/kernel/arch/x86/kvm/kvm-intel.ko
lib/modules/6.14.0-rc1-xe+/kernel/arch/x86/kvm/kvm-amd.ko
lib/modules/6.14.0-rc1-xe+/kernel/kernel/
lib/modules/6.14.0-rc1-xe+/kernel/kernel/kheaders.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/
lib/modules/6.14.0-rc1-xe+/kernel/crypto/ecrdsa_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/xcbc.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/serpent_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/aria_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/crypto_simd.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/adiantum.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/tcrypt.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/crypto_engine.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/zstd.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/asymmetric_keys/
lib/modules/6.14.0-rc1-xe+/kernel/crypto/asymmetric_keys/pkcs7_test_key.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/asymmetric_keys/pkcs8_key_parser.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/des_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/xctr.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/authenc.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/sm4_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/camellia_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/sm3.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/pcrypt.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/aegis128.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/af_alg.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/algif_aead.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/cmac.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/sm3_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/aes_ti.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/chacha_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/poly1305_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/nhpoly1305.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/crc32_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/essiv.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/ccm.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/wp512.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/streebog_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/authencesn.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/echainiv.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/lrw.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/cryptd.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/crypto_user.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/algif_hash.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/polyval-generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/hctr2.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/842.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/pcbc.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/ansi_cprng.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/cast6_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/twofish_common.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/twofish_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/lz4hc.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/blowfish_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/md4.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/chacha20poly1305.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/curve25519-generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/lz4.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/rmd160.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/algif_skcipher.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/cast5_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/fcrypt.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/ecdsa_generic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/sm4.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/cast_common.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/blowfish_common.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/michael_mic.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/async_tx/
lib/modules/6.14.0-rc1-xe+/kernel/crypto/async_tx/async_xor.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/async_tx/async_tx.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/async_tx/async_memcpy.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/async_tx/async_pq.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/async_tx/async_raid6_recov.ko
lib/modules/6.14.0-rc1-xe+/kernel/crypto/algif_rng.ko
lib/modules/6.14.0-rc1-xe+/kernel/block/
lib/modules/6.14.0-rc1-xe+/kernel/block/bfq.ko
lib/modules/6.14.0-rc1-xe+/kernel/block/kyber-iosched.ko
lib/modules/6.14.0-rc1-xe+/build
lib/modules/6.14.0-rc1-xe+/modules.alias.bin
lib/modules/6.14.0-rc1-xe+/modules.builtin
lib/modules/6.14.0-rc1-xe+/modules.softdep
lib/modules/6.14.0-rc1-xe+/modules.alias
lib/modules/6.14.0-rc1-xe+/modules.order
lib/modules/6.14.0-rc1-xe+/modules.symbols
lib/modules/6.14.0-rc1-xe+/modules.dep.bin
+ mv kernel-nodebug.tar.gz ..
+ cd ..
+ rm -rf archive
++ date +%s
+ echo -e '\e[0Ksection_end:1738839520:package_x86_64_nodebug\r\e[0K'
^[[0Ksection_end:1738839520:package_x86_64_nodebug
^[[0K
+ sync
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✗ CI.Hooks: failure for PMU support for engine activity
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (11 preceding siblings ...)
2025-02-06 10:58 ` ✓ CI.Build: success for PMU support for engine activity Patchwork
@ 2025-02-06 11:01 ` Patchwork
2025-02-06 11:02 ` ✓ CI.checksparse: success " Patchwork
` (2 subsequent siblings)
15 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-06 11:01 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
== Series Details ==
Series: PMU support for engine activity
URL : https://patchwork.freedesktop.org/series/144408/
State : failure
== Summary ==
run-parts: executing /workspace/ci/hooks/00-showenv
+ export
+ grep -Ei '(^|\W)CI_'
declare -x CI_KERNEL_BUILD_DIR="/workspace/kernel/build64-default"
declare -x CI_KERNEL_SRC_DIR="/workspace/kernel"
declare -x CI_TOOLS_SRC_DIR="/workspace/ci"
declare -x CI_WORKSPACE_DIR="/workspace"
run-parts: executing /workspace/ci/hooks/10-build-W1
+ SRC_DIR=/workspace/kernel
+ RESTORE_DISPLAY_CONFIG=0
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ cd /workspace/kernel
++ nproc
+ make -j48 O=/workspace/kernel/build64-default modules_prepare
make[1]: Entering directory '/workspace/kernel/build64-default'
GEN Makefile
mkdir -p /workspace/kernel/build64-default/tools/objtool && make O=/workspace/kernel/build64-default subdir=tools/objtool --no-print-directory -C objtool
CALL ../scripts/checksyscalls.sh
INSTALL libsubcmd_headers
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/exec-cmd.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/help.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/pager.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/parse-options.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/run-command.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/sigchain.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/subcmd-config.o
LD /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd-in.o
AR /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd.a
CC /workspace/kernel/build64-default/tools/objtool/weak.o
CC /workspace/kernel/build64-default/tools/objtool/check.o
CC /workspace/kernel/build64-default/tools/objtool/special.o
CC /workspace/kernel/build64-default/tools/objtool/builtin-check.o
CC /workspace/kernel/build64-default/tools/objtool/elf.o
CC /workspace/kernel/build64-default/tools/objtool/objtool.o
CC /workspace/kernel/build64-default/tools/objtool/orc_gen.o
CC /workspace/kernel/build64-default/tools/objtool/orc_dump.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/special.o
CC /workspace/kernel/build64-default/tools/objtool/libstring.o
CC /workspace/kernel/build64-default/tools/objtool/libctype.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/decode.o
CC /workspace/kernel/build64-default/tools/objtool/librbtree.o
CC /workspace/kernel/build64-default/tools/objtool/str_error_r.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/orc.o
LD /workspace/kernel/build64-default/tools/objtool/arch/x86/objtool-in.o
LD /workspace/kernel/build64-default/tools/objtool/objtool-in.o
LINK /workspace/kernel/build64-default/tools/objtool/objtool
make[1]: Leaving directory '/workspace/kernel/build64-default'
++ nproc
+ make -j48 O=/workspace/kernel/build64-default W=1 drivers/gpu/drm/xe
make[1]: Entering directory '/workspace/kernel/build64-default'
make[2]: Nothing to be done for 'drivers/gpu/drm/xe'.
make[1]: Leaving directory '/workspace/kernel/build64-default'
run-parts: executing /workspace/ci/hooks/11-build-32b
+++ realpath /workspace/ci/hooks/11-build-32b
++ dirname /workspace/ci/hooks/11-build-32b
+ THIS_SCRIPT_DIR=/workspace/ci/hooks
+ SRC_DIR=/workspace/kernel
+ TOOLS_SRC_DIR=/workspace/ci
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ BUILD_DIR=/workspace/kernel/build64-default/build32
+ cd /workspace/kernel
+ mkdir -p /workspace/kernel/build64-default/build32
++ nproc
+ make -j48 ARCH=i386 O=/workspace/kernel/build64-default/build32 defconfig
make[1]: Entering directory '/workspace/kernel/build64-default/build32'
GEN Makefile
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.[ch]
HOSTCC scripts/kconfig/menu.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTCC scripts/kconfig/util.o
HOSTCC scripts/kconfig/lexer.lex.o
HOSTCC scripts/kconfig/parser.tab.o
HOSTLD scripts/kconfig/conf
*** Default configuration is based on 'i386_defconfig'
#
# configuration written to .config
#
make[1]: Leaving directory '/workspace/kernel/build64-default/build32'
+ cd /workspace/kernel/build64-default/build32
+ /workspace/kernel/scripts/kconfig/merge_config.sh .config /workspace/ci/kernel/fragments/10-xe.fragment
Using .config as base
Merging /workspace/ci/kernel/fragments/10-xe.fragment
Value of CONFIG_DRM_XE is redefined by fragment /workspace/ci/kernel/fragments/10-xe.fragment:
Previous value: # CONFIG_DRM_XE is not set
New value: CONFIG_DRM_XE=m
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
#
# configuration written to .config
#
Value requested for CONFIG_HAVE_UID16 not in final .config
Requested value: CONFIG_HAVE_UID16=y
Actual value:
Value requested for CONFIG_UID16 not in final .config
Requested value: CONFIG_UID16=y
Actual value:
Value requested for CONFIG_X86_32 not in final .config
Requested value: CONFIG_X86_32=y
Actual value:
Value requested for CONFIG_OUTPUT_FORMAT not in final .config
Requested value: CONFIG_OUTPUT_FORMAT="elf32-i386"
Actual value: CONFIG_OUTPUT_FORMAT="elf64-x86-64"
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MIN not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MIN=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MIN=28
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MAX not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MAX=16
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MAX=32
Value requested for CONFIG_PGTABLE_LEVELS not in final .config
Requested value: CONFIG_PGTABLE_LEVELS=2
Actual value: CONFIG_PGTABLE_LEVELS=5
Value requested for CONFIG_X86_BIGSMP not in final .config
Requested value: # CONFIG_X86_BIGSMP is not set
Actual value:
Value requested for CONFIG_X86_INTEL_QUARK not in final .config
Requested value: # CONFIG_X86_INTEL_QUARK is not set
Actual value:
Value requested for CONFIG_X86_RDC321X not in final .config
Requested value: # CONFIG_X86_RDC321X is not set
Actual value:
Value requested for CONFIG_X86_32_NON_STANDARD not in final .config
Requested value: # CONFIG_X86_32_NON_STANDARD is not set
Actual value:
Value requested for CONFIG_X86_32_IRIS not in final .config
Requested value: # CONFIG_X86_32_IRIS is not set
Actual value:
Value requested for CONFIG_M486SX not in final .config
Requested value: # CONFIG_M486SX is not set
Actual value:
Value requested for CONFIG_M486 not in final .config
Requested value: # CONFIG_M486 is not set
Actual value:
Value requested for CONFIG_M586 not in final .config
Requested value: # CONFIG_M586 is not set
Actual value:
Value requested for CONFIG_M586TSC not in final .config
Requested value: # CONFIG_M586TSC is not set
Actual value:
Value requested for CONFIG_M586MMX not in final .config
Requested value: # CONFIG_M586MMX is not set
Actual value:
Value requested for CONFIG_M686 not in final .config
Requested value: CONFIG_M686=y
Actual value:
Value requested for CONFIG_MPENTIUMII not in final .config
Requested value: # CONFIG_MPENTIUMII is not set
Actual value:
Value requested for CONFIG_MPENTIUMIII not in final .config
Requested value: # CONFIG_MPENTIUMIII is not set
Actual value:
Value requested for CONFIG_MPENTIUMM not in final .config
Requested value: # CONFIG_MPENTIUMM is not set
Actual value:
Value requested for CONFIG_MPENTIUM4 not in final .config
Requested value: # CONFIG_MPENTIUM4 is not set
Actual value:
Value requested for CONFIG_MK6 not in final .config
Requested value: # CONFIG_MK6 is not set
Actual value:
Value requested for CONFIG_MK7 not in final .config
Requested value: # CONFIG_MK7 is not set
Actual value:
Value requested for CONFIG_MCRUSOE not in final .config
Requested value: # CONFIG_MCRUSOE is not set
Actual value:
Value requested for CONFIG_MEFFICEON not in final .config
Requested value: # CONFIG_MEFFICEON is not set
Actual value:
Value requested for CONFIG_MWINCHIPC6 not in final .config
Requested value: # CONFIG_MWINCHIPC6 is not set
Actual value:
Value requested for CONFIG_MWINCHIP3D not in final .config
Requested value: # CONFIG_MWINCHIP3D is not set
Actual value:
Value requested for CONFIG_MELAN not in final .config
Requested value: # CONFIG_MELAN is not set
Actual value:
Value requested for CONFIG_MGEODEGX1 not in final .config
Requested value: # CONFIG_MGEODEGX1 is not set
Actual value:
Value requested for CONFIG_MGEODE_LX not in final .config
Requested value: # CONFIG_MGEODE_LX is not set
Actual value:
Value requested for CONFIG_MCYRIXIII not in final .config
Requested value: # CONFIG_MCYRIXIII is not set
Actual value:
Value requested for CONFIG_MVIAC3_2 not in final .config
Requested value: # CONFIG_MVIAC3_2 is not set
Actual value:
Value requested for CONFIG_MVIAC7 not in final .config
Requested value: # CONFIG_MVIAC7 is not set
Actual value:
Value requested for CONFIG_X86_GENERIC not in final .config
Requested value: # CONFIG_X86_GENERIC is not set
Actual value:
Value requested for CONFIG_X86_INTERNODE_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_INTERNODE_CACHE_SHIFT=5
Actual value: CONFIG_X86_INTERNODE_CACHE_SHIFT=6
Value requested for CONFIG_X86_L1_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_L1_CACHE_SHIFT=5
Actual value: CONFIG_X86_L1_CACHE_SHIFT=6
Value requested for CONFIG_X86_USE_PPRO_CHECKSUM not in final .config
Requested value: CONFIG_X86_USE_PPRO_CHECKSUM=y
Actual value:
Value requested for CONFIG_X86_MINIMUM_CPU_FAMILY not in final .config
Requested value: CONFIG_X86_MINIMUM_CPU_FAMILY=6
Actual value: CONFIG_X86_MINIMUM_CPU_FAMILY=64
Value requested for CONFIG_CPU_SUP_TRANSMETA_32 not in final .config
Requested value: CONFIG_CPU_SUP_TRANSMETA_32=y
Actual value:
Value requested for CONFIG_CPU_SUP_VORTEX_32 not in final .config
Requested value: CONFIG_CPU_SUP_VORTEX_32=y
Actual value:
Value requested for CONFIG_HPET_TIMER not in final .config
Requested value: # CONFIG_HPET_TIMER is not set
Actual value: CONFIG_HPET_TIMER=y
Value requested for CONFIG_NR_CPUS_RANGE_END not in final .config
Requested value: CONFIG_NR_CPUS_RANGE_END=8
Actual value: CONFIG_NR_CPUS_RANGE_END=512
Value requested for CONFIG_NR_CPUS_DEFAULT not in final .config
Requested value: CONFIG_NR_CPUS_DEFAULT=8
Actual value: CONFIG_NR_CPUS_DEFAULT=64
Value requested for CONFIG_X86_ANCIENT_MCE not in final .config
Requested value: # CONFIG_X86_ANCIENT_MCE is not set
Actual value:
Value requested for CONFIG_X86_LEGACY_VM86 not in final .config
Requested value: # CONFIG_X86_LEGACY_VM86 is not set
Actual value:
Value requested for CONFIG_X86_ESPFIX32 not in final .config
Requested value: CONFIG_X86_ESPFIX32=y
Actual value:
Value requested for CONFIG_TOSHIBA not in final .config
Requested value: # CONFIG_TOSHIBA is not set
Actual value:
Value requested for CONFIG_X86_REBOOTFIXUPS not in final .config
Requested value: # CONFIG_X86_REBOOTFIXUPS is not set
Actual value:
Value requested for CONFIG_MICROCODE_INITRD32 not in final .config
Requested value: CONFIG_MICROCODE_INITRD32=y
Actual value:
Value requested for CONFIG_NOHIGHMEM not in final .config
Requested value: # CONFIG_NOHIGHMEM is not set
Actual value:
Value requested for CONFIG_HIGHMEM4G not in final .config
Requested value: CONFIG_HIGHMEM4G=y
Actual value:
Value requested for CONFIG_HIGHMEM64G not in final .config
Requested value: # CONFIG_HIGHMEM64G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_3G not in final .config
Requested value: CONFIG_VMSPLIT_3G=y
Actual value:
Value requested for CONFIG_VMSPLIT_3G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_3G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G not in final .config
Requested value: # CONFIG_VMSPLIT_2G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_2G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_1G not in final .config
Requested value: # CONFIG_VMSPLIT_1G is not set
Actual value:
Value requested for CONFIG_PAGE_OFFSET not in final .config
Requested value: CONFIG_PAGE_OFFSET=0xC0000000
Actual value:
Value requested for CONFIG_HIGHMEM not in final .config
Requested value: CONFIG_HIGHMEM=y
Actual value:
Value requested for CONFIG_X86_PAE not in final .config
Requested value: # CONFIG_X86_PAE is not set
Actual value:
Value requested for CONFIG_ARCH_FLATMEM_ENABLE not in final .config
Requested value: CONFIG_ARCH_FLATMEM_ENABLE=y
Actual value:
Value requested for CONFIG_ARCH_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_ARCH_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_ILLEGAL_POINTER_VALUE not in final .config
Requested value: CONFIG_ILLEGAL_POINTER_VALUE=0
Actual value: CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
Value requested for CONFIG_HIGHPTE not in final .config
Requested value: # CONFIG_HIGHPTE is not set
Actual value:
Value requested for CONFIG_COMPAT_VDSO not in final .config
Requested value: # CONFIG_COMPAT_VDSO is not set
Actual value:
Value requested for CONFIG_FUNCTION_PADDING_CFI not in final .config
Requested value: CONFIG_FUNCTION_PADDING_CFI=0
Actual value: CONFIG_FUNCTION_PADDING_CFI=11
Value requested for CONFIG_FUNCTION_PADDING_BYTES not in final .config
Requested value: CONFIG_FUNCTION_PADDING_BYTES=4
Actual value: CONFIG_FUNCTION_PADDING_BYTES=16
Value requested for CONFIG_APM not in final .config
Requested value: # CONFIG_APM is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K6 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K6 is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K7 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K7 is not set
Actual value:
Value requested for CONFIG_X86_GX_SUSPMOD not in final .config
Requested value: # CONFIG_X86_GX_SUSPMOD is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_ICH not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_ICH is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_SMI not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_SMI is not set
Actual value:
Value requested for CONFIG_X86_CPUFREQ_NFORCE2 not in final .config
Requested value: # CONFIG_X86_CPUFREQ_NFORCE2 is not set
Actual value:
Value requested for CONFIG_X86_LONGRUN not in final .config
Requested value: # CONFIG_X86_LONGRUN is not set
Actual value:
Value requested for CONFIG_X86_LONGHAUL not in final .config
Requested value: # CONFIG_X86_LONGHAUL is not set
Actual value:
Value requested for CONFIG_X86_E_POWERSAVER not in final .config
Requested value: # CONFIG_X86_E_POWERSAVER is not set
Actual value:
Value requested for CONFIG_PCI_GOBIOS not in final .config
Requested value: # CONFIG_PCI_GOBIOS is not set
Actual value:
Value requested for CONFIG_PCI_GOMMCONFIG not in final .config
Requested value: # CONFIG_PCI_GOMMCONFIG is not set
Actual value:
Value requested for CONFIG_PCI_GODIRECT not in final .config
Requested value: # CONFIG_PCI_GODIRECT is not set
Actual value:
Value requested for CONFIG_PCI_GOANY not in final .config
Requested value: CONFIG_PCI_GOANY=y
Actual value:
Value requested for CONFIG_PCI_BIOS not in final .config
Requested value: CONFIG_PCI_BIOS=y
Actual value:
Value requested for CONFIG_ISA not in final .config
Requested value: # CONFIG_ISA is not set
Actual value:
Value requested for CONFIG_SCx200 not in final .config
Requested value: # CONFIG_SCx200 is not set
Actual value:
Value requested for CONFIG_OLPC not in final .config
Requested value: # CONFIG_OLPC is not set
Actual value:
Value requested for CONFIG_ALIX not in final .config
Requested value: # CONFIG_ALIX is not set
Actual value:
Value requested for CONFIG_NET5501 not in final .config
Requested value: # CONFIG_NET5501 is not set
Actual value:
Value requested for CONFIG_GEOS not in final .config
Requested value: # CONFIG_GEOS is not set
Actual value:
Value requested for CONFIG_COMPAT_32 not in final .config
Requested value: CONFIG_COMPAT_32=y
Actual value:
Value requested for CONFIG_HAVE_ATOMIC_IOMAP not in final .config
Requested value: CONFIG_HAVE_ATOMIC_IOMAP=y
Actual value:
Value requested for CONFIG_ARCH_32BIT_OFF_T not in final .config
Requested value: CONFIG_ARCH_32BIT_OFF_T=y
Actual value:
Value requested for CONFIG_ARCH_WANT_IPC_PARSE_VERSION not in final .config
Requested value: CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
Actual value:
Value requested for CONFIG_MODULES_USE_ELF_REL not in final .config
Requested value: CONFIG_MODULES_USE_ELF_REL=y
Actual value:
Value requested for CONFIG_ARCH_MMAP_RND_BITS not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS=28
Value requested for CONFIG_CLONE_BACKWARDS not in final .config
Requested value: CONFIG_CLONE_BACKWARDS=y
Actual value:
Value requested for CONFIG_OLD_SIGSUSPEND3 not in final .config
Requested value: CONFIG_OLD_SIGSUSPEND3=y
Actual value:
Value requested for CONFIG_OLD_SIGACTION not in final .config
Requested value: CONFIG_OLD_SIGACTION=y
Actual value:
Value requested for CONFIG_ARCH_SPLIT_ARG64 not in final .config
Requested value: CONFIG_ARCH_SPLIT_ARG64=y
Actual value:
Value requested for CONFIG_FUNCTION_ALIGNMENT not in final .config
Requested value: CONFIG_FUNCTION_ALIGNMENT=4
Actual value: CONFIG_FUNCTION_ALIGNMENT=16
Value requested for CONFIG_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_FLATMEM_MANUAL not in final .config
Requested value: CONFIG_FLATMEM_MANUAL=y
Actual value:
Value requested for CONFIG_SPARSEMEM_MANUAL not in final .config
Requested value: # CONFIG_SPARSEMEM_MANUAL is not set
Actual value:
Value requested for CONFIG_FLATMEM not in final .config
Requested value: CONFIG_FLATMEM=y
Actual value:
Value requested for CONFIG_SPARSEMEM_STATIC not in final .config
Requested value: CONFIG_SPARSEMEM_STATIC=y
Actual value:
Value requested for CONFIG_BOUNCE not in final .config
Requested value: CONFIG_BOUNCE=y
Actual value:
Value requested for CONFIG_KMAP_LOCAL not in final .config
Requested value: CONFIG_KMAP_LOCAL=y
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_COMPAQ not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_COMPAQ is not set
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_IBM not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_IBM is not set
Actual value:
Value requested for CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH not in final .config
Requested value: CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH=y
Actual value:
Value requested for CONFIG_PCH_PHUB not in final .config
Requested value: # CONFIG_PCH_PHUB is not set
Actual value:
Value requested for CONFIG_SCSI_NSP32 not in final .config
Requested value: # CONFIG_SCSI_NSP32 is not set
Actual value:
Value requested for CONFIG_PATA_CS5520 not in final .config
Requested value: # CONFIG_PATA_CS5520 is not set
Actual value:
Value requested for CONFIG_PATA_CS5530 not in final .config
Requested value: # CONFIG_PATA_CS5530 is not set
Actual value:
Value requested for CONFIG_PATA_CS5535 not in final .config
Requested value: # CONFIG_PATA_CS5535 is not set
Actual value:
Value requested for CONFIG_PATA_CS5536 not in final .config
Requested value: # CONFIG_PATA_CS5536 is not set
Actual value:
Value requested for CONFIG_PATA_SC1200 not in final .config
Requested value: # CONFIG_PATA_SC1200 is not set
Actual value:
Value requested for CONFIG_PCH_GBE not in final .config
Requested value: # CONFIG_PCH_GBE is not set
Actual value:
Value requested for CONFIG_INPUT_WISTRON_BTNS not in final .config
Requested value: # CONFIG_INPUT_WISTRON_BTNS is not set
Actual value:
Value requested for CONFIG_SERIAL_TIMBERDALE not in final .config
Requested value: # CONFIG_SERIAL_TIMBERDALE is not set
Actual value:
Value requested for CONFIG_SERIAL_PCH_UART not in final .config
Requested value: # CONFIG_SERIAL_PCH_UART is not set
Actual value:
Value requested for CONFIG_HW_RANDOM_GEODE not in final .config
Requested value: CONFIG_HW_RANDOM_GEODE=y
Actual value:
Value requested for CONFIG_SONYPI not in final .config
Requested value: # CONFIG_SONYPI is not set
Actual value:
Value requested for CONFIG_PC8736x_GPIO not in final .config
Requested value: # CONFIG_PC8736x_GPIO is not set
Actual value:
Value requested for CONFIG_NSC_GPIO not in final .config
Requested value: # CONFIG_NSC_GPIO is not set
Actual value:
Value requested for CONFIG_I2C_EG20T not in final .config
Requested value: # CONFIG_I2C_EG20T is not set
Actual value:
Value requested for CONFIG_SCx200_ACB not in final .config
Requested value: # CONFIG_SCx200_ACB is not set
Actual value:
Value requested for CONFIG_PTP_1588_CLOCK_PCH not in final .config
Requested value: # CONFIG_PTP_1588_CLOCK_PCH is not set
Actual value:
Value requested for CONFIG_SBC8360_WDT not in final .config
Requested value: # CONFIG_SBC8360_WDT is not set
Actual value:
Value requested for CONFIG_SBC7240_WDT not in final .config
Requested value: # CONFIG_SBC7240_WDT is not set
Actual value:
Value requested for CONFIG_MFD_CS5535 not in final .config
Requested value: # CONFIG_MFD_CS5535 is not set
Actual value:
Value requested for CONFIG_AGP_ALI not in final .config
Requested value: # CONFIG_AGP_ALI is not set
Actual value:
Value requested for CONFIG_AGP_ATI not in final .config
Requested value: # CONFIG_AGP_ATI is not set
Actual value:
Value requested for CONFIG_AGP_AMD not in final .config
Requested value: # CONFIG_AGP_AMD is not set
Actual value:
Value requested for CONFIG_AGP_NVIDIA not in final .config
Requested value: # CONFIG_AGP_NVIDIA is not set
Actual value:
Value requested for CONFIG_AGP_SWORKS not in final .config
Requested value: # CONFIG_AGP_SWORKS is not set
Actual value:
Value requested for CONFIG_AGP_EFFICEON not in final .config
Requested value: # CONFIG_AGP_EFFICEON is not set
Actual value:
Value requested for CONFIG_SND_CS5530 not in final .config
Requested value: # CONFIG_SND_CS5530 is not set
Actual value:
Value requested for CONFIG_SND_CS5535AUDIO not in final .config
Requested value: # CONFIG_SND_CS5535AUDIO is not set
Actual value:
Value requested for CONFIG_SND_SIS7019 not in final .config
Requested value: # CONFIG_SND_SIS7019 is not set
Actual value:
Value requested for CONFIG_LEDS_OT200 not in final .config
Requested value: # CONFIG_LEDS_OT200 is not set
Actual value:
Value requested for CONFIG_PCH_DMA not in final .config
Requested value: # CONFIG_PCH_DMA is not set
Actual value:
Value requested for CONFIG_CLKSRC_I8253 not in final .config
Requested value: CONFIG_CLKSRC_I8253=y
Actual value:
Value requested for CONFIG_MAILBOX not in final .config
Requested value: # CONFIG_MAILBOX is not set
Actual value: CONFIG_MAILBOX=y
Value requested for CONFIG_CRYPTO_SERPENT_SSE2_586 not in final .config
Requested value: # CONFIG_CRYPTO_SERPENT_SSE2_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_TWOFISH_586 not in final .config
Requested value: # CONFIG_CRYPTO_TWOFISH_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_GEODE not in final .config
Requested value: # CONFIG_CRYPTO_DEV_GEODE is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_HIFN_795X not in final .config
Requested value: # CONFIG_CRYPTO_DEV_HIFN_795X is not set
Actual value:
Value requested for CONFIG_CRYPTO_LIB_POLY1305_RSIZE not in final .config
Requested value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
Actual value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11
Value requested for CONFIG_AUDIT_GENERIC not in final .config
Requested value: CONFIG_AUDIT_GENERIC=y
Actual value:
Value requested for CONFIG_GENERIC_VDSO_32 not in final .config
Requested value: CONFIG_GENERIC_VDSO_32=y
Actual value:
Value requested for CONFIG_DEBUG_KMAP_LOCAL not in final .config
Requested value: # CONFIG_DEBUG_KMAP_LOCAL is not set
Actual value:
Value requested for CONFIG_DEBUG_HIGHMEM not in final .config
Requested value: # CONFIG_DEBUG_HIGHMEM is not set
Actual value:
Value requested for CONFIG_HAVE_DEBUG_STACKOVERFLOW not in final .config
Requested value: CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
Actual value:
Value requested for CONFIG_DEBUG_STACKOVERFLOW not in final .config
Requested value: # CONFIG_DEBUG_STACKOVERFLOW is not set
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_TRACER not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_FREGS not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y
Actual value:
Value requested for CONFIG_HAVE_FTRACE_GRAPH_FUNC not in final .config
Requested value: CONFIG_HAVE_FTRACE_GRAPH_FUNC=y
Actual value:
Value requested for CONFIG_DRM_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_KUNIT_TEST=m
Actual value:
Value requested for CONFIG_DRM_XE_WERROR not in final .config
Requested value: CONFIG_DRM_XE_WERROR=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG not in final .config
Requested value: CONFIG_DRM_XE_DEBUG=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG_MEM not in final .config
Requested value: CONFIG_DRM_XE_DEBUG_MEM=y
Actual value:
Value requested for CONFIG_DRM_XE_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_XE_KUNIT_TEST=m
Actual value:
++ nproc
+ make -j48 ARCH=i386 olddefconfig
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
#
# configuration written to .config
#
++ nproc
+ make -j48 ARCH=i386
SYNC include/config/auto.conf.cmd
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
GEN Makefile
WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h
WRAP arch/x86/include/generated/uapi/asm/errno.h
WRAP arch/x86/include/generated/uapi/asm/fcntl.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_32.h
WRAP arch/x86/include/generated/uapi/asm/ioctl.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_64.h
WRAP arch/x86/include/generated/uapi/asm/ioctls.h
WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_x32.h
SYSTBL arch/x86/include/generated/asm/syscalls_32.h
UPD include/generated/uapi/linux/version.h
WRAP arch/x86/include/generated/uapi/asm/poll.h
WRAP arch/x86/include/generated/uapi/asm/param.h
WRAP arch/x86/include/generated/uapi/asm/resource.h
WRAP arch/x86/include/generated/uapi/asm/socket.h
WRAP arch/x86/include/generated/uapi/asm/sockios.h
WRAP arch/x86/include/generated/uapi/asm/termbits.h
WRAP arch/x86/include/generated/uapi/asm/termios.h
WRAP arch/x86/include/generated/uapi/asm/types.h
UPD include/generated/compile.h
WRAP arch/x86/include/generated/asm/early_ioremap.h
WRAP arch/x86/include/generated/asm/fprobe.h
WRAP arch/x86/include/generated/asm/mcs_spinlock.h
WRAP arch/x86/include/generated/asm/mmzone.h
WRAP arch/x86/include/generated/asm/irq_regs.h
WRAP arch/x86/include/generated/asm/kmap_size.h
HOSTCC arch/x86/tools/relocs_32.o
WRAP arch/x86/include/generated/asm/local64.h
WRAP arch/x86/include/generated/asm/mmiowb.h
HOSTCC scripts/kallsyms
HOSTCC arch/x86/tools/relocs_64.o
HOSTCC scripts/sorttable
HOSTCC arch/x86/tools/relocs_common.o
HOSTCC scripts/asn1_compiler
WRAP arch/x86/include/generated/asm/module.lds.h
WRAP arch/x86/include/generated/asm/rwonce.h
HOSTCC scripts/selinux/mdp/mdp
HOSTLD arch/x86/tools/relocs
UPD include/config/kernel.release
UPD include/generated/utsrelease.h
CC scripts/mod/empty.o
HOSTCC scripts/mod/mk_elfconfig
CC scripts/mod/devicetable-offsets.s
UPD scripts/mod/devicetable-offsets.h
MKELF scripts/mod/elfconfig.h
HOSTCC scripts/mod/modpost.o
HOSTCC scripts/mod/file2alias.o
HOSTCC scripts/mod/sumversion.o
HOSTCC scripts/mod/symsearch.o
HOSTLD scripts/mod/modpost
CC kernel/bounds.s
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-instrumented.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-arch-fallback.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-long.h
UPD include/generated/timeconst.h
UPD include/generated/bounds.h
CC arch/x86/kernel/asm-offsets.s
UPD include/generated/asm-offsets.h
CALL /workspace/kernel/scripts/checksyscalls.sh
LDS scripts/module.lds
CC init/main.o
HOSTCC usr/gen_init_cpio
CC init/do_mounts.o
CC certs/system_keyring.o
CC init/do_mounts_initrd.o
UPD init/utsversion-tmp.h
CC init/initramfs.o
CC mm/filemap.o
AS arch/x86/lib/atomic64_cx8_32.o
CC ipc/util.o
CC ipc/msgutil.o
CC security/commoncap.o
AS arch/x86/lib/checksum_32.o
CC io_uring/io_uring.o
CC init/calibrate.o
CC mm/mempool.o
CC ipc/msg.o
CC arch/x86/pci/i386.o
CC security/lsm_syscalls.o
CC arch/x86/lib/cmdline.o
CC init/init_task.o
CC block/bdev.o
CC arch/x86/realmode/init.o
AR arch/x86/crypto/built-in.a
CC io_uring/opdef.o
CC arch/x86/power/cpu.o
CC arch/x86/video/video-common.o
AR arch/x86/net/built-in.a
HOSTCC security/selinux/genheaders
CC security/integrity/iint.o
AR virt/lib/built-in.a
AR arch/x86/entry/vsyscall/built-in.a
CC block/partitions/core.o
CC security/keys/gc.o
CC fs/nfs_common/nfsacl.o
CC block/partitions/msdos.o
CC arch/x86/events/amd/core.o
CC arch/x86/mm/pat/set_memory.o
AR arch/x86/platform/atom/built-in.a
AR drivers/cache/built-in.a
CC net/ethernet/eth.o
CC arch/x86/virt/svm/cmdline.o
CC ipc/sem.o
CC net/core/sock.o
CC lib/math/div64.o
AR virt/built-in.a
CC sound/core/sound.o
CC fs/notify/dnotify/dnotify.o
CC sound/core/seq/seq.o
CC arch/x86/kernel/fpu/init.o
AR drivers/irqchip/built-in.a
AR arch/x86/platform/ce4100/built-in.a
CC kernel/locking/mutex.o
CC arch/x86/entry/vdso/vma.o
CC kernel/power/qos.o
CC kernel/printk/printk.o
CC arch/x86/platform/efi/memmap.o
AR drivers/bus/mhi/built-in.a
CC kernel/sched/core.o
AR drivers/bus/built-in.a
AR drivers/pwm/built-in.a
CC crypto/asymmetric_keys/asymmetric_type.o
AR drivers/leds/trigger/built-in.a
AS arch/x86/lib/cmpxchg8b_emu.o
AR drivers/leds/blink/built-in.a
AR arch/x86/virt/svm/built-in.a
AR drivers/leds/simple/built-in.a
CC drivers/leds/led-core.o
AR arch/x86/virt/vmx/built-in.a
CC arch/x86/lib/cpu.o
AR arch/x86/virt/built-in.a
AS arch/x86/realmode/rm/header.o
CC lib/math/gcd.o
AS arch/x86/realmode/rm/trampoline_32.o
GEN security/selinux/flask.h security/selinux/av_permissions.h
CC security/selinux/avc.o
AS arch/x86/realmode/rm/stack.o
AS arch/x86/realmode/rm/reboot.o
CC lib/math/lcm.o
AS arch/x86/realmode/rm/wakeup_asm.o
CC arch/x86/realmode/rm/wakemain.o
CC lib/math/int_log.o
AR sound/i2c/other/built-in.a
AR sound/i2c/built-in.a
GEN usr/initramfs_data.cpio
CC security/min_addr.o
COPY usr/initramfs_inc_data
AS usr/initramfs_data.o
CC arch/x86/realmode/rm/video-mode.o
HOSTCC certs/extract-cert
AR usr/built-in.a
CC lib/math/int_pow.o
CC arch/x86/kernel/fpu/bugs.o
AR sound/drivers/opl3/built-in.a
AR sound/drivers/opl4/built-in.a
AR sound/drivers/mpu401/built-in.a
CC lib/math/int_sqrt.o
AR sound/drivers/vx/built-in.a
AR sound/drivers/pcsp/built-in.a
AR sound/drivers/built-in.a
CC net/core/request_sock.o
AS arch/x86/realmode/rm/copy.o
CC arch/x86/kernel/fpu/core.o
AS arch/x86/realmode/rm/bioscall.o
CC lib/math/reciprocal_div.o
CC arch/x86/realmode/rm/regs.o
CC arch/x86/lib/delay.o
CC arch/x86/realmode/rm/video-vga.o
CC sound/core/seq/seq_lock.o
CC net/core/skbuff.o
CC lib/math/rational.o
AR arch/x86/video/built-in.a
CC net/core/datagram.o
CC kernel/irq/irqdesc.o
CC arch/x86/realmode/rm/video-vesa.o
CERT certs/x509_certificate_list
CERT certs/signing_key.x509
AS certs/system_certificates.o
CC security/integrity/integrity_audit.o
AR certs/built-in.a
CC arch/x86/kernel/fpu/regset.o
CC kernel/power/main.o
CC drivers/leds/led-class.o
CC drivers/leds/led-triggers.o
CC arch/x86/realmode/rm/video-bios.o
CC arch/x86/pci/init.o
CC fs/nfs_common/grace.o
CC arch/x86/pci/pcbios.o
CC sound/core/seq/seq_clientmgr.o
CC crypto/asymmetric_keys/restrict.o
CC security/keys/key.o
AR net/802/built-in.a
AR fs/notify/dnotify/built-in.a
CC security/keys/keyring.o
CC sound/core/init.o
CC fs/notify/inotify/inotify_fsnotify.o
CC arch/x86/platform/efi/quirks.o
CC arch/x86/entry/vdso/extable.o
PASYMS arch/x86/realmode/rm/pasyms.h
AS arch/x86/lib/getuser.o
CC arch/x86/power/hibernate_32.o
AR sound/isa/ad1816a/built-in.a
GEN arch/x86/lib/inat-tables.c
LDS arch/x86/realmode/rm/realmode.lds
AR sound/isa/ad1848/built-in.a
AR sound/isa/cs423x/built-in.a
CC arch/x86/lib/insn-eval.o
LD arch/x86/realmode/rm/realmode.elf
RELOCS arch/x86/realmode/rm/realmode.relocs
AR sound/isa/es1688/built-in.a
OBJCOPY arch/x86/realmode/rm/realmode.bin
AS arch/x86/realmode/rmpiggy.o
AR sound/isa/galaxy/built-in.a
CC block/partitions/efi.o
AR arch/x86/realmode/built-in.a
AR sound/isa/gus/built-in.a
CC security/keys/keyctl.o
AR sound/isa/msnd/built-in.a
AR sound/isa/opti9xx/built-in.a
CC security/selinux/hooks.o
AR sound/isa/sb/built-in.a
AR sound/isa/wavefront/built-in.a
AR lib/math/built-in.a
AR sound/isa/wss/built-in.a
AR sound/isa/built-in.a
CC lib/crypto/mpi/generic_mpih-lshift.o
CC lib/crypto/memneq.o
CC lib/crypto/utils.o
CC lib/crypto/chacha.o
CC lib/zlib_inflate/inffast.o
CC arch/x86/kernel/cpu/mce/core.o
CC lib/zlib_inflate/inflate.o
CC arch/x86/events/amd/lbr.o
CC kernel/sched/fair.o
CC crypto/asymmetric_keys/signature.o
AR sound/pci/ac97/built-in.a
AR sound/pci/ali5451/built-in.a
AR sound/pci/asihpi/built-in.a
AR sound/pci/au88x0/built-in.a
AR sound/ppc/built-in.a
AR sound/arm/built-in.a
AR sound/sh/built-in.a
CC security/selinux/selinuxfs.o
CC arch/x86/mm/init.o
AR sound/pci/aw2/built-in.a
AR fs/notify/fanotify/built-in.a
CC fs/notify/fsnotify.o
CC security/selinux/netlink.o
AR sound/pci/ctxfi/built-in.a
AR sound/pci/ca0106/built-in.a
CC kernel/locking/semaphore.o
AR sound/pci/cs46xx/built-in.a
AR sound/pci/cs5535audio/built-in.a
CC fs/notify/inotify/inotify_user.o
AR net/ethernet/built-in.a
CC arch/x86/mm/pat/memtype.o
AR sound/pci/lola/built-in.a
AR sound/pci/lx6464es/built-in.a
AR sound/pci/echoaudio/built-in.a
CC kernel/irq/handle.o
CC net/core/stream.o
AR sound/pci/emu10k1/built-in.a
CC sound/pci/hda/hda_bind.o
CC arch/x86/kernel/fpu/signal.o
CC sound/core/seq/seq_memory.o
CC arch/x86/kernel/cpu/mce/severity.o
AR security/integrity/built-in.a
CC io_uring/kbuf.o
CC arch/x86/pci/mmconfig_32.o
CC arch/x86/kernel/cpu/mce/genpool.o
CC init/version.o
AR drivers/leds/built-in.a
CC lib/zlib_inflate/infutil.o
CC fs/nfs_common/common.o
CC drivers/pci/msi/pcidev_msi.o
AS arch/x86/power/hibernate_asm_32.o
CC arch/x86/power/hibernate.o
LDS arch/x86/entry/vdso/vdso32/vdso32.lds
CC lib/crypto/mpi/generic_mpih-mul1.o
AS arch/x86/entry/vdso/vdso32/note.o
AS arch/x86/entry/vdso/vdso32/system_call.o
AS arch/x86/entry/vdso/vdso32/sigreturn.o
AR init/built-in.a
CC arch/x86/entry/vdso/vdso32/vclock_gettime.o
AR sound/pci/ice1712/built-in.a
CC arch/x86/entry/vdso/vdso32/vgetcpu.o
CC sound/pci/hda/hda_codec.o
CC crypto/asymmetric_keys/public_key.o
CC arch/x86/platform/efi/efi.o
CC arch/x86/events/intel/core.o
CC arch/x86/lib/insn.o
CC arch/x86/events/zhaoxin/core.o
CC ipc/shm.o
AR block/partitions/built-in.a
CC kernel/power/console.o
CC block/fops.o
CC sound/core/memory.o
AR sound/synth/emux/built-in.a
CC lib/zlib_inflate/inftrees.o
AR sound/synth/built-in.a
AR sound/usb/misc/built-in.a
CC kernel/sched/build_policy.o
AR sound/usb/usx2y/built-in.a
AR sound/usb/caiaq/built-in.a
AR sound/usb/6fire/built-in.a
AR sound/usb/hiface/built-in.a
AR sound/usb/bcd2000/built-in.a
AR sound/usb/built-in.a
CC arch/x86/events/intel/bts.o
CC kernel/irq/manage.o
CC kernel/locking/rwsem.o
CC lib/zlib_inflate/inflate_syms.o
CC arch/x86/events/amd/ibs.o
CC arch/x86/lib/kaslr.o
CC arch/x86/kernel/cpu/mce/intel.o
CC kernel/rcu/update.o
AS arch/x86/entry/entry.o
CC arch/x86/kernel/fpu/xstate.o
CC arch/x86/pci/direct.o
CC drivers/pci/msi/api.o
AR sound/pci/korg1212/built-in.a
CC drivers/pci/msi/msi.o
CC security/keys/permission.o
CC fs/iomap/trace.o
CC sound/core/control.o
CC lib/crypto/mpi/generic_mpih-mul2.o
AR fs/nfs_common/built-in.a
CC ipc/syscall.o
CC mm/oom_kill.o
CC sound/core/seq/seq_queue.o
AR arch/x86/power/built-in.a
CC arch/x86/kernel/acpi/boot.o
CC arch/x86/mm/pat/memtype_interval.o
CC arch/x86/kernel/acpi/sleep.o
CC arch/x86/kernel/cpu/mtrr/mtrr.o
AR fs/notify/inotify/built-in.a
CC arch/x86/lib/memcpy_32.o
CC fs/notify/notification.o
CC arch/x86/kernel/apic/apic.o
CC kernel/printk/printk_safe.o
HOSTCC arch/x86/entry/vdso/vdso2c
AR lib/zlib_inflate/built-in.a
AS arch/x86/lib/memmove_32.o
CC arch/x86/lib/misc.o
AR sound/pci/mixart/built-in.a
ASN.1 crypto/asymmetric_keys/x509.asn1.[ch]
CC arch/x86/platform/efi/efi_32.o
ASN.1 crypto/asymmetric_keys/x509_akid.asn1.[ch]
CC crypto/asymmetric_keys/x509_loader.o
CC arch/x86/lib/pc-conf-reg.o
CC crypto/asymmetric_keys/x509_public_key.o
AS arch/x86/platform/efi/efi_stub_32.o
CC kernel/power/process.o
CC security/selinux/nlmsgtab.o
AS arch/x86/lib/putuser.o
AS arch/x86/lib/retpoline.o
CC kernel/rcu/sync.o
CC arch/x86/lib/string_32.o
CC arch/x86/kernel/cpu/mtrr/if.o
AR arch/x86/events/zhaoxin/built-in.a
CC mm/fadvise.o
CC kernel/sched/build_utility.o
CC arch/x86/lib/strstr_32.o
CC lib/crypto/mpi/generic_mpih-mul3.o
CC arch/x86/lib/usercopy.o
AR kernel/livepatch/built-in.a
CC arch/x86/entry/vdso/vdso32-setup.o
CC kernel/dma/mapping.o
CC arch/x86/pci/mmconfig-shared.o
CC kernel/locking/percpu-rwsem.o
CC security/keys/process_keys.o
CC kernel/locking/spinlock.o
CC block/bio.o
CC kernel/entry/common.o
CC lib/crypto/aes.o
CC arch/x86/kernel/cpu/mce/amd.o
AR arch/x86/mm/pat/built-in.a
CC arch/x86/mm/init_32.o
CC arch/x86/pci/fixup.o
CC arch/x86/events/amd/uncore.o
CC fs/notify/group.o
CC kernel/printk/nbcon.o
ASN.1 crypto/asymmetric_keys/pkcs7.asn1.[ch]
CC crypto/asymmetric_keys/pkcs7_trust.o
CC ipc/ipc_sysctl.o
CC sound/core/seq/seq_fifo.o
CC arch/x86/lib/usercopy_32.o
CC arch/x86/lib/msr-smp.o
CC sound/core/seq/seq_prioq.o
VDSO arch/x86/entry/vdso/vdso32.so.dbg
OBJCOPY arch/x86/entry/vdso/vdso32.so
CC arch/x86/platform/efi/runtime-map.o
CC security/security.o
VDSO2C arch/x86/entry/vdso/vdso-image-32.c
CC arch/x86/entry/vdso/vdso-image-32.o
CC fs/notify/mark.o
CC drivers/pci/msi/irqdomain.o
CC drivers/pci/pcie/portdrv.o
CC kernel/dma/direct.o
AR arch/x86/kernel/fpu/built-in.a
CC arch/x86/kernel/cpu/mtrr/generic.o
CC lib/crypto/mpi/generic_mpih-rshift.o
CC net/sched/sch_generic.o
CC fs/iomap/iter.o
AS arch/x86/entry/entry_32.o
CC arch/x86/lib/cache-smp.o
CC crypto/asymmetric_keys/pkcs7_verify.o
AS arch/x86/kernel/acpi/wakeup_32.o
CC kernel/irq/spurious.o
AR arch/x86/entry/vdso/built-in.a
CC lib/crypto/mpi/generic_mpih-sub1.o
CC arch/x86/entry/syscall_32.o
CC arch/x86/kernel/acpi/cstate.o
CC kernel/locking/osq_lock.o
CC arch/x86/kernel/cpu/mtrr/cleanup.o
CC kernel/power/suspend.o
CC arch/x86/pci/acpi.o
CC ipc/mqueue.o
CC kernel/entry/syscall_user_dispatch.o
CC arch/x86/lib/crc32-glue.o
AR arch/x86/platform/geode/built-in.a
CC block/elevator.o
CC arch/x86/kernel/cpu/microcode/core.o
CC kernel/locking/qspinlock.o
CC block/blk-core.o
CC sound/core/seq/seq_timer.o
CC sound/pci/hda/hda_jack.o
CC io_uring/rsrc.o
CC kernel/printk/printk_ringbuffer.o
CC mm/maccess.o
CC crypto/asymmetric_keys/x509.asn1.o
CC kernel/power/hibernate.o
CC crypto/asymmetric_keys/x509_akid.asn1.o
CC arch/x86/mm/fault.o
CC crypto/asymmetric_keys/x509_cert_parser.o
CC lib/crypto/arc4.o
AR arch/x86/platform/efi/built-in.a
CC security/keys/request_key.o
AR arch/x86/platform/iris/built-in.a
CC kernel/irq/resend.o
AS arch/x86/lib/crc32-pclmul.o
CC arch/x86/platform/intel/iosf_mbi.o
CC ipc/namespace.o
AR drivers/pci/msi/built-in.a
CC security/selinux/netif.o
CC arch/x86/lib/msr.o
AS arch/x86/lib/msr-reg.o
AR arch/x86/kernel/acpi/built-in.a
CC fs/iomap/buffered-io.o
CC lib/crypto/mpi/generic_mpih-add1.o
AR sound/firewire/built-in.a
CC arch/x86/kernel/apic/apic_common.o
CC drivers/video/console/dummycon.o
CC drivers/pci/pcie/rcec.o
AR arch/x86/events/amd/built-in.a
CC drivers/video/backlight/backlight.o
CC fs/notify/fdinfo.o
AR kernel/entry/built-in.a
CC sound/core/seq/seq_system.o
AR drivers/video/fbdev/core/built-in.a
AR drivers/video/fbdev/omap/built-in.a
CC kernel/locking/rtmutex_api.o
CC kernel/power/snapshot.o
AR drivers/video/fbdev/omap2/omapfb/dss/built-in.a
AR drivers/video/fbdev/omap2/omapfb/displays/built-in.a
AR drivers/video/fbdev/omap2/omapfb/built-in.a
AR drivers/video/fbdev/omap2/built-in.a
AR drivers/video/fbdev/built-in.a
CC drivers/video/console/vgacon.o
CC kernel/printk/sysctl.o
CC lib/zlib_deflate/deflate.o
CC arch/x86/pci/legacy.o
CC arch/x86/kernel/cpu/mtrr/amd.o
CC arch/x86/kernel/cpu/mce/threshold.o
CC arch/x86/kernel/cpu/microcode/intel.o
CC kernel/irq/chip.o
CC arch/x86/entry/common.o
CC arch/x86/kernel/apic/apic_noop.o
CC security/lsm_audit.o
CC crypto/asymmetric_keys/pkcs7.asn1.o
CC arch/x86/mm/ioremap.o
CC crypto/asymmetric_keys/pkcs7_parser.o
CC net/core/scm.o
CC mm/page-writeback.o
CC mm/folio-compat.o
CC lib/crypto/mpi/mpicoder.o
AR kernel/printk/built-in.a
CC net/core/gen_stats.o
CC arch/x86/events/core.o
CC lib/lzo/lzo1x_compress.o
CC kernel/rcu/srcutree.o
AR arch/x86/platform/intel/built-in.a
AR arch/x86/platform/intel-mid/built-in.a
AR arch/x86/platform/intel-quark/built-in.a
AR arch/x86/platform/olpc/built-in.a
AR arch/x86/platform/scx200/built-in.a
AR fs/notify/built-in.a
CC sound/core/seq/seq_ports.o
AR arch/x86/platform/ts5500/built-in.a
CC arch/x86/kernel/cpu/cacheinfo.o
CC sound/pci/hda/hda_auto_parser.o
AR arch/x86/platform/uv/built-in.a
CC drivers/pci/pcie/bwctrl.o
AR arch/x86/platform/built-in.a
CC lib/lzo/lzo1x_decompress_safe.o
CC arch/x86/pci/irq.o
CC lib/crypto/mpi/mpi-add.o
CC security/keys/request_key_auth.o
CC arch/x86/lib/msr-reg-export.o
CC arch/x86/kernel/apic/ipi.o
AR sound/sparc/built-in.a
CC arch/x86/events/intel/ds.o
CC arch/x86/kernel/cpu/mtrr/cyrix.o
AR drivers/video/backlight/built-in.a
CC fs/iomap/direct-io.o
CC arch/x86/events/probe.o
AS arch/x86/lib/hweight.o
CC arch/x86/lib/iomem.o
CC block/blk-sysfs.o
CC kernel/dma/ops_helpers.o
AR crypto/asymmetric_keys/built-in.a
CC ipc/mq_sysctl.o
CC crypto/api.o
CC arch/x86/kernel/cpu/microcode/amd.o
CC io_uring/notif.o
CC lib/zlib_deflate/deftree.o
CC arch/x86/mm/extable.o
CC arch/x86/kernel/cpu/mtrr/centaur.o
CC kernel/locking/qrwlock.o
CC mm/readahead.o
CC security/selinux/netnode.o
AR drivers/video/console/built-in.a
CC drivers/video/aperture.o
AR lib/lzo/built-in.a
CC drivers/video/cmdline.o
AS arch/x86/entry/thunk.o
AR drivers/pci/pwrctrl/built-in.a
CC lib/crypto/gf128mul.o
CC arch/x86/events/utils.o
AR arch/x86/entry/built-in.a
CC lib/crypto/blake2s.o
CC io_uring/tctx.o
CC kernel/irq/dummychip.o
CC crypto/cipher.o
AR arch/x86/kernel/cpu/mce/built-in.a
CC security/selinux/netport.o
CC net/sched/sch_mq.o
CC lib/crypto/mpi/mpi-bit.o
CC arch/x86/lib/atomic64_32.o
CC drivers/pci/pcie/aspm.o
CC security/keys/user_defined.o
CC arch/x86/kernel/apic/vector.o
AR ipc/built-in.a
CC lib/lz4/lz4_decompress.o
CC arch/x86/events/intel/knc.o
CC arch/x86/lib/inat.o
CC sound/core/seq/seq_info.o
CC lib/zstd/zstd_decompress_module.o
AR kernel/locking/built-in.a
CC net/netlink/af_netlink.o
AR arch/x86/lib/built-in.a
AR arch/x86/lib/lib.a
AR sound/pci/nm256/built-in.a
CC kernel/dma/remap.o
CC fs/quota/dquot.o
AR sound/spi/built-in.a
CC fs/quota/quota_v2.o
CC drivers/video/nomodeset.o
AR sound/parisc/built-in.a
CC arch/x86/kernel/cpu/mtrr/legacy.o
CC lib/crypto/mpi/mpi-cmp.o
CC security/selinux/status.o
CC lib/zlib_deflate/deflate_syms.o
CC net/core/gen_estimator.o
CC kernel/rcu/tree.o
CC kernel/irq/devres.o
CC io_uring/filetable.o
CC io_uring/rw.o
CC io_uring/net.o
CC kernel/power/swap.o
CC fs/iomap/fiemap.o
CC sound/pci/hda/hda_sysfs.o
CC fs/proc/task_mmu.o
CC lib/zstd/decompress/huf_decompress.o
CC fs/proc/inode.o
CC arch/x86/pci/common.o
CC crypto/compress.o
AR sound/pcmcia/vx/built-in.a
AR sound/pcmcia/pdaudiocf/built-in.a
CC block/blk-flush.o
AR sound/pcmcia/built-in.a
CC arch/x86/kernel/apic/init.o
CC lib/crypto/blake2s-generic.o
CC security/keys/proc.o
CC arch/x86/mm/mmap.o
CC lib/crypto/sha1.o
CC drivers/video/hdmi.o
AR arch/x86/kernel/cpu/mtrr/built-in.a
AR arch/x86/kernel/cpu/microcode/built-in.a
CC security/selinux/ss/ebitmap.o
CC security/device_cgroup.o
CC arch/x86/kernel/cpu/scattered.o
CC lib/xz/xz_dec_syms.o
CC sound/core/seq/seq_dummy.o
AR lib/zlib_deflate/built-in.a
CC fs/iomap/seek.o
CC security/selinux/ss/hashtab.o
CC sound/core/misc.o
CC sound/pci/hda/hda_controller.o
CC kernel/rcu/rcu_segcblist.o
CC kernel/irq/kexec.o
CC lib/crypto/mpi/mpi-sub-ui.o
AR kernel/dma/built-in.a
CC lib/crypto/mpi/mpi-div.o
CC lib/crypto/mpi/mpi-mod.o
AR kernel/sched/built-in.a
CC security/keys/sysctl.o
AR net/bpf/built-in.a
CC crypto/algapi.o
CC mm/swap.o
CC arch/x86/kernel/apic/hw_nmi.o
CC lib/xz/xz_dec_stream.o
CC fs/kernfs/mount.o
CC lib/zstd/decompress/zstd_ddict.o
CC arch/x86/kernel/cpu/topology_common.o
CC net/sched/sch_frag.o
CC security/keys/keyctl_pkey.o
CC fs/sysfs/file.o
CC lib/crypto/mpi/mpi-mul.o
AR sound/pci/oxygen/built-in.a
CC fs/sysfs/dir.o
AR sound/pci/pcxhr/built-in.a
CC arch/x86/events/rapl.o
CC fs/quota/quota_tree.o
CC io_uring/poll.o
CC fs/kernfs/inode.o
CC arch/x86/mm/pgtable.o
AR sound/core/seq/built-in.a
CC lib/crypto/mpi/mpih-cmp.o
CC kernel/irq/autoprobe.o
CC kernel/module/main.o
CC sound/pci/hda/hda_proc.o
CC drivers/pci/pcie/pme.o
CC arch/x86/events/intel/lbr.o
CC net/core/net_namespace.o
CC arch/x86/pci/early.o
CC fs/iomap/swapfile.o
AR lib/lz4/built-in.a
CC lib/crypto/sha256.o
AR drivers/idle/built-in.a
CC kernel/irq/irqdomain.o
AR drivers/char/ipmi/built-in.a
CC arch/x86/mm/physaddr.o
CC drivers/acpi/acpica/dsargs.o
CC sound/core/device.o
AR drivers/video/built-in.a
CC drivers/pci/hotplug/pci_hotplug_core.o
CC arch/x86/events/intel/p4.o
CC block/blk-settings.o
CC fs/quota/quota.o
CC drivers/acpi/acpica/dscontrol.o
CC fs/kernfs/dir.o
CC fs/sysfs/symlink.o
CC lib/xz/xz_dec_lzma2.o
CC arch/x86/kernel/cpu/topology_ext.o
CC arch/x86/kernel/apic/io_apic.o
CC arch/x86/kernel/cpu/topology_amd.o
AR sound/pci/riptide/built-in.a
CC kernel/module/strict_rwx.o
AR security/keys/built-in.a
CC io_uring/eventfd.o
CC net/sched/sch_api.o
CC kernel/power/user.o
CC net/netlink/genetlink.o
CC drivers/pnp/pnpacpi/core.o
CC drivers/pnp/core.o
CC lib/crypto/mpi/mpih-div.o
CC drivers/pci/hotplug/acpi_pcihp.o
CC lib/zstd/decompress/zstd_decompress.o
CC security/selinux/ss/symtab.o
CC drivers/acpi/acpica/dsdebug.o
CC sound/core/info.o
CC net/sched/sch_blackhole.o
CC arch/x86/events/intel/p6.o
CC kernel/module/kmod.o
AR sound/mips/built-in.a
CC arch/x86/pci/bus_numa.o
CC arch/x86/mm/tlb.o
AR drivers/acpi/pmic/built-in.a
CC lib/zstd/decompress/zstd_decompress_block.o
CC fs/devpts/inode.o
AR drivers/pci/pcie/built-in.a
CC block/blk-ioc.o
CC security/selinux/ss/sidtab.o
AR fs/iomap/built-in.a
CC kernel/irq/proc.o
CC io_uring/uring_cmd.o
CC kernel/module/tree_lookup.o
CC arch/x86/kernel/cpu/common.o
CC crypto/scatterwalk.o
CC net/sched/cls_api.o
CC drivers/acpi/acpica/dsfield.o
CC fs/sysfs/mount.o
CC lib/xz/xz_dec_bcj.o
CC arch/x86/events/msr.o
CC fs/proc/root.o
AR drivers/pci/controller/dwc/built-in.a
AR drivers/pci/controller/mobiveil/built-in.a
AR drivers/pci/controller/plda/built-in.a
CC net/ethtool/ioctl.o
AR drivers/pci/controller/built-in.a
CC mm/truncate.o
CC net/netfilter/core.o
CC crypto/proc.o
CC net/ipv4/netfilter/nf_defrag_ipv4.o
CC net/ipv4/netfilter/nf_reject_ipv4.o
CC sound/pci/hda/hda_hwdep.o
CC drivers/pnp/pnpacpi/rsparser.o
CC crypto/aead.o
CC kernel/power/poweroff.o
CC net/ipv4/netfilter/ip_tables.o
CC net/xfrm/xfrm_policy.o
AR drivers/pci/hotplug/built-in.a
AR drivers/pci/switch/built-in.a
CC fs/quota/kqid.o
CC drivers/pci/access.o
CC drivers/pci/bus.o
CC arch/x86/pci/amd_bus.o
CC drivers/pci/probe.o
CC drivers/acpi/acpica/dsinit.o
CC arch/x86/mm/cpu_entry_area.o
CC lib/crypto/mpi/mpih-mul.o
CC arch/x86/events/intel/pt.o
AR sound/pci/rme9652/built-in.a
CC arch/x86/mm/maccess.o
CC lib/zstd/zstd_common_module.o
CC arch/x86/mm/pgprot.o
AR kernel/power/built-in.a
CC fs/kernfs/file.o
AR fs/devpts/built-in.a
CC arch/x86/mm/pgtable_32.o
AR lib/xz/built-in.a
CC arch/x86/mm/iomap_32.o
CC arch/x86/kernel/cpu/rdrand.o
CC net/ethtool/common.o
CC kernel/time/time.o
CC net/core/secure_seq.o
CC kernel/irq/migration.o
CC sound/core/isadma.o
AR drivers/amba/built-in.a
CC kernel/module/kallsyms.o
CC block/blk-map.o
CC net/netfilter/nf_log.o
CC fs/sysfs/group.o
CC drivers/pci/host-bridge.o
CC lib/zstd/common/debug.o
CC fs/proc/base.o
CC net/netlink/policy.o
CC drivers/acpi/acpica/dsmethod.o
CC fs/quota/netlink.o
AR sound/pci/trident/built-in.a
CC net/unix/af_unix.o
CC kernel/time/timer.o
CC kernel/module/procfs.o
CC sound/pci/hda/hda_intel.o
CC net/unix/garbage.o
CC io_uring/openclose.o
CC kernel/irq/cpuhotplug.o
CC security/selinux/ss/avtab.o
CC sound/core/vmaster.o
CC crypto/geniv.o
CC sound/core/ctljack.o
CC net/ethtool/netlink.o
AR drivers/pnp/pnpacpi/built-in.a
CC arch/x86/kernel/apic/msi.o
CC drivers/pnp/card.o
CC drivers/acpi/acpica/dsmthdat.o
AR arch/x86/pci/built-in.a
CC arch/x86/mm/hugetlbpage.o
CC net/core/flow_dissector.o
CC mm/vmscan.o
CC drivers/acpi/acpica/dsobject.o
CC fs/kernfs/symlink.o
CC security/selinux/ss/policydb.o
CC arch/x86/kernel/cpu/match.o
CC lib/crypto/mpi/mpi-pow.o
CC kernel/futex/core.o
CC net/ipv4/netfilter/iptable_filter.o
AR sound/pci/ymfpci/built-in.a
CC arch/x86/kernel/apic/probe_32.o
AR sound/soc/built-in.a
AR fs/sysfs/built-in.a
CC mm/shrinker.o
CC net/ipv6/netfilter/ip6_tables.o
CC net/sched/act_api.o
CC kernel/module/sysfs.o
CC kernel/irq/pm.o
CC drivers/pci/remove.o
AR sound/pci/vx222/built-in.a
CC net/ethtool/bitset.o
CC net/ipv4/route.o
CC arch/x86/events/intel/uncore.o
CC block/blk-merge.o
CC net/packet/af_packet.o
CC drivers/acpi/acpica/dsopcode.o
AR fs/quota/built-in.a
CC net/ipv4/netfilter/iptable_mangle.o
CC sound/core/jack.o
CC arch/x86/kernel/cpu/bugs.o
AR net/netlink/built-in.a
CC arch/x86/events/intel/uncore_nhmex.o
CC drivers/pci/pci.o
CC mm/shmem.o
CC arch/x86/kernel/kprobes/core.o
CC arch/x86/kernel/kprobes/opt.o
CC net/netfilter/nf_queue.o
CC arch/x86/kernel/cpu/aperfmperf.o
CC net/netfilter/nf_sockopt.o
CC arch/x86/mm/dump_pagetables.o
AR kernel/rcu/built-in.a
CC drivers/acpi/dptf/int340x_thermal.o
CC drivers/pnp/driver.o
AR arch/x86/kernel/apic/built-in.a
CC security/selinux/ss/services.o
CC io_uring/sqpoll.o
AR fs/kernfs/built-in.a
CC net/ipv6/netfilter/ip6table_filter.o
CC lib/crypto/mpi/mpiutil.o
CC crypto/lskcipher.o
CC lib/zstd/common/entropy_common.o
CC drivers/acpi/acpica/dspkginit.o
CC net/ethtool/strset.o
CC kernel/cgroup/cgroup.o
CC kernel/futex/syscalls.o
CC drivers/acpi/x86/apple.o
CC lib/zstd/common/error_private.o
CC kernel/irq/msi.o
AR kernel/module/built-in.a
CC drivers/acpi/tables.o
CC lib/zstd/common/fse_decompress.o
CC lib/zstd/common/zstd_common.o
AR drivers/acpi/dptf/built-in.a
CC drivers/acpi/acpica/dsutils.o
CC kernel/futex/pi.o
CC io_uring/xattr.o
CC drivers/acpi/acpica/dswexec.o
CC kernel/futex/requeue.o
CC sound/core/hwdep.o
AR sound/pci/hda/built-in.a
AR sound/pci/built-in.a
CC drivers/pnp/resource.o
CC kernel/trace/trace_clock.o
CC kernel/bpf/core.o
CC lib/dim/dim.o
AR lib/crypto/mpi/built-in.a
AR lib/crypto/built-in.a
CC drivers/pnp/manager.o
CC net/sched/sch_fifo.o
CC arch/x86/mm/highmem_32.o
CC kernel/time/hrtimer.o
CC kernel/trace/ring_buffer.o
CC net/ipv4/netfilter/ipt_REJECT.o
CC fs/proc/generic.o
CC fs/proc/array.o
CC drivers/acpi/x86/cmos_rtc.o
AR arch/x86/kernel/kprobes/built-in.a
CC drivers/pnp/support.o
CC drivers/pnp/interface.o
CC drivers/pci/pci-driver.o
AR lib/zstd/built-in.a
CC drivers/acpi/acpica/dswload.o
CC crypto/skcipher.o
CC drivers/acpi/osi.o
CC fs/netfs/buffered_read.o
CC security/selinux/ss/conditional.o
CC lib/dim/net_dim.o
CC block/blk-timeout.o
CC net/netfilter/utils.o
CC net/unix/sysctl_net_unix.o
CC net/xfrm/xfrm_state.o
CC kernel/cgroup/rstat.o
CC kernel/futex/waitwake.o
CC sound/core/timer.o
AR drivers/clk/actions/built-in.a
CC net/ipv6/netfilter/ip6table_mangle.o
CC arch/x86/events/intel/uncore_snb.o
AR drivers/clk/analogbits/built-in.a
AR drivers/clk/bcm/built-in.a
AR drivers/clk/imgtec/built-in.a
AR sound/atmel/built-in.a
AR drivers/clk/imx/built-in.a
CC [M] net/ipv4/netfilter/iptable_nat.o
CC net/sched/cls_cgroup.o
AR drivers/clk/ingenic/built-in.a
CC net/ethtool/linkinfo.o
AR drivers/clk/mediatek/built-in.a
CC drivers/acpi/acpica/dswload2.o
AR drivers/clk/microchip/built-in.a
CC net/core/sysctl_net_core.o
AR drivers/clk/mstar/built-in.a
LDS arch/x86/kernel/vmlinux.lds
AR drivers/clk/mvebu/built-in.a
CC arch/x86/kernel/cpu/cpuid-deps.o
CC net/ethtool/linkmodes.o
AR drivers/clk/ralink/built-in.a
CC net/ipv4/inetpeer.o
AR drivers/clk/renesas/built-in.a
CC io_uring/nop.o
AR drivers/clk/socfpga/built-in.a
AR arch/x86/mm/built-in.a
CC drivers/acpi/x86/lpss.o
AR drivers/clk/sophgo/built-in.a
CC security/selinux/ss/mls.o
CC fs/netfs/buffered_write.o
AR drivers/clk/sprd/built-in.a
AR drivers/clk/starfive/built-in.a
AR drivers/clk/sunxi-ng/built-in.a
AR drivers/clk/ti/built-in.a
CC fs/ext4/balloc.o
CC kernel/irq/affinity.o
AR drivers/clk/versatile/built-in.a
CC net/netfilter/nfnetlink.o
AR drivers/clk/xilinx/built-in.a
AR drivers/clk/built-in.a
CC kernel/irq/matrix.o
CC arch/x86/kernel/cpu/umwait.o
CC drivers/pnp/quirks.o
CC arch/x86/events/intel/uncore_snbep.o
CC block/blk-lib.o
CC net/core/dev.o
CC kernel/time/sleep_timeout.o
CC drivers/acpi/acpica/dswscope.o
CC fs/proc/fd.o
CC drivers/pci/search.o
CC net/ipv6/af_inet6.o
AR kernel/futex/built-in.a
CC net/ipv6/anycast.o
CC drivers/dma/dw/core.o
AR net/dsa/built-in.a
CC lib/dim/rdma_dim.o
CC net/sunrpc/auth_gss/auth_gss.o
CC crypto/seqiv.o
AR net/unix/built-in.a
CC drivers/dma/dw/dw.o
CC arch/x86/events/intel/uncore_discovery.o
CC drivers/acpi/x86/s2idle.o
CC drivers/acpi/acpica/dswstate.o
CC sound/hda/hda_bus_type.o
CC io_uring/fs.o
CC net/netfilter/nfnetlink_log.o
CC block/blk-mq.o
CC block/blk-mq-tag.o
MKCAP arch/x86/kernel/cpu/capflags.c
CC net/ipv6/ip6_output.o
CC net/ipv4/protocol.o
CC kernel/time/timekeeping.o
CC net/ipv6/ip6_input.o
CC mm/util.o
CC net/sched/ematch.o
AR lib/dim/built-in.a
CC lib/fonts/fonts.o
CC net/ipv6/netfilter/nf_defrag_ipv6_hooks.o
AR net/ipv4/netfilter/built-in.a
CC fs/netfs/direct_read.o
CC lib/argv_split.o
CC drivers/pnp/system.o
CC net/ethtool/rss.o
CC net/ipv6/addrconf.o
CC fs/netfs/direct_write.o
CC fs/jbd2/transaction.o
CC net/sunrpc/auth_gss/gss_mech_switch.o
CC fs/ext4/bitmap.o
CC drivers/acpi/acpica/evevent.o
CC io_uring/splice.o
CC kernel/trace/trace.o
CC security/selinux/ss/context.o
CC drivers/pci/rom.o
CC sound/core/hrtimer.o
CC crypto/echainiv.o
CC fs/proc/proc_tty.o
CC net/ipv6/netfilter/nf_conntrack_reasm.o
CC net/ipv6/netfilter/nf_reject_ipv6.o
AR kernel/irq/built-in.a
CC drivers/dma/hsu/hsu.o
CC lib/fonts/font_8x16.o
AR drivers/dma/idxd/built-in.a
CC drivers/dma/dw/idma32.o
AR net/packet/built-in.a
CC net/xfrm/xfrm_hash.o
CC sound/hda/hdac_bus.o
AR drivers/pnp/built-in.a
CC kernel/trace/trace_output.o
CC drivers/acpi/acpica/evgpe.o
CC net/ipv4/ip_input.o
CC drivers/acpi/x86/utils.o
CC kernel/time/ntp.o
CC mm/mmzone.o
AR lib/fonts/built-in.a
CC lib/bug.o
CC sound/core/pcm.o
CC lib/buildid.o
CC net/ipv4/ip_fragment.o
CC kernel/trace/trace_seq.o
CC net/ipv4/ip_forward.o
CC fs/ext4/block_validity.o
AR kernel/bpf/built-in.a
CC drivers/pci/setup-res.o
CC net/ipv6/netfilter/ip6t_ipv6header.o
CC arch/x86/kernel/cpu/powerflags.o
CC fs/netfs/iterator.o
CC crypto/ahash.o
CC fs/proc/cmdline.o
CC net/ipv6/addrlabel.o
CC net/ethtool/linkstate.o
CC net/core/dev_addr_lists.o
AR net/sched/built-in.a
CC io_uring/sync.o
CC sound/hda/hdac_device.o
CC io_uring/msg_ring.o
CC drivers/acpi/acpica/evgpeblk.o
CC drivers/dma/dw/acpi.o
CC kernel/cgroup/namespace.o
CC net/ethtool/debug.o
CC security/selinux/netlabel.o
AR drivers/dma/hsu/built-in.a
CC sound/core/pcm_native.o
CC kernel/time/clocksource.o
CC net/core/dst.o
CC net/netfilter/nf_conntrack_core.o
CC mm/vmstat.o
CC drivers/acpi/x86/blacklist.o
CC net/netfilter/nf_conntrack_standalone.o
CC drivers/acpi/osl.o
CC drivers/pci/irq.o
CC drivers/pci/vpd.o
CC arch/x86/events/intel/cstate.o
CC drivers/acpi/acpica/evgpeinit.o
CC drivers/acpi/acpica/evgpeutil.o
CC lib/clz_tab.o
CC fs/proc/consoles.o
CC kernel/events/core.o
CC lib/cmdline.o
CC fs/jbd2/commit.o
CC lib/cpumask.o
CC io_uring/advise.o
AR sound/x86/built-in.a
AR net/wireless/tests/built-in.a
CC arch/x86/kernel/cpu/topology.o
CC net/wireless/core.o
CC net/sunrpc/auth_gss/svcauth_gss.o
CC kernel/cgroup/cgroup-v1.o
CC fs/ext4/dir.o
AR drivers/dma/dw/built-in.a
AR drivers/dma/amd/built-in.a
AR drivers/dma/mediatek/built-in.a
AR drivers/dma/qcom/built-in.a
AR drivers/acpi/x86/built-in.a
AR drivers/dma/stm32/built-in.a
CC kernel/trace/trace_stat.o
AR drivers/dma/ti/built-in.a
CC net/xfrm/xfrm_input.o
CC net/core/netevent.o
CC fs/netfs/locking.o
AR drivers/dma/xilinx/built-in.a
CC drivers/dma/dmaengine.o
CC crypto/shash.o
CC net/netfilter/nf_conntrack_expect.o
CC drivers/acpi/acpica/evglock.o
CC mm/backing-dev.o
AR drivers/soc/apple/built-in.a
AR drivers/soc/aspeed/built-in.a
CC kernel/fork.o
AR drivers/soc/bcm/built-in.a
AR drivers/soc/fsl/built-in.a
AR drivers/soc/fujitsu/built-in.a
CC sound/hda/hdac_sysfs.o
AR drivers/soc/hisilicon/built-in.a
CC net/ethtool/wol.o
CC fs/jbd2/recovery.o
CC lib/ctype.o
CC net/ethtool/features.o
AR drivers/soc/imx/built-in.a
AR drivers/soc/ixp4xx/built-in.a
CC arch/x86/kernel/cpu/proc.o
AR drivers/soc/loongson/built-in.a
AR drivers/soc/mediatek/built-in.a
CC sound/hda/hdac_regmap.o
CC fs/proc/cpuinfo.o
AR drivers/soc/microchip/built-in.a
CC net/ipv6/netfilter/ip6t_REJECT.o
AR drivers/soc/nuvoton/built-in.a
AR drivers/soc/pxa/built-in.a
AR sound/xen/built-in.a
AR drivers/soc/amlogic/built-in.a
CC kernel/time/jiffies.o
CC net/sunrpc/clnt.o
AR drivers/soc/qcom/built-in.a
CC drivers/virtio/virtio.o
CC net/ipv4/ip_options.o
AR drivers/soc/renesas/built-in.a
AR drivers/soc/rockchip/built-in.a
CC mm/mm_init.o
AR drivers/soc/sunxi/built-in.a
AR drivers/soc/ti/built-in.a
AR drivers/soc/versatile/built-in.a
AR drivers/soc/xilinx/built-in.a
AR drivers/soc/built-in.a
CC kernel/events/ring_buffer.o
CC fs/ext4/ext4_jbd2.o
CC lib/dec_and_lock.o
AR arch/x86/events/intel/built-in.a
CC drivers/acpi/acpica/evhandler.o
CC drivers/pci/setup-bus.o
AR arch/x86/events/built-in.a
AS arch/x86/kernel/head_32.o
CC net/ipv6/route.o
AR security/selinux/built-in.a
CC fs/ramfs/inode.o
AR security/built-in.a
CC drivers/acpi/utils.o
CC net/wireless/sysfs.o
CC io_uring/epoll.o
CC lib/decompress.o
CC net/ipv6/ip6_fib.o
CC lib/decompress_bunzip2.o
CC kernel/time/timer_list.o
CC kernel/exec_domain.o
CC fs/netfs/main.o
CC net/sunrpc/xprt.o
CC fs/proc/devices.o
CC crypto/akcipher.o
CC net/sunrpc/auth_gss/gss_rpc_upcall.o
CC drivers/acpi/acpica/evmisc.o
CC kernel/events/callchain.o
CC kernel/time/timeconv.o
CC kernel/cgroup/freezer.o
CC block/blk-stat.o
CC lib/decompress_inflate.o
CC sound/hda/hdac_controller.o
CC drivers/virtio/virtio_ring.o
CC fs/jbd2/checkpoint.o
CC io_uring/statx.o
CC fs/hugetlbfs/inode.o
CC net/ethtool/privflags.o
CC drivers/dma/virt-dma.o
CC drivers/tty/vt/vt_ioctl.o
CC drivers/acpi/acpica/evregion.o
CC drivers/tty/hvc/hvc_console.o
CC arch/x86/kernel/head32.o
CC fs/ramfs/file-mmu.o
CC fs/jbd2/revoke.o
CC kernel/time/timecounter.o
CC net/sunrpc/socklib.o
CC fs/proc/interrupts.o
AR net/ipv6/netfilter/built-in.a
CC kernel/trace/trace_printk.o
CC sound/core/pcm_lib.o
CC kernel/time/alarmtimer.o
CC sound/core/pcm_misc.o
CC net/ipv6/ipv6_sockglue.o
CC net/xfrm/xfrm_output.o
CC net/ipv6/ndisc.o
CC lib/decompress_unlz4.o
CC mm/percpu.o
CC net/netfilter/nf_conntrack_helper.o
CC kernel/cgroup/legacy_freezer.o
CC crypto/sig.o
CC net/ipv4/ip_output.o
CC kernel/cgroup/pids.o
CC drivers/acpi/acpica/evrgnini.o
CC block/blk-mq-sysfs.o
CC net/ipv6/udp.o
CC fs/ext4/extents.o
CC arch/x86/kernel/cpu/feat_ctl.o
CC drivers/dma/acpi-dma.o
CC io_uring/timeout.o
CC net/sunrpc/auth_gss/gss_rpc_xdr.o
AR net/mac80211/tests/built-in.a
CC sound/hda/hdac_stream.o
CC fs/proc/loadavg.o
CC net/mac80211/main.o
AR fs/ramfs/built-in.a
CC mm/slab_common.o
CC drivers/tty/vt/vc_screen.o
CC drivers/pci/vc.o
CC lib/decompress_unlzma.o
AR drivers/tty/hvc/built-in.a
CC drivers/acpi/reboot.o
CC drivers/acpi/acpica/evsci.o
CC arch/x86/kernel/cpu/intel.o
CC net/ethtool/rings.o
CC net/ethtool/channels.o
CC fs/jbd2/journal.o
CC arch/x86/kernel/cpu/tsx.o
CC block/blk-mq-cpumap.o
CC net/netfilter/nf_conntrack_proto.o
CC fs/proc/meminfo.o
CC kernel/cgroup/rdma.o
CC kernel/trace/pid_list.o
CC fs/netfs/misc.o
CC crypto/kpp.o
CC kernel/events/hw_breakpoint.o
CC net/ipv4/ip_sockglue.o
CC drivers/acpi/acpica/evxface.o
CC drivers/char/hw_random/core.o
AR drivers/iommu/amd/built-in.a
AR drivers/iommu/intel/built-in.a
AR drivers/iommu/arm/arm-smmu/built-in.a
AR drivers/iommu/iommufd/built-in.a
AR drivers/iommu/arm/arm-smmu-v3/built-in.a
CC net/core/neighbour.o
AR drivers/iommu/arm/built-in.a
CC kernel/time/posix-timers.o
AR drivers/dma/built-in.a
AR drivers/iommu/riscv/built-in.a
CC drivers/virtio/virtio_anchor.o
CC drivers/iommu/iommu.o
CC drivers/virtio/virtio_pci_modern_dev.o
CC net/wireless/radiotap.o
CC drivers/virtio/virtio_pci_legacy_dev.o
CC net/mac80211/status.o
CC drivers/pci/mmap.o
AR fs/hugetlbfs/built-in.a
CC net/sunrpc/auth_gss/trace.o
CC arch/x86/kernel/cpu/intel_epb.o
CC arch/x86/kernel/ebda.o
CC lib/decompress_unlzo.o
CC sound/hda/array.o
CC drivers/iommu/iommu-traces.o
CC net/sunrpc/xprtsock.o
CC net/xfrm/xfrm_sysctl.o
CC block/blk-mq-sched.o
CC io_uring/fdinfo.o
CC drivers/tty/vt/selection.o
CC kernel/cgroup/cpuset.o
CC fs/proc/stat.o
CC drivers/acpi/acpica/evxfevnt.o
CC sound/core/pcm_memory.o
CC net/sunrpc/auth_gss/gss_krb5_mech.o
CC kernel/trace/trace_sched_switch.o
CC net/mac80211/driver-ops.o
CC drivers/acpi/nvs.o
CC net/core/rtnetlink.o
ASN.1 crypto/rsapubkey.asn1.[ch]
AR drivers/gpu/host1x/built-in.a
ASN.1 crypto/rsaprivkey.asn1.[ch]
CC crypto/rsa.o
CC arch/x86/kernel/cpu/amd.o
CC net/ethtool/coalesce.o
CC drivers/char/hw_random/intel-rng.o
CC fs/netfs/objects.o
CC kernel/time/posix-cpu-timers.o
AR drivers/gpu/drm/tests/built-in.a
CC crypto/rsa_helper.o
AR drivers/gpu/drm/arm/built-in.a
AR drivers/gpu/drm/clients/built-in.a
CC lib/decompress_unxz.o
CC drivers/pci/devres.o
CC drivers/acpi/acpica/evxfgpe.o
CC drivers/gpu/drm/display/drm_display_helper_mod.o
CC drivers/acpi/wakeup.o
CC drivers/virtio/virtio_pci_modern.o
CC sound/hda/hdmi_chmap.o
CC drivers/acpi/sleep.o
CC drivers/gpu/drm/display/drm_dp_dual_mode_helper.o
CC fs/proc/uptime.o
CC net/netfilter/nf_conntrack_proto_generic.o
CC net/wireless/util.o
CC drivers/tty/vt/keyboard.o
CC drivers/gpu/drm/display/drm_dp_helper.o
CC sound/core/memalloc.o
CC fs/netfs/read_collect.o
CC io_uring/cancel.o
CC net/netfilter/nf_conntrack_proto_tcp.o
CC drivers/gpu/drm/display/drm_dp_mst_topology.o
CC net/netfilter/nf_conntrack_proto_udp.o
CC sound/hda/trace.o
CC crypto/rsa-pkcs1pad.o
CC net/core/utils.o
CC drivers/acpi/acpica/evxfregn.o
CC block/ioctl.o
CC arch/x86/kernel/platform-quirks.o
CC lib/decompress_unzstd.o
CC net/xfrm/xfrm_replay.o
CC drivers/char/hw_random/amd-rng.o
CC mm/compaction.o
CC fs/netfs/read_pgpriv2.o
CC arch/x86/kernel/cpu/hygon.o
CC kernel/trace/trace_nop.o
CC drivers/pci/proc.o
CC fs/proc/util.o
CC drivers/char/agp/backend.o
CC drivers/tty/vt/vt.o
CC net/ipv4/inet_hashtables.o
CC drivers/acpi/acpica/exconcat.o
CC drivers/virtio/virtio_pci_common.o
CC net/mac80211/sta_info.o
CC block/genhd.o
CC drivers/iommu/iommu-sysfs.o
CC mm/show_mem.o
CC lib/dump_stack.o
CC net/ethtool/pause.o
CC kernel/time/posix-clock.o
CC kernel/cgroup/misc.o
CC crypto/rsassa-pkcs1.o
CC net/ipv6/udplite.o
CC kernel/events/uprobes.o
CC drivers/char/hw_random/geode-rng.o
CC arch/x86/kernel/cpu/centaur.o
AR fs/jbd2/built-in.a
CC arch/x86/kernel/cpu/transmeta.o
CC sound/core/pcm_timer.o
CC io_uring/waitid.o
CC kernel/trace/blktrace.o
CC net/mac80211/wep.o
CC drivers/acpi/acpica/exconfig.o
CC fs/proc/version.o
CC sound/hda/hdac_component.o
CC drivers/tty/serial/8250/8250_core.o
AR drivers/tty/ipwireless/built-in.a
CC fs/proc/softirqs.o
CC net/sunrpc/auth_gss/gss_krb5_seal.o
CC net/core/link_watch.o
CC net/mac80211/aead_api.o
CC drivers/tty/serial/8250/8250_platform.o
CC drivers/char/agp/generic.o
CC fs/netfs/read_retry.o
CC net/wireless/reg.o
CC kernel/cgroup/debug.o
CC drivers/tty/serial/8250/8250_pnp.o
CC net/xfrm/xfrm_device.o
CC drivers/acpi/device_sysfs.o
CC drivers/pci/pci-sysfs.o
CC drivers/iommu/dma-iommu.o
CC lib/earlycpio.o
CC drivers/acpi/acpica/exconvrt.o
CC kernel/trace/trace_events.o
CC lib/extable.o
CC crypto/acompress.o
CC arch/x86/kernel/cpu/zhaoxin.o
CC kernel/time/itimer.o
CC drivers/char/hw_random/via-rng.o
CC drivers/virtio/virtio_pci_legacy.o
CC sound/core/seq_device.o
CC net/netlabel/netlabel_user.o
CC drivers/tty/serial/8250/8250_rsa.o
CC fs/ext4/extents_status.o
CC net/ethtool/eee.o
CC net/netfilter/nf_conntrack_proto_icmp.o
CC fs/proc/namespaces.o
COPY drivers/tty/vt/defkeymap.c
CC net/sunrpc/sched.o
CC drivers/tty/tty_io.o
CC sound/hda/hdac_i915.o
CC drivers/acpi/acpica/excreate.o
CC io_uring/register.o
CC block/ioprio.o
CC net/ipv6/raw.o
AR sound/virtio/built-in.a
CC lib/flex_proportions.o
CC arch/x86/kernel/cpu/vortex.o
AR drivers/char/hw_random/built-in.a
CC arch/x86/kernel/cpu/perfctr-watchdog.o
CC drivers/connector/cn_queue.o
CC drivers/tty/serial/serial_core.o
CC arch/x86/kernel/cpu/vmware.o
CC net/core/filter.o
CC drivers/tty/n_tty.o
CC drivers/tty/vt/consolemap.o
AR kernel/cgroup/built-in.a
CC net/xfrm/xfrm_nat_keepalive.o
CC fs/fat/cache.o
CC kernel/time/clockevents.o
AR sound/core/built-in.a
CC fs/isofs/namei.o
CC net/sunrpc/auth_gss/gss_krb5_unseal.o
CC drivers/virtio/virtio_pci_admin_legacy_io.o
CC drivers/acpi/acpica/exdebug.o
CC fs/netfs/read_single.o
CC io_uring/truncate.o
CC drivers/char/mem.o
CC drivers/tty/serial/8250/8250_port.o
CC lib/idr.o
CC net/xfrm/xfrm_algo.o
CC crypto/scompress.o
CC drivers/char/agp/isoch.o
CC net/netfilter/nf_conntrack_extend.o
CC net/ipv4/inet_timewait_sock.o
CC fs/proc/self.o
CC sound/hda/intel-dsp-config.o
CC fs/ext4/file.o
CC drivers/acpi/acpica/exdump.o
CC net/netlabel/netlabel_kapi.o
CC drivers/pci/slot.o
CC drivers/tty/tty_ioctl.o
CC arch/x86/kernel/cpu/hypervisor.o
CC drivers/tty/serial/serial_base_bus.o
AR kernel/events/built-in.a
CC net/mac80211/wpa.o
CC mm/interval_tree.o
CC block/badblocks.o
CC net/ethtool/tsinfo.o
CC drivers/iommu/iova.o
CC kernel/time/tick-common.o
CC drivers/acpi/acpica/exfield.o
CC lib/iomem_copy.o
CC fs/isofs/inode.o
CC drivers/virtio/virtio_input.o
CC arch/x86/kernel/cpu/mshyperv.o
CC drivers/connector/connector.o
CC drivers/pci/pci-acpi.o
CC fs/fat/dir.o
CC arch/x86/kernel/process_32.o
CC lib/irq_regs.o
CC fs/proc/thread_self.o
HOSTCC drivers/tty/vt/conmakehash
CC fs/netfs/rolling_buffer.o
CC drivers/char/agp/amd64-agp.o
CC drivers/gpu/drm/display/drm_dsc_helper.o
CC net/mac80211/scan.o
CC sound/hda/intel-nhlt.o
CC sound/hda/intel-sdw-acpi.o
CC lib/is_single_threaded.o
CC net/sunrpc/auth_gss/gss_krb5_wrap.o
CC crypto/algboss.o
CC drivers/char/random.o
CC drivers/acpi/acpica/exfldio.o
CC drivers/tty/tty_ldisc.o
CC net/ipv4/inet_connection_sock.o
CC drivers/tty/vt/defkeymap.o
CC drivers/gpu/drm/display/drm_hdcp_helper.o
CC fs/netfs/write_collect.o
CC sound/sound_core.o
CC net/netfilter/nf_conntrack_acct.o
CONMK drivers/tty/vt/consolemap_deftbl.c
CC drivers/tty/vt/consolemap_deftbl.o
CC drivers/gpu/drm/ttm/ttm_tt.o
CC fs/nfs/client.o
CC net/xfrm/xfrm_user.o
AR drivers/tty/vt/built-in.a
CC io_uring/memmap.o
CC drivers/gpu/drm/ttm/ttm_bo.o
CC io_uring/alloc_cache.o
CC mm/list_lru.o
CC io_uring/io-wq.o
CC lib/klist.o
CC fs/proc/proc_sysctl.o
CC block/blk-rq-qos.o
CC fs/ext4/fsmap.o
AR drivers/iommu/built-in.a
CC drivers/virtio/virtio_dma_buf.o
CC lib/kobject.o
CC drivers/tty/tty_buffer.o
AR sound/hda/built-in.a
CC kernel/trace/trace_export.o
CC fs/ext4/fsync.o
CC net/ipv6/icmp.o
CC drivers/acpi/acpica/exmisc.o
CC kernel/time/tick-broadcast.o
CC fs/nfs/dir.o
CC sound/last.o
CC arch/x86/kernel/cpu/debugfs.o
CC net/netlabel/netlabel_domainhash.o
CC drivers/char/agp/intel-agp.o
CC net/ethtool/cabletest.o
CC drivers/tty/serial/8250/8250_dma.o
CC drivers/connector/cn_proc.o
CC drivers/pci/iomap.o
CC net/core/sock_diag.o
CC net/sunrpc/auth_gss/gss_krb5_crypto.o
CC crypto/testmgr.o
CC drivers/gpu/drm/display/drm_hdmi_helper.o
CC fs/isofs/dir.o
CC drivers/tty/serial/serial_ctrl.o
CC drivers/tty/serial/8250/8250_dwlib.o
CC drivers/acpi/acpica/exmutex.o
CC net/mac80211/offchannel.o
CC net/wireless/scan.o
CC net/sunrpc/auth.o
AR sound/built-in.a
CC kernel/trace/trace_event_perf.o
CC net/mac80211/ht.o
AR drivers/virtio/built-in.a
CC drivers/char/misc.o
CC net/ipv6/mcast.o
CC lib/kobject_uevent.o
CC mm/workingset.o
CC kernel/panic.o
CC net/rfkill/core.o
CC fs/fat/fatent.o
CC block/disk-events.o
CC arch/x86/kernel/cpu/bus_lock.o
CC fs/isofs/util.o
CC fs/netfs/write_issue.o
CC net/netfilter/nf_conntrack_seqadj.o
CC kernel/time/tick-broadcast-hrtimer.o
CC drivers/gpu/drm/ttm/ttm_bo_util.o
CC drivers/gpu/drm/i915/i915_config.o
CC drivers/acpi/acpica/exnames.o
CC drivers/pci/quirks.o
CC block/blk-ia-ranges.o
CC crypto/cmac.o
CC drivers/char/agp/intel-gtt.o
CC kernel/cpu.o
CC crypto/hmac.o
CC drivers/gpu/drm/display/drm_scdc_helper.o
CC drivers/gpu/drm/i915/i915_driver.o
CC drivers/pci/pci-label.o
CC drivers/acpi/acpica/exoparg1.o
CC io_uring/futex.o
CC kernel/time/tick-oneshot.o
CC drivers/tty/serial/8250/8250_pcilib.o
CC net/ipv4/tcp.o
CC net/sunrpc/auth_null.o
CC net/ethtool/tunnels.o
AR drivers/connector/built-in.a
CC lib/logic_pio.o
CC net/rfkill/input.o
CC fs/isofs/rock.o
CC net/9p/mod.o
CC mm/debug.o
CC net/mac80211/agg-tx.o
CC kernel/trace/trace_events_filter.o
CC mm/gup.o
CC fs/proc/proc_net.o
CC net/netlabel/netlabel_addrlist.o
CC net/wireless/nl80211.o
CC fs/ext4/hash.o
CC net/sunrpc/auth_tls.o
CC fs/exportfs/expfs.o
CC drivers/acpi/acpica/exoparg2.o
CC arch/x86/kernel/cpu/capflags.o
CC net/ipv6/reassembly.o
AR arch/x86/kernel/cpu/built-in.a
CC kernel/time/tick-sched.o
CC arch/x86/kernel/signal.o
CC block/early-lookup.o
CC crypto/crypto_null.o
CC net/sunrpc/auth_gss/gss_krb5_keys.o
CC drivers/gpu/drm/ttm/ttm_bo_vm.o
CC net/wireless/mlme.o
AR drivers/gpu/drm/renesas/rcar-du/built-in.a
AR drivers/gpu/drm/renesas/rz-du/built-in.a
AR drivers/gpu/drm/renesas/built-in.a
CC drivers/char/virtio_console.o
CC net/netlabel/netlabel_mgmt.o
AR drivers/gpu/drm/display/built-in.a
CC drivers/acpi/device_pm.o
CC drivers/tty/serial/8250/8250_early.o
CC fs/fat/file.o
CC net/9p/client.o
CC drivers/gpu/drm/i915/i915_drm_client.o
CC lib/maple_tree.o
CC fs/netfs/write_retry.o
AR net/rfkill/built-in.a
CC drivers/acpi/acpica/exoparg3.o
AR drivers/char/agp/built-in.a
CC io_uring/napi.o
CC drivers/tty/tty_port.o
CC net/netfilter/nf_conntrack_proto_icmpv6.o
CC kernel/exit.o
CC fs/isofs/export.o
AR fs/exportfs/built-in.a
CC net/core/dev_ioctl.o
CC fs/proc/kcore.o
CC net/wireless/ibss.o
CC drivers/gpu/drm/i915/i915_getparam.o
CC crypto/md5.o
CC fs/ext4/ialloc.o
CC drivers/acpi/acpica/exoparg6.o
CC block/bounce.o
AR net/xfrm/built-in.a
CC net/core/tso.o
CC drivers/tty/serial/8250/8250_exar.o
CC drivers/gpu/drm/ttm/ttm_module.o
CC arch/x86/kernel/signal_32.o
CC kernel/time/timer_migration.o
CC net/ethtool/fec.o
CC drivers/gpu/drm/i915/i915_ioctl.o
CC net/ipv6/tcp_ipv6.o
CC drivers/gpu/drm/ttm/ttm_execbuf_util.o
CC net/wireless/sme.o
CC fs/lockd/clntlock.o
CC fs/nls/nls_base.o
CC drivers/acpi/acpica/exprep.o
CC arch/x86/kernel/traps.o
AR net/sunrpc/auth_gss/built-in.a
CC net/ipv6/ping.o
CC crypto/sha256_generic.o
CC fs/fat/inode.o
AR fs/netfs/built-in.a
CC fs/isofs/joliet.o
CC lib/memcat_p.o
CC drivers/gpu/drm/i915/i915_irq.o
CC net/core/sock_reuseport.o
CC net/netlabel/netlabel_unlabeled.o
CC kernel/trace/trace_events_trigger.o
CC fs/nfs/file.o
CC drivers/pci/vgaarb.o
CC mm/mmap_lock.o
CC net/ipv4/tcp_input.o
CC arch/x86/kernel/idt.o
CC drivers/acpi/acpica/exregion.o
CC drivers/char/hpet.o
CC fs/nls/nls_cp437.o
CC fs/proc/vmcore.o
CC fs/ext4/indirect.o
CC drivers/tty/serial/8250/8250_lpss.o
CC drivers/gpu/drm/ttm/ttm_range_manager.o
CC drivers/tty/tty_mutex.o
CC net/netfilter/nf_conntrack_netlink.o
CC fs/fat/misc.o
AR io_uring/built-in.a
CC fs/fat/nfs.o
CC net/9p/error.o
CC block/bsg.o
CC crypto/sha512_generic.o
CC drivers/tty/serial/8250/8250_mid.o
CC net/dns_resolver/dns_key.o
CC drivers/tty/serial/8250/8250_pci.o
CC fs/nls/nls_ascii.o
CC net/ethtool/eeprom.o
CC fs/isofs/compress.o
CC net/mac80211/agg-rx.o
CC drivers/acpi/acpica/exresnte.o
AR fs/unicode/built-in.a
CC kernel/time/vsyscall.o
CC net/sunrpc/auth_unix.o
CC net/9p/protocol.o
CC fs/lockd/clntproc.o
CC mm/highmem.o
CC net/wireless/chan.o
CC fs/nfs/getroot.o
CC arch/x86/kernel/irq.o
CC fs/nls/nls_iso8859-1.o
CC drivers/gpu/drm/ttm/ttm_resource.o
CC drivers/acpi/acpica/exresolv.o
CC net/9p/trans_common.o
CC net/dns_resolver/dns_query.o
AR drivers/gpu/vga/built-in.a
CC net/9p/trans_fd.o
CC drivers/acpi/proc.o
AR drivers/pci/built-in.a
CC fs/nls/nls_utf8.o
CC net/sunrpc/svc.o
CC kernel/trace/trace_eprobe.o
CC drivers/char/nvram.o
CC crypto/sha3_generic.o
CC block/blk-cgroup.o
CC net/sunrpc/svcsock.o
CC net/ipv6/exthdrs.o
CC kernel/time/timekeeping_debug.o
CC mm/memory.o
CC drivers/tty/serial/serial_port.o
CC drivers/gpu/drm/i915/i915_mitigations.o
CC fs/fat/namei_vfat.o
CC fs/proc/kmsg.o
CC kernel/time/namespace.o
CC drivers/tty/tty_ldsem.o
CC fs/nfs/inode.o
CC drivers/acpi/acpica/exresop.o
CC net/netlabel/netlabel_cipso_v4.o
CC net/mac80211/vht.o
CC net/mac80211/he.o
AR fs/isofs/built-in.a
CC net/mac80211/s1g.o
AR fs/nls/built-in.a
CC net/netfilter/nf_conntrack_ftp.o
CC drivers/acpi/bus.o
CC net/ethtool/stats.o
CC fs/proc/page.o
CC crypto/ecb.o
CC kernel/trace/trace_kprobe.o
AR net/dns_resolver/built-in.a
CC drivers/base/power/sysfs.o
CC block/blk-ioprio.o
CC drivers/base/firmware_loader/builtin/main.o
CC drivers/acpi/acpica/exserial.o
CC net/ethtool/phc_vclocks.o
CC drivers/base/regmap/regmap.o
CC net/ipv6/datagram.o
CC drivers/gpu/drm/ttm/ttm_pool.o
CC arch/x86/kernel/irq_32.o
CC drivers/tty/serial/8250/8250_pericom.o
CC net/wireless/ethtool.o
CC drivers/base/firmware_loader/main.o
AR drivers/char/built-in.a
CC net/ipv6/ip6_flowlabel.o
CC fs/ext4/inline.o
CC lib/nmi_backtrace.o
CC net/mac80211/ibss.o
AR kernel/time/built-in.a
CC crypto/cbc.o
CC kernel/trace/error_report-traces.o
AR drivers/base/firmware_loader/builtin/built-in.a
CC net/handshake/alert.o
CC kernel/trace/power-traces.o
CC drivers/acpi/acpica/exstore.o
CC drivers/gpu/drm/i915/i915_module.o
CC fs/lockd/clntxdr.o
CC net/9p/trans_virtio.o
CC drivers/base/power/generic_ops.o
AR fs/proc/built-in.a
CC net/handshake/genl.o
CC fs/fat/namei_msdos.o
CC net/core/fib_notifier.o
CC drivers/acpi/glue.o
CC crypto/ctr.o
CC net/netlabel/netlabel_calipso.o
CC mm/mincore.o
CC net/devres.o
CC kernel/trace/rpm-traces.o
CC kernel/trace/trace_dynevent.o
CC crypto/gcm.o
CC mm/mlock.o
CC drivers/acpi/acpica/exstoren.o
AR drivers/tty/serial/8250/built-in.a
CC arch/x86/kernel/dumpstack_32.o
CC drivers/tty/serial/earlycon.o
CC fs/autofs/init.o
CC block/blk-iolatency.o
CC net/ipv4/tcp_output.o
CC drivers/base/power/common.o
CC net/ethtool/mm.o
CC fs/ext4/inode.o
CC drivers/gpu/drm/ttm/ttm_device.o
AR drivers/gpu/drm/omapdrm/built-in.a
CC kernel/softirq.o
CC net/netfilter/nf_conntrack_irc.o
AR drivers/base/firmware_loader/built-in.a
AR drivers/base/test/built-in.a
CC net/wireless/mesh.o
CC drivers/acpi/acpica/exstorob.o
CC drivers/block/loop.o
CC net/mac80211/iface.o
CC drivers/gpu/drm/i915/i915_params.o
CC arch/x86/kernel/time.o
CC drivers/base/regmap/regcache.o
CC net/core/xdp.o
CC drivers/base/power/qos.o
AR drivers/tty/serial/built-in.a
CC net/ipv6/inet6_connection_sock.o
CC fs/nfs/super.o
CC fs/autofs/inode.o
CC fs/lockd/host.o
CC drivers/tty/tty_baudrate.o
CC drivers/acpi/acpica/exsystem.o
CC net/sunrpc/svcauth.o
CC fs/autofs/root.o
CC kernel/trace/trace_probe.o
CC drivers/tty/tty_jobctrl.o
CC net/mac80211/link.o
AR fs/fat/built-in.a
CC net/handshake/netlink.o
CC drivers/tty/n_null.o
CC drivers/block/virtio_blk.o
CC net/mac80211/rate.o
CC net/ipv4/tcp_timer.o
CC net/core/flow_offload.o
AR net/9p/built-in.a
CC drivers/acpi/acpica/extrace.o
CC crypto/ccm.o
CC drivers/base/power/runtime.o
AR net/netlabel/built-in.a
CC drivers/gpu/drm/ttm/ttm_sys_manager.o
CC drivers/tty/pty.o
CC net/handshake/request.o
CC fs/autofs/symlink.o
CC arch/x86/kernel/ioport.o
CC net/netfilter/nf_conntrack_sip.o
CC net/ethtool/module.o
CC net/ipv6/udp_offload.o
CC kernel/trace/trace_uprobe.o
CC block/blk-iocost.o
CC drivers/acpi/acpica/exutils.o
CC kernel/resource.o
CC kernel/sysctl.o
CC drivers/acpi/acpica/hwacpi.o
CC lib/objpool.o
CC drivers/gpu/drm/ttm/ttm_agp_backend.o
CC fs/9p/vfs_super.o
AR fs/hostfs/built-in.a
CC drivers/base/component.o
CC drivers/gpu/drm/i915/i915_pci.o
CC drivers/gpu/drm/i915/i915_scatterlist.o
CC drivers/tty/tty_audit.o
CC drivers/misc/eeprom/eeprom_93cx6.o
CC fs/autofs/waitq.o
AR drivers/misc/cb710/built-in.a
AR drivers/gpu/drm/tilcdc/built-in.a
CC fs/nfs/io.o
CC drivers/acpi/acpica/hwesleep.o
AR drivers/misc/lis3lv02d/built-in.a
CC drivers/acpi/acpica/hwgpe.o
CC net/netfilter/nf_nat_core.o
CC drivers/base/regmap/regcache-rbtree.o
AR drivers/mfd/built-in.a
CC net/ipv6/seg6.o
CC lib/plist.o
CC net/mac80211/michael.o
CC block/mq-deadline.o
CC crypto/aes_generic.o
CC fs/debugfs/inode.o
CC arch/x86/kernel/dumpstack.o
CC mm/mmap.o
CC net/wireless/ap.o
CC lib/radix-tree.o
CC fs/debugfs/file.o
CC drivers/base/power/wakeirq.o
AR drivers/block/built-in.a
CC fs/lockd/svc.o
CC fs/lockd/svclock.o
AR drivers/misc/eeprom/built-in.a
AR drivers/misc/cardreader/built-in.a
AR drivers/misc/keba/built-in.a
AR drivers/misc/built-in.a
CC net/sunrpc/svcauth_unix.o
CC net/mac80211/tkip.o
CC drivers/gpu/drm/virtio/virtgpu_drv.o
AR drivers/gpu/drm/ttm/built-in.a
CC fs/9p/vfs_inode.o
CC net/core/gro.o
AR drivers/nfc/built-in.a
CC drivers/acpi/acpica/hwregs.o
CC fs/lockd/svcshare.o
CC net/mac80211/aes_cmac.o
CC kernel/trace/rethook.o
CC drivers/tty/sysrq.o
CC crypto/authenc.o
CC crypto/authencesn.o
AR drivers/dax/hmem/built-in.a
AR drivers/dax/built-in.a
CC net/ethtool/cmis_fw_update.o
CC block/kyber-iosched.o
CC net/handshake/tlshd.o
CC crypto/lzo.o
CC drivers/base/power/main.o
CC fs/lockd/svcproc.o
CC fs/autofs/expire.o
CC net/sunrpc/addr.o
CC drivers/base/regmap/regcache-flat.o
CC net/socket.o
AR drivers/gpu/drm/imx/built-in.a
CC drivers/acpi/scan.o
CC drivers/gpu/drm/i915/i915_switcheroo.o
CC arch/x86/kernel/nmi.o
CC net/ipv4/tcp_ipv4.o
CC drivers/acpi/acpica/hwsleep.o
CC net/ipv4/tcp_minisocks.o
CC fs/nfs/direct.o
CC drivers/gpu/drm/virtio/virtgpu_kms.o
CC lib/ratelimit.o
CC net/netfilter/nf_nat_proto.o
CC fs/ext4/ioctl.o
CC net/ipv6/fib6_notifier.o
CC net/wireless/trace.o
CC net/sysctl_net.o
CC drivers/acpi/mipi-disco-img.o
CC drivers/acpi/acpica/hwvalid.o
CC lib/rbtree.o
CC net/ipv4/tcp_cong.o
AR kernel/trace/built-in.a
CC net/sunrpc/rpcb_clnt.o
CC kernel/capability.o
CC drivers/base/regmap/regcache-maple.o
AR fs/debugfs/built-in.a
CC net/core/netdev-genl.o
CC drivers/base/regmap/regmap-debugfs.o
CC drivers/base/power/wakeup.o
CC net/sunrpc/timer.o
CC net/handshake/trace.o
CC fs/9p/vfs_inode_dotl.o
AR drivers/tty/built-in.a
CC drivers/acpi/resource.o
CC arch/x86/kernel/ldt.o
CC net/netfilter/nf_nat_helper.o
CC block/blk-mq-debugfs.o
CC fs/tracefs/inode.o
CC crypto/lzo-rle.o
CC fs/autofs/dev-ioctl.o
CC net/ethtool/cmis_cdb.o
CC arch/x86/kernel/setup.o
CC mm/mmu_gather.o
CC net/wireless/ocb.o
CC lib/seq_buf.o
CC drivers/acpi/acpica/hwxface.o
CC fs/nfs/pagelist.o
CC drivers/gpu/drm/i915/i915_sysfs.o
CC fs/lockd/svcsubs.o
CC drivers/gpu/drm/virtio/virtgpu_gem.o
CC fs/lockd/mon.o
CC fs/nfs/read.o
CC net/ipv6/rpl.o
CC arch/x86/kernel/x86_init.o
CC fs/lockd/trace.o
CC drivers/gpu/drm/i915/i915_utils.o
CC drivers/acpi/acpica/hwxfsleep.o
AR drivers/base/regmap/built-in.a
CC net/ipv4/tcp_metrics.o
CC kernel/ptrace.o
CC net/netfilter/nf_nat_masquerade.o
CC crypto/rng.o
CC net/wireless/pmsr.o
CC drivers/base/core.o
CC net/mac80211/aes_gmac.o
CC drivers/dma-buf/dma-buf.o
AR drivers/cxl/core/built-in.a
CC lib/siphash.o
AR drivers/cxl/built-in.a
CC fs/tracefs/event_inode.o
CC drivers/base/power/wakeup_stats.o
CC drivers/acpi/acpica/hwpci.o
CC net/ipv6/ioam6.o
CC net/ipv4/tcp_fastopen.o
CC fs/9p/vfs_addr.o
CC [M] fs/efivarfs/inode.o
CC mm/mprotect.o
CC block/blk-pm.o
AR fs/autofs/built-in.a
CC net/core/netdev-genl-gen.o
CC [M] fs/efivarfs/file.o
CC [M] fs/efivarfs/super.o
GEN net/wireless/shipped-certs.c
CC kernel/user.o
CC block/holder.o
CC arch/x86/kernel/i8259.o
CC drivers/gpu/drm/virtio/virtgpu_vram.o
CC lib/string.o
CC net/ethtool/pse-pd.o
CC net/ethtool/plca.o
CC drivers/acpi/acpi_processor.o
CC net/sunrpc/xdr.o
CC drivers/acpi/acpica/nsaccess.o
CC drivers/base/power/trace.o
CC fs/nfs/symlink.o
CC fs/ext4/mballoc.o
CC net/mac80211/fils_aead.o
AR net/handshake/built-in.a
CC drivers/dma-buf/dma-fence.o
CC lib/timerqueue.o
CC drivers/gpu/drm/i915/intel_clock_gating.o
CC fs/nfs/unlink.o
CC crypto/drbg.o
CC net/ethtool/phy.o
AR drivers/gpu/drm/i2c/built-in.a
CC kernel/signal.o
AR drivers/gpu/drm/panel/built-in.a
CC net/netfilter/nf_nat_ftp.o
CC drivers/acpi/processor_core.o
CC net/wireless/shipped-certs.o
CC drivers/acpi/acpica/nsalloc.o
CC drivers/macintosh/mac_hid.o
CC lib/union_find.o
CC net/netfilter/nf_nat_irc.o
CC mm/mremap.o
CC fs/lockd/xdr.o
CC lib/vsprintf.o
CC drivers/dma-buf/dma-fence-array.o
CC net/ipv6/sysctl_net_ipv6.o
CC fs/nfs/write.o
CC arch/x86/kernel/irqinit.o
AR fs/tracefs/built-in.a
CC fs/9p/vfs_file.o
CC net/netfilter/nf_nat_sip.o
CC net/core/gso.o
CC drivers/acpi/processor_pdc.o
AR block/built-in.a
CC net/core/net-sysfs.o
CC lib/win_minmax.o
CC [M] fs/efivarfs/vars.o
CC drivers/gpu/drm/virtio/virtgpu_display.o
CC drivers/gpu/drm/virtio/virtgpu_vq.o
CC drivers/acpi/acpica/nsarguments.o
AR drivers/base/power/built-in.a
CC net/ipv4/tcp_rate.o
CC fs/9p/vfs_dir.o
CC kernel/sys.o
CC net/core/hotdata.o
CC net/ipv6/xfrm6_policy.o
AR drivers/macintosh/built-in.a
CC arch/x86/kernel/jump_label.o
CC net/mac80211/cfg.o
CC fs/open.o
CC fs/9p/vfs_dentry.o
CC fs/ext4/migrate.o
CC drivers/acpi/acpica/nsconvert.o
CC drivers/gpu/drm/virtio/virtgpu_fence.o
CC net/netfilter/x_tables.o
CC arch/x86/kernel/irq_work.o
CC drivers/base/bus.o
CC net/mac80211/ethtool.o
CC fs/read_write.o
CC net/netfilter/xt_tcpudp.o
CC crypto/jitterentropy.o
CC crypto/jitterentropy-kcapi.o
CC net/ipv6/xfrm6_state.o
CC net/sunrpc/sunrpc_syms.o
CC drivers/gpu/drm/virtio/virtgpu_object.o
CC net/ethtool/tsconfig.o
CC fs/ext4/mmp.o
CC drivers/dma-buf/dma-fence-chain.o
CC mm/msync.o
CC fs/file_table.o
LD [M] fs/efivarfs/efivarfs.o
CC fs/nfs/namespace.o
CC drivers/gpu/drm/i915/intel_cpu_info.o
CC drivers/acpi/acpica/nsdump.o
CC drivers/acpi/acpica/nseval.o
AR drivers/scsi/pcmcia/built-in.a
CC drivers/scsi/scsi.o
CC net/netfilter/xt_CONNSECMARK.o
CC arch/x86/kernel/probe_roms.o
CC drivers/gpu/drm/i915/intel_device_info.o
CC fs/lockd/clnt4xdr.o
CC fs/ext4/move_extent.o
CC fs/super.o
CC drivers/gpu/drm/virtio/virtgpu_debugfs.o
CC fs/9p/v9fs.o
CC crypto/ghash-generic.o
CC lib/xarray.o
CC net/ipv4/tcp_recovery.o
CC arch/x86/kernel/sys_ia32.o
CC fs/ext4/namei.o
CC drivers/acpi/acpica/nsinit.o
AR drivers/nvme/common/built-in.a
CC fs/char_dev.o
AR drivers/nvme/host/built-in.a
CC net/netfilter/xt_NFLOG.o
AR drivers/nvme/target/built-in.a
AR drivers/nvme/built-in.a
CC drivers/ata/libata-core.o
CC drivers/dma-buf/dma-fence-unwrap.o
CC fs/nfs/mount_clnt.o
CC drivers/base/dd.o
CC drivers/ata/libata-scsi.o
CC lib/lockref.o
CC net/ipv6/xfrm6_input.o
CC mm/page_vma_mapped.o
CC drivers/acpi/acpica/nsload.o
CC drivers/acpi/acpica/nsnames.o
CC crypto/hash_info.o
CC crypto/rsapubkey.asn1.o
CC crypto/rsaprivkey.asn1.o
AR drivers/gpu/drm/bridge/analogix/built-in.a
AR drivers/gpu/drm/bridge/cadence/built-in.a
AR crypto/built-in.a
AR drivers/gpu/drm/bridge/imx/built-in.a
CC fs/lockd/xdr4.o
AR drivers/gpu/drm/bridge/synopsys/built-in.a
CC drivers/firewire/init_ohci1394_dma.o
CC fs/lockd/svc4proc.o
AR drivers/gpu/drm/bridge/built-in.a
AR drivers/net/phy/mediatek/built-in.a
CC fs/9p/fid.o
CC drivers/cdrom/cdrom.o
AR drivers/net/phy/qcom/built-in.a
AR drivers/auxdisplay/built-in.a
CC net/sunrpc/cache.o
CC net/core/netdev_rx_queue.o
CC drivers/net/phy/realtek/realtek_main.o
CC drivers/gpu/drm/virtio/virtgpu_plane.o
CC net/ipv4/tcp_ulp.o
AR net/ethtool/built-in.a
CC drivers/net/phy/realtek/realtek_hwmon.o
CC drivers/net/phy/mdio-boardinfo.o
CC drivers/gpu/drm/virtio/virtgpu_ioctl.o
CC drivers/dma-buf/dma-resv.o
AR drivers/net/pse-pd/built-in.a
CC arch/x86/kernel/ksysfs.o
CC net/ipv6/xfrm6_output.o
CC drivers/acpi/acpica/nsobject.o
CC fs/nfs/nfstrace.o
CC drivers/gpu/drm/virtio/virtgpu_prime.o
CC lib/bcd.o
CC fs/nfs/export.o
CC drivers/gpu/drm/i915/intel_memory_region.o
CC net/core/net-procfs.o
CC mm/pagewalk.o
CC drivers/ata/libata-eh.o
CC net/netfilter/xt_SECMARK.o
CC drivers/acpi/ec.o
CC kernel/umh.o
CC net/ipv6/xfrm6_protocol.o
CC drivers/scsi/hosts.o
CC drivers/base/syscore.o
CC fs/9p/xattr.o
CC drivers/dma-buf/sync_file.o
AR drivers/gpu/drm/hisilicon/built-in.a
CC drivers/ata/libata-transport.o
CC drivers/gpu/drm/i915/intel_pcode.o
CC drivers/acpi/acpica/nsparse.o
AR drivers/firewire/built-in.a
CC drivers/net/phy/stubs.o
CC lib/sort.o
CC drivers/gpu/drm/virtio/virtgpu_trace_points.o
CC arch/x86/kernel/bootflag.o
CC fs/lockd/procfs.o
AR drivers/gpu/drm/mxsfb/built-in.a
CC drivers/ata/libata-trace.o
CC net/core/netpoll.o
CC lib/parser.o
CC drivers/acpi/acpica/nspredef.o
CC drivers/base/driver.o
CC net/core/fib_rules.o
CC net/sunrpc/rpc_pipe.o
CC kernel/workqueue.o
CC lib/debug_locks.o
CC mm/pgtable-generic.o
CC fs/ext4/page-io.o
CC net/netfilter/xt_TCPMSS.o
CC drivers/acpi/dock.o
CC drivers/gpu/drm/i915/intel_region_ttm.o
CC drivers/pcmcia/cs.o
CC drivers/usb/common/common.o
AR drivers/dma-buf/built-in.a
CC drivers/gpu/drm/i915/intel_runtime_pm.o
CC drivers/ata/libata-sata.o
AR drivers/net/phy/realtek/built-in.a
CC drivers/acpi/acpica/nsprepkg.o
CC drivers/ata/libata-sff.o
CC lib/random32.o
CC drivers/input/serio/serio.o
CC drivers/ata/libata-pmp.o
AR fs/9p/built-in.a
CC net/ipv4/tcp_offload.o
CC drivers/ata/libata-acpi.o
CC drivers/acpi/acpica/nsrepair.o
CC drivers/scsi/scsi_ioctl.o
CC drivers/usb/common/debug.o
CC drivers/net/phy/mdio_devres.o
CC arch/x86/kernel/e820.o
CC net/sunrpc/sysfs.o
CC drivers/base/class.o
CC net/mac80211/rx.o
CC net/mac80211/spectmgmt.o
CC net/netfilter/xt_conntrack.o
AR fs/lockd/built-in.a
CC lib/bust_spinlocks.o
CC drivers/gpu/drm/virtio/virtgpu_submit.o
CC net/core/net-traces.o
CC net/ipv6/netfilter.o
CC drivers/input/keyboard/atkbd.o
CC net/sunrpc/svc_xprt.o
CC drivers/input/mouse/psmouse-base.o
AR drivers/input/joystick/built-in.a
CC drivers/acpi/acpica/nsrepair2.o
CC net/mac80211/tx.o
CC fs/ext4/readpage.o
CC drivers/scsi/scsicam.o
CC drivers/acpi/acpica/nssearch.o
AR drivers/cdrom/built-in.a
CC net/ipv4/tcp_plb.o
CC lib/kasprintf.o
CC mm/rmap.o
AR drivers/usb/common/built-in.a
CC drivers/usb/core/usb.o
CC drivers/acpi/acpica/nsutils.o
CC drivers/input/serio/i8042.o
CC drivers/usb/core/hub.o
CC mm/vmalloc.o
CC drivers/pcmcia/socket_sysfs.o
AR drivers/input/tablet/built-in.a
CC arch/x86/kernel/pci-dma.o
CC drivers/net/mdio/acpi_mdio.o
CC lib/bitmap.o
CC drivers/net/phy/phy.o
CC drivers/rtc/lib.o
CC drivers/net/mdio/fwnode_mdio.o
CC drivers/acpi/acpica/nswalk.o
CC drivers/base/platform.o
AR drivers/gpu/drm/tiny/built-in.a
CC drivers/rtc/class.o
CC drivers/acpi/pci_root.o
CC net/sunrpc/xprtmultipath.o
CC drivers/gpu/drm/i915/intel_sbi.o
AR drivers/gpu/drm/virtio/built-in.a
CC drivers/acpi/pci_link.o
CC kernel/pid.o
CC drivers/gpu/drm/i915/intel_step.o
CC drivers/net/phy/phy-c45.o
CC drivers/i2c/algos/i2c-algo-bit.o
CC drivers/scsi/scsi_error.o
CC drivers/gpu/drm/i915/intel_uncore.o
AR drivers/net/pcs/built-in.a
CC drivers/pcmcia/cardbus.o
CC drivers/base/cpu.o
CC drivers/acpi/acpica/nsxfeval.o
CC fs/ext4/resize.o
CC drivers/rtc/interface.o
CC drivers/i2c/busses/i2c-i801.o
CC drivers/rtc/nvmem.o
CC net/core/selftests.o
AR drivers/input/keyboard/built-in.a
CC drivers/net/phy/phy-core.o
CC net/netfilter/xt_policy.o
CC drivers/rtc/dev.o
CC kernel/task_work.o
CC drivers/input/mouse/synaptics.o
CC arch/x86/kernel/quirks.o
AR drivers/net/ethernet/3com/built-in.a
CC drivers/net/ethernet/8390/ne2k-pci.o
CC net/ipv4/datagram.o
CC lib/scatterlist.o
CC net/core/ptp_classifier.o
AR drivers/net/ethernet/adaptec/built-in.a
CC net/mac80211/key.o
CC fs/ext4/super.o
CC drivers/acpi/pci_irq.o
CC net/ipv6/proc.o
AR drivers/net/wireless/admtek/built-in.a
CC drivers/acpi/acpica/nsxfname.o
AR drivers/net/wireless/ath/built-in.a
AR drivers/net/wireless/atmel/built-in.a
AR drivers/net/wireless/broadcom/built-in.a
AR drivers/net/mdio/built-in.a
AR drivers/net/wireless/intel/built-in.a
AR drivers/net/wireless/intersil/built-in.a
CC net/netfilter/xt_state.o
AR drivers/net/wireless/marvell/built-in.a
AR drivers/net/wireless/mediatek/built-in.a
AR drivers/net/wireless/microchip/built-in.a
CC drivers/pcmcia/ds.o
AR drivers/net/wireless/purelifi/built-in.a
CC drivers/gpu/drm/i915/intel_uncore_trace.o
AR drivers/net/wireless/quantenna/built-in.a
AR drivers/net/wireless/ralink/built-in.a
AR drivers/net/wireless/realtek/built-in.a
CC net/mac80211/util.o
AR drivers/net/wireless/rsi/built-in.a
AR drivers/net/wireless/silabs/built-in.a
CC drivers/input/serio/serport.o
AR drivers/net/wireless/st/built-in.a
AR drivers/net/wireless/ti/built-in.a
AR drivers/net/wireless/zydas/built-in.a
AR drivers/net/wireless/virtual/built-in.a
AR drivers/net/wireless/built-in.a
AR drivers/i2c/muxes/built-in.a
CC fs/nfs/sysfs.o
CC fs/nfs/fs_context.o
CC drivers/scsi/scsi_lib.o
AR drivers/i3c/built-in.a
AR drivers/i2c/algos/built-in.a
CC fs/nfs/nfsroot.o
CC lib/list_sort.o
CC drivers/net/ethernet/8390/8390.o
AR drivers/net/ethernet/agere/built-in.a
CC drivers/usb/core/hcd.o
CC drivers/base/firmware.o
CC fs/ext4/symlink.o
AR drivers/net/ethernet/alacritech/built-in.a
CC drivers/acpi/acpi_apd.o
CC drivers/net/phy/phy_device.o
CC drivers/acpi/acpica/nsxfobj.o
CC arch/x86/kernel/kdebugfs.o
CC drivers/ata/libata-pata-timings.o
CC net/ipv4/raw.o
CC kernel/extable.o
CC drivers/net/phy/linkmode.o
CC drivers/rtc/proc.o
AR drivers/input/touchscreen/built-in.a
CC [M] net/netfilter/nf_log_syslog.o
AR drivers/i2c/busses/built-in.a
CC drivers/i2c/i2c-boardinfo.o
CC drivers/base/init.o
CC fs/ext4/sysfs.o
AR drivers/usb/phy/built-in.a
AR drivers/net/ethernet/alteon/built-in.a
CC drivers/input/mouse/focaltech.o
CC lib/uuid.o
CC drivers/acpi/acpica/psargs.o
CC fs/nfs/sysctl.o
CC drivers/input/serio/libps2.o
CC drivers/i2c/i2c-core-base.o
CC fs/stat.o
CC net/sunrpc/stats.o
CC net/sunrpc/sysctl.o
CC drivers/scsi/constants.o
CC fs/nfs/nfs3super.o
CC drivers/base/map.o
CC net/ipv6/syncookies.o
CC fs/exec.o
CC lib/iov_iter.o
CC [M] net/netfilter/xt_mark.o
CC arch/x86/kernel/alternative.o
CC mm/vma.o
CC drivers/usb/mon/mon_main.o
CC drivers/pcmcia/pcmcia_resource.o
CC drivers/usb/host/pci-quirks.o
CC drivers/rtc/sysfs.o
CC drivers/usb/mon/mon_stat.o
CC drivers/acpi/acpica/psloop.o
CC drivers/ata/ahci.o
CC net/mac80211/parse.o
CC drivers/pcmcia/cistpl.o
CC [M] net/netfilter/xt_nat.o
AR drivers/input/misc/built-in.a
CC drivers/usb/core/urb.o
CC drivers/base/devres.o
CC drivers/input/mouse/alps.o
AR drivers/net/ethernet/8390/built-in.a
AR drivers/net/ethernet/amazon/built-in.a
CC drivers/gpu/drm/i915/intel_wakeref.o
CC drivers/gpu/drm/i915/vlv_sideband.o
AR drivers/net/ethernet/amd/built-in.a
AR drivers/net/ethernet/aquantia/built-in.a
AR drivers/net/ethernet/arc/built-in.a
AR drivers/net/ethernet/asix/built-in.a
AR drivers/net/ethernet/atheros/built-in.a
AR drivers/net/ethernet/cadence/built-in.a
CC drivers/net/ethernet/broadcom/bnx2.o
CC kernel/params.o
AR drivers/input/serio/built-in.a
CC drivers/gpu/drm/i915/vlv_suspend.o
CC drivers/net/ethernet/broadcom/tg3.o
AR drivers/net/ethernet/brocade/built-in.a
CC drivers/input/input.o
CC drivers/input/input-compat.o
CC lib/clz_ctz.o
CC drivers/acpi/acpica/psobject.o
CC drivers/ata/libahci.o
AR drivers/net/usb/built-in.a
CC mm/process_vm_access.o
CC fs/pipe.o
CC drivers/usb/mon/mon_text.o
CC [M] net/netfilter/xt_LOG.o
CC drivers/rtc/rtc-mc146818-lib.o
AR drivers/media/i2c/built-in.a
CC drivers/scsi/scsi_lib_dma.o
AR drivers/media/tuners/built-in.a
CC drivers/scsi/scsi_scan.o
AR drivers/media/rc/keymaps/built-in.a
AR drivers/media/rc/built-in.a
GEN drivers/scsi/scsi_devinfo_tbl.c
CC drivers/acpi/acpi_platform.o
AR drivers/media/common/b2c2/built-in.a
AR drivers/media/common/saa7146/built-in.a
AR drivers/media/common/siano/built-in.a
CC drivers/acpi/acpi_pnp.o
AR drivers/media/common/v4l2-tpg/built-in.a
AR drivers/media/common/videobuf2/built-in.a
AR drivers/media/common/built-in.a
AR drivers/media/platform/allegro-dvt/built-in.a
AR drivers/media/platform/amlogic/meson-ge2d/built-in.a
AR drivers/media/platform/amlogic/built-in.a
CC drivers/usb/host/ehci-hcd.o
CC drivers/usb/mon/mon_bin.o
AR drivers/media/platform/amphion/built-in.a
AR drivers/media/platform/aspeed/built-in.a
AR drivers/media/platform/atmel/built-in.a
AR drivers/media/platform/broadcom/built-in.a
CC net/ipv6/calipso.o
CC net/ipv4/udp.o
AR drivers/media/platform/cadence/built-in.a
CC drivers/acpi/acpica/psopcode.o
CC fs/nfs/nfs3client.o
AR drivers/media/platform/chips-media/coda/built-in.a
CC drivers/base/attribute_container.o
AR drivers/media/platform/chips-media/wave5/built-in.a
AR drivers/media/platform/chips-media/built-in.a
AR drivers/media/platform/imagination/built-in.a
AR drivers/media/platform/intel/built-in.a
AR drivers/net/ethernet/cavium/common/built-in.a
AR drivers/media/platform/marvell/built-in.a
AR drivers/net/ethernet/cavium/thunder/built-in.a
CC drivers/usb/core/message.o
AR drivers/net/ethernet/cavium/liquidio/built-in.a
AR drivers/media/platform/mediatek/jpeg/built-in.a
CC mm/page_alloc.o
AR drivers/net/ethernet/cavium/octeon/built-in.a
CC fs/namei.o
AR drivers/media/platform/mediatek/mdp/built-in.a
AR drivers/net/ethernet/cavium/built-in.a
AR drivers/media/platform/mediatek/vcodec/common/built-in.a
CC arch/x86/kernel/i8253.o
CC [M] net/netfilter/xt_MASQUERADE.o
AR drivers/pps/clients/built-in.a
AR drivers/media/platform/mediatek/vcodec/encoder/built-in.a
CC drivers/pps/pps.o
AR drivers/media/platform/mediatek/vcodec/decoder/built-in.a
AR drivers/media/platform/mediatek/vcodec/built-in.a
AR drivers/media/platform/mediatek/vpu/built-in.a
CC drivers/net/phy/phy_link_topology.o
AR drivers/media/platform/mediatek/mdp3/built-in.a
AR drivers/media/platform/mediatek/built-in.a
AR drivers/media/platform/microchip/built-in.a
AR drivers/media/platform/nuvoton/built-in.a
AR drivers/media/platform/nvidia/tegra-vde/built-in.a
CC drivers/pps/kapi.o
CC fs/nfs/nfs3proc.o
AR drivers/media/platform/nvidia/built-in.a
AR drivers/media/platform/nxp/dw100/built-in.a
CC kernel/kthread.o
CC drivers/rtc/rtc-cmos.o
AR drivers/media/platform/nxp/imx-jpeg/built-in.a
AR drivers/media/platform/nxp/imx8-isi/built-in.a
AR drivers/media/platform/nxp/built-in.a
AR drivers/media/platform/qcom/camss/built-in.a
AR drivers/media/platform/qcom/venus/built-in.a
CC drivers/acpi/acpica/psopinfo.o
CC kernel/sys_ni.o
AR drivers/media/platform/qcom/built-in.a
CC kernel/nsproxy.o
AR drivers/media/platform/raspberrypi/pisp_be/built-in.a
CC net/core/netprio_cgroup.o
AR drivers/media/platform/raspberrypi/rp1-cfe/built-in.a
AR drivers/media/platform/raspberrypi/built-in.a
CC drivers/base/transport_class.o
CC drivers/base/topology.o
CC drivers/ptp/ptp_clock.o
AR net/sunrpc/built-in.a
AR drivers/media/platform/renesas/rcar-vin/built-in.a
CC drivers/i2c/i2c-core-smbus.o
AR drivers/media/platform/renesas/rzg2l-cru/built-in.a
CC net/ipv4/udplite.o
AR drivers/media/platform/renesas/vsp1/built-in.a
CC net/mac80211/wme.o
AR drivers/media/platform/renesas/built-in.a
CC drivers/ptp/ptp_chardev.o
CC net/core/netclassid_cgroup.o
CC drivers/pcmcia/pcmcia_cis.o
CC arch/x86/kernel/hw_breakpoint.o
AR drivers/media/platform/rockchip/rga/built-in.a
AR drivers/media/platform/rockchip/rkisp1/built-in.a
AR drivers/media/platform/rockchip/built-in.a
CC drivers/ptp/ptp_sysfs.o
AR drivers/media/platform/samsung/exynos-gsc/built-in.a
AR drivers/gpu/drm/xlnx/built-in.a
CC drivers/ptp/ptp_vclock.o
AR drivers/media/platform/samsung/exynos4-is/built-in.a
CC drivers/gpu/drm/i915/soc/intel_dram.o
AR drivers/media/platform/samsung/s3c-camif/built-in.a
CC drivers/scsi/scsi_devinfo.o
AR drivers/media/platform/samsung/s5p-g2d/built-in.a
AR drivers/media/platform/samsung/s5p-jpeg/built-in.a
AR drivers/media/platform/samsung/s5p-mfc/built-in.a
AR drivers/media/platform/samsung/built-in.a
CC fs/ext4/xattr.o
AR drivers/media/platform/st/sti/bdisp/built-in.a
AR drivers/media/platform/st/sti/c8sectpfe/built-in.a
AR drivers/media/platform/st/sti/delta/built-in.a
CC drivers/acpi/acpica/psparse.o
AR drivers/media/platform/st/sti/hva/built-in.a
AR drivers/media/platform/st/stm32/built-in.a
AR drivers/media/platform/st/built-in.a
CC drivers/input/mouse/byd.o
AR drivers/media/platform/sunxi/sun4i-csi/built-in.a
AR drivers/media/platform/sunxi/sun6i-csi/built-in.a
AR drivers/media/platform/sunxi/sun6i-mipi-csi2/built-in.a
CC drivers/pps/sysfs.o
AR drivers/media/platform/ti/am437x/built-in.a
AR drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/built-in.a
AR drivers/media/platform/ti/cal/built-in.a
AR drivers/media/platform/sunxi/sun8i-di/built-in.a
AR drivers/media/platform/ti/vpe/built-in.a
CC drivers/net/phy/mdio_bus.o
AR drivers/media/platform/sunxi/sun8i-rotate/built-in.a
AR drivers/media/platform/ti/davinci/built-in.a
AR drivers/media/platform/sunxi/built-in.a
AR drivers/media/platform/verisilicon/built-in.a
AR drivers/media/platform/via/built-in.a
CC arch/x86/kernel/tsc.o
AR drivers/media/platform/ti/j721e-csi2rx/built-in.a
CC fs/ext4/xattr_hurd.o
AR drivers/media/platform/ti/omap/built-in.a
AR drivers/media/platform/ti/omap3isp/built-in.a
CC fs/ext4/xattr_trusted.o
AR drivers/media/platform/ti/built-in.a
AR drivers/media/platform/xilinx/built-in.a
AR drivers/media/pci/ttpci/built-in.a
AR drivers/media/platform/built-in.a
AR drivers/media/pci/b2c2/built-in.a
AR drivers/media/pci/pluto2/built-in.a
CC net/ipv4/udp_offload.o
CC drivers/net/mii.o
AR drivers/media/pci/dm1105/built-in.a
AR drivers/media/pci/pt1/built-in.a
AR drivers/usb/mon/built-in.a
CC net/ipv6/ah6.o
AR drivers/media/pci/pt3/built-in.a
AR drivers/media/pci/mantis/built-in.a
AR drivers/media/pci/ngene/built-in.a
AR drivers/media/pci/ddbridge/built-in.a
AR drivers/media/pci/saa7146/built-in.a
CC drivers/usb/class/usblp.o
AR drivers/media/pci/smipcie/built-in.a
AR drivers/media/pci/netup_unidvb/built-in.a
CC drivers/usb/storage/scsiglue.o
CC drivers/base/container.o
AR drivers/media/pci/intel/ipu3/built-in.a
CC lib/bsearch.o
AR drivers/media/pci/intel/ivsc/built-in.a
AR drivers/media/pci/intel/built-in.a
AR drivers/media/pci/built-in.a
CC drivers/acpi/acpica/psscope.o
AR drivers/media/usb/b2c2/built-in.a
AR drivers/media/usb/dvb-usb/built-in.a
AR drivers/media/usb/dvb-usb-v2/built-in.a
AR drivers/media/usb/s2255/built-in.a
AR drivers/pps/built-in.a
CC drivers/scsi/scsi_sysctl.o
CC net/ipv4/arp.o
AR drivers/media/usb/siano/built-in.a
CC [M] net/netfilter/xt_addrtype.o
AR drivers/media/usb/ttusb-budget/built-in.a
AR drivers/media/usb/ttusb-dec/built-in.a
AR drivers/rtc/built-in.a
AR drivers/media/usb/built-in.a
CC net/ipv4/icmp.o
AR drivers/media/mmc/siano/built-in.a
AR drivers/media/mmc/built-in.a
AR drivers/media/firewire/built-in.a
CC drivers/ata/ata_piix.o
AR drivers/media/spi/built-in.a
AR drivers/media/test-drivers/built-in.a
AR drivers/media/built-in.a
CC drivers/ptp/ptp_kvm_x86.o
CC net/ipv4/devinet.o
AR net/wireless/built-in.a
CC drivers/pcmcia/rsrc_mgr.o
CC drivers/base/property.o
CC lib/find_bit.o
CC drivers/net/loopback.o
CC drivers/input/mouse/logips2pp.o
CC drivers/usb/storage/protocol.o
CC drivers/acpi/power.o
CC drivers/gpu/drm/i915/soc/intel_gmch.o
CC drivers/acpi/event.o
CC net/core/dst_cache.o
CC fs/nfs/nfs3xdr.o
CC net/ipv4/af_inet.o
CC drivers/usb/core/driver.o
CC mm/page_frag_cache.o
CC drivers/acpi/acpica/pstree.o
CC drivers/acpi/acpica/psutils.o
CC drivers/usb/storage/transport.o
CC drivers/net/phy/mdio_device.o
CC drivers/ata/pata_amd.o
CC drivers/net/netconsole.o
CC kernel/notifier.o
CC lib/llist.o
CC drivers/power/supply/power_supply_core.o
CC drivers/gpu/drm/i915/soc/intel_pch.o
CC fs/fcntl.o
CC lib/lwq.o
CC net/mac80211/chan.o
CC drivers/scsi/scsi_proc.o
CC drivers/i2c/i2c-core-acpi.o
CC drivers/pcmcia/rsrc_nonstatic.o
CC drivers/acpi/acpica/pswalk.o
CC mm/init-mm.o
AR drivers/usb/class/built-in.a
CC drivers/acpi/evged.o
CC kernel/ksysfs.o
CC lib/memweight.o
CC arch/x86/kernel/tsc_msr.o
CC drivers/ptp/ptp_kvm_common.o
CC drivers/input/mouse/lifebook.o
CC drivers/gpu/drm/i915/soc/intel_rom.o
CC lib/kfifo.o
CC drivers/hwmon/hwmon.o
CC drivers/gpu/drm/i915/i915_memcpy.o
CC mm/memblock.o
CC fs/ext4/xattr_user.o
CC drivers/acpi/acpica/psxface.o
AR drivers/gpu/drm/gud/built-in.a
CC net/ipv6/esp6.o
CC drivers/net/virtio_net.o
CC kernel/cred.o
CC lib/percpu-refcount.o
CC drivers/net/phy/swphy.o
CC fs/ioctl.o
CC arch/x86/kernel/io_delay.o
CC drivers/ata/pata_oldpiix.o
CC drivers/scsi/scsi_debugfs.o
CC net/core/gro_cells.o
CC drivers/net/net_failover.o
AR net/netfilter/built-in.a
CC drivers/usb/storage/usb.o
AR drivers/gpu/drm/solomon/built-in.a
CC fs/nfs/nfs3acl.o
CC drivers/acpi/acpica/rsaddr.o
CC fs/nfs/nfs4proc.o
CC drivers/scsi/scsi_trace.o
CC drivers/power/supply/power_supply_sysfs.o
CC drivers/pcmcia/yenta_socket.o
CC drivers/usb/core/config.o
CC drivers/input/mouse/trackpoint.o
CC drivers/base/cacheinfo.o
CC fs/readdir.o
CC net/core/failover.o
AR drivers/thermal/broadcom/built-in.a
AR drivers/thermal/renesas/built-in.a
AR drivers/thermal/samsung/built-in.a
CC drivers/gpu/drm/i915/i915_mm.o
CC drivers/thermal/intel/intel_tcc.o
AR drivers/ptp/built-in.a
AR drivers/thermal/st/built-in.a
CC net/ipv6/sit.o
CC arch/x86/kernel/rtc.o
CC drivers/usb/host/ehci-pci.o
CC kernel/reboot.o
CC drivers/i2c/i2c-smbus.o
AR drivers/usb/misc/built-in.a
CC drivers/base/swnode.o
CC drivers/net/phy/fixed_phy.o
CC fs/nfs/nfs4xdr.o
CC arch/x86/kernel/resource.o
CC drivers/acpi/acpica/rscalc.o
CC drivers/usb/host/ohci-hcd.o
CC drivers/gpu/drm/i915/i915_sw_fence.o
CC drivers/thermal/intel/therm_throt.o
CC drivers/input/mouse/cypress_ps2.o
CC net/ipv6/addrconf_core.o
CC mm/slub.o
CC lib/rhashtable.o
CC fs/select.o
CC drivers/power/supply/power_supply_leds.o
CC fs/dcache.o
CC net/mac80211/trace.o
CC drivers/ata/pata_sch.o
AR drivers/watchdog/built-in.a
CC kernel/async.o
CC drivers/acpi/acpica/rscreate.o
CC drivers/scsi/scsi_logging.o
CC [M] drivers/gpu/drm/scheduler/sched_main.o
AR drivers/thermal/qcom/built-in.a
CC drivers/usb/host/ohci-pci.o
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
AS arch/x86/kernel/irqflags.o
CC drivers/input/input-mt.o
CC drivers/usb/early/ehci-dbgp.o
AR drivers/hwmon/built-in.a
CC arch/x86/kernel/static_call.o
CC drivers/input/input-poller.o
CC drivers/usb/storage/initializers.o
CC drivers/usb/storage/sierra_ms.o
CC drivers/input/ff-core.o
CC drivers/scsi/scsi_pm.o
CC net/ipv4/igmp.o
GEN xe_wa_oob.c xe_wa_oob.h
CC drivers/acpi/sysfs.o
CC [M] drivers/gpu/drm/xe/xe_bb.o
CC drivers/input/mouse/psmouse-smbus.o
CC [M] drivers/gpu/drm/scheduler/sched_fence.o
CC fs/ext4/fast_commit.o
AR drivers/i2c/built-in.a
CC drivers/power/supply/power_supply_hwmon.o
AR drivers/thermal/tegra/built-in.a
AR net/core/built-in.a
AR drivers/net/ethernet/chelsio/built-in.a
CC drivers/ata/pata_mpiix.o
CC drivers/acpi/acpica/rsdumpinfo.o
CC drivers/usb/host/uhci-hcd.o
CC drivers/gpu/drm/i915/i915_sw_fence_work.o
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.o
CC drivers/base/auxiliary.o
CC drivers/usb/core/file.o
CC drivers/gpu/drm/i915/i915_syncmap.o
CC kernel/range.o
CC arch/x86/kernel/process.o
CC arch/x86/kernel/ptrace.o
AR drivers/net/phy/built-in.a
CC fs/ext4/orphan.o
CC drivers/gpu/drm/i915/i915_user_extensions.o
AR drivers/pcmcia/built-in.a
AR drivers/thermal/mediatek/built-in.a
CC net/mac80211/mlme.o
CC kernel/smpboot.o
CC drivers/acpi/acpica/rsinfo.o
CC drivers/acpi/acpica/rsio.o
CC drivers/input/touchscreen.o
CC drivers/gpu/drm/i915/i915_debugfs.o
CC drivers/gpu/drm/drm_atomic.o
CC mm/madvise.o
CC drivers/acpi/property.o
AR drivers/power/supply/built-in.a
AR drivers/power/built-in.a
CC drivers/thermal/thermal_core.o
CC fs/nfs/nfs4state.o
CC drivers/base/devtmpfs.o
CC mm/page_io.o
CC drivers/usb/storage/option_ms.o
CC lib/base64.o
CC fs/nfs/nfs4renewd.o
CC net/ipv4/fib_frontend.o
CC arch/x86/kernel/tls.o
CC drivers/ata/ata_generic.o
AR drivers/thermal/intel/built-in.a
CC kernel/ucount.o
CC drivers/scsi/scsi_bsg.o
CC drivers/base/module.o
CC fs/ext4/acl.o
CC lib/once.o
CC net/mac80211/tdls.o
AR drivers/usb/early/built-in.a
CC drivers/acpi/acpica/rsirq.o
CC drivers/acpi/acpica/rslist.o
AR drivers/input/mouse/built-in.a
CC drivers/acpi/acpica/rsmemory.o
CC [M] drivers/gpu/drm/xe/xe_bo.o
CC drivers/usb/core/buffer.o
CC drivers/usb/storage/usual-tables.o
CC [M] drivers/gpu/drm/scheduler/sched_entity.o
CC drivers/input/ff-memless.o
CC drivers/gpu/drm/drm_atomic_uapi.o
CC fs/inode.o
CC net/ipv6/exthdrs_core.o
CC lib/refcount.o
CC arch/x86/kernel/step.o
AR drivers/net/ethernet/cisco/built-in.a
CC kernel/regset.o
CC net/mac80211/ocb.o
CC mm/swap_state.o
CC drivers/usb/host/xhci.o
CC [M] drivers/gpu/drm/xe/xe_bo_evict.o
CC drivers/acpi/acpica/rsmisc.o
CC arch/x86/kernel/i8237.o
CC drivers/input/sparse-keymap.o
AR drivers/net/ethernet/cortina/built-in.a
CC net/ipv6/ip6_checksum.o
CC lib/rcuref.o
CC drivers/scsi/scsi_common.o
CC drivers/gpu/drm/i915/i915_debugfs_params.o
CC drivers/gpu/drm/drm_auth.o
AR drivers/usb/storage/built-in.a
CC net/mac80211/airtime.o
AR drivers/ata/built-in.a
CC drivers/acpi/acpica/rsserial.o
CC drivers/base/auxiliary_sysfs.o
CC lib/usercopy.o
CC mm/swapfile.o
CC drivers/gpu/drm/i915/i915_pmu.o
CC net/ipv4/fib_semantics.o
CC kernel/ksyms_common.o
CC drivers/usb/core/sysfs.o
CC kernel/groups.o
LD [M] drivers/gpu/drm/scheduler/gpu-sched.o
CC drivers/input/vivaldi-fmap.o
CC mm/swap_slots.o
CC fs/nfs/nfs4super.o
CC fs/attr.o
CC net/ipv6/ip6_icmp.o
CC net/ipv6/output_core.o
CC drivers/acpi/acpica/rsutils.o
CC arch/x86/kernel/stacktrace.o
CC drivers/acpi/debugfs.o
CC arch/x86/kernel/reboot.o
CC drivers/scsi/scsi_transport_spi.o
AR drivers/net/ethernet/dec/tulip/built-in.a
AR drivers/net/ethernet/dec/built-in.a
CC lib/errseq.o
CC drivers/md/md.o
CC drivers/base/devcoredump.o
CC fs/ext4/xattr_security.o
CC drivers/input/input-leds.o
CC lib/bucket_locks.o
CC mm/dmapool.o
CC net/mac80211/eht.o
CC drivers/scsi/virtio_scsi.o
CC drivers/thermal/thermal_sysfs.o
CC drivers/gpu/drm/i915/gt/gen2_engine_cs.o
CC drivers/usb/core/endpoint.o
CC drivers/usb/core/devio.o
CC drivers/acpi/acpica/rsxface.o
CC fs/nfs/nfs4file.o
CC [M] drivers/gpu/drm/xe/xe_devcoredump.o
CC fs/nfs/delegation.o
CC drivers/md/md-bitmap.o
CC drivers/cpufreq/cpufreq.o
CC kernel/kcmp.o
CC drivers/gpu/drm/i915/gt/gen6_engine_cs.o
CC drivers/cpuidle/governors/menu.o
CC drivers/cpuidle/cpuidle.o
CC drivers/usb/host/xhci-mem.o
CC drivers/scsi/sd.o
CC drivers/gpu/drm/drm_blend.o
CC lib/generic-radix-tree.o
CC drivers/input/evdev.o
CC kernel/freezer.o
CC drivers/base/platform-msi.o
CC arch/x86/kernel/msr.o
CC drivers/acpi/acpica/tbdata.o
CC drivers/thermal/thermal_trip.o
AR fs/ext4/built-in.a
CC drivers/acpi/acpi_lpat.o
AR drivers/mmc/built-in.a
CC mm/hugetlb.o
AR drivers/ufs/built-in.a
CC net/ipv6/protocol.o
CC drivers/cpuidle/driver.o
AR drivers/firmware/arm_ffa/built-in.a
CC drivers/md/md-autodetect.o
AR drivers/firmware/arm_scmi/built-in.a
CC drivers/usb/host/xhci-ext-caps.o
AR drivers/firmware/broadcom/built-in.a
AR drivers/firmware/cirrus/test/built-in.a
CC drivers/cpuidle/governor.o
AR drivers/firmware/meson/built-in.a
AR drivers/firmware/cirrus/built-in.a
CC mm/mmu_notifier.o
CC arch/x86/kernel/cpuid.o
AR drivers/firmware/microchip/built-in.a
CC drivers/scsi/sr.o
CC fs/bad_inode.o
CC drivers/cpuidle/governors/haltpoll.o
CC drivers/firmware/efi/libstub/efi-stub-helper.o
CC drivers/base/physical_location.o
AR drivers/net/ethernet/dlink/built-in.a
CC lib/bitmap-str.o
AR drivers/crypto/stm32/built-in.a
AR drivers/crypto/xilinx/built-in.a
CC drivers/thermal/thermal_helpers.o
AR drivers/crypto/hisilicon/built-in.a
AR drivers/crypto/intel/keembay/built-in.a
AR drivers/crypto/intel/ixp4xx/built-in.a
AR drivers/crypto/intel/built-in.a
AR drivers/crypto/starfive/built-in.a
CC net/ipv6/ip6_offload.o
AR drivers/crypto/built-in.a
CC arch/x86/kernel/early-quirks.o
CC fs/nfs/nfs4idmap.o
CC drivers/acpi/acpica/tbfadt.o
CC [M] drivers/gpu/drm/xe/xe_device.o
CC drivers/gpu/drm/drm_bridge.o
AR drivers/net/ethernet/emulex/built-in.a
CC drivers/gpu/drm/drm_cache.o
CC drivers/md/dm.o
CC arch/x86/kernel/smp.o
CC net/mac80211/led.o
CC drivers/usb/host/xhci-ring.o
CC drivers/gpu/drm/i915/gt/gen6_ppgtt.o
CC drivers/thermal/thermal_thresholds.o
CC drivers/firmware/efi/libstub/gop.o
CC kernel/profile.o
CC drivers/base/trace.o
AR drivers/firmware/imx/built-in.a
CC net/ipv6/tcpv6_offload.o
CC lib/string_helpers.o
AR drivers/net/ethernet/engleder/built-in.a
CC lib/hexdump.o
CC lib/kstrtox.o
CC drivers/clocksource/acpi_pm.o
CC drivers/cpuidle/sysfs.o
CC drivers/firmware/efi/libstub/secureboot.o
CC drivers/scsi/sr_ioctl.o
AR drivers/input/built-in.a
CC drivers/acpi/acpica/tbfind.o
CC drivers/usb/core/notify.o
CC mm/migrate.o
CC drivers/firmware/efi/efi-bgrt.o
CC [M] drivers/gpu/drm/xe/xe_device_sysfs.o
CC drivers/md/dm-table.o
CC lib/iomap.o
CC drivers/firmware/efi/libstub/tpm.o
CC net/ipv4/fib_trie.o
CC drivers/firmware/efi/efi.o
CC drivers/firmware/efi/vars.o
AR drivers/cpuidle/governors/built-in.a
CC drivers/thermal/thermal_netlink.o
CC drivers/clocksource/i8253.o
CC drivers/cpuidle/poll_state.o
CC drivers/usb/host/xhci-hub.o
CC drivers/thermal/thermal_hwmon.o
CC drivers/acpi/acpica/tbinstal.o
CC drivers/cpufreq/freq_table.o
CC kernel/stacktrace.o
CC net/ipv6/exthdrs_offload.o
CC drivers/hid/hid-core.o
CC drivers/hid/usbhid/hid-core.o
AR drivers/firmware/psci/built-in.a
CC net/mac80211/pm.o
CC drivers/usb/core/generic.o
CC drivers/cpuidle/cpuidle-haltpoll.o
AR drivers/base/built-in.a
CC drivers/hid/hid-input.o
CC drivers/thermal/gov_step_wise.o
CC arch/x86/kernel/smpboot.o
CC kernel/dma.o
AR drivers/clocksource/built-in.a
CC [M] drivers/gpu/drm/xe/xe_dma_buf.o
CC drivers/acpi/acpi_pcc.o
CC fs/file.o
CC drivers/gpu/drm/i915/gt/gen7_renderclear.o
CC drivers/firmware/efi/libstub/file.o
AR drivers/net/ethernet/ezchip/built-in.a
CC drivers/usb/core/quirks.o
CC drivers/acpi/acpica/tbprint.o
CC drivers/scsi/sr_vendor.o
CC net/ipv6/inet6_hashtables.o
AR drivers/firmware/qcom/built-in.a
AR drivers/platform/x86/amd/built-in.a
CC drivers/acpi/ac.o
CC net/ipv6/mcast_snoop.o
AR drivers/platform/x86/intel/built-in.a
CC drivers/platform/x86/wmi.o
CC drivers/platform/x86/wmi-bmof.o
CC drivers/hid/hid-quirks.o
CC lib/iomap_copy.o
CC mm/page_counter.o
CC drivers/acpi/acpica/tbutils.o
CC fs/nfs/callback.o
CC drivers/mailbox/mailbox.o
CC drivers/cpufreq/cpufreq_performance.o
AR drivers/cpuidle/built-in.a
CC arch/x86/kernel/tsc_sync.o
CC net/ipv4/fib_notifier.o
CC lib/devres.o
CC drivers/firmware/efi/libstub/mem.o
CC drivers/scsi/sg.o
CC drivers/usb/host/xhci-dbg.o
CC kernel/smp.o
CC drivers/hid/usbhid/hiddev.o
CC lib/check_signature.o
AR drivers/perf/built-in.a
CC arch/x86/kernel/setup_percpu.o
CC drivers/hid/hid-debug.o
CC drivers/hid/hidraw.o
AR drivers/net/ethernet/broadcom/built-in.a
AR drivers/net/ethernet/fujitsu/built-in.a
AR drivers/net/ethernet/fungible/built-in.a
AR drivers/net/ethernet/google/built-in.a
AR drivers/net/ethernet/hisilicon/built-in.a
AR drivers/net/ethernet/huawei/built-in.a
CC drivers/net/ethernet/intel/e1000/e1000_main.o
CC drivers/hid/hid-generic.o
AR drivers/platform/surface/built-in.a
CC mm/hugetlb_cgroup.o
CC drivers/platform/x86/eeepc-laptop.o
CC drivers/acpi/acpica/tbxface.o
AR drivers/hwtracing/intel_th/built-in.a
CC mm/early_ioremap.o
CC drivers/cpufreq/cpufreq_userspace.o
CC arch/x86/kernel/mpparse.o
CC drivers/usb/core/devices.o
CC kernel/uid16.o
CC drivers/md/dm-target.o
CC drivers/mailbox/pcc.o
CC lib/interval_tree.o
CC drivers/gpu/drm/drm_color_mgmt.o
CC [M] drivers/gpu/drm/xe/xe_drm_client.o
AR drivers/thermal/built-in.a
CC net/mac80211/rc80211_minstrel_ht.o
CC arch/x86/kernel/trace_clock.o
CC drivers/gpu/drm/drm_connector.o
AR drivers/firmware/smccc/built-in.a
CC drivers/gpu/drm/i915/gt/gen8_engine_cs.o
CC drivers/gpu/drm/i915/gt/gen8_ppgtt.o
CC drivers/net/ethernet/intel/e1000/e1000_hw.o
CC drivers/firmware/efi/libstub/random.o
CC drivers/acpi/acpica/tbxfload.o
CC drivers/gpu/drm/i915/gt/intel_breadcrumbs.o
AR drivers/android/built-in.a
CC kernel/kallsyms.o
CC drivers/usb/core/phy.o
CC lib/assoc_array.o
CC mm/secretmem.o
CC net/ipv4/inet_fragment.o
AR drivers/firmware/tegra/built-in.a
CC drivers/scsi/scsi_sysfs.o
CC drivers/acpi/button.o
CC drivers/cpufreq/cpufreq_ondemand.o
CC kernel/acct.o
CC drivers/firmware/efi/libstub/randomalloc.o
CC drivers/platform/x86/p2sb.o
CC fs/nfs/callback_xdr.o
AR drivers/nvmem/layouts/built-in.a
CC drivers/nvmem/core.o
CC drivers/firmware/efi/reboot.o
CC drivers/acpi/acpica/tbxfroot.o
CC drivers/firmware/efi/memattr.o
AR drivers/mailbox/built-in.a
AR drivers/firmware/xilinx/built-in.a
CC lib/bitrev.o
CC fs/filesystems.o
CC drivers/hid/usbhid/hid-pidff.o
CC drivers/md/dm-linear.o
AR net/ipv6/built-in.a
CC drivers/gpu/drm/drm_crtc.o
CC net/mac80211/wbrf.o
AR drivers/net/ethernet/i825xx/built-in.a
CC drivers/usb/host/xhci-trace.o
CC drivers/firmware/efi/tpm.o
CC drivers/net/ethernet/intel/e1000/e1000_ethtool.o
CC drivers/hid/hid-a4tech.o
CC drivers/acpi/fan_core.o
CC drivers/firmware/efi/libstub/pci.o
CC drivers/gpu/drm/drm_displayid.o
CC drivers/gpu/drm/drm_drv.o
CC arch/x86/kernel/trace.o
CC drivers/acpi/acpica/utaddress.o
CC drivers/gpu/drm/i915/gt/intel_context.o
CC drivers/net/ethernet/intel/e1000e/82571.o
CC fs/nfs/callback_proc.o
CC drivers/gpu/drm/i915/gt/intel_context_sseu.o
CC drivers/usb/core/port.o
CC drivers/net/ethernet/intel/e1000/e1000_param.o
CC [M] drivers/gpu/drm/xe/xe_guc_engine_activity.o
CC drivers/firmware/dmi_scan.o
CC lib/crc-ccitt.o
CC drivers/cpufreq/cpufreq_governor.o
CC fs/nfs/nfs4namespace.o
CC mm/hmm.o
AR drivers/platform/x86/built-in.a
AR drivers/platform/built-in.a
CC drivers/net/ethernet/intel/e100.o
AR drivers/net/ethernet/microsoft/built-in.a
CC drivers/usb/host/xhci-debugfs.o
CC drivers/net/ethernet/intel/e1000e/ich8lan.o
CC kernel/vmcore_info.o
CC arch/x86/kernel/rethook.o
CC drivers/acpi/acpica/utalloc.o
CC drivers/usb/core/hcd-pci.o
CC drivers/firmware/efi/libstub/skip_spaces.o
CC lib/crc16.o
CC drivers/cpufreq/cpufreq_governor_attr_set.o
CC kernel/elfcorehdr.o
CC drivers/usb/core/usb-acpi.o
CC drivers/acpi/acpica/utascii.o
CC drivers/cpufreq/acpi-cpufreq.o
CC fs/namespace.o
HOSTCC lib/gen_crc32table
CC drivers/md/dm-stripe.o
CC [M] drivers/gpu/drm/xe/xe_exec.o
CC drivers/hid/hid-apple.o
CC net/ipv4/ping.o
CC drivers/firmware/efi/libstub/lib-cmdline.o
CC drivers/net/ethernet/intel/e1000e/80003es2lan.o
AR drivers/scsi/built-in.a
CC drivers/acpi/acpica/utbuffer.o
AR drivers/net/ethernet/litex/built-in.a
CC drivers/gpu/drm/drm_dumb_buffers.o
CC drivers/firmware/efi/libstub/lib-ctype.o
CC drivers/firmware/efi/libstub/alignedmem.o
CC drivers/acpi/fan_attr.o
CC drivers/cpufreq/amd-pstate.o
CC arch/x86/kernel/vmcore_info_32.o
AR drivers/nvmem/built-in.a
CC lib/xxhash.o
CC drivers/usb/host/xhci-pci.o
CC net/ipv4/ip_tunnel_core.o
CC drivers/hid/hid-belkin.o
CC kernel/crash_reserve.o
CC mm/memfd.o
CC [M] drivers/gpu/drm/xe/xe_exec_queue.o
CC drivers/firmware/dmi-id.o
CC fs/nfs/nfs4getroot.o
CC fs/nfs/nfs4client.o
AR drivers/hid/usbhid/built-in.a
CC net/ipv4/gre_offload.o
CC drivers/acpi/acpica/utcksum.o
CC fs/seq_file.o
AR drivers/net/ethernet/marvell/octeon_ep/built-in.a
AR drivers/net/ethernet/marvell/octeon_ep_vf/built-in.a
AR drivers/net/ethernet/marvell/octeontx2/built-in.a
CC [M] drivers/gpu/drm/xe/xe_execlist.o
AR drivers/net/ethernet/marvell/prestera/built-in.a
CC drivers/net/ethernet/marvell/sky2.o
CC drivers/net/ethernet/intel/e1000e/mac.o
CC drivers/net/ethernet/intel/e1000e/manage.o
CC [M] drivers/gpu/drm/xe/xe_force_wake.o
CC drivers/acpi/fan_hwmon.o
AR drivers/usb/core/built-in.a
CC fs/xattr.o
AR drivers/net/ethernet/mellanox/built-in.a
CC drivers/hid/hid-cherry.o
CC drivers/gpu/drm/i915/gt/intel_engine_cs.o
CC drivers/cpufreq/amd-pstate-trace.o
CC arch/x86/kernel/machine_kexec_32.o
AS arch/x86/kernel/relocate_kernel_32.o
CC drivers/hid/hid-chicony.o
CC drivers/cpufreq/intel_pstate.o
CC drivers/acpi/acpica/utcopy.o
CC drivers/firmware/efi/libstub/relocate.o
CC drivers/md/dm-ioctl.o
CC [M] drivers/gpu/drm/xe/xe_ggtt.o
CC drivers/net/ethernet/intel/e1000e/nvm.o
CC net/ipv4/metrics.o
CC drivers/firmware/memmap.o
CC drivers/acpi/acpi_video.o
CC mm/ptdump.o
CC lib/genalloc.o
CC arch/x86/kernel/crash_dump_32.o
CC drivers/gpu/drm/drm_edid.o
AR drivers/net/ethernet/meta/built-in.a
CC drivers/gpu/drm/drm_eld.o
CC drivers/md/dm-io.o
CC kernel/kexec_core.o
CC fs/nfs/nfs4session.o
CC drivers/firmware/efi/libstub/printk.o
CC mm/execmem.o
CC drivers/net/ethernet/intel/e1000e/phy.o
CC drivers/firmware/efi/memmap.o
CC drivers/acpi/acpica/utexcep.o
CC drivers/acpi/acpica/utdebug.o
AR drivers/net/ethernet/intel/e1000/built-in.a
AR drivers/net/ethernet/micrel/built-in.a
CC net/ipv4/netlink.o
CC drivers/gpu/drm/drm_encoder.o
AR net/mac80211/built-in.a
CC drivers/md/dm-kcopyd.o
CC drivers/firmware/efi/libstub/vsprintf.o
CC drivers/acpi/acpica/utdecode.o
CC net/ipv4/nexthop.o
AR drivers/net/ethernet/microchip/built-in.a
CC drivers/gpu/drm/i915/gt/intel_engine_heartbeat.o
CC drivers/firmware/efi/libstub/x86-stub.o
CC drivers/acpi/video_detect.o
CC arch/x86/kernel/crash.o
CC drivers/md/dm-sysfs.o
CC [M] drivers/gpu/drm/xe/xe_gpu_scheduler.o
CC drivers/firmware/efi/capsule.o
CC drivers/net/ethernet/intel/e1000e/param.o
CC net/ipv4/udp_tunnel_stub.o
CC drivers/firmware/efi/libstub/smbios.o
CC drivers/hid/hid-cypress.o
CC lib/percpu_counter.o
CC drivers/hid/hid-ezkey.o
CC fs/nfs/dns_resolve.o
AR drivers/usb/host/built-in.a
AR drivers/usb/built-in.a
CC drivers/acpi/processor_driver.o
CC kernel/crash_core.o
CC arch/x86/kernel/module.o
CC drivers/firmware/efi/esrt.o
CC [M] drivers/gpu/drm/xe/xe_gsc.o
CC drivers/acpi/processor_thermal.o
CC drivers/gpu/drm/drm_file.o
CC drivers/gpu/drm/drm_fourcc.o
AR mm/built-in.a
CC net/ipv4/ip_tunnel.o
CC fs/libfs.o
CC drivers/acpi/acpica/utdelete.o
CC drivers/gpu/drm/drm_framebuffer.o
CC [M] drivers/gpu/drm/xe/xe_gsc_debugfs.o
CC drivers/net/ethernet/intel/e1000e/ethtool.o
CC drivers/net/ethernet/intel/e1000e/netdev.o
CC kernel/kexec.o
AR drivers/net/ethernet/mscc/built-in.a
CC drivers/hid/hid-gyration.o
CC drivers/gpu/drm/drm_gem.o
CC lib/audit.o
CC drivers/acpi/processor_idle.o
CC drivers/gpu/drm/drm_ioctl.o
STUBCPY drivers/firmware/efi/libstub/alignedmem.stub.o
CC fs/nfs/nfs4trace.o
CC drivers/gpu/drm/i915/gt/intel_engine_pm.o
CC [M] drivers/gpu/drm/xe/xe_gsc_proxy.o
CC drivers/firmware/efi/runtime-wrappers.o
CC drivers/md/dm-stats.o
CC net/ipv4/sysctl_net_ipv4.o
CC fs/fs-writeback.o
CC drivers/hid/hid-ite.o
CC drivers/acpi/acpica/uterror.o
CC [M] drivers/gpu/drm/xe/xe_gsc_submit.o
CC drivers/hid/hid-kensington.o
STUBCPY drivers/firmware/efi/libstub/efi-stub-helper.stub.o
STUBCPY drivers/firmware/efi/libstub/file.stub.o
CC drivers/acpi/acpica/uteval.o
STUBCPY drivers/firmware/efi/libstub/gop.stub.o
CC kernel/utsname.o
CC kernel/pid_namespace.o
CC kernel/stop_machine.o
STUBCPY drivers/firmware/efi/libstub/lib-cmdline.stub.o
CC lib/syscall.o
STUBCPY drivers/firmware/efi/libstub/lib-ctype.stub.o
CC arch/x86/kernel/doublefault_32.o
AR drivers/net/ethernet/myricom/built-in.a
STUBCPY drivers/firmware/efi/libstub/mem.stub.o
CC drivers/acpi/acpica/utglobal.o
STUBCPY drivers/firmware/efi/libstub/pci.stub.o
CC [M] drivers/gpu/drm/xe/xe_gt.o
STUBCPY drivers/firmware/efi/libstub/printk.stub.o
STUBCPY drivers/firmware/efi/libstub/random.stub.o
CC drivers/acpi/processor_throttling.o
STUBCPY drivers/firmware/efi/libstub/randomalloc.stub.o
STUBCPY drivers/firmware/efi/libstub/relocate.stub.o
STUBCPY drivers/firmware/efi/libstub/secureboot.stub.o
STUBCPY drivers/firmware/efi/libstub/skip_spaces.stub.o
STUBCPY drivers/firmware/efi/libstub/smbios.stub.o
STUBCPY drivers/firmware/efi/libstub/tpm.stub.o
STUBCPY drivers/firmware/efi/libstub/vsprintf.stub.o
STUBCPY drivers/firmware/efi/libstub/x86-stub.stub.o
CC drivers/gpu/drm/i915/gt/intel_engine_user.o
CC fs/pnode.o
AR drivers/firmware/efi/libstub/lib.a
CC drivers/net/ethernet/intel/e1000e/ptp.o
CC arch/x86/kernel/early_printk.o
CC net/ipv4/proc.o
CC drivers/gpu/drm/drm_lease.o
CC drivers/gpu/drm/i915/gt/intel_execlists_submission.o
CC drivers/hid/hid-lg.o
CC fs/nfs/nfs4sysctl.o
CC arch/x86/kernel/hpet.o
CC lib/errname.o
CC [M] drivers/gpu/drm/xe/xe_gt_ccs_mode.o
CC drivers/acpi/acpica/uthex.o
CC kernel/audit.o
CC drivers/md/dm-rq.o
CC drivers/gpu/drm/drm_managed.o
AR drivers/net/ethernet/natsemi/built-in.a
CC drivers/acpi/acpica/utids.o
CC drivers/firmware/efi/capsule-loader.o
CC net/ipv4/fib_rules.o
AR drivers/cpufreq/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_clock.o
CC drivers/acpi/acpica/utinit.o
CC lib/nlattr.o
CC drivers/hid/hid-lgff.o
CC fs/splice.o
CC drivers/acpi/processor_perflib.o
CC kernel/auditfilter.o
CC drivers/md/dm-io-rewind.o
CC kernel/auditsc.o
CC drivers/acpi/container.o
CC kernel/audit_watch.o
AR drivers/net/ethernet/neterion/built-in.a
CC net/ipv4/ipmr.o
CC drivers/gpu/drm/i915/gt/intel_ggtt.o
CC kernel/audit_fsnotify.o
CC lib/cpu_rmap.o
AR drivers/net/ethernet/netronome/built-in.a
CC arch/x86/kernel/amd_nb.o
CC fs/sync.o
CC drivers/acpi/acpica/utlock.o
CC net/ipv4/ipmr_base.o
CC arch/x86/kernel/amd_node.o
CC net/ipv4/syncookies.o
CC lib/dynamic_queue_limits.o
CC [M] drivers/gpu/drm/xe/xe_gt_freq.o
CC drivers/hid/hid-lg4ff.o
CC drivers/md/dm-builtin.o
CC kernel/audit_tree.o
CC drivers/acpi/acpica/utmath.o
CC drivers/firmware/efi/earlycon.o
CC fs/utimes.o
CC drivers/acpi/thermal_lib.o
CC lib/glob.o
AR drivers/net/ethernet/marvell/built-in.a
AR drivers/net/ethernet/ni/built-in.a
CC drivers/gpu/drm/i915/gt/intel_ggtt_fencing.o
CC drivers/md/dm-raid1.o
CC lib/strncpy_from_user.o
CC drivers/gpu/drm/drm_mm.o
CC drivers/acpi/thermal.o
CC arch/x86/kernel/kvm.o
CC net/ipv4/tunnel4.o
CC drivers/hid/hid-lg-g15.o
CC drivers/acpi/nhlt.o
CC kernel/kprobes.o
CC drivers/gpu/drm/drm_mode_config.o
CC drivers/acpi/acpi_memhotplug.o
CC drivers/gpu/drm/i915/gt/intel_gt.o
CC arch/x86/kernel/kvmclock.o
CC drivers/acpi/acpica/utmisc.o
CC fs/d_path.o
CC drivers/gpu/drm/drm_mode_object.o
CC drivers/hid/hid-microsoft.o
CC kernel/seccomp.o
CC drivers/md/dm-log.o
CC arch/x86/kernel/paravirt.o
CC drivers/gpu/drm/drm_modes.o
CC kernel/relay.o
CC drivers/acpi/ioapic.o
CC drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.o
CC fs/stack.o
CC [M] drivers/gpu/drm/xe/xe_gt_idle.o
CC drivers/net/ethernet/nvidia/forcedeth.o
CC drivers/md/dm-region-hash.o
CC drivers/acpi/acpica/utmutex.o
CC drivers/acpi/battery.o
CC drivers/hid/hid-monterey.o
CC drivers/acpi/bgrt.o
AR drivers/firmware/efi/built-in.a
CC drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.o
AR drivers/firmware/built-in.a
CC lib/strnlen_user.o
CC lib/net_utils.o
CC drivers/md/dm-zero.o
CC net/ipv4/ipconfig.o
CC drivers/acpi/spcr.o
CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o
AR drivers/net/ethernet/oki-semi/built-in.a
CC kernel/utsname_sysctl.o
CC fs/fs_struct.o
CC drivers/acpi/acpica/utnonansi.o
CC drivers/gpu/drm/drm_modeset_lock.o
CC net/ipv4/netfilter.o
CC kernel/delayacct.o
CC drivers/hid/hid-ntrig.o
CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o
CC arch/x86/kernel/pvclock.o
AR drivers/net/ethernet/packetengines/built-in.a
CC drivers/gpu/drm/drm_plane.o
CC lib/sg_pool.o
CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o
CC drivers/acpi/acpica/utobject.o
CC drivers/acpi/acpica/utosi.o
CC arch/x86/kernel/pcspeaker.o
CC drivers/hid/hid-pl.o
CC [M] drivers/gpu/drm/xe/xe_gt_throttle.o
CC kernel/taskstats.o
CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o
CC arch/x86/kernel/check.o
CC drivers/gpu/drm/i915/gt/intel_gt_clock_utils.o
CC fs/statfs.o
CC drivers/acpi/acpica/utownerid.o
CC drivers/hid/hid-petalynx.o
CC kernel/tsacct.o
CC drivers/acpi/acpica/utpredef.o
CC drivers/gpu/drm/i915/gt/intel_gt_debugfs.o
CC net/ipv4/tcp_cubic.o
CC kernel/tracepoint.o
CC kernel/irq_work.o
CC drivers/hid/hid-redragon.o
CC arch/x86/kernel/uprobes.o
CC drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.o
CC drivers/hid/hid-samsung.o
CC drivers/hid/hid-sony.o
AR drivers/md/built-in.a
CC drivers/acpi/acpica/utresdecode.o
CC fs/fs_pin.o
CC drivers/gpu/drm/drm_prime.o
CC drivers/acpi/acpica/utresrc.o
AR drivers/net/ethernet/qlogic/built-in.a
CC lib/stackdepot.o
CC net/ipv4/tcp_sigpool.o
CC drivers/gpu/drm/drm_print.o
CC net/ipv4/cipso_ipv4.o
CC drivers/gpu/drm/drm_property.o
CC [M] drivers/gpu/drm/xe/xe_gt_topology.o
CC fs/nsfs.o
AR fs/nfs/built-in.a
CC fs/fs_types.o
CC arch/x86/kernel/perf_regs.o
CC net/ipv4/xfrm4_policy.o
CC drivers/gpu/drm/drm_rect.o
AR drivers/net/ethernet/qualcomm/emac/built-in.a
CC drivers/gpu/drm/i915/gt/intel_gt_irq.o
AR drivers/net/ethernet/qualcomm/built-in.a
CC drivers/hid/hid-sunplus.o
CC drivers/gpu/drm/drm_syncobj.o
CC arch/x86/kernel/tracepoint.o
CC [M] drivers/gpu/drm/xe/xe_guc.o
CC drivers/gpu/drm/i915/gt/intel_gt_mcr.o
CC kernel/static_call.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm.o
CC net/ipv4/xfrm4_state.o
CC kernel/padata.o
CC drivers/net/ethernet/realtek/8139too.o
CC drivers/acpi/acpica/utstate.o
CC lib/asn1_decoder.o
CC fs/fs_context.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.o
CC drivers/gpu/drm/drm_sysfs.o
CC arch/x86/kernel/itmt.o
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
CC kernel/jump_label.o
CC [M] drivers/gpu/drm/xe/xe_guc_buf.o
CC kernel/context_tracking.o
CC fs/fs_parser.o
CC drivers/acpi/acpica/utstring.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm_irq.o
CC drivers/net/ethernet/realtek/r8169_main.o
GEN lib/oid_registry_data.c
AR drivers/net/ethernet/renesas/built-in.a
CC drivers/net/ethernet/realtek/r8169_firmware.o
CC kernel/iomem.o
CC [M] drivers/gpu/drm/xe/xe_guc_capture.o
CC drivers/hid/hid-topseed.o
CC drivers/gpu/drm/i915/gt/intel_gt_requests.o
CC net/ipv4/xfrm4_input.o
CC drivers/net/ethernet/realtek/r8169_phy_config.o
CC [M] drivers/gpu/drm/xe/xe_guc_ct.o
AR drivers/net/ethernet/rdc/built-in.a
AR drivers/net/ethernet/rocker/built-in.a
CC drivers/acpi/acpica/utstrsuppt.o
CC [M] drivers/gpu/drm/xe/xe_guc_db_mgr.o
CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o
CC drivers/gpu/drm/drm_trace_points.o
CC net/ipv4/xfrm4_output.o
CC drivers/gpu/drm/drm_vblank.o
CC fs/fsopen.o
CC [M] drivers/gpu/drm/xe/xe_guc_id_mgr.o
CC lib/ucs2_string.o
CC [M] drivers/gpu/drm/xe/xe_guc_klv_helpers.o
CC arch/x86/kernel/umip.o
CC fs/init.o
CC fs/kernel_read_file.o
CC net/ipv4/xfrm4_protocol.o
CC kernel/rseq.o
CC drivers/gpu/drm/i915/gt/intel_gt_sysfs.o
CC arch/x86/kernel/unwind_frame.o
CC drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.o
AR drivers/net/ethernet/samsung/built-in.a
CC drivers/gpu/drm/drm_vblank_work.o
CC drivers/acpi/acpica/utstrtoul64.o
CC lib/sbitmap.o
CC drivers/acpi/acpica/utxface.o
CC fs/mnt_idmapping.o
CC fs/remap_range.o
CC drivers/gpu/drm/i915/gt/intel_gtt.o
CC lib/group_cpus.o
CC fs/pidfs.o
CC lib/fw_table.o
CC drivers/gpu/drm/drm_vma_manager.o
AR drivers/net/ethernet/seeq/built-in.a
CC fs/buffer.o
AR drivers/net/ethernet/silan/built-in.a
CC drivers/gpu/drm/i915/gt/intel_llc.o
AR drivers/net/ethernet/sis/built-in.a
AR drivers/net/ethernet/intel/e1000e/built-in.a
CC drivers/gpu/drm/drm_writeback.o
AR drivers/net/ethernet/intel/built-in.a
CC drivers/gpu/drm/drm_panel.o
CC drivers/acpi/acpica/utxfinit.o
AR drivers/hid/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_log.o
AR drivers/net/ethernet/sfc/built-in.a
AR drivers/net/ethernet/smsc/built-in.a
AR drivers/net/ethernet/socionext/built-in.a
AR drivers/net/ethernet/stmicro/built-in.a
AR drivers/net/ethernet/sun/built-in.a
AR drivers/net/ethernet/tehuti/built-in.a
AR drivers/net/ethernet/ti/built-in.a
CC drivers/acpi/acpica/utxferror.o
CC drivers/gpu/drm/drm_pci.o
AR drivers/net/ethernet/vertexcom/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_pc.o
AR drivers/net/ethernet/via/built-in.a
CC drivers/gpu/drm/i915/gt/intel_lrc.o
CC drivers/gpu/drm/drm_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_guc_submit.o
CC drivers/acpi/acpica/utxfmutex.o
CC fs/mpage.o
CC [M] drivers/gpu/drm/xe/xe_heci_gsc.o
CC drivers/gpu/drm/drm_debugfs_crc.o
CC drivers/gpu/drm/i915/gt/intel_migrate.o
AR drivers/net/ethernet/wangxun/built-in.a
AR drivers/net/ethernet/wiznet/built-in.a
CC fs/proc_namespace.o
AR lib/lib.a
CC [M] drivers/gpu/drm/xe/xe_huc.o
CC drivers/gpu/drm/i915/gt/intel_mocs.o
CC fs/direct-io.o
AR drivers/net/ethernet/xilinx/built-in.a
AR drivers/net/ethernet/xircom/built-in.a
GEN lib/crc32table.h
CC drivers/gpu/drm/drm_panel_orientation_quirks.o
CC drivers/gpu/drm/drm_buddy.o
CC drivers/gpu/drm/i915/gt/intel_ppgtt.o
AR arch/x86/kernel/built-in.a
CC fs/eventpoll.o
CC lib/oid_registry.o
AR arch/x86/built-in.a
CC fs/anon_inodes.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine.o
CC fs/signalfd.o
CC drivers/gpu/drm/drm_gem_shmem_helper.o
CC lib/crc32.o
AR drivers/net/ethernet/synopsys/built-in.a
CC drivers/gpu/drm/i915/gt/intel_rc6.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.o
CC drivers/gpu/drm/i915/gt/intel_region_lmem.o
AR kernel/built-in.a
CC drivers/gpu/drm/drm_atomic_helper.o
CC fs/timerfd.o
AR drivers/net/ethernet/nvidia/built-in.a
AR drivers/net/ethernet/pensando/built-in.a
CC drivers/gpu/drm/i915/gt/intel_renderstate.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_group.o
AR drivers/acpi/acpica/built-in.a
CC fs/eventfd.o
CC drivers/gpu/drm/drm_atomic_state_helper.o
AR drivers/acpi/built-in.a
CC drivers/gpu/drm/i915/gt/intel_reset.o
CC [M] drivers/gpu/drm/xe/xe_hw_fence.o
AR net/ipv4/built-in.a
CC drivers/gpu/drm/drm_crtc_helper.o
AR net/built-in.a
CC fs/aio.o
CC fs/locks.o
CC drivers/gpu/drm/i915/gt/intel_ring.o
CC [M] drivers/gpu/drm/xe/xe_irq.o
CC [M] drivers/gpu/drm/xe/xe_lrc.o
CC drivers/gpu/drm/drm_damage_helper.o
CC [M] drivers/gpu/drm/xe/xe_migrate.o
AR lib/built-in.a
CC fs/binfmt_misc.o
CC drivers/gpu/drm/i915/gt/intel_ring_submission.o
CC drivers/gpu/drm/drm_flip_work.o
CC fs/binfmt_script.o
CC [M] drivers/gpu/drm/xe/xe_mmio.o
CC drivers/gpu/drm/drm_format_helper.o
CC drivers/gpu/drm/i915/gt/intel_rps.o
CC drivers/gpu/drm/drm_gem_atomic_helper.o
CC fs/binfmt_elf.o
CC [M] drivers/gpu/drm/xe/xe_mocs.o
CC drivers/gpu/drm/drm_gem_framebuffer_helper.o
CC fs/mbcache.o
CC fs/posix_acl.o
CC drivers/gpu/drm/i915/gt/intel_sa_media.o
CC fs/coredump.o
CC [M] drivers/gpu/drm/xe/xe_module.o
CC drivers/gpu/drm/i915/gt/intel_sseu.o
CC drivers/gpu/drm/drm_kms_helper_common.o
CC [M] drivers/gpu/drm/xe/xe_oa.o
CC fs/drop_caches.o
CC drivers/gpu/drm/drm_modeset_helper.o
CC fs/sysctls.o
CC [M] drivers/gpu/drm/xe/xe_observation.o
CC drivers/gpu/drm/i915/gt/intel_sseu_debugfs.o
CC fs/fhandle.o
CC drivers/gpu/drm/i915/gt/intel_timeline.o
CC drivers/gpu/drm/drm_plane_helper.o
CC [M] drivers/gpu/drm/xe/xe_pat.o
CC [M] drivers/gpu/drm/xe/xe_pci.o
CC drivers/gpu/drm/i915/gt/intel_tlb.o
CC drivers/gpu/drm/drm_probe_helper.o
CC [M] drivers/gpu/drm/xe/xe_pcode.o
CC drivers/gpu/drm/i915/gt/intel_wopcm.o
CC [M] drivers/gpu/drm/xe/xe_pm.o
CC drivers/gpu/drm/drm_self_refresh_helper.o
CC drivers/gpu/drm/i915/gt/intel_workarounds.o
CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o
CC drivers/gpu/drm/drm_simple_kms_helper.o
CC drivers/gpu/drm/bridge/panel.o
CC drivers/gpu/drm/drm_mipi_dsi.o
CC drivers/gpu/drm/i915/gt/shmem_utils.o
CC [M] drivers/gpu/drm/drm_exec.o
CC [M] drivers/gpu/drm/xe/xe_pt.o
CC drivers/gpu/drm/i915/gt/sysfs_engines.o
CC [M] drivers/gpu/drm/xe/xe_pt_walk.o
CC [M] drivers/gpu/drm/drm_gpuvm.o
CC drivers/gpu/drm/i915/gt/intel_ggtt_gmch.o
CC [M] drivers/gpu/drm/xe/xe_pxp.o
CC [M] drivers/gpu/drm/xe/xe_pxp_debugfs.o
CC drivers/gpu/drm/i915/gt/gen6_renderstate.o
CC [M] drivers/gpu/drm/drm_suballoc.o
CC [M] drivers/gpu/drm/xe/xe_pxp_submit.o
CC drivers/gpu/drm/i915/gt/gen7_renderstate.o
CC [M] drivers/gpu/drm/xe/xe_query.o
CC drivers/gpu/drm/i915/gt/gen8_renderstate.o
CC [M] drivers/gpu/drm/drm_gem_ttm_helper.o
AR drivers/net/ethernet/realtek/built-in.a
AR drivers/net/ethernet/built-in.a
AR drivers/net/built-in.a
CC [M] drivers/gpu/drm/xe/xe_range_fence.o
CC drivers/gpu/drm/i915/gt/gen9_renderstate.o
CC drivers/gpu/drm/i915/gem/i915_gem_busy.o
CC drivers/gpu/drm/i915/gem/i915_gem_clflush.o
CC drivers/gpu/drm/i915/gem/i915_gem_context.o
CC [M] drivers/gpu/drm/xe/xe_reg_sr.o
CC drivers/gpu/drm/i915/gem/i915_gem_create.o
CC [M] drivers/gpu/drm/xe/xe_reg_whitelist.o
CC [M] drivers/gpu/drm/xe/xe_ring_ops.o
CC drivers/gpu/drm/i915/gem/i915_gem_dmabuf.o
CC drivers/gpu/drm/i915/gem/i915_gem_domain.o
CC [M] drivers/gpu/drm/xe/xe_rtp.o
CC drivers/gpu/drm/i915/gem/i915_gem_execbuffer.o
CC [M] drivers/gpu/drm/xe/xe_sa.o
CC [M] drivers/gpu/drm/xe/xe_sched_job.o
CC drivers/gpu/drm/i915/gem/i915_gem_internal.o
CC drivers/gpu/drm/i915/gem/i915_gem_lmem.o
CC [M] drivers/gpu/drm/xe/xe_step.o
CC drivers/gpu/drm/i915/gem/i915_gem_mman.o
CC drivers/gpu/drm/i915/gem/i915_gem_object.o
CC [M] drivers/gpu/drm/xe/xe_survivability_mode.o
CC drivers/gpu/drm/i915/gem/i915_gem_pages.o
CC [M] drivers/gpu/drm/xe/xe_sync.o
CC [M] drivers/gpu/drm/xe/xe_tile.o
CC drivers/gpu/drm/i915/gem/i915_gem_phys.o
CC [M] drivers/gpu/drm/xe/xe_tile_sysfs.o
CC drivers/gpu/drm/i915/gem/i915_gem_pm.o
LD [M] drivers/gpu/drm/drm_suballoc_helper.o
CC drivers/gpu/drm/i915/gem/i915_gem_region.o
CC drivers/gpu/drm/i915/gem/i915_gem_shmem.o
CC [M] drivers/gpu/drm/xe/xe_trace.o
CC drivers/gpu/drm/i915/gem/i915_gem_shrinker.o
CC [M] drivers/gpu/drm/xe/xe_trace_bo.o
CC [M] drivers/gpu/drm/xe/xe_trace_guc.o
CC drivers/gpu/drm/i915/gem/i915_gem_stolen.o
CC drivers/gpu/drm/i915/gem/i915_gem_throttle.o
LD [M] drivers/gpu/drm/drm_ttm_helper.o
CC drivers/gpu/drm/i915/gem/i915_gem_tiling.o
CC [M] drivers/gpu/drm/xe/xe_trace_lrc.o
CC [M] drivers/gpu/drm/xe/xe_ttm_stolen_mgr.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm.o
CC [M] drivers/gpu/drm/xe/xe_ttm_sys_mgr.o
AR fs/built-in.a
CC drivers/gpu/drm/i915/gem/i915_gem_ttm_move.o
CC [M] drivers/gpu/drm/xe/xe_ttm_vram_mgr.o
CC [M] drivers/gpu/drm/xe/xe_tuning.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.o
CC drivers/gpu/drm/i915/gem/i915_gem_userptr.o
CC drivers/gpu/drm/i915/gem/i915_gem_wait.o
CC [M] drivers/gpu/drm/xe/xe_uc.o
CC [M] drivers/gpu/drm/xe/xe_uc_fw.o
CC [M] drivers/gpu/drm/xe/xe_vm.o
CC drivers/gpu/drm/i915/gem/i915_gemfs.o
CC [M] drivers/gpu/drm/xe/xe_vram.o
CC [M] drivers/gpu/drm/xe/xe_vram_freq.o
CC drivers/gpu/drm/i915/i915_active.o
CC drivers/gpu/drm/i915/i915_cmd_parser.o
CC [M] drivers/gpu/drm/xe/xe_vsec.o
CC drivers/gpu/drm/i915/i915_deps.o
CC [M] drivers/gpu/drm/xe/xe_wa.o
CC [M] drivers/gpu/drm/xe/xe_wait_user_fence.o
CC drivers/gpu/drm/i915/i915_gem.o
CC [M] drivers/gpu/drm/xe/xe_wopcm.o
CC drivers/gpu/drm/i915/i915_gem_evict.o
CC drivers/gpu/drm/i915/i915_gem_gtt.o
CC drivers/gpu/drm/i915/i915_gem_ww.o
CC [M] drivers/gpu/drm/xe/xe_hmm.o
CC drivers/gpu/drm/i915/i915_query.o
CC drivers/gpu/drm/i915/i915_request.o
CC [M] drivers/gpu/drm/xe/xe_hwmon.o
CC [M] drivers/gpu/drm/xe/xe_pmu.o
CC drivers/gpu/drm/i915/i915_scheduler.o
CC drivers/gpu/drm/i915/i915_trace_points.o
CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf.o
CC [M] drivers/gpu/drm/xe/xe_guc_relay.o
CC [M] drivers/gpu/drm/xe/xe_memirq.o
CC drivers/gpu/drm/i915/i915_ttm_buddy_manager.o
CC [M] drivers/gpu/drm/xe/xe_sriov.o
CC drivers/gpu/drm/i915/i915_vma.o
CC [M] drivers/gpu/drm/xe/xe_sriov_vf.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_irq.o
CC drivers/gpu/drm/i915/i915_vma_resource.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_utils.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_debugfs.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.o
CC [M] drivers/gpu/drm/xe/display/intel_bo.o
CC [M] drivers/gpu/drm/xe/display/intel_fb_bo.o
CC [M] drivers/gpu/drm/xe/display/intel_fbdev_fb.o
CC [M] drivers/gpu/drm/xe/display/xe_display.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_ads.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_capture.o
CC [M] drivers/gpu/drm/xe/display/xe_display_misc.o
CC [M] drivers/gpu/drm/xe/display/xe_display_rps.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_ct.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.o
CC [M] drivers/gpu/drm/xe/display/xe_display_wa.o
CC [M] drivers/gpu/drm/xe/display/xe_dsb_buffer.o
CC [M] drivers/gpu/drm/xe/display/xe_fb_pin.o
CC [M] drivers/gpu/drm/xe/display/xe_hdcp_gsc.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_fw.o
CC [M] drivers/gpu/drm/xe/display/xe_plane_initial.o
CC [M] drivers/gpu/drm/xe/display/xe_tdf.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_dram.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_log.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_rc.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_pch.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_submission.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_rom.o
CC [M] drivers/gpu/drm/xe/i915-display/icl_dsi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_alpm.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_audio.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_backlight.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc_fw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bios.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bw.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cdclk.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc_fw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cmtg.o
CC drivers/gpu/drm/i915/gt/intel_gsc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_color.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_combo_phy.o
CC drivers/gpu/drm/i915/i915_hwmon.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_connector.o
CC drivers/gpu/drm/i915/display/hsw_ips.o
CC drivers/gpu/drm/i915/display/i9xx_plane.o
CC drivers/gpu/drm/i915/display/i9xx_display_sr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cursor.o
CC drivers/gpu/drm/i915/display/i9xx_wm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cx0_phy.o
CC drivers/gpu/drm/i915/display/intel_alpm.o
CC drivers/gpu/drm/i915/display/intel_atomic.o
CC drivers/gpu/drm/i915/display/intel_atomic_plane.o
CC drivers/gpu/drm/i915/display/intel_audio.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi_buf_trans.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display.o
CC drivers/gpu/drm/i915/display/intel_bios.o
CC drivers/gpu/drm/i915/display/intel_bo.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_conversion.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_device.o
CC drivers/gpu/drm/i915/display/intel_bw.o
CC drivers/gpu/drm/i915/display/intel_cdclk.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_driver.o
CC drivers/gpu/drm/i915/display/intel_cmtg.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_params.o
CC drivers/gpu/drm/i915/display/intel_color.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power.o
CC drivers/gpu/drm/i915/display/intel_combo_phy.o
CC drivers/gpu/drm/i915/display/intel_connector.o
CC drivers/gpu/drm/i915/display/intel_crtc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_map.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_well.o
CC drivers/gpu/drm/i915/display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_trace.o
CC drivers/gpu/drm/i915/display/intel_cursor.o
CC drivers/gpu/drm/i915/display/intel_display.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_wa.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dkl_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc_wl.o
CC drivers/gpu/drm/i915/display/intel_display_conversion.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux.o
CC drivers/gpu/drm/i915/display/intel_display_driver.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux_backlight.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_hdcp.o
CC drivers/gpu/drm/i915/display/intel_display_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_link_training.o
CC drivers/gpu/drm/i915/display/intel_display_params.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_mst.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_test.o
CC drivers/gpu/drm/i915/display/intel_display_power.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll.o
CC drivers/gpu/drm/i915/display/intel_display_power_map.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll_mgr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpt_common.o
CC drivers/gpu/drm/i915/display/intel_display_power_well.o
CC drivers/gpu/drm/i915/display/intel_display_reset.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_drrs.o
CC drivers/gpu/drm/i915/display/intel_display_rps.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi.o
CC drivers/gpu/drm/i915/display/intel_display_snapshot.o
CC drivers/gpu/drm/i915/display/intel_display_wa.o
CC drivers/gpu/drm/i915/display/intel_dmc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_dcs_backlight.o
CC drivers/gpu/drm/i915/display/intel_dmc_wl.o
CC drivers/gpu/drm/i915/display/intel_dpio_phy.o
CC drivers/gpu/drm/i915/display/intel_dpll.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_vbt.o
CC drivers/gpu/drm/i915/display/intel_dpll_mgr.o
CC drivers/gpu/drm/i915/display/intel_dpt.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_encoder.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fbc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fdi.o
CC drivers/gpu/drm/i915/display/intel_dpt_common.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fifo_underrun.o
CC drivers/gpu/drm/i915/display/intel_drrs.o
CC drivers/gpu/drm/i915/display/intel_dsb.o
CC drivers/gpu/drm/i915/display/intel_dsb_buffer.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_frontbuffer.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_global_state.o
CC drivers/gpu/drm/i915/display/intel_fb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_gmbus.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp.o
CC drivers/gpu/drm/i915/display/intel_fb_bo.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp_gsc_message.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdmi.o
CC drivers/gpu/drm/i915/display/intel_fb_pin.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hti.o
CC drivers/gpu/drm/i915/display/intel_fbc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_link_bw.o
CC drivers/gpu/drm/i915/display/intel_fdi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_lspcon.o
CC drivers/gpu/drm/i915/display/intel_fifo_underrun.o
CC drivers/gpu/drm/i915/display/intel_frontbuffer.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_lock.o
CC drivers/gpu/drm/i915/display/intel_global_state.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_setup.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_verify.o
CC drivers/gpu/drm/i915/display/intel_hdcp.o
CC drivers/gpu/drm/i915/display/intel_hdcp_gsc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_panel.o
CC drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.o
CC drivers/gpu/drm/i915/display/intel_hotplug.o
CC drivers/gpu/drm/i915/display/intel_hotplug_irq.o
CC drivers/gpu/drm/i915/display/intel_hti.o
CC drivers/gpu/drm/i915/display/intel_link_bw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pfit.o
CC drivers/gpu/drm/i915/display/intel_load_detect.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pmdemand.o
CC drivers/gpu/drm/i915/display/intel_lpe_audio.o
CC drivers/gpu/drm/i915/display/intel_modeset_lock.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pps.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_psr.o
CC drivers/gpu/drm/i915/display/intel_modeset_setup.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_qp_tables.o
CC drivers/gpu/drm/i915/display/intel_modeset_verify.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_quirks.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_hdmi_pll.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_tc.o
CC drivers/gpu/drm/i915/display/intel_overlay.o
CC drivers/gpu/drm/i915/display/intel_pch_display.o
CC drivers/gpu/drm/i915/display/intel_pch_refclk.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vblank.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vdsc.o
CC drivers/gpu/drm/i915/display/intel_plane_initial.o
CC drivers/gpu/drm/i915/display/intel_pmdemand.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vga.o
CC drivers/gpu/drm/i915/display/intel_psr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vrr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_wm.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_scaler.o
CC drivers/gpu/drm/i915/display/intel_quirks.o
CC drivers/gpu/drm/i915/display/intel_sprite.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_universal_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_watermark.o
CC drivers/gpu/drm/i915/display/intel_sprite_uapi.o
CC drivers/gpu/drm/i915/display/intel_tc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_acpi.o
CC drivers/gpu/drm/i915/display/intel_vblank.o
CC drivers/gpu/drm/i915/display/intel_vga.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_opregion.o
CC drivers/gpu/drm/i915/display/intel_wm.o
CC drivers/gpu/drm/i915/display/skl_scaler.o
CC drivers/gpu/drm/i915/display/skl_universal_plane.o
CC [M] drivers/gpu/drm/xe/xe_debugfs.o
CC drivers/gpu/drm/i915/display/skl_watermark.o
CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf_debugfs.o
CC drivers/gpu/drm/i915/display/intel_acpi.o
CC drivers/gpu/drm/i915/display/intel_opregion.o
CC [M] drivers/gpu/drm/xe/xe_gt_stats.o
CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o
CC drivers/gpu/drm/i915/display/intel_display_debugfs.o
CC drivers/gpu/drm/i915/display/intel_display_debugfs_params.o
CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs.o
CC drivers/gpu/drm/i915/display/intel_pipe_crc.o
CC drivers/gpu/drm/i915/display/dvo_ch7017.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs_params.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pipe_crc.o
CC drivers/gpu/drm/i915/display/dvo_ch7xxx.o
CC drivers/gpu/drm/i915/display/dvo_ivch.o
CC drivers/gpu/drm/i915/display/dvo_ns2501.o
CC drivers/gpu/drm/i915/display/dvo_sil164.o
CC drivers/gpu/drm/i915/display/dvo_tfp410.o
CC drivers/gpu/drm/i915/display/g4x_dp.o
CC drivers/gpu/drm/i915/display/g4x_hdmi.o
CC drivers/gpu/drm/i915/display/icl_dsi.o
CC drivers/gpu/drm/i915/display/intel_backlight.o
CC drivers/gpu/drm/i915/display/intel_crt.o
CC drivers/gpu/drm/i915/display/intel_cx0_phy.o
CC drivers/gpu/drm/i915/display/intel_ddi.o
CC drivers/gpu/drm/i915/display/intel_ddi_buf_trans.o
CC drivers/gpu/drm/i915/display/intel_display_device.o
CC drivers/gpu/drm/i915/display/intel_display_trace.o
CC drivers/gpu/drm/i915/display/intel_dkl_phy.o
CC drivers/gpu/drm/i915/display/intel_dp.o
CC drivers/gpu/drm/i915/display/intel_dp_aux.o
CC drivers/gpu/drm/i915/display/intel_dp_aux_backlight.o
CC drivers/gpu/drm/i915/display/intel_dp_hdcp.o
CC drivers/gpu/drm/i915/display/intel_dp_link_training.o
CC drivers/gpu/drm/i915/display/intel_dp_mst.o
CC drivers/gpu/drm/i915/display/intel_dp_test.o
CC drivers/gpu/drm/i915/display/intel_dsi.o
CC drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.o
CC drivers/gpu/drm/i915/display/intel_dsi_vbt.o
CC drivers/gpu/drm/i915/display/intel_dvo.o
CC drivers/gpu/drm/i915/display/intel_encoder.o
CC drivers/gpu/drm/i915/display/intel_gmbus.o
CC drivers/gpu/drm/i915/display/intel_hdmi.o
CC drivers/gpu/drm/i915/display/intel_lspcon.o
CC drivers/gpu/drm/i915/display/intel_lvds.o
CC drivers/gpu/drm/i915/display/intel_panel.o
CC drivers/gpu/drm/i915/display/intel_pfit.o
CC drivers/gpu/drm/i915/display/intel_pps.o
CC drivers/gpu/drm/i915/display/intel_qp_tables.o
CC drivers/gpu/drm/i915/display/intel_sdvo.o
CC drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.o
CC drivers/gpu/drm/i915/display/intel_snps_phy.o
CC drivers/gpu/drm/i915/display/intel_tv.o
CC drivers/gpu/drm/i915/display/intel_vdsc.o
CC drivers/gpu/drm/i915/display/intel_vrr.o
CC drivers/gpu/drm/i915/display/vlv_dsi.o
CC drivers/gpu/drm/i915/display/vlv_dsi_pll.o
CC drivers/gpu/drm/i915/i915_perf.o
CC drivers/gpu/drm/i915/pxp/intel_pxp.o
CC drivers/gpu/drm/i915/pxp/intel_pxp_huc.o
CC drivers/gpu/drm/i915/pxp/intel_pxp_tee.o
CC drivers/gpu/drm/i915/i915_gpu_error.o
CC drivers/gpu/drm/i915/i915_vgpu.o
LD [M] drivers/gpu/drm/xe/xe.o
AR drivers/gpu/drm/i915/built-in.a
AR drivers/gpu/drm/built-in.a
AR drivers/gpu/built-in.a
AR drivers/built-in.a
AR built-in.a
AR vmlinux.a
LD vmlinux.o
OBJCOPY modules.builtin.modinfo
GEN modules.builtin
MODPOST Module.symvers
CC .vmlinux.export.o
CC [M] fs/efivarfs/efivarfs.mod.o
CC [M] .module-common.o
CC [M] drivers/gpu/drm/drm_exec.mod.o
CC [M] drivers/gpu/drm/drm_gpuvm.mod.o
CC [M] drivers/gpu/drm/drm_suballoc_helper.mod.o
CC [M] drivers/gpu/drm/drm_ttm_helper.mod.o
CC [M] drivers/gpu/drm/scheduler/gpu-sched.mod.o
CC [M] drivers/gpu/drm/xe/xe.mod.o
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.mod.o
CC [M] net/netfilter/nf_log_syslog.mod.o
CC [M] net/netfilter/xt_mark.mod.o
CC [M] net/netfilter/xt_nat.mod.o
CC [M] net/netfilter/xt_LOG.mod.o
CC [M] net/netfilter/xt_MASQUERADE.mod.o
CC [M] net/netfilter/xt_addrtype.mod.o
CC [M] net/ipv4/netfilter/iptable_nat.mod.o
LD [M] drivers/gpu/drm/drm_suballoc_helper.ko
LD [M] fs/efivarfs/efivarfs.ko
LD [M] drivers/gpu/drm/scheduler/gpu-sched.ko
LD [M] net/netfilter/nf_log_syslog.ko
LD [M] drivers/gpu/drm/drm_gpuvm.ko
LD [M] net/netfilter/xt_mark.ko
LD [M] drivers/gpu/drm/drm_exec.ko
LD [M] drivers/gpu/drm/drm_ttm_helper.ko
LD [M] net/netfilter/xt_MASQUERADE.ko
LD [M] net/netfilter/xt_addrtype.ko
LD [M] net/ipv4/netfilter/iptable_nat.ko
LD [M] net/netfilter/xt_nat.ko
LD [M] net/netfilter/xt_LOG.ko
LD [M] drivers/gpu/drm/xe/xe.ko
LD [M] drivers/thermal/intel/x86_pkg_temp_thermal.ko
UPD include/generated/utsversion.h
CC init/version-timestamp.o
KSYMS .tmp_vmlinux0.kallsyms.S
AS .tmp_vmlinux0.kallsyms.o
LD .tmp_vmlinux1
NM .tmp_vmlinux1.syms
KSYMS .tmp_vmlinux1.kallsyms.S
AS .tmp_vmlinux1.kallsyms.o
LD .tmp_vmlinux2
NM .tmp_vmlinux2.syms
KSYMS .tmp_vmlinux2.kallsyms.S
AS .tmp_vmlinux2.kallsyms.o
LD vmlinux
NM System.map
SORTTAB vmlinux
RELOCS arch/x86/boot/compressed/vmlinux.relocs
RSTRIP vmlinux
CC arch/x86/boot/a20.o
AS arch/x86/boot/bioscall.o
CC arch/x86/boot/cmdline.o
AS arch/x86/boot/copy.o
HOSTCC arch/x86/boot/mkcpustr
CC arch/x86/boot/cpuflags.o
CC arch/x86/boot/cpucheck.o
CC arch/x86/boot/early_serial_console.o
CC arch/x86/boot/edd.o
CC arch/x86/boot/main.o
CC arch/x86/boot/memory.o
CC arch/x86/boot/pm.o
AS arch/x86/boot/pmjump.o
CC arch/x86/boot/printf.o
CC arch/x86/boot/regs.o
CC arch/x86/boot/string.o
CC arch/x86/boot/tty.o
CC arch/x86/boot/video.o
CC arch/x86/boot/video-mode.o
CC arch/x86/boot/version.o
CC arch/x86/boot/video-vga.o
CC arch/x86/boot/video-vesa.o
CC arch/x86/boot/video-bios.o
HOSTCC arch/x86/boot/tools/build
CPUSTR arch/x86/boot/cpustr.h
CC arch/x86/boot/cpu.o
LDS arch/x86/boot/compressed/vmlinux.lds
AS arch/x86/boot/compressed/kernel_info.o
AS arch/x86/boot/compressed/head_32.o
VOFFSET arch/x86/boot/compressed/../voffset.h
CC arch/x86/boot/compressed/string.o
CC arch/x86/boot/compressed/cmdline.o
CC arch/x86/boot/compressed/error.o
OBJCOPY arch/x86/boot/compressed/vmlinux.bin
HOSTCC arch/x86/boot/compressed/mkpiggy
CC arch/x86/boot/compressed/cpuflags.o
CC arch/x86/boot/compressed/early_serial_console.o
CC arch/x86/boot/compressed/kaslr.o
CC arch/x86/boot/compressed/acpi.o
CC arch/x86/boot/compressed/efi.o
GZIP arch/x86/boot/compressed/vmlinux.bin.gz
CC arch/x86/boot/compressed/misc.o
MKPIGGY arch/x86/boot/compressed/piggy.S
AS arch/x86/boot/compressed/piggy.o
LD arch/x86/boot/compressed/vmlinux
ZOFFSET arch/x86/boot/zoffset.h
OBJCOPY arch/x86/boot/vmlinux.bin
AS arch/x86/boot/header.o
LD arch/x86/boot/setup.elf
OBJCOPY arch/x86/boot/setup.bin
BUILD arch/x86/boot/bzImage
Kernel: arch/x86/boot/bzImage is ready (#1)
run-parts: executing /workspace/ci/hooks/20-kernel-doc
+ SRC_DIR=/workspace/kernel
+ cd /workspace/kernel
+ find drivers/gpu/drm/xe/ -name '*.[ch]' -not -path 'drivers/gpu/drm/xe/display/*'
+ xargs ./scripts/kernel-doc -Werror -none include/uapi/drm/xe_drm.h
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c:1988: warning: expecting prototype for xe_gt_sriov_pf_engine_stats(). Prototype was for xe_gt_sriov_pf_config_engine_stats() instead
1 warnings as Errors
run-parts: /workspace/ci/hooks/20-kernel-doc exited with return code 123
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✓ CI.checksparse: success for PMU support for engine activity
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (12 preceding siblings ...)
2025-02-06 11:01 ` ✗ CI.Hooks: failure " Patchwork
@ 2025-02-06 11:02 ` Patchwork
2025-02-06 11:28 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-02-06 12:36 ` ✗ Xe.CI.Full: " Patchwork
15 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-06 11:02 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
== Series Details ==
Series: PMU support for engine activity
URL : https://patchwork.freedesktop.org/series/144408/
State : success
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast cc0ddf9cae27ac39b4c0e69872e6a9412cb673f7
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
Okay!
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 8/8] drm/xe/pf: Enable per-function engine activity stats
2025-02-06 10:43 ` [PATCH v5 8/8] drm/xe/pf: Enable " Riana Tauro
@ 2025-02-06 11:20 ` Riana Tauro
2025-02-06 19:29 ` Michal Wajdeczko
1 sibling, 0 replies; 39+ messages in thread
From: Riana Tauro @ 2025-02-06 11:20 UTC (permalink / raw)
To: intel-xe
On 2/6/2025 4:13 PM, Riana Tauro wrote:
> Enable per-function engine activity stats when
> sriov_numvfs are set and disable when sriov_numvfs
> are set to 0.
>
> Also restart engine stats when VF's are reprovisioned
>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 26 ++++++++++++++++++++--
> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h | 1 +
> drivers/gpu/drm/xe/xe_pci_sriov.c | 25 +++++++++++++++++++++
> 3 files changed, 50 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> index b1d994d65589..25855dcb6e42 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> @@ -23,6 +23,7 @@
> #include "xe_guc_buf.h"
> #include "xe_guc_ct.h"
> #include "xe_guc_db_mgr.h"
> +#include "xe_guc_engine_activity.h"
> #include "xe_guc_fwif.h"
> #include "xe_guc_id_mgr.h"
> #include "xe_guc_klv_helpers.h"
> @@ -1972,6 +1973,21 @@ static void pf_reset_config_thresholds(struct xe_gt *gt, struct xe_gt_sriov_conf
> #undef reset_threshold_config
> }
>
> +/**
> + * xe_gt_sriov_pf_engine_stats - Enable/Disable engine stats for PF and VFs
Mismatch in doc and function name. will fix in new rev
> + * @gt: the &xe_gt
> + * @num_vfs: number of VFs to enable
> + * @enable: enable/disable
> + *
> + * Enable or disable engine stats for PF and VF
> + *
> + * Return: 0 on success, negative error code otherwise
> + */
> +int xe_gt_sriov_pf_config_engine_stats(struct xe_gt *gt, unsigned int num_vfs, bool enable)
> +{
> + return xe_guc_engine_activity_function_stats(>->uc.guc, num_vfs, enable);
> +}
> +
> static void pf_release_vf_config(struct xe_gt *gt, unsigned int vfid)
> {
> struct xe_gt_sriov_config *config = pf_pick_vf_config(gt, vfid);
> @@ -2362,8 +2378,10 @@ int xe_gt_sriov_pf_config_restore(struct xe_gt *gt, unsigned int vfid,
> */
> void xe_gt_sriov_pf_config_restart(struct xe_gt *gt)
> {
> - unsigned int n, total_vfs = xe_sriov_pf_get_totalvfs(gt_to_xe(gt));
> - unsigned int fail = 0, skip = 0;
> + struct xe_device *xe = gt_to_xe(gt);
> + unsigned int n, total_vfs = xe_sriov_pf_get_totalvfs(xe);
> + u16 num_vfs = pci_num_vf(to_pci_dev(xe->drm.dev));
> + unsigned int fail = 0, skip = 0, ret = 0;
>
> for (n = 1; n <= total_vfs; n++) {
> if (xe_gt_sriov_pf_config_is_empty(gt, n))
> @@ -2372,6 +2390,10 @@ void xe_gt_sriov_pf_config_restart(struct xe_gt *gt)
> fail++;
> }
>
> + ret = xe_gt_sriov_pf_config_engine_stats(gt, num_vfs, true);
> + if (ret)
> + xe_gt_sriov_dbg(gt, "Failed to enable engine stats for PF and VF's %d\n",
> + ret);
> if (fail)
> xe_gt_sriov_notice(gt, "Failed to push %u of %u VF%s configurations\n",
> fail, total_vfs - skip, str_plural(total_vfs));
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h
> index f894e9d4abba..a5585b178e6b 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h
> @@ -62,6 +62,7 @@ int xe_gt_sriov_pf_config_restore(struct xe_gt *gt, unsigned int vfid,
> const void *buf, size_t size);
>
> bool xe_gt_sriov_pf_config_is_empty(struct xe_gt *gt, unsigned int vfid);
> +int xe_gt_sriov_pf_config_engine_stats(struct xe_gt *gt, unsigned int num_vfs, bool enable);
>
> void xe_gt_sriov_pf_config_restart(struct xe_gt *gt);
>
> diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c
> index aaceee748287..612e64efb43c 100644
> --- a/drivers/gpu/drm/xe/xe_pci_sriov.c
> +++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
> @@ -62,6 +62,21 @@ static void pf_reset_vfs(struct xe_device *xe, unsigned int num_vfs)
> xe_gt_sriov_pf_control_trigger_flr(gt, n);
> }
>
> +static int pf_engine_activity_stats(struct xe_device *xe, unsigned int num_vfs, bool enable)
> +{
> + struct xe_gt *gt;
> + unsigned int id;
> + int ret = 0;
> +
> + for_each_gt(gt, xe, id) {
> + ret = xe_gt_sriov_pf_config_engine_stats(gt, num_vfs, enable);
> + if (ret)
> + return ret;
> + }
> +
> + return ret;
> +}
> +
> static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
> {
> struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> @@ -94,6 +109,11 @@ static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
>
> xe_sriov_info(xe, "Enabled %u of %u VF%s\n",
> num_vfs, total_vfs, str_plural(total_vfs));
> +
> + err = pf_engine_activity_stats(xe, num_vfs, true);
> + if (err < 0)
> + xe_sriov_warn(xe, "Failed to enable function activity stats\n");
> +
> return num_vfs;
>
> failed:
> @@ -110,6 +130,7 @@ static int pf_disable_vfs(struct xe_device *xe)
> struct device *dev = xe->drm.dev;
> struct pci_dev *pdev = to_pci_dev(dev);
> u16 num_vfs = pci_num_vf(pdev);
> + int err;
>
> xe_assert(xe, IS_SRIOV_PF(xe));
> xe_sriov_dbg(xe, "disabling %u VF%s\n", num_vfs, str_plural(num_vfs));
> @@ -117,6 +138,10 @@ static int pf_disable_vfs(struct xe_device *xe)
> if (!num_vfs)
> return 0;
>
> + err = pf_engine_activity_stats(xe, num_vfs, false);
> + if (err < 0)
> + xe_sriov_warn(xe, "Failed to disable function activity stats\n");
> +
> pci_disable_sriov(pdev);
>
> pf_reset_vfs(xe, num_vfs);
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✗ Xe.CI.BAT: failure for PMU support for engine activity
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (13 preceding siblings ...)
2025-02-06 11:02 ` ✓ CI.checksparse: success " Patchwork
@ 2025-02-06 11:28 ` Patchwork
2025-02-06 12:36 ` ✗ Xe.CI.Full: " Patchwork
15 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-06 11:28 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 3712 bytes --]
== Series Details ==
Series: PMU support for engine activity
URL : https://patchwork.freedesktop.org/series/144408/
State : failure
== Summary ==
CI Bug Log - changes from xe-2607-7a632b6798b6a05b63725249e3209afea13ea499_BAT -> xe-pw-144408v1_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-144408v1_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-144408v1_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (9 -> 8)
------------------------------
Missing (1): bat-adlp-vm
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-144408v1_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@core_hotunplug@unbind-rebind:
- bat-atsm-2: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/bat-atsm-2/igt@core_hotunplug@unbind-rebind.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/bat-atsm-2/igt@core_hotunplug@unbind-rebind.html
* igt@xe_module_load@load:
- bat-pvc-2: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/bat-pvc-2/igt@xe_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/bat-pvc-2/igt@xe_module_load@load.html
Known issues
------------
Here are the changes found in xe-pw-144408v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_exec_basic@twice-rebind:
- bat-adlp-vf: [PASS][5] -> [DMESG-WARN][6] ([Intel XE#3970])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/bat-adlp-vf/igt@xe_exec_basic@twice-rebind.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/bat-adlp-vf/igt@xe_exec_basic@twice-rebind.html
* igt@xe_live_ktest@xe_migrate:
- bat-adlp-vf: [PASS][7] -> [SKIP][8] ([Intel XE#1192]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/bat-adlp-vf/igt@xe_live_ktest@xe_migrate.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/bat-adlp-vf/igt@xe_live_ktest@xe_migrate.html
#### Warnings ####
* igt@xe_live_ktest@xe_bo:
- bat-adlp-vf: [SKIP][9] ([Intel XE#2229] / [Intel XE#455]) -> [SKIP][10] ([Intel XE#1192])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/bat-adlp-vf/igt@xe_live_ktest@xe_bo.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/bat-adlp-vf/igt@xe_live_ktest@xe_bo.html
[Intel XE#1192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1192
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
Build changes
-------------
* Linux: xe-2607-7a632b6798b6a05b63725249e3209afea13ea499 -> xe-pw-144408v1
IGT_8224: c659b986ba648584d36b3cfece897bc84a33dcbb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-2607-7a632b6798b6a05b63725249e3209afea13ea499: 7a632b6798b6a05b63725249e3209afea13ea499
xe-pw-144408v1: 144408v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/index.html
[-- Attachment #2: Type: text/html, Size: 4476 bytes --]
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✗ Xe.CI.Full: failure for PMU support for engine activity
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
` (14 preceding siblings ...)
2025-02-06 11:28 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2025-02-06 12:36 ` Patchwork
15 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-06 12:36 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 100998 bytes --]
== Series Details ==
Series: PMU support for engine activity
URL : https://patchwork.freedesktop.org/series/144408/
State : failure
== Summary ==
CI Bug Log - changes from xe-2607-7a632b6798b6a05b63725249e3209afea13ea499_full -> xe-pw-144408v1_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-144408v1_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-144408v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-144408v1_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@wf_vblank-ts-check@c-hdmi-a1:
- shard-adlp: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-adlp-3/igt@kms_flip@wf_vblank-ts-check@c-hdmi-a1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-adlp-8/igt@kms_flip@wf_vblank-ts-check@c-hdmi-a1.html
* igt@xe_module_load@reload:
- shard-dg2-set2: [PASS][3] -> [FAIL][4] +2 other tests fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@xe_module_load@reload.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_module_load@reload.html
* igt@xe_module_load@unload:
- shard-adlp: [PASS][5] -> [ABORT][6] +2 other tests abort
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-adlp-2/igt@xe_module_load@unload.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-adlp-4/igt@xe_module_load@unload.html
Known issues
------------
Here are the changes found in xe-pw-144408v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@info:
- shard-dg2-set2: [PASS][7] -> [SKIP][8] ([Intel XE#2134])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@fbdev@info.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@fbdev@info.html
* igt@kms_atomic_interruptible@legacy-setmode@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [DMESG-WARN][9] ([Intel XE#4172]) +16 other tests dmesg-warn
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-4/igt@kms_atomic_interruptible@legacy-setmode@pipe-a-dp-2.html
* igt@kms_atomic_interruptible@legacy-setmode@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][10] ([Intel XE#1033]) +13 other tests dmesg-warn
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_atomic_interruptible@legacy-setmode@pipe-a-hdmi-a-6.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-0:
- shard-bmg: [PASS][11] -> [INCOMPLETE][12] ([Intel XE#3225])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-6/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-2/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
- shard-dg2-set2: [PASS][13] -> [SKIP][14] ([Intel XE#2351] / [Intel XE#4208]) +14 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@linear-16bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2327])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-1/igt@kms_big_fb@linear-16bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#1124]) +2 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-dg2-set2: NOTRUN -> [SKIP][17] ([Intel XE#1124]) +1 other test skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][18] ([Intel XE#2191]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-2-displays-2560x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][19] ([Intel XE#367])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-4-displays-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#367])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][21] ([Intel XE#787]) +104 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-6.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2887]) +4 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-1/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][23] ([Intel XE#2907])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][24] ([Intel XE#455] / [Intel XE#787]) +18 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4.html
* igt@kms_chamelium_color@ctm-blue-to-red:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2325])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_chamelium_color@ctm-blue-to-red.html
* igt@kms_chamelium_color@degamma:
- shard-dg2-set2: NOTRUN -> [SKIP][26] ([Intel XE#306])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-435/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_hpd@dp-hpd:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2252]) +2 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_chamelium_hpd@dp-hpd.html
* igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe:
- shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#373]) +4 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html
* igt@kms_chamelium_hpd@vga-hpd:
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#4208] / [i915#2575]) +36 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_chamelium_hpd@vga-hpd.html
* igt@kms_content_protection@atomic@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][30] ([Intel XE#1178]) +2 other tests fail
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_content_protection@atomic@pipe-a-dp-2.html
* igt@kms_content_protection@legacy@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][31] ([Intel XE#1178]) +1 other test fail
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_content_protection@legacy@pipe-a-dp-4.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-dg2-set2: NOTRUN -> [SKIP][32] ([Intel XE#308]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][33] ([Intel XE#3226])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-435/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
- shard-bmg: [PASS][34] -> [SKIP][35] ([Intel XE#2291]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-7/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-4/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
- shard-bmg: [PASS][36] -> [DMESG-WARN][37] ([Intel XE#877])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-dg2-set2: NOTRUN -> [SKIP][38] ([Intel XE#323])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][39] ([i915#3804])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#776])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-bmg: [PASS][41] -> [SKIP][42] ([Intel XE#2316]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-7/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-4/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ad-dp2-hdmi-a3:
- shard-bmg: [PASS][43] -> [FAIL][44] ([Intel XE#3321]) +3 other tests fail
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank@ad-dp2-hdmi-a3.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_flip@2x-flip-vs-expired-vblank@ad-dp2-hdmi-a3.html
* igt@kms_flip@busy-flip:
- shard-dg2-set2: [PASS][45] -> [SKIP][46] ([Intel XE#4208] / [i915#2575]) +114 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-435/igt@kms_flip@busy-flip.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_flip@busy-flip.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@d-dp4:
- shard-dg2-set2: [PASS][47] -> [FAIL][48] ([Intel XE#301]) +1 other test fail
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-434/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-dp4.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-dp4.html
* igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a3:
- shard-bmg: NOTRUN -> [FAIL][49] ([Intel XE#3321]) +1 other test fail
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-6/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a3.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling:
- shard-dg2-set2: [PASS][50] -> [SKIP][51] ([Intel XE#4208]) +262 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling:
- shard-dg2-set2: NOTRUN -> [SKIP][52] ([Intel XE#2351] / [Intel XE#4208]) +11 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#2293] / [Intel XE#2380])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#2293])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-dg2-set2: NOTRUN -> [SKIP][55] ([Intel XE#455]) +6 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary:
- shard-dg2-set2: NOTRUN -> [SKIP][56] ([Intel XE#651]) +12 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#4141]) +1 other test skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc:
- shard-dg2-set2: [PASS][58] -> [DMESG-WARN][59] ([Intel XE#1033]) +3 other tests dmesg-warn
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-434/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-shrfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#2311]) +4 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][61] ([Intel XE#4208]) +85 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2313]) +2 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2-set2: NOTRUN -> [SKIP][63] ([Intel XE#653]) +17 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_plane_cursor@overlay:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][64] ([Intel XE#3966]) +1 other test incomplete
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_plane_cursor@overlay.html
* igt@kms_plane_lowres@tiling-y:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#2393])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format:
- shard-dg2-set2: NOTRUN -> [SKIP][66] ([Intel XE#2763] / [Intel XE#455]) +5 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b:
- shard-dg2-set2: NOTRUN -> [SKIP][67] ([Intel XE#2763]) +8 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b.html
* igt@kms_pm_backlight@basic-brightness:
- shard-dg2-set2: NOTRUN -> [SKIP][68] ([Intel XE#870])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_pm_dc@dc5-psr:
- shard-bmg: NOTRUN -> [SKIP][69] ([Intel XE#2392])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-1/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-dg2-set2: NOTRUN -> [SKIP][70] ([Intel XE#3309])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-bmg: NOTRUN -> [SKIP][71] ([Intel XE#1489]) +1 other test skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@pr-plane-move-sf-dmg-area:
- shard-dg2-set2: NOTRUN -> [SKIP][72] ([Intel XE#1489])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-dg2-set2: NOTRUN -> [SKIP][73] ([Intel XE#1122])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][74] ([Intel XE#2387])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-1/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@pr-sprite-render:
- shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_psr@pr-sprite-render.html
* igt@kms_psr@psr-primary-page-flip:
- shard-dg2-set2: NOTRUN -> [SKIP][76] ([Intel XE#2850] / [Intel XE#929]) +7 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-dg2-set2: NOTRUN -> [SKIP][77] ([Intel XE#2939])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
- shard-dg2-set2: NOTRUN -> [SKIP][78] ([Intel XE#3414]) +1 other test skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-set2: NOTRUN -> [FAIL][79] ([Intel XE#1729])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1:
- shard-lnl: [PASS][80] -> [FAIL][81] ([Intel XE#899]) +1 other test fail
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-lnl-1/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-lnl-8/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html
* igt@kms_vblank@ts-continuation-dpms-suspend:
- shard-adlp: [PASS][82] -> [DMESG-WARN][83] ([Intel XE#2953]) +1 other test dmesg-warn
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-adlp-8/igt@kms_vblank@ts-continuation-dpms-suspend.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-adlp-3/igt@kms_vblank@ts-continuation-dpms-suspend.html
* igt@kms_vrr@max-min:
- shard-bmg: NOTRUN -> [SKIP][84] ([Intel XE#1499])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_vrr@max-min.html
* igt@xe_ccs@block-copy-uncompressed-inc-dimension@xmajor-uncompressed-compfmt0-vram01-system-376x376:
- shard-bmg: [PASS][85] -> [DMESG-WARN][86] ([Intel XE#4172]) +21 other tests dmesg-warn
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-2/igt@xe_ccs@block-copy-uncompressed-inc-dimension@xmajor-uncompressed-compfmt0-vram01-system-376x376.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-8/igt@xe_ccs@block-copy-uncompressed-inc-dimension@xmajor-uncompressed-compfmt0-vram01-system-376x376.html
* igt@xe_copy_basic@mem-set-linear-0x3fff:
- shard-dg2-set2: NOTRUN -> [SKIP][87] ([Intel XE#1126])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@xe_copy_basic@mem-set-linear-0x3fff.html
* igt@xe_eudebug@exec-queue-placements:
- shard-bmg: NOTRUN -> [SKIP][88] ([Intel XE#2905]) +2 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@xe_eudebug@exec-queue-placements.html
* igt@xe_eudebug_online@set-breakpoint:
- shard-dg2-set2: NOTRUN -> [SKIP][89] ([Intel XE#2905]) +3 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-435/igt@xe_eudebug_online@set-breakpoint.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#2322])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html
* igt@xe_exec_fault_mode@once-rebind-prefetch:
- shard-dg2-set2: NOTRUN -> [SKIP][91] ([Intel XE#288]) +6 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@xe_exec_fault_mode@once-rebind-prefetch.html
* igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit:
- shard-dg2-set2: NOTRUN -> [SKIP][92] ([Intel XE#2229] / [Intel XE#455])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- shard-dg2-set2: NOTRUN -> [SKIP][93] ([Intel XE#2229]) +1 other test skip
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_live_ktest@xe_dma_buf:
- shard-bmg: [PASS][94] -> [SKIP][95] ([Intel XE#1192]) +1 other test skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-5/igt@xe_live_ktest@xe_dma_buf.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-2/igt@xe_live_ktest@xe_dma_buf.html
* igt@xe_oa@syncs-ufence-wait:
- shard-dg2-set2: NOTRUN -> [SKIP][96] ([Intel XE#2541] / [Intel XE#3573]) +1 other test skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-435/igt@xe_oa@syncs-ufence-wait.html
* igt@xe_pat@pat-index-xehpc:
- shard-dg2-set2: NOTRUN -> [SKIP][97] ([Intel XE#2838] / [Intel XE#979])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pm@d3cold-basic-exec:
- shard-dg2-set2: NOTRUN -> [SKIP][98] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@xe_pm@d3cold-basic-exec.html
* igt@xe_pm@d3cold-mocs:
- shard-dg2-set2: NOTRUN -> [SKIP][99] ([Intel XE#2284])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@xe_pm@d3cold-mocs.html
* igt@xe_pm@s3-mocs:
- shard-bmg: [PASS][100] -> [DMESG-WARN][101] ([Intel XE#4172] / [Intel XE#569])
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-8/igt@xe_pm@s3-mocs.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-1/igt@xe_pm@s3-mocs.html
* igt@xe_pm@s4-exec-after:
- shard-bmg: NOTRUN -> [ABORT][102] ([Intel XE#1358] / [Intel XE#1607] / [Intel XE#4172])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@xe_pm@s4-exec-after.html
* igt@xe_query@multigpu-query-engines:
- shard-dg2-set2: NOTRUN -> [SKIP][103] ([Intel XE#944])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@xe_query@multigpu-query-engines.html
#### Possible fixes ####
* igt@fbdev@eof:
- shard-dg2-set2: [SKIP][104] ([Intel XE#2134]) -> [PASS][105] +2 other tests pass
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@fbdev@eof.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@fbdev@eof.html
* igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
- shard-bmg: [SKIP][106] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4:
- shard-dg2-set2: [INCOMPLETE][108] ([Intel XE#3862]) -> [PASS][109] +1 other test pass
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [INCOMPLETE][110] ([Intel XE#1727] / [Intel XE#3124] / [Intel XE#4010]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4:
- shard-dg2-set2: [DMESG-WARN][112] ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-d-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][114] ([Intel XE#3124] / [Intel XE#4010]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-d-hdmi-a-6.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-d-hdmi-a-6.html
* igt@kms_cursor_crc@cursor-random-64x64:
- shard-dg2-set2: [INCOMPLETE][116] -> [PASS][117] +1 other test pass
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_cursor_crc@cursor-random-64x64.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-434/igt@kms_cursor_crc@cursor-random-64x64.html
* igt@kms_cursor_legacy@cursora-vs-flipb-toggle:
- shard-bmg: [INCOMPLETE][118] ([Intel XE#3226]) -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-1/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-1/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-bmg: [SKIP][120] ([Intel XE#1340]) -> [PASS][121]
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-4/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_flip@2x-plain-flip:
- shard-bmg: [SKIP][122] ([Intel XE#2316]) -> [PASS][123] +4 other tests pass
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-6/igt@kms_flip@2x-plain-flip.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_flip@2x-plain-flip.html
* igt@kms_flip@flip-vs-expired-vblank@a-dp4:
- shard-dg2-set2: [FAIL][124] ([Intel XE#301] / [Intel XE#3321]) -> [PASS][125] +1 other test pass
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-435/igt@kms_flip@flip-vs-expired-vblank@a-dp4.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-435/igt@kms_flip@flip-vs-expired-vblank@a-dp4.html
* igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6:
- shard-dg2-set2: [FAIL][126] ([Intel XE#301]) -> [PASS][127] +2 other tests pass
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-435/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-435/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6.html
* igt@kms_flip@flip-vs-suspend@c-dp4:
- shard-dg2-set2: [INCOMPLETE][128] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][129]
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-435/igt@kms_flip@flip-vs-suspend@c-dp4.html
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-435/igt@kms_flip@flip-vs-suspend@c-dp4.html
* igt@kms_flip@wf_vblank-ts-check:
- shard-lnl: [FAIL][130] ([Intel XE#3149] / [Intel XE#886]) -> [PASS][131]
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-lnl-4/igt@kms_flip@wf_vblank-ts-check.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-lnl-8/igt@kms_flip@wf_vblank-ts-check.html
* igt@kms_flip@wf_vblank-ts-check@b-edp1:
- shard-lnl: [FAIL][132] ([Intel XE#886]) -> [PASS][133] +3 other tests pass
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-lnl-4/igt@kms_flip@wf_vblank-ts-check@b-edp1.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-lnl-8/igt@kms_flip@wf_vblank-ts-check@b-edp1.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
- shard-dg2-set2: [SKIP][134] ([Intel XE#2351] / [Intel XE#4208]) -> [PASS][135] +6 other tests pass
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation:
- shard-bmg: [DMESG-WARN][136] ([Intel XE#4172]) -> [PASS][137] +33 other tests pass
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-7/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-4/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation.html
* igt@kms_pm_rpm@i2c:
- shard-adlp: [DMESG-WARN][138] ([Intel XE#4173]) -> [PASS][139] +1 other test pass
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-adlp-4/igt@kms_pm_rpm@i2c.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-adlp-6/igt@kms_pm_rpm@i2c.html
* igt@kms_pm_rpm@legacy-planes:
- shard-adlp: [DMESG-WARN][140] ([Intel XE#2953]) -> [PASS][141]
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-adlp-3/igt@kms_pm_rpm@legacy-planes.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-adlp-9/igt@kms_pm_rpm@legacy-planes.html
* igt@kms_rotation_crc@sprite-rotation-180:
- shard-dg2-set2: [SKIP][142] ([Intel XE#4208] / [i915#2575]) -> [PASS][143] +58 other tests pass
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_rotation_crc@sprite-rotation-180.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_rotation_crc@sprite-rotation-180.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1:
- shard-lnl: [FAIL][144] ([Intel XE#899]) -> [PASS][145]
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-lnl-1/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-lnl-8/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html
* igt@xe_ccs@block-copy-uncompressed-inc-dimension@xmajor-uncompressed-compfmt0-vram01-system-421x421:
- shard-dg2-set2: [DMESG-WARN][146] ([Intel XE#1033]) -> [PASS][147] +2 other tests pass
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-434/igt@xe_ccs@block-copy-uncompressed-inc-dimension@xmajor-uncompressed-compfmt0-vram01-system-421x421.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@xe_ccs@block-copy-uncompressed-inc-dimension@xmajor-uncompressed-compfmt0-vram01-system-421x421.html
* igt@xe_exec_basic@many-null-rebind:
- shard-dg2-set2: [SKIP][148] ([Intel XE#4208]) -> [PASS][149] +138 other tests pass
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_exec_basic@many-null-rebind.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@xe_exec_basic@many-null-rebind.html
* igt@xe_module_load@many-reload:
- shard-dg2-set2: [FAIL][150] -> [PASS][151]
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_module_load@many-reload.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@xe_module_load@many-reload.html
* igt@xe_pm@s3-vm-bind-prefetch:
- shard-bmg: [DMESG-WARN][152] ([Intel XE#4172] / [Intel XE#569]) -> [PASS][153]
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-4/igt@xe_pm@s3-vm-bind-prefetch.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-6/igt@xe_pm@s3-vm-bind-prefetch.html
#### Warnings ####
* igt@fbdev@write:
- shard-dg2-set2: [DMESG-WARN][154] ([Intel XE#1033]) -> [SKIP][155] ([Intel XE#2134])
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@fbdev@write.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@fbdev@write.html
* igt@kms_async_flips@invalid-async-flip:
- shard-dg2-set2: [SKIP][156] ([Intel XE#4208] / [i915#2575]) -> [SKIP][157] ([Intel XE#873])
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_async_flips@invalid-async-flip.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_async_flips@invalid-async-flip.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-dg2-set2: [SKIP][158] ([Intel XE#316]) -> [SKIP][159] ([Intel XE#2351] / [Intel XE#4208])
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-270:
- shard-dg2-set2: [SKIP][160] ([Intel XE#4208]) -> [SKIP][161] ([Intel XE#316]) +2 other tests skip
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-270:
- shard-dg2-set2: [SKIP][162] ([Intel XE#316]) -> [SKIP][163] ([Intel XE#4208]) +2 other tests skip
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@linear-64bpp-rotate-180:
- shard-dg2-set2: [SKIP][164] ([Intel XE#2351] / [Intel XE#4208]) -> [DMESG-WARN][165] ([Intel XE#1033])
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_big_fb@linear-64bpp-rotate-180.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_big_fb@linear-64bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-270:
- shard-dg2-set2: [SKIP][166] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][167] ([Intel XE#1124])
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
- shard-dg2-set2: [SKIP][168] ([Intel XE#607]) -> [SKIP][169] ([Intel XE#2351] / [Intel XE#4208])
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-dg2-set2: [SKIP][170] ([Intel XE#610]) -> [SKIP][171] ([Intel XE#4208])
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
- shard-dg2-set2: [SKIP][172] ([Intel XE#1124]) -> [SKIP][173] ([Intel XE#2351] / [Intel XE#4208]) +5 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-434/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-dg2-set2: [SKIP][174] ([Intel XE#619]) -> [SKIP][175] ([Intel XE#2351] / [Intel XE#4208])
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_big_fb@yf-tiled-addfb.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-dg2-set2: [SKIP][176] ([Intel XE#607]) -> [SKIP][177] ([Intel XE#4208])
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-dg2-set2: [SKIP][178] ([Intel XE#4208]) -> [SKIP][179] ([Intel XE#610])
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
- shard-dg2-set2: [SKIP][180] ([Intel XE#4208]) -> [SKIP][181] ([Intel XE#1124]) +4 other tests skip
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-dg2-set2: [SKIP][182] ([Intel XE#1124]) -> [SKIP][183] ([Intel XE#4208]) +8 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
- shard-dg2-set2: [SKIP][184] ([Intel XE#2191]) -> [SKIP][185] ([Intel XE#4208] / [i915#2575]) +1 other test skip
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-2-displays-2160x1440p:
- shard-dg2-set2: [SKIP][186] ([Intel XE#4208] / [i915#2575]) -> [SKIP][187] ([Intel XE#367]) +1 other test skip
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-3-displays-3840x2160p:
- shard-dg2-set2: [SKIP][188] ([Intel XE#367]) -> [SKIP][189] ([Intel XE#4208] / [i915#2575]) +4 other tests skip
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_bw@linear-tiling-3-displays-3840x2160p.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_bw@linear-tiling-3-displays-3840x2160p.html
* igt@kms_ccs@bad-pixel-format-yf-tiled-ccs:
- shard-dg2-set2: [SKIP][190] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][191] ([Intel XE#4208]) +13 other tests skip
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs:
- shard-dg2-set2: [SKIP][192] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][193] ([Intel XE#455] / [Intel XE#787])
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [SKIP][194] ([Intel XE#4208]) -> [DMESG-WARN][195] ([Intel XE#1033]) +5 other tests dmesg-warn
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
- shard-dg2-set2: [SKIP][196] ([Intel XE#4208]) -> [SKIP][197] ([Intel XE#2907])
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc:
- shard-dg2-set2: [SKIP][198] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][199] ([Intel XE#2351] / [Intel XE#4208]) +5 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-dg2-set2: [SKIP][200] ([Intel XE#4208]) -> [SKIP][201] ([Intel XE#3442])
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs:
- shard-dg2-set2: [SKIP][202] ([Intel XE#4208]) -> [SKIP][203] ([Intel XE#455] / [Intel XE#787]) +9 other tests skip
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-dg2-set2: [SKIP][204] ([Intel XE#306]) -> [SKIP][205] ([Intel XE#4208] / [i915#2575]) +2 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_chamelium_color@ctm-0-50.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_color@ctm-max:
- shard-dg2-set2: [SKIP][206] ([Intel XE#4208] / [i915#2575]) -> [SKIP][207] ([Intel XE#306])
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_chamelium_color@ctm-max.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_chamelium_color@ctm-max.html
* igt@kms_chamelium_edid@dp-edid-change-during-suspend:
- shard-dg2-set2: [SKIP][208] ([Intel XE#373]) -> [SKIP][209] ([Intel XE#4208] / [i915#2575]) +12 other tests skip
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
* igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
- shard-dg2-set2: [SKIP][210] ([Intel XE#4208] / [i915#2575]) -> [SKIP][211] ([Intel XE#373]) +9 other tests skip
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
* igt@kms_content_protection@atomic:
- shard-bmg: [SKIP][212] ([Intel XE#2341]) -> [FAIL][213] ([Intel XE#1178])
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-6/igt@kms_content_protection@atomic.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-dg2-set2: [SKIP][214] ([Intel XE#307]) -> [SKIP][215] ([Intel XE#4208] / [i915#2575])
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_content_protection@dp-mst-lic-type-1.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@legacy:
- shard-dg2-set2: [SKIP][216] ([Intel XE#4208] / [i915#2575]) -> [FAIL][217] ([Intel XE#1178]) +1 other test fail
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_content_protection@legacy.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2-set2: [FAIL][218] ([Intel XE#1178]) -> [SKIP][219] ([Intel XE#4208] / [i915#2575])
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-435/igt@kms_content_protection@lic-type-0.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_content_protection@lic-type-0.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-dg2-set2: [SKIP][220] ([Intel XE#4208] / [i915#2575]) -> [SKIP][221] ([Intel XE#308])
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_cursor_crc@cursor-random-512x512.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-dg2-set2: [SKIP][222] ([Intel XE#308]) -> [SKIP][223] ([Intel XE#4208] / [i915#2575])
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_crc@cursor-sliding-128x128:
- shard-dg2-set2: [SKIP][224] ([Intel XE#4208] / [i915#2575]) -> [DMESG-WARN][225] ([Intel XE#1033]) +7 other tests dmesg-warn
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_cursor_crc@cursor-sliding-128x128.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_cursor_crc@cursor-sliding-128x128.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-dg2-set2: [SKIP][226] ([Intel XE#323]) -> [SKIP][227] ([Intel XE#4208] / [i915#2575])
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_fbcon_fbt@psr:
- shard-dg2-set2: [SKIP][228] ([Intel XE#776]) -> [SKIP][229] ([Intel XE#4208])
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_fbcon_fbt@psr.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_fbcon_fbt@psr.html
* igt@kms_feature_discovery@chamelium:
- shard-dg2-set2: [SKIP][230] ([Intel XE#4208] / [i915#2575]) -> [SKIP][231] ([Intel XE#701])
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_feature_discovery@chamelium.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@psr1:
- shard-dg2-set2: [SKIP][232] ([Intel XE#1135]) -> [SKIP][233] ([Intel XE#4208] / [i915#2575])
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_feature_discovery@psr1.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_feature_discovery@psr1.html
* igt@kms_flip@flip-vs-suspend:
- shard-dg2-set2: [INCOMPLETE][234] ([Intel XE#2049] / [Intel XE#2597]) -> [DMESG-WARN][235] ([Intel XE#2955])
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-435/igt@kms_flip@flip-vs-suspend.html
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-435/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-dg2-set2: [SKIP][236] ([Intel XE#4208] / [i915#2575]) -> [DMESG-WARN][237] ([Intel XE#2955])
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_flip@flip-vs-suspend-interruptible.html
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
- shard-dg2-set2: [SKIP][238] ([Intel XE#4208]) -> [SKIP][239] ([Intel XE#455]) +1 other test skip
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
- shard-dg2-set2: [SKIP][240] ([Intel XE#455]) -> [SKIP][241] ([Intel XE#2351] / [Intel XE#4208]) +2 other tests skip
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
- shard-dg2-set2: [SKIP][242] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][243] ([Intel XE#455]) +4 other tests skip
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling:
- shard-dg2-set2: [SKIP][244] ([Intel XE#455]) -> [SKIP][245] ([Intel XE#4208]) +4 other tests skip
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw:
- shard-bmg: [SKIP][246] ([Intel XE#2311]) -> [SKIP][247] ([Intel XE#2312]) +8 other tests skip
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff:
- shard-dg2-set2: [SKIP][248] ([Intel XE#4208]) -> [SKIP][249] ([Intel XE#651]) +14 other tests skip
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][250] ([Intel XE#2312]) -> [SKIP][251] ([Intel XE#2311]) +6 other tests skip
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-render.html
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
- shard-dg2-set2: [SKIP][252] ([Intel XE#651]) -> [SKIP][253] ([Intel XE#2351] / [Intel XE#4208]) +14 other tests skip
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-mmap-wc:
- shard-dg2-set2: [SKIP][254] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][255] ([Intel XE#651]) +9 other tests skip
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-mmap-wc.html
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][256] ([Intel XE#2312]) -> [SKIP][257] ([Intel XE#4141]) +3 other tests skip
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc.html
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-bmg: [SKIP][258] ([Intel XE#4141]) -> [SKIP][259] ([Intel XE#2312]) +4 other tests skip
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-tiling-y:
- shard-dg2-set2: [SKIP][260] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][261] ([Intel XE#658])
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte:
- shard-dg2-set2: [SKIP][262] ([Intel XE#651]) -> [SKIP][263] ([Intel XE#4208]) +29 other tests skip
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt:
- shard-bmg: [SKIP][264] ([Intel XE#2313]) -> [SKIP][265] ([Intel XE#2312]) +5 other tests skip
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt:
- shard-bmg: [SKIP][266] ([Intel XE#2312]) -> [SKIP][267] ([Intel XE#2313]) +4 other tests skip
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@plane-fbc-rte:
- shard-dg2-set2: [SKIP][268] ([Intel XE#1158]) -> [SKIP][269] ([Intel XE#4208])
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-435/igt@kms_frontbuffer_tracking@plane-fbc-rte.html
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_frontbuffer_tracking@plane-fbc-rte.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt:
- shard-dg2-set2: [SKIP][270] ([Intel XE#4208]) -> [SKIP][271] ([Intel XE#653]) +16 other tests skip
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2-set2: [SKIP][272] ([Intel XE#653]) -> [SKIP][273] ([Intel XE#4208]) +24 other tests skip
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-wc.html
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt:
- shard-dg2-set2: [SKIP][274] ([Intel XE#653]) -> [SKIP][275] ([Intel XE#2351] / [Intel XE#4208]) +15 other tests skip
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-render:
- shard-dg2-set2: [SKIP][276] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][277] ([Intel XE#653]) +4 other tests skip
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-render.html
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_joiner@basic-big-joiner:
- shard-dg2-set2: [SKIP][278] ([Intel XE#346]) -> [SKIP][279] ([Intel XE#4208])
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_joiner@basic-big-joiner.html
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-dg2-set2: [SKIP][280] ([Intel XE#4208]) -> [SKIP][281] ([Intel XE#346])
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_joiner@invalid-modeset-big-joiner.html
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-ultra-joiner:
- shard-dg2-set2: [SKIP][282] ([Intel XE#2925]) -> [SKIP][283] ([Intel XE#4208])
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-dg2-set2: [SKIP][284] ([Intel XE#4208] / [i915#2575]) -> [SKIP][285] ([Intel XE#356])
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_panel_fitting@legacy:
- shard-dg2-set2: [SKIP][286] ([Intel XE#4208] / [i915#2575]) -> [SKIP][287] ([Intel XE#455]) +7 other tests skip
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_panel_fitting@legacy.html
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_panel_fitting@legacy.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-dg2-set2: [DMESG-WARN][288] ([Intel XE#4212]) -> [SKIP][289] ([Intel XE#4208] / [i915#2575])
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@kms_plane_scaling@intel-max-src-size.html
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25:
- shard-dg2-set2: [SKIP][290] ([Intel XE#2763] / [Intel XE#455]) -> [SKIP][291] ([Intel XE#4208] / [i915#2575])
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25.html
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-dg2-set2: [SKIP][292] ([Intel XE#4208]) -> [SKIP][293] ([Intel XE#2938])
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_pm_backlight@brightness-with-dpms.html
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_backlight@fade:
- shard-dg2-set2: [SKIP][294] ([Intel XE#4208]) -> [SKIP][295] ([Intel XE#870])
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_pm_backlight@fade.html
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_pm_backlight@fade.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-dg2-set2: [SKIP][296] ([Intel XE#870]) -> [SKIP][297] ([Intel XE#4208])
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-434/igt@kms_pm_backlight@fade-with-dpms.html
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_dc@dc6-psr:
- shard-dg2-set2: [SKIP][298] ([Intel XE#1129]) -> [SKIP][299] ([Intel XE#2351] / [Intel XE#4208])
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_pm_dc@dc6-psr.html
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_pm_dc@dc6-psr.html
* igt@kms_pm_dc@dc9-dpms:
- shard-adlp: [FAIL][300] ([Intel XE#3325]) -> [SKIP][301] ([Intel XE#734])
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-adlp-8/igt@kms_pm_dc@dc9-dpms.html
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-adlp-3/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
- shard-dg2-set2: [SKIP][302] ([Intel XE#1489]) -> [SKIP][303] ([Intel XE#4208]) +11 other tests skip
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-dg2-set2: [SKIP][304] ([Intel XE#4208]) -> [SKIP][305] ([Intel XE#1489]) +7 other tests skip
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-dg2-set2: [SKIP][306] ([Intel XE#4208]) -> [SKIP][307] ([Intel XE#1122])
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_psr2_su@page_flip-nv12.html
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@fbc-pr-cursor-plane-move:
- shard-dg2-set2: [SKIP][308] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][309] ([Intel XE#4208]) +19 other tests skip
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_psr@fbc-pr-cursor-plane-move.html
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_psr@fbc-pr-cursor-plane-move.html
* igt@kms_psr@fbc-psr-sprite-plane-onoff:
- shard-dg2-set2: [SKIP][310] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][311] ([Intel XE#2351] / [Intel XE#4208]) +3 other tests skip
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-435/igt@kms_psr@fbc-psr-sprite-plane-onoff.html
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_psr@fbc-psr-sprite-plane-onoff.html
* igt@kms_psr@fbc-psr2-sprite-plane-onoff:
- shard-dg2-set2: [SKIP][312] ([Intel XE#4208]) -> [SKIP][313] ([Intel XE#2850] / [Intel XE#929]) +5 other tests skip
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html
* igt@kms_psr@pr-sprite-render:
- shard-dg2-set2: [SKIP][314] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][315] ([Intel XE#2850] / [Intel XE#929]) +5 other tests skip
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_psr@pr-sprite-render.html
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_psr@pr-sprite-render.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-dg2-set2: [SKIP][316] ([Intel XE#4208] / [i915#2575]) -> [SKIP][317] ([Intel XE#3414])
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_rotation_crc@bad-pixel-format.html
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-dg2-set2: [SKIP][318] ([Intel XE#4208] / [i915#2575]) -> [SKIP][319] ([Intel XE#1127])
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-dg2-set2: [SKIP][320] ([Intel XE#1127]) -> [SKIP][321] ([Intel XE#4208] / [i915#2575])
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-dg2-set2: [SKIP][322] ([Intel XE#3414]) -> [SKIP][323] ([Intel XE#4208] / [i915#2575])
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-dg2-set2: [SKIP][324] ([Intel XE#1500]) -> [SKIP][325] ([Intel XE#4208] / [i915#2575])
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vblank@query-busy-hang:
- shard-dg2-set2: [DMESG-WARN][326] ([Intel XE#1033]) -> [SKIP][327] ([Intel XE#4208] / [i915#2575]) +6 other tests skip
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@kms_vblank@query-busy-hang.html
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_vblank@query-busy-hang.html
* igt@kms_vrr@flip-dpms:
- shard-dg2-set2: [SKIP][328] ([Intel XE#455]) -> [SKIP][329] ([Intel XE#4208] / [i915#2575]) +10 other tests skip
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@kms_vrr@flip-dpms.html
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_vrr@flip-dpms.html
* igt@kms_vrr@lobf:
- shard-dg2-set2: [SKIP][330] ([Intel XE#2168]) -> [SKIP][331] ([Intel XE#4208] / [i915#2575]) +1 other test skip
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-435/igt@kms_vrr@lobf.html
[331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@kms_vrr@lobf.html
* igt@kms_writeback@writeback-check-output:
- shard-dg2-set2: [SKIP][332] ([Intel XE#4208] / [i915#2575]) -> [SKIP][333] ([Intel XE#756])
[332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@kms_writeback@writeback-check-output.html
[333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@kms_writeback@writeback-check-output.html
* igt@testdisplay:
- shard-dg2-set2: [SKIP][334] ([Intel XE#4208]) -> [DMESG-WARN][335] ([Intel XE#2705] / [Intel XE#4212])
[334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@testdisplay.html
[335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@testdisplay.html
* igt@xe_compute_preempt@compute-preempt:
- shard-dg2-set2: [SKIP][336] ([Intel XE#1280] / [Intel XE#455]) -> [SKIP][337] ([Intel XE#4208]) +1 other test skip
[336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@xe_compute_preempt@compute-preempt.html
[337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_compute_preempt@compute-preempt.html
* igt@xe_copy_basic@mem-copy-linear-0x369:
- shard-dg2-set2: [SKIP][338] ([Intel XE#4208]) -> [SKIP][339] ([Intel XE#1123]) +1 other test skip
[338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_copy_basic@mem-copy-linear-0x369.html
[339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@xe_copy_basic@mem-copy-linear-0x369.html
* igt@xe_copy_basic@mem-set-linear-0xfd:
- shard-dg2-set2: [SKIP][340] ([Intel XE#4208]) -> [SKIP][341] ([Intel XE#1126])
[340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_copy_basic@mem-set-linear-0xfd.html
[341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@xe_copy_basic@mem-set-linear-0xfd.html
* igt@xe_create@multigpu-create-massive-size:
- shard-dg2-set2: [SKIP][342] ([Intel XE#4208]) -> [SKIP][343] ([Intel XE#944]) +1 other test skip
[342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_create@multigpu-create-massive-size.html
[343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@xe_create@multigpu-create-massive-size.html
* igt@xe_eudebug@basic-close:
- shard-dg2-set2: [SKIP][344] ([Intel XE#2905]) -> [SKIP][345] ([Intel XE#4208]) +16 other tests skip
[344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@xe_eudebug@basic-close.html
[345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_eudebug@basic-close.html
* igt@xe_eudebug@basic-vm-bind-ufence-delay-ack:
- shard-dg2-set2: [SKIP][346] ([Intel XE#3889]) -> [SKIP][347] ([Intel XE#4208]) +2 other tests skip
[346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-435/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html
[347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html
* igt@xe_eudebug_online@preempt-breakpoint:
- shard-dg2-set2: [SKIP][348] ([Intel XE#4208]) -> [SKIP][349] ([Intel XE#2905]) +9 other tests skip
[348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_eudebug_online@preempt-breakpoint.html
[349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@xe_eudebug_online@preempt-breakpoint.html
* igt@xe_exec_fault_mode@once-invalid-userptr-fault:
- shard-dg2-set2: [SKIP][350] ([Intel XE#288]) -> [SKIP][351] ([Intel XE#4208]) +34 other tests skip
[350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@xe_exec_fault_mode@once-invalid-userptr-fault.html
[351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_exec_fault_mode@once-invalid-userptr-fault.html
* igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
- shard-dg2-set2: [SKIP][352] ([Intel XE#4208]) -> [SKIP][353] ([Intel XE#288]) +19 other tests skip
[352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
[353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence:
- shard-dg2-set2: [SKIP][354] ([Intel XE#2360]) -> [SKIP][355] ([Intel XE#4208])
[354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html
[355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html
* igt@xe_exec_threads@threads-bal-mixed-userptr:
- shard-dg2-set2: [DMESG-WARN][356] ([Intel XE#1033]) -> [SKIP][357] ([Intel XE#4208]) +4 other tests skip
[356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@xe_exec_threads@threads-bal-mixed-userptr.html
[357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_exec_threads@threads-bal-mixed-userptr.html
* igt@xe_exec_threads@threads-cm-shared-vm-userptr-invalidate:
- shard-dg2-set2: [SKIP][358] ([Intel XE#4208]) -> [INCOMPLETE][359] ([Intel XE#1169])
[358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_exec_threads@threads-cm-shared-vm-userptr-invalidate.html
[359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@xe_exec_threads@threads-cm-shared-vm-userptr-invalidate.html
* igt@xe_live_ktest@xe_bo:
- shard-dg2-set2: [SKIP][360] ([Intel XE#1192]) -> [SKIP][361] ([Intel XE#2229] / [Intel XE#455])
[360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@xe_live_ktest@xe_bo.html
[361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_live_ktest@xe_bo.html
* igt@xe_live_ktest@xe_eudebug:
- shard-bmg: [SKIP][362] ([Intel XE#2833]) -> [SKIP][363] ([Intel XE#1192])
[362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-bmg-4/igt@xe_live_ktest@xe_eudebug.html
[363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-bmg-6/igt@xe_live_ktest@xe_eudebug.html
* igt@xe_oa@non-privileged-map-oa-buffer:
- shard-dg2-set2: [SKIP][364] ([Intel XE#2541] / [Intel XE#3573]) -> [SKIP][365] ([Intel XE#4208]) +9 other tests skip
[364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-463/igt@xe_oa@non-privileged-map-oa-buffer.html
[365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_oa@non-privileged-map-oa-buffer.html
* igt@xe_oa@whitelisted-registers-userspace-config:
- shard-dg2-set2: [SKIP][366] ([Intel XE#4208]) -> [SKIP][367] ([Intel XE#2541] / [Intel XE#3573]) +5 other tests skip
[366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_oa@whitelisted-registers-userspace-config.html
[367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@xe_oa@whitelisted-registers-userspace-config.html
* igt@xe_pat@display-vs-wb-transient:
- shard-dg2-set2: [SKIP][368] ([Intel XE#1337]) -> [SKIP][369] ([Intel XE#4208])
[368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@xe_pat@display-vs-wb-transient.html
[369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_pat@display-vs-wb-transient.html
* igt@xe_pat@pat-index-xe2:
- shard-dg2-set2: [SKIP][370] ([Intel XE#4208]) -> [SKIP][371] ([Intel XE#977])
[370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_pat@pat-index-xe2.html
[371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@xe_pat@pat-index-xe2.html
* igt@xe_pm@d3cold-multiple-execs:
- shard-dg2-set2: [SKIP][372] ([Intel XE#2284] / [Intel XE#366]) -> [SKIP][373] ([Intel XE#4208]) +1 other test skip
[372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@xe_pm@d3cold-multiple-execs.html
[373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_pm@d3cold-multiple-execs.html
* igt@xe_pm@s3-basic:
- shard-dg2-set2: [SKIP][374] ([Intel XE#4208]) -> [DMESG-WARN][375] ([Intel XE#1033] / [Intel XE#569])
[374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_pm@s3-basic.html
[375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@xe_pm@s3-basic.html
* igt@xe_pm@s3-basic-exec:
- shard-dg2-set2: [DMESG-WARN][376] ([Intel XE#1033] / [Intel XE#569]) -> [SKIP][377] ([Intel XE#4208])
[376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@xe_pm@s3-basic-exec.html
[377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_pm@s3-basic-exec.html
* igt@xe_pm@s4-d3cold-basic-exec:
- shard-dg2-set2: [SKIP][378] ([Intel XE#4208]) -> [SKIP][379] ([Intel XE#2284] / [Intel XE#366])
[378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_pm@s4-d3cold-basic-exec.html
[379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-436/igt@xe_pm@s4-d3cold-basic-exec.html
* igt@xe_pm@s4-vm-bind-userptr:
- shard-dg2-set2: [ABORT][380] ([Intel XE#1358]) -> [SKIP][381] ([Intel XE#4208]) +1 other test skip
[380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-434/igt@xe_pm@s4-vm-bind-userptr.html
[381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_pm@s4-vm-bind-userptr.html
* igt@xe_pm@vram-d3cold-threshold:
- shard-dg2-set2: [SKIP][382] ([Intel XE#579]) -> [SKIP][383] ([Intel XE#4208])
[382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-466/igt@xe_pm@vram-d3cold-threshold.html
[383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_pm@vram-d3cold-threshold.html
* igt@xe_query@multigpu-query-topology:
- shard-dg2-set2: [SKIP][384] ([Intel XE#944]) -> [SKIP][385] ([Intel XE#4208]) +1 other test skip
[384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@xe_query@multigpu-query-topology.html
[385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_query@multigpu-query-topology.html
* igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling:
- shard-dg2-set2: [SKIP][386] ([Intel XE#4130]) -> [SKIP][387] ([Intel XE#4208])
[386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-436/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html
[387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html
* igt@xe_sriov_flr@flr-each-isolation:
- shard-dg2-set2: [SKIP][388] ([Intel XE#4208]) -> [SKIP][389] ([Intel XE#3342])
[388]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-464/igt@xe_sriov_flr@flr-each-isolation.html
[389]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-466/igt@xe_sriov_flr@flr-each-isolation.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-dg2-set2: [SKIP][390] ([Intel XE#3342]) -> [SKIP][391] ([Intel XE#4208])
[390]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2607-7a632b6798b6a05b63725249e3209afea13ea499/shard-dg2-435/igt@xe_sriov_flr@flr-vf1-clear.html
[391]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/shard-dg2-464/igt@xe_sriov_flr@flr-vf1-clear.html
[Intel XE#1033]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1033
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
[Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
[Intel XE#1158]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1158
[Intel XE#1169]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1169
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1192
[Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
[Intel XE#1337]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1337
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1358
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
[Intel XE#1607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1607
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392
[Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
[Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#2955]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2955
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3225]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3225
[Intel XE#3226]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3226
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3325
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/356
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3889]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3889
[Intel XE#3966]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3966
[Intel XE#4010]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4010
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4172]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4172
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569
[Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
[Intel XE#701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/701
[Intel XE#734]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/734
[Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/873
[Intel XE#877]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/877
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
[Intel XE#899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/899
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
[i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
Build changes
-------------
* Linux: xe-2607-7a632b6798b6a05b63725249e3209afea13ea499 -> xe-pw-144408v1
IGT_8224: c659b986ba648584d36b3cfece897bc84a33dcbb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-2607-7a632b6798b6a05b63725249e3209afea13ea499: 7a632b6798b6a05b63725249e3209afea13ea499
xe-pw-144408v1: 144408v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144408v1/index.html
[-- Attachment #2: Type: text/html, Size: 128452 bytes --]
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 1/8] drm/xe: Add engine activity support
2025-02-06 10:43 ` [PATCH v5 1/8] drm/xe: Add engine activity support Riana Tauro
@ 2025-02-06 18:28 ` Michal Wajdeczko
2025-02-10 7:07 ` Riana Tauro
0 siblings, 1 reply; 39+ messages in thread
From: Michal Wajdeczko @ 2025-02-06 18:28 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi,
vinay.belgaumkar, soham.purkait
On 06.02.2025 11:43, Riana Tauro wrote:
> GuC provides support to read engine counters to calculate the
> engine activity. KMD exposes two counters via the PMU interface to
> calculate engine activity
>
> Engine Active Ticks(engine-active-ticks) - active ticks of engine
> Engine Total Ticks (engine-total-ticks) - total ticks of engine
>
> Engine activity percentage can be calculated as below
> Engine activity % = (engine active ticks/engine total ticks) * 100.
>
> v2: fix cosmetic review comments
> add forcewake for gpm_ts (Umesh)
>
> v3: fix CI hooks error
> change function parameters and unpin bo on error
> of allocate_activity_buffers
> fix kernel-doc (Umesh)
> use engine activity (Umesh, Lucas)
> rename xe_engine_activity to xe_guc_engine_*
> fix commit message to use engine activity (Lucas, Umesh)
>
> v4: remove forcewake as engine is already running
> when reading gpm timestamp
>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
> drivers/gpu/drm/xe/Makefile | 1 +
> drivers/gpu/drm/xe/abi/guc_actions_abi.h | 1 +
> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +
> drivers/gpu/drm/xe/xe_guc_engine_activity.c | 317 ++++++++++++++++++
> drivers/gpu/drm/xe/xe_guc_engine_activity.h | 18 +
> .../gpu/drm/xe/xe_guc_engine_activity_types.h | 89 +++++
> drivers/gpu/drm/xe/xe_guc_fwif.h | 19 ++
> drivers/gpu/drm/xe/xe_guc_types.h | 4 +
> 8 files changed, 451 insertions(+)
> create mode 100644 drivers/gpu/drm/xe/xe_guc_engine_activity.c
> create mode 100644 drivers/gpu/drm/xe/xe_guc_engine_activity.h
> create mode 100644 drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 5ce65ccb3c08..aa5673f6aadf 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -33,6 +33,7 @@ xe-y += xe_bb.o \
> xe_device_sysfs.o \
> xe_dma_buf.o \
> xe_drm_client.o \
> + xe_guc_engine_activity.o \
is this a right spot for this new .o ?
> xe_exec.o \
> xe_exec_queue.o \
> xe_execlist.o \
> diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> index fee385532fb0..ec516e838ee8 100644
> --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> @@ -140,6 +140,7 @@ enum xe_guc_action {
> XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC = 0x4601,
> XE_GUC_ACTION_CLIENT_SOFT_RESET = 0x5507,
> XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A,
> + XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C,
> XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000,
> XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002,
> XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003,
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 096859072396..124cc398798e 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -358,6 +358,8 @@
> #define RENDER_AWAKE_STATUS REG_BIT(1)
> #define MEDIA_SLICE0_AWAKE_STATUS REG_BIT(0)
>
> +#define MISC_STATUS_0 XE_REG(0xa500)
> +
> #define FORCEWAKE_MEDIA_VDBOX(n) XE_REG(0xa540 + (n) * 4)
> #define FORCEWAKE_MEDIA_VEBOX(n) XE_REG(0xa560 + (n) * 4)
> #define FORCEWAKE_GSC XE_REG(0xa618)
> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> new file mode 100644
> index 000000000000..088209b9c228
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> @@ -0,0 +1,317 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
shouldn't we have 1 empty line here?
> +#include "xe_guc_engine_activity.h"
nit: since we have HDRTEST enabled, it's also OK to include this .h
inline with rest of xe headers below
> +
> +#include "abi/guc_actions_abi.h"
> +#include "regs/xe_gt_regs.h"
> +
> +#include "xe_bo.h"
> +#include "xe_force_wake.h"
> +#include "xe_gt_printk.h"
> +#include "xe_guc.h"
> +#include "xe_guc_ct.h"
> +#include "xe_hw_engine.h"
> +#include "xe_map.h"
> +#include "xe_mmio.h"
> +
> +#define TOTAL_QUANTA 0x8000
> +
> +static struct iosys_map engine_activity_map(struct xe_guc *guc, struct xe_hw_engine *hwe)
> +{
> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> + struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
> + u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
> + size_t offset = 0;
no need to initialize here, you set it up just below
> +
> + offset = offsetof(struct guc_engine_activity_data,
> + engine_activity[guc_class][hwe->logical_instance]);
> +
> + return IOSYS_MAP_INIT_OFFSET(&buffer->activity_bo->vmap, offset);
> +}
> +
> +static struct iosys_map engine_metadata_map(struct xe_guc *guc)
> +{
> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> + struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
> +
> + return buffer->metadata_bo->vmap;
> +}
> +
> +static int allocate_engine_activity_group(struct xe_guc *guc)
> +{
> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> + u32 num_activity_group = 1;
maybe add some comment that this is for future extension coming soon?
> +
> + engine_activity->eag = kmalloc_array(num_activity_group,
> + sizeof(struct engine_activity_group),
> + GFP_KERNEL);
> +
> + if (!engine_activity->eag)
> + return -ENOMEM;
> +
> + memset(engine_activity->eag, 0, num_activity_group * sizeof(struct engine_activity_group));
can't we just pass _GFP_ZERO to kmalloc_array() ?
> + engine_activity->num_activity_group = num_activity_group;
> +
> + return 0;
> +}
> +
> +static int allocate_engine_activity_buffers(struct xe_guc *guc,
> + struct engine_activity_buffer *buffer)
> +{
> + u32 metadata_size = sizeof(struct guc_engine_activity_metadata);
> + u32 size = sizeof(struct guc_engine_activity_data);
> + struct xe_gt *gt = guc_to_gt(guc);
> + struct xe_tile *tile = gt_to_tile(gt);
> + struct xe_bo *bo, *metadata_bo;
> +
> + metadata_bo = xe_managed_bo_create_pin_map(gt_to_xe(gt), tile, PAGE_ALIGN(metadata_size),
> + XE_BO_FLAG_SYSTEM |
> + XE_BO_FLAG_GGTT |
> + XE_BO_FLAG_GGTT_INVALIDATE);
> + if (IS_ERR(metadata_bo))
> + return PTR_ERR(metadata_bo);
> +
> + bo = xe_managed_bo_create_pin_map(gt_to_xe(gt), tile, PAGE_ALIGN(size),
> + XE_BO_FLAG_VRAM_IF_DGFX(tile) |
> + XE_BO_FLAG_GGTT |
> + XE_BO_FLAG_GGTT_INVALIDATE);
> +
> + if (IS_ERR(bo)) {
> + xe_bo_unpin_map_no_vm(metadata_bo);
metadata_bo is managed, you risk UAF on release
> + return PTR_ERR(bo);
> + }
> +
> + buffer->metadata_bo = metadata_bo;
> + buffer->activity_bo = bo;
> + return 0;
> +}
> +
> +static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe)
> +{
> + struct xe_guc *guc = &hwe->gt->uc.guc;
> + struct engine_activity_group *eag = &guc->engine_activity.eag[0];
> + u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
> +
> + return &eag->engine[guc_class][hwe->logical_instance];
> +}
> +
> +static u64 cpu_ns_to_guc_tsc_tick(ktime_t ns, u32 freq)
> +{
> + return mul_u64_u32_div(ns, freq, NSEC_PER_SEC);
> +}
> +
> +#define read_engine_activity_record(xe_, map_, field_) \
> + xe_map_rd_field(xe_, map_, 0, struct guc_engine_activity, field_)
> +
> +#define read_metadata_record(xe_, map_, field_) \
> + xe_map_rd_field(xe_, map_, 0, struct guc_engine_activity_metadata, field_)
> +
> +static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
> +{
> + struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
> + struct guc_engine_activity *cached_activity = &ea->activity;
> + struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> + struct iosys_map activity_map, metadata_map;
> + struct xe_device *xe = guc_to_xe(guc);
> + struct xe_gt *gt = guc_to_gt(guc);
> + u32 last_update_tick, global_change_num;
> + u64 active_ticks, gpm_ts;
> + u16 change_num;
> +
> + activity_map = engine_activity_map(guc, hwe);
> + metadata_map = engine_metadata_map(guc);
> + global_change_num = read_metadata_record(xe, &metadata_map, global_change_num);
> +
> + /* GuC has not initialized activity data yet, return 0 */
> + if (!global_change_num)
> + goto update;
> +
> + if (global_change_num == cached_metadata->global_change_num)
> + goto update;
> + else
'else' not needed here after 'goto'
> + cached_metadata->global_change_num = global_change_num;
> +
> + change_num = read_engine_activity_record(xe, &activity_map, change_num);
> +
> + if (!change_num || change_num == cached_activity->change_num)
> + goto update;
> +
> + /* read engine activity values */
> + last_update_tick = read_engine_activity_record(xe, &activity_map, last_update_tick);
> + active_ticks = read_engine_activity_record(xe, &activity_map, active_ticks);
> +
> + /* activity calculations */
> + ea->running = !!last_update_tick;
> + ea->total += active_ticks - cached_activity->active_ticks;
> + ea->active = 0;
> +
> + /* cache the counter */
> + cached_activity->change_num = change_num;
> + cached_activity->last_update_tick = last_update_tick;
> + cached_activity->active_ticks = active_ticks;
> +
> +update:
> + if (ea->running) {
> + gpm_ts = xe_mmio_read64_2x32(>->mmio, MISC_STATUS_0) >>
> + engine_activity->gpm_timestamp_shift;
> + ea->active = lower_32_bits(gpm_ts) - cached_activity->last_update_tick;
> + }
> +
> + return ea->total + ea->active;
> +}
> +
> +static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
> +{
> + struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
> + struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
> + struct guc_engine_activity *cached_activity = &ea->activity;
> + struct iosys_map activity_map, metadata_map;
> + struct xe_device *xe = guc_to_xe(guc);
> + ktime_t now, cpu_delta;
> + u64 numerator;
> + u16 quanta_ratio;
> +
> + activity_map = engine_activity_map(guc, hwe);
> + metadata_map = engine_metadata_map(guc);
> +
> + if (!cached_metadata->guc_tsc_frequency_hz)
> + cached_metadata->guc_tsc_frequency_hz = read_metadata_record(xe, &metadata_map,
> + guc_tsc_frequency_hz);
> +
> + quanta_ratio = read_engine_activity_record(xe, &activity_map, quanta_ratio);
> + cached_activity->quanta_ratio = quanta_ratio;
> +
> + /* Total ticks calculations */
> + now = ktime_get();
> + cpu_delta = now - ea->last_cpu_ts;
> + ea->last_cpu_ts = now;
> + numerator = (ea->quanta_remainder_ns + cpu_delta) * cached_activity->quanta_ratio;
> + ea->quanta_ns += numerator / TOTAL_QUANTA;
> + ea->quanta_remainder_ns = numerator % TOTAL_QUANTA;
> + ea->quanta = cpu_ns_to_guc_tsc_tick(ea->quanta_ns, cached_metadata->guc_tsc_frequency_hz);
> +
> + return ea->quanta;
> +}
> +
> +static int enable_engine_activity_stats(struct xe_guc *guc)
> +{
> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> + struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
> + u32 metadata_ggtt_addr = xe_bo_ggtt_addr(buffer->metadata_bo);
> + u32 ggtt_addr = xe_bo_ggtt_addr(buffer->activity_bo);
> + int len = 0;
> + u32 action[5];
magic 5, maybe define action as
u32 action[] = {
XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER,
xe_bo_ggtt_addr(buffer->metadata_bo),
0,
xe_bo_ggtt_addr(buffer->activity_bo),
0,
};
> +
> + action[len++] = XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER;
> + action[len++] = metadata_ggtt_addr;
> + action[len++] = 0;
> + action[len++] = ggtt_addr;
> + action[len++] = 0;
> +
> + /* Blocking here to ensure the buffers are ready before reading them */
> + return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action));
> +}
> +
> +static void engine_activity_set_cpu_ts(struct xe_guc *guc)
> +{
> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> + struct engine_activity_group *eag = &engine_activity->eag[0];
> + int i, j;
> +
> + for (i = 0; i < GUC_MAX_ENGINE_CLASSES; i++)
> + for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; j++)
> + eag->engine[i][j].last_cpu_ts = ktime_get();
do we need to call ktime_get() inside the loop?
> +}
> +
> +static u32 gpm_timestamp_shift(struct xe_gt *gt)
> +{
> + u32 reg;
> +
> + reg = xe_mmio_read32(>->mmio, RPM_CONFIG0);
> +
> + return 3 - REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
> +}
> +
> +/**
> + * xe_guc_engine_activity_active_ticks - Get engine active ticks
> + * @hwe: The hw_engine object
> + *
> + * Return: accumulated ticks @hwe was active since engine activity stats were enabled.
> + */
> +u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe)
this function doesn't fit here as it takes hwe, not guc
> +{
> + struct xe_guc *guc = &hwe->gt->uc.guc;
> +
> + return get_engine_active_ticks(guc, hwe);
> +}
> +
> +/**
> + * xe_guc_engine_activity_total_ticks - Get engine total ticks
> + * @hwe: The hw_engine object
> + *
> + * Return: accumulated quanta of ticks allocated for the engine
> + */
> +u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe)
ditto
> +{
> + struct xe_guc *guc = &hwe->gt->uc.guc;
> +
> + return get_engine_total_ticks(guc, hwe);
> +}
> +
> +/**
> + * xe_guc_engine_activity_enable_stats - Enable engine activity stats
> + * @guc: The GuC object
> + *
> + * Enable engine activity stats and set initial timestamps
> + */
> +void xe_guc_engine_activity_enable_stats(struct xe_guc *guc)
> +{
> + int ret;
> +
> + ret = enable_engine_activity_stats(guc);
> + if (ret)
> + xe_gt_err(guc_to_gt(guc), "failed to enable activity stats%d\n", ret);
> + else
> + engine_activity_set_cpu_ts(guc);
> +}
> +
> +static void engine_activity_fini(void *arg)
> +{
> + struct xe_guc_engine_activity *engine_activity = arg;
> +
> + kfree(engine_activity->eag);
> +}
> +
> +/**
> + * xe_guc_engine_activity_init - Initialize the engine activity data
> + * @guc: The GuC object
> + *
> + * Return: 0 on success, negative error code otherwise.
> + */
> +int xe_guc_engine_activity_init(struct xe_guc *guc)
> +{
> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> + struct xe_gt *gt = guc_to_gt(guc);
> + int ret;
this feature likely will not work on VF
shouldn't we at least assert here that we don't call this init() when
running as VF ?
> +
> + ret = allocate_engine_activity_group(guc);
> + if (ret) {
> + xe_gt_err(gt, "failed to allocate activity group %d\n", ret);
nit: it's nicer to print error codes as %pe
> + return ret;
> + }
> +
> + ret = allocate_engine_activity_buffers(guc, &engine_activity->device_buffer);
> + if (ret) {
> + xe_gt_err(gt, "failed to allocate activity buffers%d\n", ret);
nit: it's nicer to print error codes as %pe
> + kfree(engine_activity->eag);
> + return ret;
> + }
> +
> + engine_activity->gpm_timestamp_shift = gpm_timestamp_shift(gt);
> +
> + return devm_add_action_or_reset(gt_to_xe(gt)->drm.dev, engine_activity_fini,
> + engine_activity);
engine_activity->eag is just a plain memory
can't we just make it drm_managed ?
> +}
> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.h b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
> new file mode 100644
> index 000000000000..c00f3da5513d
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef _XE_GUC_ENGINE_ACTIVITY_H_
> +#define _XE_GUC_ENGINE_ACTIVITY_H_
> +
> +#include <linux/types.h>
> +
> +struct xe_hw_engine;
> +struct xe_guc;
> +
> +int xe_guc_engine_activity_init(struct xe_guc *guc);
> +void xe_guc_engine_activity_enable_stats(struct xe_guc *guc);
> +u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe);
> +u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe);
> +#endif
> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
> new file mode 100644
> index 000000000000..a2ab327d3eec
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
> @@ -0,0 +1,89 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef _XE_GUC_ENGINE_ACTIVITY_TYPES_H_
> +#define _XE_GUC_ENGINE_ACTIVITY_TYPES_H_
> +
> +#include <linux/types.h>
> +
> +#include "xe_guc_fwif.h"
> +/**
> + * struct engine_activity - Engine specific activity data
> + *
> + * Contains engine specific activity data and snapshot of the
> + * structures from GuC
> + */
> +struct engine_activity {
> + /** @active: current activity */
> + u64 active;
> +
> + /** @last_cpu_ts: cpu timestamp in nsec of previous sample */
> + u64 last_cpu_ts;
> +
> + /** @quanta: total quanta used on HW */
> + u64 quanta;
> +
> + /** @quanta_ns: total quanta_ns used on HW */
> + u64 quanta_ns;
> +
> + /**
> + * @quanta_remainder_ns: remainder when the CPU time is scaled as
> + * per the quanta_ratio. This remainder is used in subsequent
> + * quanta calculations.
> + */
> + u64 quanta_remainder_ns;
> +
> + /** @total: total engine activity */
> + u64 total;
> +
> + /** @running: true if engine is running some work */
> + bool running;
> +
> + /** @metadata: snapshot of engine activity metadata */
> + struct guc_engine_activity_metadata metadata;
> +
> + /** @activity: snapshot of engine activity counter */
> + struct guc_engine_activity activity;
> +};
> +
> +/**
> + * struct engine_activity_group - Activity data for all engines
> + */
> +struct engine_activity_group {
> + /** @engine: engine specific activity data */
> + struct engine_activity engine[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
> +};
> +
> +/**
> + * struct engine_activity_buffer - engine activity buffers
> + *
> + * This contains the buffers allocated for metadata and activity data
> + */
> +struct engine_activity_buffer {
> + /** @activity_bo: object allocated to hold activity data */
> + struct xe_bo *activity_bo;
> +
> + /** @metadata_bo: object allocated to hold activity metadata */
> + struct xe_bo *metadata_bo;
> +};
> +
> +/**
> + * struct xe_guc_engine_activity - Data used by engine activity implementation
> + */
> +struct xe_guc_engine_activity {
> + /** @gpm_timestamp_shift: Right shift value for the gpm timestamp */
> + u32 gpm_timestamp_shift;
> +
> + /** @num_activity_group: number of activity groups */
> + u32 num_activity_group;
> +
> + /** @eag: holds the device level engine activity data */
> + struct engine_activity_group *eag;
> +
> + /** @device_buffer: buffer object for global engine activity */
> + struct engine_activity_buffer device_buffer;
> +};
> +#endif
> +
> diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
> index 057153f89b30..6f57578b07cb 100644
> --- a/drivers/gpu/drm/xe/xe_guc_fwif.h
> +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
> @@ -208,6 +208,25 @@ struct guc_engine_usage {
> struct guc_engine_usage_record engines[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
> } __packed;
>
> +/* Engine Activity stats */
> +struct guc_engine_activity {
> + u16 change_num;
> + u16 quanta_ratio;
> + u32 last_update_tick;
> + u64 active_ticks;
> +} __packed;
> +
> +struct guc_engine_activity_data {
> + struct guc_engine_activity engine_activity[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
> +} __packed;
> +
> +struct guc_engine_activity_metadata {
> + u32 guc_tsc_frequency_hz;
> + u32 lag_latency_usec;
> + u32 global_change_num;
> + u32 reserved;
> +} __packed;
> +
> /* This action will be programmed in C1BC - SOFT_SCRATCH_15_REG */
> enum xe_guc_recv_message {
> XE_GUC_RECV_MSG_CRASH_DUMP_POSTED = BIT(1),
> diff --git a/drivers/gpu/drm/xe/xe_guc_types.h b/drivers/gpu/drm/xe/xe_guc_types.h
> index 573aa6308380..63bac64429a5 100644
> --- a/drivers/gpu/drm/xe/xe_guc_types.h
> +++ b/drivers/gpu/drm/xe/xe_guc_types.h
> @@ -13,6 +13,7 @@
> #include "xe_guc_ads_types.h"
> #include "xe_guc_buf_types.h"
> #include "xe_guc_ct_types.h"
> +#include "xe_guc_engine_activity_types.h"
> #include "xe_guc_fwif.h"
> #include "xe_guc_log_types.h"
> #include "xe_guc_pc_types.h"
> @@ -103,6 +104,9 @@ struct xe_guc {
> /** @relay: GuC Relay Communication used in SR-IOV */
> struct xe_guc_relay relay;
>
> + /** @engine_activity: Device specific engine activity */
> + struct xe_guc_engine_activity engine_activity;
> +
> /**
> * @notify_reg: Register which is written to notify GuC of H2G messages
> */
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 3/8] drm/xe/guc: Expose engine activity only for supported GuC version
2025-02-06 10:43 ` [PATCH v5 3/8] drm/xe/guc: Expose engine activity only for supported GuC version Riana Tauro
@ 2025-02-06 18:39 ` Michal Wajdeczko
2025-02-07 7:59 ` Riana Tauro
2025-02-07 21:37 ` Umesh Nerlige Ramappa
1 sibling, 1 reply; 39+ messages in thread
From: Michal Wajdeczko @ 2025-02-06 18:39 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi,
vinay.belgaumkar, soham.purkait, John Harrison
On 06.02.2025 11:43, Riana Tauro wrote:
> Engine activity is supported only on GuC submission version >= 1.14.1
> Allow enabling/reading engine activity only on supported
> GuC versions. Warn once if not supported.
>
> v2: use guc interface version (John)
> v3: do not use drm_WARN (Umesh)
> v4: use variable for supported and use gt logs
> use a friendlier log message (Michal)
>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc_engine_activity.c | 42 +++++++++++++++++++
> drivers/gpu/drm/xe/xe_guc_engine_activity.h | 1 +
> .../gpu/drm/xe/xe_guc_engine_activity_types.h | 3 ++
> 3 files changed, 46 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> index 9c08af273397..5d67fe38639a 100644
> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> @@ -89,6 +89,22 @@ static int allocate_engine_activity_buffers(struct xe_guc *guc,
> return 0;
> }
>
> +static bool engine_activity_supported(struct xe_guc *guc)
maybe rename it a little to distinguish from other function that just
look at engine_activity->supported flag?
> +{
> + struct xe_uc_fw_version *version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
> + struct xe_gt *gt = guc_to_gt(guc);
> +
> + /* engine activity stats is supported from GuC interface version (1.14.1) */
> + if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 14, 1))
> + return true;
it also doesn't work on VFs
so maybe it should be different logic:
if (IS_SRIOV_VF) {
xt_gt_into("EA not supported on VFs\n");
return false;
}
if (GUC_SUBMIT_VER < 1.14.1) {
xt_gt_into("EA not supported on vA, need vB+\n");
return false;
}
> +
> + xe_gt_warn(gt,
does it really need to be 'warn' level?
> + "engine activity stats unsupported in GuC interface v%u.%u.%u, v%u.%u.%u or newer required\n",
> + version->major, version->minor, version->patch, 1, 14, 1);
> +
> + return false;
> +}
> +
> static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe)
> {
> struct xe_guc *guc = &hwe->gt->uc.guc;
> @@ -250,6 +266,9 @@ u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe)
> {
> struct xe_guc *guc = &hwe->gt->uc.guc;
>
> + if (!xe_guc_engine_activity_supported(guc))
> + return 0;
> +
> return get_engine_active_ticks(guc, hwe);
> }
>
> @@ -263,9 +282,27 @@ u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe)
> {
> struct xe_guc *guc = &hwe->gt->uc.guc;
>
> + if (!xe_guc_engine_activity_supported(guc))
> + return 0;
> +
> return get_engine_total_ticks(guc, hwe);
> }
>
> +/**
> + * xe_guc_engine_activity_supported - Check support for engine activity stats
> + * @guc: The GuC object
> + *
> + * Engine activity stats is supported from GuC interface version (1.14.1)
what about VFs?
> + *
> + * Return: true if engine activity stats supported, false otherwise
> + */
> +bool xe_guc_engine_activity_supported(struct xe_guc *guc)
> +{
> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> +
> + return engine_activity->supported;
> +}
> +
> /**
> * xe_guc_engine_activity_enable_stats - Enable engine activity stats
> * @guc: The GuC object
> @@ -276,6 +313,9 @@ void xe_guc_engine_activity_enable_stats(struct xe_guc *guc)
> {
> int ret;
>
> + if (!xe_guc_engine_activity_supported(guc))
> + return;
> +
> ret = enable_engine_activity_stats(guc);
> if (ret)
> xe_gt_err(guc_to_gt(guc), "failed to enable activity stats%d\n", ret);
> @@ -302,6 +342,8 @@ int xe_guc_engine_activity_init(struct xe_guc *guc)
> struct xe_gt *gt = guc_to_gt(guc);
> int ret;
>
> + engine_activity->supported = engine_activity_supported(guc);
should we continue if not supported ?
> +
> ret = allocate_engine_activity_group(guc);
> if (ret) {
> xe_gt_err(gt, "failed to allocate activity group %d\n", ret);
> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.h b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
> index c00f3da5513d..9d3ea3f67b6a 100644
> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.h
> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
> @@ -12,6 +12,7 @@ struct xe_hw_engine;
> struct xe_guc;
>
> int xe_guc_engine_activity_init(struct xe_guc *guc);
> +bool xe_guc_engine_activity_supported(struct xe_guc *guc);
> void xe_guc_engine_activity_enable_stats(struct xe_guc *guc);
> u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe);
> u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe);
> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
> index a2ab327d3eec..81002c83d65e 100644
> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
> @@ -79,6 +79,9 @@ struct xe_guc_engine_activity {
> /** @num_activity_group: number of activity groups */
> u32 num_activity_group;
>
> + /** @supported: checks if engine activity is supported */
indicates?
> + bool supported;
> +
> /** @eag: holds the device level engine activity data */
> struct engine_activity_group *eag;
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 6/8] drm/xe: Add support for per-function engine activity
2025-02-06 10:43 ` [PATCH v5 6/8] drm/xe: Add support for per-function engine activity Riana Tauro
@ 2025-02-06 19:06 ` Michal Wajdeczko
2025-02-07 8:11 ` Riana Tauro
0 siblings, 1 reply; 39+ messages in thread
From: Michal Wajdeczko @ 2025-02-06 19:06 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi,
vinay.belgaumkar, soham.purkait
On 06.02.2025 11:43, Riana Tauro wrote:
> Add support for function level engine activity stats.
> This is enabled when sriov_numvfs is set and disabled when vf's
VF's
> are disabled.
>
> v2: remove unnecessary initialization
> move offset to improve code readability (Umesh)
> remove global for function engine activity (Lucas)
>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> drivers/gpu/drm/xe/abi/guc_actions_abi.h | 1 +
> drivers/gpu/drm/xe/xe_guc_engine_activity.c | 208 +++++++++++++++---
> drivers/gpu/drm/xe/xe_guc_engine_activity.h | 5 +-
> .../gpu/drm/xe/xe_guc_engine_activity_types.h | 8 +-
> drivers/gpu/drm/xe/xe_pmu.c | 4 +-
> 5 files changed, 192 insertions(+), 34 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> index ec516e838ee8..448afb86e05c 100644
> --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> @@ -141,6 +141,7 @@ enum xe_guc_action {
> XE_GUC_ACTION_CLIENT_SOFT_RESET = 0x5507,
> XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A,
> XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C,
> + XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER = 0x550D,
> XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000,
> XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002,
> XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003,
> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> index 5d67fe38639a..0ab9112466f1 100644
> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> @@ -15,35 +15,62 @@
> #include "xe_hw_engine.h"
> #include "xe_map.h"
> #include "xe_mmio.h"
> +#include "xe_sriov_pf_helpers.h"
> #include "xe_trace_guc.h"
>
> #define TOTAL_QUANTA 0x8000
>
> -static struct iosys_map engine_activity_map(struct xe_guc *guc, struct xe_hw_engine *hwe)
> +static struct iosys_map engine_activity_map(struct xe_guc *guc, struct xe_hw_engine *hwe,
> + unsigned int index)
> {
> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> - struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
> + struct engine_activity_buffer *buffer;
> u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
> - size_t offset = 0;
> + size_t offset;
> +
> + if (engine_activity->num_functions) {
> + buffer = &engine_activity->function_buffer;
> + offset = sizeof(struct guc_engine_activity_data) * index;
maybe we should assert that index < num_functions?
> + } else {
> + buffer = &engine_activity->device_buffer;
> + offset = 0;
> + }
>
> - offset = offsetof(struct guc_engine_activity_data,
> + offset += offsetof(struct guc_engine_activity_data,
> engine_activity[guc_class][hwe->logical_instance]);
>
> return IOSYS_MAP_INIT_OFFSET(&buffer->activity_bo->vmap, offset);
> }
>
> -static struct iosys_map engine_metadata_map(struct xe_guc *guc)
> +static struct iosys_map engine_metadata_map(struct xe_guc *guc,
> + unsigned int index)
> {
> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> - struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
> + struct engine_activity_buffer *buffer;
> + size_t offset;
> +
> + if (engine_activity->num_functions) {
> + buffer = &engine_activity->function_buffer;
> + offset = sizeof(struct guc_engine_activity_metadata) * index;
> + } else {
> + buffer = &engine_activity->device_buffer;
> + offset = 0;
> + }
>
> - return buffer->metadata_bo->vmap;
> + return IOSYS_MAP_INIT_OFFSET(&buffer->metadata_bo->vmap, offset);
> }
>
> static int allocate_engine_activity_group(struct xe_guc *guc)
> {
> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> - u32 num_activity_group = 1;
> + struct xe_device *xe = guc_to_xe(guc);
> + u32 num_activity_group;
> +
> + /*
> + * An additional activity group is allocated for PF
> + */
> + num_activity_group = IS_SRIOV_PF(xe) ? xe_sriov_pf_get_totalvfs(xe) + 1 : 1;
> +
>
> engine_activity->eag = kmalloc_array(num_activity_group,
> sizeof(struct engine_activity_group),
> @@ -59,10 +86,11 @@ static int allocate_engine_activity_group(struct xe_guc *guc)
> }
>
> static int allocate_engine_activity_buffers(struct xe_guc *guc,
> - struct engine_activity_buffer *buffer)
> + struct engine_activity_buffer *buffer,
> + int count)
> {
> - u32 metadata_size = sizeof(struct guc_engine_activity_metadata);
> - u32 size = sizeof(struct guc_engine_activity_data);
> + u32 metadata_size = sizeof(struct guc_engine_activity_metadata) * count;
> + u32 size = sizeof(struct guc_engine_activity_data) * count;
> struct xe_gt *gt = guc_to_gt(guc);
> struct xe_tile *tile = gt_to_tile(gt);
> struct xe_bo *bo, *metadata_bo;
> @@ -105,10 +133,17 @@ static bool engine_activity_supported(struct xe_guc *guc)
> return false;
> }
>
> -static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe)
> +static void free_engine_activity_buffers(struct engine_activity_buffer *buffer)
> +{
> + xe_bo_unpin_map_no_vm(buffer->metadata_bo);
> + xe_bo_unpin_map_no_vm(buffer->activity_bo);
> +}
> +
> +static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe,
> + unsigned int index)
> {
> struct xe_guc *guc = &hwe->gt->uc.guc;
> - struct engine_activity_group *eag = &guc->engine_activity.eag[0];
> + struct engine_activity_group *eag = &guc->engine_activity.eag[index];
> u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
>
> return &eag->engine[guc_class][hwe->logical_instance];
> @@ -125,9 +160,10 @@ static u64 cpu_ns_to_guc_tsc_tick(ktime_t ns, u32 freq)
> #define read_metadata_record(xe_, map_, field_) \
> xe_map_rd_field(xe_, map_, 0, struct guc_engine_activity_metadata, field_)
>
> -static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
> +static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe,
> + unsigned int index)
> {
> - struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
> + struct engine_activity *ea = hw_engine_to_engine_activity(hwe, index);
> struct guc_engine_activity *cached_activity = &ea->activity;
> struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> @@ -138,8 +174,8 @@ static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
> u64 active_ticks, gpm_ts;
> u16 change_num;
>
> - activity_map = engine_activity_map(guc, hwe);
> - metadata_map = engine_metadata_map(guc);
> + activity_map = engine_activity_map(guc, hwe, index);
> + metadata_map = engine_metadata_map(guc, index);
> global_change_num = read_metadata_record(xe, &metadata_map, global_change_num);
>
> /* GuC has not initialized activity data yet, return 0 */
> @@ -182,9 +218,9 @@ static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
> return ea->total + ea->active;
> }
>
> -static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
> +static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe, unsigned int index)
> {
> - struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
> + struct engine_activity *ea = hw_engine_to_engine_activity(hwe, index);
> struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
> struct guc_engine_activity *cached_activity = &ea->activity;
> struct iosys_map activity_map, metadata_map;
> @@ -193,8 +229,8 @@ static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
> u64 numerator;
> u16 quanta_ratio;
>
> - activity_map = engine_activity_map(guc, hwe);
> - metadata_map = engine_metadata_map(guc);
> + activity_map = engine_activity_map(guc, hwe, index);
> + metadata_map = engine_metadata_map(guc, index);
>
> if (!cached_metadata->guc_tsc_frequency_hz)
> cached_metadata->guc_tsc_frequency_hz = read_metadata_record(xe, &metadata_map,
> @@ -236,10 +272,35 @@ static int enable_engine_activity_stats(struct xe_guc *guc)
> return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action));
> }
>
> -static void engine_activity_set_cpu_ts(struct xe_guc *guc)
> +static int enable_function_engine_activity_stats(struct xe_guc *guc, bool enable)
IMO it's cleaner to have separate 'disable()' function that will prepare
and send tailored action params
> {
> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> - struct engine_activity_group *eag = &engine_activity->eag[0];
> + u32 metadata_ggtt_addr = 0, ggtt_addr = 0, num_functions = 0;
> + struct engine_activity_buffer *buffer = &engine_activity->function_buffer;
> + u32 action[6];
> + int len = 0;
> +
> + if (enable) {
> + metadata_ggtt_addr = xe_bo_ggtt_addr(buffer->metadata_bo);
> + ggtt_addr = xe_bo_ggtt_addr(buffer->activity_bo);
> + num_functions = engine_activity->num_functions;
> + }
> +
> + action[len++] = XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER;
> + action[len++] = num_functions;
> + action[len++] = metadata_ggtt_addr;
> + action[len++] = 0;
> + action[len++] = ggtt_addr;
> + action[len++] = 0;
> +
> + /* Blocking here to ensure the buffers are ready before reading them */
> + return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action));
> +}
> +
> +static void engine_activity_set_cpu_ts(struct xe_guc *guc, unsigned int index)
> +{
> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> + struct engine_activity_group *eag = &engine_activity->eag[index];
> int i, j;
>
> for (i = 0; i < GUC_MAX_ENGINE_CLASSES; i++)
> @@ -256,36 +317,106 @@ static u32 gpm_timestamp_shift(struct xe_gt *gt)
> return 3 - REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
> }
>
> +static bool is_function_valid(struct xe_guc *guc, unsigned int fn_id)
> +{
> + struct xe_device *xe = guc_to_xe(guc);
> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> +
> + if (!IS_SRIOV_PF(xe) && fn_id)
> + return false;
> +
> + if (engine_activity->num_functions && fn_id >= engine_activity->num_functions)
> + return false;
> +
> + return true;
> +}
> +
> +static int engine_activity_disable_function_stats(struct xe_guc *guc, bool enable)
> +{
> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> + struct engine_activity_buffer *buffer = &engine_activity->function_buffer;
> + int ret;
> +
> + if (!engine_activity->num_functions)
> + return 0;
> +
> + ret = enable_function_engine_activity_stats(guc, enable);
> + if (ret)
> + return ret;
> +
> + free_engine_activity_buffers(buffer);
> + engine_activity->num_functions = 0;
> +
> + return 0;
> +}
> +
> +static int engine_activity_enable_function_stats(struct xe_guc *guc, int num_vfs, bool enable)
> +{
> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
> + struct engine_activity_buffer *buffer = &engine_activity->function_buffer;
> + int ret, i;
> +
> + if (!num_vfs)
> + return 0;
> +
> + /* This includes 1 PF and num_vfs */
> + engine_activity->num_functions = num_vfs + 1;
> +
> + ret = allocate_engine_activity_buffers(guc, buffer, engine_activity->num_functions);
> + if (ret)
> + return ret;
> +
> + ret = enable_function_engine_activity_stats(guc, enable);
> + if (ret) {
> + free_engine_activity_buffers(buffer);
> + engine_activity->num_functions = 0;
> + return ret;
> + }
> +
> + for (i = 0; i < engine_activity->num_functions; i++)
> + engine_activity_set_cpu_ts(guc, i + 1);
> +
> + return 0;
> +}
> +
> /**
> * xe_guc_engine_activity_active_ticks - Get engine active ticks
> * @hwe: The hw_engine object
> + * @fn_id: function id to report on
> *
> * Return: accumulated ticks @hwe was active since engine activity stats were enabled.
> */
> -u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe)
> +u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe, unsigned int fn_id)
> {
> struct xe_guc *guc = &hwe->gt->uc.guc;
>
> if (!xe_guc_engine_activity_supported(guc))
> return 0;
>
> - return get_engine_active_ticks(guc, hwe);
> + if (!is_function_valid(guc, fn_id))
> + return 0;
> +
> + return get_engine_active_ticks(guc, hwe, fn_id);
> }
>
> /**
> * xe_guc_engine_activity_total_ticks - Get engine total ticks
> * @hwe: The hw_engine object
> + * @fn_id: function id to report on
> *
> * Return: accumulated quanta of ticks allocated for the engine
> */
> -u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe)
> +u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe, unsigned int fn_id)
> {
> struct xe_guc *guc = &hwe->gt->uc.guc;
>
> if (!xe_guc_engine_activity_supported(guc))
> return 0;
>
> - return get_engine_total_ticks(guc, hwe);
> + if (!is_function_valid(guc, fn_id))
> + return 0;
> +
> + return get_engine_total_ticks(guc, hwe, fn_id);
> }
>
> /**
> @@ -303,6 +434,25 @@ bool xe_guc_engine_activity_supported(struct xe_guc *guc)
> return engine_activity->supported;
> }
>
> +/**
> + * xe_guc_engine_activity_function_stats - Enable/Disable per-function engine activity stats
> + * @guc: The GuC object
> + * @num_vfs: number of vfs
> + * @enable: true to enable, false otherwise
> + *
> + * Return: 0 on success, negative error code otherwise
> + */
> +int xe_guc_engine_activity_function_stats(struct xe_guc *guc, int num_vfs, bool enable)
> +{
> + if (!xe_guc_engine_activity_supported(guc))
> + return 0;
> +
> + if (enable)
> + return engine_activity_enable_function_stats(guc, num_vfs, enable);
> +
> + return engine_activity_disable_function_stats(guc, enable);
> +}
> +
> /**
> * xe_guc_engine_activity_enable_stats - Enable engine activity stats
> * @guc: The GuC object
> @@ -320,7 +470,7 @@ void xe_guc_engine_activity_enable_stats(struct xe_guc *guc)
> if (ret)
> xe_gt_err(guc_to_gt(guc), "failed to enable activity stats%d\n", ret);
> else
> - engine_activity_set_cpu_ts(guc);
> + engine_activity_set_cpu_ts(guc, 0);
> }
>
> static void engine_activity_fini(void *arg)
> @@ -350,7 +500,7 @@ int xe_guc_engine_activity_init(struct xe_guc *guc)
> return ret;
> }
>
> - ret = allocate_engine_activity_buffers(guc, &engine_activity->device_buffer);
> + ret = allocate_engine_activity_buffers(guc, &engine_activity->device_buffer, 1);
> if (ret) {
> xe_gt_err(gt, "failed to allocate activity buffers%d\n", ret);
> kfree(engine_activity->eag);
> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.h b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
> index 9d3ea3f67b6a..765397b959e0 100644
> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.h
> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
> @@ -14,6 +14,7 @@ struct xe_guc;
> int xe_guc_engine_activity_init(struct xe_guc *guc);
> bool xe_guc_engine_activity_supported(struct xe_guc *guc);
> void xe_guc_engine_activity_enable_stats(struct xe_guc *guc);
> -u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe);
> -u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe);
> +int xe_guc_engine_activity_function_stats(struct xe_guc *guc, int num_vfs, bool enable);
> +u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe, unsigned int fn_id);
> +u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe, unsigned int fn_id);
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
> index 81002c83d65e..d95ec6a74b30 100644
> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
> @@ -79,14 +79,20 @@ struct xe_guc_engine_activity {
> /** @num_activity_group: number of activity groups */
> u32 num_activity_group;
>
> + /** @num_functions: number of functions */
> + u32 num_functions;
> +
> /** @supported: checks if engine activity is supported */
> bool supported;
>
> - /** @eag: holds the device level engine activity data */
> + /** @eag: array with entries to hold engine activity stats of global, PF and VF's */
> struct engine_activity_group *eag;
>
> /** @device_buffer: buffer object for global engine activity */
> struct engine_activity_buffer device_buffer;
do we need both device ad function buffers ?
for non-PF case (native) we can still buffer[1]
for PF case we will allocate buffer[1 + totalVFs]
and in the future
for PF case we will allocate buffer[1]
> +
> + /** @function_buffer: buffer object for per-function engine activity */
> + struct engine_activity_buffer function_buffer;
> };
> #endif
>
> diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
> index 5b5fe4424aba..a758fc517048 100644
> --- a/drivers/gpu/drm/xe/xe_pmu.c
> +++ b/drivers/gpu/drm/xe/xe_pmu.c
> @@ -242,9 +242,9 @@ static u64 read_engine_events(struct perf_event *event, u64 prev)
> if (!hwe)
> drm_warn(&xe->drm, "unknown pmu engine\n");
> else if (config_to_event_id(event->attr.config) == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS)
> - val = xe_guc_engine_activity_active_ticks(hwe);
> + val = xe_guc_engine_activity_active_ticks(hwe, 0);
> else
> - val = xe_guc_engine_activity_total_ticks(hwe);
> + val = xe_guc_engine_activity_total_ticks(hwe, 0);
>
> return val;
> }
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 7/8] drm/xe/xe_pmu: Add pmu support for per-function engine activity stats
2025-02-06 10:43 ` [PATCH v5 7/8] drm/xe/xe_pmu: Add pmu support for per-function engine activity stats Riana Tauro
@ 2025-02-06 19:15 ` Michal Wajdeczko
2025-02-07 7:52 ` Riana Tauro
0 siblings, 1 reply; 39+ messages in thread
From: Michal Wajdeczko @ 2025-02-06 19:15 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi,
vinay.belgaumkar, soham.purkait
On 06.02.2025 11:43, Riana Tauro wrote:
> Add pmu support for per-function engine activity
> stats.
PMU ?
unneeded line wrap ?
>
> per-function engine activity is enabled when sriov_numvfs
> are set. If sriov_numvfs is set to 2, then the applicable function
> values are
>
> 0 - PF engine activity
> 1,2 - per-VF engine activity from PF
0 - PF engine activity
1 - VF1 engine activity
2 - VF2 engine activity
but maybe better to show full entries:
xe_0000_03_00.0/engine...ticks/ - PF activity
xe_0000_03_00.1/engine...ticks/ - VF1 activity
xe_0000_03_00.2/engine...ticks/ - VF2 activity
as 'function' term here matches 'PCI function'
>
> This can be read from perf tool as shown below
>
> ./perf stat -e xe_<bdf>/engine-active-ticks,gt=0,engine_class=0,
> engine_instance=0,function=1/ -I 1000
>
> v2: fix documentation (Umesh)
> remove global for functions (Lucas, Michal)
>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> drivers/gpu/drm/xe/xe_pmu.c | 38 ++++++++++++++++++++++++++++++-------
> 1 file changed, 31 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
> index a758fc517048..66cf2ece97ec 100644
> --- a/drivers/gpu/drm/xe/xe_pmu.c
> +++ b/drivers/gpu/drm/xe/xe_pmu.c
> @@ -13,6 +13,7 @@
> #include "xe_hw_engine.h"
> #include "xe_pm.h"
> #include "xe_pmu.h"
> +#include "xe_sriov_pf_helpers.h"
>
> /**
> * DOC: Xe PMU (Performance Monitoring Unit)
> @@ -32,9 +33,10 @@
> * gt[60:63] Selects gt for the event
> * engine_class[20:27] Selects engine-class for event
> * engine_instance[12:19] Selects the engine-instance for the event
> + * function[44:59] Selects the function of the event (SRIOV enabled)
> *
> * For engine specific events (engine-*), gt, engine_class and engine_instance parameters must be
> - * set as populated by DRM_XE_DEVICE_QUERY_ENGINES.
> + * set as populated by DRM_XE_DEVICE_QUERY_ENGINES and function if SRIOV is enabled.
> *
> * For gt specific events (gt-*) gt parameter must be passed. All other parameters will be 0.
> *
> @@ -49,6 +51,7 @@
> */
>
> #define XE_PMU_EVENT_GT_MASK GENMASK_ULL(63, 60)
> +#define XE_PMU_EVENT_FUNCTION_MASK GENMASK_ULL(59, 44)
> #define XE_PMU_EVENT_ENGINE_CLASS_MASK GENMASK_ULL(27, 20)
> #define XE_PMU_EVENT_ENGINE_INSTANCE_MASK GENMASK_ULL(19, 12)
> #define XE_PMU_EVENT_ID_MASK GENMASK_ULL(11, 0)
> @@ -58,6 +61,11 @@ static unsigned int config_to_event_id(u64 config)
> return FIELD_GET(XE_PMU_EVENT_ID_MASK, config);
> }
>
> +static unsigned int config_to_function_id(u64 config)
> +{
> + return FIELD_GET(XE_PMU_EVENT_FUNCTION_MASK, config);
> +}
> +
> static unsigned int config_to_engine_class(u64 config)
> {
> return FIELD_GET(XE_PMU_EVENT_ENGINE_CLASS_MASK, config);
> @@ -146,7 +154,7 @@ static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
> static bool event_param_valid(struct perf_event *event)
> {
> struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
> - unsigned int engine_class, engine_instance;
> + unsigned int engine_class, engine_instance, function_id;
> u64 config = event->attr.config;
> struct xe_gt *gt;
>
> @@ -154,18 +162,28 @@ static bool event_param_valid(struct perf_event *event)
> if (!gt)
> return false;
>
> + function_id = config_to_function_id(config);
> + if (function_id && !IS_SRIOV_PF(xe))
hmm, it rather should be:
if (function_id && IS_SRIOV_VF(xe))
but (see below)
> + return false;
> +
> engine_class = config_to_engine_class(config);
> engine_instance = config_to_engine_instance(config);
>
> switch (config_to_event_id(config)) {
> case XE_PMU_EVENT_GT_C6_RESIDENCY:
> - if (engine_class || engine_instance)
> + if (engine_class || engine_instance || function_id)
> return false;
> break;
> case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
> case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
> if (!event_to_hwe(event))
> return false;
> + /*
> + * PF(0) and total vfs when SRIOV is enabled
> + */
> + if (function_id > xe_sriov_pf_get_totalvfs(xe))
shouldn't we rely on checks from one place?
likely xe_guc_engine_activity_xxx() will also have checks for
index/function and may use ea->num_functions for that
> + return false;
> +
> break;
> }
>
> @@ -233,18 +251,22 @@ static u64 read_engine_events(struct perf_event *event, u64 prev)
> struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
> struct xe_pmu *pmu = &xe->pmu;
> struct xe_hw_engine *hwe;
> - u64 val = 0;
> + unsigned int function_id;
> + u64 config, val = 0;
>
> if (!pmu->fw_count)
> return prev;
>
> + config = event->attr.config;
> + function_id = config_to_function_id(config);
> +
> hwe = event_to_hwe(event);
> if (!hwe)
> drm_warn(&xe->drm, "unknown pmu engine\n");
> - else if (config_to_event_id(event->attr.config) == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS)
> - val = xe_guc_engine_activity_active_ticks(hwe, 0);
> + else if (config_to_event_id(config) == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS)
> + val = xe_guc_engine_activity_active_ticks(hwe, function_id);
> else
> - val = xe_guc_engine_activity_total_ticks(hwe, 0);
> + val = xe_guc_engine_activity_total_ticks(hwe, function_id);
>
> return val;
> }
> @@ -347,6 +369,7 @@ static void xe_pmu_event_del(struct perf_event *event, int flags)
> }
>
> PMU_FORMAT_ATTR(gt, "config:60-63");
> +PMU_FORMAT_ATTR(function, "config:44-59");
> PMU_FORMAT_ATTR(engine_class, "config:20-27");
> PMU_FORMAT_ATTR(engine_instance, "config:12-19");
> PMU_FORMAT_ATTR(event, "config:0-11");
> @@ -355,6 +378,7 @@ static struct attribute *pmu_format_attrs[] = {
> &format_attr_event.attr,
> &format_attr_engine_class.attr,
> &format_attr_engine_instance.attr,
> + &format_attr_function.attr,
> &format_attr_gt.attr,
> NULL,
> };
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 8/8] drm/xe/pf: Enable per-function engine activity stats
2025-02-06 10:43 ` [PATCH v5 8/8] drm/xe/pf: Enable " Riana Tauro
2025-02-06 11:20 ` Riana Tauro
@ 2025-02-06 19:29 ` Michal Wajdeczko
2025-02-07 6:25 ` Riana Tauro
1 sibling, 1 reply; 39+ messages in thread
From: Michal Wajdeczko @ 2025-02-06 19:29 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi,
vinay.belgaumkar, soham.purkait
On 06.02.2025 11:43, Riana Tauro wrote:
> Enable per-function engine activity stats when
> sriov_numvfs are set and disable when sriov_numvfs
> are set to 0.
instead referring to magic 'sriov_numvfs' attribute name just say
... when VFs are enabled / disabled
>
> Also restart engine stats when VF's are reprovisioned
shouldn't engine_activity take care of this on GT-reset on it's own?
it shouldn't be tied to PF config/provisioning code
>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 26 ++++++++++++++++++++--
> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h | 1 +
> drivers/gpu/drm/xe/xe_pci_sriov.c | 25 +++++++++++++++++++++
> 3 files changed, 50 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> index b1d994d65589..25855dcb6e42 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> @@ -23,6 +23,7 @@
> #include "xe_guc_buf.h"
> #include "xe_guc_ct.h"
> #include "xe_guc_db_mgr.h"
> +#include "xe_guc_engine_activity.h"
> #include "xe_guc_fwif.h"
> #include "xe_guc_id_mgr.h"
> #include "xe_guc_klv_helpers.h"
> @@ -1972,6 +1973,21 @@ static void pf_reset_config_thresholds(struct xe_gt *gt, struct xe_gt_sriov_conf
> #undef reset_threshold_config
> }
>
> +/**
> + * xe_gt_sriov_pf_engine_stats - Enable/Disable engine stats for PF and VFs
> + * @gt: the &xe_gt
> + * @num_vfs: number of VFs to enable
> + * @enable: enable/disable
> + *
> + * Enable or disable engine stats for PF and VF
> + *
> + * Return: 0 on success, negative error code otherwise
> + */
> +int xe_gt_sriov_pf_config_engine_stats(struct xe_gt *gt, unsigned int num_vfs, bool enable)
wrong place
this is not a config/provisioning related code
> +{
> + return xe_guc_engine_activity_function_stats(>->uc.guc, num_vfs, enable);
> +}
> +
> static void pf_release_vf_config(struct xe_gt *gt, unsigned int vfid)
> {
> struct xe_gt_sriov_config *config = pf_pick_vf_config(gt, vfid);
> @@ -2362,8 +2378,10 @@ int xe_gt_sriov_pf_config_restore(struct xe_gt *gt, unsigned int vfid,
> */
> void xe_gt_sriov_pf_config_restart(struct xe_gt *gt)
> {
> - unsigned int n, total_vfs = xe_sriov_pf_get_totalvfs(gt_to_xe(gt));
> - unsigned int fail = 0, skip = 0;
> + struct xe_device *xe = gt_to_xe(gt);
> + unsigned int n, total_vfs = xe_sriov_pf_get_totalvfs(xe);
> + u16 num_vfs = pci_num_vf(to_pci_dev(xe->drm.dev));
> + unsigned int fail = 0, skip = 0, ret = 0;
>
> for (n = 1; n <= total_vfs; n++) {
> if (xe_gt_sriov_pf_config_is_empty(gt, n))
> @@ -2372,6 +2390,10 @@ void xe_gt_sriov_pf_config_restart(struct xe_gt *gt)
> fail++;
> }
>
> + ret = xe_gt_sriov_pf_config_engine_stats(gt, num_vfs, true);
> + if (ret)
> + xe_gt_sriov_dbg(gt, "Failed to enable engine stats for PF and VF's %d\n",
> + ret);
> if (fail)
> xe_gt_sriov_notice(gt, "Failed to push %u of %u VF%s configurations\n",
> fail, total_vfs - skip, str_plural(total_vfs));
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h
> index f894e9d4abba..a5585b178e6b 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h
> @@ -62,6 +62,7 @@ int xe_gt_sriov_pf_config_restore(struct xe_gt *gt, unsigned int vfid,
> const void *buf, size_t size);
>
> bool xe_gt_sriov_pf_config_is_empty(struct xe_gt *gt, unsigned int vfid);
> +int xe_gt_sriov_pf_config_engine_stats(struct xe_gt *gt, unsigned int num_vfs, bool enable);
>
> void xe_gt_sriov_pf_config_restart(struct xe_gt *gt);
>
> diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c
> index aaceee748287..612e64efb43c 100644
> --- a/drivers/gpu/drm/xe/xe_pci_sriov.c
> +++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
> @@ -62,6 +62,21 @@ static void pf_reset_vfs(struct xe_device *xe, unsigned int num_vfs)
> xe_gt_sriov_pf_control_trigger_flr(gt, n);
> }
>
> +static int pf_engine_activity_stats(struct xe_device *xe, unsigned int num_vfs, bool enable)
> +{
> + struct xe_gt *gt;
> + unsigned int id;
> + int ret = 0;
> +
> + for_each_gt(gt, xe, id) {
> + ret = xe_gt_sriov_pf_config_engine_stats(gt, num_vfs, enable);
can't you directly call xe_guc_engine_activity_function_stats() here?
> + if (ret)
> + return ret;
should we give up on the first failure? maybe just track first error?
> + }
> +
> + return ret;
it will be always 0 here
but if we just track errors instead of early exit then we could print
message here:
xe_sriov_info(xe, "Failed to %s function activity stats (%pe)\n",
str_enable_disable(enable), ERR_PTR(first_error));
> +}
> +
> static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
> {
> struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> @@ -94,6 +109,11 @@ static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
>
> xe_sriov_info(xe, "Enabled %u of %u VF%s\n",
> num_vfs, total_vfs, str_plural(total_vfs));
> +
> + err = pf_engine_activity_stats(xe, num_vfs, true);
> + if (err < 0)
> + xe_sriov_warn(xe, "Failed to enable function activity stats\n");
> +
> return num_vfs;
>
> failed:
> @@ -110,6 +130,7 @@ static int pf_disable_vfs(struct xe_device *xe)
> struct device *dev = xe->drm.dev;
> struct pci_dev *pdev = to_pci_dev(dev);
> u16 num_vfs = pci_num_vf(pdev);
> + int err;
>
> xe_assert(xe, IS_SRIOV_PF(xe));
> xe_sriov_dbg(xe, "disabling %u VF%s\n", num_vfs, str_plural(num_vfs));
> @@ -117,6 +138,10 @@ static int pf_disable_vfs(struct xe_device *xe)
> if (!num_vfs)
> return 0;
>
> + err = pf_engine_activity_stats(xe, num_vfs, false);
> + if (err < 0)
> + xe_sriov_warn(xe, "Failed to disable function activity stats\n");
> +
> pci_disable_sriov(pdev);
>
> pf_reset_vfs(xe, num_vfs);
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 5/8] drm/xe/xe_pmu: Acquire forcewake on event init for engine events
2025-02-06 10:43 ` [PATCH v5 5/8] drm/xe/xe_pmu: Acquire forcewake on event init for engine events Riana Tauro
@ 2025-02-07 3:09 ` Ghimiray, Himal Prasad
2025-02-07 6:18 ` Riana Tauro
0 siblings, 1 reply; 39+ messages in thread
From: Ghimiray, Himal Prasad @ 2025-02-07 3:09 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi,
vinay.belgaumkar, soham.purkait, Rodrigo Vivi
On 06-02-2025 16:13, Riana Tauro wrote:
> When the engine events are created, acquire GT forcewake to read gpm
> timestamp required for the events and release on event destroy. This
> cannot be done during read due to the raw spinlock held my pmu.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> drivers/gpu/drm/xe/xe_pmu.c | 47 +++++++++++++++++++++++++++++--
> drivers/gpu/drm/xe/xe_pmu_types.h | 8 ++++++
> 2 files changed, 53 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
> index 06a1c72a3838..5b5fe4424aba 100644
> --- a/drivers/gpu/drm/xe/xe_pmu.c
> +++ b/drivers/gpu/drm/xe/xe_pmu.c
> @@ -7,6 +7,7 @@
> #include <linux/device.h>
>
> #include "xe_device.h"
> +#include "xe_force_wake.h"
> #include "xe_gt_idle.h"
> #include "xe_guc_engine_activity.h"
> #include "xe_hw_engine.h"
> @@ -102,6 +103,36 @@ static struct xe_hw_engine *event_to_hwe(struct perf_event *event)
> return hwe;
> }
>
> +static bool is_engine_event(u64 config)
> +{
> + unsigned int event_id = config_to_event_id(config);
> +
> + return (event_id == XE_PMU_EVENT_ENGINE_TOTAL_TICKS ||
> + event_id == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
> +}
> +
> +static void event_gt_forcewake(struct perf_event *event)
> +{
> + struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
> + u64 config = event->attr.config;
> + struct xe_pmu *pmu = &xe->pmu;
> + struct xe_gt *gt;
> + unsigned int fw_ref;
> +
> + gt = xe_device_get_gt(xe, config_to_gt_id(config));
> + if (!gt || !is_engine_event(config))
> + return;
> +
> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
> + if (!fw_ref)
> + return;
> +
> + if (!pmu->fw_ref)
> + pmu->fw_ref = fw_ref;
> +
> + pmu->fw_count++;
> +}
> +
> static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
> unsigned int id)
> {
> @@ -144,6 +175,13 @@ static bool event_param_valid(struct perf_event *event)
> static void xe_pmu_event_destroy(struct perf_event *event)
> {
> struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
> + struct xe_pmu *pmu = &xe->pmu;
> + struct xe_gt *gt;
> +
> + if (pmu->fw_count--) {
> + gt = xe_device_get_gt(xe, config_to_gt_id(event->attr.config));
> + xe_force_wake_put(gt_to_fw(gt), pmu->fw_ref);
> + }
Considering that fw->lock will be acquired and released multiple times
during the put operation, this might create an overhead.
How about implementing a _put function that can take the number of
refcounts to decrement as an input parameter, similar to
xe_force_wake_put_many?
If the overhead has already been considered and found to be acceptable,
I am fine with avoiding unnecessary modifications to this patch.
>
> drm_WARN_ON(&xe->drm, event->parent);
> xe_pm_runtime_put(xe);
> @@ -183,18 +221,23 @@ static int xe_pmu_event_init(struct perf_event *event)
> if (!event->parent) {
> drm_dev_get(&xe->drm);
> xe_pm_runtime_get(xe);
> + event_gt_forcewake(event);
> event->destroy = xe_pmu_event_destroy;
> }
>
> return 0;
> }
>
> -static u64 read_engine_events(struct perf_event *event)
> +static u64 read_engine_events(struct perf_event *event, u64 prev)
> {
> struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
> + struct xe_pmu *pmu = &xe->pmu;
> struct xe_hw_engine *hwe;
> u64 val = 0;
>
> + if (!pmu->fw_count)
> + return prev;
> +
> hwe = event_to_hwe(event);
> if (!hwe)
> drm_warn(&xe->drm, "unknown pmu engine\n");
> @@ -218,7 +261,7 @@ static u64 __xe_pmu_event_read(struct perf_event *event, u64 prev)
> return xe_gt_idle_residency_msec(>->gtidle);
> case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
> case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
> - return read_engine_events(event);
> + return read_engine_events(event, prev);
> }
>
> return 0;
> diff --git a/drivers/gpu/drm/xe/xe_pmu_types.h b/drivers/gpu/drm/xe/xe_pmu_types.h
> index f5ba4d56622c..134b3400b19c 100644
> --- a/drivers/gpu/drm/xe/xe_pmu_types.h
> +++ b/drivers/gpu/drm/xe/xe_pmu_types.h
> @@ -30,6 +30,14 @@ struct xe_pmu {
> * @name: Name as registered with perf core.
> */
> const char *name;
> + /**
> + * @fw_ref: force_wake ref
> + */
> + unsigned int fw_ref;
> + /**
> + * @fw_count: force_wake count
> + */
> + unsigned int fw_count;
> /**
> * @supported_events: Bitmap of supported events, indexed by event id
> */
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 5/8] drm/xe/xe_pmu: Acquire forcewake on event init for engine events
2025-02-07 3:09 ` Ghimiray, Himal Prasad
@ 2025-02-07 6:18 ` Riana Tauro
2025-02-07 6:51 ` Ghimiray, Himal Prasad
0 siblings, 1 reply; 39+ messages in thread
From: Riana Tauro @ 2025-02-07 6:18 UTC (permalink / raw)
To: Ghimiray, Himal Prasad, intel-xe
Cc: anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi,
vinay.belgaumkar, soham.purkait, Rodrigo Vivi
Hi Himal
On 2/7/2025 8:39 AM, Ghimiray, Himal Prasad wrote:
>
>
> On 06-02-2025 16:13, Riana Tauro wrote:
>> When the engine events are created, acquire GT forcewake to read gpm
>> timestamp required for the events and release on event destroy. This
>> cannot be done during read due to the raw spinlock held my pmu.
>>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_pmu.c | 47 +++++++++++++++++++++++++++++--
>> drivers/gpu/drm/xe/xe_pmu_types.h | 8 ++++++
>> 2 files changed, 53 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
>> index 06a1c72a3838..5b5fe4424aba 100644
>> --- a/drivers/gpu/drm/xe/xe_pmu.c
>> +++ b/drivers/gpu/drm/xe/xe_pmu.c
>> @@ -7,6 +7,7 @@
>> #include <linux/device.h>
>> #include "xe_device.h"
>> +#include "xe_force_wake.h"
>> #include "xe_gt_idle.h"
>> #include "xe_guc_engine_activity.h"
>> #include "xe_hw_engine.h"
>> @@ -102,6 +103,36 @@ static struct xe_hw_engine *event_to_hwe(struct
>> perf_event *event)
>> return hwe;
>> }
>> +static bool is_engine_event(u64 config)
>> +{
>> + unsigned int event_id = config_to_event_id(config);
>> +
>> + return (event_id == XE_PMU_EVENT_ENGINE_TOTAL_TICKS ||
>> + event_id == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
>> +}
>> +
>> +static void event_gt_forcewake(struct perf_event *event)
>> +{
>> + struct xe_device *xe = container_of(event->pmu, typeof(*xe),
>> pmu.base);
>> + u64 config = event->attr.config;
>> + struct xe_pmu *pmu = &xe->pmu;
>> + struct xe_gt *gt;
>> + unsigned int fw_ref;
>> +
>> + gt = xe_device_get_gt(xe, config_to_gt_id(config));
>> + if (!gt || !is_engine_event(config))
>> + return;
>> +
>> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
>> + if (!fw_ref)
>> + return;
>> +
>> + if (!pmu->fw_ref)
>> + pmu->fw_ref = fw_ref;
>> +
>> + pmu->fw_count++;
>> +}
>> +
>> static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
>> unsigned int id)
>> {
>> @@ -144,6 +175,13 @@ static bool event_param_valid(struct perf_event
>> *event)
>> static void xe_pmu_event_destroy(struct perf_event *event)
>> {
>> struct xe_device *xe = container_of(event->pmu, typeof(*xe),
>> pmu.base);
>> + struct xe_pmu *pmu = &xe->pmu;
>> + struct xe_gt *gt;
>> +
>> + if (pmu->fw_count--) {
>> + gt = xe_device_get_gt(xe, config_to_gt_id(event->attr.config));
>> + xe_force_wake_put(gt_to_fw(gt), pmu->fw_ref);
>> + }
>
>
> Considering that fw->lock will be acquired and released multiple times
> during the put operation, this might create an overhead.
>
> How about implementing a _put function that can take the number of
> refcounts to decrement as an input parameter, similar to
> xe_force_wake_put_many?
Could you give more details on your suggestion? Would put_many just
decrement the count? But wouldn't that still require a lock? Multiple
event_destroys can call the function at the same time right?
One thing that can be done is to take forcewake on first count and
release it when the last event is destroyed in cases of multiple
pmu being used
>
> If the overhead has already been considered and found to be acceptable,
> I am fine with avoiding unnecessary modifications to this patch.
This is the first rev for this patch. Open to suggestions
Background for this patch: force_wake is needed to read the timestamp
register required for engine events.Cannot take it while reading the
register from pmu_read due to a lockdep splat (PROVE_RAW_LOCK_NESTING).
The suggestion was to take forcewake throughout the duration of event
being read
Thanks
Riana
>
>
>> drm_WARN_ON(&xe->drm, event->parent);
>> xe_pm_runtime_put(xe);
>> @@ -183,18 +221,23 @@ static int xe_pmu_event_init(struct perf_event
>> *event)
>> if (!event->parent) {
>> drm_dev_get(&xe->drm);
>> xe_pm_runtime_get(xe);
>> + event_gt_forcewake(event);
>> event->destroy = xe_pmu_event_destroy;
>> }
>> return 0;
>> }
>> -static u64 read_engine_events(struct perf_event *event)
>> +static u64 read_engine_events(struct perf_event *event, u64 prev)
>> {
>> struct xe_device *xe = container_of(event->pmu, typeof(*xe),
>> pmu.base);
>> + struct xe_pmu *pmu = &xe->pmu;
>> struct xe_hw_engine *hwe;
>> u64 val = 0;
>> + if (!pmu->fw_count)
>> + return prev;
>> +
>> hwe = event_to_hwe(event);
>> if (!hwe)
>> drm_warn(&xe->drm, "unknown pmu engine\n");
>> @@ -218,7 +261,7 @@ static u64 __xe_pmu_event_read(struct perf_event
>> *event, u64 prev)
>> return xe_gt_idle_residency_msec(>->gtidle);
>> case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
>> case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
>> - return read_engine_events(event);
>> + return read_engine_events(event, prev);
>> }
>> return 0;
>> diff --git a/drivers/gpu/drm/xe/xe_pmu_types.h b/drivers/gpu/drm/xe/
>> xe_pmu_types.h
>> index f5ba4d56622c..134b3400b19c 100644
>> --- a/drivers/gpu/drm/xe/xe_pmu_types.h
>> +++ b/drivers/gpu/drm/xe/xe_pmu_types.h
>> @@ -30,6 +30,14 @@ struct xe_pmu {
>> * @name: Name as registered with perf core.
>> */
>> const char *name;
>> + /**
>> + * @fw_ref: force_wake ref
>> + */
>> + unsigned int fw_ref;
>> + /**
>> + * @fw_count: force_wake count
>> + */
>> + unsigned int fw_count;
>> /**
>> * @supported_events: Bitmap of supported events, indexed by
>> event id
>> */
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 8/8] drm/xe/pf: Enable per-function engine activity stats
2025-02-06 19:29 ` Michal Wajdeczko
@ 2025-02-07 6:25 ` Riana Tauro
0 siblings, 0 replies; 39+ messages in thread
From: Riana Tauro @ 2025-02-07 6:25 UTC (permalink / raw)
To: Michal Wajdeczko, intel-xe
Cc: anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi,
vinay.belgaumkar, soham.purkait
Hi Michal
On 2/7/2025 12:59 AM, Michal Wajdeczko wrote:
>
>
> On 06.02.2025 11:43, Riana Tauro wrote:
>> Enable per-function engine activity stats when
>> sriov_numvfs are set and disable when sriov_numvfs
>> are set to 0.
>
> instead referring to magic 'sriov_numvfs' attribute name just say
>
> ... when VFs are enabled / disabled
Okay will change this
>
>>
>> Also restart engine stats when VF's are reprovisioned
>
> shouldn't engine_activity take care of this on GT-reset on it's own?
> it shouldn't be tied to PF config/provisioning code
Wanted to add it after reprovisioning of VF's. Will move it out to
guc code
>
>>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 26 ++++++++++++++++++++--
>> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h | 1 +
>> drivers/gpu/drm/xe/xe_pci_sriov.c | 25 +++++++++++++++++++++
>> 3 files changed, 50 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
>> index b1d994d65589..25855dcb6e42 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
>> @@ -23,6 +23,7 @@
>> #include "xe_guc_buf.h"
>> #include "xe_guc_ct.h"
>> #include "xe_guc_db_mgr.h"
>> +#include "xe_guc_engine_activity.h"
>> #include "xe_guc_fwif.h"
>> #include "xe_guc_id_mgr.h"
>> #include "xe_guc_klv_helpers.h"
>> @@ -1972,6 +1973,21 @@ static void pf_reset_config_thresholds(struct xe_gt *gt, struct xe_gt_sriov_conf
>> #undef reset_threshold_config
>> }
>>
>> +/**
>> + * xe_gt_sriov_pf_engine_stats - Enable/Disable engine stats for PF and VFs
>> + * @gt: the &xe_gt
>> + * @num_vfs: number of VFs to enable
>> + * @enable: enable/disable
>> + *
>> + * Enable or disable engine stats for PF and VF
>> + *
>> + * Return: 0 on success, negative error code otherwise
>> + */
>> +int xe_gt_sriov_pf_config_engine_stats(struct xe_gt *gt, unsigned int num_vfs, bool enable)
>
> wrong place
> this is not a config/provisioning related code
>
>> +{
>> + return xe_guc_engine_activity_function_stats(>->uc.guc, num_vfs, enable);
>> +}
>> +
>> static void pf_release_vf_config(struct xe_gt *gt, unsigned int vfid)
>> {
>> struct xe_gt_sriov_config *config = pf_pick_vf_config(gt, vfid);
>> @@ -2362,8 +2378,10 @@ int xe_gt_sriov_pf_config_restore(struct xe_gt *gt, unsigned int vfid,
>> */
>> void xe_gt_sriov_pf_config_restart(struct xe_gt *gt)
>> {
>> - unsigned int n, total_vfs = xe_sriov_pf_get_totalvfs(gt_to_xe(gt));
>> - unsigned int fail = 0, skip = 0;
>> + struct xe_device *xe = gt_to_xe(gt);
>> + unsigned int n, total_vfs = xe_sriov_pf_get_totalvfs(xe);
>> + u16 num_vfs = pci_num_vf(to_pci_dev(xe->drm.dev));
>> + unsigned int fail = 0, skip = 0, ret = 0;
>>
>> for (n = 1; n <= total_vfs; n++) {
>> if (xe_gt_sriov_pf_config_is_empty(gt, n))
>> @@ -2372,6 +2390,10 @@ void xe_gt_sriov_pf_config_restart(struct xe_gt *gt)
>> fail++;
>> }
>>
>> + ret = xe_gt_sriov_pf_config_engine_stats(gt, num_vfs, true);
>> + if (ret)
>> + xe_gt_sriov_dbg(gt, "Failed to enable engine stats for PF and VF's %d\n",
>> + ret);
>> if (fail)
>> xe_gt_sriov_notice(gt, "Failed to push %u of %u VF%s configurations\n",
>> fail, total_vfs - skip, str_plural(total_vfs));
>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h
>> index f894e9d4abba..a5585b178e6b 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h
>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h
>> @@ -62,6 +62,7 @@ int xe_gt_sriov_pf_config_restore(struct xe_gt *gt, unsigned int vfid,
>> const void *buf, size_t size);
>>
>> bool xe_gt_sriov_pf_config_is_empty(struct xe_gt *gt, unsigned int vfid);
>> +int xe_gt_sriov_pf_config_engine_stats(struct xe_gt *gt, unsigned int num_vfs, bool enable);
>>
>> void xe_gt_sriov_pf_config_restart(struct xe_gt *gt);
>>
>> diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c
>> index aaceee748287..612e64efb43c 100644
>> --- a/drivers/gpu/drm/xe/xe_pci_sriov.c
>> +++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
>> @@ -62,6 +62,21 @@ static void pf_reset_vfs(struct xe_device *xe, unsigned int num_vfs)
>> xe_gt_sriov_pf_control_trigger_flr(gt, n);
>> }
>>
>> +static int pf_engine_activity_stats(struct xe_device *xe, unsigned int num_vfs, bool enable)
>> +{
>> + struct xe_gt *gt;
>> + unsigned int id;
>> + int ret = 0;
>> +
>> + for_each_gt(gt, xe, id) {
>> + ret = xe_gt_sriov_pf_config_engine_stats(gt, num_vfs, enable);
>
> can't you directly call xe_guc_engine_activity_function_stats() here?
first patch had that. I added to pf_config for the restart on
suspend/resume and gt reset. Will move it out.
>
>> + if (ret)
>> + return ret;
>
> should we give up on the first failure? maybe just track first error?
>
>> + }
>> +
>> + return ret;
>
> it will be always 0 here
>
> but if we just track errors instead of early exit then we could print
> message here:
>
> xe_sriov_info(xe, "Failed to %s function activity stats (%pe)\n",
> str_enable_disable(enable), ERR_PTR(first_error));
Will fix this.
Thank you
Riana
>
>> +}
>> +
>> static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
>> {
>> struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
>> @@ -94,6 +109,11 @@ static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
>>
>> xe_sriov_info(xe, "Enabled %u of %u VF%s\n",
>> num_vfs, total_vfs, str_plural(total_vfs));
>> +
>> + err = pf_engine_activity_stats(xe, num_vfs, true);
>> + if (err < 0)
>> + xe_sriov_warn(xe, "Failed to enable function activity stats\n");
>> +
>> return num_vfs;
>>
>> failed:
>> @@ -110,6 +130,7 @@ static int pf_disable_vfs(struct xe_device *xe)
>> struct device *dev = xe->drm.dev;
>> struct pci_dev *pdev = to_pci_dev(dev);
>> u16 num_vfs = pci_num_vf(pdev);
>> + int err;
>>
>> xe_assert(xe, IS_SRIOV_PF(xe));
>> xe_sriov_dbg(xe, "disabling %u VF%s\n", num_vfs, str_plural(num_vfs));
>> @@ -117,6 +138,10 @@ static int pf_disable_vfs(struct xe_device *xe)
>> if (!num_vfs)
>> return 0;
>>
>> + err = pf_engine_activity_stats(xe, num_vfs, false);
>> + if (err < 0)
>> + xe_sriov_warn(xe, "Failed to disable function activity stats\n");
>> +
>> pci_disable_sriov(pdev);
>>
>> pf_reset_vfs(xe, num_vfs);
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 5/8] drm/xe/xe_pmu: Acquire forcewake on event init for engine events
2025-02-07 6:18 ` Riana Tauro
@ 2025-02-07 6:51 ` Ghimiray, Himal Prasad
2025-02-07 23:31 ` Umesh Nerlige Ramappa
0 siblings, 1 reply; 39+ messages in thread
From: Ghimiray, Himal Prasad @ 2025-02-07 6:51 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi,
vinay.belgaumkar, soham.purkait, Rodrigo Vivi
On 07-02-2025 11:48, Riana Tauro wrote:
>
> Hi Himal
>
> On 2/7/2025 8:39 AM, Ghimiray, Himal Prasad wrote:
>>
>>
>> On 06-02-2025 16:13, Riana Tauro wrote:
>>> When the engine events are created, acquire GT forcewake to read gpm
>>> timestamp required for the events and release on event destroy. This
>>> cannot be done during read due to the raw spinlock held my pmu.
>>>
>>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>>> ---
>>> drivers/gpu/drm/xe/xe_pmu.c | 47 +++++++++++++++++++++++++++++--
>>> drivers/gpu/drm/xe/xe_pmu_types.h | 8 ++++++
>>> 2 files changed, 53 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
>>> index 06a1c72a3838..5b5fe4424aba 100644
>>> --- a/drivers/gpu/drm/xe/xe_pmu.c
>>> +++ b/drivers/gpu/drm/xe/xe_pmu.c
>>> @@ -7,6 +7,7 @@
>>> #include <linux/device.h>
>>> #include "xe_device.h"
>>> +#include "xe_force_wake.h"
>>> #include "xe_gt_idle.h"
>>> #include "xe_guc_engine_activity.h"
>>> #include "xe_hw_engine.h"
>>> @@ -102,6 +103,36 @@ static struct xe_hw_engine *event_to_hwe(struct
>>> perf_event *event)
>>> return hwe;
>>> }
>>> +static bool is_engine_event(u64 config)
>>> +{
>>> + unsigned int event_id = config_to_event_id(config);
>>> +
>>> + return (event_id == XE_PMU_EVENT_ENGINE_TOTAL_TICKS ||
>>> + event_id == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
>>> +}
>>> +
>>> +static void event_gt_forcewake(struct perf_event *event)
>>> +{
>>> + struct xe_device *xe = container_of(event->pmu, typeof(*xe),
>>> pmu.base);
>>> + u64 config = event->attr.config;
>>> + struct xe_pmu *pmu = &xe->pmu;
>>> + struct xe_gt *gt;
>>> + unsigned int fw_ref;
>>> +
>>> + gt = xe_device_get_gt(xe, config_to_gt_id(config));
>>> + if (!gt || !is_engine_event(config))
>>> + return;
>>> +
>>> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
>>> + if (!fw_ref)
>>> + return;
>>> +
>>> + if (!pmu->fw_ref)
>>> + pmu->fw_ref = fw_ref;
>>> +
>>> + pmu->fw_count++;
>>> +}
>>> +
>>> static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
>>> unsigned int id)
>>> {
>>> @@ -144,6 +175,13 @@ static bool event_param_valid(struct perf_event
>>> *event)
>>> static void xe_pmu_event_destroy(struct perf_event *event)
>>> {
>>> struct xe_device *xe = container_of(event->pmu, typeof(*xe),
>>> pmu.base);
>>> + struct xe_pmu *pmu = &xe->pmu;
>>> + struct xe_gt *gt;
>>> +
>>> + if (pmu->fw_count--) {
>>> + gt = xe_device_get_gt(xe, config_to_gt_id(event->attr.config));
>>> + xe_force_wake_put(gt_to_fw(gt), pmu->fw_ref);
>>> + }
>>
>>
>> Considering that fw->lock will be acquired and released multiple times
>> during the put operation, this might create an overhead.
>>
>> How about implementing a _put function that can take the number of
>> refcounts to decrement as an input parameter, similar to
>> xe_force_wake_put_many?
> Could you give more details on your suggestion? Would put_many just
> decrement the count? But wouldn't that still require a lock? Multiple
> event_destroys can call the function at the same time right?
I was thinking about putting all refcounts at the end of last event
destroy in case of multiple pmu's.
>
>
> One thing that can be done is to take forcewake on first count and
> release it when the last event is destroyed in cases of multiple
> pmu being used
This sounds even better.
>>
>> If the overhead has already been considered and found to be
>> acceptable, I am fine with avoiding unnecessary modifications to this
>> patch.
> This is the first rev for this patch. Open to suggestions
>
> Background for this patch: force_wake is needed to read the timestamp
> register required for engine events.Cannot take it while reading the
> register from pmu_read due to a lockdep splat (PROVE_RAW_LOCK_NESTING).
>
> The suggestion was to take forcewake throughout the duration of event
> being read
>
> Thanks
> Riana
>>
>>
>>> drm_WARN_ON(&xe->drm, event->parent);
>>> xe_pm_runtime_put(xe);
>>> @@ -183,18 +221,23 @@ static int xe_pmu_event_init(struct perf_event
>>> *event)
>>> if (!event->parent) {
>>> drm_dev_get(&xe->drm);
>>> xe_pm_runtime_get(xe);
>>> + event_gt_forcewake(event);
>>> event->destroy = xe_pmu_event_destroy;
>>> }
>>> return 0;
>>> }
>>> -static u64 read_engine_events(struct perf_event *event)
>>> +static u64 read_engine_events(struct perf_event *event, u64 prev)
>>> {
>>> struct xe_device *xe = container_of(event->pmu, typeof(*xe),
>>> pmu.base);
>>> + struct xe_pmu *pmu = &xe->pmu;
>>> struct xe_hw_engine *hwe;
>>> u64 val = 0;
>>> + if (!pmu->fw_count)
>>> + return prev;
>>> +
>>> hwe = event_to_hwe(event);
>>> if (!hwe)
>>> drm_warn(&xe->drm, "unknown pmu engine\n");
>>> @@ -218,7 +261,7 @@ static u64 __xe_pmu_event_read(struct perf_event
>>> *event, u64 prev)
>>> return xe_gt_idle_residency_msec(>->gtidle);
>>> case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
>>> case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
>>> - return read_engine_events(event);
>>> + return read_engine_events(event, prev);
>>> }
>>> return 0;
>>> diff --git a/drivers/gpu/drm/xe/xe_pmu_types.h b/drivers/gpu/drm/xe/
>>> xe_pmu_types.h
>>> index f5ba4d56622c..134b3400b19c 100644
>>> --- a/drivers/gpu/drm/xe/xe_pmu_types.h
>>> +++ b/drivers/gpu/drm/xe/xe_pmu_types.h
>>> @@ -30,6 +30,14 @@ struct xe_pmu {
>>> * @name: Name as registered with perf core.
>>> */
>>> const char *name;
>>> + /**
>>> + * @fw_ref: force_wake ref
>>> + */
>>> + unsigned int fw_ref;
>>> + /**
>>> + * @fw_count: force_wake count
>>> + */
>>> + unsigned int fw_count;
>>> /**
>>> * @supported_events: Bitmap of supported events, indexed by
>>> event id
>>> */
>>
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 7/8] drm/xe/xe_pmu: Add pmu support for per-function engine activity stats
2025-02-06 19:15 ` Michal Wajdeczko
@ 2025-02-07 7:52 ` Riana Tauro
0 siblings, 0 replies; 39+ messages in thread
From: Riana Tauro @ 2025-02-07 7:52 UTC (permalink / raw)
To: Michal Wajdeczko, intel-xe
Cc: anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi,
vinay.belgaumkar, soham.purkait
Hi Michal
On 2/7/2025 12:45 AM, Michal Wajdeczko wrote:
>
>
> On 06.02.2025 11:43, Riana Tauro wrote:
>> Add pmu support for per-function engine activity
>> stats.
>
> PMU ?
> unneeded line wrap ?
Will fix this
>
>>
>> per-function engine activity is enabled when sriov_numvfs
>> are set. If sriov_numvfs is set to 2, then the applicable function
>> values are
>>
>> 0 - PF engine activity
>> 1,2 - per-VF engine activity from PF
>
> 0 - PF engine activity
> 1 - VF1 engine activity
> 2 - VF2 engine activity
Will add this
>
> but maybe better to show full entries:
>
> xe_0000_03_00.0/engine...ticks/ - PF activity
> xe_0000_03_00.1/engine...ticks/ - VF1 activity
> xe_0000_03_00.2/engine...ticks/ - VF2 activity
This is not the case since here PF is monitoring the engine activity of
VF's. Not VF reporting the engine activity stats.
So the function id's are sent to PF to get engine activity stats
>
> as 'function' term here matches 'PCI function'
>
>>
>> This can be read from perf tool as shown below
>>
>> ./perf stat -e xe_<bdf>/engine-active-ticks,gt=0,engine_class=0,
>> engine_instance=0,function=1/ -I 1000
>>
>> v2: fix documentation (Umesh)
>> remove global for functions (Lucas, Michal)
>>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_pmu.c | 38 ++++++++++++++++++++++++++++++-------
>> 1 file changed, 31 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
>> index a758fc517048..66cf2ece97ec 100644
>> --- a/drivers/gpu/drm/xe/xe_pmu.c
>> +++ b/drivers/gpu/drm/xe/xe_pmu.c
>> @@ -13,6 +13,7 @@
>> #include "xe_hw_engine.h"
>> #include "xe_pm.h"
>> #include "xe_pmu.h"
>> +#include "xe_sriov_pf_helpers.h"
>>
>> /**
>> * DOC: Xe PMU (Performance Monitoring Unit)
>> @@ -32,9 +33,10 @@
>> * gt[60:63] Selects gt for the event
>> * engine_class[20:27] Selects engine-class for event
>> * engine_instance[12:19] Selects the engine-instance for the event
>> + * function[44:59] Selects the function of the event (SRIOV enabled)
>> *
>> * For engine specific events (engine-*), gt, engine_class and engine_instance parameters must be
>> - * set as populated by DRM_XE_DEVICE_QUERY_ENGINES.
>> + * set as populated by DRM_XE_DEVICE_QUERY_ENGINES and function if SRIOV is enabled.
>> *
>> * For gt specific events (gt-*) gt parameter must be passed. All other parameters will be 0.
>> *
>> @@ -49,6 +51,7 @@
>> */
>>
>> #define XE_PMU_EVENT_GT_MASK GENMASK_ULL(63, 60)
>> +#define XE_PMU_EVENT_FUNCTION_MASK GENMASK_ULL(59, 44)
>> #define XE_PMU_EVENT_ENGINE_CLASS_MASK GENMASK_ULL(27, 20)
>> #define XE_PMU_EVENT_ENGINE_INSTANCE_MASK GENMASK_ULL(19, 12)
>> #define XE_PMU_EVENT_ID_MASK GENMASK_ULL(11, 0)
>> @@ -58,6 +61,11 @@ static unsigned int config_to_event_id(u64 config)
>> return FIELD_GET(XE_PMU_EVENT_ID_MASK, config);
>> }
>>
>> +static unsigned int config_to_function_id(u64 config)
>> +{
>> + return FIELD_GET(XE_PMU_EVENT_FUNCTION_MASK, config);
>> +}
>> +
>> static unsigned int config_to_engine_class(u64 config)
>> {
>> return FIELD_GET(XE_PMU_EVENT_ENGINE_CLASS_MASK, config);
>> @@ -146,7 +154,7 @@ static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
>> static bool event_param_valid(struct perf_event *event)
>> {
>> struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
>> - unsigned int engine_class, engine_instance;
>> + unsigned int engine_class, engine_instance, function_id;
>> u64 config = event->attr.config;
>> struct xe_gt *gt;
>>
>> @@ -154,18 +162,28 @@ static bool event_param_valid(struct perf_event *event)
>> if (!gt)
>> return false;
>>
>> + function_id = config_to_function_id(config);
>> + if (function_id && !IS_SRIOV_PF(xe))
>
> hmm, it rather should be:
>
> if (function_id && IS_SRIOV_VF(xe))
This path is not hit for VF
The perf_pmu_register doesn't initialize for VF's
if (IS_SRIOV_VF(xe))
return 0;
function id is applicable only when SRIOV is enabled and VF engine
activity is requested from PF. Hence SRIOV_PF here and the check to
see if function_id is valid
>
> but (see below)
>
>> + return false;
>> +
>> engine_class = config_to_engine_class(config);
>> engine_instance = config_to_engine_instance(config);
>>
>> switch (config_to_event_id(config)) {
>> case XE_PMU_EVENT_GT_C6_RESIDENCY:
>> - if (engine_class || engine_instance)
>> + if (engine_class || engine_instance || function_id)
>> return false;
>> break;
>> case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
>> case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
>> if (!event_to_hwe(event))
>> return false;
>> + /*
>> + * PF(0) and total vfs when SRIOV is enabled
>> + */
>> + if (function_id > xe_sriov_pf_get_totalvfs(xe))
>
> shouldn't we rely on checks from one place?
>
will move it to one place
> likely xe_guc_engine_activity_xxx() will also have checks for
> index/function and may use ea->num_functions for that
event and params support is checked in pmu_event init.
There are additional checks while reading too but the init will return
not supported if events/functions/parameters are not valid.
Thanks
Riana
>
>> + return false;
>> +
>> break;
>> }
>>
>> @@ -233,18 +251,22 @@ static u64 read_engine_events(struct perf_event *event, u64 prev)
>> struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
>> struct xe_pmu *pmu = &xe->pmu;
>> struct xe_hw_engine *hwe;
>> - u64 val = 0;
>> + unsigned int function_id;
>> + u64 config, val = 0;
>>
>> if (!pmu->fw_count)
>> return prev;
>>
>> + config = event->attr.config;
>> + function_id = config_to_function_id(config);
>> +
>> hwe = event_to_hwe(event);
>> if (!hwe)
>> drm_warn(&xe->drm, "unknown pmu engine\n");
>> - else if (config_to_event_id(event->attr.config) == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS)
>> - val = xe_guc_engine_activity_active_ticks(hwe, 0);
>> + else if (config_to_event_id(config) == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS)
>> + val = xe_guc_engine_activity_active_ticks(hwe, function_id);
>> else
>> - val = xe_guc_engine_activity_total_ticks(hwe, 0);
>> + val = xe_guc_engine_activity_total_ticks(hwe, function_id);
>>
>> return val;
>> }
>> @@ -347,6 +369,7 @@ static void xe_pmu_event_del(struct perf_event *event, int flags)
>> }
>>
>> PMU_FORMAT_ATTR(gt, "config:60-63");
>> +PMU_FORMAT_ATTR(function, "config:44-59");
>> PMU_FORMAT_ATTR(engine_class, "config:20-27");
>> PMU_FORMAT_ATTR(engine_instance, "config:12-19");
>> PMU_FORMAT_ATTR(event, "config:0-11");
>> @@ -355,6 +378,7 @@ static struct attribute *pmu_format_attrs[] = {
>> &format_attr_event.attr,
>> &format_attr_engine_class.attr,
>> &format_attr_engine_instance.attr,
>> + &format_attr_function.attr,
>> &format_attr_gt.attr,
>> NULL,
>> };
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 3/8] drm/xe/guc: Expose engine activity only for supported GuC version
2025-02-06 18:39 ` Michal Wajdeczko
@ 2025-02-07 7:59 ` Riana Tauro
0 siblings, 0 replies; 39+ messages in thread
From: Riana Tauro @ 2025-02-07 7:59 UTC (permalink / raw)
To: Michal Wajdeczko, intel-xe
Cc: anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi,
vinay.belgaumkar, soham.purkait, John Harrison
Hi Michal
On 2/7/2025 12:09 AM, Michal Wajdeczko wrote:
>
>
> On 06.02.2025 11:43, Riana Tauro wrote:
>> Engine activity is supported only on GuC submission version >= 1.14.1
>> Allow enabling/reading engine activity only on supported
>> GuC versions. Warn once if not supported.
>>
>> v2: use guc interface version (John)
>> v3: do not use drm_WARN (Umesh)
>> v4: use variable for supported and use gt logs
>> use a friendlier log message (Michal)
>>
>> Cc: John Harrison <John.C.Harrison@Intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_guc_engine_activity.c | 42 +++++++++++++++++++
>> drivers/gpu/drm/xe/xe_guc_engine_activity.h | 1 +
>> .../gpu/drm/xe/xe_guc_engine_activity_types.h | 3 ++
>> 3 files changed, 46 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>> index 9c08af273397..5d67fe38639a 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>> @@ -89,6 +89,22 @@ static int allocate_engine_activity_buffers(struct xe_guc *guc,
>> return 0;
>> }
>>
>> +static bool engine_activity_supported(struct xe_guc *guc)
>
> maybe rename it a little to distinguish from other function that just
> look at engine_activity->supported flag?
Hmm, this is static and internally used. Not sure what to rename it to
Is this okay ? is_engine_activity_supported
>
>> +{
>> + struct xe_uc_fw_version *version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
>> + struct xe_gt *gt = guc_to_gt(guc);
>> +
>> + /* engine activity stats is supported from GuC interface version (1.14.1) */
>> + if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 14, 1))
>> + return true;
>
> it also doesn't work on VFs
> so maybe it should be different logic:
Will add this
>
> if (IS_SRIOV_VF) {
> xt_gt_into("EA not supported on VFs\n");
> return false;
> }
>
> if (GUC_SUBMIT_VER < 1.14.1) {
> xt_gt_into("EA not supported on vA, need vB+\n");
> return false;
> }
>
>> +
>> + xe_gt_warn(gt,
>
> does it really need to be 'warn' level?
yeah CI flags it as a failure. Will change it to debug
>
>> + "engine activity stats unsupported in GuC interface v%u.%u.%u, v%u.%u.%u or newer required\n",
>> + version->major, version->minor, version->patch, 1, 14, 1);
>> +
>> + return false;
>> +}
>> +
>> static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe)
>> {
>> struct xe_guc *guc = &hwe->gt->uc.guc;
>> @@ -250,6 +266,9 @@ u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe)
>> {
>> struct xe_guc *guc = &hwe->gt->uc.guc;
>>
>> + if (!xe_guc_engine_activity_supported(guc))
>> + return 0;
>> +
>> return get_engine_active_ticks(guc, hwe);
>> }
>>
>> @@ -263,9 +282,27 @@ u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe)
>> {
>> struct xe_guc *guc = &hwe->gt->uc.guc;
>>
>> + if (!xe_guc_engine_activity_supported(guc))
>> + return 0;
>> +
>> return get_engine_total_ticks(guc, hwe);
>> }
>>
>> +/**
>> + * xe_guc_engine_activity_supported - Check support for engine activity stats
>> + * @guc: The GuC object
>> + *
>> + * Engine activity stats is supported from GuC interface version (1.14.1)
>
> what about VFs?
Will add the check to return false in case of VF's as suggested above
>
>> + *
>> + * Return: true if engine activity stats supported, false otherwise
>> + */
>> +bool xe_guc_engine_activity_supported(struct xe_guc *guc)
>> +{
>> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> +
>> + return engine_activity->supported;
>> +}
>> +
>> /**
>> * xe_guc_engine_activity_enable_stats - Enable engine activity stats
>> * @guc: The GuC object
>> @@ -276,6 +313,9 @@ void xe_guc_engine_activity_enable_stats(struct xe_guc *guc)
>> {
>> int ret;
>>
>> + if (!xe_guc_engine_activity_supported(guc))
>> + return;
>> +
>> ret = enable_engine_activity_stats(guc);
>> if (ret)
>> xe_gt_err(guc_to_gt(guc), "failed to enable activity stats%d\n", ret);
>> @@ -302,6 +342,8 @@ int xe_guc_engine_activity_init(struct xe_guc *guc)
>> struct xe_gt *gt = guc_to_gt(guc);
>> int ret;
>>
>> + engine_activity->supported = engine_activity_supported(guc);
>
> should we continue if not supported ?
Thanks for catching this. Shouldn't continue.
Will fix it
>
>> +
>> ret = allocate_engine_activity_group(guc);
>> if (ret) {
>> xe_gt_err(gt, "failed to allocate activity group %d\n", ret);
>> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.h b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>> index c00f3da5513d..9d3ea3f67b6a 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>> @@ -12,6 +12,7 @@ struct xe_hw_engine;
>> struct xe_guc;
>>
>> int xe_guc_engine_activity_init(struct xe_guc *guc);
>> +bool xe_guc_engine_activity_supported(struct xe_guc *guc);
>> void xe_guc_engine_activity_enable_stats(struct xe_guc *guc);
>> u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe);
>> u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe);
>> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>> index a2ab327d3eec..81002c83d65e 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>> @@ -79,6 +79,9 @@ struct xe_guc_engine_activity {
>> /** @num_activity_group: number of activity groups */
>> u32 num_activity_group;
>>
>> + /** @supported: checks if engine activity is supported */
>
> indicates?
will fix this
Thanks
Riana
>
>> + bool supported;
>> +
>> /** @eag: holds the device level engine activity data */
>> struct engine_activity_group *eag;
>>
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 6/8] drm/xe: Add support for per-function engine activity
2025-02-06 19:06 ` Michal Wajdeczko
@ 2025-02-07 8:11 ` Riana Tauro
2025-02-07 23:50 ` Umesh Nerlige Ramappa
0 siblings, 1 reply; 39+ messages in thread
From: Riana Tauro @ 2025-02-07 8:11 UTC (permalink / raw)
To: Michal Wajdeczko, intel-xe, umesh.nerlige.ramappa
Cc: anshuman.gupta, lucas.demarchi, vinay.belgaumkar, soham.purkait
Hi Michal
On 2/7/2025 12:36 AM, Michal Wajdeczko wrote:
>
>
> On 06.02.2025 11:43, Riana Tauro wrote:
>> Add support for function level engine activity stats.
>> This is enabled when sriov_numvfs is set and disabled when vf's
>
> VF's
will fix this
>
>> are disabled.
>>
>> v2: remove unnecessary initialization
>> move offset to improve code readability (Umesh)
>> remove global for function engine activity (Lucas)
>>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>> drivers/gpu/drm/xe/abi/guc_actions_abi.h | 1 +
>> drivers/gpu/drm/xe/xe_guc_engine_activity.c | 208 +++++++++++++++---
>> drivers/gpu/drm/xe/xe_guc_engine_activity.h | 5 +-
>> .../gpu/drm/xe/xe_guc_engine_activity_types.h | 8 +-
>> drivers/gpu/drm/xe/xe_pmu.c | 4 +-
>> 5 files changed, 192 insertions(+), 34 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
>> index ec516e838ee8..448afb86e05c 100644
>> --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
>> +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
>> @@ -141,6 +141,7 @@ enum xe_guc_action {
>> XE_GUC_ACTION_CLIENT_SOFT_RESET = 0x5507,
>> XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A,
>> XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C,
>> + XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER = 0x550D,
>> XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000,
>> XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002,
>> XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003,
>> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>> index 5d67fe38639a..0ab9112466f1 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>> @@ -15,35 +15,62 @@
>> #include "xe_hw_engine.h"
>> #include "xe_map.h"
>> #include "xe_mmio.h"
>> +#include "xe_sriov_pf_helpers.h"
>> #include "xe_trace_guc.h"
>>
>> #define TOTAL_QUANTA 0x8000
>>
>> -static struct iosys_map engine_activity_map(struct xe_guc *guc, struct xe_hw_engine *hwe)
>> +static struct iosys_map engine_activity_map(struct xe_guc *guc, struct xe_hw_engine *hwe,
>> + unsigned int index)
>> {
>> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> - struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
>> + struct engine_activity_buffer *buffer;
>> u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
>> - size_t offset = 0;
>> + size_t offset;
>> +
>> + if (engine_activity->num_functions) {
>> + buffer = &engine_activity->function_buffer;
>> + offset = sizeof(struct guc_engine_activity_data) * index;
>
> maybe we should assert that index < num_functions?
This function gets called from get_active_ticks and get_total_ticks
is_function_valid does this check
+ if (engine_activity->num_functions && fn_id >=
engine_activity->num_functions)
+ return false;
>
>> + } else {
>> + buffer = &engine_activity->device_buffer;
>> + offset = 0;
>> + }
>>
>> - offset = offsetof(struct guc_engine_activity_data,
>> + offset += offsetof(struct guc_engine_activity_data,
>> engine_activity[guc_class][hwe->logical_instance]);
>>
>> return IOSYS_MAP_INIT_OFFSET(&buffer->activity_bo->vmap, offset);
>> }
>>
>> -static struct iosys_map engine_metadata_map(struct xe_guc *guc)
>> +static struct iosys_map engine_metadata_map(struct xe_guc *guc,
>> + unsigned int index)
>> {
>> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> - struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
>> + struct engine_activity_buffer *buffer;
>> + size_t offset;
>> +
>> + if (engine_activity->num_functions) {
>> + buffer = &engine_activity->function_buffer;
>> + offset = sizeof(struct guc_engine_activity_metadata) * index;
>> + } else {
>> + buffer = &engine_activity->device_buffer;
>> + offset = 0;
>> + }
>>
>> - return buffer->metadata_bo->vmap;
>> + return IOSYS_MAP_INIT_OFFSET(&buffer->metadata_bo->vmap, offset);
>> }
>>
>> static int allocate_engine_activity_group(struct xe_guc *guc)
>> {
>> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> - u32 num_activity_group = 1;
>> + struct xe_device *xe = guc_to_xe(guc);
>> + u32 num_activity_group;
>> +
>> + /*
>> + * An additional activity group is allocated for PF
>> + */
>> + num_activity_group = IS_SRIOV_PF(xe) ? xe_sriov_pf_get_totalvfs(xe) + 1 : 1;
>> +
>>
>> engine_activity->eag = kmalloc_array(num_activity_group,
>> sizeof(struct engine_activity_group),
>> @@ -59,10 +86,11 @@ static int allocate_engine_activity_group(struct xe_guc *guc)
>> }
>>
>> static int allocate_engine_activity_buffers(struct xe_guc *guc,
>> - struct engine_activity_buffer *buffer)
>> + struct engine_activity_buffer *buffer,
>> + int count)
>> {
>> - u32 metadata_size = sizeof(struct guc_engine_activity_metadata);
>> - u32 size = sizeof(struct guc_engine_activity_data);
>> + u32 metadata_size = sizeof(struct guc_engine_activity_metadata) * count;
>> + u32 size = sizeof(struct guc_engine_activity_data) * count;
>> struct xe_gt *gt = guc_to_gt(guc);
>> struct xe_tile *tile = gt_to_tile(gt);
>> struct xe_bo *bo, *metadata_bo;
>> @@ -105,10 +133,17 @@ static bool engine_activity_supported(struct xe_guc *guc)
>> return false;
>> }
>>
>> -static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe)
>> +static void free_engine_activity_buffers(struct engine_activity_buffer *buffer)
>> +{
>> + xe_bo_unpin_map_no_vm(buffer->metadata_bo);
>> + xe_bo_unpin_map_no_vm(buffer->activity_bo);
>> +}
>> +
>> +static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe,
>> + unsigned int index)
>> {
>> struct xe_guc *guc = &hwe->gt->uc.guc;
>> - struct engine_activity_group *eag = &guc->engine_activity.eag[0];
>> + struct engine_activity_group *eag = &guc->engine_activity.eag[index];
>> u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
>>
>> return &eag->engine[guc_class][hwe->logical_instance];
>> @@ -125,9 +160,10 @@ static u64 cpu_ns_to_guc_tsc_tick(ktime_t ns, u32 freq)
>> #define read_metadata_record(xe_, map_, field_) \
>> xe_map_rd_field(xe_, map_, 0, struct guc_engine_activity_metadata, field_)
>>
>> -static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
>> +static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe,
>> + unsigned int index)
>> {
>> - struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
>> + struct engine_activity *ea = hw_engine_to_engine_activity(hwe, index);
>> struct guc_engine_activity *cached_activity = &ea->activity;
>> struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
>> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> @@ -138,8 +174,8 @@ static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
>> u64 active_ticks, gpm_ts;
>> u16 change_num;
>>
>> - activity_map = engine_activity_map(guc, hwe);
>> - metadata_map = engine_metadata_map(guc);
>> + activity_map = engine_activity_map(guc, hwe, index);
>> + metadata_map = engine_metadata_map(guc, index);
>> global_change_num = read_metadata_record(xe, &metadata_map, global_change_num);
>>
>> /* GuC has not initialized activity data yet, return 0 */
>> @@ -182,9 +218,9 @@ static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
>> return ea->total + ea->active;
>> }
>>
>> -static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
>> +static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe, unsigned int index)
>> {
>> - struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
>> + struct engine_activity *ea = hw_engine_to_engine_activity(hwe, index);
>> struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
>> struct guc_engine_activity *cached_activity = &ea->activity;
>> struct iosys_map activity_map, metadata_map;
>> @@ -193,8 +229,8 @@ static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
>> u64 numerator;
>> u16 quanta_ratio;
>>
>> - activity_map = engine_activity_map(guc, hwe);
>> - metadata_map = engine_metadata_map(guc);
>> + activity_map = engine_activity_map(guc, hwe, index);
>> + metadata_map = engine_metadata_map(guc, index);
>>
>> if (!cached_metadata->guc_tsc_frequency_hz)
>> cached_metadata->guc_tsc_frequency_hz = read_metadata_record(xe, &metadata_map,
>> @@ -236,10 +272,35 @@ static int enable_engine_activity_stats(struct xe_guc *guc)
>> return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action));
>> }
>>
>> -static void engine_activity_set_cpu_ts(struct xe_guc *guc)
>> +static int enable_function_engine_activity_stats(struct xe_guc *guc, bool enable)
>
> IMO it's cleaner to have separate 'disable()' function that will prepare
> and send tailored action params
>
>> {
>> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> - struct engine_activity_group *eag = &engine_activity->eag[0];
>> + u32 metadata_ggtt_addr = 0, ggtt_addr = 0, num_functions = 0;
>> + struct engine_activity_buffer *buffer = &engine_activity->function_buffer;
>> + u32 action[6];
>> + int len = 0;
>> +
>> + if (enable) {
>> + metadata_ggtt_addr = xe_bo_ggtt_addr(buffer->metadata_bo);
>> + ggtt_addr = xe_bo_ggtt_addr(buffer->activity_bo);
>> + num_functions = engine_activity->num_functions;
>> + }
>> +
>> + action[len++] = XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER;
>> + action[len++] = num_functions;
>> + action[len++] = metadata_ggtt_addr;
>> + action[len++] = 0;
>> + action[len++] = ggtt_addr;
>> + action[len++] = 0;
>> +
>> + /* Blocking here to ensure the buffers are ready before reading them */
>> + return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action));
>> +}
>> +
>> +static void engine_activity_set_cpu_ts(struct xe_guc *guc, unsigned int index)
>> +{
>> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> + struct engine_activity_group *eag = &engine_activity->eag[index];
>> int i, j;
>>
>> for (i = 0; i < GUC_MAX_ENGINE_CLASSES; i++)
>> @@ -256,36 +317,106 @@ static u32 gpm_timestamp_shift(struct xe_gt *gt)
>> return 3 - REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
>> }
>>
>> +static bool is_function_valid(struct xe_guc *guc, unsigned int fn_id)
>> +{
>> + struct xe_device *xe = guc_to_xe(guc);
>> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> +
>> + if (!IS_SRIOV_PF(xe) && fn_id)
>> + return false;
>> +
>> + if (engine_activity->num_functions && fn_id >= engine_activity->num_functions)
>> + return false;
>> +
>> + return true;
>> +}
>> +
>> +static int engine_activity_disable_function_stats(struct xe_guc *guc, bool enable)
>> +{
>> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> + struct engine_activity_buffer *buffer = &engine_activity->function_buffer;
>> + int ret;
>> +
>> + if (!engine_activity->num_functions)
>> + return 0;
>> +
>> + ret = enable_function_engine_activity_stats(guc, enable);
>> + if (ret)
>> + return ret;
>> +
>> + free_engine_activity_buffers(buffer);
>> + engine_activity->num_functions = 0;
>> +
>> + return 0;
>> +}
>> +
>> +static int engine_activity_enable_function_stats(struct xe_guc *guc, int num_vfs, bool enable)
>> +{
>> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> + struct engine_activity_buffer *buffer = &engine_activity->function_buffer;
>> + int ret, i;
>> +
>> + if (!num_vfs)
>> + return 0;
>> +
>> + /* This includes 1 PF and num_vfs */
>> + engine_activity->num_functions = num_vfs + 1;
>> +
>> + ret = allocate_engine_activity_buffers(guc, buffer, engine_activity->num_functions);
>> + if (ret)
>> + return ret;
>> +
>> + ret = enable_function_engine_activity_stats(guc, enable);
>> + if (ret) {
>> + free_engine_activity_buffers(buffer);
>> + engine_activity->num_functions = 0;
>> + return ret;
>> + }
>> +
>> + for (i = 0; i < engine_activity->num_functions; i++)
>> + engine_activity_set_cpu_ts(guc, i + 1);
>> +
>> + return 0;
>> +}
>> +
>> /**
>> * xe_guc_engine_activity_active_ticks - Get engine active ticks
>> * @hwe: The hw_engine object
>> + * @fn_id: function id to report on
>> *
>> * Return: accumulated ticks @hwe was active since engine activity stats were enabled.
>> */
>> -u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe)
>> +u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe, unsigned int fn_id)
>> {
>> struct xe_guc *guc = &hwe->gt->uc.guc;
>>
>> if (!xe_guc_engine_activity_supported(guc))
>> return 0;
>>
>> - return get_engine_active_ticks(guc, hwe);
>> + if (!is_function_valid(guc, fn_id))
>> + return 0;
>> +
>> + return get_engine_active_ticks(guc, hwe, fn_id);
>> }
>>
>> /**
>> * xe_guc_engine_activity_total_ticks - Get engine total ticks
>> * @hwe: The hw_engine object
>> + * @fn_id: function id to report on
>> *
>> * Return: accumulated quanta of ticks allocated for the engine
>> */
>> -u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe)
>> +u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe, unsigned int fn_id)
>> {
>> struct xe_guc *guc = &hwe->gt->uc.guc;
>>
>> if (!xe_guc_engine_activity_supported(guc))
>> return 0;
>>
>> - return get_engine_total_ticks(guc, hwe);
>> + if (!is_function_valid(guc, fn_id))
>> + return 0;
>> +
>> + return get_engine_total_ticks(guc, hwe, fn_id);
>> }
>>
>> /**
>> @@ -303,6 +434,25 @@ bool xe_guc_engine_activity_supported(struct xe_guc *guc)
>> return engine_activity->supported;
>> }
>>
>> +/**
>> + * xe_guc_engine_activity_function_stats - Enable/Disable per-function engine activity stats
>> + * @guc: The GuC object
>> + * @num_vfs: number of vfs
>> + * @enable: true to enable, false otherwise
>> + *
>> + * Return: 0 on success, negative error code otherwise
>> + */
>> +int xe_guc_engine_activity_function_stats(struct xe_guc *guc, int num_vfs, bool enable)
>> +{
>> + if (!xe_guc_engine_activity_supported(guc))
>> + return 0;
>> +
>> + if (enable)
>> + return engine_activity_enable_function_stats(guc, num_vfs, enable);
>> +
>> + return engine_activity_disable_function_stats(guc, enable);
>> +}
>> +
>> /**
>> * xe_guc_engine_activity_enable_stats - Enable engine activity stats
>> * @guc: The GuC object
>> @@ -320,7 +470,7 @@ void xe_guc_engine_activity_enable_stats(struct xe_guc *guc)
>> if (ret)
>> xe_gt_err(guc_to_gt(guc), "failed to enable activity stats%d\n", ret);
>> else
>> - engine_activity_set_cpu_ts(guc);
>> + engine_activity_set_cpu_ts(guc, 0);
>> }
>>
>> static void engine_activity_fini(void *arg)
>> @@ -350,7 +500,7 @@ int xe_guc_engine_activity_init(struct xe_guc *guc)
>> return ret;
>> }
>>
>> - ret = allocate_engine_activity_buffers(guc, &engine_activity->device_buffer);
>> + ret = allocate_engine_activity_buffers(guc, &engine_activity->device_buffer, 1);
>> if (ret) {
>> xe_gt_err(gt, "failed to allocate activity buffers%d\n", ret);
>> kfree(engine_activity->eag);
>> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.h b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>> index 9d3ea3f67b6a..765397b959e0 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>> @@ -14,6 +14,7 @@ struct xe_guc;
>> int xe_guc_engine_activity_init(struct xe_guc *guc);
>> bool xe_guc_engine_activity_supported(struct xe_guc *guc);
>> void xe_guc_engine_activity_enable_stats(struct xe_guc *guc);
>> -u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe);
>> -u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe);
>> +int xe_guc_engine_activity_function_stats(struct xe_guc *guc, int num_vfs, bool enable);
>> +u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe, unsigned int fn_id);
>> +u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe, unsigned int fn_id);
>> #endif
>> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>> index 81002c83d65e..d95ec6a74b30 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>> @@ -79,14 +79,20 @@ struct xe_guc_engine_activity {
>> /** @num_activity_group: number of activity groups */
>> u32 num_activity_group;
>>
>> + /** @num_functions: number of functions */
>> + u32 num_functions;
>> +
>> /** @supported: checks if engine activity is supported */
>> bool supported;
>>
>> - /** @eag: holds the device level engine activity data */
>> + /** @eag: array with entries to hold engine activity stats of global, PF and VF's */
>> struct engine_activity_group *eag;
>>
>> /** @device_buffer: buffer object for global engine activity */
>> struct engine_activity_buffer device_buffer;
>
> do we need both device ad function buffers ?
If we have a single buffer, then every time num_vfs is
set, the device buffer(XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER =
0x550C) needs to be disabled and then the function buffers need
to be created and vice versa on disable.
Would be better to have two buffers. @Umesh thoughts?
Thanks
Riana
>
> for non-PF case (native) we can still buffer[1]
> for PF case we will allocate buffer[1 + totalVFs]
> and in the future
> for PF case we will allocate buffer[1]
>
>> +
>> + /** @function_buffer: buffer object for per-function engine activity */
>> + struct engine_activity_buffer function_buffer;
>> };
>> #endif
>>
>> diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
>> index 5b5fe4424aba..a758fc517048 100644
>> --- a/drivers/gpu/drm/xe/xe_pmu.c
>> +++ b/drivers/gpu/drm/xe/xe_pmu.c
>> @@ -242,9 +242,9 @@ static u64 read_engine_events(struct perf_event *event, u64 prev)
>> if (!hwe)
>> drm_warn(&xe->drm, "unknown pmu engine\n");
>> else if (config_to_event_id(event->attr.config) == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS)
>> - val = xe_guc_engine_activity_active_ticks(hwe);
>> + val = xe_guc_engine_activity_active_ticks(hwe, 0);
>> else
>> - val = xe_guc_engine_activity_total_ticks(hwe);
>> + val = xe_guc_engine_activity_total_ticks(hwe, 0);
>>
>> return val;
>> }
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 3/8] drm/xe/guc: Expose engine activity only for supported GuC version
2025-02-06 10:43 ` [PATCH v5 3/8] drm/xe/guc: Expose engine activity only for supported GuC version Riana Tauro
2025-02-06 18:39 ` Michal Wajdeczko
@ 2025-02-07 21:37 ` Umesh Nerlige Ramappa
2025-02-10 7:28 ` Riana Tauro
1 sibling, 1 reply; 39+ messages in thread
From: Umesh Nerlige Ramappa @ 2025-02-07 21:37 UTC (permalink / raw)
To: Riana Tauro
Cc: intel-xe, anshuman.gupta, lucas.demarchi, vinay.belgaumkar,
soham.purkait, John Harrison, Michal Wajdeczko
On Thu, Feb 06, 2025 at 04:13:52PM +0530, Riana Tauro wrote:
>Engine activity is supported only on GuC submission version >= 1.14.1
>Allow enabling/reading engine activity only on supported
>GuC versions. Warn once if not supported.
>
>v2: use guc interface version (John)
>v3: do not use drm_WARN (Umesh)
>v4: use variable for supported and use gt logs
> use a friendlier log message (Michal)
>
>Cc: John Harrison <John.C.Harrison@Intel.com>
>Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>---
> drivers/gpu/drm/xe/xe_guc_engine_activity.c | 42 +++++++++++++++++++
> drivers/gpu/drm/xe/xe_guc_engine_activity.h | 1 +
> .../gpu/drm/xe/xe_guc_engine_activity_types.h | 3 ++
> 3 files changed, 46 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>index 9c08af273397..5d67fe38639a 100644
>--- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>@@ -89,6 +89,22 @@ static int allocate_engine_activity_buffers(struct xe_guc *guc,
> return 0;
> }
>
>+static bool engine_activity_supported(struct xe_guc *guc)
>+{
>+ struct xe_uc_fw_version *version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
>+ struct xe_gt *gt = guc_to_gt(guc);
>+
>+ /* engine activity stats is supported from GuC interface version (1.14.1) */
>+ if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 14, 1))
>+ return true;
>+
>+ xe_gt_warn(gt,
>+ "engine activity stats unsupported in GuC interface v%u.%u.%u, v%u.%u.%u or newer required\n",
>+ version->major, version->minor, version->patch, 1, 14, 1);
>+
>+ return false;
>+}
>+
> static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe)
> {
> struct xe_guc *guc = &hwe->gt->uc.guc;
>@@ -250,6 +266,9 @@ u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe)
> {
> struct xe_guc *guc = &hwe->gt->uc.guc;
>
>+ if (!xe_guc_engine_activity_supported(guc))
>+ return 0;
>+
> return get_engine_active_ticks(guc, hwe);
> }
>
>@@ -263,9 +282,27 @@ u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe)
> {
> struct xe_guc *guc = &hwe->gt->uc.guc;
>
>+ if (!xe_guc_engine_activity_supported(guc))
>+ return 0;
>+
> return get_engine_total_ticks(guc, hwe);
> }
>
>+/**
>+ * xe_guc_engine_activity_supported - Check support for engine activity stats
>+ * @guc: The GuC object
>+ *
>+ * Engine activity stats is supported from GuC interface version (1.14.1)
>+ *
>+ * Return: true if engine activity stats supported, false otherwise
>+ */
>+bool xe_guc_engine_activity_supported(struct xe_guc *guc)
>+{
>+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>+
>+ return engine_activity->supported;
>+}
>+
> /**
> * xe_guc_engine_activity_enable_stats - Enable engine activity stats
> * @guc: The GuC object
>@@ -276,6 +313,9 @@ void xe_guc_engine_activity_enable_stats(struct xe_guc *guc)
> {
> int ret;
>
>+ if (!xe_guc_engine_activity_supported(guc))
>+ return;
>+
> ret = enable_engine_activity_stats(guc);
> if (ret)
> xe_gt_err(guc_to_gt(guc), "failed to enable activity stats%d\n", ret);
>@@ -302,6 +342,8 @@ int xe_guc_engine_activity_init(struct xe_guc *guc)
> struct xe_gt *gt = guc_to_gt(guc);
> int ret;
>
>+ engine_activity->supported = engine_activity_supported(guc);
>+
Is xe_guc_engine_activity_init() called even on a VF? If not, then
initializing engine_activity->supported here may not be sufficient.
Thanks,
Umesh
> ret = allocate_engine_activity_group(guc);
> if (ret) {
> xe_gt_err(gt, "failed to allocate activity group %d\n", ret);
>diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.h b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>index c00f3da5513d..9d3ea3f67b6a 100644
>--- a/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>@@ -12,6 +12,7 @@ struct xe_hw_engine;
> struct xe_guc;
>
> int xe_guc_engine_activity_init(struct xe_guc *guc);
>+bool xe_guc_engine_activity_supported(struct xe_guc *guc);
> void xe_guc_engine_activity_enable_stats(struct xe_guc *guc);
> u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe);
> u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe);
>diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>index a2ab327d3eec..81002c83d65e 100644
>--- a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>@@ -79,6 +79,9 @@ struct xe_guc_engine_activity {
> /** @num_activity_group: number of activity groups */
> u32 num_activity_group;
>
>+ /** @supported: checks if engine activity is supported */
>+ bool supported;
>+
> /** @eag: holds the device level engine activity data */
> struct engine_activity_group *eag;
>
>--
>2.47.1
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 4/8] drm/xe/xe_pmu: Add PMU support for engine activity
2025-02-06 10:43 ` [PATCH v5 4/8] drm/xe/xe_pmu: Add PMU support for engine activity Riana Tauro
@ 2025-02-07 22:47 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 39+ messages in thread
From: Umesh Nerlige Ramappa @ 2025-02-07 22:47 UTC (permalink / raw)
To: Riana Tauro
Cc: intel-xe, anshuman.gupta, lucas.demarchi, vinay.belgaumkar,
soham.purkait
On Thu, Feb 06, 2025 at 04:13:53PM +0530, Riana Tauro wrote:
>PMU provides two counters (engine-active-ticks, engine-total-ticks)
>to calculate engine activity. When querying engine activity,
>user must group these 2 counters using the perf_event
>group mechanism to ensure both counters are sampled together.
>
>To list the events
>
> ./perf list
> xe_0000_03_00.0/engine-active-ticks/ [Kernel PMU event]
> xe_0000_03_00.0/engine-total-ticks/ [Kernel PMU event]
>
>The formats to be used with the above are
>
> engine_instance - config:12-19
> engine_class - config:20-27
> gt - config:60-63
>
>The events can then be read using perf tool
>
>./perf stat -e xe_0000_03_00.0/engine-active-ticks,gt=0,
> engine_class=0,engine_instance=0/,
> xe_0000_03_00.0/engine-total-ticks,gt=0,
> engine_class=0,engine_instance=0/ -I 1000
>
>Engine activity can then be calculated as below
>engine activity % = (engine active ticks/engine total ticks) * 100
>
>v2: validate gt
> rename total-ticks to engine-total-ticks
> add helper to get hwe (Umesh)
>
>v3: fix checkpatch warning
> add details to documentation (Umesh)
> remove ascii formats from documentation (Lucas)
>
>Signed-off-by: Riana Tauro <riana.tauro@intel.com>
LGTM,
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Thanks,
Umesh
>---
> drivers/gpu/drm/xe/xe_guc.c | 5 ++
> drivers/gpu/drm/xe/xe_pmu.c | 136 ++++++++++++++++++++++++++++++++----
> drivers/gpu/drm/xe/xe_uc.c | 3 +
> 3 files changed, 131 insertions(+), 13 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
>index 1619c0a52db9..bc1ff0a4e1e7 100644
>--- a/drivers/gpu/drm/xe/xe_guc.c
>+++ b/drivers/gpu/drm/xe/xe_guc.c
>@@ -27,6 +27,7 @@
> #include "xe_guc_capture.h"
> #include "xe_guc_ct.h"
> #include "xe_guc_db_mgr.h"
>+#include "xe_guc_engine_activity.h"
> #include "xe_guc_hwconfig.h"
> #include "xe_guc_log.h"
> #include "xe_guc_pc.h"
>@@ -744,6 +745,10 @@ int xe_guc_init_post_hwconfig(struct xe_guc *guc)
> if (ret)
> return ret;
>
>+ ret = xe_guc_engine_activity_init(guc);
>+ if (ret)
>+ return ret;
>+
> ret = xe_guc_buf_cache_init(&guc->buf);
> if (ret)
> return ret;
>diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
>index 3910a82328ee..06a1c72a3838 100644
>--- a/drivers/gpu/drm/xe/xe_pmu.c
>+++ b/drivers/gpu/drm/xe/xe_pmu.c
>@@ -8,15 +8,16 @@
>
> #include "xe_device.h"
> #include "xe_gt_idle.h"
>+#include "xe_guc_engine_activity.h"
>+#include "xe_hw_engine.h"
> #include "xe_pm.h"
> #include "xe_pmu.h"
>
> /**
> * DOC: Xe PMU (Performance Monitoring Unit)
> *
>- * Expose events/counters like GT-C6 residency and GT frequency to user land via
>- * the perf interface. Events are per device. The GT can be selected with an
>- * extra config sub-field (bits 60-63).
>+ * Expose events/counters like GT-C6 residency, GT frequency and per-class-engine
>+ * activity to user land via the perf interface. Events are per device.
> *
> * All events are listed in sysfs:
> *
>@@ -24,7 +25,18 @@
> * $ ls /sys/bus/event_source/devices/xe_0000_00_02.0/events/
> * $ ls /sys/bus/event_source/devices/xe_0000_00_02.0/format/
> *
>- * The format directory has info regarding the configs that can be used.
>+ * The following format parameters are available to read events,
>+ * but only few are valid with each event:
>+ *
>+ * gt[60:63] Selects gt for the event
>+ * engine_class[20:27] Selects engine-class for event
>+ * engine_instance[12:19] Selects the engine-instance for the event
>+ *
>+ * For engine specific events (engine-*), gt, engine_class and engine_instance parameters must be
>+ * set as populated by DRM_XE_DEVICE_QUERY_ENGINES.
>+ *
>+ * For gt specific events (gt-*) gt parameter must be passed. All other parameters will be 0.
>+ *
> * The standard perf tool can be used to grep for a certain event as well.
> * Example:
> *
>@@ -35,20 +47,34 @@
> * $ perf stat -e <event_name,gt=> -I <interval>
> */
>
>-#define XE_PMU_EVENT_GT_MASK GENMASK_ULL(63, 60)
>-#define XE_PMU_EVENT_ID_MASK GENMASK_ULL(11, 0)
>+#define XE_PMU_EVENT_GT_MASK GENMASK_ULL(63, 60)
>+#define XE_PMU_EVENT_ENGINE_CLASS_MASK GENMASK_ULL(27, 20)
>+#define XE_PMU_EVENT_ENGINE_INSTANCE_MASK GENMASK_ULL(19, 12)
>+#define XE_PMU_EVENT_ID_MASK GENMASK_ULL(11, 0)
>
> static unsigned int config_to_event_id(u64 config)
> {
> return FIELD_GET(XE_PMU_EVENT_ID_MASK, config);
> }
>
>+static unsigned int config_to_engine_class(u64 config)
>+{
>+ return FIELD_GET(XE_PMU_EVENT_ENGINE_CLASS_MASK, config);
>+}
>+
>+static unsigned int config_to_engine_instance(u64 config)
>+{
>+ return FIELD_GET(XE_PMU_EVENT_ENGINE_INSTANCE_MASK, config);
>+}
>+
> static unsigned int config_to_gt_id(u64 config)
> {
> return FIELD_GET(XE_PMU_EVENT_GT_MASK, config);
> }
>
>-#define XE_PMU_EVENT_GT_C6_RESIDENCY 0x01
>+#define XE_PMU_EVENT_GT_C6_RESIDENCY 0x01
>+#define XE_PMU_EVENT_ENGINE_ACTIVE_TICKS 0x02
>+#define XE_PMU_EVENT_ENGINE_TOTAL_TICKS 0x03
>
> static struct xe_gt *event_to_gt(struct perf_event *event)
> {
>@@ -58,6 +84,24 @@ static struct xe_gt *event_to_gt(struct perf_event *event)
> return xe_device_get_gt(xe, gt);
> }
>
>+static struct xe_hw_engine *event_to_hwe(struct perf_event *event)
>+{
>+ struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
>+ struct drm_xe_engine_class_instance eci;
>+ u64 config = event->attr.config;
>+ struct xe_hw_engine *hwe;
>+
>+ eci.engine_class = config_to_engine_class(config);
>+ eci.engine_instance = config_to_engine_instance(config);
>+ eci.gt_id = config_to_gt_id(config);
>+
>+ hwe = xe_hw_engine_lookup(xe, eci);
>+ if (!hwe || xe_hw_engine_is_reserved(hwe))
>+ return NULL;
>+
>+ return hwe;
>+}
>+
> static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
> unsigned int id)
> {
>@@ -68,6 +112,35 @@ static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
> pmu->supported_events & BIT_ULL(id);
> }
>
>+static bool event_param_valid(struct perf_event *event)
>+{
>+ struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
>+ unsigned int engine_class, engine_instance;
>+ u64 config = event->attr.config;
>+ struct xe_gt *gt;
>+
>+ gt = xe_device_get_gt(xe, config_to_gt_id(config));
>+ if (!gt)
>+ return false;
>+
>+ engine_class = config_to_engine_class(config);
>+ engine_instance = config_to_engine_instance(config);
>+
>+ switch (config_to_event_id(config)) {
>+ case XE_PMU_EVENT_GT_C6_RESIDENCY:
>+ if (engine_class || engine_instance)
>+ return false;
>+ break;
>+ case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
>+ case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
>+ if (!event_to_hwe(event))
>+ return false;
>+ break;
>+ }
>+
>+ return true;
>+}
>+
> static void xe_pmu_event_destroy(struct perf_event *event)
> {
> struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
>@@ -104,6 +177,9 @@ static int xe_pmu_event_init(struct perf_event *event)
> if (has_branch_stack(event))
> return -EOPNOTSUPP;
>
>+ if (!event_param_valid(event))
>+ return -ENOENT;
>+
> if (!event->parent) {
> drm_dev_get(&xe->drm);
> xe_pm_runtime_get(xe);
>@@ -113,16 +189,36 @@ static int xe_pmu_event_init(struct perf_event *event)
> return 0;
> }
>
>-static u64 __xe_pmu_event_read(struct perf_event *event)
>+static u64 read_engine_events(struct perf_event *event)
>+{
>+ struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base);
>+ struct xe_hw_engine *hwe;
>+ u64 val = 0;
>+
>+ hwe = event_to_hwe(event);
>+ if (!hwe)
>+ drm_warn(&xe->drm, "unknown pmu engine\n");
>+ else if (config_to_event_id(event->attr.config) == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS)
>+ val = xe_guc_engine_activity_active_ticks(hwe);
>+ else
>+ val = xe_guc_engine_activity_total_ticks(hwe);
>+
>+ return val;
>+}
>+
>+static u64 __xe_pmu_event_read(struct perf_event *event, u64 prev)
> {
> struct xe_gt *gt = event_to_gt(event);
>
> if (!gt)
>- return 0;
>+ return prev;
>
> switch (config_to_event_id(event->attr.config)) {
> case XE_PMU_EVENT_GT_C6_RESIDENCY:
> return xe_gt_idle_residency_msec(>->gtidle);
>+ case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
>+ case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
>+ return read_engine_events(event);
> }
>
> return 0;
>@@ -135,7 +231,7 @@ static void xe_pmu_event_update(struct perf_event *event)
>
> prev = local64_read(&hwc->prev_count);
> do {
>- new = __xe_pmu_event_read(event);
>+ new = __xe_pmu_event_read(event, prev);
> } while (!local64_try_cmpxchg(&hwc->prev_count, &prev, new));
>
> local64_add(new - prev, &event->count);
>@@ -161,7 +257,7 @@ static void xe_pmu_enable(struct perf_event *event)
> * for all listeners. Even when the event was already enabled and has
> * an existing non-zero value.
> */
>- local64_set(&event->hw.prev_count, __xe_pmu_event_read(event));
>+ local64_set(&event->hw.prev_count, __xe_pmu_event_read(event, 0));
> }
>
> static void xe_pmu_event_start(struct perf_event *event, int flags)
>@@ -207,11 +303,15 @@ static void xe_pmu_event_del(struct perf_event *event, int flags)
> xe_pmu_event_stop(event, PERF_EF_UPDATE);
> }
>
>-PMU_FORMAT_ATTR(gt, "config:60-63");
>-PMU_FORMAT_ATTR(event, "config:0-11");
>+PMU_FORMAT_ATTR(gt, "config:60-63");
>+PMU_FORMAT_ATTR(engine_class, "config:20-27");
>+PMU_FORMAT_ATTR(engine_instance, "config:12-19");
>+PMU_FORMAT_ATTR(event, "config:0-11");
>
> static struct attribute *pmu_format_attrs[] = {
> &format_attr_event.attr,
>+ &format_attr_engine_class.attr,
>+ &format_attr_engine_instance.attr,
> &format_attr_gt.attr,
> NULL,
> };
>@@ -270,6 +370,8 @@ static ssize_t event_attr_show(struct device *dev,
> XE_EVENT_ATTR_GROUP(v_, id_, &pmu_event_ ##v_.attr.attr)
>
> XE_EVENT_ATTR_SIMPLE(gt-c6-residency, gt_c6_residency, XE_PMU_EVENT_GT_C6_RESIDENCY, "ms");
>+XE_EVENT_ATTR_NOUNIT(engine-active-ticks, engine_active_ticks, XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
>+XE_EVENT_ATTR_NOUNIT(engine-total-ticks, engine_total_ticks, XE_PMU_EVENT_ENGINE_TOTAL_TICKS);
>
> static struct attribute *pmu_empty_event_attrs[] = {
> /* Empty - all events are added as groups with .attr_update() */
>@@ -283,15 +385,23 @@ static const struct attribute_group pmu_events_attr_group = {
>
> static const struct attribute_group *pmu_events_attr_update[] = {
> &pmu_group_gt_c6_residency,
>+ &pmu_group_engine_active_ticks,
>+ &pmu_group_engine_total_ticks,
> NULL,
> };
>
> static void set_supported_events(struct xe_pmu *pmu)
> {
> struct xe_device *xe = container_of(pmu, typeof(*xe), pmu);
>+ struct xe_gt *gt = xe_device_get_gt(xe, 0);
>
> if (!xe->info.skip_guc_pc)
> pmu->supported_events |= BIT_ULL(XE_PMU_EVENT_GT_C6_RESIDENCY);
>+
>+ if (xe_guc_engine_activity_supported(>->uc.guc)) {
>+ pmu->supported_events |= BIT_ULL(XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
>+ pmu->supported_events |= BIT_ULL(XE_PMU_EVENT_ENGINE_TOTAL_TICKS);
>+ }
> }
>
> /**
>diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
>index 0d073a9987c2..769905036b35 100644
>--- a/drivers/gpu/drm/xe/xe_uc.c
>+++ b/drivers/gpu/drm/xe/xe_uc.c
>@@ -14,6 +14,7 @@
> #include "xe_gt_sriov_vf.h"
> #include "xe_guc.h"
> #include "xe_guc_pc.h"
>+#include "xe_guc_engine_activity.h"
> #include "xe_huc.h"
> #include "xe_sriov.h"
> #include "xe_uc_fw.h"
>@@ -210,6 +211,8 @@ int xe_uc_init_hw(struct xe_uc *uc)
> if (ret)
> return ret;
>
>+ xe_guc_engine_activity_enable_stats(&uc->guc);
>+
> /* We don't fail the driver load if HuC fails to auth, but let's warn */
> ret = xe_huc_auth(&uc->huc, XE_HUC_AUTH_VIA_GUC);
> xe_gt_assert(uc_to_gt(uc), !ret);
>--
>2.47.1
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 5/8] drm/xe/xe_pmu: Acquire forcewake on event init for engine events
2025-02-07 6:51 ` Ghimiray, Himal Prasad
@ 2025-02-07 23:31 ` Umesh Nerlige Ramappa
2025-02-10 10:20 ` Riana Tauro
0 siblings, 1 reply; 39+ messages in thread
From: Umesh Nerlige Ramappa @ 2025-02-07 23:31 UTC (permalink / raw)
To: Ghimiray, Himal Prasad
Cc: Riana Tauro, intel-xe, anshuman.gupta, lucas.demarchi,
vinay.belgaumkar, soham.purkait, Rodrigo Vivi
On Fri, Feb 07, 2025 at 12:21:24PM +0530, Ghimiray, Himal Prasad wrote:
>
>
>On 07-02-2025 11:48, Riana Tauro wrote:
>>
>>Hi Himal
>>
>>On 2/7/2025 8:39 AM, Ghimiray, Himal Prasad wrote:
>>>
>>>
>>>On 06-02-2025 16:13, Riana Tauro wrote:
>>>>When the engine events are created, acquire GT forcewake to read gpm
>>>>timestamp required for the events and release on event destroy. This
>>>>cannot be done during read due to the raw spinlock held my pmu.
>>>>
>>>>Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>>>Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>>>>Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>>>>---
>>>> drivers/gpu/drm/xe/xe_pmu.c | 47 +++++++++++++++++++++++++++++--
>>>> drivers/gpu/drm/xe/xe_pmu_types.h | 8 ++++++
>>>> 2 files changed, 53 insertions(+), 2 deletions(-)
>>>>
>>>>diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
>>>>index 06a1c72a3838..5b5fe4424aba 100644
>>>>--- a/drivers/gpu/drm/xe/xe_pmu.c
>>>>+++ b/drivers/gpu/drm/xe/xe_pmu.c
>>>>@@ -7,6 +7,7 @@
>>>> #include <linux/device.h>
>>>> #include "xe_device.h"
>>>>+#include "xe_force_wake.h"
>>>> #include "xe_gt_idle.h"
>>>> #include "xe_guc_engine_activity.h"
>>>> #include "xe_hw_engine.h"
>>>>@@ -102,6 +103,36 @@ static struct xe_hw_engine
>>>>*event_to_hwe(struct perf_event *event)
>>>> return hwe;
>>>> }
>>>>+static bool is_engine_event(u64 config)
>>>>+{
>>>>+ unsigned int event_id = config_to_event_id(config);
>>>>+
>>>>+ return (event_id == XE_PMU_EVENT_ENGINE_TOTAL_TICKS ||
>>>>+ event_id == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
>>>>+}
>>>>+
>>>>+static void event_gt_forcewake(struct perf_event *event)
>>>>+{
>>>>+ struct xe_device *xe = container_of(event->pmu,
>>>>typeof(*xe), pmu.base);
>>>>+ u64 config = event->attr.config;
>>>>+ struct xe_pmu *pmu = &xe->pmu;
>>>>+ struct xe_gt *gt;
>>>>+ unsigned int fw_ref;
>>>>+
>>>>+ gt = xe_device_get_gt(xe, config_to_gt_id(config));
>>>>+ if (!gt || !is_engine_event(config))
>>>>+ return;
>>>>+
>>>>+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
>>>>+ if (!fw_ref)
>>>>+ return;
>>>>+
>>>>+ if (!pmu->fw_ref)
>>>>+ pmu->fw_ref = fw_ref;
>>>>+
>>>>+ pmu->fw_count++;
>>>>+}
>>>>+
>>>> static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
>>>> unsigned int id)
>>>> {
>>>>@@ -144,6 +175,13 @@ static bool event_param_valid(struct
>>>>perf_event *event)
>>>> static void xe_pmu_event_destroy(struct perf_event *event)
>>>> {
>>>> struct xe_device *xe = container_of(event->pmu,
>>>>typeof(*xe), pmu.base);
>>>>+ struct xe_pmu *pmu = &xe->pmu;
>>>>+ struct xe_gt *gt;
>>>>+
>>>>+ if (pmu->fw_count--) {
>>>>+ gt = xe_device_get_gt(xe, config_to_gt_id(event->attr.config));
>>>>+ xe_force_wake_put(gt_to_fw(gt), pmu->fw_ref);
>>>>+ }
>>>
>>>
>>>Considering that fw->lock will be acquired and released multiple
>>>times during the put operation, this might create an overhead.
>>>
>>>How about implementing a _put function that can take the number of
>>>refcounts to decrement as an input parameter, similar to
>>>xe_force_wake_put_many?
>>Could you give more details on your suggestion? Would put_many just
>>decrement the count? But wouldn't that still require a lock?
>>Multiple event_destroys can call the function at the same time
>>right?
>
>I was thinking about putting all refcounts at the end of last event
>destroy in case of multiple pmu's.
>
>>
>>
>>One thing that can be done is to take forcewake on first count and
>>release it when the last event is destroyed in cases of multiple
>>pmu being used
Unless there is a measured inefficiency, I would recommend not
refcounting this in PMU. If a forcewake is already taken, the code in
forcewake_get is just handling increments and not really accessing MMIO,
so we should be okay here.
Also, pmu->fw_count is not required, since the force_wake_get logic
should be already handling that. We should just call get and put and
this should be good enough.
Thanks,
Umesh
>
>This sounds even better.
>
>>>
>>>If the overhead has already been considered and found to be
>>>acceptable, I am fine with avoiding unnecessary modifications to
>>>this patch.
>>This is the first rev for this patch. Open to suggestions
>>
>>Background for this patch: force_wake is needed to read the timestamp
>>register required for engine events.Cannot take it while reading the
>>register from pmu_read due to a lockdep splat
>>(PROVE_RAW_LOCK_NESTING).
>>
>>The suggestion was to take forcewake throughout the duration of
>>event being read
>>
>>Thanks
>>Riana
>>>
>>>
>>>> drm_WARN_ON(&xe->drm, event->parent);
>>>> xe_pm_runtime_put(xe);
>>>>@@ -183,18 +221,23 @@ static int xe_pmu_event_init(struct
>>>>perf_event *event)
>>>> if (!event->parent) {
>>>> drm_dev_get(&xe->drm);
>>>> xe_pm_runtime_get(xe);
>>>>+ event_gt_forcewake(event);
>>>> event->destroy = xe_pmu_event_destroy;
>>>> }
>>>> return 0;
>>>> }
>>>>-static u64 read_engine_events(struct perf_event *event)
>>>>+static u64 read_engine_events(struct perf_event *event, u64 prev)
>>>> {
>>>> struct xe_device *xe = container_of(event->pmu,
>>>>typeof(*xe), pmu.base);
>>>>+ struct xe_pmu *pmu = &xe->pmu;
>>>> struct xe_hw_engine *hwe;
>>>> u64 val = 0;
>>>>+ if (!pmu->fw_count)
>>>>+ return prev;
>>>>+
>>>> hwe = event_to_hwe(event);
>>>> if (!hwe)
>>>> drm_warn(&xe->drm, "unknown pmu engine\n");
>>>>@@ -218,7 +261,7 @@ static u64 __xe_pmu_event_read(struct
>>>>perf_event *event, u64 prev)
>>>> return xe_gt_idle_residency_msec(>->gtidle);
>>>> case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
>>>> case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
>>>>- return read_engine_events(event);
>>>>+ return read_engine_events(event, prev);
>>>> }
>>>> return 0;
>>>>diff --git a/drivers/gpu/drm/xe/xe_pmu_types.h
>>>>b/drivers/gpu/drm/xe/ xe_pmu_types.h
>>>>index f5ba4d56622c..134b3400b19c 100644
>>>>--- a/drivers/gpu/drm/xe/xe_pmu_types.h
>>>>+++ b/drivers/gpu/drm/xe/xe_pmu_types.h
>>>>@@ -30,6 +30,14 @@ struct xe_pmu {
>>>> * @name: Name as registered with perf core.
>>>> */
>>>> const char *name;
>>>>+ /**
>>>>+ * @fw_ref: force_wake ref
>>>>+ */
>>>>+ unsigned int fw_ref;
>>>>+ /**
>>>>+ * @fw_count: force_wake count
>>>>+ */
>>>>+ unsigned int fw_count;
>>>> /**
>>>> * @supported_events: Bitmap of supported events, indexed
>>>>by event id
>>>> */
>>>
>>
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 6/8] drm/xe: Add support for per-function engine activity
2025-02-07 8:11 ` Riana Tauro
@ 2025-02-07 23:50 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 39+ messages in thread
From: Umesh Nerlige Ramappa @ 2025-02-07 23:50 UTC (permalink / raw)
To: Riana Tauro
Cc: Michal Wajdeczko, intel-xe, anshuman.gupta, lucas.demarchi,
vinay.belgaumkar, soham.purkait
On Fri, Feb 07, 2025 at 01:41:26PM +0530, Riana Tauro wrote:
>Hi Michal
>
>On 2/7/2025 12:36 AM, Michal Wajdeczko wrote:
>>
>>
>>On 06.02.2025 11:43, Riana Tauro wrote:
>>>Add support for function level engine activity stats.
>>>This is enabled when sriov_numvfs is set and disabled when vf's
>>
>>VF's
>
>will fix this
>>
>>>are disabled.
>>>
>>>v2: remove unnecessary initialization
>>> move offset to improve code readability (Umesh)
>>> remove global for function engine activity (Lucas)
>>>
>>>Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>>>Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>>>---
>>> drivers/gpu/drm/xe/abi/guc_actions_abi.h | 1 +
>>> drivers/gpu/drm/xe/xe_guc_engine_activity.c | 208 +++++++++++++++---
>>> drivers/gpu/drm/xe/xe_guc_engine_activity.h | 5 +-
>>> .../gpu/drm/xe/xe_guc_engine_activity_types.h | 8 +-
>>> drivers/gpu/drm/xe/xe_pmu.c | 4 +-
>>> 5 files changed, 192 insertions(+), 34 deletions(-)
>>>
>>>diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
>>>index ec516e838ee8..448afb86e05c 100644
>>>--- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
>>>+++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
>>>@@ -141,6 +141,7 @@ enum xe_guc_action {
>>> XE_GUC_ACTION_CLIENT_SOFT_RESET = 0x5507,
>>> XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A,
>>> XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C,
>>>+ XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER = 0x550D,
>>> XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000,
>>> XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002,
>>> XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003,
>>>diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>>>index 5d67fe38639a..0ab9112466f1 100644
>>>--- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>>>+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>>>@@ -15,35 +15,62 @@
>>> #include "xe_hw_engine.h"
>>> #include "xe_map.h"
>>> #include "xe_mmio.h"
>>>+#include "xe_sriov_pf_helpers.h"
>>> #include "xe_trace_guc.h"
>>> #define TOTAL_QUANTA 0x8000
>>>-static struct iosys_map engine_activity_map(struct xe_guc *guc, struct xe_hw_engine *hwe)
>>>+static struct iosys_map engine_activity_map(struct xe_guc *guc, struct xe_hw_engine *hwe,
>>>+ unsigned int index)
>>> {
>>> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>>>- struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
>>>+ struct engine_activity_buffer *buffer;
>>> u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
>>>- size_t offset = 0;
>>>+ size_t offset;
>>>+
>>>+ if (engine_activity->num_functions) {
>>>+ buffer = &engine_activity->function_buffer;
>>>+ offset = sizeof(struct guc_engine_activity_data) * index;
>>
>>maybe we should assert that index < num_functions?
>
>This function gets called from get_active_ticks and get_total_ticks
>
>is_function_valid does this check
>
>+ if (engine_activity->num_functions && fn_id >=
>engine_activity->num_functions)
>+ return false;
>>
>>>+ } else {
>>>+ buffer = &engine_activity->device_buffer;
>>>+ offset = 0;
>>>+ }
>>>- offset = offsetof(struct guc_engine_activity_data,
>>>+ offset += offsetof(struct guc_engine_activity_data,
>>> engine_activity[guc_class][hwe->logical_instance]);
>>> return IOSYS_MAP_INIT_OFFSET(&buffer->activity_bo->vmap, offset);
>>> }
>>>-static struct iosys_map engine_metadata_map(struct xe_guc *guc)
>>>+static struct iosys_map engine_metadata_map(struct xe_guc *guc,
>>>+ unsigned int index)
>>> {
>>> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>>>- struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
>>>+ struct engine_activity_buffer *buffer;
>>>+ size_t offset;
>>>+
>>>+ if (engine_activity->num_functions) {
>>>+ buffer = &engine_activity->function_buffer;
>>>+ offset = sizeof(struct guc_engine_activity_metadata) * index;
>>>+ } else {
>>>+ buffer = &engine_activity->device_buffer;
>>>+ offset = 0;
>>>+ }
>>>- return buffer->metadata_bo->vmap;
>>>+ return IOSYS_MAP_INIT_OFFSET(&buffer->metadata_bo->vmap, offset);
>>> }
>>> static int allocate_engine_activity_group(struct xe_guc *guc)
>>> {
>>> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>>>- u32 num_activity_group = 1;
>>>+ struct xe_device *xe = guc_to_xe(guc);
>>>+ u32 num_activity_group;
>>>+
>>>+ /*
>>>+ * An additional activity group is allocated for PF
>>>+ */
>>>+ num_activity_group = IS_SRIOV_PF(xe) ? xe_sriov_pf_get_totalvfs(xe) + 1 : 1;
>>>+
>>> engine_activity->eag = kmalloc_array(num_activity_group,
>>> sizeof(struct engine_activity_group),
>>>@@ -59,10 +86,11 @@ static int allocate_engine_activity_group(struct xe_guc *guc)
>>> }
>>> static int allocate_engine_activity_buffers(struct xe_guc *guc,
>>>- struct engine_activity_buffer *buffer)
>>>+ struct engine_activity_buffer *buffer,
>>>+ int count)
>>> {
>>>- u32 metadata_size = sizeof(struct guc_engine_activity_metadata);
>>>- u32 size = sizeof(struct guc_engine_activity_data);
>>>+ u32 metadata_size = sizeof(struct guc_engine_activity_metadata) * count;
>>>+ u32 size = sizeof(struct guc_engine_activity_data) * count;
>>> struct xe_gt *gt = guc_to_gt(guc);
>>> struct xe_tile *tile = gt_to_tile(gt);
>>> struct xe_bo *bo, *metadata_bo;
>>>@@ -105,10 +133,17 @@ static bool engine_activity_supported(struct xe_guc *guc)
>>> return false;
>>> }
>>>-static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe)
>>>+static void free_engine_activity_buffers(struct engine_activity_buffer *buffer)
>>>+{
>>>+ xe_bo_unpin_map_no_vm(buffer->metadata_bo);
>>>+ xe_bo_unpin_map_no_vm(buffer->activity_bo);
>>>+}
>>>+
>>>+static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe,
>>>+ unsigned int index)
>>> {
>>> struct xe_guc *guc = &hwe->gt->uc.guc;
>>>- struct engine_activity_group *eag = &guc->engine_activity.eag[0];
>>>+ struct engine_activity_group *eag = &guc->engine_activity.eag[index];
>>> u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
>>> return &eag->engine[guc_class][hwe->logical_instance];
>>>@@ -125,9 +160,10 @@ static u64 cpu_ns_to_guc_tsc_tick(ktime_t ns, u32 freq)
>>> #define read_metadata_record(xe_, map_, field_) \
>>> xe_map_rd_field(xe_, map_, 0, struct guc_engine_activity_metadata, field_)
>>>-static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
>>>+static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe,
>>>+ unsigned int index)
>>> {
>>>- struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
>>>+ struct engine_activity *ea = hw_engine_to_engine_activity(hwe, index);
>>> struct guc_engine_activity *cached_activity = &ea->activity;
>>> struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
>>> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>>>@@ -138,8 +174,8 @@ static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
>>> u64 active_ticks, gpm_ts;
>>> u16 change_num;
>>>- activity_map = engine_activity_map(guc, hwe);
>>>- metadata_map = engine_metadata_map(guc);
>>>+ activity_map = engine_activity_map(guc, hwe, index);
>>>+ metadata_map = engine_metadata_map(guc, index);
>>> global_change_num = read_metadata_record(xe, &metadata_map, global_change_num);
>>> /* GuC has not initialized activity data yet, return 0 */
>>>@@ -182,9 +218,9 @@ static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
>>> return ea->total + ea->active;
>>> }
>>>-static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
>>>+static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe, unsigned int index)
>>> {
>>>- struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
>>>+ struct engine_activity *ea = hw_engine_to_engine_activity(hwe, index);
>>> struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
>>> struct guc_engine_activity *cached_activity = &ea->activity;
>>> struct iosys_map activity_map, metadata_map;
>>>@@ -193,8 +229,8 @@ static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
>>> u64 numerator;
>>> u16 quanta_ratio;
>>>- activity_map = engine_activity_map(guc, hwe);
>>>- metadata_map = engine_metadata_map(guc);
>>>+ activity_map = engine_activity_map(guc, hwe, index);
>>>+ metadata_map = engine_metadata_map(guc, index);
>>> if (!cached_metadata->guc_tsc_frequency_hz)
>>> cached_metadata->guc_tsc_frequency_hz = read_metadata_record(xe, &metadata_map,
>>>@@ -236,10 +272,35 @@ static int enable_engine_activity_stats(struct xe_guc *guc)
>>> return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action));
>>> }
>>>-static void engine_activity_set_cpu_ts(struct xe_guc *guc)
>>>+static int enable_function_engine_activity_stats(struct xe_guc *guc, bool enable)
>>
>>IMO it's cleaner to have separate 'disable()' function that will prepare
>>and send tailored action params
>>
>>> {
>>> struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>>>- struct engine_activity_group *eag = &engine_activity->eag[0];
>>>+ u32 metadata_ggtt_addr = 0, ggtt_addr = 0, num_functions = 0;
>>>+ struct engine_activity_buffer *buffer = &engine_activity->function_buffer;
>>>+ u32 action[6];
>>>+ int len = 0;
>>>+
>>>+ if (enable) {
>>>+ metadata_ggtt_addr = xe_bo_ggtt_addr(buffer->metadata_bo);
>>>+ ggtt_addr = xe_bo_ggtt_addr(buffer->activity_bo);
>>>+ num_functions = engine_activity->num_functions;
>>>+ }
>>>+
>>>+ action[len++] = XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER;
>>>+ action[len++] = num_functions;
>>>+ action[len++] = metadata_ggtt_addr;
>>>+ action[len++] = 0;
>>>+ action[len++] = ggtt_addr;
>>>+ action[len++] = 0;
>>>+
>>>+ /* Blocking here to ensure the buffers are ready before reading them */
>>>+ return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action));
>>>+}
>>>+
>>>+static void engine_activity_set_cpu_ts(struct xe_guc *guc, unsigned int index)
>>>+{
>>>+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>>>+ struct engine_activity_group *eag = &engine_activity->eag[index];
>>> int i, j;
>>> for (i = 0; i < GUC_MAX_ENGINE_CLASSES; i++)
>>>@@ -256,36 +317,106 @@ static u32 gpm_timestamp_shift(struct xe_gt *gt)
>>> return 3 - REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
>>> }
>>>+static bool is_function_valid(struct xe_guc *guc, unsigned int fn_id)
>>>+{
>>>+ struct xe_device *xe = guc_to_xe(guc);
>>>+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>>>+
>>>+ if (!IS_SRIOV_PF(xe) && fn_id)
>>>+ return false;
>>>+
>>>+ if (engine_activity->num_functions && fn_id >= engine_activity->num_functions)
>>>+ return false;
>>>+
>>>+ return true;
>>>+}
>>>+
>>>+static int engine_activity_disable_function_stats(struct xe_guc *guc, bool enable)
>>>+{
>>>+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>>>+ struct engine_activity_buffer *buffer = &engine_activity->function_buffer;
>>>+ int ret;
>>>+
>>>+ if (!engine_activity->num_functions)
>>>+ return 0;
>>>+
>>>+ ret = enable_function_engine_activity_stats(guc, enable);
>>>+ if (ret)
>>>+ return ret;
>>>+
>>>+ free_engine_activity_buffers(buffer);
>>>+ engine_activity->num_functions = 0;
>>>+
>>>+ return 0;
>>>+}
>>>+
>>>+static int engine_activity_enable_function_stats(struct xe_guc *guc, int num_vfs, bool enable)
>>>+{
>>>+ struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>>>+ struct engine_activity_buffer *buffer = &engine_activity->function_buffer;
>>>+ int ret, i;
>>>+
>>>+ if (!num_vfs)
>>>+ return 0;
>>>+
>>>+ /* This includes 1 PF and num_vfs */
>>>+ engine_activity->num_functions = num_vfs + 1;
>>>+
>>>+ ret = allocate_engine_activity_buffers(guc, buffer, engine_activity->num_functions);
>>>+ if (ret)
>>>+ return ret;
>>>+
>>>+ ret = enable_function_engine_activity_stats(guc, enable);
>>>+ if (ret) {
>>>+ free_engine_activity_buffers(buffer);
>>>+ engine_activity->num_functions = 0;
>>>+ return ret;
>>>+ }
>>>+
>>>+ for (i = 0; i < engine_activity->num_functions; i++)
>>>+ engine_activity_set_cpu_ts(guc, i + 1);
>>>+
>>>+ return 0;
>>>+}
>>>+
>>> /**
>>> * xe_guc_engine_activity_active_ticks - Get engine active ticks
>>> * @hwe: The hw_engine object
>>>+ * @fn_id: function id to report on
>>> *
>>> * Return: accumulated ticks @hwe was active since engine activity stats were enabled.
>>> */
>>>-u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe)
>>>+u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe, unsigned int fn_id)
>>> {
>>> struct xe_guc *guc = &hwe->gt->uc.guc;
>>> if (!xe_guc_engine_activity_supported(guc))
>>> return 0;
>>>- return get_engine_active_ticks(guc, hwe);
>>>+ if (!is_function_valid(guc, fn_id))
>>>+ return 0;
>>>+
>>>+ return get_engine_active_ticks(guc, hwe, fn_id);
>>> }
>>> /**
>>> * xe_guc_engine_activity_total_ticks - Get engine total ticks
>>> * @hwe: The hw_engine object
>>>+ * @fn_id: function id to report on
>>> *
>>> * Return: accumulated quanta of ticks allocated for the engine
>>> */
>>>-u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe)
>>>+u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe, unsigned int fn_id)
>>> {
>>> struct xe_guc *guc = &hwe->gt->uc.guc;
>>> if (!xe_guc_engine_activity_supported(guc))
>>> return 0;
>>>- return get_engine_total_ticks(guc, hwe);
>>>+ if (!is_function_valid(guc, fn_id))
>>>+ return 0;
>>>+
>>>+ return get_engine_total_ticks(guc, hwe, fn_id);
>>> }
>>> /**
>>>@@ -303,6 +434,25 @@ bool xe_guc_engine_activity_supported(struct xe_guc *guc)
>>> return engine_activity->supported;
>>> }
>>>+/**
>>>+ * xe_guc_engine_activity_function_stats - Enable/Disable per-function engine activity stats
>>>+ * @guc: The GuC object
>>>+ * @num_vfs: number of vfs
>>>+ * @enable: true to enable, false otherwise
>>>+ *
>>>+ * Return: 0 on success, negative error code otherwise
>>>+ */
>>>+int xe_guc_engine_activity_function_stats(struct xe_guc *guc, int num_vfs, bool enable)
>>>+{
>>>+ if (!xe_guc_engine_activity_supported(guc))
>>>+ return 0;
>>>+
>>>+ if (enable)
>>>+ return engine_activity_enable_function_stats(guc, num_vfs, enable);
>>>+
>>>+ return engine_activity_disable_function_stats(guc, enable);
>>>+}
>>>+
>>> /**
>>> * xe_guc_engine_activity_enable_stats - Enable engine activity stats
>>> * @guc: The GuC object
>>>@@ -320,7 +470,7 @@ void xe_guc_engine_activity_enable_stats(struct xe_guc *guc)
>>> if (ret)
>>> xe_gt_err(guc_to_gt(guc), "failed to enable activity stats%d\n", ret);
>>> else
>>>- engine_activity_set_cpu_ts(guc);
>>>+ engine_activity_set_cpu_ts(guc, 0);
>>> }
>>> static void engine_activity_fini(void *arg)
>>>@@ -350,7 +500,7 @@ int xe_guc_engine_activity_init(struct xe_guc *guc)
>>> return ret;
>>> }
>>>- ret = allocate_engine_activity_buffers(guc, &engine_activity->device_buffer);
>>>+ ret = allocate_engine_activity_buffers(guc, &engine_activity->device_buffer, 1);
>>> if (ret) {
>>> xe_gt_err(gt, "failed to allocate activity buffers%d\n", ret);
>>> kfree(engine_activity->eag);
>>>diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.h b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>>>index 9d3ea3f67b6a..765397b959e0 100644
>>>--- a/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>>>+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>>>@@ -14,6 +14,7 @@ struct xe_guc;
>>> int xe_guc_engine_activity_init(struct xe_guc *guc);
>>> bool xe_guc_engine_activity_supported(struct xe_guc *guc);
>>> void xe_guc_engine_activity_enable_stats(struct xe_guc *guc);
>>>-u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe);
>>>-u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe);
>>>+int xe_guc_engine_activity_function_stats(struct xe_guc *guc, int num_vfs, bool enable);
>>>+u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe, unsigned int fn_id);
>>>+u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe, unsigned int fn_id);
>>> #endif
>>>diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>>>index 81002c83d65e..d95ec6a74b30 100644
>>>--- a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>>>+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>>>@@ -79,14 +79,20 @@ struct xe_guc_engine_activity {
>>> /** @num_activity_group: number of activity groups */
>>> u32 num_activity_group;
>>>+ /** @num_functions: number of functions */
>>>+ u32 num_functions;
>>>+
>>> /** @supported: checks if engine activity is supported */
>>> bool supported;
>>>- /** @eag: holds the device level engine activity data */
>>>+ /** @eag: array with entries to hold engine activity stats of global, PF and VF's */
>>> struct engine_activity_group *eag;
>>> /** @device_buffer: buffer object for global engine activity */
>>> struct engine_activity_buffer device_buffer;
>>
>>do we need both device ad function buffers ?
>
>If we have a single buffer, then every time num_vfs is
>set, the device buffer(XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER
>= 0x550C) needs to be disabled and then the function buffers need
>to be created and vice versa on disable.
>
>Would be better to have two buffers. @Umesh thoughts?
I think the native vs SRIOV flows are easier with separate buffers as
long as we are only allocating the required buffers.
Thanks,
Umesh
>
>Thanks
>Riana
>>
>>for non-PF case (native) we can still buffer[1]
>>for PF case we will allocate buffer[1 + totalVFs]
>>and in the future
>>for PF case we will allocate buffer[1]
>>
>>>+
>>>+ /** @function_buffer: buffer object for per-function engine activity */
>>>+ struct engine_activity_buffer function_buffer;
>>> };
>>> #endif
>>>diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
>>>index 5b5fe4424aba..a758fc517048 100644
>>>--- a/drivers/gpu/drm/xe/xe_pmu.c
>>>+++ b/drivers/gpu/drm/xe/xe_pmu.c
>>>@@ -242,9 +242,9 @@ static u64 read_engine_events(struct perf_event *event, u64 prev)
>>> if (!hwe)
>>> drm_warn(&xe->drm, "unknown pmu engine\n");
>>> else if (config_to_event_id(event->attr.config) == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS)
>>>- val = xe_guc_engine_activity_active_ticks(hwe);
>>>+ val = xe_guc_engine_activity_active_ticks(hwe, 0);
>>> else
>>>- val = xe_guc_engine_activity_total_ticks(hwe);
>>>+ val = xe_guc_engine_activity_total_ticks(hwe, 0);
>>> return val;
>>> }
>>
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 1/8] drm/xe: Add engine activity support
2025-02-06 18:28 ` Michal Wajdeczko
@ 2025-02-10 7:07 ` Riana Tauro
0 siblings, 0 replies; 39+ messages in thread
From: Riana Tauro @ 2025-02-10 7:07 UTC (permalink / raw)
To: Michal Wajdeczko, intel-xe
Cc: anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi,
vinay.belgaumkar, soham.purkait
Hi Michal
Thank you for the review comments
On 2/6/2025 11:58 PM, Michal Wajdeczko wrote:
>
>
> On 06.02.2025 11:43, Riana Tauro wrote:
>> GuC provides support to read engine counters to calculate the
>> engine activity. KMD exposes two counters via the PMU interface to
>> calculate engine activity
>>
>> Engine Active Ticks(engine-active-ticks) - active ticks of engine
>> Engine Total Ticks (engine-total-ticks) - total ticks of engine
>>
>> Engine activity percentage can be calculated as below
>> Engine activity % = (engine active ticks/engine total ticks) * 100.
>>
>> v2: fix cosmetic review comments
>> add forcewake for gpm_ts (Umesh)
>>
>> v3: fix CI hooks error
>> change function parameters and unpin bo on error
>> of allocate_activity_buffers
>> fix kernel-doc (Umesh)
>> use engine activity (Umesh, Lucas)
>> rename xe_engine_activity to xe_guc_engine_*
>> fix commit message to use engine activity (Lucas, Umesh)
>>
>> v4: remove forcewake as engine is already running
>> when reading gpm timestamp
>>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>> ---
>> drivers/gpu/drm/xe/Makefile | 1 +
>> drivers/gpu/drm/xe/abi/guc_actions_abi.h | 1 +
>> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +
>> drivers/gpu/drm/xe/xe_guc_engine_activity.c | 317 ++++++++++++++++++
>> drivers/gpu/drm/xe/xe_guc_engine_activity.h | 18 +
>> .../gpu/drm/xe/xe_guc_engine_activity_types.h | 89 +++++
>> drivers/gpu/drm/xe/xe_guc_fwif.h | 19 ++
>> drivers/gpu/drm/xe/xe_guc_types.h | 4 +
>> 8 files changed, 451 insertions(+)
>> create mode 100644 drivers/gpu/drm/xe/xe_guc_engine_activity.c
>> create mode 100644 drivers/gpu/drm/xe/xe_guc_engine_activity.h
>> create mode 100644 drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>>
>> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
>> index 5ce65ccb3c08..aa5673f6aadf 100644
>> --- a/drivers/gpu/drm/xe/Makefile
>> +++ b/drivers/gpu/drm/xe/Makefile
>> @@ -33,6 +33,7 @@ xe-y += xe_bb.o \
>> xe_device_sysfs.o \
>> xe_dma_buf.o \
>> xe_drm_client.o \
>> + xe_guc_engine_activity.o \
>
> is this a right spot for this new .o ?
>
>> xe_exec.o \
>> xe_exec_queue.o \
>> xe_execlist.o \
>> diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
>> index fee385532fb0..ec516e838ee8 100644
>> --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
>> +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
>> @@ -140,6 +140,7 @@ enum xe_guc_action {
>> XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC = 0x4601,
>> XE_GUC_ACTION_CLIENT_SOFT_RESET = 0x5507,
>> XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A,
>> + XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C,
>> XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000,
>> XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002,
>> XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003,
>> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> index 096859072396..124cc398798e 100644
>> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> @@ -358,6 +358,8 @@
>> #define RENDER_AWAKE_STATUS REG_BIT(1)
>> #define MEDIA_SLICE0_AWAKE_STATUS REG_BIT(0)
>>
>> +#define MISC_STATUS_0 XE_REG(0xa500)
>> +
>> #define FORCEWAKE_MEDIA_VDBOX(n) XE_REG(0xa540 + (n) * 4)
>> #define FORCEWAKE_MEDIA_VEBOX(n) XE_REG(0xa560 + (n) * 4)
>> #define FORCEWAKE_GSC XE_REG(0xa618)
>> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>> new file mode 100644
>> index 000000000000..088209b9c228
>> --- /dev/null
>> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>> @@ -0,0 +1,317 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2025 Intel Corporation
>> + */
>
> shouldn't we have 1 empty line here?
>
>> +#include "xe_guc_engine_activity.h"
>
> nit: since we have HDRTEST enabled, it's also OK to include this .h
> inline with rest of xe headers below
>
>> +
>> +#include "abi/guc_actions_abi.h"
>> +#include "regs/xe_gt_regs.h"
>> +
>> +#include "xe_bo.h"
>> +#include "xe_force_wake.h"
>> +#include "xe_gt_printk.h"
>> +#include "xe_guc.h"
>> +#include "xe_guc_ct.h"
>> +#include "xe_hw_engine.h"
>> +#include "xe_map.h"
>> +#include "xe_mmio.h"
>> +
>> +#define TOTAL_QUANTA 0x8000
>> +
>> +static struct iosys_map engine_activity_map(struct xe_guc *guc, struct xe_hw_engine *hwe)
>> +{
>> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> + struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
>> + u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
>> + size_t offset = 0;
>
> no need to initialize here, you set it up just below
>
>> +
>> + offset = offsetof(struct guc_engine_activity_data,
>> + engine_activity[guc_class][hwe->logical_instance]);
>> +
>> + return IOSYS_MAP_INIT_OFFSET(&buffer->activity_bo->vmap, offset);
>> +}
>> +
>> +static struct iosys_map engine_metadata_map(struct xe_guc *guc)
>> +{
>> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> + struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
>> +
>> + return buffer->metadata_bo->vmap;
>> +}
>> +
>> +static int allocate_engine_activity_group(struct xe_guc *guc)
>> +{
>> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> + u32 num_activity_group = 1;
>
> maybe add some comment that this is for future extension coming soon?
>
>> +
>> + engine_activity->eag = kmalloc_array(num_activity_group,
>> + sizeof(struct engine_activity_group),
>> + GFP_KERNEL);
>> +
>> + if (!engine_activity->eag)
>> + return -ENOMEM;
>> +
>> + memset(engine_activity->eag, 0, num_activity_group * sizeof(struct engine_activity_group));
>
> can't we just pass _GFP_ZERO to kmalloc_array() ?
>
>> + engine_activity->num_activity_group = num_activity_group;
>> +
>> + return 0;
>> +}
>> +
>> +static int allocate_engine_activity_buffers(struct xe_guc *guc,
>> + struct engine_activity_buffer *buffer)
>> +{
>> + u32 metadata_size = sizeof(struct guc_engine_activity_metadata);
>> + u32 size = sizeof(struct guc_engine_activity_data);
>> + struct xe_gt *gt = guc_to_gt(guc);
>> + struct xe_tile *tile = gt_to_tile(gt);
>> + struct xe_bo *bo, *metadata_bo;
>> +
>> + metadata_bo = xe_managed_bo_create_pin_map(gt_to_xe(gt), tile, PAGE_ALIGN(metadata_size),
>> + XE_BO_FLAG_SYSTEM |
>> + XE_BO_FLAG_GGTT |
>> + XE_BO_FLAG_GGTT_INVALIDATE);
>> + if (IS_ERR(metadata_bo))
>> + return PTR_ERR(metadata_bo);
>> +
>> + bo = xe_managed_bo_create_pin_map(gt_to_xe(gt), tile, PAGE_ALIGN(size),
>> + XE_BO_FLAG_VRAM_IF_DGFX(tile) |
>> + XE_BO_FLAG_GGTT |
>> + XE_BO_FLAG_GGTT_INVALIDATE);
>> +
>> + if (IS_ERR(bo)) {
>> + xe_bo_unpin_map_no_vm(metadata_bo);
>
> metadata_bo is managed, you risk UAF on release
>
>> + return PTR_ERR(bo);
>> + }
>> +
>> + buffer->metadata_bo = metadata_bo;
>> + buffer->activity_bo = bo;
>> + return 0;
>> +}
>> +
>> +static struct engine_activity *hw_engine_to_engine_activity(struct xe_hw_engine *hwe)
>> +{
>> + struct xe_guc *guc = &hwe->gt->uc.guc;
>> + struct engine_activity_group *eag = &guc->engine_activity.eag[0];
>> + u16 guc_class = xe_engine_class_to_guc_class(hwe->class);
>> +
>> + return &eag->engine[guc_class][hwe->logical_instance];
>> +}
>> +
>> +static u64 cpu_ns_to_guc_tsc_tick(ktime_t ns, u32 freq)
>> +{
>> + return mul_u64_u32_div(ns, freq, NSEC_PER_SEC);
>> +}
>> +
>> +#define read_engine_activity_record(xe_, map_, field_) \
>> + xe_map_rd_field(xe_, map_, 0, struct guc_engine_activity, field_)
>> +
>> +#define read_metadata_record(xe_, map_, field_) \
>> + xe_map_rd_field(xe_, map_, 0, struct guc_engine_activity_metadata, field_)
>> +
>> +static u64 get_engine_active_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
>> +{
>> + struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
>> + struct guc_engine_activity *cached_activity = &ea->activity;
>> + struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
>> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> + struct iosys_map activity_map, metadata_map;
>> + struct xe_device *xe = guc_to_xe(guc);
>> + struct xe_gt *gt = guc_to_gt(guc);
>> + u32 last_update_tick, global_change_num;
>> + u64 active_ticks, gpm_ts;
>> + u16 change_num;
>> +
>> + activity_map = engine_activity_map(guc, hwe);
>> + metadata_map = engine_metadata_map(guc);
>> + global_change_num = read_metadata_record(xe, &metadata_map, global_change_num);
>> +
>> + /* GuC has not initialized activity data yet, return 0 */
>> + if (!global_change_num)
>> + goto update;
>> +
>> + if (global_change_num == cached_metadata->global_change_num)
>> + goto update;
>> + else
>
> 'else' not needed here after 'goto'
>
>> + cached_metadata->global_change_num = global_change_num;
>> +
>> + change_num = read_engine_activity_record(xe, &activity_map, change_num);
>> +
>> + if (!change_num || change_num == cached_activity->change_num)
>> + goto update;
>> +
>> + /* read engine activity values */
>> + last_update_tick = read_engine_activity_record(xe, &activity_map, last_update_tick);
>> + active_ticks = read_engine_activity_record(xe, &activity_map, active_ticks);
>> +
>> + /* activity calculations */
>> + ea->running = !!last_update_tick;
>> + ea->total += active_ticks - cached_activity->active_ticks;
>> + ea->active = 0;
>> +
>> + /* cache the counter */
>> + cached_activity->change_num = change_num;
>> + cached_activity->last_update_tick = last_update_tick;
>> + cached_activity->active_ticks = active_ticks;
>> +
>> +update:
>> + if (ea->running) {
>> + gpm_ts = xe_mmio_read64_2x32(>->mmio, MISC_STATUS_0) >>
>> + engine_activity->gpm_timestamp_shift;
>> + ea->active = lower_32_bits(gpm_ts) - cached_activity->last_update_tick;
>> + }
>> +
>> + return ea->total + ea->active;
>> +}
>> +
>> +static u64 get_engine_total_ticks(struct xe_guc *guc, struct xe_hw_engine *hwe)
>> +{
>> + struct engine_activity *ea = hw_engine_to_engine_activity(hwe);
>> + struct guc_engine_activity_metadata *cached_metadata = &ea->metadata;
>> + struct guc_engine_activity *cached_activity = &ea->activity;
>> + struct iosys_map activity_map, metadata_map;
>> + struct xe_device *xe = guc_to_xe(guc);
>> + ktime_t now, cpu_delta;
>> + u64 numerator;
>> + u16 quanta_ratio;
>> +
>> + activity_map = engine_activity_map(guc, hwe);
>> + metadata_map = engine_metadata_map(guc);
>> +
>> + if (!cached_metadata->guc_tsc_frequency_hz)
>> + cached_metadata->guc_tsc_frequency_hz = read_metadata_record(xe, &metadata_map,
>> + guc_tsc_frequency_hz);
>> +
>> + quanta_ratio = read_engine_activity_record(xe, &activity_map, quanta_ratio);
>> + cached_activity->quanta_ratio = quanta_ratio;
>> +
>> + /* Total ticks calculations */
>> + now = ktime_get();
>> + cpu_delta = now - ea->last_cpu_ts;
>> + ea->last_cpu_ts = now;
>> + numerator = (ea->quanta_remainder_ns + cpu_delta) * cached_activity->quanta_ratio;
>> + ea->quanta_ns += numerator / TOTAL_QUANTA;
>> + ea->quanta_remainder_ns = numerator % TOTAL_QUANTA;
>> + ea->quanta = cpu_ns_to_guc_tsc_tick(ea->quanta_ns, cached_metadata->guc_tsc_frequency_hz);
>> +
>> + return ea->quanta;
>> +}
>> +
>> +static int enable_engine_activity_stats(struct xe_guc *guc)
>> +{
>> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> + struct engine_activity_buffer *buffer = &engine_activity->device_buffer;
>> + u32 metadata_ggtt_addr = xe_bo_ggtt_addr(buffer->metadata_bo);
>> + u32 ggtt_addr = xe_bo_ggtt_addr(buffer->activity_bo);
>> + int len = 0;
>> + u32 action[5];
>
> magic 5, maybe define action as
>
> u32 action[] = {
> XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER,
> xe_bo_ggtt_addr(buffer->metadata_bo),
> 0,
> xe_bo_ggtt_addr(buffer->activity_bo),
> 0,
> };
>
>> +
>> + action[len++] = XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER;
>> + action[len++] = metadata_ggtt_addr;
>> + action[len++] = 0;
>> + action[len++] = ggtt_addr;
>> + action[len++] = 0;
>> +
>> + /* Blocking here to ensure the buffers are ready before reading them */
>> + return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action));
>> +}
>> +
>> +static void engine_activity_set_cpu_ts(struct xe_guc *guc)
>> +{
>> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> + struct engine_activity_group *eag = &engine_activity->eag[0];
>> + int i, j;
>> +
>> + for (i = 0; i < GUC_MAX_ENGINE_CLASSES; i++)
>> + for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; j++)
>> + eag->engine[i][j].last_cpu_ts = ktime_get();
>
> do we need to call ktime_get() inside the loop?
Since we have to loop it again anyway, used it inside loop.
>
>> +}
>> +
>> +static u32 gpm_timestamp_shift(struct xe_gt *gt)
>> +{
>> + u32 reg;
>> +
>> + reg = xe_mmio_read32(>->mmio, RPM_CONFIG0);
>> +
>> + return 3 - REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
>> +}
>> +
>> +/**
>> + * xe_guc_engine_activity_active_ticks - Get engine active ticks
>> + * @hwe: The hw_engine object
>> + *
>> + * Return: accumulated ticks @hwe was active since engine activity stats were enabled.
>> + */
>> +u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe)
>
> this function doesn't fit here as it takes hwe, not guc
This function has to have hwe. Even if i move to xe_hw_engine file it
still needs to come to this layer with the same parameters
Can add an additional parameter guc along with hwe.
Will fix the rest of the review comments
Thank you
Riana
>
>> +{
>> + struct xe_guc *guc = &hwe->gt->uc.guc;
>> +
>> + return get_engine_active_ticks(guc, hwe);
>> +}
>> +
>> +/**
>> + * xe_guc_engine_activity_total_ticks - Get engine total ticks
>> + * @hwe: The hw_engine object
>> + *
>> + * Return: accumulated quanta of ticks allocated for the engine
>> + */
>> +u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe)
>
> ditto
>
>> +{
>> + struct xe_guc *guc = &hwe->gt->uc.guc;
>> +
>> + return get_engine_total_ticks(guc, hwe);
>> +}
>> +
>> +/**
>> + * xe_guc_engine_activity_enable_stats - Enable engine activity stats
>> + * @guc: The GuC object
>> + *
>> + * Enable engine activity stats and set initial timestamps
>> + */
>> +void xe_guc_engine_activity_enable_stats(struct xe_guc *guc)
>> +{
>> + int ret;
>> +
>> + ret = enable_engine_activity_stats(guc);
>> + if (ret)
>> + xe_gt_err(guc_to_gt(guc), "failed to enable activity stats%d\n", ret);
>> + else
>> + engine_activity_set_cpu_ts(guc);
>> +}
>> +
>> +static void engine_activity_fini(void *arg)
>> +{
>> + struct xe_guc_engine_activity *engine_activity = arg;
>> +
>> + kfree(engine_activity->eag);
>> +}
>> +
>> +/**
>> + * xe_guc_engine_activity_init - Initialize the engine activity data
>> + * @guc: The GuC object
>> + *
>> + * Return: 0 on success, negative error code otherwise.
>> + */
>> +int xe_guc_engine_activity_init(struct xe_guc *guc)
>> +{
>> + struct xe_guc_engine_activity *engine_activity = &guc->engine_activity;
>> + struct xe_gt *gt = guc_to_gt(guc);
>> + int ret;
>
> this feature likely will not work on VF
> shouldn't we at least assert here that we don't call this init() when
> running as VF ?
>
>> +
>> + ret = allocate_engine_activity_group(guc);
>> + if (ret) {
>> + xe_gt_err(gt, "failed to allocate activity group %d\n", ret);
>
> nit: it's nicer to print error codes as %pe
>
>> + return ret;
>> + }
>> +
>> + ret = allocate_engine_activity_buffers(guc, &engine_activity->device_buffer);
>> + if (ret) {
>> + xe_gt_err(gt, "failed to allocate activity buffers%d\n", ret);
>
> nit: it's nicer to print error codes as %pe
>
>> + kfree(engine_activity->eag);
>> + return ret;
>> + }
>> +
>> + engine_activity->gpm_timestamp_shift = gpm_timestamp_shift(gt);
>> +
>> + return devm_add_action_or_reset(gt_to_xe(gt)->drm.dev, engine_activity_fini,
>> + engine_activity);
>
> engine_activity->eag is just a plain memory
> can't we just make it drm_managed ?
>
>> +}
>> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.h b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>> new file mode 100644
>> index 000000000000..c00f3da5513d
>> --- /dev/null
>> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>> @@ -0,0 +1,18 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright © 2025 Intel Corporation
>> + */
>> +
>> +#ifndef _XE_GUC_ENGINE_ACTIVITY_H_
>> +#define _XE_GUC_ENGINE_ACTIVITY_H_
>> +
>> +#include <linux/types.h>
>> +
>> +struct xe_hw_engine;
>> +struct xe_guc;
>> +
>> +int xe_guc_engine_activity_init(struct xe_guc *guc);
>> +void xe_guc_engine_activity_enable_stats(struct xe_guc *guc);
>> +u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe);
>> +u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe);
>> +#endif
>> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>> new file mode 100644
>> index 000000000000..a2ab327d3eec
>> --- /dev/null
>> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>> @@ -0,0 +1,89 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright © 2025 Intel Corporation
>> + */
>> +
>> +#ifndef _XE_GUC_ENGINE_ACTIVITY_TYPES_H_
>> +#define _XE_GUC_ENGINE_ACTIVITY_TYPES_H_
>> +
>> +#include <linux/types.h>
>> +
>> +#include "xe_guc_fwif.h"
>> +/**
>> + * struct engine_activity - Engine specific activity data
>> + *
>> + * Contains engine specific activity data and snapshot of the
>> + * structures from GuC
>> + */
>> +struct engine_activity {
>> + /** @active: current activity */
>> + u64 active;
>> +
>> + /** @last_cpu_ts: cpu timestamp in nsec of previous sample */
>> + u64 last_cpu_ts;
>> +
>> + /** @quanta: total quanta used on HW */
>> + u64 quanta;
>> +
>> + /** @quanta_ns: total quanta_ns used on HW */
>> + u64 quanta_ns;
>> +
>> + /**
>> + * @quanta_remainder_ns: remainder when the CPU time is scaled as
>> + * per the quanta_ratio. This remainder is used in subsequent
>> + * quanta calculations.
>> + */
>> + u64 quanta_remainder_ns;
>> +
>> + /** @total: total engine activity */
>> + u64 total;
>> +
>> + /** @running: true if engine is running some work */
>> + bool running;
>> +
>> + /** @metadata: snapshot of engine activity metadata */
>> + struct guc_engine_activity_metadata metadata;
>> +
>> + /** @activity: snapshot of engine activity counter */
>> + struct guc_engine_activity activity;
>> +};
>> +
>> +/**
>> + * struct engine_activity_group - Activity data for all engines
>> + */
>> +struct engine_activity_group {
>> + /** @engine: engine specific activity data */
>> + struct engine_activity engine[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
>> +};
>> +
>> +/**
>> + * struct engine_activity_buffer - engine activity buffers
>> + *
>> + * This contains the buffers allocated for metadata and activity data
>> + */
>> +struct engine_activity_buffer {
>> + /** @activity_bo: object allocated to hold activity data */
>> + struct xe_bo *activity_bo;
>> +
>> + /** @metadata_bo: object allocated to hold activity metadata */
>> + struct xe_bo *metadata_bo;
>> +};
>> +
>> +/**
>> + * struct xe_guc_engine_activity - Data used by engine activity implementation
>> + */
>> +struct xe_guc_engine_activity {
>> + /** @gpm_timestamp_shift: Right shift value for the gpm timestamp */
>> + u32 gpm_timestamp_shift;
>> +
>> + /** @num_activity_group: number of activity groups */
>> + u32 num_activity_group;
>> +
>> + /** @eag: holds the device level engine activity data */
>> + struct engine_activity_group *eag;
>> +
>> + /** @device_buffer: buffer object for global engine activity */
>> + struct engine_activity_buffer device_buffer;
>> +};
>> +#endif
>> +
>> diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
>> index 057153f89b30..6f57578b07cb 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_fwif.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
>> @@ -208,6 +208,25 @@ struct guc_engine_usage {
>> struct guc_engine_usage_record engines[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
>> } __packed;
>>
>> +/* Engine Activity stats */
>> +struct guc_engine_activity {
>> + u16 change_num;
>> + u16 quanta_ratio;
>> + u32 last_update_tick;
>> + u64 active_ticks;
>> +} __packed;
>> +
>> +struct guc_engine_activity_data {
>> + struct guc_engine_activity engine_activity[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
>> +} __packed;
>> +
>> +struct guc_engine_activity_metadata {
>> + u32 guc_tsc_frequency_hz;
>> + u32 lag_latency_usec;
>> + u32 global_change_num;
>> + u32 reserved;
>> +} __packed;
>> +
>> /* This action will be programmed in C1BC - SOFT_SCRATCH_15_REG */
>> enum xe_guc_recv_message {
>> XE_GUC_RECV_MSG_CRASH_DUMP_POSTED = BIT(1),
>> diff --git a/drivers/gpu/drm/xe/xe_guc_types.h b/drivers/gpu/drm/xe/xe_guc_types.h
>> index 573aa6308380..63bac64429a5 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_types.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_types.h
>> @@ -13,6 +13,7 @@
>> #include "xe_guc_ads_types.h"
>> #include "xe_guc_buf_types.h"
>> #include "xe_guc_ct_types.h"
>> +#include "xe_guc_engine_activity_types.h"
>> #include "xe_guc_fwif.h"
>> #include "xe_guc_log_types.h"
>> #include "xe_guc_pc_types.h"
>> @@ -103,6 +104,9 @@ struct xe_guc {
>> /** @relay: GuC Relay Communication used in SR-IOV */
>> struct xe_guc_relay relay;
>>
>> + /** @engine_activity: Device specific engine activity */
>> + struct xe_guc_engine_activity engine_activity;
>> +
>> /**
>> * @notify_reg: Register which is written to notify GuC of H2G messages
>> */
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 3/8] drm/xe/guc: Expose engine activity only for supported GuC version
2025-02-07 21:37 ` Umesh Nerlige Ramappa
@ 2025-02-10 7:28 ` Riana Tauro
0 siblings, 0 replies; 39+ messages in thread
From: Riana Tauro @ 2025-02-10 7:28 UTC (permalink / raw)
To: Umesh Nerlige Ramappa
Cc: intel-xe, anshuman.gupta, lucas.demarchi, vinay.belgaumkar,
soham.purkait, John Harrison, Michal Wajdeczko
Hi Umesh
On 2/8/2025 3:07 AM, Umesh Nerlige Ramappa wrote:
> On Thu, Feb 06, 2025 at 04:13:52PM +0530, Riana Tauro wrote:
>> Engine activity is supported only on GuC submission version >= 1.14.1
>> Allow enabling/reading engine activity only on supported
>> GuC versions. Warn once if not supported.
>>
>> v2: use guc interface version (John)
>> v3: do not use drm_WARN (Umesh)
>> v4: use variable for supported and use gt logs
>> use a friendlier log message (Michal)
>>
>> Cc: John Harrison <John.C.Harrison@Intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_guc_engine_activity.c | 42 +++++++++++++++++++
>> drivers/gpu/drm/xe/xe_guc_engine_activity.h | 1 +
>> .../gpu/drm/xe/xe_guc_engine_activity_types.h | 3 ++
>> 3 files changed, 46 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/
>> gpu/drm/xe/xe_guc_engine_activity.c
>> index 9c08af273397..5d67fe38639a 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
>> @@ -89,6 +89,22 @@ static int allocate_engine_activity_buffers(struct
>> xe_guc *guc,
>> return 0;
>> }
>>
>> +static bool engine_activity_supported(struct xe_guc *guc)
>> +{
>> + struct xe_uc_fw_version *version = &guc-
>> >fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
>> + struct xe_gt *gt = guc_to_gt(guc);
>> +
>> + /* engine activity stats is supported from GuC interface version
>> (1.14.1) */
>> + if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 14, 1))
>> + return true;
>> +
>> + xe_gt_warn(gt,
>> + "engine activity stats unsupported in GuC interface v%u.
>> %u.%u, v%u.%u.%u or newer required\n",
>> + version->major, version->minor, version->patch, 1, 14, 1);
>> +
>> + return false;
>> +}
>> +
>> static struct engine_activity *hw_engine_to_engine_activity(struct
>> xe_hw_engine *hwe)
>> {
>> struct xe_guc *guc = &hwe->gt->uc.guc;
>> @@ -250,6 +266,9 @@ u64 xe_guc_engine_activity_active_ticks(struct
>> xe_hw_engine *hwe)
>> {
>> struct xe_guc *guc = &hwe->gt->uc.guc;
>>
>> + if (!xe_guc_engine_activity_supported(guc))
>> + return 0;
>> +
>> return get_engine_active_ticks(guc, hwe);
>> }
>>
>> @@ -263,9 +282,27 @@ u64 xe_guc_engine_activity_total_ticks(struct
>> xe_hw_engine *hwe)
>> {
>> struct xe_guc *guc = &hwe->gt->uc.guc;
>>
>> + if (!xe_guc_engine_activity_supported(guc))
>> + return 0;
>> +
>> return get_engine_total_ticks(guc, hwe);
>> }
>>
>> +/**
>> + * xe_guc_engine_activity_supported - Check support for engine
>> activity stats
>> + * @guc: The GuC object
>> + *
>> + * Engine activity stats is supported from GuC interface version
>> (1.14.1)
>> + *
>> + * Return: true if engine activity stats supported, false otherwise
>> + */
>> +bool xe_guc_engine_activity_supported(struct xe_guc *guc)
>> +{
>> + struct xe_guc_engine_activity *engine_activity = &guc-
>> >engine_activity;
>> +
>> + return engine_activity->supported;
>> +}
>> +
>> /**
>> * xe_guc_engine_activity_enable_stats - Enable engine activity stats
>> * @guc: The GuC object
>> @@ -276,6 +313,9 @@ void xe_guc_engine_activity_enable_stats(struct
>> xe_guc *guc)
>> {
>> int ret;
>>
>> + if (!xe_guc_engine_activity_supported(guc))
>> + return;
>> +
>> ret = enable_engine_activity_stats(guc);
>> if (ret)
>> xe_gt_err(guc_to_gt(guc), "failed to enable activity
>> stats%d\n", ret);
>> @@ -302,6 +342,8 @@ int xe_guc_engine_activity_init(struct xe_guc *guc)
>> struct xe_gt *gt = guc_to_gt(guc);
>> int ret;
>>
>> + engine_activity->supported = engine_activity_supported(guc);
>> +
>
> Is xe_guc_engine_activity_init() called even on a VF? If not, then
> initializing engine_activity->supported here may not be sufficient.
Will return in xe_guc_engine_activity_init before the initialization
of supported if its VF. So supported will not be set to 1 and will
return false for all the other calls
if (IS_SRIOV_VF(xe))
return 0;
Thanks
Riana
> Thanks,
> Umesh
>
>> ret = allocate_engine_activity_group(guc);
>> if (ret) {
>> xe_gt_err(gt, "failed to allocate activity group %d\n", ret);
>> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.h b/drivers/
>> gpu/drm/xe/xe_guc_engine_activity.h
>> index c00f3da5513d..9d3ea3f67b6a 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.h
>> @@ -12,6 +12,7 @@ struct xe_hw_engine;
>> struct xe_guc;
>>
>> int xe_guc_engine_activity_init(struct xe_guc *guc);
>> +bool xe_guc_engine_activity_supported(struct xe_guc *guc);
>> void xe_guc_engine_activity_enable_stats(struct xe_guc *guc);
>> u64 xe_guc_engine_activity_active_ticks(struct xe_hw_engine *hwe);
>> u64 xe_guc_engine_activity_total_ticks(struct xe_hw_engine *hwe);
>> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h b/
>> drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>> index a2ab327d3eec..81002c83d65e 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h
>> @@ -79,6 +79,9 @@ struct xe_guc_engine_activity {
>> /** @num_activity_group: number of activity groups */
>> u32 num_activity_group;
>>
>> + /** @supported: checks if engine activity is supported */
>> + bool supported;
>> +
>> /** @eag: holds the device level engine activity data */
>> struct engine_activity_group *eag;
>>
>> --
>> 2.47.1
>>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 5/8] drm/xe/xe_pmu: Acquire forcewake on event init for engine events
2025-02-07 23:31 ` Umesh Nerlige Ramappa
@ 2025-02-10 10:20 ` Riana Tauro
2025-02-11 17:33 ` Umesh Nerlige Ramappa
0 siblings, 1 reply; 39+ messages in thread
From: Riana Tauro @ 2025-02-10 10:20 UTC (permalink / raw)
To: Umesh Nerlige Ramappa, Ghimiray, Himal Prasad
Cc: intel-xe, anshuman.gupta, lucas.demarchi, vinay.belgaumkar,
soham.purkait, Rodrigo Vivi
On 2/8/2025 5:01 AM, Umesh Nerlige Ramappa wrote:
> On Fri, Feb 07, 2025 at 12:21:24PM +0530, Ghimiray, Himal Prasad wrote:
>>
>>
>> On 07-02-2025 11:48, Riana Tauro wrote:
>>>
>>> Hi Himal
>>>
>>> On 2/7/2025 8:39 AM, Ghimiray, Himal Prasad wrote:
>>>>
>>>>
>>>> On 06-02-2025 16:13, Riana Tauro wrote:
>>>>> When the engine events are created, acquire GT forcewake to read gpm
>>>>> timestamp required for the events and release on event destroy. This
>>>>> cannot be done during read due to the raw spinlock held my pmu.
>>>>>
>>>>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>>>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>>>>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>>>>> ---
>>>>> drivers/gpu/drm/xe/xe_pmu.c | 47 ++++++++++++++++++++++++++
>>>>> +++--
>>>>> drivers/gpu/drm/xe/xe_pmu_types.h | 8 ++++++
>>>>> 2 files changed, 53 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
>>>>> index 06a1c72a3838..5b5fe4424aba 100644
>>>>> --- a/drivers/gpu/drm/xe/xe_pmu.c
>>>>> +++ b/drivers/gpu/drm/xe/xe_pmu.c
>>>>> @@ -7,6 +7,7 @@
>>>>> #include <linux/device.h>
>>>>> #include "xe_device.h"
>>>>> +#include "xe_force_wake.h"
>>>>> #include "xe_gt_idle.h"
>>>>> #include "xe_guc_engine_activity.h"
>>>>> #include "xe_hw_engine.h"
>>>>> @@ -102,6 +103,36 @@ static struct xe_hw_engine
>>>>> *event_to_hwe(struct perf_event *event)
>>>>> return hwe;
>>>>> }
>>>>> +static bool is_engine_event(u64 config)
>>>>> +{
>>>>> + unsigned int event_id = config_to_event_id(config);
>>>>> +
>>>>> + return (event_id == XE_PMU_EVENT_ENGINE_TOTAL_TICKS ||
>>>>> + event_id == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
>>>>> +}
>>>>> +
>>>>> +static void event_gt_forcewake(struct perf_event *event)
>>>>> +{
>>>>> + struct xe_device *xe = container_of(event->pmu, typeof(*xe),
>>>>> pmu.base);
>>>>> + u64 config = event->attr.config;
>>>>> + struct xe_pmu *pmu = &xe->pmu;
>>>>> + struct xe_gt *gt;
>>>>> + unsigned int fw_ref;
>>>>> +
>>>>> + gt = xe_device_get_gt(xe, config_to_gt_id(config));
>>>>> + if (!gt || !is_engine_event(config))
>>>>> + return;
>>>>> +
>>>>> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
>>>>> + if (!fw_ref)
>>>>> + return;
>>>>> +
>>>>> + if (!pmu->fw_ref)
>>>>> + pmu->fw_ref = fw_ref;
>>>>> +
>>>>> + pmu->fw_count++;
>>>>> +}
>>>>> +
>>>>> static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
>>>>> unsigned int id)
>>>>> {
>>>>> @@ -144,6 +175,13 @@ static bool event_param_valid(struct
>>>>> perf_event *event)
>>>>> static void xe_pmu_event_destroy(struct perf_event *event)
>>>>> {
>>>>> struct xe_device *xe = container_of(event->pmu, typeof(*xe),
>>>>> pmu.base);
>>>>> + struct xe_pmu *pmu = &xe->pmu;
>>>>> + struct xe_gt *gt;
>>>>> +
>>>>> + if (pmu->fw_count--) {
>>>>> + gt = xe_device_get_gt(xe, config_to_gt_id(event-
>>>>> >attr.config));
>>>>> + xe_force_wake_put(gt_to_fw(gt), pmu->fw_ref);
>>>>> + }
>>>>
>>>>
>>>> Considering that fw->lock will be acquired and released multiple
>>>> times during the put operation, this might create an overhead.
>>>>
>>>> How about implementing a _put function that can take the number of
>>>> refcounts to decrement as an input parameter, similar to
>>>> xe_force_wake_put_many?
>>> Could you give more details on your suggestion? Would put_many just
>>> decrement the count? But wouldn't that still require a lock? Multiple
>>> event_destroys can call the function at the same time right?
>>
>> I was thinking about putting all refcounts at the end of last event
>> destroy in case of multiple pmu's.
>>
>>>
>>>
>>> One thing that can be done is to take forcewake on first count and
>>> release it when the last event is destroyed in cases of multiple
>>> pmu being used
>
> Unless there is a measured inefficiency, I would recommend not
> refcounting this in PMU. If a forcewake is already taken, the code in
> forcewake_get is just handling increments and not really accessing MMIO,
> so we should be okay here.
>
> Also, pmu->fw_count is not required, since the force_wake_get logic
> should be already handling that. We should just call get and put and
> this should be good enough.
I added the counting because if forcewake get fails then destroy won't
know if it has to call xe_force_wake_put (multiple perf opened). If
there is count and ref set, then can be called based on that.
If we can return -ENOTSUPPORTED if forcewake get fails for engine
events, then the above will work
Thanks
Riana
>
> Thanks,
> Umesh
>
>>
>> This sounds even better.
>>
>>>>
>>>> If the overhead has already been considered and found to be
>>>> acceptable, I am fine with avoiding unnecessary modifications to
>>>> this patch.
>>> This is the first rev for this patch. Open to suggestions
>>>
>>> Background for this patch: force_wake is needed to read the timestamp
>>> register required for engine events.Cannot take it while reading the
>>> register from pmu_read due to a lockdep splat (PROVE_RAW_LOCK_NESTING).
>>>
>>> The suggestion was to take forcewake throughout the duration of event
>>> being read
>>>
>>> Thanks
>>> Riana
>>>>
>>>>
>>>>> drm_WARN_ON(&xe->drm, event->parent);
>>>>> xe_pm_runtime_put(xe);
>>>>> @@ -183,18 +221,23 @@ static int xe_pmu_event_init(struct
>>>>> perf_event *event)
>>>>> if (!event->parent) {
>>>>> drm_dev_get(&xe->drm);
>>>>> xe_pm_runtime_get(xe);
>>>>> + event_gt_forcewake(event);
>>>>> event->destroy = xe_pmu_event_destroy;
>>>>> }
>>>>> return 0;
>>>>> }
>>>>> -static u64 read_engine_events(struct perf_event *event)
>>>>> +static u64 read_engine_events(struct perf_event *event, u64 prev)
>>>>> {
>>>>> struct xe_device *xe = container_of(event->pmu, typeof(*xe),
>>>>> pmu.base);
>>>>> + struct xe_pmu *pmu = &xe->pmu;
>>>>> struct xe_hw_engine *hwe;
>>>>> u64 val = 0;
>>>>> + if (!pmu->fw_count)
>>>>> + return prev;
>>>>> +
>>>>> hwe = event_to_hwe(event);
>>>>> if (!hwe)
>>>>> drm_warn(&xe->drm, "unknown pmu engine\n");
>>>>> @@ -218,7 +261,7 @@ static u64 __xe_pmu_event_read(struct
>>>>> perf_event *event, u64 prev)
>>>>> return xe_gt_idle_residency_msec(>->gtidle);
>>>>> case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
>>>>> case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
>>>>> - return read_engine_events(event);
>>>>> + return read_engine_events(event, prev);
>>>>> }
>>>>> return 0;
>>>>> diff --git a/drivers/gpu/drm/xe/xe_pmu_types.h b/drivers/gpu/drm/
>>>>> xe/ xe_pmu_types.h
>>>>> index f5ba4d56622c..134b3400b19c 100644
>>>>> --- a/drivers/gpu/drm/xe/xe_pmu_types.h
>>>>> +++ b/drivers/gpu/drm/xe/xe_pmu_types.h
>>>>> @@ -30,6 +30,14 @@ struct xe_pmu {
>>>>> * @name: Name as registered with perf core.
>>>>> */
>>>>> const char *name;
>>>>> + /**
>>>>> + * @fw_ref: force_wake ref
>>>>> + */
>>>>> + unsigned int fw_ref;
>>>>> + /**
>>>>> + * @fw_count: force_wake count
>>>>> + */
>>>>> + unsigned int fw_count;
>>>>> /**
>>>>> * @supported_events: Bitmap of supported events, indexed by
>>>>> event id
>>>>> */
>>>>
>>>
>>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 5/8] drm/xe/xe_pmu: Acquire forcewake on event init for engine events
2025-02-10 10:20 ` Riana Tauro
@ 2025-02-11 17:33 ` Umesh Nerlige Ramappa
2025-02-12 5:01 ` Riana Tauro
0 siblings, 1 reply; 39+ messages in thread
From: Umesh Nerlige Ramappa @ 2025-02-11 17:33 UTC (permalink / raw)
To: Riana Tauro
Cc: Ghimiray, Himal Prasad, intel-xe, anshuman.gupta, lucas.demarchi,
vinay.belgaumkar, soham.purkait, Rodrigo Vivi
On Mon, Feb 10, 2025 at 03:50:00PM +0530, Riana Tauro wrote:
>
>
>On 2/8/2025 5:01 AM, Umesh Nerlige Ramappa wrote:
>>On Fri, Feb 07, 2025 at 12:21:24PM +0530, Ghimiray, Himal Prasad wrote:
>>>
>>>
>>>On 07-02-2025 11:48, Riana Tauro wrote:
>>>>
>>>>Hi Himal
>>>>
>>>>On 2/7/2025 8:39 AM, Ghimiray, Himal Prasad wrote:
>>>>>
>>>>>
>>>>>On 06-02-2025 16:13, Riana Tauro wrote:
>>>>>>When the engine events are created, acquire GT forcewake to read gpm
>>>>>>timestamp required for the events and release on event destroy. This
>>>>>>cannot be done during read due to the raw spinlock held my pmu.
>>>>>>
>>>>>>Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>>>>>Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>>>>>>Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>>>>>>---
>>>>>> drivers/gpu/drm/xe/xe_pmu.c | 47
>>>>>>++++++++++++++++++++++++++ +++--
>>>>>> drivers/gpu/drm/xe/xe_pmu_types.h | 8 ++++++
>>>>>> 2 files changed, 53 insertions(+), 2 deletions(-)
>>>>>>
>>>>>>diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
>>>>>>index 06a1c72a3838..5b5fe4424aba 100644
>>>>>>--- a/drivers/gpu/drm/xe/xe_pmu.c
>>>>>>+++ b/drivers/gpu/drm/xe/xe_pmu.c
>>>>>>@@ -7,6 +7,7 @@
>>>>>> #include <linux/device.h>
>>>>>> #include "xe_device.h"
>>>>>>+#include "xe_force_wake.h"
>>>>>> #include "xe_gt_idle.h"
>>>>>> #include "xe_guc_engine_activity.h"
>>>>>> #include "xe_hw_engine.h"
>>>>>>@@ -102,6 +103,36 @@ static struct xe_hw_engine
>>>>>>*event_to_hwe(struct perf_event *event)
>>>>>> return hwe;
>>>>>> }
>>>>>>+static bool is_engine_event(u64 config)
>>>>>>+{
>>>>>>+ unsigned int event_id = config_to_event_id(config);
>>>>>>+
>>>>>>+ return (event_id == XE_PMU_EVENT_ENGINE_TOTAL_TICKS ||
>>>>>>+ event_id == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
>>>>>>+}
>>>>>>+
>>>>>>+static void event_gt_forcewake(struct perf_event *event)
>>>>>>+{
>>>>>>+ struct xe_device *xe = container_of(event->pmu,
>>>>>>typeof(*xe), pmu.base);
>>>>>>+ u64 config = event->attr.config;
>>>>>>+ struct xe_pmu *pmu = &xe->pmu;
>>>>>>+ struct xe_gt *gt;
>>>>>>+ unsigned int fw_ref;
>>>>>>+
>>>>>>+ gt = xe_device_get_gt(xe, config_to_gt_id(config));
>>>>>>+ if (!gt || !is_engine_event(config))
>>>>>>+ return;
>>>>>>+
>>>>>>+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
>>>>>>+ if (!fw_ref)
>>>>>>+ return;
>>>>>>+
>>>>>>+ if (!pmu->fw_ref)
>>>>>>+ pmu->fw_ref = fw_ref;
>>>>>>+
>>>>>>+ pmu->fw_count++;
>>>>>>+}
>>>>>>+
>>>>>> static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
>>>>>> unsigned int id)
>>>>>> {
>>>>>>@@ -144,6 +175,13 @@ static bool event_param_valid(struct
>>>>>>perf_event *event)
>>>>>> static void xe_pmu_event_destroy(struct perf_event *event)
>>>>>> {
>>>>>> struct xe_device *xe = container_of(event->pmu,
>>>>>>typeof(*xe), pmu.base);
>>>>>>+ struct xe_pmu *pmu = &xe->pmu;
>>>>>>+ struct xe_gt *gt;
>>>>>>+
>>>>>>+ if (pmu->fw_count--) {
>>>>>>+ gt = xe_device_get_gt(xe, config_to_gt_id(event-
>>>>>>>attr.config));
>>>>>>+ xe_force_wake_put(gt_to_fw(gt), pmu->fw_ref);
>>>>>>+ }
>>>>>
>>>>>
>>>>>Considering that fw->lock will be acquired and released
>>>>>multiple times during the put operation, this might create an
>>>>>overhead.
>>>>>
>>>>>How about implementing a _put function that can take the
>>>>>number of refcounts to decrement as an input parameter,
>>>>>similar to xe_force_wake_put_many?
>>>>Could you give more details on your suggestion? Would put_many
>>>>just decrement the count? But wouldn't that still require a
>>>>lock? Multiple event_destroys can call the function at the same
>>>>time right?
>>>
>>>I was thinking about putting all refcounts at the end of last
>>>event destroy in case of multiple pmu's.
>>>
>>>>
>>>>
>>>>One thing that can be done is to take forcewake on first count
>>>>and release it when the last event is destroyed in cases of
>>>>multiple
>>>>pmu being used
>>
>>Unless there is a measured inefficiency, I would recommend not
>>refcounting this in PMU. If a forcewake is already taken, the code
>>in forcewake_get is just handling increments and not really
>>accessing MMIO, so we should be okay here.
>>
>>Also, pmu->fw_count is not required, since the force_wake_get logic
>>should be already handling that. We should just call get and put and
>>this should be good enough.
>
>I added the counting because if forcewake get fails then destroy won't
>know if it has to call xe_force_wake_put (multiple perf opened). If
>there is count and ref set, then can be called based on that.
>
>If we can return -ENOTSUPPORTED if forcewake get fails for engine
>events, then the above will work
Hmm, not sure I understand. If forcewake_get fails, then we don't need
to call force_wake_put. Also if force_wake_get fails, we should fail the
event init (which means the destroy should not get called).
Thanks,
Umesh
>
>Thanks
>Riana
>
>>
>>Thanks,
>>Umesh
>>
>>>
>>>This sounds even better.
>>>
>>>>>
>>>>>If the overhead has already been considered and found to be
>>>>>acceptable, I am fine with avoiding unnecessary modifications
>>>>>to this patch.
>>>>This is the first rev for this patch. Open to suggestions
>>>>
>>>>Background for this patch: force_wake is needed to read the timestamp
>>>>register required for engine events.Cannot take it while reading
>>>>the register from pmu_read due to a lockdep splat
>>>>(PROVE_RAW_LOCK_NESTING).
>>>>
>>>>The suggestion was to take forcewake throughout the duration of
>>>>event being read
>>>>
>>>>Thanks
>>>>Riana
>>>>>
>>>>>
>>>>>> drm_WARN_ON(&xe->drm, event->parent);
>>>>>> xe_pm_runtime_put(xe);
>>>>>>@@ -183,18 +221,23 @@ static int xe_pmu_event_init(struct
>>>>>>perf_event *event)
>>>>>> if (!event->parent) {
>>>>>> drm_dev_get(&xe->drm);
>>>>>> xe_pm_runtime_get(xe);
>>>>>>+ event_gt_forcewake(event);
>>>>>> event->destroy = xe_pmu_event_destroy;
>>>>>> }
>>>>>> return 0;
>>>>>> }
>>>>>>-static u64 read_engine_events(struct perf_event *event)
>>>>>>+static u64 read_engine_events(struct perf_event *event, u64 prev)
>>>>>> {
>>>>>> struct xe_device *xe = container_of(event->pmu,
>>>>>>typeof(*xe), pmu.base);
>>>>>>+ struct xe_pmu *pmu = &xe->pmu;
>>>>>> struct xe_hw_engine *hwe;
>>>>>> u64 val = 0;
>>>>>>+ if (!pmu->fw_count)
>>>>>>+ return prev;
>>>>>>+
>>>>>> hwe = event_to_hwe(event);
>>>>>> if (!hwe)
>>>>>> drm_warn(&xe->drm, "unknown pmu engine\n");
>>>>>>@@ -218,7 +261,7 @@ static u64 __xe_pmu_event_read(struct
>>>>>>perf_event *event, u64 prev)
>>>>>> return xe_gt_idle_residency_msec(>->gtidle);
>>>>>> case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
>>>>>> case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
>>>>>>- return read_engine_events(event);
>>>>>>+ return read_engine_events(event, prev);
>>>>>> }
>>>>>> return 0;
>>>>>>diff --git a/drivers/gpu/drm/xe/xe_pmu_types.h
>>>>>>b/drivers/gpu/drm/ xe/ xe_pmu_types.h
>>>>>>index f5ba4d56622c..134b3400b19c 100644
>>>>>>--- a/drivers/gpu/drm/xe/xe_pmu_types.h
>>>>>>+++ b/drivers/gpu/drm/xe/xe_pmu_types.h
>>>>>>@@ -30,6 +30,14 @@ struct xe_pmu {
>>>>>> * @name: Name as registered with perf core.
>>>>>> */
>>>>>> const char *name;
>>>>>>+ /**
>>>>>>+ * @fw_ref: force_wake ref
>>>>>>+ */
>>>>>>+ unsigned int fw_ref;
>>>>>>+ /**
>>>>>>+ * @fw_count: force_wake count
>>>>>>+ */
>>>>>>+ unsigned int fw_count;
>>>>>> /**
>>>>>> * @supported_events: Bitmap of supported events,
>>>>>>indexed by event id
>>>>>> */
>>>>>
>>>>
>>>
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v5 5/8] drm/xe/xe_pmu: Acquire forcewake on event init for engine events
2025-02-11 17:33 ` Umesh Nerlige Ramappa
@ 2025-02-12 5:01 ` Riana Tauro
0 siblings, 0 replies; 39+ messages in thread
From: Riana Tauro @ 2025-02-12 5:01 UTC (permalink / raw)
To: Umesh Nerlige Ramappa
Cc: Ghimiray, Himal Prasad, intel-xe, anshuman.gupta, lucas.demarchi,
vinay.belgaumkar, soham.purkait, Rodrigo Vivi
On 2/11/2025 11:03 PM, Umesh Nerlige Ramappa wrote:
> On Mon, Feb 10, 2025 at 03:50:00PM +0530, Riana Tauro wrote:
>>
>>
>> On 2/8/2025 5:01 AM, Umesh Nerlige Ramappa wrote:
>>> On Fri, Feb 07, 2025 at 12:21:24PM +0530, Ghimiray, Himal Prasad wrote:
>>>>
>>>>
>>>> On 07-02-2025 11:48, Riana Tauro wrote:
>>>>>
>>>>> Hi Himal
>>>>>
>>>>> On 2/7/2025 8:39 AM, Ghimiray, Himal Prasad wrote:
>>>>>>
>>>>>>
>>>>>> On 06-02-2025 16:13, Riana Tauro wrote:
>>>>>>> When the engine events are created, acquire GT forcewake to read gpm
>>>>>>> timestamp required for the events and release on event destroy. This
>>>>>>> cannot be done during read due to the raw spinlock held my pmu.
>>>>>>>
>>>>>>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>>>>>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>>>>>>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>>>>>>> ---
>>>>>>> drivers/gpu/drm/xe/xe_pmu.c | 47 ++++++++++++++++++++++++
>>>>>>> ++ +++--
>>>>>>> drivers/gpu/drm/xe/xe_pmu_types.h | 8 ++++++
>>>>>>> 2 files changed, 53 insertions(+), 2 deletions(-)
>>>>>>>
>>>>>>> diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/
>>>>>>> xe_pmu.c
>>>>>>> index 06a1c72a3838..5b5fe4424aba 100644
>>>>>>> --- a/drivers/gpu/drm/xe/xe_pmu.c
>>>>>>> +++ b/drivers/gpu/drm/xe/xe_pmu.c
>>>>>>> @@ -7,6 +7,7 @@
>>>>>>> #include <linux/device.h>
>>>>>>> #include "xe_device.h"
>>>>>>> +#include "xe_force_wake.h"
>>>>>>> #include "xe_gt_idle.h"
>>>>>>> #include "xe_guc_engine_activity.h"
>>>>>>> #include "xe_hw_engine.h"
>>>>>>> @@ -102,6 +103,36 @@ static struct xe_hw_engine
>>>>>>> *event_to_hwe(struct perf_event *event)
>>>>>>> return hwe;
>>>>>>> }
>>>>>>> +static bool is_engine_event(u64 config)
>>>>>>> +{
>>>>>>> + unsigned int event_id = config_to_event_id(config);
>>>>>>> +
>>>>>>> + return (event_id == XE_PMU_EVENT_ENGINE_TOTAL_TICKS ||
>>>>>>> + event_id == XE_PMU_EVENT_ENGINE_ACTIVE_TICKS);
>>>>>>> +}
>>>>>>> +
>>>>>>> +static void event_gt_forcewake(struct perf_event *event)
>>>>>>> +{
>>>>>>> + struct xe_device *xe = container_of(event->pmu, typeof(*xe),
>>>>>>> pmu.base);
>>>>>>> + u64 config = event->attr.config;
>>>>>>> + struct xe_pmu *pmu = &xe->pmu;
>>>>>>> + struct xe_gt *gt;
>>>>>>> + unsigned int fw_ref;
>>>>>>> +
>>>>>>> + gt = xe_device_get_gt(xe, config_to_gt_id(config));
>>>>>>> + if (!gt || !is_engine_event(config))
>>>>>>> + return;
>>>>>>> +
>>>>>>> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
>>>>>>> + if (!fw_ref)
>>>>>>> + return;
>>>>>>> +
>>>>>>> + if (!pmu->fw_ref)
>>>>>>> + pmu->fw_ref = fw_ref;
>>>>>>> +
>>>>>>> + pmu->fw_count++;
>>>>>>> +}
>>>>>>> +
>>>>>>> static bool event_supported(struct xe_pmu *pmu, unsigned int gt,
>>>>>>> unsigned int id)
>>>>>>> {
>>>>>>> @@ -144,6 +175,13 @@ static bool event_param_valid(struct
>>>>>>> perf_event *event)
>>>>>>> static void xe_pmu_event_destroy(struct perf_event *event)
>>>>>>> {
>>>>>>> struct xe_device *xe = container_of(event->pmu,
>>>>>>> typeof(*xe), pmu.base);
>>>>>>> + struct xe_pmu *pmu = &xe->pmu;
>>>>>>> + struct xe_gt *gt;
>>>>>>> +
>>>>>>> + if (pmu->fw_count--) {
>>>>>>> + gt = xe_device_get_gt(xe, config_to_gt_id(event-
>>>>>>>> attr.config));
>>>>>>> + xe_force_wake_put(gt_to_fw(gt), pmu->fw_ref);
>>>>>>> + }
>>>>>>
>>>>>>
>>>>>> Considering that fw->lock will be acquired and released multiple
>>>>>> times during the put operation, this might create an overhead.
>>>>>>
>>>>>> How about implementing a _put function that can take the number of
>>>>>> refcounts to decrement as an input parameter, similar to
>>>>>> xe_force_wake_put_many?
>>>>> Could you give more details on your suggestion? Would put_many just
>>>>> decrement the count? But wouldn't that still require a lock?
>>>>> Multiple event_destroys can call the function at the same time right?
>>>>
>>>> I was thinking about putting all refcounts at the end of last event
>>>> destroy in case of multiple pmu's.
>>>>
>>>>>
>>>>>
>>>>> One thing that can be done is to take forcewake on first count and
>>>>> release it when the last event is destroyed in cases of multiple
>>>>> pmu being used
>>>
>>> Unless there is a measured inefficiency, I would recommend not
>>> refcounting this in PMU. If a forcewake is already taken, the code in
>>> forcewake_get is just handling increments and not really accessing
>>> MMIO, so we should be okay here.
>>>
>>> Also, pmu->fw_count is not required, since the force_wake_get logic
>>> should be already handling that. We should just call get and put and
>>> this should be good enough.
>>
>> I added the counting because if forcewake get fails then destroy won't
>> know if it has to call xe_force_wake_put (multiple perf opened). If
>> there is count and ref set, then can be called based on that.
>>
>> If we can return -ENOTSUPPORTED if forcewake get fails for engine
>> events, then the above will work
>
> Hmm, not sure I understand. If forcewake_get fails, then we don't need
> to call force_wake_put. Also if force_wake_get fails, we should fail the
> event init (which means the destroy should not get called).
Yeah this is what i meant, since force_wake needs runtime pm.
Have done the above in v6
Thanks
Riana
>
> Thanks,
> Umesh
>
>>
>> Thanks
>> Riana
>>
>>>
>>> Thanks,
>>> Umesh
>>>
>>>>
>>>> This sounds even better.
>>>>
>>>>>>
>>>>>> If the overhead has already been considered and found to be
>>>>>> acceptable, I am fine with avoiding unnecessary modifications to
>>>>>> this patch.
>>>>> This is the first rev for this patch. Open to suggestions
>>>>>
>>>>> Background for this patch: force_wake is needed to read the timestamp
>>>>> register required for engine events.Cannot take it while reading
>>>>> the register from pmu_read due to a lockdep splat
>>>>> (PROVE_RAW_LOCK_NESTING).
>>>>>
>>>>> The suggestion was to take forcewake throughout the duration of
>>>>> event being read
>>>>>
>>>>> Thanks
>>>>> Riana
>>>>>>
>>>>>>
>>>>>>> drm_WARN_ON(&xe->drm, event->parent);
>>>>>>> xe_pm_runtime_put(xe);
>>>>>>> @@ -183,18 +221,23 @@ static int xe_pmu_event_init(struct
>>>>>>> perf_event *event)
>>>>>>> if (!event->parent) {
>>>>>>> drm_dev_get(&xe->drm);
>>>>>>> xe_pm_runtime_get(xe);
>>>>>>> + event_gt_forcewake(event);
>>>>>>> event->destroy = xe_pmu_event_destroy;
>>>>>>> }
>>>>>>> return 0;
>>>>>>> }
>>>>>>> -static u64 read_engine_events(struct perf_event *event)
>>>>>>> +static u64 read_engine_events(struct perf_event *event, u64 prev)
>>>>>>> {
>>>>>>> struct xe_device *xe = container_of(event->pmu,
>>>>>>> typeof(*xe), pmu.base);
>>>>>>> + struct xe_pmu *pmu = &xe->pmu;
>>>>>>> struct xe_hw_engine *hwe;
>>>>>>> u64 val = 0;
>>>>>>> + if (!pmu->fw_count)
>>>>>>> + return prev;
>>>>>>> +
>>>>>>> hwe = event_to_hwe(event);
>>>>>>> if (!hwe)
>>>>>>> drm_warn(&xe->drm, "unknown pmu engine\n");
>>>>>>> @@ -218,7 +261,7 @@ static u64 __xe_pmu_event_read(struct
>>>>>>> perf_event *event, u64 prev)
>>>>>>> return xe_gt_idle_residency_msec(>->gtidle);
>>>>>>> case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
>>>>>>> case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
>>>>>>> - return read_engine_events(event);
>>>>>>> + return read_engine_events(event, prev);
>>>>>>> }
>>>>>>> return 0;
>>>>>>> diff --git a/drivers/gpu/drm/xe/xe_pmu_types.h b/drivers/gpu/drm/
>>>>>>> xe/ xe_pmu_types.h
>>>>>>> index f5ba4d56622c..134b3400b19c 100644
>>>>>>> --- a/drivers/gpu/drm/xe/xe_pmu_types.h
>>>>>>> +++ b/drivers/gpu/drm/xe/xe_pmu_types.h
>>>>>>> @@ -30,6 +30,14 @@ struct xe_pmu {
>>>>>>> * @name: Name as registered with perf core.
>>>>>>> */
>>>>>>> const char *name;
>>>>>>> + /**
>>>>>>> + * @fw_ref: force_wake ref
>>>>>>> + */
>>>>>>> + unsigned int fw_ref;
>>>>>>> + /**
>>>>>>> + * @fw_count: force_wake count
>>>>>>> + */
>>>>>>> + unsigned int fw_count;
>>>>>>> /**
>>>>>>> * @supported_events: Bitmap of supported events, indexed
>>>>>>> by event id
>>>>>>> */
>>>>>>
>>>>>
>>>>
>>
^ permalink raw reply [flat|nested] 39+ messages in thread
end of thread, other threads:[~2025-02-12 5:01 UTC | newest]
Thread overview: 39+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-02-06 10:43 [PATCH v5 0/8] PMU support for engine activity Riana Tauro
2025-02-06 10:40 ` ✓ CI.Patch_applied: success for " Patchwork
2025-02-06 10:41 ` ✗ CI.checkpatch: warning " Patchwork
2025-02-06 10:42 ` ✓ CI.KUnit: success " Patchwork
2025-02-06 10:43 ` [PATCH v5 1/8] drm/xe: Add engine activity support Riana Tauro
2025-02-06 18:28 ` Michal Wajdeczko
2025-02-10 7:07 ` Riana Tauro
2025-02-06 10:43 ` [PATCH v5 2/8] drm/xe/trace: Add trace for engine activity Riana Tauro
2025-02-06 10:43 ` [PATCH v5 3/8] drm/xe/guc: Expose engine activity only for supported GuC version Riana Tauro
2025-02-06 18:39 ` Michal Wajdeczko
2025-02-07 7:59 ` Riana Tauro
2025-02-07 21:37 ` Umesh Nerlige Ramappa
2025-02-10 7:28 ` Riana Tauro
2025-02-06 10:43 ` [PATCH v5 4/8] drm/xe/xe_pmu: Add PMU support for engine activity Riana Tauro
2025-02-07 22:47 ` Umesh Nerlige Ramappa
2025-02-06 10:43 ` [PATCH v5 5/8] drm/xe/xe_pmu: Acquire forcewake on event init for engine events Riana Tauro
2025-02-07 3:09 ` Ghimiray, Himal Prasad
2025-02-07 6:18 ` Riana Tauro
2025-02-07 6:51 ` Ghimiray, Himal Prasad
2025-02-07 23:31 ` Umesh Nerlige Ramappa
2025-02-10 10:20 ` Riana Tauro
2025-02-11 17:33 ` Umesh Nerlige Ramappa
2025-02-12 5:01 ` Riana Tauro
2025-02-06 10:43 ` [PATCH v5 6/8] drm/xe: Add support for per-function engine activity Riana Tauro
2025-02-06 19:06 ` Michal Wajdeczko
2025-02-07 8:11 ` Riana Tauro
2025-02-07 23:50 ` Umesh Nerlige Ramappa
2025-02-06 10:43 ` [PATCH v5 7/8] drm/xe/xe_pmu: Add pmu support for per-function engine activity stats Riana Tauro
2025-02-06 19:15 ` Michal Wajdeczko
2025-02-07 7:52 ` Riana Tauro
2025-02-06 10:43 ` [PATCH v5 8/8] drm/xe/pf: Enable " Riana Tauro
2025-02-06 11:20 ` Riana Tauro
2025-02-06 19:29 ` Michal Wajdeczko
2025-02-07 6:25 ` Riana Tauro
2025-02-06 10:58 ` ✓ CI.Build: success for PMU support for engine activity Patchwork
2025-02-06 11:01 ` ✗ CI.Hooks: failure " Patchwork
2025-02-06 11:02 ` ✓ CI.checksparse: success " Patchwork
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