* [CI 1/2] drm/xe/guc: Enable extended CAT error reporting
@ 2025-06-25 20:54 Daniele Ceraolo Spurio
2025-06-25 20:54 ` [CI 2/2] drm/xe/guc: Enable the Dynamic Inhibit Context Switch optimization Daniele Ceraolo Spurio
` (5 more replies)
0 siblings, 6 replies; 12+ messages in thread
From: Daniele Ceraolo Spurio @ 2025-06-25 20:54 UTC (permalink / raw)
To: intel-xe
On newer HW (Xe2 onwards + PVC) it is possible to get extra information
when a CAT error occurs, specifically a dword reporting the error type.
To enable this extra reporting, we need to opt-in with the GuC, which is
done via a specific per-VF feature opt-in H2G.
On platforms where the HW does not support the extra reporting, the GuC
will set the type to 0xdeadbeef, so we can keep the code simple and
opt-in to the feature on every platform and then just discard the data
if it is invalid.
Note that on native/PF we're guaranteed that the opt in is available
because we don't support any GuC old enough to not have it, but if we're
a VF we might be running on a non-XE PF with an older GuC, so we need to
handle that case. We can re-use the invalid type above to handle this
scenario the same way as if the feature was not supported in HW.
Given that this patch is the first user of the guc_buf_cache on native
and VF, it also extends that feature to non-PF use-cases.
v2: simpler print for the error type (John), rebase
v3: use guc_buf_cache instead of new alloc, simpler doc (Michal)
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> #v1
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/xe/abi/guc_actions_abi.h | 4 ++
drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 15 +++++++
drivers/gpu/drm/xe/xe_guc.c | 56 ++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc.h | 1 +
drivers/gpu/drm/xe/xe_guc_submit.c | 16 +++++--
drivers/gpu/drm/xe/xe_uc.c | 4 ++
6 files changed, 93 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
index ff4f412c28d8..81eb046aeebf 100644
--- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
@@ -142,6 +142,7 @@ enum xe_guc_action {
XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A,
XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C,
XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER = 0x550D,
+ XE_GUC_ACTION_OPT_IN_FEATURE_KLV = 0x550E,
XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000,
XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002,
XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003,
@@ -271,4 +272,7 @@ enum xe_guc_g2g_type {
#define XE_G2G_DEREGISTER_TILE REG_GENMASK(15, 12)
#define XE_G2G_DEREGISTER_TYPE REG_GENMASK(11, 8)
+/* invalid type for XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR */
+#define XE_GUC_CAT_ERR_TYPE_INVALID 0xdeadbeef
+
#endif
diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
index 7de8f827281f..5b2502bec2dc 100644
--- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
@@ -16,6 +16,7 @@
* +===+=======+==============================================================+
* | 0 | 31:16 | **KEY** - KLV key identifier |
* | | | - `GuC Self Config KLVs`_ |
+ * | | | - `GuC Opt In Feature KLVs`_ |
* | | | - `GuC VGT Policy KLVs`_ |
* | | | - `GuC VF Configuration KLVs`_ |
* | | | |
@@ -124,6 +125,20 @@ enum {
GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5,
};
+/**
+ * DOC: GuC Opt In Feature KLVs
+ *
+ * `GuC KLV`_ keys available for use with OPT_IN_FEATURE_KLV
+ *
+ * _`GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE` : 0x4001
+ * Adds an extra dword to the XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR G2H
+ * containing the type of the CAT error. On HW that does not support
+ * reporting the CAT error type, the extra dword is set to 0xdeadbeef.
+ */
+
+#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_KEY 0x4001
+#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_LEN 0u
+
/**
* DOC: GuC VGT Policy KLVs
*
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 209e5d53c290..4a7c467ad669 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -29,6 +29,7 @@
#include "xe_guc_db_mgr.h"
#include "xe_guc_engine_activity.h"
#include "xe_guc_hwconfig.h"
+#include "xe_guc_klv_helpers.h"
#include "xe_guc_log.h"
#include "xe_guc_pc.h"
#include "xe_guc_relay.h"
@@ -570,6 +571,57 @@ static int guc_g2g_start(struct xe_guc *guc)
return err;
}
+static int __guc_opt_in_features_enable(struct xe_guc *guc, u64 addr, u32 num_dwords)
+{
+ u32 action[] = {
+ XE_GUC_ACTION_OPT_IN_FEATURE_KLV,
+ lower_32_bits(addr),
+ upper_32_bits(addr),
+ num_dwords
+ };
+
+ return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action));
+}
+
+#define OPT_IN_MAX_DWORDS 16
+int xe_guc_opt_in_features_enable(struct xe_guc *guc)
+{
+ struct xe_device *xe = guc_to_xe(guc);
+ CLASS(xe_guc_buf, buf)(&guc->buf, OPT_IN_MAX_DWORDS);
+ u32 count = 0;
+ u32 *klvs;
+ int ret;
+
+ if (!xe_guc_buf_is_valid(buf))
+ return -ENOBUFS;
+
+ klvs = xe_guc_buf_cpu_ptr(buf);
+
+ /*
+ * The extra CAT error type opt-in was added in GuC v70.17.0, which maps
+ * to compatibility version v1.7.0.
+ * Note that the GuC allows enabling this KLV even on platforms that do
+ * not support the extra type; in such case the returned type variable
+ * will be set to a known invalid value which we can check against.
+ */
+ if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 7, 0))
+ klvs[count++] = PREP_GUC_KLV_TAG(OPT_IN_FEATURE_EXT_CAT_ERR_TYPE);
+
+ if (count) {
+ xe_assert(xe, count <= OPT_IN_MAX_DWORDS);
+
+ ret = __guc_opt_in_features_enable(guc, xe_guc_buf_flush(buf), count);
+ if (ret < 0) {
+ xe_gt_err(guc_to_gt(guc),
+ "failed to enable GuC opt-in features: %pe\n",
+ ERR_PTR(ret));
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
static void guc_fini_hw(void *arg)
{
struct xe_guc *guc = arg;
@@ -767,6 +819,10 @@ int xe_guc_post_load_init(struct xe_guc *guc)
xe_guc_ads_populate_post_load(&guc->ads);
+ ret = xe_guc_opt_in_features_enable(guc);
+ if (ret)
+ return ret;
+
if (xe_guc_g2g_wanted(guc_to_xe(guc))) {
ret = guc_g2g_start(guc);
if (ret)
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index 58338be44558..4a66575f017d 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -33,6 +33,7 @@ int xe_guc_reset(struct xe_guc *guc);
int xe_guc_upload(struct xe_guc *guc);
int xe_guc_min_load_for_hwconfig(struct xe_guc *guc);
int xe_guc_enable_communication(struct xe_guc *guc);
+int xe_guc_opt_in_features_enable(struct xe_guc *guc);
int xe_guc_suspend(struct xe_guc *guc);
void xe_guc_notify(struct xe_guc *guc);
int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr);
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 26c6c71dc91a..32548c931615 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -2103,12 +2103,16 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
struct xe_gt *gt = guc_to_gt(guc);
struct xe_exec_queue *q;
u32 guc_id;
+ u32 type = XE_GUC_CAT_ERR_TYPE_INVALID;
- if (unlikely(len < 1))
+ if (unlikely(!len || len > 2))
return -EPROTO;
guc_id = msg[0];
+ if (len == 2)
+ type = msg[1];
+
if (guc_id == GUC_ID_UNKNOWN) {
/*
* GuC uses GUC_ID_UNKNOWN if it can not map the CAT fault to any PF/VF
@@ -2122,8 +2126,14 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
if (unlikely(!q))
return -EPROTO;
- xe_gt_dbg(gt, "Engine memory cat error: engine_class=%s, logical_mask: 0x%x, guc_id=%d",
- xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
+ if (type != XE_GUC_CAT_ERR_TYPE_INVALID)
+ xe_gt_dbg(gt,
+ "Engine memory CAT error [%u]: class=%s, logical_mask: 0x%x, guc_id=%d",
+ type, xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
+ else
+ xe_gt_dbg(gt,
+ "Engine memory CAT error: class=%s, logical_mask: 0x%x, guc_id=%d",
+ xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
trace_xe_exec_queue_memory_cat_error(q);
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index 3a8751a8b92d..5c45b0f072a4 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -165,6 +165,10 @@ static int vf_uc_init_hw(struct xe_uc *uc)
uc->guc.submission_state.enabled = true;
+ err = xe_guc_opt_in_features_enable(&uc->guc);
+ if (err)
+ return err;
+
err = xe_gt_record_default_lrcs(uc_to_gt(uc));
if (err)
return err;
--
2.43.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [CI 2/2] drm/xe/guc: Enable the Dynamic Inhibit Context Switch optimization 2025-06-25 20:54 [CI 1/2] drm/xe/guc: Enable extended CAT error reporting Daniele Ceraolo Spurio @ 2025-06-25 20:54 ` Daniele Ceraolo Spurio 2025-06-25 21:01 ` ✗ CI.checkpatch: warning for series starting with [CI,1/2] drm/xe/guc: Enable extended CAT error reporting Patchwork ` (4 subsequent siblings) 5 siblings, 0 replies; 12+ messages in thread From: Daniele Ceraolo Spurio @ 2025-06-25 20:54 UTC (permalink / raw) To: intel-xe The Dynamic Inhibit Context Switch is an optimization aimed at reducing the amount of time the HW is stuck waiting on an unsatisfied semaphore. When this optimization is enabled, the GuC will dynamically modify the CTX_CTRL_INHIBIT_SYN_CTX_SWITCH in the CTX_CONTEXT_CONTROL register of LRCs to enable immediate switching out on an unsatisfied semaphore wait when multiple contexts are competing for time on the same engine. This feature is available on recent HW from GuC 70.40.1 onwards and it is enabled via a per-VF feature opt-in. v2: rebase v3: switch to using guc_buf_cache instead of dedicated alloc v4: add helper to check for feature availability (Michal), don't enable if multi-lrc is possible. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Julia Filipchuk <julia.filipchuk@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> --- drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 13 ++++++++++++ drivers/gpu/drm/xe/xe_guc.c | 29 +++++++++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h index 5b2502bec2dc..0366a9da5977 100644 --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h @@ -134,11 +134,24 @@ enum { * Adds an extra dword to the XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR G2H * containing the type of the CAT error. On HW that does not support * reporting the CAT error type, the extra dword is set to 0xdeadbeef. + * + * _`GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH` : 0x4003 + * This KLV enables the Dynamic Inhibit Context Switch optimization, which + * consists in the GuC setting the CTX_CTRL_INHIBIT_SYN_CTX_SWITCH bit to + * zero in the CTX_CONTEXT_CONTROL register of LRCs that are submitted + * to an oversubscribed engine. This will cause those contexts to be + * switched out immediately if they hit an unsatisfied semaphore wait + * (instead of waiting the full timeslice duration). The bit is instead set + * to one if a single context is queued on the engine, to avoid it being + * switched out if there isn't another context that can run in its place. */ #define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_KEY 0x4001 #define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_LEN 0u +#define GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH_KEY 0x4003 +#define GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH_LEN 0u + /** * DOC: GuC VGT Policy KLVs * diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c index 4a7c467ad669..ebd70f98bb39 100644 --- a/drivers/gpu/drm/xe/xe_guc.c +++ b/drivers/gpu/drm/xe/xe_guc.c @@ -583,6 +583,32 @@ static int __guc_opt_in_features_enable(struct xe_guc *guc, u64 addr, u32 num_dw return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action)); } +static bool supports_dynamic_ics(struct xe_guc *guc) +{ + struct xe_device *xe = guc_to_xe(guc); + struct xe_gt *gt = guc_to_gt(guc); + + /* Dynamic ICS is available for PVC and Xe2 and newer platforms. */ + if (xe->info.platform != XE_PVC && GRAPHICS_VER(xe) < 20) + return false; + + /* + * The feature is currently not compatible with multi-lrc, so the GuC + * does not support it at all on the media engines (which are the main + * users of mlrc). On the primary GT side, to avoid it being used in + * conjunction with mlrc, we only enable it if we are in single CCS + * mode. + */ + if (xe_gt_is_media_type(gt) || gt->ccs_mode > 1) + return false; + + /* + * Dynamic ICS requires GuC v70.40.1, which maps to compatibility + * version v1.18.4. + */ + return GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 18, 4); +} + #define OPT_IN_MAX_DWORDS 16 int xe_guc_opt_in_features_enable(struct xe_guc *guc) { @@ -607,6 +633,9 @@ int xe_guc_opt_in_features_enable(struct xe_guc *guc) if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 7, 0)) klvs[count++] = PREP_GUC_KLV_TAG(OPT_IN_FEATURE_EXT_CAT_ERR_TYPE); + if (supports_dynamic_ics(guc)) + klvs[count++] = PREP_GUC_KLV_TAG(OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH); + if (count) { xe_assert(xe, count <= OPT_IN_MAX_DWORDS); -- 2.43.0 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* ✗ CI.checkpatch: warning for series starting with [CI,1/2] drm/xe/guc: Enable extended CAT error reporting 2025-06-25 20:54 [CI 1/2] drm/xe/guc: Enable extended CAT error reporting Daniele Ceraolo Spurio 2025-06-25 20:54 ` [CI 2/2] drm/xe/guc: Enable the Dynamic Inhibit Context Switch optimization Daniele Ceraolo Spurio @ 2025-06-25 21:01 ` Patchwork 2025-06-25 21:02 ` ✓ CI.KUnit: success " Patchwork ` (3 subsequent siblings) 5 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2025-06-25 21:01 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-xe == Series Details == Series: series starting with [CI,1/2] drm/xe/guc: Enable extended CAT error reporting URL : https://patchwork.freedesktop.org/series/150785/ State : warning == Summary == + KERNEL=/kernel + git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt Cloning into 'mt'... warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/ + git -C mt rev-list -n1 origin/master f8ff75ae1d2127635239b134695774ed4045d05b + cd /kernel + git config --global --add safe.directory /kernel + git log -n1 commit a64a3451cf7279f0e7e372f3508b6d146c63ab37 Author: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Date: Wed Jun 25 13:54:07 2025 -0700 drm/xe/guc: Enable the Dynamic Inhibit Context Switch optimization The Dynamic Inhibit Context Switch is an optimization aimed at reducing the amount of time the HW is stuck waiting on an unsatisfied semaphore. When this optimization is enabled, the GuC will dynamically modify the CTX_CTRL_INHIBIT_SYN_CTX_SWITCH in the CTX_CONTEXT_CONTROL register of LRCs to enable immediate switching out on an unsatisfied semaphore wait when multiple contexts are competing for time on the same engine. This feature is available on recent HW from GuC 70.40.1 onwards and it is enabled via a per-VF feature opt-in. v2: rebase v3: switch to using guc_buf_cache instead of dedicated alloc v4: add helper to check for feature availability (Michal), don't enable if multi-lrc is possible. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Julia Filipchuk <julia.filipchuk@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> + /mt/dim checkpatch 74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73 drm-intel 4cc8bada84ce drm/xe/guc: Enable extended CAT error reporting -:121: WARNING:LINE_SPACING: Missing a blank line after declarations #121: FILE: drivers/gpu/drm/xe/xe_guc.c:590: + struct xe_device *xe = guc_to_xe(guc); + CLASS(xe_guc_buf, buf)(&guc->buf, OPT_IN_MAX_DWORDS); total: 0 errors, 1 warnings, 0 checks, 165 lines checked a64a3451cf72 drm/xe/guc: Enable the Dynamic Inhibit Context Switch optimization ^ permalink raw reply [flat|nested] 12+ messages in thread
* ✓ CI.KUnit: success for series starting with [CI,1/2] drm/xe/guc: Enable extended CAT error reporting 2025-06-25 20:54 [CI 1/2] drm/xe/guc: Enable extended CAT error reporting Daniele Ceraolo Spurio 2025-06-25 20:54 ` [CI 2/2] drm/xe/guc: Enable the Dynamic Inhibit Context Switch optimization Daniele Ceraolo Spurio 2025-06-25 21:01 ` ✗ CI.checkpatch: warning for series starting with [CI,1/2] drm/xe/guc: Enable extended CAT error reporting Patchwork @ 2025-06-25 21:02 ` Patchwork 2025-06-25 21:40 ` ✓ Xe.CI.BAT: " Patchwork ` (2 subsequent siblings) 5 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2025-06-25 21:02 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-xe == Series Details == Series: series starting with [CI,1/2] drm/xe/guc: Enable extended CAT error reporting URL : https://patchwork.freedesktop.org/series/150785/ State : success == Summary == + trap cleanup EXIT + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [21:01:50] Configuring KUnit Kernel ... Generating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [21:01:54] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [21:02:21] Starting KUnit Kernel (1/1)... [21:02:21] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [21:02:21] ================== guc_buf (11 subtests) =================== [21:02:21] [PASSED] test_smallest [21:02:21] [PASSED] test_largest [21:02:21] [PASSED] test_granular [21:02:21] [PASSED] test_unique [21:02:21] [PASSED] test_overlap [21:02:21] [PASSED] test_reusable [21:02:21] [PASSED] test_too_big [21:02:21] [PASSED] test_flush [21:02:21] [PASSED] test_lookup [21:02:21] [PASSED] test_data [21:02:21] [PASSED] test_class [21:02:21] ===================== [PASSED] guc_buf ===================== [21:02:21] =================== guc_dbm (7 subtests) =================== [21:02:21] [PASSED] test_empty [21:02:21] [PASSED] test_default [21:02:21] ======================== test_size ======================== [21:02:21] [PASSED] 4 [21:02:21] [PASSED] 8 [21:02:21] [PASSED] 32 [21:02:21] [PASSED] 256 [21:02:21] ==================== [PASSED] test_size ==================== [21:02:21] ======================= test_reuse ======================== [21:02:21] [PASSED] 4 [21:02:21] [PASSED] 8 [21:02:21] [PASSED] 32 [21:02:21] [PASSED] 256 [21:02:21] =================== [PASSED] test_reuse ==================== [21:02:21] =================== test_range_overlap ==================== [21:02:21] [PASSED] 4 [21:02:21] [PASSED] 8 [21:02:21] [PASSED] 32 [21:02:21] [PASSED] 256 [21:02:21] =============== [PASSED] test_range_overlap ================ [21:02:21] =================== test_range_compact ==================== [21:02:21] [PASSED] 4 [21:02:21] [PASSED] 8 [21:02:21] [PASSED] 32 [21:02:21] [PASSED] 256 [21:02:21] =============== [PASSED] test_range_compact ================ [21:02:21] ==================== test_range_spare ===================== [21:02:21] [PASSED] 4 [21:02:21] [PASSED] 8 [21:02:21] [PASSED] 32 [21:02:21] [PASSED] 256 [21:02:21] ================ [PASSED] test_range_spare ================= [21:02:21] ===================== [PASSED] guc_dbm ===================== [21:02:21] =================== guc_idm (6 subtests) =================== [21:02:21] [PASSED] bad_init [21:02:21] [PASSED] no_init [21:02:21] [PASSED] init_fini [21:02:21] [PASSED] check_used [21:02:21] [PASSED] check_quota [21:02:21] [PASSED] check_all [21:02:21] ===================== [PASSED] guc_idm ===================== [21:02:21] ================== no_relay (3 subtests) =================== [21:02:21] [PASSED] xe_drops_guc2pf_if_not_ready [21:02:21] [PASSED] xe_drops_guc2vf_if_not_ready [21:02:21] [PASSED] xe_rejects_send_if_not_ready [21:02:21] ==================== [PASSED] no_relay ===================== [21:02:21] ================== pf_relay (14 subtests) ================== [21:02:21] [PASSED] pf_rejects_guc2pf_too_short [21:02:21] [PASSED] pf_rejects_guc2pf_too_long [21:02:21] [PASSED] pf_rejects_guc2pf_no_payload [21:02:21] [PASSED] pf_fails_no_payload [21:02:21] [PASSED] pf_fails_bad_origin [21:02:21] [PASSED] pf_fails_bad_type [21:02:21] [PASSED] pf_txn_reports_error [21:02:21] [PASSED] pf_txn_sends_pf2guc [21:02:21] [PASSED] pf_sends_pf2guc [21:02:21] [SKIPPED] pf_loopback_nop [21:02:21] [SKIPPED] pf_loopback_echo [21:02:21] [SKIPPED] pf_loopback_fail [21:02:21] [SKIPPED] pf_loopback_busy [21:02:21] [SKIPPED] pf_loopback_retry [21:02:21] ==================== [PASSED] pf_relay ===================== [21:02:21] ================== vf_relay (3 subtests) =================== [21:02:21] [PASSED] vf_rejects_guc2vf_too_short [21:02:21] [PASSED] vf_rejects_guc2vf_too_long [21:02:21] [PASSED] vf_rejects_guc2vf_no_payload [21:02:21] ==================== [PASSED] vf_relay ===================== [21:02:21] ================= pf_service (11 subtests) ================= [21:02:21] [PASSED] pf_negotiate_any [21:02:21] [PASSED] pf_negotiate_base_match [21:02:21] [PASSED] pf_negotiate_base_newer [21:02:21] [PASSED] pf_negotiate_base_next [21:02:21] [SKIPPED] pf_negotiate_base_older [21:02:21] [PASSED] pf_negotiate_base_prev [21:02:21] [PASSED] pf_negotiate_latest_match [21:02:21] [PASSED] pf_negotiate_latest_newer [21:02:21] [PASSED] pf_negotiate_latest_next [21:02:21] [SKIPPED] pf_negotiate_latest_older [21:02:21] [SKIPPED] pf_negotiate_latest_prev [21:02:21] =================== [PASSED] pf_service ==================== [21:02:21] ===================== lmtt (1 subtest) ===================== [21:02:21] ======================== test_ops ========================= [21:02:21] [PASSED] 2-level [21:02:21] [PASSED] multi-level [21:02:21] ==================== [PASSED] test_ops ===================== [21:02:21] ====================== [PASSED] lmtt ======================= [21:02:21] =================== xe_mocs (2 subtests) =================== [21:02:21] ================ xe_live_mocs_kernel_kunit ================ [21:02:21] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [21:02:21] ================ xe_live_mocs_reset_kunit ================= [21:02:21] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [21:02:21] ==================== [SKIPPED] xe_mocs ===================== [21:02:21] ================= xe_migrate (2 subtests) ================== [21:02:21] ================= xe_migrate_sanity_kunit ================= [21:02:21] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [21:02:21] ================== xe_validate_ccs_kunit ================== [21:02:21] ============= [SKIPPED] xe_validate_ccs_kunit ============== [21:02:21] =================== [SKIPPED] xe_migrate =================== [21:02:21] ================== xe_dma_buf (1 subtest) ================== [21:02:21] ==================== xe_dma_buf_kunit ===================== [21:02:21] ================ [SKIPPED] xe_dma_buf_kunit ================ [21:02:21] =================== [SKIPPED] xe_dma_buf =================== [21:02:21] ================= xe_bo_shrink (1 subtest) ================= [21:02:21] =================== xe_bo_shrink_kunit ==================== [21:02:21] =============== [SKIPPED] xe_bo_shrink_kunit =============== [21:02:21] ================== [SKIPPED] xe_bo_shrink ================== [21:02:21] ==================== xe_bo (2 subtests) ==================== [21:02:21] ================== xe_ccs_migrate_kunit =================== [21:02:21] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [21:02:21] ==================== xe_bo_evict_kunit ==================== [21:02:21] =============== [SKIPPED] xe_bo_evict_kunit ================ [21:02:21] ===================== [SKIPPED] xe_bo ====================== [21:02:21] ==================== args (11 subtests) ==================== [21:02:21] [PASSED] count_args_test [21:02:21] [PASSED] call_args_example [21:02:21] [PASSED] call_args_test [21:02:21] [PASSED] drop_first_arg_example [21:02:21] [PASSED] drop_first_arg_test [21:02:21] [PASSED] first_arg_example [21:02:21] [PASSED] first_arg_test [21:02:21] [PASSED] last_arg_example [21:02:21] [PASSED] last_arg_test [21:02:21] [PASSED] pick_arg_example [21:02:21] [PASSED] sep_comma_example [21:02:21] ====================== [PASSED] args ======================= [21:02:21] =================== xe_pci (2 subtests) ==================== [21:02:21] ==================== check_graphics_ip ==================== [21:02:21] [PASSED] 12.70 Xe_LPG [21:02:21] [PASSED] 12.71 Xe_LPG [21:02:21] [PASSED] 12.74 Xe_LPG+ [21:02:21] [PASSED] 20.01 Xe2_HPG [21:02:21] [PASSED] 20.02 Xe2_HPG [21:02:21] [PASSED] 20.04 Xe2_LPG [21:02:21] [PASSED] 30.00 Xe3_LPG [21:02:21] [PASSED] 30.01 Xe3_LPG [21:02:21] [PASSED] 30.03 Xe3_LPG [21:02:21] ================ [PASSED] check_graphics_ip ================ [21:02:21] ===================== check_media_ip ====================== [21:02:21] [PASSED] 13.00 Xe_LPM+ [21:02:21] [PASSED] 13.01 Xe2_HPM [21:02:21] [PASSED] 20.00 Xe2_LPM [21:02:21] [PASSED] 30.00 Xe3_LPM [21:02:21] [PASSED] 30.02 Xe3_LPM stty: 'standard input': Inappropriate ioctl for device [21:02:21] ================= [PASSED] check_media_ip ================== [21:02:21] ===================== [PASSED] xe_pci ====================== [21:02:21] =================== xe_rtp (2 subtests) ==================== [21:02:21] =============== xe_rtp_process_to_sr_tests ================ [21:02:21] [PASSED] coalesce-same-reg [21:02:21] [PASSED] no-match-no-add [21:02:21] [PASSED] match-or [21:02:21] [PASSED] match-or-xfail [21:02:21] [PASSED] no-match-no-add-multiple-rules [21:02:21] [PASSED] two-regs-two-entries [21:02:21] [PASSED] clr-one-set-other [21:02:21] [PASSED] set-field [21:02:21] [PASSED] conflict-duplicate [21:02:21] [PASSED] conflict-not-disjoint [21:02:21] [PASSED] conflict-reg-type [21:02:21] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [21:02:21] ================== xe_rtp_process_tests =================== [21:02:21] [PASSED] active1 [21:02:21] [PASSED] active2 [21:02:21] [PASSED] active-inactive [21:02:21] [PASSED] inactive-active [21:02:21] [PASSED] inactive-1st_or_active-inactive [21:02:21] [PASSED] inactive-2nd_or_active-inactive [21:02:21] [PASSED] inactive-last_or_active-inactive [21:02:21] [PASSED] inactive-no_or_active-inactive [21:02:21] ============== [PASSED] xe_rtp_process_tests =============== [21:02:21] ===================== [PASSED] xe_rtp ====================== [21:02:21] ==================== xe_wa (1 subtest) ===================== [21:02:21] ======================== xe_wa_gt ========================= [21:02:21] [PASSED] TIGERLAKE (B0) [21:02:21] [PASSED] DG1 (A0) [21:02:21] [PASSED] DG1 (B0) [21:02:21] [PASSED] ALDERLAKE_S (A0) [21:02:21] [PASSED] ALDERLAKE_S (B0) [21:02:21] [PASSED] ALDERLAKE_S (C0) [21:02:21] [PASSED] ALDERLAKE_S (D0) [21:02:21] [PASSED] ALDERLAKE_P (A0) [21:02:21] [PASSED] ALDERLAKE_P (B0) [21:02:21] [PASSED] ALDERLAKE_P (C0) [21:02:21] [PASSED] ALDERLAKE_S_RPLS (D0) [21:02:21] [PASSED] ALDERLAKE_P_RPLU (E0) [21:02:21] [PASSED] DG2_G10 (C0) [21:02:21] [PASSED] DG2_G11 (B1) [21:02:21] [PASSED] DG2_G12 (A1) [21:02:21] [PASSED] METEORLAKE (g:A0, m:A0) [21:02:21] [PASSED] METEORLAKE (g:A0, m:A0) [21:02:21] [PASSED] METEORLAKE (g:A0, m:A0) [21:02:21] [PASSED] LUNARLAKE (g:A0, m:A0) [21:02:21] [PASSED] LUNARLAKE (g:B0, m:A0) [21:02:21] [PASSED] BATTLEMAGE (g:A0, m:A1) [21:02:21] ==================== [PASSED] xe_wa_gt ===================== [21:02:21] ====================== [PASSED] xe_wa ====================== [21:02:21] ============================================================ [21:02:21] Testing complete. Ran 145 tests: passed: 129, skipped: 16 [21:02:21] Elapsed time: 31.385s total, 4.189s configuring, 26.880s building, 0.299s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [21:02:21] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [21:02:23] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [21:02:45] Starting KUnit Kernel (1/1)... [21:02:45] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [21:02:45] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [21:02:45] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [21:02:45] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [21:02:45] =========== drm_validate_clone_mode (2 subtests) =========== [21:02:45] ============== drm_test_check_in_clone_mode =============== [21:02:45] [PASSED] in_clone_mode [21:02:45] [PASSED] not_in_clone_mode [21:02:45] ========== [PASSED] drm_test_check_in_clone_mode =========== [21:02:45] =============== drm_test_check_valid_clones =============== [21:02:45] [PASSED] not_in_clone_mode [21:02:45] [PASSED] valid_clone [21:02:45] [PASSED] invalid_clone [21:02:45] =========== [PASSED] drm_test_check_valid_clones =========== [21:02:45] ============= [PASSED] drm_validate_clone_mode ============= [21:02:45] ============= drm_validate_modeset (1 subtest) ============= [21:02:45] [PASSED] drm_test_check_connector_changed_modeset [21:02:45] ============== [PASSED] drm_validate_modeset =============== [21:02:45] ====== drm_test_bridge_get_current_state (2 subtests) ====== [21:02:45] [PASSED] drm_test_drm_bridge_get_current_state_atomic [21:02:45] [PASSED] drm_test_drm_bridge_get_current_state_legacy [21:02:45] ======== [PASSED] drm_test_bridge_get_current_state ======== [21:02:45] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [21:02:45] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [21:02:45] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [21:02:45] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy [21:02:45] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [21:02:45] ============== drm_bridge_alloc (2 subtests) =============== [21:02:45] [PASSED] drm_test_drm_bridge_alloc_basic [21:02:45] [PASSED] drm_test_drm_bridge_alloc_get_put [21:02:45] ================ [PASSED] drm_bridge_alloc ================= [21:02:45] ================== drm_buddy (7 subtests) ================== [21:02:45] [PASSED] drm_test_buddy_alloc_limit [21:02:45] [PASSED] drm_test_buddy_alloc_optimistic [21:02:45] [PASSED] drm_test_buddy_alloc_pessimistic [21:02:45] [PASSED] drm_test_buddy_alloc_pathological [21:02:45] [PASSED] drm_test_buddy_alloc_contiguous [21:02:45] [PASSED] drm_test_buddy_alloc_clear [21:02:45] [PASSED] drm_test_buddy_alloc_range_bias [21:02:45] ==================== [PASSED] drm_buddy ==================== [21:02:45] ============= drm_cmdline_parser (40 subtests) ============= [21:02:45] [PASSED] drm_test_cmdline_force_d_only [21:02:45] [PASSED] drm_test_cmdline_force_D_only_dvi [21:02:45] [PASSED] drm_test_cmdline_force_D_only_hdmi [21:02:45] [PASSED] drm_test_cmdline_force_D_only_not_digital [21:02:45] [PASSED] drm_test_cmdline_force_e_only [21:02:45] [PASSED] drm_test_cmdline_res [21:02:45] [PASSED] drm_test_cmdline_res_vesa [21:02:45] [PASSED] drm_test_cmdline_res_vesa_rblank [21:02:45] [PASSED] drm_test_cmdline_res_rblank [21:02:45] [PASSED] drm_test_cmdline_res_bpp [21:02:45] [PASSED] drm_test_cmdline_res_refresh [21:02:45] [PASSED] drm_test_cmdline_res_bpp_refresh [21:02:45] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [21:02:45] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [21:02:45] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [21:02:45] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [21:02:45] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [21:02:45] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [21:02:45] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [21:02:45] [PASSED] drm_test_cmdline_res_margins_force_on [21:02:45] [PASSED] drm_test_cmdline_res_vesa_margins [21:02:45] [PASSED] drm_test_cmdline_name [21:02:45] [PASSED] drm_test_cmdline_name_bpp [21:02:45] [PASSED] drm_test_cmdline_name_option [21:02:45] [PASSED] drm_test_cmdline_name_bpp_option [21:02:45] [PASSED] drm_test_cmdline_rotate_0 [21:02:45] [PASSED] drm_test_cmdline_rotate_90 [21:02:45] [PASSED] drm_test_cmdline_rotate_180 [21:02:45] [PASSED] drm_test_cmdline_rotate_270 [21:02:45] [PASSED] drm_test_cmdline_hmirror [21:02:45] [PASSED] drm_test_cmdline_vmirror [21:02:45] [PASSED] drm_test_cmdline_margin_options [21:02:45] [PASSED] drm_test_cmdline_multiple_options [21:02:45] [PASSED] drm_test_cmdline_bpp_extra_and_option [21:02:45] [PASSED] drm_test_cmdline_extra_and_option [21:02:45] [PASSED] drm_test_cmdline_freestanding_options [21:02:45] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [21:02:45] [PASSED] drm_test_cmdline_panel_orientation [21:02:45] ================ drm_test_cmdline_invalid ================= [21:02:45] [PASSED] margin_only [21:02:45] [PASSED] interlace_only [21:02:45] [PASSED] res_missing_x [21:02:45] [PASSED] res_missing_y [21:02:45] [PASSED] res_bad_y [21:02:45] [PASSED] res_missing_y_bpp [21:02:45] [PASSED] res_bad_bpp [21:02:45] [PASSED] res_bad_refresh [21:02:45] [PASSED] res_bpp_refresh_force_on_off [21:02:45] [PASSED] res_invalid_mode [21:02:45] [PASSED] res_bpp_wrong_place_mode [21:02:45] [PASSED] name_bpp_refresh [21:02:45] [PASSED] name_refresh [21:02:45] [PASSED] name_refresh_wrong_mode [21:02:45] [PASSED] name_refresh_invalid_mode [21:02:45] [PASSED] rotate_multiple [21:02:45] [PASSED] rotate_invalid_val [21:02:45] [PASSED] rotate_truncated [21:02:45] [PASSED] invalid_option [21:02:45] [PASSED] invalid_tv_option [21:02:45] [PASSED] truncated_tv_option [21:02:45] ============ [PASSED] drm_test_cmdline_invalid ============= [21:02:45] =============== drm_test_cmdline_tv_options =============== [21:02:45] [PASSED] NTSC [21:02:45] [PASSED] NTSC_443 [21:02:45] [PASSED] NTSC_J [21:02:45] [PASSED] PAL [21:02:45] [PASSED] PAL_M [21:02:45] [PASSED] PAL_N [21:02:45] [PASSED] SECAM [21:02:45] [PASSED] MONO_525 [21:02:45] [PASSED] MONO_625 [21:02:45] =========== [PASSED] drm_test_cmdline_tv_options =========== [21:02:45] =============== [PASSED] drm_cmdline_parser ================ [21:02:45] ========== drmm_connector_hdmi_init (20 subtests) ========== [21:02:45] [PASSED] drm_test_connector_hdmi_init_valid [21:02:45] [PASSED] drm_test_connector_hdmi_init_bpc_8 [21:02:45] [PASSED] drm_test_connector_hdmi_init_bpc_10 [21:02:45] [PASSED] drm_test_connector_hdmi_init_bpc_12 [21:02:45] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [21:02:45] [PASSED] drm_test_connector_hdmi_init_bpc_null [21:02:45] [PASSED] drm_test_connector_hdmi_init_formats_empty [21:02:45] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [21:02:45] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [21:02:45] [PASSED] supported_formats=0x9 yuv420_allowed=1 [21:02:45] [PASSED] supported_formats=0x9 yuv420_allowed=0 [21:02:45] [PASSED] supported_formats=0x3 yuv420_allowed=1 [21:02:45] [PASSED] supported_formats=0x3 yuv420_allowed=0 [21:02:45] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [21:02:45] [PASSED] drm_test_connector_hdmi_init_null_ddc [21:02:45] [PASSED] drm_test_connector_hdmi_init_null_product [21:02:45] [PASSED] drm_test_connector_hdmi_init_null_vendor [21:02:45] [PASSED] drm_test_connector_hdmi_init_product_length_exact [21:02:45] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [21:02:45] [PASSED] drm_test_connector_hdmi_init_product_valid [21:02:45] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [21:02:45] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [21:02:45] [PASSED] drm_test_connector_hdmi_init_vendor_valid [21:02:45] ========= drm_test_connector_hdmi_init_type_valid ========= [21:02:45] [PASSED] HDMI-A [21:02:45] [PASSED] HDMI-B [21:02:45] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [21:02:45] ======== drm_test_connector_hdmi_init_type_invalid ======== [21:02:45] [PASSED] Unknown [21:02:45] [PASSED] VGA [21:02:45] [PASSED] DVI-I [21:02:45] [PASSED] DVI-D [21:02:45] [PASSED] DVI-A [21:02:45] [PASSED] Composite [21:02:45] [PASSED] SVIDEO [21:02:45] [PASSED] LVDS [21:02:45] [PASSED] Component [21:02:45] [PASSED] DIN [21:02:45] [PASSED] DP [21:02:45] [PASSED] TV [21:02:45] [PASSED] eDP [21:02:45] [PASSED] Virtual [21:02:45] [PASSED] DSI [21:02:45] [PASSED] DPI [21:02:45] [PASSED] Writeback [21:02:45] [PASSED] SPI [21:02:45] [PASSED] USB [21:02:45] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [21:02:45] ============ [PASSED] drmm_connector_hdmi_init ============= [21:02:45] ============= drmm_connector_init (3 subtests) ============= [21:02:45] [PASSED] drm_test_drmm_connector_init [21:02:45] [PASSED] drm_test_drmm_connector_init_null_ddc [21:02:45] ========= drm_test_drmm_connector_init_type_valid ========= [21:02:45] [PASSED] Unknown [21:02:45] [PASSED] VGA [21:02:45] [PASSED] DVI-I [21:02:45] [PASSED] DVI-D [21:02:45] [PASSED] DVI-A [21:02:45] [PASSED] Composite [21:02:45] [PASSED] SVIDEO [21:02:45] [PASSED] LVDS [21:02:45] [PASSED] Component [21:02:45] [PASSED] DIN [21:02:45] [PASSED] DP [21:02:45] [PASSED] HDMI-A [21:02:45] [PASSED] HDMI-B [21:02:45] [PASSED] TV [21:02:45] [PASSED] eDP [21:02:45] [PASSED] Virtual [21:02:45] [PASSED] DSI [21:02:45] [PASSED] DPI [21:02:45] [PASSED] Writeback [21:02:45] [PASSED] SPI [21:02:45] [PASSED] USB [21:02:45] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [21:02:45] =============== [PASSED] drmm_connector_init =============== [21:02:45] ========= drm_connector_dynamic_init (6 subtests) ========== [21:02:45] [PASSED] drm_test_drm_connector_dynamic_init [21:02:45] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [21:02:45] [PASSED] drm_test_drm_connector_dynamic_init_not_added [21:02:45] [PASSED] drm_test_drm_connector_dynamic_init_properties [21:02:45] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [21:02:45] [PASSED] Unknown [21:02:45] [PASSED] VGA [21:02:45] [PASSED] DVI-I [21:02:45] [PASSED] DVI-D [21:02:45] [PASSED] DVI-A [21:02:45] [PASSED] Composite [21:02:45] [PASSED] SVIDEO [21:02:45] [PASSED] LVDS [21:02:45] [PASSED] Component [21:02:45] [PASSED] DIN [21:02:45] [PASSED] DP [21:02:45] [PASSED] HDMI-A [21:02:45] [PASSED] HDMI-B [21:02:45] [PASSED] TV [21:02:45] [PASSED] eDP [21:02:45] [PASSED] Virtual [21:02:45] [PASSED] DSI [21:02:45] [PASSED] DPI [21:02:45] [PASSED] Writeback [21:02:45] [PASSED] SPI [21:02:45] [PASSED] USB [21:02:45] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [21:02:45] ======== drm_test_drm_connector_dynamic_init_name ========= [21:02:45] [PASSED] Unknown [21:02:45] [PASSED] VGA [21:02:45] [PASSED] DVI-I [21:02:45] [PASSED] DVI-D [21:02:45] [PASSED] DVI-A [21:02:45] [PASSED] Composite [21:02:45] [PASSED] SVIDEO [21:02:45] [PASSED] LVDS [21:02:45] [PASSED] Component [21:02:45] [PASSED] DIN [21:02:45] [PASSED] DP [21:02:45] [PASSED] HDMI-A [21:02:45] [PASSED] HDMI-B [21:02:45] [PASSED] TV [21:02:45] [PASSED] eDP [21:02:45] [PASSED] Virtual [21:02:45] [PASSED] DSI [21:02:45] [PASSED] DPI [21:02:45] [PASSED] Writeback [21:02:45] [PASSED] SPI [21:02:45] [PASSED] USB [21:02:45] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [21:02:45] =========== [PASSED] drm_connector_dynamic_init ============ [21:02:45] ==== drm_connector_dynamic_register_early (4 subtests) ===== [21:02:45] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [21:02:45] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [21:02:45] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [21:02:45] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [21:02:45] ====== [PASSED] drm_connector_dynamic_register_early ======= [21:02:45] ======= drm_connector_dynamic_register (7 subtests) ======== [21:02:45] [PASSED] drm_test_drm_connector_dynamic_register_on_list [21:02:45] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [21:02:45] [PASSED] drm_test_drm_connector_dynamic_register_no_init [21:02:45] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [21:02:45] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [21:02:45] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [21:02:45] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [21:02:45] ========= [PASSED] drm_connector_dynamic_register ========== [21:02:45] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [21:02:45] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [21:02:45] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [21:02:45] === [PASSED] drm_connector_attach_broadcast_rgb_property === [21:02:45] ========== drm_get_tv_mode_from_name (2 subtests) ========== [21:02:45] ========== drm_test_get_tv_mode_from_name_valid =========== [21:02:45] [PASSED] NTSC [21:02:45] [PASSED] NTSC-443 [21:02:45] [PASSED] NTSC-J [21:02:45] [PASSED] PAL [21:02:45] [PASSED] PAL-M [21:02:45] [PASSED] PAL-N [21:02:45] [PASSED] SECAM [21:02:45] [PASSED] Mono [21:02:45] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [21:02:45] [PASSED] drm_test_get_tv_mode_from_name_truncated [21:02:45] ============ [PASSED] drm_get_tv_mode_from_name ============ [21:02:45] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [21:02:45] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [21:02:45] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [21:02:45] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [21:02:45] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [21:02:45] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [21:02:45] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [21:02:45] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [21:02:45] [PASSED] VIC 96 [21:02:45] [PASSED] VIC 97 [21:02:45] [PASSED] VIC 101 [21:02:45] [PASSED] VIC 102 [21:02:45] [PASSED] VIC 106 [21:02:45] [PASSED] VIC 107 [21:02:45] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [21:02:45] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [21:02:45] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [21:02:45] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [21:02:45] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [21:02:45] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [21:02:45] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [21:02:45] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [21:02:45] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [21:02:45] [PASSED] Automatic [21:02:45] [PASSED] Full [21:02:45] [PASSED] Limited 16:235 [21:02:45] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [21:02:45] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [21:02:45] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [21:02:45] == drm_hdmi_connector_get_output_format_name (2 subtests) == [21:02:45] === drm_test_drm_hdmi_connector_get_output_format_name ==== [21:02:45] [PASSED] RGB [21:02:45] [PASSED] YUV 4:2:0 [21:02:45] [PASSED] YUV 4:2:2 [21:02:45] [PASSED] YUV 4:4:4 [21:02:45] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [21:02:45] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [21:02:45] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [21:02:45] ============= drm_damage_helper (21 subtests) ============== [21:02:45] [PASSED] drm_test_damage_iter_no_damage [21:02:45] [PASSED] drm_test_damage_iter_no_damage_fractional_src [21:02:45] [PASSED] drm_test_damage_iter_no_damage_src_moved [21:02:45] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [21:02:45] [PASSED] drm_test_damage_iter_no_damage_not_visible [21:02:45] [PASSED] drm_test_damage_iter_no_damage_no_crtc [21:02:45] [PASSED] drm_test_damage_iter_no_damage_no_fb [21:02:45] [PASSED] drm_test_damage_iter_simple_damage [21:02:45] [PASSED] drm_test_damage_iter_single_damage [21:02:45] [PASSED] drm_test_damage_iter_single_damage_intersect_src [21:02:45] [PASSED] drm_test_damage_iter_single_damage_outside_src [21:02:45] [PASSED] drm_test_damage_iter_single_damage_fractional_src [21:02:45] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [21:02:45] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [21:02:45] [PASSED] drm_test_damage_iter_single_damage_src_moved [21:02:45] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [21:02:45] [PASSED] drm_test_damage_iter_damage [21:02:45] [PASSED] drm_test_damage_iter_damage_one_intersect [21:02:45] [PASSED] drm_test_damage_iter_damage_one_outside [21:02:45] [PASSED] drm_test_damage_iter_damage_src_moved [21:02:45] [PASSED] drm_test_damage_iter_damage_not_visible [21:02:45] ================ [PASSED] drm_damage_helper ================ [21:02:45] ============== drm_dp_mst_helper (3 subtests) ============== [21:02:45] ============== drm_test_dp_mst_calc_pbn_mode ============== [21:02:45] [PASSED] Clock 154000 BPP 30 DSC disabled [21:02:45] [PASSED] Clock 234000 BPP 30 DSC disabled [21:02:45] [PASSED] Clock 297000 BPP 24 DSC disabled [21:02:45] [PASSED] Clock 332880 BPP 24 DSC enabled [21:02:45] [PASSED] Clock 324540 BPP 24 DSC enabled [21:02:45] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [21:02:45] ============== drm_test_dp_mst_calc_pbn_div =============== [21:02:45] [PASSED] Link rate 2000000 lane count 4 [21:02:45] [PASSED] Link rate 2000000 lane count 2 [21:02:45] [PASSED] Link rate 2000000 lane count 1 [21:02:45] [PASSED] Link rate 1350000 lane count 4 [21:02:45] [PASSED] Link rate 1350000 lane count 2 [21:02:45] [PASSED] Link rate 1350000 lane count 1 [21:02:45] [PASSED] Link rate 1000000 lane count 4 [21:02:45] [PASSED] Link rate 1000000 lane count 2 [21:02:45] [PASSED] Link rate 1000000 lane count 1 [21:02:45] [PASSED] Link rate 810000 lane count 4 [21:02:45] [PASSED] Link rate 810000 lane count 2 [21:02:45] [PASSED] Link rate 810000 lane count 1 [21:02:45] [PASSED] Link rate 540000 lane count 4 [21:02:45] [PASSED] Link rate 540000 lane count 2 [21:02:45] [PASSED] Link rate 540000 lane count 1 [21:02:45] [PASSED] Link rate 270000 lane count 4 [21:02:45] [PASSED] Link rate 270000 lane count 2 [21:02:45] [PASSED] Link rate 270000 lane count 1 [21:02:45] [PASSED] Link rate 162000 lane count 4 [21:02:45] [PASSED] Link rate 162000 lane count 2 [21:02:45] [PASSED] Link rate 162000 lane count 1 [21:02:45] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [21:02:45] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [21:02:45] [PASSED] DP_ENUM_PATH_RESOURCES with port number [21:02:45] [PASSED] DP_POWER_UP_PHY with port number [21:02:45] [PASSED] DP_POWER_DOWN_PHY with port number [21:02:45] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [21:02:45] [PASSED] DP_ALLOCATE_PAYLOAD with port number [21:02:45] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [21:02:45] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [21:02:45] [PASSED] DP_QUERY_PAYLOAD with port number [21:02:45] [PASSED] DP_QUERY_PAYLOAD with VCPI [21:02:45] [PASSED] DP_REMOTE_DPCD_READ with port number [21:02:45] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [21:02:45] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [21:02:45] [PASSED] DP_REMOTE_DPCD_WRITE with port number [21:02:45] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [21:02:45] [PASSED] DP_REMOTE_DPCD_WRITE with data array [21:02:45] [PASSED] DP_REMOTE_I2C_READ with port number [21:02:45] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [21:02:45] [PASSED] DP_REMOTE_I2C_READ with transactions array [21:02:45] [PASSED] DP_REMOTE_I2C_WRITE with port number [21:02:45] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [21:02:45] [PASSED] DP_REMOTE_I2C_WRITE with data array [21:02:45] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [21:02:45] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [21:02:45] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [21:02:45] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [21:02:45] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [21:02:45] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [21:02:45] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [21:02:45] ================ [PASSED] drm_dp_mst_helper ================ [21:02:45] ================== drm_exec (7 subtests) =================== [21:02:45] [PASSED] sanitycheck [21:02:45] [PASSED] test_lock [21:02:45] [PASSED] test_lock_unlock [21:02:45] [PASSED] test_duplicates [21:02:45] [PASSED] test_prepare [21:02:45] [PASSED] test_prepare_array [21:02:45] [PASSED] test_multiple_loops [21:02:45] ==================== [PASSED] drm_exec ===================== [21:02:45] =========== drm_format_helper_test (17 subtests) =========== [21:02:45] ============== drm_test_fb_xrgb8888_to_gray8 ============== [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [21:02:45] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [21:02:45] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [21:02:45] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [21:02:45] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [21:02:45] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [21:02:45] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [21:02:45] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [21:02:45] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [21:02:45] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [21:02:45] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [21:02:45] ============== drm_test_fb_xrgb8888_to_mono =============== [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [21:02:45] ==================== drm_test_fb_swab ===================== [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ================ [PASSED] drm_test_fb_swab ================= [21:02:45] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [21:02:45] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [21:02:45] [PASSED] single_pixel_source_buffer [21:02:45] [PASSED] single_pixel_clip_rectangle [21:02:45] [PASSED] well_known_colors [21:02:45] [PASSED] destination_pitch [21:02:45] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [21:02:45] ================= drm_test_fb_clip_offset ================= [21:02:45] [PASSED] pass through [21:02:45] [PASSED] horizontal offset [21:02:45] [PASSED] vertical offset [21:02:45] [PASSED] horizontal and vertical offset [21:02:45] [PASSED] horizontal offset (custom pitch) [21:02:45] [PASSED] vertical offset (custom pitch) [21:02:45] [PASSED] horizontal and vertical offset (custom pitch) [21:02:45] ============= [PASSED] drm_test_fb_clip_offset ============= [21:02:45] =================== drm_test_fb_memcpy ==================== [21:02:45] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [21:02:45] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [21:02:45] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [21:02:45] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [21:02:45] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [21:02:45] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [21:02:45] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [21:02:45] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [21:02:45] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [21:02:45] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [21:02:45] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [21:02:45] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [21:02:45] =============== [PASSED] drm_test_fb_memcpy ================ [21:02:45] ============= [PASSED] drm_format_helper_test ============== [21:02:45] ================= drm_format (18 subtests) ================= [21:02:45] [PASSED] drm_test_format_block_width_invalid [21:02:45] [PASSED] drm_test_format_block_width_one_plane [21:02:45] [PASSED] drm_test_format_block_width_two_plane [21:02:45] [PASSED] drm_test_format_block_width_three_plane [21:02:45] [PASSED] drm_test_format_block_width_tiled [21:02:45] [PASSED] drm_test_format_block_height_invalid [21:02:45] [PASSED] drm_test_format_block_height_one_plane [21:02:45] [PASSED] drm_test_format_block_height_two_plane [21:02:45] [PASSED] drm_test_format_block_height_three_plane [21:02:45] [PASSED] drm_test_format_block_height_tiled [21:02:45] [PASSED] drm_test_format_min_pitch_invalid [21:02:45] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [21:02:45] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [21:02:45] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [21:02:45] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [21:02:45] [PASSED] drm_test_format_min_pitch_two_plane [21:02:45] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [21:02:45] [PASSED] drm_test_format_min_pitch_tiled [21:02:45] =================== [PASSED] drm_format ==================== [21:02:45] ============== drm_framebuffer (10 subtests) =============== [21:02:45] ========== drm_test_framebuffer_check_src_coords ========== [21:02:45] [PASSED] Success: source fits into fb [21:02:45] [PASSED] Fail: overflowing fb with x-axis coordinate [21:02:45] [PASSED] Fail: overflowing fb with y-axis coordinate [21:02:45] [PASSED] Fail: overflowing fb with source width [21:02:45] [PASSED] Fail: overflowing fb with source height [21:02:45] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [21:02:45] [PASSED] drm_test_framebuffer_cleanup [21:02:45] =============== drm_test_framebuffer_create =============== [21:02:45] [PASSED] ABGR8888 normal sizes [21:02:45] [PASSED] ABGR8888 max sizes [21:02:45] [PASSED] ABGR8888 pitch greater than min required [21:02:45] [PASSED] ABGR8888 pitch less than min required [21:02:45] [PASSED] ABGR8888 Invalid width [21:02:45] [PASSED] ABGR8888 Invalid buffer handle [21:02:45] [PASSED] No pixel format [21:02:45] [PASSED] ABGR8888 Width 0 [21:02:45] [PASSED] ABGR8888 Height 0 [21:02:45] [PASSED] ABGR8888 Out of bound height * pitch combination [21:02:45] [PASSED] ABGR8888 Large buffer offset [21:02:45] [PASSED] ABGR8888 Buffer offset for inexistent plane [21:02:45] [PASSED] ABGR8888 Invalid flag [21:02:45] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [21:02:45] [PASSED] ABGR8888 Valid buffer modifier [21:02:45] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [21:02:45] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [21:02:45] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [21:02:45] [PASSED] NV12 Normal sizes [21:02:45] [PASSED] NV12 Max sizes [21:02:45] [PASSED] NV12 Invalid pitch [21:02:45] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [21:02:45] [PASSED] NV12 different modifier per-plane [21:02:45] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [21:02:45] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [21:02:45] [PASSED] NV12 Modifier for inexistent plane [21:02:45] [PASSED] NV12 Handle for inexistent plane [21:02:45] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [21:02:45] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [21:02:45] [PASSED] YVU420 Normal sizes [21:02:45] [PASSED] YVU420 Max sizes [21:02:45] [PASSED] YVU420 Invalid pitch [21:02:45] [PASSED] YVU420 Different pitches [21:02:45] [PASSED] YVU420 Different buffer offsets/pitches [21:02:45] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [21:02:45] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [21:02:45] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [21:02:45] [PASSED] YVU420 Valid modifier [21:02:45] [PASSED] YVU420 Different modifiers per plane [21:02:45] [PASSED] YVU420 Modifier for inexistent plane [21:02:45] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [21:02:45] [PASSED] X0L2 Normal sizes [21:02:45] [PASSED] X0L2 Max sizes [21:02:45] [PASSED] X0L2 Invalid pitch [21:02:45] [PASSED] X0L2 Pitch greater than minimum required [21:02:45] [PASSED] X0L2 Handle for inexistent plane [21:02:45] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [21:02:45] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [21:02:45] [PASSED] X0L2 Valid modifier [21:02:45] [PASSED] X0L2 Modifier for inexistent plane [21:02:45] =========== [PASSED] drm_test_framebuffer_create =========== [21:02:45] [PASSED] drm_test_framebuffer_free [21:02:45] [PASSED] drm_test_framebuffer_init [21:02:45] [PASSED] drm_test_framebuffer_init_bad_format [21:02:45] [PASSED] drm_test_framebuffer_init_dev_mismatch [21:02:45] [PASSED] drm_test_framebuffer_lookup [21:02:45] [PASSED] drm_test_framebuffer_lookup_inexistent [21:02:45] [PASSED] drm_test_framebuffer_modifiers_not_supported [21:02:45] ================= [PASSED] drm_framebuffer ================= [21:02:45] ================ drm_gem_shmem (8 subtests) ================ [21:02:45] [PASSED] drm_gem_shmem_test_obj_create [21:02:45] [PASSED] drm_gem_shmem_test_obj_create_private [21:02:45] [PASSED] drm_gem_shmem_test_pin_pages [21:02:45] [PASSED] drm_gem_shmem_test_vmap [21:02:45] [PASSED] drm_gem_shmem_test_get_pages_sgt [21:02:45] [PASSED] drm_gem_shmem_test_get_sg_table [21:02:45] [PASSED] drm_gem_shmem_test_madvise [21:02:45] [PASSED] drm_gem_shmem_test_purge [21:02:45] ================== [PASSED] drm_gem_shmem ================== [21:02:45] === drm_atomic_helper_connector_hdmi_check (27 subtests) === [21:02:45] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [21:02:45] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [21:02:45] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [21:02:45] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [21:02:45] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [21:02:45] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [21:02:45] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [21:02:45] [PASSED] Automatic [21:02:45] [PASSED] Full [21:02:45] [PASSED] Limited 16:235 [21:02:45] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [21:02:45] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [21:02:45] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [21:02:45] [PASSED] drm_test_check_disable_connector [21:02:45] [PASSED] drm_test_check_hdmi_funcs_reject_rate [21:02:45] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [21:02:45] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [21:02:45] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [21:02:45] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [21:02:45] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [21:02:45] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [21:02:45] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [21:02:45] [PASSED] drm_test_check_output_bpc_dvi [21:02:45] [PASSED] drm_test_check_output_bpc_format_vic_1 [21:02:45] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [21:02:45] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [21:02:45] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [21:02:45] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [21:02:45] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [21:02:45] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [21:02:45] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [21:02:45] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [21:02:45] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [21:02:45] [PASSED] drm_test_check_broadcast_rgb_value [21:02:45] [PASSED] drm_test_check_bpc_8_value [21:02:45] [PASSED] drm_test_check_bpc_10_value [21:02:45] [PASSED] drm_test_check_bpc_12_value [21:02:45] [PASSED] drm_test_check_format_value [21:02:45] [PASSED] drm_test_check_tmds_char_value [21:02:45] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [21:02:45] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) = [21:02:45] [PASSED] drm_test_check_mode_valid [21:02:45] [PASSED] drm_test_check_mode_valid_reject [21:02:45] [PASSED] drm_test_check_mode_valid_reject_rate [21:02:45] [PASSED] drm_test_check_mode_valid_reject_max_clock [21:02:45] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [21:02:45] ================= drm_managed (2 subtests) ================= [21:02:45] [PASSED] drm_test_managed_release_action [21:02:45] [PASSED] drm_test_managed_run_action [21:02:45] =================== [PASSED] drm_managed =================== [21:02:45] =================== drm_mm (6 subtests) ==================== [21:02:45] [PASSED] drm_test_mm_init [21:02:45] [PASSED] drm_test_mm_debug [21:02:45] [PASSED] drm_test_mm_align32 [21:02:45] [PASSED] drm_test_mm_align64 [21:02:45] [PASSED] drm_test_mm_lowest [21:02:45] [PASSED] drm_test_mm_highest [21:02:45] ===================== [PASSED] drm_mm ====================== [21:02:45] ============= drm_modes_analog_tv (5 subtests) ============= [21:02:45] [PASSED] drm_test_modes_analog_tv_mono_576i [21:02:45] [PASSED] drm_test_modes_analog_tv_ntsc_480i [21:02:45] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [21:02:45] [PASSED] drm_test_modes_analog_tv_pal_576i [21:02:45] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [21:02:45] =============== [PASSED] drm_modes_analog_tv =============== [21:02:45] ============== drm_plane_helper (2 subtests) =============== [21:02:45] =============== drm_test_check_plane_state ================ [21:02:45] [PASSED] clipping_simple [21:02:45] [PASSED] clipping_rotate_reflect [21:02:45] [PASSED] positioning_simple [21:02:45] [PASSED] upscaling [21:02:45] [PASSED] downscaling [21:02:45] [PASSED] rounding1 [21:02:45] [PASSED] rounding2 [21:02:45] [PASSED] rounding3 [21:02:45] [PASSED] rounding4 [21:02:45] =========== [PASSED] drm_test_check_plane_state ============ [21:02:45] =========== drm_test_check_invalid_plane_state ============ [21:02:45] [PASSED] positioning_invalid [21:02:45] [PASSED] upscaling_invalid [21:02:45] [PASSED] downscaling_invalid [21:02:45] ======= [PASSED] drm_test_check_invalid_plane_state ======== [21:02:45] ================ [PASSED] drm_plane_helper ================= [21:02:45] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [21:02:45] ====== drm_test_connector_helper_tv_get_modes_check ======= [21:02:45] [PASSED] None [21:02:45] [PASSED] PAL [21:02:45] [PASSED] NTSC [21:02:45] [PASSED] Both, NTSC Default [21:02:45] [PASSED] Both, PAL Default [21:02:45] [PASSED] Both, NTSC Default, with PAL on command-line [21:02:45] [PASSED] Both, PAL Default, with NTSC on command-line [21:02:45] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [21:02:45] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [21:02:45] ================== drm_rect (9 subtests) =================== [21:02:45] [PASSED] drm_test_rect_clip_scaled_div_by_zero [21:02:45] [PASSED] drm_test_rect_clip_scaled_not_clipped [21:02:45] [PASSED] drm_test_rect_clip_scaled_clipped [21:02:45] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [21:02:45] ================= drm_test_rect_intersect ================= [21:02:45] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [21:02:45] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [21:02:45] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [21:02:45] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [21:02:45] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [21:02:45] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [21:02:45] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [21:02:45] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [21:02:45] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [21:02:45] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [21:02:45] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [21:02:45] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [21:02:45] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [21:02:45] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [21:02:45] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [21:02:45] ============= [PASSED] drm_test_rect_intersect ============= [21:02:45] ================ drm_test_rect_calc_hscale ================ [21:02:45] [PASSED] normal use [21:02:45] [PASSED] out of max range [21:02:45] [PASSED] out of min range [21:02:45] [PASSED] zero dst [21:02:45] [PASSED] negative src [21:02:45] [PASSED] negative dst [21:02:45] ============ [PASSED] drm_test_rect_calc_hscale ============ [21:02:45] ================ drm_test_rect_calc_vscale ================ [21:02:45] [PASSED] normal use [21:02:45] [PASSED] out of max range [21:02:45] [PASSED] out of min range [21:02:45] [PASSED] zero dst [21:02:45] [PASSED] negative src [21:02:45] [PASSED] negative dst [21:02:45] ============ [PASSED] drm_test_rect_calc_vscale ============ [21:02:45] ================== drm_test_rect_rotate =================== [21:02:45] [PASSED] reflect-x [21:02:45] [PASSED] reflect-y [21:02:45] [PASSED] rotate-0 [21:02:45] [PASSED] rotate-90 [21:02:45] [PASSED] rotate-180 [21:02:45] [PASSED] rotate-270 stty: 'standard input': Inappropriate ioctl for device [21:02:45] ============== [PASSED] drm_test_rect_rotate =============== [21:02:45] ================ drm_test_rect_rotate_inv ================= [21:02:45] [PASSED] reflect-x [21:02:45] [PASSED] reflect-y [21:02:45] [PASSED] rotate-0 [21:02:45] [PASSED] rotate-90 [21:02:45] [PASSED] rotate-180 [21:02:45] [PASSED] rotate-270 [21:02:45] ============ [PASSED] drm_test_rect_rotate_inv ============= [21:02:45] ==================== [PASSED] drm_rect ===================== [21:02:45] ============ drm_sysfb_modeset_test (1 subtest) ============ [21:02:45] ============ drm_test_sysfb_build_fourcc_list ============= [21:02:45] [PASSED] no native formats [21:02:45] [PASSED] XRGB8888 as native format [21:02:45] [PASSED] remove duplicates [21:02:45] [PASSED] convert alpha formats [21:02:45] [PASSED] random formats [21:02:45] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [21:02:45] ============= [PASSED] drm_sysfb_modeset_test ============== [21:02:45] ============================================================ [21:02:45] Testing complete. Ran 616 tests: passed: 616 [21:02:45] Elapsed time: 23.374s total, 1.668s configuring, 21.486s building, 0.193s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [21:02:45] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [21:02:47] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [21:02:54] Starting KUnit Kernel (1/1)... [21:02:54] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [21:02:54] ================= ttm_device (5 subtests) ================== [21:02:54] [PASSED] ttm_device_init_basic [21:02:54] [PASSED] ttm_device_init_multiple [21:02:54] [PASSED] ttm_device_fini_basic [21:02:54] [PASSED] ttm_device_init_no_vma_man [21:02:54] ================== ttm_device_init_pools ================== [21:02:54] [PASSED] No DMA allocations, no DMA32 required [21:02:54] [PASSED] DMA allocations, DMA32 required [21:02:54] [PASSED] No DMA allocations, DMA32 required [21:02:54] [PASSED] DMA allocations, no DMA32 required [21:02:54] ============== [PASSED] ttm_device_init_pools ============== [21:02:54] =================== [PASSED] ttm_device ==================== [21:02:54] ================== ttm_pool (8 subtests) =================== [21:02:54] ================== ttm_pool_alloc_basic =================== [21:02:54] [PASSED] One page [21:02:54] [PASSED] More than one page [21:02:54] [PASSED] Above the allocation limit [21:02:54] [PASSED] One page, with coherent DMA mappings enabled [21:02:54] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [21:02:54] ============== [PASSED] ttm_pool_alloc_basic =============== [21:02:54] ============== ttm_pool_alloc_basic_dma_addr ============== [21:02:54] [PASSED] One page [21:02:54] [PASSED] More than one page [21:02:54] [PASSED] Above the allocation limit [21:02:54] [PASSED] One page, with coherent DMA mappings enabled [21:02:54] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [21:02:54] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [21:02:54] [PASSED] ttm_pool_alloc_order_caching_match [21:02:54] [PASSED] ttm_pool_alloc_caching_mismatch [21:02:54] [PASSED] ttm_pool_alloc_order_mismatch [21:02:54] [PASSED] ttm_pool_free_dma_alloc [21:02:54] [PASSED] ttm_pool_free_no_dma_alloc [21:02:54] [PASSED] ttm_pool_fini_basic [21:02:54] ==================== [PASSED] ttm_pool ===================== [21:02:54] ================ ttm_resource (8 subtests) ================= [21:02:54] ================= ttm_resource_init_basic ================= [21:02:54] [PASSED] Init resource in TTM_PL_SYSTEM [21:02:54] [PASSED] Init resource in TTM_PL_VRAM [21:02:54] [PASSED] Init resource in a private placement [21:02:54] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [21:02:54] ============= [PASSED] ttm_resource_init_basic ============= [21:02:54] [PASSED] ttm_resource_init_pinned [21:02:54] [PASSED] ttm_resource_fini_basic [21:02:54] [PASSED] ttm_resource_manager_init_basic [21:02:54] [PASSED] ttm_resource_manager_usage_basic [21:02:54] [PASSED] ttm_resource_manager_set_used_basic [21:02:54] [PASSED] ttm_sys_man_alloc_basic [21:02:54] [PASSED] ttm_sys_man_free_basic [21:02:54] ================== [PASSED] ttm_resource =================== [21:02:54] =================== ttm_tt (15 subtests) =================== [21:02:54] ==================== ttm_tt_init_basic ==================== [21:02:54] [PASSED] Page-aligned size [21:02:54] [PASSED] Extra pages requested [21:02:54] ================ [PASSED] ttm_tt_init_basic ================ [21:02:54] [PASSED] ttm_tt_init_misaligned [21:02:54] [PASSED] ttm_tt_fini_basic [21:02:54] [PASSED] ttm_tt_fini_sg [21:02:54] [PASSED] ttm_tt_fini_shmem [21:02:54] [PASSED] ttm_tt_create_basic [21:02:54] [PASSED] ttm_tt_create_invalid_bo_type [21:02:54] [PASSED] ttm_tt_create_ttm_exists [21:02:54] [PASSED] ttm_tt_create_failed [21:02:54] [PASSED] ttm_tt_destroy_basic [21:02:54] [PASSED] ttm_tt_populate_null_ttm [21:02:54] [PASSED] ttm_tt_populate_populated_ttm [21:02:54] [PASSED] ttm_tt_unpopulate_basic [21:02:54] [PASSED] ttm_tt_unpopulate_empty_ttm [21:02:54] [PASSED] ttm_tt_swapin_basic [21:02:54] ===================== [PASSED] ttm_tt ====================== [21:02:54] =================== ttm_bo (14 subtests) =================== [21:02:54] =========== ttm_bo_reserve_optimistic_no_ticket =========== [21:02:54] [PASSED] Cannot be interrupted and sleeps [21:02:54] [PASSED] Cannot be interrupted, locks straight away [21:02:54] [PASSED] Can be interrupted, sleeps [21:02:54] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [21:02:54] [PASSED] ttm_bo_reserve_locked_no_sleep [21:02:54] [PASSED] ttm_bo_reserve_no_wait_ticket [21:02:54] [PASSED] ttm_bo_reserve_double_resv [21:02:54] [PASSED] ttm_bo_reserve_interrupted [21:02:54] [PASSED] ttm_bo_reserve_deadlock [21:02:54] [PASSED] ttm_bo_unreserve_basic [21:02:54] [PASSED] ttm_bo_unreserve_pinned [21:02:54] [PASSED] ttm_bo_unreserve_bulk [21:02:54] [PASSED] ttm_bo_put_basic [21:02:54] [PASSED] ttm_bo_put_shared_resv [21:02:54] [PASSED] ttm_bo_pin_basic [21:02:54] [PASSED] ttm_bo_pin_unpin_resource [21:02:54] [PASSED] ttm_bo_multiple_pin_one_unpin [21:02:54] ===================== [PASSED] ttm_bo ====================== [21:02:54] ============== ttm_bo_validate (22 subtests) =============== [21:02:54] ============== ttm_bo_init_reserved_sys_man =============== [21:02:54] [PASSED] Buffer object for userspace [21:02:54] [PASSED] Kernel buffer object [21:02:54] [PASSED] Shared buffer object [21:02:54] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [21:02:54] ============== ttm_bo_init_reserved_mock_man ============== [21:02:54] [PASSED] Buffer object for userspace [21:02:54] [PASSED] Kernel buffer object [21:02:54] [PASSED] Shared buffer object [21:02:54] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [21:02:54] [PASSED] ttm_bo_init_reserved_resv [21:02:54] ================== ttm_bo_validate_basic ================== [21:02:54] [PASSED] Buffer object for userspace [21:02:54] [PASSED] Kernel buffer object [21:02:54] [PASSED] Shared buffer object [21:02:54] ============== [PASSED] ttm_bo_validate_basic ============== [21:02:54] [PASSED] ttm_bo_validate_invalid_placement [21:02:54] ============= ttm_bo_validate_same_placement ============== [21:02:54] [PASSED] System manager [21:02:54] [PASSED] VRAM manager [21:02:54] ========= [PASSED] ttm_bo_validate_same_placement ========== [21:02:54] [PASSED] ttm_bo_validate_failed_alloc [21:02:54] [PASSED] ttm_bo_validate_pinned [21:02:54] [PASSED] ttm_bo_validate_busy_placement [21:02:54] ================ ttm_bo_validate_multihop ================= [21:02:54] [PASSED] Buffer object for userspace [21:02:54] [PASSED] Kernel buffer object [21:02:54] [PASSED] Shared buffer object [21:02:54] ============ [PASSED] ttm_bo_validate_multihop ============= [21:02:54] ========== ttm_bo_validate_no_placement_signaled ========== [21:02:54] [PASSED] Buffer object in system domain, no page vector [21:02:54] [PASSED] Buffer object in system domain with an existing page vector [21:02:54] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [21:02:54] ======== ttm_bo_validate_no_placement_not_signaled ======== [21:02:54] [PASSED] Buffer object for userspace [21:02:54] [PASSED] Kernel buffer object [21:02:54] [PASSED] Shared buffer object [21:02:54] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [21:02:54] [PASSED] ttm_bo_validate_move_fence_signaled [21:02:55] ========= ttm_bo_validate_move_fence_not_signaled ========= [21:02:55] [PASSED] Waits for GPU [21:02:55] [PASSED] Tries to lock straight away [21:02:55] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [21:02:55] [PASSED] ttm_bo_validate_swapout [21:02:55] [PASSED] ttm_bo_validate_happy_evict [21:02:55] [PASSED] ttm_bo_validate_all_pinned_evict [21:02:55] [PASSED] ttm_bo_validate_allowed_only_evict [21:02:55] [PASSED] ttm_bo_validate_deleted_evict [21:02:55] [PASSED] ttm_bo_validate_busy_domain_evict [21:02:55] [PASSED] ttm_bo_validate_evict_gutting [21:02:55] [PASSED] ttm_bo_validate_recrusive_evict stty: 'standard input': Inappropriate ioctl for device [21:02:55] ================= [PASSED] ttm_bo_validate ================= [21:02:55] ============================================================ [21:02:55] Testing complete. Ran 102 tests: passed: 102 [21:02:55] Elapsed time: 10.005s total, 1.682s configuring, 7.656s building, 0.580s running + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 12+ messages in thread
* ✓ Xe.CI.BAT: success for series starting with [CI,1/2] drm/xe/guc: Enable extended CAT error reporting 2025-06-25 20:54 [CI 1/2] drm/xe/guc: Enable extended CAT error reporting Daniele Ceraolo Spurio ` (2 preceding siblings ...) 2025-06-25 21:02 ` ✓ CI.KUnit: success " Patchwork @ 2025-06-25 21:40 ` Patchwork 2025-06-25 23:54 ` [CI 1/2] " Matthew Brost 2025-06-27 2:22 ` ✗ Xe.CI.Full: failure for series starting with [CI,1/2] " Patchwork 5 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2025-06-25 21:40 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 984 bytes --] == Series Details == Series: series starting with [CI,1/2] drm/xe/guc: Enable extended CAT error reporting URL : https://patchwork.freedesktop.org/series/150785/ State : success == Summary == CI Bug Log - changes from xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73_BAT -> xe-pw-150785v1_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (9 -> 8) ------------------------------ Missing (1): bat-adlp-vm Changes ------- No changes found Build changes ------------- * Linux: xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73 -> xe-pw-150785v1 IGT_8426: f87ffec6e23df5f3f044d90924f948e0bbd68c6c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73: 74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73 xe-pw-150785v1: 150785v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/index.html [-- Attachment #2: Type: text/html, Size: 1532 bytes --] ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [CI 1/2] drm/xe/guc: Enable extended CAT error reporting 2025-06-25 20:54 [CI 1/2] drm/xe/guc: Enable extended CAT error reporting Daniele Ceraolo Spurio ` (3 preceding siblings ...) 2025-06-25 21:40 ` ✓ Xe.CI.BAT: " Patchwork @ 2025-06-25 23:54 ` Matthew Brost 2025-06-26 0:05 ` Daniele Ceraolo Spurio 2025-06-27 2:22 ` ✗ Xe.CI.Full: failure for series starting with [CI,1/2] " Patchwork 5 siblings, 1 reply; 12+ messages in thread From: Matthew Brost @ 2025-06-25 23:54 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-xe On Wed, Jun 25, 2025 at 01:54:06PM -0700, Daniele Ceraolo Spurio wrote: > On newer HW (Xe2 onwards + PVC) it is possible to get extra information > when a CAT error occurs, specifically a dword reporting the error type. > To enable this extra reporting, we need to opt-in with the GuC, which is > done via a specific per-VF feature opt-in H2G. > > On platforms where the HW does not support the extra reporting, the GuC > will set the type to 0xdeadbeef, so we can keep the code simple and > opt-in to the feature on every platform and then just discard the data > if it is invalid. > > Note that on native/PF we're guaranteed that the opt in is available > because we don't support any GuC old enough to not have it, but if we're > a VF we might be running on a non-XE PF with an older GuC, so we need to > handle that case. We can re-use the invalid type above to handle this > scenario the same way as if the feature was not supported in HW. > > Given that this patch is the first user of the guc_buf_cache on native > and VF, it also extends that feature to non-PF use-cases. > > v2: simpler print for the error type (John), rebase > v3: use guc_buf_cache instead of new alloc, simpler doc (Michal) > > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Nirmoy Das <nirmoy.das@intel.com> > Cc: John Harrison <John.C.Harrison@Intel.com> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> #v1 > Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> > Reviewed-by: John Harrison <John.C.Harrison@Intel.com> > --- > drivers/gpu/drm/xe/abi/guc_actions_abi.h | 4 ++ > drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 15 +++++++ > drivers/gpu/drm/xe/xe_guc.c | 56 ++++++++++++++++++++++++ > drivers/gpu/drm/xe/xe_guc.h | 1 + > drivers/gpu/drm/xe/xe_guc_submit.c | 16 +++++-- > drivers/gpu/drm/xe/xe_uc.c | 4 ++ > 6 files changed, 93 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h > index ff4f412c28d8..81eb046aeebf 100644 > --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h > +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h > @@ -142,6 +142,7 @@ enum xe_guc_action { > XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A, > XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C, > XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER = 0x550D, > + XE_GUC_ACTION_OPT_IN_FEATURE_KLV = 0x550E, > XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000, > XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002, > XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003, > @@ -271,4 +272,7 @@ enum xe_guc_g2g_type { > #define XE_G2G_DEREGISTER_TILE REG_GENMASK(15, 12) > #define XE_G2G_DEREGISTER_TYPE REG_GENMASK(11, 8) > > +/* invalid type for XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR */ > +#define XE_GUC_CAT_ERR_TYPE_INVALID 0xdeadbeef > + > #endif > diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h > index 7de8f827281f..5b2502bec2dc 100644 > --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h > +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h > @@ -16,6 +16,7 @@ > * +===+=======+==============================================================+ > * | 0 | 31:16 | **KEY** - KLV key identifier | > * | | | - `GuC Self Config KLVs`_ | > + * | | | - `GuC Opt In Feature KLVs`_ | > * | | | - `GuC VGT Policy KLVs`_ | > * | | | - `GuC VF Configuration KLVs`_ | > * | | | | > @@ -124,6 +125,20 @@ enum { > GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5, > }; > > +/** > + * DOC: GuC Opt In Feature KLVs > + * > + * `GuC KLV`_ keys available for use with OPT_IN_FEATURE_KLV > + * > + * _`GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE` : 0x4001 > + * Adds an extra dword to the XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR G2H > + * containing the type of the CAT error. On HW that does not support > + * reporting the CAT error type, the extra dword is set to 0xdeadbeef. > + */ > + > +#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_KEY 0x4001 > +#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_LEN 0u > + > /** > * DOC: GuC VGT Policy KLVs > * > diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c > index 209e5d53c290..4a7c467ad669 100644 > --- a/drivers/gpu/drm/xe/xe_guc.c > +++ b/drivers/gpu/drm/xe/xe_guc.c > @@ -29,6 +29,7 @@ > #include "xe_guc_db_mgr.h" > #include "xe_guc_engine_activity.h" > #include "xe_guc_hwconfig.h" > +#include "xe_guc_klv_helpers.h" > #include "xe_guc_log.h" > #include "xe_guc_pc.h" > #include "xe_guc_relay.h" > @@ -570,6 +571,57 @@ static int guc_g2g_start(struct xe_guc *guc) > return err; > } > > +static int __guc_opt_in_features_enable(struct xe_guc *guc, u64 addr, u32 num_dwords) > +{ > + u32 action[] = { > + XE_GUC_ACTION_OPT_IN_FEATURE_KLV, > + lower_32_bits(addr), > + upper_32_bits(addr), > + num_dwords > + }; > + > + return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action)); > +} > + > +#define OPT_IN_MAX_DWORDS 16 > +int xe_guc_opt_in_features_enable(struct xe_guc *guc) > +{ > + struct xe_device *xe = guc_to_xe(guc); > + CLASS(xe_guc_buf, buf)(&guc->buf, OPT_IN_MAX_DWORDS); > + u32 count = 0; > + u32 *klvs; > + int ret; > + > + if (!xe_guc_buf_is_valid(buf)) > + return -ENOBUFS; > + > + klvs = xe_guc_buf_cpu_ptr(buf); > + > + /* > + * The extra CAT error type opt-in was added in GuC v70.17.0, which maps > + * to compatibility version v1.7.0. > + * Note that the GuC allows enabling this KLV even on platforms that do > + * not support the extra type; in such case the returned type variable > + * will be set to a known invalid value which we can check against. > + */ > + if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 7, 0)) > + klvs[count++] = PREP_GUC_KLV_TAG(OPT_IN_FEATURE_EXT_CAT_ERR_TYPE); > + > + if (count) { > + xe_assert(xe, count <= OPT_IN_MAX_DWORDS); > + > + ret = __guc_opt_in_features_enable(guc, xe_guc_buf_flush(buf), count); > + if (ret < 0) { > + xe_gt_err(guc_to_gt(guc), > + "failed to enable GuC opt-in features: %pe\n", > + ERR_PTR(ret)); > + return ret; > + } > + } > + > + return 0; > +} > + > static void guc_fini_hw(void *arg) > { > struct xe_guc *guc = arg; > @@ -767,6 +819,10 @@ int xe_guc_post_load_init(struct xe_guc *guc) > > xe_guc_ads_populate_post_load(&guc->ads); > > + ret = xe_guc_opt_in_features_enable(guc); > + if (ret) > + return ret; > + > if (xe_guc_g2g_wanted(guc_to_xe(guc))) { > ret = guc_g2g_start(guc); > if (ret) > diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h > index 58338be44558..4a66575f017d 100644 > --- a/drivers/gpu/drm/xe/xe_guc.h > +++ b/drivers/gpu/drm/xe/xe_guc.h > @@ -33,6 +33,7 @@ int xe_guc_reset(struct xe_guc *guc); > int xe_guc_upload(struct xe_guc *guc); > int xe_guc_min_load_for_hwconfig(struct xe_guc *guc); > int xe_guc_enable_communication(struct xe_guc *guc); > +int xe_guc_opt_in_features_enable(struct xe_guc *guc); > int xe_guc_suspend(struct xe_guc *guc); > void xe_guc_notify(struct xe_guc *guc); > int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr); > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c > index 26c6c71dc91a..32548c931615 100644 > --- a/drivers/gpu/drm/xe/xe_guc_submit.c > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c > @@ -2103,12 +2103,16 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, > struct xe_gt *gt = guc_to_gt(guc); > struct xe_exec_queue *q; > u32 guc_id; > + u32 type = XE_GUC_CAT_ERR_TYPE_INVALID; > > - if (unlikely(len < 1)) > + if (unlikely(!len || len > 2)) > return -EPROTO; > > guc_id = msg[0]; > > + if (len == 2) > + type = msg[1]; > + > if (guc_id == GUC_ID_UNKNOWN) { > /* > * GuC uses GUC_ID_UNKNOWN if it can not map the CAT fault to any PF/VF > @@ -2122,8 +2126,14 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, > if (unlikely(!q)) > return -EPROTO; > > - xe_gt_dbg(gt, "Engine memory cat error: engine_class=%s, logical_mask: 0x%x, guc_id=%d", > - xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); > + if (type != XE_GUC_CAT_ERR_TYPE_INVALID) > + xe_gt_dbg(gt, > + "Engine memory CAT error [%u]: class=%s, logical_mask: 0x%x, guc_id=%d", > + type, xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); Do we define the type anywhere - I only see XE_GUC_CAT_ERR_TYPE_INVALID. It would be useful if we had this defined somewhere in KMD headers or even more useful if type was accompanied by a string description. Matt > + else > + xe_gt_dbg(gt, > + "Engine memory CAT error: class=%s, logical_mask: 0x%x, guc_id=%d", > + xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); > > trace_xe_exec_queue_memory_cat_error(q); > > diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c > index 3a8751a8b92d..5c45b0f072a4 100644 > --- a/drivers/gpu/drm/xe/xe_uc.c > +++ b/drivers/gpu/drm/xe/xe_uc.c > @@ -165,6 +165,10 @@ static int vf_uc_init_hw(struct xe_uc *uc) > > uc->guc.submission_state.enabled = true; > > + err = xe_guc_opt_in_features_enable(&uc->guc); > + if (err) > + return err; > + > err = xe_gt_record_default_lrcs(uc_to_gt(uc)); > if (err) > return err; > -- > 2.43.0 > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [CI 1/2] drm/xe/guc: Enable extended CAT error reporting 2025-06-25 23:54 ` [CI 1/2] " Matthew Brost @ 2025-06-26 0:05 ` Daniele Ceraolo Spurio 2025-06-26 3:18 ` Matthew Brost 0 siblings, 1 reply; 12+ messages in thread From: Daniele Ceraolo Spurio @ 2025-06-26 0:05 UTC (permalink / raw) To: Matthew Brost; +Cc: intel-xe On 6/25/2025 4:54 PM, Matthew Brost wrote: > On Wed, Jun 25, 2025 at 01:54:06PM -0700, Daniele Ceraolo Spurio wrote: >> On newer HW (Xe2 onwards + PVC) it is possible to get extra information >> when a CAT error occurs, specifically a dword reporting the error type. >> To enable this extra reporting, we need to opt-in with the GuC, which is >> done via a specific per-VF feature opt-in H2G. >> >> On platforms where the HW does not support the extra reporting, the GuC >> will set the type to 0xdeadbeef, so we can keep the code simple and >> opt-in to the feature on every platform and then just discard the data >> if it is invalid. >> >> Note that on native/PF we're guaranteed that the opt in is available >> because we don't support any GuC old enough to not have it, but if we're >> a VF we might be running on a non-XE PF with an older GuC, so we need to >> handle that case. We can re-use the invalid type above to handle this >> scenario the same way as if the feature was not supported in HW. >> >> Given that this patch is the first user of the guc_buf_cache on native >> and VF, it also extends that feature to non-PF use-cases. >> >> v2: simpler print for the error type (John), rebase >> v3: use guc_buf_cache instead of new alloc, simpler doc (Michal) >> >> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> >> Cc: Nirmoy Das <nirmoy.das@intel.com> >> Cc: John Harrison <John.C.Harrison@Intel.com> >> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> >> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> #v1 >> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> >> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> >> --- >> drivers/gpu/drm/xe/abi/guc_actions_abi.h | 4 ++ >> drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 15 +++++++ >> drivers/gpu/drm/xe/xe_guc.c | 56 ++++++++++++++++++++++++ >> drivers/gpu/drm/xe/xe_guc.h | 1 + >> drivers/gpu/drm/xe/xe_guc_submit.c | 16 +++++-- >> drivers/gpu/drm/xe/xe_uc.c | 4 ++ >> 6 files changed, 93 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h >> index ff4f412c28d8..81eb046aeebf 100644 >> --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h >> +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h >> @@ -142,6 +142,7 @@ enum xe_guc_action { >> XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A, >> XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C, >> XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER = 0x550D, >> + XE_GUC_ACTION_OPT_IN_FEATURE_KLV = 0x550E, >> XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000, >> XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002, >> XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003, >> @@ -271,4 +272,7 @@ enum xe_guc_g2g_type { >> #define XE_G2G_DEREGISTER_TILE REG_GENMASK(15, 12) >> #define XE_G2G_DEREGISTER_TYPE REG_GENMASK(11, 8) >> >> +/* invalid type for XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR */ >> +#define XE_GUC_CAT_ERR_TYPE_INVALID 0xdeadbeef >> + >> #endif >> diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h >> index 7de8f827281f..5b2502bec2dc 100644 >> --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h >> +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h >> @@ -16,6 +16,7 @@ >> * +===+=======+==============================================================+ >> * | 0 | 31:16 | **KEY** - KLV key identifier | >> * | | | - `GuC Self Config KLVs`_ | >> + * | | | - `GuC Opt In Feature KLVs`_ | >> * | | | - `GuC VGT Policy KLVs`_ | >> * | | | - `GuC VF Configuration KLVs`_ | >> * | | | | >> @@ -124,6 +125,20 @@ enum { >> GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5, >> }; >> >> +/** >> + * DOC: GuC Opt In Feature KLVs >> + * >> + * `GuC KLV`_ keys available for use with OPT_IN_FEATURE_KLV >> + * >> + * _`GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE` : 0x4001 >> + * Adds an extra dword to the XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR G2H >> + * containing the type of the CAT error. On HW that does not support >> + * reporting the CAT error type, the extra dword is set to 0xdeadbeef. >> + */ >> + >> +#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_KEY 0x4001 >> +#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_LEN 0u >> + >> /** >> * DOC: GuC VGT Policy KLVs >> * >> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c >> index 209e5d53c290..4a7c467ad669 100644 >> --- a/drivers/gpu/drm/xe/xe_guc.c >> +++ b/drivers/gpu/drm/xe/xe_guc.c >> @@ -29,6 +29,7 @@ >> #include "xe_guc_db_mgr.h" >> #include "xe_guc_engine_activity.h" >> #include "xe_guc_hwconfig.h" >> +#include "xe_guc_klv_helpers.h" >> #include "xe_guc_log.h" >> #include "xe_guc_pc.h" >> #include "xe_guc_relay.h" >> @@ -570,6 +571,57 @@ static int guc_g2g_start(struct xe_guc *guc) >> return err; >> } >> >> +static int __guc_opt_in_features_enable(struct xe_guc *guc, u64 addr, u32 num_dwords) >> +{ >> + u32 action[] = { >> + XE_GUC_ACTION_OPT_IN_FEATURE_KLV, >> + lower_32_bits(addr), >> + upper_32_bits(addr), >> + num_dwords >> + }; >> + >> + return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action)); >> +} >> + >> +#define OPT_IN_MAX_DWORDS 16 >> +int xe_guc_opt_in_features_enable(struct xe_guc *guc) >> +{ >> + struct xe_device *xe = guc_to_xe(guc); >> + CLASS(xe_guc_buf, buf)(&guc->buf, OPT_IN_MAX_DWORDS); >> + u32 count = 0; >> + u32 *klvs; >> + int ret; >> + >> + if (!xe_guc_buf_is_valid(buf)) >> + return -ENOBUFS; >> + >> + klvs = xe_guc_buf_cpu_ptr(buf); >> + >> + /* >> + * The extra CAT error type opt-in was added in GuC v70.17.0, which maps >> + * to compatibility version v1.7.0. >> + * Note that the GuC allows enabling this KLV even on platforms that do >> + * not support the extra type; in such case the returned type variable >> + * will be set to a known invalid value which we can check against. >> + */ >> + if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 7, 0)) >> + klvs[count++] = PREP_GUC_KLV_TAG(OPT_IN_FEATURE_EXT_CAT_ERR_TYPE); >> + >> + if (count) { >> + xe_assert(xe, count <= OPT_IN_MAX_DWORDS); >> + >> + ret = __guc_opt_in_features_enable(guc, xe_guc_buf_flush(buf), count); >> + if (ret < 0) { >> + xe_gt_err(guc_to_gt(guc), >> + "failed to enable GuC opt-in features: %pe\n", >> + ERR_PTR(ret)); >> + return ret; >> + } >> + } >> + >> + return 0; >> +} >> + >> static void guc_fini_hw(void *arg) >> { >> struct xe_guc *guc = arg; >> @@ -767,6 +819,10 @@ int xe_guc_post_load_init(struct xe_guc *guc) >> >> xe_guc_ads_populate_post_load(&guc->ads); >> >> + ret = xe_guc_opt_in_features_enable(guc); >> + if (ret) >> + return ret; >> + >> if (xe_guc_g2g_wanted(guc_to_xe(guc))) { >> ret = guc_g2g_start(guc); >> if (ret) >> diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h >> index 58338be44558..4a66575f017d 100644 >> --- a/drivers/gpu/drm/xe/xe_guc.h >> +++ b/drivers/gpu/drm/xe/xe_guc.h >> @@ -33,6 +33,7 @@ int xe_guc_reset(struct xe_guc *guc); >> int xe_guc_upload(struct xe_guc *guc); >> int xe_guc_min_load_for_hwconfig(struct xe_guc *guc); >> int xe_guc_enable_communication(struct xe_guc *guc); >> +int xe_guc_opt_in_features_enable(struct xe_guc *guc); >> int xe_guc_suspend(struct xe_guc *guc); >> void xe_guc_notify(struct xe_guc *guc); >> int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr); >> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c >> index 26c6c71dc91a..32548c931615 100644 >> --- a/drivers/gpu/drm/xe/xe_guc_submit.c >> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c >> @@ -2103,12 +2103,16 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, >> struct xe_gt *gt = guc_to_gt(guc); >> struct xe_exec_queue *q; >> u32 guc_id; >> + u32 type = XE_GUC_CAT_ERR_TYPE_INVALID; >> >> - if (unlikely(len < 1)) >> + if (unlikely(!len || len > 2)) >> return -EPROTO; >> >> guc_id = msg[0]; >> >> + if (len == 2) >> + type = msg[1]; >> + >> if (guc_id == GUC_ID_UNKNOWN) { >> /* >> * GuC uses GUC_ID_UNKNOWN if it can not map the CAT fault to any PF/VF >> @@ -2122,8 +2126,14 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, >> if (unlikely(!q)) >> return -EPROTO; >> >> - xe_gt_dbg(gt, "Engine memory cat error: engine_class=%s, logical_mask: 0x%x, guc_id=%d", >> - xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); >> + if (type != XE_GUC_CAT_ERR_TYPE_INVALID) >> + xe_gt_dbg(gt, >> + "Engine memory CAT error [%u]: class=%s, logical_mask: 0x%x, guc_id=%d", >> + type, xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); > Do we define the type anywhere - I only see XE_GUC_CAT_ERR_TYPE_INVALID. > > It would be useful if we had this defined somewhere in KMD headers or > even more useful if type was accompanied by a string description. The type is HW-defined, the GuC just forwards it. AFAICT the values are not guaranteed to be the same across platforms (the Xe and Xe2 lists are different, see bspec 54047 and 72187), so I don't think we want to maintain a list in the driver. Daniele > > Matt > >> + else >> + xe_gt_dbg(gt, >> + "Engine memory CAT error: class=%s, logical_mask: 0x%x, guc_id=%d", >> + xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); >> >> trace_xe_exec_queue_memory_cat_error(q); >> >> diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c >> index 3a8751a8b92d..5c45b0f072a4 100644 >> --- a/drivers/gpu/drm/xe/xe_uc.c >> +++ b/drivers/gpu/drm/xe/xe_uc.c >> @@ -165,6 +165,10 @@ static int vf_uc_init_hw(struct xe_uc *uc) >> >> uc->guc.submission_state.enabled = true; >> >> + err = xe_guc_opt_in_features_enable(&uc->guc); >> + if (err) >> + return err; >> + >> err = xe_gt_record_default_lrcs(uc_to_gt(uc)); >> if (err) >> return err; >> -- >> 2.43.0 >> ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [CI 1/2] drm/xe/guc: Enable extended CAT error reporting 2025-06-26 0:05 ` Daniele Ceraolo Spurio @ 2025-06-26 3:18 ` Matthew Brost 2025-06-26 3:20 ` Matthew Brost 0 siblings, 1 reply; 12+ messages in thread From: Matthew Brost @ 2025-06-26 3:18 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-xe On Wed, Jun 25, 2025 at 05:05:59PM -0700, Daniele Ceraolo Spurio wrote: > > > On 6/25/2025 4:54 PM, Matthew Brost wrote: > > On Wed, Jun 25, 2025 at 01:54:06PM -0700, Daniele Ceraolo Spurio wrote: > > > On newer HW (Xe2 onwards + PVC) it is possible to get extra information > > > when a CAT error occurs, specifically a dword reporting the error type. > > > To enable this extra reporting, we need to opt-in with the GuC, which is > > > done via a specific per-VF feature opt-in H2G. > > > > > > On platforms where the HW does not support the extra reporting, the GuC > > > will set the type to 0xdeadbeef, so we can keep the code simple and > > > opt-in to the feature on every platform and then just discard the data > > > if it is invalid. > > > > > > Note that on native/PF we're guaranteed that the opt in is available > > > because we don't support any GuC old enough to not have it, but if we're > > > a VF we might be running on a non-XE PF with an older GuC, so we need to > > > handle that case. We can re-use the invalid type above to handle this > > > scenario the same way as if the feature was not supported in HW. > > > > > > Given that this patch is the first user of the guc_buf_cache on native > > > and VF, it also extends that feature to non-PF use-cases. > > > > > > v2: simpler print for the error type (John), rebase > > > v3: use guc_buf_cache instead of new alloc, simpler doc (Michal) > > > > > > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > > > Cc: Nirmoy Das <nirmoy.das@intel.com> > > > Cc: John Harrison <John.C.Harrison@Intel.com> > > > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > > > Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> #v1 > > > Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> > > > Reviewed-by: John Harrison <John.C.Harrison@Intel.com> > > > --- > > > drivers/gpu/drm/xe/abi/guc_actions_abi.h | 4 ++ > > > drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 15 +++++++ > > > drivers/gpu/drm/xe/xe_guc.c | 56 ++++++++++++++++++++++++ > > > drivers/gpu/drm/xe/xe_guc.h | 1 + > > > drivers/gpu/drm/xe/xe_guc_submit.c | 16 +++++-- > > > drivers/gpu/drm/xe/xe_uc.c | 4 ++ > > > 6 files changed, 93 insertions(+), 3 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h > > > index ff4f412c28d8..81eb046aeebf 100644 > > > --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h > > > +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h > > > @@ -142,6 +142,7 @@ enum xe_guc_action { > > > XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A, > > > XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C, > > > XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER = 0x550D, > > > + XE_GUC_ACTION_OPT_IN_FEATURE_KLV = 0x550E, > > > XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000, > > > XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002, > > > XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003, > > > @@ -271,4 +272,7 @@ enum xe_guc_g2g_type { > > > #define XE_G2G_DEREGISTER_TILE REG_GENMASK(15, 12) > > > #define XE_G2G_DEREGISTER_TYPE REG_GENMASK(11, 8) > > > +/* invalid type for XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR */ > > > +#define XE_GUC_CAT_ERR_TYPE_INVALID 0xdeadbeef > > > + > > > #endif > > > diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h > > > index 7de8f827281f..5b2502bec2dc 100644 > > > --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h > > > +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h > > > @@ -16,6 +16,7 @@ > > > * +===+=======+==============================================================+ > > > * | 0 | 31:16 | **KEY** - KLV key identifier | > > > * | | | - `GuC Self Config KLVs`_ | > > > + * | | | - `GuC Opt In Feature KLVs`_ | > > > * | | | - `GuC VGT Policy KLVs`_ | > > > * | | | - `GuC VF Configuration KLVs`_ | > > > * | | | | > > > @@ -124,6 +125,20 @@ enum { > > > GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5, > > > }; > > > +/** > > > + * DOC: GuC Opt In Feature KLVs > > > + * > > > + * `GuC KLV`_ keys available for use with OPT_IN_FEATURE_KLV > > > + * > > > + * _`GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE` : 0x4001 > > > + * Adds an extra dword to the XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR G2H > > > + * containing the type of the CAT error. On HW that does not support > > > + * reporting the CAT error type, the extra dword is set to 0xdeadbeef. > > > + */ > > > + > > > +#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_KEY 0x4001 > > > +#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_LEN 0u > > > + > > > /** > > > * DOC: GuC VGT Policy KLVs > > > * > > > diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c > > > index 209e5d53c290..4a7c467ad669 100644 > > > --- a/drivers/gpu/drm/xe/xe_guc.c > > > +++ b/drivers/gpu/drm/xe/xe_guc.c > > > @@ -29,6 +29,7 @@ > > > #include "xe_guc_db_mgr.h" > > > #include "xe_guc_engine_activity.h" > > > #include "xe_guc_hwconfig.h" > > > +#include "xe_guc_klv_helpers.h" > > > #include "xe_guc_log.h" > > > #include "xe_guc_pc.h" > > > #include "xe_guc_relay.h" > > > @@ -570,6 +571,57 @@ static int guc_g2g_start(struct xe_guc *guc) > > > return err; > > > } > > > +static int __guc_opt_in_features_enable(struct xe_guc *guc, u64 addr, u32 num_dwords) > > > +{ > > > + u32 action[] = { > > > + XE_GUC_ACTION_OPT_IN_FEATURE_KLV, > > > + lower_32_bits(addr), > > > + upper_32_bits(addr), > > > + num_dwords > > > + }; > > > + > > > + return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action)); > > > +} > > > + > > > +#define OPT_IN_MAX_DWORDS 16 > > > +int xe_guc_opt_in_features_enable(struct xe_guc *guc) > > > +{ > > > + struct xe_device *xe = guc_to_xe(guc); > > > + CLASS(xe_guc_buf, buf)(&guc->buf, OPT_IN_MAX_DWORDS); > > > + u32 count = 0; > > > + u32 *klvs; > > > + int ret; > > > + > > > + if (!xe_guc_buf_is_valid(buf)) > > > + return -ENOBUFS; > > > + > > > + klvs = xe_guc_buf_cpu_ptr(buf); > > > + > > > + /* > > > + * The extra CAT error type opt-in was added in GuC v70.17.0, which maps > > > + * to compatibility version v1.7.0. > > > + * Note that the GuC allows enabling this KLV even on platforms that do > > > + * not support the extra type; in such case the returned type variable > > > + * will be set to a known invalid value which we can check against. > > > + */ > > > + if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 7, 0)) > > > + klvs[count++] = PREP_GUC_KLV_TAG(OPT_IN_FEATURE_EXT_CAT_ERR_TYPE); > > > + > > > + if (count) { > > > + xe_assert(xe, count <= OPT_IN_MAX_DWORDS); > > > + > > > + ret = __guc_opt_in_features_enable(guc, xe_guc_buf_flush(buf), count); > > > + if (ret < 0) { > > > + xe_gt_err(guc_to_gt(guc), > > > + "failed to enable GuC opt-in features: %pe\n", > > > + ERR_PTR(ret)); > > > + return ret; > > > + } > > > + } > > > + > > > + return 0; > > > +} > > > + > > > static void guc_fini_hw(void *arg) > > > { > > > struct xe_guc *guc = arg; > > > @@ -767,6 +819,10 @@ int xe_guc_post_load_init(struct xe_guc *guc) > > > xe_guc_ads_populate_post_load(&guc->ads); > > > + ret = xe_guc_opt_in_features_enable(guc); > > > + if (ret) > > > + return ret; > > > + > > > if (xe_guc_g2g_wanted(guc_to_xe(guc))) { > > > ret = guc_g2g_start(guc); > > > if (ret) > > > diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h > > > index 58338be44558..4a66575f017d 100644 > > > --- a/drivers/gpu/drm/xe/xe_guc.h > > > +++ b/drivers/gpu/drm/xe/xe_guc.h > > > @@ -33,6 +33,7 @@ int xe_guc_reset(struct xe_guc *guc); > > > int xe_guc_upload(struct xe_guc *guc); > > > int xe_guc_min_load_for_hwconfig(struct xe_guc *guc); > > > int xe_guc_enable_communication(struct xe_guc *guc); > > > +int xe_guc_opt_in_features_enable(struct xe_guc *guc); > > > int xe_guc_suspend(struct xe_guc *guc); > > > void xe_guc_notify(struct xe_guc *guc); > > > int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr); > > > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c > > > index 26c6c71dc91a..32548c931615 100644 > > > --- a/drivers/gpu/drm/xe/xe_guc_submit.c > > > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c > > > @@ -2103,12 +2103,16 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, > > > struct xe_gt *gt = guc_to_gt(guc); > > > struct xe_exec_queue *q; > > > u32 guc_id; > > > + u32 type = XE_GUC_CAT_ERR_TYPE_INVALID; > > > - if (unlikely(len < 1)) > > > + if (unlikely(!len || len > 2)) > > > return -EPROTO; > > > guc_id = msg[0]; > > > + if (len == 2) > > > + type = msg[1]; > > > + > > > if (guc_id == GUC_ID_UNKNOWN) { > > > /* > > > * GuC uses GUC_ID_UNKNOWN if it can not map the CAT fault to any PF/VF > > > @@ -2122,8 +2126,14 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, > > > if (unlikely(!q)) > > > return -EPROTO; > > > - xe_gt_dbg(gt, "Engine memory cat error: engine_class=%s, logical_mask: 0x%x, guc_id=%d", > > > - xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); > > > + if (type != XE_GUC_CAT_ERR_TYPE_INVALID) > > > + xe_gt_dbg(gt, > > > + "Engine memory CAT error [%u]: class=%s, logical_mask: 0x%x, guc_id=%d", > > > + type, xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); > > Do we define the type anywhere - I only see XE_GUC_CAT_ERR_TYPE_INVALID. > > > > It would be useful if we had this defined somewhere in KMD headers or > > even more useful if type was accompanied by a string description. > > The type is HW-defined, the GuC just forwards it. AFAICT the values are not > guaranteed to be the same across platforms (the Xe and Xe2 lists are > different, see bspec 54047 and 72187), so I don't think we want to maintain > a list in the driver. > Maybe throw a comment a comment in here for bspec links when merging? Matt > Daniele > > > > > Matt > > > + else > > > + xe_gt_dbg(gt, > > > + "Engine memory CAT error: class=%s, logical_mask: 0x%x, guc_id=%d", > > > + xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); > > > trace_xe_exec_queue_memory_cat_error(q); > > > diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c > > > index 3a8751a8b92d..5c45b0f072a4 100644 > > > --- a/drivers/gpu/drm/xe/xe_uc.c > > > +++ b/drivers/gpu/drm/xe/xe_uc.c > > > @@ -165,6 +165,10 @@ static int vf_uc_init_hw(struct xe_uc *uc) > > > uc->guc.submission_state.enabled = true; > > > + err = xe_guc_opt_in_features_enable(&uc->guc); > > > + if (err) > > > + return err; > > > + > > > err = xe_gt_record_default_lrcs(uc_to_gt(uc)); > > > if (err) > > > return err; > > > -- > > > 2.43.0 > > > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [CI 1/2] drm/xe/guc: Enable extended CAT error reporting 2025-06-26 3:18 ` Matthew Brost @ 2025-06-26 3:20 ` Matthew Brost 2025-06-26 16:43 ` Daniele Ceraolo Spurio 0 siblings, 1 reply; 12+ messages in thread From: Matthew Brost @ 2025-06-26 3:20 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-xe On Wed, Jun 25, 2025 at 08:18:58PM -0700, Matthew Brost wrote: > On Wed, Jun 25, 2025 at 05:05:59PM -0700, Daniele Ceraolo Spurio wrote: > > > > > > On 6/25/2025 4:54 PM, Matthew Brost wrote: > > > On Wed, Jun 25, 2025 at 01:54:06PM -0700, Daniele Ceraolo Spurio wrote: > > > > On newer HW (Xe2 onwards + PVC) it is possible to get extra information > > > > when a CAT error occurs, specifically a dword reporting the error type. > > > > To enable this extra reporting, we need to opt-in with the GuC, which is > > > > done via a specific per-VF feature opt-in H2G. > > > > > > > > On platforms where the HW does not support the extra reporting, the GuC > > > > will set the type to 0xdeadbeef, so we can keep the code simple and > > > > opt-in to the feature on every platform and then just discard the data > > > > if it is invalid. > > > > > > > > Note that on native/PF we're guaranteed that the opt in is available > > > > because we don't support any GuC old enough to not have it, but if we're > > > > a VF we might be running on a non-XE PF with an older GuC, so we need to > > > > handle that case. We can re-use the invalid type above to handle this > > > > scenario the same way as if the feature was not supported in HW. > > > > > > > > Given that this patch is the first user of the guc_buf_cache on native > > > > and VF, it also extends that feature to non-PF use-cases. > > > > > > > > v2: simpler print for the error type (John), rebase > > > > v3: use guc_buf_cache instead of new alloc, simpler doc (Michal) > > > > > > > > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > > > > Cc: Nirmoy Das <nirmoy.das@intel.com> > > > > Cc: John Harrison <John.C.Harrison@Intel.com> > > > > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > > > > Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> #v1 > > > > Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> > > > > Reviewed-by: John Harrison <John.C.Harrison@Intel.com> > > > > --- > > > > drivers/gpu/drm/xe/abi/guc_actions_abi.h | 4 ++ > > > > drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 15 +++++++ > > > > drivers/gpu/drm/xe/xe_guc.c | 56 ++++++++++++++++++++++++ > > > > drivers/gpu/drm/xe/xe_guc.h | 1 + > > > > drivers/gpu/drm/xe/xe_guc_submit.c | 16 +++++-- > > > > drivers/gpu/drm/xe/xe_uc.c | 4 ++ > > > > 6 files changed, 93 insertions(+), 3 deletions(-) > > > > > > > > diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h > > > > index ff4f412c28d8..81eb046aeebf 100644 > > > > --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h > > > > +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h > > > > @@ -142,6 +142,7 @@ enum xe_guc_action { > > > > XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A, > > > > XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C, > > > > XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER = 0x550D, > > > > + XE_GUC_ACTION_OPT_IN_FEATURE_KLV = 0x550E, > > > > XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000, > > > > XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002, > > > > XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003, > > > > @@ -271,4 +272,7 @@ enum xe_guc_g2g_type { > > > > #define XE_G2G_DEREGISTER_TILE REG_GENMASK(15, 12) > > > > #define XE_G2G_DEREGISTER_TYPE REG_GENMASK(11, 8) > > > > +/* invalid type for XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR */ > > > > +#define XE_GUC_CAT_ERR_TYPE_INVALID 0xdeadbeef > > > > + > > > > #endif > > > > diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h > > > > index 7de8f827281f..5b2502bec2dc 100644 > > > > --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h > > > > +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h > > > > @@ -16,6 +16,7 @@ > > > > * +===+=======+==============================================================+ > > > > * | 0 | 31:16 | **KEY** - KLV key identifier | > > > > * | | | - `GuC Self Config KLVs`_ | > > > > + * | | | - `GuC Opt In Feature KLVs`_ | > > > > * | | | - `GuC VGT Policy KLVs`_ | > > > > * | | | - `GuC VF Configuration KLVs`_ | > > > > * | | | | > > > > @@ -124,6 +125,20 @@ enum { > > > > GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5, > > > > }; > > > > +/** > > > > + * DOC: GuC Opt In Feature KLVs > > > > + * > > > > + * `GuC KLV`_ keys available for use with OPT_IN_FEATURE_KLV > > > > + * > > > > + * _`GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE` : 0x4001 > > > > + * Adds an extra dword to the XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR G2H > > > > + * containing the type of the CAT error. On HW that does not support > > > > + * reporting the CAT error type, the extra dword is set to 0xdeadbeef. > > > > + */ > > > > + > > > > +#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_KEY 0x4001 > > > > +#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_LEN 0u > > > > + > > > > /** > > > > * DOC: GuC VGT Policy KLVs > > > > * > > > > diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c > > > > index 209e5d53c290..4a7c467ad669 100644 > > > > --- a/drivers/gpu/drm/xe/xe_guc.c > > > > +++ b/drivers/gpu/drm/xe/xe_guc.c > > > > @@ -29,6 +29,7 @@ > > > > #include "xe_guc_db_mgr.h" > > > > #include "xe_guc_engine_activity.h" > > > > #include "xe_guc_hwconfig.h" > > > > +#include "xe_guc_klv_helpers.h" > > > > #include "xe_guc_log.h" > > > > #include "xe_guc_pc.h" > > > > #include "xe_guc_relay.h" > > > > @@ -570,6 +571,57 @@ static int guc_g2g_start(struct xe_guc *guc) > > > > return err; > > > > } > > > > +static int __guc_opt_in_features_enable(struct xe_guc *guc, u64 addr, u32 num_dwords) > > > > +{ > > > > + u32 action[] = { > > > > + XE_GUC_ACTION_OPT_IN_FEATURE_KLV, > > > > + lower_32_bits(addr), > > > > + upper_32_bits(addr), > > > > + num_dwords > > > > + }; > > > > + > > > > + return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action)); > > > > +} > > > > + > > > > +#define OPT_IN_MAX_DWORDS 16 > > > > +int xe_guc_opt_in_features_enable(struct xe_guc *guc) > > > > +{ > > > > + struct xe_device *xe = guc_to_xe(guc); > > > > + CLASS(xe_guc_buf, buf)(&guc->buf, OPT_IN_MAX_DWORDS); > > > > + u32 count = 0; > > > > + u32 *klvs; > > > > + int ret; > > > > + > > > > + if (!xe_guc_buf_is_valid(buf)) > > > > + return -ENOBUFS; > > > > + > > > > + klvs = xe_guc_buf_cpu_ptr(buf); > > > > + > > > > + /* > > > > + * The extra CAT error type opt-in was added in GuC v70.17.0, which maps > > > > + * to compatibility version v1.7.0. > > > > + * Note that the GuC allows enabling this KLV even on platforms that do > > > > + * not support the extra type; in such case the returned type variable > > > > + * will be set to a known invalid value which we can check against. > > > > + */ > > > > + if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 7, 0)) > > > > + klvs[count++] = PREP_GUC_KLV_TAG(OPT_IN_FEATURE_EXT_CAT_ERR_TYPE); > > > > + > > > > + if (count) { > > > > + xe_assert(xe, count <= OPT_IN_MAX_DWORDS); > > > > + > > > > + ret = __guc_opt_in_features_enable(guc, xe_guc_buf_flush(buf), count); > > > > + if (ret < 0) { > > > > + xe_gt_err(guc_to_gt(guc), > > > > + "failed to enable GuC opt-in features: %pe\n", > > > > + ERR_PTR(ret)); > > > > + return ret; > > > > + } > > > > + } > > > > + > > > > + return 0; > > > > +} > > > > + > > > > static void guc_fini_hw(void *arg) > > > > { > > > > struct xe_guc *guc = arg; > > > > @@ -767,6 +819,10 @@ int xe_guc_post_load_init(struct xe_guc *guc) > > > > xe_guc_ads_populate_post_load(&guc->ads); > > > > + ret = xe_guc_opt_in_features_enable(guc); > > > > + if (ret) > > > > + return ret; > > > > + > > > > if (xe_guc_g2g_wanted(guc_to_xe(guc))) { > > > > ret = guc_g2g_start(guc); > > > > if (ret) > > > > diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h > > > > index 58338be44558..4a66575f017d 100644 > > > > --- a/drivers/gpu/drm/xe/xe_guc.h > > > > +++ b/drivers/gpu/drm/xe/xe_guc.h > > > > @@ -33,6 +33,7 @@ int xe_guc_reset(struct xe_guc *guc); > > > > int xe_guc_upload(struct xe_guc *guc); > > > > int xe_guc_min_load_for_hwconfig(struct xe_guc *guc); > > > > int xe_guc_enable_communication(struct xe_guc *guc); > > > > +int xe_guc_opt_in_features_enable(struct xe_guc *guc); > > > > int xe_guc_suspend(struct xe_guc *guc); > > > > void xe_guc_notify(struct xe_guc *guc); > > > > int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr); > > > > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c > > > > index 26c6c71dc91a..32548c931615 100644 > > > > --- a/drivers/gpu/drm/xe/xe_guc_submit.c > > > > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c > > > > @@ -2103,12 +2103,16 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, > > > > struct xe_gt *gt = guc_to_gt(guc); > > > > struct xe_exec_queue *q; > > > > u32 guc_id; > > > > + u32 type = XE_GUC_CAT_ERR_TYPE_INVALID; > > > > - if (unlikely(len < 1)) > > > > + if (unlikely(!len || len > 2)) > > > > return -EPROTO; > > > > guc_id = msg[0]; > > > > + if (len == 2) > > > > + type = msg[1]; > > > > + > > > > if (guc_id == GUC_ID_UNKNOWN) { > > > > /* > > > > * GuC uses GUC_ID_UNKNOWN if it can not map the CAT fault to any PF/VF > > > > @@ -2122,8 +2126,14 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, > > > > if (unlikely(!q)) > > > > return -EPROTO; > > > > - xe_gt_dbg(gt, "Engine memory cat error: engine_class=%s, logical_mask: 0x%x, guc_id=%d", > > > > - xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); > > > > + if (type != XE_GUC_CAT_ERR_TYPE_INVALID) > > > > + xe_gt_dbg(gt, > > > > + "Engine memory CAT error [%u]: class=%s, logical_mask: 0x%x, guc_id=%d", > > > > + type, xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); > > > Do we define the type anywhere - I only see XE_GUC_CAT_ERR_TYPE_INVALID. > > > > > > It would be useful if we had this defined somewhere in KMD headers or > > > even more useful if type was accompanied by a string description. > > > > The type is HW-defined, the GuC just forwards it. AFAICT the values are not > > guaranteed to be the same across platforms (the Xe and Xe2 lists are > > different, see bspec 54047 and 72187), so I don't think we want to maintain > > a list in the driver. > > > > Maybe throw a comment a comment in here for bspec links when merging? > s/bspec links/bspec refs/ Matt > Matt > > > Daniele > > > > > > > > Matt > > > > + else > > > > + xe_gt_dbg(gt, > > > > + "Engine memory CAT error: class=%s, logical_mask: 0x%x, guc_id=%d", > > > > + xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); > > > > trace_xe_exec_queue_memory_cat_error(q); > > > > diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c > > > > index 3a8751a8b92d..5c45b0f072a4 100644 > > > > --- a/drivers/gpu/drm/xe/xe_uc.c > > > > +++ b/drivers/gpu/drm/xe/xe_uc.c > > > > @@ -165,6 +165,10 @@ static int vf_uc_init_hw(struct xe_uc *uc) > > > > uc->guc.submission_state.enabled = true; > > > > + err = xe_guc_opt_in_features_enable(&uc->guc); > > > > + if (err) > > > > + return err; > > > > + > > > > err = xe_gt_record_default_lrcs(uc_to_gt(uc)); > > > > if (err) > > > > return err; > > > > -- > > > > 2.43.0 > > > > > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [CI 1/2] drm/xe/guc: Enable extended CAT error reporting 2025-06-26 3:20 ` Matthew Brost @ 2025-06-26 16:43 ` Daniele Ceraolo Spurio 2025-06-26 16:46 ` Matthew Brost 0 siblings, 1 reply; 12+ messages in thread From: Daniele Ceraolo Spurio @ 2025-06-26 16:43 UTC (permalink / raw) To: Matthew Brost; +Cc: intel-xe On 6/25/2025 8:20 PM, Matthew Brost wrote: > On Wed, Jun 25, 2025 at 08:18:58PM -0700, Matthew Brost wrote: >> On Wed, Jun 25, 2025 at 05:05:59PM -0700, Daniele Ceraolo Spurio wrote: >>> >>> On 6/25/2025 4:54 PM, Matthew Brost wrote: >>>> On Wed, Jun 25, 2025 at 01:54:06PM -0700, Daniele Ceraolo Spurio wrote: >>>>> On newer HW (Xe2 onwards + PVC) it is possible to get extra information >>>>> when a CAT error occurs, specifically a dword reporting the error type. >>>>> To enable this extra reporting, we need to opt-in with the GuC, which is >>>>> done via a specific per-VF feature opt-in H2G. >>>>> >>>>> On platforms where the HW does not support the extra reporting, the GuC >>>>> will set the type to 0xdeadbeef, so we can keep the code simple and >>>>> opt-in to the feature on every platform and then just discard the data >>>>> if it is invalid. >>>>> >>>>> Note that on native/PF we're guaranteed that the opt in is available >>>>> because we don't support any GuC old enough to not have it, but if we're >>>>> a VF we might be running on a non-XE PF with an older GuC, so we need to >>>>> handle that case. We can re-use the invalid type above to handle this >>>>> scenario the same way as if the feature was not supported in HW. >>>>> >>>>> Given that this patch is the first user of the guc_buf_cache on native >>>>> and VF, it also extends that feature to non-PF use-cases. >>>>> >>>>> v2: simpler print for the error type (John), rebase >>>>> v3: use guc_buf_cache instead of new alloc, simpler doc (Michal) >>>>> >>>>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> >>>>> Cc: Nirmoy Das <nirmoy.das@intel.com> >>>>> Cc: John Harrison <John.C.Harrison@Intel.com> >>>>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> >>>>> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> #v1 >>>>> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> >>>>> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> >>>>> --- >>>>> drivers/gpu/drm/xe/abi/guc_actions_abi.h | 4 ++ >>>>> drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 15 +++++++ >>>>> drivers/gpu/drm/xe/xe_guc.c | 56 ++++++++++++++++++++++++ >>>>> drivers/gpu/drm/xe/xe_guc.h | 1 + >>>>> drivers/gpu/drm/xe/xe_guc_submit.c | 16 +++++-- >>>>> drivers/gpu/drm/xe/xe_uc.c | 4 ++ >>>>> 6 files changed, 93 insertions(+), 3 deletions(-) >>>>> >>>>> diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h >>>>> index ff4f412c28d8..81eb046aeebf 100644 >>>>> --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h >>>>> +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h >>>>> @@ -142,6 +142,7 @@ enum xe_guc_action { >>>>> XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A, >>>>> XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C, >>>>> XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER = 0x550D, >>>>> + XE_GUC_ACTION_OPT_IN_FEATURE_KLV = 0x550E, >>>>> XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000, >>>>> XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002, >>>>> XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003, >>>>> @@ -271,4 +272,7 @@ enum xe_guc_g2g_type { >>>>> #define XE_G2G_DEREGISTER_TILE REG_GENMASK(15, 12) >>>>> #define XE_G2G_DEREGISTER_TYPE REG_GENMASK(11, 8) >>>>> +/* invalid type for XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR */ >>>>> +#define XE_GUC_CAT_ERR_TYPE_INVALID 0xdeadbeef >>>>> + >>>>> #endif >>>>> diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h >>>>> index 7de8f827281f..5b2502bec2dc 100644 >>>>> --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h >>>>> +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h >>>>> @@ -16,6 +16,7 @@ >>>>> * +===+=======+==============================================================+ >>>>> * | 0 | 31:16 | **KEY** - KLV key identifier | >>>>> * | | | - `GuC Self Config KLVs`_ | >>>>> + * | | | - `GuC Opt In Feature KLVs`_ | >>>>> * | | | - `GuC VGT Policy KLVs`_ | >>>>> * | | | - `GuC VF Configuration KLVs`_ | >>>>> * | | | | >>>>> @@ -124,6 +125,20 @@ enum { >>>>> GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5, >>>>> }; >>>>> +/** >>>>> + * DOC: GuC Opt In Feature KLVs >>>>> + * >>>>> + * `GuC KLV`_ keys available for use with OPT_IN_FEATURE_KLV >>>>> + * >>>>> + * _`GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE` : 0x4001 >>>>> + * Adds an extra dword to the XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR G2H >>>>> + * containing the type of the CAT error. On HW that does not support >>>>> + * reporting the CAT error type, the extra dword is set to 0xdeadbeef. >>>>> + */ >>>>> + >>>>> +#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_KEY 0x4001 >>>>> +#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_LEN 0u >>>>> + >>>>> /** >>>>> * DOC: GuC VGT Policy KLVs >>>>> * >>>>> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c >>>>> index 209e5d53c290..4a7c467ad669 100644 >>>>> --- a/drivers/gpu/drm/xe/xe_guc.c >>>>> +++ b/drivers/gpu/drm/xe/xe_guc.c >>>>> @@ -29,6 +29,7 @@ >>>>> #include "xe_guc_db_mgr.h" >>>>> #include "xe_guc_engine_activity.h" >>>>> #include "xe_guc_hwconfig.h" >>>>> +#include "xe_guc_klv_helpers.h" >>>>> #include "xe_guc_log.h" >>>>> #include "xe_guc_pc.h" >>>>> #include "xe_guc_relay.h" >>>>> @@ -570,6 +571,57 @@ static int guc_g2g_start(struct xe_guc *guc) >>>>> return err; >>>>> } >>>>> +static int __guc_opt_in_features_enable(struct xe_guc *guc, u64 addr, u32 num_dwords) >>>>> +{ >>>>> + u32 action[] = { >>>>> + XE_GUC_ACTION_OPT_IN_FEATURE_KLV, >>>>> + lower_32_bits(addr), >>>>> + upper_32_bits(addr), >>>>> + num_dwords >>>>> + }; >>>>> + >>>>> + return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action)); >>>>> +} >>>>> + >>>>> +#define OPT_IN_MAX_DWORDS 16 >>>>> +int xe_guc_opt_in_features_enable(struct xe_guc *guc) >>>>> +{ >>>>> + struct xe_device *xe = guc_to_xe(guc); >>>>> + CLASS(xe_guc_buf, buf)(&guc->buf, OPT_IN_MAX_DWORDS); >>>>> + u32 count = 0; >>>>> + u32 *klvs; >>>>> + int ret; >>>>> + >>>>> + if (!xe_guc_buf_is_valid(buf)) >>>>> + return -ENOBUFS; >>>>> + >>>>> + klvs = xe_guc_buf_cpu_ptr(buf); >>>>> + >>>>> + /* >>>>> + * The extra CAT error type opt-in was added in GuC v70.17.0, which maps >>>>> + * to compatibility version v1.7.0. >>>>> + * Note that the GuC allows enabling this KLV even on platforms that do >>>>> + * not support the extra type; in such case the returned type variable >>>>> + * will be set to a known invalid value which we can check against. >>>>> + */ >>>>> + if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 7, 0)) >>>>> + klvs[count++] = PREP_GUC_KLV_TAG(OPT_IN_FEATURE_EXT_CAT_ERR_TYPE); >>>>> + >>>>> + if (count) { >>>>> + xe_assert(xe, count <= OPT_IN_MAX_DWORDS); >>>>> + >>>>> + ret = __guc_opt_in_features_enable(guc, xe_guc_buf_flush(buf), count); >>>>> + if (ret < 0) { >>>>> + xe_gt_err(guc_to_gt(guc), >>>>> + "failed to enable GuC opt-in features: %pe\n", >>>>> + ERR_PTR(ret)); >>>>> + return ret; >>>>> + } >>>>> + } >>>>> + >>>>> + return 0; >>>>> +} >>>>> + >>>>> static void guc_fini_hw(void *arg) >>>>> { >>>>> struct xe_guc *guc = arg; >>>>> @@ -767,6 +819,10 @@ int xe_guc_post_load_init(struct xe_guc *guc) >>>>> xe_guc_ads_populate_post_load(&guc->ads); >>>>> + ret = xe_guc_opt_in_features_enable(guc); >>>>> + if (ret) >>>>> + return ret; >>>>> + >>>>> if (xe_guc_g2g_wanted(guc_to_xe(guc))) { >>>>> ret = guc_g2g_start(guc); >>>>> if (ret) >>>>> diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h >>>>> index 58338be44558..4a66575f017d 100644 >>>>> --- a/drivers/gpu/drm/xe/xe_guc.h >>>>> +++ b/drivers/gpu/drm/xe/xe_guc.h >>>>> @@ -33,6 +33,7 @@ int xe_guc_reset(struct xe_guc *guc); >>>>> int xe_guc_upload(struct xe_guc *guc); >>>>> int xe_guc_min_load_for_hwconfig(struct xe_guc *guc); >>>>> int xe_guc_enable_communication(struct xe_guc *guc); >>>>> +int xe_guc_opt_in_features_enable(struct xe_guc *guc); >>>>> int xe_guc_suspend(struct xe_guc *guc); >>>>> void xe_guc_notify(struct xe_guc *guc); >>>>> int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr); >>>>> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c >>>>> index 26c6c71dc91a..32548c931615 100644 >>>>> --- a/drivers/gpu/drm/xe/xe_guc_submit.c >>>>> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c >>>>> @@ -2103,12 +2103,16 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, >>>>> struct xe_gt *gt = guc_to_gt(guc); >>>>> struct xe_exec_queue *q; >>>>> u32 guc_id; >>>>> + u32 type = XE_GUC_CAT_ERR_TYPE_INVALID; >>>>> - if (unlikely(len < 1)) >>>>> + if (unlikely(!len || len > 2)) >>>>> return -EPROTO; >>>>> guc_id = msg[0]; >>>>> + if (len == 2) >>>>> + type = msg[1]; >>>>> + >>>>> if (guc_id == GUC_ID_UNKNOWN) { >>>>> /* >>>>> * GuC uses GUC_ID_UNKNOWN if it can not map the CAT fault to any PF/VF >>>>> @@ -2122,8 +2126,14 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, >>>>> if (unlikely(!q)) >>>>> return -EPROTO; >>>>> - xe_gt_dbg(gt, "Engine memory cat error: engine_class=%s, logical_mask: 0x%x, guc_id=%d", >>>>> - xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); >>>>> + if (type != XE_GUC_CAT_ERR_TYPE_INVALID) >>>>> + xe_gt_dbg(gt, >>>>> + "Engine memory CAT error [%u]: class=%s, logical_mask: 0x%x, guc_id=%d", >>>>> + type, xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); >>>> Do we define the type anywhere - I only see XE_GUC_CAT_ERR_TYPE_INVALID. >>>> >>>> It would be useful if we had this defined somewhere in KMD headers or >>>> even more useful if type was accompanied by a string description. >>> The type is HW-defined, the GuC just forwards it. AFAICT the values are not >>> guaranteed to be the same across platforms (the Xe and Xe2 lists are >>> different, see bspec 54047 and 72187), so I don't think we want to maintain >>> a list in the driver. >>> >> Maybe throw a comment a comment in here for bspec links when merging? >> > s/bspec links/bspec refs/ Would this work for you: "The type is HW-defined and changes based on platform, so we don't decode it in the kernel and only check if it is valid. See bspec 54047 and 72187 for details" I'd put it above the check for "type != XE_GUC_CAT_ERR_TYPE_INVALID" Daniele > > Matt > >> Matt >> >>> Daniele >>> >>>> Matt >>>>> + else >>>>> + xe_gt_dbg(gt, >>>>> + "Engine memory CAT error: class=%s, logical_mask: 0x%x, guc_id=%d", >>>>> + xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); >>>>> trace_xe_exec_queue_memory_cat_error(q); >>>>> diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c >>>>> index 3a8751a8b92d..5c45b0f072a4 100644 >>>>> --- a/drivers/gpu/drm/xe/xe_uc.c >>>>> +++ b/drivers/gpu/drm/xe/xe_uc.c >>>>> @@ -165,6 +165,10 @@ static int vf_uc_init_hw(struct xe_uc *uc) >>>>> uc->guc.submission_state.enabled = true; >>>>> + err = xe_guc_opt_in_features_enable(&uc->guc); >>>>> + if (err) >>>>> + return err; >>>>> + >>>>> err = xe_gt_record_default_lrcs(uc_to_gt(uc)); >>>>> if (err) >>>>> return err; >>>>> -- >>>>> 2.43.0 >>>>> ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [CI 1/2] drm/xe/guc: Enable extended CAT error reporting 2025-06-26 16:43 ` Daniele Ceraolo Spurio @ 2025-06-26 16:46 ` Matthew Brost 0 siblings, 0 replies; 12+ messages in thread From: Matthew Brost @ 2025-06-26 16:46 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-xe On Thu, Jun 26, 2025 at 09:43:21AM -0700, Daniele Ceraolo Spurio wrote: > > > On 6/25/2025 8:20 PM, Matthew Brost wrote: > > On Wed, Jun 25, 2025 at 08:18:58PM -0700, Matthew Brost wrote: > > > On Wed, Jun 25, 2025 at 05:05:59PM -0700, Daniele Ceraolo Spurio wrote: > > > > > > > > On 6/25/2025 4:54 PM, Matthew Brost wrote: > > > > > On Wed, Jun 25, 2025 at 01:54:06PM -0700, Daniele Ceraolo Spurio wrote: > > > > > > On newer HW (Xe2 onwards + PVC) it is possible to get extra information > > > > > > when a CAT error occurs, specifically a dword reporting the error type. > > > > > > To enable this extra reporting, we need to opt-in with the GuC, which is > > > > > > done via a specific per-VF feature opt-in H2G. > > > > > > > > > > > > On platforms where the HW does not support the extra reporting, the GuC > > > > > > will set the type to 0xdeadbeef, so we can keep the code simple and > > > > > > opt-in to the feature on every platform and then just discard the data > > > > > > if it is invalid. > > > > > > > > > > > > Note that on native/PF we're guaranteed that the opt in is available > > > > > > because we don't support any GuC old enough to not have it, but if we're > > > > > > a VF we might be running on a non-XE PF with an older GuC, so we need to > > > > > > handle that case. We can re-use the invalid type above to handle this > > > > > > scenario the same way as if the feature was not supported in HW. > > > > > > > > > > > > Given that this patch is the first user of the guc_buf_cache on native > > > > > > and VF, it also extends that feature to non-PF use-cases. > > > > > > > > > > > > v2: simpler print for the error type (John), rebase > > > > > > v3: use guc_buf_cache instead of new alloc, simpler doc (Michal) > > > > > > > > > > > > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > > > > > > Cc: Nirmoy Das <nirmoy.das@intel.com> > > > > > > Cc: John Harrison <John.C.Harrison@Intel.com> > > > > > > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > > > > > > Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> #v1 > > > > > > Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> > > > > > > Reviewed-by: John Harrison <John.C.Harrison@Intel.com> > > > > > > --- > > > > > > drivers/gpu/drm/xe/abi/guc_actions_abi.h | 4 ++ > > > > > > drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 15 +++++++ > > > > > > drivers/gpu/drm/xe/xe_guc.c | 56 ++++++++++++++++++++++++ > > > > > > drivers/gpu/drm/xe/xe_guc.h | 1 + > > > > > > drivers/gpu/drm/xe/xe_guc_submit.c | 16 +++++-- > > > > > > drivers/gpu/drm/xe/xe_uc.c | 4 ++ > > > > > > 6 files changed, 93 insertions(+), 3 deletions(-) > > > > > > > > > > > > diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h > > > > > > index ff4f412c28d8..81eb046aeebf 100644 > > > > > > --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h > > > > > > +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h > > > > > > @@ -142,6 +142,7 @@ enum xe_guc_action { > > > > > > XE_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A, > > > > > > XE_GUC_ACTION_SET_DEVICE_ENGINE_ACTIVITY_BUFFER = 0x550C, > > > > > > XE_GUC_ACTION_SET_FUNCTION_ENGINE_ACTIVITY_BUFFER = 0x550D, > > > > > > + XE_GUC_ACTION_OPT_IN_FEATURE_KLV = 0x550E, > > > > > > XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR = 0x6000, > > > > > > XE_GUC_ACTION_REPORT_PAGE_FAULT_REQ_DESC = 0x6002, > > > > > > XE_GUC_ACTION_PAGE_FAULT_RES_DESC = 0x6003, > > > > > > @@ -271,4 +272,7 @@ enum xe_guc_g2g_type { > > > > > > #define XE_G2G_DEREGISTER_TILE REG_GENMASK(15, 12) > > > > > > #define XE_G2G_DEREGISTER_TYPE REG_GENMASK(11, 8) > > > > > > +/* invalid type for XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR */ > > > > > > +#define XE_GUC_CAT_ERR_TYPE_INVALID 0xdeadbeef > > > > > > + > > > > > > #endif > > > > > > diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h > > > > > > index 7de8f827281f..5b2502bec2dc 100644 > > > > > > --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h > > > > > > +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h > > > > > > @@ -16,6 +16,7 @@ > > > > > > * +===+=======+==============================================================+ > > > > > > * | 0 | 31:16 | **KEY** - KLV key identifier | > > > > > > * | | | - `GuC Self Config KLVs`_ | > > > > > > + * | | | - `GuC Opt In Feature KLVs`_ | > > > > > > * | | | - `GuC VGT Policy KLVs`_ | > > > > > > * | | | - `GuC VF Configuration KLVs`_ | > > > > > > * | | | | > > > > > > @@ -124,6 +125,20 @@ enum { > > > > > > GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5, > > > > > > }; > > > > > > +/** > > > > > > + * DOC: GuC Opt In Feature KLVs > > > > > > + * > > > > > > + * `GuC KLV`_ keys available for use with OPT_IN_FEATURE_KLV > > > > > > + * > > > > > > + * _`GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE` : 0x4001 > > > > > > + * Adds an extra dword to the XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR G2H > > > > > > + * containing the type of the CAT error. On HW that does not support > > > > > > + * reporting the CAT error type, the extra dword is set to 0xdeadbeef. > > > > > > + */ > > > > > > + > > > > > > +#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_KEY 0x4001 > > > > > > +#define GUC_KLV_OPT_IN_FEATURE_EXT_CAT_ERR_TYPE_LEN 0u > > > > > > + > > > > > > /** > > > > > > * DOC: GuC VGT Policy KLVs > > > > > > * > > > > > > diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c > > > > > > index 209e5d53c290..4a7c467ad669 100644 > > > > > > --- a/drivers/gpu/drm/xe/xe_guc.c > > > > > > +++ b/drivers/gpu/drm/xe/xe_guc.c > > > > > > @@ -29,6 +29,7 @@ > > > > > > #include "xe_guc_db_mgr.h" > > > > > > #include "xe_guc_engine_activity.h" > > > > > > #include "xe_guc_hwconfig.h" > > > > > > +#include "xe_guc_klv_helpers.h" > > > > > > #include "xe_guc_log.h" > > > > > > #include "xe_guc_pc.h" > > > > > > #include "xe_guc_relay.h" > > > > > > @@ -570,6 +571,57 @@ static int guc_g2g_start(struct xe_guc *guc) > > > > > > return err; > > > > > > } > > > > > > +static int __guc_opt_in_features_enable(struct xe_guc *guc, u64 addr, u32 num_dwords) > > > > > > +{ > > > > > > + u32 action[] = { > > > > > > + XE_GUC_ACTION_OPT_IN_FEATURE_KLV, > > > > > > + lower_32_bits(addr), > > > > > > + upper_32_bits(addr), > > > > > > + num_dwords > > > > > > + }; > > > > > > + > > > > > > + return xe_guc_ct_send_block(&guc->ct, action, ARRAY_SIZE(action)); > > > > > > +} > > > > > > + > > > > > > +#define OPT_IN_MAX_DWORDS 16 > > > > > > +int xe_guc_opt_in_features_enable(struct xe_guc *guc) > > > > > > +{ > > > > > > + struct xe_device *xe = guc_to_xe(guc); > > > > > > + CLASS(xe_guc_buf, buf)(&guc->buf, OPT_IN_MAX_DWORDS); > > > > > > + u32 count = 0; > > > > > > + u32 *klvs; > > > > > > + int ret; > > > > > > + > > > > > > + if (!xe_guc_buf_is_valid(buf)) > > > > > > + return -ENOBUFS; > > > > > > + > > > > > > + klvs = xe_guc_buf_cpu_ptr(buf); > > > > > > + > > > > > > + /* > > > > > > + * The extra CAT error type opt-in was added in GuC v70.17.0, which maps > > > > > > + * to compatibility version v1.7.0. > > > > > > + * Note that the GuC allows enabling this KLV even on platforms that do > > > > > > + * not support the extra type; in such case the returned type variable > > > > > > + * will be set to a known invalid value which we can check against. > > > > > > + */ > > > > > > + if (GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 7, 0)) > > > > > > + klvs[count++] = PREP_GUC_KLV_TAG(OPT_IN_FEATURE_EXT_CAT_ERR_TYPE); > > > > > > + > > > > > > + if (count) { > > > > > > + xe_assert(xe, count <= OPT_IN_MAX_DWORDS); > > > > > > + > > > > > > + ret = __guc_opt_in_features_enable(guc, xe_guc_buf_flush(buf), count); > > > > > > + if (ret < 0) { > > > > > > + xe_gt_err(guc_to_gt(guc), > > > > > > + "failed to enable GuC opt-in features: %pe\n", > > > > > > + ERR_PTR(ret)); > > > > > > + return ret; > > > > > > + } > > > > > > + } > > > > > > + > > > > > > + return 0; > > > > > > +} > > > > > > + > > > > > > static void guc_fini_hw(void *arg) > > > > > > { > > > > > > struct xe_guc *guc = arg; > > > > > > @@ -767,6 +819,10 @@ int xe_guc_post_load_init(struct xe_guc *guc) > > > > > > xe_guc_ads_populate_post_load(&guc->ads); > > > > > > + ret = xe_guc_opt_in_features_enable(guc); > > > > > > + if (ret) > > > > > > + return ret; > > > > > > + > > > > > > if (xe_guc_g2g_wanted(guc_to_xe(guc))) { > > > > > > ret = guc_g2g_start(guc); > > > > > > if (ret) > > > > > > diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h > > > > > > index 58338be44558..4a66575f017d 100644 > > > > > > --- a/drivers/gpu/drm/xe/xe_guc.h > > > > > > +++ b/drivers/gpu/drm/xe/xe_guc.h > > > > > > @@ -33,6 +33,7 @@ int xe_guc_reset(struct xe_guc *guc); > > > > > > int xe_guc_upload(struct xe_guc *guc); > > > > > > int xe_guc_min_load_for_hwconfig(struct xe_guc *guc); > > > > > > int xe_guc_enable_communication(struct xe_guc *guc); > > > > > > +int xe_guc_opt_in_features_enable(struct xe_guc *guc); > > > > > > int xe_guc_suspend(struct xe_guc *guc); > > > > > > void xe_guc_notify(struct xe_guc *guc); > > > > > > int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr); > > > > > > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c > > > > > > index 26c6c71dc91a..32548c931615 100644 > > > > > > --- a/drivers/gpu/drm/xe/xe_guc_submit.c > > > > > > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c > > > > > > @@ -2103,12 +2103,16 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, > > > > > > struct xe_gt *gt = guc_to_gt(guc); > > > > > > struct xe_exec_queue *q; > > > > > > u32 guc_id; > > > > > > + u32 type = XE_GUC_CAT_ERR_TYPE_INVALID; > > > > > > - if (unlikely(len < 1)) > > > > > > + if (unlikely(!len || len > 2)) > > > > > > return -EPROTO; > > > > > > guc_id = msg[0]; > > > > > > + if (len == 2) > > > > > > + type = msg[1]; > > > > > > + > > > > > > if (guc_id == GUC_ID_UNKNOWN) { > > > > > > /* > > > > > > * GuC uses GUC_ID_UNKNOWN if it can not map the CAT fault to any PF/VF > > > > > > @@ -2122,8 +2126,14 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, > > > > > > if (unlikely(!q)) > > > > > > return -EPROTO; > > > > > > - xe_gt_dbg(gt, "Engine memory cat error: engine_class=%s, logical_mask: 0x%x, guc_id=%d", > > > > > > - xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); > > > > > > + if (type != XE_GUC_CAT_ERR_TYPE_INVALID) > > > > > > + xe_gt_dbg(gt, > > > > > > + "Engine memory CAT error [%u]: class=%s, logical_mask: 0x%x, guc_id=%d", > > > > > > + type, xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); > > > > > Do we define the type anywhere - I only see XE_GUC_CAT_ERR_TYPE_INVALID. > > > > > > > > > > It would be useful if we had this defined somewhere in KMD headers or > > > > > even more useful if type was accompanied by a string description. > > > > The type is HW-defined, the GuC just forwards it. AFAICT the values are not > > > > guaranteed to be the same across platforms (the Xe and Xe2 lists are > > > > different, see bspec 54047 and 72187), so I don't think we want to maintain > > > > a list in the driver. > > > > > > > Maybe throw a comment a comment in here for bspec links when merging? > > > > > s/bspec links/bspec refs/ > > Would this work for you: > > "The type is HW-defined and changes based on platform, so we don't decode it > in the kernel and only check if it is valid. > See bspec 54047 and 72187 for details" > This looks good. Thanks. Matt > I'd put it above the check for "type != XE_GUC_CAT_ERR_TYPE_INVALID" > > Daniele > > > > > Matt > > > > > Matt > > > > > > > Daniele > > > > > > > > > Matt > > > > > > + else > > > > > > + xe_gt_dbg(gt, > > > > > > + "Engine memory CAT error: class=%s, logical_mask: 0x%x, guc_id=%d", > > > > > > + xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); > > > > > > trace_xe_exec_queue_memory_cat_error(q); > > > > > > diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c > > > > > > index 3a8751a8b92d..5c45b0f072a4 100644 > > > > > > --- a/drivers/gpu/drm/xe/xe_uc.c > > > > > > +++ b/drivers/gpu/drm/xe/xe_uc.c > > > > > > @@ -165,6 +165,10 @@ static int vf_uc_init_hw(struct xe_uc *uc) > > > > > > uc->guc.submission_state.enabled = true; > > > > > > + err = xe_guc_opt_in_features_enable(&uc->guc); > > > > > > + if (err) > > > > > > + return err; > > > > > > + > > > > > > err = xe_gt_record_default_lrcs(uc_to_gt(uc)); > > > > > > if (err) > > > > > > return err; > > > > > > -- > > > > > > 2.43.0 > > > > > > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Xe.CI.Full: failure for series starting with [CI,1/2] drm/xe/guc: Enable extended CAT error reporting 2025-06-25 20:54 [CI 1/2] drm/xe/guc: Enable extended CAT error reporting Daniele Ceraolo Spurio ` (4 preceding siblings ...) 2025-06-25 23:54 ` [CI 1/2] " Matthew Brost @ 2025-06-27 2:22 ` Patchwork 5 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2025-06-27 2:22 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 37148 bytes --] == Series Details == Series: series starting with [CI,1/2] drm/xe/guc: Enable extended CAT error reporting URL : https://patchwork.freedesktop.org/series/150785/ State : failure == Summary == CI Bug Log - changes from xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73_FULL -> xe-pw-150785v1_FULL ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with xe-pw-150785v1_FULL absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in xe-pw-150785v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in xe-pw-150785v1_FULL: ### IGT changes ### #### Possible regressions #### * igt@kms_pipe_stress@stress-xrgb8888-untiled: - shard-bmg: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-1/igt@kms_pipe_stress@stress-xrgb8888-untiled.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-4/igt@kms_pipe_stress@stress-xrgb8888-untiled.html New tests --------- New tests have been introduced between xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73_FULL and xe-pw-150785v1_FULL: ### New IGT tests (22) ### * igt@kms_bw@connected-linear-tiling-1-displays-1920x1080p: - Statuses : 4 pass(s) - Exec time: [0.23, 0.49] s * igt@kms_bw@connected-linear-tiling-1-displays-2160x1440p: - Statuses : 4 pass(s) - Exec time: [0.21, 0.49] s * igt@kms_bw@connected-linear-tiling-1-displays-2560x1440p: - Statuses : 4 pass(s) - Exec time: [0.22, 0.52] s * igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p: - Statuses : 3 pass(s) 1 skip(s) - Exec time: [0.02, 0.48] s * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p: - Statuses : 1 pass(s) 3 skip(s) - Exec time: [0.0, 0.50] s * igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p: - Statuses : 2 pass(s) 2 skip(s) - Exec time: [0.0, 0.52] s * igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p: - Statuses : - Exec time: [None] s * igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p: - Statuses : 1 pass(s) 3 skip(s) - Exec time: [0.0, 0.52] s * igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p: - Statuses : 3 skip(s) - Exec time: [0.0] s * igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p: - Statuses : 3 skip(s) - Exec time: [0.0, 0.00] s * igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p: - Statuses : 4 skip(s) - Exec time: [0.0, 0.00] s * igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p: - Statuses : 4 skip(s) - Exec time: [0.0, 0.00] s * igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p: - Statuses : 4 skip(s) - Exec time: [0.0, 0.00] s * igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p: - Statuses : 4 skip(s) - Exec time: [0.0, 0.00] s * igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p: - Statuses : 3 skip(s) - Exec time: [0.0] s * igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p: - Statuses : 3 skip(s) - Exec time: [0.0] s * igt@kms_cursor_crc@cursor-dpms@pipe-a-hdmi-a-2: - Statuses : 1 pass(s) - Exec time: [1.19] s * igt@kms_cursor_crc@cursor-dpms@pipe-d-hdmi-a-2: - Statuses : 1 pass(s) - Exec time: [0.90] s * igt@kms_plane_lowres@tiling-4@pipe-a-dp-4: - Statuses : 1 pass(s) - Exec time: [9.46] s * igt@kms_plane_lowres@tiling-4@pipe-b-dp-4: - Statuses : 1 pass(s) - Exec time: [9.31] s * igt@kms_plane_lowres@tiling-4@pipe-c-dp-4: - Statuses : 1 pass(s) - Exec time: [9.32] s * igt@kms_plane_lowres@tiling-4@pipe-d-dp-4: - Statuses : 1 pass(s) - Exec time: [9.38] s Known issues ------------ Here are the changes found in xe-pw-150785v1_FULL that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1: - shard-adlp: [PASS][3] -> [FAIL][4] ([Intel XE#3908]) +1 other test fail [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-adlp-8/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-adlp-3/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html * igt@kms_big_fb@linear-8bpp-rotate-270: - shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#2327]) +1 other test skip [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@kms_big_fb@linear-8bpp-rotate-270.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip: - shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#1124]) +2 other tests skip [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html * igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p (NEW): - shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2314] / [Intel XE#2894]) [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html * igt@kms_ccs@crc-primary-basic-yf-tiled-ccs: - shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#2887]) +1 other test skip [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_ccs@crc-primary-basic-yf-tiled-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs: - shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#3432]) [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3: - shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-d-dp-2: - shard-dg2-set2: NOTRUN -> [SKIP][11] ([Intel XE#455] / [Intel XE#787]) +11 other tests skip [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-dg2-432/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-d-dp-2.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs: - shard-dg2-set2: [PASS][12] -> [INCOMPLETE][13] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6: - shard-dg2-set2: NOTRUN -> [INCOMPLETE][14] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4: - shard-dg2-set2: NOTRUN -> [INCOMPLETE][15] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4.html * igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-b-dp-4: - shard-dg2-set2: NOTRUN -> [SKIP][16] ([Intel XE#787]) +83 other tests skip [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-b-dp-4.html * igt@kms_chamelium_frames@vga-frame-dump: - shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#2252]) +1 other test skip [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_chamelium_frames@vga-frame-dump.html * igt@kms_content_protection@atomic-dpms@pipe-a-dp-2: - shard-dg2-set2: NOTRUN -> [FAIL][18] ([Intel XE#1178]) [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-dg2-432/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html * igt@kms_cursor_crc@cursor-offscreen-max-size: - shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2320]) [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_cursor_crc@cursor-offscreen-max-size.html * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic: - shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2291]) [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle: - shard-bmg: [PASS][21] -> [SKIP][22] ([Intel XE#2291]) +1 other test skip [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html * igt@kms_cursor_legacy@flip-vs-cursor-legacy: - shard-bmg: [PASS][23] -> [FAIL][24] ([Intel XE#4633]) [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-3/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html * igt@kms_dp_aux_dev: - shard-bmg: [PASS][25] -> [SKIP][26] ([Intel XE#3009]) [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-7/igt@kms_dp_aux_dev.html [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_dp_aux_dev.html * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area: - shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#4422]) [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible: - shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#2316]) [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html * igt@kms_flip@2x-flip-vs-suspend@ac-dp2-hdmi-a3: - shard-bmg: [PASS][29] -> [DMESG-WARN][30] ([Intel XE#3428]) +1 other test dmesg-warn [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-1/igt@kms_flip@2x-flip-vs-suspend@ac-dp2-hdmi-a3.html [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-4/igt@kms_flip@2x-flip-vs-suspend@ac-dp2-hdmi-a3.html * igt@kms_flip@2x-modeset-vs-vblank-race: - shard-bmg: [PASS][31] -> [SKIP][32] ([Intel XE#2316]) +4 other tests skip [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-7/igt@kms_flip@2x-modeset-vs-vblank-race.html [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_flip@2x-modeset-vs-vblank-race.html * igt@kms_flip@flip-vs-dpms-on-nop@b-hdmi-a1: - shard-adlp: [PASS][33] -> [DMESG-WARN][34] ([Intel XE#4543]) +5 other tests dmesg-warn [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-adlp-4/igt@kms_flip@flip-vs-dpms-on-nop@b-hdmi-a1.html [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-adlp-2/igt@kms_flip@flip-vs-dpms-on-nop@b-hdmi-a1.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1: - shard-lnl: [PASS][35] -> [FAIL][36] ([Intel XE#301]) +1 other test fail [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html * igt@kms_flip@flip-vs-suspend@b-hdmi-a1: - shard-adlp: [PASS][37] -> [DMESG-WARN][38] ([Intel XE#2953] / [Intel XE#4173]) +3 other tests dmesg-warn [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-adlp-2/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-adlp-6/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html * igt@kms_force_connector_basic@force-connector-state: - shard-adlp: [PASS][39] -> [ABORT][40] ([Intel XE#2953]) [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-adlp-4/igt@kms_force_connector_basic@force-connector-state.html [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-adlp-2/igt@kms_force_connector_basic@force-connector-state.html * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: - shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#4141]) +3 other tests skip [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc: - shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#2312]) +5 other tests skip [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-blt: - shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#2311]) +4 other tests skip [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt: - shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2313]) +3 other tests skip [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html * igt@kms_joiner@basic-force-ultra-joiner: - shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#2934]) [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@kms_joiner@basic-force-ultra-joiner.html * igt@kms_plane_lowres@tiling-y: - shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#2393]) [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_plane_lowres@tiling-y.html * igt@kms_plane_multiple@2x-tiling-none: - shard-bmg: [PASS][47] -> [SKIP][48] ([Intel XE#4596]) [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-none.html [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-none.html * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5: - shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#2763]) +4 other tests skip [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html * igt@kms_pm_dc@dc3co-vpb-simulation: - shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2391]) [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_pm_dc@dc3co-vpb-simulation.html * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf: - shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#1489]) +1 other test skip [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf.html * igt@kms_psr2_su@page_flip-nv12: - shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#2387]) [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@kms_psr2_su@page_flip-nv12.html * igt@kms_psr@psr2-suspend: - shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_psr@psr2-suspend.html * igt@kms_setmode@invalid-clone-single-crtc-stealing: - shard-bmg: [PASS][54] -> [SKIP][55] ([Intel XE#1435]) [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-4/igt@kms_setmode@invalid-clone-single-crtc-stealing.html [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-5/igt@kms_setmode@invalid-clone-single-crtc-stealing.html * igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap: - shard-dg2-set2: [PASS][56] -> [SKIP][57] ([Intel XE#1392]) +6 other tests skip [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-dg2-434/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html * igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate: - shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#2322]) [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate.html * igt@xe_exec_reset@parallel-gt-reset: - shard-bmg: [PASS][59] -> [DMESG-WARN][60] ([Intel XE#3876]) [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-8/igt@xe_exec_reset@parallel-gt-reset.html [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-3/igt@xe_exec_reset@parallel-gt-reset.html * igt@xe_exec_sip_eudebug@wait-writesip-nodebug: - shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#4837]) [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@xe_exec_sip_eudebug@wait-writesip-nodebug.html * igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-new-huge: - shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#4943]) +3 other tests skip [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-new-huge.html * igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset: - shard-lnl: [PASS][63] -> [FAIL][64] ([Intel XE#5018]) [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-lnl-4/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset.html [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-lnl-4/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset.html * igt@xe_pm@s4-basic-exec: - shard-bmg: [PASS][65] -> [ABORT][66] ([Intel XE#5255]) [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-7/igt@xe_pm@s4-basic-exec.html [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@xe_pm@s4-basic-exec.html * igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq: - shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#4733]) [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq.html #### Possible fixes #### * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip: - shard-adlp: [DMESG-FAIL][68] ([Intel XE#4543]) -> [PASS][69] [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-adlp-3/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-adlp-1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6: - shard-dg2-set2: [INCOMPLETE][70] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) -> [PASS][71] [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html * igt@kms_cursor_legacy@cursor-vs-flip-varying-size: - shard-bmg: [DMESG-WARN][72] ([Intel XE#3428]) -> [PASS][73] [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-4/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-8/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size: - shard-bmg: [SKIP][74] ([Intel XE#2291]) -> [PASS][75] +4 other tests pass [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-5/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-8/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html * igt@kms_flip@2x-plain-flip-fb-recreate: - shard-bmg: [SKIP][76] ([Intel XE#2316]) -> [PASS][77] +4 other tests pass [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-5/igt@kms_flip@2x-plain-flip-fb-recreate.html [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-8/igt@kms_flip@2x-plain-flip-fb-recreate.html * igt@kms_flip@flip-vs-blocking-wf-vblank@c-hdmi-a1: - shard-adlp: [DMESG-WARN][78] ([Intel XE#4543]) -> [PASS][79] +6 other tests pass [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-adlp-8/igt@kms_flip@flip-vs-blocking-wf-vblank@c-hdmi-a1.html [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-adlp-3/igt@kms_flip@flip-vs-blocking-wf-vblank@c-hdmi-a1.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-adlp: [DMESG-WARN][80] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][81] +4 other tests pass [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-adlp-3/igt@kms_flip@flip-vs-suspend-interruptible.html [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-adlp-1/igt@kms_flip@flip-vs-suspend-interruptible.html - shard-bmg: [INCOMPLETE][82] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][83] +1 other test pass [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-7/igt@kms_flip@flip-vs-suspend-interruptible.html [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_hdr@static-swap: - shard-bmg: [SKIP][84] ([Intel XE#1503]) -> [PASS][85] [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-6/igt@kms_hdr@static-swap.html [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-4/igt@kms_hdr@static-swap.html * igt@kms_plane_multiple@2x-tiling-x: - shard-bmg: [SKIP][86] ([Intel XE#4596]) -> [PASS][87] [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-x.html [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-x.html * igt@xe_eu_stall@non-blocking-re-enable: - shard-bmg: [DMESG-WARN][88] ([Intel XE#3428] / [Intel XE#5215]) -> [PASS][89] [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-4/igt@xe_eu_stall@non-blocking-re-enable.html [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-8/igt@xe_eu_stall@non-blocking-re-enable.html * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind: - shard-dg2-set2: [SKIP][90] ([Intel XE#1392]) -> [PASS][91] +3 other tests pass [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-dg2-432/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind.html [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-dg2-464/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind.html * igt@xe_pm@s4-vm-bind-unbind-all: - shard-bmg: [ABORT][92] ([Intel XE#5255]) -> [PASS][93] [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-6/igt@xe_pm@s4-vm-bind-unbind-all.html [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@xe_pm@s4-vm-bind-unbind-all.html #### Warnings #### * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip: - shard-adlp: [DMESG-FAIL][94] ([Intel XE#4543] / [Intel XE#4921]) -> [DMESG-FAIL][95] ([Intel XE#4543]) [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-adlp-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-adlp-1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc: - shard-dg2-set2: [INCOMPLETE][96] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) -> [INCOMPLETE][97] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html * igt@kms_content_protection@atomic: - shard-bmg: [FAIL][98] ([Intel XE#1178]) -> [SKIP][99] ([Intel XE#2341]) [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-7/igt@kms_content_protection@atomic.html [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_content_protection@atomic.html * igt@kms_content_protection@lic-type-0@pipe-a-dp-2: - shard-bmg: [TIMEOUT][100] -> [FAIL][101] ([Intel XE#1178]) +1 other test fail [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-4/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-8/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size: - shard-bmg: [SKIP][102] ([Intel XE#2291]) -> [DMESG-WARN][103] ([Intel XE#5354]) [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render: - shard-bmg: [SKIP][104] ([Intel XE#2311]) -> [SKIP][105] ([Intel XE#2312]) +6 other tests skip [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc: - shard-bmg: [SKIP][106] ([Intel XE#2312]) -> [SKIP][107] ([Intel XE#2311]) +12 other tests skip [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render: - shard-bmg: [SKIP][108] ([Intel XE#4141]) -> [SKIP][109] ([Intel XE#2312]) +1 other test skip [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff: - shard-bmg: [SKIP][110] ([Intel XE#2312]) -> [SKIP][111] ([Intel XE#4141]) +4 other tests skip [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render: - shard-bmg: [SKIP][112] ([Intel XE#2312]) -> [SKIP][113] ([Intel XE#2313]) +11 other tests skip [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render: - shard-bmg: [SKIP][114] ([Intel XE#2313]) -> [SKIP][115] ([Intel XE#2312]) +8 other tests skip [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html * igt@kms_plane_multiple@2x-tiling-y: - shard-bmg: [SKIP][116] ([Intel XE#5021]) -> [SKIP][117] ([Intel XE#4596]) [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-bmg-7/igt@kms_plane_multiple@2x-tiling-y.html [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-y.html * igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-bo-map: - shard-lnl: [FAIL][118] -> [FAIL][119] ([Intel XE#5018]) [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73/shard-lnl-7/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-bo-map.html [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/shard-lnl-7/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-bo-map.html [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178 [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392 [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435 [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489 [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503 [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727 [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049 [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234 [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252 [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314 [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316 [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320 [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322 [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327 [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341 [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387 [Intel XE#2391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2391 [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393 [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597 [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652 [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894 [Intel XE#2934]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2934 [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953 [Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113 [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124 [Intel XE#3428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3428 [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432 [Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876 [Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908 [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141 [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173 [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212 [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422 [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522 [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543 [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455 [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596 [Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633 [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733 [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837 [Intel XE#4921]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4921 [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943 [Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018 [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021 [Intel XE#5215]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5215 [Intel XE#5255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5255 [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354 [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787 Build changes ------------- * Linux: xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73 -> xe-pw-150785v1 IGT_8426: f87ffec6e23df5f3f044d90924f948e0bbd68c6c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-3307-74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73: 74f3ed8bab4e5ef51f1c266e8c7ffd1f2a052a73 xe-pw-150785v1: 150785v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150785v1/index.html [-- Attachment #2: Type: text/html, Size: 43517 bytes --] ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2025-06-27 2:22 UTC | newest] Thread overview: 12+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-06-25 20:54 [CI 1/2] drm/xe/guc: Enable extended CAT error reporting Daniele Ceraolo Spurio 2025-06-25 20:54 ` [CI 2/2] drm/xe/guc: Enable the Dynamic Inhibit Context Switch optimization Daniele Ceraolo Spurio 2025-06-25 21:01 ` ✗ CI.checkpatch: warning for series starting with [CI,1/2] drm/xe/guc: Enable extended CAT error reporting Patchwork 2025-06-25 21:02 ` ✓ CI.KUnit: success " Patchwork 2025-06-25 21:40 ` ✓ Xe.CI.BAT: " Patchwork 2025-06-25 23:54 ` [CI 1/2] " Matthew Brost 2025-06-26 0:05 ` Daniele Ceraolo Spurio 2025-06-26 3:18 ` Matthew Brost 2025-06-26 3:20 ` Matthew Brost 2025-06-26 16:43 ` Daniele Ceraolo Spurio 2025-06-26 16:46 ` Matthew Brost 2025-06-27 2:22 ` ✗ Xe.CI.Full: failure for series starting with [CI,1/2] " Patchwork
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