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* [PATCH] drm/xe/wopcm: Move WOPCM size to platform info
@ 2026-06-03 16:26 Shuicheng Lin
  2026-06-03 17:11 ` ✓ CI.KUnit: success for " Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 10+ messages in thread
From: Shuicheng Lin @ 2026-06-03 16:26 UTC (permalink / raw)
  To: intel-xe; +Cc: Shuicheng Lin, Stuart Summers, Matt Roper

Replace the per-platform ternary chain in xe_wopcm_size() with a
field read from xe->info.wopcm_size, populated from the platform
descriptor.

Per-platform values are unchanged: SZ_4M for DGFX and MTL, SZ_2M
for all other platforms.

This prepares for newer platforms that may need a different size.
No functional change.

Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com>
---
Cc: Stuart Summers <stuart.summers@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/xe/xe_device_types.h |  2 ++
 drivers/gpu/drm/xe/xe_pci.c          | 15 ++++++++++++++-
 drivers/gpu/drm/xe/xe_pci_types.h    |  1 +
 drivers/gpu/drm/xe/xe_wopcm.c        | 11 +----------
 4 files changed, 18 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 32dd2ffbc796..f44c031e3553 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -139,6 +139,8 @@ struct xe_device {
 		u8 vm_max_level;
 		/** @info.va_bits: Maximum bits of a virtual address */
 		u8 va_bits;
+		/** @info.wopcm_size: Size of WOPCM region for this platform */
+		u32 wopcm_size;
 
 		/*
 		 * Keep all flags below alphabetically sorted
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 3165686e3e04..6b7dd8661f64 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -10,6 +10,7 @@
 #include <linux/module.h>
 #include <linux/pci.h>
 #include <linux/pm_runtime.h>
+#include <linux/sizes.h>
 
 #include <drm/drm_color_mgmt.h>
 #include <drm/drm_drv.h>
@@ -206,6 +207,7 @@ static const struct xe_device_desc tgl_desc = {
 	.require_force_probe = true,
 	.va_bits = 48,
 	.vm_max_level = 3,
+	.wopcm_size = SZ_2M,
 };
 
 static const struct xe_device_desc rkl_desc = {
@@ -221,6 +223,7 @@ static const struct xe_device_desc rkl_desc = {
 	.require_force_probe = true,
 	.va_bits = 48,
 	.vm_max_level = 3,
+	.wopcm_size = SZ_2M,
 };
 
 static const u16 adls_rpls_ids[] = { INTEL_RPLS_IDS(NOP), 0 };
@@ -243,6 +246,7 @@ static const struct xe_device_desc adl_s_desc = {
 	},
 	.va_bits = 48,
 	.vm_max_level = 3,
+	.wopcm_size = SZ_2M,
 };
 
 static const u16 adlp_rplu_ids[] = { INTEL_RPLU_IDS(NOP), 0 };
@@ -265,6 +269,7 @@ static const struct xe_device_desc adl_p_desc = {
 	},
 	.va_bits = 48,
 	.vm_max_level = 3,
+	.wopcm_size = SZ_2M,
 };
 
 static const struct xe_device_desc adl_n_desc = {
@@ -281,10 +286,12 @@ static const struct xe_device_desc adl_n_desc = {
 	.require_force_probe = true,
 	.va_bits = 48,
 	.vm_max_level = 3,
+	.wopcm_size = SZ_2M,
 };
 
 #define DGFX_FEATURES \
-	.is_dgfx = 1
+	.is_dgfx = 1, \
+	.wopcm_size = SZ_4M
 
 static const struct xe_device_desc dg1_desc = {
 	.pre_gmdid_graphics_ip = &graphics_ip_xelpp,
@@ -378,6 +385,7 @@ static const struct xe_device_desc mtl_desc = {
 	MULTI_LRC_MASK,
 	.va_bits = 48,
 	.vm_max_level = 3,
+	.wopcm_size = SZ_4M,
 };
 
 static const struct xe_device_desc lnl_desc = {
@@ -391,6 +399,7 @@ static const struct xe_device_desc lnl_desc = {
 	.needs_scratch = true,
 	.va_bits = 48,
 	.vm_max_level = 4,
+	.wopcm_size = SZ_2M,
 };
 
 static const u16 bmg_g21_ids[] = { INTEL_BMG_G21_IDS(NOP), 0 };
@@ -436,6 +445,7 @@ static const struct xe_device_desc ptl_desc = {
 	.needs_shared_vf_gt_wq = true,
 	.va_bits = 48,
 	.vm_max_level = 4,
+	.wopcm_size = SZ_2M,
 };
 
 static const struct xe_device_desc nvls_desc = {
@@ -450,6 +460,7 @@ static const struct xe_device_desc nvls_desc = {
 	.require_force_probe = true,
 	.va_bits = 48,
 	.vm_max_level = 4,
+	.wopcm_size = SZ_2M,
 };
 
 static const struct xe_device_desc cri_desc = {
@@ -489,6 +500,7 @@ static const struct xe_device_desc nvlp_desc = {
 	.require_force_probe = true,
 	.va_bits = 48,
 	.vm_max_level = 4,
+	.wopcm_size = SZ_2M,
 };
 
 #undef PLATFORM
@@ -757,6 +769,7 @@ static int xe_info_init_early(struct xe_device *xe,
 	xe->info.va_bits = desc->va_bits;
 	xe->info.vm_max_level = desc->vm_max_level;
 	xe->info.vram_flags = desc->vram_flags;
+	xe->info.wopcm_size = desc->wopcm_size;
 
 	xe->info.is_dgfx = desc->is_dgfx;
 	xe->info.has_cached_pt = desc->has_cached_pt;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 5b85e2c24b7b..35acb878c111 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -34,6 +34,7 @@ struct xe_device_desc {
 	u8 va_bits;
 	u8 vm_max_level;
 	u8 vram_flags;
+	u32 wopcm_size;
 
 	u8 require_force_probe:1;
 	u8 is_dgfx:1;
diff --git a/drivers/gpu/drm/xe/xe_wopcm.c b/drivers/gpu/drm/xe/xe_wopcm.c
index 900daf1d1b1b..783bf37c87ef 100644
--- a/drivers/gpu/drm/xe/xe_wopcm.c
+++ b/drivers/gpu/drm/xe/xe_wopcm.c
@@ -48,13 +48,6 @@
  * context).
  */
 
-/* Default WOPCM size is 2MB from Gen11, 1MB on previous platforms */
-/* FIXME: Larger size require for 2 tile PVC, do a proper probe sooner or later */
-#define DGFX_WOPCM_SIZE			SZ_4M
-/* FIXME: Larger size require for MTL, do a proper probe sooner or later */
-#define MTL_WOPCM_SIZE			SZ_4M
-#define WOPCM_SIZE			SZ_2M
-
 /* 16KB WOPCM (RSVD WOPCM) is reserved from HuC firmware top. */
 #define WOPCM_RESERVED_SIZE		SZ_16K
 
@@ -179,9 +172,7 @@ static int __wopcm_init_regs(struct xe_device *xe, struct xe_gt *gt,
 
 u32 xe_wopcm_size(struct xe_device *xe)
 {
-	return IS_DGFX(xe) ? DGFX_WOPCM_SIZE :
-		xe->info.platform == XE_METEORLAKE ? MTL_WOPCM_SIZE :
-		WOPCM_SIZE;
+	return xe->info.wopcm_size;
 }
 
 static u32 max_wopcm_size(struct xe_device *xe)
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread
end of thread, other threads:[~2026-06-04  6:13 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-06-03 16:26 [PATCH] drm/xe/wopcm: Move WOPCM size to platform info Shuicheng Lin
2026-06-03 17:11 ` ✓ CI.KUnit: success for " Patchwork
2026-06-03 17:18 ` [PATCH] " Michal Wajdeczko
2026-06-03 19:25   ` Matt Roper
2026-06-03 19:36     ` Matt Roper
2026-06-03 19:41       ` Summers, Stuart
2026-06-03 19:48         ` Matt Roper
2026-06-03 20:43           ` Daniele Ceraolo Spurio
2026-06-03 17:51 ` ✓ Xe.CI.BAT: success for " Patchwork
2026-06-04  6:13 ` ✓ Xe.CI.FULL: " Patchwork

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