Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH] drm/i915/watermark: Check bounds for scaler_users for dsc prefill latency
@ 2025-02-27  3:41 Ankit Nautiyal
  2025-02-27  3:58 ` ✓ CI.Patch_applied: success for " Patchwork
                   ` (8 more replies)
  0 siblings, 9 replies; 11+ messages in thread
From: Ankit Nautiyal @ 2025-02-27  3:41 UTC (permalink / raw)
  To: intel-gfx
  Cc: intel-xe, jani.nikula, mitulkumar.ajitkumar.golani,
	ankit.k.nautiyal

Currently, during the computation of global watermarks, the latency for
each scaler user is calculated to compute the DSC prefill latency.
At this point, the number of scaler users can exceed the number of
supported scalers, which is checked later in intel_atomic_setup_scalers().

This can cause issues when the number of scaler users exceeds the number
of supported scalers.

While checking for DSC prefill, ensure that the number of scaler users does
not exceed the number of supported scalers.

Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/4341
Fixes: a9b14af999b0 ("drm/i915/dsc: Check if vblank is sufficient for dsc prefill")
Cc: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 10a1daad28eb..58b91981e400 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2314,6 +2314,7 @@ cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state)
 static int
 dsc_prefill_latency(const struct intel_crtc_state *crtc_state)
 {
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	const struct intel_crtc_scaler_state *scaler_state =
 					&crtc_state->scaler_state;
 	int linetime = DIV_ROUND_UP(1000 * crtc_state->hw.adjusted_mode.htotal,
@@ -2323,7 +2324,9 @@ dsc_prefill_latency(const struct intel_crtc_state *crtc_state)
 		crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 2 : 1;
 	u32 dsc_prefill_latency = 0;
 
-	if (!crtc_state->dsc.compression_enable || !num_scaler_users)
+	if (!crtc_state->dsc.compression_enable ||
+	    !num_scaler_users ||
+	    num_scaler_users > crtc->num_scalers)
 		return dsc_prefill_latency;
 
 	dsc_prefill_latency = DIV_ROUND_UP(15 * linetime * chroma_downscaling_factor, 10);
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2025-03-13 14:21 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-02-27  3:41 [PATCH] drm/i915/watermark: Check bounds for scaler_users for dsc prefill latency Ankit Nautiyal
2025-02-27  3:58 ` ✓ CI.Patch_applied: success for " Patchwork
2025-02-27  3:58 ` ✓ CI.checkpatch: " Patchwork
2025-02-27  4:00 ` ✓ CI.KUnit: " Patchwork
2025-02-27  4:16 ` ✓ CI.Build: " Patchwork
2025-02-27  4:19 ` ✓ CI.Hooks: " Patchwork
2025-02-27  4:20 ` ✓ CI.checksparse: " Patchwork
2025-02-27  4:38 ` ✓ Xe.CI.BAT: " Patchwork
2025-02-27  4:50 ` [PATCH] " Golani, Mitulkumar Ajitkumar
2025-03-13 14:20   ` Nautiyal, Ankit K
2025-02-27  6:16 ` ✗ Xe.CI.Full: failure for " Patchwork

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox