[Intel-xe] ttm_bo and multiple backing store segments

["Welty, Brian" <brian.welty@intel.com>]

Hi Christian / Thomas,

Wanted to ask if you have explored or thought about adding support in 
TTM such that a ttm_bo could have more than one underlying backing store 
segment (that is, to have a tree of ttm_resources)?
We are considering to support such BOs for Intel Xe driver.

Some of the benefits:
  * devices with page fault support can fault (and migrate) backing store
    at finer granularity than the entire BO
  * BOs can support having multiple backing store segments, which can be
    in different memory domains/regions
  * BO eviction could operate on smaller granularity than entire BO

Or is the thinking that workloads should use SVM/HMM instead of 
GEM_CREATE if they want above benefits?

Is this something you are open to seeing an RFC series that starts 
perhaps with just extending ttm_bo_validate() to see how this might 
shape up?

-Brian