Re: [PATCH 1/3] drm/xe: Disable compression on SVM

["Ghimiray, Himal Prasad" <himal.prasad.ghimiray@intel.com>]

On 15-07-2025 13:45, Matthew Auld wrote:
> On 14/07/2025 18:33, Matthew Brost wrote:
>> This is not yet supported, forcefully disable by setting pat_index to
>> zero for CPU address mirror VMAs.
>>
>> Cc: stable@vger.kernel.org
>> Fixes: b43e864af0d4 ("drm/xe/uapi: Add 
>> DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR")
>> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_vm.c | 5 ++++-
>>   1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
>> index 2035604121e6..73cb981c0956 100644
>> --- a/drivers/gpu/drm/xe/xe_vm.c
>> +++ b/drivers/gpu/drm/xe/xe_vm.c
>> @@ -2362,7 +2362,10 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, 
>> struct xe_vma_ops *vops,
>>               op->map.is_cpu_addr_mirror = flags &
>>                   DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR;
>>               op->map.dumpable = flags & DRM_XE_VM_BIND_FLAG_DUMPABLE;
>> -            op->map.pat_index = pat_index;
>> +            if (op->map.is_cpu_addr_mirror)
>> +                op->map.pat_index = 0;
> 
> Is this meant as a safe default or is this just a dummy value? If this 
> actually gets programmed in the hw, maybe XE_CACHE_WB would be better 
> here? That way we know exactly what it does from driver POV for a given 
> platform. Index zero for example might have no host coherency (might 
> then need WC on host). In some world index zero could enable compression.

+1

> 
>> +            else
>> +                op->map.pat_index = pat_index;
>>               op->map.invalidate_on_bind =
>>                   __xe_vm_needs_clear_scratch_pages(vm, flags);
>>           } else if (__op->op == DRM_GPUVA_OP_PREFETCH) {
>