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From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: Gustavo Sousa <gustavo.sousa@intel.com>,
	<intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH] drm/xe: put COMMON_SLICE_CHICKEN3 on the allowlist for UMD
Date: Mon, 5 Jan 2026 22:53:31 +0200	[thread overview]
Message-ID: <ceacec3e-fe14-46c9-ad35-5ddb5e53ce92@intel.com> (raw)
In-Reply-To: <20260105202439.GO1180203@mdroper-desk1.amr.corp.intel.com>

On 05/01/2026 22:24, Matt Roper wrote:
> On Mon, Jan 05, 2026 at 10:04:15PM +0200, Lionel Landwerlin wrote:
>> On 05/01/2026 20:54, Gustavo Sousa wrote:
>>> Quoting Lionel Landwerlin (2026-01-05 12:02:22-03:00)
>>>> Similar to i915's commit cebc13de7e704b1355bea208a9f9cdb042c74588
>>>> ("drm/i915: Whitelist COMMON_SLICE_CHICKEN3 for UMD access")
>>>>
>>>> A recommended tuning setting for both gen12 and Xe_HP platforms
>>>> requires that we grant userspace r/w access to the
>>>> COMMON_SLICE_CHICKEN3 register.
>>>>
>>>> Bspec: 73993, 73994, 31870, 68331
>>>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>>>> ---
>>>> drivers/gpu/drm/xe/xe_reg_whitelist.c | 5 +++++
>>>> 1 file changed, 5 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
>>>> index 1391cb6ec9c62..4dcbc42574bf5 100644
>>>> --- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
>>>> +++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
>>>> @@ -45,6 +45,11 @@ static const struct xe_rtp_entry_sr register_whitelist[] = {
>>>>             XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, 1210), ENGINE_CLASS(RENDER)),
>>>>             XE_RTP_ACTIONS(WHITELIST(COMMON_SLICE_CHICKEN1, 0))
>>>>           },
>>>> +        { XE_RTP_NAME("allow_common_slice_chicken3"),
>>>> +          XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED),
>>> With XE_RTP_END_VERSION_UNDEFINED, this spans to any current and future
>>> GT containig graphics version 12 or higher.  I believe we need to limit
>>> this to 12.74.
>>>
>>> --
>>> Gustavo Sousa
>>
>> The problem is that UMD still wants to enable this performance feature from
>> this register.
>>
>> On Windows there is a way for the UMD to request the programming of the bit
>> without the allowlist on Xe2+.
>>
>> But there is no such mechanism on Linux.
> In that case, we should poke the hardware people to get this register
> added to the performance tuning guide for Xe2 (i.e., bspec page 72161).
> The tagging there will indicate which platform(s) the feature is
> considered beneficial and safe for, and the driver can follow the
> guidance.


The answer is likely going to be : "do like windows"

That works for me too, when I create a GEM context, adding a flag to 
have Xe do some MMIO programming for me.

Just now this is a discussion with Xe devs to know what shape it should 
take.


-Lionel


>
> Using XE_RTP_END_VERSION_UNDEFINED for a whitelist is dangerous because
> the register may change in the future to include dangerous/sensitive
> settings that userspace should not have access to.  In extreme cases,
> the register could even go away completely on a future genration of the
> IP and the offset could be recycled for a completely different purpose;
> with an unrestricted upper bound here we might be exposing something
> that we really shouldn't be.
>
> In general, we're never expected to whitelist registers across several
> IP generations.  If there's something that userspace has a legitimate
> need to access, then it's supposed to get added to the hardware's
> built-in whitelist so that software doesn't have to manage it going
> forward.  I'm not sure why that hasn't happened in this case; it looks
> like there was some discussion about this on internal ticket
> 18015615957, but the discussion seems to have slipped through the cracks
> and neither a bspec update (indicating the register should continue to
> be whitelisted) nor a hardware change (automatically whitelisting it
> and/or providing an alternate interface) have materialized.
>
>
> Matt
>
>>
>> -Lionel
>>
>>
>>>> +                       ENGINE_CLASS(RENDER)),
>>>> +          XE_RTP_ACTIONS(WHITELIST(COMMON_SLICE_CHICKEN3, 0))
>>>> +        },
>>>>           { XE_RTP_NAME("1806527549"),
>>>>             XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, 1210), ENGINE_CLASS(RENDER)),
>>>>             XE_RTP_ACTIONS(WHITELIST(HIZ_CHICKEN, 0))
>>>> -- 
>>>> 2.43.0
>>>>


  reply	other threads:[~2026-01-05 20:51 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-05 15:02 [PATCH] drm/xe: put COMMON_SLICE_CHICKEN3 on the allowlist for UMD Lionel Landwerlin
2026-01-05 15:06 ` ✗ CI.checkpatch: warning for " Patchwork
2026-01-05 15:07 ` ✓ CI.KUnit: success " Patchwork
2026-01-05 15:51 ` ✓ Xe.CI.BAT: " Patchwork
2026-01-05 18:54 ` [PATCH] " Gustavo Sousa
2026-01-05 20:04   ` Lionel Landwerlin
2026-01-05 20:24     ` Matt Roper
2026-01-05 20:53       ` Lionel Landwerlin [this message]
2026-01-05 19:01 ` ✗ Xe.CI.Full: failure for " Patchwork

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