* [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display
@ 2025-03-04 10:27 Jani Nikula
2025-03-04 10:27 ` [PATCH 1/5] drm/i915/display: convert various port/phy helpers " Jani Nikula
` (12 more replies)
0 siblings, 13 replies; 20+ messages in thread
From: Jani Nikula @ 2025-03-04 10:27 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Jani Nikula (5):
drm/i915/display: convert various port/phy helpers to struct
intel_display
drm/i915/display: convert some intel_display.[ch] functions to struct
intel_display
drm/i915/display: convert intel_has_pending_fb_unpin() to struct
intel_display
drm/i915/display: remove dupe intel_update_watermarks() declaration
drm/i915/display: convert intel_display.c to struct intel_display
drivers/gpu/drm/i915/display/intel_bios.c | 5 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 9 +-
drivers/gpu/drm/i915/display/intel_display.c | 1045 ++++++++---------
drivers/gpu/drm/i915/display/intel_display.h | 24 +-
.../drm/i915/display/intel_display_driver.c | 10 +-
.../i915/display/intel_display_power_well.c | 9 +-
drivers/gpu/drm/i915/display/intel_dp.c | 3 +-
drivers/gpu/drm/i915/display/vlv_dsi_pll.h | 6 +-
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 3 +-
drivers/gpu/drm/i915/i915_reg.h | 4 +-
10 files changed, 550 insertions(+), 568 deletions(-)
--
2.39.5
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH 1/5] drm/i915/display: convert various port/phy helpers to struct intel_display 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula @ 2025-03-04 10:27 ` Jani Nikula 2025-03-04 12:32 ` Garg, Nemesa 2025-03-04 10:27 ` [PATCH 2/5] drm/i915/display: convert some intel_display.[ch] functions " Jani Nikula ` (11 subsequent siblings) 12 siblings, 1 reply; 20+ messages in thread From: Jani Nikula @ 2025-03-04 10:27 UTC (permalink / raw) To: intel-gfx, intel-xe; +Cc: jani.nikula Going forward, struct intel_display is the main display device data pointer. The intel_display.[ch] files are too big to convert in one go. Convert the various port/phy helpers to struct intel_display. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_bios.c | 5 +-- drivers/gpu/drm/i915/display/intel_ddi.c | 6 +-- drivers/gpu/drm/i915/display/intel_display.c | 40 +++++++++---------- drivers/gpu/drm/i915/display/intel_display.h | 7 ++-- .../i915/display/intel_display_power_well.c | 9 ++--- 5 files changed, 31 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index e0e4e9b62d8d..a8d08d7d82b3 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -2902,7 +2902,6 @@ init_vbt_panel_defaults(struct intel_panel *panel) static void init_vbt_missing_defaults(struct intel_display *display) { - struct drm_i915_private *i915 = to_i915(display->drm); unsigned int ports = DISPLAY_RUNTIME_INFO(display)->port_mask; enum port port; @@ -2912,13 +2911,13 @@ init_vbt_missing_defaults(struct intel_display *display) for_each_port_masked(port, ports) { struct intel_bios_encoder_data *devdata; struct child_device_config *child; - enum phy phy = intel_port_to_phy(i915, port); + enum phy phy = intel_port_to_phy(display, port); /* * VBT has the TypeC mode (native,TBT/USB) and we don't want * to detect it. */ - if (intel_phy_is_tc(i915, phy)) + if (intel_phy_is_tc(display, phy)) continue; /* Create fake child device config */ diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 20fc258a4d6d..3b7ec0be9011 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -5100,7 +5100,7 @@ void intel_ddi_init(struct intel_display *display, return; } - phy = intel_port_to_phy(dev_priv, port); + phy = intel_port_to_phy(display, port); /* * On platforms with HTI (aka HDPORT), if it's enabled at boot it may @@ -5160,7 +5160,7 @@ void intel_ddi_init(struct intel_display *display, port_name(port - PORT_D_XELPD + PORT_D), phy_name(phy)); } else if (DISPLAY_VER(dev_priv) >= 12) { - enum tc_port tc_port = intel_port_to_tc(dev_priv, port); + enum tc_port tc_port = intel_port_to_tc(display, port); drm_encoder_init(&dev_priv->drm, &encoder->base, &intel_ddi_funcs, DRM_MODE_ENCODER_TMDS, @@ -5170,7 +5170,7 @@ void intel_ddi_init(struct intel_display *display, tc_port != TC_PORT_NONE ? "TC" : "", tc_port != TC_PORT_NONE ? tc_port_name(tc_port) : phy_name(phy)); } else if (DISPLAY_VER(dev_priv) >= 11) { - enum tc_port tc_port = intel_port_to_tc(dev_priv, port); + enum tc_port tc_port = intel_port_to_tc(display, port); drm_encoder_init(&dev_priv->drm, &encoder->base, &intel_ddi_funcs, DRM_MODE_ENCODER_TMDS, diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c4b0ec60fded..9d4f2dacbbce 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1834,20 +1834,20 @@ bool intel_phy_is_combo(struct intel_display *display, enum phy phy) } /* Prefer intel_encoder_is_tc() */ -bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy) +bool intel_phy_is_tc(struct intel_display *display, enum phy phy) { /* * Discrete GPU phy's are not attached to FIA's to support TC * subsystem Legacy or non-legacy, and only support native DP/HDMI */ - if (IS_DGFX(dev_priv)) + if (display->platform.dgfx) return false; - if (DISPLAY_VER(dev_priv) >= 13) + if (DISPLAY_VER(display) >= 13) return phy >= PHY_F && phy <= PHY_I; - else if (IS_TIGERLAKE(dev_priv)) + else if (display->platform.tigerlake) return phy >= PHY_D && phy <= PHY_I; - else if (IS_ICELAKE(dev_priv)) + else if (display->platform.icelake) return phy >= PHY_C && phy <= PHY_F; return false; @@ -1864,17 +1864,17 @@ bool intel_phy_is_snps(struct intel_display *display, enum phy phy) } /* Prefer intel_encoder_to_phy() */ -enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port) +enum phy intel_port_to_phy(struct intel_display *display, enum port port) { - if (DISPLAY_VER(i915) >= 13 && port >= PORT_D_XELPD) + if (DISPLAY_VER(display) >= 13 && port >= PORT_D_XELPD) return PHY_D + port - PORT_D_XELPD; - else if (DISPLAY_VER(i915) >= 13 && port >= PORT_TC1) + else if (DISPLAY_VER(display) >= 13 && port >= PORT_TC1) return PHY_F + port - PORT_TC1; - else if (IS_ALDERLAKE_S(i915) && port >= PORT_TC1) + else if (display->platform.alderlake_s && port >= PORT_TC1) return PHY_B + port - PORT_TC1; - else if ((IS_DG1(i915) || IS_ROCKETLAKE(i915)) && port >= PORT_TC1) + else if ((display->platform.dg1 || display->platform.rocketlake) && port >= PORT_TC1) return PHY_C + port - PORT_TC1; - else if ((IS_JASPERLAKE(i915) || IS_ELKHARTLAKE(i915)) && + else if ((display->platform.jasperlake || display->platform.elkhartlake) && port == PORT_D) return PHY_A; @@ -1882,12 +1882,12 @@ enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port) } /* Prefer intel_encoder_to_tc() */ -enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port) +enum tc_port intel_port_to_tc(struct intel_display *display, enum port port) { - if (!intel_phy_is_tc(dev_priv, intel_port_to_phy(dev_priv, port))) + if (!intel_phy_is_tc(display, intel_port_to_phy(display, port))) return TC_PORT_NONE; - if (DISPLAY_VER(dev_priv) >= 12) + if (DISPLAY_VER(display) >= 12) return TC_PORT_1 + port - PORT_TC1; else return TC_PORT_1 + port - PORT_C; @@ -1895,9 +1895,9 @@ enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port) enum phy intel_encoder_to_phy(struct intel_encoder *encoder) { - struct drm_i915_private *i915 = to_i915(encoder->base.dev); + struct intel_display *display = to_intel_display(encoder); - return intel_port_to_phy(i915, encoder->port); + return intel_port_to_phy(display, encoder->port); } bool intel_encoder_is_combo(struct intel_encoder *encoder) @@ -1916,16 +1916,16 @@ bool intel_encoder_is_snps(struct intel_encoder *encoder) bool intel_encoder_is_tc(struct intel_encoder *encoder) { - struct drm_i915_private *i915 = to_i915(encoder->base.dev); + struct intel_display *display = to_intel_display(encoder); - return intel_phy_is_tc(i915, intel_encoder_to_phy(encoder)); + return intel_phy_is_tc(display, intel_encoder_to_phy(encoder)); } enum tc_port intel_encoder_to_tc(struct intel_encoder *encoder) { - struct drm_i915_private *i915 = to_i915(encoder->base.dev); + struct intel_display *display = to_intel_display(encoder); - return intel_port_to_tc(i915, encoder->port); + return intel_port_to_tc(display, encoder->port); } enum intel_display_power_domain diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index bc9a5a14ca6a..45d70d3e1041 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -426,7 +426,7 @@ intel_mode_valid_max_plane_size(struct intel_display *display, enum drm_mode_status intel_cpu_transcoder_mode_valid(struct intel_display *display, const struct drm_display_mode *mode); -enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port); +enum phy intel_port_to_phy(struct intel_display *display, enum port port); bool is_trans_port_sync_mode(const struct intel_crtc_state *state); bool is_trans_port_sync_master(const struct intel_crtc_state *state); u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state); @@ -465,10 +465,9 @@ intel_encoder_current_mode(struct intel_encoder *encoder); void intel_encoder_get_config(struct intel_encoder *encoder, struct intel_crtc_state *crtc_state); bool intel_phy_is_combo(struct intel_display *display, enum phy phy); -bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy); +bool intel_phy_is_tc(struct intel_display *display, enum phy phy); bool intel_phy_is_snps(struct intel_display *display, enum phy phy); -enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, - enum port port); +enum tc_port intel_port_to_tc(struct intel_display *display, enum port port); enum phy intel_encoder_to_phy(struct intel_encoder *encoder); bool intel_encoder_is_combo(struct intel_encoder *encoder); diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c index 5b60db597329..8ec87ffd87d2 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c @@ -549,10 +549,9 @@ static void icl_aux_power_well_enable(struct intel_display *display, struct i915_power_well *power_well) { - struct drm_i915_private *dev_priv = to_i915(display->drm); enum phy phy = icl_aux_pw_to_phy(display, power_well); - if (intel_phy_is_tc(dev_priv, phy)) + if (intel_phy_is_tc(display, phy)) return icl_tc_phy_aux_power_well_enable(display, power_well); else if (display->platform.icelake) return icl_combo_phy_aux_power_well_enable(display, @@ -565,10 +564,9 @@ static void icl_aux_power_well_disable(struct intel_display *display, struct i915_power_well *power_well) { - struct drm_i915_private *dev_priv = to_i915(display->drm); enum phy phy = icl_aux_pw_to_phy(display, power_well); - if (intel_phy_is_tc(dev_priv, phy)) + if (intel_phy_is_tc(display, phy)) return hsw_power_well_disable(display, power_well); else if (display->platform.icelake) return icl_combo_phy_aux_power_well_disable(display, @@ -1829,11 +1827,10 @@ tgl_tc_cold_off_power_well_is_enabled(struct intel_display *display, static void xelpdp_aux_power_well_enable(struct intel_display *display, struct i915_power_well *power_well) { - struct drm_i915_private *dev_priv = to_i915(display->drm); enum aux_ch aux_ch = i915_power_well_instance(power_well)->xelpdp.aux_ch; enum phy phy = icl_aux_pw_to_phy(display, power_well); - if (intel_phy_is_tc(dev_priv, phy)) + if (intel_phy_is_tc(display, phy)) icl_tc_port_assert_ref_held(display, power_well, aux_ch_to_digital_port(display, aux_ch)); -- 2.39.5 ^ permalink raw reply related [flat|nested] 20+ messages in thread
* RE: [PATCH 1/5] drm/i915/display: convert various port/phy helpers to struct intel_display 2025-03-04 10:27 ` [PATCH 1/5] drm/i915/display: convert various port/phy helpers " Jani Nikula @ 2025-03-04 12:32 ` Garg, Nemesa 2025-03-05 18:39 ` Jani Nikula 0 siblings, 1 reply; 20+ messages in thread From: Garg, Nemesa @ 2025-03-04 12:32 UTC (permalink / raw) To: Nikula, Jani, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Nikula, Jani > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani > Nikula > Sent: Tuesday, March 4, 2025 3:58 PM > To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org > Cc: Nikula, Jani <jani.nikula@intel.com> > Subject: [PATCH 1/5] drm/i915/display: convert various port/phy helpers to > struct intel_display > > Going forward, struct intel_display is the main display device data pointer. The > intel_display.[ch] files are too big to convert in one go. Convert the various > port/phy helpers to struct intel_display. > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_bios.c | 5 +-- > drivers/gpu/drm/i915/display/intel_ddi.c | 6 +-- > drivers/gpu/drm/i915/display/intel_display.c | 40 +++++++++---------- > drivers/gpu/drm/i915/display/intel_display.h | 7 ++-- > .../i915/display/intel_display_power_well.c | 9 ++--- > 5 files changed, 31 insertions(+), 36 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c > b/drivers/gpu/drm/i915/display/intel_bios.c > index e0e4e9b62d8d..a8d08d7d82b3 100644 > --- a/drivers/gpu/drm/i915/display/intel_bios.c > +++ b/drivers/gpu/drm/i915/display/intel_bios.c > @@ -2902,7 +2902,6 @@ init_vbt_panel_defaults(struct intel_panel *panel) > static void init_vbt_missing_defaults(struct intel_display *display) { > - struct drm_i915_private *i915 = to_i915(display->drm); > unsigned int ports = DISPLAY_RUNTIME_INFO(display)->port_mask; > enum port port; > > @@ -2912,13 +2911,13 @@ init_vbt_missing_defaults(struct intel_display > *display) > for_each_port_masked(port, ports) { > struct intel_bios_encoder_data *devdata; > struct child_device_config *child; > - enum phy phy = intel_port_to_phy(i915, port); > + enum phy phy = intel_port_to_phy(display, port); > > /* > * VBT has the TypeC mode (native,TBT/USB) and we don't > want > * to detect it. > */ > - if (intel_phy_is_tc(i915, phy)) > + if (intel_phy_is_tc(display, phy)) > continue; > > /* Create fake child device config */ diff --git > a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index 20fc258a4d6d..3b7ec0be9011 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -5100,7 +5100,7 @@ void intel_ddi_init(struct intel_display *display, > return; > } > > - phy = intel_port_to_phy(dev_priv, port); > + phy = intel_port_to_phy(display, port); > > /* > * On platforms with HTI (aka HDPORT), if it's enabled at boot it may > @@ -5160,7 +5160,7 @@ void intel_ddi_init(struct intel_display *display, > port_name(port - PORT_D_XELPD + > PORT_D), > phy_name(phy)); > } else if (DISPLAY_VER(dev_priv) >= 12) { > - enum tc_port tc_port = intel_port_to_tc(dev_priv, port); > + enum tc_port tc_port = intel_port_to_tc(display, port); > > drm_encoder_init(&dev_priv->drm, &encoder->base, > &intel_ddi_funcs, > DRM_MODE_ENCODER_TMDS, > @@ -5170,7 +5170,7 @@ void intel_ddi_init(struct intel_display *display, > tc_port != TC_PORT_NONE ? "TC" : "", > tc_port != TC_PORT_NONE ? > tc_port_name(tc_port) : phy_name(phy)); > } else if (DISPLAY_VER(dev_priv) >= 11) { > - enum tc_port tc_port = intel_port_to_tc(dev_priv, port); > + enum tc_port tc_port = intel_port_to_tc(display, port); > > drm_encoder_init(&dev_priv->drm, &encoder->base, > &intel_ddi_funcs, > DRM_MODE_ENCODER_TMDS, > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index c4b0ec60fded..9d4f2dacbbce 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -1834,20 +1834,20 @@ bool intel_phy_is_combo(struct intel_display > *display, enum phy phy) } > > /* Prefer intel_encoder_is_tc() */ > -bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy) > +bool intel_phy_is_tc(struct intel_display *display, enum phy phy) > { > /* > * Discrete GPU phy's are not attached to FIA's to support TC > * subsystem Legacy or non-legacy, and only support native DP/HDMI > */ > - if (IS_DGFX(dev_priv)) > + if (display->platform.dgfx) > return false; > > - if (DISPLAY_VER(dev_priv) >= 13) > + if (DISPLAY_VER(display) >= 13) > return phy >= PHY_F && phy <= PHY_I; > - else if (IS_TIGERLAKE(dev_priv)) > + else if (display->platform.tigerlake) > return phy >= PHY_D && phy <= PHY_I; > - else if (IS_ICELAKE(dev_priv)) > + else if (display->platform.icelake) > return phy >= PHY_C && phy <= PHY_F; > > return false; > @@ -1864,17 +1864,17 @@ bool intel_phy_is_snps(struct intel_display > *display, enum phy phy) } > > /* Prefer intel_encoder_to_phy() */ > -enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port) > +enum phy intel_port_to_phy(struct intel_display *display, enum port > +port) > { > - if (DISPLAY_VER(i915) >= 13 && port >= PORT_D_XELPD) > + if (DISPLAY_VER(display) >= 13 && port >= PORT_D_XELPD) > return PHY_D + port - PORT_D_XELPD; > - else if (DISPLAY_VER(i915) >= 13 && port >= PORT_TC1) > + else if (DISPLAY_VER(display) >= 13 && port >= PORT_TC1) > return PHY_F + port - PORT_TC1; > - else if (IS_ALDERLAKE_S(i915) && port >= PORT_TC1) > + else if (display->platform.alderlake_s && port >= PORT_TC1) > return PHY_B + port - PORT_TC1; > - else if ((IS_DG1(i915) || IS_ROCKETLAKE(i915)) && port >= PORT_TC1) > + else if ((display->platform.dg1 || display->platform.rocketlake) && > +port >= PORT_TC1) > return PHY_C + port - PORT_TC1; > - else if ((IS_JASPERLAKE(i915) || IS_ELKHARTLAKE(i915)) && > + else if ((display->platform.jasperlake || > +display->platform.elkhartlake) && > port == PORT_D) > return PHY_A; > > @@ -1882,12 +1882,12 @@ enum phy intel_port_to_phy(struct > drm_i915_private *i915, enum port port) } > > /* Prefer intel_encoder_to_tc() */ > -enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum > port port) > +enum tc_port intel_port_to_tc(struct intel_display *display, enum port > +port) > { > - if (!intel_phy_is_tc(dev_priv, intel_port_to_phy(dev_priv, port))) > + if (!intel_phy_is_tc(display, intel_port_to_phy(display, port))) > return TC_PORT_NONE; > > - if (DISPLAY_VER(dev_priv) >= 12) > + if (DISPLAY_VER(display) >= 12) > return TC_PORT_1 + port - PORT_TC1; > else > return TC_PORT_1 + port - PORT_C; > @@ -1895,9 +1895,9 @@ enum tc_port intel_port_to_tc(struct > drm_i915_private *dev_priv, enum port port) > > enum phy intel_encoder_to_phy(struct intel_encoder *encoder) { > - struct drm_i915_private *i915 = to_i915(encoder->base.dev); > + struct intel_display *display = to_intel_display(encoder); > > - return intel_port_to_phy(i915, encoder->port); > + return intel_port_to_phy(display, encoder->port); > } > > bool intel_encoder_is_combo(struct intel_encoder *encoder) @@ -1916,16 > +1916,16 @@ bool intel_encoder_is_snps(struct intel_encoder *encoder) > > bool intel_encoder_is_tc(struct intel_encoder *encoder) { > - struct drm_i915_private *i915 = to_i915(encoder->base.dev); > + struct intel_display *display = to_intel_display(encoder); > > - return intel_phy_is_tc(i915, intel_encoder_to_phy(encoder)); > + return intel_phy_is_tc(display, intel_encoder_to_phy(encoder)); > } > > enum tc_port intel_encoder_to_tc(struct intel_encoder *encoder) { > - struct drm_i915_private *i915 = to_i915(encoder->base.dev); > + struct intel_display *display = to_intel_display(encoder); > > - return intel_port_to_tc(i915, encoder->port); > + return intel_port_to_tc(display, encoder->port); > } > > enum intel_display_power_domain > diff --git a/drivers/gpu/drm/i915/display/intel_display.h > b/drivers/gpu/drm/i915/display/intel_display.h > index bc9a5a14ca6a..45d70d3e1041 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -426,7 +426,7 @@ intel_mode_valid_max_plane_size(struct intel_display > *display, enum drm_mode_status intel_cpu_transcoder_mode_valid(struct > intel_display *display, > const struct drm_display_mode *mode); - > enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port); > +enum phy intel_port_to_phy(struct intel_display *display, enum port > +port); > bool is_trans_port_sync_mode(const struct intel_crtc_state *state); bool > is_trans_port_sync_master(const struct intel_crtc_state *state); > u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state); > @@ -465,10 +465,9 @@ intel_encoder_current_mode(struct intel_encoder > *encoder); void intel_encoder_get_config(struct intel_encoder *encoder, > struct intel_crtc_state *crtc_state); bool > intel_phy_is_combo(struct intel_display *display, enum phy phy); -bool > intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy); > +bool intel_phy_is_tc(struct intel_display *display, enum phy phy); > bool intel_phy_is_snps(struct intel_display *display, enum phy phy); -enum > tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, > - enum port port); > +enum tc_port intel_port_to_tc(struct intel_display *display, enum port > +port); > > enum phy intel_encoder_to_phy(struct intel_encoder *encoder); bool > intel_encoder_is_combo(struct intel_encoder *encoder); diff --git > a/drivers/gpu/drm/i915/display/intel_display_power_well.c > b/drivers/gpu/drm/i915/display/intel_display_power_well.c > index 5b60db597329..8ec87ffd87d2 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c > @@ -549,10 +549,9 @@ static void > icl_aux_power_well_enable(struct intel_display *display, > struct i915_power_well *power_well) { > - struct drm_i915_private *dev_priv = to_i915(display->drm); > enum phy phy = icl_aux_pw_to_phy(display, power_well); > > - if (intel_phy_is_tc(dev_priv, phy)) > + if (intel_phy_is_tc(display, phy)) > return icl_tc_phy_aux_power_well_enable(display, > power_well); > else if (display->platform.icelake) > return icl_combo_phy_aux_power_well_enable(display, > @@ -565,10 +564,9 @@ static void > icl_aux_power_well_disable(struct intel_display *display, > struct i915_power_well *power_well) { > - struct drm_i915_private *dev_priv = to_i915(display->drm); > enum phy phy = icl_aux_pw_to_phy(display, power_well); > > - if (intel_phy_is_tc(dev_priv, phy)) > + if (intel_phy_is_tc(display, phy)) > return hsw_power_well_disable(display, power_well); > else if (display->platform.icelake) > return icl_combo_phy_aux_power_well_disable(display, > @@ -1829,11 +1827,10 @@ tgl_tc_cold_off_power_well_is_enabled(struct > intel_display *display, static void xelpdp_aux_power_well_enable(struct > intel_display *display, > struct i915_power_well > *power_well) { > - struct drm_i915_private *dev_priv = to_i915(display->drm); > enum aux_ch aux_ch = i915_power_well_instance(power_well)- > >xelpdp.aux_ch; > enum phy phy = icl_aux_pw_to_phy(display, power_well); > > - if (intel_phy_is_tc(dev_priv, phy)) > + if (intel_phy_is_tc(display, phy)) > icl_tc_port_assert_ref_held(display, power_well, > aux_ch_to_digital_port(display, > aux_ch)); > LGTM, Reviewed-by: Nemesa Garg <nemesa.garg@intel.com> > -- > 2.39.5 ^ permalink raw reply [flat|nested] 20+ messages in thread
* RE: [PATCH 1/5] drm/i915/display: convert various port/phy helpers to struct intel_display 2025-03-04 12:32 ` Garg, Nemesa @ 2025-03-05 18:39 ` Jani Nikula 0 siblings, 0 replies; 20+ messages in thread From: Jani Nikula @ 2025-03-05 18:39 UTC (permalink / raw) To: Garg, Nemesa, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org On Tue, 04 Mar 2025, "Garg, Nemesa" <nemesa.garg@intel.com> wrote: > LGTM, > Reviewed-by: Nemesa Garg <nemesa.garg@intel.com> Thanks for the reviews, series pushed to drm-intel-next. BR, Jani. -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 2/5] drm/i915/display: convert some intel_display.[ch] functions to struct intel_display 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula 2025-03-04 10:27 ` [PATCH 1/5] drm/i915/display: convert various port/phy helpers " Jani Nikula @ 2025-03-04 10:27 ` Jani Nikula 2025-03-04 12:40 ` Garg, Nemesa 2025-03-04 10:27 ` [PATCH 3/5] drm/i915/display: convert intel_has_pending_fb_unpin() " Jani Nikula ` (10 subsequent siblings) 12 siblings, 1 reply; 20+ messages in thread From: Jani Nikula @ 2025-03-04 10:27 UTC (permalink / raw) To: intel-gfx, intel-xe; +Cc: jani.nikula Going forward, struct intel_display is the main display device data pointer. The intel_display.[ch] files are too big to convert in one go. Convert the interface towards intel_display_driver.c to struct intel_display. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 161 +++++++++--------- drivers/gpu/drm/i915/display/intel_display.h | 11 +- .../drm/i915/display/intel_display_driver.c | 10 +- 3 files changed, 94 insertions(+), 88 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 9d4f2dacbbce..debf9826fd2f 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -182,16 +182,17 @@ int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv, return hpll; } -void intel_update_czclk(struct drm_i915_private *dev_priv) +void intel_update_czclk(struct intel_display *display) { - if (!(IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))) + struct drm_i915_private *dev_priv = to_i915(display->drm); + + if (!display->platform.valleyview && !display->platform.cherryview) return; dev_priv->czclk_freq = vlv_get_cck_clock_hpll(dev_priv, "czclk", CCK_CZ_CLOCK_CONTROL); - drm_dbg(&dev_priv->drm, "CZ clock rate: %d kHz\n", - dev_priv->czclk_freq); + drm_dbg_kms(display->drm, "CZ clock rate: %d kHz\n", dev_priv->czclk_freq); } static bool is_hdr_mode(const struct intel_crtc_state *crtc_state) @@ -2547,8 +2548,10 @@ intel_link_compute_m_n(u16 bits_per_pixel_x16, int nlanes, 0x80000); } -void intel_panel_sanitize_ssc(struct drm_i915_private *dev_priv) +void intel_panel_sanitize_ssc(struct intel_display *display) { + struct drm_i915_private *dev_priv = to_i915(display->drm); + /* * There may be no VBT; and if the BIOS enabled SSC we can * just keep using it to avoid unnecessary flicker. Whereas if the @@ -2556,16 +2559,16 @@ void intel_panel_sanitize_ssc(struct drm_i915_private *dev_priv) * indicates as much. */ if (HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv)) { - bool bios_lvds_use_ssc = intel_de_read(dev_priv, + bool bios_lvds_use_ssc = intel_de_read(display, PCH_DREF_CONTROL) & DREF_SSC1_ENABLE; - if (dev_priv->display.vbt.lvds_use_ssc != bios_lvds_use_ssc) { - drm_dbg_kms(&dev_priv->drm, + if (display->vbt.lvds_use_ssc != bios_lvds_use_ssc) { + drm_dbg_kms(display->drm, "SSC %s by BIOS, overriding VBT which says %s\n", str_enabled_disabled(bios_lvds_use_ssc), - str_enabled_disabled(dev_priv->display.vbt.lvds_use_ssc)); - dev_priv->display.vbt.lvds_use_ssc = bios_lvds_use_ssc; + str_enabled_disabled(display->vbt.lvds_use_ssc)); + display->vbt.lvds_use_ssc = bios_lvds_use_ssc; } } } @@ -7635,37 +7638,39 @@ static u32 intel_encoder_possible_crtcs(struct intel_encoder *encoder) return possible_crtcs; } -static bool ilk_has_edp_a(struct drm_i915_private *dev_priv) +static bool ilk_has_edp_a(struct intel_display *display) { - if (!IS_MOBILE(dev_priv)) + if (!display->platform.mobile) return false; - if ((intel_de_read(dev_priv, DP_A) & DP_DETECTED) == 0) + if ((intel_de_read(display, DP_A) & DP_DETECTED) == 0) return false; - if (IS_IRONLAKE(dev_priv) && (intel_de_read(dev_priv, FUSE_STRAP) & ILK_eDP_A_DISABLE)) + if (display->platform.ironlake && (intel_de_read(display, FUSE_STRAP) & ILK_eDP_A_DISABLE)) return false; return true; } -static bool intel_ddi_crt_present(struct drm_i915_private *dev_priv) +static bool intel_ddi_crt_present(struct intel_display *display) { - if (DISPLAY_VER(dev_priv) >= 9) + struct drm_i915_private *dev_priv = to_i915(display->drm); + + if (DISPLAY_VER(display) >= 9) return false; - if (IS_HASWELL_ULT(dev_priv) || IS_BROADWELL_ULT(dev_priv)) + if (display->platform.haswell_ult || display->platform.broadwell_ult) return false; if (HAS_PCH_LPT_H(dev_priv) && - intel_de_read(dev_priv, SFUSE_STRAP) & SFUSE_STRAP_CRT_DISABLED) + intel_de_read(display, SFUSE_STRAP) & SFUSE_STRAP_CRT_DISABLED) return false; /* DDI E can't be used if DDI A requires 4 lanes */ - if (intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) + if (intel_de_read(display, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) return false; - if (!dev_priv->display.vbt.int_crt_support) + if (!display->vbt.int_crt_support) return false; return true; @@ -7677,24 +7682,24 @@ bool assert_port_valid(struct intel_display *display, enum port port) "Platform does not support port %c\n", port_name(port)); } -void intel_setup_outputs(struct drm_i915_private *dev_priv) +void intel_setup_outputs(struct intel_display *display) { - struct intel_display *display = &dev_priv->display; + struct drm_i915_private *dev_priv = to_i915(display->drm); struct intel_encoder *encoder; bool dpd_is_edp = false; intel_pps_unlock_regs_wa(display); - if (!HAS_DISPLAY(dev_priv)) + if (!HAS_DISPLAY(display)) return; - if (HAS_DDI(dev_priv)) { - if (intel_ddi_crt_present(dev_priv)) + if (HAS_DDI(display)) { + if (intel_ddi_crt_present(display)) intel_crt_init(display); intel_bios_for_each_encoder(display, intel_ddi_init); - if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) + if (display->platform.geminilake || display->platform.broxton) vlv_dsi_init(dev_priv); } else if (HAS_PCH_SPLIT(dev_priv)) { int found; @@ -7709,33 +7714,33 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv) dpd_is_edp = intel_dp_is_port_edp(display, PORT_D); - if (ilk_has_edp_a(dev_priv)) + if (ilk_has_edp_a(display)) g4x_dp_init(display, DP_A, PORT_A); - if (intel_de_read(dev_priv, PCH_HDMIB) & SDVO_DETECTED) { + if (intel_de_read(display, PCH_HDMIB) & SDVO_DETECTED) { /* PCH SDVOB multiplex with HDMIB */ found = intel_sdvo_init(display, PCH_SDVOB, PORT_B); if (!found) g4x_hdmi_init(display, PCH_HDMIB, PORT_B); - if (!found && (intel_de_read(dev_priv, PCH_DP_B) & DP_DETECTED)) + if (!found && (intel_de_read(display, PCH_DP_B) & DP_DETECTED)) g4x_dp_init(display, PCH_DP_B, PORT_B); } - if (intel_de_read(dev_priv, PCH_HDMIC) & SDVO_DETECTED) + if (intel_de_read(display, PCH_HDMIC) & SDVO_DETECTED) g4x_hdmi_init(display, PCH_HDMIC, PORT_C); - if (!dpd_is_edp && intel_de_read(dev_priv, PCH_HDMID) & SDVO_DETECTED) + if (!dpd_is_edp && intel_de_read(display, PCH_HDMID) & SDVO_DETECTED) g4x_hdmi_init(display, PCH_HDMID, PORT_D); - if (intel_de_read(dev_priv, PCH_DP_C) & DP_DETECTED) + if (intel_de_read(display, PCH_DP_C) & DP_DETECTED) g4x_dp_init(display, PCH_DP_C, PORT_C); - if (intel_de_read(dev_priv, PCH_DP_D) & DP_DETECTED) + if (intel_de_read(display, PCH_DP_D) & DP_DETECTED) g4x_dp_init(display, PCH_DP_D, PORT_D); - } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { + } else if (display->platform.valleyview || display->platform.cherryview) { bool has_edp, has_port; - if (IS_VALLEYVIEW(dev_priv) && dev_priv->display.vbt.int_crt_support) + if (display->platform.valleyview && display->vbt.int_crt_support) intel_crt_init(display); /* @@ -7755,87 +7760,87 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv) */ has_edp = intel_dp_is_port_edp(display, PORT_B); has_port = intel_bios_is_port_present(display, PORT_B); - if (intel_de_read(dev_priv, VLV_DP_B) & DP_DETECTED || has_port) + if (intel_de_read(display, VLV_DP_B) & DP_DETECTED || has_port) has_edp &= g4x_dp_init(display, VLV_DP_B, PORT_B); - if ((intel_de_read(dev_priv, VLV_HDMIB) & SDVO_DETECTED || has_port) && !has_edp) + if ((intel_de_read(display, VLV_HDMIB) & SDVO_DETECTED || has_port) && !has_edp) g4x_hdmi_init(display, VLV_HDMIB, PORT_B); has_edp = intel_dp_is_port_edp(display, PORT_C); has_port = intel_bios_is_port_present(display, PORT_C); - if (intel_de_read(dev_priv, VLV_DP_C) & DP_DETECTED || has_port) + if (intel_de_read(display, VLV_DP_C) & DP_DETECTED || has_port) has_edp &= g4x_dp_init(display, VLV_DP_C, PORT_C); - if ((intel_de_read(dev_priv, VLV_HDMIC) & SDVO_DETECTED || has_port) && !has_edp) + if ((intel_de_read(display, VLV_HDMIC) & SDVO_DETECTED || has_port) && !has_edp) g4x_hdmi_init(display, VLV_HDMIC, PORT_C); - if (IS_CHERRYVIEW(dev_priv)) { + if (display->platform.cherryview) { /* * eDP not supported on port D, * so no need to worry about it */ has_port = intel_bios_is_port_present(display, PORT_D); - if (intel_de_read(dev_priv, CHV_DP_D) & DP_DETECTED || has_port) + if (intel_de_read(display, CHV_DP_D) & DP_DETECTED || has_port) g4x_dp_init(display, CHV_DP_D, PORT_D); - if (intel_de_read(dev_priv, CHV_HDMID) & SDVO_DETECTED || has_port) + if (intel_de_read(display, CHV_HDMID) & SDVO_DETECTED || has_port) g4x_hdmi_init(display, CHV_HDMID, PORT_D); } vlv_dsi_init(dev_priv); - } else if (IS_PINEVIEW(dev_priv)) { + } else if (display->platform.pineview) { intel_lvds_init(dev_priv); intel_crt_init(display); - } else if (IS_DISPLAY_VER(dev_priv, 3, 4)) { + } else if (IS_DISPLAY_VER(display, 3, 4)) { bool found = false; - if (IS_MOBILE(dev_priv)) + if (display->platform.mobile) intel_lvds_init(dev_priv); intel_crt_init(display); - if (intel_de_read(dev_priv, GEN3_SDVOB) & SDVO_DETECTED) { - drm_dbg_kms(&dev_priv->drm, "probing SDVOB\n"); + if (intel_de_read(display, GEN3_SDVOB) & SDVO_DETECTED) { + drm_dbg_kms(display->drm, "probing SDVOB\n"); found = intel_sdvo_init(display, GEN3_SDVOB, PORT_B); - if (!found && IS_G4X(dev_priv)) { - drm_dbg_kms(&dev_priv->drm, + if (!found && display->platform.g4x) { + drm_dbg_kms(display->drm, "probing HDMI on SDVOB\n"); g4x_hdmi_init(display, GEN4_HDMIB, PORT_B); } - if (!found && IS_G4X(dev_priv)) + if (!found && display->platform.g4x) g4x_dp_init(display, DP_B, PORT_B); } /* Before G4X SDVOC doesn't have its own detect register */ - if (intel_de_read(dev_priv, GEN3_SDVOB) & SDVO_DETECTED) { - drm_dbg_kms(&dev_priv->drm, "probing SDVOC\n"); + if (intel_de_read(display, GEN3_SDVOB) & SDVO_DETECTED) { + drm_dbg_kms(display->drm, "probing SDVOC\n"); found = intel_sdvo_init(display, GEN3_SDVOC, PORT_C); } - if (!found && (intel_de_read(dev_priv, GEN3_SDVOC) & SDVO_DETECTED)) { + if (!found && (intel_de_read(display, GEN3_SDVOC) & SDVO_DETECTED)) { - if (IS_G4X(dev_priv)) { - drm_dbg_kms(&dev_priv->drm, + if (display->platform.g4x) { + drm_dbg_kms(display->drm, "probing HDMI on SDVOC\n"); g4x_hdmi_init(display, GEN4_HDMIC, PORT_C); } - if (IS_G4X(dev_priv)) + if (display->platform.g4x) g4x_dp_init(display, DP_C, PORT_C); } - if (IS_G4X(dev_priv) && (intel_de_read(dev_priv, DP_D) & DP_DETECTED)) + if (display->platform.g4x && (intel_de_read(display, DP_D) & DP_DETECTED)) g4x_dp_init(display, DP_D, PORT_D); - if (SUPPORTS_TV(dev_priv)) + if (SUPPORTS_TV(display)) intel_tv_init(display); - } else if (DISPLAY_VER(dev_priv) == 2) { - if (IS_I85X(dev_priv)) + } else if (DISPLAY_VER(display) == 2) { + if (display->platform.i85x) intel_lvds_init(dev_priv); intel_crt_init(display); intel_dvo_init(dev_priv); } - for_each_intel_encoder(&dev_priv->drm, encoder) { + for_each_intel_encoder(display->drm, encoder) { encoder->base.possible_crtcs = intel_encoder_possible_crtcs(encoder); encoder->base.possible_clones = @@ -7844,7 +7849,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv) intel_init_pch_refclk(dev_priv); - drm_helper_move_panel_connectors_to_head(&dev_priv->drm); + drm_helper_move_panel_connectors_to_head(display->drm); } static int max_dotclock(struct drm_i915_private *i915) @@ -8061,32 +8066,34 @@ static const struct intel_display_funcs i9xx_display_funcs = { /** * intel_init_display_hooks - initialize the display modesetting hooks - * @dev_priv: device private + * @display: display device private */ -void intel_init_display_hooks(struct drm_i915_private *dev_priv) +void intel_init_display_hooks(struct intel_display *display) { - if (DISPLAY_VER(dev_priv) >= 9) { - dev_priv->display.funcs.display = &skl_display_funcs; - } else if (HAS_DDI(dev_priv)) { - dev_priv->display.funcs.display = &ddi_display_funcs; + struct drm_i915_private *dev_priv = to_i915(display->drm); + + if (DISPLAY_VER(display) >= 9) { + display->funcs.display = &skl_display_funcs; + } else if (HAS_DDI(display)) { + display->funcs.display = &ddi_display_funcs; } else if (HAS_PCH_SPLIT(dev_priv)) { - dev_priv->display.funcs.display = &pch_split_display_funcs; - } else if (IS_CHERRYVIEW(dev_priv) || - IS_VALLEYVIEW(dev_priv)) { - dev_priv->display.funcs.display = &vlv_display_funcs; + display->funcs.display = &pch_split_display_funcs; + } else if (display->platform.cherryview || + display->platform.valleyview) { + display->funcs.display = &vlv_display_funcs; } else { - dev_priv->display.funcs.display = &i9xx_display_funcs; + display->funcs.display = &i9xx_display_funcs; } } -int intel_initial_commit(struct drm_device *dev) +int intel_initial_commit(struct intel_display *display) { struct drm_atomic_state *state = NULL; struct drm_modeset_acquire_ctx ctx; struct intel_crtc *crtc; int ret = 0; - state = drm_atomic_state_alloc(dev); + state = drm_atomic_state_alloc(display->drm); if (!state) return -ENOMEM; @@ -8096,7 +8103,7 @@ int intel_initial_commit(struct drm_device *dev) to_intel_atomic_state(state)->internal = true; retry: - for_each_intel_crtc(dev, crtc) { + for_each_intel_crtc(display->drm, crtc) { struct intel_crtc_state *crtc_state = intel_atomic_get_crtc_state(state, crtc); @@ -8120,7 +8127,7 @@ int intel_initial_commit(struct drm_device *dev) */ crtc_state->uapi.color_mgmt_changed = true; - for_each_intel_encoder_mask(dev, encoder, + for_each_intel_encoder_mask(display->drm, encoder, crtc_state->uapi.encoder_mask) { if (encoder->initial_fastset_check && !encoder->initial_fastset_check(encoder, crtc_state)) { diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 45d70d3e1041..83a820b72a6e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -457,7 +457,6 @@ int vlv_get_cck_clock(struct drm_i915_private *dev_priv, const char *name, u32 reg, int ref_freq); int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv, const char *name, u32 reg); -void intel_init_display_hooks(struct drm_i915_private *dev_priv); bool intel_has_pending_fb_unpin(struct drm_i915_private *dev_priv); void intel_encoder_destroy(struct drm_encoder *encoder); struct drm_display_mode * @@ -541,11 +540,11 @@ void intel_modeset_put_crtc_power_domains(struct intel_crtc *crtc, struct intel_power_domain_mask *domains); /* interface for intel_display_driver.c */ -void intel_setup_outputs(struct drm_i915_private *i915); -int intel_initial_commit(struct drm_device *dev); -void intel_panel_sanitize_ssc(struct drm_i915_private *i915); -void intel_update_czclk(struct drm_i915_private *i915); -void intel_atomic_helper_free_state_worker(struct work_struct *work); +void intel_init_display_hooks(struct intel_display *display); +void intel_setup_outputs(struct intel_display *display); +int intel_initial_commit(struct intel_display *display); +void intel_panel_sanitize_ssc(struct intel_display *display); +void intel_update_czclk(struct intel_display *display); enum drm_mode_status intel_mode_valid(struct drm_device *dev, const struct drm_display_mode *mode); int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state, diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c index 68d0753659e8..31740a677dd8 100644 --- a/drivers/gpu/drm/i915/display/intel_display_driver.c +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c @@ -199,7 +199,7 @@ void intel_display_driver_early_probe(struct intel_display *display) intel_init_cdclk_hooks(display); intel_audio_hooks_init(display); intel_dpll_init_clock_hook(i915); - intel_init_display_hooks(i915); + intel_init_display_hooks(display); intel_fdi_init_hook(display); intel_dmc_wl_init(display); } @@ -431,7 +431,7 @@ int intel_display_driver_probe_nogem(struct intel_display *display) intel_wm_init(i915); - intel_panel_sanitize_ssc(i915); + intel_panel_sanitize_ssc(display); intel_pps_setup(display); @@ -451,7 +451,7 @@ int intel_display_driver_probe_nogem(struct intel_display *display) intel_shared_dpll_init(display); intel_fdi_pll_freq_update(display); - intel_update_czclk(i915); + intel_update_czclk(display); intel_display_driver_init_hw(display); intel_dpll_update_ref_clks(display); @@ -462,7 +462,7 @@ int intel_display_driver_probe_nogem(struct intel_display *display) /* Just disable it once at startup */ intel_vga_disable(display); - intel_setup_outputs(i915); + intel_setup_outputs(display); ret = intel_dp_tunnel_mgr_init(display); if (ret) @@ -517,7 +517,7 @@ int intel_display_driver_probe(struct intel_display *display) * are already calculated and there is no assert_plane warnings * during bootup. */ - ret = intel_initial_commit(display->drm); + ret = intel_initial_commit(display); if (ret) drm_dbg_kms(display->drm, "Initial modeset failed, %d\n", ret); -- 2.39.5 ^ permalink raw reply related [flat|nested] 20+ messages in thread
* RE: [PATCH 2/5] drm/i915/display: convert some intel_display.[ch] functions to struct intel_display 2025-03-04 10:27 ` [PATCH 2/5] drm/i915/display: convert some intel_display.[ch] functions " Jani Nikula @ 2025-03-04 12:40 ` Garg, Nemesa 0 siblings, 0 replies; 20+ messages in thread From: Garg, Nemesa @ 2025-03-04 12:40 UTC (permalink / raw) To: Nikula, Jani, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Nikula, Jani > -----Original Message----- > From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Jani > Nikula > Sent: Tuesday, March 4, 2025 3:58 PM > To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org > Cc: Nikula, Jani <jani.nikula@intel.com> > Subject: [PATCH 2/5] drm/i915/display: convert some intel_display.[ch] > functions to struct intel_display > > Going forward, struct intel_display is the main display device data pointer. The > intel_display.[ch] files are too big to convert in one go. Convert the interface > towards intel_display_driver.c to struct intel_display. > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 161 +++++++++--------- > drivers/gpu/drm/i915/display/intel_display.h | 11 +- > .../drm/i915/display/intel_display_driver.c | 10 +- > 3 files changed, 94 insertions(+), 88 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index 9d4f2dacbbce..debf9826fd2f 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -182,16 +182,17 @@ int vlv_get_cck_clock_hpll(struct drm_i915_private > *dev_priv, > return hpll; > } > > -void intel_update_czclk(struct drm_i915_private *dev_priv) > +void intel_update_czclk(struct intel_display *display) > { > - if (!(IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))) > + struct drm_i915_private *dev_priv = to_i915(display->drm); > + > + if (!display->platform.valleyview && !display->platform.cherryview) > return; > > dev_priv->czclk_freq = vlv_get_cck_clock_hpll(dev_priv, "czclk", > > CCK_CZ_CLOCK_CONTROL); > > - drm_dbg(&dev_priv->drm, "CZ clock rate: %d kHz\n", > - dev_priv->czclk_freq); > + drm_dbg_kms(display->drm, "CZ clock rate: %d kHz\n", > +dev_priv->czclk_freq); > } > > static bool is_hdr_mode(const struct intel_crtc_state *crtc_state) @@ -2547,8 > +2548,10 @@ intel_link_compute_m_n(u16 bits_per_pixel_x16, int nlanes, > 0x80000); > } > > -void intel_panel_sanitize_ssc(struct drm_i915_private *dev_priv) > +void intel_panel_sanitize_ssc(struct intel_display *display) > { > + struct drm_i915_private *dev_priv = to_i915(display->drm); > + > /* > * There may be no VBT; and if the BIOS enabled SSC we can > * just keep using it to avoid unnecessary flicker. Whereas if the @@ - > 2556,16 +2559,16 @@ void intel_panel_sanitize_ssc(struct drm_i915_private > *dev_priv) > * indicates as much. > */ > if (HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv)) { > - bool bios_lvds_use_ssc = intel_de_read(dev_priv, > + bool bios_lvds_use_ssc = intel_de_read(display, > PCH_DREF_CONTROL) & > DREF_SSC1_ENABLE; > > - if (dev_priv->display.vbt.lvds_use_ssc != bios_lvds_use_ssc) { > - drm_dbg_kms(&dev_priv->drm, > + if (display->vbt.lvds_use_ssc != bios_lvds_use_ssc) { > + drm_dbg_kms(display->drm, > "SSC %s by BIOS, overriding VBT which says > %s\n", > str_enabled_disabled(bios_lvds_use_ssc), > - str_enabled_disabled(dev_priv- > >display.vbt.lvds_use_ssc)); > - dev_priv->display.vbt.lvds_use_ssc = > bios_lvds_use_ssc; > + str_enabled_disabled(display- > >vbt.lvds_use_ssc)); > + display->vbt.lvds_use_ssc = bios_lvds_use_ssc; > } > } > } > @@ -7635,37 +7638,39 @@ static u32 intel_encoder_possible_crtcs(struct > intel_encoder *encoder) > return possible_crtcs; > } > > -static bool ilk_has_edp_a(struct drm_i915_private *dev_priv) > +static bool ilk_has_edp_a(struct intel_display *display) > { > - if (!IS_MOBILE(dev_priv)) > + if (!display->platform.mobile) > return false; > > - if ((intel_de_read(dev_priv, DP_A) & DP_DETECTED) == 0) > + if ((intel_de_read(display, DP_A) & DP_DETECTED) == 0) > return false; > > - if (IS_IRONLAKE(dev_priv) && (intel_de_read(dev_priv, FUSE_STRAP) > & ILK_eDP_A_DISABLE)) > + if (display->platform.ironlake && (intel_de_read(display, FUSE_STRAP) > +& ILK_eDP_A_DISABLE)) > return false; > > return true; > } > > -static bool intel_ddi_crt_present(struct drm_i915_private *dev_priv) > +static bool intel_ddi_crt_present(struct intel_display *display) > { > - if (DISPLAY_VER(dev_priv) >= 9) > + struct drm_i915_private *dev_priv = to_i915(display->drm); > + > + if (DISPLAY_VER(display) >= 9) > return false; > > - if (IS_HASWELL_ULT(dev_priv) || IS_BROADWELL_ULT(dev_priv)) > + if (display->platform.haswell_ult || display->platform.broadwell_ult) > return false; > > if (HAS_PCH_LPT_H(dev_priv) && > - intel_de_read(dev_priv, SFUSE_STRAP) & > SFUSE_STRAP_CRT_DISABLED) > + intel_de_read(display, SFUSE_STRAP) & > SFUSE_STRAP_CRT_DISABLED) > return false; > > /* DDI E can't be used if DDI A requires 4 lanes */ > - if (intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) & > DDI_A_4_LANES) > + if (intel_de_read(display, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) > return false; > > - if (!dev_priv->display.vbt.int_crt_support) > + if (!display->vbt.int_crt_support) > return false; > > return true; > @@ -7677,24 +7682,24 @@ bool assert_port_valid(struct intel_display > *display, enum port port) > "Platform does not support port %c\n", > port_name(port)); } > > -void intel_setup_outputs(struct drm_i915_private *dev_priv) > +void intel_setup_outputs(struct intel_display *display) > { > - struct intel_display *display = &dev_priv->display; > + struct drm_i915_private *dev_priv = to_i915(display->drm); > struct intel_encoder *encoder; > bool dpd_is_edp = false; > > intel_pps_unlock_regs_wa(display); > > - if (!HAS_DISPLAY(dev_priv)) > + if (!HAS_DISPLAY(display)) > return; > > - if (HAS_DDI(dev_priv)) { > - if (intel_ddi_crt_present(dev_priv)) > + if (HAS_DDI(display)) { > + if (intel_ddi_crt_present(display)) > intel_crt_init(display); > > intel_bios_for_each_encoder(display, intel_ddi_init); > > - if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) > + if (display->platform.geminilake || display->platform.broxton) > vlv_dsi_init(dev_priv); > } else if (HAS_PCH_SPLIT(dev_priv)) { > int found; > @@ -7709,33 +7714,33 @@ void intel_setup_outputs(struct > drm_i915_private *dev_priv) > > dpd_is_edp = intel_dp_is_port_edp(display, PORT_D); > > - if (ilk_has_edp_a(dev_priv)) > + if (ilk_has_edp_a(display)) > g4x_dp_init(display, DP_A, PORT_A); > > - if (intel_de_read(dev_priv, PCH_HDMIB) & SDVO_DETECTED) > { > + if (intel_de_read(display, PCH_HDMIB) & SDVO_DETECTED) { > /* PCH SDVOB multiplex with HDMIB */ > found = intel_sdvo_init(display, PCH_SDVOB, > PORT_B); > if (!found) > g4x_hdmi_init(display, PCH_HDMIB, PORT_B); > - if (!found && (intel_de_read(dev_priv, PCH_DP_B) & > DP_DETECTED)) > + if (!found && (intel_de_read(display, PCH_DP_B) & > DP_DETECTED)) > g4x_dp_init(display, PCH_DP_B, PORT_B); > } > > - if (intel_de_read(dev_priv, PCH_HDMIC) & SDVO_DETECTED) > + if (intel_de_read(display, PCH_HDMIC) & SDVO_DETECTED) > g4x_hdmi_init(display, PCH_HDMIC, PORT_C); > > - if (!dpd_is_edp && intel_de_read(dev_priv, PCH_HDMID) & > SDVO_DETECTED) > + if (!dpd_is_edp && intel_de_read(display, PCH_HDMID) & > SDVO_DETECTED) > g4x_hdmi_init(display, PCH_HDMID, PORT_D); > > - if (intel_de_read(dev_priv, PCH_DP_C) & DP_DETECTED) > + if (intel_de_read(display, PCH_DP_C) & DP_DETECTED) > g4x_dp_init(display, PCH_DP_C, PORT_C); > > - if (intel_de_read(dev_priv, PCH_DP_D) & DP_DETECTED) > + if (intel_de_read(display, PCH_DP_D) & DP_DETECTED) > g4x_dp_init(display, PCH_DP_D, PORT_D); > - } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { > + } else if (display->platform.valleyview || > +display->platform.cherryview) { > bool has_edp, has_port; > > - if (IS_VALLEYVIEW(dev_priv) && dev_priv- > >display.vbt.int_crt_support) > + if (display->platform.valleyview && display- > >vbt.int_crt_support) > intel_crt_init(display); > > /* > @@ -7755,87 +7760,87 @@ void intel_setup_outputs(struct > drm_i915_private *dev_priv) > */ > has_edp = intel_dp_is_port_edp(display, PORT_B); > has_port = intel_bios_is_port_present(display, PORT_B); > - if (intel_de_read(dev_priv, VLV_DP_B) & DP_DETECTED || > has_port) > + if (intel_de_read(display, VLV_DP_B) & DP_DETECTED || > has_port) > has_edp &= g4x_dp_init(display, VLV_DP_B, PORT_B); > - if ((intel_de_read(dev_priv, VLV_HDMIB) & SDVO_DETECTED > || has_port) && !has_edp) > + if ((intel_de_read(display, VLV_HDMIB) & SDVO_DETECTED || > has_port) > +&& !has_edp) > g4x_hdmi_init(display, VLV_HDMIB, PORT_B); > > has_edp = intel_dp_is_port_edp(display, PORT_C); > has_port = intel_bios_is_port_present(display, PORT_C); > - if (intel_de_read(dev_priv, VLV_DP_C) & DP_DETECTED || > has_port) > + if (intel_de_read(display, VLV_DP_C) & DP_DETECTED || > has_port) > has_edp &= g4x_dp_init(display, VLV_DP_C, PORT_C); > - if ((intel_de_read(dev_priv, VLV_HDMIC) & SDVO_DETECTED > || has_port) && !has_edp) > + if ((intel_de_read(display, VLV_HDMIC) & SDVO_DETECTED || > has_port) > +&& !has_edp) > g4x_hdmi_init(display, VLV_HDMIC, PORT_C); > > - if (IS_CHERRYVIEW(dev_priv)) { > + if (display->platform.cherryview) { > /* > * eDP not supported on port D, > * so no need to worry about it > */ > has_port = intel_bios_is_port_present(display, > PORT_D); > - if (intel_de_read(dev_priv, CHV_DP_D) & > DP_DETECTED || has_port) > + if (intel_de_read(display, CHV_DP_D) & DP_DETECTED > || has_port) > g4x_dp_init(display, CHV_DP_D, PORT_D); > - if (intel_de_read(dev_priv, CHV_HDMID) & > SDVO_DETECTED || has_port) > + if (intel_de_read(display, CHV_HDMID) & > SDVO_DETECTED || has_port) > g4x_hdmi_init(display, CHV_HDMID, > PORT_D); > } > > vlv_dsi_init(dev_priv); > - } else if (IS_PINEVIEW(dev_priv)) { > + } else if (display->platform.pineview) { > intel_lvds_init(dev_priv); > intel_crt_init(display); > - } else if (IS_DISPLAY_VER(dev_priv, 3, 4)) { > + } else if (IS_DISPLAY_VER(display, 3, 4)) { > bool found = false; > > - if (IS_MOBILE(dev_priv)) > + if (display->platform.mobile) > intel_lvds_init(dev_priv); > > intel_crt_init(display); > > - if (intel_de_read(dev_priv, GEN3_SDVOB) & SDVO_DETECTED) > { > - drm_dbg_kms(&dev_priv->drm, "probing SDVOB\n"); > + if (intel_de_read(display, GEN3_SDVOB) & SDVO_DETECTED) { > + drm_dbg_kms(display->drm, "probing SDVOB\n"); > found = intel_sdvo_init(display, GEN3_SDVOB, > PORT_B); > - if (!found && IS_G4X(dev_priv)) { > - drm_dbg_kms(&dev_priv->drm, > + if (!found && display->platform.g4x) { > + drm_dbg_kms(display->drm, > "probing HDMI on SDVOB\n"); > g4x_hdmi_init(display, GEN4_HDMIB, > PORT_B); > } > > - if (!found && IS_G4X(dev_priv)) > + if (!found && display->platform.g4x) > g4x_dp_init(display, DP_B, PORT_B); > } > > /* Before G4X SDVOC doesn't have its own detect register */ > > - if (intel_de_read(dev_priv, GEN3_SDVOB) & SDVO_DETECTED) > { > - drm_dbg_kms(&dev_priv->drm, "probing SDVOC\n"); > + if (intel_de_read(display, GEN3_SDVOB) & SDVO_DETECTED) { > + drm_dbg_kms(display->drm, "probing SDVOC\n"); > found = intel_sdvo_init(display, GEN3_SDVOC, > PORT_C); > } > > - if (!found && (intel_de_read(dev_priv, GEN3_SDVOC) & > SDVO_DETECTED)) { > + if (!found && (intel_de_read(display, GEN3_SDVOC) & > SDVO_DETECTED)) { > > - if (IS_G4X(dev_priv)) { > - drm_dbg_kms(&dev_priv->drm, > + if (display->platform.g4x) { > + drm_dbg_kms(display->drm, > "probing HDMI on SDVOC\n"); > g4x_hdmi_init(display, GEN4_HDMIC, > PORT_C); > } > - if (IS_G4X(dev_priv)) > + if (display->platform.g4x) > g4x_dp_init(display, DP_C, PORT_C); > } > > - if (IS_G4X(dev_priv) && (intel_de_read(dev_priv, DP_D) & > DP_DETECTED)) > + if (display->platform.g4x && (intel_de_read(display, DP_D) & > +DP_DETECTED)) > g4x_dp_init(display, DP_D, PORT_D); > > - if (SUPPORTS_TV(dev_priv)) > + if (SUPPORTS_TV(display)) > intel_tv_init(display); > - } else if (DISPLAY_VER(dev_priv) == 2) { > - if (IS_I85X(dev_priv)) > + } else if (DISPLAY_VER(display) == 2) { > + if (display->platform.i85x) > intel_lvds_init(dev_priv); > > intel_crt_init(display); > intel_dvo_init(dev_priv); > } > > - for_each_intel_encoder(&dev_priv->drm, encoder) { > + for_each_intel_encoder(display->drm, encoder) { > encoder->base.possible_crtcs = > intel_encoder_possible_crtcs(encoder); > encoder->base.possible_clones = > @@ -7844,7 +7849,7 @@ void intel_setup_outputs(struct drm_i915_private > *dev_priv) > > intel_init_pch_refclk(dev_priv); > > - drm_helper_move_panel_connectors_to_head(&dev_priv->drm); > + drm_helper_move_panel_connectors_to_head(display->drm); > } > > static int max_dotclock(struct drm_i915_private *i915) @@ -8061,32 > +8066,34 @@ static const struct intel_display_funcs i9xx_display_funcs = { > > /** > * intel_init_display_hooks - initialize the display modesetting hooks > - * @dev_priv: device private > + * @display: display device private > */ > -void intel_init_display_hooks(struct drm_i915_private *dev_priv) > +void intel_init_display_hooks(struct intel_display *display) > { > - if (DISPLAY_VER(dev_priv) >= 9) { > - dev_priv->display.funcs.display = &skl_display_funcs; > - } else if (HAS_DDI(dev_priv)) { > - dev_priv->display.funcs.display = &ddi_display_funcs; > + struct drm_i915_private *dev_priv = to_i915(display->drm); > + > + if (DISPLAY_VER(display) >= 9) { > + display->funcs.display = &skl_display_funcs; > + } else if (HAS_DDI(display)) { > + display->funcs.display = &ddi_display_funcs; > } else if (HAS_PCH_SPLIT(dev_priv)) { > - dev_priv->display.funcs.display = &pch_split_display_funcs; > - } else if (IS_CHERRYVIEW(dev_priv) || > - IS_VALLEYVIEW(dev_priv)) { > - dev_priv->display.funcs.display = &vlv_display_funcs; > + display->funcs.display = &pch_split_display_funcs; > + } else if (display->platform.cherryview || > + display->platform.valleyview) { > + display->funcs.display = &vlv_display_funcs; > } else { > - dev_priv->display.funcs.display = &i9xx_display_funcs; > + display->funcs.display = &i9xx_display_funcs; > } > } > > -int intel_initial_commit(struct drm_device *dev) > +int intel_initial_commit(struct intel_display *display) > { > struct drm_atomic_state *state = NULL; > struct drm_modeset_acquire_ctx ctx; > struct intel_crtc *crtc; > int ret = 0; > > - state = drm_atomic_state_alloc(dev); > + state = drm_atomic_state_alloc(display->drm); > if (!state) > return -ENOMEM; > > @@ -8096,7 +8103,7 @@ int intel_initial_commit(struct drm_device *dev) > to_intel_atomic_state(state)->internal = true; > > retry: > - for_each_intel_crtc(dev, crtc) { > + for_each_intel_crtc(display->drm, crtc) { > struct intel_crtc_state *crtc_state = > intel_atomic_get_crtc_state(state, crtc); > > @@ -8120,7 +8127,7 @@ int intel_initial_commit(struct drm_device *dev) > */ > crtc_state->uapi.color_mgmt_changed = true; > > - for_each_intel_encoder_mask(dev, encoder, > + for_each_intel_encoder_mask(display->drm, encoder, > crtc_state- > >uapi.encoder_mask) { > if (encoder->initial_fastset_check && > !encoder->initial_fastset_check(encoder, > crtc_state)) { diff --git a/drivers/gpu/drm/i915/display/intel_display.h > b/drivers/gpu/drm/i915/display/intel_display.h > index 45d70d3e1041..83a820b72a6e 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -457,7 +457,6 @@ int vlv_get_cck_clock(struct drm_i915_private > *dev_priv, > const char *name, u32 reg, int ref_freq); int > vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv, > const char *name, u32 reg); > -void intel_init_display_hooks(struct drm_i915_private *dev_priv); bool > intel_has_pending_fb_unpin(struct drm_i915_private *dev_priv); void > intel_encoder_destroy(struct drm_encoder *encoder); struct > drm_display_mode * @@ -541,11 +540,11 @@ void > intel_modeset_put_crtc_power_domains(struct intel_crtc *crtc, > struct intel_power_domain_mask > *domains); > > /* interface for intel_display_driver.c */ -void intel_setup_outputs(struct > drm_i915_private *i915); -int intel_initial_commit(struct drm_device *dev); - > void intel_panel_sanitize_ssc(struct drm_i915_private *i915); -void > intel_update_czclk(struct drm_i915_private *i915); -void > intel_atomic_helper_free_state_worker(struct work_struct *work); > +void intel_init_display_hooks(struct intel_display *display); void > +intel_setup_outputs(struct intel_display *display); int > +intel_initial_commit(struct intel_display *display); void > +intel_panel_sanitize_ssc(struct intel_display *display); void > +intel_update_czclk(struct intel_display *display); > enum drm_mode_status intel_mode_valid(struct drm_device *dev, > const struct drm_display_mode *mode); > int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state > *_state, diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c > b/drivers/gpu/drm/i915/display/intel_display_driver.c > index 68d0753659e8..31740a677dd8 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_driver.c > +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c > @@ -199,7 +199,7 @@ void intel_display_driver_early_probe(struct > intel_display *display) > intel_init_cdclk_hooks(display); > intel_audio_hooks_init(display); > intel_dpll_init_clock_hook(i915); > - intel_init_display_hooks(i915); > + intel_init_display_hooks(display); > intel_fdi_init_hook(display); > intel_dmc_wl_init(display); > } > @@ -431,7 +431,7 @@ int intel_display_driver_probe_nogem(struct > intel_display *display) > > intel_wm_init(i915); > > - intel_panel_sanitize_ssc(i915); > + intel_panel_sanitize_ssc(display); > > intel_pps_setup(display); > > @@ -451,7 +451,7 @@ int intel_display_driver_probe_nogem(struct > intel_display *display) > intel_shared_dpll_init(display); > intel_fdi_pll_freq_update(display); > > - intel_update_czclk(i915); > + intel_update_czclk(display); > intel_display_driver_init_hw(display); > intel_dpll_update_ref_clks(display); > > @@ -462,7 +462,7 @@ int intel_display_driver_probe_nogem(struct > intel_display *display) > > /* Just disable it once at startup */ > intel_vga_disable(display); > - intel_setup_outputs(i915); > + intel_setup_outputs(display); > > ret = intel_dp_tunnel_mgr_init(display); > if (ret) > @@ -517,7 +517,7 @@ int intel_display_driver_probe(struct intel_display > *display) > * are already calculated and there is no assert_plane warnings > * during bootup. > */ > - ret = intel_initial_commit(display->drm); > + ret = intel_initial_commit(display); > if (ret) > drm_dbg_kms(display->drm, "Initial modeset failed, %d\n", > ret); > LGTM, Reviewed-by: Nemesa Garg <nemesa.garg@intel.com> > -- > 2.39.5 ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 3/5] drm/i915/display: convert intel_has_pending_fb_unpin() to struct intel_display 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula 2025-03-04 10:27 ` [PATCH 1/5] drm/i915/display: convert various port/phy helpers " Jani Nikula 2025-03-04 10:27 ` [PATCH 2/5] drm/i915/display: convert some intel_display.[ch] functions " Jani Nikula @ 2025-03-04 10:27 ` Jani Nikula 2025-03-04 12:48 ` Garg, Nemesa 2025-03-04 10:27 ` [PATCH 4/5] drm/i915/display: remove dupe intel_update_watermarks() declaration Jani Nikula ` (9 subsequent siblings) 12 siblings, 1 reply; 20+ messages in thread From: Jani Nikula @ 2025-03-04 10:27 UTC (permalink / raw) To: intel-gfx, intel-xe; +Cc: jani.nikula Going forward, struct intel_display is the main display device data pointer. The intel_display.[ch] files are too big to convert in one go. Convert intel_has_pending_fb_unpin() to struct intel_display. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_ddi.c | 3 ++- drivers/gpu/drm/i915/display/intel_display.c | 10 +++++----- drivers/gpu/drm/i915/display/intel_display.h | 4 ++-- drivers/gpu/drm/i915/display/intel_dp.c | 3 +-- drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 3 ++- 5 files changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 3b7ec0be9011..676c1826f15c 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4660,6 +4660,7 @@ static int intel_ddi_init_dp_connector(struct intel_digital_port *dig_port) static int intel_hdmi_reset_link(struct intel_encoder *encoder, struct drm_modeset_acquire_ctx *ctx) { + struct intel_display *display = to_intel_display(encoder); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder); struct intel_connector *connector = hdmi->attached_connector; @@ -4726,7 +4727,7 @@ static int intel_hdmi_reset_link(struct intel_encoder *encoder, * would be perfectly happy if were to just reconfigure * the SCDC settings on the fly. */ - return intel_modeset_commit_pipes(dev_priv, BIT(crtc->pipe), ctx); + return intel_modeset_commit_pipes(display, BIT(crtc->pipe), ctx); } static void intel_ddi_link_check(struct intel_encoder *encoder) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index debf9826fd2f..6962bc0da53c 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -764,12 +764,12 @@ static void icl_set_pipe_chicken(const struct intel_crtc_state *crtc_state) intel_de_write(dev_priv, PIPE_CHICKEN(pipe), tmp); } -bool intel_has_pending_fb_unpin(struct drm_i915_private *dev_priv) +bool intel_has_pending_fb_unpin(struct intel_display *display) { struct drm_crtc *crtc; bool cleanup_done; - drm_for_each_crtc(crtc, &dev_priv->drm) { + drm_for_each_crtc(crtc, display->drm) { struct drm_crtc_commit *commit; spin_lock(&crtc->commit_lock); commit = list_first_entry_or_null(&crtc->commit_list, @@ -5574,7 +5574,7 @@ int intel_modeset_all_pipes_late(struct intel_atomic_state *state, return 0; } -int intel_modeset_commit_pipes(struct drm_i915_private *i915, +int intel_modeset_commit_pipes(struct intel_display *display, u8 pipe_mask, struct drm_modeset_acquire_ctx *ctx) { @@ -5582,14 +5582,14 @@ int intel_modeset_commit_pipes(struct drm_i915_private *i915, struct intel_crtc *crtc; int ret; - state = drm_atomic_state_alloc(&i915->drm); + state = drm_atomic_state_alloc(display->drm); if (!state) return -ENOMEM; state->acquire_ctx = ctx; to_intel_atomic_state(state)->internal = true; - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, pipe_mask) { + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) { struct intel_crtc_state *crtc_state = intel_atomic_get_crtc_state(state, crtc); diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 83a820b72a6e..65245ef04347 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -457,7 +457,7 @@ int vlv_get_cck_clock(struct drm_i915_private *dev_priv, const char *name, u32 reg, int ref_freq); int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv, const char *name, u32 reg); -bool intel_has_pending_fb_unpin(struct drm_i915_private *dev_priv); +bool intel_has_pending_fb_unpin(struct intel_display *display); void intel_encoder_destroy(struct drm_encoder *encoder); struct drm_display_mode * intel_encoder_current_mode(struct intel_encoder *encoder); @@ -531,7 +531,7 @@ int intel_modeset_pipes_in_mask_early(struct intel_atomic_state *state, const char *reason, u8 pipe_mask); int intel_modeset_all_pipes_late(struct intel_atomic_state *state, const char *reason); -int intel_modeset_commit_pipes(struct drm_i915_private *i915, +int intel_modeset_commit_pipes(struct intel_display *display, u8 pipe_mask, struct drm_modeset_acquire_ctx *ctx); void intel_modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 205ec315b413..a236b5fc7a3d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -5193,7 +5193,6 @@ static int intel_dp_retrain_link(struct intel_encoder *encoder, struct drm_modeset_acquire_ctx *ctx) { struct intel_display *display = to_intel_display(encoder); - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_dp *intel_dp = enc_to_intel_dp(encoder); u8 pipe_mask; int ret; @@ -5224,7 +5223,7 @@ static int intel_dp_retrain_link(struct intel_encoder *encoder, encoder->base.base.id, encoder->base.name, str_yes_no(intel_dp->link.force_retrain)); - ret = intel_modeset_commit_pipes(dev_priv, pipe_mask, ctx); + ret = intel_modeset_commit_pipes(display, pipe_mask, ctx); if (ret == -EDEADLK) return ret; diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c index 00f7cd6debf3..0c723e7c71a2 100644 --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c @@ -328,6 +328,7 @@ static bool fence_is_active(const struct i915_fence_reg *fence) static struct i915_fence_reg *fence_find(struct i915_ggtt *ggtt) { + struct intel_display *display = &ggtt->vm.i915->display; struct i915_fence_reg *active = NULL; struct i915_fence_reg *fence, *fn; @@ -353,7 +354,7 @@ static struct i915_fence_reg *fence_find(struct i915_ggtt *ggtt) } /* Wait for completion of pending flips which consume fences */ - if (intel_has_pending_fb_unpin(ggtt->vm.i915)) + if (intel_has_pending_fb_unpin(display)) return ERR_PTR(-EAGAIN); return ERR_PTR(-ENOBUFS); -- 2.39.5 ^ permalink raw reply related [flat|nested] 20+ messages in thread
* RE: [PATCH 3/5] drm/i915/display: convert intel_has_pending_fb_unpin() to struct intel_display 2025-03-04 10:27 ` [PATCH 3/5] drm/i915/display: convert intel_has_pending_fb_unpin() " Jani Nikula @ 2025-03-04 12:48 ` Garg, Nemesa 0 siblings, 0 replies; 20+ messages in thread From: Garg, Nemesa @ 2025-03-04 12:48 UTC (permalink / raw) To: Nikula, Jani, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Nikula, Jani > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani > Nikula > Sent: Tuesday, March 4, 2025 3:58 PM > To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org > Cc: Nikula, Jani <jani.nikula@intel.com> > Subject: [PATCH 3/5] drm/i915/display: convert intel_has_pending_fb_unpin() > to struct intel_display > > Going forward, struct intel_display is the main display device data pointer. The > intel_display.[ch] files are too big to convert in one go. Convert > intel_has_pending_fb_unpin() to struct intel_display. > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 3 ++- > drivers/gpu/drm/i915/display/intel_display.c | 10 +++++----- > drivers/gpu/drm/i915/display/intel_display.h | 4 ++-- > drivers/gpu/drm/i915/display/intel_dp.c | 3 +-- > drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 3 ++- > 5 files changed, 12 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index 3b7ec0be9011..676c1826f15c 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -4660,6 +4660,7 @@ static int intel_ddi_init_dp_connector(struct > intel_digital_port *dig_port) static int intel_hdmi_reset_link(struct > intel_encoder *encoder, > struct drm_modeset_acquire_ctx *ctx) { > + struct intel_display *display = to_intel_display(encoder); > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder); > struct intel_connector *connector = hdmi->attached_connector; @@ > -4726,7 +4727,7 @@ static int intel_hdmi_reset_link(struct intel_encoder > *encoder, > * would be perfectly happy if were to just reconfigure > * the SCDC settings on the fly. > */ > - return intel_modeset_commit_pipes(dev_priv, BIT(crtc->pipe), ctx); > + return intel_modeset_commit_pipes(display, BIT(crtc->pipe), ctx); > } > > static void intel_ddi_link_check(struct intel_encoder *encoder) diff --git > a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index debf9826fd2f..6962bc0da53c 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -764,12 +764,12 @@ static void icl_set_pipe_chicken(const struct > intel_crtc_state *crtc_state) > intel_de_write(dev_priv, PIPE_CHICKEN(pipe), tmp); } > > -bool intel_has_pending_fb_unpin(struct drm_i915_private *dev_priv) > +bool intel_has_pending_fb_unpin(struct intel_display *display) > { > struct drm_crtc *crtc; > bool cleanup_done; > > - drm_for_each_crtc(crtc, &dev_priv->drm) { > + drm_for_each_crtc(crtc, display->drm) { > struct drm_crtc_commit *commit; > spin_lock(&crtc->commit_lock); > commit = list_first_entry_or_null(&crtc->commit_list, > @@ -5574,7 +5574,7 @@ int intel_modeset_all_pipes_late(struct > intel_atomic_state *state, > return 0; > } > > -int intel_modeset_commit_pipes(struct drm_i915_private *i915, > +int intel_modeset_commit_pipes(struct intel_display *display, > u8 pipe_mask, > struct drm_modeset_acquire_ctx *ctx) { @@ - > 5582,14 +5582,14 @@ int intel_modeset_commit_pipes(struct > drm_i915_private *i915, > struct intel_crtc *crtc; > int ret; > > - state = drm_atomic_state_alloc(&i915->drm); > + state = drm_atomic_state_alloc(display->drm); > if (!state) > return -ENOMEM; > > state->acquire_ctx = ctx; > to_intel_atomic_state(state)->internal = true; > > - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, pipe_mask) { > + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) { > struct intel_crtc_state *crtc_state = > intel_atomic_get_crtc_state(state, crtc); > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h > b/drivers/gpu/drm/i915/display/intel_display.h > index 83a820b72a6e..65245ef04347 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -457,7 +457,7 @@ int vlv_get_cck_clock(struct drm_i915_private > *dev_priv, > const char *name, u32 reg, int ref_freq); int > vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv, > const char *name, u32 reg); > -bool intel_has_pending_fb_unpin(struct drm_i915_private *dev_priv); > +bool intel_has_pending_fb_unpin(struct intel_display *display); > void intel_encoder_destroy(struct drm_encoder *encoder); struct > drm_display_mode * intel_encoder_current_mode(struct intel_encoder > *encoder); @@ -531,7 +531,7 @@ int > intel_modeset_pipes_in_mask_early(struct intel_atomic_state *state, > const char *reason, u8 pipe_mask); int > intel_modeset_all_pipes_late(struct intel_atomic_state *state, > const char *reason); > -int intel_modeset_commit_pipes(struct drm_i915_private *i915, > +int intel_modeset_commit_pipes(struct intel_display *display, > u8 pipe_mask, > struct drm_modeset_acquire_ctx *ctx); void > intel_modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state, > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 205ec315b413..a236b5fc7a3d 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -5193,7 +5193,6 @@ static int intel_dp_retrain_link(struct intel_encoder > *encoder, > struct drm_modeset_acquire_ctx *ctx) { > struct intel_display *display = to_intel_display(encoder); > - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_dp *intel_dp = enc_to_intel_dp(encoder); > u8 pipe_mask; > int ret; > @@ -5224,7 +5223,7 @@ static int intel_dp_retrain_link(struct intel_encoder > *encoder, > encoder->base.base.id, encoder->base.name, > str_yes_no(intel_dp->link.force_retrain)); > > - ret = intel_modeset_commit_pipes(dev_priv, pipe_mask, ctx); > + ret = intel_modeset_commit_pipes(display, pipe_mask, ctx); > if (ret == -EDEADLK) > return ret; > > diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c > b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c > index 00f7cd6debf3..0c723e7c71a2 100644 > --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c > +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c > @@ -328,6 +328,7 @@ static bool fence_is_active(const struct i915_fence_reg > *fence) > > static struct i915_fence_reg *fence_find(struct i915_ggtt *ggtt) { > + struct intel_display *display = &ggtt->vm.i915->display; > struct i915_fence_reg *active = NULL; > struct i915_fence_reg *fence, *fn; > > @@ -353,7 +354,7 @@ static struct i915_fence_reg *fence_find(struct > i915_ggtt *ggtt) > } > > /* Wait for completion of pending flips which consume fences */ > - if (intel_has_pending_fb_unpin(ggtt->vm.i915)) > + if (intel_has_pending_fb_unpin(display)) > return ERR_PTR(-EAGAIN); > LGTM, Reviewed-by: Nemesa Garg <nemesa.garg@intel.com> > return ERR_PTR(-ENOBUFS); > -- > 2.39.5 ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 4/5] drm/i915/display: remove dupe intel_update_watermarks() declaration 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula ` (2 preceding siblings ...) 2025-03-04 10:27 ` [PATCH 3/5] drm/i915/display: convert intel_has_pending_fb_unpin() " Jani Nikula @ 2025-03-04 10:27 ` Jani Nikula 2025-03-04 12:25 ` Garg, Nemesa 2025-03-04 10:27 ` [PATCH 5/5] drm/i915/display: convert intel_display.c to struct intel_display Jani Nikula ` (8 subsequent siblings) 12 siblings, 1 reply; 20+ messages in thread From: Jani Nikula @ 2025-03-04 10:27 UTC (permalink / raw) To: intel-gfx, intel-xe; +Cc: jani.nikula intel_wm.h already has intel_update_watermarks() declaration. Remove the dupe. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_display.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 65245ef04347..3b54a62c290a 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -521,8 +521,6 @@ void intel_set_plane_visible(struct intel_crtc_state *crtc_state, bool visible); void intel_plane_fixup_bitmasks(struct intel_crtc_state *crtc_state); -void intel_update_watermarks(struct drm_i915_private *i915); - bool intel_crtc_vrr_disabling(struct intel_atomic_state *state, struct intel_crtc *crtc); -- 2.39.5 ^ permalink raw reply related [flat|nested] 20+ messages in thread
* RE: [PATCH 4/5] drm/i915/display: remove dupe intel_update_watermarks() declaration 2025-03-04 10:27 ` [PATCH 4/5] drm/i915/display: remove dupe intel_update_watermarks() declaration Jani Nikula @ 2025-03-04 12:25 ` Garg, Nemesa 0 siblings, 0 replies; 20+ messages in thread From: Garg, Nemesa @ 2025-03-04 12:25 UTC (permalink / raw) To: Nikula, Jani, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Nikula, Jani > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani > Nikula > Sent: Tuesday, March 4, 2025 3:58 PM > To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org > Cc: Nikula, Jani <jani.nikula@intel.com> > Subject: [PATCH 4/5] drm/i915/display: remove dupe > intel_update_watermarks() declaration > > intel_wm.h already has intel_update_watermarks() declaration. Remove the > dupe. > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.h | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h > b/drivers/gpu/drm/i915/display/intel_display.h > index 65245ef04347..3b54a62c290a 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -521,8 +521,6 @@ void intel_set_plane_visible(struct intel_crtc_state > *crtc_state, > bool visible); > void intel_plane_fixup_bitmasks(struct intel_crtc_state *crtc_state); > > -void intel_update_watermarks(struct drm_i915_private *i915); > - LGTM, Reviewed-by: Nemesa Garg <nemesa.garg@intel.com> > bool intel_crtc_vrr_disabling(struct intel_atomic_state *state, > struct intel_crtc *crtc); > > -- > 2.39.5 ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 5/5] drm/i915/display: convert intel_display.c to struct intel_display 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula ` (3 preceding siblings ...) 2025-03-04 10:27 ` [PATCH 4/5] drm/i915/display: remove dupe intel_update_watermarks() declaration Jani Nikula @ 2025-03-04 10:27 ` Jani Nikula 2025-03-04 13:22 ` Garg, Nemesa 2025-03-04 11:17 ` ✓ CI.Patch_applied: success for drm/i915/display: convert intel_display.[ch] " Patchwork ` (7 subsequent siblings) 12 siblings, 1 reply; 20+ messages in thread From: Jani Nikula @ 2025-03-04 10:27 UTC (permalink / raw) To: intel-gfx, intel-xe; +Cc: jani.nikula Going forward, struct intel_display is the main display device data pointer. Convert as much as possible of intel_display.c to struct intel_display. This exposes a couple of outside issues that need to be fixed as well, in a register macro and a DSI PLL stub. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 834 +++++++++---------- drivers/gpu/drm/i915/display/vlv_dsi_pll.h | 6 +- drivers/gpu/drm/i915/i915_reg.h | 4 +- 3 files changed, 413 insertions(+), 431 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 6962bc0da53c..f7cb38145e9d 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -203,29 +203,29 @@ static bool is_hdr_mode(const struct intel_crtc_state *crtc_state) /* WA Display #0827: Gen9:all */ static void -skl_wa_827(struct drm_i915_private *dev_priv, enum pipe pipe, bool enable) +skl_wa_827(struct intel_display *display, enum pipe pipe, bool enable) { - intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe), + intel_de_rmw(display, CLKGATE_DIS_PSL(pipe), DUPS1_GATING_DIS | DUPS2_GATING_DIS, enable ? DUPS1_GATING_DIS | DUPS2_GATING_DIS : 0); } /* Wa_2006604312:icl,ehl */ static void -icl_wa_scalerclkgating(struct drm_i915_private *dev_priv, enum pipe pipe, +icl_wa_scalerclkgating(struct intel_display *display, enum pipe pipe, bool enable) { - intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe), + intel_de_rmw(display, CLKGATE_DIS_PSL(pipe), DPFR_GATING_DIS, enable ? DPFR_GATING_DIS : 0); } /* Wa_1604331009:icl,jsl,ehl */ static void -icl_wa_cursorclkgating(struct drm_i915_private *dev_priv, enum pipe pipe, +icl_wa_cursorclkgating(struct intel_display *display, enum pipe pipe, bool enable) { - intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe), + intel_de_rmw(display, CLKGATE_DIS_PSL(pipe), CURSOR_GATING_DIS, enable ? CURSOR_GATING_DIS : 0); } @@ -405,16 +405,16 @@ struct intel_crtc *intel_primary_crtc(const struct intel_crtc_state *crtc_state) static void intel_wait_for_pipe_off(const struct intel_crtc_state *old_crtc_state) { + struct intel_display *display = to_intel_display(old_crtc_state); struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - if (DISPLAY_VER(dev_priv) >= 4) { + if (DISPLAY_VER(display) >= 4) { enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; /* Wait for the Pipe State to go off */ - if (intel_de_wait_for_clear(dev_priv, TRANSCONF(dev_priv, cpu_transcoder), + if (intel_de_wait_for_clear(display, TRANSCONF(display, cpu_transcoder), TRANSCONF_STATE_ENABLE, 100)) - drm_WARN(&dev_priv->drm, 1, "pipe_off wait timed out\n"); + drm_WARN(display->drm, 1, "pipe_off wait timed out\n"); } else { intel_wait_for_pipe_scanline_stopped(crtc); } @@ -468,10 +468,10 @@ static void assert_plane(struct intel_plane *plane, bool state) static void assert_planes_disabled(struct intel_crtc *crtc) { - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc); struct intel_plane *plane; - for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) + for_each_intel_plane_on_crtc(display->drm, crtc, plane) assert_plane_disabled(plane); } @@ -479,7 +479,6 @@ void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state) { struct intel_display *display = to_intel_display(new_crtc_state); struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder; enum pipe pipe = crtc->pipe; u32 val; @@ -493,7 +492,7 @@ void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state) * a plane. On ILK+ the pipe PLLs are integrated, so we don't * need the check. */ - if (HAS_GMCH(dev_priv)) { + if (HAS_GMCH(display)) { if (intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI)) assert_dsi_pll_enabled(display); else @@ -510,11 +509,11 @@ void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state) } /* Wa_22012358565:adl-p */ - if (DISPLAY_VER(dev_priv) == 13) + if (DISPLAY_VER(display) == 13) intel_de_rmw(display, PIPE_ARB_CTL(display, pipe), 0, PIPE_ARB_USE_PROG_SLOTS); - if (DISPLAY_VER(dev_priv) >= 14) { + if (DISPLAY_VER(display) >= 14) { u32 clear = DP_DSC_INSERT_SF_AT_EOL_WA; u32 set = 0; @@ -528,7 +527,7 @@ void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state) val = intel_de_read(display, TRANSCONF(display, cpu_transcoder)); if (val & TRANSCONF_ENABLE) { /* we keep both pipes enabled on 830 */ - drm_WARN_ON(&dev_priv->drm, !IS_I830(dev_priv)); + drm_WARN_ON(display->drm, !display->platform.i830); return; } @@ -559,12 +558,11 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state) { struct intel_display *display = to_intel_display(old_crtc_state); struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; enum pipe pipe = crtc->pipe; u32 val; - drm_dbg_kms(&dev_priv->drm, "disabling pipe %c\n", pipe_name(pipe)); + drm_dbg_kms(display->drm, "disabling pipe %c\n", pipe_name(pipe)); /* * Make sure planes won't keep trying to pump pixels to us, @@ -572,7 +570,7 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state) */ assert_planes_disabled(crtc); - val = intel_de_read(dev_priv, TRANSCONF(dev_priv, cpu_transcoder)); + val = intel_de_read(display, TRANSCONF(display, cpu_transcoder)); if ((val & TRANSCONF_ENABLE) == 0) return; @@ -584,17 +582,17 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state) val &= ~TRANSCONF_DOUBLE_WIDE; /* Don't disable pipe or pipe PLLs if needed */ - if (!IS_I830(dev_priv)) + if (!display->platform.i830) val &= ~TRANSCONF_ENABLE; /* Wa_1409098942:adlp+ */ - if (DISPLAY_VER(dev_priv) >= 13 && + if (DISPLAY_VER(display) >= 13 && old_crtc_state->dsc.compression_enable) val &= ~TRANSCONF_PIXEL_COUNT_SCALING_MASK; - intel_de_write(dev_priv, TRANSCONF(dev_priv, cpu_transcoder), val); + intel_de_write(display, TRANSCONF(display, cpu_transcoder), val); - if (DISPLAY_VER(dev_priv) >= 12) + if (DISPLAY_VER(display) >= 12) intel_de_rmw(display, CHICKEN_TRANS(display, cpu_transcoder), FECSTALL_DIS_DPTSTREAM_DPTTG, 0); @@ -643,7 +641,7 @@ void intel_set_plane_visible(struct intel_crtc_state *crtc_state, void intel_plane_fixup_bitmasks(struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_display *display = to_intel_display(crtc_state); struct drm_plane *plane; /* @@ -654,7 +652,7 @@ void intel_plane_fixup_bitmasks(struct intel_crtc_state *crtc_state) crtc_state->enabled_planes = 0; crtc_state->active_planes = 0; - drm_for_each_plane_mask(plane, &dev_priv->drm, + drm_for_each_plane_mask(plane, display->drm, crtc_state->uapi.plane_mask) { crtc_state->enabled_planes |= BIT(to_intel_plane(plane)->id); crtc_state->active_planes |= BIT(to_intel_plane(plane)->id); @@ -671,7 +669,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc, struct intel_plane_state *plane_state = to_intel_plane_state(plane->base.state); - drm_dbg_kms(&dev_priv->drm, + drm_dbg_kms(display->drm, "Disabling [PLANE:%d:%s] on [CRTC:%d:%s]\n", plane->base.base.id, plane->base.name, crtc->base.base.id, crtc->base.name); @@ -699,7 +697,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc, * event which is after the vblank start event, so we need to have a * wait-for-vblank between disabling the plane and the pipe. */ - if (HAS_GMCH(dev_priv) && + if (HAS_GMCH(display) && intel_set_memory_cxsr(dev_priv, false)) intel_plane_initial_vblank_wait(crtc); @@ -707,7 +705,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc, * Gen2 reports pipe underruns whenever all planes are disabled. * So disable underrun reporting before all the planes get disabled. */ - if (DISPLAY_VER(dev_priv) == 2 && !crtc_state->active_planes) + if (DISPLAY_VER(display) == 2 && !crtc_state->active_planes) intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe, false); intel_plane_disable_arm(NULL, plane, crtc_state); @@ -727,12 +725,12 @@ intel_plane_fence_y_offset(const struct intel_plane_state *plane_state) static void icl_set_pipe_chicken(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; u32 tmp; - tmp = intel_de_read(dev_priv, PIPE_CHICKEN(pipe)); + tmp = intel_de_read(display, PIPE_CHICKEN(pipe)); /* * Display WA #1153: icl @@ -752,16 +750,16 @@ static void icl_set_pipe_chicken(const struct intel_crtc_state *crtc_state) * Underrun recovery must always be disabled on display 13+. * DG2 chicken bit meaning is inverted compared to other platforms. */ - if (IS_DG2(dev_priv)) + if (display->platform.dg2) tmp &= ~UNDERRUN_RECOVERY_ENABLE_DG2; - else if ((DISPLAY_VER(dev_priv) >= 13) && (DISPLAY_VER(dev_priv) < 30)) + else if ((DISPLAY_VER(display) >= 13) && (DISPLAY_VER(display) < 30)) tmp |= UNDERRUN_RECOVERY_DISABLE_ADLP; /* Wa_14010547955:dg2 */ - if (IS_DG2(dev_priv)) + if (display->platform.dg2) tmp |= DG2_RENDER_CCSTAG_4_3_EN; - intel_de_write(dev_priv, PIPE_CHICKEN(pipe), tmp); + intel_de_write(display, PIPE_CHICKEN(pipe), tmp); } bool intel_has_pending_fb_unpin(struct intel_display *display) @@ -833,13 +831,13 @@ static void intel_crtc_dpms_overlay_disable(struct intel_crtc *crtc) static bool needs_nv12_wa(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_display *display = to_intel_display(crtc_state); if (!crtc_state->nv12_planes) return false; /* WA Display #0827: Gen9:all */ - if (DISPLAY_VER(dev_priv) == 9) + if (DISPLAY_VER(display) == 9) return true; return false; @@ -847,10 +845,10 @@ static bool needs_nv12_wa(const struct intel_crtc_state *crtc_state) static bool needs_scalerclk_wa(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_display *display = to_intel_display(crtc_state); /* Wa_2006604312:icl,ehl */ - if (crtc_state->scaler_state.scaler_users > 0 && DISPLAY_VER(dev_priv) == 11) + if (crtc_state->scaler_state.scaler_users > 0 && DISPLAY_VER(display) == 11) return true; return false; @@ -858,31 +856,31 @@ static bool needs_scalerclk_wa(const struct intel_crtc_state *crtc_state) static bool needs_cursorclk_wa(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_display *display = to_intel_display(crtc_state); /* Wa_1604331009:icl,jsl,ehl */ if (is_hdr_mode(crtc_state) && crtc_state->active_planes & BIT(PLANE_CURSOR) && - DISPLAY_VER(dev_priv) == 11) + DISPLAY_VER(display) == 11) return true; return false; } -static void intel_async_flip_vtd_wa(struct drm_i915_private *i915, +static void intel_async_flip_vtd_wa(struct intel_display *display, enum pipe pipe, bool enable) { - if (DISPLAY_VER(i915) == 9) { + if (DISPLAY_VER(display) == 9) { /* * "Plane N stretch max must be programmed to 11b (x1) * when Async flips are enabled on that plane." */ - intel_de_rmw(i915, CHICKEN_PIPESL_1(pipe), + intel_de_rmw(display, CHICKEN_PIPESL_1(pipe), SKL_PLANE1_STRETCH_MAX_MASK, enable ? SKL_PLANE1_STRETCH_MAX_X1 : SKL_PLANE1_STRETCH_MAX_X8); } else { /* Also needed on HSW/BDW albeit undocumented */ - intel_de_rmw(i915, CHICKEN_PIPESL_1(pipe), + intel_de_rmw(display, CHICKEN_PIPESL_1(pipe), HSW_PRI_STRETCH_MAX_MASK, enable ? HSW_PRI_STRETCH_MAX_X1 : HSW_PRI_STRETCH_MAX_X8); } @@ -890,10 +888,12 @@ static void intel_async_flip_vtd_wa(struct drm_i915_private *i915, static bool needs_async_flip_vtd_wa(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); return crtc_state->uapi.async_flip && i915_vtd_active(i915) && - (DISPLAY_VER(i915) == 9 || IS_BROADWELL(i915) || IS_HASWELL(i915)); + (DISPLAY_VER(display) == 9 || display->platform.broadwell || + display->platform.haswell); } static void intel_encoders_audio_enable(struct intel_atomic_state *state, @@ -1042,6 +1042,7 @@ static bool audio_disabling(const struct intel_crtc_state *old_crtc_state, static void intel_post_plane_update(struct intel_atomic_state *state, struct intel_crtc *crtc) { + struct intel_display *display = to_intel_display(state); struct drm_i915_private *dev_priv = to_i915(state->base.dev); const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc); @@ -1060,19 +1061,19 @@ static void intel_post_plane_update(struct intel_atomic_state *state, if (needs_async_flip_vtd_wa(old_crtc_state) && !needs_async_flip_vtd_wa(new_crtc_state)) - intel_async_flip_vtd_wa(dev_priv, pipe, false); + intel_async_flip_vtd_wa(display, pipe, false); if (needs_nv12_wa(old_crtc_state) && !needs_nv12_wa(new_crtc_state)) - skl_wa_827(dev_priv, pipe, false); + skl_wa_827(display, pipe, false); if (needs_scalerclk_wa(old_crtc_state) && !needs_scalerclk_wa(new_crtc_state)) - icl_wa_scalerclkgating(dev_priv, pipe, false); + icl_wa_scalerclkgating(display, pipe, false); if (needs_cursorclk_wa(old_crtc_state) && !needs_cursorclk_wa(new_crtc_state)) - icl_wa_cursorclkgating(dev_priv, pipe, false); + icl_wa_cursorclkgating(display, pipe, false); if (intel_crtc_needs_color_update(new_crtc_state)) intel_color_post_update(new_crtc_state); @@ -1194,22 +1195,22 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, if (!needs_async_flip_vtd_wa(old_crtc_state) && needs_async_flip_vtd_wa(new_crtc_state)) - intel_async_flip_vtd_wa(dev_priv, pipe, true); + intel_async_flip_vtd_wa(display, pipe, true); /* Display WA 827 */ if (!needs_nv12_wa(old_crtc_state) && needs_nv12_wa(new_crtc_state)) - skl_wa_827(dev_priv, pipe, true); + skl_wa_827(display, pipe, true); /* Wa_2006604312:icl,ehl */ if (!needs_scalerclk_wa(old_crtc_state) && needs_scalerclk_wa(new_crtc_state)) - icl_wa_scalerclkgating(dev_priv, pipe, true); + icl_wa_scalerclkgating(display, pipe, true); /* Wa_1604331009:icl,jsl,ehl */ if (!needs_cursorclk_wa(old_crtc_state) && needs_cursorclk_wa(new_crtc_state)) - icl_wa_cursorclkgating(dev_priv, pipe, true); + icl_wa_cursorclkgating(display, pipe, true); /* * Vblank time updates from the shadow to live plane control register @@ -1220,7 +1221,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, * event which is after the vblank start event, so we need to have a * wait-for-vblank between disabling the plane and the pipe. */ - if (HAS_GMCH(dev_priv) && old_crtc_state->hw.active && + if (HAS_GMCH(display) && old_crtc_state->hw.active && new_crtc_state->disable_cxsr && intel_set_memory_cxsr(dev_priv, false)) intel_crtc_wait_for_next_vblank(crtc); @@ -1231,7 +1232,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, * * WaCxSRDisabledForSpriteScaling:ivb */ - if (!HAS_GMCH(dev_priv) && old_crtc_state->hw.active && + if (!HAS_GMCH(display) && old_crtc_state->hw.active && new_crtc_state->disable_cxsr && ilk_disable_cxsr(dev_priv)) intel_crtc_wait_for_next_vblank(crtc); @@ -1267,7 +1268,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, * chance of catching underruns with the intermediate watermarks * vs. the old plane configuration. */ - if (DISPLAY_VER(dev_priv) == 2 && planes_disabling(old_crtc_state, new_crtc_state)) + if (DISPLAY_VER(display) == 2 && planes_disabling(old_crtc_state, new_crtc_state)) intel_set_cpu_fifo_underrun_reporting(display, pipe, false); /* @@ -1308,7 +1309,7 @@ static void intel_crtc_disable_planes(struct intel_atomic_state *state, static void intel_encoders_update_prepare(struct intel_atomic_state *state) { - struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); struct intel_crtc_state *new_crtc_state, *old_crtc_state; struct intel_crtc *crtc; int i; @@ -1317,7 +1318,7 @@ static void intel_encoders_update_prepare(struct intel_atomic_state *state) * Make sure the DPLL state is up-to-date for fastset TypeC ports after non-blocking commits. * TODO: Update the DPLL state for all cases in the encoder->update_prepare() hook. */ - if (i915->display.dpll.mgr) { + if (display->dpll.mgr) { for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { if (intel_crtc_needs_modeset(new_crtc_state)) continue; @@ -1513,7 +1514,7 @@ static void ilk_crtc_enable(struct intel_atomic_state *state, struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; - if (drm_WARN_ON(&dev_priv->drm, crtc->active)) + if (drm_WARN_ON(display->drm, crtc->active)) return; /* @@ -1582,26 +1583,26 @@ static void ilk_crtc_enable(struct intel_atomic_state *state, /* Display WA #1180: WaDisableScalarClockGating: glk */ static bool glk_need_scaler_clock_gating_wa(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); + struct intel_display *display = to_intel_display(crtc_state); - return DISPLAY_VER(i915) == 10 && crtc_state->pch_pfit.enabled; + return DISPLAY_VER(display) == 10 && crtc_state->pch_pfit.enabled; } static void glk_pipe_scaler_clock_gating_wa(struct intel_crtc *crtc, bool enable) { - struct drm_i915_private *i915 = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc); u32 mask = DPF_GATING_DIS | DPF_RAM_GATING_DIS | DPFR_GATING_DIS; - intel_de_rmw(i915, CLKGATE_DIS_PSL(crtc->pipe), + intel_de_rmw(display, CLKGATE_DIS_PSL(crtc->pipe), mask, enable ? mask : 0); } static void hsw_set_linetime_wm(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - intel_de_write(dev_priv, WM_LINETIME(crtc->pipe), + intel_de_write(display, WM_LINETIME(crtc->pipe), HSW_LINETIME(crtc_state->linetime) | HSW_IPS_LINETIME(crtc_state->ips_linetime)); } @@ -1617,8 +1618,8 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state) static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; if (crtc_state->has_pch_encoder) { @@ -1632,11 +1633,11 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta } intel_set_transcoder_timings(crtc_state); - if (HAS_VRR(dev_priv)) + if (HAS_VRR(display)) intel_vrr_set_transcoder_timings(crtc_state); if (cpu_transcoder != TRANSCODER_EDP) - intel_de_write(dev_priv, TRANS_MULT(dev_priv, cpu_transcoder), + intel_de_write(display, TRANS_MULT(display, cpu_transcoder), crtc_state->pixel_multiplier - 1); hsw_set_frame_start_delay(crtc_state); @@ -1650,12 +1651,11 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, struct intel_display *display = to_intel_display(state); const struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder; struct intel_crtc *pipe_crtc; int i; - if (drm_WARN_ON(&dev_priv->drm, crtc->active)) + if (drm_WARN_ON(display->drm, crtc->active)) return; for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) intel_dmc_enable_pipe(display, pipe_crtc->pipe); @@ -1678,12 +1678,12 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, intel_dsc_enable(pipe_crtc_state); - if (HAS_UNCOMPRESSED_JOINER(dev_priv)) + if (HAS_UNCOMPRESSED_JOINER(display)) intel_uncompressed_joiner_enable(pipe_crtc_state); intel_set_pipe_src_size(pipe_crtc_state); - if (DISPLAY_VER(dev_priv) >= 9 || IS_BROADWELL(dev_priv)) + if (DISPLAY_VER(display) >= 9 || display->platform.broadwell) bdw_set_pipe_misc(NULL, pipe_crtc_state); } @@ -1699,7 +1699,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, if (glk_need_scaler_clock_gating_wa(pipe_crtc_state)) glk_pipe_scaler_clock_gating_wa(pipe_crtc, true); - if (DISPLAY_VER(dev_priv) >= 9) + if (DISPLAY_VER(display) >= 9) skl_pfit_enable(pipe_crtc_state); else ilk_pfit_enable(pipe_crtc_state); @@ -1712,7 +1712,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, hsw_set_linetime_wm(pipe_crtc_state); - if (DISPLAY_VER(dev_priv) >= 11) + if (DISPLAY_VER(display) >= 11) icl_set_pipe_chicken(pipe_crtc_state); intel_initial_watermarks(state, pipe_crtc); @@ -1735,7 +1735,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, * enabling, we need to change the workaround. */ hsw_workaround_pipe = pipe_crtc_state->hsw_workaround_pipe; - if (IS_HASWELL(dev_priv) && hsw_workaround_pipe != INVALID_PIPE) { + if (display->platform.haswell && hsw_workaround_pipe != INVALID_PIPE) { struct intel_crtc *wa_crtc = intel_crtc_for_pipe(display, hsw_workaround_pipe); @@ -1943,8 +1943,8 @@ intel_aux_power_domain(struct intel_digital_port *dig_port) static void get_crtc_power_domains(struct intel_crtc_state *crtc_state, struct intel_power_domain_mask *mask) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; struct drm_encoder *encoder; enum pipe pipe = crtc->pipe; @@ -1960,14 +1960,14 @@ static void get_crtc_power_domains(struct intel_crtc_state *crtc_state, crtc_state->pch_pfit.force_thru) set_bit(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe), mask->bits); - drm_for_each_encoder_mask(encoder, &dev_priv->drm, + drm_for_each_encoder_mask(encoder, display->drm, crtc_state->uapi.encoder_mask) { struct intel_encoder *intel_encoder = to_intel_encoder(encoder); set_bit(intel_encoder->power_domain, mask->bits); } - if (HAS_DDI(dev_priv) && crtc_state->has_audio) + if (HAS_DDI(display) && crtc_state->has_audio) set_bit(POWER_DOMAIN_AUDIO_MMIO, mask->bits); if (crtc_state->shared_dpll) @@ -2035,22 +2035,21 @@ static void valleyview_crtc_enable(struct intel_atomic_state *state, struct intel_display *display = to_intel_display(crtc); const struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; - if (drm_WARN_ON(&dev_priv->drm, crtc->active)) + if (drm_WARN_ON(display->drm, crtc->active)) return; i9xx_configure_cpu_transcoder(new_crtc_state); intel_set_pipe_src_size(new_crtc_state); - intel_de_write(dev_priv, VLV_PIPE_MSA_MISC(pipe), 0); + intel_de_write(display, VLV_PIPE_MSA_MISC(display, pipe), 0); - if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { - intel_de_write(dev_priv, CHV_BLEND(dev_priv, pipe), + if (display->platform.cherryview && pipe == PIPE_B) { + intel_de_write(display, CHV_BLEND(display, pipe), CHV_BLEND_LEGACY); - intel_de_write(dev_priv, CHV_CANVAS(dev_priv, pipe), 0); + intel_de_write(display, CHV_CANVAS(display, pipe), 0); } crtc->active = true; @@ -2059,7 +2058,7 @@ static void valleyview_crtc_enable(struct intel_atomic_state *state, intel_encoders_pre_pll_enable(state, crtc); - if (IS_CHERRYVIEW(dev_priv)) + if (display->platform.cherryview) chv_enable_pll(new_crtc_state); else vlv_enable_pll(new_crtc_state); @@ -2087,7 +2086,7 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state, struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; - if (drm_WARN_ON(&dev_priv->drm, crtc->active)) + if (drm_WARN_ON(display->drm, crtc->active)) return; i9xx_configure_cpu_transcoder(new_crtc_state); @@ -2096,7 +2095,7 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state, crtc->active = true; - if (DISPLAY_VER(dev_priv) != 2) + if (DISPLAY_VER(display) != 2) intel_set_cpu_fifo_underrun_reporting(display, pipe, true); intel_encoders_pre_enable(state, crtc); @@ -2116,7 +2115,7 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state, intel_encoders_enable(state, crtc); /* prevents spurious underruns */ - if (DISPLAY_VER(dev_priv) == 2) + if (DISPLAY_VER(display) == 2) intel_crtc_wait_for_next_vblank(crtc); } @@ -2133,7 +2132,7 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state, * On gen2 planes are double buffered but the pipe isn't, so we must * wait for planes to fully turn off before disabling the pipe. */ - if (DISPLAY_VER(dev_priv) == 2) + if (DISPLAY_VER(display) == 2) intel_crtc_wait_for_next_vblank(crtc); intel_encoders_disable(state, crtc); @@ -2147,9 +2146,9 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state, intel_encoders_post_disable(state, crtc); if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DSI)) { - if (IS_CHERRYVIEW(dev_priv)) + if (display->platform.cherryview) chv_disable_pll(dev_priv, pipe); - else if (IS_VALLEYVIEW(dev_priv)) + else if (display->platform.valleyview) vlv_disable_pll(dev_priv, pipe); else i9xx_disable_pll(old_crtc_state); @@ -2157,14 +2156,14 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state, intel_encoders_post_pll_disable(state, crtc); - if (DISPLAY_VER(dev_priv) != 2) + if (DISPLAY_VER(display) != 2) intel_set_cpu_fifo_underrun_reporting(display, pipe, false); - if (!dev_priv->display.funcs.wm->initial_watermarks) + if (!display->funcs.wm->initial_watermarks) intel_update_watermarks(dev_priv); /* clock the pipe down to 640x480@60 to potentially save power */ - if (IS_I830(dev_priv)) + if (display->platform.i830) i830_enable_pipe(display, pipe); } @@ -2178,11 +2177,11 @@ void intel_encoder_destroy(struct drm_encoder *encoder) static bool intel_crtc_supports_double_wide(const struct intel_crtc *crtc) { - const struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc); /* GDG double wide on either pipe, otherwise pipe A only */ - return HAS_DOUBLE_WIDE(dev_priv) && - (crtc->pipe == PIPE_A || IS_I915G(dev_priv)); + return HAS_DOUBLE_WIDE(display) && + (crtc->pipe == PIPE_A || display->platform.i915g); } static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state) @@ -2229,9 +2228,9 @@ static void intel_mode_from_crtc_timings(struct drm_display_mode *mode, static void intel_crtc_compute_pixel_rate(struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_display *display = to_intel_display(crtc_state); - if (HAS_GMCH(dev_priv)) + if (HAS_GMCH(display)) /* FIXME calculate proper pipe pixel rate for GMCH pfit */ crtc_state->pixel_rate = crtc_state->hw.pipe_mode.crtc_clock; @@ -2342,6 +2341,7 @@ static void intel_joiner_compute_pipe_src(struct intel_crtc_state *crtc_state) static int intel_crtc_compute_pipe_src(struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *i915 = to_i915(crtc->base.dev); @@ -2355,7 +2355,7 @@ static int intel_crtc_compute_pipe_src(struct intel_crtc_state *crtc_state) */ if (drm_rect_width(&crtc_state->pipe_src) & 1) { if (crtc_state->double_wide) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] Odd pipe source width not supported with double wide pipe\n", crtc->base.base.id, crtc->base.name); return -EINVAL; @@ -2363,7 +2363,7 @@ static int intel_crtc_compute_pipe_src(struct intel_crtc_state *crtc_state) if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) && intel_is_dual_link_lvds(i915)) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] Odd pipe source width not supported with dual link LVDS\n", crtc->base.base.id, crtc->base.name); return -EINVAL; @@ -2375,11 +2375,11 @@ static int intel_crtc_compute_pipe_src(struct intel_crtc_state *crtc_state) static int intel_crtc_compute_pipe_mode(struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; - int clock_limit = i915->display.cdclk.max_dotclk_freq; + int clock_limit = display->cdclk.max_dotclk_freq; /* * Start with the adjusted_mode crtc timings, which @@ -2394,8 +2394,8 @@ static int intel_crtc_compute_pipe_mode(struct intel_crtc_state *crtc_state) intel_joiner_adjust_timings(crtc_state, pipe_mode); intel_mode_from_crtc_timings(pipe_mode, pipe_mode); - if (DISPLAY_VER(i915) < 4) { - clock_limit = i915->display.cdclk.max_cdclk_freq * 9 / 10; + if (DISPLAY_VER(display) < 4) { + clock_limit = display->cdclk.max_cdclk_freq * 9 / 10; /* * Enable double wide mode when the dot clock @@ -2403,13 +2403,13 @@ static int intel_crtc_compute_pipe_mode(struct intel_crtc_state *crtc_state) */ if (intel_crtc_supports_double_wide(crtc) && pipe_mode->crtc_clock > clock_limit) { - clock_limit = i915->display.cdclk.max_dotclk_freq; + clock_limit = display->cdclk.max_dotclk_freq; crtc_state->double_wide = true; } } if (pipe_mode->crtc_clock > clock_limit) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] requested pixel clock (%d kHz) too high (max: %d kHz, double wide: %s)\n", crtc->base.base.id, crtc->base.name, pipe_mode->crtc_clock, clock_limit, @@ -2641,15 +2641,15 @@ void intel_cpu_transcoder_set_m2_n2(struct intel_crtc *crtc, static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; u32 crtc_vdisplay, crtc_vtotal, crtc_vblank_start, crtc_vblank_end; int vsyncshift = 0; - drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)); + drm_WARN_ON(display->drm, transcoder_is_dsi(cpu_transcoder)); /* We need to be careful not to changed the adjusted mode, for otherwise * the hw state checker will get angry at the mismatch. */ @@ -2676,9 +2676,9 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta * VBLANK_START no longer works on ADL+, instead we must use * TRANS_SET_CONTEXT_LATENCY to configure the pipe vblank start. */ - if (DISPLAY_VER(dev_priv) >= 13) { - intel_de_write(dev_priv, - TRANS_SET_CONTEXT_LATENCY(dev_priv, cpu_transcoder), + if (DISPLAY_VER(display) >= 13) { + intel_de_write(display, + TRANS_SET_CONTEXT_LATENCY(display, cpu_transcoder), crtc_vblank_start - crtc_vdisplay); /* @@ -2688,28 +2688,28 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta crtc_vblank_start = 1; } - if (DISPLAY_VER(dev_priv) >= 4) - intel_de_write(dev_priv, - TRANS_VSYNCSHIFT(dev_priv, cpu_transcoder), + if (DISPLAY_VER(display) >= 4) + intel_de_write(display, + TRANS_VSYNCSHIFT(display, cpu_transcoder), vsyncshift); - intel_de_write(dev_priv, TRANS_HTOTAL(dev_priv, cpu_transcoder), + intel_de_write(display, TRANS_HTOTAL(display, cpu_transcoder), HACTIVE(adjusted_mode->crtc_hdisplay - 1) | HTOTAL(adjusted_mode->crtc_htotal - 1)); - intel_de_write(dev_priv, TRANS_HBLANK(dev_priv, cpu_transcoder), + intel_de_write(display, TRANS_HBLANK(display, cpu_transcoder), HBLANK_START(adjusted_mode->crtc_hblank_start - 1) | HBLANK_END(adjusted_mode->crtc_hblank_end - 1)); - intel_de_write(dev_priv, TRANS_HSYNC(dev_priv, cpu_transcoder), + intel_de_write(display, TRANS_HSYNC(display, cpu_transcoder), HSYNC_START(adjusted_mode->crtc_hsync_start - 1) | HSYNC_END(adjusted_mode->crtc_hsync_end - 1)); - intel_de_write(dev_priv, TRANS_VTOTAL(dev_priv, cpu_transcoder), + intel_de_write(display, TRANS_VTOTAL(display, cpu_transcoder), VACTIVE(crtc_vdisplay - 1) | VTOTAL(crtc_vtotal - 1)); - intel_de_write(dev_priv, TRANS_VBLANK(dev_priv, cpu_transcoder), + intel_de_write(display, TRANS_VBLANK(display, cpu_transcoder), VBLANK_START(crtc_vblank_start - 1) | VBLANK_END(crtc_vblank_end - 1)); - intel_de_write(dev_priv, TRANS_VSYNC(dev_priv, cpu_transcoder), + intel_de_write(display, TRANS_VSYNC(display, cpu_transcoder), VSYNC_START(adjusted_mode->crtc_vsync_start - 1) | VSYNC_END(adjusted_mode->crtc_vsync_end - 1)); @@ -2717,22 +2717,21 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta * programmed with the VTOTAL_EDP value. Same for VTOTAL_C. This is * documented on the DDI_FUNC_CTL register description, EDP Input Select * bits. */ - if (IS_HASWELL(dev_priv) && cpu_transcoder == TRANSCODER_EDP && + if (display->platform.haswell && cpu_transcoder == TRANSCODER_EDP && (pipe == PIPE_B || pipe == PIPE_C)) - intel_de_write(dev_priv, TRANS_VTOTAL(dev_priv, pipe), + intel_de_write(display, TRANS_VTOTAL(display, pipe), VACTIVE(crtc_vdisplay - 1) | VTOTAL(crtc_vtotal - 1)); } static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; u32 crtc_vdisplay, crtc_vtotal, crtc_vblank_start, crtc_vblank_end; - drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)); + drm_WARN_ON(display->drm, transcoder_is_dsi(cpu_transcoder)); crtc_vdisplay = adjusted_mode->crtc_vdisplay; crtc_vtotal = adjusted_mode->crtc_vtotal; @@ -2745,9 +2744,9 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc crtc_vblank_end -= 1; } - if (DISPLAY_VER(dev_priv) >= 13) { - intel_de_write(dev_priv, - TRANS_SET_CONTEXT_LATENCY(dev_priv, cpu_transcoder), + if (DISPLAY_VER(display) >= 13) { + intel_de_write(display, + TRANS_SET_CONTEXT_LATENCY(display, cpu_transcoder), crtc_vblank_start - crtc_vdisplay); /* @@ -2761,22 +2760,22 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc * The hardware actually ignores TRANS_VBLANK.VBLANK_END in DP mode. * But let's write it anyway to keep the state checker happy. */ - intel_de_write(dev_priv, TRANS_VBLANK(dev_priv, cpu_transcoder), + intel_de_write(display, TRANS_VBLANK(display, cpu_transcoder), VBLANK_START(crtc_vblank_start - 1) | VBLANK_END(crtc_vblank_end - 1)); /* * The double buffer latch point for TRANS_VTOTAL * is the transcoder's undelayed vblank. */ - intel_de_write(dev_priv, TRANS_VTOTAL(dev_priv, cpu_transcoder), + intel_de_write(display, TRANS_VTOTAL(display, cpu_transcoder), VACTIVE(crtc_vdisplay - 1) | VTOTAL(crtc_vtotal - 1)); } static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); int width = drm_rect_width(&crtc_state->pipe_src); int height = drm_rect_height(&crtc_state->pipe_src); enum pipe pipe = crtc->pipe; @@ -2784,63 +2783,62 @@ static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state) /* pipesrc controls the size that is scaled from, which should * always be the user's requested size. */ - intel_de_write(dev_priv, PIPESRC(dev_priv, pipe), + intel_de_write(display, PIPESRC(display, pipe), PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1)); } static bool intel_pipe_is_interlaced(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (DISPLAY_VER(dev_priv) == 2) + if (DISPLAY_VER(display) == 2) return false; - if (DISPLAY_VER(dev_priv) >= 9 || - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) - return intel_de_read(dev_priv, - TRANSCONF(dev_priv, cpu_transcoder)) & TRANSCONF_INTERLACE_MASK_HSW; + if (DISPLAY_VER(display) >= 9 || + display->platform.broadwell || display->platform.haswell) + return intel_de_read(display, + TRANSCONF(display, cpu_transcoder)) & TRANSCONF_INTERLACE_MASK_HSW; else - return intel_de_read(dev_priv, - TRANSCONF(dev_priv, cpu_transcoder)) & TRANSCONF_INTERLACE_MASK; + return intel_de_read(display, + TRANSCONF(display, cpu_transcoder)) & TRANSCONF_INTERLACE_MASK; } static void intel_get_transcoder_timings(struct intel_crtc *crtc, struct intel_crtc_state *pipe_config) { - struct drm_device *dev = crtc->base.dev; - struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_display *display = to_intel_display(crtc); enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; u32 tmp; - tmp = intel_de_read(dev_priv, TRANS_HTOTAL(dev_priv, cpu_transcoder)); + tmp = intel_de_read(display, TRANS_HTOTAL(display, cpu_transcoder)); adjusted_mode->crtc_hdisplay = REG_FIELD_GET(HACTIVE_MASK, tmp) + 1; adjusted_mode->crtc_htotal = REG_FIELD_GET(HTOTAL_MASK, tmp) + 1; if (!transcoder_is_dsi(cpu_transcoder)) { - tmp = intel_de_read(dev_priv, - TRANS_HBLANK(dev_priv, cpu_transcoder)); + tmp = intel_de_read(display, + TRANS_HBLANK(display, cpu_transcoder)); adjusted_mode->crtc_hblank_start = REG_FIELD_GET(HBLANK_START_MASK, tmp) + 1; adjusted_mode->crtc_hblank_end = REG_FIELD_GET(HBLANK_END_MASK, tmp) + 1; } - tmp = intel_de_read(dev_priv, TRANS_HSYNC(dev_priv, cpu_transcoder)); + tmp = intel_de_read(display, TRANS_HSYNC(display, cpu_transcoder)); adjusted_mode->crtc_hsync_start = REG_FIELD_GET(HSYNC_START_MASK, tmp) + 1; adjusted_mode->crtc_hsync_end = REG_FIELD_GET(HSYNC_END_MASK, tmp) + 1; - tmp = intel_de_read(dev_priv, TRANS_VTOTAL(dev_priv, cpu_transcoder)); + tmp = intel_de_read(display, TRANS_VTOTAL(display, cpu_transcoder)); adjusted_mode->crtc_vdisplay = REG_FIELD_GET(VACTIVE_MASK, tmp) + 1; adjusted_mode->crtc_vtotal = REG_FIELD_GET(VTOTAL_MASK, tmp) + 1; /* FIXME TGL+ DSI transcoders have this! */ if (!transcoder_is_dsi(cpu_transcoder)) { - tmp = intel_de_read(dev_priv, - TRANS_VBLANK(dev_priv, cpu_transcoder)); + tmp = intel_de_read(display, + TRANS_VBLANK(display, cpu_transcoder)); adjusted_mode->crtc_vblank_start = REG_FIELD_GET(VBLANK_START_MASK, tmp) + 1; adjusted_mode->crtc_vblank_end = REG_FIELD_GET(VBLANK_END_MASK, tmp) + 1; } - tmp = intel_de_read(dev_priv, TRANS_VSYNC(dev_priv, cpu_transcoder)); + tmp = intel_de_read(display, TRANS_VSYNC(display, cpu_transcoder)); adjusted_mode->crtc_vsync_start = REG_FIELD_GET(VSYNC_START_MASK, tmp) + 1; adjusted_mode->crtc_vsync_end = REG_FIELD_GET(VSYNC_END_MASK, tmp) + 1; @@ -2850,11 +2848,11 @@ static void intel_get_transcoder_timings(struct intel_crtc *crtc, adjusted_mode->crtc_vblank_end += 1; } - if (DISPLAY_VER(dev_priv) >= 13 && !transcoder_is_dsi(cpu_transcoder)) + if (DISPLAY_VER(display) >= 13 && !transcoder_is_dsi(cpu_transcoder)) adjusted_mode->crtc_vblank_start = adjusted_mode->crtc_vdisplay + - intel_de_read(dev_priv, - TRANS_SET_CONTEXT_LATENCY(dev_priv, cpu_transcoder)); + intel_de_read(display, + TRANS_SET_CONTEXT_LATENCY(display, cpu_transcoder)); } static void intel_joiner_adjust_pipe_src(struct intel_crtc_state *crtc_state) @@ -2877,11 +2875,10 @@ static void intel_joiner_adjust_pipe_src(struct intel_crtc_state *crtc_state) static void intel_get_pipe_src_size(struct intel_crtc *crtc, struct intel_crtc_state *pipe_config) { - struct drm_device *dev = crtc->base.dev; - struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_display *display = to_intel_display(crtc); u32 tmp; - tmp = intel_de_read(dev_priv, PIPESRC(dev_priv, crtc->pipe)); + tmp = intel_de_read(display, PIPESRC(display, crtc->pipe)); drm_rect_init(&pipe_config->pipe_src, 0, 0, REG_FIELD_GET(PIPESRC_WIDTH_MASK, tmp) + 1, @@ -2892,8 +2889,7 @@ static void intel_get_pipe_src_size(struct intel_crtc *crtc, void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; u32 val = 0; @@ -2902,15 +2898,15 @@ void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state) * - During modeset the pipe is still disabled and must remain so * - During fastset the pipe is already enabled and must remain so */ - if (IS_I830(dev_priv) || !intel_crtc_needs_modeset(crtc_state)) + if (display->platform.i830 || !intel_crtc_needs_modeset(crtc_state)) val |= TRANSCONF_ENABLE; if (crtc_state->double_wide) val |= TRANSCONF_DOUBLE_WIDE; /* only g4x and later have fancy bpc/dither controls */ - if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || - IS_CHERRYVIEW(dev_priv)) { + if (display->platform.g4x || display->platform.valleyview || + display->platform.cherryview) { /* Bspec claims that we can't use dithering for 30bpp pipes. */ if (crtc_state->dither && crtc_state->pipe_bpp != 30) val |= TRANSCONF_DITHER_EN | @@ -2934,7 +2930,7 @@ void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state) } if (crtc_state->hw.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) { - if (DISPLAY_VER(dev_priv) < 4 || + if (DISPLAY_VER(display) < 4 || intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO)) val |= TRANSCONF_INTERLACE_W_FIELD_INDICATION; else @@ -2943,8 +2939,8 @@ void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state) val |= TRANSCONF_INTERLACE_PROGRESSIVE; } - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && - crtc_state->limited_color_range) + if ((display->platform.valleyview || display->platform.cherryview) && + crtc_state->limited_color_range) val |= TRANSCONF_COLOR_RANGE_SELECT; val |= TRANSCONF_GAMMA_MODE(crtc_state->gamma_mode); @@ -2954,17 +2950,17 @@ void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state) val |= TRANSCONF_FRAME_START_DELAY(crtc_state->framestart_delay - 1); - intel_de_write(dev_priv, TRANSCONF(dev_priv, cpu_transcoder), val); - intel_de_posting_read(dev_priv, TRANSCONF(dev_priv, cpu_transcoder)); + intel_de_write(display, TRANSCONF(display, cpu_transcoder), val); + intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder)); } static enum intel_output_format bdw_get_pipe_misc_output_format(struct intel_crtc *crtc) { - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc); u32 tmp; - tmp = intel_de_read(dev_priv, PIPE_MISC(crtc->pipe)); + tmp = intel_de_read(display, PIPE_MISC(crtc->pipe)); if (tmp & PIPE_MISC_YUV420_ENABLE) { /* @@ -2972,8 +2968,8 @@ bdw_get_pipe_misc_output_format(struct intel_crtc *crtc) * For xe3_lpd+ this is implied in YUV420 Enable bit. * Ensure the same for prior platforms in YUV420 Mode bit. */ - if (DISPLAY_VER(dev_priv) < 30) - drm_WARN_ON(&dev_priv->drm, + if (DISPLAY_VER(display) < 30) + drm_WARN_ON(display->drm, (tmp & PIPE_MISC_YUV420_MODE_FULL_BLEND) == 0); return INTEL_OUTPUT_FORMAT_YCBCR420; @@ -2988,7 +2984,6 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, struct intel_crtc_state *pipe_config) { struct intel_display *display = to_intel_display(crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum intel_display_power_domain power_domain; intel_wakeref_t wakeref; u32 tmp; @@ -3006,13 +3001,13 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, ret = false; - tmp = intel_de_read(dev_priv, - TRANSCONF(dev_priv, pipe_config->cpu_transcoder)); + tmp = intel_de_read(display, + TRANSCONF(display, pipe_config->cpu_transcoder)); if (!(tmp & TRANSCONF_ENABLE)) goto out; - if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || - IS_CHERRYVIEW(dev_priv)) { + if (display->platform.g4x || display->platform.valleyview || + display->platform.cherryview) { switch (tmp & TRANSCONF_BPC_MASK) { case TRANSCONF_BPC_6: pipe_config->pipe_bpp = 18; @@ -3029,7 +3024,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, } } - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && + if ((display->platform.valleyview || display->platform.cherryview) && (tmp & TRANSCONF_COLOR_RANGE_SELECT)) pipe_config->limited_color_range = true; @@ -3037,13 +3032,13 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, pipe_config->framestart_delay = REG_FIELD_GET(TRANSCONF_FRAME_START_DELAY_MASK, tmp) + 1; - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && + if ((display->platform.valleyview || display->platform.cherryview) && (tmp & TRANSCONF_WGC_ENABLE)) pipe_config->wgc_enable = true; intel_color_get_config(pipe_config); - if (HAS_DOUBLE_WIDE(dev_priv)) + if (HAS_DOUBLE_WIDE(display)) pipe_config->double_wide = tmp & TRANSCONF_DOUBLE_WIDE; intel_get_transcoder_timings(crtc, pipe_config); @@ -3053,13 +3048,13 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, i9xx_dpll_get_hw_state(crtc, &pipe_config->dpll_hw_state); - if (DISPLAY_VER(dev_priv) >= 4) { + if (DISPLAY_VER(display) >= 4) { tmp = pipe_config->dpll_hw_state.i9xx.dpll_md; pipe_config->pixel_multiplier = ((tmp & DPLL_MD_UDI_MULTIPLIER_MASK) >> DPLL_MD_UDI_MULTIPLIER_SHIFT) + 1; - } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) || - IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) { + } else if (display->platform.i945g || display->platform.i945gm || + display->platform.g33 || display->platform.pineview) { tmp = pipe_config->dpll_hw_state.i9xx.dpll; pipe_config->pixel_multiplier = ((tmp & SDVO_MULTIPLIER_MASK) @@ -3071,9 +3066,9 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, pipe_config->pixel_multiplier = 1; } - if (IS_CHERRYVIEW(dev_priv)) + if (display->platform.cherryview) chv_crtc_clock_get(pipe_config); - else if (IS_VALLEYVIEW(dev_priv)) + else if (display->platform.valleyview) vlv_crtc_clock_get(pipe_config); else i9xx_crtc_clock_get(pipe_config); @@ -3096,8 +3091,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; u32 val = 0; @@ -3139,7 +3133,7 @@ void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state) * This would end up with an odd purple hue over * the entire display. Make sure we don't do it. */ - drm_WARN_ON(&dev_priv->drm, crtc_state->limited_color_range && + drm_WARN_ON(display->drm, crtc_state->limited_color_range && crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB); if (crtc_state->limited_color_range && @@ -3154,14 +3148,13 @@ void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state) val |= TRANSCONF_FRAME_START_DELAY(crtc_state->framestart_delay - 1); val |= TRANSCONF_MSA_TIMING_DELAY(crtc_state->msa_timing_delay); - intel_de_write(dev_priv, TRANSCONF(dev_priv, cpu_transcoder), val); - intel_de_posting_read(dev_priv, TRANSCONF(dev_priv, cpu_transcoder)); + intel_de_write(display, TRANSCONF(display, cpu_transcoder), val); + intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder)); } static void hsw_set_transconf(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; u32 val = 0; @@ -3172,7 +3165,7 @@ static void hsw_set_transconf(const struct intel_crtc_state *crtc_state) if (!intel_crtc_needs_modeset(crtc_state)) val |= TRANSCONF_ENABLE; - if (IS_HASWELL(dev_priv) && crtc_state->dither) + if (display->platform.haswell && crtc_state->dither) val |= TRANSCONF_DITHER_EN | TRANSCONF_DITHER_TYPE_SP; if (crtc_state->hw.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) @@ -3180,20 +3173,19 @@ static void hsw_set_transconf(const struct intel_crtc_state *crtc_state) else val |= TRANSCONF_INTERLACE_PF_PD_ILK; - if (IS_HASWELL(dev_priv) && + if (display->platform.haswell && crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB) val |= TRANSCONF_OUTPUT_COLORSPACE_YUV_HSW; - intel_de_write(dev_priv, TRANSCONF(dev_priv, cpu_transcoder), val); - intel_de_posting_read(dev_priv, TRANSCONF(dev_priv, cpu_transcoder)); + intel_de_write(display, TRANSCONF(display, cpu_transcoder), val); + intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder)); } static void bdw_set_pipe_misc(struct intel_dsb *dsb, const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct intel_display *display = to_intel_display(crtc->base.dev); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 val = 0; switch (crtc_state->pipe_bpp) { @@ -3208,7 +3200,7 @@ static void bdw_set_pipe_misc(struct intel_dsb *dsb, break; case 36: /* Port output 12BPC defined for ADLP+ */ - if (DISPLAY_VER(dev_priv) >= 13) + if (DISPLAY_VER(display) >= 13) val |= PIPE_MISC_BPC_12_ADLP; break; default: @@ -3227,14 +3219,14 @@ static void bdw_set_pipe_misc(struct intel_dsb *dsb, val |= DISPLAY_VER(display) >= 30 ? PIPE_MISC_YUV420_ENABLE : PIPE_MISC_YUV420_ENABLE | PIPE_MISC_YUV420_MODE_FULL_BLEND; - if (DISPLAY_VER(dev_priv) >= 11 && is_hdr_mode(crtc_state)) + if (DISPLAY_VER(display) >= 11 && is_hdr_mode(crtc_state)) val |= PIPE_MISC_HDR_MODE_PRECISION; - if (DISPLAY_VER(dev_priv) >= 12) + if (DISPLAY_VER(display) >= 12) val |= PIPE_MISC_PIXEL_ROUNDING_TRUNC; /* allow PSR with sprite enabled */ - if (IS_BROADWELL(dev_priv)) + if (display->platform.broadwell) val |= PIPE_MISC_PSR_MASK_SPRITE_ENABLE; intel_de_write_dsb(display, dsb, PIPE_MISC(crtc->pipe), val); @@ -3242,10 +3234,10 @@ static void bdw_set_pipe_misc(struct intel_dsb *dsb, int bdw_get_pipe_misc_bpp(struct intel_crtc *crtc) { - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc); u32 tmp; - tmp = intel_de_read(dev_priv, PIPE_MISC(crtc->pipe)); + tmp = intel_de_read(display, PIPE_MISC(crtc->pipe)); switch (tmp & PIPE_MISC_BPC_MASK) { case PIPE_MISC_BPC_6: @@ -3265,7 +3257,7 @@ int bdw_get_pipe_misc_bpp(struct intel_crtc *crtc) * MIPI DSI HW readout. */ case PIPE_MISC_BPC_12_ADLP: - if (DISPLAY_VER(dev_priv) >= 13) + if (DISPLAY_VER(display) >= 13) return 36; fallthrough; default: @@ -3336,8 +3328,6 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc, struct intel_crtc_state *pipe_config) { struct intel_display *display = to_intel_display(crtc); - struct drm_device *dev = crtc->base.dev; - struct drm_i915_private *dev_priv = to_i915(dev); enum intel_display_power_domain power_domain; intel_wakeref_t wakeref; u32 tmp; @@ -3352,8 +3342,8 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc, pipe_config->shared_dpll = NULL; ret = false; - tmp = intel_de_read(dev_priv, - TRANSCONF(dev_priv, pipe_config->cpu_transcoder)); + tmp = intel_de_read(display, + TRANSCONF(display, pipe_config->cpu_transcoder)); if (!(tmp & TRANSCONF_ENABLE)) goto out; @@ -3414,24 +3404,23 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc, return ret; } -static u8 joiner_pipes(struct drm_i915_private *i915) +static u8 joiner_pipes(struct intel_display *display) { u8 pipes; - if (DISPLAY_VER(i915) >= 12) + if (DISPLAY_VER(display) >= 12) pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D); - else if (DISPLAY_VER(i915) >= 11) + else if (DISPLAY_VER(display) >= 11) pipes = BIT(PIPE_B) | BIT(PIPE_C); else pipes = 0; - return pipes & DISPLAY_RUNTIME_INFO(i915)->pipe_mask; + return pipes & DISPLAY_RUNTIME_INFO(display)->pipe_mask; } -static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv, +static bool transcoder_ddi_func_is_enabled(struct intel_display *display, enum transcoder cpu_transcoder) { - struct intel_display *display = &dev_priv->display; enum intel_display_power_domain power_domain; intel_wakeref_t wakeref; u32 tmp = 0; @@ -3439,8 +3428,8 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv, power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder); with_intel_display_power_if_enabled(display, power_domain, wakeref) - tmp = intel_de_read(dev_priv, - TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder)); + tmp = intel_de_read(display, + TRANS_DDI_FUNC_CTL(display, cpu_transcoder)); return tmp & TRANS_DDI_FUNC_ENABLE; } @@ -3448,7 +3437,6 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv, static void enabled_uncompressed_joiner_pipes(struct intel_display *display, u8 *primary_pipes, u8 *secondary_pipes) { - struct drm_i915_private *i915 = to_i915(display->drm); struct intel_crtc *crtc; *primary_pipes = 0; @@ -3457,8 +3445,8 @@ static void enabled_uncompressed_joiner_pipes(struct intel_display *display, if (!HAS_UNCOMPRESSED_JOINER(display)) return; - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, - joiner_pipes(i915)) { + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, + joiner_pipes(display)) { enum intel_display_power_domain power_domain; enum pipe pipe = crtc->pipe; intel_wakeref_t wakeref; @@ -3478,7 +3466,6 @@ static void enabled_uncompressed_joiner_pipes(struct intel_display *display, static void enabled_bigjoiner_pipes(struct intel_display *display, u8 *primary_pipes, u8 *secondary_pipes) { - struct drm_i915_private *i915 = to_i915(display->drm); struct intel_crtc *crtc; *primary_pipes = 0; @@ -3487,8 +3474,8 @@ static void enabled_bigjoiner_pipes(struct intel_display *display, if (!HAS_BIGJOINER(display)) return; - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, - joiner_pipes(i915)) { + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, + joiner_pipes(display)) { enum intel_display_power_domain power_domain; enum pipe pipe = crtc->pipe; intel_wakeref_t wakeref; @@ -3546,10 +3533,9 @@ static u8 fixup_ultrajoiner_secondary_pipes(u8 ultrajoiner_primary_pipes, return ultrajoiner_secondary_pipes | ultrajoiner_primary_pipes << 3; } -static void enabled_ultrajoiner_pipes(struct drm_i915_private *i915, +static void enabled_ultrajoiner_pipes(struct intel_display *display, u8 *primary_pipes, u8 *secondary_pipes) { - struct intel_display *display = &i915->display; struct intel_crtc *crtc; *primary_pipes = 0; @@ -3558,15 +3544,15 @@ static void enabled_ultrajoiner_pipes(struct drm_i915_private *i915, if (!HAS_ULTRAJOINER(display)) return; - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, - joiner_pipes(i915)) { + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, + joiner_pipes(display)) { enum intel_display_power_domain power_domain; enum pipe pipe = crtc->pipe; intel_wakeref_t wakeref; power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe); with_intel_display_power_if_enabled(display, power_domain, wakeref) { - u32 tmp = intel_de_read(i915, ICL_PIPE_DSS_CTL1(pipe)); + u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe)); if (!(tmp & ULTRA_JOINER_ENABLE)) continue; @@ -3579,11 +3565,10 @@ static void enabled_ultrajoiner_pipes(struct drm_i915_private *i915, } } -static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, +static void enabled_joiner_pipes(struct intel_display *display, enum pipe pipe, u8 *primary_pipe, u8 *secondary_pipes) { - struct intel_display *display = to_intel_display(&dev_priv->drm); u8 primary_ultrajoiner_pipes; u8 primary_uncompressed_joiner_pipes, primary_bigjoiner_pipes; u8 secondary_ultrajoiner_pipes; @@ -3591,21 +3576,21 @@ static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, u8 ultrajoiner_pipes; u8 uncompressed_joiner_pipes, bigjoiner_pipes; - enabled_ultrajoiner_pipes(dev_priv, &primary_ultrajoiner_pipes, + enabled_ultrajoiner_pipes(display, &primary_ultrajoiner_pipes, &secondary_ultrajoiner_pipes); /* * For some strange reason the last pipe in the set of four * shouldn't have ultrajoiner enable bit set in hardware. * Set the bit anyway to make life easier. */ - drm_WARN_ON(&dev_priv->drm, + drm_WARN_ON(display->drm, expected_secondary_pipes(primary_ultrajoiner_pipes, 3) != secondary_ultrajoiner_pipes); secondary_ultrajoiner_pipes = fixup_ultrajoiner_secondary_pipes(primary_ultrajoiner_pipes, secondary_ultrajoiner_pipes); - drm_WARN_ON(&dev_priv->drm, (primary_ultrajoiner_pipes & secondary_ultrajoiner_pipes) != 0); + drm_WARN_ON(display->drm, (primary_ultrajoiner_pipes & secondary_ultrajoiner_pipes) != 0); enabled_uncompressed_joiner_pipes(display, &primary_uncompressed_joiner_pipes, &secondary_uncompressed_joiner_pipes); @@ -3699,11 +3684,11 @@ static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, } } -static u8 hsw_panel_transcoders(struct drm_i915_private *i915) +static u8 hsw_panel_transcoders(struct intel_display *display) { u8 panel_transcoder_mask = BIT(TRANSCODER_EDP); - if (DISPLAY_VER(i915) >= 11) + if (DISPLAY_VER(display) >= 11) panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1); return panel_transcoder_mask; @@ -3712,9 +3697,7 @@ static u8 hsw_panel_transcoders(struct drm_i915_private *i915) static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) { struct intel_display *display = to_intel_display(crtc); - struct drm_device *dev = crtc->base.dev; - struct drm_i915_private *dev_priv = to_i915(dev); - u8 panel_transcoder_mask = hsw_panel_transcoders(dev_priv); + u8 panel_transcoder_mask = hsw_panel_transcoders(display); enum transcoder cpu_transcoder; u8 primary_pipe, secondary_pipes; u8 enabled_transcoders = 0; @@ -3723,7 +3706,7 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) * XXX: Do intel_display_power_get_if_enabled before reading this (for * consistency and less surprising code; it's in always on power). */ - for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, + for_each_cpu_transcoder_masked(display, cpu_transcoder, panel_transcoder_mask) { enum intel_display_power_domain power_domain; intel_wakeref_t wakeref; @@ -3732,15 +3715,15 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder); with_intel_display_power_if_enabled(display, power_domain, wakeref) - tmp = intel_de_read(dev_priv, - TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder)); + tmp = intel_de_read(display, + TRANS_DDI_FUNC_CTL(display, cpu_transcoder)); if (!(tmp & TRANS_DDI_FUNC_ENABLE)) continue; switch (tmp & TRANS_DDI_EDP_INPUT_MASK) { default: - drm_WARN(dev, 1, + drm_WARN(display->drm, 1, "unknown pipe linked to transcoder %s\n", transcoder_name(cpu_transcoder)); fallthrough; @@ -3765,14 +3748,14 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) /* single pipe or joiner primary */ cpu_transcoder = (enum transcoder) crtc->pipe; - if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder)) + if (transcoder_ddi_func_is_enabled(display, cpu_transcoder)) enabled_transcoders |= BIT(cpu_transcoder); /* joiner secondary -> consider the primary pipe's transcoder as well */ - enabled_joiner_pipes(dev_priv, crtc->pipe, &primary_pipe, &secondary_pipes); + enabled_joiner_pipes(display, crtc->pipe, &primary_pipe, &secondary_pipes); if (secondary_pipes & BIT(crtc->pipe)) { cpu_transcoder = (enum transcoder)ffs(primary_pipe) - 1; - if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder)) + if (transcoder_ddi_func_is_enabled(display, cpu_transcoder)) enabled_transcoders |= BIT(cpu_transcoder); } @@ -3797,17 +3780,17 @@ static bool has_pipe_transcoders(u8 enabled_transcoders) BIT(TRANSCODER_DSI_1)); } -static void assert_enabled_transcoders(struct drm_i915_private *i915, +static void assert_enabled_transcoders(struct intel_display *display, u8 enabled_transcoders) { /* Only one type of transcoder please */ - drm_WARN_ON(&i915->drm, + drm_WARN_ON(display->drm, has_edp_transcoders(enabled_transcoders) + has_dsi_transcoders(enabled_transcoders) + has_pipe_transcoders(enabled_transcoders) > 1); /* Only DSI transcoders can be ganged */ - drm_WARN_ON(&i915->drm, + drm_WARN_ON(display->drm, !has_dsi_transcoders(enabled_transcoders) && !is_power_of_2(enabled_transcoders)); } @@ -3817,8 +3800,6 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc, struct intel_display_power_domain_set *power_domain_set) { struct intel_display *display = to_intel_display(crtc); - struct drm_device *dev = crtc->base.dev; - struct drm_i915_private *dev_priv = to_i915(dev); unsigned long enabled_transcoders; u32 tmp; @@ -3826,7 +3807,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc, if (!enabled_transcoders) return false; - assert_enabled_transcoders(dev_priv, enabled_transcoders); + assert_enabled_transcoders(display, enabled_transcoders); /* * With the exception of DSI we should only ever have @@ -3839,16 +3820,16 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc, POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder))) return false; - if (hsw_panel_transcoders(dev_priv) & BIT(pipe_config->cpu_transcoder)) { - tmp = intel_de_read(dev_priv, - TRANS_DDI_FUNC_CTL(dev_priv, pipe_config->cpu_transcoder)); + if (hsw_panel_transcoders(display) & BIT(pipe_config->cpu_transcoder)) { + tmp = intel_de_read(display, + TRANS_DDI_FUNC_CTL(display, pipe_config->cpu_transcoder)); if ((tmp & TRANS_DDI_EDP_INPUT_MASK) == TRANS_DDI_EDP_INPUT_A_ONOFF) pipe_config->pch_pfit.force_thru = true; } - tmp = intel_de_read(dev_priv, - TRANSCONF(dev_priv, pipe_config->cpu_transcoder)); + tmp = intel_de_read(display, + TRANSCONF(display, pipe_config->cpu_transcoder)); return tmp & TRANSCONF_ENABLE; } @@ -3901,12 +3882,12 @@ static bool bxt_get_dsi_transcoder_state(struct intel_crtc *crtc, static void intel_joiner_get_config(struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); u8 primary_pipe, secondary_pipes; enum pipe pipe = crtc->pipe; - enabled_joiner_pipes(i915, pipe, &primary_pipe, &secondary_pipes); + enabled_joiner_pipes(display, pipe, &primary_pipe, &secondary_pipes); if (((primary_pipe | secondary_pipes) & BIT(pipe)) == 0) return; @@ -3918,7 +3899,6 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc, struct intel_crtc_state *pipe_config) { struct intel_display *display = to_intel_display(crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); bool active; u32 tmp; @@ -3930,9 +3910,9 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc, active = hsw_get_transcoder_state(crtc, pipe_config, &crtc->hw_readout_power_domains); - if ((IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) && + if ((display->platform.geminilake || display->platform.broxton) && bxt_get_dsi_transcoder_state(crtc, pipe_config, &crtc->hw_readout_power_domains)) { - drm_WARN_ON(&dev_priv->drm, active); + drm_WARN_ON(display->drm, active); active = true; } @@ -3943,17 +3923,17 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc, intel_dsc_get_config(pipe_config); if (!transcoder_is_dsi(pipe_config->cpu_transcoder) || - DISPLAY_VER(dev_priv) >= 11) + DISPLAY_VER(display) >= 11) intel_get_transcoder_timings(crtc, pipe_config); - if (HAS_VRR(dev_priv) && !transcoder_is_dsi(pipe_config->cpu_transcoder)) + if (HAS_VRR(display) && !transcoder_is_dsi(pipe_config->cpu_transcoder)) intel_vrr_get_config(pipe_config); intel_get_pipe_src_size(crtc, pipe_config); - if (IS_HASWELL(dev_priv)) { - u32 tmp = intel_de_read(dev_priv, - TRANSCONF(dev_priv, pipe_config->cpu_transcoder)); + if (display->platform.haswell) { + u32 tmp = intel_de_read(display, + TRANSCONF(display, pipe_config->cpu_transcoder)); if (tmp & TRANSCONF_OUTPUT_COLORSPACE_YUV_HSW) pipe_config->output_format = INTEL_OUTPUT_FORMAT_YCBCR444; @@ -3968,15 +3948,15 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc, intel_color_get_config(pipe_config); - tmp = intel_de_read(dev_priv, WM_LINETIME(crtc->pipe)); + tmp = intel_de_read(display, WM_LINETIME(crtc->pipe)); pipe_config->linetime = REG_FIELD_GET(HSW_LINETIME_MASK, tmp); - if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) + if (display->platform.broadwell || display->platform.haswell) pipe_config->ips_linetime = REG_FIELD_GET(HSW_IPS_LINETIME_MASK, tmp); if (intel_display_power_get_in_set_if_enabled(display, &crtc->hw_readout_power_domains, POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe))) { - if (DISPLAY_VER(dev_priv) >= 9) + if (DISPLAY_VER(display) >= 9) skl_scaler_get_config(pipe_config); else ilk_pfit_get_config(pipe_config); @@ -3987,8 +3967,8 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc, if (pipe_config->cpu_transcoder != TRANSCODER_EDP && !transcoder_is_dsi(pipe_config->cpu_transcoder)) { pipe_config->pixel_multiplier = - intel_de_read(dev_priv, - TRANS_MULT(dev_priv, pipe_config->cpu_transcoder)) + 1; + intel_de_read(display, + TRANS_MULT(display, pipe_config->cpu_transcoder)) + 1; } else { pipe_config->pixel_multiplier = 1; } @@ -4010,10 +3990,10 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc, bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); - if (!i915->display.funcs.display->get_pipe_config(crtc, crtc_state)) + if (!display->funcs.display->get_pipe_config(crtc, crtc_state)) return false; crtc_state->hw.active = true; @@ -4172,6 +4152,7 @@ static u16 hsw_ips_linetime_wm(const struct intel_crtc_state *crtc_state, static u16 skl_linetime_wm(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); const struct drm_display_mode *pipe_mode = @@ -4185,7 +4166,7 @@ static u16 skl_linetime_wm(const struct intel_crtc_state *crtc_state) crtc_state->pixel_rate); /* Display WA #1135: BXT:ALL GLK:ALL */ - if ((IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) && + if ((display->platform.geminilake || display->platform.broxton) && skl_watermark_ipc_enabled(dev_priv)) linetime_wm /= 2; @@ -4195,12 +4176,12 @@ static u16 skl_linetime_wm(const struct intel_crtc_state *crtc_state) static int hsw_compute_linetime_wm(struct intel_atomic_state *state, struct intel_crtc *crtc) { - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(state); struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); const struct intel_cdclk_state *cdclk_state; - if (DISPLAY_VER(dev_priv) >= 9) + if (DISPLAY_VER(display) >= 9) crtc_state->linetime = skl_linetime_wm(crtc_state); else crtc_state->linetime = hsw_linetime_wm(crtc_state); @@ -4222,12 +4203,11 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state, struct intel_crtc *crtc) { struct intel_display *display = to_intel_display(crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); int ret; - if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv) && + if (DISPLAY_VER(display) < 5 && !display->platform.g4x && intel_crtc_needs_modeset(crtc_state) && !crtc_state->hw.active) crtc_state->update_wm_post = true; @@ -4244,13 +4224,13 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state, ret = intel_wm_compute(state, crtc); if (ret) { - drm_dbg_kms(&dev_priv->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] watermarks are invalid\n", crtc->base.base.id, crtc->base.name); return ret; } - if (DISPLAY_VER(dev_priv) >= 9) { + if (DISPLAY_VER(display) >= 9) { if (intel_crtc_needs_modeset(crtc_state) || intel_crtc_needs_fastset(crtc_state)) { ret = skl_update_scaler_crtc(crtc_state); @@ -4269,8 +4249,8 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state, return ret; } - if (DISPLAY_VER(dev_priv) >= 9 || - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { + if (DISPLAY_VER(display) >= 9 || + display->platform.broadwell || display->platform.haswell) { ret = hsw_compute_linetime_wm(state, crtc); if (ret) return ret; @@ -4288,8 +4268,8 @@ static int compute_sink_pipe_bpp(const struct drm_connector_state *conn_state, struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct drm_connector *connector = conn_state->connector; - struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); const struct drm_display_info *info = &connector->display_info; int bpp; @@ -4312,7 +4292,7 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state, } if (bpp < crtc_state->pipe_bpp) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] Limiting display bpp to %d " "(EDID bpp %d, max requested bpp %d, max platform bpp %d)\n", connector->base.id, connector->name, @@ -4330,17 +4310,17 @@ static int compute_baseline_pipe_bpp(struct intel_atomic_state *state, struct intel_crtc *crtc) { - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc); struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); struct drm_connector *connector; struct drm_connector_state *connector_state; int bpp, i; - if ((IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || - IS_CHERRYVIEW(dev_priv))) + if (display->platform.g4x || display->platform.valleyview || + display->platform.cherryview) bpp = 10*3; - else if (DISPLAY_VER(dev_priv) >= 5) + else if (DISPLAY_VER(display) >= 5) bpp = 12*3; else bpp = 8*3; @@ -4364,7 +4344,7 @@ compute_baseline_pipe_bpp(struct intel_atomic_state *state, static bool check_digital_port_conflicts(struct intel_atomic_state *state) { - struct drm_device *dev = state->base.dev; + struct intel_display *display = to_intel_display(state); struct drm_connector *connector; struct drm_connector_list_iter conn_iter; unsigned int used_ports = 0; @@ -4375,14 +4355,14 @@ static bool check_digital_port_conflicts(struct intel_atomic_state *state) * We're going to peek into connector->state, * hence connection_mutex must be held. */ - drm_modeset_lock_assert_held(&dev->mode_config.connection_mutex); + drm_modeset_lock_assert_held(&display->drm->mode_config.connection_mutex); /* * Walk the connector list instead of the encoder * list to detect the problem on ddi platforms * where there's just one encoder per digital port. */ - drm_connector_list_iter_begin(dev, &conn_iter); + drm_connector_list_iter_begin(display->drm, &conn_iter); drm_for_each_connector_iter(connector, &conn_iter) { struct drm_connector_state *connector_state; struct intel_encoder *encoder; @@ -4398,11 +4378,11 @@ static bool check_digital_port_conflicts(struct intel_atomic_state *state) encoder = to_intel_encoder(connector_state->best_encoder); - drm_WARN_ON(dev, !connector_state->crtc); + drm_WARN_ON(display->drm, !connector_state->crtc); switch (encoder->type) { case INTEL_OUTPUT_DDI: - if (drm_WARN_ON(dev, !HAS_DDI(to_i915(dev)))) + if (drm_WARN_ON(display->drm, !HAS_DDI(display))) break; fallthrough; case INTEL_OUTPUT_DP: @@ -4550,9 +4530,9 @@ static int intel_crtc_prepare_cleared_state(struct intel_atomic_state *state, struct intel_crtc *crtc) { + struct intel_display *display = to_intel_display(state); struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_crtc_state *saved_state; saved_state = intel_crtc_state_alloc(crtc); @@ -4577,8 +4557,8 @@ intel_crtc_prepare_cleared_state(struct intel_atomic_state *state, memcpy(saved_state->icl_port_dplls, crtc_state->icl_port_dplls, sizeof(saved_state->icl_port_dplls)); saved_state->crc_enabled = crtc_state->crc_enabled; - if (IS_G4X(dev_priv) || - IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) + if (display->platform.g4x || + display->platform.valleyview || display->platform.cherryview) saved_state->wm = crtc_state->wm; memcpy(crtc_state, saved_state, sizeof(*crtc_state)); @@ -4594,7 +4574,7 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, struct intel_crtc *crtc, const struct intel_link_bw_limits *limits) { - struct drm_i915_private *i915 = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc); struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); struct drm_connector *connector; @@ -4627,7 +4607,7 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, crtc_state->max_link_bpp_x16 = limits->max_bpp_x16[crtc->pipe]; if (crtc_state->pipe_bpp > fxp_q4_to_int(crtc_state->max_link_bpp_x16)) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] Link bpp limited to " FXP_Q4_FMT "\n", crtc->base.base.id, crtc->base.name, FXP_Q4_ARGS(crtc_state->max_link_bpp_x16)); @@ -4657,7 +4637,7 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, continue; if (!check_single_encoder_cloning(state, crtc, encoder)) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[ENCODER:%d:%s] rejecting invalid cloning configuration\n", encoder->base.base.id, encoder->base.name); return -EINVAL; @@ -4699,7 +4679,7 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, if (ret == -EDEADLK) return ret; if (ret < 0) { - drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] config failure: %d\n", + drm_dbg_kms(display->drm, "[ENCODER:%d:%s] config failure: %d\n", encoder->base.base.id, encoder->base.name, ret); return ret; } @@ -4715,7 +4695,7 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, if (ret == -EDEADLK) return ret; if (ret < 0) { - drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] config failure: %d\n", + drm_dbg_kms(display->drm, "[CRTC:%d:%s] config failure: %d\n", crtc->base.base.id, crtc->base.name, ret); return ret; } @@ -4726,7 +4706,7 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, */ crtc_state->dither = (crtc_state->pipe_bpp == 6*3) && !crtc_state->dither_force_disable; - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] hw max bpp: %i, pipe bpp: %i, dithering: %i\n", crtc->base.base.id, crtc->base.name, base_bpp, crtc_state->pipe_bpp, crtc_state->dither); @@ -4858,7 +4838,7 @@ pipe_config_infoframe_mismatch(struct drm_printer *p, bool fastset, const union hdmi_infoframe *a, const union hdmi_infoframe *b) { - struct drm_i915_private *i915 = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc); const char *loglevel; if (fastset) { @@ -4873,9 +4853,9 @@ pipe_config_infoframe_mismatch(struct drm_printer *p, bool fastset, pipe_config_mismatch(p, fastset, crtc, name, "infoframe"); drm_printf(p, "expected:\n"); - hdmi_infoframe_log(loglevel, i915->drm.dev, a); + hdmi_infoframe_log(loglevel, display->drm->dev, a); drm_printf(p, "found:\n"); - hdmi_infoframe_log(loglevel, i915->drm.dev, b); + hdmi_infoframe_log(loglevel, display->drm->dev, b); } static void @@ -4991,16 +4971,15 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, bool fastset) { struct intel_display *display = to_intel_display(current_config); - struct drm_i915_private *dev_priv = to_i915(current_config->uapi.crtc->dev); struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); struct drm_printer p; u32 exclude_infoframes = 0; bool ret = true; if (fastset) - p = drm_dbg_printer(&dev_priv->drm, DRM_UT_KMS, NULL); + p = drm_dbg_printer(display->drm, DRM_UT_KMS, NULL); else - p = drm_err_printer(&dev_priv->drm, NULL); + p = drm_err_printer(display->drm, NULL); #define PIPE_CONF_CHECK_X(name) do { \ if (current_config->name != pipe_config->name) { \ @@ -5267,8 +5246,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_I(output_format); PIPE_CONF_CHECK_BOOL(has_hdmi_sink); - if ((DISPLAY_VER(dev_priv) < 8 && !IS_HASWELL(dev_priv)) || - IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) + if ((DISPLAY_VER(display) < 8 && !display->platform.haswell) || + display->platform.valleyview || display->platform.cherryview) PIPE_CONF_CHECK_BOOL(limited_color_range); PIPE_CONF_CHECK_BOOL(hdmi_scrambling); @@ -5284,7 +5263,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_X(gmch_pfit.control); /* pfit ratios are autocomputed by the hw on gen4+ */ - if (DISPLAY_VER(dev_priv) < 4) + if (DISPLAY_VER(display) < 4) PIPE_CONF_CHECK_X(gmch_pfit.pgm_ratios); PIPE_CONF_CHECK_X(gmch_pfit.lvds_border_bits); @@ -5304,7 +5283,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_I(pixel_rate); PIPE_CONF_CHECK_X(gamma_mode); - if (IS_CHERRYVIEW(dev_priv)) + if (display->platform.cherryview) PIPE_CONF_CHECK_X(cgm_mode); else PIPE_CONF_CHECK_X(csc_mode); @@ -5324,21 +5303,21 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_BOOL(double_wide); - if (dev_priv->display.dpll.mgr) + if (display->dpll.mgr) PIPE_CONF_CHECK_P(shared_dpll); /* FIXME convert everything over the dpll_mgr */ - if (dev_priv->display.dpll.mgr || HAS_GMCH(dev_priv)) + if (display->dpll.mgr || HAS_GMCH(display)) PIPE_CONF_CHECK_PLL(dpll_hw_state); /* FIXME convert MTL+ platforms over to dpll_mgr */ - if (DISPLAY_VER(dev_priv) >= 14) + if (DISPLAY_VER(display) >= 14) PIPE_CONF_CHECK_PLL_CX0(dpll_hw_state.cx0pll); PIPE_CONF_CHECK_X(dsi_pll.ctrl); PIPE_CONF_CHECK_X(dsi_pll.div); - if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5) + if (display->platform.g4x || DISPLAY_VER(display) >= 5) PIPE_CONF_CHECK_I(pipe_bpp); if (!fastset || !pipe_config->update_m_n) { @@ -5454,11 +5433,11 @@ static int intel_modeset_pipe(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state, const char *reason) { - struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); int ret; - drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] Full modeset due to %s\n", + drm_dbg_kms(display->drm, "[CRTC:%d:%s] Full modeset due to %s\n", crtc->base.base.id, crtc->base.name, reason); ret = drm_atomic_add_affected_connectors(&state->base, @@ -5498,10 +5477,10 @@ static int intel_modeset_pipe(struct intel_atomic_state *state, int intel_modeset_pipes_in_mask_early(struct intel_atomic_state *state, const char *reason, u8 mask) { - struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); struct intel_crtc *crtc; - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, mask) { + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, mask) { struct intel_crtc_state *crtc_state; int ret; @@ -5545,10 +5524,10 @@ intel_crtc_flag_modeset(struct intel_crtc_state *crtc_state) int intel_modeset_all_pipes_late(struct intel_atomic_state *state, const char *reason) { - struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); struct intel_crtc *crtc; - for_each_intel_crtc(&dev_priv->drm, crtc) { + for_each_intel_crtc(display->drm, crtc) { struct intel_crtc_state *crtc_state; int ret; @@ -5688,11 +5667,11 @@ u8 intel_calc_active_pipes(struct intel_atomic_state *state, static int intel_modeset_checks(struct intel_atomic_state *state) { - struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); state->modeset = true; - if (IS_HASWELL(dev_priv)) + if (display->platform.haswell) return hsw_mode_set_planes_workaround(state); return 0; @@ -5709,15 +5688,15 @@ static bool lrr_params_changed(const struct drm_display_mode *old_adjusted_mode, static void intel_crtc_check_fastset(const struct intel_crtc_state *old_crtc_state, struct intel_crtc_state *new_crtc_state) { + struct intel_display *display = to_intel_display(new_crtc_state); struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); /* only allow LRR when the timings stay within the VRR range */ if (old_crtc_state->vrr.in_range != new_crtc_state->vrr.in_range) new_crtc_state->update_lrr = false; if (!intel_pipe_config_compare(old_crtc_state, new_crtc_state, true)) { - drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] fastset requirement not met, forcing full modeset\n", + drm_dbg_kms(display->drm, "[CRTC:%d:%s] fastset requirement not met, forcing full modeset\n", crtc->base.base.id, crtc->base.name); } else { if (allow_vblank_delay_fastset(old_crtc_state)) @@ -5741,17 +5720,17 @@ static void intel_crtc_check_fastset(const struct intel_crtc_state *old_crtc_sta static int intel_atomic_check_crtcs(struct intel_atomic_state *state) { + struct intel_display *display = to_intel_display(state); struct intel_crtc_state __maybe_unused *crtc_state; struct intel_crtc *crtc; int i; for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { - struct drm_i915_private *i915 = to_i915(crtc->base.dev); int ret; ret = intel_crtc_atomic_check(state, crtc); if (ret) { - drm_dbg_atomic(&i915->drm, + drm_dbg_atomic(display->drm, "[CRTC:%d:%s] atomic driver check failed\n", crtc->base.base.id, crtc->base.name); return ret; @@ -5798,7 +5777,7 @@ static bool intel_pipes_need_modeset(struct intel_atomic_state *state, static int intel_atomic_check_joiner(struct intel_atomic_state *state, struct intel_crtc *primary_crtc) { - struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); struct intel_crtc_state *primary_crtc_state = intel_atomic_get_new_crtc_state(state, primary_crtc); struct intel_crtc *secondary_crtc; @@ -5807,20 +5786,20 @@ static int intel_atomic_check_joiner(struct intel_atomic_state *state, return 0; /* sanity check */ - if (drm_WARN_ON(&i915->drm, + if (drm_WARN_ON(display->drm, primary_crtc->pipe != joiner_primary_pipe(primary_crtc_state))) return -EINVAL; - if (primary_crtc_state->joiner_pipes & ~joiner_pipes(i915)) { - drm_dbg_kms(&i915->drm, + if (primary_crtc_state->joiner_pipes & ~joiner_pipes(display)) { + drm_dbg_kms(display->drm, "[CRTC:%d:%s] Cannot act as joiner primary " "(need 0x%x as pipes, only 0x%x possible)\n", primary_crtc->base.base.id, primary_crtc->base.name, - primary_crtc_state->joiner_pipes, joiner_pipes(i915)); + primary_crtc_state->joiner_pipes, joiner_pipes(display)); return -EINVAL; } - for_each_intel_crtc_in_pipe_mask(&i915->drm, secondary_crtc, + for_each_intel_crtc_in_pipe_mask(display->drm, secondary_crtc, intel_crtc_joiner_secondary_pipes(primary_crtc_state)) { struct intel_crtc_state *secondary_crtc_state; int ret; @@ -5831,7 +5810,7 @@ static int intel_atomic_check_joiner(struct intel_atomic_state *state, /* primary being enabled, secondary was already configured? */ if (secondary_crtc_state->uapi.enable) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] secondary is enabled as normal CRTC, but " "[CRTC:%d:%s] claiming this CRTC for joiner.\n", secondary_crtc->base.base.id, secondary_crtc->base.name, @@ -5850,7 +5829,7 @@ static int intel_atomic_check_joiner(struct intel_atomic_state *state, drm_crtc_index(&secondary_crtc->base))) return -EINVAL; - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] Used as secondary for joiner primary [CRTC:%d:%s]\n", secondary_crtc->base.base.id, secondary_crtc->base.name, primary_crtc->base.base.id, primary_crtc->base.name); @@ -5869,12 +5848,12 @@ static int intel_atomic_check_joiner(struct intel_atomic_state *state, static void kill_joiner_secondaries(struct intel_atomic_state *state, struct intel_crtc *primary_crtc) { - struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); struct intel_crtc_state *primary_crtc_state = intel_atomic_get_new_crtc_state(state, primary_crtc); struct intel_crtc *secondary_crtc; - for_each_intel_crtc_in_pipe_mask(&i915->drm, secondary_crtc, + for_each_intel_crtc_in_pipe_mask(display->drm, secondary_crtc, intel_crtc_joiner_secondary_pipes(primary_crtc_state)) { struct intel_crtc_state *secondary_crtc_state = intel_atomic_get_new_crtc_state(state, secondary_crtc); @@ -5908,7 +5887,7 @@ static void kill_joiner_secondaries(struct intel_atomic_state *state, static int intel_async_flip_check_uapi(struct intel_atomic_state *state, struct intel_crtc *crtc) { - struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); const struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); const struct intel_plane_state *old_plane_state; @@ -5920,14 +5899,14 @@ static int intel_async_flip_check_uapi(struct intel_atomic_state *state, return 0; if (!new_crtc_state->uapi.active) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] not active\n", crtc->base.base.id, crtc->base.name); return -EINVAL; } if (intel_crtc_needs_modeset(new_crtc_state)) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] modeset required\n", crtc->base.base.id, crtc->base.name); return -EINVAL; @@ -5938,7 +5917,7 @@ static int intel_async_flip_check_uapi(struct intel_atomic_state *state, * Remove this check once the issues are fixed. */ if (new_crtc_state->joiner_pipes) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] async flip disallowed with joiner\n", crtc->base.base.id, crtc->base.name); return -EINVAL; @@ -5957,14 +5936,14 @@ static int intel_async_flip_check_uapi(struct intel_atomic_state *state, * enabled in the atomic IOCTL path. */ if (!plane->async_flip) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] async flip not supported\n", plane->base.base.id, plane->base.name); return -EINVAL; } if (!old_plane_state->uapi.fb || !new_plane_state->uapi.fb) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] no old or new framebuffer\n", plane->base.base.id, plane->base.name); return -EINVAL; @@ -5976,7 +5955,7 @@ static int intel_async_flip_check_uapi(struct intel_atomic_state *state, static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct intel_crtc *crtc) { - struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); const struct intel_crtc_state *old_crtc_state, *new_crtc_state; const struct intel_plane_state *new_plane_state, *old_plane_state; struct intel_plane *plane; @@ -5989,21 +5968,21 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in return 0; if (!new_crtc_state->hw.active) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] not active\n", crtc->base.base.id, crtc->base.name); return -EINVAL; } if (intel_crtc_needs_modeset(new_crtc_state)) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] modeset required\n", crtc->base.base.id, crtc->base.name); return -EINVAL; } if (old_crtc_state->active_planes != new_crtc_state->active_planes) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] Active planes cannot be in async flip\n", crtc->base.base.id, crtc->base.name); return -EINVAL; @@ -6019,7 +5998,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in * if we're really about to ask the hardware to perform * an async flip. We should never get this far otherwise. */ - if (drm_WARN_ON(&i915->drm, + if (drm_WARN_ON(display->drm, new_crtc_state->do_async_flip && !plane->async_flip)) return -EINVAL; @@ -6035,7 +6014,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in continue; if (!intel_plane_can_async_flip(plane, new_plane_state->hw.fb->modifier)) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] Modifier 0x%llx does not support async flip\n", plane->base.base.id, plane->base.name, new_plane_state->hw.fb->modifier); @@ -6044,7 +6023,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in if (intel_format_info_is_yuv_semiplanar(new_plane_state->hw.fb->format, new_plane_state->hw.fb->modifier)) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] Planar formats do not support async flips\n", plane->base.base.id, plane->base.name); return -EINVAL; @@ -6059,7 +6038,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in if (old_plane_state->view.color_plane[0].mapping_stride != new_plane_state->view.color_plane[0].mapping_stride) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] Stride cannot be changed in async flip\n", plane->base.base.id, plane->base.name); return -EINVAL; @@ -6067,7 +6046,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in if (old_plane_state->hw.fb->modifier != new_plane_state->hw.fb->modifier) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] Modifier cannot be changed in async flip\n", plane->base.base.id, plane->base.name); return -EINVAL; @@ -6075,7 +6054,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in if (old_plane_state->hw.fb->format != new_plane_state->hw.fb->format) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] Pixel format cannot be changed in async flip\n", plane->base.base.id, plane->base.name); return -EINVAL; @@ -6083,7 +6062,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in if (old_plane_state->hw.rotation != new_plane_state->hw.rotation) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] Rotation cannot be changed in async flip\n", plane->base.base.id, plane->base.name); return -EINVAL; @@ -6091,7 +6070,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in if (skl_plane_aux_dist(old_plane_state, 0) != skl_plane_aux_dist(new_plane_state, 0)) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] AUX_DIST cannot be changed in async flip\n", plane->base.base.id, plane->base.name); return -EINVAL; @@ -6099,14 +6078,14 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in if (!drm_rect_equals(&old_plane_state->uapi.src, &new_plane_state->uapi.src) || !drm_rect_equals(&old_plane_state->uapi.dst, &new_plane_state->uapi.dst)) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] Size/co-ordinates cannot be changed in async flip\n", plane->base.base.id, plane->base.name); return -EINVAL; } if (old_plane_state->hw.alpha != new_plane_state->hw.alpha) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANES:%d:%s] Alpha value cannot be changed in async flip\n", plane->base.base.id, plane->base.name); return -EINVAL; @@ -6114,21 +6093,21 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in if (old_plane_state->hw.pixel_blend_mode != new_plane_state->hw.pixel_blend_mode) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] Pixel blend mode cannot be changed in async flip\n", plane->base.base.id, plane->base.name); return -EINVAL; } if (old_plane_state->hw.color_encoding != new_plane_state->hw.color_encoding) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] Color encoding cannot be changed in async flip\n", plane->base.base.id, plane->base.name); return -EINVAL; } if (old_plane_state->hw.color_range != new_plane_state->hw.color_range) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] Color range cannot be changed in async flip\n", plane->base.base.id, plane->base.name); return -EINVAL; @@ -6136,7 +6115,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in /* plane decryption is allow to change only in synchronous flips */ if (old_plane_state->decrypt != new_plane_state->decrypt) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] Decryption cannot be changed in async flip\n", plane->base.base.id, plane->base.name); return -EINVAL; @@ -6148,7 +6127,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state) { - struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); const struct intel_plane_state *plane_state; struct intel_crtc_state *crtc_state; struct intel_plane *plane; @@ -6179,13 +6158,13 @@ static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state) modeset_pipes |= crtc_state->joiner_pipes; } - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, affected_pipes) { + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, affected_pipes) { crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); if (IS_ERR(crtc_state)) return PTR_ERR(crtc_state); } - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, modeset_pipes) { + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, modeset_pipes) { int ret; crtc_state = intel_atomic_get_new_crtc_state(state, crtc); @@ -6215,7 +6194,7 @@ static int intel_atomic_check_config(struct intel_atomic_state *state, struct intel_link_bw_limits *limits, enum pipe *failed_pipe) { - struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); struct intel_crtc_state *new_crtc_state; struct intel_crtc *crtc; int ret; @@ -6240,7 +6219,7 @@ static int intel_atomic_check_config(struct intel_atomic_state *state, continue; } - if (drm_WARN_ON(&i915->drm, intel_crtc_is_joiner_secondary(new_crtc_state))) + if (drm_WARN_ON(display->drm, intel_crtc_is_joiner_secondary(new_crtc_state))) continue; ret = intel_crtc_prepare_cleared_state(state, crtc); @@ -6259,7 +6238,7 @@ static int intel_atomic_check_config(struct intel_atomic_state *state, if (!intel_crtc_needs_modeset(new_crtc_state)) continue; - if (drm_WARN_ON(&i915->drm, intel_crtc_is_joiner_secondary(new_crtc_state))) + if (drm_WARN_ON(display->drm, intel_crtc_is_joiner_secondary(new_crtc_state))) continue; if (!new_crtc_state->hw.enable) @@ -6324,7 +6303,6 @@ int intel_atomic_check(struct drm_device *dev, struct drm_atomic_state *_state) { struct intel_display *display = to_intel_display(dev); - struct drm_i915_private *dev_priv = to_i915(dev); struct intel_atomic_state *state = to_intel_atomic_state(_state); struct intel_crtc_state *old_crtc_state, *new_crtc_state; struct intel_crtc *crtc; @@ -6372,7 +6350,7 @@ int intel_atomic_check(struct drm_device *dev, continue; if (intel_crtc_is_joiner_secondary(new_crtc_state)) { - drm_WARN_ON(&dev_priv->drm, new_crtc_state->uapi.enable); + drm_WARN_ON(display->drm, new_crtc_state->uapi.enable); continue; } @@ -6443,7 +6421,7 @@ int intel_atomic_check(struct drm_device *dev, } if (any_ms && !check_digital_port_conflicts(state)) { - drm_dbg_kms(&dev_priv->drm, + drm_dbg_kms(display->drm, "rejecting conflicting digital port configuration\n"); ret = -EINVAL; goto fail; @@ -6499,7 +6477,7 @@ int intel_atomic_check(struct drm_device *dev, goto fail; /* Either full modeset or fastset (or neither), never both */ - drm_WARN_ON(&dev_priv->drm, + drm_WARN_ON(display->drm, intel_crtc_needs_modeset(new_crtc_state) && intel_crtc_needs_fastset(new_crtc_state)); @@ -6559,6 +6537,7 @@ void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc, static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state, const struct intel_crtc_state *new_crtc_state) { + struct intel_display *display = to_intel_display(new_crtc_state); struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -6573,7 +6552,7 @@ static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state, intel_set_pipe_src_size(new_crtc_state); /* on skylake this is done by detaching scalers */ - if (DISPLAY_VER(dev_priv) >= 9) { + if (DISPLAY_VER(display) >= 9) { if (new_crtc_state->pch_pfit.enabled) skl_pfit_enable(new_crtc_state); } else if (HAS_PCH_SPLIT(dev_priv)) { @@ -6591,8 +6570,8 @@ static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state, * HSW/BDW only really need this here for fastboot, after * that the value should not change without a full modeset. */ - if (DISPLAY_VER(dev_priv) >= 9 || - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) + if (DISPLAY_VER(display) >= 9 || + display->platform.broadwell || display->platform.haswell) hsw_set_linetime_wm(new_crtc_state); if (new_crtc_state->update_m_n) @@ -6606,14 +6585,14 @@ static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state, static void commit_pipe_pre_planes(struct intel_atomic_state *state, struct intel_crtc *crtc) { - struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc); const struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); bool modeset = intel_crtc_needs_modeset(new_crtc_state); - drm_WARN_ON(&dev_priv->drm, new_crtc_state->use_dsb); + drm_WARN_ON(display->drm, new_crtc_state->use_dsb); /* * During modesets pipe configuration was programmed as the @@ -6623,7 +6602,7 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state, if (intel_crtc_needs_color_update(new_crtc_state)) intel_color_commit_arm(NULL, new_crtc_state); - if (DISPLAY_VER(dev_priv) >= 9 || IS_BROADWELL(dev_priv)) + if (DISPLAY_VER(display) >= 9 || display->platform.broadwell) bdw_set_pipe_misc(NULL, new_crtc_state); if (intel_crtc_needs_fastset(new_crtc_state)) @@ -6638,18 +6617,18 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state, static void commit_pipe_post_planes(struct intel_atomic_state *state, struct intel_crtc *crtc) { - struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); const struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - drm_WARN_ON(&dev_priv->drm, new_crtc_state->use_dsb); + drm_WARN_ON(display->drm, new_crtc_state->use_dsb); /* * Disable the scaler(s) after the plane(s) so that we don't * get a catastrophic underrun even if the two operations * end up happening in two different frames. */ - if (DISPLAY_VER(dev_priv) >= 9 && + if (DISPLAY_VER(display) >= 9 && !intel_crtc_needs_modeset(new_crtc_state)) skl_detach_scalers(NULL, new_crtc_state); @@ -6660,7 +6639,7 @@ static void commit_pipe_post_planes(struct intel_atomic_state *state, static void intel_enable_crtc(struct intel_atomic_state *state, struct intel_crtc *crtc) { - struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); const struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); struct intel_crtc *pipe_crtc; @@ -6668,7 +6647,7 @@ static void intel_enable_crtc(struct intel_atomic_state *state, if (!intel_crtc_needs_modeset(new_crtc_state)) return; - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, + for_each_intel_crtc_in_pipe_mask_reverse(display->drm, pipe_crtc, intel_crtc_joined_pipe_mask(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -6677,7 +6656,7 @@ static void intel_enable_crtc(struct intel_atomic_state *state, intel_crtc_update_active_timings(pipe_crtc_state, false); } - dev_priv->display.funcs.display->crtc_enable(state, crtc); + display->funcs.display->crtc_enable(state, crtc); /* vblanks work again, re-enable pipe CRC. */ intel_crtc_enable_pipe_crc(crtc); @@ -6687,7 +6666,6 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state, struct intel_crtc *crtc) { struct intel_display *display = to_intel_display(state); - struct drm_i915_private *i915 = to_i915(state->base.dev); const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc); struct intel_crtc_state *new_crtc_state = @@ -6696,7 +6674,7 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state, if (old_crtc_state->inherited || intel_crtc_needs_modeset(new_crtc_state)) { - if (HAS_DPT(i915)) + if (HAS_DPT(display)) intel_dpt_configure(crtc); } @@ -6710,7 +6688,7 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state, if (intel_crtc_needs_fastset(new_crtc_state)) intel_encoders_update_pipe(state, crtc); - if (DISPLAY_VER(i915) >= 11 && + if (DISPLAY_VER(display) >= 11 && intel_crtc_needs_fastset(new_crtc_state)) icl_set_pipe_chicken(new_crtc_state); @@ -6784,7 +6762,7 @@ static void intel_update_crtc(struct intel_atomic_state *state, static void intel_old_crtc_state_disables(struct intel_atomic_state *state, struct intel_crtc *crtc) { - struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc); struct intel_crtc *pipe_crtc; @@ -6793,13 +6771,13 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state, * We need to disable pipe CRC before disabling the pipe, * or we race against vblank off. */ - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, + for_each_intel_crtc_in_pipe_mask(display->drm, pipe_crtc, intel_crtc_joined_pipe_mask(old_crtc_state)) intel_crtc_disable_pipe_crc(pipe_crtc); - dev_priv->display.funcs.display->crtc_disable(state, crtc); + display->funcs.display->crtc_disable(state, crtc); - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, + for_each_intel_crtc_in_pipe_mask(display->drm, pipe_crtc, intel_crtc_joined_pipe_mask(old_crtc_state)) { const struct intel_crtc_state *new_pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -6814,7 +6792,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state, static void intel_commit_modeset_disables(struct intel_atomic_state *state) { - struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); const struct intel_crtc_state *new_crtc_state, *old_crtc_state; struct intel_crtc *crtc; u8 disable_pipes = 0; @@ -6881,7 +6859,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state) disable_pipes &= ~intel_crtc_joined_pipe_mask(old_crtc_state); } - drm_WARN_ON(&i915->drm, disable_pipes); + drm_WARN_ON(display->drm, disable_pipes); } static void intel_commit_modeset_enables(struct intel_atomic_state *state) @@ -6908,7 +6886,7 @@ static void intel_commit_modeset_enables(struct intel_atomic_state *state) static void skl_commit_modeset_enables(struct intel_atomic_state *state) { - struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); struct intel_crtc *crtc; struct intel_crtc_state *old_crtc_state, *new_crtc_state; struct skl_ddb_entry entries[I915_MAX_PIPES] = {}; @@ -7050,8 +7028,9 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state) if ((update_pipes & BIT(pipe)) == 0) continue; - drm_WARN_ON(&dev_priv->drm, skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb, - entries, I915_MAX_PIPES, pipe)); + drm_WARN_ON(display->drm, + skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb, + entries, I915_MAX_PIPES, pipe)); entries[pipe] = new_crtc_state->wm.skl.ddb; update_pipes &= ~BIT(pipe); @@ -7059,8 +7038,8 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state) intel_update_crtc(state, crtc); } - drm_WARN_ON(&dev_priv->drm, modeset_pipes); - drm_WARN_ON(&dev_priv->drm, update_pipes); + drm_WARN_ON(display->drm, modeset_pipes); + drm_WARN_ON(display->drm, update_pipes); } static void intel_atomic_commit_fence_wait(struct intel_atomic_state *intel_state) @@ -7105,7 +7084,7 @@ static void intel_atomic_cleanup_work(struct work_struct *work) { struct intel_atomic_state *state = container_of(work, struct intel_atomic_state, cleanup_work); - struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); struct intel_crtc_state *old_crtc_state; struct intel_crtc *crtc; int i; @@ -7113,14 +7092,14 @@ static void intel_atomic_cleanup_work(struct work_struct *work) for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) intel_atomic_dsb_cleanup(old_crtc_state); - drm_atomic_helper_cleanup_planes(&i915->drm, &state->base); + drm_atomic_helper_cleanup_planes(display->drm, &state->base); drm_atomic_helper_commit_cleanup_done(&state->base); drm_atomic_state_put(&state->base); } static void intel_atomic_prepare_plane_clear_colors(struct intel_atomic_state *state) { - struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_display *display = to_intel_display(state); struct intel_plane *plane; struct intel_plane_state *plane_state; int i; @@ -7157,7 +7136,7 @@ static void intel_atomic_prepare_plane_clear_colors(struct intel_atomic_state *s &plane_state->ccval, sizeof(plane_state->ccval)); /* The above could only fail if the FB obj has an unexpected backing store type. */ - drm_WARN_ON(&i915->drm, ret); + drm_WARN_ON(display->drm, ret); } } @@ -7258,8 +7237,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, static void intel_atomic_commit_tail(struct intel_atomic_state *state) { struct intel_display *display = to_intel_display(state); - struct drm_device *dev = state->base.dev; - struct drm_i915_private *dev_priv = to_i915(dev); + struct drm_i915_private *dev_priv = to_i915(display->drm); struct intel_crtc_state *new_crtc_state, *old_crtc_state; struct intel_crtc *crtc; struct intel_power_domain_mask put_domains[I915_MAX_PIPES] = {}; @@ -7338,7 +7316,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) intel_pmdemand_pre_plane_update(state); if (state->modeset) { - drm_atomic_helper_update_legacy_modeset_state(dev, &state->base); + drm_atomic_helper_update_legacy_modeset_state(display->drm, &state->base); intel_set_cdclk_pre_plane_update(state); @@ -7353,10 +7331,10 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) /* Complete events for now disable pipes here. */ if (modeset && !new_crtc_state->hw.active && new_crtc_state->uapi.event) { - spin_lock_irq(&dev->event_lock); + spin_lock_irq(&display->drm->event_lock); drm_crtc_send_vblank_event(&crtc->base, new_crtc_state->uapi.event); - spin_unlock_irq(&dev->event_lock); + spin_unlock_irq(&display->drm->event_lock); new_crtc_state->uapi.event = NULL; } @@ -7372,7 +7350,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) } /* Now enable the clocks, plane, pipe, and connectors that we set up. */ - dev_priv->display.funcs.display->commit_modeset_enables(state); + display->funcs.display->commit_modeset_enables(state); intel_program_dpkgc_latency(state); @@ -7390,7 +7368,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) * - switch over to the vblank wait helper in the core after that since * we don't need out special handling any more. */ - drm_atomic_helper_wait_for_flip_done(dev, &state->base); + drm_atomic_helper_wait_for_flip_done(display->drm, &state->base); for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { if (new_crtc_state->do_async_flip) @@ -7419,7 +7397,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) * chance of catching underruns with the intermediate watermarks * vs. the new plane configuration. */ - if (DISPLAY_VER(dev_priv) == 2 && planes_enabling(old_crtc_state, new_crtc_state)) + if (DISPLAY_VER(display) == 2 && planes_enabling(old_crtc_state, new_crtc_state)) intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe, true); intel_optimize_watermarks(state, crtc); @@ -7485,7 +7463,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) * down. */ INIT_WORK(&state->cleanup_work, intel_atomic_cleanup_work); - queue_work(dev_priv->display.wq.cleanup, &state->cleanup_work); + queue_work(display->wq.cleanup, &state->cleanup_work); } static void intel_atomic_commit_work(struct work_struct *work) @@ -7544,6 +7522,7 @@ static int intel_atomic_swap_state(struct intel_atomic_state *state) int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state, bool nonblock) { + struct intel_display *display = to_intel_display(dev); struct intel_atomic_state *state = to_intel_atomic_state(_state); struct drm_i915_private *dev_priv = to_i915(dev); int ret = 0; @@ -7567,7 +7546,7 @@ int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state, * FIXME doing watermarks and fb cleanup from a vblank worker * (assuming we had any) would solve these problems. */ - if (DISPLAY_VER(dev_priv) < 9 && state->base.legacy_cursor_update) { + if (DISPLAY_VER(display) < 9 && state->base.legacy_cursor_update) { struct intel_crtc_state *new_crtc_state; struct intel_crtc *crtc; int i; @@ -7580,7 +7559,7 @@ int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state, ret = intel_atomic_prepare_commit(state); if (ret) { - drm_dbg_atomic(&dev_priv->drm, + drm_dbg_atomic(display->drm, "Preparing state failed with %i\n", ret); intel_runtime_pm_put(&dev_priv->runtime_pm, state->wakeref); return ret; @@ -7600,12 +7579,12 @@ int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state, INIT_WORK(&state->base.commit_work, intel_atomic_commit_work); if (nonblock && state->modeset) { - queue_work(dev_priv->display.wq.modeset, &state->base.commit_work); + queue_work(display->wq.modeset, &state->base.commit_work); } else if (nonblock) { - queue_work(dev_priv->display.wq.flip, &state->base.commit_work); + queue_work(display->wq.flip, &state->base.commit_work); } else { if (state->modeset) - flush_workqueue(dev_priv->display.wq.modeset); + flush_workqueue(display->wq.modeset); intel_atomic_commit_tail(state); } @@ -7614,11 +7593,11 @@ int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state, static u32 intel_encoder_possible_clones(struct intel_encoder *encoder) { - struct drm_device *dev = encoder->base.dev; + struct intel_display *display = to_intel_display(encoder); struct intel_encoder *source_encoder; u32 possible_clones = 0; - for_each_intel_encoder(dev, source_encoder) { + for_each_intel_encoder(display->drm, source_encoder) { if (encoders_cloneable(encoder, source_encoder)) possible_clones |= drm_encoder_mask(&source_encoder->base); } @@ -7628,11 +7607,11 @@ static u32 intel_encoder_possible_clones(struct intel_encoder *encoder) static u32 intel_encoder_possible_crtcs(struct intel_encoder *encoder) { - struct drm_device *dev = encoder->base.dev; + struct intel_display *display = to_intel_display(encoder); struct intel_crtc *crtc; u32 possible_crtcs = 0; - for_each_intel_crtc_in_pipe_mask(dev, crtc, encoder->pipe_mask) + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, encoder->pipe_mask) possible_crtcs |= drm_crtc_mask(&crtc->base); return possible_crtcs; @@ -7852,9 +7831,8 @@ void intel_setup_outputs(struct intel_display *display) drm_helper_move_panel_connectors_to_head(display->drm); } -static int max_dotclock(struct drm_i915_private *i915) +static int max_dotclock(struct intel_display *display) { - struct intel_display *display = &i915->display; int max_dotclock = display->cdclk.max_dotclk_freq; if (HAS_ULTRAJOINER(display)) @@ -7868,7 +7846,7 @@ static int max_dotclock(struct drm_i915_private *i915) enum drm_mode_status intel_mode_valid(struct drm_device *dev, const struct drm_display_mode *mode) { - struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_display *display = to_intel_display(dev); int hdisplay_max, htotal_max; int vdisplay_max, vtotal_max; @@ -7905,22 +7883,22 @@ enum drm_mode_status intel_mode_valid(struct drm_device *dev, * Reject clearly excessive dotclocks early to * avoid having to worry about huge integers later. */ - if (mode->clock > max_dotclock(dev_priv)) + if (mode->clock > max_dotclock(display)) return MODE_CLOCK_HIGH; /* Transcoder timing limits */ - if (DISPLAY_VER(dev_priv) >= 11) { + if (DISPLAY_VER(display) >= 11) { hdisplay_max = 16384; vdisplay_max = 8192; htotal_max = 16384; vtotal_max = 8192; - } else if (DISPLAY_VER(dev_priv) >= 9 || - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { + } else if (DISPLAY_VER(display) >= 9 || + display->platform.broadwell || display->platform.haswell) { hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */ vdisplay_max = 4096; htotal_max = 8192; vtotal_max = 8192; - } else if (DISPLAY_VER(dev_priv) >= 3) { + } else if (DISPLAY_VER(display) >= 3) { hdisplay_max = 4096; vdisplay_max = 4096; htotal_max = 8192; diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.h b/drivers/gpu/drm/i915/display/vlv_dsi_pll.h index a032cc2a2524..f975660fa609 100644 --- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.h +++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.h @@ -23,7 +23,6 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, struct intel_crtc_state *config); void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); -bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); int bxt_dsi_pll_compute(struct intel_encoder *encoder, struct intel_crtc_state *config); void bxt_dsi_pll_enable(struct intel_encoder *encoder, @@ -34,9 +33,14 @@ u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); #ifdef I915 +bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); void assert_dsi_pll_enabled(struct intel_display *display); void assert_dsi_pll_disabled(struct intel_display *display); #else +static inline bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv) +{ + return false; +} static inline void assert_dsi_pll_enabled(struct intel_display *display) { } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 8084debd28a2..c5064eebe063 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4165,8 +4165,8 @@ enum skl_power_gate { _MMIO_PIPE(pipe, _PIPE_FLIPDONETMSTMP_A, _PIPE_FLIPDONETMSTMP_B) #define _VLV_PIPE_MSA_MISC_A 0x70048 -#define VLV_PIPE_MSA_MISC(pipe) \ - _MMIO_PIPE2(dev_priv, pipe, _VLV_PIPE_MSA_MISC_A) +#define VLV_PIPE_MSA_MISC(__display, pipe) \ + _MMIO_PIPE2(__display, pipe, _VLV_PIPE_MSA_MISC_A) #define VLV_MSA_MISC1_HW_ENABLE REG_BIT(31) #define VLV_MSA_MISC1_SW_S3D_MASK REG_GENMASK(2, 0) /* MSA MISC1 3:1 */ -- 2.39.5 ^ permalink raw reply related [flat|nested] 20+ messages in thread
* RE: [PATCH 5/5] drm/i915/display: convert intel_display.c to struct intel_display 2025-03-04 10:27 ` [PATCH 5/5] drm/i915/display: convert intel_display.c to struct intel_display Jani Nikula @ 2025-03-04 13:22 ` Garg, Nemesa 0 siblings, 0 replies; 20+ messages in thread From: Garg, Nemesa @ 2025-03-04 13:22 UTC (permalink / raw) To: Nikula, Jani, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Nikula, Jani > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani > Nikula > Sent: Tuesday, March 4, 2025 3:58 PM > To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org > Cc: Nikula, Jani <jani.nikula@intel.com> > Subject: [PATCH 5/5] drm/i915/display: convert intel_display.c to struct > intel_display > > Going forward, struct intel_display is the main display device data > pointer. Convert as much as possible of intel_display.c to struct > intel_display. > > This exposes a couple of outside issues that need to be fixed as well, > in a register macro and a DSI PLL stub. > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 834 +++++++++---------- > drivers/gpu/drm/i915/display/vlv_dsi_pll.h | 6 +- > drivers/gpu/drm/i915/i915_reg.h | 4 +- > 3 files changed, 413 insertions(+), 431 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index 6962bc0da53c..f7cb38145e9d 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -203,29 +203,29 @@ static bool is_hdr_mode(const struct > intel_crtc_state *crtc_state) > > /* WA Display #0827: Gen9:all */ > static void > -skl_wa_827(struct drm_i915_private *dev_priv, enum pipe pipe, bool > enable) > +skl_wa_827(struct intel_display *display, enum pipe pipe, bool enable) > { > - intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe), > + intel_de_rmw(display, CLKGATE_DIS_PSL(pipe), > DUPS1_GATING_DIS | DUPS2_GATING_DIS, > enable ? DUPS1_GATING_DIS | DUPS2_GATING_DIS : 0); > } > > /* Wa_2006604312:icl,ehl */ > static void > -icl_wa_scalerclkgating(struct drm_i915_private *dev_priv, enum pipe pipe, > +icl_wa_scalerclkgating(struct intel_display *display, enum pipe pipe, > bool enable) > { > - intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe), > + intel_de_rmw(display, CLKGATE_DIS_PSL(pipe), > DPFR_GATING_DIS, > enable ? DPFR_GATING_DIS : 0); > } > > /* Wa_1604331009:icl,jsl,ehl */ > static void > -icl_wa_cursorclkgating(struct drm_i915_private *dev_priv, enum pipe pipe, > +icl_wa_cursorclkgating(struct intel_display *display, enum pipe pipe, > bool enable) > { > - intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe), > + intel_de_rmw(display, CLKGATE_DIS_PSL(pipe), > CURSOR_GATING_DIS, > enable ? CURSOR_GATING_DIS : 0); > } > @@ -405,16 +405,16 @@ struct intel_crtc *intel_primary_crtc(const struct > intel_crtc_state *crtc_state) > static void > intel_wait_for_pipe_off(const struct intel_crtc_state *old_crtc_state) > { > + struct intel_display *display = to_intel_display(old_crtc_state); > struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > - if (DISPLAY_VER(dev_priv) >= 4) { > + if (DISPLAY_VER(display) >= 4) { > enum transcoder cpu_transcoder = old_crtc_state- > >cpu_transcoder; > > /* Wait for the Pipe State to go off */ > - if (intel_de_wait_for_clear(dev_priv, TRANSCONF(dev_priv, > cpu_transcoder), > + if (intel_de_wait_for_clear(display, TRANSCONF(display, > cpu_transcoder), > TRANSCONF_STATE_ENABLE, 100)) > - drm_WARN(&dev_priv->drm, 1, "pipe_off wait timed > out\n"); > + drm_WARN(display->drm, 1, "pipe_off wait timed > out\n"); > } else { > intel_wait_for_pipe_scanline_stopped(crtc); > } > @@ -468,10 +468,10 @@ static void assert_plane(struct intel_plane *plane, > bool state) > > static void assert_planes_disabled(struct intel_crtc *crtc) > { > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(crtc); > struct intel_plane *plane; > > - for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) > + for_each_intel_plane_on_crtc(display->drm, crtc, plane) > assert_plane_disabled(plane); > } > > @@ -479,7 +479,6 @@ void intel_enable_transcoder(const struct > intel_crtc_state *new_crtc_state) > { > struct intel_display *display = to_intel_display(new_crtc_state); > struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder; > enum pipe pipe = crtc->pipe; > u32 val; > @@ -493,7 +492,7 @@ void intel_enable_transcoder(const struct > intel_crtc_state *new_crtc_state) > * a plane. On ILK+ the pipe PLLs are integrated, so we don't > * need the check. > */ > - if (HAS_GMCH(dev_priv)) { > + if (HAS_GMCH(display)) { > if (intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI)) > assert_dsi_pll_enabled(display); > else > @@ -510,11 +509,11 @@ void intel_enable_transcoder(const struct > intel_crtc_state *new_crtc_state) > } > > /* Wa_22012358565:adl-p */ > - if (DISPLAY_VER(dev_priv) == 13) > + if (DISPLAY_VER(display) == 13) > intel_de_rmw(display, PIPE_ARB_CTL(display, pipe), > 0, PIPE_ARB_USE_PROG_SLOTS); > > - if (DISPLAY_VER(dev_priv) >= 14) { > + if (DISPLAY_VER(display) >= 14) { > u32 clear = DP_DSC_INSERT_SF_AT_EOL_WA; > u32 set = 0; > > @@ -528,7 +527,7 @@ void intel_enable_transcoder(const struct > intel_crtc_state *new_crtc_state) > val = intel_de_read(display, TRANSCONF(display, cpu_transcoder)); > if (val & TRANSCONF_ENABLE) { > /* we keep both pipes enabled on 830 */ > - drm_WARN_ON(&dev_priv->drm, !IS_I830(dev_priv)); > + drm_WARN_ON(display->drm, !display->platform.i830); > return; > } > > @@ -559,12 +558,11 @@ void intel_disable_transcoder(const struct > intel_crtc_state *old_crtc_state) > { > struct intel_display *display = to_intel_display(old_crtc_state); > struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; > enum pipe pipe = crtc->pipe; > u32 val; > > - drm_dbg_kms(&dev_priv->drm, "disabling pipe %c\n", > pipe_name(pipe)); > + drm_dbg_kms(display->drm, "disabling pipe %c\n", > pipe_name(pipe)); > > /* > * Make sure planes won't keep trying to pump pixels to us, > @@ -572,7 +570,7 @@ void intel_disable_transcoder(const struct > intel_crtc_state *old_crtc_state) > */ > assert_planes_disabled(crtc); > > - val = intel_de_read(dev_priv, TRANSCONF(dev_priv, cpu_transcoder)); > + val = intel_de_read(display, TRANSCONF(display, cpu_transcoder)); > if ((val & TRANSCONF_ENABLE) == 0) > return; > > @@ -584,17 +582,17 @@ void intel_disable_transcoder(const struct > intel_crtc_state *old_crtc_state) > val &= ~TRANSCONF_DOUBLE_WIDE; > > /* Don't disable pipe or pipe PLLs if needed */ > - if (!IS_I830(dev_priv)) > + if (!display->platform.i830) > val &= ~TRANSCONF_ENABLE; > > /* Wa_1409098942:adlp+ */ > - if (DISPLAY_VER(dev_priv) >= 13 && > + if (DISPLAY_VER(display) >= 13 && > old_crtc_state->dsc.compression_enable) > val &= ~TRANSCONF_PIXEL_COUNT_SCALING_MASK; > > - intel_de_write(dev_priv, TRANSCONF(dev_priv, cpu_transcoder), val); > + intel_de_write(display, TRANSCONF(display, cpu_transcoder), val); > > - if (DISPLAY_VER(dev_priv) >= 12) > + if (DISPLAY_VER(display) >= 12) > intel_de_rmw(display, CHICKEN_TRANS(display, > cpu_transcoder), > FECSTALL_DIS_DPTSTREAM_DPTTG, 0); > > @@ -643,7 +641,7 @@ void intel_set_plane_visible(struct intel_crtc_state > *crtc_state, > > void intel_plane_fixup_bitmasks(struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc- > >dev); > + struct intel_display *display = to_intel_display(crtc_state); > struct drm_plane *plane; > > /* > @@ -654,7 +652,7 @@ void intel_plane_fixup_bitmasks(struct > intel_crtc_state *crtc_state) > crtc_state->enabled_planes = 0; > crtc_state->active_planes = 0; > > - drm_for_each_plane_mask(plane, &dev_priv->drm, > + drm_for_each_plane_mask(plane, display->drm, > crtc_state->uapi.plane_mask) { > crtc_state->enabled_planes |= BIT(to_intel_plane(plane)->id); > crtc_state->active_planes |= BIT(to_intel_plane(plane)->id); > @@ -671,7 +669,7 @@ void intel_plane_disable_noatomic(struct intel_crtc > *crtc, > struct intel_plane_state *plane_state = > to_intel_plane_state(plane->base.state); > > - drm_dbg_kms(&dev_priv->drm, > + drm_dbg_kms(display->drm, > "Disabling [PLANE:%d:%s] on [CRTC:%d:%s]\n", > plane->base.base.id, plane->base.name, > crtc->base.base.id, crtc->base.name); > @@ -699,7 +697,7 @@ void intel_plane_disable_noatomic(struct intel_crtc > *crtc, > * event which is after the vblank start event, so we need to have a > * wait-for-vblank between disabling the plane and the pipe. > */ > - if (HAS_GMCH(dev_priv) && > + if (HAS_GMCH(display) && > intel_set_memory_cxsr(dev_priv, false)) > intel_plane_initial_vblank_wait(crtc); > > @@ -707,7 +705,7 @@ void intel_plane_disable_noatomic(struct intel_crtc > *crtc, > * Gen2 reports pipe underruns whenever all planes are disabled. > * So disable underrun reporting before all the planes get disabled. > */ > - if (DISPLAY_VER(dev_priv) == 2 && !crtc_state->active_planes) > + if (DISPLAY_VER(display) == 2 && !crtc_state->active_planes) > intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe, > false); > > intel_plane_disable_arm(NULL, plane, crtc_state); > @@ -727,12 +725,12 @@ intel_plane_fence_y_offset(const struct > intel_plane_state *plane_state) > > static void icl_set_pipe_chicken(const struct intel_crtc_state *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > u32 tmp; > > - tmp = intel_de_read(dev_priv, PIPE_CHICKEN(pipe)); > + tmp = intel_de_read(display, PIPE_CHICKEN(pipe)); > > /* > * Display WA #1153: icl > @@ -752,16 +750,16 @@ static void icl_set_pipe_chicken(const struct > intel_crtc_state *crtc_state) > * Underrun recovery must always be disabled on display 13+. > * DG2 chicken bit meaning is inverted compared to other platforms. > */ > - if (IS_DG2(dev_priv)) > + if (display->platform.dg2) > tmp &= ~UNDERRUN_RECOVERY_ENABLE_DG2; > - else if ((DISPLAY_VER(dev_priv) >= 13) && (DISPLAY_VER(dev_priv) < > 30)) > + else if ((DISPLAY_VER(display) >= 13) && (DISPLAY_VER(display) < 30)) > tmp |= UNDERRUN_RECOVERY_DISABLE_ADLP; > > /* Wa_14010547955:dg2 */ > - if (IS_DG2(dev_priv)) > + if (display->platform.dg2) > tmp |= DG2_RENDER_CCSTAG_4_3_EN; > > - intel_de_write(dev_priv, PIPE_CHICKEN(pipe), tmp); > + intel_de_write(display, PIPE_CHICKEN(pipe), tmp); > } > > bool intel_has_pending_fb_unpin(struct intel_display *display) > @@ -833,13 +831,13 @@ static void intel_crtc_dpms_overlay_disable(struct > intel_crtc *crtc) > > static bool needs_nv12_wa(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc- > >dev); > + struct intel_display *display = to_intel_display(crtc_state); > > if (!crtc_state->nv12_planes) > return false; > > /* WA Display #0827: Gen9:all */ > - if (DISPLAY_VER(dev_priv) == 9) > + if (DISPLAY_VER(display) == 9) > return true; > > return false; > @@ -847,10 +845,10 @@ static bool needs_nv12_wa(const struct > intel_crtc_state *crtc_state) > > static bool needs_scalerclk_wa(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc- > >dev); > + struct intel_display *display = to_intel_display(crtc_state); > > /* Wa_2006604312:icl,ehl */ > - if (crtc_state->scaler_state.scaler_users > 0 && > DISPLAY_VER(dev_priv) == 11) > + if (crtc_state->scaler_state.scaler_users > 0 && DISPLAY_VER(display) > == 11) > return true; > > return false; > @@ -858,31 +856,31 @@ static bool needs_scalerclk_wa(const struct > intel_crtc_state *crtc_state) > > static bool needs_cursorclk_wa(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc- > >dev); > + struct intel_display *display = to_intel_display(crtc_state); > > /* Wa_1604331009:icl,jsl,ehl */ > if (is_hdr_mode(crtc_state) && > crtc_state->active_planes & BIT(PLANE_CURSOR) && > - DISPLAY_VER(dev_priv) == 11) > + DISPLAY_VER(display) == 11) > return true; > > return false; > } > > -static void intel_async_flip_vtd_wa(struct drm_i915_private *i915, > +static void intel_async_flip_vtd_wa(struct intel_display *display, > enum pipe pipe, bool enable) > { > - if (DISPLAY_VER(i915) == 9) { > + if (DISPLAY_VER(display) == 9) { > /* > * "Plane N stretch max must be programmed to 11b (x1) > * when Async flips are enabled on that plane." > */ > - intel_de_rmw(i915, CHICKEN_PIPESL_1(pipe), > + intel_de_rmw(display, CHICKEN_PIPESL_1(pipe), > SKL_PLANE1_STRETCH_MAX_MASK, > enable ? SKL_PLANE1_STRETCH_MAX_X1 : > SKL_PLANE1_STRETCH_MAX_X8); > } else { > /* Also needed on HSW/BDW albeit undocumented */ > - intel_de_rmw(i915, CHICKEN_PIPESL_1(pipe), > + intel_de_rmw(display, CHICKEN_PIPESL_1(pipe), > HSW_PRI_STRETCH_MAX_MASK, > enable ? HSW_PRI_STRETCH_MAX_X1 : > HSW_PRI_STRETCH_MAX_X8); > } > @@ -890,10 +888,12 @@ static void intel_async_flip_vtd_wa(struct > drm_i915_private *i915, > > static bool needs_async_flip_vtd_wa(const struct intel_crtc_state *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); > > return crtc_state->uapi.async_flip && i915_vtd_active(i915) && > - (DISPLAY_VER(i915) == 9 || IS_BROADWELL(i915) || > IS_HASWELL(i915)); > + (DISPLAY_VER(display) == 9 || display->platform.broadwell || > + display->platform.haswell); > } > > static void intel_encoders_audio_enable(struct intel_atomic_state *state, > @@ -1042,6 +1042,7 @@ static bool audio_disabling(const struct > intel_crtc_state *old_crtc_state, > static void intel_post_plane_update(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > + struct intel_display *display = to_intel_display(state); > struct drm_i915_private *dev_priv = to_i915(state->base.dev); > const struct intel_crtc_state *old_crtc_state = > intel_atomic_get_old_crtc_state(state, crtc); > @@ -1060,19 +1061,19 @@ static void intel_post_plane_update(struct > intel_atomic_state *state, > > if (needs_async_flip_vtd_wa(old_crtc_state) && > !needs_async_flip_vtd_wa(new_crtc_state)) > - intel_async_flip_vtd_wa(dev_priv, pipe, false); > + intel_async_flip_vtd_wa(display, pipe, false); > > if (needs_nv12_wa(old_crtc_state) && > !needs_nv12_wa(new_crtc_state)) > - skl_wa_827(dev_priv, pipe, false); > + skl_wa_827(display, pipe, false); > > if (needs_scalerclk_wa(old_crtc_state) && > !needs_scalerclk_wa(new_crtc_state)) > - icl_wa_scalerclkgating(dev_priv, pipe, false); > + icl_wa_scalerclkgating(display, pipe, false); > > if (needs_cursorclk_wa(old_crtc_state) && > !needs_cursorclk_wa(new_crtc_state)) > - icl_wa_cursorclkgating(dev_priv, pipe, false); > + icl_wa_cursorclkgating(display, pipe, false); > > if (intel_crtc_needs_color_update(new_crtc_state)) > intel_color_post_update(new_crtc_state); > @@ -1194,22 +1195,22 @@ static void intel_pre_plane_update(struct > intel_atomic_state *state, > > if (!needs_async_flip_vtd_wa(old_crtc_state) && > needs_async_flip_vtd_wa(new_crtc_state)) > - intel_async_flip_vtd_wa(dev_priv, pipe, true); > + intel_async_flip_vtd_wa(display, pipe, true); > > /* Display WA 827 */ > if (!needs_nv12_wa(old_crtc_state) && > needs_nv12_wa(new_crtc_state)) > - skl_wa_827(dev_priv, pipe, true); > + skl_wa_827(display, pipe, true); > > /* Wa_2006604312:icl,ehl */ > if (!needs_scalerclk_wa(old_crtc_state) && > needs_scalerclk_wa(new_crtc_state)) > - icl_wa_scalerclkgating(dev_priv, pipe, true); > + icl_wa_scalerclkgating(display, pipe, true); > > /* Wa_1604331009:icl,jsl,ehl */ > if (!needs_cursorclk_wa(old_crtc_state) && > needs_cursorclk_wa(new_crtc_state)) > - icl_wa_cursorclkgating(dev_priv, pipe, true); > + icl_wa_cursorclkgating(display, pipe, true); > > /* > * Vblank time updates from the shadow to live plane control register > @@ -1220,7 +1221,7 @@ static void intel_pre_plane_update(struct > intel_atomic_state *state, > * event which is after the vblank start event, so we need to have a > * wait-for-vblank between disabling the plane and the pipe. > */ > - if (HAS_GMCH(dev_priv) && old_crtc_state->hw.active && > + if (HAS_GMCH(display) && old_crtc_state->hw.active && > new_crtc_state->disable_cxsr && intel_set_memory_cxsr(dev_priv, > false)) > intel_crtc_wait_for_next_vblank(crtc); > > @@ -1231,7 +1232,7 @@ static void intel_pre_plane_update(struct > intel_atomic_state *state, > * > * WaCxSRDisabledForSpriteScaling:ivb > */ > - if (!HAS_GMCH(dev_priv) && old_crtc_state->hw.active && > + if (!HAS_GMCH(display) && old_crtc_state->hw.active && > new_crtc_state->disable_cxsr && ilk_disable_cxsr(dev_priv)) > intel_crtc_wait_for_next_vblank(crtc); > > @@ -1267,7 +1268,7 @@ static void intel_pre_plane_update(struct > intel_atomic_state *state, > * chance of catching underruns with the intermediate watermarks > * vs. the old plane configuration. > */ > - if (DISPLAY_VER(dev_priv) == 2 && planes_disabling(old_crtc_state, > new_crtc_state)) > + if (DISPLAY_VER(display) == 2 && planes_disabling(old_crtc_state, > new_crtc_state)) > intel_set_cpu_fifo_underrun_reporting(display, pipe, false); > > /* > @@ -1308,7 +1309,7 @@ static void intel_crtc_disable_planes(struct > intel_atomic_state *state, > > static void intel_encoders_update_prepare(struct intel_atomic_state *state) > { > - struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > struct intel_crtc_state *new_crtc_state, *old_crtc_state; > struct intel_crtc *crtc; > int i; > @@ -1317,7 +1318,7 @@ static void intel_encoders_update_prepare(struct > intel_atomic_state *state) > * Make sure the DPLL state is up-to-date for fastset TypeC ports after > non-blocking commits. > * TODO: Update the DPLL state for all cases in the encoder- > >update_prepare() hook. > */ > - if (i915->display.dpll.mgr) { > + if (display->dpll.mgr) { > for_each_oldnew_intel_crtc_in_state(state, crtc, > old_crtc_state, new_crtc_state, i) { > if (intel_crtc_needs_modeset(new_crtc_state)) > continue; > @@ -1513,7 +1514,7 @@ static void ilk_crtc_enable(struct intel_atomic_state > *state, > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > > - if (drm_WARN_ON(&dev_priv->drm, crtc->active)) > + if (drm_WARN_ON(display->drm, crtc->active)) > return; > > /* > @@ -1582,26 +1583,26 @@ static void ilk_crtc_enable(struct > intel_atomic_state *state, > /* Display WA #1180: WaDisableScalarClockGating: glk */ > static bool glk_need_scaler_clock_gating_wa(const struct intel_crtc_state > *crtc_state) > { > - struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); > + struct intel_display *display = to_intel_display(crtc_state); > > - return DISPLAY_VER(i915) == 10 && crtc_state->pch_pfit.enabled; > + return DISPLAY_VER(display) == 10 && crtc_state->pch_pfit.enabled; > } > > static void glk_pipe_scaler_clock_gating_wa(struct intel_crtc *crtc, bool > enable) > { > - struct drm_i915_private *i915 = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(crtc); > u32 mask = DPF_GATING_DIS | DPF_RAM_GATING_DIS | > DPFR_GATING_DIS; > > - intel_de_rmw(i915, CLKGATE_DIS_PSL(crtc->pipe), > + intel_de_rmw(display, CLKGATE_DIS_PSL(crtc->pipe), > mask, enable ? mask : 0); > } > > static void hsw_set_linetime_wm(const struct intel_crtc_state *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > - intel_de_write(dev_priv, WM_LINETIME(crtc->pipe), > + intel_de_write(display, WM_LINETIME(crtc->pipe), > HSW_LINETIME(crtc_state->linetime) | > HSW_IPS_LINETIME(crtc_state->ips_linetime)); > } > @@ -1617,8 +1618,8 @@ static void hsw_set_frame_start_delay(const struct > intel_crtc_state *crtc_state) > > static void hsw_configure_cpu_transcoder(const struct intel_crtc_state > *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > > if (crtc_state->has_pch_encoder) { > @@ -1632,11 +1633,11 @@ static void hsw_configure_cpu_transcoder(const > struct intel_crtc_state *crtc_sta > } > > intel_set_transcoder_timings(crtc_state); > - if (HAS_VRR(dev_priv)) > + if (HAS_VRR(display)) > intel_vrr_set_transcoder_timings(crtc_state); > > if (cpu_transcoder != TRANSCODER_EDP) > - intel_de_write(dev_priv, TRANS_MULT(dev_priv, > cpu_transcoder), > + intel_de_write(display, TRANS_MULT(display, > cpu_transcoder), > crtc_state->pixel_multiplier - 1); > > hsw_set_frame_start_delay(crtc_state); > @@ -1650,12 +1651,11 @@ static void hsw_crtc_enable(struct > intel_atomic_state *state, > struct intel_display *display = to_intel_display(state); > const struct intel_crtc_state *new_crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder; > struct intel_crtc *pipe_crtc; > int i; > > - if (drm_WARN_ON(&dev_priv->drm, crtc->active)) > + if (drm_WARN_ON(display->drm, crtc->active)) > return; > for_each_pipe_crtc_modeset_enable(display, pipe_crtc, > new_crtc_state, i) > intel_dmc_enable_pipe(display, pipe_crtc->pipe); > @@ -1678,12 +1678,12 @@ static void hsw_crtc_enable(struct > intel_atomic_state *state, > > intel_dsc_enable(pipe_crtc_state); > > - if (HAS_UNCOMPRESSED_JOINER(dev_priv)) > + if (HAS_UNCOMPRESSED_JOINER(display)) > intel_uncompressed_joiner_enable(pipe_crtc_state); > > intel_set_pipe_src_size(pipe_crtc_state); > > - if (DISPLAY_VER(dev_priv) >= 9 || IS_BROADWELL(dev_priv)) > + if (DISPLAY_VER(display) >= 9 || display->platform.broadwell) > bdw_set_pipe_misc(NULL, pipe_crtc_state); > } > > @@ -1699,7 +1699,7 @@ static void hsw_crtc_enable(struct > intel_atomic_state *state, > if (glk_need_scaler_clock_gating_wa(pipe_crtc_state)) > glk_pipe_scaler_clock_gating_wa(pipe_crtc, true); > > - if (DISPLAY_VER(dev_priv) >= 9) > + if (DISPLAY_VER(display) >= 9) > skl_pfit_enable(pipe_crtc_state); > else > ilk_pfit_enable(pipe_crtc_state); > @@ -1712,7 +1712,7 @@ static void hsw_crtc_enable(struct > intel_atomic_state *state, > > hsw_set_linetime_wm(pipe_crtc_state); > > - if (DISPLAY_VER(dev_priv) >= 11) > + if (DISPLAY_VER(display) >= 11) > icl_set_pipe_chicken(pipe_crtc_state); > > intel_initial_watermarks(state, pipe_crtc); > @@ -1735,7 +1735,7 @@ static void hsw_crtc_enable(struct > intel_atomic_state *state, > * enabling, we need to change the workaround. > */ > hsw_workaround_pipe = pipe_crtc_state- > >hsw_workaround_pipe; > - if (IS_HASWELL(dev_priv) && hsw_workaround_pipe != > INVALID_PIPE) { > + if (display->platform.haswell && hsw_workaround_pipe != > INVALID_PIPE) { > struct intel_crtc *wa_crtc = > intel_crtc_for_pipe(display, > hsw_workaround_pipe); > > @@ -1943,8 +1943,8 @@ intel_aux_power_domain(struct intel_digital_port > *dig_port) > static void get_crtc_power_domains(struct intel_crtc_state *crtc_state, > struct intel_power_domain_mask *mask) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > struct drm_encoder *encoder; > enum pipe pipe = crtc->pipe; > @@ -1960,14 +1960,14 @@ static void get_crtc_power_domains(struct > intel_crtc_state *crtc_state, > crtc_state->pch_pfit.force_thru) > set_bit(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe), mask- > >bits); > > - drm_for_each_encoder_mask(encoder, &dev_priv->drm, > + drm_for_each_encoder_mask(encoder, display->drm, > crtc_state->uapi.encoder_mask) { > struct intel_encoder *intel_encoder = > to_intel_encoder(encoder); > > set_bit(intel_encoder->power_domain, mask->bits); > } > > - if (HAS_DDI(dev_priv) && crtc_state->has_audio) > + if (HAS_DDI(display) && crtc_state->has_audio) > set_bit(POWER_DOMAIN_AUDIO_MMIO, mask->bits); > > if (crtc_state->shared_dpll) > @@ -2035,22 +2035,21 @@ static void valleyview_crtc_enable(struct > intel_atomic_state *state, > struct intel_display *display = to_intel_display(crtc); > const struct intel_crtc_state *new_crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > > - if (drm_WARN_ON(&dev_priv->drm, crtc->active)) > + if (drm_WARN_ON(display->drm, crtc->active)) > return; > > i9xx_configure_cpu_transcoder(new_crtc_state); > > intel_set_pipe_src_size(new_crtc_state); > > - intel_de_write(dev_priv, VLV_PIPE_MSA_MISC(pipe), 0); > + intel_de_write(display, VLV_PIPE_MSA_MISC(display, pipe), 0); > > - if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { > - intel_de_write(dev_priv, CHV_BLEND(dev_priv, pipe), > + if (display->platform.cherryview && pipe == PIPE_B) { > + intel_de_write(display, CHV_BLEND(display, pipe), > CHV_BLEND_LEGACY); > - intel_de_write(dev_priv, CHV_CANVAS(dev_priv, pipe), 0); > + intel_de_write(display, CHV_CANVAS(display, pipe), 0); > } > > crtc->active = true; > @@ -2059,7 +2058,7 @@ static void valleyview_crtc_enable(struct > intel_atomic_state *state, > > intel_encoders_pre_pll_enable(state, crtc); > > - if (IS_CHERRYVIEW(dev_priv)) > + if (display->platform.cherryview) > chv_enable_pll(new_crtc_state); > else > vlv_enable_pll(new_crtc_state); > @@ -2087,7 +2086,7 @@ static void i9xx_crtc_enable(struct > intel_atomic_state *state, > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > > - if (drm_WARN_ON(&dev_priv->drm, crtc->active)) > + if (drm_WARN_ON(display->drm, crtc->active)) > return; > > i9xx_configure_cpu_transcoder(new_crtc_state); > @@ -2096,7 +2095,7 @@ static void i9xx_crtc_enable(struct > intel_atomic_state *state, > > crtc->active = true; > > - if (DISPLAY_VER(dev_priv) != 2) > + if (DISPLAY_VER(display) != 2) > intel_set_cpu_fifo_underrun_reporting(display, pipe, true); > > intel_encoders_pre_enable(state, crtc); > @@ -2116,7 +2115,7 @@ static void i9xx_crtc_enable(struct > intel_atomic_state *state, > intel_encoders_enable(state, crtc); > > /* prevents spurious underruns */ > - if (DISPLAY_VER(dev_priv) == 2) > + if (DISPLAY_VER(display) == 2) > intel_crtc_wait_for_next_vblank(crtc); > } > > @@ -2133,7 +2132,7 @@ static void i9xx_crtc_disable(struct > intel_atomic_state *state, > * On gen2 planes are double buffered but the pipe isn't, so we must > * wait for planes to fully turn off before disabling the pipe. > */ > - if (DISPLAY_VER(dev_priv) == 2) > + if (DISPLAY_VER(display) == 2) > intel_crtc_wait_for_next_vblank(crtc); > > intel_encoders_disable(state, crtc); > @@ -2147,9 +2146,9 @@ static void i9xx_crtc_disable(struct > intel_atomic_state *state, > intel_encoders_post_disable(state, crtc); > > if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DSI)) { > - if (IS_CHERRYVIEW(dev_priv)) > + if (display->platform.cherryview) > chv_disable_pll(dev_priv, pipe); > - else if (IS_VALLEYVIEW(dev_priv)) > + else if (display->platform.valleyview) > vlv_disable_pll(dev_priv, pipe); > else > i9xx_disable_pll(old_crtc_state); > @@ -2157,14 +2156,14 @@ static void i9xx_crtc_disable(struct > intel_atomic_state *state, > > intel_encoders_post_pll_disable(state, crtc); > > - if (DISPLAY_VER(dev_priv) != 2) > + if (DISPLAY_VER(display) != 2) > intel_set_cpu_fifo_underrun_reporting(display, pipe, false); > > - if (!dev_priv->display.funcs.wm->initial_watermarks) > + if (!display->funcs.wm->initial_watermarks) > intel_update_watermarks(dev_priv); > > /* clock the pipe down to 640x480@60 to potentially save power */ > - if (IS_I830(dev_priv)) > + if (display->platform.i830) > i830_enable_pipe(display, pipe); > } > > @@ -2178,11 +2177,11 @@ void intel_encoder_destroy(struct drm_encoder > *encoder) > > static bool intel_crtc_supports_double_wide(const struct intel_crtc *crtc) > { > - const struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(crtc); > > /* GDG double wide on either pipe, otherwise pipe A only */ > - return HAS_DOUBLE_WIDE(dev_priv) && > - (crtc->pipe == PIPE_A || IS_I915G(dev_priv)); > + return HAS_DOUBLE_WIDE(display) && > + (crtc->pipe == PIPE_A || display->platform.i915g); > } > > static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state) > @@ -2229,9 +2228,9 @@ static void intel_mode_from_crtc_timings(struct > drm_display_mode *mode, > > static void intel_crtc_compute_pixel_rate(struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc- > >dev); > + struct intel_display *display = to_intel_display(crtc_state); > > - if (HAS_GMCH(dev_priv)) > + if (HAS_GMCH(display)) > /* FIXME calculate proper pipe pixel rate for GMCH pfit */ > crtc_state->pixel_rate = > crtc_state->hw.pipe_mode.crtc_clock; > @@ -2342,6 +2341,7 @@ static void intel_joiner_compute_pipe_src(struct > intel_crtc_state *crtc_state) > > static int intel_crtc_compute_pipe_src(struct intel_crtc_state *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *i915 = to_i915(crtc->base.dev); > > @@ -2355,7 +2355,7 @@ static int intel_crtc_compute_pipe_src(struct > intel_crtc_state *crtc_state) > */ > if (drm_rect_width(&crtc_state->pipe_src) & 1) { > if (crtc_state->double_wide) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] Odd pipe source width not > supported with double wide pipe\n", > crtc->base.base.id, crtc->base.name); > return -EINVAL; > @@ -2363,7 +2363,7 @@ static int intel_crtc_compute_pipe_src(struct > intel_crtc_state *crtc_state) > > if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) && > intel_is_dual_link_lvds(i915)) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] Odd pipe source width not > supported with dual link LVDS\n", > crtc->base.base.id, crtc->base.name); > return -EINVAL; > @@ -2375,11 +2375,11 @@ static int intel_crtc_compute_pipe_src(struct > intel_crtc_state *crtc_state) > > static int intel_crtc_compute_pipe_mode(struct intel_crtc_state *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *i915 = to_i915(crtc->base.dev); > struct drm_display_mode *adjusted_mode = &crtc_state- > >hw.adjusted_mode; > struct drm_display_mode *pipe_mode = &crtc_state- > >hw.pipe_mode; > - int clock_limit = i915->display.cdclk.max_dotclk_freq; > + int clock_limit = display->cdclk.max_dotclk_freq; > > /* > * Start with the adjusted_mode crtc timings, which > @@ -2394,8 +2394,8 @@ static int intel_crtc_compute_pipe_mode(struct > intel_crtc_state *crtc_state) > intel_joiner_adjust_timings(crtc_state, pipe_mode); > intel_mode_from_crtc_timings(pipe_mode, pipe_mode); > > - if (DISPLAY_VER(i915) < 4) { > - clock_limit = i915->display.cdclk.max_cdclk_freq * 9 / 10; > + if (DISPLAY_VER(display) < 4) { > + clock_limit = display->cdclk.max_cdclk_freq * 9 / 10; > > /* > * Enable double wide mode when the dot clock > @@ -2403,13 +2403,13 @@ static int intel_crtc_compute_pipe_mode(struct > intel_crtc_state *crtc_state) > */ > if (intel_crtc_supports_double_wide(crtc) && > pipe_mode->crtc_clock > clock_limit) { > - clock_limit = i915->display.cdclk.max_dotclk_freq; > + clock_limit = display->cdclk.max_dotclk_freq; > crtc_state->double_wide = true; > } > } > > if (pipe_mode->crtc_clock > clock_limit) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] requested pixel clock (%d kHz) too > high (max: %d kHz, double wide: %s)\n", > crtc->base.base.id, crtc->base.name, > pipe_mode->crtc_clock, clock_limit, > @@ -2641,15 +2641,15 @@ void intel_cpu_transcoder_set_m2_n2(struct > intel_crtc *crtc, > > static void intel_set_transcoder_timings(const struct intel_crtc_state > *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > const struct drm_display_mode *adjusted_mode = &crtc_state- > >hw.adjusted_mode; > u32 crtc_vdisplay, crtc_vtotal, crtc_vblank_start, crtc_vblank_end; > int vsyncshift = 0; > > - drm_WARN_ON(&dev_priv->drm, > transcoder_is_dsi(cpu_transcoder)); > + drm_WARN_ON(display->drm, transcoder_is_dsi(cpu_transcoder)); > > /* We need to be careful not to changed the adjusted mode, for > otherwise > * the hw state checker will get angry at the mismatch. */ > @@ -2676,9 +2676,9 @@ static void intel_set_transcoder_timings(const > struct intel_crtc_state *crtc_sta > * VBLANK_START no longer works on ADL+, instead we must use > * TRANS_SET_CONTEXT_LATENCY to configure the pipe vblank start. > */ > - if (DISPLAY_VER(dev_priv) >= 13) { > - intel_de_write(dev_priv, > - TRANS_SET_CONTEXT_LATENCY(dev_priv, > cpu_transcoder), > + if (DISPLAY_VER(display) >= 13) { > + intel_de_write(display, > + TRANS_SET_CONTEXT_LATENCY(display, > cpu_transcoder), > crtc_vblank_start - crtc_vdisplay); > > /* > @@ -2688,28 +2688,28 @@ static void intel_set_transcoder_timings(const > struct intel_crtc_state *crtc_sta > crtc_vblank_start = 1; > } > > - if (DISPLAY_VER(dev_priv) >= 4) > - intel_de_write(dev_priv, > - TRANS_VSYNCSHIFT(dev_priv, cpu_transcoder), > + if (DISPLAY_VER(display) >= 4) > + intel_de_write(display, > + TRANS_VSYNCSHIFT(display, cpu_transcoder), > vsyncshift); > > - intel_de_write(dev_priv, TRANS_HTOTAL(dev_priv, cpu_transcoder), > + intel_de_write(display, TRANS_HTOTAL(display, cpu_transcoder), > HACTIVE(adjusted_mode->crtc_hdisplay - 1) | > HTOTAL(adjusted_mode->crtc_htotal - 1)); > - intel_de_write(dev_priv, TRANS_HBLANK(dev_priv, cpu_transcoder), > + intel_de_write(display, TRANS_HBLANK(display, cpu_transcoder), > HBLANK_START(adjusted_mode->crtc_hblank_start - 1) | > HBLANK_END(adjusted_mode->crtc_hblank_end - 1)); > - intel_de_write(dev_priv, TRANS_HSYNC(dev_priv, cpu_transcoder), > + intel_de_write(display, TRANS_HSYNC(display, cpu_transcoder), > HSYNC_START(adjusted_mode->crtc_hsync_start - 1) | > HSYNC_END(adjusted_mode->crtc_hsync_end - 1)); > > - intel_de_write(dev_priv, TRANS_VTOTAL(dev_priv, cpu_transcoder), > + intel_de_write(display, TRANS_VTOTAL(display, cpu_transcoder), > VACTIVE(crtc_vdisplay - 1) | > VTOTAL(crtc_vtotal - 1)); > - intel_de_write(dev_priv, TRANS_VBLANK(dev_priv, cpu_transcoder), > + intel_de_write(display, TRANS_VBLANK(display, cpu_transcoder), > VBLANK_START(crtc_vblank_start - 1) | > VBLANK_END(crtc_vblank_end - 1)); > - intel_de_write(dev_priv, TRANS_VSYNC(dev_priv, cpu_transcoder), > + intel_de_write(display, TRANS_VSYNC(display, cpu_transcoder), > VSYNC_START(adjusted_mode->crtc_vsync_start - 1) | > VSYNC_END(adjusted_mode->crtc_vsync_end - 1)); > > @@ -2717,22 +2717,21 @@ static void intel_set_transcoder_timings(const > struct intel_crtc_state *crtc_sta > * programmed with the VTOTAL_EDP value. Same for VTOTAL_C. This > is > * documented on the DDI_FUNC_CTL register description, EDP Input > Select > * bits. */ > - if (IS_HASWELL(dev_priv) && cpu_transcoder == TRANSCODER_EDP > && > + if (display->platform.haswell && cpu_transcoder == > TRANSCODER_EDP && > (pipe == PIPE_B || pipe == PIPE_C)) > - intel_de_write(dev_priv, TRANS_VTOTAL(dev_priv, pipe), > + intel_de_write(display, TRANS_VTOTAL(display, pipe), > VACTIVE(crtc_vdisplay - 1) | > VTOTAL(crtc_vtotal - 1)); > } > > static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state > *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(crtc_state); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > const struct drm_display_mode *adjusted_mode = &crtc_state- > >hw.adjusted_mode; > u32 crtc_vdisplay, crtc_vtotal, crtc_vblank_start, crtc_vblank_end; > > - drm_WARN_ON(&dev_priv->drm, > transcoder_is_dsi(cpu_transcoder)); > + drm_WARN_ON(display->drm, transcoder_is_dsi(cpu_transcoder)); > > crtc_vdisplay = adjusted_mode->crtc_vdisplay; > crtc_vtotal = adjusted_mode->crtc_vtotal; > @@ -2745,9 +2744,9 @@ static void intel_set_transcoder_timings_lrr(const > struct intel_crtc_state *crtc > crtc_vblank_end -= 1; > } > > - if (DISPLAY_VER(dev_priv) >= 13) { > - intel_de_write(dev_priv, > - TRANS_SET_CONTEXT_LATENCY(dev_priv, > cpu_transcoder), > + if (DISPLAY_VER(display) >= 13) { > + intel_de_write(display, > + TRANS_SET_CONTEXT_LATENCY(display, > cpu_transcoder), > crtc_vblank_start - crtc_vdisplay); > > /* > @@ -2761,22 +2760,22 @@ static void intel_set_transcoder_timings_lrr(const > struct intel_crtc_state *crtc > * The hardware actually ignores TRANS_VBLANK.VBLANK_END in DP > mode. > * But let's write it anyway to keep the state checker happy. > */ > - intel_de_write(dev_priv, TRANS_VBLANK(dev_priv, cpu_transcoder), > + intel_de_write(display, TRANS_VBLANK(display, cpu_transcoder), > VBLANK_START(crtc_vblank_start - 1) | > VBLANK_END(crtc_vblank_end - 1)); > /* > * The double buffer latch point for TRANS_VTOTAL > * is the transcoder's undelayed vblank. > */ > - intel_de_write(dev_priv, TRANS_VTOTAL(dev_priv, cpu_transcoder), > + intel_de_write(display, TRANS_VTOTAL(display, cpu_transcoder), > VACTIVE(crtc_vdisplay - 1) | > VTOTAL(crtc_vtotal - 1)); > } > > static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > int width = drm_rect_width(&crtc_state->pipe_src); > int height = drm_rect_height(&crtc_state->pipe_src); > enum pipe pipe = crtc->pipe; > @@ -2784,63 +2783,62 @@ static void intel_set_pipe_src_size(const struct > intel_crtc_state *crtc_state) > /* pipesrc controls the size that is scaled from, which should > * always be the user's requested size. > */ > - intel_de_write(dev_priv, PIPESRC(dev_priv, pipe), > + intel_de_write(display, PIPESRC(display, pipe), > PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - > 1)); > } > > static bool intel_pipe_is_interlaced(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc- > >dev); > + struct intel_display *display = to_intel_display(crtc_state); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > > - if (DISPLAY_VER(dev_priv) == 2) > + if (DISPLAY_VER(display) == 2) > return false; > > - if (DISPLAY_VER(dev_priv) >= 9 || > - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) > - return intel_de_read(dev_priv, > - TRANSCONF(dev_priv, cpu_transcoder)) & > TRANSCONF_INTERLACE_MASK_HSW; > + if (DISPLAY_VER(display) >= 9 || > + display->platform.broadwell || display->platform.haswell) > + return intel_de_read(display, > + TRANSCONF(display, cpu_transcoder)) & > TRANSCONF_INTERLACE_MASK_HSW; > else > - return intel_de_read(dev_priv, > - TRANSCONF(dev_priv, cpu_transcoder)) & > TRANSCONF_INTERLACE_MASK; > + return intel_de_read(display, > + TRANSCONF(display, cpu_transcoder)) & > TRANSCONF_INTERLACE_MASK; > } > > static void intel_get_transcoder_timings(struct intel_crtc *crtc, > struct intel_crtc_state *pipe_config) > { > - struct drm_device *dev = crtc->base.dev; > - struct drm_i915_private *dev_priv = to_i915(dev); > + struct intel_display *display = to_intel_display(crtc); > enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; > struct drm_display_mode *adjusted_mode = &pipe_config- > >hw.adjusted_mode; > u32 tmp; > > - tmp = intel_de_read(dev_priv, TRANS_HTOTAL(dev_priv, > cpu_transcoder)); > + tmp = intel_de_read(display, TRANS_HTOTAL(display, > cpu_transcoder)); > adjusted_mode->crtc_hdisplay = REG_FIELD_GET(HACTIVE_MASK, > tmp) + 1; > adjusted_mode->crtc_htotal = REG_FIELD_GET(HTOTAL_MASK, tmp) + > 1; > > if (!transcoder_is_dsi(cpu_transcoder)) { > - tmp = intel_de_read(dev_priv, > - TRANS_HBLANK(dev_priv, > cpu_transcoder)); > + tmp = intel_de_read(display, > + TRANS_HBLANK(display, cpu_transcoder)); > adjusted_mode->crtc_hblank_start = > REG_FIELD_GET(HBLANK_START_MASK, tmp) + 1; > adjusted_mode->crtc_hblank_end = > REG_FIELD_GET(HBLANK_END_MASK, tmp) + 1; > } > > - tmp = intel_de_read(dev_priv, TRANS_HSYNC(dev_priv, > cpu_transcoder)); > + tmp = intel_de_read(display, TRANS_HSYNC(display, cpu_transcoder)); > adjusted_mode->crtc_hsync_start = > REG_FIELD_GET(HSYNC_START_MASK, tmp) + 1; > adjusted_mode->crtc_hsync_end = > REG_FIELD_GET(HSYNC_END_MASK, tmp) + 1; > > - tmp = intel_de_read(dev_priv, TRANS_VTOTAL(dev_priv, > cpu_transcoder)); > + tmp = intel_de_read(display, TRANS_VTOTAL(display, > cpu_transcoder)); > adjusted_mode->crtc_vdisplay = REG_FIELD_GET(VACTIVE_MASK, > tmp) + 1; > adjusted_mode->crtc_vtotal = REG_FIELD_GET(VTOTAL_MASK, tmp) + > 1; > > /* FIXME TGL+ DSI transcoders have this! */ > if (!transcoder_is_dsi(cpu_transcoder)) { > - tmp = intel_de_read(dev_priv, > - TRANS_VBLANK(dev_priv, > cpu_transcoder)); > + tmp = intel_de_read(display, > + TRANS_VBLANK(display, cpu_transcoder)); > adjusted_mode->crtc_vblank_start = > REG_FIELD_GET(VBLANK_START_MASK, tmp) + 1; > adjusted_mode->crtc_vblank_end = > REG_FIELD_GET(VBLANK_END_MASK, tmp) + 1; > } > - tmp = intel_de_read(dev_priv, TRANS_VSYNC(dev_priv, > cpu_transcoder)); > + tmp = intel_de_read(display, TRANS_VSYNC(display, cpu_transcoder)); > adjusted_mode->crtc_vsync_start = > REG_FIELD_GET(VSYNC_START_MASK, tmp) + 1; > adjusted_mode->crtc_vsync_end = > REG_FIELD_GET(VSYNC_END_MASK, tmp) + 1; > > @@ -2850,11 +2848,11 @@ static void intel_get_transcoder_timings(struct > intel_crtc *crtc, > adjusted_mode->crtc_vblank_end += 1; > } > > - if (DISPLAY_VER(dev_priv) >= 13 && > !transcoder_is_dsi(cpu_transcoder)) > + if (DISPLAY_VER(display) >= 13 && > !transcoder_is_dsi(cpu_transcoder)) > adjusted_mode->crtc_vblank_start = > adjusted_mode->crtc_vdisplay + > - intel_de_read(dev_priv, > - TRANS_SET_CONTEXT_LATENCY(dev_priv, > cpu_transcoder)); > + intel_de_read(display, > + TRANS_SET_CONTEXT_LATENCY(display, > cpu_transcoder)); > } > > static void intel_joiner_adjust_pipe_src(struct intel_crtc_state *crtc_state) > @@ -2877,11 +2875,10 @@ static void intel_joiner_adjust_pipe_src(struct > intel_crtc_state *crtc_state) > static void intel_get_pipe_src_size(struct intel_crtc *crtc, > struct intel_crtc_state *pipe_config) > { > - struct drm_device *dev = crtc->base.dev; > - struct drm_i915_private *dev_priv = to_i915(dev); > + struct intel_display *display = to_intel_display(crtc); > u32 tmp; > > - tmp = intel_de_read(dev_priv, PIPESRC(dev_priv, crtc->pipe)); > + tmp = intel_de_read(display, PIPESRC(display, crtc->pipe)); > > drm_rect_init(&pipe_config->pipe_src, 0, 0, > REG_FIELD_GET(PIPESRC_WIDTH_MASK, tmp) + 1, > @@ -2892,8 +2889,7 @@ static void intel_get_pipe_src_size(struct intel_crtc > *crtc, > > void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(crtc_state); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > u32 val = 0; > > @@ -2902,15 +2898,15 @@ void i9xx_set_pipeconf(const struct > intel_crtc_state *crtc_state) > * - During modeset the pipe is still disabled and must remain so > * - During fastset the pipe is already enabled and must remain so > */ > - if (IS_I830(dev_priv) || !intel_crtc_needs_modeset(crtc_state)) > + if (display->platform.i830 || !intel_crtc_needs_modeset(crtc_state)) > val |= TRANSCONF_ENABLE; > > if (crtc_state->double_wide) > val |= TRANSCONF_DOUBLE_WIDE; > > /* only g4x and later have fancy bpc/dither controls */ > - if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || > - IS_CHERRYVIEW(dev_priv)) { > + if (display->platform.g4x || display->platform.valleyview || > + display->platform.cherryview) { > /* Bspec claims that we can't use dithering for 30bpp pipes. > */ > if (crtc_state->dither && crtc_state->pipe_bpp != 30) > val |= TRANSCONF_DITHER_EN | > @@ -2934,7 +2930,7 @@ void i9xx_set_pipeconf(const struct intel_crtc_state > *crtc_state) > } > > if (crtc_state->hw.adjusted_mode.flags & > DRM_MODE_FLAG_INTERLACE) { > - if (DISPLAY_VER(dev_priv) < 4 || > + if (DISPLAY_VER(display) < 4 || > intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO)) > val |= > TRANSCONF_INTERLACE_W_FIELD_INDICATION; > else > @@ -2943,8 +2939,8 @@ void i9xx_set_pipeconf(const struct intel_crtc_state > *crtc_state) > val |= TRANSCONF_INTERLACE_PROGRESSIVE; > } > > - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && > - crtc_state->limited_color_range) > + if ((display->platform.valleyview || display->platform.cherryview) && > + crtc_state->limited_color_range) > val |= TRANSCONF_COLOR_RANGE_SELECT; > > val |= TRANSCONF_GAMMA_MODE(crtc_state->gamma_mode); > @@ -2954,17 +2950,17 @@ void i9xx_set_pipeconf(const struct > intel_crtc_state *crtc_state) > > val |= TRANSCONF_FRAME_START_DELAY(crtc_state- > >framestart_delay - 1); > > - intel_de_write(dev_priv, TRANSCONF(dev_priv, cpu_transcoder), val); > - intel_de_posting_read(dev_priv, TRANSCONF(dev_priv, > cpu_transcoder)); > + intel_de_write(display, TRANSCONF(display, cpu_transcoder), val); > + intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder)); > } > > static enum intel_output_format > bdw_get_pipe_misc_output_format(struct intel_crtc *crtc) > { > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(crtc); > u32 tmp; > > - tmp = intel_de_read(dev_priv, PIPE_MISC(crtc->pipe)); > + tmp = intel_de_read(display, PIPE_MISC(crtc->pipe)); > > if (tmp & PIPE_MISC_YUV420_ENABLE) { > /* > @@ -2972,8 +2968,8 @@ bdw_get_pipe_misc_output_format(struct > intel_crtc *crtc) > * For xe3_lpd+ this is implied in YUV420 Enable bit. > * Ensure the same for prior platforms in YUV420 Mode bit. > */ > - if (DISPLAY_VER(dev_priv) < 30) > - drm_WARN_ON(&dev_priv->drm, > + if (DISPLAY_VER(display) < 30) > + drm_WARN_ON(display->drm, > (tmp & > PIPE_MISC_YUV420_MODE_FULL_BLEND) == 0); > > return INTEL_OUTPUT_FORMAT_YCBCR420; > @@ -2988,7 +2984,6 @@ static bool i9xx_get_pipe_config(struct intel_crtc > *crtc, > struct intel_crtc_state *pipe_config) > { > struct intel_display *display = to_intel_display(crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum intel_display_power_domain power_domain; > intel_wakeref_t wakeref; > u32 tmp; > @@ -3006,13 +3001,13 @@ static bool i9xx_get_pipe_config(struct intel_crtc > *crtc, > > ret = false; > > - tmp = intel_de_read(dev_priv, > - TRANSCONF(dev_priv, pipe_config- > >cpu_transcoder)); > + tmp = intel_de_read(display, > + TRANSCONF(display, pipe_config- > >cpu_transcoder)); > if (!(tmp & TRANSCONF_ENABLE)) > goto out; > > - if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || > - IS_CHERRYVIEW(dev_priv)) { > + if (display->platform.g4x || display->platform.valleyview || > + display->platform.cherryview) { > switch (tmp & TRANSCONF_BPC_MASK) { > case TRANSCONF_BPC_6: > pipe_config->pipe_bpp = 18; > @@ -3029,7 +3024,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc > *crtc, > } > } > > - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && > + if ((display->platform.valleyview || display->platform.cherryview) && > (tmp & TRANSCONF_COLOR_RANGE_SELECT)) > pipe_config->limited_color_range = true; > > @@ -3037,13 +3032,13 @@ static bool i9xx_get_pipe_config(struct intel_crtc > *crtc, > > pipe_config->framestart_delay = > REG_FIELD_GET(TRANSCONF_FRAME_START_DELAY_MASK, tmp) + 1; > > - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && > + if ((display->platform.valleyview || display->platform.cherryview) && > (tmp & TRANSCONF_WGC_ENABLE)) > pipe_config->wgc_enable = true; > > intel_color_get_config(pipe_config); > > - if (HAS_DOUBLE_WIDE(dev_priv)) > + if (HAS_DOUBLE_WIDE(display)) > pipe_config->double_wide = tmp & > TRANSCONF_DOUBLE_WIDE; > > intel_get_transcoder_timings(crtc, pipe_config); > @@ -3053,13 +3048,13 @@ static bool i9xx_get_pipe_config(struct intel_crtc > *crtc, > > i9xx_dpll_get_hw_state(crtc, &pipe_config->dpll_hw_state); > > - if (DISPLAY_VER(dev_priv) >= 4) { > + if (DISPLAY_VER(display) >= 4) { > tmp = pipe_config->dpll_hw_state.i9xx.dpll_md; > pipe_config->pixel_multiplier = > ((tmp & DPLL_MD_UDI_MULTIPLIER_MASK) > >> DPLL_MD_UDI_MULTIPLIER_SHIFT) + 1; > - } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) || > - IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) { > + } else if (display->platform.i945g || display->platform.i945gm || > + display->platform.g33 || display->platform.pineview) { > tmp = pipe_config->dpll_hw_state.i9xx.dpll; > pipe_config->pixel_multiplier = > ((tmp & SDVO_MULTIPLIER_MASK) > @@ -3071,9 +3066,9 @@ static bool i9xx_get_pipe_config(struct intel_crtc > *crtc, > pipe_config->pixel_multiplier = 1; > } > > - if (IS_CHERRYVIEW(dev_priv)) > + if (display->platform.cherryview) > chv_crtc_clock_get(pipe_config); > - else if (IS_VALLEYVIEW(dev_priv)) > + else if (display->platform.valleyview) > vlv_crtc_clock_get(pipe_config); > else > i9xx_crtc_clock_get(pipe_config); > @@ -3096,8 +3091,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc > *crtc, > > void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(crtc_state); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > u32 val = 0; > > @@ -3139,7 +3133,7 @@ void ilk_set_pipeconf(const struct intel_crtc_state > *crtc_state) > * This would end up with an odd purple hue over > * the entire display. Make sure we don't do it. > */ > - drm_WARN_ON(&dev_priv->drm, crtc_state->limited_color_range > && > + drm_WARN_ON(display->drm, crtc_state->limited_color_range && > crtc_state->output_format != > INTEL_OUTPUT_FORMAT_RGB); > > if (crtc_state->limited_color_range && > @@ -3154,14 +3148,13 @@ void ilk_set_pipeconf(const struct intel_crtc_state > *crtc_state) > val |= TRANSCONF_FRAME_START_DELAY(crtc_state- > >framestart_delay - 1); > val |= TRANSCONF_MSA_TIMING_DELAY(crtc_state- > >msa_timing_delay); > > - intel_de_write(dev_priv, TRANSCONF(dev_priv, cpu_transcoder), val); > - intel_de_posting_read(dev_priv, TRANSCONF(dev_priv, > cpu_transcoder)); > + intel_de_write(display, TRANSCONF(display, cpu_transcoder), val); > + intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder)); > } > > static void hsw_set_transconf(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(crtc_state); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > u32 val = 0; > > @@ -3172,7 +3165,7 @@ static void hsw_set_transconf(const struct > intel_crtc_state *crtc_state) > if (!intel_crtc_needs_modeset(crtc_state)) > val |= TRANSCONF_ENABLE; > > - if (IS_HASWELL(dev_priv) && crtc_state->dither) > + if (display->platform.haswell && crtc_state->dither) > val |= TRANSCONF_DITHER_EN | > TRANSCONF_DITHER_TYPE_SP; > > if (crtc_state->hw.adjusted_mode.flags & > DRM_MODE_FLAG_INTERLACE) > @@ -3180,20 +3173,19 @@ static void hsw_set_transconf(const struct > intel_crtc_state *crtc_state) > else > val |= TRANSCONF_INTERLACE_PF_PD_ILK; > > - if (IS_HASWELL(dev_priv) && > + if (display->platform.haswell && > crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB) > val |= TRANSCONF_OUTPUT_COLORSPACE_YUV_HSW; > > - intel_de_write(dev_priv, TRANSCONF(dev_priv, cpu_transcoder), val); > - intel_de_posting_read(dev_priv, TRANSCONF(dev_priv, > cpu_transcoder)); > + intel_de_write(display, TRANSCONF(display, cpu_transcoder), val); > + intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder)); > } > > static void bdw_set_pipe_misc(struct intel_dsb *dsb, > const struct intel_crtc_state *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct intel_display *display = to_intel_display(crtc->base.dev); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > u32 val = 0; > > switch (crtc_state->pipe_bpp) { > @@ -3208,7 +3200,7 @@ static void bdw_set_pipe_misc(struct intel_dsb > *dsb, > break; > case 36: > /* Port output 12BPC defined for ADLP+ */ > - if (DISPLAY_VER(dev_priv) >= 13) > + if (DISPLAY_VER(display) >= 13) > val |= PIPE_MISC_BPC_12_ADLP; > break; > default: > @@ -3227,14 +3219,14 @@ static void bdw_set_pipe_misc(struct intel_dsb > *dsb, > val |= DISPLAY_VER(display) >= 30 ? > PIPE_MISC_YUV420_ENABLE : > PIPE_MISC_YUV420_ENABLE | > PIPE_MISC_YUV420_MODE_FULL_BLEND; > > - if (DISPLAY_VER(dev_priv) >= 11 && is_hdr_mode(crtc_state)) > + if (DISPLAY_VER(display) >= 11 && is_hdr_mode(crtc_state)) > val |= PIPE_MISC_HDR_MODE_PRECISION; > > - if (DISPLAY_VER(dev_priv) >= 12) > + if (DISPLAY_VER(display) >= 12) > val |= PIPE_MISC_PIXEL_ROUNDING_TRUNC; > > /* allow PSR with sprite enabled */ > - if (IS_BROADWELL(dev_priv)) > + if (display->platform.broadwell) > val |= PIPE_MISC_PSR_MASK_SPRITE_ENABLE; > > intel_de_write_dsb(display, dsb, PIPE_MISC(crtc->pipe), val); > @@ -3242,10 +3234,10 @@ static void bdw_set_pipe_misc(struct intel_dsb > *dsb, > > int bdw_get_pipe_misc_bpp(struct intel_crtc *crtc) > { > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(crtc); > u32 tmp; > > - tmp = intel_de_read(dev_priv, PIPE_MISC(crtc->pipe)); > + tmp = intel_de_read(display, PIPE_MISC(crtc->pipe)); > > switch (tmp & PIPE_MISC_BPC_MASK) { > case PIPE_MISC_BPC_6: > @@ -3265,7 +3257,7 @@ int bdw_get_pipe_misc_bpp(struct intel_crtc *crtc) > * MIPI DSI HW readout. > */ > case PIPE_MISC_BPC_12_ADLP: > - if (DISPLAY_VER(dev_priv) >= 13) > + if (DISPLAY_VER(display) >= 13) > return 36; > fallthrough; > default: > @@ -3336,8 +3328,6 @@ static bool ilk_get_pipe_config(struct intel_crtc > *crtc, > struct intel_crtc_state *pipe_config) > { > struct intel_display *display = to_intel_display(crtc); > - struct drm_device *dev = crtc->base.dev; > - struct drm_i915_private *dev_priv = to_i915(dev); > enum intel_display_power_domain power_domain; > intel_wakeref_t wakeref; > u32 tmp; > @@ -3352,8 +3342,8 @@ static bool ilk_get_pipe_config(struct intel_crtc > *crtc, > pipe_config->shared_dpll = NULL; > > ret = false; > - tmp = intel_de_read(dev_priv, > - TRANSCONF(dev_priv, pipe_config- > >cpu_transcoder)); > + tmp = intel_de_read(display, > + TRANSCONF(display, pipe_config- > >cpu_transcoder)); > if (!(tmp & TRANSCONF_ENABLE)) > goto out; > > @@ -3414,24 +3404,23 @@ static bool ilk_get_pipe_config(struct intel_crtc > *crtc, > return ret; > } > > -static u8 joiner_pipes(struct drm_i915_private *i915) > +static u8 joiner_pipes(struct intel_display *display) > { > u8 pipes; > > - if (DISPLAY_VER(i915) >= 12) > + if (DISPLAY_VER(display) >= 12) > pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D); > - else if (DISPLAY_VER(i915) >= 11) > + else if (DISPLAY_VER(display) >= 11) > pipes = BIT(PIPE_B) | BIT(PIPE_C); > else > pipes = 0; > > - return pipes & DISPLAY_RUNTIME_INFO(i915)->pipe_mask; > + return pipes & DISPLAY_RUNTIME_INFO(display)->pipe_mask; > } > > -static bool transcoder_ddi_func_is_enabled(struct drm_i915_private > *dev_priv, > +static bool transcoder_ddi_func_is_enabled(struct intel_display *display, > enum transcoder cpu_transcoder) > { > - struct intel_display *display = &dev_priv->display; > enum intel_display_power_domain power_domain; > intel_wakeref_t wakeref; > u32 tmp = 0; > @@ -3439,8 +3428,8 @@ static bool transcoder_ddi_func_is_enabled(struct > drm_i915_private *dev_priv, > power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder); > > with_intel_display_power_if_enabled(display, power_domain, > wakeref) > - tmp = intel_de_read(dev_priv, > - TRANS_DDI_FUNC_CTL(dev_priv, > cpu_transcoder)); > + tmp = intel_de_read(display, > + TRANS_DDI_FUNC_CTL(display, > cpu_transcoder)); > > return tmp & TRANS_DDI_FUNC_ENABLE; > } > @@ -3448,7 +3437,6 @@ static bool transcoder_ddi_func_is_enabled(struct > drm_i915_private *dev_priv, > static void enabled_uncompressed_joiner_pipes(struct intel_display *display, > u8 *primary_pipes, u8 > *secondary_pipes) > { > - struct drm_i915_private *i915 = to_i915(display->drm); > struct intel_crtc *crtc; > > *primary_pipes = 0; > @@ -3457,8 +3445,8 @@ static void > enabled_uncompressed_joiner_pipes(struct intel_display *display, > if (!HAS_UNCOMPRESSED_JOINER(display)) > return; > > - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, > - joiner_pipes(i915)) { > + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, > + joiner_pipes(display)) { > enum intel_display_power_domain power_domain; > enum pipe pipe = crtc->pipe; > intel_wakeref_t wakeref; > @@ -3478,7 +3466,6 @@ static void > enabled_uncompressed_joiner_pipes(struct intel_display *display, > static void enabled_bigjoiner_pipes(struct intel_display *display, > u8 *primary_pipes, u8 *secondary_pipes) > { > - struct drm_i915_private *i915 = to_i915(display->drm); > struct intel_crtc *crtc; > > *primary_pipes = 0; > @@ -3487,8 +3474,8 @@ static void enabled_bigjoiner_pipes(struct > intel_display *display, > if (!HAS_BIGJOINER(display)) > return; > > - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, > - joiner_pipes(i915)) { > + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, > + joiner_pipes(display)) { > enum intel_display_power_domain power_domain; > enum pipe pipe = crtc->pipe; > intel_wakeref_t wakeref; > @@ -3546,10 +3533,9 @@ static u8 fixup_ultrajoiner_secondary_pipes(u8 > ultrajoiner_primary_pipes, > return ultrajoiner_secondary_pipes | ultrajoiner_primary_pipes << 3; > } > > -static void enabled_ultrajoiner_pipes(struct drm_i915_private *i915, > +static void enabled_ultrajoiner_pipes(struct intel_display *display, > u8 *primary_pipes, u8 *secondary_pipes) > { > - struct intel_display *display = &i915->display; > struct intel_crtc *crtc; > > *primary_pipes = 0; > @@ -3558,15 +3544,15 @@ static void enabled_ultrajoiner_pipes(struct > drm_i915_private *i915, > if (!HAS_ULTRAJOINER(display)) > return; > > - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, > - joiner_pipes(i915)) { > + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, > + joiner_pipes(display)) { > enum intel_display_power_domain power_domain; > enum pipe pipe = crtc->pipe; > intel_wakeref_t wakeref; > > power_domain = intel_dsc_power_domain(crtc, (enum > transcoder)pipe); > with_intel_display_power_if_enabled(display, > power_domain, wakeref) { > - u32 tmp = intel_de_read(i915, > ICL_PIPE_DSS_CTL1(pipe)); > + u32 tmp = intel_de_read(display, > ICL_PIPE_DSS_CTL1(pipe)); > > if (!(tmp & ULTRA_JOINER_ENABLE)) > continue; > @@ -3579,11 +3565,10 @@ static void enabled_ultrajoiner_pipes(struct > drm_i915_private *i915, > } > } > > -static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, > +static void enabled_joiner_pipes(struct intel_display *display, > enum pipe pipe, > u8 *primary_pipe, u8 *secondary_pipes) > { > - struct intel_display *display = to_intel_display(&dev_priv->drm); > u8 primary_ultrajoiner_pipes; > u8 primary_uncompressed_joiner_pipes, primary_bigjoiner_pipes; > u8 secondary_ultrajoiner_pipes; > @@ -3591,21 +3576,21 @@ static void enabled_joiner_pipes(struct > drm_i915_private *dev_priv, > u8 ultrajoiner_pipes; > u8 uncompressed_joiner_pipes, bigjoiner_pipes; > > - enabled_ultrajoiner_pipes(dev_priv, &primary_ultrajoiner_pipes, > + enabled_ultrajoiner_pipes(display, &primary_ultrajoiner_pipes, > &secondary_ultrajoiner_pipes); > /* > * For some strange reason the last pipe in the set of four > * shouldn't have ultrajoiner enable bit set in hardware. > * Set the bit anyway to make life easier. > */ > - drm_WARN_ON(&dev_priv->drm, > + drm_WARN_ON(display->drm, > expected_secondary_pipes(primary_ultrajoiner_pipes, 3) > != > secondary_ultrajoiner_pipes); > secondary_ultrajoiner_pipes = > > fixup_ultrajoiner_secondary_pipes(primary_ultrajoiner_pipes, > > secondary_ultrajoiner_pipes); > > - drm_WARN_ON(&dev_priv->drm, (primary_ultrajoiner_pipes & > secondary_ultrajoiner_pipes) != 0); > + drm_WARN_ON(display->drm, (primary_ultrajoiner_pipes & > secondary_ultrajoiner_pipes) != 0); > > enabled_uncompressed_joiner_pipes(display, > &primary_uncompressed_joiner_pipes, > > &secondary_uncompressed_joiner_pipes); > @@ -3699,11 +3684,11 @@ static void enabled_joiner_pipes(struct > drm_i915_private *dev_priv, > } > } > > -static u8 hsw_panel_transcoders(struct drm_i915_private *i915) > +static u8 hsw_panel_transcoders(struct intel_display *display) > { > u8 panel_transcoder_mask = BIT(TRANSCODER_EDP); > > - if (DISPLAY_VER(i915) >= 11) > + if (DISPLAY_VER(display) >= 11) > panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) | > BIT(TRANSCODER_DSI_1); > > return panel_transcoder_mask; > @@ -3712,9 +3697,7 @@ static u8 hsw_panel_transcoders(struct > drm_i915_private *i915) > static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) > { > struct intel_display *display = to_intel_display(crtc); > - struct drm_device *dev = crtc->base.dev; > - struct drm_i915_private *dev_priv = to_i915(dev); > - u8 panel_transcoder_mask = hsw_panel_transcoders(dev_priv); > + u8 panel_transcoder_mask = hsw_panel_transcoders(display); > enum transcoder cpu_transcoder; > u8 primary_pipe, secondary_pipes; > u8 enabled_transcoders = 0; > @@ -3723,7 +3706,7 @@ static u8 hsw_enabled_transcoders(struct intel_crtc > *crtc) > * XXX: Do intel_display_power_get_if_enabled before reading this > (for > * consistency and less surprising code; it's in always on power). > */ > - for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, > + for_each_cpu_transcoder_masked(display, cpu_transcoder, > panel_transcoder_mask) { > enum intel_display_power_domain power_domain; > intel_wakeref_t wakeref; > @@ -3732,15 +3715,15 @@ static u8 hsw_enabled_transcoders(struct > intel_crtc *crtc) > > power_domain = > POWER_DOMAIN_TRANSCODER(cpu_transcoder); > with_intel_display_power_if_enabled(display, > power_domain, wakeref) > - tmp = intel_de_read(dev_priv, > - TRANS_DDI_FUNC_CTL(dev_priv, > cpu_transcoder)); > + tmp = intel_de_read(display, > + TRANS_DDI_FUNC_CTL(display, > cpu_transcoder)); > > if (!(tmp & TRANS_DDI_FUNC_ENABLE)) > continue; > > switch (tmp & TRANS_DDI_EDP_INPUT_MASK) { > default: > - drm_WARN(dev, 1, > + drm_WARN(display->drm, 1, > "unknown pipe linked to transcoder %s\n", > transcoder_name(cpu_transcoder)); > fallthrough; > @@ -3765,14 +3748,14 @@ static u8 hsw_enabled_transcoders(struct > intel_crtc *crtc) > > /* single pipe or joiner primary */ > cpu_transcoder = (enum transcoder) crtc->pipe; > - if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder)) > + if (transcoder_ddi_func_is_enabled(display, cpu_transcoder)) > enabled_transcoders |= BIT(cpu_transcoder); > > /* joiner secondary -> consider the primary pipe's transcoder as well > */ > - enabled_joiner_pipes(dev_priv, crtc->pipe, &primary_pipe, > &secondary_pipes); > + enabled_joiner_pipes(display, crtc->pipe, &primary_pipe, > &secondary_pipes); > if (secondary_pipes & BIT(crtc->pipe)) { > cpu_transcoder = (enum transcoder)ffs(primary_pipe) - 1; > - if (transcoder_ddi_func_is_enabled(dev_priv, > cpu_transcoder)) > + if (transcoder_ddi_func_is_enabled(display, cpu_transcoder)) > enabled_transcoders |= BIT(cpu_transcoder); > } > > @@ -3797,17 +3780,17 @@ static bool has_pipe_transcoders(u8 > enabled_transcoders) > BIT(TRANSCODER_DSI_1)); > } > > -static void assert_enabled_transcoders(struct drm_i915_private *i915, > +static void assert_enabled_transcoders(struct intel_display *display, > u8 enabled_transcoders) > { > /* Only one type of transcoder please */ > - drm_WARN_ON(&i915->drm, > + drm_WARN_ON(display->drm, > has_edp_transcoders(enabled_transcoders) + > has_dsi_transcoders(enabled_transcoders) + > has_pipe_transcoders(enabled_transcoders) > 1); > > /* Only DSI transcoders can be ganged */ > - drm_WARN_ON(&i915->drm, > + drm_WARN_ON(display->drm, > !has_dsi_transcoders(enabled_transcoders) && > !is_power_of_2(enabled_transcoders)); > } > @@ -3817,8 +3800,6 @@ static bool hsw_get_transcoder_state(struct > intel_crtc *crtc, > struct intel_display_power_domain_set > *power_domain_set) > { > struct intel_display *display = to_intel_display(crtc); > - struct drm_device *dev = crtc->base.dev; > - struct drm_i915_private *dev_priv = to_i915(dev); > unsigned long enabled_transcoders; > u32 tmp; > > @@ -3826,7 +3807,7 @@ static bool hsw_get_transcoder_state(struct > intel_crtc *crtc, > if (!enabled_transcoders) > return false; > > - assert_enabled_transcoders(dev_priv, enabled_transcoders); > + assert_enabled_transcoders(display, enabled_transcoders); > > /* > * With the exception of DSI we should only ever have > @@ -3839,16 +3820,16 @@ static bool hsw_get_transcoder_state(struct > intel_crtc *crtc, > > POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder))) > return false; > > - if (hsw_panel_transcoders(dev_priv) & BIT(pipe_config- > >cpu_transcoder)) { > - tmp = intel_de_read(dev_priv, > - TRANS_DDI_FUNC_CTL(dev_priv, > pipe_config->cpu_transcoder)); > + if (hsw_panel_transcoders(display) & BIT(pipe_config- > >cpu_transcoder)) { > + tmp = intel_de_read(display, > + TRANS_DDI_FUNC_CTL(display, > pipe_config->cpu_transcoder)); > > if ((tmp & TRANS_DDI_EDP_INPUT_MASK) == > TRANS_DDI_EDP_INPUT_A_ONOFF) > pipe_config->pch_pfit.force_thru = true; > } > > - tmp = intel_de_read(dev_priv, > - TRANSCONF(dev_priv, pipe_config- > >cpu_transcoder)); > + tmp = intel_de_read(display, > + TRANSCONF(display, pipe_config- > >cpu_transcoder)); > > return tmp & TRANSCONF_ENABLE; > } > @@ -3901,12 +3882,12 @@ static bool bxt_get_dsi_transcoder_state(struct > intel_crtc *crtc, > > static void intel_joiner_get_config(struct intel_crtc_state *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *i915 = to_i915(crtc->base.dev); > u8 primary_pipe, secondary_pipes; > enum pipe pipe = crtc->pipe; > > - enabled_joiner_pipes(i915, pipe, &primary_pipe, &secondary_pipes); > + enabled_joiner_pipes(display, pipe, &primary_pipe, > &secondary_pipes); > > if (((primary_pipe | secondary_pipes) & BIT(pipe)) == 0) > return; > @@ -3918,7 +3899,6 @@ static bool hsw_get_pipe_config(struct intel_crtc > *crtc, > struct intel_crtc_state *pipe_config) > { > struct intel_display *display = to_intel_display(crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > bool active; > u32 tmp; > > @@ -3930,9 +3910,9 @@ static bool hsw_get_pipe_config(struct intel_crtc > *crtc, > > active = hsw_get_transcoder_state(crtc, pipe_config, &crtc- > >hw_readout_power_domains); > > - if ((IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) && > + if ((display->platform.geminilake || display->platform.broxton) && > bxt_get_dsi_transcoder_state(crtc, pipe_config, &crtc- > >hw_readout_power_domains)) { > - drm_WARN_ON(&dev_priv->drm, active); > + drm_WARN_ON(display->drm, active); > active = true; > } > > @@ -3943,17 +3923,17 @@ static bool hsw_get_pipe_config(struct intel_crtc > *crtc, > intel_dsc_get_config(pipe_config); > > if (!transcoder_is_dsi(pipe_config->cpu_transcoder) || > - DISPLAY_VER(dev_priv) >= 11) > + DISPLAY_VER(display) >= 11) > intel_get_transcoder_timings(crtc, pipe_config); > > - if (HAS_VRR(dev_priv) && !transcoder_is_dsi(pipe_config- > >cpu_transcoder)) > + if (HAS_VRR(display) && !transcoder_is_dsi(pipe_config- > >cpu_transcoder)) > intel_vrr_get_config(pipe_config); > > intel_get_pipe_src_size(crtc, pipe_config); > > - if (IS_HASWELL(dev_priv)) { > - u32 tmp = intel_de_read(dev_priv, > - TRANSCONF(dev_priv, pipe_config- > >cpu_transcoder)); > + if (display->platform.haswell) { > + u32 tmp = intel_de_read(display, > + TRANSCONF(display, pipe_config- > >cpu_transcoder)); > > if (tmp & TRANSCONF_OUTPUT_COLORSPACE_YUV_HSW) > pipe_config->output_format = > INTEL_OUTPUT_FORMAT_YCBCR444; > @@ -3968,15 +3948,15 @@ static bool hsw_get_pipe_config(struct intel_crtc > *crtc, > > intel_color_get_config(pipe_config); > > - tmp = intel_de_read(dev_priv, WM_LINETIME(crtc->pipe)); > + tmp = intel_de_read(display, WM_LINETIME(crtc->pipe)); > pipe_config->linetime = REG_FIELD_GET(HSW_LINETIME_MASK, > tmp); > - if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) > + if (display->platform.broadwell || display->platform.haswell) > pipe_config->ips_linetime = > REG_FIELD_GET(HSW_IPS_LINETIME_MASK, tmp); > > if (intel_display_power_get_in_set_if_enabled(display, &crtc- > >hw_readout_power_domains, > > POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe))) { > - if (DISPLAY_VER(dev_priv) >= 9) > + if (DISPLAY_VER(display) >= 9) > skl_scaler_get_config(pipe_config); > else > ilk_pfit_get_config(pipe_config); > @@ -3987,8 +3967,8 @@ static bool hsw_get_pipe_config(struct intel_crtc > *crtc, > if (pipe_config->cpu_transcoder != TRANSCODER_EDP && > !transcoder_is_dsi(pipe_config->cpu_transcoder)) { > pipe_config->pixel_multiplier = > - intel_de_read(dev_priv, > - TRANS_MULT(dev_priv, pipe_config- > >cpu_transcoder)) + 1; > + intel_de_read(display, > + TRANS_MULT(display, pipe_config- > >cpu_transcoder)) + 1; > } else { > pipe_config->pixel_multiplier = 1; > } > @@ -4010,10 +3990,10 @@ static bool hsw_get_pipe_config(struct intel_crtc > *crtc, > > bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > - struct drm_i915_private *i915 = to_i915(crtc->base.dev); > > - if (!i915->display.funcs.display->get_pipe_config(crtc, crtc_state)) > + if (!display->funcs.display->get_pipe_config(crtc, crtc_state)) > return false; > > crtc_state->hw.active = true; > @@ -4172,6 +4152,7 @@ static u16 hsw_ips_linetime_wm(const struct > intel_crtc_state *crtc_state, > > static u16 skl_linetime_wm(const struct intel_crtc_state *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > const struct drm_display_mode *pipe_mode = > @@ -4185,7 +4166,7 @@ static u16 skl_linetime_wm(const struct > intel_crtc_state *crtc_state) > crtc_state->pixel_rate); > > /* Display WA #1135: BXT:ALL GLK:ALL */ > - if ((IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) && > + if ((display->platform.geminilake || display->platform.broxton) && > skl_watermark_ipc_enabled(dev_priv)) > linetime_wm /= 2; > > @@ -4195,12 +4176,12 @@ static u16 skl_linetime_wm(const struct > intel_crtc_state *crtc_state) > static int hsw_compute_linetime_wm(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(state); > struct intel_crtc_state *crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > const struct intel_cdclk_state *cdclk_state; > > - if (DISPLAY_VER(dev_priv) >= 9) > + if (DISPLAY_VER(display) >= 9) > crtc_state->linetime = skl_linetime_wm(crtc_state); > else > crtc_state->linetime = hsw_linetime_wm(crtc_state); > @@ -4222,12 +4203,11 @@ static int intel_crtc_atomic_check(struct > intel_atomic_state *state, > struct intel_crtc *crtc) > { > struct intel_display *display = to_intel_display(crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_crtc_state *crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > int ret; > > - if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv) && > + if (DISPLAY_VER(display) < 5 && !display->platform.g4x && > intel_crtc_needs_modeset(crtc_state) && > !crtc_state->hw.active) > crtc_state->update_wm_post = true; > @@ -4244,13 +4224,13 @@ static int intel_crtc_atomic_check(struct > intel_atomic_state *state, > > ret = intel_wm_compute(state, crtc); > if (ret) { > - drm_dbg_kms(&dev_priv->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] watermarks are invalid\n", > crtc->base.base.id, crtc->base.name); > return ret; > } > > - if (DISPLAY_VER(dev_priv) >= 9) { > + if (DISPLAY_VER(display) >= 9) { > if (intel_crtc_needs_modeset(crtc_state) || > intel_crtc_needs_fastset(crtc_state)) { > ret = skl_update_scaler_crtc(crtc_state); > @@ -4269,8 +4249,8 @@ static int intel_crtc_atomic_check(struct > intel_atomic_state *state, > return ret; > } > > - if (DISPLAY_VER(dev_priv) >= 9 || > - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { > + if (DISPLAY_VER(display) >= 9 || > + display->platform.broadwell || display->platform.haswell) { > ret = hsw_compute_linetime_wm(state, crtc); > if (ret) > return ret; > @@ -4288,8 +4268,8 @@ static int > compute_sink_pipe_bpp(const struct drm_connector_state *conn_state, > struct intel_crtc_state *crtc_state) > { > + struct intel_display *display = to_intel_display(crtc_state); > struct drm_connector *connector = conn_state->connector; > - struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); > const struct drm_display_info *info = &connector->display_info; > int bpp; > > @@ -4312,7 +4292,7 @@ compute_sink_pipe_bpp(const struct > drm_connector_state *conn_state, > } > > if (bpp < crtc_state->pipe_bpp) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CONNECTOR:%d:%s] Limiting display bpp to %d " > "(EDID bpp %d, max requested bpp %d, max > platform bpp %d)\n", > connector->base.id, connector->name, > @@ -4330,17 +4310,17 @@ static int > compute_baseline_pipe_bpp(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(crtc); > struct intel_crtc_state *crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > struct drm_connector *connector; > struct drm_connector_state *connector_state; > int bpp, i; > > - if ((IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || > - IS_CHERRYVIEW(dev_priv))) > + if (display->platform.g4x || display->platform.valleyview || > + display->platform.cherryview) > bpp = 10*3; > - else if (DISPLAY_VER(dev_priv) >= 5) > + else if (DISPLAY_VER(display) >= 5) > bpp = 12*3; > else > bpp = 8*3; > @@ -4364,7 +4344,7 @@ compute_baseline_pipe_bpp(struct > intel_atomic_state *state, > > static bool check_digital_port_conflicts(struct intel_atomic_state *state) > { > - struct drm_device *dev = state->base.dev; > + struct intel_display *display = to_intel_display(state); > struct drm_connector *connector; > struct drm_connector_list_iter conn_iter; > unsigned int used_ports = 0; > @@ -4375,14 +4355,14 @@ static bool check_digital_port_conflicts(struct > intel_atomic_state *state) > * We're going to peek into connector->state, > * hence connection_mutex must be held. > */ > - drm_modeset_lock_assert_held(&dev- > >mode_config.connection_mutex); > + drm_modeset_lock_assert_held(&display->drm- > >mode_config.connection_mutex); > > /* > * Walk the connector list instead of the encoder > * list to detect the problem on ddi platforms > * where there's just one encoder per digital port. > */ > - drm_connector_list_iter_begin(dev, &conn_iter); > + drm_connector_list_iter_begin(display->drm, &conn_iter); > drm_for_each_connector_iter(connector, &conn_iter) { > struct drm_connector_state *connector_state; > struct intel_encoder *encoder; > @@ -4398,11 +4378,11 @@ static bool check_digital_port_conflicts(struct > intel_atomic_state *state) > > encoder = to_intel_encoder(connector_state->best_encoder); > > - drm_WARN_ON(dev, !connector_state->crtc); > + drm_WARN_ON(display->drm, !connector_state->crtc); > > switch (encoder->type) { > case INTEL_OUTPUT_DDI: > - if (drm_WARN_ON(dev, !HAS_DDI(to_i915(dev)))) > + if (drm_WARN_ON(display->drm, !HAS_DDI(display))) > break; > fallthrough; > case INTEL_OUTPUT_DP: > @@ -4550,9 +4530,9 @@ static int > intel_crtc_prepare_cleared_state(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > + struct intel_display *display = to_intel_display(state); > struct intel_crtc_state *crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_crtc_state *saved_state; > > saved_state = intel_crtc_state_alloc(crtc); > @@ -4577,8 +4557,8 @@ intel_crtc_prepare_cleared_state(struct > intel_atomic_state *state, > memcpy(saved_state->icl_port_dplls, crtc_state->icl_port_dplls, > sizeof(saved_state->icl_port_dplls)); > saved_state->crc_enabled = crtc_state->crc_enabled; > - if (IS_G4X(dev_priv) || > - IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > + if (display->platform.g4x || > + display->platform.valleyview || display->platform.cherryview) > saved_state->wm = crtc_state->wm; > > memcpy(crtc_state, saved_state, sizeof(*crtc_state)); > @@ -4594,7 +4574,7 @@ intel_modeset_pipe_config(struct > intel_atomic_state *state, > struct intel_crtc *crtc, > const struct intel_link_bw_limits *limits) > { > - struct drm_i915_private *i915 = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(crtc); > struct intel_crtc_state *crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > struct drm_connector *connector; > @@ -4627,7 +4607,7 @@ intel_modeset_pipe_config(struct > intel_atomic_state *state, > crtc_state->max_link_bpp_x16 = limits->max_bpp_x16[crtc->pipe]; > > if (crtc_state->pipe_bpp > fxp_q4_to_int(crtc_state- > >max_link_bpp_x16)) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] Link bpp limited to " FXP_Q4_FMT > "\n", > crtc->base.base.id, crtc->base.name, > FXP_Q4_ARGS(crtc_state->max_link_bpp_x16)); > @@ -4657,7 +4637,7 @@ intel_modeset_pipe_config(struct > intel_atomic_state *state, > continue; > > if (!check_single_encoder_cloning(state, crtc, encoder)) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[ENCODER:%d:%s] rejecting invalid cloning > configuration\n", > encoder->base.base.id, encoder- > >base.name); > return -EINVAL; > @@ -4699,7 +4679,7 @@ intel_modeset_pipe_config(struct > intel_atomic_state *state, > if (ret == -EDEADLK) > return ret; > if (ret < 0) { > - drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] > config failure: %d\n", > + drm_dbg_kms(display->drm, "[ENCODER:%d:%s] > config failure: %d\n", > encoder->base.base.id, encoder- > >base.name, ret); > return ret; > } > @@ -4715,7 +4695,7 @@ intel_modeset_pipe_config(struct > intel_atomic_state *state, > if (ret == -EDEADLK) > return ret; > if (ret < 0) { > - drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] config failure: > %d\n", > + drm_dbg_kms(display->drm, "[CRTC:%d:%s] config failure: > %d\n", > crtc->base.base.id, crtc->base.name, ret); > return ret; > } > @@ -4726,7 +4706,7 @@ intel_modeset_pipe_config(struct > intel_atomic_state *state, > */ > crtc_state->dither = (crtc_state->pipe_bpp == 6*3) && > !crtc_state->dither_force_disable; > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] hw max bpp: %i, pipe bpp: %i, dithering: > %i\n", > crtc->base.base.id, crtc->base.name, > base_bpp, crtc_state->pipe_bpp, crtc_state->dither); > @@ -4858,7 +4838,7 @@ pipe_config_infoframe_mismatch(struct > drm_printer *p, bool fastset, > const union hdmi_infoframe *a, > const union hdmi_infoframe *b) > { > - struct drm_i915_private *i915 = to_i915(crtc->base.dev); > + struct intel_display *display = to_intel_display(crtc); > const char *loglevel; > > if (fastset) { > @@ -4873,9 +4853,9 @@ pipe_config_infoframe_mismatch(struct > drm_printer *p, bool fastset, > pipe_config_mismatch(p, fastset, crtc, name, "infoframe"); > > drm_printf(p, "expected:\n"); > - hdmi_infoframe_log(loglevel, i915->drm.dev, a); > + hdmi_infoframe_log(loglevel, display->drm->dev, a); > drm_printf(p, "found:\n"); > - hdmi_infoframe_log(loglevel, i915->drm.dev, b); > + hdmi_infoframe_log(loglevel, display->drm->dev, b); > } > > static void > @@ -4991,16 +4971,15 @@ intel_pipe_config_compare(const struct > intel_crtc_state *current_config, > bool fastset) > { > struct intel_display *display = to_intel_display(current_config); > - struct drm_i915_private *dev_priv = to_i915(current_config- > >uapi.crtc->dev); > struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > struct drm_printer p; > u32 exclude_infoframes = 0; > bool ret = true; > > if (fastset) > - p = drm_dbg_printer(&dev_priv->drm, DRM_UT_KMS, NULL); > + p = drm_dbg_printer(display->drm, DRM_UT_KMS, NULL); > else > - p = drm_err_printer(&dev_priv->drm, NULL); > + p = drm_err_printer(display->drm, NULL); > > #define PIPE_CONF_CHECK_X(name) do { \ > if (current_config->name != pipe_config->name) { \ > @@ -5267,8 +5246,8 @@ intel_pipe_config_compare(const struct > intel_crtc_state *current_config, > > PIPE_CONF_CHECK_I(output_format); > PIPE_CONF_CHECK_BOOL(has_hdmi_sink); > - if ((DISPLAY_VER(dev_priv) < 8 && !IS_HASWELL(dev_priv)) || > - IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > + if ((DISPLAY_VER(display) < 8 && !display->platform.haswell) || > + display->platform.valleyview || display->platform.cherryview) > PIPE_CONF_CHECK_BOOL(limited_color_range); > > PIPE_CONF_CHECK_BOOL(hdmi_scrambling); > @@ -5284,7 +5263,7 @@ intel_pipe_config_compare(const struct > intel_crtc_state *current_config, > > PIPE_CONF_CHECK_X(gmch_pfit.control); > /* pfit ratios are autocomputed by the hw on gen4+ */ > - if (DISPLAY_VER(dev_priv) < 4) > + if (DISPLAY_VER(display) < 4) > PIPE_CONF_CHECK_X(gmch_pfit.pgm_ratios); > PIPE_CONF_CHECK_X(gmch_pfit.lvds_border_bits); > > @@ -5304,7 +5283,7 @@ intel_pipe_config_compare(const struct > intel_crtc_state *current_config, > PIPE_CONF_CHECK_I(pixel_rate); > > PIPE_CONF_CHECK_X(gamma_mode); > - if (IS_CHERRYVIEW(dev_priv)) > + if (display->platform.cherryview) > PIPE_CONF_CHECK_X(cgm_mode); > else > PIPE_CONF_CHECK_X(csc_mode); > @@ -5324,21 +5303,21 @@ intel_pipe_config_compare(const struct > intel_crtc_state *current_config, > > PIPE_CONF_CHECK_BOOL(double_wide); > > - if (dev_priv->display.dpll.mgr) > + if (display->dpll.mgr) > PIPE_CONF_CHECK_P(shared_dpll); > > /* FIXME convert everything over the dpll_mgr */ > - if (dev_priv->display.dpll.mgr || HAS_GMCH(dev_priv)) > + if (display->dpll.mgr || HAS_GMCH(display)) > PIPE_CONF_CHECK_PLL(dpll_hw_state); > > /* FIXME convert MTL+ platforms over to dpll_mgr */ > - if (DISPLAY_VER(dev_priv) >= 14) > + if (DISPLAY_VER(display) >= 14) > PIPE_CONF_CHECK_PLL_CX0(dpll_hw_state.cx0pll); > > PIPE_CONF_CHECK_X(dsi_pll.ctrl); > PIPE_CONF_CHECK_X(dsi_pll.div); > > - if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5) > + if (display->platform.g4x || DISPLAY_VER(display) >= 5) > PIPE_CONF_CHECK_I(pipe_bpp); > > if (!fastset || !pipe_config->update_m_n) { > @@ -5454,11 +5433,11 @@ static int intel_modeset_pipe(struct > intel_atomic_state *state, > struct intel_crtc_state *crtc_state, > const char *reason) > { > - struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > int ret; > > - drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] Full modeset due to > %s\n", > + drm_dbg_kms(display->drm, "[CRTC:%d:%s] Full modeset due to > %s\n", > crtc->base.base.id, crtc->base.name, reason); > > ret = drm_atomic_add_affected_connectors(&state->base, > @@ -5498,10 +5477,10 @@ static int intel_modeset_pipe(struct > intel_atomic_state *state, > int intel_modeset_pipes_in_mask_early(struct intel_atomic_state *state, > const char *reason, u8 mask) > { > - struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > struct intel_crtc *crtc; > > - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, mask) { > + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, mask) { > struct intel_crtc_state *crtc_state; > int ret; > > @@ -5545,10 +5524,10 @@ intel_crtc_flag_modeset(struct intel_crtc_state > *crtc_state) > int intel_modeset_all_pipes_late(struct intel_atomic_state *state, > const char *reason) > { > - struct drm_i915_private *dev_priv = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > struct intel_crtc *crtc; > > - for_each_intel_crtc(&dev_priv->drm, crtc) { > + for_each_intel_crtc(display->drm, crtc) { > struct intel_crtc_state *crtc_state; > int ret; > > @@ -5688,11 +5667,11 @@ u8 intel_calc_active_pipes(struct > intel_atomic_state *state, > > static int intel_modeset_checks(struct intel_atomic_state *state) > { > - struct drm_i915_private *dev_priv = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > > state->modeset = true; > > - if (IS_HASWELL(dev_priv)) > + if (display->platform.haswell) > return hsw_mode_set_planes_workaround(state); > > return 0; > @@ -5709,15 +5688,15 @@ static bool lrr_params_changed(const struct > drm_display_mode *old_adjusted_mode, > static void intel_crtc_check_fastset(const struct intel_crtc_state > *old_crtc_state, > struct intel_crtc_state *new_crtc_state) > { > + struct intel_display *display = to_intel_display(new_crtc_state); > struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > - struct drm_i915_private *i915 = to_i915(crtc->base.dev); > > /* only allow LRR when the timings stay within the VRR range */ > if (old_crtc_state->vrr.in_range != new_crtc_state->vrr.in_range) > new_crtc_state->update_lrr = false; > > if (!intel_pipe_config_compare(old_crtc_state, new_crtc_state, true)) { > - drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] fastset > requirement not met, forcing full modeset\n", > + drm_dbg_kms(display->drm, "[CRTC:%d:%s] fastset > requirement not met, forcing full modeset\n", > crtc->base.base.id, crtc->base.name); > } else { > if (allow_vblank_delay_fastset(old_crtc_state)) > @@ -5741,17 +5720,17 @@ static void intel_crtc_check_fastset(const struct > intel_crtc_state *old_crtc_sta > > static int intel_atomic_check_crtcs(struct intel_atomic_state *state) > { > + struct intel_display *display = to_intel_display(state); > struct intel_crtc_state __maybe_unused *crtc_state; > struct intel_crtc *crtc; > int i; > > for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { > - struct drm_i915_private *i915 = to_i915(crtc->base.dev); > int ret; > > ret = intel_crtc_atomic_check(state, crtc); > if (ret) { > - drm_dbg_atomic(&i915->drm, > + drm_dbg_atomic(display->drm, > "[CRTC:%d:%s] atomic driver check > failed\n", > crtc->base.base.id, crtc->base.name); > return ret; > @@ -5798,7 +5777,7 @@ static bool intel_pipes_need_modeset(struct > intel_atomic_state *state, > static int intel_atomic_check_joiner(struct intel_atomic_state *state, > struct intel_crtc *primary_crtc) > { > - struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > struct intel_crtc_state *primary_crtc_state = > intel_atomic_get_new_crtc_state(state, primary_crtc); > struct intel_crtc *secondary_crtc; > @@ -5807,20 +5786,20 @@ static int intel_atomic_check_joiner(struct > intel_atomic_state *state, > return 0; > > /* sanity check */ > - if (drm_WARN_ON(&i915->drm, > + if (drm_WARN_ON(display->drm, > primary_crtc->pipe != > joiner_primary_pipe(primary_crtc_state))) > return -EINVAL; > > - if (primary_crtc_state->joiner_pipes & ~joiner_pipes(i915)) { > - drm_dbg_kms(&i915->drm, > + if (primary_crtc_state->joiner_pipes & ~joiner_pipes(display)) { > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] Cannot act as joiner primary " > "(need 0x%x as pipes, only 0x%x possible)\n", > primary_crtc->base.base.id, primary_crtc- > >base.name, > - primary_crtc_state->joiner_pipes, > joiner_pipes(i915)); > + primary_crtc_state->joiner_pipes, > joiner_pipes(display)); > return -EINVAL; > } > > - for_each_intel_crtc_in_pipe_mask(&i915->drm, secondary_crtc, > + for_each_intel_crtc_in_pipe_mask(display->drm, secondary_crtc, > > intel_crtc_joiner_secondary_pipes(primary_crtc_state)) { > struct intel_crtc_state *secondary_crtc_state; > int ret; > @@ -5831,7 +5810,7 @@ static int intel_atomic_check_joiner(struct > intel_atomic_state *state, > > /* primary being enabled, secondary was already configured? > */ > if (secondary_crtc_state->uapi.enable) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] secondary is enabled as > normal CRTC, but " > "[CRTC:%d:%s] claiming this CRTC for > joiner.\n", > secondary_crtc->base.base.id, > secondary_crtc->base.name, > @@ -5850,7 +5829,7 @@ static int intel_atomic_check_joiner(struct > intel_atomic_state *state, > drm_crtc_index(&secondary_crtc->base))) > return -EINVAL; > > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] Used as secondary for joiner > primary [CRTC:%d:%s]\n", > secondary_crtc->base.base.id, secondary_crtc- > >base.name, > primary_crtc->base.base.id, primary_crtc- > >base.name); > @@ -5869,12 +5848,12 @@ static int intel_atomic_check_joiner(struct > intel_atomic_state *state, > static void kill_joiner_secondaries(struct intel_atomic_state *state, > struct intel_crtc *primary_crtc) > { > - struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > struct intel_crtc_state *primary_crtc_state = > intel_atomic_get_new_crtc_state(state, primary_crtc); > struct intel_crtc *secondary_crtc; > > - for_each_intel_crtc_in_pipe_mask(&i915->drm, secondary_crtc, > + for_each_intel_crtc_in_pipe_mask(display->drm, secondary_crtc, > > intel_crtc_joiner_secondary_pipes(primary_crtc_state)) { > struct intel_crtc_state *secondary_crtc_state = > intel_atomic_get_new_crtc_state(state, > secondary_crtc); > @@ -5908,7 +5887,7 @@ static void kill_joiner_secondaries(struct > intel_atomic_state *state, > static int intel_async_flip_check_uapi(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > - struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > const struct intel_crtc_state *new_crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > const struct intel_plane_state *old_plane_state; > @@ -5920,14 +5899,14 @@ static int intel_async_flip_check_uapi(struct > intel_atomic_state *state, > return 0; > > if (!new_crtc_state->uapi.active) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] not active\n", > crtc->base.base.id, crtc->base.name); > return -EINVAL; > } > > if (intel_crtc_needs_modeset(new_crtc_state)) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] modeset required\n", > crtc->base.base.id, crtc->base.name); > return -EINVAL; > @@ -5938,7 +5917,7 @@ static int intel_async_flip_check_uapi(struct > intel_atomic_state *state, > * Remove this check once the issues are fixed. > */ > if (new_crtc_state->joiner_pipes) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] async flip disallowed with joiner\n", > crtc->base.base.id, crtc->base.name); > return -EINVAL; > @@ -5957,14 +5936,14 @@ static int intel_async_flip_check_uapi(struct > intel_atomic_state *state, > * enabled in the atomic IOCTL path. > */ > if (!plane->async_flip) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] async flip not > supported\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > } > > if (!old_plane_state->uapi.fb || !new_plane_state->uapi.fb) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] no old or new > framebuffer\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > @@ -5976,7 +5955,7 @@ static int intel_async_flip_check_uapi(struct > intel_atomic_state *state, > > static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct > intel_crtc *crtc) > { > - struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > const struct intel_crtc_state *old_crtc_state, *new_crtc_state; > const struct intel_plane_state *new_plane_state, *old_plane_state; > struct intel_plane *plane; > @@ -5989,21 +5968,21 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > return 0; > > if (!new_crtc_state->hw.active) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] not active\n", > crtc->base.base.id, crtc->base.name); > return -EINVAL; > } > > if (intel_crtc_needs_modeset(new_crtc_state)) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] modeset required\n", > crtc->base.base.id, crtc->base.name); > return -EINVAL; > } > > if (old_crtc_state->active_planes != new_crtc_state->active_planes) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[CRTC:%d:%s] Active planes cannot be in async > flip\n", > crtc->base.base.id, crtc->base.name); > return -EINVAL; > @@ -6019,7 +5998,7 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > * if we're really about to ask the hardware to perform > * an async flip. We should never get this far otherwise. > */ > - if (drm_WARN_ON(&i915->drm, > + if (drm_WARN_ON(display->drm, > new_crtc_state->do_async_flip && !plane- > >async_flip)) > return -EINVAL; > > @@ -6035,7 +6014,7 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > continue; > > if (!intel_plane_can_async_flip(plane, new_plane_state- > >hw.fb->modifier)) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] Modifier 0x%llx does not > support async flip\n", > plane->base.base.id, plane->base.name, > new_plane_state->hw.fb->modifier); > @@ -6044,7 +6023,7 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > > if (intel_format_info_is_yuv_semiplanar(new_plane_state- > >hw.fb->format, > new_plane_state- > >hw.fb->modifier)) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] Planar formats do not > support async flips\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > @@ -6059,7 +6038,7 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > > if (old_plane_state->view.color_plane[0].mapping_stride != > new_plane_state->view.color_plane[0].mapping_stride) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] Stride cannot be changed > in async flip\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > @@ -6067,7 +6046,7 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > > if (old_plane_state->hw.fb->modifier != > new_plane_state->hw.fb->modifier) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] Modifier cannot be > changed in async flip\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > @@ -6075,7 +6054,7 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > > if (old_plane_state->hw.fb->format != > new_plane_state->hw.fb->format) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] Pixel format cannot be > changed in async flip\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > @@ -6083,7 +6062,7 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > > if (old_plane_state->hw.rotation != > new_plane_state->hw.rotation) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] Rotation cannot be > changed in async flip\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > @@ -6091,7 +6070,7 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > > if (skl_plane_aux_dist(old_plane_state, 0) != > skl_plane_aux_dist(new_plane_state, 0)) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] AUX_DIST cannot be > changed in async flip\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > @@ -6099,14 +6078,14 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > > if (!drm_rect_equals(&old_plane_state->uapi.src, > &new_plane_state->uapi.src) || > !drm_rect_equals(&old_plane_state->uapi.dst, > &new_plane_state->uapi.dst)) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] Size/co-ordinates cannot > be changed in async flip\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > } > > if (old_plane_state->hw.alpha != new_plane_state->hw.alpha) > { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANES:%d:%s] Alpha value cannot be > changed in async flip\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > @@ -6114,21 +6093,21 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > > if (old_plane_state->hw.pixel_blend_mode != > new_plane_state->hw.pixel_blend_mode) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] Pixel blend mode cannot > be changed in async flip\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > } > > if (old_plane_state->hw.color_encoding != new_plane_state- > >hw.color_encoding) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] Color encoding cannot be > changed in async flip\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > } > > if (old_plane_state->hw.color_range != new_plane_state- > >hw.color_range) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] Color range cannot be > changed in async flip\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > @@ -6136,7 +6115,7 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > > /* plane decryption is allow to change only in synchronous > flips */ > if (old_plane_state->decrypt != new_plane_state->decrypt) { > - drm_dbg_kms(&i915->drm, > + drm_dbg_kms(display->drm, > "[PLANE:%d:%s] Decryption cannot be > changed in async flip\n", > plane->base.base.id, plane->base.name); > return -EINVAL; > @@ -6148,7 +6127,7 @@ static int intel_async_flip_check_hw(struct > intel_atomic_state *state, struct in > > static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state) > { > - struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > const struct intel_plane_state *plane_state; > struct intel_crtc_state *crtc_state; > struct intel_plane *plane; > @@ -6179,13 +6158,13 @@ static int intel_joiner_add_affected_crtcs(struct > intel_atomic_state *state) > modeset_pipes |= crtc_state->joiner_pipes; > } > > - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, affected_pipes) { > + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, affected_pipes) > { > crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); > if (IS_ERR(crtc_state)) > return PTR_ERR(crtc_state); > } > > - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, modeset_pipes) > { > + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, > modeset_pipes) { > int ret; > > crtc_state = intel_atomic_get_new_crtc_state(state, crtc); > @@ -6215,7 +6194,7 @@ static int intel_atomic_check_config(struct > intel_atomic_state *state, > struct intel_link_bw_limits *limits, > enum pipe *failed_pipe) > { > - struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > struct intel_crtc_state *new_crtc_state; > struct intel_crtc *crtc; > int ret; > @@ -6240,7 +6219,7 @@ static int intel_atomic_check_config(struct > intel_atomic_state *state, > continue; > } > > - if (drm_WARN_ON(&i915->drm, > intel_crtc_is_joiner_secondary(new_crtc_state))) > + if (drm_WARN_ON(display->drm, > intel_crtc_is_joiner_secondary(new_crtc_state))) > continue; > > ret = intel_crtc_prepare_cleared_state(state, crtc); > @@ -6259,7 +6238,7 @@ static int intel_atomic_check_config(struct > intel_atomic_state *state, > if (!intel_crtc_needs_modeset(new_crtc_state)) > continue; > > - if (drm_WARN_ON(&i915->drm, > intel_crtc_is_joiner_secondary(new_crtc_state))) > + if (drm_WARN_ON(display->drm, > intel_crtc_is_joiner_secondary(new_crtc_state))) > continue; > > if (!new_crtc_state->hw.enable) > @@ -6324,7 +6303,6 @@ int intel_atomic_check(struct drm_device *dev, > struct drm_atomic_state *_state) > { > struct intel_display *display = to_intel_display(dev); > - struct drm_i915_private *dev_priv = to_i915(dev); > struct intel_atomic_state *state = to_intel_atomic_state(_state); > struct intel_crtc_state *old_crtc_state, *new_crtc_state; > struct intel_crtc *crtc; > @@ -6372,7 +6350,7 @@ int intel_atomic_check(struct drm_device *dev, > continue; > > if (intel_crtc_is_joiner_secondary(new_crtc_state)) { > - drm_WARN_ON(&dev_priv->drm, new_crtc_state- > >uapi.enable); > + drm_WARN_ON(display->drm, new_crtc_state- > >uapi.enable); > continue; > } > > @@ -6443,7 +6421,7 @@ int intel_atomic_check(struct drm_device *dev, > } > > if (any_ms && !check_digital_port_conflicts(state)) { > - drm_dbg_kms(&dev_priv->drm, > + drm_dbg_kms(display->drm, > "rejecting conflicting digital port configuration\n"); > ret = -EINVAL; > goto fail; > @@ -6499,7 +6477,7 @@ int intel_atomic_check(struct drm_device *dev, > goto fail; > > /* Either full modeset or fastset (or neither), never both */ > - drm_WARN_ON(&dev_priv->drm, > + drm_WARN_ON(display->drm, > intel_crtc_needs_modeset(new_crtc_state) && > intel_crtc_needs_fastset(new_crtc_state)); > > @@ -6559,6 +6537,7 @@ void intel_crtc_arm_fifo_underrun(struct intel_crtc > *crtc, > static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state, > const struct intel_crtc_state *new_crtc_state) > { > + struct intel_display *display = to_intel_display(new_crtc_state); > struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > @@ -6573,7 +6552,7 @@ static void intel_pipe_fastset(const struct > intel_crtc_state *old_crtc_state, > intel_set_pipe_src_size(new_crtc_state); > > /* on skylake this is done by detaching scalers */ > - if (DISPLAY_VER(dev_priv) >= 9) { > + if (DISPLAY_VER(display) >= 9) { > if (new_crtc_state->pch_pfit.enabled) > skl_pfit_enable(new_crtc_state); > } else if (HAS_PCH_SPLIT(dev_priv)) { > @@ -6591,8 +6570,8 @@ static void intel_pipe_fastset(const struct > intel_crtc_state *old_crtc_state, > * HSW/BDW only really need this here for fastboot, after > * that the value should not change without a full modeset. > */ > - if (DISPLAY_VER(dev_priv) >= 9 || > - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) > + if (DISPLAY_VER(display) >= 9 || > + display->platform.broadwell || display->platform.haswell) > hsw_set_linetime_wm(new_crtc_state); > > if (new_crtc_state->update_m_n) > @@ -6606,14 +6585,14 @@ static void intel_pipe_fastset(const struct > intel_crtc_state *old_crtc_state, > static void commit_pipe_pre_planes(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > - struct drm_i915_private *dev_priv = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > const struct intel_crtc_state *old_crtc_state = > intel_atomic_get_old_crtc_state(state, crtc); > const struct intel_crtc_state *new_crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > bool modeset = intel_crtc_needs_modeset(new_crtc_state); > > - drm_WARN_ON(&dev_priv->drm, new_crtc_state->use_dsb); > + drm_WARN_ON(display->drm, new_crtc_state->use_dsb); > > /* > * During modesets pipe configuration was programmed as the > @@ -6623,7 +6602,7 @@ static void commit_pipe_pre_planes(struct > intel_atomic_state *state, > if (intel_crtc_needs_color_update(new_crtc_state)) > intel_color_commit_arm(NULL, new_crtc_state); > > - if (DISPLAY_VER(dev_priv) >= 9 || IS_BROADWELL(dev_priv)) > + if (DISPLAY_VER(display) >= 9 || display->platform.broadwell) > bdw_set_pipe_misc(NULL, new_crtc_state); > > if (intel_crtc_needs_fastset(new_crtc_state)) > @@ -6638,18 +6617,18 @@ static void commit_pipe_pre_planes(struct > intel_atomic_state *state, > static void commit_pipe_post_planes(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > - struct drm_i915_private *dev_priv = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > const struct intel_crtc_state *new_crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > > - drm_WARN_ON(&dev_priv->drm, new_crtc_state->use_dsb); > + drm_WARN_ON(display->drm, new_crtc_state->use_dsb); > > /* > * Disable the scaler(s) after the plane(s) so that we don't > * get a catastrophic underrun even if the two operations > * end up happening in two different frames. > */ > - if (DISPLAY_VER(dev_priv) >= 9 && > + if (DISPLAY_VER(display) >= 9 && > !intel_crtc_needs_modeset(new_crtc_state)) > skl_detach_scalers(NULL, new_crtc_state); > > @@ -6660,7 +6639,7 @@ static void commit_pipe_post_planes(struct > intel_atomic_state *state, > static void intel_enable_crtc(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > - struct drm_i915_private *dev_priv = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > const struct intel_crtc_state *new_crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > struct intel_crtc *pipe_crtc; > @@ -6668,7 +6647,7 @@ static void intel_enable_crtc(struct > intel_atomic_state *state, > if (!intel_crtc_needs_modeset(new_crtc_state)) > return; > > - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, > pipe_crtc, > + for_each_intel_crtc_in_pipe_mask_reverse(display->drm, pipe_crtc, > > intel_crtc_joined_pipe_mask(new_crtc_state)) { > const struct intel_crtc_state *pipe_crtc_state = > intel_atomic_get_new_crtc_state(state, pipe_crtc); > @@ -6677,7 +6656,7 @@ static void intel_enable_crtc(struct > intel_atomic_state *state, > intel_crtc_update_active_timings(pipe_crtc_state, false); > } > > - dev_priv->display.funcs.display->crtc_enable(state, crtc); > + display->funcs.display->crtc_enable(state, crtc); > > /* vblanks work again, re-enable pipe CRC. */ > intel_crtc_enable_pipe_crc(crtc); > @@ -6687,7 +6666,6 @@ static void intel_pre_update_crtc(struct > intel_atomic_state *state, > struct intel_crtc *crtc) > { > struct intel_display *display = to_intel_display(state); > - struct drm_i915_private *i915 = to_i915(state->base.dev); > const struct intel_crtc_state *old_crtc_state = > intel_atomic_get_old_crtc_state(state, crtc); > struct intel_crtc_state *new_crtc_state = > @@ -6696,7 +6674,7 @@ static void intel_pre_update_crtc(struct > intel_atomic_state *state, > > if (old_crtc_state->inherited || > intel_crtc_needs_modeset(new_crtc_state)) { > - if (HAS_DPT(i915)) > + if (HAS_DPT(display)) > intel_dpt_configure(crtc); > } > > @@ -6710,7 +6688,7 @@ static void intel_pre_update_crtc(struct > intel_atomic_state *state, > if (intel_crtc_needs_fastset(new_crtc_state)) > intel_encoders_update_pipe(state, crtc); > > - if (DISPLAY_VER(i915) >= 11 && > + if (DISPLAY_VER(display) >= 11 && > intel_crtc_needs_fastset(new_crtc_state)) > icl_set_pipe_chicken(new_crtc_state); > > @@ -6784,7 +6762,7 @@ static void intel_update_crtc(struct > intel_atomic_state *state, > static void intel_old_crtc_state_disables(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > - struct drm_i915_private *dev_priv = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > const struct intel_crtc_state *old_crtc_state = > intel_atomic_get_old_crtc_state(state, crtc); > struct intel_crtc *pipe_crtc; > @@ -6793,13 +6771,13 @@ static void intel_old_crtc_state_disables(struct > intel_atomic_state *state, > * We need to disable pipe CRC before disabling the pipe, > * or we race against vblank off. > */ > - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, > + for_each_intel_crtc_in_pipe_mask(display->drm, pipe_crtc, > > intel_crtc_joined_pipe_mask(old_crtc_state)) > intel_crtc_disable_pipe_crc(pipe_crtc); > > - dev_priv->display.funcs.display->crtc_disable(state, crtc); > + display->funcs.display->crtc_disable(state, crtc); > > - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, > + for_each_intel_crtc_in_pipe_mask(display->drm, pipe_crtc, > > intel_crtc_joined_pipe_mask(old_crtc_state)) { > const struct intel_crtc_state *new_pipe_crtc_state = > intel_atomic_get_new_crtc_state(state, pipe_crtc); > @@ -6814,7 +6792,7 @@ static void intel_old_crtc_state_disables(struct > intel_atomic_state *state, > > static void intel_commit_modeset_disables(struct intel_atomic_state *state) > { > - struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > const struct intel_crtc_state *new_crtc_state, *old_crtc_state; > struct intel_crtc *crtc; > u8 disable_pipes = 0; > @@ -6881,7 +6859,7 @@ static void intel_commit_modeset_disables(struct > intel_atomic_state *state) > disable_pipes &= > ~intel_crtc_joined_pipe_mask(old_crtc_state); > } > > - drm_WARN_ON(&i915->drm, disable_pipes); > + drm_WARN_ON(display->drm, disable_pipes); > } > > static void intel_commit_modeset_enables(struct intel_atomic_state *state) > @@ -6908,7 +6886,7 @@ static void intel_commit_modeset_enables(struct > intel_atomic_state *state) > > static void skl_commit_modeset_enables(struct intel_atomic_state *state) > { > - struct drm_i915_private *dev_priv = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > struct intel_crtc *crtc; > struct intel_crtc_state *old_crtc_state, *new_crtc_state; > struct skl_ddb_entry entries[I915_MAX_PIPES] = {}; > @@ -7050,8 +7028,9 @@ static void skl_commit_modeset_enables(struct > intel_atomic_state *state) > if ((update_pipes & BIT(pipe)) == 0) > continue; > > - drm_WARN_ON(&dev_priv->drm, > skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb, > - > entries, I915_MAX_PIPES, pipe)); > + drm_WARN_ON(display->drm, > + skl_ddb_allocation_overlaps(&new_crtc_state- > >wm.skl.ddb, > + entries, > I915_MAX_PIPES, pipe)); > > entries[pipe] = new_crtc_state->wm.skl.ddb; > update_pipes &= ~BIT(pipe); > @@ -7059,8 +7038,8 @@ static void skl_commit_modeset_enables(struct > intel_atomic_state *state) > intel_update_crtc(state, crtc); > } > > - drm_WARN_ON(&dev_priv->drm, modeset_pipes); > - drm_WARN_ON(&dev_priv->drm, update_pipes); > + drm_WARN_ON(display->drm, modeset_pipes); > + drm_WARN_ON(display->drm, update_pipes); > } > > static void intel_atomic_commit_fence_wait(struct intel_atomic_state > *intel_state) > @@ -7105,7 +7084,7 @@ static void intel_atomic_cleanup_work(struct > work_struct *work) > { > struct intel_atomic_state *state = > container_of(work, struct intel_atomic_state, cleanup_work); > - struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > struct intel_crtc_state *old_crtc_state; > struct intel_crtc *crtc; > int i; > @@ -7113,14 +7092,14 @@ static void intel_atomic_cleanup_work(struct > work_struct *work) > for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) > intel_atomic_dsb_cleanup(old_crtc_state); > > - drm_atomic_helper_cleanup_planes(&i915->drm, &state->base); > + drm_atomic_helper_cleanup_planes(display->drm, &state->base); > drm_atomic_helper_commit_cleanup_done(&state->base); > drm_atomic_state_put(&state->base); > } > > static void intel_atomic_prepare_plane_clear_colors(struct intel_atomic_state > *state) > { > - struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_display *display = to_intel_display(state); > struct intel_plane *plane; > struct intel_plane_state *plane_state; > int i; > @@ -7157,7 +7136,7 @@ static void > intel_atomic_prepare_plane_clear_colors(struct intel_atomic_state *s > &plane_state->ccval, > sizeof(plane_state->ccval)); > /* The above could only fail if the FB obj has an unexpected > backing store type. */ > - drm_WARN_ON(&i915->drm, ret); > + drm_WARN_ON(display->drm, ret); > } > } > > @@ -7258,8 +7237,7 @@ static void intel_atomic_dsb_finish(struct > intel_atomic_state *state, > static void intel_atomic_commit_tail(struct intel_atomic_state *state) > { > struct intel_display *display = to_intel_display(state); > - struct drm_device *dev = state->base.dev; > - struct drm_i915_private *dev_priv = to_i915(dev); > + struct drm_i915_private *dev_priv = to_i915(display->drm); > struct intel_crtc_state *new_crtc_state, *old_crtc_state; > struct intel_crtc *crtc; > struct intel_power_domain_mask put_domains[I915_MAX_PIPES] = > {}; > @@ -7338,7 +7316,7 @@ static void intel_atomic_commit_tail(struct > intel_atomic_state *state) > intel_pmdemand_pre_plane_update(state); > > if (state->modeset) { > - drm_atomic_helper_update_legacy_modeset_state(dev, > &state->base); > + drm_atomic_helper_update_legacy_modeset_state(display- > >drm, &state->base); > > intel_set_cdclk_pre_plane_update(state); > > @@ -7353,10 +7331,10 @@ static void intel_atomic_commit_tail(struct > intel_atomic_state *state) > > /* Complete events for now disable pipes here. */ > if (modeset && !new_crtc_state->hw.active && > new_crtc_state->uapi.event) { > - spin_lock_irq(&dev->event_lock); > + spin_lock_irq(&display->drm->event_lock); > drm_crtc_send_vblank_event(&crtc->base, > new_crtc_state- > >uapi.event); > - spin_unlock_irq(&dev->event_lock); > + spin_unlock_irq(&display->drm->event_lock); > > new_crtc_state->uapi.event = NULL; > } > @@ -7372,7 +7350,7 @@ static void intel_atomic_commit_tail(struct > intel_atomic_state *state) > } > > /* Now enable the clocks, plane, pipe, and connectors that we set up. > */ > - dev_priv->display.funcs.display->commit_modeset_enables(state); > + display->funcs.display->commit_modeset_enables(state); > > intel_program_dpkgc_latency(state); > > @@ -7390,7 +7368,7 @@ static void intel_atomic_commit_tail(struct > intel_atomic_state *state) > * - switch over to the vblank wait helper in the core after that since > * we don't need out special handling any more. > */ > - drm_atomic_helper_wait_for_flip_done(dev, &state->base); > + drm_atomic_helper_wait_for_flip_done(display->drm, &state->base); > > for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { > if (new_crtc_state->do_async_flip) > @@ -7419,7 +7397,7 @@ static void intel_atomic_commit_tail(struct > intel_atomic_state *state) > * chance of catching underruns with the intermediate > watermarks > * vs. the new plane configuration. > */ > - if (DISPLAY_VER(dev_priv) == 2 && > planes_enabling(old_crtc_state, new_crtc_state)) > + if (DISPLAY_VER(display) == 2 && > planes_enabling(old_crtc_state, new_crtc_state)) > intel_set_cpu_fifo_underrun_reporting(display, crtc- > >pipe, true); > > intel_optimize_watermarks(state, crtc); > @@ -7485,7 +7463,7 @@ static void intel_atomic_commit_tail(struct > intel_atomic_state *state) > * down. > */ > INIT_WORK(&state->cleanup_work, intel_atomic_cleanup_work); > - queue_work(dev_priv->display.wq.cleanup, &state->cleanup_work); > + queue_work(display->wq.cleanup, &state->cleanup_work); > } > > static void intel_atomic_commit_work(struct work_struct *work) > @@ -7544,6 +7522,7 @@ static int intel_atomic_swap_state(struct > intel_atomic_state *state) > int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state > *_state, > bool nonblock) > { > + struct intel_display *display = to_intel_display(dev); > struct intel_atomic_state *state = to_intel_atomic_state(_state); > struct drm_i915_private *dev_priv = to_i915(dev); > int ret = 0; > @@ -7567,7 +7546,7 @@ int intel_atomic_commit(struct drm_device *dev, > struct drm_atomic_state *_state, > * FIXME doing watermarks and fb cleanup from a vblank worker > * (assuming we had any) would solve these problems. > */ > - if (DISPLAY_VER(dev_priv) < 9 && state->base.legacy_cursor_update) > { > + if (DISPLAY_VER(display) < 9 && state->base.legacy_cursor_update) { > struct intel_crtc_state *new_crtc_state; > struct intel_crtc *crtc; > int i; > @@ -7580,7 +7559,7 @@ int intel_atomic_commit(struct drm_device *dev, > struct drm_atomic_state *_state, > > ret = intel_atomic_prepare_commit(state); > if (ret) { > - drm_dbg_atomic(&dev_priv->drm, > + drm_dbg_atomic(display->drm, > "Preparing state failed with %i\n", ret); > intel_runtime_pm_put(&dev_priv->runtime_pm, state- > >wakeref); > return ret; > @@ -7600,12 +7579,12 @@ int intel_atomic_commit(struct drm_device *dev, > struct drm_atomic_state *_state, > INIT_WORK(&state->base.commit_work, > intel_atomic_commit_work); > > if (nonblock && state->modeset) { > - queue_work(dev_priv->display.wq.modeset, &state- > >base.commit_work); > + queue_work(display->wq.modeset, &state- > >base.commit_work); > } else if (nonblock) { > - queue_work(dev_priv->display.wq.flip, &state- > >base.commit_work); > + queue_work(display->wq.flip, &state->base.commit_work); > } else { > if (state->modeset) > - flush_workqueue(dev_priv->display.wq.modeset); > + flush_workqueue(display->wq.modeset); > intel_atomic_commit_tail(state); > } > > @@ -7614,11 +7593,11 @@ int intel_atomic_commit(struct drm_device *dev, > struct drm_atomic_state *_state, > > static u32 intel_encoder_possible_clones(struct intel_encoder *encoder) > { > - struct drm_device *dev = encoder->base.dev; > + struct intel_display *display = to_intel_display(encoder); > struct intel_encoder *source_encoder; > u32 possible_clones = 0; > > - for_each_intel_encoder(dev, source_encoder) { > + for_each_intel_encoder(display->drm, source_encoder) { > if (encoders_cloneable(encoder, source_encoder)) > possible_clones |= > drm_encoder_mask(&source_encoder->base); > } > @@ -7628,11 +7607,11 @@ static u32 intel_encoder_possible_clones(struct > intel_encoder *encoder) > > static u32 intel_encoder_possible_crtcs(struct intel_encoder *encoder) > { > - struct drm_device *dev = encoder->base.dev; > + struct intel_display *display = to_intel_display(encoder); > struct intel_crtc *crtc; > u32 possible_crtcs = 0; > > - for_each_intel_crtc_in_pipe_mask(dev, crtc, encoder->pipe_mask) > + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, encoder- > >pipe_mask) > possible_crtcs |= drm_crtc_mask(&crtc->base); > > return possible_crtcs; > @@ -7852,9 +7831,8 @@ void intel_setup_outputs(struct intel_display > *display) > drm_helper_move_panel_connectors_to_head(display->drm); > } > > -static int max_dotclock(struct drm_i915_private *i915) > +static int max_dotclock(struct intel_display *display) > { > - struct intel_display *display = &i915->display; > int max_dotclock = display->cdclk.max_dotclk_freq; > > if (HAS_ULTRAJOINER(display)) > @@ -7868,7 +7846,7 @@ static int max_dotclock(struct drm_i915_private > *i915) > enum drm_mode_status intel_mode_valid(struct drm_device *dev, > const struct drm_display_mode *mode) > { > - struct drm_i915_private *dev_priv = to_i915(dev); > + struct intel_display *display = to_intel_display(dev); > int hdisplay_max, htotal_max; > int vdisplay_max, vtotal_max; > > @@ -7905,22 +7883,22 @@ enum drm_mode_status intel_mode_valid(struct > drm_device *dev, > * Reject clearly excessive dotclocks early to > * avoid having to worry about huge integers later. > */ > - if (mode->clock > max_dotclock(dev_priv)) > + if (mode->clock > max_dotclock(display)) > return MODE_CLOCK_HIGH; > > /* Transcoder timing limits */ > - if (DISPLAY_VER(dev_priv) >= 11) { > + if (DISPLAY_VER(display) >= 11) { > hdisplay_max = 16384; > vdisplay_max = 8192; > htotal_max = 16384; > vtotal_max = 8192; > - } else if (DISPLAY_VER(dev_priv) >= 9 || > - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { > + } else if (DISPLAY_VER(display) >= 9 || > + display->platform.broadwell || display->platform.haswell) { > hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */ > vdisplay_max = 4096; > htotal_max = 8192; > vtotal_max = 8192; > - } else if (DISPLAY_VER(dev_priv) >= 3) { > + } else if (DISPLAY_VER(display) >= 3) { > hdisplay_max = 4096; > vdisplay_max = 4096; > htotal_max = 8192; > diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.h > b/drivers/gpu/drm/i915/display/vlv_dsi_pll.h > index a032cc2a2524..f975660fa609 100644 > --- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.h > +++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.h > @@ -23,7 +23,6 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, > struct intel_crtc_state *config); > void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); > > -bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); > int bxt_dsi_pll_compute(struct intel_encoder *encoder, > struct intel_crtc_state *config); > void bxt_dsi_pll_enable(struct intel_encoder *encoder, > @@ -34,9 +33,14 @@ u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, > void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); > > #ifdef I915 > +bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); > void assert_dsi_pll_enabled(struct intel_display *display); > void assert_dsi_pll_disabled(struct intel_display *display); > #else > +static inline bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv) > +{ > + return false; > +} > static inline void assert_dsi_pll_enabled(struct intel_display *display) > { > } > diff --git a/drivers/gpu/drm/i915/i915_reg.h > b/drivers/gpu/drm/i915/i915_reg.h > index 8084debd28a2..c5064eebe063 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -4165,8 +4165,8 @@ enum skl_power_gate { > _MMIO_PIPE(pipe, _PIPE_FLIPDONETMSTMP_A, > _PIPE_FLIPDONETMSTMP_B) > > #define _VLV_PIPE_MSA_MISC_A 0x70048 > -#define VLV_PIPE_MSA_MISC(pipe) \ > - _MMIO_PIPE2(dev_priv, pipe, > _VLV_PIPE_MSA_MISC_A) > +#define VLV_PIPE_MSA_MISC(__display, pipe) \ > + _MMIO_PIPE2(__display, pipe, _VLV_PIPE_MSA_MISC_A) > #define VLV_MSA_MISC1_HW_ENABLE REG_BIT(31) > #define VLV_MSA_MISC1_SW_S3D_MASK > REG_GENMASK(2, 0) /* MSA MISC1 3:1 */ > LGTM, Reviewed-by: Nemesa Garg <nemesa.garg@intel.com> > -- > 2.39.5 ^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ CI.Patch_applied: success for drm/i915/display: convert intel_display.[ch] to struct intel_display 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula ` (4 preceding siblings ...) 2025-03-04 10:27 ` [PATCH 5/5] drm/i915/display: convert intel_display.c to struct intel_display Jani Nikula @ 2025-03-04 11:17 ` Patchwork 2025-03-04 11:18 ` ✗ CI.checkpatch: warning " Patchwork ` (6 subsequent siblings) 12 siblings, 0 replies; 20+ messages in thread From: Patchwork @ 2025-03-04 11:17 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-xe == Series Details == Series: drm/i915/display: convert intel_display.[ch] to struct intel_display URL : https://patchwork.freedesktop.org/series/145758/ State : success == Summary == === Applying kernel patches on branch 'drm-tip' with base: === Base commit: 1cf56e26a932 drm-tip: 2025y-03m-04d-00h-06m-47s UTC integration manifest === git am output follows === Applying: drm/i915/display: convert various port/phy helpers to struct intel_display Applying: drm/i915/display: convert some intel_display.[ch] functions to struct intel_display Applying: drm/i915/display: convert intel_has_pending_fb_unpin() to struct intel_display Applying: drm/i915/display: remove dupe intel_update_watermarks() declaration Applying: drm/i915/display: convert intel_display.c to struct intel_display ^ permalink raw reply [flat|nested] 20+ messages in thread
* ✗ CI.checkpatch: warning for drm/i915/display: convert intel_display.[ch] to struct intel_display 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula ` (5 preceding siblings ...) 2025-03-04 11:17 ` ✓ CI.Patch_applied: success for drm/i915/display: convert intel_display.[ch] " Patchwork @ 2025-03-04 11:18 ` Patchwork 2025-03-04 11:19 ` ✓ CI.KUnit: success " Patchwork ` (5 subsequent siblings) 12 siblings, 0 replies; 20+ messages in thread From: Patchwork @ 2025-03-04 11:18 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-xe == Series Details == Series: drm/i915/display: convert intel_display.[ch] to struct intel_display URL : https://patchwork.freedesktop.org/series/145758/ State : warning == Summary == + KERNEL=/kernel + git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt Cloning into 'mt'... warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/ + git -C mt rev-list -n1 origin/master 22f9cda3436b4fe965b5c5f31d2f2c1bcb483189 + cd /kernel + git config --global --add safe.directory /kernel + git log -n1 commit 122df7c820fffe22a84c76f3694f5f9ca6044049 Author: Jani Nikula <jani.nikula@intel.com> Date: Tue Mar 4 12:27:34 2025 +0200 drm/i915/display: convert intel_display.c to struct intel_display Going forward, struct intel_display is the main display device data pointer. Convert as much as possible of intel_display.c to struct intel_display. This exposes a couple of outside issues that need to be fixed as well, in a register macro and a DSI PLL stub. Signed-off-by: Jani Nikula <jani.nikula@intel.com> + /mt/dim checkpatch 1cf56e26a93292ca26fbf891368b75a67e8700dc drm-intel 0911149bdc16 drm/i915/display: convert various port/phy helpers to struct intel_display 6630c36ce754 drm/i915/display: convert some intel_display.[ch] functions to struct intel_display -:90: CHECK:CAMELCASE: Avoid CamelCase: <ILK_eDP_A_DISABLE> #90: FILE: drivers/gpu/drm/i915/display/intel_display.c:7649: + if (display->platform.ironlake && (intel_de_read(display, FUSE_STRAP) & ILK_eDP_A_DISABLE)) total: 0 errors, 0 warnings, 1 checks, 421 lines checked c9a779693ea7 drm/i915/display: convert intel_has_pending_fb_unpin() to struct intel_display a58c920be408 drm/i915/display: remove dupe intel_update_watermarks() declaration 122df7c820ff drm/i915/display: convert intel_display.c to struct intel_display -:948: WARNING:LONG_LINE: line length of 104 exceeds 100 columns #948: FILE: drivers/gpu/drm/i915/display/intel_display.c:2801: + TRANSCONF(display, cpu_transcoder)) & TRANSCONF_INTERLACE_MASK_HSW; total: 0 errors, 1 warnings, 0 checks, 2718 lines checked ^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ CI.KUnit: success for drm/i915/display: convert intel_display.[ch] to struct intel_display 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula ` (6 preceding siblings ...) 2025-03-04 11:18 ` ✗ CI.checkpatch: warning " Patchwork @ 2025-03-04 11:19 ` Patchwork 2025-03-04 11:35 ` ✓ CI.Build: " Patchwork ` (4 subsequent siblings) 12 siblings, 0 replies; 20+ messages in thread From: Patchwork @ 2025-03-04 11:19 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-xe == Series Details == Series: drm/i915/display: convert intel_display.[ch] to struct intel_display URL : https://patchwork.freedesktop.org/series/145758/ State : success == Summary == + trap cleanup EXIT + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [11:18:03] Configuring KUnit Kernel ... Generating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [11:18:08] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json ARCH=um O=.kunit --jobs=48 ../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes] 156 | u64 ioread64_lo_hi(const void __iomem *addr) | ^~~~~~~~~~~~~~ ../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes] 163 | u64 ioread64_hi_lo(const void __iomem *addr) | ^~~~~~~~~~~~~~ ../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes] 170 | u64 ioread64be_lo_hi(const void __iomem *addr) | ^~~~~~~~~~~~~~~~ ../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes] 178 | u64 ioread64be_hi_lo(const void __iomem *addr) | ^~~~~~~~~~~~~~~~ ../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes] 264 | void iowrite64_lo_hi(u64 val, void __iomem *addr) | ^~~~~~~~~~~~~~~ ../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes] 272 | void iowrite64_hi_lo(u64 val, void __iomem *addr) | ^~~~~~~~~~~~~~~ ../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes] 280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr) | ^~~~~~~~~~~~~~~~~ ../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes] 288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr) | ^~~~~~~~~~~~~~~~~ [11:18:34] Starting KUnit Kernel (1/1)... [11:18:34] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [11:18:34] ================== guc_buf (11 subtests) =================== [11:18:34] [PASSED] test_smallest [11:18:34] [PASSED] test_largest [11:18:34] [PASSED] test_granular [11:18:34] [PASSED] test_unique [11:18:34] [PASSED] test_overlap [11:18:34] [PASSED] test_reusable [11:18:34] [PASSED] test_too_big [11:18:34] [PASSED] test_flush [11:18:34] [PASSED] test_lookup [11:18:34] [PASSED] test_data [11:18:34] [PASSED] test_class [11:18:34] ===================== [PASSED] guc_buf ===================== [11:18:34] =================== guc_dbm (7 subtests) =================== [11:18:34] [PASSED] test_empty [11:18:34] [PASSED] test_default [11:18:34] ======================== test_size ======================== [11:18:34] [PASSED] 4 [11:18:34] [PASSED] 8 [11:18:34] [PASSED] 32 [11:18:34] [PASSED] 256 [11:18:34] ==================== [PASSED] test_size ==================== [11:18:34] ======================= test_reuse ======================== [11:18:34] [PASSED] 4 [11:18:34] [PASSED] 8 [11:18:34] [PASSED] 32 [11:18:34] [PASSED] 256 [11:18:34] =================== [PASSED] test_reuse ==================== [11:18:34] =================== test_range_overlap ==================== [11:18:34] [PASSED] 4 [11:18:34] [PASSED] 8 [11:18:34] [PASSED] 32 [11:18:34] [PASSED] 256 [11:18:34] =============== [PASSED] test_range_overlap ================ [11:18:34] =================== test_range_compact ==================== [11:18:34] [PASSED] 4 [11:18:34] [PASSED] 8 [11:18:34] [PASSED] 32 [11:18:34] [PASSED] 256 [11:18:34] =============== [PASSED] test_range_compact ================ [11:18:34] ==================== test_range_spare ===================== [11:18:34] [PASSED] 4 [11:18:34] [PASSED] 8 [11:18:34] [PASSED] 32 [11:18:34] [PASSED] 256 [11:18:34] ================ [PASSED] test_range_spare ================= [11:18:34] ===================== [PASSED] guc_dbm ===================== [11:18:34] =================== guc_idm (6 subtests) =================== [11:18:34] [PASSED] bad_init [11:18:34] [PASSED] no_init [11:18:34] [PASSED] init_fini [11:18:34] [PASSED] check_used [11:18:34] [PASSED] check_quota [11:18:34] [PASSED] check_all [11:18:34] ===================== [PASSED] guc_idm ===================== [11:18:34] ================== no_relay (3 subtests) =================== [11:18:34] [PASSED] xe_drops_guc2pf_if_not_ready [11:18:34] [PASSED] xe_drops_guc2vf_if_not_ready [11:18:34] [PASSED] xe_rejects_send_if_not_ready [11:18:34] ==================== [PASSED] no_relay ===================== [11:18:34] ================== pf_relay (14 subtests) ================== [11:18:34] [PASSED] pf_rejects_guc2pf_too_short [11:18:34] [PASSED] pf_rejects_guc2pf_too_long [11:18:34] [PASSED] pf_rejects_guc2pf_no_payload [11:18:34] [PASSED] pf_fails_no_payload [11:18:34] [PASSED] pf_fails_bad_origin [11:18:34] [PASSED] pf_fails_bad_type [11:18:34] [PASSED] pf_txn_reports_error [11:18:34] [PASSED] pf_txn_sends_pf2guc [11:18:34] [PASSED] pf_sends_pf2guc [11:18:34] [SKIPPED] pf_loopback_nop [11:18:34] [SKIPPED] pf_loopback_echo [11:18:34] [SKIPPED] pf_loopback_fail [11:18:34] [SKIPPED] pf_loopback_busy [11:18:34] [SKIPPED] pf_loopback_retry [11:18:34] ==================== [PASSED] pf_relay ===================== [11:18:34] ================== vf_relay (3 subtests) =================== [11:18:34] [PASSED] vf_rejects_guc2vf_too_short [11:18:34] [PASSED] vf_rejects_guc2vf_too_long [11:18:34] [PASSED] vf_rejects_guc2vf_no_payload [11:18:34] ==================== [PASSED] vf_relay ===================== [11:18:34] ================= pf_service (11 subtests) ================= [11:18:34] [PASSED] pf_negotiate_any [11:18:34] [PASSED] pf_negotiate_base_match [11:18:34] [PASSED] pf_negotiate_base_newer [11:18:34] [PASSED] pf_negotiate_base_next [11:18:34] [SKIPPED] pf_negotiate_base_older [11:18:34] [PASSED] pf_negotiate_base_prev [11:18:34] [PASSED] pf_negotiate_latest_match [11:18:34] [PASSED] pf_negotiate_latest_newer [11:18:34] [PASSED] pf_negotiate_latest_next [11:18:34] [SKIPPED] pf_negotiate_latest_older [11:18:34] [SKIPPED] pf_negotiate_latest_prev [11:18:34] =================== [PASSED] pf_service ==================== [11:18:34] ===================== lmtt (1 subtest) ===================== [11:18:34] ======================== test_ops ========================= [11:18:34] [PASSED] 2-level [11:18:34] [PASSED] multi-level [11:18:34] ==================== [PASSED] test_ops ===================== [11:18:34] ====================== [PASSED] lmtt ======================= [11:18:34] =================== xe_mocs (2 subtests) =================== [11:18:34] ================ xe_live_mocs_kernel_kunit ================ [11:18:34] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [11:18:34] ================ xe_live_mocs_reset_kunit ================= [11:18:34] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [11:18:34] ==================== [SKIPPED] xe_mocs ===================== [11:18:34] ================= xe_migrate (2 subtests) ================== [11:18:34] ================= xe_migrate_sanity_kunit ================= [11:18:34] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [11:18:34] ================== xe_validate_ccs_kunit ================== [11:18:34] ============= [SKIPPED] xe_validate_ccs_kunit ============== [11:18:34] =================== [SKIPPED] xe_migrate =================== [11:18:34] ================== xe_dma_buf (1 subtest) ================== [11:18:34] ==================== xe_dma_buf_kunit ===================== [11:18:34] ================ [SKIPPED] xe_dma_buf_kunit ================ [11:18:34] =================== [SKIPPED] xe_dma_buf =================== [11:18:34] ================= xe_bo_shrink (1 subtest) ================= [11:18:34] =================== xe_bo_shrink_kunit ==================== [11:18:34] =============== [SKIPPED] xe_bo_shrink_kunit =============== [11:18:34] ================== [SKIPPED] xe_bo_shrink ================== [11:18:34] ==================== xe_bo (2 subtests) ==================== [11:18:34] ================== xe_ccs_migrate_kunit =================== [11:18:34] ============== [SKIPPED] xe_ccs_migrate_kunit ============== stty: 'standard input': Inappropriate ioctl for device [11:18:34] ==================== xe_bo_evict_kunit ==================== [11:18:34] =============== [SKIPPED] xe_bo_evict_kunit ================ [11:18:34] ===================== [SKIPPED] xe_bo ====================== [11:18:34] ==================== args (11 subtests) ==================== [11:18:34] [PASSED] count_args_test [11:18:34] [PASSED] call_args_example [11:18:34] [PASSED] call_args_test [11:18:34] [PASSED] drop_first_arg_example [11:18:34] [PASSED] drop_first_arg_test [11:18:34] [PASSED] first_arg_example [11:18:34] [PASSED] first_arg_test [11:18:34] [PASSED] last_arg_example [11:18:34] [PASSED] last_arg_test [11:18:34] [PASSED] pick_arg_example [11:18:34] [PASSED] sep_comma_example [11:18:34] ====================== [PASSED] args ======================= [11:18:34] =================== xe_pci (2 subtests) ==================== [11:18:34] [PASSED] xe_gmdid_graphics_ip [11:18:34] [PASSED] xe_gmdid_media_ip [11:18:34] ===================== [PASSED] xe_pci ====================== [11:18:34] =================== xe_rtp (2 subtests) ==================== [11:18:34] =============== xe_rtp_process_to_sr_tests ================ [11:18:34] [PASSED] coalesce-same-reg [11:18:34] [PASSED] no-match-no-add [11:18:34] [PASSED] match-or [11:18:34] [PASSED] match-or-xfail [11:18:34] [PASSED] no-match-no-add-multiple-rules [11:18:34] [PASSED] two-regs-two-entries [11:18:34] [PASSED] clr-one-set-other [11:18:34] [PASSED] set-field [11:18:34] [PASSED] conflict-duplicate [11:18:34] [PASSED] conflict-not-disjoint [11:18:34] [PASSED] conflict-reg-type [11:18:34] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [11:18:34] ================== xe_rtp_process_tests =================== [11:18:34] [PASSED] active1 [11:18:34] [PASSED] active2 [11:18:34] [PASSED] active-inactive [11:18:34] [PASSED] inactive-active [11:18:34] [PASSED] inactive-1st_or_active-inactive [11:18:34] [PASSED] inactive-2nd_or_active-inactive [11:18:34] [PASSED] inactive-last_or_active-inactive [11:18:34] [PASSED] inactive-no_or_active-inactive [11:18:34] ============== [PASSED] xe_rtp_process_tests =============== [11:18:34] ===================== [PASSED] xe_rtp ====================== [11:18:34] ==================== xe_wa (1 subtest) ===================== [11:18:34] ======================== xe_wa_gt ========================= [11:18:34] [PASSED] TIGERLAKE (B0) [11:18:34] [PASSED] DG1 (A0) [11:18:34] [PASSED] DG1 (B0) [11:18:34] [PASSED] ALDERLAKE_S (A0) [11:18:34] [PASSED] ALDERLAKE_S (B0) [11:18:34] [PASSED] ALDERLAKE_S (C0) [11:18:34] [PASSED] ALDERLAKE_S (D0) [11:18:34] [PASSED] ALDERLAKE_P (A0) [11:18:34] [PASSED] ALDERLAKE_P (B0) [11:18:34] [PASSED] ALDERLAKE_P (C0) [11:18:34] [PASSED] ALDERLAKE_S_RPLS (D0) [11:18:34] [PASSED] ALDERLAKE_P_RPLU (E0) [11:18:34] [PASSED] DG2_G10 (C0) [11:18:34] [PASSED] DG2_G11 (B1) [11:18:34] [PASSED] DG2_G12 (A1) [11:18:34] [PASSED] METEORLAKE (g:A0, m:A0) [11:18:34] [PASSED] METEORLAKE (g:A0, m:A0) [11:18:34] [PASSED] METEORLAKE (g:A0, m:A0) [11:18:34] [PASSED] LUNARLAKE (g:A0, m:A0) [11:18:34] [PASSED] LUNARLAKE (g:B0, m:A0) [11:18:34] [PASSED] BATTLEMAGE (g:A0, m:A1) [11:18:34] ==================== [PASSED] xe_wa_gt ===================== [11:18:34] ====================== [PASSED] xe_wa ====================== [11:18:34] ============================================================ [11:18:34] Testing complete. Ran 133 tests: passed: 117, skipped: 16 [11:18:34] Elapsed time: 30.615s total, 4.180s configuring, 26.168s building, 0.254s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [11:18:34] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [11:18:36] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json ARCH=um O=.kunit --jobs=48 ../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes] 156 | u64 ioread64_lo_hi(const void __iomem *addr) | ^~~~~~~~~~~~~~ ../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes] 163 | u64 ioread64_hi_lo(const void __iomem *addr) | ^~~~~~~~~~~~~~ ../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes] 170 | u64 ioread64be_lo_hi(const void __iomem *addr) | ^~~~~~~~~~~~~~~~ ../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes] 178 | u64 ioread64be_hi_lo(const void __iomem *addr) | ^~~~~~~~~~~~~~~~ ../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes] 264 | void iowrite64_lo_hi(u64 val, void __iomem *addr) | ^~~~~~~~~~~~~~~ ../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes] 272 | void iowrite64_hi_lo(u64 val, void __iomem *addr) | ^~~~~~~~~~~~~~~ ../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes] 280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr) | ^~~~~~~~~~~~~~~~~ ../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes] 288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr) | ^~~~~~~~~~~~~~~~~ [11:18:57] Starting KUnit Kernel (1/1)... [11:18:57] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [11:18:57] =========== drm_validate_clone_mode (2 subtests) =========== [11:18:57] ============== drm_test_check_in_clone_mode =============== [11:18:57] [PASSED] in_clone_mode [11:18:57] [PASSED] not_in_clone_mode [11:18:57] ========== [PASSED] drm_test_check_in_clone_mode =========== [11:18:57] =============== drm_test_check_valid_clones =============== [11:18:57] [PASSED] not_in_clone_mode [11:18:57] [PASSED] valid_clone [11:18:57] [PASSED] invalid_clone [11:18:57] =========== [PASSED] drm_test_check_valid_clones =========== [11:18:57] ============= [PASSED] drm_validate_clone_mode ============= [11:18:57] ============= drm_validate_modeset (1 subtest) ============= [11:18:57] [PASSED] drm_test_check_connector_changed_modeset [11:18:57] ============== [PASSED] drm_validate_modeset =============== [11:18:57] ================== drm_buddy (7 subtests) ================== [11:18:57] [PASSED] drm_test_buddy_alloc_limit [11:18:57] [PASSED] drm_test_buddy_alloc_optimistic [11:18:57] [PASSED] drm_test_buddy_alloc_pessimistic [11:18:57] [PASSED] drm_test_buddy_alloc_pathological [11:18:57] [PASSED] drm_test_buddy_alloc_contiguous [11:18:57] [PASSED] drm_test_buddy_alloc_clear [11:18:57] [PASSED] drm_test_buddy_alloc_range_bias [11:18:57] ==================== [PASSED] drm_buddy ==================== [11:18:57] ============= drm_cmdline_parser (40 subtests) ============= [11:18:57] [PASSED] drm_test_cmdline_force_d_only [11:18:57] [PASSED] drm_test_cmdline_force_D_only_dvi [11:18:57] [PASSED] drm_test_cmdline_force_D_only_hdmi [11:18:57] [PASSED] drm_test_cmdline_force_D_only_not_digital [11:18:57] [PASSED] drm_test_cmdline_force_e_only [11:18:57] [PASSED] drm_test_cmdline_res [11:18:57] [PASSED] drm_test_cmdline_res_vesa [11:18:57] [PASSED] drm_test_cmdline_res_vesa_rblank [11:18:57] [PASSED] drm_test_cmdline_res_rblank [11:18:57] [PASSED] drm_test_cmdline_res_bpp [11:18:57] [PASSED] drm_test_cmdline_res_refresh [11:18:57] [PASSED] drm_test_cmdline_res_bpp_refresh [11:18:57] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [11:18:57] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [11:18:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [11:18:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [11:18:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [11:18:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [11:18:57] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [11:18:57] [PASSED] drm_test_cmdline_res_margins_force_on [11:18:57] [PASSED] drm_test_cmdline_res_vesa_margins [11:18:57] [PASSED] drm_test_cmdline_name [11:18:57] [PASSED] drm_test_cmdline_name_bpp [11:18:57] [PASSED] drm_test_cmdline_name_option [11:18:57] [PASSED] drm_test_cmdline_name_bpp_option [11:18:57] [PASSED] drm_test_cmdline_rotate_0 [11:18:57] [PASSED] drm_test_cmdline_rotate_90 [11:18:57] [PASSED] drm_test_cmdline_rotate_180 [11:18:57] [PASSED] drm_test_cmdline_rotate_270 [11:18:57] [PASSED] drm_test_cmdline_hmirror [11:18:57] [PASSED] drm_test_cmdline_vmirror [11:18:57] [PASSED] drm_test_cmdline_margin_options [11:18:57] [PASSED] drm_test_cmdline_multiple_options [11:18:57] [PASSED] drm_test_cmdline_bpp_extra_and_option [11:18:57] [PASSED] drm_test_cmdline_extra_and_option [11:18:57] [PASSED] drm_test_cmdline_freestanding_options [11:18:57] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [11:18:57] [PASSED] drm_test_cmdline_panel_orientation [11:18:57] ================ drm_test_cmdline_invalid ================= [11:18:57] [PASSED] margin_only [11:18:57] [PASSED] interlace_only [11:18:57] [PASSED] res_missing_x [11:18:57] [PASSED] res_missing_y [11:18:57] [PASSED] res_bad_y [11:18:57] [PASSED] res_missing_y_bpp [11:18:57] [PASSED] res_bad_bpp [11:18:57] [PASSED] res_bad_refresh [11:18:57] [PASSED] res_bpp_refresh_force_on_off [11:18:57] [PASSED] res_invalid_mode [11:18:57] [PASSED] res_bpp_wrong_place_mode [11:18:57] [PASSED] name_bpp_refresh [11:18:57] [PASSED] name_refresh [11:18:57] [PASSED] name_refresh_wrong_mode [11:18:57] [PASSED] name_refresh_invalid_mode [11:18:57] [PASSED] rotate_multiple [11:18:57] [PASSED] rotate_invalid_val [11:18:57] [PASSED] rotate_truncated [11:18:57] [PASSED] invalid_option [11:18:57] [PASSED] invalid_tv_option [11:18:57] [PASSED] truncated_tv_option [11:18:57] ============ [PASSED] drm_test_cmdline_invalid ============= [11:18:57] =============== drm_test_cmdline_tv_options =============== [11:18:57] [PASSED] NTSC [11:18:57] [PASSED] NTSC_443 [11:18:57] [PASSED] NTSC_J [11:18:57] [PASSED] PAL [11:18:57] [PASSED] PAL_M [11:18:57] [PASSED] PAL_N [11:18:57] [PASSED] SECAM [11:18:57] [PASSED] MONO_525 [11:18:57] [PASSED] MONO_625 [11:18:57] =========== [PASSED] drm_test_cmdline_tv_options =========== [11:18:57] =============== [PASSED] drm_cmdline_parser ================ [11:18:57] ========== drmm_connector_hdmi_init (20 subtests) ========== [11:18:57] [PASSED] drm_test_connector_hdmi_init_valid [11:18:57] [PASSED] drm_test_connector_hdmi_init_bpc_8 [11:18:57] [PASSED] drm_test_connector_hdmi_init_bpc_10 [11:18:57] [PASSED] drm_test_connector_hdmi_init_bpc_12 [11:18:57] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [11:18:57] [PASSED] drm_test_connector_hdmi_init_bpc_null [11:18:57] [PASSED] drm_test_connector_hdmi_init_formats_empty [11:18:57] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [11:18:57] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [11:18:57] [PASSED] supported_formats=0x9 yuv420_allowed=1 [11:18:57] [PASSED] supported_formats=0x9 yuv420_allowed=0 [11:18:57] [PASSED] supported_formats=0x3 yuv420_allowed=1 [11:18:57] [PASSED] supported_formats=0x3 yuv420_allowed=0 [11:18:57] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [11:18:57] [PASSED] drm_test_connector_hdmi_init_null_ddc [11:18:57] [PASSED] drm_test_connector_hdmi_init_null_product [11:18:57] [PASSED] drm_test_connector_hdmi_init_null_vendor [11:18:57] [PASSED] drm_test_connector_hdmi_init_product_length_exact [11:18:57] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [11:18:57] [PASSED] drm_test_connector_hdmi_init_product_valid [11:18:57] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [11:18:57] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [11:18:57] [PASSED] drm_test_connector_hdmi_init_vendor_valid [11:18:57] ========= drm_test_connector_hdmi_init_type_valid ========= [11:18:57] [PASSED] HDMI-A [11:18:57] [PASSED] HDMI-B [11:18:57] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [11:18:57] ======== drm_test_connector_hdmi_init_type_invalid ======== [11:18:57] [PASSED] Unknown [11:18:57] [PASSED] VGA [11:18:57] [PASSED] DVI-I [11:18:57] [PASSED] DVI-D [11:18:57] [PASSED] DVI-A [11:18:57] [PASSED] Composite [11:18:57] [PASSED] SVIDEO [11:18:57] [PASSED] LVDS [11:18:57] [PASSED] Component [11:18:57] [PASSED] DIN [11:18:57] [PASSED] DP [11:18:57] [PASSED] TV [11:18:57] [PASSED] eDP [11:18:57] [PASSED] Virtual [11:18:57] [PASSED] DSI [11:18:57] [PASSED] DPI [11:18:57] [PASSED] Writeback [11:18:57] [PASSED] SPI [11:18:57] [PASSED] USB [11:18:57] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [11:18:57] ============ [PASSED] drmm_connector_hdmi_init ============= [11:18:57] ============= drmm_connector_init (3 subtests) ============= [11:18:57] [PASSED] drm_test_drmm_connector_init [11:18:57] [PASSED] drm_test_drmm_connector_init_null_ddc [11:18:57] ========= drm_test_drmm_connector_init_type_valid ========= [11:18:57] [PASSED] Unknown [11:18:57] [PASSED] VGA [11:18:57] [PASSED] DVI-I [11:18:57] [PASSED] DVI-D [11:18:57] [PASSED] DVI-A [11:18:57] [PASSED] Composite [11:18:57] [PASSED] SVIDEO [11:18:57] [PASSED] LVDS [11:18:57] [PASSED] Component [11:18:57] [PASSED] DIN [11:18:57] [PASSED] DP [11:18:57] [PASSED] HDMI-A [11:18:57] [PASSED] HDMI-B [11:18:57] [PASSED] TV [11:18:57] [PASSED] eDP [11:18:57] [PASSED] Virtual [11:18:57] [PASSED] DSI [11:18:57] [PASSED] DPI [11:18:57] [PASSED] Writeback [11:18:57] [PASSED] SPI [11:18:57] [PASSED] USB [11:18:57] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [11:18:57] =============== [PASSED] drmm_connector_init =============== [11:18:57] ========= drm_connector_dynamic_init (6 subtests) ========== [11:18:57] [PASSED] drm_test_drm_connector_dynamic_init [11:18:57] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [11:18:57] [PASSED] drm_test_drm_connector_dynamic_init_not_added [11:18:57] [PASSED] drm_test_drm_connector_dynamic_init_properties [11:18:57] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [11:18:57] [PASSED] Unknown [11:18:57] [PASSED] VGA [11:18:57] [PASSED] DVI-I [11:18:57] [PASSED] DVI-D [11:18:57] [PASSED] DVI-A [11:18:57] [PASSED] Composite [11:18:57] [PASSED] SVIDEO [11:18:57] [PASSED] LVDS [11:18:57] [PASSED] Component [11:18:57] [PASSED] DIN [11:18:57] [PASSED] DP [11:18:57] [PASSED] HDMI-A [11:18:57] [PASSED] HDMI-B [11:18:57] [PASSED] TV [11:18:57] [PASSED] eDP [11:18:57] [PASSED] Virtual [11:18:57] [PASSED] DSI [11:18:57] [PASSED] DPI [11:18:57] [PASSED] Writeback [11:18:57] [PASSED] SPI [11:18:57] [PASSED] USB [11:18:57] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [11:18:57] ======== drm_test_drm_connector_dynamic_init_name ========= [11:18:57] [PASSED] Unknown [11:18:57] [PASSED] VGA [11:18:57] [PASSED] DVI-I [11:18:57] [PASSED] DVI-D [11:18:57] [PASSED] DVI-A [11:18:57] [PASSED] Composite [11:18:57] [PASSED] SVIDEO [11:18:57] [PASSED] LVDS [11:18:57] [PASSED] Component [11:18:57] [PASSED] DIN [11:18:57] [PASSED] DP [11:18:57] [PASSED] HDMI-A [11:18:57] [PASSED] HDMI-B [11:18:57] [PASSED] TV [11:18:57] [PASSED] eDP [11:18:57] [PASSED] Virtual [11:18:57] [PASSED] DSI [11:18:57] [PASSED] DPI [11:18:57] [PASSED] Writeback [11:18:57] [PASSED] SPI [11:18:57] [PASSED] USB [11:18:57] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [11:18:57] =========== [PASSED] drm_connector_dynamic_init ============ [11:18:57] ==== drm_connector_dynamic_register_early (4 subtests) ===== [11:18:57] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [11:18:57] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [11:18:57] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [11:18:57] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [11:18:57] ====== [PASSED] drm_connector_dynamic_register_early ======= [11:18:57] ======= drm_connector_dynamic_register (7 subtests) ======== [11:18:57] [PASSED] drm_test_drm_connector_dynamic_register_on_list [11:18:57] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [11:18:57] [PASSED] drm_test_drm_connector_dynamic_register_no_init [11:18:57] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [11:18:57] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [11:18:57] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [11:18:57] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [11:18:57] ========= [PASSED] drm_connector_dynamic_register ========== [11:18:57] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [11:18:57] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [11:18:57] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [11:18:57] === [PASSED] drm_connector_attach_broadcast_rgb_property === [11:18:57] ========== drm_get_tv_mode_from_name (2 subtests) ========== [11:18:57] ========== drm_test_get_tv_mode_from_name_valid =========== [11:18:57] [PASSED] NTSC [11:18:57] [PASSED] NTSC-443 [11:18:57] [PASSED] NTSC-J [11:18:57] [PASSED] PAL [11:18:57] [PASSED] PAL-M [11:18:57] [PASSED] PAL-N [11:18:57] [PASSED] SECAM [11:18:57] [PASSED] Mono [11:18:57] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [11:18:57] [PASSED] drm_test_get_tv_mode_from_name_truncated [11:18:57] ============ [PASSED] drm_get_tv_mode_from_name ============ [11:18:57] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [11:18:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [11:18:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [11:18:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [11:18:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [11:18:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [11:18:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [11:18:57] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [11:18:57] [PASSED] VIC 96 [11:18:57] [PASSED] VIC 97 [11:18:57] [PASSED] VIC 101 [11:18:57] [PASSED] VIC 102 [11:18:57] [PASSED] VIC 106 [11:18:57] [PASSED] VIC 107 [11:18:57] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [11:18:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [11:18:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [11:18:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [11:18:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [11:18:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [11:18:57] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [11:18:57] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [11:18:57] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [11:18:57] [PASSED] Automatic [11:18:57] [PASSED] Full [11:18:57] [PASSED] Limited 16:235 [11:18:57] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [11:18:57] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [11:18:57] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [11:18:57] == drm_hdmi_connector_get_output_format_name (2 subtests) == [11:18:57] === drm_test_drm_hdmi_connector_get_output_format_name ==== [11:18:57] [PASSED] RGB [11:18:57] [PASSED] YUV 4:2:0 [11:18:57] [PASSED] YUV 4:2:2 [11:18:57] [PASSED] YUV 4:4:4 [11:18:57] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [11:18:57] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [11:18:57] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [11:18:57] ============= drm_damage_helper (21 subtests) ============== [11:18:57] [PASSED] drm_test_damage_iter_no_damage [11:18:57] [PASSED] drm_test_damage_iter_no_damage_fractional_src [11:18:57] [PASSED] drm_test_damage_iter_no_damage_src_moved [11:18:57] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [11:18:57] [PASSED] drm_test_damage_iter_no_damage_not_visible [11:18:57] [PASSED] drm_test_damage_iter_no_damage_no_crtc [11:18:57] [PASSED] drm_test_damage_iter_no_damage_no_fb [11:18:57] [PASSED] drm_test_damage_iter_simple_damage [11:18:57] [PASSED] drm_test_damage_iter_single_damage [11:18:57] [PASSED] drm_test_damage_iter_single_damage_intersect_src [11:18:57] [PASSED] drm_test_damage_iter_single_damage_outside_src [11:18:57] [PASSED] drm_test_damage_iter_single_damage_fractional_src [11:18:57] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [11:18:57] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [11:18:57] [PASSED] drm_test_damage_iter_single_damage_src_moved [11:18:57] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [11:18:57] [PASSED] drm_test_damage_iter_damage [11:18:57] [PASSED] drm_test_damage_iter_damage_one_intersect [11:18:57] [PASSED] drm_test_damage_iter_damage_one_outside [11:18:57] [PASSED] drm_test_damage_iter_damage_src_moved [11:18:57] [PASSED] drm_test_damage_iter_damage_not_visible [11:18:57] ================ [PASSED] drm_damage_helper ================ [11:18:57] ============== drm_dp_mst_helper (3 subtests) ============== [11:18:57] ============== drm_test_dp_mst_calc_pbn_mode ============== [11:18:57] [PASSED] Clock 154000 BPP 30 DSC disabled [11:18:57] [PASSED] Clock 234000 BPP 30 DSC disabled [11:18:57] [PASSED] Clock 297000 BPP 24 DSC disabled [11:18:57] [PASSED] Clock 332880 BPP 24 DSC enabled [11:18:57] [PASSED] Clock 324540 BPP 24 DSC enabled [11:18:57] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [11:18:57] ============== drm_test_dp_mst_calc_pbn_div =============== [11:18:57] [PASSED] Link rate 2000000 lane count 4 [11:18:57] [PASSED] Link rate 2000000 lane count 2 [11:18:57] [PASSED] Link rate 2000000 lane count 1 [11:18:57] [PASSED] Link rate 1350000 lane count 4 [11:18:57] [PASSED] Link rate 1350000 lane count 2 [11:18:57] [PASSED] Link rate 1350000 lane count 1 [11:18:57] [PASSED] Link rate 1000000 lane count 4 [11:18:57] [PASSED] Link rate 1000000 lane count 2 [11:18:57] [PASSED] Link rate 1000000 lane count 1 [11:18:57] [PASSED] Link rate 810000 lane count 4 [11:18:57] [PASSED] Link rate 810000 lane count 2 [11:18:57] [PASSED] Link rate 810000 lane count 1 [11:18:57] [PASSED] Link rate 540000 lane count 4 [11:18:57] [PASSED] Link rate 540000 lane count 2 [11:18:57] [PASSED] Link rate 540000 lane count 1 [11:18:57] [PASSED] Link rate 270000 lane count 4 [11:18:57] [PASSED] Link rate 270000 lane count 2 [11:18:57] [PASSED] Link rate 270000 lane count 1 [11:18:57] [PASSED] Link rate 162000 lane count 4 [11:18:57] [PASSED] Link rate 162000 lane count 2 [11:18:57] [PASSED] Link rate 162000 lane count 1 [11:18:57] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [11:18:57] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [11:18:57] [PASSED] DP_ENUM_PATH_RESOURCES with port number [11:18:57] [PASSED] DP_POWER_UP_PHY with port number [11:18:57] [PASSED] DP_POWER_DOWN_PHY with port number [11:18:57] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [11:18:57] [PASSED] DP_ALLOCATE_PAYLOAD with port number [11:18:57] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [11:18:57] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [11:18:57] [PASSED] DP_QUERY_PAYLOAD with port number [11:18:57] [PASSED] DP_QUERY_PAYLOAD with VCPI [11:18:57] [PASSED] DP_REMOTE_DPCD_READ with port number [11:18:57] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [11:18:57] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [11:18:57] [PASSED] DP_REMOTE_DPCD_WRITE with port number [11:18:57] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [11:18:57] [PASSED] DP_REMOTE_DPCD_WRITE with data array [11:18:57] [PASSED] DP_REMOTE_I2C_READ with port number [11:18:57] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [11:18:57] [PASSED] DP_REMOTE_I2C_READ with transactions array [11:18:57] [PASSED] DP_REMOTE_I2C_WRITE with port number [11:18:57] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [11:18:57] [PASSED] DP_REMOTE_I2C_WRITE with data array [11:18:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [11:18:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [11:18:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [11:18:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [11:18:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [11:18:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [11:18:57] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [11:18:57] ================ [PASSED] drm_dp_mst_helper ================ [11:18:57] ================== drm_exec (7 subtests) =================== [11:18:57] [PASSED] sanitycheck [11:18:57] [PASSED] test_lock [11:18:57] [PASSED] test_lock_unlock [11:18:57] [PASSED] test_duplicates [11:18:57] [PASSED] test_prepare [11:18:57] [PASSED] test_prepare_array [11:18:57] [PASSED] test_multiple_loops [11:18:57] ==================== [PASSED] drm_exec ===================== [11:18:57] =========== drm_format_helper_test (18 subtests) =========== [11:18:57] ============== drm_test_fb_xrgb8888_to_gray8 ============== [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [11:18:57] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [11:18:57] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [11:18:57] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [11:18:57] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [11:18:57] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [11:18:57] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [11:18:57] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [11:18:57] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [11:18:57] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [11:18:57] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [11:18:57] ============== drm_test_fb_xrgb8888_to_mono =============== [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [11:18:57] ==================== drm_test_fb_swab ===================== [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ================ [PASSED] drm_test_fb_swab ================= [11:18:57] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [11:18:57] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [11:18:57] [PASSED] single_pixel_source_buffer [11:18:57] [PASSED] single_pixel_clip_rectangle [11:18:57] [PASSED] well_known_colors [11:18:57] [PASSED] destination_pitch [11:18:57] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [11:18:57] ================= drm_test_fb_clip_offset ================= [11:18:57] [PASSED] pass through [11:18:57] [PASSED] horizontal offset [11:18:57] [PASSED] vertical offset [11:18:57] [PASSED] horizontal and vertical offset [11:18:57] [PASSED] horizontal offset (custom pitch) [11:18:57] [PASSED] vertical offset (custom pitch) [11:18:57] [PASSED] horizontal and vertical offset (custom pitch) [11:18:57] ============= [PASSED] drm_test_fb_clip_offset ============= [11:18:57] ============== drm_test_fb_build_fourcc_list ============== [11:18:57] [PASSED] no native formats [11:18:57] [PASSED] XRGB8888 as native format [11:18:57] [PASSED] remove duplicates [11:18:57] [PASSED] convert alpha formats [11:18:57] [PASSED] random formats [11:18:57] ========== [PASSED] drm_test_fb_build_fourcc_list ========== [11:18:57] =================== drm_test_fb_memcpy ==================== [11:18:57] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [11:18:57] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [11:18:57] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [11:18:57] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [11:18:57] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [11:18:57] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [11:18:57] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [11:18:57] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [11:18:57] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [11:18:57] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [11:18:57] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [11:18:57] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [11:18:57] =============== [PASSED] drm_test_fb_memcpy ================ [11:18:57] ============= [PASSED] drm_format_helper_test ============== [11:18:57] ================= drm_format (18 subtests) ================= [11:18:57] [PASSED] drm_test_format_block_width_invalid [11:18:57] [PASSED] drm_test_format_block_width_one_plane [11:18:57] [PASSED] drm_test_format_block_width_two_plane [11:18:57] [PASSED] drm_test_format_block_width_three_plane [11:18:57] [PASSED] drm_test_format_block_width_tiled [11:18:57] [PASSED] drm_test_format_block_height_invalid [11:18:57] [PASSED] drm_test_format_block_height_one_plane [11:18:57] [PASSED] drm_test_format_block_height_two_plane [11:18:57] [PASSED] drm_test_format_block_height_three_plane [11:18:57] [PASSED] drm_test_format_block_height_tiled [11:18:57] [PASSED] drm_test_format_min_pitch_invalid [11:18:57] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [11:18:57] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [11:18:57] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [11:18:57] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [11:18:57] [PASSED] drm_test_format_min_pitch_two_plane [11:18:57] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [11:18:57] [PASSED] drm_test_format_min_pitch_tiled [11:18:57] =================== [PASSED] drm_format ==================== [11:18:57] ============== drm_framebuffer (10 subtests) =============== [11:18:57] ========== drm_test_framebuffer_check_src_coords ========== [11:18:57] [PASSED] Success: source fits into fb [11:18:57] [PASSED] Fail: overflowing fb with x-axis coordinate [11:18:57] [PASSED] Fail: overflowing fb with y-axis coordinate [11:18:57] [PASSED] Fail: overflowing fb with source width [11:18:57] [PASSED] Fail: overflowing fb with source height [11:18:57] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [11:18:57] [PASSED] drm_test_framebuffer_cleanup [11:18:57] =============== drm_test_framebuffer_create =============== [11:18:57] [PASSED] ABGR8888 normal sizes [11:18:57] [PASSED] ABGR8888 max sizes [11:18:57] [PASSED] ABGR8888 pitch greater than min required [11:18:57] [PASSED] ABGR8888 pitch less than min required [11:18:57] [PASSED] ABGR8888 Invalid width [11:18:57] [PASSED] ABGR8888 Invalid buffer handle [11:18:57] [PASSED] No pixel format [11:18:57] [PASSED] ABGR8888 Width 0 [11:18:57] [PASSED] ABGR8888 Height 0 [11:18:57] [PASSED] ABGR8888 Out of bound height * pitch combination [11:18:57] [PASSED] ABGR8888 Large buffer offset [11:18:57] [PASSED] ABGR8888 Buffer offset for inexistent plane [11:18:57] [PASSED] ABGR8888 Invalid flag [11:18:57] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [11:18:57] [PASSED] ABGR8888 Valid buffer modifier [11:18:57] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [11:18:57] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [11:18:57] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [11:18:57] [PASSED] NV12 Normal sizes [11:18:57] [PASSED] NV12 Max sizes [11:18:57] [PASSED] NV12 Invalid pitch [11:18:57] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [11:18:57] [PASSED] NV12 different modifier per-plane [11:18:57] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [11:18:57] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [11:18:57] [PASSED] NV12 Modifier for inexistent plane [11:18:57] [PASSED] NV12 Handle for inexistent plane [11:18:57] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [11:18:57] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [11:18:57] [PASSED] YVU420 Normal sizes [11:18:57] [PASSED] YVU420 Max sizes [11:18:57] [PASSED] YVU420 Invalid pitch [11:18:57] [PASSED] YVU420 Different pitches [11:18:57] [PASSED] YVU420 Different buffer offsets/pitches [11:18:57] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [11:18:57] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [11:18:57] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [11:18:57] [PASSED] YVU420 Valid modifier [11:18:57] [PASSED] YVU420 Different modifiers per plane [11:18:57] [PASSED] YVU420 Modifier for inexistent plane [11:18:57] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [11:18:57] [PASSED] X0L2 Normal sizes [11:18:57] [PASSED] X0L2 Max sizes [11:18:57] [PASSED] X0L2 Invalid pitch [11:18:57] [PASSED] X0L2 Pitch greater than minimum required [11:18:57] [PASSED] X0L2 Handle for inexistent plane [11:18:57] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [11:18:57] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [11:18:57] [PASSED] X0L2 Valid modifier [11:18:57] [PASSED] X0L2 Modifier for inexistent plane [11:18:57] =========== [PASSED] drm_test_framebuffer_create =========== [11:18:57] [PASSED] drm_test_framebuffer_free [11:18:57] [PASSED] drm_test_framebuffer_init [11:18:57] [PASSED] drm_test_framebuffer_init_bad_format [11:18:57] [PASSED] drm_test_framebuffer_init_dev_mismatch [11:18:57] [PASSED] drm_test_framebuffer_lookup [11:18:57] [PASSED] drm_test_framebuffer_lookup_inexistent [11:18:57] [PASSED] drm_test_framebuffer_modifiers_not_supported [11:18:57] ================= [PASSED] drm_framebuffer ================= [11:18:57] ================ drm_gem_shmem (8 subtests) ================ [11:18:57] [PASSED] drm_gem_shmem_test_obj_create [11:18:57] [PASSED] drm_gem_shmem_test_obj_create_private [11:18:57] [PASSED] drm_gem_shmem_test_pin_pages [11:18:57] [PASSED] drm_gem_shmem_test_vmap [11:18:57] [PASSED] drm_gem_shmem_test_get_pages_sgt [11:18:57] [PASSED] drm_gem_shmem_test_get_sg_table [11:18:57] [PASSED] drm_gem_shmem_test_madvise [11:18:57] [PASSED] drm_gem_shmem_test_purge [11:18:57] ================== [PASSED] drm_gem_shmem ================== [11:18:57] === drm_atomic_helper_connector_hdmi_check (23 subtests) === [11:18:57] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [11:18:57] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [11:18:57] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [11:18:57] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [11:18:57] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [11:18:57] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [11:18:57] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [11:18:57] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [11:18:57] [PASSED] drm_test_check_disable_connector [11:18:57] [PASSED] drm_test_check_hdmi_funcs_reject_rate [11:18:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback [11:18:57] [PASSED] drm_test_check_max_tmds_rate_format_fallback [11:18:57] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [11:18:57] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [11:18:57] [PASSED] drm_test_check_output_bpc_dvi [11:18:57] [PASSED] drm_test_check_output_bpc_format_vic_1 [11:18:57] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [11:18:57] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [11:18:57] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [11:18:57] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [11:18:57] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [11:18:57] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [11:18:57] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [11:18:57] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [11:18:57] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [11:18:57] [PASSED] drm_test_check_broadcast_rgb_value [11:18:57] [PASSED] drm_test_check_bpc_8_value [11:18:57] [PASSED] drm_test_check_bpc_10_value [11:18:57] [PASSED] drm_test_check_bpc_12_value [11:18:57] [PASSED] drm_test_check_format_value [11:18:57] [PASSED] drm_test_check_tmds_char_value [11:18:57] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [11:18:57] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) = [11:18:57] [PASSED] drm_test_check_mode_valid [11:18:57] [PASSED] drm_test_check_mode_valid_reject [11:18:57] [PASSED] drm_test_check_mode_valid_reject_rate [11:18:57] [PASSED] drm_test_check_mode_valid_reject_max_clock [11:18:57] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [11:18:57] ================= drm_managed (2 subtests) ================= [11:18:57] [PASSED] drm_test_managed_release_action [11:18:57] [PASSED] drm_test_managed_run_action [11:18:57] =================== [PASSED] drm_managed =================== [11:18:57] =================== drm_mm (6 subtests) ==================== [11:18:57] [PASSED] drm_test_mm_init [11:18:57] [PASSED] drm_test_mm_debug [11:18:57] [PASSED] drm_test_mm_align32 [11:18:57] [PASSED] drm_test_mm_align64 [11:18:57] [PASSED] drm_test_mm_lowest [11:18:57] [PASSED] drm_test_mm_highest [11:18:57] ===================== [PASSED] drm_mm ====================== [11:18:57] ============= drm_modes_analog_tv (5 subtests) ============= [11:18:57] [PASSED] drm_test_modes_analog_tv_mono_576i [11:18:57] [PASSED] drm_test_modes_analog_tv_ntsc_480i [11:18:57] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [11:18:57] [PASSED] drm_test_modes_analog_tv_pal_576i [11:18:57] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [11:18:57] =============== [PASSED] drm_modes_analog_tv =============== [11:18:57] ============== drm_plane_helper (2 subtests) =============== [11:18:57] =============== drm_test_check_plane_state ================ [11:18:57] [PASSED] clipping_simple [11:18:57] [PASSED] clipping_rotate_reflect [11:18:57] [PASSED] positioning_simple [11:18:57] [PASSED] upscaling [11:18:57] [PASSED] downscaling [11:18:57] [PASSED] rounding1 [11:18:57] [PASSED] rounding2 [11:18:57] [PASSED] rounding3 [11:18:57] [PASSED] rounding4 [11:18:57] =========== [PASSED] drm_test_check_plane_state ============ [11:18:57] =========== drm_test_check_invalid_plane_state ============ [11:18:57] [PASSED] positioning_invalid [11:18:57] [PASSED] upscaling_invalid [11:18:57] [PASSED] downscaling_invalid [11:18:57] ======= [PASSED] drm_test_check_invalid_plane_state ======== [11:18:57] ================ [PASSED] drm_plane_helper ================= [11:18:57] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [11:18:57] ====== drm_test_connector_helper_tv_get_modes_check ======= [11:18:57] [PASSED] None [11:18:57] [PASSED] PAL [11:18:57] [PASSED] NTSC [11:18:57] [PASSED] Both, NTSC Default [11:18:57] [PASSED] Both, PAL Default [11:18:57] [PASSED] Both, NTSC Default, with PAL on command-line [11:18:57] [PASSED] Both, PAL Default, with NTSC on command-line [11:18:57] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [11:18:57] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [11:18:57] ================== drm_rect (9 subtests) =================== [11:18:57] [PASSED] drm_test_rect_clip_scaled_div_by_zero [11:18:57] [PASSED] drm_test_rect_clip_scaled_not_clipped [11:18:57] [PASSED] drm_test_rect_clip_scaled_clipped [11:18:57] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [11:18:57] ================= drm_test_rect_intersect ================= [11:18:57] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [11:18:57] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [11:18:57] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [11:18:57] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [11:18:57] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [11:18:57] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [11:18:57] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [11:18:57] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [11:18:57] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [11:18:57] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [11:18:57] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [11:18:57] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [11:18:57] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [11:18:57] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [11:18:57] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [11:18:57] ============= [PASSED] drm_test_rect_intersect ============= [11:18:57] ================ drm_test_rect_calc_hscale ================ [11:18:57] [PASSED] normal use [11:18:57] [PASSED] out of max range [11:18:57] [PASSED] out of min range [11:18:57] [PASSED] zero dst [11:18:57] [PASSED] negative src [11:18:57] [PASSED] negative dst [11:18:57] ============ [PASSED] drm_test_rect_calc_hscale ============ [11:18:57] ================ drm_test_rect_calc_vscale ================ [11:18:57] [PASSED] normal use [11:18:57] [PASSED] out of max range [11:18:57] [PASSED] out of min range [11:18:57] [PASSED] zero dst [11:18:57] [PASSED] negative src [11:18:57] [PASSED] negative dst stty: 'standard input': Inappropriate ioctl for device [11:18:57] ============ [PASSED] drm_test_rect_calc_vscale ============ [11:18:57] ================== drm_test_rect_rotate =================== [11:18:57] [PASSED] reflect-x [11:18:57] [PASSED] reflect-y [11:18:57] [PASSED] rotate-0 [11:18:57] [PASSED] rotate-90 [11:18:57] [PASSED] rotate-180 [11:18:57] [PASSED] rotate-270 [11:18:57] ============== [PASSED] drm_test_rect_rotate =============== [11:18:57] ================ drm_test_rect_rotate_inv ================= [11:18:57] [PASSED] reflect-x [11:18:57] [PASSED] reflect-y [11:18:57] [PASSED] rotate-0 [11:18:57] [PASSED] rotate-90 [11:18:57] [PASSED] rotate-180 [11:18:57] [PASSED] rotate-270 [11:18:57] ============ [PASSED] drm_test_rect_rotate_inv ============= [11:18:57] ==================== [PASSED] drm_rect ===================== [11:18:57] ============================================================ [11:18:57] Testing complete. Ran 602 tests: passed: 602 [11:18:57] Elapsed time: 23.004s total, 1.633s configuring, 21.152s building, 0.187s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [11:18:57] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [11:18:59] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json ARCH=um O=.kunit --jobs=48 [11:19:07] Starting KUnit Kernel (1/1)... [11:19:07] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [11:19:07] ================= ttm_device (5 subtests) ================== [11:19:07] [PASSED] ttm_device_init_basic [11:19:07] [PASSED] ttm_device_init_multiple [11:19:07] [PASSED] ttm_device_fini_basic [11:19:07] [PASSED] ttm_device_init_no_vma_man [11:19:07] ================== ttm_device_init_pools ================== [11:19:07] [PASSED] No DMA allocations, no DMA32 required [11:19:07] [PASSED] DMA allocations, DMA32 required [11:19:07] [PASSED] No DMA allocations, DMA32 required [11:19:07] [PASSED] DMA allocations, no DMA32 required [11:19:07] ============== [PASSED] ttm_device_init_pools ============== [11:19:07] =================== [PASSED] ttm_device ==================== [11:19:07] ================== ttm_pool (8 subtests) =================== [11:19:07] ================== ttm_pool_alloc_basic =================== [11:19:07] [PASSED] One page [11:19:07] [PASSED] More than one page [11:19:07] [PASSED] Above the allocation limit [11:19:07] [PASSED] One page, with coherent DMA mappings enabled [11:19:07] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [11:19:07] ============== [PASSED] ttm_pool_alloc_basic =============== [11:19:07] ============== ttm_pool_alloc_basic_dma_addr ============== [11:19:07] [PASSED] One page [11:19:07] [PASSED] More than one page [11:19:07] [PASSED] Above the allocation limit [11:19:07] [PASSED] One page, with coherent DMA mappings enabled [11:19:07] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [11:19:07] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [11:19:07] [PASSED] ttm_pool_alloc_order_caching_match [11:19:07] [PASSED] ttm_pool_alloc_caching_mismatch [11:19:07] [PASSED] ttm_pool_alloc_order_mismatch [11:19:07] [PASSED] ttm_pool_free_dma_alloc [11:19:07] [PASSED] ttm_pool_free_no_dma_alloc [11:19:07] [PASSED] ttm_pool_fini_basic [11:19:07] ==================== [PASSED] ttm_pool ===================== [11:19:07] ================ ttm_resource (8 subtests) ================= [11:19:07] ================= ttm_resource_init_basic ================= [11:19:07] [PASSED] Init resource in TTM_PL_SYSTEM [11:19:07] [PASSED] Init resource in TTM_PL_VRAM [11:19:07] [PASSED] Init resource in a private placement [11:19:07] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [11:19:07] ============= [PASSED] ttm_resource_init_basic ============= [11:19:07] [PASSED] ttm_resource_init_pinned [11:19:07] [PASSED] ttm_resource_fini_basic [11:19:07] [PASSED] ttm_resource_manager_init_basic [11:19:07] [PASSED] ttm_resource_manager_usage_basic [11:19:07] [PASSED] ttm_resource_manager_set_used_basic [11:19:07] [PASSED] ttm_sys_man_alloc_basic [11:19:07] [PASSED] ttm_sys_man_free_basic [11:19:07] ================== [PASSED] ttm_resource =================== [11:19:07] =================== ttm_tt (15 subtests) =================== [11:19:07] ==================== ttm_tt_init_basic ==================== [11:19:07] [PASSED] Page-aligned size [11:19:07] [PASSED] Extra pages requested [11:19:07] ================ [PASSED] ttm_tt_init_basic ================ [11:19:07] [PASSED] ttm_tt_init_misaligned [11:19:07] [PASSED] ttm_tt_fini_basic [11:19:07] [PASSED] ttm_tt_fini_sg [11:19:07] [PASSED] ttm_tt_fini_shmem [11:19:07] [PASSED] ttm_tt_create_basic [11:19:07] [PASSED] ttm_tt_create_invalid_bo_type [11:19:07] [PASSED] ttm_tt_create_ttm_exists [11:19:07] [PASSED] ttm_tt_create_failed [11:19:07] [PASSED] ttm_tt_destroy_basic [11:19:07] [PASSED] ttm_tt_populate_null_ttm [11:19:07] [PASSED] ttm_tt_populate_populated_ttm [11:19:07] [PASSED] ttm_tt_unpopulate_basic [11:19:07] [PASSED] ttm_tt_unpopulate_empty_ttm [11:19:07] [PASSED] ttm_tt_swapin_basic [11:19:07] ===================== [PASSED] ttm_tt ====================== [11:19:07] =================== ttm_bo (14 subtests) =================== [11:19:07] =========== ttm_bo_reserve_optimistic_no_ticket =========== [11:19:07] [PASSED] Cannot be interrupted and sleeps [11:19:07] [PASSED] Cannot be interrupted, locks straight away [11:19:07] [PASSED] Can be interrupted, sleeps [11:19:07] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [11:19:07] [PASSED] ttm_bo_reserve_locked_no_sleep [11:19:07] [PASSED] ttm_bo_reserve_no_wait_ticket [11:19:07] [PASSED] ttm_bo_reserve_double_resv [11:19:07] [PASSED] ttm_bo_reserve_interrupted [11:19:07] [PASSED] ttm_bo_reserve_deadlock [11:19:07] [PASSED] ttm_bo_unreserve_basic [11:19:07] [PASSED] ttm_bo_unreserve_pinned [11:19:07] [PASSED] ttm_bo_unreserve_bulk [11:19:07] [PASSED] ttm_bo_put_basic [11:19:07] [PASSED] ttm_bo_put_shared_resv [11:19:07] [PASSED] ttm_bo_pin_basic [11:19:07] [PASSED] ttm_bo_pin_unpin_resource [11:19:07] [PASSED] ttm_bo_multiple_pin_one_unpin [11:19:07] ===================== [PASSED] ttm_bo ====================== [11:19:07] ============== ttm_bo_validate (22 subtests) =============== [11:19:07] ============== ttm_bo_init_reserved_sys_man =============== [11:19:07] [PASSED] Buffer object for userspace [11:19:07] [PASSED] Kernel buffer object [11:19:07] [PASSED] Shared buffer object [11:19:07] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [11:19:07] ============== ttm_bo_init_reserved_mock_man ============== [11:19:07] [PASSED] Buffer object for userspace [11:19:07] [PASSED] Kernel buffer object [11:19:07] [PASSED] Shared buffer object [11:19:07] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [11:19:07] [PASSED] ttm_bo_init_reserved_resv [11:19:07] ================== ttm_bo_validate_basic ================== [11:19:07] [PASSED] Buffer object for userspace [11:19:07] [PASSED] Kernel buffer object [11:19:07] [PASSED] Shared buffer object [11:19:07] ============== [PASSED] ttm_bo_validate_basic ============== [11:19:07] [PASSED] ttm_bo_validate_invalid_placement [11:19:07] ============= ttm_bo_validate_same_placement ============== [11:19:07] [PASSED] System manager [11:19:07] [PASSED] VRAM manager [11:19:07] ========= [PASSED] ttm_bo_validate_same_placement ========== [11:19:07] [PASSED] ttm_bo_validate_failed_alloc [11:19:07] [PASSED] ttm_bo_validate_pinned [11:19:07] [PASSED] ttm_bo_validate_busy_placement [11:19:07] ================ ttm_bo_validate_multihop ================= [11:19:07] [PASSED] Buffer object for userspace [11:19:07] [PASSED] Kernel buffer object [11:19:07] [PASSED] Shared buffer object [11:19:07] ============ [PASSED] ttm_bo_validate_multihop ============= [11:19:07] ========== ttm_bo_validate_no_placement_signaled ========== [11:19:07] [PASSED] Buffer object in system domain, no page vector [11:19:07] [PASSED] Buffer object in system domain with an existing page vector [11:19:07] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [11:19:07] ======== ttm_bo_validate_no_placement_not_signaled ======== [11:19:07] [PASSED] Buffer object for userspace [11:19:07] [PASSED] Kernel buffer object [11:19:07] [PASSED] Shared buffer object [11:19:07] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [11:19:07] [PASSED] ttm_bo_validate_move_fence_signaled [11:19:07] ========= ttm_bo_validate_move_fence_not_signaled ========= [11:19:07] [PASSED] Waits for GPU [11:19:07] [PASSED] Tries to lock straight away [11:19:07] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [11:19:07] [PASSED] ttm_bo_validate_swapout [11:19:07] [PASSED] ttm_bo_validate_happy_evict [11:19:07] [PASSED] ttm_bo_validate_all_pinned_evict [11:19:07] [PASSED] ttm_bo_validate_allowed_only_evict [11:19:07] [PASSED] ttm_bo_validate_deleted_evict [11:19:07] [PASSED] ttm_bo_validate_busy_domain_evict [11:19:07] [PASSED] ttm_bo_validate_evict_gutting [11:19:07] [PASSED] ttm_bo_validate_recrusive_evict stty: 'standard input': Inappropriate ioctl for device [11:19:07] ================= [PASSED] ttm_bo_validate ================= [11:19:07] ============================================================ [11:19:07] Testing complete. Ran 102 tests: passed: 102 [11:19:07] Elapsed time: 10.038s total, 1.708s configuring, 7.712s building, 0.531s running + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ CI.Build: success for drm/i915/display: convert intel_display.[ch] to struct intel_display 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula ` (7 preceding siblings ...) 2025-03-04 11:19 ` ✓ CI.KUnit: success " Patchwork @ 2025-03-04 11:35 ` Patchwork 2025-03-04 11:38 ` ✓ CI.Hooks: " Patchwork ` (3 subsequent siblings) 12 siblings, 0 replies; 20+ messages in thread From: Patchwork @ 2025-03-04 11:35 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-xe == Series Details == Series: drm/i915/display: convert intel_display.[ch] to struct intel_display URL : https://patchwork.freedesktop.org/series/145758/ State : success == Summary == lib/modules/6.14.0-rc5-xe+/kernel/arch/x86/events/amd/ lib/modules/6.14.0-rc5-xe+/kernel/arch/x86/events/amd/amd-uncore.ko lib/modules/6.14.0-rc5-xe+/kernel/arch/x86/events/rapl.ko lib/modules/6.14.0-rc5-xe+/kernel/arch/x86/kvm/ lib/modules/6.14.0-rc5-xe+/kernel/arch/x86/kvm/kvm.ko lib/modules/6.14.0-rc5-xe+/kernel/arch/x86/kvm/kvm-intel.ko lib/modules/6.14.0-rc5-xe+/kernel/arch/x86/kvm/kvm-amd.ko lib/modules/6.14.0-rc5-xe+/kernel/kernel/ lib/modules/6.14.0-rc5-xe+/kernel/kernel/kheaders.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/ lib/modules/6.14.0-rc5-xe+/kernel/crypto/ecrdsa_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/xcbc.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/serpent_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/aria_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/crypto_simd.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/adiantum.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/tcrypt.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/crypto_engine.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/zstd.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/asymmetric_keys/ lib/modules/6.14.0-rc5-xe+/kernel/crypto/asymmetric_keys/pkcs7_test_key.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/asymmetric_keys/pkcs8_key_parser.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/des_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/xctr.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/authenc.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/sm4_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/camellia_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/sm3.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/pcrypt.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/aegis128.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/af_alg.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/algif_aead.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/cmac.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/sm3_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/aes_ti.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/chacha_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/poly1305_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/nhpoly1305.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/crc32_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/essiv.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/ccm.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/wp512.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/streebog_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/authencesn.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/echainiv.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/lrw.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/cryptd.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/crypto_user.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/algif_hash.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/polyval-generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/hctr2.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/842.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/pcbc.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/ansi_cprng.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/cast6_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/twofish_common.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/twofish_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/lz4hc.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/blowfish_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/md4.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/chacha20poly1305.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/curve25519-generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/lz4.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/rmd160.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/algif_skcipher.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/cast5_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/fcrypt.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/ecdsa_generic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/sm4.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/cast_common.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/blowfish_common.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/michael_mic.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/async_tx/ lib/modules/6.14.0-rc5-xe+/kernel/crypto/async_tx/async_xor.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/async_tx/async_tx.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/async_tx/async_memcpy.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/async_tx/async_pq.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/async_tx/async_raid6_recov.ko lib/modules/6.14.0-rc5-xe+/kernel/crypto/algif_rng.ko lib/modules/6.14.0-rc5-xe+/kernel/block/ lib/modules/6.14.0-rc5-xe+/kernel/block/bfq.ko lib/modules/6.14.0-rc5-xe+/kernel/block/kyber-iosched.ko lib/modules/6.14.0-rc5-xe+/build lib/modules/6.14.0-rc5-xe+/modules.alias.bin lib/modules/6.14.0-rc5-xe+/modules.builtin lib/modules/6.14.0-rc5-xe+/modules.softdep lib/modules/6.14.0-rc5-xe+/modules.alias lib/modules/6.14.0-rc5-xe+/modules.order lib/modules/6.14.0-rc5-xe+/modules.symbols lib/modules/6.14.0-rc5-xe+/modules.dep.bin + mv kernel-nodebug.tar.gz .. + cd .. + rm -rf archive ++ date +%s + echo -e '\e[0Ksection_end:1741088137:package_x86_64_nodebug\r\e[0K' ^[[0Ksection_end:1741088137:package_x86_64_nodebug ^[[0K + sync + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ CI.Hooks: success for drm/i915/display: convert intel_display.[ch] to struct intel_display 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula ` (8 preceding siblings ...) 2025-03-04 11:35 ` ✓ CI.Build: " Patchwork @ 2025-03-04 11:38 ` Patchwork 2025-03-04 11:39 ` ✗ CI.checksparse: warning " Patchwork ` (2 subsequent siblings) 12 siblings, 0 replies; 20+ messages in thread From: Patchwork @ 2025-03-04 11:38 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-xe == Series Details == Series: drm/i915/display: convert intel_display.[ch] to struct intel_display URL : https://patchwork.freedesktop.org/series/145758/ State : success == Summary == run-parts: executing /workspace/ci/hooks/00-showenv + export + grep -Ei '(^|\W)CI_' declare -x CI_KERNEL_BUILD_DIR="/workspace/kernel/build64-default" declare -x CI_KERNEL_SRC_DIR="/workspace/kernel" declare -x CI_TOOLS_SRC_DIR="/workspace/ci" declare -x CI_WORKSPACE_DIR="/workspace" run-parts: executing /workspace/ci/hooks/10-build-W1 + SRC_DIR=/workspace/kernel + RESTORE_DISPLAY_CONFIG=0 + '[' -n /workspace/kernel/build64-default ']' + BUILD_DIR=/workspace/kernel/build64-default + cd /workspace/kernel ++ nproc + make -j48 O=/workspace/kernel/build64-default modules_prepare make[1]: Entering directory '/workspace/kernel/build64-default' GEN Makefile DESCEND objtool INSTALL libsubcmd_headers CALL ../scripts/checksyscalls.sh CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/exec-cmd.o CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/help.o CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/pager.o CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/parse-options.o CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/run-command.o CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/sigchain.o CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/subcmd-config.o LD /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd-in.o AR /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd.a CC /workspace/kernel/build64-default/tools/objtool/weak.o CC /workspace/kernel/build64-default/tools/objtool/check.o CC /workspace/kernel/build64-default/tools/objtool/special.o CC /workspace/kernel/build64-default/tools/objtool/builtin-check.o CC /workspace/kernel/build64-default/tools/objtool/arch/x86/decode.o CC /workspace/kernel/build64-default/tools/objtool/arch/x86/special.o CC /workspace/kernel/build64-default/tools/objtool/elf.o CC /workspace/kernel/build64-default/tools/objtool/arch/x86/orc.o CC /workspace/kernel/build64-default/tools/objtool/objtool.o CC /workspace/kernel/build64-default/tools/objtool/orc_gen.o CC /workspace/kernel/build64-default/tools/objtool/orc_dump.o CC /workspace/kernel/build64-default/tools/objtool/libstring.o CC /workspace/kernel/build64-default/tools/objtool/libctype.o CC /workspace/kernel/build64-default/tools/objtool/str_error_r.o CC /workspace/kernel/build64-default/tools/objtool/librbtree.o LD /workspace/kernel/build64-default/tools/objtool/arch/x86/objtool-in.o LD /workspace/kernel/build64-default/tools/objtool/objtool-in.o LINK /workspace/kernel/build64-default/tools/objtool/objtool make[1]: Leaving directory '/workspace/kernel/build64-default' ++ nproc + make -j48 O=/workspace/kernel/build64-default W=1 drivers/gpu/drm/xe make[1]: Entering directory '/workspace/kernel/build64-default' make[2]: Nothing to be done for 'drivers/gpu/drm/xe'. make[1]: Leaving directory '/workspace/kernel/build64-default' run-parts: executing /workspace/ci/hooks/11-build-32b +++ realpath /workspace/ci/hooks/11-build-32b ++ dirname /workspace/ci/hooks/11-build-32b + THIS_SCRIPT_DIR=/workspace/ci/hooks + SRC_DIR=/workspace/kernel + TOOLS_SRC_DIR=/workspace/ci + '[' -n /workspace/kernel/build64-default ']' + BUILD_DIR=/workspace/kernel/build64-default + BUILD_DIR=/workspace/kernel/build64-default/build32 + cd /workspace/kernel + mkdir -p /workspace/kernel/build64-default/build32 ++ nproc + make -j48 ARCH=i386 O=/workspace/kernel/build64-default/build32 defconfig make[1]: Entering directory '/workspace/kernel/build64-default/build32' GEN Makefile HOSTCC scripts/basic/fixdep HOSTCC scripts/kconfig/conf.o HOSTCC scripts/kconfig/confdata.o HOSTCC scripts/kconfig/expr.o LEX scripts/kconfig/lexer.lex.c HOSTCC scripts/kconfig/menu.o YACC scripts/kconfig/parser.tab.[ch] HOSTCC scripts/kconfig/preprocess.o HOSTCC scripts/kconfig/symbol.o HOSTCC scripts/kconfig/util.o HOSTCC scripts/kconfig/lexer.lex.o HOSTCC scripts/kconfig/parser.tab.o HOSTLD scripts/kconfig/conf *** Default configuration is based on 'i386_defconfig' # # configuration written to .config # make[1]: Leaving directory '/workspace/kernel/build64-default/build32' + cd /workspace/kernel/build64-default/build32 + /workspace/kernel/scripts/kconfig/merge_config.sh .config /workspace/ci/kernel/fragments/10-xe.fragment Using .config as base Merging /workspace/ci/kernel/fragments/10-xe.fragment Value of CONFIG_DRM_XE is redefined by fragment /workspace/ci/kernel/fragments/10-xe.fragment: Previous value: # CONFIG_DRM_XE is not set New value: CONFIG_DRM_XE=m GEN Makefile WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n] Selected by [m]: - DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y] # # configuration written to .config # Value requested for CONFIG_HAVE_UID16 not in final .config Requested value: CONFIG_HAVE_UID16=y Actual value: Value requested for CONFIG_UID16 not in final .config Requested value: CONFIG_UID16=y Actual value: Value requested for CONFIG_X86_32 not in final .config Requested value: CONFIG_X86_32=y Actual value: Value requested for CONFIG_OUTPUT_FORMAT not in final .config Requested value: CONFIG_OUTPUT_FORMAT="elf32-i386" Actual value: CONFIG_OUTPUT_FORMAT="elf64-x86-64" Value requested for CONFIG_ARCH_MMAP_RND_BITS_MIN not in final .config Requested value: CONFIG_ARCH_MMAP_RND_BITS_MIN=8 Actual value: CONFIG_ARCH_MMAP_RND_BITS_MIN=28 Value requested for CONFIG_ARCH_MMAP_RND_BITS_MAX not in final .config Requested value: CONFIG_ARCH_MMAP_RND_BITS_MAX=16 Actual value: CONFIG_ARCH_MMAP_RND_BITS_MAX=32 Value requested for CONFIG_PGTABLE_LEVELS not in final .config Requested value: CONFIG_PGTABLE_LEVELS=2 Actual value: CONFIG_PGTABLE_LEVELS=5 Value requested for CONFIG_X86_BIGSMP not in final .config Requested value: # CONFIG_X86_BIGSMP is not set Actual value: Value requested for CONFIG_X86_INTEL_QUARK not in final .config Requested value: # CONFIG_X86_INTEL_QUARK is not set Actual value: Value requested for CONFIG_X86_RDC321X not in final .config Requested value: # CONFIG_X86_RDC321X is not set Actual value: Value requested for CONFIG_X86_32_NON_STANDARD not in final .config Requested value: # CONFIG_X86_32_NON_STANDARD is not set Actual value: Value requested for CONFIG_X86_32_IRIS not in final .config Requested value: # CONFIG_X86_32_IRIS is not set Actual value: Value requested for CONFIG_M486SX not in final .config Requested value: # CONFIG_M486SX is not set Actual value: Value requested for CONFIG_M486 not in final .config Requested value: # CONFIG_M486 is not set Actual value: Value requested for CONFIG_M586 not in final .config Requested value: # CONFIG_M586 is not set Actual value: Value requested for CONFIG_M586TSC not in final .config Requested value: # CONFIG_M586TSC is not set Actual value: Value requested for CONFIG_M586MMX not in final .config Requested value: # CONFIG_M586MMX is not set Actual value: Value requested for CONFIG_M686 not in final .config Requested value: CONFIG_M686=y Actual value: Value requested for CONFIG_MPENTIUMII not in final .config Requested value: # CONFIG_MPENTIUMII is not set Actual value: Value requested for CONFIG_MPENTIUMIII not in final .config Requested value: # CONFIG_MPENTIUMIII is not set Actual value: Value requested for CONFIG_MPENTIUMM not in final .config Requested value: # CONFIG_MPENTIUMM is not set Actual value: Value requested for CONFIG_MPENTIUM4 not in final .config Requested value: # CONFIG_MPENTIUM4 is not set Actual value: Value requested for CONFIG_MK6 not in final .config Requested value: # CONFIG_MK6 is not set Actual value: Value requested for CONFIG_MK7 not in final .config Requested value: # CONFIG_MK7 is not set Actual value: Value requested for CONFIG_MCRUSOE not in final .config Requested value: # CONFIG_MCRUSOE is not set Actual value: Value requested for CONFIG_MEFFICEON not in final .config Requested value: # CONFIG_MEFFICEON is not set Actual value: Value requested for CONFIG_MWINCHIPC6 not in final .config Requested value: # CONFIG_MWINCHIPC6 is not set Actual value: Value requested for CONFIG_MWINCHIP3D not in final .config Requested value: # CONFIG_MWINCHIP3D is not set Actual value: Value requested for CONFIG_MELAN not in final .config Requested value: # CONFIG_MELAN is not set Actual value: Value requested for CONFIG_MGEODEGX1 not in final .config Requested value: # CONFIG_MGEODEGX1 is not set Actual value: Value requested for CONFIG_MGEODE_LX not in final .config Requested value: # CONFIG_MGEODE_LX is not set Actual value: Value requested for CONFIG_MCYRIXIII not in final .config Requested value: # CONFIG_MCYRIXIII is not set Actual value: Value requested for CONFIG_MVIAC3_2 not in final .config Requested value: # CONFIG_MVIAC3_2 is not set Actual value: Value requested for CONFIG_MVIAC7 not in final .config Requested value: # CONFIG_MVIAC7 is not set Actual value: Value requested for CONFIG_X86_GENERIC not in final .config Requested value: # CONFIG_X86_GENERIC is not set Actual value: Value requested for CONFIG_X86_INTERNODE_CACHE_SHIFT not in final .config Requested value: CONFIG_X86_INTERNODE_CACHE_SHIFT=5 Actual value: CONFIG_X86_INTERNODE_CACHE_SHIFT=6 Value requested for CONFIG_X86_L1_CACHE_SHIFT not in final .config Requested value: CONFIG_X86_L1_CACHE_SHIFT=5 Actual value: CONFIG_X86_L1_CACHE_SHIFT=6 Value requested for CONFIG_X86_USE_PPRO_CHECKSUM not in final .config Requested value: CONFIG_X86_USE_PPRO_CHECKSUM=y Actual value: Value requested for CONFIG_X86_MINIMUM_CPU_FAMILY not in final .config Requested value: CONFIG_X86_MINIMUM_CPU_FAMILY=6 Actual value: CONFIG_X86_MINIMUM_CPU_FAMILY=64 Value requested for CONFIG_CPU_SUP_TRANSMETA_32 not in final .config Requested value: CONFIG_CPU_SUP_TRANSMETA_32=y Actual value: Value requested for CONFIG_CPU_SUP_VORTEX_32 not in final .config Requested value: CONFIG_CPU_SUP_VORTEX_32=y Actual value: Value requested for CONFIG_HPET_TIMER not in final .config Requested value: # CONFIG_HPET_TIMER is not set Actual value: CONFIG_HPET_TIMER=y Value requested for CONFIG_NR_CPUS_RANGE_END not in final .config Requested value: CONFIG_NR_CPUS_RANGE_END=8 Actual value: CONFIG_NR_CPUS_RANGE_END=512 Value requested for CONFIG_NR_CPUS_DEFAULT not in final .config Requested value: CONFIG_NR_CPUS_DEFAULT=8 Actual value: CONFIG_NR_CPUS_DEFAULT=64 Value requested for CONFIG_X86_ANCIENT_MCE not in final .config Requested value: # CONFIG_X86_ANCIENT_MCE is not set Actual value: Value requested for CONFIG_X86_LEGACY_VM86 not in final .config Requested value: # CONFIG_X86_LEGACY_VM86 is not set Actual value: Value requested for CONFIG_X86_ESPFIX32 not in final .config Requested value: CONFIG_X86_ESPFIX32=y Actual value: Value requested for CONFIG_TOSHIBA not in final .config Requested value: # CONFIG_TOSHIBA is not set Actual value: Value requested for CONFIG_X86_REBOOTFIXUPS not in final .config Requested value: # CONFIG_X86_REBOOTFIXUPS is not set Actual value: Value requested for CONFIG_MICROCODE_INITRD32 not in final .config Requested value: CONFIG_MICROCODE_INITRD32=y Actual value: Value requested for CONFIG_NOHIGHMEM not in final .config Requested value: # CONFIG_NOHIGHMEM is not set Actual value: Value requested for CONFIG_HIGHMEM4G not in final .config Requested value: CONFIG_HIGHMEM4G=y Actual value: Value requested for CONFIG_HIGHMEM64G not in final .config Requested value: # CONFIG_HIGHMEM64G is not set Actual value: Value requested for CONFIG_VMSPLIT_3G not in final .config Requested value: CONFIG_VMSPLIT_3G=y Actual value: Value requested for CONFIG_VMSPLIT_3G_OPT not in final .config Requested value: # CONFIG_VMSPLIT_3G_OPT is not set Actual value: Value requested for CONFIG_VMSPLIT_2G not in final .config Requested value: # CONFIG_VMSPLIT_2G is not set Actual value: Value requested for CONFIG_VMSPLIT_2G_OPT not in final .config Requested value: # CONFIG_VMSPLIT_2G_OPT is not set Actual value: Value requested for CONFIG_VMSPLIT_1G not in final .config Requested value: # CONFIG_VMSPLIT_1G is not set Actual value: Value requested for CONFIG_PAGE_OFFSET not in final .config Requested value: CONFIG_PAGE_OFFSET=0xC0000000 Actual value: Value requested for CONFIG_HIGHMEM not in final .config Requested value: CONFIG_HIGHMEM=y Actual value: Value requested for CONFIG_X86_PAE not in final .config Requested value: # CONFIG_X86_PAE is not set Actual value: Value requested for CONFIG_ARCH_FLATMEM_ENABLE not in final .config Requested value: CONFIG_ARCH_FLATMEM_ENABLE=y Actual value: Value requested for CONFIG_ARCH_SELECT_MEMORY_MODEL not in final .config Requested value: CONFIG_ARCH_SELECT_MEMORY_MODEL=y Actual value: Value requested for CONFIG_ILLEGAL_POINTER_VALUE not in final .config Requested value: CONFIG_ILLEGAL_POINTER_VALUE=0 Actual value: CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 Value requested for CONFIG_HIGHPTE not in final .config Requested value: # CONFIG_HIGHPTE is not set Actual value: Value requested for CONFIG_COMPAT_VDSO not in final .config Requested value: # CONFIG_COMPAT_VDSO is not set Actual value: Value requested for CONFIG_FUNCTION_PADDING_CFI not in final .config Requested value: CONFIG_FUNCTION_PADDING_CFI=0 Actual value: CONFIG_FUNCTION_PADDING_CFI=11 Value requested for CONFIG_FUNCTION_PADDING_BYTES not in final .config Requested value: CONFIG_FUNCTION_PADDING_BYTES=4 Actual value: CONFIG_FUNCTION_PADDING_BYTES=16 Value requested for CONFIG_APM not in final .config Requested value: # CONFIG_APM is not set Actual value: Value requested for CONFIG_X86_POWERNOW_K6 not in final .config Requested value: # CONFIG_X86_POWERNOW_K6 is not set Actual value: Value requested for CONFIG_X86_POWERNOW_K7 not in final .config Requested value: # CONFIG_X86_POWERNOW_K7 is not set Actual value: Value requested for CONFIG_X86_GX_SUSPMOD not in final .config Requested value: # CONFIG_X86_GX_SUSPMOD is not set Actual value: Value requested for CONFIG_X86_SPEEDSTEP_ICH not in final .config Requested value: # CONFIG_X86_SPEEDSTEP_ICH is not set Actual value: Value requested for CONFIG_X86_SPEEDSTEP_SMI not in final .config Requested value: # CONFIG_X86_SPEEDSTEP_SMI is not set Actual value: Value requested for CONFIG_X86_CPUFREQ_NFORCE2 not in final .config Requested value: # CONFIG_X86_CPUFREQ_NFORCE2 is not set Actual value: Value requested for CONFIG_X86_LONGRUN not in final .config Requested value: # CONFIG_X86_LONGRUN is not set Actual value: Value requested for CONFIG_X86_LONGHAUL not in final .config Requested value: # CONFIG_X86_LONGHAUL is not set Actual value: Value requested for CONFIG_X86_E_POWERSAVER not in final .config Requested value: # CONFIG_X86_E_POWERSAVER is not set Actual value: Value requested for CONFIG_PCI_GOBIOS not in final .config Requested value: # CONFIG_PCI_GOBIOS is not set Actual value: Value requested for CONFIG_PCI_GOMMCONFIG not in final .config Requested value: # CONFIG_PCI_GOMMCONFIG is not set Actual value: Value requested for CONFIG_PCI_GODIRECT not in final .config Requested value: # CONFIG_PCI_GODIRECT is not set Actual value: Value requested for CONFIG_PCI_GOANY not in final .config Requested value: CONFIG_PCI_GOANY=y Actual value: Value requested for CONFIG_PCI_BIOS not in final .config Requested value: CONFIG_PCI_BIOS=y Actual value: Value requested for CONFIG_ISA not in final .config Requested value: # CONFIG_ISA is not set Actual value: Value requested for CONFIG_SCx200 not in final .config Requested value: # CONFIG_SCx200 is not set Actual value: Value requested for CONFIG_OLPC not in final .config Requested value: # CONFIG_OLPC is not set Actual value: Value requested for CONFIG_ALIX not in final .config Requested value: # CONFIG_ALIX is not set Actual value: Value requested for CONFIG_NET5501 not in final .config Requested value: # CONFIG_NET5501 is not set Actual value: Value requested for CONFIG_GEOS not in final .config Requested value: # CONFIG_GEOS is not set Actual value: Value requested for CONFIG_COMPAT_32 not in final .config Requested value: CONFIG_COMPAT_32=y Actual value: Value requested for CONFIG_HAVE_ATOMIC_IOMAP not in final .config Requested value: CONFIG_HAVE_ATOMIC_IOMAP=y Actual value: Value requested for CONFIG_ARCH_32BIT_OFF_T not in final .config Requested value: CONFIG_ARCH_32BIT_OFF_T=y Actual value: Value requested for CONFIG_ARCH_WANT_IPC_PARSE_VERSION not in final .config Requested value: CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y Actual value: Value requested for CONFIG_MODULES_USE_ELF_REL not in final .config Requested value: CONFIG_MODULES_USE_ELF_REL=y Actual value: Value requested for CONFIG_ARCH_MMAP_RND_BITS not in final .config Requested value: CONFIG_ARCH_MMAP_RND_BITS=8 Actual value: CONFIG_ARCH_MMAP_RND_BITS=28 Value requested for CONFIG_CLONE_BACKWARDS not in final .config Requested value: CONFIG_CLONE_BACKWARDS=y Actual value: Value requested for CONFIG_OLD_SIGSUSPEND3 not in final .config Requested value: CONFIG_OLD_SIGSUSPEND3=y Actual value: Value requested for CONFIG_OLD_SIGACTION not in final .config Requested value: CONFIG_OLD_SIGACTION=y Actual value: Value requested for CONFIG_ARCH_SPLIT_ARG64 not in final .config Requested value: CONFIG_ARCH_SPLIT_ARG64=y Actual value: Value requested for CONFIG_FUNCTION_ALIGNMENT not in final .config Requested value: CONFIG_FUNCTION_ALIGNMENT=4 Actual value: CONFIG_FUNCTION_ALIGNMENT=16 Value requested for CONFIG_SELECT_MEMORY_MODEL not in final .config Requested value: CONFIG_SELECT_MEMORY_MODEL=y Actual value: Value requested for CONFIG_FLATMEM_MANUAL not in final .config Requested value: CONFIG_FLATMEM_MANUAL=y Actual value: Value requested for CONFIG_SPARSEMEM_MANUAL not in final .config Requested value: # CONFIG_SPARSEMEM_MANUAL is not set Actual value: Value requested for CONFIG_FLATMEM not in final .config Requested value: CONFIG_FLATMEM=y Actual value: Value requested for CONFIG_SPARSEMEM_STATIC not in final .config Requested value: CONFIG_SPARSEMEM_STATIC=y Actual value: Value requested for CONFIG_BOUNCE not in final .config Requested value: CONFIG_BOUNCE=y Actual value: Value requested for CONFIG_KMAP_LOCAL not in final .config Requested value: CONFIG_KMAP_LOCAL=y Actual value: Value requested for CONFIG_HOTPLUG_PCI_COMPAQ not in final .config Requested value: # CONFIG_HOTPLUG_PCI_COMPAQ is not set Actual value: Value requested for CONFIG_HOTPLUG_PCI_IBM not in final .config Requested value: # CONFIG_HOTPLUG_PCI_IBM is not set Actual value: Value requested for CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH not in final .config Requested value: CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH=y Actual value: Value requested for CONFIG_PCH_PHUB not in final .config Requested value: # CONFIG_PCH_PHUB is not set Actual value: Value requested for CONFIG_SCSI_NSP32 not in final .config Requested value: # CONFIG_SCSI_NSP32 is not set Actual value: Value requested for CONFIG_PATA_CS5520 not in final .config Requested value: # CONFIG_PATA_CS5520 is not set Actual value: Value requested for CONFIG_PATA_CS5530 not in final .config Requested value: # CONFIG_PATA_CS5530 is not set Actual value: Value requested for CONFIG_PATA_CS5535 not in final .config Requested value: # CONFIG_PATA_CS5535 is not set Actual value: Value requested for CONFIG_PATA_CS5536 not in final .config Requested value: # CONFIG_PATA_CS5536 is not set Actual value: Value requested for CONFIG_PATA_SC1200 not in final .config Requested value: # CONFIG_PATA_SC1200 is not set Actual value: Value requested for CONFIG_PCH_GBE not in final .config Requested value: # CONFIG_PCH_GBE is not set Actual value: Value requested for CONFIG_INPUT_WISTRON_BTNS not in final .config Requested value: # CONFIG_INPUT_WISTRON_BTNS is not set Actual value: Value requested for CONFIG_SERIAL_TIMBERDALE not in final .config Requested value: # CONFIG_SERIAL_TIMBERDALE is not set Actual value: Value requested for CONFIG_SERIAL_PCH_UART not in final .config Requested value: # CONFIG_SERIAL_PCH_UART is not set Actual value: Value requested for CONFIG_HW_RANDOM_GEODE not in final .config Requested value: CONFIG_HW_RANDOM_GEODE=y Actual value: Value requested for CONFIG_SONYPI not in final .config Requested value: # CONFIG_SONYPI is not set Actual value: Value requested for CONFIG_PC8736x_GPIO not in final .config Requested value: # CONFIG_PC8736x_GPIO is not set Actual value: Value requested for CONFIG_NSC_GPIO not in final .config Requested value: # CONFIG_NSC_GPIO is not set Actual value: Value requested for CONFIG_I2C_EG20T not in final .config Requested value: # CONFIG_I2C_EG20T is not set Actual value: Value requested for CONFIG_SCx200_ACB not in final .config Requested value: # CONFIG_SCx200_ACB is not set Actual value: Value requested for CONFIG_PTP_1588_CLOCK_PCH not in final .config Requested value: # CONFIG_PTP_1588_CLOCK_PCH is not set Actual value: Value requested for CONFIG_SBC8360_WDT not in final .config Requested value: # CONFIG_SBC8360_WDT is not set Actual value: Value requested for CONFIG_SBC7240_WDT not in final .config Requested value: # CONFIG_SBC7240_WDT is not set Actual value: Value requested for CONFIG_MFD_CS5535 not in final .config Requested value: # CONFIG_MFD_CS5535 is not set Actual value: Value requested for CONFIG_AGP_ALI not in final .config Requested value: # CONFIG_AGP_ALI is not set Actual value: Value requested for CONFIG_AGP_ATI not in final .config Requested value: # CONFIG_AGP_ATI is not set Actual value: Value requested for CONFIG_AGP_AMD not in final .config Requested value: # CONFIG_AGP_AMD is not set Actual value: Value requested for CONFIG_AGP_NVIDIA not in final .config Requested value: # CONFIG_AGP_NVIDIA is not set Actual value: Value requested for CONFIG_AGP_SWORKS not in final .config Requested value: # CONFIG_AGP_SWORKS is not set Actual value: Value requested for CONFIG_AGP_EFFICEON not in final .config Requested value: # CONFIG_AGP_EFFICEON is not set Actual value: Value requested for CONFIG_SND_CS5530 not in final .config Requested value: # CONFIG_SND_CS5530 is not set Actual value: Value requested for CONFIG_SND_CS5535AUDIO not in final .config Requested value: # CONFIG_SND_CS5535AUDIO is not set Actual value: Value requested for CONFIG_SND_SIS7019 not in final .config Requested value: # CONFIG_SND_SIS7019 is not set Actual value: Value requested for CONFIG_LEDS_OT200 not in final .config Requested value: # CONFIG_LEDS_OT200 is not set Actual value: Value requested for CONFIG_PCH_DMA not in final .config Requested value: # CONFIG_PCH_DMA is not set Actual value: Value requested for CONFIG_CLKSRC_I8253 not in final .config Requested value: CONFIG_CLKSRC_I8253=y Actual value: Value requested for CONFIG_MAILBOX not in final .config Requested value: # CONFIG_MAILBOX is not set Actual value: CONFIG_MAILBOX=y Value requested for CONFIG_CRYPTO_SERPENT_SSE2_586 not in final .config Requested value: # CONFIG_CRYPTO_SERPENT_SSE2_586 is not set Actual value: Value requested for CONFIG_CRYPTO_TWOFISH_586 not in final .config Requested value: # CONFIG_CRYPTO_TWOFISH_586 is not set Actual value: Value requested for CONFIG_CRYPTO_DEV_GEODE not in final .config Requested value: # CONFIG_CRYPTO_DEV_GEODE is not set Actual value: Value requested for CONFIG_CRYPTO_DEV_HIFN_795X not in final .config Requested value: # CONFIG_CRYPTO_DEV_HIFN_795X is not set Actual value: Value requested for CONFIG_CRYPTO_LIB_POLY1305_RSIZE not in final .config Requested value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 Actual value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 Value requested for CONFIG_AUDIT_GENERIC not in final .config Requested value: CONFIG_AUDIT_GENERIC=y Actual value: Value requested for CONFIG_GENERIC_VDSO_32 not in final .config Requested value: CONFIG_GENERIC_VDSO_32=y Actual value: Value requested for CONFIG_DEBUG_KMAP_LOCAL not in final .config Requested value: # CONFIG_DEBUG_KMAP_LOCAL is not set Actual value: Value requested for CONFIG_DEBUG_HIGHMEM not in final .config Requested value: # CONFIG_DEBUG_HIGHMEM is not set Actual value: Value requested for CONFIG_HAVE_DEBUG_STACKOVERFLOW not in final .config Requested value: CONFIG_HAVE_DEBUG_STACKOVERFLOW=y Actual value: Value requested for CONFIG_DEBUG_STACKOVERFLOW not in final .config Requested value: # CONFIG_DEBUG_STACKOVERFLOW is not set Actual value: Value requested for CONFIG_HAVE_FUNCTION_GRAPH_TRACER not in final .config Requested value: CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y Actual value: Value requested for CONFIG_HAVE_FUNCTION_GRAPH_FREGS not in final .config Requested value: CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y Actual value: Value requested for CONFIG_HAVE_FTRACE_GRAPH_FUNC not in final .config Requested value: CONFIG_HAVE_FTRACE_GRAPH_FUNC=y Actual value: Value requested for CONFIG_DRM_KUNIT_TEST not in final .config Requested value: CONFIG_DRM_KUNIT_TEST=m Actual value: Value requested for CONFIG_DRM_XE_WERROR not in final .config Requested value: CONFIG_DRM_XE_WERROR=y Actual value: Value requested for CONFIG_DRM_XE_DEBUG not in final .config Requested value: CONFIG_DRM_XE_DEBUG=y Actual value: Value requested for CONFIG_DRM_XE_DEBUG_MEM not in final .config Requested value: CONFIG_DRM_XE_DEBUG_MEM=y Actual value: Value requested for CONFIG_DRM_XE_KUNIT_TEST not in final .config Requested value: CONFIG_DRM_XE_KUNIT_TEST=m Actual value: ++ nproc + make -j48 ARCH=i386 olddefconfig GEN Makefile WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n] Selected by [m]: - DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y] # # configuration written to .config # ++ nproc + make -j48 ARCH=i386 SYNC include/config/auto.conf.cmd GEN Makefile WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n] Selected by [m]: - DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y] WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n] Selected by [m]: - DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y] WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n] Selected by [m]: - DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y] GEN Makefile WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h WRAP arch/x86/include/generated/uapi/asm/errno.h WRAP arch/x86/include/generated/uapi/asm/fcntl.h UPD include/generated/uapi/linux/version.h SYSHDR arch/x86/include/generated/uapi/asm/unistd_32.h WRAP arch/x86/include/generated/uapi/asm/ioctl.h SYSHDR arch/x86/include/generated/uapi/asm/unistd_64.h WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h SYSHDR arch/x86/include/generated/uapi/asm/unistd_x32.h WRAP arch/x86/include/generated/uapi/asm/ioctls.h WRAP arch/x86/include/generated/uapi/asm/param.h SYSTBL arch/x86/include/generated/asm/syscalls_32.h WRAP arch/x86/include/generated/uapi/asm/poll.h WRAP arch/x86/include/generated/uapi/asm/resource.h WRAP arch/x86/include/generated/uapi/asm/socket.h WRAP arch/x86/include/generated/uapi/asm/sockios.h WRAP arch/x86/include/generated/uapi/asm/termbits.h WRAP arch/x86/include/generated/uapi/asm/termios.h WRAP arch/x86/include/generated/uapi/asm/types.h UPD include/generated/compile.h HOSTCC arch/x86/tools/relocs_32.o HOSTCC arch/x86/tools/relocs_64.o HOSTCC arch/x86/tools/relocs_common.o WRAP arch/x86/include/generated/asm/early_ioremap.h WRAP arch/x86/include/generated/asm/fprobe.h WRAP arch/x86/include/generated/asm/mcs_spinlock.h WRAP arch/x86/include/generated/asm/mmzone.h WRAP arch/x86/include/generated/asm/irq_regs.h WRAP arch/x86/include/generated/asm/kmap_size.h WRAP arch/x86/include/generated/asm/local64.h WRAP arch/x86/include/generated/asm/mmiowb.h WRAP arch/x86/include/generated/asm/module.lds.h WRAP arch/x86/include/generated/asm/rwonce.h HOSTCC scripts/kallsyms HOSTCC scripts/sorttable HOSTCC scripts/asn1_compiler HOSTCC scripts/selinux/mdp/mdp HOSTLD arch/x86/tools/relocs UPD include/config/kernel.release UPD include/generated/utsrelease.h CC scripts/mod/empty.o HOSTCC scripts/mod/mk_elfconfig CC scripts/mod/devicetable-offsets.s UPD scripts/mod/devicetable-offsets.h MKELF scripts/mod/elfconfig.h HOSTCC scripts/mod/modpost.o HOSTCC scripts/mod/file2alias.o HOSTCC scripts/mod/sumversion.o HOSTCC scripts/mod/symsearch.o HOSTLD scripts/mod/modpost CC kernel/bounds.s CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-arch-fallback.h CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-instrumented.h CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-long.h UPD include/generated/timeconst.h UPD include/generated/bounds.h CC arch/x86/kernel/asm-offsets.s UPD include/generated/asm-offsets.h CALL /workspace/kernel/scripts/checksyscalls.sh LDS scripts/module.lds CC init/main.o HOSTCC usr/gen_init_cpio CC init/do_mounts.o CC certs/system_keyring.o CC init/do_mounts_initrd.o CC ipc/util.o UPD init/utsversion-tmp.h CC init/initramfs.o CC ipc/msgutil.o CC io_uring/io_uring.o CC init/calibrate.o CC ipc/msg.o AS arch/x86/entry/entry.o CC io_uring/opdef.o CC security/commoncap.o CC init/init_task.o CC ipc/sem.o CC block/bdev.o AS arch/x86/entry/entry_32.o CC mm/filemap.o CC arch/x86/power/cpu.o AR arch/x86/crypto/built-in.a CC arch/x86/realmode/init.o CC arch/x86/entry/syscall_32.o CC io_uring/kbuf.o CC arch/x86/pci/i386.o AR arch/x86/net/built-in.a AS arch/x86/lib/atomic64_cx8_32.o CC arch/x86/video/video-common.o AR arch/x86/entry/vsyscall/built-in.a HOSTCC security/selinux/genheaders CC block/partitions/core.o CC security/keys/gc.o CC security/integrity/iint.o AR virt/lib/built-in.a CC arch/x86/events/amd/core.o AR drivers/cache/built-in.a AR arch/x86/platform/atom/built-in.a CC arch/x86/mm/pat/set_memory.o CC arch/x86/kernel/fpu/init.o CC lib/math/div64.o CC arch/x86/events/intel/core.o CC arch/x86/virt/svm/cmdline.o AR virt/built-in.a CC fs/notify/dnotify/dnotify.o CC net/core/sock.o CC sound/core/seq/seq.o CC lib/math/gcd.o AR arch/x86/virt/vmx/built-in.a AR drivers/irqchip/built-in.a AR sound/i2c/other/built-in.a CC security/lsm_syscalls.o CC arch/x86/entry/vdso/vma.o AS arch/x86/lib/checksum_32.o AR arch/x86/platform/ce4100/built-in.a CC net/ethernet/eth.o AR sound/i2c/built-in.a CC arch/x86/lib/cmdline.o AR drivers/bus/mhi/built-in.a CC block/fops.o CC arch/x86/platform/efi/memmap.o CC arch/x86/pci/init.o AR drivers/bus/built-in.a CC kernel/sched/core.o CC block/partitions/msdos.o AR drivers/pwm/built-in.a CC crypto/asymmetric_keys/asymmetric_type.o CC block/partitions/efi.o AR drivers/leds/trigger/built-in.a AR drivers/leds/blink/built-in.a AR arch/x86/virt/svm/built-in.a AR arch/x86/virt/built-in.a AR drivers/leds/simple/built-in.a CC drivers/leds/led-core.o AS arch/x86/realmode/rm/header.o AS arch/x86/lib/cmpxchg8b_emu.o CC arch/x86/lib/cpu.o AS arch/x86/realmode/rm/trampoline_32.o CC lib/math/lcm.o GEN security/selinux/flask.h security/selinux/av_permissions.h CC security/selinux/avc.o AS arch/x86/realmode/rm/stack.o CC lib/math/int_log.o AS arch/x86/realmode/rm/reboot.o AS arch/x86/realmode/rm/wakeup_asm.o CC arch/x86/realmode/rm/wakemain.o CC lib/math/int_pow.o CC ipc/shm.o GEN usr/initramfs_data.cpio COPY usr/initramfs_inc_data AS usr/initramfs_data.o CC arch/x86/realmode/rm/video-mode.o CC lib/math/int_sqrt.o HOSTCC certs/extract-cert CC arch/x86/kernel/fpu/bugs.o AR usr/built-in.a CC arch/x86/entry/common.o CC lib/math/reciprocal_div.o AS arch/x86/realmode/rm/copy.o CC arch/x86/kernel/fpu/core.o AS arch/x86/realmode/rm/bioscall.o CC arch/x86/realmode/rm/regs.o CC lib/math/rational.o CC arch/x86/realmode/rm/video-vga.o CC arch/x86/lib/delay.o CC sound/core/seq/seq_lock.o AS arch/x86/entry/thunk.o CC arch/x86/pci/pcbios.o AR arch/x86/video/built-in.a CC arch/x86/pci/mmconfig_32.o CC arch/x86/realmode/rm/video-vesa.o CERT certs/x509_certificate_list CERT certs/signing_key.x509 AS certs/system_certificates.o AR certs/built-in.a CC security/min_addr.o CC arch/x86/entry/vdso/extable.o CC security/integrity/integrity_audit.o AR arch/x86/platform/geode/built-in.a CC arch/x86/realmode/rm/video-bios.o AR net/802/built-in.a CC crypto/asymmetric_keys/restrict.o CC drivers/leds/led-class.o CC arch/x86/kernel/fpu/regset.o CC arch/x86/power/hibernate_32.o CC sound/core/sound.o CC drivers/leds/led-triggers.o CC fs/notify/inotify/inotify_fsnotify.o CC security/keys/key.o PASYMS arch/x86/realmode/rm/pasyms.h CC arch/x86/kernel/fpu/signal.o AR fs/notify/dnotify/built-in.a CC arch/x86/platform/efi/quirks.o CC arch/x86/events/zhaoxin/core.o CC arch/x86/platform/efi/efi.o CC arch/x86/events/intel/bts.o LDS arch/x86/realmode/rm/realmode.lds AS arch/x86/lib/getuser.o LD arch/x86/realmode/rm/realmode.elf RELOCS arch/x86/realmode/rm/realmode.relocs OBJCOPY arch/x86/realmode/rm/realmode.bin AS arch/x86/realmode/rmpiggy.o GEN arch/x86/lib/inat-tables.c CC security/selinux/hooks.o CC arch/x86/mm/pat/memtype.o AR arch/x86/realmode/built-in.a CC arch/x86/lib/insn-eval.o LDS arch/x86/entry/vdso/vdso32/vdso32.lds AR lib/math/built-in.a CC lib/crypto/mpi/generic_mpih-lshift.o CC sound/core/seq/seq_clientmgr.o CC arch/x86/kernel/cpu/mce/core.o AR block/partitions/built-in.a CC arch/x86/kernel/acpi/boot.o CC mm/mempool.o CC crypto/api.o CC arch/x86/events/amd/lbr.o CC lib/crypto/mpi/generic_mpih-mul1.o CC arch/x86/kernel/apic/apic.o CC arch/x86/kernel/apic/apic_common.o CC arch/x86/mm/init.o CC block/bio.o CC crypto/asymmetric_keys/signature.o CC kernel/sched/fair.o AR sound/drivers/opl3/built-in.a AR sound/drivers/opl4/built-in.a CC arch/x86/mm/pat/memtype_interval.o CC security/selinux/selinuxfs.o AR sound/drivers/mpu401/built-in.a CC sound/core/init.o AR sound/drivers/vx/built-in.a AR sound/drivers/pcsp/built-in.a CC fs/notify/inotify/inotify_user.o AR sound/drivers/built-in.a CC arch/x86/pci/direct.o AS arch/x86/entry/vdso/vdso32/note.o CC kernel/sched/build_policy.o CC arch/x86/kernel/acpi/sleep.o AR fs/notify/fanotify/built-in.a CC arch/x86/kernel/cpu/mce/severity.o AR net/ethernet/built-in.a CC mm/oom_kill.o CC mm/fadvise.o AR security/integrity/built-in.a CC crypto/asymmetric_keys/public_key.o AS arch/x86/entry/vdso/vdso32/system_call.o AS arch/x86/entry/vdso/vdso32/sigreturn.o CC init/version.o CC arch/x86/entry/vdso/vdso32/vclock_gettime.o AS arch/x86/power/hibernate_asm_32.o CC arch/x86/power/hibernate.o AR drivers/leds/built-in.a CC io_uring/rsrc.o CC drivers/pci/msi/pcidev_msi.o AR sound/isa/ad1816a/built-in.a AR sound/isa/ad1848/built-in.a CC io_uring/notif.o AR sound/isa/cs423x/built-in.a AR sound/isa/es1688/built-in.a AR sound/isa/galaxy/built-in.a AR sound/isa/gus/built-in.a AR sound/isa/msnd/built-in.a AR sound/isa/opti9xx/built-in.a CC arch/x86/lib/insn.o AR sound/isa/sb/built-in.a AR sound/isa/wavefront/built-in.a AR sound/isa/wss/built-in.a AR sound/isa/built-in.a AR init/built-in.a CC lib/crypto/mpi/generic_mpih-mul2.o CC arch/x86/entry/vdso/vdso32/vgetcpu.o CC lib/crypto/mpi/generic_mpih-mul3.o CC sound/core/memory.o AR arch/x86/events/zhaoxin/built-in.a CC security/security.o CC arch/x86/kernel/fpu/xstate.o CC security/keys/keyring.o CC ipc/syscall.o CC arch/x86/kernel/kprobes/core.o AR drivers/idle/built-in.a CC kernel/locking/mutex.o CC drivers/video/console/dummycon.o CC arch/x86/kernel/cpu/mtrr/mtrr.o CC arch/x86/platform/efi/efi_32.o CC lib/zlib_inflate/inffast.o CC lib/zlib_deflate/deflate.o CC kernel/locking/semaphore.o CC ipc/ipc_sysctl.o CC lib/zlib_inflate/inflate.o CC arch/x86/events/amd/ibs.o AR arch/x86/mm/pat/built-in.a CC arch/x86/kernel/apic/apic_noop.o CC arch/x86/lib/kaslr.o CC lib/crypto/memneq.o CC arch/x86/pci/mmconfig-shared.o AR arch/x86/platform/iris/built-in.a ASN.1 crypto/asymmetric_keys/x509.asn1.[ch] ASN.1 crypto/asymmetric_keys/x509_akid.asn1.[ch] CC crypto/asymmetric_keys/x509_loader.o CC arch/x86/events/intel/ds.o CC arch/x86/mm/init_32.o AS arch/x86/kernel/acpi/wakeup_32.o CC drivers/pci/msi/api.o CC arch/x86/kernel/acpi/cstate.o HOSTCC arch/x86/entry/vdso/vdso2c CC arch/x86/lib/memcpy_32.o CC arch/x86/events/intel/knc.o AR arch/x86/power/built-in.a CC lib/zlib_deflate/deftree.o CC arch/x86/kernel/cpu/mce/genpool.o CC fs/notify/fsnotify.o AS arch/x86/lib/memmove_32.o CC arch/x86/lib/misc.o AR fs/notify/inotify/built-in.a CC kernel/locking/rwsem.o CC drivers/pci/pcie/portdrv.o CC sound/core/seq/seq_memory.o CC lib/crypto/mpi/generic_mpih-rshift.o CC crypto/asymmetric_keys/x509_public_key.o CC arch/x86/lib/pc-conf-reg.o CC lib/zlib_deflate/deflate_syms.o CC block/elevator.o CC security/selinux/netlink.o CC drivers/video/console/vgacon.o CC arch/x86/kernel/cpu/mce/intel.o AS arch/x86/lib/putuser.o CC lib/zlib_inflate/infutil.o AS arch/x86/lib/retpoline.o AS arch/x86/platform/efi/efi_stub_32.o CC arch/x86/platform/efi/runtime-map.o CC arch/x86/mm/fault.o CC arch/x86/lib/string_32.o CC arch/x86/kernel/cpu/mtrr/if.o CC ipc/mqueue.o CC arch/x86/entry/vdso/vdso32-setup.o CC arch/x86/lib/strstr_32.o CC fs/notify/notification.o CC arch/x86/lib/usercopy.o AR sound/pci/ac97/built-in.a AR sound/pci/ali5451/built-in.a AR arch/x86/kernel/acpi/built-in.a CC arch/x86/kernel/kprobes/opt.o AR sound/pci/asihpi/built-in.a AR drivers/char/ipmi/built-in.a AR sound/pci/au88x0/built-in.a CC arch/x86/platform/intel/iosf_mbi.o AR sound/pci/aw2/built-in.a AR sound/pci/ctxfi/built-in.a CC arch/x86/kernel/cpu/microcode/core.o AR sound/pci/ca0106/built-in.a AR sound/pci/cs46xx/built-in.a CC drivers/video/backlight/backlight.o AR sound/pci/cs5535audio/built-in.a AR sound/pci/lola/built-in.a CC arch/x86/kernel/apic/ipi.o AR sound/pci/lx6464es/built-in.a CC arch/x86/events/core.o CC lib/zlib_inflate/inftrees.o AR sound/pci/echoaudio/built-in.a AR lib/zlib_deflate/built-in.a AR sound/pci/emu10k1/built-in.a CC lib/crypto/mpi/generic_mpih-sub1.o CC arch/x86/events/probe.o CC sound/pci/hda/hda_bind.o AR arch/x86/platform/intel-mid/built-in.a ASN.1 crypto/asymmetric_keys/pkcs7.asn1.[ch] CC crypto/asymmetric_keys/pkcs7_trust.o AR arch/x86/kernel/fpu/built-in.a AR sound/ppc/built-in.a VDSO arch/x86/entry/vdso/vdso32.so.dbg CC lib/lzo/lzo1x_compress.o CC lib/lzo/lzo1x_decompress_safe.o CC drivers/pci/msi/msi.o CC lib/lz4/lz4_decompress.o OBJCOPY arch/x86/entry/vdso/vdso32.so CC arch/x86/lib/usercopy_32.o VDSO2C arch/x86/entry/vdso/vdso-image-32.c CC arch/x86/entry/vdso/vdso-image-32.o CC security/keys/keyctl.o CC lib/crypto/utils.o CC lib/zlib_inflate/inflate_syms.o CC arch/x86/kernel/cpu/mce/amd.o CC net/core/request_sock.o CC sound/pci/hda/hda_codec.o CC arch/x86/pci/fixup.o AR sound/pci/ice1712/built-in.a CC crypto/asymmetric_keys/pkcs7_verify.o CC security/keys/permission.o CC mm/maccess.o CC lib/crypto/chacha.o CC drivers/pci/pcie/rcec.o CC kernel/locking/percpu-rwsem.o CC sound/core/seq/seq_queue.o CC arch/x86/events/amd/uncore.o CC lib/crypto/aes.o CC arch/x86/kernel/cpu/mtrr/generic.o CC security/selinux/nlmsgtab.o AR arch/x86/entry/vdso/built-in.a AR arch/x86/entry/built-in.a CC drivers/pci/pcie/bwctrl.o CC drivers/acpi/acpica/dsargs.o CC drivers/pnp/pnpacpi/core.o CC arch/x86/lib/msr-smp.o CC fs/notify/group.o CC kernel/power/qos.o AR arch/x86/platform/efi/built-in.a CC kernel/printk/printk.o CC io_uring/tctx.o CC kernel/irq/irqdesc.o AR lib/zlib_inflate/built-in.a CC drivers/acpi/acpica/dscontrol.o CC arch/x86/kernel/apic/vector.o CC ipc/namespace.o AR lib/lzo/built-in.a CC crypto/cipher.o AR drivers/video/console/built-in.a CC lib/crypto/mpi/generic_mpih-add1.o CC sound/core/control.o CC arch/x86/kernel/cpu/microcode/intel.o AR arch/x86/platform/intel/built-in.a AR arch/x86/platform/intel-quark/built-in.a AR arch/x86/platform/olpc/built-in.a CC block/blk-core.o CC crypto/asymmetric_keys/x509.asn1.o AR arch/x86/platform/scx200/built-in.a AR arch/x86/platform/ts5500/built-in.a CC crypto/asymmetric_keys/x509_akid.asn1.o AR arch/x86/platform/uv/built-in.a CC arch/x86/lib/cache-smp.o AR arch/x86/platform/built-in.a CC crypto/asymmetric_keys/x509_cert_parser.o CC arch/x86/lib/crc32-glue.o AR arch/x86/kernel/kprobes/built-in.a CC net/core/skbuff.o AR sound/arm/built-in.a CC arch/x86/kernel/cpu/microcode/amd.o CC security/keys/process_keys.o AR drivers/video/backlight/built-in.a AR drivers/video/fbdev/core/built-in.a AR drivers/video/fbdev/omap/built-in.a LDS arch/x86/kernel/vmlinux.lds CC lib/crypto/mpi/mpicoder.o AR drivers/video/fbdev/omap2/omapfb/dss/built-in.a CC drivers/video/aperture.o CC drivers/acpi/acpica/dsdebug.o AR drivers/video/fbdev/omap2/omapfb/displays/built-in.a CC kernel/locking/spinlock.o AR drivers/video/fbdev/omap2/omapfb/built-in.a AR drivers/video/fbdev/omap2/built-in.a CC mm/page-writeback.o AR drivers/video/fbdev/built-in.a CC arch/x86/events/utils.o CC kernel/printk/printk_safe.o CC arch/x86/mm/ioremap.o AR sound/pci/korg1212/built-in.a CC drivers/pci/msi/irqdomain.o CC drivers/pnp/pnpacpi/rsparser.o CC arch/x86/kernel/cpu/cacheinfo.o CC sound/core/seq/seq_fifo.o CC ipc/mq_sysctl.o CC arch/x86/pci/acpi.o CC drivers/pci/pcie/aspm.o CC fs/notify/mark.o AS arch/x86/lib/crc32-pclmul.o CC lib/crypto/mpi/mpi-add.o CC arch/x86/lib/msr.o CC arch/x86/events/intel/lbr.o AR drivers/amba/built-in.a CC block/blk-sysfs.o CC sound/core/misc.o CC kernel/irq/handle.o CC kernel/rcu/update.o CC drivers/acpi/acpica/dsfield.o CC arch/x86/kernel/cpu/scattered.o CC kernel/locking/osq_lock.o CC crypto/asymmetric_keys/pkcs7.asn1.o AR kernel/livepatch/built-in.a CC kernel/printk/nbcon.o CC kernel/locking/qspinlock.o CC crypto/asymmetric_keys/pkcs7_parser.o CC arch/x86/kernel/cpu/mtrr/cleanup.o CC io_uring/filetable.o AR lib/lz4/built-in.a AR arch/x86/events/amd/built-in.a CC sound/core/device.o AS arch/x86/lib/msr-reg.o CC drivers/video/cmdline.o CC drivers/video/nomodeset.o AR ipc/built-in.a CC kernel/rcu/sync.o CC kernel/power/main.o CC sound/pci/hda/hda_jack.o CC sound/core/seq/seq_prioq.o CC arch/x86/kernel/cpu/mce/threshold.o CC fs/nfs_common/nfsacl.o CC kernel/rcu/srcutree.o CC arch/x86/pci/legacy.o AR drivers/pci/pwrctrl/built-in.a CC drivers/acpi/acpica/dsinit.o CC drivers/pci/pcie/pme.o CC lib/zstd/zstd_decompress_module.o CC arch/x86/events/intel/p4.o CC kernel/locking/rtmutex_api.o AR arch/x86/kernel/cpu/microcode/built-in.a CC kernel/irq/manage.o CC io_uring/rw.o CC arch/x86/mm/extable.o AR drivers/pci/msi/built-in.a CC security/keys/request_key.o CC lib/crypto/mpi/mpi-bit.o CC net/core/datagram.o CC kernel/dma/mapping.o CC io_uring/net.o AR sound/sh/built-in.a CC block/blk-flush.o CC security/selinux/netif.o AR crypto/asymmetric_keys/built-in.a CC crypto/compress.o CC security/selinux/netnode.o CC lib/crypto/mpi/mpi-cmp.o AR drivers/pnp/pnpacpi/built-in.a CC drivers/pnp/core.o CC arch/x86/lib/msr-reg-export.o AS arch/x86/lib/hweight.o CC arch/x86/kernel/apic/init.o CC security/selinux/netport.o CC block/blk-settings.o CC fs/notify/fdinfo.o CC arch/x86/kernel/cpu/mtrr/amd.o CC sound/core/info.o CC lib/zstd/decompress/huf_decompress.o CC drivers/acpi/acpica/dsmethod.o CC kernel/entry/common.o CC arch/x86/kernel/apic/hw_nmi.o CC net/core/stream.o CC arch/x86/lib/iomem.o CC drivers/video/hdmi.o CC kernel/entry/syscall_user_dispatch.o CC sound/core/seq/seq_timer.o CC arch/x86/pci/irq.o CC fs/nfs_common/grace.o AR sound/synth/emux/built-in.a AR sound/synth/built-in.a CC arch/x86/kernel/cpu/mtrr/cyrix.o CC kernel/sched/build_utility.o AS arch/x86/kernel/head_32.o CC crypto/algapi.o CC kernel/irq/spurious.o CC drivers/acpi/acpica/dsmthdat.o AR drivers/pci/pcie/built-in.a CC lib/crypto/mpi/mpi-sub-ui.o CC drivers/pci/hotplug/pci_hotplug_core.o CC sound/pci/hda/hda_auto_parser.o CC arch/x86/kernel/cpu/mtrr/centaur.o CC kernel/power/console.o AR sound/usb/misc/built-in.a AR sound/usb/usx2y/built-in.a AR sound/usb/caiaq/built-in.a AR sound/usb/6fire/built-in.a CC arch/x86/lib/atomic64_32.o AR sound/usb/hiface/built-in.a AR sound/usb/bcd2000/built-in.a CC net/core/scm.o AR sound/usb/built-in.a CC drivers/pnp/card.o CC arch/x86/mm/mmap.o AR arch/x86/kernel/cpu/mce/built-in.a CC kernel/power/process.o CC arch/x86/mm/pgtable.o AR fs/notify/built-in.a CC security/keys/request_key_auth.o CC drivers/pci/hotplug/acpi_pcihp.o CC kernel/rcu/tree.o CC arch/x86/lib/inat.o CC kernel/rcu/rcu_segcblist.o CC kernel/locking/qrwlock.o CC arch/x86/events/intel/p6.o CC arch/x86/kernel/apic/io_apic.o CC mm/folio-compat.o CC drivers/pnp/driver.o CC kernel/printk/printk_ringbuffer.o AR arch/x86/lib/built-in.a AR arch/x86/lib/lib.a CC lib/zstd/decompress/zstd_ddict.o CC kernel/module/main.o CC io_uring/poll.o CC drivers/acpi/acpica/dsobject.o CC block/blk-ioc.o CC block/blk-map.o CC sound/core/seq/seq_system.o CC sound/core/seq/seq_ports.o CC drivers/pnp/resource.o AR drivers/video/built-in.a AR drivers/pci/controller/dwc/built-in.a CC drivers/pnp/manager.o CC security/lsm_audit.o AR drivers/pci/controller/mobiveil/built-in.a AR drivers/pci/switch/built-in.a CC arch/x86/events/intel/pt.o CC arch/x86/mm/physaddr.o AR drivers/pci/controller/plda/built-in.a AR drivers/pci/controller/built-in.a CC lib/crypto/mpi/mpi-div.o AR drivers/clk/actions/built-in.a CC fs/nfs_common/common.o AR drivers/clk/analogbits/built-in.a AR drivers/clk/bcm/built-in.a CC arch/x86/kernel/cpu/mtrr/legacy.o AR drivers/clk/imgtec/built-in.a AR drivers/clk/imx/built-in.a AR kernel/locking/built-in.a AR drivers/clk/ingenic/built-in.a CC arch/x86/events/intel/uncore.o AR kernel/entry/built-in.a CC kernel/irq/resend.o AR drivers/clk/mediatek/built-in.a CC kernel/power/suspend.o CC security/selinux/status.o AR drivers/clk/microchip/built-in.a AR drivers/clk/mstar/built-in.a CC drivers/pci/access.o AR drivers/clk/mvebu/built-in.a AR drivers/clk/ralink/built-in.a CC drivers/pci/bus.o AR drivers/clk/renesas/built-in.a AR drivers/clk/socfpga/built-in.a CC kernel/time/time.o AR drivers/clk/sophgo/built-in.a CC security/selinux/ss/ebitmap.o AR drivers/clk/sprd/built-in.a CC net/sched/sch_generic.o AR drivers/clk/starfive/built-in.a AR drivers/clk/sunxi-ng/built-in.a CC sound/pci/hda/hda_sysfs.o AR drivers/clk/ti/built-in.a CC security/keys/user_defined.o CC drivers/acpi/acpica/dsopcode.o AR drivers/clk/versatile/built-in.a CC lib/zstd/decompress/zstd_decompress.o AR drivers/clk/xilinx/built-in.a AR drivers/clk/built-in.a CC sound/pci/hda/hda_controller.o AR drivers/pci/hotplug/built-in.a CC lib/zstd/decompress/zstd_decompress_block.o CC kernel/futex/core.o CC arch/x86/mm/tlb.o CC kernel/module/strict_rwx.o AR arch/x86/kernel/cpu/mtrr/built-in.a CC mm/readahead.o CC arch/x86/kernel/cpu/topology_common.o CC crypto/scatterwalk.o CC kernel/printk/sysctl.o CC arch/x86/pci/common.o CC lib/xz/xz_dec_syms.o CC kernel/time/timer.o AR drivers/acpi/pmic/built-in.a CC lib/crypto/mpi/mpi-mod.o CC kernel/irq/chip.o CC net/sched/sch_mq.o CC arch/x86/events/intel/uncore_nhmex.o CC security/device_cgroup.o CC sound/core/isadma.o CC arch/x86/pci/early.o CC net/sched/sch_frag.o CC kernel/cgroup/cgroup.o CC sound/core/seq/seq_info.o CC drivers/acpi/acpica/dspkginit.o AR fs/nfs_common/built-in.a CC fs/iomap/trace.o CC fs/quota/dquot.o CC fs/iomap/iter.o AR kernel/printk/built-in.a CC fs/iomap/buffered-io.o CC lib/xz/xz_dec_stream.o CC security/keys/proc.o CC block/blk-merge.o CC arch/x86/kernel/cpu/topology_ext.o CC arch/x86/mm/cpu_entry_area.o CC arch/x86/mm/maccess.o CC kernel/dma/direct.o CC drivers/pnp/support.o CC drivers/pci/probe.o CC arch/x86/mm/pgprot.o CC arch/x86/pci/bus_numa.o CC crypto/proc.o CC lib/crypto/mpi/mpi-mul.o CC drivers/acpi/acpica/dsutils.o CC io_uring/eventfd.o CC security/selinux/ss/hashtab.o CC drivers/acpi/dptf/int340x_thermal.o CC kernel/futex/syscalls.o CC kernel/power/hibernate.o AR sound/firewire/built-in.a CC fs/iomap/direct-io.o CC arch/x86/events/intel/uncore_snb.o CC sound/core/seq/seq_dummy.o CC drivers/dma/dw/core.o CC net/core/gen_stats.o CC drivers/dma/hsu/hsu.o CC lib/xz/xz_dec_lzma2.o CC arch/x86/kernel/cpu/topology_amd.o CC drivers/pci/host-bridge.o CC arch/x86/kernel/apic/msi.o AR drivers/dma/idxd/built-in.a CC drivers/pnp/interface.o CC lib/dim/dim.o CC kernel/irq/dummychip.o CC mm/swap.o CC drivers/pnp/quirks.o AR drivers/soc/apple/built-in.a CC arch/x86/events/intel/uncore_snbep.o CC security/keys/sysctl.o AR drivers/soc/aspeed/built-in.a AR drivers/soc/bcm/built-in.a CC lib/dim/net_dim.o CC arch/x86/mm/pgtable_32.o AR drivers/soc/fsl/built-in.a AR drivers/soc/fujitsu/built-in.a CC security/selinux/ss/symtab.o CC drivers/acpi/acpica/dswexec.o AR drivers/soc/hisilicon/built-in.a AR drivers/soc/imx/built-in.a AR drivers/acpi/dptf/built-in.a CC security/keys/keyctl_pkey.o AR drivers/soc/ixp4xx/built-in.a AR drivers/soc/loongson/built-in.a AR drivers/soc/mediatek/built-in.a CC crypto/aead.o AR drivers/soc/microchip/built-in.a AR drivers/soc/nuvoton/built-in.a AR drivers/soc/pxa/built-in.a CC arch/x86/pci/amd_bus.o CC sound/pci/hda/hda_proc.o AR drivers/soc/amlogic/built-in.a CC lib/dim/rdma_dim.o CC lib/crypto/mpi/mpih-cmp.o AR drivers/soc/qcom/built-in.a CC lib/crypto/arc4.o AR drivers/soc/renesas/built-in.a CC kernel/cgroup/rstat.o AR drivers/soc/rockchip/built-in.a AR drivers/soc/sunxi/built-in.a AR drivers/soc/ti/built-in.a AR drivers/soc/versatile/built-in.a AR drivers/soc/xilinx/built-in.a CC security/selinux/ss/sidtab.o AR drivers/soc/built-in.a CC kernel/dma/ops_helpers.o CC arch/x86/kernel/cpu/common.o CC arch/x86/kernel/cpu/rdrand.o CC io_uring/uring_cmd.o CC drivers/pnp/system.o AR sound/core/seq/built-in.a CC drivers/acpi/x86/apple.o CC sound/core/vmaster.o CC block/blk-timeout.o CC kernel/irq/devres.o CC arch/x86/kernel/apic/probe_32.o CC drivers/dma/dw/dw.o CC kernel/module/kmod.o CC drivers/acpi/acpica/dswload.o CC lib/xz/xz_dec_bcj.o AR sound/sparc/built-in.a CC net/core/gen_estimator.o CC kernel/futex/pi.o AR drivers/dma/hsu/built-in.a CC sound/core/ctljack.o CC lib/fonts/fonts.o CC kernel/time/hrtimer.o CC kernel/dma/remap.o CC lib/zstd/zstd_common_module.o CC net/sched/sch_api.o CC arch/x86/mm/iomap_32.o CC drivers/acpi/x86/cmos_rtc.o AR security/keys/built-in.a CC fs/proc/task_mmu.o CC fs/iomap/fiemap.o AR drivers/dma/amd/built-in.a CC arch/x86/kernel/head32.o CC lib/crypto/mpi/mpih-div.o CC lib/fonts/font_8x16.o CC fs/proc/inode.o CC crypto/geniv.o AR drivers/pnp/built-in.a CC kernel/irq/kexec.o CC kernel/power/snapshot.o CC kernel/irq/autoprobe.o AR arch/x86/kernel/apic/built-in.a CC mm/truncate.o CC kernel/trace/trace_clock.o CC kernel/bpf/core.o CC drivers/acpi/acpica/dswload2.o AR sound/spi/built-in.a CC security/selinux/ss/avtab.o CC kernel/trace/ring_buffer.o CC kernel/irq/irqdomain.o CC sound/core/jack.o AR arch/x86/pci/built-in.a CC sound/core/hwdep.o CC kernel/trace/trace.o CC arch/x86/kernel/ebda.o CC lib/zstd/common/debug.o AR lib/xz/built-in.a CC block/blk-lib.o AR lib/dim/built-in.a CC arch/x86/kernel/platform-quirks.o CC kernel/cgroup/namespace.o CC lib/zstd/common/entropy_common.o CC drivers/dma/dw/idma32.o CC drivers/pci/remove.o AR lib/fonts/built-in.a CC lib/crypto/gf128mul.o AR kernel/sched/built-in.a AR sound/parisc/built-in.a AR kernel/dma/built-in.a CC lib/crypto/mpi/mpih-mul.o CC fs/quota/quota_v2.o CC fs/kernfs/mount.o CC lib/zstd/common/error_private.o CC fs/sysfs/file.o CC fs/devpts/inode.o CC lib/zstd/common/fse_decompress.o CC arch/x86/mm/hugetlbpage.o CC fs/netfs/buffered_read.o CC kernel/module/tree_lookup.o CC fs/quota/quota_tree.o CC fs/quota/quota.o CC sound/pci/hda/hda_hwdep.o CC kernel/futex/requeue.o AR drivers/dma/mediatek/built-in.a CC lib/crypto/mpi/mpi-pow.o CC drivers/acpi/x86/lpss.o CC drivers/acpi/acpica/dswscope.o CC lib/argv_split.o CC fs/iomap/seek.o CC sound/core/timer.o CC arch/x86/kernel/cpu/match.o CC kernel/futex/waitwake.o CC io_uring/openclose.o CC net/core/net_namespace.o CC io_uring/sqpoll.o CC arch/x86/events/rapl.o CC net/netlink/af_netlink.o CC kernel/events/core.o CC fs/quota/kqid.o CC crypto/lskcipher.o CC drivers/acpi/acpica/dswstate.o CC crypto/skcipher.o CC drivers/acpi/x86/s2idle.o CC drivers/acpi/x86/utils.o CC drivers/dma/dw/acpi.o CC fs/kernfs/inode.o CC drivers/pci/pci.o AR kernel/rcu/built-in.a CC drivers/acpi/x86/blacklist.o CC lib/zstd/common/zstd_common.o CC block/blk-mq.o CC kernel/module/kallsyms.o CC sound/pci/hda/hda_intel.o AR lib/zstd/built-in.a CC security/selinux/ss/policydb.o CC arch/x86/kernel/cpu/bugs.o CC arch/x86/mm/dump_pagetables.o CC mm/vmscan.o CC kernel/power/swap.o AR sound/pci/mixart/built-in.a CC kernel/time/sleep_timeout.o AR fs/devpts/built-in.a AR drivers/dma/qcom/built-in.a CC kernel/cgroup/cgroup-v1.o CC fs/ext4/balloc.o CC arch/x86/kernel/cpu/aperfmperf.o CC lib/crypto/mpi/mpiutil.o CC fs/jbd2/transaction.o CC fs/sysfs/dir.o CC fs/ramfs/inode.o CC fs/iomap/swapfile.o CC fs/ext4/bitmap.o CC kernel/irq/proc.o CC arch/x86/events/intel/uncore_discovery.o CC drivers/acpi/acpica/evevent.o CC fs/hugetlbfs/inode.o AR drivers/dma/stm32/built-in.a CC fs/fat/cache.o CC fs/ramfs/file-mmu.o AR kernel/futex/built-in.a CC mm/shrinker.o CC fs/netfs/buffered_write.o AR drivers/dma/dw/built-in.a CC mm/shmem.o AR drivers/dma/ti/built-in.a AR drivers/dma/xilinx/built-in.a CC drivers/dma/dmaengine.o CC fs/proc/root.o CC fs/quota/netlink.o CC kernel/time/timekeeping.o CC kernel/events/ring_buffer.o CC security/selinux/ss/services.o CC fs/sysfs/symlink.o CC fs/kernfs/dir.o CC drivers/acpi/acpica/evgpe.o CC kernel/module/procfs.o AR drivers/acpi/x86/built-in.a AR lib/crypto/mpi/built-in.a CC fs/kernfs/file.o CC lib/crypto/blake2s.o CC security/selinux/ss/conditional.o CC net/sched/sch_blackhole.o CC fs/fat/dir.o CC arch/x86/mm/highmem_32.o CC kernel/fork.o CC io_uring/xattr.o AR fs/iomap/built-in.a CC sound/core/hrtimer.o CC kernel/irq/migration.o CC fs/proc/base.o CC crypto/seqiv.o AR fs/ramfs/built-in.a CC crypto/echainiv.o CC sound/core/pcm.o CC net/core/secure_seq.o CC lib/crypto/blake2s-generic.o CC lib/crypto/sha1.o CC drivers/acpi/acpica/evgpeblk.o CC crypto/ahash.o CC arch/x86/events/intel/cstate.o CC fs/isofs/namei.o CC kernel/module/sysfs.o CC fs/nfs/client.o CC kernel/power/user.o CC fs/sysfs/mount.o CC fs/exportfs/expfs.o CC kernel/irq/cpuhotplug.o AR fs/quota/built-in.a CC fs/lockd/clntlock.o CC drivers/acpi/tables.o CC kernel/cgroup/freezer.o AR sound/pci/hda/built-in.a AR arch/x86/mm/built-in.a CC arch/x86/events/msr.o AR sound/pci/nm256/built-in.a AR sound/pci/oxygen/built-in.a AR sound/pci/pcxhr/built-in.a AR sound/pci/riptide/built-in.a CC fs/netfs/direct_read.o AR sound/pci/rme9652/built-in.a CC io_uring/nop.o AR sound/pci/trident/built-in.a AR sound/pci/ymfpci/built-in.a AR sound/pci/vx222/built-in.a AR sound/pci/built-in.a CC drivers/acpi/acpica/evgpeinit.o CC lib/crypto/sha256.o CC fs/jbd2/commit.o CC fs/ext4/block_validity.o CC arch/x86/kernel/cpu/cpuid-deps.o AR kernel/bpf/built-in.a CC net/sched/cls_api.o CC net/netlink/genetlink.o CC arch/x86/kernel/process_32.o CC net/netlink/policy.o CC fs/fat/fatent.o CC drivers/acpi/acpica/evgpeutil.o CC lib/bug.o CC drivers/dma/virt-dma.o CC mm/util.o AR fs/hugetlbfs/built-in.a CC fs/jbd2/recovery.o CC kernel/exec_domain.o CC fs/kernfs/symlink.o CC fs/isofs/inode.o CC fs/isofs/dir.o CC sound/core/pcm_native.o CC kernel/time/ntp.o CC arch/x86/kernel/cpu/umwait.o AR kernel/module/built-in.a AR fs/exportfs/built-in.a CC drivers/dma/acpi-dma.o CC kernel/irq/pm.o CC kernel/power/poweroff.o AR arch/x86/events/intel/built-in.a AR net/bpf/built-in.a CC fs/sysfs/group.o CC drivers/acpi/acpica/evglock.o CC net/ethtool/ioctl.o CC crypto/shash.o CC fs/netfs/direct_write.o CC drivers/pci/pci-driver.o AR lib/crypto/built-in.a CC drivers/virtio/virtio.o CC block/blk-mq-tag.o CC net/core/flow_dissector.o CC fs/fat/file.o AR arch/x86/events/built-in.a CC fs/ext4/dir.o CC kernel/cgroup/legacy_freezer.o CC io_uring/fs.o AR kernel/power/built-in.a CC kernel/trace/trace_output.o CC net/netfilter/core.o CC lib/buildid.o CC fs/isofs/util.o CC fs/proc/generic.o CC lib/clz_tab.o CC fs/proc/array.o CC drivers/acpi/acpica/evhandler.o CC fs/proc/fd.o CC fs/lockd/clntproc.o CC drivers/virtio/virtio_ring.o MKCAP arch/x86/kernel/cpu/capflags.c CC net/sched/act_api.o AR fs/kernfs/built-in.a CC crypto/akcipher.o CC block/blk-stat.o CC fs/ext4/ext4_jbd2.o CC net/netfilter/nf_log.o AR fs/sysfs/built-in.a CC lib/cmdline.o CC kernel/irq/msi.o CC io_uring/splice.o CC fs/jbd2/checkpoint.o AR drivers/dma/built-in.a CC kernel/time/clocksource.o CC drivers/acpi/acpica/evmisc.o CC kernel/time/jiffies.o CC drivers/tty/vt/vt_ioctl.o CC fs/jbd2/revoke.o CC security/selinux/ss/mls.o CC crypto/sig.o CC drivers/tty/hvc/hvc_console.o CC net/sched/sch_fifo.o CC fs/netfs/iterator.o CC fs/nfs/dir.o CC security/selinux/ss/context.o CC kernel/cgroup/pids.o CC mm/mmzone.o CC net/netfilter/nf_queue.o CC security/selinux/netlabel.o CC net/netfilter/nf_sockopt.o CC lib/cpumask.o CC lib/ctype.o CC drivers/virtio/virtio_anchor.o CC fs/isofs/rock.o CC crypto/kpp.o CC kernel/trace/trace_seq.o CC drivers/acpi/acpica/evregion.o CC kernel/panic.o CC fs/ext4/extents.o CC mm/vmstat.o CC fs/fat/inode.o CC fs/lockd/clntxdr.o AR net/netlink/built-in.a CC arch/x86/kernel/cpu/powerflags.o CC drivers/pci/search.o CC kernel/time/timer_list.o CC fs/proc/proc_tty.o CC block/blk-mq-sysfs.o CC drivers/acpi/osi.o CC drivers/acpi/osl.o CC drivers/tty/serial/8250/8250_core.o CC io_uring/sync.o CC kernel/cgroup/rdma.o CC net/ethtool/common.o CC fs/ext4/extents_status.o CC drivers/acpi/acpica/evrgnini.o CC net/core/sysctl_net_core.o CC lib/dec_and_lock.o CC fs/jbd2/journal.o CC fs/ext4/file.o AR drivers/tty/hvc/built-in.a CC sound/core/pcm_lib.o CC fs/fat/misc.o CC kernel/trace/trace_stat.o ASN.1 crypto/rsapubkey.asn1.[ch] CC kernel/time/timeconv.o CC block/blk-mq-cpumap.o CC fs/netfs/locking.o CC kernel/irq/affinity.o CC drivers/tty/vt/vc_screen.o CC fs/isofs/export.o CC fs/fat/nfs.o CC lib/decompress.o CC fs/netfs/main.o CC net/sched/cls_cgroup.o ASN.1 crypto/rsaprivkey.asn1.[ch] CC lib/decompress_bunzip2.o CC crypto/rsa.o CC fs/lockd/host.o CC fs/proc/cmdline.o CC drivers/tty/serial/8250/8250_platform.o AR drivers/tty/ipwireless/built-in.a AR sound/pcmcia/vx/built-in.a CC sound/core/pcm_misc.o AR sound/pcmcia/pdaudiocf/built-in.a AR sound/pcmcia/built-in.a AR sound/mips/built-in.a CC arch/x86/kernel/signal.o CC block/blk-mq-sched.o CC drivers/acpi/acpica/evsci.o CC drivers/pci/rom.o CC net/sched/ematch.o CC kernel/cgroup/cpuset.o CC kernel/time/timecounter.o CC kernel/time/alarmtimer.o CC drivers/tty/serial/serial_core.o CC drivers/acpi/utils.o CC drivers/virtio/virtio_pci_modern_dev.o CC fs/fat/namei_vfat.o CC fs/nfs/file.o CC kernel/irq/matrix.o CC net/ethtool/netlink.o CC net/netfilter/utils.o AR security/selinux/built-in.a AR security/built-in.a CC net/netfilter/nfnetlink.o CC io_uring/msg_ring.o CC io_uring/advise.o CC drivers/acpi/acpica/evxface.o CC net/core/dev.o CC fs/proc/consoles.o CC fs/isofs/joliet.o CC fs/netfs/misc.o CC mm/backing-dev.o CC kernel/trace/trace_printk.o CC crypto/rsa_helper.o CC arch/x86/kernel/cpu/topology.o CC sound/core/pcm_memory.o CC drivers/pci/setup-res.o CC kernel/cpu.o CC net/netfilter/nfnetlink_log.o CC drivers/tty/vt/selection.o CC lib/decompress_inflate.o CC lib/decompress_unlz4.o CC fs/ext4/fsmap.o CC fs/netfs/objects.o CC net/ipv4/netfilter/nf_defrag_ipv4.o CC drivers/tty/serial/8250/8250_pnp.o AR sound/soc/built-in.a CC net/xfrm/xfrm_policy.o CC io_uring/epoll.o CC drivers/acpi/acpica/evxfevnt.o CC crypto/rsa-pkcs1pad.o CC drivers/pci/irq.o CC net/ipv4/netfilter/nf_reject_ipv4.o CC drivers/tty/serial/8250/8250_rsa.o CC drivers/virtio/virtio_pci_legacy_dev.o CC fs/proc/cpuinfo.o CC block/ioctl.o CC fs/proc/devices.o CC fs/isofs/compress.o CC fs/proc/interrupts.o AR net/sched/built-in.a CC fs/proc/loadavg.o CC fs/nls/nls_base.o CC drivers/pci/vpd.o CC lib/decompress_unlzma.o CC fs/lockd/svc.o CC drivers/acpi/acpica/evxfgpe.o CC kernel/time/posix-timers.o CC kernel/time/posix-cpu-timers.o CC sound/core/memalloc.o CC drivers/acpi/reboot.o CC kernel/trace/pid_list.o CC drivers/tty/vt/keyboard.o AR kernel/irq/built-in.a CC net/ipv4/netfilter/ip_tables.o CC kernel/cgroup/misc.o CC fs/ext4/fsync.o CC kernel/trace/trace_sched_switch.o CC fs/nfs/getroot.o CC fs/fat/namei_msdos.o CC net/ethtool/bitset.o CC drivers/tty/serial/serial_base_bus.o CC drivers/acpi/nvs.o CC kernel/exit.o CC mm/mm_init.o CC crypto/rsassa-pkcs1.o CC drivers/tty/vt/vt.o CC fs/netfs/read_collect.o COPY drivers/tty/vt/defkeymap.c CC net/core/dev_addr_lists.o CC drivers/tty/serial/8250/8250_port.o CC drivers/virtio/virtio_pci_modern.o CC io_uring/statx.o CC fs/nls/nls_cp437.o CC crypto/acompress.o CC fs/proc/meminfo.o CC drivers/acpi/acpica/evxfregn.o CC fs/lockd/svclock.o CC arch/x86/kernel/signal_32.o AR fs/isofs/built-in.a CC kernel/softirq.o CC block/genhd.o CC kernel/cgroup/debug.o CC net/unix/af_unix.o CC fs/nls/nls_ascii.o CC lib/decompress_unlzo.o CC drivers/pci/setup-bus.o CC net/netfilter/nf_conntrack_core.o CC block/ioprio.o AR fs/jbd2/built-in.a CC fs/netfs/read_pgpriv2.o CC drivers/acpi/acpica/exconcat.o CC mm/percpu.o AR sound/atmel/built-in.a CC drivers/tty/tty_io.o CC sound/core/pcm_timer.o CC drivers/char/hw_random/core.o CC sound/core/seq_device.o CC drivers/tty/vt/consolemap.o CC net/ethtool/strset.o CC lib/decompress_unxz.o CC fs/nls/nls_iso8859-1.o CC drivers/acpi/acpica/exconfig.o CC io_uring/timeout.o AR drivers/iommu/amd/built-in.a AR drivers/iommu/intel/built-in.a AR fs/fat/built-in.a CC fs/proc/stat.o CC net/ipv4/route.o AR drivers/iommu/arm/arm-smmu/built-in.a CC kernel/events/callchain.o AR drivers/iommu/arm/arm-smmu-v3/built-in.a AR drivers/iommu/arm/built-in.a AR drivers/iommu/iommufd/built-in.a AR drivers/iommu/riscv/built-in.a CC drivers/iommu/iommu.o CC kernel/events/hw_breakpoint.o CC drivers/char/hw_random/intel-rng.o CC kernel/trace/trace_nop.o CC fs/nfs/inode.o CC crypto/scompress.o CC drivers/virtio/virtio_pci_common.o CC kernel/time/posix-clock.o AR drivers/gpu/host1x/built-in.a CC fs/lockd/svcshare.o CC drivers/char/agp/backend.o CC drivers/char/agp/generic.o CC fs/nls/nls_utf8.o AR drivers/gpu/drm/tests/built-in.a AR drivers/gpu/drm/arm/built-in.a AR kernel/cgroup/built-in.a CC drivers/char/agp/isoch.o CC kernel/events/uprobes.o AR drivers/gpu/drm/clients/built-in.a CC drivers/gpu/drm/display/drm_display_helper_mod.o CC drivers/tty/serial/8250/8250_dma.o CC net/ipv4/netfilter/iptable_filter.o CC drivers/acpi/acpica/exconvrt.o CC net/ipv4/inetpeer.o CC net/core/dst.o CC lib/decompress_unzstd.o AR sound/core/built-in.a CC net/netfilter/nf_conntrack_standalone.o CC sound/hda/hda_bus_type.o CC net/ipv4/netfilter/iptable_mangle.o CC fs/netfs/read_retry.o CC fs/ext4/hash.o AR sound/x86/built-in.a CC net/ipv4/protocol.o CC drivers/tty/serial/8250/8250_dwlib.o CC fs/proc/uptime.o AR fs/nls/built-in.a CC lib/dump_stack.o CC mm/slab_common.o CC drivers/gpu/drm/display/drm_dp_dual_mode_helper.o CC block/badblocks.o CC drivers/char/hw_random/amd-rng.o CC fs/netfs/read_single.o CC drivers/acpi/acpica/excreate.o CC kernel/trace/blktrace.o CC kernel/trace/trace_events.o CC arch/x86/kernel/cpu/proc.o CC net/ipv6/netfilter/ip6_tables.o CC fs/proc/util.o CC kernel/time/itimer.o CC drivers/gpu/drm/display/drm_dp_helper.o CC drivers/gpu/drm/ttm/ttm_tt.o CC net/ethtool/linkinfo.o CC io_uring/fdinfo.o CC crypto/algboss.o CC drivers/virtio/virtio_pci_legacy.o CC crypto/testmgr.o CC sound/hda/hdac_bus.o CC drivers/tty/serial/serial_ctrl.o CC fs/proc/version.o CC fs/lockd/svcproc.o CC drivers/pci/vc.o CC drivers/acpi/acpica/exdebug.o CC fs/lockd/svcsubs.o CC fs/lockd/mon.o CC drivers/tty/serial/8250/8250_pcilib.o CC lib/earlycpio.o CC fs/ext4/ialloc.o CC drivers/char/agp/amd64-agp.o CC drivers/char/agp/intel-agp.o CC drivers/char/hw_random/geode-rng.o CC lib/extable.o CC drivers/tty/serial/8250/8250_early.o CC drivers/acpi/acpica/exdump.o CC net/core/netevent.o CC drivers/iommu/iommu-traces.o CC net/ipv4/netfilter/ipt_REJECT.o CC [M] net/ipv4/netfilter/iptable_nat.o CC crypto/cmac.o CC arch/x86/kernel/cpu/feat_ctl.o CC net/ethtool/linkmodes.o HOSTCC drivers/tty/vt/conmakehash CC drivers/iommu/iommu-sysfs.o CC fs/netfs/rolling_buffer.o CC drivers/acpi/wakeup.o AR drivers/gpu/vga/built-in.a CC drivers/gpu/drm/display/drm_dp_mst_topology.o CC block/blk-rq-qos.o AR fs/unicode/built-in.a CC net/ipv6/af_inet6.o CC drivers/virtio/virtio_pci_admin_legacy_io.o CC fs/proc/softirqs.o CC net/xfrm/xfrm_state.o CC drivers/tty/vt/defkeymap.o CC drivers/acpi/acpica/exfield.o CC sound/hda/hdac_device.o CC net/netfilter/nf_conntrack_expect.o CC lib/flex_proportions.o CC kernel/time/clockevents.o CC io_uring/cancel.o CC drivers/char/hw_random/via-rng.o CC net/unix/garbage.o CC drivers/gpu/drm/ttm/ttm_bo.o CC fs/nfs/super.o CC arch/x86/kernel/cpu/intel.o CC drivers/pci/mmap.o CONMK drivers/tty/vt/consolemap_deftbl.c CC arch/x86/kernel/cpu/tsx.o CC drivers/tty/vt/consolemap_deftbl.o CC drivers/pci/devres.o AR drivers/tty/vt/built-in.a CC crypto/hmac.o CC net/ipv6/anycast.o CC drivers/tty/serial/8250/8250_exar.o CC net/packet/af_packet.o AR net/dsa/built-in.a CC drivers/gpu/drm/ttm/ttm_bo_util.o AR kernel/events/built-in.a CC drivers/pci/proc.o CC fs/netfs/write_collect.o CC fs/nfs/io.o CC drivers/char/agp/intel-gtt.o CC drivers/acpi/acpica/exfldio.o CC net/netfilter/nf_conntrack_helper.o CC lib/idr.o AR drivers/char/hw_random/built-in.a CC io_uring/waitid.o CC fs/proc/namespaces.o CC sound/hda/hdac_sysfs.o CC block/disk-events.o CC fs/proc/self.o CC drivers/virtio/virtio_input.o CC net/netfilter/nf_conntrack_proto.o CC fs/lockd/trace.o CC net/ipv6/netfilter/ip6table_filter.o CC arch/x86/kernel/traps.o CC drivers/iommu/dma-iommu.o CC net/unix/sysctl_net_unix.o CC kernel/time/tick-common.o CC drivers/gpu/drm/display/drm_dsc_helper.o AR net/ipv4/netfilter/built-in.a CC net/ethtool/rss.o CC net/core/neighbour.o CC net/xfrm/xfrm_hash.o CC arch/x86/kernel/cpu/intel_epb.o CC net/xfrm/xfrm_input.o CC crypto/crypto_null.o CC drivers/iommu/iova.o CC drivers/acpi/acpica/exmisc.o CC mm/compaction.o CC lib/iomem_copy.o CC drivers/virtio/virtio_dma_buf.o CC mm/show_mem.o CC net/ipv4/ip_input.o CC net/ipv6/netfilter/ip6table_mangle.o CC lib/irq_regs.o CC fs/ext4/indirect.o CC net/netfilter/nf_conntrack_proto_generic.o CC drivers/gpu/drm/ttm/ttm_bo_vm.o CC net/sunrpc/auth_gss/auth_gss.o CC drivers/pci/pci-sysfs.o CC drivers/tty/serial/8250/8250_lpss.o CC mm/interval_tree.o CC arch/x86/kernel/cpu/amd.o CC fs/proc/thread_self.o CC lib/is_single_threaded.o CC drivers/acpi/acpica/exmutex.o CC kernel/trace/trace_export.o CC block/blk-ia-ranges.o CC arch/x86/kernel/cpu/hygon.o CC sound/hda/hdac_regmap.o AR drivers/char/agp/built-in.a CC io_uring/register.o CC drivers/char/mem.o CC drivers/gpu/drm/i915/i915_config.o CC arch/x86/kernel/cpu/centaur.o CC net/sunrpc/clnt.o CC fs/netfs/write_issue.o CC fs/autofs/init.o CC drivers/gpu/drm/ttm/ttm_module.o CC crypto/md5.o CC drivers/connector/cn_queue.o AR drivers/virtio/built-in.a CC drivers/acpi/sleep.o AR net/unix/built-in.a CC drivers/acpi/device_sysfs.o CC fs/nfs/direct.o CC drivers/gpu/drm/i915/i915_driver.o CC drivers/connector/connector.o CC drivers/acpi/acpica/exnames.o CC lib/klist.o CC sound/hda/hdac_controller.o CC kernel/time/tick-broadcast.o CC fs/lockd/xdr.o CC kernel/resource.o CC net/sunrpc/auth_gss/gss_mech_switch.o CC net/ipv4/ip_fragment.o CC fs/netfs/write_retry.o CC net/ethtool/linkstate.o CC fs/proc/proc_sysctl.o CC fs/proc/proc_net.o CC io_uring/truncate.o CC drivers/tty/serial/8250/8250_mid.o CC io_uring/memmap.o CC fs/autofs/inode.o CC lib/kobject.o CC drivers/gpu/drm/ttm/ttm_execbuf_util.o CC crypto/sha256_generic.o CC block/early-lookup.o CC net/xfrm/xfrm_output.o CC kernel/trace/trace_event_perf.o CC drivers/acpi/acpica/exoparg1.o AR drivers/iommu/built-in.a CC drivers/acpi/acpica/exoparg2.o CC block/bounce.o CC crypto/sha512_generic.o CC net/netfilter/nf_conntrack_proto_tcp.o CC arch/x86/kernel/cpu/transmeta.o CC net/ipv6/netfilter/nf_defrag_ipv6_hooks.o CC drivers/pci/slot.o CC drivers/char/random.o CC kernel/time/tick-broadcast-hrtimer.o AR sound/xen/built-in.a CC net/xfrm/xfrm_sysctl.o CC net/ipv4/ip_forward.o CC net/ipv6/netfilter/nf_conntrack_reasm.o CC drivers/gpu/drm/display/drm_hdcp_helper.o CC sound/hda/hdac_stream.o CC drivers/base/power/sysfs.o CC drivers/acpi/acpica/exoparg3.o CC lib/kobject_uevent.o CC drivers/base/regmap/regmap.o CC drivers/base/firmware_loader/builtin/main.o CC drivers/base/regmap/regcache.o CC drivers/tty/serial/8250/8250_pci.o CC drivers/connector/cn_proc.o AR fs/netfs/built-in.a CC drivers/gpu/drm/display/drm_hdmi_helper.o CC drivers/gpu/drm/ttm/ttm_range_manager.o AR drivers/gpu/drm/omapdrm/built-in.a AR drivers/gpu/drm/renesas/rcar-du/built-in.a CC kernel/time/tick-oneshot.o AR drivers/gpu/drm/renesas/rz-du/built-in.a CC drivers/gpu/drm/ttm/ttm_resource.o AR drivers/gpu/drm/renesas/built-in.a CC fs/proc/kcore.o CC crypto/sha3_generic.o CC fs/autofs/root.o CC fs/nfs/pagelist.o CC arch/x86/kernel/cpu/zhaoxin.o AR drivers/base/test/built-in.a CC net/ipv6/netfilter/nf_reject_ipv6.o CC net/ethtool/debug.o CC fs/ext4/inline.o CC fs/lockd/clnt4xdr.o CC mm/list_lru.o CC io_uring/alloc_cache.o CC kernel/trace/trace_events_filter.o AR drivers/base/firmware_loader/builtin/built-in.a CC sound/hda/array.o CC drivers/base/firmware_loader/main.o CC drivers/acpi/acpica/exoparg6.o CC drivers/pci/pci-acpi.o CC net/sunrpc/auth_gss/svcauth_gss.o CC net/ipv6/netfilter/ip6t_ipv6header.o CC kernel/time/tick-sched.o CC drivers/base/power/generic_ops.o CC block/bsg.o CC fs/9p/vfs_super.o CC arch/x86/kernel/cpu/vortex.o CC drivers/gpu/drm/i915/i915_drm_client.o CC net/ethtool/wol.o CC crypto/ecb.o CC net/core/rtnetlink.o CC drivers/base/power/common.o CC drivers/gpu/drm/display/drm_scdc_helper.o CC kernel/sysctl.o CC kernel/trace/trace_events_trigger.o CC drivers/tty/serial/serial_port.o AR net/packet/built-in.a CC drivers/acpi/acpica/exprep.o CC drivers/tty/n_tty.o CC net/sunrpc/auth_gss/gss_rpc_upcall.o CC net/sunrpc/auth_gss/gss_rpc_xdr.o CC net/sunrpc/xprt.o CC net/xfrm/xfrm_replay.o CC drivers/acpi/acpica/exregion.o CC io_uring/io-wq.o CC drivers/base/power/qos.o CC arch/x86/kernel/cpu/perfctr-watchdog.o AR drivers/gpu/drm/tilcdc/built-in.a CC drivers/base/component.o CC drivers/base/core.o CC sound/hda/hdmi_chmap.o CC drivers/char/misc.o CC fs/proc/vmcore.o CC drivers/gpu/drm/ttm/ttm_pool.o CC fs/autofs/symlink.o CC mm/workingset.o CC crypto/cbc.o CC net/ipv4/ip_options.o CC lib/logic_pio.o CC lib/maple_tree.o AR drivers/connector/built-in.a CC drivers/gpu/drm/ttm/ttm_device.o CC drivers/gpu/drm/ttm/ttm_sys_manager.o CC drivers/gpu/drm/ttm/ttm_agp_backend.o CC block/blk-cgroup.o CC lib/memcat_p.o CC net/netfilter/nf_conntrack_proto_udp.o CC fs/9p/vfs_inode.o CC drivers/acpi/acpica/exresnte.o CC fs/lockd/xdr4.o AR drivers/base/firmware_loader/built-in.a CC drivers/char/virtio_console.o CC drivers/tty/serial/8250/8250_pericom.o CC drivers/pci/iomap.o CC kernel/time/timer_migration.o CC crypto/ctr.o AR drivers/gpu/drm/display/built-in.a CC net/xfrm/xfrm_device.o CC drivers/gpu/drm/i915/i915_getparam.o CC io_uring/futex.o CC net/netfilter/nf_conntrack_proto_icmp.o CC fs/ext4/inode.o CC net/ethtool/features.o CC fs/9p/vfs_inode_dotl.o CC fs/autofs/waitq.o CC arch/x86/kernel/cpu/vmware.o CC drivers/acpi/acpica/exresolv.o CC fs/nfs/read.o CC net/netfilter/nf_conntrack_extend.o CC fs/9p/vfs_addr.o CC net/ipv6/netfilter/ip6t_REJECT.o CC net/xfrm/xfrm_nat_keepalive.o CC sound/hda/trace.o CC block/blk-ioprio.o CC mm/debug.o CC net/core/utils.o CC drivers/acpi/acpica/exresop.o CC drivers/tty/tty_ioctl.o CC fs/9p/vfs_file.o AR drivers/gpu/drm/ttm/built-in.a CC drivers/base/regmap/regcache-rbtree.o CC crypto/gcm.o CC kernel/trace/trace_eprobe.o CC fs/nfs/symlink.o CC fs/proc/kmsg.o CC drivers/pci/quirks.o AR drivers/tty/serial/8250/built-in.a CC drivers/tty/serial/earlycon.o CC drivers/base/bus.o CC drivers/base/power/runtime.o AR net/wireless/tests/built-in.a CC net/wireless/core.o AR net/mac80211/tests/built-in.a CC net/mac80211/main.o CC drivers/base/dd.o CC arch/x86/kernel/cpu/hypervisor.o CC drivers/char/hpet.o CC drivers/acpi/acpica/exserial.o CC net/sunrpc/auth_gss/trace.o CC net/ipv4/ip_output.o CC net/core/link_watch.o CC mm/gup.o CC fs/autofs/expire.o CC io_uring/napi.o CC drivers/gpu/drm/i915/i915_ioctl.o CC fs/lockd/svc4proc.o CC net/xfrm/xfrm_algo.o CC net/ethtool/privflags.o CC fs/proc/page.o CC sound/hda/hdac_component.o CC drivers/base/syscore.o CC arch/x86/kernel/cpu/mshyperv.o CC arch/x86/kernel/cpu/debugfs.o AR sound/virtio/built-in.a CC arch/x86/kernel/idt.o CC fs/ext4/ioctl.o CC net/sunrpc/socklib.o CC drivers/acpi/acpica/exstore.o CC drivers/base/regmap/regcache-flat.o CC block/blk-iolatency.o CC net/core/filter.o CC fs/9p/vfs_dir.o CC kernel/capability.o CC drivers/pci/pci-label.o AR drivers/tty/serial/built-in.a CC drivers/tty/tty_ldisc.o CC drivers/acpi/device_pm.o CC arch/x86/kernel/irq.o CC net/netfilter/nf_conntrack_acct.o CC fs/lockd/procfs.o AR net/ipv6/netfilter/built-in.a CC net/ipv6/ip6_output.o CC crypto/ccm.o CC kernel/time/vsyscall.o CC drivers/char/nvram.o CC block/blk-iocost.o CC drivers/acpi/acpica/exstoren.o CC mm/mmap_lock.o CC drivers/base/power/wakeirq.o CC net/sunrpc/xprtsock.o CC sound/hda/hdac_i915.o CC sound/hda/intel-dsp-config.o CC drivers/base/regmap/regcache-maple.o CC kernel/trace/trace_kprobe.o CC drivers/block/loop.o AR fs/proc/built-in.a CC fs/autofs/dev-ioctl.o CC sound/hda/intel-nhlt.o CC drivers/gpu/drm/i915/i915_irq.o CC fs/nfs/unlink.o CC net/ethtool/rings.o CC kernel/time/timekeeping_debug.o CC net/xfrm/xfrm_user.o CC drivers/acpi/acpica/exstorob.o CC fs/9p/vfs_dentry.o CC sound/sound_core.o CC drivers/tty/tty_buffer.o CC arch/x86/kernel/cpu/bus_lock.o CC net/wireless/sysfs.o CC drivers/base/regmap/regmap-debugfs.o CC net/sunrpc/sched.o CC drivers/gpu/drm/i915/i915_mitigations.o CC drivers/misc/eeprom/eeprom_93cx6.o AR fs/lockd/built-in.a CC crypto/aes_generic.o CC drivers/base/power/main.o CC net/ipv4/ip_sockglue.o CC drivers/pci/vgaarb.o CC net/netfilter/nf_conntrack_seqadj.o AR drivers/char/built-in.a AR io_uring/built-in.a CC sound/last.o CC sound/hda/intel-sdw-acpi.o CC fs/nfs/write.o CC drivers/acpi/acpica/exsystem.o CC drivers/gpu/drm/i915/i915_module.o CC kernel/ptrace.o CC drivers/gpu/drm/virtio/virtgpu_drv.o AR drivers/misc/cb710/built-in.a AR drivers/misc/lis3lv02d/built-in.a CC fs/9p/v9fs.o CC net/sunrpc/auth.o CC net/sunrpc/auth_gss/gss_krb5_mech.o CC arch/x86/kernel/irq_32.o CC fs/9p/fid.o AR drivers/misc/eeprom/built-in.a AR drivers/misc/cardreader/built-in.a AR drivers/misc/keba/built-in.a AR drivers/misc/built-in.a CC kernel/time/namespace.o CC mm/highmem.o CC net/core/sock_diag.o AR fs/hostfs/built-in.a CC fs/nfs/namespace.o AR fs/autofs/built-in.a CC drivers/tty/tty_port.o CC drivers/acpi/proc.o CC kernel/user.o CC drivers/acpi/acpica/extrace.o AR drivers/base/regmap/built-in.a CC drivers/acpi/acpica/exutils.o AR sound/hda/built-in.a AR sound/built-in.a CC arch/x86/kernel/cpu/capflags.o CC fs/9p/xattr.o AR arch/x86/kernel/cpu/built-in.a CC crypto/authenc.o CC arch/x86/kernel/dumpstack_32.o CC lib/nmi_backtrace.o CC net/ethtool/channels.o CC net/sunrpc/auth_gss/gss_krb5_seal.o CC kernel/trace/error_report-traces.o CC drivers/acpi/acpica/hwacpi.o CC mm/memory.o CC net/wireless/radiotap.o CC net/netlabel/netlabel_user.o CC drivers/gpu/drm/virtio/virtgpu_kms.o CC net/netfilter/nf_conntrack_proto_icmpv6.o CC kernel/trace/power-traces.o AR drivers/gpu/drm/imx/built-in.a AR drivers/mfd/built-in.a CC crypto/authencesn.o CC net/netfilter/nf_conntrack_netlink.o CC drivers/base/power/wakeup.o CC net/netfilter/nf_conntrack_ftp.o CC net/rfkill/core.o CC drivers/block/virtio_blk.o AR drivers/pci/built-in.a CC net/rfkill/input.o AR kernel/time/built-in.a CC net/ethtool/coalesce.o CC net/mac80211/status.o CC drivers/acpi/acpica/hwesleep.o CC drivers/gpu/drm/virtio/virtgpu_gem.o CC drivers/gpu/drm/i915/i915_params.o CC drivers/tty/tty_mutex.o CC kernel/signal.o CC net/ipv6/ip6_input.o CC net/sunrpc/auth_gss/gss_krb5_unseal.o CC arch/x86/kernel/time.o CC net/core/dev_ioctl.o CC net/sunrpc/auth_null.o AR fs/9p/built-in.a CC net/netlabel/netlabel_kapi.o AR drivers/nfc/built-in.a CC fs/ext4/mballoc.o CC net/sunrpc/auth_gss/gss_krb5_wrap.o CC drivers/acpi/bus.o CC drivers/acpi/acpica/hwgpe.o CC drivers/gpu/drm/i915/i915_pci.o CC crypto/lzo.o CC net/9p/mod.o CC kernel/trace/rpm-traces.o AR drivers/dax/hmem/built-in.a AR drivers/dax/built-in.a CC net/netlabel/netlabel_domainhash.o CC net/mac80211/driver-ops.o CC fs/nfs/mount_clnt.o CC arch/x86/kernel/ioport.o CC net/ipv4/inet_hashtables.o CC lib/objpool.o AR drivers/gpu/drm/panel/built-in.a CC net/sunrpc/auth_tls.o CC kernel/trace/trace_dynevent.o CC drivers/acpi/acpica/hwregs.o CC net/wireless/util.o CC drivers/acpi/acpica/hwsleep.o CC drivers/tty/tty_ldsem.o CC block/mq-deadline.o CC drivers/gpu/drm/virtio/virtgpu_vram.o AR net/rfkill/built-in.a CC net/sunrpc/auth_gss/gss_krb5_crypto.o CC arch/x86/kernel/dumpstack.o CC net/sunrpc/auth_gss/gss_krb5_keys.o CC net/9p/client.o CC net/9p/error.o CC crypto/lzo-rle.o CC arch/x86/kernel/nmi.o CC drivers/acpi/glue.o CC net/core/tso.o CC drivers/base/power/wakeup_stats.o CC net/netlabel/netlabel_addrlist.o AR drivers/block/built-in.a CC crypto/rng.o CC drivers/tty/tty_baudrate.o CC drivers/acpi/acpica/hwvalid.o CC net/ethtool/pause.o AR net/xfrm/built-in.a CC net/ipv6/addrconf.o CC net/mac80211/sta_info.o CC kernel/sys.o CC net/mac80211/wep.o CC fs/nfs/nfstrace.o CC drivers/acpi/scan.o CC kernel/umh.o CC drivers/gpu/drm/i915/i915_scatterlist.o CC net/ipv6/addrlabel.o CC block/kyber-iosched.o CC fs/debugfs/inode.o CC net/netlabel/netlabel_mgmt.o CC net/ipv6/route.o CC net/dns_resolver/dns_key.o CC drivers/base/power/trace.o CC drivers/acpi/acpica/hwxface.o CC kernel/trace/trace_probe.o CC drivers/gpu/drm/virtio/virtgpu_display.o CC kernel/workqueue.o CC fs/debugfs/file.o CC drivers/dma-buf/dma-buf.o CC drivers/tty/tty_jobctrl.o CC net/wireless/reg.o CC net/dns_resolver/dns_query.o CC drivers/acpi/mipi-disco-img.o CC block/blk-mq-debugfs.o CC lib/plist.o CC fs/tracefs/inode.o CC drivers/base/driver.o CC crypto/drbg.o CC drivers/acpi/acpica/hwxfsleep.o CC fs/tracefs/event_inode.o CC arch/x86/kernel/ldt.o CC lib/radix-tree.o CC net/netfilter/nf_conntrack_irc.o AR drivers/cxl/core/built-in.a AR drivers/cxl/built-in.a CC net/sunrpc/auth_unix.o CC drivers/gpu/drm/i915/i915_switcheroo.o CC [M] fs/efivarfs/inode.o CC crypto/jitterentropy.o AR net/sunrpc/auth_gss/built-in.a CC net/ethtool/eee.o CC mm/mincore.o AR drivers/gpu/drm/bridge/analogix/built-in.a CC [M] fs/efivarfs/file.o AR drivers/gpu/drm/bridge/cadence/built-in.a AR drivers/gpu/drm/hisilicon/built-in.a CC net/9p/protocol.o AR drivers/gpu/drm/bridge/imx/built-in.a AR drivers/gpu/drm/bridge/synopsys/built-in.a AR drivers/gpu/drm/bridge/built-in.a AR drivers/base/power/built-in.a CC drivers/acpi/acpica/hwpci.o CC net/9p/trans_common.o CC block/blk-pm.o CC drivers/tty/n_null.o CC drivers/gpu/drm/virtio/virtgpu_vq.o CC drivers/gpu/drm/virtio/virtgpu_fence.o CC drivers/base/class.o CC net/9p/trans_fd.o CC fs/open.o AR net/dns_resolver/built-in.a CC net/netfilter/nf_conntrack_sip.o CC kernel/trace/trace_uprobe.o CC net/ipv4/inet_timewait_sock.o CC net/ethtool/tsinfo.o CC drivers/macintosh/mac_hid.o CC drivers/acpi/acpica/nsaccess.o CC fs/ext4/migrate.o CC drivers/dma-buf/dma-fence.o CC net/sunrpc/svc.o CC net/netlabel/netlabel_unlabeled.o CC block/holder.o AR fs/debugfs/built-in.a CC net/sunrpc/svcsock.o CC net/handshake/alert.o CC arch/x86/kernel/setup.o CC [M] fs/efivarfs/super.o CC net/handshake/genl.o CC drivers/gpu/drm/i915/i915_sysfs.o CC drivers/tty/pty.o CC crypto/jitterentropy-kcapi.o CC net/wireless/scan.o AR fs/tracefs/built-in.a CC net/wireless/nl80211.o CC lib/ratelimit.o CC [M] fs/efivarfs/vars.o CC net/ipv6/ip6_fib.o CC kernel/pid.o CC drivers/dma-buf/dma-fence-array.o CC fs/nfs/export.o CC net/handshake/netlink.o CC drivers/base/platform.o CC drivers/acpi/acpica/nsalloc.o CC drivers/gpu/drm/virtio/virtgpu_object.o CC lib/rbtree.o CC lib/seq_buf.o CC drivers/acpi/resource.o AR drivers/scsi/pcmcia/built-in.a CC drivers/scsi/scsi.o AR drivers/macintosh/built-in.a CC drivers/base/cpu.o CC mm/mlock.o CC fs/ext4/mmp.o CC crypto/ghash-generic.o AR block/built-in.a CC fs/ext4/move_extent.o CC crypto/hash_info.o CC drivers/acpi/acpica/nsarguments.o CC net/ipv4/inet_connection_sock.o CC net/mac80211/aead_api.o CC fs/read_write.o CC net/mac80211/wpa.o CC net/netlabel/netlabel_cipso_v4.o CC drivers/tty/tty_audit.o CC net/9p/trans_virtio.o CC drivers/gpu/drm/i915/i915_utils.o LD [M] fs/efivarfs/efivarfs.o CC drivers/scsi/hosts.o CC net/ethtool/cabletest.o CC net/ethtool/tunnels.o CC lib/siphash.o CC net/ethtool/fec.o CC net/ethtool/eeprom.o CC crypto/rsapubkey.asn1.o CC drivers/dma-buf/dma-fence-chain.o CC crypto/rsaprivkey.asn1.o AR crypto/built-in.a CC drivers/gpu/drm/virtio/virtgpu_debugfs.o CC drivers/acpi/acpica/nsconvert.o CC net/mac80211/scan.o CC arch/x86/kernel/x86_init.o CC drivers/gpu/drm/virtio/virtgpu_plane.o CC drivers/gpu/drm/virtio/virtgpu_ioctl.o CC net/ethtool/stats.o CC drivers/gpu/drm/virtio/virtgpu_prime.o CC kernel/trace/rethook.o CC fs/nfs/sysfs.o AR drivers/nvme/common/built-in.a CC net/handshake/request.o AR drivers/nvme/host/built-in.a CC lib/string.o AR drivers/nvme/target/built-in.a CC drivers/base/firmware.o AR drivers/nvme/built-in.a CC arch/x86/kernel/i8259.o CC net/ipv6/ipv6_sockglue.o CC drivers/gpu/drm/virtio/virtgpu_trace_points.o CC drivers/acpi/acpica/nsdump.o CC net/netfilter/nf_nat_core.o CC drivers/tty/sysrq.o CC net/ethtool/phc_vclocks.o CC lib/timerqueue.o CC fs/ext4/namei.o CC drivers/dma-buf/dma-fence-unwrap.o CC mm/mmap.o CC drivers/acpi/acpi_processor.o CC drivers/scsi/scsi_ioctl.o CC drivers/base/init.o CC net/sunrpc/svcauth.o CC lib/union_find.o CC net/netlabel/netlabel_calipso.o CC drivers/gpu/drm/i915/intel_clock_gating.o CC net/ipv4/tcp.o CC drivers/acpi/acpica/nseval.o CC lib/vsprintf.o AR kernel/trace/built-in.a CC net/wireless/mlme.o CC arch/x86/kernel/irqinit.o CC net/mac80211/offchannel.o CC net/sunrpc/svcauth_unix.o CC net/handshake/tlshd.o CC drivers/dma-buf/dma-resv.o CC net/netfilter/nf_nat_proto.o CC drivers/gpu/drm/virtio/virtgpu_submit.o CC drivers/acpi/processor_core.o CC net/ethtool/mm.o CC drivers/ata/libata-core.o CC net/devres.o CC net/sunrpc/addr.o CC net/core/sock_reuseport.o CC kernel/task_work.o AR net/9p/built-in.a CC mm/mmu_gather.o CC net/mac80211/ht.o CC net/mac80211/agg-tx.o CC drivers/acpi/acpica/nsinit.o CC net/ipv4/tcp_input.o CC fs/file_table.o CC fs/nfs/fs_context.o CC drivers/base/map.o AR drivers/net/phy/mediatek/built-in.a CC net/core/fib_notifier.o AR drivers/net/phy/qcom/built-in.a CC drivers/net/phy/realtek/realtek_main.o CC drivers/acpi/processor_pdc.o CC drivers/scsi/scsicam.o AR drivers/gpu/drm/mxsfb/built-in.a CC mm/mprotect.o CC drivers/net/phy/mdio-boardinfo.o AR drivers/net/pse-pd/built-in.a CC drivers/dma-buf/sync_file.o AR drivers/tty/built-in.a CC drivers/base/devres.o CC net/core/xdp.o CC net/ipv4/tcp_output.o CC drivers/gpu/drm/i915/intel_cpu_info.o CC drivers/acpi/acpica/nsload.o CC net/handshake/trace.o CC drivers/net/mdio/acpi_mdio.o CC net/socket.o CC drivers/net/phy/realtek/realtek_hwmon.o CC kernel/extable.o CC drivers/acpi/ec.o AR net/netlabel/built-in.a CC net/ipv6/ndisc.o AR drivers/gpu/drm/virtio/built-in.a CC fs/super.o CC arch/x86/kernel/jump_label.o CC mm/mremap.o CC net/netfilter/nf_nat_helper.o CC drivers/scsi/scsi_error.o CC drivers/net/phy/stubs.o CC drivers/acpi/acpica/nsnames.o CC drivers/gpu/drm/i915/intel_device_info.o CC fs/nfs/nfsroot.o CC net/core/flow_offload.o CC net/ethtool/module.o CC net/sunrpc/rpcb_clnt.o CC lib/win_minmax.o AR drivers/dma-buf/built-in.a CC net/mac80211/agg-rx.o CC net/sysctl_net.o CC kernel/params.o CC net/ipv6/udp.o CC net/ipv4/tcp_timer.o CC drivers/base/attribute_container.o CC drivers/base/transport_class.o CC net/ethtool/cmis_fw_update.o CC drivers/acpi/acpica/nsobject.o CC arch/x86/kernel/irq_work.o CC fs/ext4/page-io.o CC drivers/net/mdio/fwnode_mdio.o AR drivers/gpu/drm/tiny/built-in.a CC fs/char_dev.o CC kernel/kthread.o CC drivers/scsi/scsi_lib.o CC net/mac80211/vht.o AR drivers/net/phy/realtek/built-in.a CC net/wireless/ibss.o CC net/sunrpc/timer.o CC drivers/firewire/init_ohci1394_dma.o CC arch/x86/kernel/probe_roms.o CC fs/nfs/sysctl.o CC drivers/net/phy/mdio_devres.o CC drivers/acpi/acpica/nsparse.o CC drivers/base/topology.o CC mm/msync.o CC net/core/gro.o CC drivers/gpu/drm/i915/intel_memory_region.o AR drivers/net/pcs/built-in.a CC net/ipv4/tcp_ipv4.o AR net/handshake/built-in.a CC drivers/acpi/dock.o CC net/core/netdev-genl.o CC fs/ext4/readpage.o CC net/netfilter/nf_nat_masquerade.o CC fs/ext4/resize.o CC net/ipv6/udplite.o CC drivers/acpi/acpica/nspredef.o CC drivers/acpi/acpica/nsprepkg.o CC lib/xarray.o CC drivers/acpi/acpica/nsrepair.o CC net/wireless/sme.o CC drivers/ata/libata-scsi.o CC drivers/net/phy/phy.o CC mm/page_vma_mapped.o AR drivers/net/ethernet/3com/built-in.a CC drivers/net/ethernet/8390/ne2k-pci.o AR drivers/firewire/built-in.a CC net/ipv4/tcp_minisocks.o AR drivers/net/mdio/built-in.a CC drivers/acpi/acpica/nsrepair2.o CC arch/x86/kernel/sys_ia32.o CC fs/nfs/nfs3super.o CC net/ipv6/raw.o AR drivers/gpu/drm/xlnx/built-in.a AR drivers/net/ethernet/adaptec/built-in.a CC fs/stat.o CC drivers/acpi/pci_root.o CC net/ethtool/cmis_cdb.o CC fs/ext4/super.o CC net/core/netdev-genl-gen.o CC drivers/base/container.o CC arch/x86/kernel/ksysfs.o CC net/ipv4/tcp_cong.o CC fs/nfs/nfs3client.o CC drivers/cdrom/cdrom.o CC drivers/net/phy/phy-c45.o CC kernel/sys_ni.o CC fs/nfs/nfs3proc.o CC drivers/scsi/constants.o CC net/mac80211/he.o CC drivers/ata/libata-eh.o CC drivers/acpi/acpica/nssearch.o AR drivers/net/ethernet/agere/built-in.a CC net/wireless/chan.o CC drivers/base/property.o CC net/sunrpc/xdr.o CC drivers/gpu/drm/i915/intel_pcode.o CC kernel/nsproxy.o CC net/ethtool/pse-pd.o CC mm/pagewalk.o CC drivers/net/ethernet/8390/8390.o CC arch/x86/kernel/bootflag.o CC drivers/net/phy/phy-core.o AR drivers/gpu/drm/gud/built-in.a CC net/core/gso.o CC arch/x86/kernel/e820.o CC drivers/ata/libata-transport.o CC drivers/acpi/acpica/nsutils.o CC kernel/notifier.o CC drivers/ata/libata-trace.o CC net/netfilter/nf_nat_ftp.o CC drivers/scsi/scsi_lib_dma.o CC drivers/acpi/pci_link.o CC lib/lockref.o CC net/sunrpc/sunrpc_syms.o CC drivers/net/phy/phy_device.o CC drivers/base/cacheinfo.o CC mm/pgtable-generic.o CC fs/exec.o CC net/ipv6/icmp.o AR drivers/net/ethernet/alacritech/built-in.a CC net/wireless/ethtool.o CC net/netfilter/nf_nat_irc.o CC drivers/acpi/pci_irq.o CC drivers/scsi/scsi_scan.o CC lib/bcd.o CC drivers/ata/libata-sata.o CC lib/sort.o AR drivers/auxdisplay/built-in.a CC drivers/base/swnode.o AR drivers/net/ethernet/alteon/built-in.a CC net/core/net-sysfs.o CC drivers/acpi/acpica/nswalk.o CC lib/parser.o CC drivers/gpu/drm/i915/intel_region_ttm.o AR drivers/gpu/drm/solomon/built-in.a CC fs/nfs/nfs3xdr.o CC drivers/net/phy/linkmode.o AR drivers/net/ethernet/amazon/built-in.a CC drivers/gpu/drm/i915/intel_runtime_pm.o AR drivers/net/ethernet/amd/built-in.a CC net/ethtool/plca.o CC lib/debug_locks.o CC drivers/base/faux.o CC [M] drivers/gpu/drm/scheduler/sched_main.o CC net/sunrpc/cache.o CC arch/x86/kernel/pci-dma.o CC net/netfilter/nf_nat_sip.o CC [M] drivers/gpu/drm/scheduler/sched_fence.o CC drivers/acpi/acpica/nsxfeval.o CC kernel/ksysfs.o CC drivers/net/phy/phy_link_topology.o CC [M] drivers/gpu/drm/scheduler/sched_entity.o AR drivers/net/ethernet/8390/built-in.a AR drivers/net/ethernet/aquantia/built-in.a CC lib/random32.o AR drivers/net/ethernet/arc/built-in.a AR drivers/net/ethernet/asix/built-in.a CC mm/rmap.o AR drivers/net/ethernet/atheros/built-in.a AR drivers/net/ethernet/cadence/built-in.a CC net/netfilter/x_tables.o CC drivers/net/ethernet/broadcom/bnx2.o CC drivers/net/ethernet/broadcom/tg3.o HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob CC arch/x86/kernel/quirks.o CC net/core/hotdata.o CC fs/nfs/nfs3acl.o CC drivers/acpi/acpica/nsxfname.o AR drivers/cdrom/built-in.a CC net/wireless/mesh.o CC drivers/gpu/drm/drm_atomic.o AR drivers/net/wireless/admtek/built-in.a AR drivers/net/wireless/ath/built-in.a CC fs/ext4/symlink.o GEN xe_wa_oob.c xe_wa_oob.h AR drivers/net/wireless/atmel/built-in.a GEN drivers/scsi/scsi_devinfo_tbl.c CC [M] drivers/gpu/drm/xe/xe_bb.o CC drivers/acpi/acpica/nsxfobj.o AR drivers/net/wireless/broadcom/built-in.a CC drivers/gpu/drm/drm_atomic_uapi.o AR drivers/net/wireless/intel/built-in.a AR drivers/net/wireless/intersil/built-in.a AR drivers/net/wireless/marvell/built-in.a AR drivers/net/wireless/mediatek/built-in.a AR drivers/net/wireless/microchip/built-in.a AR drivers/net/wireless/purelifi/built-in.a AR drivers/net/wireless/quantenna/built-in.a AR drivers/net/wireless/ralink/built-in.a AR drivers/net/wireless/realtek/built-in.a AR drivers/net/wireless/rsi/built-in.a CC lib/bust_spinlocks.o AR drivers/net/wireless/silabs/built-in.a CC kernel/cred.o AR drivers/net/wireless/st/built-in.a CC lib/kasprintf.o AR drivers/net/wireless/ti/built-in.a AR drivers/net/wireless/zydas/built-in.a CC drivers/base/auxiliary.o AR drivers/net/wireless/virtual/built-in.a CC net/mac80211/s1g.o AR drivers/net/wireless/built-in.a CC net/ipv6/mcast.o CC fs/pipe.o CC drivers/gpu/drm/i915/intel_sbi.o CC mm/vmalloc.o CC net/ethtool/phy.o CC drivers/acpi/acpica/psargs.o CC [M] drivers/gpu/drm/xe/xe_bo.o CC drivers/scsi/scsi_devinfo.o CC net/wireless/ap.o CC fs/ext4/sysfs.o CC net/ipv4/tcp_metrics.o CC kernel/reboot.o CC net/sunrpc/rpc_pipe.o CC arch/x86/kernel/kdebugfs.o CC net/mac80211/ibss.o CC drivers/gpu/drm/drm_auth.o CC net/ipv6/reassembly.o CC fs/namei.o CC drivers/base/devtmpfs.o CC drivers/net/phy/mdio_bus.o CC drivers/acpi/acpi_apd.o CC net/netfilter/xt_tcpudp.o CC lib/bitmap.o CC drivers/acpi/acpica/psloop.o CC mm/vma.o CC [M] drivers/gpu/drm/xe/xe_bo_evict.o CC drivers/scsi/scsi_sysctl.o LD [M] drivers/gpu/drm/scheduler/gpu-sched.o AR drivers/net/usb/built-in.a CC drivers/net/mii.o CC drivers/acpi/acpi_platform.o CC lib/scatterlist.o CC drivers/ata/libata-sff.o CC [M] drivers/gpu/drm/xe/xe_devcoredump.o CC drivers/gpu/drm/i915/intel_step.o CC drivers/scsi/scsi_proc.o CC arch/x86/kernel/alternative.o CC drivers/gpu/drm/i915/intel_uncore.o CC drivers/gpu/drm/i915/intel_uncore_trace.o AR drivers/net/ethernet/brocade/built-in.a CC arch/x86/kernel/i8253.o CC net/sunrpc/sysfs.o CC net/sunrpc/svc_xprt.o CC drivers/acpi/acpica/psobject.o CC drivers/net/loopback.o CC net/core/netdev_rx_queue.o CC drivers/gpu/drm/i915/intel_wakeref.o CC drivers/base/module.o CC net/wireless/trace.o CC fs/nfs/nfs4proc.o CC net/ethtool/tsconfig.o CC kernel/async.o CC net/ipv6/tcp_ipv6.o CC mm/process_vm_access.o CC drivers/net/phy/mdio_device.o CC fs/nfs/nfs4xdr.o CC kernel/range.o CC drivers/base/auxiliary_sysfs.o CC fs/fcntl.o CC net/sunrpc/xprtmultipath.o CC drivers/acpi/acpica/psopcode.o CC net/ipv4/tcp_fastopen.o CC drivers/net/netconsole.o CC fs/nfs/nfs4state.o CC drivers/scsi/scsi_debugfs.o CC drivers/gpu/drm/drm_blend.o CC kernel/smpboot.o CC fs/ext4/xattr.o CC net/ipv6/ping.o CC drivers/gpu/drm/i915/vlv_sideband.o CC drivers/scsi/scsi_trace.o CC drivers/net/phy/swphy.o CC drivers/acpi/acpica/psopinfo.o CC net/netfilter/xt_CONNSECMARK.o CC mm/page_alloc.o CC drivers/acpi/acpi_pnp.o CC net/wireless/ocb.o CC drivers/scsi/scsi_logging.o CC drivers/base/devcoredump.o CC lib/list_sort.o CC net/netfilter/xt_NFLOG.o CC net/core/net-procfs.o CC lib/uuid.o CC drivers/acpi/power.o CC drivers/ata/libata-pmp.o CC lib/iov_iter.o AR drivers/net/ethernet/cavium/common/built-in.a CC drivers/acpi/acpica/psparse.o AR drivers/net/ethernet/cavium/thunder/built-in.a AR drivers/net/ethernet/cavium/liquidio/built-in.a AR drivers/net/ethernet/cavium/octeon/built-in.a CC drivers/gpu/drm/drm_bridge.o CC fs/ext4/xattr_hurd.o AR drivers/net/ethernet/cavium/built-in.a CC [M] drivers/gpu/drm/xe/xe_device.o CC drivers/pcmcia/cs.o AR net/ethtool/built-in.a CC arch/x86/kernel/hw_breakpoint.o CC drivers/usb/common/common.o CC drivers/usb/core/usb.o CC [M] drivers/gpu/drm/xe/xe_device_sysfs.o CC kernel/ucount.o CC drivers/ata/libata-acpi.o AR drivers/usb/phy/built-in.a CC drivers/net/virtio_net.o CC drivers/net/phy/fixed_phy.o CC drivers/input/serio/serio.o CC drivers/base/platform-msi.o CC drivers/input/keyboard/atkbd.o CC net/mac80211/iface.o CC drivers/acpi/acpica/psscope.o CC arch/x86/kernel/tsc.o AR drivers/net/ethernet/chelsio/built-in.a CC net/core/netpoll.o CC drivers/scsi/scsi_pm.o CC net/core/fib_rules.o CC net/core/net-traces.o CC lib/clz_ctz.o CC arch/x86/kernel/tsc_msr.o CC drivers/input/serio/i8042.o CC kernel/regset.o CC drivers/input/serio/serport.o CC drivers/base/physical_location.o CC mm/page_frag_cache.o CC [M] drivers/gpu/drm/xe/xe_dma_buf.o CC net/netfilter/xt_SECMARK.o CC net/ipv4/tcp_rate.o CC fs/ioctl.o CC drivers/acpi/acpica/pstree.o CC drivers/usb/common/debug.o CC drivers/input/mouse/psmouse-base.o CC fs/nfs/nfs4renewd.o CC drivers/base/trace.o CC drivers/pcmcia/socket_sysfs.o CC net/mac80211/link.o AR drivers/usb/common/built-in.a CC fs/ext4/xattr_trusted.o CC fs/readdir.o CC drivers/gpu/drm/i915/vlv_suspend.o CC net/wireless/pmsr.o CC drivers/net/net_failover.o CC drivers/rtc/lib.o CC kernel/ksyms_common.o CC net/sunrpc/stats.o CC drivers/usb/core/hub.o CC net/netfilter/xt_TCPMSS.o CC drivers/acpi/acpica/psutils.o CC drivers/ata/libata-pata-timings.o CC drivers/scsi/scsi_bsg.o AR drivers/net/phy/built-in.a CC drivers/input/mouse/synaptics.o CC net/core/selftests.o AR drivers/input/joystick/built-in.a CC mm/init-mm.o CC arch/x86/kernel/io_delay.o CC drivers/i2c/algos/i2c-algo-bit.o AR drivers/input/keyboard/built-in.a CC drivers/i2c/busses/i2c-i801.o CC net/ipv6/exthdrs.o CC drivers/acpi/acpica/pswalk.o CC [M] drivers/gpu/drm/xe/xe_drm_client.o CC drivers/usb/mon/mon_main.o CC drivers/rtc/class.o CC drivers/pcmcia/cardbus.o CC drivers/gpu/drm/drm_cache.o CC drivers/acpi/event.o CC net/mac80211/rate.o CC kernel/groups.o CC net/ipv6/datagram.o AR drivers/base/built-in.a CC mm/memblock.o CC net/ipv6/ip6_flowlabel.o CC arch/x86/kernel/rtc.o CC drivers/usb/host/pci-quirks.o CC drivers/input/serio/libps2.o CC drivers/rtc/interface.o CC drivers/acpi/acpica/psxface.o CC drivers/scsi/scsi_common.o CC net/sunrpc/sysctl.o CC net/netfilter/xt_conntrack.o CC net/ipv4/tcp_recovery.o CC drivers/ata/ahci.o CC drivers/acpi/evged.o AR drivers/net/ethernet/cisco/built-in.a CC drivers/usb/core/hcd.o CC net/ipv4/tcp_ulp.o CC drivers/gpu/drm/drm_color_mgmt.o CC lib/bsearch.o CC drivers/pcmcia/ds.o CC drivers/usb/class/usblp.o CC drivers/gpu/drm/i915/soc/intel_dram.o CC drivers/usb/mon/mon_stat.o CC arch/x86/kernel/resource.o CC drivers/acpi/sysfs.o AR drivers/i2c/algos/built-in.a AR drivers/i2c/muxes/built-in.a CC net/mac80211/michael.o CC drivers/acpi/acpica/rsaddr.o CC drivers/scsi/scsi_transport_spi.o CC drivers/input/mouse/focaltech.o CC drivers/ata/libahci.o CC drivers/usb/host/ehci-hcd.o AS arch/x86/kernel/irqflags.o CC kernel/kcmp.o CC fs/select.o CC arch/x86/kernel/static_call.o CC [M] drivers/gpu/drm/xe/xe_eu_stall.o AR drivers/i3c/built-in.a CC drivers/gpu/drm/drm_connector.o AR drivers/input/serio/built-in.a AR drivers/i2c/busses/built-in.a CC drivers/gpu/drm/drm_crtc.o CC drivers/i2c/i2c-boardinfo.o CC lib/find_bit.o CC drivers/acpi/acpica/rscalc.o CC lib/llist.o CC drivers/rtc/nvmem.o CC drivers/rtc/dev.o CC drivers/acpi/property.o CC drivers/usb/mon/mon_text.o CC net/mac80211/tkip.o CC kernel/freezer.o AR net/sunrpc/built-in.a CC arch/x86/kernel/process.o CC drivers/i2c/i2c-core-base.o CC lib/lwq.o CC drivers/scsi/virtio_scsi.o CC arch/x86/kernel/ptrace.o CC drivers/rtc/proc.o CC drivers/input/mouse/alps.o CC mm/slub.o CC drivers/usb/host/ehci-pci.o CC net/netfilter/xt_policy.o AR drivers/usb/class/built-in.a CC drivers/usb/core/urb.o CC drivers/acpi/acpica/rscreate.o AR drivers/net/ethernet/cortina/built-in.a CC lib/memweight.o AR drivers/net/ethernet/dec/tulip/built-in.a CC lib/kfifo.o AR drivers/net/ethernet/dec/built-in.a CC drivers/rtc/sysfs.o CC drivers/usb/core/message.o AR drivers/media/i2c/built-in.a AR drivers/media/tuners/built-in.a CC drivers/gpu/drm/drm_displayid.o CC net/ipv4/tcp_offload.o AR drivers/media/rc/keymaps/built-in.a AR drivers/media/rc/built-in.a CC drivers/pcmcia/pcmcia_resource.o CC net/ipv4/tcp_plb.o AR drivers/media/common/b2c2/built-in.a CC net/ipv6/inet6_connection_sock.o CC fs/nfs/nfs4super.o AR drivers/media/common/saa7146/built-in.a AR drivers/media/common/siano/built-in.a AR drivers/media/platform/allegro-dvt/built-in.a AR drivers/media/common/v4l2-tpg/built-in.a AR drivers/media/pci/ttpci/built-in.a AR drivers/media/platform/amlogic/meson-ge2d/built-in.a AR drivers/media/common/videobuf2/built-in.a AR drivers/media/platform/amlogic/built-in.a AR drivers/media/pci/b2c2/built-in.a AR drivers/media/common/built-in.a AR drivers/media/mmc/siano/built-in.a AR drivers/media/usb/b2c2/built-in.a AR drivers/media/mmc/built-in.a AR drivers/media/pci/pluto2/built-in.a AR drivers/media/platform/amphion/built-in.a CC mm/madvise.o AR drivers/media/usb/dvb-usb/built-in.a CC drivers/input/mouse/byd.o AR drivers/media/pci/dm1105/built-in.a AR drivers/media/usb/dvb-usb-v2/built-in.a AR drivers/media/platform/aspeed/built-in.a CC drivers/ata/ata_piix.o AR drivers/media/pci/pt1/built-in.a AR drivers/media/usb/s2255/built-in.a AR drivers/media/platform/atmel/built-in.a AR drivers/media/pci/pt3/built-in.a AR drivers/media/usb/siano/built-in.a AR drivers/media/platform/broadcom/built-in.a AR drivers/media/pci/mantis/built-in.a AR drivers/media/usb/ttusb-budget/built-in.a CC drivers/gpu/drm/i915/soc/intel_gmch.o AR drivers/media/platform/cadence/built-in.a AR drivers/media/pci/ngene/built-in.a AR drivers/media/usb/ttusb-dec/built-in.a AR drivers/media/pci/ddbridge/built-in.a AR drivers/media/usb/built-in.a AR drivers/media/platform/chips-media/coda/built-in.a AR drivers/media/pci/saa7146/built-in.a AR drivers/media/platform/chips-media/wave5/built-in.a AR drivers/media/platform/imagination/built-in.a CC net/ipv6/udp_offload.o AR drivers/media/platform/chips-media/built-in.a AR drivers/media/pci/smipcie/built-in.a CC drivers/usb/host/ohci-hcd.o AR drivers/media/pci/netup_unidvb/built-in.a AR drivers/media/platform/intel/built-in.a AR drivers/media/platform/marvell/built-in.a CC drivers/usb/host/ohci-pci.o AR drivers/media/pci/intel/ipu3/built-in.a AR drivers/media/pci/intel/ivsc/built-in.a AR drivers/media/platform/mediatek/jpeg/built-in.a AR drivers/media/pci/intel/built-in.a AR drivers/media/platform/mediatek/mdp/built-in.a AR drivers/media/pci/built-in.a CC drivers/acpi/acpica/rsdumpinfo.o AR drivers/media/platform/mediatek/vcodec/common/built-in.a CC drivers/gpu/drm/drm_drv.o AR drivers/media/platform/mediatek/vcodec/encoder/built-in.a AR drivers/media/platform/mediatek/vcodec/decoder/built-in.a CC drivers/usb/host/uhci-hcd.o CC fs/nfs/nfs4file.o AR drivers/media/platform/mediatek/vcodec/built-in.a AR drivers/media/platform/mediatek/vpu/built-in.a AR drivers/media/platform/mediatek/mdp3/built-in.a AR drivers/media/platform/mediatek/built-in.a CC fs/ext4/xattr_user.o AR drivers/media/platform/microchip/built-in.a AR drivers/media/platform/nuvoton/built-in.a AR drivers/media/platform/nvidia/tegra-vde/built-in.a AR drivers/media/platform/nvidia/built-in.a CC drivers/usb/mon/mon_bin.o CC drivers/acpi/debugfs.o AR drivers/media/platform/nxp/dw100/built-in.a CC kernel/profile.o AR drivers/media/platform/nxp/imx-jpeg/built-in.a AR drivers/media/platform/nxp/imx8-isi/built-in.a AR drivers/media/platform/nxp/built-in.a AR drivers/media/firewire/built-in.a AR drivers/media/platform/qcom/camss/built-in.a AR drivers/media/platform/qcom/venus/built-in.a AR drivers/media/platform/qcom/built-in.a AR drivers/input/tablet/built-in.a CC drivers/usb/host/xhci.o CC drivers/usb/storage/scsiglue.o AR drivers/media/platform/raspberrypi/pisp_be/built-in.a AR drivers/media/platform/raspberrypi/rp1-cfe/built-in.a CC net/netfilter/xt_state.o AR drivers/media/platform/raspberrypi/built-in.a AR drivers/net/ethernet/dlink/built-in.a CC drivers/rtc/rtc-mc146818-lib.o AR drivers/media/platform/renesas/rcar-vin/built-in.a AR drivers/pps/clients/built-in.a CC drivers/pps/pps.o AR drivers/media/platform/renesas/rzg2l-cru/built-in.a AR drivers/media/platform/renesas/vsp1/built-in.a AR drivers/media/platform/renesas/built-in.a CC drivers/acpi/acpica/rsinfo.o AR drivers/media/platform/rockchip/rga/built-in.a AR drivers/media/platform/rockchip/rkisp1/built-in.a AR drivers/media/platform/rockchip/built-in.a AR drivers/media/platform/samsung/exynos-gsc/built-in.a AR drivers/media/platform/st/sti/bdisp/built-in.a CC mm/page_io.o AR drivers/media/platform/st/sti/c8sectpfe/built-in.a CC lib/percpu-refcount.o AR drivers/media/platform/samsung/exynos4-is/built-in.a AR drivers/media/platform/st/sti/delta/built-in.a AR drivers/media/platform/samsung/s3c-camif/built-in.a AR drivers/media/platform/st/sti/hva/built-in.a AR drivers/media/platform/samsung/s5p-g2d/built-in.a CC drivers/scsi/sd.o AR drivers/media/platform/st/stm32/built-in.a AR drivers/media/platform/samsung/s5p-jpeg/built-in.a CC net/mac80211/aes_cmac.o AR drivers/media/platform/st/built-in.a AR drivers/media/platform/samsung/s5p-mfc/built-in.a AR drivers/media/platform/samsung/built-in.a CC drivers/pps/kapi.o AR drivers/media/spi/built-in.a CC [M] drivers/gpu/drm/xe/xe_exec.o GEN net/wireless/shipped-certs.c CC drivers/pps/sysfs.o CC [M] net/netfilter/nf_log_syslog.o AR drivers/media/platform/sunxi/sun4i-csi/built-in.a AR drivers/media/platform/sunxi/sun6i-csi/built-in.a CC net/mac80211/aes_gmac.o CC kernel/stacktrace.o AR drivers/media/platform/sunxi/sun6i-mipi-csi2/built-in.a CC drivers/ptp/ptp_clock.o AR drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/built-in.a AR drivers/media/platform/sunxi/sun8i-di/built-in.a AR drivers/media/platform/sunxi/sun8i-rotate/built-in.a AR drivers/media/platform/sunxi/built-in.a AR drivers/media/platform/ti/am437x/built-in.a AR drivers/media/platform/ti/cal/built-in.a AR drivers/media/platform/ti/vpe/built-in.a CC drivers/usb/storage/protocol.o AR drivers/media/platform/ti/davinci/built-in.a CC drivers/ata/pata_amd.o AR drivers/media/platform/ti/j721e-csi2rx/built-in.a AR drivers/media/platform/ti/omap/built-in.a CC drivers/acpi/acpica/rsio.o AR drivers/media/platform/ti/omap3isp/built-in.a AR drivers/media/platform/ti/built-in.a AR drivers/media/platform/verisilicon/built-in.a CC drivers/usb/core/driver.o AR drivers/media/platform/via/built-in.a AR drivers/media/platform/xilinx/built-in.a AR drivers/media/platform/built-in.a CC fs/ext4/fast_commit.o AR drivers/media/test-drivers/built-in.a AR drivers/media/built-in.a CC drivers/pcmcia/cistpl.o CC kernel/dma.o CC drivers/input/mouse/logips2pp.o CC arch/x86/kernel/tls.o CC fs/dcache.o CC [M] net/netfilter/xt_mark.o CC drivers/gpu/drm/i915/soc/intel_pch.o CC drivers/gpu/drm/i915/soc/intel_rom.o CC drivers/gpu/drm/i915/i915_memcpy.o CC mm/swap_state.o CC drivers/rtc/rtc-cmos.o CC arch/x86/kernel/step.o CC drivers/i2c/i2c-core-smbus.o CC drivers/pcmcia/pcmcia_cis.o CC drivers/acpi/acpica/rsirq.o AR drivers/pps/built-in.a CC net/core/ptp_classifier.o AR drivers/net/ethernet/emulex/built-in.a CC net/ipv6/seg6.o CC lib/rhashtable.o CC drivers/input/mouse/lifebook.o CC net/ipv4/datagram.o CC net/ipv6/fib6_notifier.o CC net/core/netprio_cgroup.o AR drivers/usb/misc/built-in.a CC drivers/usb/core/config.o AR drivers/usb/mon/built-in.a CC drivers/pcmcia/rsrc_mgr.o CC fs/inode.o AR drivers/net/ethernet/engleder/built-in.a CC [M] net/netfilter/xt_nat.o CC drivers/acpi/acpica/rslist.o CC drivers/gpu/drm/drm_dumb_buffers.o CC kernel/smp.o CC drivers/usb/storage/transport.o CC drivers/acpi/acpica/rsmemory.o CC drivers/power/supply/power_supply_core.o CC drivers/hwmon/hwmon.o AR drivers/net/ethernet/ezchip/built-in.a CC drivers/ata/pata_oldpiix.o CC [M] drivers/gpu/drm/xe/xe_exec_queue.o CC drivers/i2c/i2c-core-acpi.o CC mm/swapfile.o CC fs/nfs/delegation.o CC net/mac80211/fils_aead.o CC drivers/ptp/ptp_chardev.o CC drivers/i2c/i2c-smbus.o CC [M] net/netfilter/xt_LOG.o CC lib/base64.o CC drivers/acpi/acpica/rsmisc.o CC drivers/input/mouse/trackpoint.o CC arch/x86/kernel/i8237.o CC net/ipv6/rpl.o CC net/core/netclassid_cgroup.o CC drivers/usb/early/ehci-dbgp.o CC drivers/acpi/acpica/rsserial.o CC net/ipv4/raw.o CC net/mac80211/cfg.o CC drivers/usb/storage/usb.o AR drivers/rtc/built-in.a CC drivers/gpu/drm/drm_edid.o CC mm/swap_slots.o CC drivers/gpu/drm/i915/i915_mm.o CC drivers/ptp/ptp_sysfs.o CC drivers/usb/host/xhci-mem.o AR drivers/thermal/broadcom/built-in.a AR drivers/watchdog/built-in.a CC arch/x86/kernel/stacktrace.o AR drivers/thermal/renesas/built-in.a CC drivers/usb/storage/initializers.o CC drivers/md/md.o AR drivers/thermal/samsung/built-in.a CC drivers/thermal/intel/intel_tcc.o CC drivers/md/md-bitmap.o CC lib/once.o AR drivers/net/ethernet/fujitsu/built-in.a CC arch/x86/kernel/reboot.o CC net/wireless/shipped-certs.o CC drivers/acpi/acpica/rsutils.o CC fs/ext4/orphan.o CC drivers/cpufreq/cpufreq.o CC drivers/pcmcia/rsrc_nonstatic.o CC drivers/ata/pata_sch.o CC drivers/power/supply/power_supply_sysfs.o CC net/ipv6/ioam6.o CC drivers/usb/core/file.o CC net/mac80211/ethtool.o CC [M] drivers/gpu/drm/xe/xe_execlist.o CC drivers/input/mouse/cypress_ps2.o CC drivers/thermal/intel/therm_throt.o CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.o AR drivers/i2c/built-in.a CC fs/attr.o CC fs/bad_inode.o CC kernel/uid16.o CC lib/refcount.o CC drivers/acpi/acpica/rsxface.o CC fs/file.o CC drivers/ata/pata_mpiix.o AR drivers/hwmon/built-in.a CC net/ipv4/udp.o AR drivers/usb/early/built-in.a CC [M] net/netfilter/xt_MASQUERADE.o CC drivers/cpufreq/freq_table.o CC net/core/dst_cache.o CC drivers/gpu/drm/i915/i915_sw_fence.o AR drivers/net/ethernet/broadcom/built-in.a CC drivers/power/supply/power_supply_leds.o AR drivers/net/ethernet/fungible/built-in.a AR drivers/net/ethernet/google/built-in.a AR drivers/net/ethernet/hisilicon/built-in.a CC lib/rcuref.o CC fs/ext4/acl.o CC fs/ext4/xattr_security.o AR drivers/net/ethernet/huawei/built-in.a CC drivers/scsi/sr.o CC drivers/net/ethernet/intel/e1000/e1000_main.o CC drivers/net/ethernet/intel/e1000e/82571.o CC drivers/net/ethernet/intel/e1000e/ich8lan.o CC drivers/ptp/ptp_vclock.o CC drivers/usb/storage/sierra_ms.o AR drivers/net/ethernet/i825xx/built-in.a CC mm/dmapool.o CC lib/usercopy.o CC [M] net/netfilter/xt_addrtype.o CC drivers/input/mouse/psmouse-smbus.o CC net/ipv6/sysctl_net_ipv6.o CC drivers/usb/core/buffer.o CC arch/x86/kernel/msr.o CC net/ipv4/udplite.o CC drivers/acpi/acpica/tbdata.o CC kernel/kallsyms.o AR drivers/net/ethernet/microsoft/built-in.a CC [M] drivers/gpu/drm/xe/xe_force_wake.o CC drivers/cpufreq/cpufreq_performance.o CC drivers/net/ethernet/intel/e1000e/80003es2lan.o CC drivers/net/ethernet/intel/e100.o AR drivers/input/touchscreen/built-in.a CC net/mac80211/rx.o CC drivers/power/supply/power_supply_hwmon.o CC drivers/pcmcia/yenta_socket.o CC lib/errseq.o CC drivers/net/ethernet/intel/e1000e/mac.o CC drivers/md/md-autodetect.o CC drivers/gpu/drm/i915/i915_sw_fence_work.o CC drivers/acpi/acpi_lpat.o CC lib/bucket_locks.o CC drivers/gpu/drm/drm_eld.o CC drivers/ata/ata_generic.o CC fs/nfs/nfs4idmap.o CC drivers/net/ethernet/intel/e1000/e1000_hw.o AR drivers/thermal/intel/built-in.a AR drivers/thermal/st/built-in.a AR drivers/thermal/qcom/built-in.a AR drivers/thermal/tegra/built-in.a AR drivers/thermal/mediatek/built-in.a CC drivers/thermal/thermal_core.o CC drivers/scsi/sr_ioctl.o CC kernel/acct.o CC drivers/cpuidle/governors/menu.o CC drivers/cpuidle/cpuidle.o CC drivers/acpi/acpica/tbfadt.o CC drivers/usb/storage/option_ms.o CC drivers/ptp/ptp_kvm_x86.o CC mm/hugetlb.o CC drivers/usb/core/sysfs.o AR fs/ext4/built-in.a AR drivers/power/supply/built-in.a CC drivers/gpu/drm/i915/i915_syncmap.o AR drivers/power/built-in.a CC net/mac80211/spectmgmt.o CC drivers/cpuidle/governors/haltpoll.o CC drivers/ptp/ptp_kvm_common.o CC arch/x86/kernel/cpuid.o CC net/core/gro_cells.o AR drivers/input/mouse/built-in.a CC drivers/usb/core/endpoint.o AR drivers/input/misc/built-in.a CC drivers/input/input.o CC lib/generic-radix-tree.o CC mm/mmu_notifier.o CC drivers/acpi/acpica/tbfind.o CC net/ipv6/xfrm6_policy.o CC net/ipv4/udp_offload.o CC drivers/md/dm.o CC drivers/usb/host/xhci-ext-caps.o CC [M] drivers/gpu/drm/xe/xe_ggtt.o CC drivers/cpufreq/cpufreq_userspace.o CC fs/filesystems.o AR drivers/net/ethernet/litex/built-in.a AR drivers/mmc/built-in.a CC net/core/failover.o CC drivers/gpu/drm/i915/i915_user_extensions.o CC drivers/acpi/acpica/tbinstal.o AR drivers/ata/built-in.a CC drivers/thermal/thermal_sysfs.o CC kernel/vmcore_info.o CC drivers/scsi/sr_vendor.o CC [M] drivers/gpu/drm/xe/xe_gpu_scheduler.o AR net/netfilter/built-in.a CC drivers/usb/host/xhci-ring.o CC drivers/usb/storage/usual-tables.o CC arch/x86/kernel/early-quirks.o CC drivers/net/ethernet/intel/e1000/e1000_ethtool.o CC net/mac80211/tx.o CC fs/namespace.o CC net/mac80211/key.o CC lib/bitmap-str.o CC drivers/net/ethernet/intel/e1000e/manage.o CC mm/migrate.o AR drivers/ptp/built-in.a CC drivers/md/dm-table.o CC drivers/cpufreq/cpufreq_ondemand.o CC drivers/gpu/drm/i915/i915_debugfs.o CC kernel/elfcorehdr.o CC drivers/acpi/acpica/tbprint.o AR drivers/pcmcia/built-in.a CC drivers/cpufreq/cpufreq_governor.o CC fs/nfs/callback.o AR drivers/cpuidle/governors/built-in.a CC arch/x86/kernel/smp.o CC drivers/usb/core/devio.o CC drivers/thermal/thermal_trip.o CC fs/seq_file.o CC drivers/net/ethernet/intel/e1000/e1000_param.o CC drivers/cpuidle/driver.o AR drivers/net/ethernet/marvell/octeon_ep/built-in.a AR drivers/net/ethernet/marvell/octeon_ep_vf/built-in.a AR drivers/net/ethernet/marvell/octeontx2/built-in.a CC drivers/acpi/acpi_pcc.o AR drivers/net/ethernet/marvell/prestera/built-in.a CC drivers/net/ethernet/marvell/sky2.o AR drivers/usb/storage/built-in.a CC net/ipv6/xfrm6_state.o CC fs/nfs/callback_xdr.o CC [M] drivers/gpu/drm/xe/xe_gsc.o CC drivers/gpu/drm/drm_encoder.o CC drivers/scsi/sg.o CC fs/xattr.o CC drivers/acpi/acpica/tbutils.o CC fs/nfs/callback_proc.o CC drivers/usb/core/notify.o CC lib/string_helpers.o CC lib/hexdump.o CC drivers/thermal/thermal_helpers.o AR net/core/built-in.a CC drivers/net/ethernet/intel/e1000e/nvm.o CC kernel/crash_reserve.o AR drivers/net/ethernet/mellanox/built-in.a CC drivers/acpi/ac.o AR drivers/net/ethernet/meta/built-in.a CC drivers/md/dm-target.o CC [M] drivers/gpu/drm/xe/xe_gsc_debugfs.o CC kernel/kexec_core.o CC drivers/cpuidle/governor.o CC drivers/usb/host/xhci-hub.o CC drivers/input/input-compat.o CC net/ipv6/xfrm6_input.o CC drivers/cpufreq/cpufreq_governor_attr_set.o CC mm/page_counter.o CC drivers/acpi/acpica/tbxface.o CC fs/libfs.o CC drivers/usb/core/generic.o CC drivers/thermal/thermal_thresholds.o CC kernel/crash_core.o CC fs/nfs/nfs4namespace.o CC drivers/md/dm-linear.o CC drivers/cpuidle/sysfs.o CC drivers/usb/host/xhci-dbg.o CC drivers/acpi/button.o CC arch/x86/kernel/smpboot.o AR net/wireless/built-in.a CC fs/fs-writeback.o CC net/ipv4/arp.o CC drivers/cpufreq/acpi-cpufreq.o CC net/ipv4/icmp.o CC fs/nfs/nfs4getroot.o CC lib/kstrtox.o CC drivers/usb/host/xhci-trace.o CC drivers/gpu/drm/i915/i915_debugfs_params.o CC fs/nfs/nfs4client.o CC drivers/usb/core/quirks.o CC drivers/acpi/acpica/tbxfload.o CC drivers/input/input-mt.o AR drivers/net/ethernet/micrel/built-in.a CC drivers/thermal/thermal_netlink.o AR drivers/net/ethernet/microchip/built-in.a CC drivers/net/ethernet/intel/e1000e/phy.o CC drivers/gpu/drm/drm_file.o CC drivers/net/ethernet/intel/e1000e/param.o CC drivers/net/ethernet/intel/e1000e/ethtool.o CC mm/hugetlb_cgroup.o CC drivers/usb/host/xhci-debugfs.o CC [M] drivers/gpu/drm/xe/xe_gsc_proxy.o CC drivers/gpu/drm/drm_fourcc.o AR drivers/net/ethernet/intel/e1000/built-in.a CC drivers/acpi/fan_core.o CC arch/x86/kernel/tsc_sync.o CC drivers/cpuidle/poll_state.o CC drivers/md/dm-stripe.o CC drivers/cpufreq/amd-pstate.o CC drivers/acpi/acpica/tbxfroot.o AR drivers/net/ethernet/mscc/built-in.a CC lib/iomap.o CC drivers/gpu/drm/i915/i915_pmu.o CC [M] drivers/gpu/drm/xe/xe_gsc_submit.o CC net/mac80211/util.o CC drivers/usb/host/xhci-pci.o CC mm/early_ioremap.o CC drivers/net/ethernet/intel/e1000e/netdev.o CC kernel/kexec.o CC drivers/scsi/scsi_sysfs.o CC drivers/cpuidle/cpuidle-haltpoll.o CC drivers/usb/core/devices.o CC arch/x86/kernel/setup_percpu.o CC drivers/acpi/acpica/utaddress.o CC [M] drivers/gpu/drm/xe/xe_gt.o CC net/ipv6/xfrm6_output.o CC lib/iomap_copy.o CC drivers/input/input-poller.o CC lib/devres.o CC lib/check_signature.o CC fs/nfs/nfs4session.o CC kernel/utsname.o CC drivers/input/ff-core.o AR drivers/ufs/built-in.a CC drivers/thermal/thermal_hwmon.o CC [M] drivers/gpu/drm/xe/xe_gt_ccs_mode.o CC fs/nfs/dns_resolve.o AR drivers/net/ethernet/myricom/built-in.a CC drivers/acpi/fan_attr.o CC drivers/acpi/acpica/utalloc.o CC net/mac80211/parse.o CC drivers/md/dm-ioctl.o CC arch/x86/kernel/mpparse.o AR drivers/cpuidle/built-in.a CC drivers/usb/core/phy.o CC kernel/pid_namespace.o AR drivers/net/ethernet/natsemi/built-in.a CC net/ipv6/xfrm6_protocol.o CC drivers/acpi/fan_hwmon.o CC [M] drivers/gpu/drm/xe/xe_gt_clock.o CC drivers/gpu/drm/i915/gt/gen2_engine_cs.o CC mm/secretmem.o CC kernel/stop_machine.o CC arch/x86/kernel/trace_clock.o AR drivers/firmware/arm_ffa/built-in.a AR drivers/firmware/arm_scmi/built-in.a AR drivers/firmware/broadcom/built-in.a CC lib/interval_tree.o AR drivers/firmware/cirrus/test/built-in.a AR drivers/firmware/meson/built-in.a AR drivers/firmware/cirrus/built-in.a CC fs/pnode.o CC net/ipv6/netfilter.o CC lib/assoc_array.o AR drivers/firmware/microchip/built-in.a CC drivers/acpi/acpica/utascii.o CC drivers/acpi/acpica/utbuffer.o CC drivers/thermal/gov_step_wise.o CC lib/bitrev.o CC net/ipv4/devinet.o AR drivers/crypto/stm32/built-in.a CC drivers/firmware/efi/libstub/efi-stub-helper.o AR drivers/crypto/xilinx/built-in.a AR drivers/crypto/hisilicon/built-in.a CC drivers/firmware/efi/libstub/gop.o CC drivers/clocksource/acpi_pm.o AR drivers/crypto/intel/keembay/built-in.a CC drivers/hid/usbhid/hid-core.o AR drivers/crypto/intel/ixp4xx/built-in.a AR drivers/crypto/intel/built-in.a AR drivers/crypto/starfive/built-in.a AR drivers/crypto/built-in.a AR drivers/net/ethernet/neterion/built-in.a CC drivers/cpufreq/amd-pstate-trace.o CC net/ipv6/proc.o CC drivers/cpufreq/intel_pstate.o CC fs/nfs/nfs4trace.o CC drivers/input/touchscreen.o CC drivers/net/ethernet/intel/e1000e/ptp.o CC drivers/hid/usbhid/hiddev.o AR drivers/platform/x86/amd/built-in.a CC drivers/mailbox/mailbox.o AR drivers/platform/x86/intel/built-in.a CC drivers/platform/x86/wmi.o CC drivers/gpu/drm/drm_framebuffer.o CC fs/nfs/nfs4sysctl.o CC net/ipv6/syncookies.o CC drivers/mailbox/pcc.o CC drivers/acpi/acpica/utcksum.o AR drivers/firmware/imx/built-in.a CC drivers/hid/usbhid/hid-pidff.o CC drivers/usb/core/port.o AR drivers/scsi/built-in.a AR drivers/platform/surface/built-in.a CC net/ipv6/calipso.o AR drivers/net/ethernet/netronome/built-in.a AR drivers/thermal/built-in.a CC arch/x86/kernel/trace.o CC drivers/firmware/efi/libstub/secureboot.o CC drivers/firmware/efi/libstub/tpm.o AR drivers/net/ethernet/marvell/built-in.a CC net/ipv4/af_inet.o CC drivers/md/dm-io.o CC drivers/gpu/drm/i915/gt/gen6_engine_cs.o CC net/mac80211/wme.o CC drivers/acpi/acpi_video.o CC drivers/hid/hid-core.o CC kernel/audit.o CC [M] drivers/gpu/drm/xe/xe_gt_freq.o CC mm/hmm.o CC drivers/platform/x86/wmi-bmof.o CC fs/splice.o CC drivers/platform/x86/eeepc-laptop.o AR drivers/usb/host/built-in.a CC drivers/acpi/acpica/utcopy.o CC drivers/gpu/drm/i915/gt/gen6_ppgtt.o CC lib/crc-ccitt.o CC drivers/clocksource/i8253.o CC drivers/hid/hid-input.o CC drivers/input/ff-memless.o CC net/mac80211/chan.o CC drivers/usb/core/hcd-pci.o CC fs/sync.o CC drivers/gpu/drm/drm_gem.o CC kernel/auditfilter.o CC arch/x86/kernel/rethook.o AR drivers/mailbox/built-in.a CC net/ipv6/ah6.o AR drivers/firmware/psci/built-in.a AR drivers/net/ethernet/ni/built-in.a CC drivers/firmware/efi/libstub/file.o CC net/mac80211/trace.o CC lib/crc16.o CC drivers/platform/x86/p2sb.o AR drivers/clocksource/built-in.a CC drivers/acpi/acpica/utexcep.o CC drivers/hid/hid-quirks.o CC drivers/firmware/efi/efi-bgrt.o CC drivers/gpu/drm/drm_ioctl.o CC net/ipv6/esp6.o CC drivers/net/ethernet/nvidia/forcedeth.o CC [M] drivers/gpu/drm/xe/xe_gt_idle.o CC drivers/firmware/efi/efi.o CC drivers/md/dm-kcopyd.o CC mm/memfd.o CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o CC fs/utimes.o CC drivers/input/sparse-keymap.o HOSTCC lib/gen_crc32table CC net/mac80211/mlme.o CC drivers/firmware/efi/libstub/mem.o CC arch/x86/kernel/vmcore_info_32.o CC drivers/usb/core/usb-acpi.o CC drivers/acpi/acpica/utdebug.o CC lib/xxhash.o CC lib/genalloc.o CC net/ipv4/igmp.o CC net/ipv6/sit.o AR drivers/hid/usbhid/built-in.a CC fs/d_path.o CC net/mac80211/tdls.o AR drivers/net/ethernet/oki-semi/built-in.a CC drivers/gpu/drm/drm_lease.o CC drivers/firmware/efi/vars.o CC net/ipv4/fib_frontend.o CC drivers/md/dm-sysfs.o CC drivers/gpu/drm/i915/gt/gen7_renderclear.o AR drivers/platform/x86/built-in.a AR drivers/platform/built-in.a CC drivers/input/vivaldi-fmap.o CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o CC drivers/acpi/acpica/utdecode.o CC drivers/acpi/video_detect.o CC drivers/gpu/drm/i915/gt/gen8_engine_cs.o CC drivers/input/input-leds.o CC net/ipv6/addrconf_core.o CC kernel/auditsc.o CC arch/x86/kernel/machine_kexec_32.o AR drivers/firmware/qcom/built-in.a CC fs/stack.o AR drivers/perf/built-in.a CC drivers/acpi/processor_driver.o CC drivers/acpi/acpica/utdelete.o CC drivers/firmware/efi/libstub/random.o CC drivers/md/dm-stats.o CC lib/percpu_counter.o AR drivers/net/ethernet/packetengines/built-in.a AS arch/x86/kernel/relocate_kernel_32.o CC drivers/acpi/acpica/uterror.o AR drivers/hwtracing/intel_th/built-in.a CC drivers/acpi/processor_thermal.o AR drivers/net/ethernet/qlogic/built-in.a CC net/mac80211/ocb.o CC net/mac80211/airtime.o CC arch/x86/kernel/crash_dump_32.o AR drivers/cpufreq/built-in.a CC arch/x86/kernel/crash.o CC drivers/gpu/drm/i915/gt/gen8_ppgtt.o CC net/ipv6/exthdrs_core.o AR drivers/usb/core/built-in.a AR drivers/usb/built-in.a CC drivers/md/dm-rq.o CC mm/ptdump.o CC drivers/gpu/drm/drm_managed.o CC net/ipv4/fib_semantics.o CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o CC fs/fs_struct.o CC fs/statfs.o CC lib/audit.o CC net/mac80211/eht.o CC drivers/acpi/acpica/uteval.o CC drivers/input/evdev.o CC arch/x86/kernel/module.o CC mm/execmem.o CC drivers/gpu/drm/drm_mm.o CC drivers/gpu/drm/i915/gt/intel_breadcrumbs.o CC drivers/acpi/processor_idle.o CC net/mac80211/led.o CC [M] drivers/gpu/drm/xe/xe_gt_throttle.o CC lib/syscall.o CC drivers/firmware/efi/libstub/randomalloc.o CC kernel/audit_watch.o CC net/ipv4/fib_trie.o AR drivers/android/built-in.a CC drivers/acpi/acpica/utglobal.o CC drivers/hid/hid-debug.o CC net/mac80211/pm.o CC net/ipv6/ip6_checksum.o CC drivers/gpu/drm/i915/gt/intel_context.o CC drivers/firmware/efi/libstub/pci.o CC net/ipv4/fib_notifier.o AR drivers/nvmem/layouts/built-in.a CC drivers/nvmem/core.o CC net/mac80211/rc80211_minstrel_ht.o CC net/ipv6/ip6_icmp.o CC drivers/firmware/efi/libstub/skip_spaces.o CC drivers/acpi/processor_throttling.o CC kernel/audit_fsnotify.o CC drivers/gpu/drm/i915/gt/intel_context_sseu.o CC drivers/acpi/acpica/uthex.o CC drivers/acpi/acpica/utids.o CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o CC arch/x86/kernel/doublefault_32.o CC drivers/hid/hidraw.o CC drivers/acpi/acpica/utinit.o AR drivers/firmware/smccc/built-in.a AR mm/built-in.a CC lib/errname.o CC drivers/hid/hid-generic.o CC drivers/md/dm-io-rewind.o CC drivers/hid/hid-a4tech.o CC lib/nlattr.o CC drivers/hid/hid-apple.o CC net/ipv4/inet_fragment.o AR fs/nfs/built-in.a CC fs/fs_pin.o CC drivers/gpu/drm/i915/gt/intel_engine_cs.o CC drivers/gpu/drm/i915/gt/intel_engine_heartbeat.o CC drivers/acpi/acpica/utlock.o AR drivers/input/built-in.a CC drivers/firmware/efi/libstub/lib-cmdline.o CC lib/cpu_rmap.o CC net/ipv4/ping.o CC drivers/firmware/efi/reboot.o CC kernel/audit_tree.o CC arch/x86/kernel/early_printk.o CC drivers/gpu/drm/drm_mode_config.o CC drivers/gpu/drm/i915/gt/intel_engine_pm.o CC drivers/firmware/efi/libstub/lib-ctype.o CC drivers/firmware/efi/libstub/alignedmem.o CC net/ipv6/output_core.o AR drivers/net/ethernet/intel/e1000e/built-in.a AR drivers/net/ethernet/intel/built-in.a AR drivers/firmware/tegra/built-in.a CC drivers/acpi/processor_perflib.o CC lib/dynamic_queue_limits.o CC [M] drivers/gpu/drm/xe/xe_gt_topology.o CC drivers/gpu/drm/drm_mode_object.o CC drivers/md/dm-builtin.o CC drivers/acpi/acpica/utmath.o CC drivers/firmware/efi/memattr.o CC arch/x86/kernel/hpet.o CC net/ipv6/protocol.o AR drivers/firmware/xilinx/built-in.a CC drivers/hid/hid-belkin.o CC drivers/md/dm-raid1.o CC drivers/acpi/container.o CC drivers/acpi/thermal_lib.o CC fs/nsfs.o CC arch/x86/kernel/amd_nb.o CC drivers/gpu/drm/drm_modes.o CC drivers/hid/hid-cherry.o CC net/mac80211/wbrf.o CC drivers/firmware/dmi_scan.o CC net/ipv4/ip_tunnel_core.o CC arch/x86/kernel/amd_node.o CC arch/x86/kernel/kvm.o CC arch/x86/kernel/kvmclock.o AR drivers/nvmem/built-in.a CC arch/x86/kernel/paravirt.o CC drivers/firmware/efi/libstub/relocate.o CC drivers/firmware/dmi-id.o CC [M] drivers/gpu/drm/xe/xe_guc.o CC drivers/acpi/acpica/utmisc.o CC lib/glob.o AR drivers/net/ethernet/nvidia/built-in.a AR drivers/net/ethernet/qualcomm/emac/built-in.a AR drivers/net/ethernet/qualcomm/built-in.a CC drivers/net/ethernet/realtek/8139too.o AR drivers/net/ethernet/renesas/built-in.a CC arch/x86/kernel/pvclock.o CC drivers/firmware/efi/libstub/printk.o CC fs/fs_types.o CC drivers/md/dm-log.o CC drivers/gpu/drm/drm_modeset_lock.o CC kernel/kprobes.o CC drivers/firmware/efi/tpm.o CC drivers/firmware/memmap.o CC [M] drivers/gpu/drm/xe/xe_guc_ads.o AR drivers/net/ethernet/rdc/built-in.a CC drivers/acpi/acpica/utmutex.o CC drivers/firmware/efi/libstub/vsprintf.o CC fs/fs_context.o CC drivers/acpi/acpica/utnonansi.o CC net/ipv4/gre_offload.o CC [M] drivers/gpu/drm/xe/xe_guc_buf.o CC drivers/firmware/efi/memmap.o CC drivers/firmware/efi/capsule.o CC drivers/hid/hid-chicony.o CC drivers/acpi/thermal.o CC kernel/seccomp.o CC drivers/hid/hid-cypress.o CC drivers/firmware/efi/esrt.o CC drivers/firmware/efi/runtime-wrappers.o CC drivers/firmware/efi/libstub/x86-stub.o CC drivers/net/ethernet/realtek/r8169_main.o CC lib/strncpy_from_user.o CC lib/strnlen_user.o CC net/ipv6/ip6_offload.o CC drivers/acpi/nhlt.o CC [M] drivers/gpu/drm/xe/xe_guc_capture.o CC drivers/md/dm-region-hash.o CC arch/x86/kernel/pcspeaker.o CC net/ipv6/tcpv6_offload.o AR drivers/net/ethernet/rocker/built-in.a CC drivers/md/dm-zero.o CC drivers/acpi/acpica/utobject.o CC net/ipv4/metrics.o CC drivers/gpu/drm/drm_plane.o CC lib/net_utils.o CC [M] drivers/gpu/drm/xe/xe_guc_ct.o CC drivers/net/ethernet/realtek/r8169_firmware.o CC arch/x86/kernel/check.o CC net/ipv6/exthdrs_offload.o CC drivers/firmware/efi/capsule-loader.o CC fs/fs_parser.o CC drivers/gpu/drm/drm_prime.o CC drivers/hid/hid-ezkey.o CC kernel/relay.o CC drivers/acpi/acpica/utosi.o CC drivers/acpi/acpi_memhotplug.o CC drivers/acpi/ioapic.o AR drivers/net/ethernet/samsung/built-in.a AR drivers/net/ethernet/seeq/built-in.a CC drivers/acpi/battery.o CC drivers/acpi/acpica/utownerid.o CC drivers/firmware/efi/earlycon.o CC kernel/utsname_sysctl.o CC lib/sg_pool.o CC drivers/gpu/drm/drm_print.o CC net/ipv4/netlink.o CC lib/stackdepot.o CC drivers/acpi/bgrt.o CC arch/x86/kernel/uprobes.o CC drivers/gpu/drm/i915/gt/intel_engine_user.o CC lib/asn1_decoder.o CC drivers/hid/hid-gyration.o CC drivers/acpi/spcr.o GEN lib/oid_registry_data.c CC drivers/net/ethernet/realtek/r8169_phy_config.o CC drivers/acpi/acpica/utpredef.o CC kernel/delayacct.o CC drivers/acpi/acpica/utresdecode.o CC drivers/firmware/efi/libstub/smbios.o CC drivers/gpu/drm/i915/gt/intel_execlists_submission.o CC drivers/gpu/drm/drm_property.o CC net/ipv4/nexthop.o CC net/ipv6/inet6_hashtables.o CC lib/ucs2_string.o CC [M] drivers/gpu/drm/xe/xe_guc_db_mgr.o CC fs/fsopen.o CC net/ipv4/udp_tunnel_stub.o AR drivers/md/built-in.a CC kernel/taskstats.o AR drivers/net/ethernet/silan/built-in.a CC drivers/gpu/drm/i915/gt/intel_ggtt.o CC net/ipv6/mcast_snoop.o AR drivers/net/ethernet/sis/built-in.a CC [M] drivers/gpu/drm/xe/xe_guc_engine_activity.o CC drivers/hid/hid-ite.o CC kernel/tsacct.o CC net/ipv4/ip_tunnel.o CC drivers/acpi/acpica/utresrc.o CC lib/sbitmap.o STUBCPY drivers/firmware/efi/libstub/alignedmem.stub.o CC drivers/gpu/drm/i915/gt/intel_ggtt_fencing.o AR drivers/net/ethernet/sfc/built-in.a CC lib/group_cpus.o CC kernel/tracepoint.o CC drivers/hid/hid-kensington.o CC drivers/gpu/drm/i915/gt/intel_gt.o CC arch/x86/kernel/perf_regs.o CC kernel/irq_work.o CC fs/init.o CC lib/fw_table.o CC fs/kernel_read_file.o AR drivers/net/ethernet/smsc/built-in.a AR drivers/firmware/efi/built-in.a AR drivers/net/ethernet/socionext/built-in.a CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o AR lib/lib.a CC drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.o CC net/ipv4/sysctl_net_ipv4.o CC arch/x86/kernel/tracepoint.o CC kernel/static_call.o STUBCPY drivers/firmware/efi/libstub/efi-stub-helper.stub.o CC drivers/acpi/acpica/utstate.o AR drivers/net/ethernet/stmicro/built-in.a STUBCPY drivers/firmware/efi/libstub/file.stub.o CC [M] drivers/gpu/drm/xe/xe_guc_id_mgr.o STUBCPY drivers/firmware/efi/libstub/gop.stub.o STUBCPY drivers/firmware/efi/libstub/lib-cmdline.stub.o STUBCPY drivers/firmware/efi/libstub/lib-ctype.stub.o STUBCPY drivers/firmware/efi/libstub/mem.stub.o STUBCPY drivers/firmware/efi/libstub/pci.stub.o CC drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.o CC drivers/hid/hid-lg.o STUBCPY drivers/firmware/efi/libstub/printk.stub.o STUBCPY drivers/firmware/efi/libstub/random.stub.o STUBCPY drivers/firmware/efi/libstub/randomalloc.stub.o CC drivers/gpu/drm/drm_rect.o STUBCPY drivers/firmware/efi/libstub/relocate.stub.o CC arch/x86/kernel/itmt.o STUBCPY drivers/firmware/efi/libstub/secureboot.stub.o STUBCPY drivers/firmware/efi/libstub/skip_spaces.stub.o STUBCPY drivers/firmware/efi/libstub/smbios.stub.o CC net/ipv4/proc.o STUBCPY drivers/firmware/efi/libstub/tpm.stub.o STUBCPY drivers/firmware/efi/libstub/vsprintf.stub.o AR drivers/net/ethernet/sun/built-in.a STUBCPY drivers/firmware/efi/libstub/x86-stub.stub.o CC drivers/gpu/drm/drm_syncobj.o CC kernel/padata.o AR drivers/firmware/efi/libstub/lib.a CC net/ipv4/fib_rules.o CC arch/x86/kernel/umip.o AR drivers/firmware/built-in.a CC drivers/gpu/drm/i915/gt/intel_gt_clock_utils.o CC [M] drivers/gpu/drm/xe/xe_guc_klv_helpers.o GEN lib/crc32table.h CC net/ipv4/ipmr.o CC drivers/hid/hid-lgff.o CC arch/x86/kernel/unwind_frame.o CC drivers/gpu/drm/i915/gt/intel_gt_debugfs.o CC drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.o CC drivers/gpu/drm/drm_sysfs.o CC lib/oid_registry.o CC [M] drivers/gpu/drm/xe/xe_guc_log.o CC drivers/acpi/acpica/utstring.o CC net/ipv4/ipmr_base.o CC drivers/gpu/drm/drm_trace_points.o CC drivers/hid/hid-lg4ff.o CC kernel/jump_label.o CC fs/mnt_idmapping.o CC fs/remap_range.o CC drivers/gpu/drm/i915/gt/intel_gt_irq.o AR drivers/net/ethernet/tehuti/built-in.a CC drivers/gpu/drm/drm_vblank.o CC drivers/acpi/acpica/utstrsuppt.o CC fs/pidfs.o CC drivers/hid/hid-lg-g15.o CC fs/buffer.o CC net/ipv4/syncookies.o CC drivers/gpu/drm/i915/gt/intel_gt_mcr.o CC drivers/gpu/drm/drm_vblank_work.o CC drivers/gpu/drm/drm_vma_manager.o CC kernel/context_tracking.o CC drivers/gpu/drm/drm_writeback.o CC lib/crc32.o CC kernel/iomem.o AR drivers/net/ethernet/ti/built-in.a CC net/ipv4/tunnel4.o AR net/ipv6/built-in.a CC fs/mpage.o CC drivers/hid/hid-microsoft.o CC drivers/acpi/acpica/utstrtoul64.o AR drivers/net/ethernet/vertexcom/built-in.a CC drivers/gpu/drm/drm_panel.o CC kernel/rseq.o CC [M] drivers/gpu/drm/xe/xe_guc_pc.o CC drivers/gpu/drm/drm_pci.o CC drivers/gpu/drm/i915/gt/intel_gt_pm.o AR arch/x86/kernel/built-in.a AR arch/x86/built-in.a AR drivers/net/ethernet/via/built-in.a CC [M] drivers/gpu/drm/xe/xe_guc_submit.o CC drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.o CC drivers/hid/hid-monterey.o AR lib/built-in.a CC drivers/acpi/acpica/utxface.o CC net/ipv4/ipconfig.o CC fs/proc_namespace.o CC [M] drivers/gpu/drm/xe/xe_heci_gsc.o CC drivers/gpu/drm/drm_debugfs.o AR drivers/net/ethernet/wangxun/built-in.a CC net/ipv4/netfilter.o CC drivers/hid/hid-ntrig.o CC drivers/gpu/drm/i915/gt/intel_gt_pm_irq.o CC [M] drivers/gpu/drm/xe/xe_huc.o CC [M] drivers/gpu/drm/xe/xe_hw_engine.o CC drivers/hid/hid-pl.o CC fs/direct-io.o CC [M] drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.o CC drivers/acpi/acpica/utxfinit.o AR drivers/net/ethernet/wiznet/built-in.a CC net/ipv4/tcp_cubic.o CC net/ipv4/tcp_sigpool.o CC drivers/gpu/drm/i915/gt/intel_gt_requests.o CC drivers/gpu/drm/i915/gt/intel_gt_sysfs.o CC drivers/gpu/drm/drm_debugfs_crc.o CC drivers/hid/hid-petalynx.o AR drivers/net/ethernet/realtek/built-in.a CC fs/eventpoll.o CC drivers/acpi/acpica/utxferror.o AR drivers/net/ethernet/xilinx/built-in.a AR drivers/net/ethernet/xircom/built-in.a CC drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.o CC net/ipv4/cipso_ipv4.o CC drivers/hid/hid-redragon.o CC [M] drivers/gpu/drm/xe/xe_hw_engine_group.o AR drivers/net/ethernet/synopsys/built-in.a AR drivers/net/ethernet/pensando/built-in.a AR drivers/net/ethernet/built-in.a CC fs/anon_inodes.o CC [M] drivers/gpu/drm/xe/xe_hw_fence.o CC drivers/hid/hid-samsung.o CC drivers/hid/hid-sony.o AR drivers/net/built-in.a CC drivers/acpi/acpica/utxfmutex.o CC drivers/gpu/drm/i915/gt/intel_gtt.o CC [M] drivers/gpu/drm/xe/xe_irq.o CC drivers/gpu/drm/drm_panel_orientation_quirks.o CC net/ipv4/xfrm4_policy.o CC fs/signalfd.o CC drivers/gpu/drm/i915/gt/intel_llc.o AR kernel/built-in.a CC fs/timerfd.o CC net/ipv4/xfrm4_state.o CC drivers/gpu/drm/i915/gt/intel_lrc.o CC [M] drivers/gpu/drm/xe/xe_lrc.o CC net/ipv4/xfrm4_input.o CC drivers/hid/hid-sunplus.o CC drivers/gpu/drm/drm_buddy.o CC net/ipv4/xfrm4_output.o CC drivers/hid/hid-topseed.o CC drivers/gpu/drm/i915/gt/intel_migrate.o AR drivers/acpi/acpica/built-in.a AR drivers/acpi/built-in.a CC fs/eventfd.o CC drivers/gpu/drm/drm_gem_shmem_helper.o CC net/ipv4/xfrm4_protocol.o CC drivers/gpu/drm/i915/gt/intel_mocs.o CC fs/aio.o CC drivers/gpu/drm/drm_atomic_helper.o CC fs/locks.o CC [M] drivers/gpu/drm/xe/xe_migrate.o CC fs/binfmt_misc.o CC drivers/gpu/drm/drm_atomic_state_helper.o CC drivers/gpu/drm/i915/gt/intel_ppgtt.o CC [M] drivers/gpu/drm/xe/xe_mmio.o CC fs/binfmt_script.o CC [M] drivers/gpu/drm/xe/xe_mocs.o CC drivers/gpu/drm/drm_crtc_helper.o CC fs/binfmt_elf.o CC [M] drivers/gpu/drm/xe/xe_module.o CC drivers/gpu/drm/drm_damage_helper.o CC drivers/gpu/drm/drm_flip_work.o CC fs/mbcache.o CC [M] drivers/gpu/drm/xe/xe_oa.o CC fs/posix_acl.o CC drivers/gpu/drm/i915/gt/intel_rc6.o CC drivers/gpu/drm/i915/gt/intel_region_lmem.o CC fs/coredump.o CC drivers/gpu/drm/drm_format_helper.o CC fs/drop_caches.o CC drivers/gpu/drm/i915/gt/intel_renderstate.o CC [M] drivers/gpu/drm/xe/xe_observation.o CC fs/sysctls.o CC drivers/gpu/drm/i915/gt/intel_reset.o AR net/mac80211/built-in.a CC drivers/gpu/drm/drm_gem_atomic_helper.o CC [M] drivers/gpu/drm/xe/xe_pat.o CC [M] drivers/gpu/drm/xe/xe_pci.o CC fs/fhandle.o CC drivers/gpu/drm/drm_gem_framebuffer_helper.o AR drivers/hid/built-in.a CC [M] drivers/gpu/drm/xe/xe_pcode.o CC drivers/gpu/drm/i915/gt/intel_ring.o CC [M] drivers/gpu/drm/xe/xe_pm.o CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o CC drivers/gpu/drm/i915/gt/intel_ring_submission.o CC [M] drivers/gpu/drm/xe/xe_pt.o CC drivers/gpu/drm/i915/gt/intel_rps.o CC drivers/gpu/drm/drm_kms_helper_common.o CC [M] drivers/gpu/drm/xe/xe_pt_walk.o CC [M] drivers/gpu/drm/xe/xe_pxp.o CC [M] drivers/gpu/drm/xe/xe_pxp_debugfs.o CC drivers/gpu/drm/drm_modeset_helper.o CC drivers/gpu/drm/i915/gt/intel_sa_media.o CC [M] drivers/gpu/drm/xe/xe_pxp_submit.o CC drivers/gpu/drm/drm_plane_helper.o CC drivers/gpu/drm/i915/gt/intel_sseu.o CC drivers/gpu/drm/i915/gt/intel_sseu_debugfs.o CC [M] drivers/gpu/drm/xe/xe_query.o CC [M] drivers/gpu/drm/xe/xe_range_fence.o AR net/ipv4/built-in.a AR net/built-in.a CC drivers/gpu/drm/i915/gt/intel_timeline.o CC [M] drivers/gpu/drm/xe/xe_reg_sr.o CC [M] drivers/gpu/drm/xe/xe_reg_whitelist.o CC [M] drivers/gpu/drm/xe/xe_ring_ops.o CC [M] drivers/gpu/drm/xe/xe_rtp.o CC drivers/gpu/drm/drm_probe_helper.o CC [M] drivers/gpu/drm/xe/xe_sa.o CC [M] drivers/gpu/drm/xe/xe_sched_job.o CC drivers/gpu/drm/drm_self_refresh_helper.o CC drivers/gpu/drm/i915/gt/intel_tlb.o CC [M] drivers/gpu/drm/xe/xe_step.o CC drivers/gpu/drm/drm_simple_kms_helper.o CC [M] drivers/gpu/drm/xe/xe_survivability_mode.o CC drivers/gpu/drm/i915/gt/intel_wopcm.o CC [M] drivers/gpu/drm/xe/xe_sync.o CC drivers/gpu/drm/bridge/panel.o CC drivers/gpu/drm/i915/gt/intel_workarounds.o CC [M] drivers/gpu/drm/xe/xe_tile.o CC [M] drivers/gpu/drm/xe/xe_tile_sysfs.o CC drivers/gpu/drm/drm_mipi_dsi.o CC drivers/gpu/drm/i915/gt/shmem_utils.o CC [M] drivers/gpu/drm/xe/xe_trace.o CC [M] drivers/gpu/drm/drm_exec.o CC [M] drivers/gpu/drm/drm_gpuvm.o CC [M] drivers/gpu/drm/xe/xe_trace_bo.o CC [M] drivers/gpu/drm/xe/xe_trace_guc.o CC drivers/gpu/drm/i915/gt/sysfs_engines.o CC [M] drivers/gpu/drm/xe/xe_trace_lrc.o CC [M] drivers/gpu/drm/drm_suballoc.o CC [M] drivers/gpu/drm/xe/xe_ttm_stolen_mgr.o CC [M] drivers/gpu/drm/drm_gem_ttm_helper.o CC drivers/gpu/drm/i915/gt/intel_ggtt_gmch.o CC [M] drivers/gpu/drm/xe/xe_ttm_sys_mgr.o CC drivers/gpu/drm/i915/gt/gen6_renderstate.o CC [M] drivers/gpu/drm/xe/xe_ttm_vram_mgr.o CC drivers/gpu/drm/i915/gt/gen7_renderstate.o CC drivers/gpu/drm/i915/gt/gen8_renderstate.o CC [M] drivers/gpu/drm/xe/xe_tuning.o CC drivers/gpu/drm/i915/gt/gen9_renderstate.o CC [M] drivers/gpu/drm/xe/xe_uc.o CC [M] drivers/gpu/drm/xe/xe_uc_fw.o CC drivers/gpu/drm/i915/gem/i915_gem_busy.o CC [M] drivers/gpu/drm/xe/xe_vm.o CC [M] drivers/gpu/drm/xe/xe_vram.o CC drivers/gpu/drm/i915/gem/i915_gem_clflush.o AR fs/built-in.a CC drivers/gpu/drm/i915/gem/i915_gem_context.o CC [M] drivers/gpu/drm/xe/xe_vram_freq.o CC [M] drivers/gpu/drm/xe/xe_vsec.o CC drivers/gpu/drm/i915/gem/i915_gem_create.o CC [M] drivers/gpu/drm/xe/xe_wa.o CC [M] drivers/gpu/drm/xe/xe_wait_user_fence.o CC drivers/gpu/drm/i915/gem/i915_gem_dmabuf.o LD [M] drivers/gpu/drm/drm_suballoc_helper.o CC drivers/gpu/drm/i915/gem/i915_gem_domain.o CC [M] drivers/gpu/drm/xe/xe_wopcm.o CC [M] drivers/gpu/drm/xe/xe_hmm.o CC drivers/gpu/drm/i915/gem/i915_gem_execbuffer.o CC drivers/gpu/drm/i915/gem/i915_gem_internal.o CC [M] drivers/gpu/drm/xe/xe_hwmon.o CC drivers/gpu/drm/i915/gem/i915_gem_lmem.o CC drivers/gpu/drm/i915/gem/i915_gem_mman.o CC drivers/gpu/drm/i915/gem/i915_gem_object.o CC [M] drivers/gpu/drm/xe/xe_pmu.o CC drivers/gpu/drm/i915/gem/i915_gem_pages.o CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf.o CC drivers/gpu/drm/i915/gem/i915_gem_phys.o CC drivers/gpu/drm/i915/gem/i915_gem_pm.o CC drivers/gpu/drm/i915/gem/i915_gem_region.o CC [M] drivers/gpu/drm/xe/xe_guc_relay.o CC [M] drivers/gpu/drm/xe/xe_memirq.o CC drivers/gpu/drm/i915/gem/i915_gem_shmem.o CC [M] drivers/gpu/drm/xe/xe_sriov.o LD [M] drivers/gpu/drm/drm_ttm_helper.o CC drivers/gpu/drm/i915/gem/i915_gem_shrinker.o CC drivers/gpu/drm/i915/gem/i915_gem_stolen.o CC [M] drivers/gpu/drm/xe/xe_sriov_vf.o CC [M] drivers/gpu/drm/xe/display/ext/i915_irq.o CC [M] drivers/gpu/drm/xe/display/ext/i915_utils.o CC drivers/gpu/drm/i915/gem/i915_gem_throttle.o CC [M] drivers/gpu/drm/xe/display/intel_bo.o CC drivers/gpu/drm/i915/gem/i915_gem_tiling.o CC drivers/gpu/drm/i915/gem/i915_gem_ttm.o CC [M] drivers/gpu/drm/xe/display/intel_fb_bo.o CC [M] drivers/gpu/drm/xe/display/intel_fbdev_fb.o CC [M] drivers/gpu/drm/xe/display/xe_display.o CC drivers/gpu/drm/i915/gem/i915_gem_ttm_move.o CC [M] drivers/gpu/drm/xe/display/xe_display_misc.o CC drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.o CC [M] drivers/gpu/drm/xe/display/xe_display_rps.o CC [M] drivers/gpu/drm/xe/display/xe_display_wa.o CC [M] drivers/gpu/drm/xe/display/xe_dsb_buffer.o CC drivers/gpu/drm/i915/gem/i915_gem_userptr.o CC [M] drivers/gpu/drm/xe/display/xe_fb_pin.o CC drivers/gpu/drm/i915/gem/i915_gem_wait.o CC [M] drivers/gpu/drm/xe/display/xe_hdcp_gsc.o CC drivers/gpu/drm/i915/gem/i915_gemfs.o CC [M] drivers/gpu/drm/xe/display/xe_plane_initial.o CC [M] drivers/gpu/drm/xe/display/xe_tdf.o CC [M] drivers/gpu/drm/xe/i915-soc/intel_dram.o CC drivers/gpu/drm/i915/i915_active.o CC drivers/gpu/drm/i915/i915_cmd_parser.o CC drivers/gpu/drm/i915/i915_deps.o CC [M] drivers/gpu/drm/xe/i915-soc/intel_pch.o CC [M] drivers/gpu/drm/xe/i915-soc/intel_rom.o CC [M] drivers/gpu/drm/xe/i915-display/icl_dsi.o CC drivers/gpu/drm/i915/i915_gem.o CC drivers/gpu/drm/i915/i915_gem_evict.o CC [M] drivers/gpu/drm/xe/i915-display/intel_alpm.o CC drivers/gpu/drm/i915/i915_gem_gtt.o CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic.o CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic_plane.o CC [M] drivers/gpu/drm/xe/i915-display/intel_audio.o CC drivers/gpu/drm/i915/i915_gem_ww.o CC drivers/gpu/drm/i915/i915_query.o CC [M] drivers/gpu/drm/xe/i915-display/intel_backlight.o CC [M] drivers/gpu/drm/xe/i915-display/intel_bios.o CC [M] drivers/gpu/drm/xe/i915-display/intel_bw.o CC [M] drivers/gpu/drm/xe/i915-display/intel_cdclk.o CC drivers/gpu/drm/i915/i915_request.o CC [M] drivers/gpu/drm/xe/i915-display/intel_cmtg.o CC drivers/gpu/drm/i915/i915_scheduler.o CC [M] drivers/gpu/drm/xe/i915-display/intel_color.o CC drivers/gpu/drm/i915/i915_trace_points.o CC drivers/gpu/drm/i915/i915_ttm_buddy_manager.o CC drivers/gpu/drm/i915/i915_vma.o CC [M] drivers/gpu/drm/xe/i915-display/intel_combo_phy.o CC drivers/gpu/drm/i915/i915_vma_resource.o CC drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.o CC [M] drivers/gpu/drm/xe/i915-display/intel_connector.o CC drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.o CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.o CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_debugfs.o CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc.o CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.o CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc_state_dump.o CC [M] drivers/gpu/drm/xe/i915-display/intel_cursor.o CC drivers/gpu/drm/i915/gt/uc/intel_guc.o CC [M] drivers/gpu/drm/xe/i915-display/intel_cx0_phy.o CC drivers/gpu/drm/i915/gt/uc/intel_guc_ads.o CC drivers/gpu/drm/i915/gt/uc/intel_guc_capture.o CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi.o CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi_buf_trans.o CC drivers/gpu/drm/i915/gt/uc/intel_guc_ct.o CC drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display_conversion.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display_device.o CC drivers/gpu/drm/i915/gt/uc/intel_guc_fw.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display_driver.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display_irq.o CC drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display_params.o CC drivers/gpu/drm/i915/gt/uc/intel_guc_log.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power.o CC drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.o CC drivers/gpu/drm/i915/gt/uc/intel_guc_rc.o CC drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.o CC drivers/gpu/drm/i915/gt/uc/intel_guc_submission.o CC drivers/gpu/drm/i915/gt/uc/intel_huc.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_map.o CC drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_well.o CC drivers/gpu/drm/i915/gt/uc/intel_huc_fw.o CC drivers/gpu/drm/i915/gt/uc/intel_uc.o CC drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display_trace.o CC drivers/gpu/drm/i915/gt/uc/intel_uc_fw.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display_wa.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dkl_phy.o CC drivers/gpu/drm/i915/gt/intel_gsc.o CC drivers/gpu/drm/i915/i915_hwmon.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc.o CC drivers/gpu/drm/i915/display/hsw_ips.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc_wl.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dp.o CC drivers/gpu/drm/i915/display/i9xx_plane.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux_backlight.o CC drivers/gpu/drm/i915/display/i9xx_display_sr.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_hdcp.o CC drivers/gpu/drm/i915/display/i9xx_wm.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_link_training.o CC drivers/gpu/drm/i915/display/intel_alpm.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_mst.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_test.o CC drivers/gpu/drm/i915/display/intel_atomic.o CC drivers/gpu/drm/i915/display/intel_atomic_plane.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll_mgr.o CC drivers/gpu/drm/i915/display/intel_audio.o CC drivers/gpu/drm/i915/display/intel_bios.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dpt_common.o CC drivers/gpu/drm/i915/display/intel_bo.o CC [M] drivers/gpu/drm/xe/i915-display/intel_drrs.o CC drivers/gpu/drm/i915/display/intel_bw.o CC drivers/gpu/drm/i915/display/intel_cdclk.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dsb.o CC drivers/gpu/drm/i915/display/intel_cmtg.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi.o CC drivers/gpu/drm/i915/display/intel_color.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_dcs_backlight.o CC drivers/gpu/drm/i915/display/intel_combo_phy.o CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_vbt.o CC drivers/gpu/drm/i915/display/intel_connector.o CC drivers/gpu/drm/i915/display/intel_crtc.o CC drivers/gpu/drm/i915/display/intel_crtc_state_dump.o CC drivers/gpu/drm/i915/display/intel_cursor.o CC [M] drivers/gpu/drm/xe/i915-display/intel_encoder.o CC drivers/gpu/drm/i915/display/intel_display.o CC drivers/gpu/drm/i915/display/intel_display_conversion.o CC drivers/gpu/drm/i915/display/intel_display_driver.o CC drivers/gpu/drm/i915/display/intel_display_irq.o CC drivers/gpu/drm/i915/display/intel_display_params.o CC [M] drivers/gpu/drm/xe/i915-display/intel_fb.o CC drivers/gpu/drm/i915/display/intel_display_power.o CC [M] drivers/gpu/drm/xe/i915-display/intel_fbc.o CC [M] drivers/gpu/drm/xe/i915-display/intel_fdi.o CC [M] drivers/gpu/drm/xe/i915-display/intel_fifo_underrun.o CC [M] drivers/gpu/drm/xe/i915-display/intel_frontbuffer.o CC drivers/gpu/drm/i915/display/intel_display_power_map.o CC drivers/gpu/drm/i915/display/intel_display_power_well.o CC drivers/gpu/drm/i915/display/intel_display_reset.o CC [M] drivers/gpu/drm/xe/i915-display/intel_global_state.o CC drivers/gpu/drm/i915/display/intel_display_rps.o CC drivers/gpu/drm/i915/display/intel_display_snapshot.o CC [M] drivers/gpu/drm/xe/i915-display/intel_gmbus.o CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp.o CC drivers/gpu/drm/i915/display/intel_display_wa.o CC drivers/gpu/drm/i915/display/intel_dmc.o CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp_gsc_message.o CC drivers/gpu/drm/i915/display/intel_dmc_wl.o CC [M] drivers/gpu/drm/xe/i915-display/intel_hdmi.o CC drivers/gpu/drm/i915/display/intel_dpio_phy.o CC drivers/gpu/drm/i915/display/intel_dpll.o CC drivers/gpu/drm/i915/display/intel_dpll_mgr.o CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug.o CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug_irq.o CC [M] drivers/gpu/drm/xe/i915-display/intel_hti.o CC [M] drivers/gpu/drm/xe/i915-display/intel_link_bw.o CC [M] drivers/gpu/drm/xe/i915-display/intel_lspcon.o CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_lock.o CC drivers/gpu/drm/i915/display/intel_dpt.o CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_setup.o CC drivers/gpu/drm/i915/display/intel_dpt_common.o CC drivers/gpu/drm/i915/display/intel_drrs.o CC drivers/gpu/drm/i915/display/intel_dsb.o CC drivers/gpu/drm/i915/display/intel_dsb_buffer.o CC drivers/gpu/drm/i915/display/intel_fb.o CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_verify.o CC [M] drivers/gpu/drm/xe/i915-display/intel_panel.o CC drivers/gpu/drm/i915/display/intel_fb_bo.o CC drivers/gpu/drm/i915/display/intel_fb_pin.o CC drivers/gpu/drm/i915/display/intel_fbc.o CC [M] drivers/gpu/drm/xe/i915-display/intel_pfit.o CC drivers/gpu/drm/i915/display/intel_fdi.o CC [M] drivers/gpu/drm/xe/i915-display/intel_pmdemand.o CC [M] drivers/gpu/drm/xe/i915-display/intel_pps.o CC [M] drivers/gpu/drm/xe/i915-display/intel_psr.o CC [M] drivers/gpu/drm/xe/i915-display/intel_qp_tables.o CC drivers/gpu/drm/i915/display/intel_fifo_underrun.o CC [M] drivers/gpu/drm/xe/i915-display/intel_quirks.o CC drivers/gpu/drm/i915/display/intel_frontbuffer.o CC drivers/gpu/drm/i915/display/intel_global_state.o CC drivers/gpu/drm/i915/display/intel_hdcp.o CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_hdmi_pll.o CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_phy.o CC drivers/gpu/drm/i915/display/intel_hdcp_gsc.o CC [M] drivers/gpu/drm/xe/i915-display/intel_tc.o CC drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.o CC [M] drivers/gpu/drm/xe/i915-display/intel_vblank.o CC drivers/gpu/drm/i915/display/intel_hotplug.o CC [M] drivers/gpu/drm/xe/i915-display/intel_vdsc.o CC [M] drivers/gpu/drm/xe/i915-display/intel_vga.o CC drivers/gpu/drm/i915/display/intel_hotplug_irq.o CC drivers/gpu/drm/i915/display/intel_hti.o CC [M] drivers/gpu/drm/xe/i915-display/intel_vrr.o CC [M] drivers/gpu/drm/xe/i915-display/intel_wm.o CC drivers/gpu/drm/i915/display/intel_link_bw.o CC drivers/gpu/drm/i915/display/intel_load_detect.o CC drivers/gpu/drm/i915/display/intel_lpe_audio.o CC [M] drivers/gpu/drm/xe/i915-display/skl_scaler.o CC drivers/gpu/drm/i915/display/intel_modeset_lock.o CC drivers/gpu/drm/i915/display/intel_modeset_setup.o CC [M] drivers/gpu/drm/xe/i915-display/skl_universal_plane.o CC [M] drivers/gpu/drm/xe/i915-display/skl_watermark.o CC [M] drivers/gpu/drm/xe/i915-display/intel_acpi.o CC [M] drivers/gpu/drm/xe/i915-display/intel_opregion.o CC [M] drivers/gpu/drm/xe/xe_debugfs.o CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o CC drivers/gpu/drm/i915/display/intel_modeset_verify.o CC drivers/gpu/drm/i915/display/intel_overlay.o CC drivers/gpu/drm/i915/display/intel_pch_display.o CC drivers/gpu/drm/i915/display/intel_pch_refclk.o CC drivers/gpu/drm/i915/display/intel_plane_initial.o CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf_debugfs.o CC drivers/gpu/drm/i915/display/intel_pmdemand.o CC [M] drivers/gpu/drm/xe/xe_gt_stats.o CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o CC drivers/gpu/drm/i915/display/intel_psr.o CC drivers/gpu/drm/i915/display/intel_quirks.o CC drivers/gpu/drm/i915/display/intel_sprite.o CC [M] drivers/gpu/drm/xe/xe_uc_debugfs.o CC drivers/gpu/drm/i915/display/intel_sprite_uapi.o CC drivers/gpu/drm/i915/display/intel_tc.o CC drivers/gpu/drm/i915/display/intel_vblank.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs.o CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs_params.o CC drivers/gpu/drm/i915/display/intel_vga.o CC drivers/gpu/drm/i915/display/intel_wm.o CC [M] drivers/gpu/drm/xe/i915-display/intel_pipe_crc.o CC drivers/gpu/drm/i915/display/skl_scaler.o CC drivers/gpu/drm/i915/display/skl_universal_plane.o CC drivers/gpu/drm/i915/display/skl_watermark.o CC drivers/gpu/drm/i915/display/intel_acpi.o CC drivers/gpu/drm/i915/display/intel_opregion.o CC drivers/gpu/drm/i915/display/intel_display_debugfs.o CC drivers/gpu/drm/i915/display/intel_display_debugfs_params.o CC drivers/gpu/drm/i915/display/intel_pipe_crc.o CC drivers/gpu/drm/i915/display/dvo_ch7017.o CC drivers/gpu/drm/i915/display/dvo_ch7xxx.o CC drivers/gpu/drm/i915/display/dvo_ivch.o CC drivers/gpu/drm/i915/display/dvo_ns2501.o CC drivers/gpu/drm/i915/display/dvo_sil164.o CC drivers/gpu/drm/i915/display/dvo_tfp410.o CC drivers/gpu/drm/i915/display/g4x_dp.o CC drivers/gpu/drm/i915/display/g4x_hdmi.o CC drivers/gpu/drm/i915/display/icl_dsi.o CC drivers/gpu/drm/i915/display/intel_backlight.o CC drivers/gpu/drm/i915/display/intel_crt.o CC drivers/gpu/drm/i915/display/intel_cx0_phy.o CC drivers/gpu/drm/i915/display/intel_ddi.o CC drivers/gpu/drm/i915/display/intel_ddi_buf_trans.o CC drivers/gpu/drm/i915/display/intel_display_device.o CC drivers/gpu/drm/i915/display/intel_display_trace.o CC drivers/gpu/drm/i915/display/intel_dkl_phy.o CC drivers/gpu/drm/i915/display/intel_dp.o CC drivers/gpu/drm/i915/display/intel_dp_aux.o CC drivers/gpu/drm/i915/display/intel_dp_aux_backlight.o CC drivers/gpu/drm/i915/display/intel_dp_hdcp.o CC drivers/gpu/drm/i915/display/intel_dp_link_training.o CC drivers/gpu/drm/i915/display/intel_dp_mst.o CC drivers/gpu/drm/i915/display/intel_dp_test.o CC drivers/gpu/drm/i915/display/intel_dsi.o CC drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.o CC drivers/gpu/drm/i915/display/intel_dsi_vbt.o CC drivers/gpu/drm/i915/display/intel_dvo.o CC drivers/gpu/drm/i915/display/intel_encoder.o CC drivers/gpu/drm/i915/display/intel_gmbus.o CC drivers/gpu/drm/i915/display/intel_hdmi.o CC drivers/gpu/drm/i915/display/intel_lspcon.o CC drivers/gpu/drm/i915/display/intel_lvds.o CC drivers/gpu/drm/i915/display/intel_panel.o CC drivers/gpu/drm/i915/display/intel_pfit.o CC drivers/gpu/drm/i915/display/intel_pps.o CC drivers/gpu/drm/i915/display/intel_qp_tables.o CC drivers/gpu/drm/i915/display/intel_sdvo.o CC drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.o CC drivers/gpu/drm/i915/display/intel_snps_phy.o CC drivers/gpu/drm/i915/display/intel_tv.o CC drivers/gpu/drm/i915/display/intel_vdsc.o CC drivers/gpu/drm/i915/display/intel_vrr.o CC drivers/gpu/drm/i915/display/vlv_dsi.o CC drivers/gpu/drm/i915/display/vlv_dsi_pll.o CC drivers/gpu/drm/i915/i915_perf.o CC drivers/gpu/drm/i915/pxp/intel_pxp.o CC drivers/gpu/drm/i915/pxp/intel_pxp_huc.o CC drivers/gpu/drm/i915/pxp/intel_pxp_tee.o CC drivers/gpu/drm/i915/i915_gpu_error.o CC drivers/gpu/drm/i915/i915_vgpu.o LD [M] drivers/gpu/drm/xe/xe.o AR drivers/gpu/drm/i915/built-in.a AR drivers/gpu/drm/built-in.a AR drivers/gpu/built-in.a AR drivers/built-in.a AR built-in.a AR vmlinux.a LD vmlinux.o OBJCOPY modules.builtin.modinfo GEN modules.builtin MODPOST Module.symvers CC .vmlinux.export.o CC [M] fs/efivarfs/efivarfs.mod.o CC [M] .module-common.o CC [M] drivers/gpu/drm/drm_exec.mod.o CC [M] drivers/gpu/drm/drm_gpuvm.mod.o CC [M] drivers/gpu/drm/drm_suballoc_helper.mod.o CC [M] drivers/gpu/drm/drm_ttm_helper.mod.o CC [M] drivers/gpu/drm/scheduler/gpu-sched.mod.o CC [M] drivers/gpu/drm/xe/xe.mod.o CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.mod.o CC [M] net/netfilter/nf_log_syslog.mod.o CC [M] net/netfilter/xt_mark.mod.o CC [M] net/netfilter/xt_nat.mod.o CC [M] net/netfilter/xt_LOG.mod.o CC [M] net/netfilter/xt_MASQUERADE.mod.o CC [M] net/netfilter/xt_addrtype.mod.o CC [M] net/ipv4/netfilter/iptable_nat.mod.o LD [M] drivers/gpu/drm/drm_gpuvm.ko LD [M] drivers/gpu/drm/drm_ttm_helper.ko LD [M] net/netfilter/xt_MASQUERADE.ko LD [M] net/netfilter/xt_addrtype.ko LD [M] net/netfilter/xt_nat.ko LD [M] drivers/gpu/drm/scheduler/gpu-sched.ko LD [M] drivers/gpu/drm/drm_suballoc_helper.ko LD [M] drivers/gpu/drm/xe/xe.ko LD [M] net/netfilter/xt_LOG.ko LD [M] drivers/thermal/intel/x86_pkg_temp_thermal.ko LD [M] drivers/gpu/drm/drm_exec.ko LD [M] net/netfilter/nf_log_syslog.ko LD [M] net/ipv4/netfilter/iptable_nat.ko LD [M] net/netfilter/xt_mark.ko LD [M] fs/efivarfs/efivarfs.ko UPD include/generated/utsversion.h CC init/version-timestamp.o KSYMS .tmp_vmlinux0.kallsyms.S AS .tmp_vmlinux0.kallsyms.o LD .tmp_vmlinux1 NM .tmp_vmlinux1.syms KSYMS .tmp_vmlinux1.kallsyms.S AS .tmp_vmlinux1.kallsyms.o LD .tmp_vmlinux2 NM .tmp_vmlinux2.syms KSYMS .tmp_vmlinux2.kallsyms.S AS .tmp_vmlinux2.kallsyms.o LD vmlinux NM System.map SORTTAB vmlinux RELOCS arch/x86/boot/compressed/vmlinux.relocs RSTRIP vmlinux CC arch/x86/boot/a20.o AS arch/x86/boot/bioscall.o CC arch/x86/boot/cmdline.o AS arch/x86/boot/copy.o HOSTCC arch/x86/boot/mkcpustr CC arch/x86/boot/cpuflags.o CC arch/x86/boot/cpucheck.o CC arch/x86/boot/early_serial_console.o CC arch/x86/boot/edd.o CC arch/x86/boot/main.o CC arch/x86/boot/memory.o CC arch/x86/boot/pm.o AS arch/x86/boot/pmjump.o CC arch/x86/boot/printf.o CC arch/x86/boot/regs.o CC arch/x86/boot/string.o CC arch/x86/boot/tty.o CC arch/x86/boot/video.o CC arch/x86/boot/video-mode.o CC arch/x86/boot/version.o CC arch/x86/boot/video-vga.o CC arch/x86/boot/video-vesa.o CC arch/x86/boot/video-bios.o HOSTCC arch/x86/boot/tools/build LDS arch/x86/boot/compressed/vmlinux.lds AS arch/x86/boot/compressed/kernel_info.o CPUSTR arch/x86/boot/cpustr.h AS arch/x86/boot/compressed/head_32.o VOFFSET arch/x86/boot/compressed/../voffset.h CC arch/x86/boot/compressed/string.o CC arch/x86/boot/cpu.o CC arch/x86/boot/compressed/cmdline.o CC arch/x86/boot/compressed/error.o OBJCOPY arch/x86/boot/compressed/vmlinux.bin HOSTCC arch/x86/boot/compressed/mkpiggy CC arch/x86/boot/compressed/cpuflags.o CC arch/x86/boot/compressed/early_serial_console.o CC arch/x86/boot/compressed/kaslr.o CC arch/x86/boot/compressed/acpi.o CC arch/x86/boot/compressed/efi.o GZIP arch/x86/boot/compressed/vmlinux.bin.gz CC arch/x86/boot/compressed/misc.o MKPIGGY arch/x86/boot/compressed/piggy.S AS arch/x86/boot/compressed/piggy.o LD arch/x86/boot/compressed/vmlinux ZOFFSET arch/x86/boot/zoffset.h OBJCOPY arch/x86/boot/vmlinux.bin AS arch/x86/boot/header.o LD arch/x86/boot/setup.elf OBJCOPY arch/x86/boot/setup.bin BUILD arch/x86/boot/bzImage Kernel: arch/x86/boot/bzImage is ready (#1) run-parts: executing /workspace/ci/hooks/20-kernel-doc + SRC_DIR=/workspace/kernel + cd /workspace/kernel + find drivers/gpu/drm/xe/ -name '*.[ch]' -not -path 'drivers/gpu/drm/xe/display/*' + xargs ./scripts/kernel-doc -Werror -none include/uapi/drm/xe_drm.h All hooks done ^ permalink raw reply [flat|nested] 20+ messages in thread
* ✗ CI.checksparse: warning for drm/i915/display: convert intel_display.[ch] to struct intel_display 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula ` (9 preceding siblings ...) 2025-03-04 11:38 ` ✓ CI.Hooks: " Patchwork @ 2025-03-04 11:39 ` Patchwork 2025-03-04 11:58 ` ✓ Xe.CI.BAT: success " Patchwork 2025-03-04 12:57 ` ✗ Xe.CI.Full: failure " Patchwork 12 siblings, 0 replies; 20+ messages in thread From: Patchwork @ 2025-03-04 11:39 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-xe == Series Details == Series: drm/i915/display: convert intel_display.[ch] to struct intel_display URL : https://patchwork.freedesktop.org/series/145758/ State : warning == Summary == + trap cleanup EXIT + KERNEL=/kernel + MT=/root/linux/maintainer-tools + git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools Cloning into '/root/linux/maintainer-tools'... warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/ + make -C /root/linux/maintainer-tools make: Entering directory '/root/linux/maintainer-tools' cc -O2 -g -Wextra -o remap-log remap-log.c make: Leaving directory '/root/linux/maintainer-tools' + cd /kernel + git config --global --add safe.directory /kernel + /root/linux/maintainer-tools/dim sparse --fast 1cf56e26a93292ca26fbf891368b75a67e8700dc Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3) Fast mode used, each commit won't be checked separately. +drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.c:106:17: warning: cast truncates bits from constant value (e8d4a51000 becomes d4a51000) + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/display: convert intel_display.[ch] to struct intel_display 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula ` (10 preceding siblings ...) 2025-03-04 11:39 ` ✗ CI.checksparse: warning " Patchwork @ 2025-03-04 11:58 ` Patchwork 2025-03-04 12:57 ` ✗ Xe.CI.Full: failure " Patchwork 12 siblings, 0 replies; 20+ messages in thread From: Patchwork @ 2025-03-04 11:58 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 1819 bytes --] == Series Details == Series: drm/i915/display: convert intel_display.[ch] to struct intel_display URL : https://patchwork.freedesktop.org/series/145758/ State : success == Summary == CI Bug Log - changes from xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc_BAT -> xe-pw-145758v1_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (9 -> 8) ------------------------------ Missing (1): bat-adlp-vm Known issues ------------ Here are the changes found in xe-pw-145758v1_BAT that come from known issues: ### IGT changes ### #### Issues hit #### * igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit: - bat-adlp-vf: NOTRUN -> [SKIP][1] ([Intel XE#2229]) [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/bat-adlp-vf/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html #### Possible fixes #### * igt@xe_live_ktest@xe_migrate: - bat-adlp-vf: [DMESG-FAIL][2] ([Intel XE#3890]) -> [PASS][3] +1 other test pass [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/bat-adlp-vf/igt@xe_live_ktest@xe_migrate.html [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/bat-adlp-vf/igt@xe_live_ktest@xe_migrate.html [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229 [Intel XE#3890]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3890 Build changes ------------- * Linux: xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc -> xe-pw-145758v1 IGT_8257: 8257 xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc: 1cf56e26a93292ca26fbf891368b75a67e8700dc xe-pw-145758v1: 145758v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/index.html [-- Attachment #2: Type: text/html, Size: 2405 bytes --] ^ permalink raw reply [flat|nested] 20+ messages in thread
* ✗ Xe.CI.Full: failure for drm/i915/display: convert intel_display.[ch] to struct intel_display 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula ` (11 preceding siblings ...) 2025-03-04 11:58 ` ✓ Xe.CI.BAT: success " Patchwork @ 2025-03-04 12:57 ` Patchwork 12 siblings, 0 replies; 20+ messages in thread From: Patchwork @ 2025-03-04 12:57 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 90244 bytes --] == Series Details == Series: drm/i915/display: convert intel_display.[ch] to struct intel_display URL : https://patchwork.freedesktop.org/series/145758/ State : failure == Summary == CI Bug Log - changes from xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc_full -> xe-pw-145758v1_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with xe-pw-145758v1_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in xe-pw-145758v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in xe-pw-145758v1_full: ### IGT changes ### #### Possible regressions #### * igt@kms_pm_rpm@drm-resources-equal: - shard-adlp: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-adlp-8/igt@kms_pm_rpm@drm-resources-equal.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-adlp-9/igt@kms_pm_rpm@drm-resources-equal.html * igt@kms_setmode@invalid-clone-single-crtc-stealing: - shard-dg2-set2: [PASS][3] -> [DMESG-WARN][4] [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-432/igt@kms_setmode@invalid-clone-single-crtc-stealing.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-463/igt@kms_setmode@invalid-clone-single-crtc-stealing.html * igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-a-hdmi-a-6-dp-4: - shard-dg2-set2: NOTRUN -> [DMESG-WARN][5] +1 other test dmesg-warn [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-463/igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-a-hdmi-a-6-dp-4.html #### Warnings #### * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc: - shard-dg2-set2: [INCOMPLETE][6] ([Intel XE#2705]) -> [INCOMPLETE][7] [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html Known issues ------------ Here are the changes found in xe-pw-145758v1_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_async_flips@async-flip-suspend-resume@pipe-d-hdmi-a-6: - shard-dg2-set2: [PASS][8] -> [DMESG-WARN][9] ([Intel XE#4330]) +8 other tests dmesg-warn [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-433/igt@kms_async_flips@async-flip-suspend-resume@pipe-d-hdmi-a-6.html [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-464/igt@kms_async_flips@async-flip-suspend-resume@pipe-d-hdmi-a-6.html * igt@kms_big_fb@linear-64bpp-rotate-90: - shard-dg2-set2: NOTRUN -> [SKIP][10] ([Intel XE#316]) [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_big_fb@linear-64bpp-rotate-90.html * igt@kms_big_fb@x-tiled-16bpp-rotate-90: - shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2327]) +1 other test skip [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip: - shard-adlp: [PASS][12] -> [DMESG-FAIL][13] ([Intel XE#4330]) [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-adlp-9/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-adlp-4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html * igt@kms_big_fb@yf-tiled-addfb-size-overflow: - shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#610]) [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#1124]) +10 other tests skip [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p: - shard-bmg: [PASS][16] -> [SKIP][17] ([Intel XE#2314] / [Intel XE#2894]) [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html * igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p: - shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2314] / [Intel XE#2894]) [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html * igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p: - shard-bmg: NOTRUN -> [INCOMPLETE][19] ([Intel XE#2594]) [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html * igt@kms_bw@linear-tiling-2-displays-2160x1440p: - shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#367]) +2 other tests skip [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs@pipe-d-dp-4: - shard-dg2-set2: NOTRUN -> [SKIP][21] ([Intel XE#455] / [Intel XE#787]) +20 other tests skip [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-433/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs@pipe-d-dp-4.html * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-b-dp-2: - shard-dg2-set2: NOTRUN -> [SKIP][22] ([Intel XE#787]) +130 other tests skip [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-432/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-b-dp-2.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc: - shard-dg2-set2: NOTRUN -> [DMESG-WARN][23] ([Intel XE#4199]) [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-4: - shard-dg2-set2: NOTRUN -> [DMESG-WARN][24] ([Intel XE#4330]) +13 other tests dmesg-warn [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-4.html * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2: - shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2652] / [Intel XE#787]) +12 other tests skip [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs: - shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#3432]) [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc: - shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2887]) +14 other tests skip [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html * igt@kms_cdclk@plane-scaling: - shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#2724]) [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_cdclk@plane-scaling.html * igt@kms_cdclk@plane-scaling@pipe-b-dp-4: - shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#4416]) +3 other tests skip [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-433/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html * igt@kms_cdclk@plane-scaling@pipe-b-edp-1: - shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#4416]) +2 other tests skip [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_cdclk@plane-scaling@pipe-b-edp-1.html * igt@kms_chamelium_color@ctm-limited-range: - shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#2325]) [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_chamelium_color@ctm-limited-range.html * igt@kms_chamelium_color@gamma: - shard-dg2-set2: NOTRUN -> [SKIP][32] ([Intel XE#306]) [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_chamelium_color@gamma.html * igt@kms_chamelium_edid@dp-edid-resolution-list: - shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2252]) +7 other tests skip [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_chamelium_edid@dp-edid-resolution-list.html * igt@kms_content_protection@atomic-dpms@pipe-a-dp-4: - shard-dg2-set2: NOTRUN -> [FAIL][34] ([Intel XE#1178]) +1 other test fail [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-463/igt@kms_content_protection@atomic-dpms@pipe-a-dp-4.html * igt@kms_cursor_crc@cursor-offscreen-512x170: - shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#2321]) [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_cursor_crc@cursor-offscreen-512x170.html * igt@kms_cursor_crc@cursor-random-32x10: - shard-dg2-set2: NOTRUN -> [SKIP][36] ([Intel XE#455]) [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_cursor_crc@cursor-random-32x10.html * igt@kms_cursor_crc@cursor-random-32x32: - shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#2320]) +3 other tests skip [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_cursor_crc@cursor-random-32x32.html * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy: - shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#2291]) +1 other test skip [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions: - shard-dg2-set2: NOTRUN -> [INCOMPLETE][39] ([Intel XE#3226]) [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html * igt@kms_cursor_legacy@cursora-vs-flipb-legacy: - shard-bmg: [PASS][40] -> [SKIP][41] ([Intel XE#2291]) +4 other tests skip [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-8/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html * igt@kms_dirtyfb@psr-dirtyfb-ioctl: - shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#1508]) [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6: - shard-dg2-set2: NOTRUN -> [SKIP][43] ([i915#3804]) [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html * igt@kms_dp_link_training@non-uhbr-mst: - shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#4354]) [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_dp_link_training@non-uhbr-mst.html * igt@kms_dsc@dsc-with-bpc: - shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#2244]) [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_dsc@dsc-with-bpc.html * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests: - shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#4422]) [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html * igt@kms_flip@2x-absolute-wf_vblank: - shard-dg2-set2: [PASS][47] -> [SKIP][48] ([Intel XE#310]) [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-433/igt@kms_flip@2x-absolute-wf_vblank.html [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-464/igt@kms_flip@2x-absolute-wf_vblank.html * igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3: - shard-bmg: NOTRUN -> [FAIL][49] ([Intel XE#3321]) +3 other tests fail [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html * igt@kms_flip@2x-plain-flip-fb-recreate: - shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2316]) [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_flip@2x-plain-flip-fb-recreate.html * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible: - shard-bmg: [PASS][51] -> [SKIP][52] ([Intel XE#2316]) +4 other tests skip [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-8/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html * igt@kms_flip@blocking-wf_vblank@a-hdmi-a6: - shard-dg2-set2: [PASS][53] -> [FAIL][54] ([Intel XE#886]) [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-464/igt@kms_flip@blocking-wf_vblank@a-hdmi-a6.html [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-464/igt@kms_flip@blocking-wf_vblank@a-hdmi-a6.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@d-dp2: - shard-bmg: [PASS][55] -> [DMESG-WARN][56] ([Intel XE#4330]) [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-dp2.html [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-dp2.html * igt@kms_flip@flip-vs-expired-vblank@d-hdmi-a6: - shard-dg2-set2: [PASS][57] -> [FAIL][58] ([Intel XE#301]) +2 other tests fail [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-464/igt@kms_flip@flip-vs-expired-vblank@d-hdmi-a6.html [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-463/igt@kms_flip@flip-vs-expired-vblank@d-hdmi-a6.html * igt@kms_flip@flip-vs-rmfb-interruptible@d-hdmi-a3: - shard-bmg: NOTRUN -> [DMESG-WARN][59] ([Intel XE#4330]) +2 other tests dmesg-warn [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@kms_flip@flip-vs-rmfb-interruptible@d-hdmi-a3.html * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling: - shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#2293] / [Intel XE#2380]) +3 other tests skip [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode: - shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#1397]) +1 other test skip [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode: - shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2293]) +3 other tests skip [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode: - shard-lnl: NOTRUN -> [SKIP][63] ([Intel XE#1401]) +9 other tests skip [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc: - shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#2311]) +26 other tests skip [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render: - shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#2312]) +8 other tests skip [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt: - shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#4141]) +11 other tests skip [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render: - shard-dg2-set2: [PASS][67] -> [SKIP][68] ([Intel XE#656]) +1 other test skip [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-draw-render: - shard-dg2-set2: NOTRUN -> [SKIP][69] ([Intel XE#651]) +2 other tests skip [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt: - shard-bmg: NOTRUN -> [SKIP][70] ([Intel XE#2313]) +23 other tests skip [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc: - shard-dg2-set2: NOTRUN -> [SKIP][71] ([Intel XE#653]) +3 other tests skip [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html * igt@kms_getfb@getfb-reject-ccs: - shard-bmg: NOTRUN -> [SKIP][72] ([Intel XE#2502]) [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_getfb@getfb-reject-ccs.html * igt@kms_hdr@brightness-with-hdr: - shard-bmg: NOTRUN -> [SKIP][73] ([Intel XE#3544]) [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html * igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1: - shard-lnl: NOTRUN -> [SKIP][74] ([Intel XE#1450]) +2 other tests skip [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-5/igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1.html * igt@kms_joiner@basic-force-ultra-joiner: - shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#2934]) +1 other test skip [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@kms_joiner@basic-force-ultra-joiner.html * igt@kms_plane@plane-position-hole-dpms@pipe-b-plane-3: - shard-lnl: NOTRUN -> [DMESG-WARN][76] ([Intel XE#324]) +12 other tests dmesg-warn [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_plane@plane-position-hole-dpms@pipe-b-plane-3.html * igt@kms_plane@plane-position-hole@pipe-a-plane-3: - shard-lnl: NOTRUN -> [DMESG-FAIL][77] ([Intel XE#324]) +1 other test dmesg-fail [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_plane@plane-position-hole@pipe-a-plane-3.html * igt@kms_plane_lowres@tiling-x@pipe-b-edp-1: - shard-lnl: NOTRUN -> [SKIP][78] ([Intel XE#599]) +5 other tests skip [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html * igt@kms_plane_lowres@tiling-yf: - shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#2393]) [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@kms_plane_lowres@tiling-yf.html * igt@kms_plane_multiple@tiling-y: - shard-bmg: NOTRUN -> [SKIP][80] ([Intel XE#2493]) [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_plane_multiple@tiling-y.html * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation: - shard-dg2-set2: NOTRUN -> [DMESG-WARN][81] ([Intel XE#2566] / [Intel XE#4330]) +1 other test dmesg-warn [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75: - shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#2763]) +9 other tests skip [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf: - shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#1489]) +8 other tests skip [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html * igt@kms_psr2_sf@psr2-cursor-plane-update-sf: - shard-dg2-set2: NOTRUN -> [SKIP][84] ([Intel XE#1489]) [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html * igt@kms_psr@fbc-pr-cursor-blt: - shard-bmg: NOTRUN -> [SKIP][85] ([Intel XE#2234] / [Intel XE#2850]) +14 other tests skip [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_psr@fbc-pr-cursor-blt.html * igt@kms_psr@fbc-psr-primary-page-flip: - shard-dg2-set2: NOTRUN -> [SKIP][86] ([Intel XE#2850] / [Intel XE#929]) [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_psr@fbc-psr-primary-page-flip.html * igt@kms_rotation_crc@primary-rotation-90: - shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#3414] / [Intel XE#3904]) [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_rotation_crc@primary-rotation-90.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0: - shard-bmg: NOTRUN -> [SKIP][88] ([Intel XE#2330]) [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html * igt@kms_tiled_display@basic-test-pattern-with-chamelium: - shard-bmg: NOTRUN -> [SKIP][89] ([Intel XE#2426]) [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html * igt@kms_vrr@flip-suspend: - shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#1499]) +2 other tests skip [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@kms_vrr@flip-suspend.html * igt@xe_eudebug_online@single-step: - shard-bmg: NOTRUN -> [SKIP][91] ([Intel XE#2905]) +9 other tests skip [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@xe_eudebug_online@single-step.html * igt@xe_exec_basic@multigpu-once-null-rebind: - shard-bmg: NOTRUN -> [SKIP][92] ([Intel XE#2322]) +8 other tests skip [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@xe_exec_basic@multigpu-once-null-rebind.html - shard-dg2-set2: [PASS][93] -> [SKIP][94] ([Intel XE#1392]) +5 other tests skip [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-434/igt@xe_exec_basic@multigpu-once-null-rebind.html [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-432/igt@xe_exec_basic@multigpu-once-null-rebind.html * igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit: - shard-dg2-set2: [PASS][95] -> [FAIL][96] ([Intel XE#1999]) +2 other tests fail [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-432/igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit.html [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-433/igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit.html * igt@xe_oa@oa-tlb-invalidate: - shard-bmg: NOTRUN -> [SKIP][97] ([Intel XE#2248]) [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@xe_oa@oa-tlb-invalidate.html * igt@xe_pat@pat-index-xelp: - shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#2245]) [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@xe_pat@pat-index-xelp.html * igt@xe_pm@s2idle-d3cold-basic-exec: - shard-bmg: NOTRUN -> [SKIP][99] ([Intel XE#2284]) +3 other tests skip [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@xe_pm@s2idle-d3cold-basic-exec.html * igt@xe_pm@s2idle-vm-bind-unbind-all: - shard-adlp: [PASS][100] -> [DMESG-WARN][101] ([Intel XE#2953]) +2 other tests dmesg-warn [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-adlp-8/igt@xe_pm@s2idle-vm-bind-unbind-all.html [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-adlp-1/igt@xe_pm@s2idle-vm-bind-unbind-all.html * igt@xe_pm@s2idle-vm-bind-userptr: - shard-adlp: [PASS][102] -> [DMESG-WARN][103] ([Intel XE#4173]) +3 other tests dmesg-warn [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-adlp-6/igt@xe_pm@s2idle-vm-bind-userptr.html [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-adlp-3/igt@xe_pm@s2idle-vm-bind-userptr.html * igt@xe_pm@s3-vm-bind-prefetch: - shard-bmg: NOTRUN -> [DMESG-WARN][104] ([Intel XE#4330] / [Intel XE#569]) [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@xe_pm@s3-vm-bind-prefetch.html * igt@xe_pm@vram-d3cold-threshold: - shard-bmg: NOTRUN -> [SKIP][105] ([Intel XE#579]) [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@xe_pm@vram-d3cold-threshold.html * igt@xe_query@multigpu-query-config: - shard-bmg: NOTRUN -> [SKIP][106] ([Intel XE#944]) +1 other test skip [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@xe_query@multigpu-query-config.html * igt@xe_query@multigpu-query-topology: - shard-dg2-set2: NOTRUN -> [SKIP][107] ([Intel XE#944]) [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@xe_query@multigpu-query-topology.html * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs: - shard-bmg: NOTRUN -> [SKIP][108] ([Intel XE#4130]) +1 other test skip [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html * igt@xe_sriov_flr@flr-vf1-clear: - shard-bmg: NOTRUN -> [SKIP][109] ([Intel XE#3342]) [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@xe_sriov_flr@flr-vf1-clear.html #### Possible fixes #### * igt@fbdev@read: - shard-lnl: [SKIP][110] ([Intel XE#2134]) -> [PASS][111] +2 other tests pass [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@fbdev@read.html [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@fbdev@read.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing: - shard-adlp: [FAIL][112] ([Intel XE#3908]) -> [PASS][113] +1 other test pass [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-adlp-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-adlp-3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html * igt@kms_big_fb@x-tiled-addfb-size-overflow: - shard-lnl: [SKIP][114] ([Intel XE#4472]) -> [PASS][115] +52 other tests pass [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_big_fb@x-tiled-addfb-size-overflow.html [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_big_fb@x-tiled-addfb-size-overflow.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs: - shard-dg2-set2: [INCOMPLETE][116] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) -> [PASS][117] [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4: - shard-dg2-set2: [INCOMPLETE][118] ([Intel XE#3124]) -> [PASS][119] [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6: - shard-dg2-set2: [DMESG-WARN][120] ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][121] [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html * igt@kms_color@deep-color: - shard-lnl: [SKIP][122] ([Intel XE#1511]) -> [PASS][123] [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_color@deep-color.html [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_color@deep-color.html * igt@kms_color@degamma: - shard-lnl: [SKIP][124] -> [PASS][125] +18 other tests pass [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_color@degamma.html [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_color@degamma.html * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic: - shard-bmg: [SKIP][126] ([Intel XE#2291]) -> [PASS][127] +1 other test pass [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size: - shard-dg2-set2: [SKIP][128] ([Intel XE#309]) -> [PASS][129] [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-464/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-463/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions-varying-size: - shard-lnl: [SKIP][130] ([Intel XE#4471]) -> [PASS][131] +39 other tests pass [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions-varying-size.html [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-8/igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions-varying-size.html * igt@kms_dp_aux_dev: - shard-dg2-set2: [SKIP][132] ([Intel XE#3009]) -> [PASS][133] [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-464/igt@kms_dp_aux_dev.html [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-436/igt@kms_dp_aux_dev.html - shard-lnl: [SKIP][134] ([Intel XE#3009]) -> [PASS][135] [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_dp_aux_dev.html [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_dp_aux_dev.html * igt@kms_dp_link_training@non-uhbr-sst: - shard-dg2-set2: [SKIP][136] ([Intel XE#4354]) -> [PASS][137] [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-464/igt@kms_dp_link_training@non-uhbr-sst.html [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-436/igt@kms_dp_link_training@non-uhbr-sst.html * igt@kms_feature_discovery@psr1: - shard-lnl: [SKIP][138] ([Intel XE#1135]) -> [PASS][139] +1 other test pass [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_feature_discovery@psr1.html [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-5/igt@kms_feature_discovery@psr1.html * igt@kms_flip@2x-absolute-wf_vblank-interruptible@cd-dp2-hdmi-a3: - shard-bmg: [DMESG-WARN][140] ([Intel XE#4330]) -> [PASS][141] +12 other tests pass [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-2/igt@kms_flip@2x-absolute-wf_vblank-interruptible@cd-dp2-hdmi-a3.html [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-7/igt@kms_flip@2x-absolute-wf_vblank-interruptible@cd-dp2-hdmi-a3.html * igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a6-dp4: - shard-dg2-set2: [FAIL][142] ([Intel XE#301]) -> [PASS][143] [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-433/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a6-dp4.html [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-463/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a6-dp4.html * igt@kms_flip@2x-flip-vs-wf_vblank: - shard-dg2-set2: [SKIP][144] ([Intel XE#310]) -> [PASS][145] [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-464/igt@kms_flip@2x-flip-vs-wf_vblank.html [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-436/igt@kms_flip@2x-flip-vs-wf_vblank.html * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible@ab-hdmi-a6-dp4: - shard-dg2-set2: [FAIL][146] ([Intel XE#3098]) -> [PASS][147] +1 other test pass [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-433/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible@ab-hdmi-a6-dp4.html [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-463/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible@ab-hdmi-a6-dp4.html * igt@kms_flip@2x-wf_vblank-ts-check: - shard-bmg: [SKIP][148] ([Intel XE#2316]) -> [PASS][149] +4 other tests pass [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-4/igt@kms_flip@2x-wf_vblank-ts-check.html [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-7/igt@kms_flip@2x-wf_vblank-ts-check.html * igt@kms_flip@blocking-wf_vblank@a-hdmi-a1: - shard-adlp: [FAIL][150] ([Intel XE#2882]) -> [PASS][151] +1 other test pass [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-adlp-6/igt@kms_flip@blocking-wf_vblank@a-hdmi-a1.html [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-adlp-3/igt@kms_flip@blocking-wf_vblank@a-hdmi-a1.html * igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a1: - shard-adlp: [DMESG-WARN][152] ([Intel XE#2953]) -> [PASS][153] [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-adlp-8/igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a1.html [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-adlp-9/igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a1.html * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset: - shard-dg2-set2: [DMESG-WARN][154] ([Intel XE#2955]) -> [PASS][155] [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-433/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset.html [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-464/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset.html * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible: - shard-lnl: [SKIP][156] ([Intel XE#2482]) -> [PASS][157] +16 other tests pass [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html * igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling: - shard-lnl: [SKIP][158] ([Intel XE#1745]) -> [PASS][159] +4 other tests pass [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-upscaling@pipe-a-valid-mode: - shard-dg2-set2: [DMESG-WARN][160] ([Intel XE#4330]) -> [PASS][161] +3 other tests pass [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-433/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-upscaling@pipe-a-valid-mode.html [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-464/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-upscaling@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc: - shard-dg2-set2: [SKIP][162] ([Intel XE#656]) -> [PASS][163] +2 other tests pass [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw: - shard-lnl: [SKIP][164] ([Intel XE#2548]) -> [PASS][165] +45 other tests pass [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html * igt@kms_invalid_mode@bad-vtotal: - shard-lnl: [SKIP][166] ([Intel XE#2568]) -> [PASS][167] +1 other test pass [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_invalid_mode@bad-vtotal.html [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_invalid_mode@bad-vtotal.html * igt@kms_plane@plane-panning-bottom-right: - shard-lnl: [SKIP][168] ([Intel XE#3380]) -> [PASS][169] +1 other test pass [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_plane@plane-panning-bottom-right.html [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-8/igt@kms_plane@plane-panning-bottom-right.html * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-modifiers: - shard-lnl: [SKIP][170] ([Intel XE#2763]) -> [PASS][171] +37 other tests pass [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-modifiers.html [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-modifiers.html * igt@kms_pm_backlight@fade-with-dpms: - shard-lnl: [SKIP][172] ([Intel XE#870]) -> [PASS][173] [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_pm_backlight@fade-with-dpms.html [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-1/igt@kms_pm_backlight@fade-with-dpms.html * igt@kms_pm_dc@dc5-psr: - shard-lnl: [SKIP][174] ([Intel XE#1129]) -> [PASS][175] [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_pm_dc@dc5-psr.html [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_pm_dc@dc5-psr.html * igt@kms_pm_rpm@modeset-lpsp: - shard-lnl: [SKIP][176] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836]) -> [PASS][177] +1 other test pass [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_pm_rpm@modeset-lpsp.html [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_pm_rpm@modeset-lpsp.html * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf: - shard-lnl: [SKIP][178] ([Intel XE#1489]) -> [PASS][179] +4 other tests pass [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr@psr-no-drrs: - shard-lnl: [SKIP][180] ([Intel XE#2850] / [Intel XE#929]) -> [PASS][181] +16 other tests pass [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_psr@psr-no-drrs.html [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-1/igt@kms_psr@psr-no-drrs.html * igt@kms_psr_stress_test@flip-primary-invalidate-overlay: - shard-lnl: [SKIP][182] ([Intel XE#2939]) -> [PASS][183] [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html * igt@kms_setmode@basic: - shard-lnl: [SKIP][184] ([Intel XE#1435]) -> [PASS][185] [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_setmode@basic.html [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-1/igt@kms_setmode@basic.html * igt@kms_setmode@invalid-clone-single-crtc-stealing: - shard-bmg: [SKIP][186] ([Intel XE#1435]) -> [PASS][187] +1 other test pass [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-4/igt@kms_setmode@invalid-clone-single-crtc-stealing.html [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-8/igt@kms_setmode@invalid-clone-single-crtc-stealing.html * igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap: - shard-dg2-set2: [SKIP][188] ([Intel XE#1392]) -> [PASS][189] +6 other tests pass [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap.html [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-463/igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap.html * igt@xe_wedged@basic-wedged: - shard-adlp: [DMESG-WARN][190] ([Intel XE#4173]) -> [PASS][191] [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-adlp-4/igt@xe_wedged@basic-wedged.html [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-adlp-1/igt@xe_wedged@basic-wedged.html #### Warnings #### * igt@kms_async_flips@test-cursor-atomic: - shard-lnl: [SKIP][192] ([Intel XE#4471]) -> [SKIP][193] ([Intel XE#664]) [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_async_flips@test-cursor-atomic.html [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_async_flips@test-cursor-atomic.html * igt@kms_atomic@plane-cursor-legacy: - shard-lnl: [SKIP][194] ([Intel XE#4471]) -> [DMESG-WARN][195] ([Intel XE#324]) [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_atomic@plane-cursor-legacy.html [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_atomic@plane-cursor-legacy.html * igt@kms_big_fb@4-tiled-32bpp-rotate-90: - shard-lnl: [SKIP][196] ([Intel XE#4471]) -> [SKIP][197] ([Intel XE#1407]) +5 other tests skip [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip: - shard-lnl: [SKIP][198] ([Intel XE#4471]) -> [SKIP][199] ([Intel XE#3658]) [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@x-tiled-8bpp-rotate-270: - shard-lnl: [SKIP][200] ([Intel XE#4472]) -> [SKIP][201] ([Intel XE#1407]) +4 other tests skip [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-5/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html * igt@kms_big_fb@y-tiled-32bpp-rotate-0: - shard-lnl: [SKIP][202] ([Intel XE#4471]) -> [SKIP][203] ([Intel XE#1124]) +11 other tests skip [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-8/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html * igt@kms_big_fb@y-tiled-addfb: - shard-lnl: [SKIP][204] ([Intel XE#4472]) -> [SKIP][205] ([Intel XE#1467]) [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_big_fb@y-tiled-addfb.html [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-1/igt@kms_big_fb@y-tiled-addfb.html * igt@kms_big_fb@y-tiled-addfb-size-overflow: - shard-lnl: [SKIP][206] ([Intel XE#4472]) -> [SKIP][207] ([Intel XE#1428]) [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_big_fb@y-tiled-addfb-size-overflow.html [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-5/igt@kms_big_fb@y-tiled-addfb-size-overflow.html * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow: - shard-lnl: [SKIP][208] ([Intel XE#4471]) -> [SKIP][209] ([Intel XE#1477]) [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-8/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-lnl: [SKIP][210] ([Intel XE#4472]) -> [SKIP][211] ([Intel XE#1124]) +12 other tests skip [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p: - shard-lnl: [SKIP][212] ([Intel XE#4471]) -> [SKIP][213] ([Intel XE#2191]) [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html * igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p: - shard-lnl: [SKIP][214] ([Intel XE#4472]) -> [SKIP][215] ([Intel XE#2191]) +1 other test skip [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html * igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p: - shard-lnl: [SKIP][216] ([Intel XE#4472]) -> [SKIP][217] ([Intel XE#1512]) [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-5/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html * igt@kms_bw@linear-tiling-2-displays-2160x1440p: - shard-lnl: [SKIP][218] ([Intel XE#4472]) -> [SKIP][219] ([Intel XE#367]) [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html * igt@kms_bw@linear-tiling-3-displays-2560x1440p: - shard-lnl: [SKIP][220] ([Intel XE#4471]) -> [SKIP][221] ([Intel XE#367]) +1 other test skip [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html * igt@kms_bw@linear-tiling-4-displays-2560x1440p: - shard-lnl: [SKIP][222] ([Intel XE#4471]) -> [SKIP][223] ([Intel XE#1512]) [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc: - shard-lnl: [SKIP][224] ([Intel XE#4471]) -> [SKIP][225] ([Intel XE#2887]) +13 other tests skip [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6: - shard-dg2-set2: [SKIP][226] ([Intel XE#787]) -> [SKIP][227] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-433/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6.html [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-464/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6.html * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs: - shard-lnl: [SKIP][228] ([Intel XE#4471]) -> [SKIP][229] ([Intel XE#3432]) [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs: - shard-lnl: [SKIP][230] ([Intel XE#4472]) -> [SKIP][231] ([Intel XE#3432]) +1 other test skip [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs: - shard-lnl: [SKIP][232] ([Intel XE#4472]) -> [SKIP][233] ([Intel XE#2887]) +15 other tests skip [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs.html [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs.html * igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-6: - shard-dg2-set2: [SKIP][234] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][235] ([Intel XE#787]) +3 other tests skip [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-464/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-6.html [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-436/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-6.html * igt@kms_cdclk@plane-scaling: - shard-lnl: [SKIP][236] ([Intel XE#4472]) -> [SKIP][237] ([Intel XE#4416]) [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_cdclk@plane-scaling.html [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_cdclk@plane-scaling.html * igt@kms_content_protection@content-type-change: - shard-lnl: [SKIP][238] ([Intel XE#4471]) -> [SKIP][239] ([Intel XE#3278]) +1 other test skip [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_content_protection@content-type-change.html [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_content_protection@content-type-change.html * igt@kms_content_protection@legacy: - shard-lnl: [SKIP][240] ([Intel XE#4472]) -> [SKIP][241] ([Intel XE#3278]) +1 other test skip [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_content_protection@legacy.html [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-1/igt@kms_content_protection@legacy.html * igt@kms_content_protection@mei-interface: - shard-lnl: [SKIP][242] ([Intel XE#4471]) -> [SKIP][243] ([Intel XE#1468]) [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_content_protection@mei-interface.html [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_content_protection@mei-interface.html * igt@kms_cursor_crc@cursor-offscreen-512x170: - shard-lnl: [SKIP][244] ([Intel XE#4472]) -> [SKIP][245] ([Intel XE#2321]) [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_cursor_crc@cursor-offscreen-512x170.html [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_cursor_crc@cursor-offscreen-512x170.html * igt@kms_cursor_crc@cursor-onscreen-512x170: - shard-lnl: [SKIP][246] ([Intel XE#4471]) -> [SKIP][247] ([Intel XE#2321]) [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_cursor_crc@cursor-onscreen-512x170.html [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_cursor_crc@cursor-onscreen-512x170.html * igt@kms_cursor_crc@cursor-random-128x42: - shard-lnl: [SKIP][248] ([Intel XE#4471]) -> [SKIP][249] ([Intel XE#1424]) +5 other tests skip [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_cursor_crc@cursor-random-128x42.html [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-8/igt@kms_cursor_crc@cursor-random-128x42.html * igt@kms_cursor_crc@cursor-rapid-movement-64x21: - shard-lnl: [SKIP][250] ([Intel XE#4472]) -> [SKIP][251] ([Intel XE#1424]) +5 other tests skip [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_cursor_crc@cursor-rapid-movement-64x21.html [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_cursor_crc@cursor-rapid-movement-64x21.html * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy: - shard-lnl: [SKIP][252] ([Intel XE#4472]) -> [SKIP][253] ([Intel XE#309]) +6 other tests skip [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-1/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: - shard-lnl: [SKIP][254] ([Intel XE#4471]) -> [SKIP][255] ([Intel XE#309]) +2 other tests skip [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - shard-lnl: [SKIP][256] ([Intel XE#4472]) -> [SKIP][257] ([Intel XE#323]) +1 other test skip [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html * igt@kms_display_modes@extended-mode-basic: - shard-lnl: [SKIP][258] ([Intel XE#4471]) -> [SKIP][259] ([Intel XE#4302]) [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_display_modes@extended-mode-basic.html [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_display_modes@extended-mode-basic.html * igt@kms_dp_link_training@non-uhbr-sst: - shard-lnl: [SKIP][260] ([Intel XE#4471]) -> [SKIP][261] ([Intel XE#4354]) [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_dp_link_training@non-uhbr-sst.html [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_dp_link_training@non-uhbr-sst.html * igt@kms_dp_linktrain_fallback@dsc-fallback: - shard-lnl: [SKIP][262] ([Intel XE#4472]) -> [SKIP][263] ([Intel XE#4331]) [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_dp_linktrain_fallback@dsc-fallback.html [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-5/igt@kms_dp_linktrain_fallback@dsc-fallback.html * igt@kms_dsc@dsc-with-bpc: - shard-lnl: [SKIP][264] ([Intel XE#4472]) -> [SKIP][265] ([Intel XE#2244]) [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_dsc@dsc-with-bpc.html [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_dsc@dsc-with-bpc.html * igt@kms_dsc@dsc-with-bpc-formats: - shard-lnl: [SKIP][266] ([Intel XE#4471]) -> [SKIP][267] ([Intel XE#2244]) +1 other test skip [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_dsc@dsc-with-bpc-formats.html [267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_dsc@dsc-with-bpc-formats.html * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats: - shard-lnl: [SKIP][268] ([Intel XE#4472]) -> [SKIP][269] ([Intel XE#4422]) [268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html [269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-1/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html * igt@kms_flip@blocking-wf_vblank: - shard-dg2-set2: [DMESG-WARN][270] ([Intel XE#4330]) -> [DMESG-FAIL][271] ([Intel XE#4330]) [270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-464/igt@kms_flip@blocking-wf_vblank.html [271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-464/igt@kms_flip@blocking-wf_vblank.html * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling: - shard-lnl: [SKIP][272] ([Intel XE#1745]) -> [SKIP][273] ([Intel XE#1397] / [Intel XE#1745]) +1 other test skip [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling.html [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling: - shard-lnl: [SKIP][274] ([Intel XE#1745]) -> [SKIP][275] ([Intel XE#1401] / [Intel XE#1745]) +9 other tests skip [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-msflip-blt: - shard-lnl: [SKIP][276] ([Intel XE#2548]) -> [SKIP][277] ([Intel XE#651]) +27 other tests skip [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-msflip-blt.html [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-msflip-blt.html * igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw: - shard-bmg: [SKIP][278] ([Intel XE#2311]) -> [SKIP][279] ([Intel XE#2312]) +12 other tests skip [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-render: - shard-dg2-set2: [SKIP][280] ([Intel XE#651]) -> [SKIP][281] ([Intel XE#656]) +2 other tests skip [280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-433/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-render.html [281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-render.html * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-onoff: - shard-dg2-set2: [SKIP][282] ([Intel XE#656]) -> [SKIP][283] ([Intel XE#651]) +7 other tests skip [282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-onoff.html [283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt: - shard-dg2-set2: [DMESG-WARN][284] ([Intel XE#4330]) -> [SKIP][285] ([Intel XE#656]) [284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-433/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html [285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt: - shard-bmg: [SKIP][286] ([Intel XE#4141]) -> [SKIP][287] ([Intel XE#2312]) +7 other tests skip [286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html [287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt: - shard-lnl: [SKIP][288] ([Intel XE#2548]) -> [SKIP][289] ([Intel XE#656]) +74 other tests skip [288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html [289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render: - shard-bmg: [SKIP][290] ([Intel XE#2312]) -> [SKIP][291] ([Intel XE#4141]) +6 other tests skip [290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html [291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-blt: - shard-bmg: [SKIP][292] ([Intel XE#2312]) -> [SKIP][293] ([Intel XE#2311]) +12 other tests skip [292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-blt.html [293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render: - shard-bmg: [SKIP][294] ([Intel XE#2312]) -> [SKIP][295] ([Intel XE#2313]) +14 other tests skip [294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html [295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc: - shard-dg2-set2: [SKIP][296] ([Intel XE#653]) -> [SKIP][297] ([Intel XE#656]) +4 other tests skip [296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html [297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc: - shard-bmg: [SKIP][298] ([Intel XE#2313]) -> [SKIP][299] ([Intel XE#2312]) +16 other tests skip [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt: - shard-dg2-set2: [SKIP][300] ([Intel XE#656]) -> [SKIP][301] ([Intel XE#653]) +5 other tests skip [300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt.html [301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt.html * igt@kms_hdr@brightness-with-hdr: - shard-lnl: [SKIP][302] ([Intel XE#4472]) -> [SKIP][303] ([Intel XE#3374] / [Intel XE#3544]) [302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_hdr@brightness-with-hdr.html [303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_hdr@brightness-with-hdr.html * igt@kms_hdr@static-toggle-dpms: - shard-lnl: [SKIP][304] ([Intel XE#4471]) -> [SKIP][305] ([Intel XE#1503]) [304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_hdr@static-toggle-dpms.html [305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-8/igt@kms_hdr@static-toggle-dpms.html * igt@kms_hdr@static-toggle-suspend: - shard-lnl: [SKIP][306] ([Intel XE#4472]) -> [SKIP][307] ([Intel XE#1503]) [306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_hdr@static-toggle-suspend.html [307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-1/igt@kms_hdr@static-toggle-suspend.html * igt@kms_invalid_mode@clock-too-high: - shard-lnl: [SKIP][308] ([Intel XE#2568]) -> [SKIP][309] ([Intel XE#1450] / [Intel XE#2568]) [308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_invalid_mode@clock-too-high.html [309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-5/igt@kms_invalid_mode@clock-too-high.html * igt@kms_plane@plane-position-hole: - shard-lnl: [SKIP][310] ([Intel XE#3380]) -> [DMESG-FAIL][311] ([Intel XE#324]) [310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_plane@plane-position-hole.html [311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_plane@plane-position-hole.html * igt@kms_plane@plane-position-hole-dpms: - shard-lnl: [SKIP][312] ([Intel XE#3380]) -> [DMESG-WARN][313] ([Intel XE#324]) [312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_plane@plane-position-hole-dpms.html [313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_plane@plane-position-hole-dpms.html * igt@kms_plane_lowres@tiling-none: - shard-lnl: [SKIP][314] ([Intel XE#4472]) -> [SKIP][315] ([Intel XE#599]) [314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_plane_lowres@tiling-none.html [315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_plane_lowres@tiling-none.html * igt@kms_plane_lowres@tiling-x: - shard-lnl: [SKIP][316] ([Intel XE#4471]) -> [SKIP][317] ([Intel XE#599]) [316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_plane_lowres@tiling-x.html [317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_plane_lowres@tiling-x.html * igt@kms_plane_multiple@tiling-4: - shard-dg2-set2: [DMESG-WARN][318] ([Intel XE#4361]) -> [DMESG-WARN][319] ([Intel XE#4330]) [318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-dg2-433/igt@kms_plane_multiple@tiling-4.html [319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-dg2-464/igt@kms_plane_multiple@tiling-4.html * igt@kms_pm_dc@deep-pkgc: - shard-lnl: [SKIP][320] ([Intel XE#2861]) -> [FAIL][321] ([Intel XE#2029]) [320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_pm_dc@deep-pkgc.html [321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_pm_dc@deep-pkgc.html * igt@kms_psr2_sf@pr-plane-move-sf-dmg-area: - shard-lnl: [SKIP][322] ([Intel XE#1489]) -> [SKIP][323] ([Intel XE#2893]) +10 other tests skip [322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html [323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html * igt@kms_psr2_su@page_flip-nv12: - shard-lnl: [SKIP][324] ([Intel XE#1122]) -> [SKIP][325] ([Intel XE#1128]) +1 other test skip [324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_psr2_su@page_flip-nv12.html [325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-5/igt@kms_psr2_su@page_flip-nv12.html * igt@kms_psr@pr-primary-blt: - shard-lnl: [SKIP][326] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][327] ([Intel XE#1406]) +13 other tests skip [326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_psr@pr-primary-blt.html [327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-3/igt@kms_psr@pr-primary-blt.html * igt@kms_rotation_crc@primary-4-tiled-reflect-x-0: - shard-lnl: [SKIP][328] ([Intel XE#4471]) -> [SKIP][329] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip [328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html [329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-8/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html * igt@kms_rotation_crc@primary-rotation-90: - shard-lnl: [SKIP][330] ([Intel XE#4472]) -> [SKIP][331] ([Intel XE#3414] / [Intel XE#3904]) [330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_rotation_crc@primary-rotation-90.html [331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_rotation_crc@primary-rotation-90.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0: - shard-lnl: [SKIP][332] ([Intel XE#4471]) -> [SKIP][333] ([Intel XE#1127]) +1 other test skip [332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html [333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html * igt@kms_tiled_display@basic-test-pattern-with-chamelium: - shard-lnl: [SKIP][334] ([Intel XE#4472]) -> [SKIP][335] ([Intel XE#362]) [334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html [335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html * igt@kms_vrr@lobf: - shard-lnl: [SKIP][336] ([Intel XE#4471]) -> [SKIP][337] ([Intel XE#1499]) [336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-1/igt@kms_vrr@lobf.html [337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-8/igt@kms_vrr@lobf.html * igt@kms_vrr@seamless-rr-switch-vrr: - shard-lnl: [SKIP][338] ([Intel XE#4472]) -> [SKIP][339] ([Intel XE#1499]) [338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc/shard-lnl-7/igt@kms_vrr@seamless-rr-switch-vrr.html [339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/shard-lnl-1/igt@kms_vrr@seamless-rr-switch-vrr.html [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122 [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127 [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128 [Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129 [Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135 [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178 [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392 [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397 [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401 [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406 [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407 [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424 [Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428 [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435 [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439 [Intel XE#1450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1450 [Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467 [Intel XE#1468]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1468 [Intel XE#1477]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1477 [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489 [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499 [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503 [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508 [Intel XE#1511]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1511 [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512 [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727 [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745 [Intel XE#1999]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1999 [Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029 [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134 [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191 [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234 [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244 [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245 [Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248 [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252 [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284 [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291 [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314 [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316 [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320 [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321 [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322 [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325 [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327 [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330 [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380 [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393 [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426 [Intel XE#2482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2482 [Intel XE#2493]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2493 [Intel XE#2502]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2502 [Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548 [Intel XE#2566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2566 [Intel XE#2568]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2568 [Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594 [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652 [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705 [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724 [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#2861]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2861 [Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893 [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894 [Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905 [Intel XE#2934]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2934 [Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939 [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953 [Intel XE#2955]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2955 [Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306 [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309 [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098 [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310 [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113 [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124 [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141 [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316 [Intel XE#3226]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3226 [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323 [Intel XE#324]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/324 [Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278 [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321 [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342 [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374 [Intel XE#3380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3380 [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414 [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432 [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544 [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362 [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658 [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367 [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904 [Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908 [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130 [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141 [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173 [Intel XE#4199]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4199 [Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302 [Intel XE#4330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4330 [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331 [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354 [Intel XE#4361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4361 [Intel XE#4416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4416 [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422 [Intel XE#4471]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4471 [Intel XE#4472]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4472 [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455 [Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569 [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579 [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599 [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610 [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651 [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653 [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656 [Intel XE#664]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/664 [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787 [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836 [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870 [Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886 [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929 [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944 [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804 Build changes ------------- * Linux: xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc -> xe-pw-145758v1 IGT_8257: 8257 xe-2752-1cf56e26a93292ca26fbf891368b75a67e8700dc: 1cf56e26a93292ca26fbf891368b75a67e8700dc xe-pw-145758v1: 145758v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-145758v1/index.html [-- Attachment #2: Type: text/html, Size: 107055 bytes --] ^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2025-03-05 18:39 UTC | newest] Thread overview: 20+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-03-04 10:27 [PATCH 0/5] drm/i915/display: convert intel_display.[ch] to struct intel_display Jani Nikula 2025-03-04 10:27 ` [PATCH 1/5] drm/i915/display: convert various port/phy helpers " Jani Nikula 2025-03-04 12:32 ` Garg, Nemesa 2025-03-05 18:39 ` Jani Nikula 2025-03-04 10:27 ` [PATCH 2/5] drm/i915/display: convert some intel_display.[ch] functions " Jani Nikula 2025-03-04 12:40 ` Garg, Nemesa 2025-03-04 10:27 ` [PATCH 3/5] drm/i915/display: convert intel_has_pending_fb_unpin() " Jani Nikula 2025-03-04 12:48 ` Garg, Nemesa 2025-03-04 10:27 ` [PATCH 4/5] drm/i915/display: remove dupe intel_update_watermarks() declaration Jani Nikula 2025-03-04 12:25 ` Garg, Nemesa 2025-03-04 10:27 ` [PATCH 5/5] drm/i915/display: convert intel_display.c to struct intel_display Jani Nikula 2025-03-04 13:22 ` Garg, Nemesa 2025-03-04 11:17 ` ✓ CI.Patch_applied: success for drm/i915/display: convert intel_display.[ch] " Patchwork 2025-03-04 11:18 ` ✗ CI.checkpatch: warning " Patchwork 2025-03-04 11:19 ` ✓ CI.KUnit: success " Patchwork 2025-03-04 11:35 ` ✓ CI.Build: " Patchwork 2025-03-04 11:38 ` ✓ CI.Hooks: " Patchwork 2025-03-04 11:39 ` ✗ CI.checksparse: warning " Patchwork 2025-03-04 11:58 ` ✓ Xe.CI.BAT: success " Patchwork 2025-03-04 12:57 ` ✗ Xe.CI.Full: failure " Patchwork
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox