* [PATCH 1/7] drm/i915/wm: convert intel_wm.h external interfaces to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
@ 2025-04-03 9:11 ` Jani Nikula
2025-04-03 9:11 ` [PATCH 2/7] drm/i915/wm: convert intel_wm.c internally " Jani Nikula
` (13 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2025-04-03 9:11 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert the intel_wm.h interface as well as the hooks in struct
intel_wm_funcs to struct intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 51 +++++++++++--------
drivers/gpu/drm/i915/display/intel_display.c | 10 ++--
.../gpu/drm/i915/display/intel_display_core.h | 6 +--
.../drm/i915/display/intel_display_debugfs.c | 3 +-
.../drm/i915/display/intel_display_driver.c | 2 +-
.../drm/i915/display/intel_modeset_setup.c | 11 ++--
drivers/gpu/drm/i915/display/intel_wm.c | 41 ++++++++-------
drivers/gpu/drm/i915/display/intel_wm.h | 14 ++---
drivers/gpu/drm/i915/display/skl_watermark.c | 10 ++--
9 files changed, 80 insertions(+), 68 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 7c80e37c1c5f..e6a1b9b10b01 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -641,8 +641,9 @@ static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv)
return enabled;
}
-static void pnv_update_wm(struct drm_i915_private *dev_priv)
+static void pnv_update_wm(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
const struct cxsr_latency *latency;
u32 reg;
@@ -2123,8 +2124,9 @@ static void vlv_optimize_watermarks(struct intel_atomic_state *state,
mutex_unlock(&dev_priv->display.wm.wm_mutex);
}
-static void i965_update_wm(struct drm_i915_private *dev_priv)
+static void i965_update_wm(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
int srwm = 1;
int cursor_sr = 16;
@@ -2216,8 +2218,9 @@ static struct intel_crtc *intel_crtc_for_plane(struct drm_i915_private *i915,
return NULL;
}
-static void i9xx_update_wm(struct drm_i915_private *dev_priv)
+static void i9xx_update_wm(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
const struct intel_watermark_params *wm_info;
u32 fwater_lo;
u32 fwater_hi;
@@ -2359,8 +2362,9 @@ static void i9xx_update_wm(struct drm_i915_private *dev_priv)
intel_set_memory_cxsr(dev_priv, true);
}
-static void i845_update_wm(struct drm_i915_private *dev_priv)
+static void i845_update_wm(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
u32 fwater_lo;
int planea_wm;
@@ -2813,6 +2817,7 @@ static bool ilk_increase_wm_latency(struct drm_i915_private *dev_priv,
static void snb_wm_latency_quirk(struct drm_i915_private *dev_priv)
{
+ struct intel_display *display = &dev_priv->display;
bool changed;
/*
@@ -2828,13 +2833,14 @@ static void snb_wm_latency_quirk(struct drm_i915_private *dev_priv)
drm_dbg_kms(&dev_priv->drm,
"WM latency values increased to avoid potential underruns\n");
- intel_print_wm_latency(dev_priv, "Primary", dev_priv->display.wm.pri_latency);
- intel_print_wm_latency(dev_priv, "Sprite", dev_priv->display.wm.spr_latency);
- intel_print_wm_latency(dev_priv, "Cursor", dev_priv->display.wm.cur_latency);
+ intel_print_wm_latency(display, "Primary", dev_priv->display.wm.pri_latency);
+ intel_print_wm_latency(display, "Sprite", dev_priv->display.wm.spr_latency);
+ intel_print_wm_latency(display, "Cursor", dev_priv->display.wm.cur_latency);
}
static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv)
{
+ struct intel_display *display = &dev_priv->display;
/*
* On some SNB machines (Thinkpad X220 Tablet at least)
* LP3 usage can cause vblank interrupts to be lost.
@@ -2857,13 +2863,15 @@ static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv)
drm_dbg_kms(&dev_priv->drm,
"LP3 watermarks disabled due to potential for lost interrupts\n");
- intel_print_wm_latency(dev_priv, "Primary", dev_priv->display.wm.pri_latency);
- intel_print_wm_latency(dev_priv, "Sprite", dev_priv->display.wm.spr_latency);
- intel_print_wm_latency(dev_priv, "Cursor", dev_priv->display.wm.cur_latency);
+ intel_print_wm_latency(display, "Primary", dev_priv->display.wm.pri_latency);
+ intel_print_wm_latency(display, "Sprite", dev_priv->display.wm.spr_latency);
+ intel_print_wm_latency(display, "Cursor", dev_priv->display.wm.cur_latency);
}
static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
{
+ struct intel_display *display = &dev_priv->display;
+
if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
hsw_read_wm_latency(dev_priv, dev_priv->display.wm.pri_latency);
else if (DISPLAY_VER(dev_priv) >= 6)
@@ -2879,9 +2887,9 @@ static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
intel_fixup_spr_wm_latency(dev_priv, dev_priv->display.wm.spr_latency);
intel_fixup_cur_wm_latency(dev_priv, dev_priv->display.wm.cur_latency);
- intel_print_wm_latency(dev_priv, "Primary", dev_priv->display.wm.pri_latency);
- intel_print_wm_latency(dev_priv, "Sprite", dev_priv->display.wm.spr_latency);
- intel_print_wm_latency(dev_priv, "Cursor", dev_priv->display.wm.cur_latency);
+ intel_print_wm_latency(display, "Primary", dev_priv->display.wm.pri_latency);
+ intel_print_wm_latency(display, "Sprite", dev_priv->display.wm.spr_latency);
+ intel_print_wm_latency(display, "Cursor", dev_priv->display.wm.cur_latency);
if (DISPLAY_VER(dev_priv) == 6) {
snb_wm_latency_quirk(dev_priv);
@@ -3759,8 +3767,9 @@ static void vlv_read_wm_values(struct drm_i915_private *dev_priv,
#undef _FW_WM
#undef _FW_WM_VLV
-static void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
+static void g4x_wm_get_hw_state(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct g4x_wm_values *wm = &dev_priv->display.wm.g4x;
struct intel_crtc *crtc;
@@ -3852,9 +3861,9 @@ static void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
str_yes_no(wm->fbc_en));
}
-static void g4x_wm_sanitize(struct drm_i915_private *dev_priv)
+static void g4x_wm_sanitize(struct intel_display *display)
{
- struct intel_display *display = &dev_priv->display;
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_plane *plane;
struct intel_crtc *crtc;
@@ -3902,8 +3911,9 @@ static void g4x_wm_sanitize(struct drm_i915_private *dev_priv)
mutex_unlock(&dev_priv->display.wm.wm_mutex);
}
-static void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv)
+static void vlv_wm_get_hw_state(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct vlv_wm_values *wm = &dev_priv->display.wm.vlv;
struct intel_crtc *crtc;
u32 val;
@@ -4002,9 +4012,9 @@ static void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv)
wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr);
}
-static void vlv_wm_sanitize(struct drm_i915_private *dev_priv)
+static void vlv_wm_sanitize(struct intel_display *display)
{
- struct intel_display *display = &dev_priv->display;
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_plane *plane;
struct intel_crtc *crtc;
@@ -4065,8 +4075,9 @@ static void ilk_init_lp_watermarks(struct drm_i915_private *dev_priv)
*/
}
-static void ilk_wm_get_hw_state(struct drm_i915_private *dev_priv)
+static void ilk_wm_get_hw_state(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct ilk_wm_values *hw = &dev_priv->display.wm.hw;
struct intel_crtc *crtc;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index c540e2cae1f0..f5c4ee966ba9 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1052,7 +1052,7 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits);
if (new_crtc_state->update_wm_post && new_crtc_state->hw.active)
- intel_update_watermarks(dev_priv);
+ intel_update_watermarks(display);
intel_fbc_post_update(state, crtc);
@@ -1256,7 +1256,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
*/
if (!intel_initial_watermarks(state, crtc))
if (new_crtc_state->update_wm_pre)
- intel_update_watermarks(dev_priv);
+ intel_update_watermarks(display);
}
/*
@@ -2070,7 +2070,6 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state,
struct intel_display *display = to_intel_display(crtc);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
if (drm_WARN_ON(display->drm, crtc->active))
@@ -2094,7 +2093,7 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state,
intel_color_modeset(new_crtc_state);
if (!intel_initial_watermarks(state, crtc))
- intel_update_watermarks(dev_priv);
+ intel_update_watermarks(display);
intel_enable_transcoder(new_crtc_state);
intel_crtc_vblank_on(new_crtc_state);
@@ -2110,7 +2109,6 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
enum pipe pipe = crtc->pipe;
@@ -2147,7 +2145,7 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state,
intel_set_cpu_fifo_underrun_reporting(display, pipe, false);
if (!display->funcs.wm->initial_watermarks)
- intel_update_watermarks(dev_priv);
+ intel_update_watermarks(display);
/* clock the pipe down to 640x480@60 to potentially save power */
if (display->platform.i830)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 3673275f9061..eb6d6f2d0f75 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -80,7 +80,7 @@ struct intel_display_funcs {
/* functions used for watermark calcs for display. */
struct intel_wm_funcs {
/* update_wm is for legacy wm management */
- void (*update_wm)(struct drm_i915_private *dev_priv);
+ void (*update_wm)(struct intel_display *display);
int (*compute_watermarks)(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void (*initial_watermarks)(struct intel_atomic_state *state,
@@ -90,8 +90,8 @@ struct intel_wm_funcs {
void (*optimize_watermarks)(struct intel_atomic_state *state,
struct intel_crtc *crtc);
int (*compute_global_watermarks)(struct intel_atomic_state *state);
- void (*get_hw_state)(struct drm_i915_private *i915);
- void (*sanitize)(struct drm_i915_private *i915);
+ void (*get_hw_state)(struct intel_display *display);
+ void (*sanitize)(struct intel_display *display);
};
struct intel_audio_state {
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 4c784bb7e14b..8f1f95637e09 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -826,7 +826,6 @@ static const struct drm_info_list intel_display_debugfs_list[] = {
void intel_display_debugfs_register(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct drm_minor *minor = display->drm->primary;
debugfs_create_file("i915_fifo_underrun_reset", 0644, minor->debugfs_root,
@@ -844,7 +843,7 @@ void intel_display_debugfs_register(struct intel_display *display)
intel_hpd_debugfs_register(display);
intel_opregion_debugfs_register(display);
intel_psr_debugfs_register(display);
- intel_wm_debugfs_register(i915);
+ intel_wm_debugfs_register(display);
intel_display_debugfs_params(display);
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 4edadebad13b..44cf34517a62 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -422,7 +422,7 @@ int intel_display_driver_probe_nogem(struct intel_display *display)
if (!HAS_DISPLAY(display))
return 0;
- intel_wm_init(i915);
+ intel_wm_init(display);
intel_panel_sanitize_ssc(display);
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index 3cc915739677..2821fb35c30f 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -155,9 +155,8 @@ static void reset_crtc_encoder_state(struct intel_crtc *crtc)
static void intel_crtc_disable_noatomic_complete(struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(crtc);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
struct intel_pmdemand_state *pmdemand_state =
- to_intel_pmdemand_state(i915->display.pmdemand.obj.state);
+ to_intel_pmdemand_state(display->pmdemand.obj.state);
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
enum pipe pipe = crtc->pipe;
@@ -169,7 +168,7 @@ static void intel_crtc_disable_noatomic_complete(struct intel_crtc *crtc)
reset_crtc_encoder_state(crtc);
intel_fbc_disable(crtc);
- intel_update_watermarks(i915);
+ intel_update_watermarks(display);
intel_display_power_put_all_in_set(display, &crtc->enabled_power_domains);
@@ -874,7 +873,7 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915)
/* TODO move here (or even earlier?) on all platforms */
if (DISPLAY_VER(display) >= 9)
- intel_wm_get_hw_state(i915);
+ intel_wm_get_hw_state(display);
intel_bw_update_hw_state(display);
intel_cdclk_update_hw_state(display);
@@ -988,8 +987,8 @@ void intel_modeset_setup_hw_state(struct drm_i915_private *i915,
/* TODO move earlier on all platforms */
if (DISPLAY_VER(display) < 9)
- intel_wm_get_hw_state(i915);
- intel_wm_sanitize(i915);
+ intel_wm_get_hw_state(display);
+ intel_wm_sanitize(display);
for_each_intel_crtc(&i915->drm, crtc) {
struct intel_crtc_state *crtc_state =
diff --git a/drivers/gpu/drm/i915/display/intel_wm.c b/drivers/gpu/drm/i915/display/intel_wm.c
index f00f4cfc58e5..c6aff3ba8e3d 100644
--- a/drivers/gpu/drm/i915/display/intel_wm.c
+++ b/drivers/gpu/drm/i915/display/intel_wm.c
@@ -13,7 +13,7 @@
/**
* intel_update_watermarks - update FIFO watermark values based on current modes
- * @i915: i915 device
+ * @display: display device
*
* Calculate watermark values for the various WM regs based on current mode
* and plane configuration.
@@ -44,10 +44,10 @@
* We don't use the sprite, so we can ignore that. And on Crestline we have
* to set the non-SR watermarks to 8.
*/
-void intel_update_watermarks(struct drm_i915_private *i915)
+void intel_update_watermarks(struct intel_display *display)
{
- if (i915->display.funcs.wm->update_wm)
- i915->display.funcs.wm->update_wm(i915);
+ if (display->funcs.wm->update_wm)
+ display->funcs.wm->update_wm(display);
}
int intel_wm_compute(struct intel_atomic_state *state,
@@ -102,16 +102,16 @@ int intel_compute_global_watermarks(struct intel_atomic_state *state)
return 0;
}
-void intel_wm_get_hw_state(struct drm_i915_private *i915)
+void intel_wm_get_hw_state(struct intel_display *display)
{
- if (i915->display.funcs.wm->get_hw_state)
- return i915->display.funcs.wm->get_hw_state(i915);
+ if (display->funcs.wm->get_hw_state)
+ return display->funcs.wm->get_hw_state(display);
}
-void intel_wm_sanitize(struct drm_i915_private *i915)
+void intel_wm_sanitize(struct intel_display *display)
{
- if (i915->display.funcs.wm->sanitize)
- return i915->display.funcs.wm->sanitize(i915);
+ if (display->funcs.wm->sanitize)
+ return display->funcs.wm->sanitize(display);
}
bool intel_wm_plane_visible(const struct intel_crtc_state *crtc_state,
@@ -137,16 +137,16 @@ bool intel_wm_plane_visible(const struct intel_crtc_state *crtc_state,
return plane_state->uapi.visible;
}
-void intel_print_wm_latency(struct drm_i915_private *dev_priv,
+void intel_print_wm_latency(struct intel_display *display,
const char *name, const u16 wm[])
{
int level;
- for (level = 0; level < dev_priv->display.wm.num_levels; level++) {
+ for (level = 0; level < display->wm.num_levels; level++) {
unsigned int latency = wm[level];
if (latency == 0) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"%s WM%d latency not provided\n",
name, level);
continue;
@@ -156,20 +156,22 @@ void intel_print_wm_latency(struct drm_i915_private *dev_priv,
* - latencies are in us on gen9.
* - before then, WM1+ latency values are in 0.5us units
*/
- if (DISPLAY_VER(dev_priv) >= 9)
+ if (DISPLAY_VER(display) >= 9)
latency *= 10;
else if (level > 0)
latency *= 5;
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"%s WM%d latency %u (%u.%u usec)\n", name, level,
wm[level], latency / 10, latency % 10);
}
}
-void intel_wm_init(struct drm_i915_private *i915)
+void intel_wm_init(struct intel_display *display)
{
- if (DISPLAY_VER(i915) >= 9)
+ struct drm_i915_private *i915 = to_i915(display->drm);
+
+ if (DISPLAY_VER(display) >= 9)
skl_wm_init(i915);
else
i9xx_wm_init(i915);
@@ -385,9 +387,10 @@ static const struct file_operations i915_cur_wm_latency_fops = {
.write = cur_wm_latency_write
};
-void intel_wm_debugfs_register(struct drm_i915_private *i915)
+void intel_wm_debugfs_register(struct intel_display *display)
{
- struct drm_minor *minor = i915->drm.primary;
+ struct drm_i915_private *i915 = to_i915(display->drm);
+ struct drm_minor *minor = display->drm->primary;
debugfs_create_file("i915_pri_wm_latency", 0644, minor->debugfs_root,
i915, &i915_pri_wm_latency_fops);
diff --git a/drivers/gpu/drm/i915/display/intel_wm.h b/drivers/gpu/drm/i915/display/intel_wm.h
index 7d3a447054b3..9ad4e9eae5ca 100644
--- a/drivers/gpu/drm/i915/display/intel_wm.h
+++ b/drivers/gpu/drm/i915/display/intel_wm.h
@@ -8,13 +8,13 @@
#include <linux/types.h>
-struct drm_i915_private;
struct intel_atomic_state;
struct intel_crtc;
struct intel_crtc_state;
+struct intel_display;
struct intel_plane_state;
-void intel_update_watermarks(struct drm_i915_private *i915);
+void intel_update_watermarks(struct intel_display *display);
int intel_wm_compute(struct intel_atomic_state *state,
struct intel_crtc *crtc);
bool intel_initial_watermarks(struct intel_atomic_state *state,
@@ -24,13 +24,13 @@ void intel_atomic_update_watermarks(struct intel_atomic_state *state,
void intel_optimize_watermarks(struct intel_atomic_state *state,
struct intel_crtc *crtc);
int intel_compute_global_watermarks(struct intel_atomic_state *state);
-void intel_wm_get_hw_state(struct drm_i915_private *i915);
-void intel_wm_sanitize(struct drm_i915_private *i915);
+void intel_wm_get_hw_state(struct intel_display *display);
+void intel_wm_sanitize(struct intel_display *display);
bool intel_wm_plane_visible(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state);
-void intel_print_wm_latency(struct drm_i915_private *i915,
+void intel_print_wm_latency(struct intel_display *display,
const char *name, const u16 wm[]);
-void intel_wm_init(struct drm_i915_private *i915);
-void intel_wm_debugfs_register(struct drm_i915_private *i915);
+void intel_wm_init(struct intel_display *display);
+void intel_wm_debugfs_register(struct intel_display *display);
#endif /* __INTEL_WM_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index a6af5e4ba4d4..459be8743124 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3152,9 +3152,9 @@ static void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,
}
}
-static void skl_wm_get_hw_state(struct drm_i915_private *i915)
+static void skl_wm_get_hw_state(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
struct intel_dbuf_state *dbuf_state =
to_intel_dbuf_state(i915->display.dbuf.obj.state);
struct intel_crtc *crtc;
@@ -3385,7 +3385,7 @@ static void skl_setup_wm_latency(struct drm_i915_private *i915)
else
skl_read_wm_latency(i915, display->wm.skl_latency);
- intel_print_wm_latency(i915, "Gen9 Plane", display->wm.skl_latency);
+ intel_print_wm_latency(display, "Gen9 Plane", display->wm.skl_latency);
}
static struct intel_global_state *intel_dbuf_duplicate_state(struct intel_global_obj *obj)
@@ -3846,8 +3846,10 @@ static void skl_dbuf_sanitize(struct drm_i915_private *i915)
}
}
-static void skl_wm_sanitize(struct drm_i915_private *i915)
+static void skl_wm_sanitize(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
+
skl_mbus_sanitize(i915);
skl_dbuf_sanitize(i915);
}
--
2.39.5
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 2/7] drm/i915/wm: convert intel_wm.c internally to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
2025-04-03 9:11 ` [PATCH 1/7] drm/i915/wm: convert intel_wm.h external interfaces " Jani Nikula
@ 2025-04-03 9:11 ` Jani Nikula
2025-04-03 9:11 ` [PATCH 3/7] drm/i915/wm: convert skl_watermark.h external interfaces " Jani Nikula
` (12 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2025-04-03 9:11 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of intel_wm.c to struct
intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_wm.c | 122 ++++++++++++------------
1 file changed, 61 insertions(+), 61 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_wm.c b/drivers/gpu/drm/i915/display/intel_wm.c
index c6aff3ba8e3d..9899e4c3ae96 100644
--- a/drivers/gpu/drm/i915/display/intel_wm.c
+++ b/drivers/gpu/drm/i915/display/intel_wm.c
@@ -64,10 +64,10 @@ int intel_wm_compute(struct intel_atomic_state *state,
bool intel_initial_watermarks(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
- if (i915->display.funcs.wm->initial_watermarks) {
- i915->display.funcs.wm->initial_watermarks(state, crtc);
+ if (display->funcs.wm->initial_watermarks) {
+ display->funcs.wm->initial_watermarks(state, crtc);
return true;
}
@@ -77,27 +77,27 @@ bool intel_initial_watermarks(struct intel_atomic_state *state,
void intel_atomic_update_watermarks(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
- if (i915->display.funcs.wm->atomic_update_watermarks)
- i915->display.funcs.wm->atomic_update_watermarks(state, crtc);
+ if (display->funcs.wm->atomic_update_watermarks)
+ display->funcs.wm->atomic_update_watermarks(state, crtc);
}
void intel_optimize_watermarks(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
- if (i915->display.funcs.wm->optimize_watermarks)
- i915->display.funcs.wm->optimize_watermarks(state, crtc);
+ if (display->funcs.wm->optimize_watermarks)
+ display->funcs.wm->optimize_watermarks(state, crtc);
}
int intel_compute_global_watermarks(struct intel_atomic_state *state)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
- if (i915->display.funcs.wm->compute_global_watermarks)
- return i915->display.funcs.wm->compute_global_watermarks(state);
+ if (display->funcs.wm->compute_global_watermarks)
+ return display->funcs.wm->compute_global_watermarks(state);
return 0;
}
@@ -179,22 +179,22 @@ void intel_wm_init(struct intel_display *display)
static void wm_latency_show(struct seq_file *m, const u16 wm[8])
{
- struct drm_i915_private *dev_priv = m->private;
+ struct intel_display *display = m->private;
int level;
- drm_modeset_lock_all(&dev_priv->drm);
+ drm_modeset_lock_all(display->drm);
- for (level = 0; level < dev_priv->display.wm.num_levels; level++) {
+ for (level = 0; level < display->wm.num_levels; level++) {
unsigned int latency = wm[level];
/*
* - WM1+ latency values in 0.5us units
* - latencies are in us on gen9/vlv/chv
*/
- if (DISPLAY_VER(dev_priv) >= 9 ||
- IS_VALLEYVIEW(dev_priv) ||
- IS_CHERRYVIEW(dev_priv) ||
- IS_G4X(dev_priv))
+ if (DISPLAY_VER(display) >= 9 ||
+ display->platform.valleyview ||
+ display->platform.cherryview ||
+ display->platform.g4x)
latency *= 10;
else if (level > 0)
latency *= 5;
@@ -203,18 +203,18 @@ static void wm_latency_show(struct seq_file *m, const u16 wm[8])
level, wm[level], latency / 10, latency % 10);
}
- drm_modeset_unlock_all(&dev_priv->drm);
+ drm_modeset_unlock_all(display->drm);
}
static int pri_wm_latency_show(struct seq_file *m, void *data)
{
- struct drm_i915_private *dev_priv = m->private;
+ struct intel_display *display = m->private;
const u16 *latencies;
- if (DISPLAY_VER(dev_priv) >= 9)
- latencies = dev_priv->display.wm.skl_latency;
+ if (DISPLAY_VER(display) >= 9)
+ latencies = display->wm.skl_latency;
else
- latencies = dev_priv->display.wm.pri_latency;
+ latencies = display->wm.pri_latency;
wm_latency_show(m, latencies);
@@ -223,13 +223,13 @@ static int pri_wm_latency_show(struct seq_file *m, void *data)
static int spr_wm_latency_show(struct seq_file *m, void *data)
{
- struct drm_i915_private *dev_priv = m->private;
+ struct intel_display *display = m->private;
const u16 *latencies;
- if (DISPLAY_VER(dev_priv) >= 9)
- latencies = dev_priv->display.wm.skl_latency;
+ if (DISPLAY_VER(display) >= 9)
+ latencies = display->wm.skl_latency;
else
- latencies = dev_priv->display.wm.spr_latency;
+ latencies = display->wm.spr_latency;
wm_latency_show(m, latencies);
@@ -238,13 +238,13 @@ static int spr_wm_latency_show(struct seq_file *m, void *data)
static int cur_wm_latency_show(struct seq_file *m, void *data)
{
- struct drm_i915_private *dev_priv = m->private;
+ struct intel_display *display = m->private;
const u16 *latencies;
- if (DISPLAY_VER(dev_priv) >= 9)
- latencies = dev_priv->display.wm.skl_latency;
+ if (DISPLAY_VER(display) >= 9)
+ latencies = display->wm.skl_latency;
else
- latencies = dev_priv->display.wm.cur_latency;
+ latencies = display->wm.cur_latency;
wm_latency_show(m, latencies);
@@ -253,39 +253,39 @@ static int cur_wm_latency_show(struct seq_file *m, void *data)
static int pri_wm_latency_open(struct inode *inode, struct file *file)
{
- struct drm_i915_private *dev_priv = inode->i_private;
+ struct intel_display *display = inode->i_private;
- if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
+ if (DISPLAY_VER(display) < 5 && !display->platform.g4x)
return -ENODEV;
- return single_open(file, pri_wm_latency_show, dev_priv);
+ return single_open(file, pri_wm_latency_show, display);
}
static int spr_wm_latency_open(struct inode *inode, struct file *file)
{
- struct drm_i915_private *dev_priv = inode->i_private;
+ struct intel_display *display = inode->i_private;
- if (HAS_GMCH(dev_priv))
+ if (HAS_GMCH(display))
return -ENODEV;
- return single_open(file, spr_wm_latency_show, dev_priv);
+ return single_open(file, spr_wm_latency_show, display);
}
static int cur_wm_latency_open(struct inode *inode, struct file *file)
{
- struct drm_i915_private *dev_priv = inode->i_private;
+ struct intel_display *display = inode->i_private;
- if (HAS_GMCH(dev_priv))
+ if (HAS_GMCH(display))
return -ENODEV;
- return single_open(file, cur_wm_latency_show, dev_priv);
+ return single_open(file, cur_wm_latency_show, display);
}
static ssize_t wm_latency_write(struct file *file, const char __user *ubuf,
size_t len, loff_t *offp, u16 wm[8])
{
struct seq_file *m = file->private_data;
- struct drm_i915_private *dev_priv = m->private;
+ struct intel_display *display = m->private;
u16 new[8] = {};
int level;
int ret;
@@ -302,15 +302,15 @@ static ssize_t wm_latency_write(struct file *file, const char __user *ubuf,
ret = sscanf(tmp, "%hu %hu %hu %hu %hu %hu %hu %hu",
&new[0], &new[1], &new[2], &new[3],
&new[4], &new[5], &new[6], &new[7]);
- if (ret != dev_priv->display.wm.num_levels)
+ if (ret != display->wm.num_levels)
return -EINVAL;
- drm_modeset_lock_all(&dev_priv->drm);
+ drm_modeset_lock_all(display->drm);
- for (level = 0; level < dev_priv->display.wm.num_levels; level++)
+ for (level = 0; level < display->wm.num_levels; level++)
wm[level] = new[level];
- drm_modeset_unlock_all(&dev_priv->drm);
+ drm_modeset_unlock_all(display->drm);
return len;
}
@@ -319,13 +319,13 @@ static ssize_t pri_wm_latency_write(struct file *file, const char __user *ubuf,
size_t len, loff_t *offp)
{
struct seq_file *m = file->private_data;
- struct drm_i915_private *dev_priv = m->private;
+ struct intel_display *display = m->private;
u16 *latencies;
- if (DISPLAY_VER(dev_priv) >= 9)
- latencies = dev_priv->display.wm.skl_latency;
+ if (DISPLAY_VER(display) >= 9)
+ latencies = display->wm.skl_latency;
else
- latencies = dev_priv->display.wm.pri_latency;
+ latencies = display->wm.pri_latency;
return wm_latency_write(file, ubuf, len, offp, latencies);
}
@@ -334,13 +334,13 @@ static ssize_t spr_wm_latency_write(struct file *file, const char __user *ubuf,
size_t len, loff_t *offp)
{
struct seq_file *m = file->private_data;
- struct drm_i915_private *dev_priv = m->private;
+ struct intel_display *display = m->private;
u16 *latencies;
- if (DISPLAY_VER(dev_priv) >= 9)
- latencies = dev_priv->display.wm.skl_latency;
+ if (DISPLAY_VER(display) >= 9)
+ latencies = display->wm.skl_latency;
else
- latencies = dev_priv->display.wm.spr_latency;
+ latencies = display->wm.spr_latency;
return wm_latency_write(file, ubuf, len, offp, latencies);
}
@@ -349,13 +349,13 @@ static ssize_t cur_wm_latency_write(struct file *file, const char __user *ubuf,
size_t len, loff_t *offp)
{
struct seq_file *m = file->private_data;
- struct drm_i915_private *dev_priv = m->private;
+ struct intel_display *display = m->private;
u16 *latencies;
- if (DISPLAY_VER(dev_priv) >= 9)
- latencies = dev_priv->display.wm.skl_latency;
+ if (DISPLAY_VER(display) >= 9)
+ latencies = display->wm.skl_latency;
else
- latencies = dev_priv->display.wm.cur_latency;
+ latencies = display->wm.cur_latency;
return wm_latency_write(file, ubuf, len, offp, latencies);
}
@@ -393,13 +393,13 @@ void intel_wm_debugfs_register(struct intel_display *display)
struct drm_minor *minor = display->drm->primary;
debugfs_create_file("i915_pri_wm_latency", 0644, minor->debugfs_root,
- i915, &i915_pri_wm_latency_fops);
+ display, &i915_pri_wm_latency_fops);
debugfs_create_file("i915_spr_wm_latency", 0644, minor->debugfs_root,
- i915, &i915_spr_wm_latency_fops);
+ display, &i915_spr_wm_latency_fops);
debugfs_create_file("i915_cur_wm_latency", 0644, minor->debugfs_root,
- i915, &i915_cur_wm_latency_fops);
+ display, &i915_cur_wm_latency_fops);
skl_watermark_debugfs_register(i915);
}
--
2.39.5
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 3/7] drm/i915/wm: convert skl_watermark.h external interfaces to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
2025-04-03 9:11 ` [PATCH 1/7] drm/i915/wm: convert intel_wm.h external interfaces " Jani Nikula
2025-04-03 9:11 ` [PATCH 2/7] drm/i915/wm: convert intel_wm.c internally " Jani Nikula
@ 2025-04-03 9:11 ` Jani Nikula
2025-04-03 9:11 ` [PATCH 4/7] drm/i915/wm: convert skl_watermarks.c internally " Jani Nikula
` (11 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2025-04-03 9:11 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert the skl_watermark.h interface to struct intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_bw.c | 17 +--
drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +-
drivers/gpu/drm/i915/display/intel_display.c | 4 +-
.../drm/i915/display/intel_display_driver.c | 8 +-
drivers/gpu/drm/i915/display/intel_dsb.c | 4 +-
drivers/gpu/drm/i915/display/intel_wm.c | 5 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 110 ++++++++++--------
drivers/gpu/drm/i915/display/skl_watermark.h | 23 ++--
drivers/gpu/drm/i915/i915_driver.c | 2 +-
drivers/gpu/drm/xe/display/xe_display.c | 2 +-
10 files changed, 89 insertions(+), 90 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index bb81efec08a0..b7339ff0ed3c 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -977,7 +977,6 @@ static int mtl_find_qgv_points(struct intel_display *display,
unsigned int num_active_planes,
struct intel_bw_state *new_bw_state)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
unsigned int best_rate = UINT_MAX;
unsigned int num_qgv_points = display->bw.max[0].num_qgv_points;
unsigned int qgv_peak_bw = 0;
@@ -993,7 +992,7 @@ static int mtl_find_qgv_points(struct intel_display *display,
* for qgv peak bw in PM Demand request. So assign UINT_MAX if SAGV is
* not enabled. PM Demand code will clamp the value for the register
*/
- if (!intel_can_enable_sagv(i915, new_bw_state)) {
+ if (!intel_can_enable_sagv(display, new_bw_state)) {
new_bw_state->qgv_point_peakbw = U16_MAX;
drm_dbg_kms(display->drm, "No SAGV, use UINT_MAX as peak bw.");
return 0;
@@ -1050,7 +1049,6 @@ static int icl_find_qgv_points(struct intel_display *display,
const struct intel_bw_state *old_bw_state,
struct intel_bw_state *new_bw_state)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
unsigned int num_psf_gv_points = display->bw.max[0].num_psf_gv_points;
unsigned int num_qgv_points = display->bw.max[0].num_qgv_points;
u16 psf_points = 0;
@@ -1107,7 +1105,7 @@ static int icl_find_qgv_points(struct intel_display *display,
* we can't enable SAGV due to the increased memory latency it may
* cause.
*/
- if (!intel_can_enable_sagv(i915, new_bw_state)) {
+ if (!intel_can_enable_sagv(display, new_bw_state)) {
qgv_points = icl_max_bw_qgv_point_mask(display, num_active_planes);
drm_dbg_kms(display->drm, "No SAGV, using single QGV point mask 0x%x\n",
qgv_points);
@@ -1184,9 +1182,8 @@ static void skl_plane_calc_dbuf_bw(struct intel_bw_state *bw_state,
unsigned int data_rate)
{
struct intel_display *display = to_intel_display(crtc);
- struct drm_i915_private *i915 = to_i915(display->drm);
struct intel_dbuf_bw *crtc_bw = &bw_state->dbuf_bw[crtc->pipe];
- unsigned int dbuf_mask = skl_ddb_dbuf_slice_mask(i915, ddb);
+ unsigned int dbuf_mask = skl_ddb_dbuf_slice_mask(display, ddb);
enum dbuf_slice slice;
/*
@@ -1399,7 +1396,6 @@ static int intel_bw_check_data_rate(struct intel_atomic_state *state, bool *chan
int intel_bw_atomic_check(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(display->drm);
bool changed = false;
struct intel_bw_state *new_bw_state;
const struct intel_bw_state *old_bw_state;
@@ -1417,8 +1413,8 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
new_bw_state = intel_atomic_get_new_bw_state(state);
if (new_bw_state &&
- (intel_can_enable_sagv(i915, old_bw_state) !=
- intel_can_enable_sagv(i915, new_bw_state) ||
+ (intel_can_enable_sagv(display, old_bw_state) !=
+ intel_can_enable_sagv(display, new_bw_state) ||
new_bw_state->force_check_qgv))
changed = true;
@@ -1519,7 +1515,6 @@ static const struct intel_global_state_funcs intel_bw_funcs = {
int intel_bw_init(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct intel_bw_state *state;
state = kzalloc(sizeof(*state), GFP_KERNEL);
@@ -1533,7 +1528,7 @@ int intel_bw_init(struct intel_display *display)
* Limit this only if we have SAGV. And for Display version 14 onwards
* sagv is handled though pmdemand requests
*/
- if (intel_has_sagv(i915) && IS_DISPLAY_VER(display, 11, 13))
+ if (intel_has_sagv(display) && IS_DISPLAY_VER(display, 11, 13))
icl_force_disable_sagv(display, state);
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 984fd9f98c9f..4ddee788ab9d 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1972,9 +1972,7 @@ int intel_mdclk_cdclk_ratio(struct intel_display *display,
static void xe2lpd_mdclk_cdclk_ratio_program(struct intel_display *display,
const struct intel_cdclk_config *cdclk_config)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
- intel_dbuf_mdclk_cdclk_ratio_update(i915,
+ intel_dbuf_mdclk_cdclk_ratio_update(display,
intel_mdclk_cdclk_ratio(display, cdclk_config),
cdclk_config->joined_mbus);
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index f5c4ee966ba9..a6cd4a6d6c08 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4160,8 +4160,6 @@ static u16 hsw_ips_linetime_wm(const struct intel_crtc_state *crtc_state,
static u16 skl_linetime_wm(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
const struct drm_display_mode *pipe_mode =
&crtc_state->hw.pipe_mode;
int linetime_wm;
@@ -4174,7 +4172,7 @@ static u16 skl_linetime_wm(const struct intel_crtc_state *crtc_state)
/* Display WA #1135: BXT:ALL GLK:ALL */
if ((display->platform.geminilake || display->platform.broxton) &&
- skl_watermark_ipc_enabled(dev_priv))
+ skl_watermark_ipc_enabled(display))
linetime_wm /= 2;
return min(linetime_wm, 0x1ff);
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 44cf34517a62..f6d5d51dda0f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -252,7 +252,7 @@ int intel_display_driver_probe_noirq(struct intel_display *display)
if (ret)
goto cleanup_vga_client_pw_domain_dmc;
- ret = intel_dbuf_init(i915);
+ ret = intel_dbuf_init(display);
if (ret)
goto cleanup_vga_client_pw_domain_dmc;
@@ -491,7 +491,6 @@ int intel_display_driver_probe_nogem(struct intel_display *display)
/* part #3: call after gem init */
int intel_display_driver_probe(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
int ret;
if (!HAS_DISPLAY(display))
@@ -519,7 +518,7 @@ int intel_display_driver_probe(struct intel_display *display)
/* Only enable hotplug handling once the fbdev is fully set up. */
intel_hpd_init(display);
- skl_watermark_ipc_init(i915);
+ skl_watermark_ipc_init(display);
return 0;
}
@@ -726,7 +725,6 @@ __intel_display_driver_resume(struct intel_display *display,
void intel_display_driver_resume(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct drm_atomic_state *state = display->restore.modeset_state;
struct drm_modeset_acquire_ctx ctx;
int ret;
@@ -754,7 +752,7 @@ void intel_display_driver_resume(struct intel_display *display)
if (!ret)
ret = __intel_display_driver_resume(display, state, &ctx);
- skl_watermark_ipc_update(i915);
+ skl_watermark_ipc_update(display);
drm_modeset_drop_locks(&ctx);
drm_modeset_acquire_fini(&ctx);
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index 0ddcdedf5453..72fe390c5af2 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -143,10 +143,10 @@ static int dsb_vtotal(struct intel_atomic_state *state,
static int dsb_dewake_scanline_start(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(state);
const struct intel_crtc_state *crtc_state =
intel_pre_commit_crtc_state(state, crtc);
- struct drm_i915_private *i915 = to_i915(state->base.dev);
- unsigned int latency = skl_watermark_max_latency(i915, 0);
+ unsigned int latency = skl_watermark_max_latency(display, 0);
return intel_mode_vdisplay(&crtc_state->hw.adjusted_mode) -
intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, latency);
diff --git a/drivers/gpu/drm/i915/display/intel_wm.c b/drivers/gpu/drm/i915/display/intel_wm.c
index 9899e4c3ae96..43c69a672bb3 100644
--- a/drivers/gpu/drm/i915/display/intel_wm.c
+++ b/drivers/gpu/drm/i915/display/intel_wm.c
@@ -172,7 +172,7 @@ void intel_wm_init(struct intel_display *display)
struct drm_i915_private *i915 = to_i915(display->drm);
if (DISPLAY_VER(display) >= 9)
- skl_wm_init(i915);
+ skl_wm_init(display);
else
i9xx_wm_init(i915);
}
@@ -389,7 +389,6 @@ static const struct file_operations i915_cur_wm_latency_fops = {
void intel_wm_debugfs_register(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct drm_minor *minor = display->drm->primary;
debugfs_create_file("i915_pri_wm_latency", 0644, minor->debugfs_root,
@@ -401,5 +400,5 @@ void intel_wm_debugfs_register(struct intel_display *display)
debugfs_create_file("i915_cur_wm_latency", 0644, minor->debugfs_root,
display, &i915_cur_wm_latency_fops);
- skl_watermark_debugfs_register(i915);
+ skl_watermark_debugfs_register(display);
}
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 459be8743124..758d59965d33 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -76,10 +76,8 @@ static bool skl_needs_memory_bw_wa(struct drm_i915_private *i915)
}
bool
-intel_has_sagv(struct drm_i915_private *i915)
+intel_has_sagv(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
-
return HAS_SAGV(display) && display->sagv.status != I915_SAGV_NOT_CONTROLLED;
}
@@ -135,7 +133,7 @@ static void intel_sagv_init(struct drm_i915_private *i915)
display->sagv.block_time_us = intel_sagv_block_time(i915);
drm_dbg_kms(display->drm, "SAGV supported: %s, original SAGV block time: %u us\n",
- str_yes_no(intel_has_sagv(i915)), display->sagv.block_time_us);
+ str_yes_no(intel_has_sagv(display)), display->sagv.block_time_us);
/* avoid overflow when adding with wm0 latency/etc. */
if (drm_WARN(display->drm, display->sagv.block_time_us > U16_MAX,
@@ -143,7 +141,7 @@ static void intel_sagv_init(struct drm_i915_private *i915)
display->sagv.block_time_us))
display->sagv.block_time_us = 0;
- if (!intel_has_sagv(i915))
+ if (!intel_has_sagv(display))
display->sagv.block_time_us = 0;
}
@@ -160,9 +158,10 @@ static void intel_sagv_init(struct drm_i915_private *i915)
*/
static void skl_sagv_enable(struct drm_i915_private *i915)
{
+ struct intel_display *display = &i915->display;
int ret;
- if (!intel_has_sagv(i915))
+ if (!intel_has_sagv(display))
return;
if (i915->display.sagv.status == I915_SAGV_ENABLED)
@@ -192,9 +191,10 @@ static void skl_sagv_enable(struct drm_i915_private *i915)
static void skl_sagv_disable(struct drm_i915_private *i915)
{
+ struct intel_display *display = &i915->display;
int ret;
- if (!intel_has_sagv(i915))
+ if (!intel_has_sagv(display))
return;
if (i915->display.sagv.status == I915_SAGV_DISABLED)
@@ -224,6 +224,7 @@ static void skl_sagv_disable(struct drm_i915_private *i915)
static void skl_sagv_pre_plane_update(struct intel_atomic_state *state)
{
+ struct intel_display *display = to_intel_display(state);
struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_bw_state *new_bw_state =
intel_atomic_get_new_bw_state(state);
@@ -231,12 +232,13 @@ static void skl_sagv_pre_plane_update(struct intel_atomic_state *state)
if (!new_bw_state)
return;
- if (!intel_can_enable_sagv(i915, new_bw_state))
+ if (!intel_can_enable_sagv(display, new_bw_state))
skl_sagv_disable(i915);
}
static void skl_sagv_post_plane_update(struct intel_atomic_state *state)
{
+ struct intel_display *display = to_intel_display(state);
struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_bw_state *new_bw_state =
intel_atomic_get_new_bw_state(state);
@@ -244,7 +246,7 @@ static void skl_sagv_post_plane_update(struct intel_atomic_state *state)
if (!new_bw_state)
return;
- if (intel_can_enable_sagv(i915, new_bw_state))
+ if (intel_can_enable_sagv(display, new_bw_state))
skl_sagv_enable(i915);
}
@@ -316,6 +318,7 @@ static void icl_sagv_post_plane_update(struct intel_atomic_state *state)
void intel_sagv_pre_plane_update(struct intel_atomic_state *state)
{
+ struct intel_display *display = to_intel_display(state);
struct drm_i915_private *i915 = to_i915(state->base.dev);
/*
@@ -325,7 +328,7 @@ void intel_sagv_pre_plane_update(struct intel_atomic_state *state)
* disabled in a BIOS, we are not even allowed to send a PCode request,
* as it will throw an error. So have to check it here.
*/
- if (!intel_has_sagv(i915))
+ if (!intel_has_sagv(display))
return;
if (DISPLAY_VER(i915) >= 11)
@@ -336,6 +339,7 @@ void intel_sagv_pre_plane_update(struct intel_atomic_state *state)
void intel_sagv_post_plane_update(struct intel_atomic_state *state)
{
+ struct intel_display *display = to_intel_display(state);
struct drm_i915_private *i915 = to_i915(state->base.dev);
/*
@@ -345,7 +349,7 @@ void intel_sagv_post_plane_update(struct intel_atomic_state *state)
* disabled in a BIOS, we are not even allowed to send a PCode request,
* as it will throw an error. So have to check it here.
*/
- if (!intel_has_sagv(i915))
+ if (!intel_has_sagv(display))
return;
if (DISPLAY_VER(i915) >= 11)
@@ -356,12 +360,13 @@ void intel_sagv_post_plane_update(struct intel_atomic_state *state)
static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
enum plane_id plane_id;
int max_level = INT_MAX;
- if (!intel_has_sagv(i915))
+ if (!intel_has_sagv(display))
return false;
if (!crtc_state->hw.active)
@@ -440,10 +445,10 @@ static bool intel_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state
return skl_crtc_can_enable_sagv(crtc_state);
}
-bool intel_can_enable_sagv(struct drm_i915_private *i915,
+bool intel_can_enable_sagv(struct intel_display *display,
const struct intel_bw_state *bw_state)
{
- if (DISPLAY_VER(i915) < 11 &&
+ if (DISPLAY_VER(display) < 11 &&
bw_state->active_pipes && !is_power_of_2(bw_state->active_pipes))
return false;
@@ -510,8 +515,8 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state)
return ret;
}
- if (intel_can_enable_sagv(i915, new_bw_state) !=
- intel_can_enable_sagv(i915, old_bw_state)) {
+ if (intel_can_enable_sagv(display, new_bw_state) !=
+ intel_can_enable_sagv(display, old_bw_state)) {
ret = intel_atomic_serialize_global_state(&new_bw_state->base);
if (ret)
return ret;
@@ -572,9 +577,10 @@ static unsigned int mbus_ddb_offset(struct drm_i915_private *i915, u8 slice_mask
return ddb.start;
}
-u32 skl_ddb_dbuf_slice_mask(struct drm_i915_private *i915,
+u32 skl_ddb_dbuf_slice_mask(struct intel_display *display,
const struct skl_ddb_entry *entry)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
int slice_size = intel_dbuf_slice_size(i915);
enum dbuf_slice start_slice, end_slice;
u8 slice_mask = 0;
@@ -740,6 +746,7 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
static unsigned int skl_wm_latency(struct drm_i915_private *i915, int level,
const struct skl_wm_params *wp)
{
+ struct intel_display *display = &i915->display;
unsigned int latency = i915->display.wm.skl_latency[level];
if (latency == 0)
@@ -750,7 +757,7 @@ static unsigned int skl_wm_latency(struct drm_i915_private *i915, int level,
* Display WA #1141: kbl,cfl
*/
if ((IS_KABYLAKE(i915) || IS_COFFEELAKE(i915) || IS_COMETLAKE(i915)) &&
- skl_watermark_ipc_enabled(i915))
+ skl_watermark_ipc_enabled(display))
latency += 4;
if (skl_needs_memory_bw_wa(i915) && wp && wp->x_tiled)
@@ -2116,11 +2123,12 @@ static void skl_compute_transition_wm(struct drm_i915_private *i915,
const struct skl_wm_level *wm0,
const struct skl_wm_params *wp)
{
+ struct intel_display *display = &i915->display;
u16 trans_min, trans_amount, trans_y_tile_min;
u16 wm0_blocks, trans_offset, blocks;
/* Transition WM don't make any sense if ipc is disabled */
- if (!skl_watermark_ipc_enabled(i915))
+ if (!skl_watermark_ipc_enabled(display))
return;
/*
@@ -3005,7 +3013,6 @@ void
intel_program_dpkgc_latency(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(display->drm);
struct intel_crtc *crtc;
struct intel_crtc_state *new_crtc_state;
u32 latency = LNL_PKG_C_LATENCY_MASK;
@@ -3031,7 +3038,7 @@ intel_program_dpkgc_latency(struct intel_atomic_state *state)
added_wake_time = DSB_EXE_TIME +
display->sagv.block_time_us;
- latency = skl_watermark_max_latency(i915, 1);
+ latency = skl_watermark_max_latency(display, 1);
/* Wa_22020432604 */
if ((DISPLAY_VER(display) == 20 || DISPLAY_VER(display) == 30) && !latency) {
@@ -3218,7 +3225,7 @@ static void skl_wm_get_hw_state(struct intel_display *display)
/* The slices actually used by the planes on the pipe */
dbuf_state->slices[pipe] =
- skl_ddb_dbuf_slice_mask(i915, &crtc_state->wm.skl.ddb);
+ skl_ddb_dbuf_slice_mask(display, &crtc_state->wm.skl.ddb);
drm_dbg_kms(display->drm,
"[CRTC:%d:%s] dbuf slices 0x%x, ddb (%d - %d), active pipes 0x%x, mbus joined: %s\n",
@@ -3231,18 +3238,18 @@ static void skl_wm_get_hw_state(struct intel_display *display)
dbuf_state->enabled_slices = display->dbuf.enabled_slices;
}
-bool skl_watermark_ipc_enabled(struct drm_i915_private *i915)
+bool skl_watermark_ipc_enabled(struct intel_display *display)
{
- return i915->display.wm.ipc_enabled;
+ return display->wm.ipc_enabled;
}
-void skl_watermark_ipc_update(struct drm_i915_private *i915)
+void skl_watermark_ipc_update(struct intel_display *display)
{
- if (!HAS_IPC(i915))
+ if (!HAS_IPC(display))
return;
- intel_de_rmw(i915, DISP_ARB_CTL2, DISP_IPC_ENABLE,
- skl_watermark_ipc_enabled(i915) ? DISP_IPC_ENABLE : 0);
+ intel_de_rmw(display, DISP_ARB_CTL2, DISP_IPC_ENABLE,
+ skl_watermark_ipc_enabled(display) ? DISP_IPC_ENABLE : 0);
}
static bool skl_watermark_ipc_can_enable(struct drm_i915_private *i915)
@@ -3260,14 +3267,16 @@ static bool skl_watermark_ipc_can_enable(struct drm_i915_private *i915)
return true;
}
-void skl_watermark_ipc_init(struct drm_i915_private *i915)
+void skl_watermark_ipc_init(struct intel_display *display)
{
- if (!HAS_IPC(i915))
+ struct drm_i915_private *i915 = to_i915(display->drm);
+
+ if (!HAS_IPC(display))
return;
- i915->display.wm.ipc_enabled = skl_watermark_ipc_can_enable(i915);
+ display->wm.ipc_enabled = skl_watermark_ipc_can_enable(i915);
- skl_watermark_ipc_update(i915);
+ skl_watermark_ipc_update(display);
}
static void
@@ -3423,9 +3432,8 @@ intel_atomic_get_dbuf_state(struct intel_atomic_state *state)
return to_intel_dbuf_state(dbuf_state);
}
-int intel_dbuf_init(struct drm_i915_private *i915)
+int intel_dbuf_init(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
struct intel_dbuf_state *dbuf_state;
dbuf_state = kzalloc(sizeof(*dbuf_state), GFP_KERNEL);
@@ -3547,10 +3555,9 @@ int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,
return intel_atomic_lock_global_state(&dbuf_state->base);
}
-void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915,
+void intel_dbuf_mdclk_cdclk_ratio_update(struct intel_display *display,
int ratio, bool joined_mbus)
{
- struct intel_display *display = &i915->display;
enum dbuf_slice slice;
if (!HAS_MBUS_JOINING(display))
@@ -3574,7 +3581,7 @@ void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915,
static void intel_dbuf_mdclk_min_tracker_update(struct intel_atomic_state *state)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
const struct intel_dbuf_state *old_dbuf_state =
intel_atomic_get_old_dbuf_state(state);
const struct intel_dbuf_state *new_dbuf_state =
@@ -3589,7 +3596,7 @@ static void intel_dbuf_mdclk_min_tracker_update(struct intel_atomic_state *state
mdclk_cdclk_ratio = new_dbuf_state->mdclk_cdclk_ratio;
}
- intel_dbuf_mdclk_cdclk_ratio_update(i915, mdclk_cdclk_ratio,
+ intel_dbuf_mdclk_cdclk_ratio_update(display, mdclk_cdclk_ratio,
new_dbuf_state->joined_mbus);
}
@@ -3771,7 +3778,7 @@ static void skl_mbus_sanitize(struct drm_i915_private *i915)
dbuf_state->active_pipes);
dbuf_state->joined_mbus = false;
- intel_dbuf_mdclk_cdclk_ratio_update(i915,
+ intel_dbuf_mdclk_cdclk_ratio_update(display,
dbuf_state->mdclk_cdclk_ratio,
dbuf_state->joined_mbus);
pipe_mbus_dbox_ctl_update(i915, dbuf_state);
@@ -4029,21 +4036,24 @@ static const struct intel_wm_funcs skl_wm_funcs = {
.sanitize = skl_wm_sanitize,
};
-void skl_wm_init(struct drm_i915_private *i915)
+void skl_wm_init(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
+
intel_sagv_init(i915);
skl_setup_wm_latency(i915);
- i915->display.funcs.wm = &skl_wm_funcs;
+ display->funcs.wm = &skl_wm_funcs;
}
static int skl_watermark_ipc_status_show(struct seq_file *m, void *data)
{
struct drm_i915_private *i915 = m->private;
+ struct intel_display *display = &i915->display;
seq_printf(m, "Isochronous Priority Control: %s\n",
- str_yes_no(skl_watermark_ipc_enabled(i915)));
+ str_yes_no(skl_watermark_ipc_enabled(display)));
return 0;
}
@@ -4069,11 +4079,11 @@ static ssize_t skl_watermark_ipc_status_write(struct file *file,
return ret;
with_intel_display_rpm(display) {
- if (!skl_watermark_ipc_enabled(i915) && enable)
+ if (!skl_watermark_ipc_enabled(display) && enable)
drm_info(display->drm,
"Enabling IPC: WM will be proper only after next commit\n");
display->wm.ipc_enabled = enable;
- skl_watermark_ipc_update(i915);
+ skl_watermark_ipc_update(display);
}
return len;
@@ -4091,6 +4101,7 @@ static const struct file_operations skl_watermark_ipc_status_fops = {
static int intel_sagv_status_show(struct seq_file *m, void *unused)
{
struct drm_i915_private *i915 = m->private;
+ struct intel_display *display = &i915->display;
static const char * const sagv_status[] = {
[I915_SAGV_UNKNOWN] = "unknown",
[I915_SAGV_DISABLED] = "disabled",
@@ -4098,7 +4109,7 @@ static int intel_sagv_status_show(struct seq_file *m, void *unused)
[I915_SAGV_NOT_CONTROLLED] = "not controlled",
};
- seq_printf(m, "SAGV available: %s\n", str_yes_no(intel_has_sagv(i915)));
+ seq_printf(m, "SAGV available: %s\n", str_yes_no(intel_has_sagv(display)));
seq_printf(m, "SAGV modparam: %s\n",
str_enabled_disabled(i915->display.params.enable_sagv));
seq_printf(m, "SAGV status: %s\n", sagv_status[i915->display.sagv.status]);
@@ -4109,9 +4120,9 @@ static int intel_sagv_status_show(struct seq_file *m, void *unused)
DEFINE_SHOW_ATTRIBUTE(intel_sagv_status);
-void skl_watermark_debugfs_register(struct drm_i915_private *i915)
+void skl_watermark_debugfs_register(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
struct drm_minor *minor = display->drm->primary;
if (HAS_IPC(display))
@@ -4123,11 +4134,12 @@ void skl_watermark_debugfs_register(struct drm_i915_private *i915)
&intel_sagv_status_fops);
}
-unsigned int skl_watermark_max_latency(struct drm_i915_private *i915, int initial_wm_level)
+unsigned int skl_watermark_max_latency(struct intel_display *display, int initial_wm_level)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
int level;
- for (level = i915->display.wm.num_levels - 1; level >= initial_wm_level; level--) {
+ for (level = display->wm.num_levels - 1; level >= initial_wm_level; level--) {
unsigned int latency = skl_wm_latency(i915, level, NULL);
if (latency)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h
index d9cff6c54310..41672fe1ec5e 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.h
+++ b/drivers/gpu/drm/i915/display/skl_watermark.h
@@ -12,7 +12,6 @@
#include "intel_global_state.h"
#include "intel_wm_types.h"
-struct drm_i915_private;
struct intel_atomic_state;
struct intel_bw_state;
struct intel_crtc;
@@ -27,11 +26,11 @@ u8 intel_enabled_dbuf_slices_mask(struct intel_display *display);
void intel_sagv_pre_plane_update(struct intel_atomic_state *state);
void intel_sagv_post_plane_update(struct intel_atomic_state *state);
-bool intel_can_enable_sagv(struct drm_i915_private *i915,
+bool intel_can_enable_sagv(struct intel_display *display,
const struct intel_bw_state *bw_state);
-bool intel_has_sagv(struct drm_i915_private *i915);
+bool intel_has_sagv(struct intel_display *display);
-u32 skl_ddb_dbuf_slice_mask(struct drm_i915_private *i915,
+u32 skl_ddb_dbuf_slice_mask(struct intel_display *display,
const struct skl_ddb_entry *entry);
bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
@@ -45,14 +44,14 @@ void skl_wm_crtc_disable_noatomic(struct intel_crtc *crtc);
void skl_wm_plane_disable_noatomic(struct intel_crtc *crtc,
struct intel_plane *plane);
-void skl_watermark_ipc_init(struct drm_i915_private *i915);
-void skl_watermark_ipc_update(struct drm_i915_private *i915);
-bool skl_watermark_ipc_enabled(struct drm_i915_private *i915);
-void skl_watermark_debugfs_register(struct drm_i915_private *i915);
+void skl_watermark_ipc_init(struct intel_display *display);
+void skl_watermark_ipc_update(struct intel_display *display);
+bool skl_watermark_ipc_enabled(struct intel_display *display);
+void skl_watermark_debugfs_register(struct intel_display *display);
-unsigned int skl_watermark_max_latency(struct drm_i915_private *i915,
+unsigned int skl_watermark_max_latency(struct intel_display *display,
int initial_wm_level);
-void skl_wm_init(struct drm_i915_private *i915);
+void skl_wm_init(struct intel_display *display);
const struct skl_wm_level *skl_plane_wm_level(const struct skl_pipe_wm *pipe_wm,
enum plane_id plane_id,
@@ -86,13 +85,13 @@ intel_atomic_get_dbuf_state(struct intel_atomic_state *state);
#define intel_atomic_get_new_dbuf_state(state) \
to_intel_dbuf_state(intel_atomic_get_new_global_obj_state(state, &to_intel_display(state)->dbuf.obj))
-int intel_dbuf_init(struct drm_i915_private *i915);
+int intel_dbuf_init(struct intel_display *display);
int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,
int ratio);
void intel_dbuf_pre_plane_update(struct intel_atomic_state *state);
void intel_dbuf_post_plane_update(struct intel_atomic_state *state);
-void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915,
+void intel_dbuf_mdclk_cdclk_ratio_update(struct intel_display *display,
int ratio, bool joined_mbus);
void intel_dbuf_mbus_pre_ddb_update(struct intel_atomic_state *state);
void intel_dbuf_mbus_post_ddb_update(struct intel_atomic_state *state);
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index d78de7f620dd..f5262b8ad237 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1647,7 +1647,7 @@ static int intel_runtime_resume(struct device *kdev)
intel_hpd_poll_disable(display);
}
- skl_watermark_ipc_update(dev_priv);
+ skl_watermark_ipc_update(display);
enable_rpm_wakeref_asserts(rpm);
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 23937ed3b33d..20c3bcd953b7 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -522,7 +522,7 @@ void xe_display_pm_runtime_resume(struct xe_device *xe)
intel_hpd_init(display);
intel_hpd_poll_disable(display);
- skl_watermark_ipc_update(xe);
+ skl_watermark_ipc_update(display);
}
--
2.39.5
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 4/7] drm/i915/wm: convert skl_watermarks.c internally to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
` (2 preceding siblings ...)
2025-04-03 9:11 ` [PATCH 3/7] drm/i915/wm: convert skl_watermark.h external interfaces " Jani Nikula
@ 2025-04-03 9:11 ` Jani Nikula
2025-04-03 9:11 ` [PATCH 5/7] drm/i915/wm: convert intel_wm.h external interfaces " Jani Nikula
` (10 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2025-04-03 9:11 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of skl_watermarks.c to struct
intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 539 +++++++++----------
1 file changed, 251 insertions(+), 288 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 758d59965d33..16c96f6c8842 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -35,7 +35,7 @@
*/
#define DSB_EXE_TIME 100
-static void skl_sagv_disable(struct drm_i915_private *i915);
+static void skl_sagv_disable(struct intel_display *display);
/* Stores plane specific WM parameters */
struct skl_wm_params {
@@ -70,9 +70,9 @@ u8 intel_enabled_dbuf_slices_mask(struct intel_display *display)
* FIXME: We still don't have the proper code detect if we need to apply the WA,
* so assume we'll always need it in order to avoid underruns.
*/
-static bool skl_needs_memory_bw_wa(struct drm_i915_private *i915)
+static bool skl_needs_memory_bw_wa(struct intel_display *display)
{
- return DISPLAY_VER(i915) == 9;
+ return DISPLAY_VER(display) == 9;
}
bool
@@ -82,9 +82,9 @@ intel_has_sagv(struct intel_display *display)
}
static u32
-intel_sagv_block_time(struct drm_i915_private *i915)
+intel_sagv_block_time(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
if (DISPLAY_VER(display) >= 14) {
u32 val;
@@ -114,10 +114,8 @@ intel_sagv_block_time(struct drm_i915_private *i915)
}
}
-static void intel_sagv_init(struct drm_i915_private *i915)
+static void intel_sagv_init(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
-
if (!HAS_SAGV(display))
display->sagv.status = I915_SAGV_NOT_CONTROLLED;
@@ -126,11 +124,11 @@ static void intel_sagv_init(struct drm_i915_private *i915)
* For icl+ this was already determined by intel_bw_init_hw().
*/
if (DISPLAY_VER(display) < 11)
- skl_sagv_disable(i915);
+ skl_sagv_disable(display);
drm_WARN_ON(display->drm, display->sagv.status == I915_SAGV_UNKNOWN);
- display->sagv.block_time_us = intel_sagv_block_time(i915);
+ display->sagv.block_time_us = intel_sagv_block_time(display);
drm_dbg_kms(display->drm, "SAGV supported: %s, original SAGV block time: %u us\n",
str_yes_no(intel_has_sagv(display)), display->sagv.block_time_us);
@@ -156,18 +154,18 @@ static void intel_sagv_init(struct drm_i915_private *i915)
* - All planes can enable watermarks for latencies >= SAGV engine block time
* - We're not using an interlaced display configuration
*/
-static void skl_sagv_enable(struct drm_i915_private *i915)
+static void skl_sagv_enable(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
int ret;
if (!intel_has_sagv(display))
return;
- if (i915->display.sagv.status == I915_SAGV_ENABLED)
+ if (display->sagv.status == I915_SAGV_ENABLED)
return;
- drm_dbg_kms(&i915->drm, "Enabling SAGV\n");
+ drm_dbg_kms(display->drm, "Enabling SAGV\n");
ret = snb_pcode_write(&i915->uncore, GEN9_PCODE_SAGV_CONTROL,
GEN9_SAGV_ENABLE);
@@ -177,30 +175,30 @@ static void skl_sagv_enable(struct drm_i915_private *i915)
* Some skl systems, pre-release machines in particular,
* don't actually have SAGV.
*/
- if (IS_SKYLAKE(i915) && ret == -ENXIO) {
- drm_dbg(&i915->drm, "No SAGV found on system, ignoring\n");
- i915->display.sagv.status = I915_SAGV_NOT_CONTROLLED;
+ if (display->platform.skylake && ret == -ENXIO) {
+ drm_dbg(display->drm, "No SAGV found on system, ignoring\n");
+ display->sagv.status = I915_SAGV_NOT_CONTROLLED;
return;
} else if (ret < 0) {
- drm_err(&i915->drm, "Failed to enable SAGV\n");
+ drm_err(display->drm, "Failed to enable SAGV\n");
return;
}
- i915->display.sagv.status = I915_SAGV_ENABLED;
+ display->sagv.status = I915_SAGV_ENABLED;
}
-static void skl_sagv_disable(struct drm_i915_private *i915)
+static void skl_sagv_disable(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
int ret;
if (!intel_has_sagv(display))
return;
- if (i915->display.sagv.status == I915_SAGV_DISABLED)
+ if (display->sagv.status == I915_SAGV_DISABLED)
return;
- drm_dbg_kms(&i915->drm, "Disabling SAGV\n");
+ drm_dbg_kms(display->drm, "Disabling SAGV\n");
/* bspec says to keep retrying for at least 1 ms */
ret = skl_pcode_request(&i915->uncore, GEN9_PCODE_SAGV_CONTROL,
GEN9_SAGV_DISABLE,
@@ -210,22 +208,21 @@ static void skl_sagv_disable(struct drm_i915_private *i915)
* Some skl systems, pre-release machines in particular,
* don't actually have SAGV.
*/
- if (IS_SKYLAKE(i915) && ret == -ENXIO) {
- drm_dbg(&i915->drm, "No SAGV found on system, ignoring\n");
- i915->display.sagv.status = I915_SAGV_NOT_CONTROLLED;
+ if (display->platform.skylake && ret == -ENXIO) {
+ drm_dbg(display->drm, "No SAGV found on system, ignoring\n");
+ display->sagv.status = I915_SAGV_NOT_CONTROLLED;
return;
} else if (ret < 0) {
- drm_err(&i915->drm, "Failed to disable SAGV (%d)\n", ret);
+ drm_err(display->drm, "Failed to disable SAGV (%d)\n", ret);
return;
}
- i915->display.sagv.status = I915_SAGV_DISABLED;
+ display->sagv.status = I915_SAGV_DISABLED;
}
static void skl_sagv_pre_plane_update(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_bw_state *new_bw_state =
intel_atomic_get_new_bw_state(state);
@@ -233,13 +230,12 @@ static void skl_sagv_pre_plane_update(struct intel_atomic_state *state)
return;
if (!intel_can_enable_sagv(display, new_bw_state))
- skl_sagv_disable(i915);
+ skl_sagv_disable(display);
}
static void skl_sagv_post_plane_update(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_bw_state *new_bw_state =
intel_atomic_get_new_bw_state(state);
@@ -247,13 +243,12 @@ static void skl_sagv_post_plane_update(struct intel_atomic_state *state)
return;
if (intel_can_enable_sagv(display, new_bw_state))
- skl_sagv_enable(i915);
+ skl_sagv_enable(display);
}
static void icl_sagv_pre_plane_update(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(display->drm);
const struct intel_bw_state *old_bw_state =
intel_atomic_get_old_bw_state(state);
const struct intel_bw_state *new_bw_state =
@@ -271,7 +266,7 @@ static void icl_sagv_pre_plane_update(struct intel_atomic_state *state)
WARN_ON(!new_bw_state->base.changed);
- drm_dbg_kms(&i915->drm, "Restricting QGV points: 0x%x -> 0x%x\n",
+ drm_dbg_kms(display->drm, "Restricting QGV points: 0x%x -> 0x%x\n",
old_mask, new_mask);
/*
@@ -286,7 +281,6 @@ static void icl_sagv_pre_plane_update(struct intel_atomic_state *state)
static void icl_sagv_post_plane_update(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(display->drm);
const struct intel_bw_state *old_bw_state =
intel_atomic_get_old_bw_state(state);
const struct intel_bw_state *new_bw_state =
@@ -304,7 +298,7 @@ static void icl_sagv_post_plane_update(struct intel_atomic_state *state)
WARN_ON(!new_bw_state->base.changed);
- drm_dbg_kms(&i915->drm, "Relaxing QGV points: 0x%x -> 0x%x\n",
+ drm_dbg_kms(display->drm, "Relaxing QGV points: 0x%x -> 0x%x\n",
old_mask, new_mask);
/*
@@ -319,7 +313,6 @@ static void icl_sagv_post_plane_update(struct intel_atomic_state *state)
void intel_sagv_pre_plane_update(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(state->base.dev);
/*
* Just return if we can't control SAGV or don't have it.
@@ -331,7 +324,7 @@ void intel_sagv_pre_plane_update(struct intel_atomic_state *state)
if (!intel_has_sagv(display))
return;
- if (DISPLAY_VER(i915) >= 11)
+ if (DISPLAY_VER(display) >= 11)
icl_sagv_pre_plane_update(state);
else
skl_sagv_pre_plane_update(state);
@@ -340,7 +333,6 @@ void intel_sagv_pre_plane_update(struct intel_atomic_state *state)
void intel_sagv_post_plane_update(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(state->base.dev);
/*
* Just return if we can't control SAGV or don't have it.
@@ -352,7 +344,7 @@ void intel_sagv_post_plane_update(struct intel_atomic_state *state)
if (!intel_has_sagv(display))
return;
- if (DISPLAY_VER(i915) >= 11)
+ if (DISPLAY_VER(display) >= 11)
icl_sagv_post_plane_update(state);
else
skl_sagv_post_plane_update(state);
@@ -362,7 +354,6 @@ static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
enum plane_id plane_id;
int max_level = INT_MAX;
@@ -385,7 +376,7 @@ static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
continue;
/* Find the highest enabled wm level for this plane */
- for (level = i915->display.wm.num_levels - 1;
+ for (level = display->wm.num_levels - 1;
!wm->wm[level].enable; --level)
{ }
@@ -433,13 +424,12 @@ static bool tgl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
static bool intel_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc_state);
- if (!i915->display.params.enable_sagv)
+ if (!display->params.enable_sagv)
return false;
- if (DISPLAY_VER(i915) >= 12)
+ if (DISPLAY_VER(display) >= 12)
return tgl_crtc_can_enable_sagv(crtc_state);
else
return skl_crtc_can_enable_sagv(crtc_state);
@@ -458,7 +448,6 @@ bool intel_can_enable_sagv(struct intel_display *display,
static int intel_compute_sagv_mask(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(state->base.dev);
int ret;
struct intel_crtc *crtc;
struct intel_crtc_state *new_crtc_state;
@@ -494,7 +483,7 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state)
* normal (ie. non-SAGV) watermarks.
*/
pipe_wm->use_sagv_wm = !HAS_HW_SAGV_WM(display) &&
- DISPLAY_VER(i915) >= 12 &&
+ DISPLAY_VER(display) >= 12 &&
intel_crtc_can_enable_sagv(new_crtc_state);
if (intel_crtc_can_enable_sagv(new_crtc_state))
@@ -538,17 +527,17 @@ static u16 skl_ddb_entry_init(struct skl_ddb_entry *entry,
return end;
}
-static int intel_dbuf_slice_size(struct drm_i915_private *i915)
+static int intel_dbuf_slice_size(struct intel_display *display)
{
- return DISPLAY_INFO(i915)->dbuf.size /
- hweight8(DISPLAY_INFO(i915)->dbuf.slice_mask);
+ return DISPLAY_INFO(display)->dbuf.size /
+ hweight8(DISPLAY_INFO(display)->dbuf.slice_mask);
}
static void
-skl_ddb_entry_for_slices(struct drm_i915_private *i915, u8 slice_mask,
+skl_ddb_entry_for_slices(struct intel_display *display, u8 slice_mask,
struct skl_ddb_entry *ddb)
{
- int slice_size = intel_dbuf_slice_size(i915);
+ int slice_size = intel_dbuf_slice_size(display);
if (!slice_mask) {
ddb->start = 0;
@@ -560,10 +549,10 @@ skl_ddb_entry_for_slices(struct drm_i915_private *i915, u8 slice_mask,
ddb->end = fls(slice_mask) * slice_size;
WARN_ON(ddb->start >= ddb->end);
- WARN_ON(ddb->end > DISPLAY_INFO(i915)->dbuf.size);
+ WARN_ON(ddb->end > DISPLAY_INFO(display)->dbuf.size);
}
-static unsigned int mbus_ddb_offset(struct drm_i915_private *i915, u8 slice_mask)
+static unsigned int mbus_ddb_offset(struct intel_display *display, u8 slice_mask)
{
struct skl_ddb_entry ddb;
@@ -572,7 +561,7 @@ static unsigned int mbus_ddb_offset(struct drm_i915_private *i915, u8 slice_mask
else if (slice_mask & (BIT(DBUF_S3) | BIT(DBUF_S4)))
slice_mask = BIT(DBUF_S3);
- skl_ddb_entry_for_slices(i915, slice_mask, &ddb);
+ skl_ddb_entry_for_slices(display, slice_mask, &ddb);
return ddb.start;
}
@@ -580,8 +569,7 @@ static unsigned int mbus_ddb_offset(struct drm_i915_private *i915, u8 slice_mask
u32 skl_ddb_dbuf_slice_mask(struct intel_display *display,
const struct skl_ddb_entry *entry)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
- int slice_size = intel_dbuf_slice_size(i915);
+ int slice_size = intel_dbuf_slice_size(display);
enum dbuf_slice start_slice, end_slice;
u8 slice_mask = 0;
@@ -627,15 +615,14 @@ static void intel_crtc_dbuf_weights(const struct intel_dbuf_state *dbuf_state,
unsigned int *weight_end,
unsigned int *weight_total)
{
- struct drm_i915_private *i915 =
- to_i915(dbuf_state->base.state->base.dev);
+ struct intel_display *display = to_intel_display(dbuf_state->base.state->base.dev);
enum pipe pipe;
*weight_start = 0;
*weight_end = 0;
*weight_total = 0;
- for_each_pipe(i915, pipe) {
+ for_each_pipe(display, pipe) {
int weight = dbuf_state->weight[pipe];
/*
@@ -661,7 +648,7 @@ static void intel_crtc_dbuf_weights(const struct intel_dbuf_state *dbuf_state,
static int
skl_crtc_allocate_ddb(struct intel_atomic_state *state, struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
unsigned int weight_total, weight_start, weight_end;
const struct intel_dbuf_state *old_dbuf_state =
intel_atomic_get_old_dbuf_state(state);
@@ -683,8 +670,8 @@ skl_crtc_allocate_ddb(struct intel_atomic_state *state, struct intel_crtc *crtc)
dbuf_slice_mask = new_dbuf_state->slices[pipe];
- skl_ddb_entry_for_slices(i915, dbuf_slice_mask, &ddb_slices);
- mbus_offset = mbus_ddb_offset(i915, dbuf_slice_mask);
+ skl_ddb_entry_for_slices(display, dbuf_slice_mask, &ddb_slices);
+ mbus_offset = mbus_ddb_offset(display, dbuf_slice_mask);
ddb_range_size = skl_ddb_entry_size(&ddb_slices);
intel_crtc_dbuf_weights(new_dbuf_state, pipe,
@@ -718,7 +705,7 @@ skl_crtc_allocate_ddb(struct intel_atomic_state *state, struct intel_crtc *crtc)
crtc_state->wm.skl.ddb.start = mbus_offset + new_dbuf_state->ddb[pipe].start;
crtc_state->wm.skl.ddb.end = mbus_offset + new_dbuf_state->ddb[pipe].end;
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"[CRTC:%d:%s] dbuf slices 0x%x -> 0x%x, ddb (%d - %d) -> (%d - %d), active pipes 0x%x -> 0x%x\n",
crtc->base.base.id, crtc->base.name,
old_dbuf_state->slices[pipe], new_dbuf_state->slices[pipe],
@@ -743,11 +730,10 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
const struct skl_wm_level *result_prev,
struct skl_wm_level *result /* out */);
-static unsigned int skl_wm_latency(struct drm_i915_private *i915, int level,
+static unsigned int skl_wm_latency(struct intel_display *display, int level,
const struct skl_wm_params *wp)
{
- struct intel_display *display = &i915->display;
- unsigned int latency = i915->display.wm.skl_latency[level];
+ unsigned int latency = display->wm.skl_latency[level];
if (latency == 0)
return 0;
@@ -756,11 +742,11 @@ static unsigned int skl_wm_latency(struct drm_i915_private *i915, int level,
* WaIncreaseLatencyIPCEnabled: kbl,cfl
* Display WA #1141: kbl,cfl
*/
- if ((IS_KABYLAKE(i915) || IS_COFFEELAKE(i915) || IS_COMETLAKE(i915)) &&
- skl_watermark_ipc_enabled(display))
+ if ((display->platform.kabylake || display->platform.coffeelake ||
+ display->platform.cometlake) && skl_watermark_ipc_enabled(display))
latency += 4;
- if (skl_needs_memory_bw_wa(i915) && wp && wp->x_tiled)
+ if (skl_needs_memory_bw_wa(display) && wp && wp->x_tiled)
latency += 15;
return latency;
@@ -770,8 +756,8 @@ static unsigned int
skl_cursor_allocation(const struct intel_crtc_state *crtc_state,
int num_active)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_plane *plane = to_intel_plane(crtc_state->uapi.crtc->cursor);
- struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
struct skl_wm_level wm = {};
int ret, min_ddb_alloc = 0;
struct skl_wm_params wp;
@@ -782,10 +768,10 @@ skl_cursor_allocation(const struct intel_crtc_state *crtc_state,
DRM_FORMAT_MOD_LINEAR,
DRM_MODE_ROTATE_0,
crtc_state->pixel_rate, &wp, 0, 0);
- drm_WARN_ON(&i915->drm, ret);
+ drm_WARN_ON(display->drm, ret);
- for (level = 0; level < i915->display.wm.num_levels; level++) {
- unsigned int latency = skl_wm_latency(i915, level, &wp);
+ for (level = 0; level < display->wm.num_levels; level++) {
+ unsigned int latency = skl_wm_latency(display, level, &wp);
skl_compute_plane_wm(crtc_state, plane, level, latency, &wp, &wm, &wm);
if (wm.min_ddb_alloc == U16_MAX)
@@ -807,14 +793,13 @@ static void skl_ddb_entry_init_from_hw(struct skl_ddb_entry *entry, u32 reg)
}
static void
-skl_ddb_get_hw_plane_state(struct drm_i915_private *i915,
+skl_ddb_get_hw_plane_state(struct intel_display *display,
const enum pipe pipe,
const enum plane_id plane_id,
struct skl_ddb_entry *ddb,
struct skl_ddb_entry *ddb_y,
u16 *min_ddb, u16 *interim_ddb)
{
- struct intel_display *display = &i915->display;
u32 val;
/* Cursor doesn't support NV12/planar, so no extra calculation needed */
@@ -847,7 +832,6 @@ static void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc,
u16 *min_ddb, u16 *interim_ddb)
{
struct intel_display *display = to_intel_display(crtc);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
enum intel_display_power_domain power_domain;
enum pipe pipe = crtc->pipe;
intel_wakeref_t wakeref;
@@ -859,7 +843,7 @@ static void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc,
return;
for_each_plane_id_on_crtc(crtc, plane_id)
- skl_ddb_get_hw_plane_state(i915, pipe,
+ skl_ddb_get_hw_plane_state(display, pipe,
plane_id,
&ddb[plane_id],
&ddb_y[plane_id],
@@ -1377,16 +1361,16 @@ static u8 dg2_compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbu
static u8 skl_compute_dbuf_slices(struct intel_crtc *crtc, u8 active_pipes, bool join_mbus)
{
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
enum pipe pipe = crtc->pipe;
- if (IS_DG2(i915))
+ if (display->platform.dg2)
return dg2_compute_dbuf_slices(pipe, active_pipes, join_mbus);
- else if (DISPLAY_VER(i915) >= 13)
+ else if (DISPLAY_VER(display) >= 13)
return adlp_compute_dbuf_slices(pipe, active_pipes, join_mbus);
- else if (DISPLAY_VER(i915) == 12)
+ else if (DISPLAY_VER(display) == 12)
return tgl_compute_dbuf_slices(pipe, active_pipes, join_mbus);
- else if (DISPLAY_VER(i915) == 11)
+ else if (DISPLAY_VER(display) == 11)
return icl_compute_dbuf_slices(pipe, active_pipes, join_mbus);
/*
* For anything else just return one slice yet.
@@ -1426,8 +1410,8 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *crtc_state,
static u64
skl_total_relative_data_rate(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
enum plane_id plane_id;
u64 data_rate = 0;
@@ -1437,7 +1421,7 @@ skl_total_relative_data_rate(const struct intel_crtc_state *crtc_state)
data_rate += crtc_state->rel_data_rate[plane_id];
- if (DISPLAY_VER(i915) < 11)
+ if (DISPLAY_VER(display) < 11)
data_rate += crtc_state->rel_data_rate_y[plane_id];
}
@@ -1499,7 +1483,7 @@ skl_check_nv12_wm_level(struct skl_wm_level *wm, struct skl_wm_level *uv_wm,
}
}
-static bool skl_need_wm_copy_wa(struct drm_i915_private *i915, int level,
+static bool skl_need_wm_copy_wa(struct intel_display *display, int level,
const struct skl_plane_wm *wm)
{
/*
@@ -1553,7 +1537,6 @@ static int
skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
const struct intel_dbuf_state *dbuf_state =
@@ -1595,7 +1578,7 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
* Find the highest watermark level for which we can satisfy the block
* requirement of active planes.
*/
- for (level = i915->display.wm.num_levels - 1; level >= 0; level--) {
+ for (level = display->wm.num_levels - 1; level >= 0; level--) {
blocks = 0;
for_each_plane_id_on_crtc(crtc, plane_id) {
const struct skl_plane_wm *wm =
@@ -1606,7 +1589,7 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
&crtc_state->wm.skl.plane_ddb[plane_id];
if (wm->wm[level].min_ddb_alloc > skl_ddb_entry_size(ddb)) {
- drm_WARN_ON(&i915->drm,
+ drm_WARN_ON(display->drm,
wm->wm[level].min_ddb_alloc != U16_MAX);
blocks = U32_MAX;
break;
@@ -1625,9 +1608,9 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
}
if (level < 0) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"Requested display configuration exceeds system DDB limitations");
- drm_dbg_kms(&i915->drm, "minimum required %d/%d\n",
+ drm_dbg_kms(display->drm, "minimum required %d/%d\n",
blocks, iter.size);
return -EINVAL;
}
@@ -1655,7 +1638,7 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
if (plane_id == PLANE_CURSOR)
continue;
- if (DISPLAY_VER(i915) < 11 &&
+ if (DISPLAY_VER(display) < 11 &&
crtc_state->nv12_planes & BIT(plane_id)) {
skl_allocate_plane_ddb(&iter, ddb_y, &wm->wm[level],
crtc_state->rel_data_rate_y[plane_id]);
@@ -1671,7 +1654,7 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
*interim_ddb = wm->sagv.wm0.min_ddb_alloc;
}
}
- drm_WARN_ON(&i915->drm, iter.size != 0 || iter.data_rate != 0);
+ drm_WARN_ON(display->drm, iter.size != 0 || iter.data_rate != 0);
/*
* When we calculated watermark values we didn't know how high
@@ -1679,7 +1662,7 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
* all levels as "enabled." Go back now and disable the ones
* that aren't actually possible.
*/
- for (level++; level < i915->display.wm.num_levels; level++) {
+ for (level++; level < display->wm.num_levels; level++) {
for_each_plane_id_on_crtc(crtc, plane_id) {
const struct skl_ddb_entry *ddb =
&crtc_state->wm.skl.plane_ddb[plane_id];
@@ -1688,7 +1671,7 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
struct skl_plane_wm *wm =
&crtc_state->wm.skl.optimal.planes[plane_id];
- if (DISPLAY_VER(i915) < 11 &&
+ if (DISPLAY_VER(display) < 11 &&
crtc_state->nv12_planes & BIT(plane_id))
skl_check_nv12_wm_level(&wm->wm[level],
&wm->uv_wm[level],
@@ -1696,7 +1679,7 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
else
skl_check_wm_level(&wm->wm[level], ddb);
- if (skl_need_wm_copy_wa(i915, level, wm)) {
+ if (skl_need_wm_copy_wa(display, level, wm)) {
wm->wm[level].blocks = wm->wm[level - 1].blocks;
wm->wm[level].lines = wm->wm[level - 1].lines;
wm->wm[level].ignore_lines = wm->wm[level - 1].ignore_lines;
@@ -1718,7 +1701,7 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
struct skl_plane_wm *wm =
&crtc_state->wm.skl.optimal.planes[plane_id];
- if (DISPLAY_VER(i915) < 11 &&
+ if (DISPLAY_VER(display) < 11 &&
crtc_state->nv12_planes & BIT(plane_id)) {
skl_check_wm_level(&wm->trans_wm, ddb_y);
} else {
@@ -1744,7 +1727,7 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
* 2xcdclk is 1350 MHz and the pixel rate should never exceed that.
*/
static uint_fixed_16_16_t
-skl_wm_method1(const struct drm_i915_private *i915, u32 pixel_rate,
+skl_wm_method1(struct intel_display *display, u32 pixel_rate,
u8 cpp, u32 latency, u32 dbuf_block_size)
{
u32 wm_intermediate_val;
@@ -1756,7 +1739,7 @@ skl_wm_method1(const struct drm_i915_private *i915, u32 pixel_rate,
wm_intermediate_val = latency * pixel_rate * cpp;
ret = div_fixed16(wm_intermediate_val, 1000 * dbuf_block_size);
- if (DISPLAY_VER(i915) >= 10)
+ if (DISPLAY_VER(display) >= 10)
ret = add_fixed16_u32(ret, 1);
return ret;
@@ -1782,7 +1765,7 @@ skl_wm_method2(u32 pixel_rate, u32 pipe_htotal, u32 latency,
static uint_fixed_16_16_t
intel_get_linetime_us(const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(crtc_state);
u32 pixel_rate;
u32 crtc_htotal;
uint_fixed_16_16_t linetime_us;
@@ -1792,7 +1775,7 @@ intel_get_linetime_us(const struct intel_crtc_state *crtc_state)
pixel_rate = crtc_state->pixel_rate;
- if (drm_WARN_ON(&i915->drm, pixel_rate == 0))
+ if (drm_WARN_ON(display->drm, pixel_rate == 0))
return u32_to_fixed16(0);
crtc_htotal = crtc_state->hw.pipe_mode.crtc_htotal;
@@ -1808,15 +1791,13 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
u32 plane_pixel_rate, struct skl_wm_params *wp,
int color_plane, unsigned int pan_x)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct intel_display *display = to_intel_display(crtc_state);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
u32 interm_pbpl;
/* only planar format has two planes */
if (color_plane == 1 &&
!intel_format_info_is_yuv_semiplanar(format, modifier)) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"Non planar format have single plane\n");
return -EINVAL;
}
@@ -1834,7 +1815,7 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
wp->cpp = format->cpp[color_plane];
wp->plane_pixel_rate = plane_pixel_rate;
- if (DISPLAY_VER(i915) >= 11 &&
+ if (DISPLAY_VER(display) >= 11 &&
modifier == I915_FORMAT_MOD_Yf_TILED && wp->cpp == 1)
wp->dbuf_block_size = 256;
else
@@ -1859,7 +1840,7 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
wp->y_min_scanlines = 4;
}
- if (skl_needs_memory_bw_wa(i915))
+ if (skl_needs_memory_bw_wa(display))
wp->y_min_scanlines *= 2;
wp->plane_bytes_per_line = wp->width * wp->cpp;
@@ -1870,7 +1851,7 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
if (DISPLAY_VER(display) >= 30)
interm_pbpl += (pan_x != 0);
- else if (DISPLAY_VER(i915) >= 10)
+ else if (DISPLAY_VER(display) >= 10)
interm_pbpl++;
wp->plane_blocks_per_line = div_fixed16(interm_pbpl,
@@ -1879,7 +1860,7 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
interm_pbpl = DIV_ROUND_UP(wp->plane_bytes_per_line,
wp->dbuf_block_size);
- if (!wp->x_tiled || DISPLAY_VER(i915) >= 10)
+ if (!wp->x_tiled || DISPLAY_VER(display) >= 10)
interm_pbpl++;
wp->plane_blocks_per_line = u32_to_fixed16(interm_pbpl);
@@ -1916,18 +1897,18 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *crtc_state,
plane_state->uapi.src.x1);
}
-static bool skl_wm_has_lines(struct drm_i915_private *i915, int level)
+static bool skl_wm_has_lines(struct intel_display *display, int level)
{
- if (DISPLAY_VER(i915) >= 10)
+ if (DISPLAY_VER(display) >= 10)
return true;
/* The number of lines are ignored for the level 0 watermark. */
return level > 0;
}
-static int skl_wm_max_lines(struct drm_i915_private *i915)
+static int skl_wm_max_lines(struct intel_display *display)
{
- if (DISPLAY_VER(i915) >= 13)
+ if (DISPLAY_VER(display) >= 13)
return 255;
else
return 31;
@@ -1948,7 +1929,7 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
const struct skl_wm_level *result_prev,
struct skl_wm_level *result /* out */)
{
- struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(crtc_state);
uint_fixed_16_16_t method1, method2;
uint_fixed_16_16_t selected_result;
u32 blocks, lines, min_ddb_alloc = 0;
@@ -1960,7 +1941,7 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
return;
}
- method1 = skl_wm_method1(i915, wp->plane_pixel_rate,
+ method1 = skl_wm_method1(display, wp->plane_pixel_rate,
wp->cpp, latency, wp->dbuf_block_size);
method2 = skl_wm_method2(wp->plane_pixel_rate,
crtc_state->hw.pipe_mode.crtc_htotal,
@@ -1975,7 +1956,7 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
(wp->plane_bytes_per_line / wp->dbuf_block_size < 1)) {
selected_result = method2;
} else if (latency >= wp->linetime_us) {
- if (DISPLAY_VER(i915) == 9)
+ if (DISPLAY_VER(display) == 9)
selected_result = min_fixed16(method1, method2);
else
selected_result = method2;
@@ -1985,7 +1966,7 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
}
blocks = fixed16_to_u32_round_up(selected_result);
- if (DISPLAY_VER(i915) < 30)
+ if (DISPLAY_VER(display) < 30)
blocks++;
/*
@@ -2004,13 +1985,13 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
* channels' impact on the level 0 memory latency and the relevant
* wm calculations.
*/
- if (skl_wm_has_lines(i915, level))
+ if (skl_wm_has_lines(display, level))
blocks = max(blocks,
fixed16_to_u32_round_up(wp->plane_blocks_per_line));
lines = div_round_up_fixed16(selected_result,
wp->plane_blocks_per_line);
- if (DISPLAY_VER(i915) == 9) {
+ if (DISPLAY_VER(display) == 9) {
/* Display WA #1125: skl,bxt,kbl */
if (level == 0 && wp->rc_surface)
blocks += fixed16_to_u32_round_up(wp->y_tile_minimum);
@@ -2035,7 +2016,7 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
}
}
- if (DISPLAY_VER(i915) >= 11) {
+ if (DISPLAY_VER(display) >= 11) {
if (wp->y_tiled) {
int extra_lines;
@@ -2052,10 +2033,10 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
}
}
- if (!skl_wm_has_lines(i915, level))
+ if (!skl_wm_has_lines(display, level))
lines = 0;
- if (lines > skl_wm_max_lines(i915)) {
+ if (lines > skl_wm_max_lines(display)) {
/* reject it */
result->min_ddb_alloc = U16_MAX;
return;
@@ -2074,8 +2055,8 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
result->enable = true;
result->auto_min_alloc_wm_enable = xe3_auto_min_alloc_capable(plane, level);
- if (DISPLAY_VER(i915) < 12 && i915->display.sagv.block_time_us)
- result->can_sagv = latency >= i915->display.sagv.block_time_us;
+ if (DISPLAY_VER(display) < 12 && display->sagv.block_time_us)
+ result->can_sagv = latency >= display->sagv.block_time_us;
}
static void
@@ -2084,13 +2065,13 @@ skl_compute_wm_levels(const struct intel_crtc_state *crtc_state,
const struct skl_wm_params *wm_params,
struct skl_wm_level *levels)
{
- struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(crtc_state);
struct skl_wm_level *result_prev = &levels[0];
int level;
- for (level = 0; level < i915->display.wm.num_levels; level++) {
+ for (level = 0; level < display->wm.num_levels; level++) {
struct skl_wm_level *result = &levels[level];
- unsigned int latency = skl_wm_latency(i915, level, wm_params);
+ unsigned int latency = skl_wm_latency(display, level, wm_params);
skl_compute_plane_wm(crtc_state, plane, level, latency,
wm_params, result_prev, result);
@@ -2104,26 +2085,25 @@ static void tgl_compute_sagv_wm(const struct intel_crtc_state *crtc_state,
const struct skl_wm_params *wm_params,
struct skl_plane_wm *plane_wm)
{
- struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(crtc_state);
struct skl_wm_level *sagv_wm = &plane_wm->sagv.wm0;
struct skl_wm_level *levels = plane_wm->wm;
unsigned int latency = 0;
- if (i915->display.sagv.block_time_us)
- latency = i915->display.sagv.block_time_us +
- skl_wm_latency(i915, 0, wm_params);
+ if (display->sagv.block_time_us)
+ latency = display->sagv.block_time_us +
+ skl_wm_latency(display, 0, wm_params);
skl_compute_plane_wm(crtc_state, plane, 0, latency,
wm_params, &levels[0],
sagv_wm);
}
-static void skl_compute_transition_wm(struct drm_i915_private *i915,
+static void skl_compute_transition_wm(struct intel_display *display,
struct skl_wm_level *trans_wm,
const struct skl_wm_level *wm0,
const struct skl_wm_params *wp)
{
- struct intel_display *display = &i915->display;
u16 trans_min, trans_amount, trans_y_tile_min;
u16 wm0_blocks, trans_offset, blocks;
@@ -2135,16 +2115,16 @@ static void skl_compute_transition_wm(struct drm_i915_private *i915,
* WaDisableTWM:skl,kbl,cfl,bxt
* Transition WM are not recommended by HW team for GEN9
*/
- if (DISPLAY_VER(i915) == 9)
+ if (DISPLAY_VER(display) == 9)
return;
- if (DISPLAY_VER(i915) >= 11)
+ if (DISPLAY_VER(display) >= 11)
trans_min = 4;
else
trans_min = 14;
/* Display WA #1140: glk,cnl */
- if (DISPLAY_VER(i915) == 10)
+ if (DISPLAY_VER(display) == 10)
trans_amount = 0;
else
trans_amount = 10; /* This is configurable amount */
@@ -2186,8 +2166,7 @@ static int skl_build_plane_wm_single(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state,
struct intel_plane *plane, int color_plane)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc_state);
struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane->id];
struct skl_wm_params wm_params;
int ret;
@@ -2199,13 +2178,13 @@ static int skl_build_plane_wm_single(struct intel_crtc_state *crtc_state,
skl_compute_wm_levels(crtc_state, plane, &wm_params, wm->wm);
- skl_compute_transition_wm(i915, &wm->trans_wm,
+ skl_compute_transition_wm(display, &wm->trans_wm,
&wm->wm[0], &wm_params);
- if (DISPLAY_VER(i915) >= 12) {
+ if (DISPLAY_VER(display) >= 12) {
tgl_compute_sagv_wm(crtc_state, plane, &wm_params, wm);
- skl_compute_transition_wm(i915, &wm->sagv.trans_wm,
+ skl_compute_transition_wm(display, &wm->sagv.trans_wm,
&wm->sagv.wm0, &wm_params);
}
@@ -2265,8 +2244,8 @@ static int skl_build_plane_wm(struct intel_crtc_state *crtc_state,
static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *i915 = to_i915(plane->base.dev);
enum plane_id plane_id = plane->id;
struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane_id];
int ret;
@@ -2280,9 +2259,9 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
if (plane_state->planar_linked_plane) {
const struct drm_framebuffer *fb = plane_state->hw.fb;
- drm_WARN_ON(&i915->drm,
+ drm_WARN_ON(display->drm,
!intel_wm_plane_visible(crtc_state, plane_state));
- drm_WARN_ON(&i915->drm, !fb->format->is_yuv ||
+ drm_WARN_ON(display->drm, !fb->format->is_yuv ||
fb->format->num_planes == 1);
ret = skl_build_plane_wm_single(crtc_state, plane_state,
@@ -2422,15 +2401,14 @@ static int skl_max_wm0_lines(const struct intel_crtc_state *crtc_state)
static int skl_max_wm_level_for_vblank(struct intel_crtc_state *crtc_state,
int wm0_lines)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc_state);
int level;
- for (level = i915->display.wm.num_levels - 1; level >= 0; level--) {
+ for (level = display->wm.num_levels - 1; level >= 0; level--) {
int latency;
/* FIXME should we care about the latency w/a's? */
- latency = skl_wm_latency(i915, level, NULL);
+ latency = skl_wm_latency(display, level, NULL);
if (latency == 0)
continue;
@@ -2447,8 +2425,8 @@ static int skl_max_wm_level_for_vblank(struct intel_crtc_state *crtc_state,
static int skl_wm_check_vblank(struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
int wm0_lines, level;
if (!crtc_state->hw.active)
@@ -2464,9 +2442,9 @@ static int skl_wm_check_vblank(struct intel_crtc_state *crtc_state)
* PSR needs to toggle LATENCY_REPORTING_REMOVED_PIPE_*
* based on whether we're limited by the vblank duration.
*/
- crtc_state->wm_level_disabled = level < i915->display.wm.num_levels - 1;
+ crtc_state->wm_level_disabled = level < display->wm.num_levels - 1;
- for (level++; level < i915->display.wm.num_levels; level++) {
+ for (level++; level < display->wm.num_levels; level++) {
enum plane_id plane_id;
for_each_plane_id_on_crtc(crtc, plane_id) {
@@ -2482,10 +2460,10 @@ static int skl_wm_check_vblank(struct intel_crtc_state *crtc_state)
}
}
- if (DISPLAY_VER(i915) >= 12 &&
- i915->display.sagv.block_time_us &&
+ if (DISPLAY_VER(display) >= 12 &&
+ display->sagv.block_time_us &&
skl_is_vblank_too_short(crtc_state, wm0_lines,
- i915->display.sagv.block_time_us)) {
+ display->sagv.block_time_us)) {
enum plane_id plane_id;
for_each_plane_id_on_crtc(crtc, plane_id) {
@@ -2503,7 +2481,7 @@ static int skl_wm_check_vblank(struct intel_crtc_state *crtc_state)
static int skl_build_pipe_wm(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
const struct intel_plane_state *plane_state;
@@ -2519,7 +2497,7 @@ static int skl_build_pipe_wm(struct intel_atomic_state *state,
if (plane->pipe != crtc->pipe)
continue;
- if (DISPLAY_VER(i915) >= 11)
+ if (DISPLAY_VER(display) >= 11)
ret = icl_build_plane_wm(crtc_state, plane_state);
else
ret = skl_build_plane_wm(crtc_state, plane_state);
@@ -2542,11 +2520,10 @@ static bool skl_wm_level_equals(const struct skl_wm_level *l1,
l1->auto_min_alloc_wm_enable == l2->auto_min_alloc_wm_enable;
}
-static bool skl_plane_wm_equals(struct drm_i915_private *i915,
+static bool skl_plane_wm_equals(struct intel_display *display,
const struct skl_plane_wm *wm1,
const struct skl_plane_wm *wm2)
{
- struct intel_display *display = &i915->display;
int level;
for (level = 0; level < display->wm.num_levels; level++) {
@@ -2601,14 +2578,14 @@ static int
skl_ddb_add_affected_planes(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct intel_plane *plane;
- for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {
+ for_each_intel_plane_on_crtc(display->drm, crtc, plane) {
struct intel_plane_state *plane_state;
enum plane_id plane_id = plane->id;
@@ -2619,7 +2596,7 @@ skl_ddb_add_affected_planes(struct intel_atomic_state *state,
continue;
if (new_crtc_state->do_async_flip) {
- drm_dbg_kms(&i915->drm, "[PLANE:%d:%s] Can't change DDB during async flip\n",
+ drm_dbg_kms(display->drm, "[PLANE:%d:%s] Can't change DDB during async flip\n",
plane->base.base.id, plane->base.name);
return -EINVAL;
}
@@ -2638,7 +2615,7 @@ skl_ddb_add_affected_planes(struct intel_atomic_state *state,
static u8 intel_dbuf_enabled_slices(const struct intel_dbuf_state *dbuf_state)
{
- struct drm_i915_private *i915 = to_i915(dbuf_state->base.state->base.dev);
+ struct intel_display *display = to_intel_display(dbuf_state->base.state->base.dev);
u8 enabled_slices;
enum pipe pipe;
@@ -2648,7 +2625,7 @@ static u8 intel_dbuf_enabled_slices(const struct intel_dbuf_state *dbuf_state)
*/
enabled_slices = BIT(DBUF_S1);
- for_each_pipe(i915, pipe)
+ for_each_pipe(display, pipe)
enabled_slices |= dbuf_state->slices[pipe];
return enabled_slices;
@@ -2658,7 +2635,6 @@ static int
skl_compute_ddb(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_dbuf_state *old_dbuf_state;
struct intel_dbuf_state *new_dbuf_state = NULL;
struct intel_crtc_state *new_crtc_state;
@@ -2697,7 +2673,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
}
}
- for_each_intel_crtc(&i915->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
enum pipe pipe = crtc->pipe;
new_dbuf_state->slices[pipe] =
@@ -2720,11 +2696,11 @@ skl_compute_ddb(struct intel_atomic_state *state)
if (ret)
return ret;
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"Enabled dbuf slices 0x%x -> 0x%x (total dbuf slices 0x%x), mbus joined? %s->%s\n",
old_dbuf_state->enabled_slices,
new_dbuf_state->enabled_slices,
- DISPLAY_INFO(i915)->dbuf.slice_mask,
+ DISPLAY_INFO(display)->dbuf.slice_mask,
str_yes_no(old_dbuf_state->joined_mbus),
str_yes_no(new_dbuf_state->joined_mbus));
}
@@ -2742,7 +2718,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
return ret;
}
- for_each_intel_crtc(&i915->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
ret = skl_crtc_allocate_ddb(state, crtc);
if (ret)
return ret;
@@ -2769,7 +2745,7 @@ static char enast(bool enable)
static void
skl_print_wm_changes(struct intel_atomic_state *state)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
const struct intel_crtc_state *old_crtc_state;
const struct intel_crtc_state *new_crtc_state;
struct intel_plane *plane;
@@ -2786,7 +2762,7 @@ skl_print_wm_changes(struct intel_atomic_state *state)
old_pipe_wm = &old_crtc_state->wm.skl.optimal;
new_pipe_wm = &new_crtc_state->wm.skl.optimal;
- for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {
+ for_each_intel_plane_on_crtc(display->drm, crtc, plane) {
enum plane_id plane_id = plane->id;
const struct skl_ddb_entry *old, *new;
@@ -2796,24 +2772,24 @@ skl_print_wm_changes(struct intel_atomic_state *state)
if (skl_ddb_entry_equal(old, new))
continue;
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"[PLANE:%d:%s] ddb (%4d - %4d) -> (%4d - %4d), size %4d -> %4d\n",
plane->base.base.id, plane->base.name,
old->start, old->end, new->start, new->end,
skl_ddb_entry_size(old), skl_ddb_entry_size(new));
}
- for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {
+ for_each_intel_plane_on_crtc(display->drm, crtc, plane) {
enum plane_id plane_id = plane->id;
const struct skl_plane_wm *old_wm, *new_wm;
old_wm = &old_pipe_wm->planes[plane_id];
new_wm = &new_pipe_wm->planes[plane_id];
- if (skl_plane_wm_equals(i915, old_wm, new_wm))
+ if (skl_plane_wm_equals(display, old_wm, new_wm))
continue;
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"[PLANE:%d:%s] level %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm,%cswm,%cstwm"
" -> %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm,%cswm,%cstwm\n",
plane->base.base.id, plane->base.name,
@@ -2832,7 +2808,7 @@ skl_print_wm_changes(struct intel_atomic_state *state)
enast(new_wm->sagv.wm0.enable),
enast(new_wm->sagv.trans_wm.enable));
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"[PLANE:%d:%s] lines %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%4d"
" -> %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%4d\n",
plane->base.base.id, plane->base.name,
@@ -2859,7 +2835,7 @@ skl_print_wm_changes(struct intel_atomic_state *state)
enast(new_wm->sagv.wm0.ignore_lines), new_wm->sagv.wm0.lines,
enast(new_wm->sagv.trans_wm.ignore_lines), new_wm->sagv.trans_wm.lines);
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%5d"
" -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%5d\n",
plane->base.base.id, plane->base.name,
@@ -2878,7 +2854,7 @@ skl_print_wm_changes(struct intel_atomic_state *state)
new_wm->sagv.wm0.blocks,
new_wm->sagv.trans_wm.blocks);
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"[PLANE:%d:%s] min_ddb %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%5d"
" -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%5d\n",
plane->base.base.id, plane->base.name,
@@ -2956,14 +2932,14 @@ static bool skl_plane_selected_wm_equals(struct intel_plane *plane,
static int skl_wm_add_affected_planes(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(state);
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct intel_plane *plane;
- for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {
+ for_each_intel_plane_on_crtc(display->drm, crtc, plane) {
struct intel_plane_state *plane_state;
enum plane_id plane_id = plane->id;
@@ -2982,7 +2958,7 @@ static int skl_wm_add_affected_planes(struct intel_atomic_state *state,
continue;
if (new_crtc_state->do_async_flip) {
- drm_dbg_kms(&i915->drm, "[PLANE:%d:%s] Can't change watermarks during async flip\n",
+ drm_dbg_kms(display->drm, "[PLANE:%d:%s] Can't change watermarks during async flip\n",
plane->base.base.id, plane->base.name);
return -EINVAL;
}
@@ -3161,9 +3137,8 @@ static void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,
static void skl_wm_get_hw_state(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct intel_dbuf_state *dbuf_state =
- to_intel_dbuf_state(i915->display.dbuf.obj.state);
+ to_intel_dbuf_state(display->dbuf.obj.state);
struct intel_crtc *crtc;
if (HAS_MBUS_JOINING(display))
@@ -3203,7 +3178,7 @@ static void skl_wm_get_hw_state(struct intel_display *display)
if (!crtc_state->hw.active)
continue;
- skl_ddb_get_hw_plane_state(i915, crtc->pipe,
+ skl_ddb_get_hw_plane_state(display, crtc->pipe,
plane_id, ddb, ddb_y,
min_ddb, interim_ddb);
@@ -3219,7 +3194,7 @@ static void skl_wm_get_hw_state(struct intel_display *display)
*/
slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,
dbuf_state->joined_mbus);
- mbus_offset = mbus_ddb_offset(i915, slices);
+ mbus_offset = mbus_ddb_offset(display, slices);
crtc_state->wm.skl.ddb.start = mbus_offset + dbuf_state->ddb[pipe].start;
crtc_state->wm.skl.ddb.end = mbus_offset + dbuf_state->ddb[pipe].end;
@@ -3252,16 +3227,18 @@ void skl_watermark_ipc_update(struct intel_display *display)
skl_watermark_ipc_enabled(display) ? DISP_IPC_ENABLE : 0);
}
-static bool skl_watermark_ipc_can_enable(struct drm_i915_private *i915)
+static bool skl_watermark_ipc_can_enable(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
+
/* Display WA #0477 WaDisableIPC: skl */
- if (IS_SKYLAKE(i915))
+ if (display->platform.skylake)
return false;
/* Display WA #1141: SKL:all KBL:all CFL */
- if (IS_KABYLAKE(i915) ||
- IS_COFFEELAKE(i915) ||
- IS_COMETLAKE(i915))
+ if (display->platform.kabylake ||
+ display->platform.coffeelake ||
+ display->platform.cometlake)
return i915->dram_info.symmetric_memory;
return true;
@@ -3269,20 +3246,19 @@ static bool skl_watermark_ipc_can_enable(struct drm_i915_private *i915)
void skl_watermark_ipc_init(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
if (!HAS_IPC(display))
return;
- display->wm.ipc_enabled = skl_watermark_ipc_can_enable(i915);
+ display->wm.ipc_enabled = skl_watermark_ipc_can_enable(display);
skl_watermark_ipc_update(display);
}
static void
-adjust_wm_latency(struct drm_i915_private *i915,
+adjust_wm_latency(struct intel_display *display,
u16 wm[], int num_levels, int read_latency)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
bool wm_lv_0_adjust_needed = i915->dram_info.wm_lv_0_adjust_needed;
int i, level;
@@ -3323,31 +3299,32 @@ adjust_wm_latency(struct drm_i915_private *i915,
wm[0] += 1;
}
-static void mtl_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
+static void mtl_read_wm_latency(struct intel_display *display, u16 wm[])
{
- int num_levels = i915->display.wm.num_levels;
+ int num_levels = display->wm.num_levels;
u32 val;
- val = intel_de_read(i915, MTL_LATENCY_LP0_LP1);
+ val = intel_de_read(display, MTL_LATENCY_LP0_LP1);
wm[0] = REG_FIELD_GET(MTL_LATENCY_LEVEL_EVEN_MASK, val);
wm[1] = REG_FIELD_GET(MTL_LATENCY_LEVEL_ODD_MASK, val);
- val = intel_de_read(i915, MTL_LATENCY_LP2_LP3);
+ val = intel_de_read(display, MTL_LATENCY_LP2_LP3);
wm[2] = REG_FIELD_GET(MTL_LATENCY_LEVEL_EVEN_MASK, val);
wm[3] = REG_FIELD_GET(MTL_LATENCY_LEVEL_ODD_MASK, val);
- val = intel_de_read(i915, MTL_LATENCY_LP4_LP5);
+ val = intel_de_read(display, MTL_LATENCY_LP4_LP5);
wm[4] = REG_FIELD_GET(MTL_LATENCY_LEVEL_EVEN_MASK, val);
wm[5] = REG_FIELD_GET(MTL_LATENCY_LEVEL_ODD_MASK, val);
- adjust_wm_latency(i915, wm, num_levels, 6);
+ adjust_wm_latency(display, wm, num_levels, 6);
}
-static void skl_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
+static void skl_read_wm_latency(struct intel_display *display, u16 wm[])
{
- int num_levels = i915->display.wm.num_levels;
- int read_latency = DISPLAY_VER(i915) >= 12 ? 3 : 2;
- int mult = IS_DG2(i915) ? 2 : 1;
+ struct drm_i915_private *i915 = to_i915(display->drm);
+ int num_levels = display->wm.num_levels;
+ int read_latency = DISPLAY_VER(display) >= 12 ? 3 : 2;
+ int mult = display->platform.dg2 ? 2 : 1;
u32 val;
int ret;
@@ -3355,7 +3332,7 @@ static void skl_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
val = 0; /* data0 to be programmed to 0 for first set */
ret = snb_pcode_read(&i915->uncore, GEN9_PCODE_READ_MEM_LATENCY, &val, NULL);
if (ret) {
- drm_err(&i915->drm, "SKL Mailbox read error = %d\n", ret);
+ drm_err(display->drm, "SKL Mailbox read error = %d\n", ret);
return;
}
@@ -3368,7 +3345,7 @@ static void skl_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
val = 1; /* data0 to be programmed to 1 for second set */
ret = snb_pcode_read(&i915->uncore, GEN9_PCODE_READ_MEM_LATENCY, &val, NULL);
if (ret) {
- drm_err(&i915->drm, "SKL Mailbox read error = %d\n", ret);
+ drm_err(display->drm, "SKL Mailbox read error = %d\n", ret);
return;
}
@@ -3377,22 +3354,20 @@ static void skl_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
wm[6] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val) * mult;
wm[7] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val) * mult;
- adjust_wm_latency(i915, wm, num_levels, read_latency);
+ adjust_wm_latency(display, wm, num_levels, read_latency);
}
-static void skl_setup_wm_latency(struct drm_i915_private *i915)
+static void skl_setup_wm_latency(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
-
if (HAS_HW_SAGV_WM(display))
display->wm.num_levels = 6;
else
display->wm.num_levels = 8;
if (DISPLAY_VER(display) >= 14)
- mtl_read_wm_latency(i915, display->wm.skl_latency);
+ mtl_read_wm_latency(display, display->wm.skl_latency);
else
- skl_read_wm_latency(i915, display->wm.skl_latency);
+ skl_read_wm_latency(display, display->wm.skl_latency);
intel_print_wm_latency(display, "Gen9 Plane", display->wm.skl_latency);
}
@@ -3422,10 +3397,10 @@ static const struct intel_global_state_funcs intel_dbuf_funcs = {
struct intel_dbuf_state *
intel_atomic_get_dbuf_state(struct intel_atomic_state *state)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
struct intel_global_state *dbuf_state;
- dbuf_state = intel_atomic_get_global_obj_state(state, &i915->display.dbuf.obj);
+ dbuf_state = intel_atomic_get_global_obj_state(state, &display->dbuf.obj);
if (IS_ERR(dbuf_state))
return ERR_CAST(dbuf_state);
@@ -3468,34 +3443,34 @@ static bool xelpdp_is_only_pipe_per_dbuf_bank(enum pipe pipe, u8 active_pipes)
static u32 pipe_mbus_dbox_ctl(const struct intel_crtc *crtc,
const struct intel_dbuf_state *dbuf_state)
{
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
u32 val = 0;
- if (DISPLAY_VER(i915) >= 14)
+ if (DISPLAY_VER(display) >= 14)
val |= MBUS_DBOX_I_CREDIT(2);
- if (DISPLAY_VER(i915) >= 12) {
+ if (DISPLAY_VER(display) >= 12) {
val |= MBUS_DBOX_B2B_TRANSACTIONS_MAX(16);
val |= MBUS_DBOX_B2B_TRANSACTIONS_DELAY(1);
val |= MBUS_DBOX_REGULATE_B2B_TRANSACTIONS_EN;
}
- if (DISPLAY_VER(i915) >= 14)
+ if (DISPLAY_VER(display) >= 14)
val |= dbuf_state->joined_mbus ?
MBUS_DBOX_A_CREDIT(12) : MBUS_DBOX_A_CREDIT(8);
- else if (IS_ALDERLAKE_P(i915))
+ else if (display->platform.alderlake_p)
/* Wa_22010947358:adl-p */
val |= dbuf_state->joined_mbus ?
MBUS_DBOX_A_CREDIT(6) : MBUS_DBOX_A_CREDIT(4);
else
val |= MBUS_DBOX_A_CREDIT(2);
- if (DISPLAY_VER(i915) >= 14) {
+ if (DISPLAY_VER(display) >= 14) {
val |= MBUS_DBOX_B_CREDIT(0xA);
- } else if (IS_ALDERLAKE_P(i915)) {
+ } else if (display->platform.alderlake_p) {
val |= MBUS_DBOX_BW_CREDIT(2);
val |= MBUS_DBOX_B_CREDIT(8);
- } else if (DISPLAY_VER(i915) >= 12) {
+ } else if (DISPLAY_VER(display) >= 12) {
val |= MBUS_DBOX_BW_CREDIT(2);
val |= MBUS_DBOX_B_CREDIT(12);
} else {
@@ -3503,7 +3478,7 @@ static u32 pipe_mbus_dbox_ctl(const struct intel_crtc *crtc,
val |= MBUS_DBOX_B_CREDIT(8);
}
- if (DISPLAY_VERx100(i915) == 1400) {
+ if (DISPLAY_VERx100(display) == 1400) {
if (xelpdp_is_only_pipe_per_dbuf_bank(crtc->pipe, dbuf_state->active_pipes))
val |= MBUS_DBOX_BW_8CREDITS_MTL;
else
@@ -3513,22 +3488,22 @@ static u32 pipe_mbus_dbox_ctl(const struct intel_crtc *crtc,
return val;
}
-static void pipe_mbus_dbox_ctl_update(struct drm_i915_private *i915,
+static void pipe_mbus_dbox_ctl_update(struct intel_display *display,
const struct intel_dbuf_state *dbuf_state)
{
struct intel_crtc *crtc;
- for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, dbuf_state->active_pipes)
- intel_de_write(i915, PIPE_MBUS_DBOX_CTL(crtc->pipe),
+ for_each_intel_crtc_in_pipe_mask(display->drm, crtc, dbuf_state->active_pipes)
+ intel_de_write(display, PIPE_MBUS_DBOX_CTL(crtc->pipe),
pipe_mbus_dbox_ctl(crtc, dbuf_state));
}
static void intel_mbus_dbox_update(struct intel_atomic_state *state)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
const struct intel_dbuf_state *new_dbuf_state, *old_dbuf_state;
- if (DISPLAY_VER(i915) < 11)
+ if (DISPLAY_VER(display) < 11)
return;
new_dbuf_state = intel_atomic_get_new_dbuf_state(state);
@@ -3538,7 +3513,7 @@ static void intel_mbus_dbox_update(struct intel_atomic_state *state)
new_dbuf_state->active_pipes == old_dbuf_state->active_pipes))
return;
- pipe_mbus_dbox_ctl_update(i915, new_dbuf_state);
+ pipe_mbus_dbox_ctl_update(display, new_dbuf_state);
}
int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,
@@ -3604,13 +3579,12 @@ static enum pipe intel_mbus_joined_pipe(struct intel_atomic_state *state,
const struct intel_dbuf_state *dbuf_state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(state->base.dev);
enum pipe pipe = ffs(dbuf_state->active_pipes) - 1;
const struct intel_crtc_state *new_crtc_state;
struct intel_crtc *crtc;
- drm_WARN_ON(&i915->drm, !dbuf_state->joined_mbus);
- drm_WARN_ON(&i915->drm, !is_power_of_2(dbuf_state->active_pipes));
+ drm_WARN_ON(display->drm, !dbuf_state->joined_mbus);
+ drm_WARN_ON(display->drm, !is_power_of_2(dbuf_state->active_pipes));
crtc = intel_crtc_for_pipe(display, pipe);
new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
@@ -3621,7 +3595,7 @@ static enum pipe intel_mbus_joined_pipe(struct intel_atomic_state *state,
return INVALID_PIPE;
}
-static void mbus_ctl_join_update(struct drm_i915_private *i915,
+static void mbus_ctl_join_update(struct intel_display *display,
const struct intel_dbuf_state *dbuf_state,
enum pipe pipe)
{
@@ -3637,7 +3611,7 @@ static void mbus_ctl_join_update(struct drm_i915_private *i915,
else
mbus_ctl |= MBUS_JOIN_PIPE_SELECT_NONE;
- intel_de_rmw(i915, MBUS_CTL,
+ intel_de_rmw(display, MBUS_CTL,
MBUS_HASHING_MODE_MASK | MBUS_JOIN |
MBUS_JOIN_PIPE_SELECT_MASK, mbus_ctl);
}
@@ -3645,18 +3619,18 @@ static void mbus_ctl_join_update(struct drm_i915_private *i915,
static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state,
enum pipe pipe)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
const struct intel_dbuf_state *old_dbuf_state =
intel_atomic_get_old_dbuf_state(state);
const struct intel_dbuf_state *new_dbuf_state =
intel_atomic_get_new_dbuf_state(state);
- drm_dbg_kms(&i915->drm, "Changing mbus joined: %s -> %s (pipe: %c)\n",
+ drm_dbg_kms(display->drm, "Changing mbus joined: %s -> %s (pipe: %c)\n",
str_yes_no(old_dbuf_state->joined_mbus),
str_yes_no(new_dbuf_state->joined_mbus),
pipe != INVALID_PIPE ? pipe_name(pipe) : '*');
- mbus_ctl_join_update(i915, new_dbuf_state, pipe);
+ mbus_ctl_join_update(display, new_dbuf_state, pipe);
}
void intel_dbuf_mbus_pre_ddb_update(struct intel_atomic_state *state)
@@ -3761,9 +3735,8 @@ void intel_dbuf_post_plane_update(struct intel_atomic_state *state)
gen9_dbuf_slices_update(display, new_slices);
}
-static void skl_mbus_sanitize(struct drm_i915_private *i915)
+static void skl_mbus_sanitize(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
struct intel_dbuf_state *dbuf_state =
to_intel_dbuf_state(display->dbuf.obj.state);
@@ -3781,25 +3754,25 @@ static void skl_mbus_sanitize(struct drm_i915_private *i915)
intel_dbuf_mdclk_cdclk_ratio_update(display,
dbuf_state->mdclk_cdclk_ratio,
dbuf_state->joined_mbus);
- pipe_mbus_dbox_ctl_update(i915, dbuf_state);
- mbus_ctl_join_update(i915, dbuf_state, INVALID_PIPE);
+ pipe_mbus_dbox_ctl_update(display, dbuf_state);
+ mbus_ctl_join_update(display, dbuf_state, INVALID_PIPE);
}
-static bool skl_dbuf_is_misconfigured(struct drm_i915_private *i915)
+static bool skl_dbuf_is_misconfigured(struct intel_display *display)
{
const struct intel_dbuf_state *dbuf_state =
- to_intel_dbuf_state(i915->display.dbuf.obj.state);
+ to_intel_dbuf_state(display->dbuf.obj.state);
struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
struct intel_crtc *crtc;
- for_each_intel_crtc(&i915->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
const struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
entries[crtc->pipe] = crtc_state->wm.skl.ddb;
}
- for_each_intel_crtc(&i915->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
const struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
u8 slices;
@@ -3817,7 +3790,7 @@ static bool skl_dbuf_is_misconfigured(struct drm_i915_private *i915)
return false;
}
-static void skl_dbuf_sanitize(struct drm_i915_private *i915)
+static void skl_dbuf_sanitize(struct intel_display *display)
{
struct intel_crtc *crtc;
@@ -3832,12 +3805,12 @@ static void skl_dbuf_sanitize(struct drm_i915_private *i915)
* all the planes so that skl_commit_modeset_enables() can
* simply ignore them.
*/
- if (!skl_dbuf_is_misconfigured(i915))
+ if (!skl_dbuf_is_misconfigured(display))
return;
- drm_dbg_kms(&i915->drm, "BIOS has misprogrammed the DBUF, disabling all planes\n");
+ drm_dbg_kms(display->drm, "BIOS has misprogrammed the DBUF, disabling all planes\n");
- for_each_intel_crtc(&i915->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
struct intel_plane *plane = to_intel_plane(crtc->base.primary);
const struct intel_plane_state *plane_state =
to_intel_plane_state(plane->base.state);
@@ -3847,7 +3820,7 @@ static void skl_dbuf_sanitize(struct drm_i915_private *i915)
if (plane_state->uapi.visible)
intel_plane_disable_noatomic(crtc, plane);
- drm_WARN_ON(&i915->drm, crtc_state->active_planes != 0);
+ drm_WARN_ON(display->drm, crtc_state->active_planes != 0);
memset(&crtc_state->wm.skl.ddb, 0, sizeof(crtc_state->wm.skl.ddb));
}
@@ -3855,10 +3828,8 @@ static void skl_dbuf_sanitize(struct drm_i915_private *i915)
static void skl_wm_sanitize(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
- skl_mbus_sanitize(i915);
- skl_dbuf_sanitize(i915);
+ skl_mbus_sanitize(display);
+ skl_dbuf_sanitize(display);
}
void skl_wm_crtc_disable_noatomic(struct intel_crtc *crtc)
@@ -3909,7 +3880,6 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct skl_hw_state {
@@ -3924,7 +3894,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
u8 hw_enabled_slices;
int level;
- if (DISPLAY_VER(i915) < 9 || !new_crtc_state->hw.active)
+ if (DISPLAY_VER(display) < 9 || !new_crtc_state->hw.active)
return;
hw = kzalloc(sizeof(*hw), GFP_KERNEL);
@@ -3937,26 +3907,26 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
hw_enabled_slices = intel_enabled_dbuf_slices_mask(display);
- if (DISPLAY_VER(i915) >= 11 &&
- hw_enabled_slices != i915->display.dbuf.enabled_slices)
- drm_err(&i915->drm,
+ if (DISPLAY_VER(display) >= 11 &&
+ hw_enabled_slices != display->dbuf.enabled_slices)
+ drm_err(display->drm,
"mismatch in DBUF Slices (expected 0x%x, got 0x%x)\n",
- i915->display.dbuf.enabled_slices,
+ display->dbuf.enabled_slices,
hw_enabled_slices);
- for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {
+ for_each_intel_plane_on_crtc(display->drm, crtc, plane) {
const struct skl_ddb_entry *hw_ddb_entry, *sw_ddb_entry;
const struct skl_wm_level *hw_wm_level, *sw_wm_level;
/* Watermarks */
- for (level = 0; level < i915->display.wm.num_levels; level++) {
+ for (level = 0; level < display->wm.num_levels; level++) {
hw_wm_level = &hw->wm.planes[plane->id].wm[level];
sw_wm_level = skl_plane_wm_level(sw_wm, plane->id, level);
if (skl_wm_level_equals(hw_wm_level, sw_wm_level))
continue;
- drm_err(&i915->drm,
+ drm_err(display->drm,
"[PLANE:%d:%s] mismatch in WM%d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
plane->base.base.id, plane->base.name, level,
sw_wm_level->enable,
@@ -3971,7 +3941,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
sw_wm_level = skl_plane_trans_wm(sw_wm, plane->id);
if (!skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
- drm_err(&i915->drm,
+ drm_err(display->drm,
"[PLANE:%d:%s] mismatch in trans WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
plane->base.base.id, plane->base.name,
sw_wm_level->enable,
@@ -3987,7 +3957,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
if (HAS_HW_SAGV_WM(display) &&
!skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
- drm_err(&i915->drm,
+ drm_err(display->drm,
"[PLANE:%d:%s] mismatch in SAGV WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
plane->base.base.id, plane->base.name,
sw_wm_level->enable,
@@ -4003,7 +3973,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
if (HAS_HW_SAGV_WM(display) &&
!skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
- drm_err(&i915->drm,
+ drm_err(display->drm,
"[PLANE:%d:%s] mismatch in SAGV trans WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
plane->base.base.id, plane->base.name,
sw_wm_level->enable,
@@ -4019,7 +3989,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
- drm_err(&i915->drm,
+ drm_err(display->drm,
"[PLANE:%d:%s] mismatch in DDB (expected (%u,%u), found (%u,%u))\n",
plane->base.base.id, plane->base.name,
sw_ddb_entry->start, sw_ddb_entry->end,
@@ -4038,19 +4008,16 @@ static const struct intel_wm_funcs skl_wm_funcs = {
void skl_wm_init(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
- intel_sagv_init(i915);
+ intel_sagv_init(display);
- skl_setup_wm_latency(i915);
+ skl_setup_wm_latency(display);
display->funcs.wm = &skl_wm_funcs;
}
static int skl_watermark_ipc_status_show(struct seq_file *m, void *data)
{
- struct drm_i915_private *i915 = m->private;
- struct intel_display *display = &i915->display;
+ struct intel_display *display = m->private;
seq_printf(m, "Isochronous Priority Control: %s\n",
str_yes_no(skl_watermark_ipc_enabled(display)));
@@ -4059,9 +4026,9 @@ static int skl_watermark_ipc_status_show(struct seq_file *m, void *data)
static int skl_watermark_ipc_status_open(struct inode *inode, struct file *file)
{
- struct drm_i915_private *i915 = inode->i_private;
+ struct intel_display *display = inode->i_private;
- return single_open(file, skl_watermark_ipc_status_show, i915);
+ return single_open(file, skl_watermark_ipc_status_show, display);
}
static ssize_t skl_watermark_ipc_status_write(struct file *file,
@@ -4069,8 +4036,7 @@ static ssize_t skl_watermark_ipc_status_write(struct file *file,
size_t len, loff_t *offp)
{
struct seq_file *m = file->private_data;
- struct drm_i915_private *i915 = m->private;
- struct intel_display *display = &i915->display;
+ struct intel_display *display = m->private;
bool enable;
int ret;
@@ -4100,8 +4066,7 @@ static const struct file_operations skl_watermark_ipc_status_fops = {
static int intel_sagv_status_show(struct seq_file *m, void *unused)
{
- struct drm_i915_private *i915 = m->private;
- struct intel_display *display = &i915->display;
+ struct intel_display *display = m->private;
static const char * const sagv_status[] = {
[I915_SAGV_UNKNOWN] = "unknown",
[I915_SAGV_DISABLED] = "disabled",
@@ -4111,9 +4076,9 @@ static int intel_sagv_status_show(struct seq_file *m, void *unused)
seq_printf(m, "SAGV available: %s\n", str_yes_no(intel_has_sagv(display)));
seq_printf(m, "SAGV modparam: %s\n",
- str_enabled_disabled(i915->display.params.enable_sagv));
- seq_printf(m, "SAGV status: %s\n", sagv_status[i915->display.sagv.status]);
- seq_printf(m, "SAGV block time: %d usec\n", i915->display.sagv.block_time_us);
+ str_enabled_disabled(display->params.enable_sagv));
+ seq_printf(m, "SAGV status: %s\n", sagv_status[display->sagv.status]);
+ seq_printf(m, "SAGV block time: %d usec\n", display->sagv.block_time_us);
return 0;
}
@@ -4122,25 +4087,23 @@ DEFINE_SHOW_ATTRIBUTE(intel_sagv_status);
void skl_watermark_debugfs_register(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct drm_minor *minor = display->drm->primary;
if (HAS_IPC(display))
- debugfs_create_file("i915_ipc_status", 0644, minor->debugfs_root, i915,
- &skl_watermark_ipc_status_fops);
+ debugfs_create_file("i915_ipc_status", 0644, minor->debugfs_root,
+ display, &skl_watermark_ipc_status_fops);
if (HAS_SAGV(display))
- debugfs_create_file("i915_sagv_status", 0444, minor->debugfs_root, i915,
- &intel_sagv_status_fops);
+ debugfs_create_file("i915_sagv_status", 0444, minor->debugfs_root,
+ display, &intel_sagv_status_fops);
}
unsigned int skl_watermark_max_latency(struct intel_display *display, int initial_wm_level)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
int level;
for (level = display->wm.num_levels - 1; level >= initial_wm_level; level--) {
- unsigned int latency = skl_wm_latency(i915, level, NULL);
+ unsigned int latency = skl_wm_latency(display, level, NULL);
if (latency)
return latency;
--
2.39.5
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 5/7] drm/i915/wm: convert intel_wm.h external interfaces to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
` (3 preceding siblings ...)
2025-04-03 9:11 ` [PATCH 4/7] drm/i915/wm: convert skl_watermarks.c internally " Jani Nikula
@ 2025-04-03 9:11 ` Jani Nikula
2025-04-03 9:11 ` [PATCH 6/7] drm/i915/wm: convert i9xx_wm.c to intel_de_*() register interface Jani Nikula
` (9 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2025-04-03 9:11 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert the intel_wm.h interface to struct intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 32 +++++++++++--------
drivers/gpu/drm/i915/display/i9xx_wm.h | 18 +++++------
drivers/gpu/drm/i915/display/intel_display.c | 8 ++---
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_wm.c | 4 +--
5 files changed, 33 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index e6a1b9b10b01..7202ef503e58 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -200,7 +200,7 @@ static bool _intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enabl
/**
* intel_set_memory_cxsr - Configure CxSR state
- * @dev_priv: i915 device
+ * @display: display device
* @enable: Allow vs. disallow CxSR
*
* Allow or disallow the system to enter a special CxSR
@@ -235,8 +235,9 @@ static bool _intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enabl
* the hardware w.r.t. HPLL SR when writing to plane registers.
* Disallowing just CxSR is sufficient.
*/
-bool intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enable)
+bool intel_set_memory_cxsr(struct intel_display *display, bool enable)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
bool ret;
mutex_lock(&dev_priv->display.wm.wm_mutex);
@@ -652,7 +653,7 @@ static void pnv_update_wm(struct intel_display *display)
latency = pnv_get_cxsr_latency(dev_priv);
if (!latency) {
drm_dbg_kms(&dev_priv->drm, "Unknown FSB/MEM, disabling CxSR\n");
- intel_set_memory_cxsr(dev_priv, false);
+ intel_set_memory_cxsr(display, false);
return;
}
@@ -702,9 +703,9 @@ static void pnv_update_wm(struct intel_display *display)
intel_uncore_write(&dev_priv->uncore, DSPFW3(dev_priv), reg);
drm_dbg_kms(&dev_priv->drm, "DSPFW3 register is %x\n", reg);
- intel_set_memory_cxsr(dev_priv, true);
+ intel_set_memory_cxsr(display, true);
} else {
- intel_set_memory_cxsr(dev_priv, false);
+ intel_set_memory_cxsr(display, false);
}
}
@@ -2177,7 +2178,7 @@ static void i965_update_wm(struct intel_display *display)
} else {
cxsr_enabled = false;
/* Turn off self refresh if both pipes are enabled */
- intel_set_memory_cxsr(dev_priv, false);
+ intel_set_memory_cxsr(display, false);
}
drm_dbg_kms(&dev_priv->drm,
@@ -2198,7 +2199,7 @@ static void i965_update_wm(struct intel_display *display)
FW_WM(cursor_sr, CURSOR_SR));
if (cxsr_enabled)
- intel_set_memory_cxsr(dev_priv, true);
+ intel_set_memory_cxsr(display, true);
}
#undef FW_WM
@@ -2307,7 +2308,7 @@ static void i9xx_update_wm(struct intel_display *display)
cwm = 2;
/* Play safe and disable self-refresh before adjusting watermarks. */
- intel_set_memory_cxsr(dev_priv, false);
+ intel_set_memory_cxsr(display, false);
/* Calc sr entries for one plane configs */
if (HAS_FW_BLC(dev_priv) && crtc) {
@@ -2359,7 +2360,7 @@ static void i9xx_update_wm(struct intel_display *display)
intel_uncore_write(&dev_priv->uncore, FW_BLC2, fwater_hi);
if (crtc)
- intel_set_memory_cxsr(dev_priv, true);
+ intel_set_memory_cxsr(display, true);
}
static void i845_update_wm(struct intel_display *display)
@@ -3411,8 +3412,10 @@ static void ilk_write_wm_values(struct drm_i915_private *dev_priv,
dev_priv->display.wm.hw = *results;
}
-bool ilk_disable_cxsr(struct drm_i915_private *dev_priv)
+bool ilk_disable_cxsr(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
+
return _ilk_disable_lp_wm(dev_priv, WM_DIRTY_LP_ALL);
}
@@ -3580,8 +3583,9 @@ static int ilk_sanitize_watermarks_add_affected(struct drm_atomic_state *state)
* through the atomic check code to calculate new watermark values in the
* state object.
*/
-void ilk_wm_sanitize(struct drm_i915_private *dev_priv)
+void ilk_wm_sanitize(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct drm_atomic_state *state;
struct intel_atomic_state *intel_state;
struct intel_crtc *crtc;
@@ -4156,8 +4160,10 @@ static const struct intel_wm_funcs i845_wm_funcs = {
static const struct intel_wm_funcs nop_funcs = {
};
-void i9xx_wm_init(struct drm_i915_private *dev_priv)
+void i9xx_wm_init(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
+
/* For FIFO watermark updates */
if (HAS_PCH_SPLIT(dev_priv)) {
ilk_setup_wm_latency(dev_priv);
@@ -4172,7 +4178,7 @@ void i9xx_wm_init(struct drm_i915_private *dev_priv)
if (!pnv_get_cxsr_latency(dev_priv)) {
drm_info(&dev_priv->drm, "Unknown FSB/MEM, disabling CxSR\n");
/* Disable CxSR and never update its watermark again */
- intel_set_memory_cxsr(dev_priv, false);
+ intel_set_memory_cxsr(display, false);
dev_priv->display.funcs.wm = &nop_funcs;
} else {
dev_priv->display.funcs.wm = &pnv_wm_funcs;
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.h b/drivers/gpu/drm/i915/display/i9xx_wm.h
index 06ac37c6c94b..7bb363b2a756 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.h
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.h
@@ -8,28 +8,28 @@
#include <linux/types.h>
-struct drm_i915_private;
struct intel_crtc_state;
+struct intel_display;
struct intel_plane_state;
#ifdef I915
-bool ilk_disable_cxsr(struct drm_i915_private *i915);
-void ilk_wm_sanitize(struct drm_i915_private *i915);
-bool intel_set_memory_cxsr(struct drm_i915_private *i915, bool enable);
-void i9xx_wm_init(struct drm_i915_private *i915);
+bool ilk_disable_cxsr(struct intel_display *display);
+void ilk_wm_sanitize(struct intel_display *display);
+bool intel_set_memory_cxsr(struct intel_display *display, bool enable);
+void i9xx_wm_init(struct intel_display *display);
#else
-static inline bool ilk_disable_cxsr(struct drm_i915_private *i915)
+static inline bool ilk_disable_cxsr(struct intel_display *display)
{
return false;
}
-static inline void ilk_wm_sanitize(struct drm_i915_private *i915)
+static inline void ilk_wm_sanitize(struct intel_display *display)
{
}
-static inline bool intel_set_memory_cxsr(struct drm_i915_private *i915, bool enable)
+static inline bool intel_set_memory_cxsr(struct intel_display *display, bool enable)
{
return false;
}
-static inline void i9xx_wm_init(struct drm_i915_private *i915)
+static inline void i9xx_wm_init(struct intel_display *display)
{
}
#endif
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a6cd4a6d6c08..564b34110ddd 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -664,7 +664,6 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
struct intel_plane *plane)
{
struct intel_display *display = to_intel_display(crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct intel_plane_state *plane_state =
@@ -697,7 +696,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
* wait-for-vblank between disabling the plane and the pipe.
*/
if (HAS_GMCH(display) &&
- intel_set_memory_cxsr(dev_priv, false))
+ intel_set_memory_cxsr(display, false))
intel_plane_initial_vblank_wait(crtc);
/*
@@ -1167,7 +1166,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *dev_priv = to_i915(state->base.dev);
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
const struct intel_crtc_state *new_crtc_state =
@@ -1221,7 +1219,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
* wait-for-vblank between disabling the plane and the pipe.
*/
if (HAS_GMCH(display) && old_crtc_state->hw.active &&
- new_crtc_state->disable_cxsr && intel_set_memory_cxsr(dev_priv, false))
+ new_crtc_state->disable_cxsr && intel_set_memory_cxsr(display, false))
intel_crtc_wait_for_next_vblank(crtc);
/*
@@ -1232,7 +1230,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
* WaCxSRDisabledForSpriteScaling:ivb
*/
if (!HAS_GMCH(display) && old_crtc_state->hw.active &&
- new_crtc_state->disable_cxsr && ilk_disable_cxsr(dev_priv))
+ new_crtc_state->disable_cxsr && ilk_disable_cxsr(display))
intel_crtc_wait_for_next_vblank(crtc);
/*
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index f6d5d51dda0f..efee8925987e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -476,7 +476,7 @@ int intel_display_driver_probe_nogem(struct intel_display *display)
* since the watermark calculation done here will use pstate->fb.
*/
if (!HAS_GMCH(display))
- ilk_wm_sanitize(i915);
+ ilk_wm_sanitize(display);
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_wm.c b/drivers/gpu/drm/i915/display/intel_wm.c
index 43c69a672bb3..ed78c5ffffb7 100644
--- a/drivers/gpu/drm/i915/display/intel_wm.c
+++ b/drivers/gpu/drm/i915/display/intel_wm.c
@@ -169,12 +169,10 @@ void intel_print_wm_latency(struct intel_display *display,
void intel_wm_init(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
if (DISPLAY_VER(display) >= 9)
skl_wm_init(display);
else
- i9xx_wm_init(i915);
+ i9xx_wm_init(display);
}
static void wm_latency_show(struct seq_file *m, const u16 wm[8])
--
2.39.5
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 6/7] drm/i915/wm: convert i9xx_wm.c to intel_de_*() register interface
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
` (4 preceding siblings ...)
2025-04-03 9:11 ` [PATCH 5/7] drm/i915/wm: convert intel_wm.h external interfaces " Jani Nikula
@ 2025-04-03 9:11 ` Jani Nikula
2025-04-03 9:11 ` [PATCH 7/7] drm/i915/wm: convert i9xx_wm.c internally to struct intel_display Jani Nikula
` (8 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2025-04-03 9:11 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
The registers handled in i9xx_wm.c are mostly display registers. The
MCH_SSKPD and MLTR_ILK registers are not. Convert register access to
intel_de_*() interface where applicaple.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 383 +++++++++++++------------
1 file changed, 196 insertions(+), 187 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 7202ef503e58..49ded623c084 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -9,6 +9,7 @@
#include "i9xx_wm_regs.h"
#include "intel_atomic.h"
#include "intel_bo.h"
+#include "intel_de.h"
#include "intel_display.h"
#include "intel_display_trace.h"
#include "intel_fb.h"
@@ -152,39 +153,39 @@ static bool _intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enabl
u32 val;
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
- was_enabled = intel_uncore_read(&dev_priv->uncore, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
- intel_uncore_write(&dev_priv->uncore, FW_BLC_SELF_VLV, enable ? FW_CSPWRDWNEN : 0);
- intel_uncore_posting_read(&dev_priv->uncore, FW_BLC_SELF_VLV);
+ was_enabled = intel_de_read(display, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
+ intel_de_write(display, FW_BLC_SELF_VLV, enable ? FW_CSPWRDWNEN : 0);
+ intel_de_posting_read(display, FW_BLC_SELF_VLV);
} else if (IS_G4X(dev_priv) || IS_I965GM(dev_priv)) {
- was_enabled = intel_uncore_read(&dev_priv->uncore, FW_BLC_SELF) & FW_BLC_SELF_EN;
- intel_uncore_write(&dev_priv->uncore, FW_BLC_SELF, enable ? FW_BLC_SELF_EN : 0);
- intel_uncore_posting_read(&dev_priv->uncore, FW_BLC_SELF);
+ was_enabled = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN;
+ intel_de_write(display, FW_BLC_SELF, enable ? FW_BLC_SELF_EN : 0);
+ intel_de_posting_read(display, FW_BLC_SELF);
} else if (IS_PINEVIEW(dev_priv)) {
- val = intel_uncore_read(&dev_priv->uncore, DSPFW3(dev_priv));
+ val = intel_de_read(display, DSPFW3(display));
was_enabled = val & PINEVIEW_SELF_REFRESH_EN;
if (enable)
val |= PINEVIEW_SELF_REFRESH_EN;
else
val &= ~PINEVIEW_SELF_REFRESH_EN;
- intel_uncore_write(&dev_priv->uncore, DSPFW3(dev_priv), val);
- intel_uncore_posting_read(&dev_priv->uncore, DSPFW3(dev_priv));
+ intel_de_write(display, DSPFW3(display), val);
+ intel_de_posting_read(display, DSPFW3(display));
} else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv)) {
- was_enabled = intel_uncore_read(&dev_priv->uncore, FW_BLC_SELF) & FW_BLC_SELF_EN;
+ was_enabled = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN;
val = enable ? _MASKED_BIT_ENABLE(FW_BLC_SELF_EN) :
_MASKED_BIT_DISABLE(FW_BLC_SELF_EN);
- intel_uncore_write(&dev_priv->uncore, FW_BLC_SELF, val);
- intel_uncore_posting_read(&dev_priv->uncore, FW_BLC_SELF);
+ intel_de_write(display, FW_BLC_SELF, val);
+ intel_de_posting_read(display, FW_BLC_SELF);
} else if (IS_I915GM(dev_priv)) {
/*
* FIXME can't find a bit like this for 915G, and
* yet it does have the related watermark in
* FW_BLC_SELF. What's going on?
*/
- was_enabled = intel_uncore_read(&dev_priv->uncore, INSTPM) & INSTPM_SELF_EN;
+ was_enabled = intel_de_read(display, INSTPM) & INSTPM_SELF_EN;
val = enable ? _MASKED_BIT_ENABLE(INSTPM_SELF_EN) :
_MASKED_BIT_DISABLE(INSTPM_SELF_EN);
- intel_uncore_write(&dev_priv->uncore, INSTPM, val);
- intel_uncore_posting_read(&dev_priv->uncore, INSTPM);
+ intel_de_write(display, INSTPM, val);
+ intel_de_posting_read(display, INSTPM);
} else {
return false;
}
@@ -272,8 +273,8 @@ static const int pessimal_latency_ns = 5000;
static void vlv_get_fifo_size(struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state;
enum pipe pipe = crtc->pipe;
int sprite0_start, sprite1_start;
@@ -281,22 +282,20 @@ static void vlv_get_fifo_size(struct intel_crtc_state *crtc_state)
switch (pipe) {
case PIPE_A:
- dsparb = intel_uncore_read(&dev_priv->uncore,
- DSPARB(dev_priv));
- dsparb2 = intel_uncore_read(&dev_priv->uncore, DSPARB2);
+ dsparb = intel_de_read(display, DSPARB(display));
+ dsparb2 = intel_de_read(display, DSPARB2);
sprite0_start = VLV_FIFO_START(dsparb, dsparb2, 0, 0);
sprite1_start = VLV_FIFO_START(dsparb, dsparb2, 8, 4);
break;
case PIPE_B:
- dsparb = intel_uncore_read(&dev_priv->uncore,
- DSPARB(dev_priv));
- dsparb2 = intel_uncore_read(&dev_priv->uncore, DSPARB2);
+ dsparb = intel_de_read(display, DSPARB(display));
+ dsparb2 = intel_de_read(display, DSPARB2);
sprite0_start = VLV_FIFO_START(dsparb, dsparb2, 16, 8);
sprite1_start = VLV_FIFO_START(dsparb, dsparb2, 24, 12);
break;
case PIPE_C:
- dsparb2 = intel_uncore_read(&dev_priv->uncore, DSPARB2);
- dsparb3 = intel_uncore_read(&dev_priv->uncore, DSPARB3);
+ dsparb2 = intel_de_read(display, DSPARB2);
+ dsparb3 = intel_de_read(display, DSPARB3);
sprite0_start = VLV_FIFO_START(dsparb3, dsparb2, 0, 16);
sprite1_start = VLV_FIFO_START(dsparb3, dsparb2, 8, 20);
break;
@@ -314,7 +313,8 @@ static void vlv_get_fifo_size(struct intel_crtc_state *crtc_state)
static int i9xx_get_fifo_size(struct drm_i915_private *dev_priv,
enum i9xx_plane_id i9xx_plane)
{
- u32 dsparb = intel_uncore_read(&dev_priv->uncore, DSPARB(dev_priv));
+ struct intel_display *display = &dev_priv->display;
+ u32 dsparb = intel_de_read(display, DSPARB(display));
int size;
size = dsparb & 0x7f;
@@ -330,7 +330,8 @@ static int i9xx_get_fifo_size(struct drm_i915_private *dev_priv,
static int i830_get_fifo_size(struct drm_i915_private *dev_priv,
enum i9xx_plane_id i9xx_plane)
{
- u32 dsparb = intel_uncore_read(&dev_priv->uncore, DSPARB(dev_priv));
+ struct intel_display *display = &dev_priv->display;
+ u32 dsparb = intel_de_read(display, DSPARB(display));
int size;
size = dsparb & 0x1ff;
@@ -347,7 +348,8 @@ static int i830_get_fifo_size(struct drm_i915_private *dev_priv,
static int i845_get_fifo_size(struct drm_i915_private *dev_priv,
enum i9xx_plane_id i9xx_plane)
{
- u32 dsparb = intel_uncore_read(&dev_priv->uncore, DSPARB(dev_priv));
+ struct intel_display *display = &dev_priv->display;
+ u32 dsparb = intel_de_read(display, DSPARB(display));
int size;
size = dsparb & 0x7f;
@@ -669,10 +671,10 @@ static void pnv_update_wm(struct intel_display *display)
&pnv_display_wm,
pnv_display_wm.fifo_size,
cpp, latency->display_sr);
- reg = intel_uncore_read(&dev_priv->uncore, DSPFW1(dev_priv));
+ reg = intel_de_read(display, DSPFW1(display));
reg &= ~DSPFW_SR_MASK;
reg |= FW_WM(wm, SR);
- intel_uncore_write(&dev_priv->uncore, DSPFW1(dev_priv), reg);
+ intel_de_write(display, DSPFW1(display), reg);
drm_dbg_kms(&dev_priv->drm, "DSPFW1 register is %x\n", reg);
/* cursor SR */
@@ -680,27 +682,26 @@ static void pnv_update_wm(struct intel_display *display)
&pnv_cursor_wm,
pnv_display_wm.fifo_size,
4, latency->cursor_sr);
- intel_uncore_rmw(&dev_priv->uncore, DSPFW3(dev_priv),
- DSPFW_CURSOR_SR_MASK,
- FW_WM(wm, CURSOR_SR));
+ intel_de_rmw(display, DSPFW3(display),
+ DSPFW_CURSOR_SR_MASK, FW_WM(wm, CURSOR_SR));
/* Display HPLL off SR */
wm = intel_calculate_wm(dev_priv, pixel_rate,
&pnv_display_hplloff_wm,
pnv_display_hplloff_wm.fifo_size,
cpp, latency->display_hpll_disable);
- intel_uncore_rmw(&dev_priv->uncore, DSPFW3(dev_priv),
- DSPFW_HPLL_SR_MASK, FW_WM(wm, HPLL_SR));
+ intel_de_rmw(display, DSPFW3(display),
+ DSPFW_HPLL_SR_MASK, FW_WM(wm, HPLL_SR));
/* cursor HPLL off SR */
wm = intel_calculate_wm(dev_priv, pixel_rate,
&pnv_cursor_hplloff_wm,
pnv_display_hplloff_wm.fifo_size,
4, latency->cursor_hpll_disable);
- reg = intel_uncore_read(&dev_priv->uncore, DSPFW3(dev_priv));
+ reg = intel_de_read(display, DSPFW3(display));
reg &= ~DSPFW_HPLL_CURSOR_MASK;
reg |= FW_WM(wm, HPLL_CURSOR);
- intel_uncore_write(&dev_priv->uncore, DSPFW3(dev_priv), reg);
+ intel_de_write(display, DSPFW3(display), reg);
drm_dbg_kms(&dev_priv->drm, "DSPFW3 register is %x\n", reg);
intel_set_memory_cxsr(display, true);
@@ -805,25 +806,25 @@ static void g4x_write_wm_values(struct drm_i915_private *dev_priv,
for_each_pipe(dev_priv, pipe)
trace_g4x_wm(intel_crtc_for_pipe(display, pipe), wm);
- intel_uncore_write(&dev_priv->uncore, DSPFW1(dev_priv),
- FW_WM(wm->sr.plane, SR) |
- FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |
- FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) |
- FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA));
- intel_uncore_write(&dev_priv->uncore, DSPFW2(dev_priv),
- (wm->fbc_en ? DSPFW_FBC_SR_EN : 0) |
- FW_WM(wm->sr.fbc, FBC_SR) |
- FW_WM(wm->hpll.fbc, FBC_HPLL_SR) |
- FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEB) |
- FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |
- FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA));
- intel_uncore_write(&dev_priv->uncore, DSPFW3(dev_priv),
- (wm->hpll_en ? DSPFW_HPLL_SR_EN : 0) |
- FW_WM(wm->sr.cursor, CURSOR_SR) |
- FW_WM(wm->hpll.cursor, HPLL_CURSOR) |
- FW_WM(wm->hpll.plane, HPLL_SR));
-
- intel_uncore_posting_read(&dev_priv->uncore, DSPFW1(dev_priv));
+ intel_de_write(display, DSPFW1(display),
+ FW_WM(wm->sr.plane, SR) |
+ FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |
+ FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) |
+ FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA));
+ intel_de_write(display, DSPFW2(display),
+ (wm->fbc_en ? DSPFW_FBC_SR_EN : 0) |
+ FW_WM(wm->sr.fbc, FBC_SR) |
+ FW_WM(wm->hpll.fbc, FBC_HPLL_SR) |
+ FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEB) |
+ FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |
+ FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA));
+ intel_de_write(display, DSPFW3(display),
+ (wm->hpll_en ? DSPFW_HPLL_SR_EN : 0) |
+ FW_WM(wm->sr.cursor, CURSOR_SR) |
+ FW_WM(wm->hpll.cursor, HPLL_CURSOR) |
+ FW_WM(wm->hpll.plane, HPLL_SR));
+
+ intel_de_posting_read(display, DSPFW1(display));
}
#define FW_WM_VLV(value, plane) \
@@ -838,11 +839,11 @@ static void vlv_write_wm_values(struct drm_i915_private *dev_priv,
for_each_pipe(dev_priv, pipe) {
trace_vlv_wm(intel_crtc_for_pipe(display, pipe), wm);
- intel_uncore_write(&dev_priv->uncore, VLV_DDL(pipe),
- (wm->ddl[pipe].plane[PLANE_CURSOR] << DDL_CURSOR_SHIFT) |
- (wm->ddl[pipe].plane[PLANE_SPRITE1] << DDL_SPRITE_SHIFT(1)) |
- (wm->ddl[pipe].plane[PLANE_SPRITE0] << DDL_SPRITE_SHIFT(0)) |
- (wm->ddl[pipe].plane[PLANE_PRIMARY] << DDL_PLANE_SHIFT));
+ intel_de_write(display, VLV_DDL(pipe),
+ (wm->ddl[pipe].plane[PLANE_CURSOR] << DDL_CURSOR_SHIFT) |
+ (wm->ddl[pipe].plane[PLANE_SPRITE1] << DDL_SPRITE_SHIFT(1)) |
+ (wm->ddl[pipe].plane[PLANE_SPRITE0] << DDL_SPRITE_SHIFT(0)) |
+ (wm->ddl[pipe].plane[PLANE_PRIMARY] << DDL_PLANE_SHIFT));
}
/*
@@ -850,60 +851,60 @@ static void vlv_write_wm_values(struct drm_i915_private *dev_priv,
* high order bits so that there are no out of bounds values
* present in the registers during the reprogramming.
*/
- intel_uncore_write(&dev_priv->uncore, DSPHOWM, 0);
- intel_uncore_write(&dev_priv->uncore, DSPHOWM1, 0);
- intel_uncore_write(&dev_priv->uncore, DSPFW4, 0);
- intel_uncore_write(&dev_priv->uncore, DSPFW5, 0);
- intel_uncore_write(&dev_priv->uncore, DSPFW6, 0);
-
- intel_uncore_write(&dev_priv->uncore, DSPFW1(dev_priv),
- FW_WM(wm->sr.plane, SR) |
- FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |
- FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) |
- FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA));
- intel_uncore_write(&dev_priv->uncore, DSPFW2(dev_priv),
- FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_SPRITE1], SPRITEB) |
- FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |
- FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA));
- intel_uncore_write(&dev_priv->uncore, DSPFW3(dev_priv),
- FW_WM(wm->sr.cursor, CURSOR_SR));
+ intel_de_write(display, DSPHOWM, 0);
+ intel_de_write(display, DSPHOWM1, 0);
+ intel_de_write(display, DSPFW4, 0);
+ intel_de_write(display, DSPFW5, 0);
+ intel_de_write(display, DSPFW6, 0);
+
+ intel_de_write(display, DSPFW1(display),
+ FW_WM(wm->sr.plane, SR) |
+ FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |
+ FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) |
+ FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA));
+ intel_de_write(display, DSPFW2(display),
+ FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_SPRITE1], SPRITEB) |
+ FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |
+ FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA));
+ intel_de_write(display, DSPFW3(display),
+ FW_WM(wm->sr.cursor, CURSOR_SR));
if (IS_CHERRYVIEW(dev_priv)) {
- intel_uncore_write(&dev_priv->uncore, DSPFW7_CHV,
- FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE1], SPRITED) |
- FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC));
- intel_uncore_write(&dev_priv->uncore, DSPFW8_CHV,
- FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE1], SPRITEF) |
- FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE0], SPRITEE));
- intel_uncore_write(&dev_priv->uncore, DSPFW9_CHV,
- FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_PRIMARY], PLANEC) |
- FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC));
- intel_uncore_write(&dev_priv->uncore, DSPHOWM,
- FW_WM(wm->sr.plane >> 9, SR_HI) |
- FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE1] >> 8, SPRITEF_HI) |
- FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) |
- FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) |
- FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) |
- FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) |
- FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) |
- FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) |
- FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) |
- FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI));
+ intel_de_write(display, DSPFW7_CHV,
+ FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE1], SPRITED) |
+ FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC));
+ intel_de_write(display, DSPFW8_CHV,
+ FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE1], SPRITEF) |
+ FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE0], SPRITEE));
+ intel_de_write(display, DSPFW9_CHV,
+ FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_PRIMARY], PLANEC) |
+ FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC));
+ intel_de_write(display, DSPHOWM,
+ FW_WM(wm->sr.plane >> 9, SR_HI) |
+ FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE1] >> 8, SPRITEF_HI) |
+ FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) |
+ FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) |
+ FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) |
+ FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) |
+ FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) |
+ FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) |
+ FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) |
+ FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI));
} else {
- intel_uncore_write(&dev_priv->uncore, DSPFW7,
- FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE1], SPRITED) |
- FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC));
- intel_uncore_write(&dev_priv->uncore, DSPHOWM,
- FW_WM(wm->sr.plane >> 9, SR_HI) |
- FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) |
- FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) |
- FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) |
- FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) |
- FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) |
- FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI));
+ intel_de_write(display, DSPFW7,
+ FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE1], SPRITED) |
+ FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC));
+ intel_de_write(display, DSPHOWM,
+ FW_WM(wm->sr.plane >> 9, SR_HI) |
+ FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) |
+ FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) |
+ FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) |
+ FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) |
+ FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) |
+ FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI));
}
- intel_uncore_posting_read(&dev_priv->uncore, DSPFW1(dev_priv));
+ intel_de_posting_read(display, DSPFW1(display));
}
#undef FW_WM_VLV
@@ -1857,6 +1858,7 @@ static int vlv_compute_pipe_wm(struct intel_atomic_state *state,
static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_uncore *uncore = &dev_priv->uncore;
const struct intel_crtc_state *crtc_state =
@@ -1891,8 +1893,8 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
switch (crtc->pipe) {
case PIPE_A:
- dsparb = intel_uncore_read_fw(uncore, DSPARB(dev_priv));
- dsparb2 = intel_uncore_read_fw(uncore, DSPARB2);
+ dsparb = intel_de_read_fw(display, DSPARB(display));
+ dsparb2 = intel_de_read_fw(display, DSPARB2);
dsparb &= ~(VLV_FIFO(SPRITEA, 0xff) |
VLV_FIFO(SPRITEB, 0xff));
@@ -1904,12 +1906,12 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
dsparb2 |= (VLV_FIFO(SPRITEA_HI, sprite0_start >> 8) |
VLV_FIFO(SPRITEB_HI, sprite1_start >> 8));
- intel_uncore_write_fw(uncore, DSPARB(dev_priv), dsparb);
- intel_uncore_write_fw(uncore, DSPARB2, dsparb2);
+ intel_de_write_fw(display, DSPARB(display), dsparb);
+ intel_de_write_fw(display, DSPARB2, dsparb2);
break;
case PIPE_B:
- dsparb = intel_uncore_read_fw(uncore, DSPARB(dev_priv));
- dsparb2 = intel_uncore_read_fw(uncore, DSPARB2);
+ dsparb = intel_de_read_fw(display, DSPARB(display));
+ dsparb2 = intel_de_read_fw(display, DSPARB2);
dsparb &= ~(VLV_FIFO(SPRITEC, 0xff) |
VLV_FIFO(SPRITED, 0xff));
@@ -1921,12 +1923,12 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
dsparb2 |= (VLV_FIFO(SPRITEC_HI, sprite0_start >> 8) |
VLV_FIFO(SPRITED_HI, sprite1_start >> 8));
- intel_uncore_write_fw(uncore, DSPARB(dev_priv), dsparb);
- intel_uncore_write_fw(uncore, DSPARB2, dsparb2);
+ intel_de_write_fw(display, DSPARB(display), dsparb);
+ intel_de_write_fw(display, DSPARB2, dsparb2);
break;
case PIPE_C:
- dsparb3 = intel_uncore_read_fw(uncore, DSPARB3);
- dsparb2 = intel_uncore_read_fw(uncore, DSPARB2);
+ dsparb3 = intel_de_read_fw(display, DSPARB3);
+ dsparb2 = intel_de_read_fw(display, DSPARB2);
dsparb3 &= ~(VLV_FIFO(SPRITEE, 0xff) |
VLV_FIFO(SPRITEF, 0xff));
@@ -1938,14 +1940,14 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
dsparb2 |= (VLV_FIFO(SPRITEE_HI, sprite0_start >> 8) |
VLV_FIFO(SPRITEF_HI, sprite1_start >> 8));
- intel_uncore_write_fw(uncore, DSPARB3, dsparb3);
- intel_uncore_write_fw(uncore, DSPARB2, dsparb2);
+ intel_de_write_fw(display, DSPARB3, dsparb3);
+ intel_de_write_fw(display, DSPARB2, dsparb2);
break;
default:
break;
}
- intel_uncore_posting_read_fw(uncore, DSPARB(dev_priv));
+ intel_de_read_fw(display, DSPARB(display));
spin_unlock(&uncore->lock);
}
@@ -2186,17 +2188,17 @@ static void i965_update_wm(struct intel_display *display)
srwm);
/* 965 has limitations... */
- intel_uncore_write(&dev_priv->uncore, DSPFW1(dev_priv),
- FW_WM(srwm, SR) |
- FW_WM(8, CURSORB) |
- FW_WM(8, PLANEB) |
- FW_WM(8, PLANEA));
- intel_uncore_write(&dev_priv->uncore, DSPFW2(dev_priv),
- FW_WM(8, CURSORA) |
- FW_WM(8, PLANEC_OLD));
+ intel_de_write(display, DSPFW1(display),
+ FW_WM(srwm, SR) |
+ FW_WM(8, CURSORB) |
+ FW_WM(8, PLANEB) |
+ FW_WM(8, PLANEA));
+ intel_de_write(display, DSPFW2(display),
+ FW_WM(8, CURSORA) |
+ FW_WM(8, PLANEC_OLD));
/* update cursor SR watermark */
- intel_uncore_write(&dev_priv->uncore, DSPFW3(dev_priv),
- FW_WM(cursor_sr, CURSOR_SR));
+ intel_de_write(display, DSPFW3(display),
+ FW_WM(cursor_sr, CURSOR_SR));
if (cxsr_enabled)
intel_set_memory_cxsr(display, true);
@@ -2339,10 +2341,10 @@ static void i9xx_update_wm(struct intel_display *display)
srwm = 1;
if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
- intel_uncore_write(&dev_priv->uncore, FW_BLC_SELF,
- FW_BLC_SELF_FIFO_MASK | (srwm & 0xff));
+ intel_de_write(display, FW_BLC_SELF,
+ FW_BLC_SELF_FIFO_MASK | (srwm & 0xff));
else
- intel_uncore_write(&dev_priv->uncore, FW_BLC_SELF, srwm & 0x3f);
+ intel_de_write(display, FW_BLC_SELF, srwm & 0x3f);
}
drm_dbg_kms(&dev_priv->drm,
@@ -2356,8 +2358,8 @@ static void i9xx_update_wm(struct intel_display *display)
fwater_lo = fwater_lo | (1 << 24) | (1 << 8);
fwater_hi = fwater_hi | (1 << 8);
- intel_uncore_write(&dev_priv->uncore, FW_BLC, fwater_lo);
- intel_uncore_write(&dev_priv->uncore, FW_BLC2, fwater_hi);
+ intel_de_write(display, FW_BLC, fwater_lo);
+ intel_de_write(display, FW_BLC2, fwater_hi);
if (crtc)
intel_set_memory_cxsr(display, true);
@@ -2378,13 +2380,13 @@ static void i845_update_wm(struct intel_display *display)
&i845_wm_info,
i845_get_fifo_size(dev_priv, PLANE_A),
4, pessimal_latency_ns);
- fwater_lo = intel_uncore_read(&dev_priv->uncore, FW_BLC) & ~0xfff;
+ fwater_lo = intel_de_read(display, FW_BLC) & ~0xfff;
fwater_lo |= (3<<8) | planea_wm;
drm_dbg_kms(&dev_priv->drm,
"Setting FIFO watermarks - A: %d\n", planea_wm);
- intel_uncore_write(&dev_priv->uncore, FW_BLC, fwater_lo);
+ intel_de_write(display, FW_BLC, fwater_lo);
}
/* latency must be in 0.1us units. */
@@ -3326,22 +3328,23 @@ static unsigned int ilk_compute_wm_dirty(struct drm_i915_private *dev_priv,
static bool _ilk_disable_lp_wm(struct drm_i915_private *dev_priv,
unsigned int dirty)
{
+ struct intel_display *display = &dev_priv->display;
struct ilk_wm_values *previous = &dev_priv->display.wm.hw;
bool changed = false;
if (dirty & WM_DIRTY_LP(3) && previous->wm_lp[2] & WM_LP_ENABLE) {
previous->wm_lp[2] &= ~WM_LP_ENABLE;
- intel_uncore_write(&dev_priv->uncore, WM3_LP_ILK, previous->wm_lp[2]);
+ intel_de_write(display, WM3_LP_ILK, previous->wm_lp[2]);
changed = true;
}
if (dirty & WM_DIRTY_LP(2) && previous->wm_lp[1] & WM_LP_ENABLE) {
previous->wm_lp[1] &= ~WM_LP_ENABLE;
- intel_uncore_write(&dev_priv->uncore, WM2_LP_ILK, previous->wm_lp[1]);
+ intel_de_write(display, WM2_LP_ILK, previous->wm_lp[1]);
changed = true;
}
if (dirty & WM_DIRTY_LP(1) && previous->wm_lp[0] & WM_LP_ENABLE) {
previous->wm_lp[0] &= ~WM_LP_ENABLE;
- intel_uncore_write(&dev_priv->uncore, WM1_LP_ILK, previous->wm_lp[0]);
+ intel_de_write(display, WM1_LP_ILK, previous->wm_lp[0]);
changed = true;
}
@@ -3360,6 +3363,7 @@ static bool _ilk_disable_lp_wm(struct drm_i915_private *dev_priv,
static void ilk_write_wm_values(struct drm_i915_private *dev_priv,
struct ilk_wm_values *results)
{
+ struct intel_display *display = &dev_priv->display;
struct ilk_wm_values *previous = &dev_priv->display.wm.hw;
unsigned int dirty;
@@ -3370,44 +3374,44 @@ static void ilk_write_wm_values(struct drm_i915_private *dev_priv,
_ilk_disable_lp_wm(dev_priv, dirty);
if (dirty & WM_DIRTY_PIPE(PIPE_A))
- intel_uncore_write(&dev_priv->uncore, WM0_PIPE_ILK(PIPE_A), results->wm_pipe[0]);
+ intel_de_write(display, WM0_PIPE_ILK(PIPE_A), results->wm_pipe[0]);
if (dirty & WM_DIRTY_PIPE(PIPE_B))
- intel_uncore_write(&dev_priv->uncore, WM0_PIPE_ILK(PIPE_B), results->wm_pipe[1]);
+ intel_de_write(display, WM0_PIPE_ILK(PIPE_B), results->wm_pipe[1]);
if (dirty & WM_DIRTY_PIPE(PIPE_C))
- intel_uncore_write(&dev_priv->uncore, WM0_PIPE_ILK(PIPE_C), results->wm_pipe[2]);
+ intel_de_write(display, WM0_PIPE_ILK(PIPE_C), results->wm_pipe[2]);
if (dirty & WM_DIRTY_DDB) {
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
- intel_uncore_rmw(&dev_priv->uncore, WM_MISC, WM_MISC_DATA_PARTITION_5_6,
- results->partitioning == INTEL_DDB_PART_1_2 ? 0 :
- WM_MISC_DATA_PARTITION_5_6);
+ intel_de_rmw(display, WM_MISC, WM_MISC_DATA_PARTITION_5_6,
+ results->partitioning == INTEL_DDB_PART_1_2 ? 0 :
+ WM_MISC_DATA_PARTITION_5_6);
else
- intel_uncore_rmw(&dev_priv->uncore, DISP_ARB_CTL2, DISP_DATA_PARTITION_5_6,
- results->partitioning == INTEL_DDB_PART_1_2 ? 0 :
- DISP_DATA_PARTITION_5_6);
+ intel_de_rmw(display, DISP_ARB_CTL2, DISP_DATA_PARTITION_5_6,
+ results->partitioning == INTEL_DDB_PART_1_2 ? 0 :
+ DISP_DATA_PARTITION_5_6);
}
if (dirty & WM_DIRTY_FBC)
- intel_uncore_rmw(&dev_priv->uncore, DISP_ARB_CTL, DISP_FBC_WM_DIS,
- results->enable_fbc_wm ? 0 : DISP_FBC_WM_DIS);
+ intel_de_rmw(display, DISP_ARB_CTL, DISP_FBC_WM_DIS,
+ results->enable_fbc_wm ? 0 : DISP_FBC_WM_DIS);
if (dirty & WM_DIRTY_LP(1) &&
previous->wm_lp_spr[0] != results->wm_lp_spr[0])
- intel_uncore_write(&dev_priv->uncore, WM1S_LP_ILK, results->wm_lp_spr[0]);
+ intel_de_write(display, WM1S_LP_ILK, results->wm_lp_spr[0]);
if (DISPLAY_VER(dev_priv) >= 7) {
if (dirty & WM_DIRTY_LP(2) && previous->wm_lp_spr[1] != results->wm_lp_spr[1])
- intel_uncore_write(&dev_priv->uncore, WM2S_LP_IVB, results->wm_lp_spr[1]);
+ intel_de_write(display, WM2S_LP_IVB, results->wm_lp_spr[1]);
if (dirty & WM_DIRTY_LP(3) && previous->wm_lp_spr[2] != results->wm_lp_spr[2])
- intel_uncore_write(&dev_priv->uncore, WM3S_LP_IVB, results->wm_lp_spr[2]);
+ intel_de_write(display, WM3S_LP_IVB, results->wm_lp_spr[2]);
}
if (dirty & WM_DIRTY_LP(1) && previous->wm_lp[0] != results->wm_lp[0])
- intel_uncore_write(&dev_priv->uncore, WM1_LP_ILK, results->wm_lp[0]);
+ intel_de_write(display, WM1_LP_ILK, results->wm_lp[0]);
if (dirty & WM_DIRTY_LP(2) && previous->wm_lp[1] != results->wm_lp[1])
- intel_uncore_write(&dev_priv->uncore, WM2_LP_ILK, results->wm_lp[1]);
+ intel_de_write(display, WM2_LP_ILK, results->wm_lp[1]);
if (dirty & WM_DIRTY_LP(3) && previous->wm_lp[2] != results->wm_lp[2])
- intel_uncore_write(&dev_priv->uncore, WM3_LP_ILK, results->wm_lp[2]);
+ intel_de_write(display, WM3_LP_ILK, results->wm_lp[2]);
dev_priv->display.wm.hw = *results;
}
@@ -3500,6 +3504,7 @@ static void ilk_optimize_watermarks(struct intel_atomic_state *state,
static void ilk_pipe_wm_get_hw_state(struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(crtc);
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
struct ilk_wm_values *hw = &dev_priv->display.wm.hw;
@@ -3507,7 +3512,7 @@ static void ilk_pipe_wm_get_hw_state(struct intel_crtc *crtc)
struct intel_pipe_wm *active = &crtc_state->wm.ilk.optimal;
enum pipe pipe = crtc->pipe;
- hw->wm_pipe[pipe] = intel_uncore_read(&dev_priv->uncore, WM0_PIPE_ILK(pipe));
+ hw->wm_pipe[pipe] = intel_de_read(display, WM0_PIPE_ILK(pipe));
memset(active, 0, sizeof(*active));
@@ -3672,15 +3677,16 @@ void ilk_wm_sanitize(struct intel_display *display)
static void g4x_read_wm_values(struct drm_i915_private *dev_priv,
struct g4x_wm_values *wm)
{
+ struct intel_display *display = &dev_priv->display;
u32 tmp;
- tmp = intel_uncore_read(&dev_priv->uncore, DSPFW1(dev_priv));
+ tmp = intel_de_read(display, DSPFW1(display));
wm->sr.plane = _FW_WM(tmp, SR);
wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB);
wm->pipe[PIPE_B].plane[PLANE_PRIMARY] = _FW_WM(tmp, PLANEB);
wm->pipe[PIPE_A].plane[PLANE_PRIMARY] = _FW_WM(tmp, PLANEA);
- tmp = intel_uncore_read(&dev_priv->uncore, DSPFW2(dev_priv));
+ tmp = intel_de_read(display, DSPFW2(display));
wm->fbc_en = tmp & DSPFW_FBC_SR_EN;
wm->sr.fbc = _FW_WM(tmp, FBC_SR);
wm->hpll.fbc = _FW_WM(tmp, FBC_HPLL_SR);
@@ -3688,7 +3694,7 @@ static void g4x_read_wm_values(struct drm_i915_private *dev_priv,
wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA);
wm->pipe[PIPE_A].plane[PLANE_SPRITE0] = _FW_WM(tmp, SPRITEA);
- tmp = intel_uncore_read(&dev_priv->uncore, DSPFW3(dev_priv));
+ tmp = intel_de_read(display, DSPFW3(display));
wm->hpll_en = tmp & DSPFW_HPLL_SR_EN;
wm->sr.cursor = _FW_WM(tmp, CURSOR_SR);
wm->hpll.cursor = _FW_WM(tmp, HPLL_CURSOR);
@@ -3698,11 +3704,12 @@ static void g4x_read_wm_values(struct drm_i915_private *dev_priv,
static void vlv_read_wm_values(struct drm_i915_private *dev_priv,
struct vlv_wm_values *wm)
{
+ struct intel_display *display = &dev_priv->display;
enum pipe pipe;
u32 tmp;
for_each_pipe(dev_priv, pipe) {
- tmp = intel_uncore_read(&dev_priv->uncore, VLV_DDL(pipe));
+ tmp = intel_de_read(display, VLV_DDL(pipe));
wm->ddl[pipe].plane[PLANE_PRIMARY] =
(tmp >> DDL_PLANE_SHIFT) & (DDL_PRECISION_HIGH | DRAIN_LATENCY_MASK);
@@ -3714,34 +3721,34 @@ static void vlv_read_wm_values(struct drm_i915_private *dev_priv,
(tmp >> DDL_SPRITE_SHIFT(1)) & (DDL_PRECISION_HIGH | DRAIN_LATENCY_MASK);
}
- tmp = intel_uncore_read(&dev_priv->uncore, DSPFW1(dev_priv));
+ tmp = intel_de_read(display, DSPFW1(display));
wm->sr.plane = _FW_WM(tmp, SR);
wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB);
wm->pipe[PIPE_B].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEB);
wm->pipe[PIPE_A].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEA);
- tmp = intel_uncore_read(&dev_priv->uncore, DSPFW2(dev_priv));
+ tmp = intel_de_read(display, DSPFW2(display));
wm->pipe[PIPE_A].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITEB);
wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA);
wm->pipe[PIPE_A].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEA);
- tmp = intel_uncore_read(&dev_priv->uncore, DSPFW3(dev_priv));
+ tmp = intel_de_read(display, DSPFW3(display));
wm->sr.cursor = _FW_WM(tmp, CURSOR_SR);
if (IS_CHERRYVIEW(dev_priv)) {
- tmp = intel_uncore_read(&dev_priv->uncore, DSPFW7_CHV);
+ tmp = intel_de_read(display, DSPFW7_CHV);
wm->pipe[PIPE_B].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITED);
wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEC);
- tmp = intel_uncore_read(&dev_priv->uncore, DSPFW8_CHV);
+ tmp = intel_de_read(display, DSPFW8_CHV);
wm->pipe[PIPE_C].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITEF);
wm->pipe[PIPE_C].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEE);
- tmp = intel_uncore_read(&dev_priv->uncore, DSPFW9_CHV);
+ tmp = intel_de_read(display, DSPFW9_CHV);
wm->pipe[PIPE_C].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEC);
wm->pipe[PIPE_C].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORC);
- tmp = intel_uncore_read(&dev_priv->uncore, DSPHOWM);
+ tmp = intel_de_read(display, DSPHOWM);
wm->sr.plane |= _FW_WM(tmp, SR_HI) << 9;
wm->pipe[PIPE_C].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITEF_HI) << 8;
wm->pipe[PIPE_C].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEE_HI) << 8;
@@ -3753,11 +3760,11 @@ static void vlv_read_wm_values(struct drm_i915_private *dev_priv,
wm->pipe[PIPE_A].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEA_HI) << 8;
wm->pipe[PIPE_A].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEA_HI) << 8;
} else {
- tmp = intel_uncore_read(&dev_priv->uncore, DSPFW7);
+ tmp = intel_de_read(display, DSPFW7);
wm->pipe[PIPE_B].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITED);
wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEC);
- tmp = intel_uncore_read(&dev_priv->uncore, DSPHOWM);
+ tmp = intel_de_read(display, DSPHOWM);
wm->sr.plane |= _FW_WM(tmp, SR_HI) << 9;
wm->pipe[PIPE_B].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITED_HI) << 8;
wm->pipe[PIPE_B].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEC_HI) << 8;
@@ -3779,7 +3786,7 @@ static void g4x_wm_get_hw_state(struct intel_display *display)
g4x_read_wm_values(dev_priv, wm);
- wm->cxsr = intel_uncore_read(&dev_priv->uncore, FW_BLC_SELF) & FW_BLC_SELF_EN;
+ wm->cxsr = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN;
for_each_intel_crtc(&dev_priv->drm, crtc) {
struct intel_crtc_state *crtc_state =
@@ -3924,7 +3931,7 @@ static void vlv_wm_get_hw_state(struct intel_display *display)
vlv_read_wm_values(dev_priv, wm);
- wm->cxsr = intel_uncore_read(&dev_priv->uncore, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
+ wm->cxsr = intel_de_read(display, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
wm->level = VLV_WM_LEVEL_PM2;
if (IS_CHERRYVIEW(dev_priv)) {
@@ -4069,9 +4076,11 @@ static void vlv_wm_sanitize(struct intel_display *display)
*/
static void ilk_init_lp_watermarks(struct drm_i915_private *dev_priv)
{
- intel_uncore_rmw(&dev_priv->uncore, WM3_LP_ILK, WM_LP_ENABLE, 0);
- intel_uncore_rmw(&dev_priv->uncore, WM2_LP_ILK, WM_LP_ENABLE, 0);
- intel_uncore_rmw(&dev_priv->uncore, WM1_LP_ILK, WM_LP_ENABLE, 0);
+ struct intel_display *display = &dev_priv->display;
+
+ intel_de_rmw(display, WM3_LP_ILK, WM_LP_ENABLE, 0);
+ intel_de_rmw(display, WM2_LP_ILK, WM_LP_ENABLE, 0);
+ intel_de_rmw(display, WM1_LP_ILK, WM_LP_ENABLE, 0);
/*
* Don't touch WM_LP_SPRITE_ENABLE here.
@@ -4090,27 +4099,27 @@ static void ilk_wm_get_hw_state(struct intel_display *display)
for_each_intel_crtc(&dev_priv->drm, crtc)
ilk_pipe_wm_get_hw_state(crtc);
- hw->wm_lp[0] = intel_uncore_read(&dev_priv->uncore, WM1_LP_ILK);
- hw->wm_lp[1] = intel_uncore_read(&dev_priv->uncore, WM2_LP_ILK);
- hw->wm_lp[2] = intel_uncore_read(&dev_priv->uncore, WM3_LP_ILK);
+ hw->wm_lp[0] = intel_de_read(display, WM1_LP_ILK);
+ hw->wm_lp[1] = intel_de_read(display, WM2_LP_ILK);
+ hw->wm_lp[2] = intel_de_read(display, WM3_LP_ILK);
- hw->wm_lp_spr[0] = intel_uncore_read(&dev_priv->uncore, WM1S_LP_ILK);
+ hw->wm_lp_spr[0] = intel_de_read(display, WM1S_LP_ILK);
if (DISPLAY_VER(dev_priv) >= 7) {
- hw->wm_lp_spr[1] = intel_uncore_read(&dev_priv->uncore, WM2S_LP_IVB);
- hw->wm_lp_spr[2] = intel_uncore_read(&dev_priv->uncore, WM3S_LP_IVB);
+ hw->wm_lp_spr[1] = intel_de_read(display, WM2S_LP_IVB);
+ hw->wm_lp_spr[2] = intel_de_read(display, WM3S_LP_IVB);
}
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
- hw->partitioning = (intel_uncore_read(&dev_priv->uncore, WM_MISC) &
+ hw->partitioning = (intel_de_read(display, WM_MISC) &
WM_MISC_DATA_PARTITION_5_6) ?
INTEL_DDB_PART_5_6 : INTEL_DDB_PART_1_2;
else if (IS_IVYBRIDGE(dev_priv))
- hw->partitioning = (intel_uncore_read(&dev_priv->uncore, DISP_ARB_CTL2) &
+ hw->partitioning = (intel_de_read(display, DISP_ARB_CTL2) &
DISP_DATA_PARTITION_5_6) ?
INTEL_DDB_PART_5_6 : INTEL_DDB_PART_1_2;
hw->enable_fbc_wm =
- !(intel_uncore_read(&dev_priv->uncore, DISP_ARB_CTL) & DISP_FBC_WM_DIS);
+ !(intel_de_read(display, DISP_ARB_CTL) & DISP_FBC_WM_DIS);
}
static const struct intel_wm_funcs ilk_wm_funcs = {
--
2.39.5
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 7/7] drm/i915/wm: convert i9xx_wm.c internally to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
` (5 preceding siblings ...)
2025-04-03 9:11 ` [PATCH 6/7] drm/i915/wm: convert i9xx_wm.c to intel_de_*() register interface Jani Nikula
@ 2025-04-03 9:11 ` Jani Nikula
2025-04-04 5:08 ` ✓ CI.Patch_applied: success for drm/i915/wm: convert " Patchwork
` (7 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2025-04-03 9:11 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of i9xx_wm.c to struct
intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 822 ++++++++++++-------------
1 file changed, 397 insertions(+), 425 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 49ded623c084..40751f1547b7 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -82,13 +82,14 @@ static const struct cxsr_latency cxsr_latency_table[] = {
{0, 1, 400, 800, 6042, 36042, 6584, 36584}, /* DDR3-800 SC */
};
-static const struct cxsr_latency *pnv_get_cxsr_latency(struct drm_i915_private *i915)
+static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
int i;
for (i = 0; i < ARRAY_SIZE(cxsr_latency_table); i++) {
const struct cxsr_latency *latency = &cxsr_latency_table[i];
- bool is_desktop = !IS_MOBILE(i915);
+ bool is_desktop = !display->platform.mobile;
if (is_desktop == latency->is_desktop &&
i915->is_ddr3 == latency->is_ddr3 &&
@@ -97,15 +98,16 @@ static const struct cxsr_latency *pnv_get_cxsr_latency(struct drm_i915_private *
return latency;
}
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"Could not find CxSR latency for DDR%s, FSB %u kHz, MEM %u kHz\n",
i915->is_ddr3 ? "3" : "2", i915->fsb_freq, i915->mem_freq);
return NULL;
}
-static void chv_set_memory_dvfs(struct drm_i915_private *dev_priv, bool enable)
+static void chv_set_memory_dvfs(struct intel_display *display, bool enable)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 val;
vlv_punit_get(dev_priv);
@@ -121,14 +123,15 @@ static void chv_set_memory_dvfs(struct drm_i915_private *dev_priv, bool enable)
if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) &
FORCE_DDR_FREQ_REQ_ACK) == 0, 3))
- drm_err(&dev_priv->drm,
+ drm_err(display->drm,
"timed out waiting for Punit DDR DVFS request\n");
vlv_punit_put(dev_priv);
}
-static void chv_set_memory_pm5(struct drm_i915_private *dev_priv, bool enable)
+static void chv_set_memory_pm5(struct intel_display *display, bool enable)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 val;
vlv_punit_get(dev_priv);
@@ -146,21 +149,20 @@ static void chv_set_memory_pm5(struct drm_i915_private *dev_priv, bool enable)
#define FW_WM(value, plane) \
(((value) << DSPFW_ ## plane ## _SHIFT) & DSPFW_ ## plane ## _MASK)
-static bool _intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enable)
+static bool _intel_set_memory_cxsr(struct intel_display *display, bool enable)
{
- struct intel_display *display = &dev_priv->display;
bool was_enabled;
u32 val;
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ if (display->platform.valleyview || display->platform.cherryview) {
was_enabled = intel_de_read(display, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
intel_de_write(display, FW_BLC_SELF_VLV, enable ? FW_CSPWRDWNEN : 0);
intel_de_posting_read(display, FW_BLC_SELF_VLV);
- } else if (IS_G4X(dev_priv) || IS_I965GM(dev_priv)) {
+ } else if (display->platform.g4x || display->platform.i965gm) {
was_enabled = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN;
intel_de_write(display, FW_BLC_SELF, enable ? FW_BLC_SELF_EN : 0);
intel_de_posting_read(display, FW_BLC_SELF);
- } else if (IS_PINEVIEW(dev_priv)) {
+ } else if (display->platform.pineview) {
val = intel_de_read(display, DSPFW3(display));
was_enabled = val & PINEVIEW_SELF_REFRESH_EN;
if (enable)
@@ -169,13 +171,13 @@ static bool _intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enabl
val &= ~PINEVIEW_SELF_REFRESH_EN;
intel_de_write(display, DSPFW3(display), val);
intel_de_posting_read(display, DSPFW3(display));
- } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv)) {
+ } else if (display->platform.i945g || display->platform.i945gm) {
was_enabled = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN;
val = enable ? _MASKED_BIT_ENABLE(FW_BLC_SELF_EN) :
_MASKED_BIT_DISABLE(FW_BLC_SELF_EN);
intel_de_write(display, FW_BLC_SELF, val);
intel_de_posting_read(display, FW_BLC_SELF);
- } else if (IS_I915GM(dev_priv)) {
+ } else if (display->platform.i915gm) {
/*
* FIXME can't find a bit like this for 915G, and
* yet it does have the related watermark in
@@ -192,7 +194,7 @@ static bool _intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enabl
trace_intel_memory_cxsr(display, was_enabled, enable);
- drm_dbg_kms(&dev_priv->drm, "memory self-refresh is %s (was %s)\n",
+ drm_dbg_kms(display->drm, "memory self-refresh is %s (was %s)\n",
str_enabled_disabled(enable),
str_enabled_disabled(was_enabled));
@@ -238,16 +240,15 @@ static bool _intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enabl
*/
bool intel_set_memory_cxsr(struct intel_display *display, bool enable)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
bool ret;
- mutex_lock(&dev_priv->display.wm.wm_mutex);
- ret = _intel_set_memory_cxsr(dev_priv, enable);
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
- dev_priv->display.wm.vlv.cxsr = enable;
- else if (IS_G4X(dev_priv))
- dev_priv->display.wm.g4x.cxsr = enable;
- mutex_unlock(&dev_priv->display.wm.wm_mutex);
+ mutex_lock(&display->wm.wm_mutex);
+ ret = _intel_set_memory_cxsr(display, enable);
+ if (display->platform.valleyview || display->platform.cherryview)
+ display->wm.vlv.cxsr = enable;
+ else if (display->platform.g4x)
+ display->wm.g4x.cxsr = enable;
+ mutex_unlock(&display->wm.wm_mutex);
return ret;
}
@@ -310,10 +311,9 @@ static void vlv_get_fifo_size(struct intel_crtc_state *crtc_state)
fifo_state->plane[PLANE_CURSOR] = 63;
}
-static int i9xx_get_fifo_size(struct drm_i915_private *dev_priv,
+static int i9xx_get_fifo_size(struct intel_display *display,
enum i9xx_plane_id i9xx_plane)
{
- struct intel_display *display = &dev_priv->display;
u32 dsparb = intel_de_read(display, DSPARB(display));
int size;
@@ -321,16 +321,15 @@ static int i9xx_get_fifo_size(struct drm_i915_private *dev_priv,
if (i9xx_plane == PLANE_B)
size = ((dsparb >> DSPARB_CSTART_SHIFT) & 0x7f) - size;
- drm_dbg_kms(&dev_priv->drm, "FIFO size - (0x%08x) %c: %d\n",
+ drm_dbg_kms(display->drm, "FIFO size - (0x%08x) %c: %d\n",
dsparb, plane_name(i9xx_plane), size);
return size;
}
-static int i830_get_fifo_size(struct drm_i915_private *dev_priv,
+static int i830_get_fifo_size(struct intel_display *display,
enum i9xx_plane_id i9xx_plane)
{
- struct intel_display *display = &dev_priv->display;
u32 dsparb = intel_de_read(display, DSPARB(display));
int size;
@@ -339,23 +338,22 @@ static int i830_get_fifo_size(struct drm_i915_private *dev_priv,
size = ((dsparb >> DSPARB_BEND_SHIFT) & 0x1ff) - size;
size >>= 1; /* Convert to cachelines */
- drm_dbg_kms(&dev_priv->drm, "FIFO size - (0x%08x) %c: %d\n",
+ drm_dbg_kms(display->drm, "FIFO size - (0x%08x) %c: %d\n",
dsparb, plane_name(i9xx_plane), size);
return size;
}
-static int i845_get_fifo_size(struct drm_i915_private *dev_priv,
+static int i845_get_fifo_size(struct intel_display *display,
enum i9xx_plane_id i9xx_plane)
{
- struct intel_display *display = &dev_priv->display;
u32 dsparb = intel_de_read(display, DSPARB(display));
int size;
size = dsparb & 0x7f;
size >>= 2; /* Convert to cachelines */
- drm_dbg_kms(&dev_priv->drm, "FIFO size - (0x%08x) %c: %d\n",
+ drm_dbg_kms(display->drm, "FIFO size - (0x%08x) %c: %d\n",
dsparb, plane_name(i9xx_plane), size);
return size;
@@ -540,7 +538,7 @@ static unsigned int intel_wm_method2(unsigned int pixel_rate,
/**
* intel_calculate_wm - calculate watermark level
- * @i915: the device
+ * @display: display device
* @pixel_rate: pixel clock
* @wm: chip FIFO params
* @fifo_size: size of the FIFO buffer
@@ -558,7 +556,7 @@ static unsigned int intel_wm_method2(unsigned int pixel_rate,
* past the watermark point. If the FIFO drains completely, a FIFO underrun
* will occur, and a display engine hang could result.
*/
-static unsigned int intel_calculate_wm(struct drm_i915_private *i915,
+static unsigned int intel_calculate_wm(struct intel_display *display,
int pixel_rate,
const struct intel_watermark_params *wm,
int fifo_size, int cpp,
@@ -576,10 +574,10 @@ static unsigned int intel_calculate_wm(struct drm_i915_private *i915,
latency_ns / 100);
entries = DIV_ROUND_UP(entries, wm->cacheline_size) +
wm->guard_size;
- drm_dbg_kms(&i915->drm, "FIFO entries required for mode: %d\n", entries);
+ drm_dbg_kms(display->drm, "FIFO entries required for mode: %d\n", entries);
wm_size = fifo_size - entries;
- drm_dbg_kms(&i915->drm, "FIFO watermark level: %d\n", wm_size);
+ drm_dbg_kms(display->drm, "FIFO watermark level: %d\n", wm_size);
/* Don't promote wm_size to unsigned... */
if (wm_size > wm->max_wm)
@@ -629,11 +627,11 @@ static bool intel_crtc_active(struct intel_crtc *crtc)
crtc->config->hw.adjusted_mode.crtc_clock;
}
-static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv)
+static struct intel_crtc *single_enabled_crtc(struct intel_display *display)
{
struct intel_crtc *crtc, *enabled = NULL;
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
if (intel_crtc_active(crtc)) {
if (enabled)
return NULL;
@@ -646,20 +644,19 @@ static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv)
static void pnv_update_wm(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
const struct cxsr_latency *latency;
u32 reg;
unsigned int wm;
- latency = pnv_get_cxsr_latency(dev_priv);
+ latency = pnv_get_cxsr_latency(display);
if (!latency) {
- drm_dbg_kms(&dev_priv->drm, "Unknown FSB/MEM, disabling CxSR\n");
+ drm_dbg_kms(display->drm, "Unknown FSB/MEM, disabling CxSR\n");
intel_set_memory_cxsr(display, false);
return;
}
- crtc = single_enabled_crtc(dev_priv);
+ crtc = single_enabled_crtc(display);
if (crtc) {
const struct drm_framebuffer *fb =
crtc->base.primary->state->fb;
@@ -667,7 +664,7 @@ static void pnv_update_wm(struct intel_display *display)
int cpp = fb->format->cpp[0];
/* Display SR */
- wm = intel_calculate_wm(dev_priv, pixel_rate,
+ wm = intel_calculate_wm(display, pixel_rate,
&pnv_display_wm,
pnv_display_wm.fifo_size,
cpp, latency->display_sr);
@@ -675,10 +672,10 @@ static void pnv_update_wm(struct intel_display *display)
reg &= ~DSPFW_SR_MASK;
reg |= FW_WM(wm, SR);
intel_de_write(display, DSPFW1(display), reg);
- drm_dbg_kms(&dev_priv->drm, "DSPFW1 register is %x\n", reg);
+ drm_dbg_kms(display->drm, "DSPFW1 register is %x\n", reg);
/* cursor SR */
- wm = intel_calculate_wm(dev_priv, pixel_rate,
+ wm = intel_calculate_wm(display, pixel_rate,
&pnv_cursor_wm,
pnv_display_wm.fifo_size,
4, latency->cursor_sr);
@@ -686,7 +683,7 @@ static void pnv_update_wm(struct intel_display *display)
DSPFW_CURSOR_SR_MASK, FW_WM(wm, CURSOR_SR));
/* Display HPLL off SR */
- wm = intel_calculate_wm(dev_priv, pixel_rate,
+ wm = intel_calculate_wm(display, pixel_rate,
&pnv_display_hplloff_wm,
pnv_display_hplloff_wm.fifo_size,
cpp, latency->display_hpll_disable);
@@ -694,7 +691,7 @@ static void pnv_update_wm(struct intel_display *display)
DSPFW_HPLL_SR_MASK, FW_WM(wm, HPLL_SR));
/* cursor HPLL off SR */
- wm = intel_calculate_wm(dev_priv, pixel_rate,
+ wm = intel_calculate_wm(display, pixel_rate,
&pnv_cursor_hplloff_wm,
pnv_display_hplloff_wm.fifo_size,
4, latency->cursor_hpll_disable);
@@ -702,7 +699,7 @@ static void pnv_update_wm(struct intel_display *display)
reg &= ~DSPFW_HPLL_CURSOR_MASK;
reg |= FW_WM(wm, HPLL_CURSOR);
intel_de_write(display, DSPFW3(display), reg);
- drm_dbg_kms(&dev_priv->drm, "DSPFW3 register is %x\n", reg);
+ drm_dbg_kms(display->drm, "DSPFW3 register is %x\n", reg);
intel_set_memory_cxsr(display, true);
} else {
@@ -797,13 +794,12 @@ static unsigned int g4x_tlb_miss_wa(int fifo_size, int width, int cpp)
return max(0, tlb_miss);
}
-static void g4x_write_wm_values(struct drm_i915_private *dev_priv,
+static void g4x_write_wm_values(struct intel_display *display,
const struct g4x_wm_values *wm)
{
- struct intel_display *display = &dev_priv->display;
enum pipe pipe;
- for_each_pipe(dev_priv, pipe)
+ for_each_pipe(display, pipe)
trace_g4x_wm(intel_crtc_for_pipe(display, pipe), wm);
intel_de_write(display, DSPFW1(display),
@@ -830,13 +826,12 @@ static void g4x_write_wm_values(struct drm_i915_private *dev_priv,
#define FW_WM_VLV(value, plane) \
(((value) << DSPFW_ ## plane ## _SHIFT) & DSPFW_ ## plane ## _MASK_VLV)
-static void vlv_write_wm_values(struct drm_i915_private *dev_priv,
+static void vlv_write_wm_values(struct intel_display *display,
const struct vlv_wm_values *wm)
{
- struct intel_display *display = &dev_priv->display;
enum pipe pipe;
- for_each_pipe(dev_priv, pipe) {
+ for_each_pipe(display, pipe) {
trace_vlv_wm(intel_crtc_for_pipe(display, pipe), wm);
intel_de_write(display, VLV_DDL(pipe),
@@ -869,7 +864,7 @@ static void vlv_write_wm_values(struct drm_i915_private *dev_priv,
intel_de_write(display, DSPFW3(display),
FW_WM(wm->sr.cursor, CURSOR_SR));
- if (IS_CHERRYVIEW(dev_priv)) {
+ if (display->platform.cherryview) {
intel_de_write(display, DSPFW7_CHV,
FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE1], SPRITED) |
FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC));
@@ -909,14 +904,14 @@ static void vlv_write_wm_values(struct drm_i915_private *dev_priv,
#undef FW_WM_VLV
-static void g4x_setup_wm_latency(struct drm_i915_private *dev_priv)
+static void g4x_setup_wm_latency(struct intel_display *display)
{
/* all latencies in usec */
- dev_priv->display.wm.pri_latency[G4X_WM_LEVEL_NORMAL] = 5;
- dev_priv->display.wm.pri_latency[G4X_WM_LEVEL_SR] = 12;
- dev_priv->display.wm.pri_latency[G4X_WM_LEVEL_HPLL] = 35;
+ display->wm.pri_latency[G4X_WM_LEVEL_NORMAL] = 5;
+ display->wm.pri_latency[G4X_WM_LEVEL_SR] = 12;
+ display->wm.pri_latency[G4X_WM_LEVEL_HPLL] = 35;
- dev_priv->display.wm.num_levels = G4X_WM_LEVEL_HPLL + 1;
+ display->wm.num_levels = G4X_WM_LEVEL_HPLL + 1;
}
static int g4x_plane_fifo_size(enum plane_id plane_id, int level)
@@ -965,11 +960,11 @@ static u16 g4x_compute_wm(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state,
int level)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct drm_display_mode *pipe_mode =
&crtc_state->hw.pipe_mode;
- unsigned int latency = dev_priv->display.wm.pri_latency[level] * 10;
+ unsigned int latency = display->wm.pri_latency[level] * 10;
unsigned int pixel_rate, htotal, cpp, width, wm;
if (latency == 0)
@@ -1020,10 +1015,10 @@ static u16 g4x_compute_wm(const struct intel_crtc_state *crtc_state,
static bool g4x_raw_plane_wm_set(struct intel_crtc_state *crtc_state,
int level, enum plane_id plane_id, u16 value)
{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(crtc_state);
bool dirty = false;
- for (; level < dev_priv->display.wm.num_levels; level++) {
+ for (; level < display->wm.num_levels; level++) {
struct g4x_pipe_wm *raw = &crtc_state->wm.g4x.raw[level];
dirty |= raw->plane[plane_id] != value;
@@ -1036,13 +1031,13 @@ static bool g4x_raw_plane_wm_set(struct intel_crtc_state *crtc_state,
static bool g4x_raw_fbc_wm_set(struct intel_crtc_state *crtc_state,
int level, u16 value)
{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(crtc_state);
bool dirty = false;
/* NORMAL level doesn't have an FBC watermark */
level = max(level, G4X_WM_LEVEL_SR);
- for (; level < dev_priv->display.wm.num_levels; level++) {
+ for (; level < display->wm.num_levels; level++) {
struct g4x_pipe_wm *raw = &crtc_state->wm.g4x.raw[level];
dirty |= raw->fbc != value;
@@ -1059,8 +1054,8 @@ static u32 ilk_compute_fbc_wm(const struct intel_crtc_state *crtc_state,
static bool g4x_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
enum plane_id plane_id = plane->id;
bool dirty = false;
int level;
@@ -1072,7 +1067,7 @@ static bool g4x_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,
goto out;
}
- for (level = 0; level < dev_priv->display.wm.num_levels; level++) {
+ for (level = 0; level < display->wm.num_levels; level++) {
struct g4x_pipe_wm *raw = &crtc_state->wm.g4x.raw[level];
int wm, max_wm;
@@ -1112,7 +1107,7 @@ static bool g4x_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,
out:
if (dirty) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"%s watermarks: normal=%d, SR=%d, HPLL=%d\n",
plane->base.name,
crtc_state->wm.g4x.raw[G4X_WM_LEVEL_NORMAL].plane[plane_id],
@@ -1120,7 +1115,7 @@ static bool g4x_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,
crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].plane[plane_id]);
if (plane_id == PLANE_PRIMARY)
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"FBC watermarks: SR=%d, HPLL=%d\n",
crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc,
crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].fbc);
@@ -1140,9 +1135,9 @@ static bool g4x_raw_plane_wm_is_valid(const struct intel_crtc_state *crtc_state,
static bool g4x_raw_crtc_wm_is_valid(const struct intel_crtc_state *crtc_state,
int level)
{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(crtc_state);
- if (level >= dev_priv->display.wm.num_levels)
+ if (level >= display->wm.num_levels)
return false;
return g4x_raw_plane_wm_is_valid(crtc_state, PLANE_PRIMARY, level) &&
@@ -1284,7 +1279,7 @@ static int g4x_compute_pipe_wm(struct intel_atomic_state *state,
static int g4x_compute_intermediate_wm(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(state);
struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
const struct intel_crtc_state *old_crtc_state =
@@ -1314,7 +1309,7 @@ static int g4x_compute_intermediate_wm(struct intel_atomic_state *state,
max(optimal->wm.plane[plane_id],
active->wm.plane[plane_id]);
- drm_WARN_ON(&dev_priv->drm, intermediate->wm.plane[plane_id] >
+ drm_WARN_ON(display->drm, intermediate->wm.plane[plane_id] >
g4x_plane_fifo_size(plane_id, G4X_WM_LEVEL_NORMAL));
}
@@ -1332,23 +1327,23 @@ static int g4x_compute_intermediate_wm(struct intel_atomic_state *state,
intermediate->hpll.fbc = max(optimal->hpll.fbc,
active->hpll.fbc);
- drm_WARN_ON(&dev_priv->drm,
+ drm_WARN_ON(display->drm,
(intermediate->sr.plane >
g4x_plane_fifo_size(PLANE_PRIMARY, G4X_WM_LEVEL_SR) ||
intermediate->sr.cursor >
g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_SR)) &&
intermediate->cxsr);
- drm_WARN_ON(&dev_priv->drm,
+ drm_WARN_ON(display->drm,
(intermediate->sr.plane >
g4x_plane_fifo_size(PLANE_PRIMARY, G4X_WM_LEVEL_HPLL) ||
intermediate->sr.cursor >
g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_HPLL)) &&
intermediate->hpll_en);
- drm_WARN_ON(&dev_priv->drm,
+ drm_WARN_ON(display->drm,
intermediate->sr.fbc > g4x_fbc_fifo_size(1) &&
intermediate->fbc_en && intermediate->cxsr);
- drm_WARN_ON(&dev_priv->drm,
+ drm_WARN_ON(display->drm,
intermediate->hpll.fbc > g4x_fbc_fifo_size(2) &&
intermediate->fbc_en && intermediate->hpll_en);
@@ -1379,7 +1374,7 @@ static int g4x_compute_watermarks(struct intel_atomic_state *state,
return 0;
}
-static void g4x_merge_wm(struct drm_i915_private *dev_priv,
+static void g4x_merge_wm(struct intel_display *display,
struct g4x_wm_values *wm)
{
struct intel_crtc *crtc;
@@ -1389,7 +1384,7 @@ static void g4x_merge_wm(struct drm_i915_private *dev_priv,
wm->hpll_en = true;
wm->fbc_en = true;
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
const struct g4x_wm_state *wm_state = &crtc->wm.active.g4x;
if (!crtc->active)
@@ -1411,7 +1406,7 @@ static void g4x_merge_wm(struct drm_i915_private *dev_priv,
wm->fbc_en = false;
}
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
const struct g4x_wm_state *wm_state = &crtc->wm.active.g4x;
enum pipe pipe = crtc->pipe;
@@ -1423,23 +1418,23 @@ static void g4x_merge_wm(struct drm_i915_private *dev_priv,
}
}
-static void g4x_program_watermarks(struct drm_i915_private *dev_priv)
+static void g4x_program_watermarks(struct intel_display *display)
{
- struct g4x_wm_values *old_wm = &dev_priv->display.wm.g4x;
+ struct g4x_wm_values *old_wm = &display->wm.g4x;
struct g4x_wm_values new_wm = {};
- g4x_merge_wm(dev_priv, &new_wm);
+ g4x_merge_wm(display, &new_wm);
if (memcmp(old_wm, &new_wm, sizeof(new_wm)) == 0)
return;
if (is_disabling(old_wm->cxsr, new_wm.cxsr, true))
- _intel_set_memory_cxsr(dev_priv, false);
+ _intel_set_memory_cxsr(display, false);
- g4x_write_wm_values(dev_priv, &new_wm);
+ g4x_write_wm_values(display, &new_wm);
if (is_enabling(old_wm->cxsr, new_wm.cxsr, true))
- _intel_set_memory_cxsr(dev_priv, true);
+ _intel_set_memory_cxsr(display, true);
*old_wm = new_wm;
}
@@ -1447,30 +1442,30 @@ static void g4x_program_watermarks(struct drm_i915_private *dev_priv)
static void g4x_initial_watermarks(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
const struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- mutex_lock(&dev_priv->display.wm.wm_mutex);
+ mutex_lock(&display->wm.wm_mutex);
crtc->wm.active.g4x = crtc_state->wm.g4x.intermediate;
- g4x_program_watermarks(dev_priv);
- mutex_unlock(&dev_priv->display.wm.wm_mutex);
+ g4x_program_watermarks(display);
+ mutex_unlock(&display->wm.wm_mutex);
}
static void g4x_optimize_watermarks(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
const struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
if (!crtc_state->wm.need_postvbl_update)
return;
- mutex_lock(&dev_priv->display.wm.wm_mutex);
+ mutex_lock(&display->wm.wm_mutex);
crtc->wm.active.g4x = crtc_state->wm.g4x.optimal;
- g4x_program_watermarks(dev_priv);
- mutex_unlock(&dev_priv->display.wm.wm_mutex);
+ g4x_program_watermarks(display);
+ mutex_unlock(&display->wm.wm_mutex);
}
/* latency must be in 0.1us units. */
@@ -1489,18 +1484,18 @@ static unsigned int vlv_wm_method2(unsigned int pixel_rate,
return ret;
}
-static void vlv_setup_wm_latency(struct drm_i915_private *dev_priv)
+static void vlv_setup_wm_latency(struct intel_display *display)
{
/* all latencies in usec */
- dev_priv->display.wm.pri_latency[VLV_WM_LEVEL_PM2] = 3;
+ display->wm.pri_latency[VLV_WM_LEVEL_PM2] = 3;
- dev_priv->display.wm.num_levels = VLV_WM_LEVEL_PM2 + 1;
+ display->wm.num_levels = VLV_WM_LEVEL_PM2 + 1;
- if (IS_CHERRYVIEW(dev_priv)) {
- dev_priv->display.wm.pri_latency[VLV_WM_LEVEL_PM5] = 12;
- dev_priv->display.wm.pri_latency[VLV_WM_LEVEL_DDR_DVFS] = 33;
+ if (display->platform.cherryview) {
+ display->wm.pri_latency[VLV_WM_LEVEL_PM5] = 12;
+ display->wm.pri_latency[VLV_WM_LEVEL_DDR_DVFS] = 33;
- dev_priv->display.wm.num_levels = VLV_WM_LEVEL_DDR_DVFS + 1;
+ display->wm.num_levels = VLV_WM_LEVEL_DDR_DVFS + 1;
}
}
@@ -1508,13 +1503,13 @@ static u16 vlv_compute_wm_level(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state,
int level)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct drm_display_mode *pipe_mode =
&crtc_state->hw.pipe_mode;
unsigned int pixel_rate, htotal, cpp, width, wm;
- if (dev_priv->display.wm.pri_latency[level] == 0)
+ if (display->wm.pri_latency[level] == 0)
return USHRT_MAX;
if (!intel_wm_plane_visible(crtc_state, plane_state))
@@ -1535,7 +1530,7 @@ static u16 vlv_compute_wm_level(const struct intel_crtc_state *crtc_state,
wm = 63;
} else {
wm = vlv_wm_method2(pixel_rate, htotal, width, cpp,
- dev_priv->display.wm.pri_latency[level] * 10);
+ display->wm.pri_latency[level] * 10);
}
return min_t(unsigned int, wm, USHRT_MAX);
@@ -1549,8 +1544,8 @@ static bool vlv_need_sprite0_fifo_workaround(unsigned int active_planes)
static int vlv_compute_fifo(struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
const struct g4x_pipe_wm *raw =
&crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2];
struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state;
@@ -1619,11 +1614,11 @@ static int vlv_compute_fifo(struct intel_crtc_state *crtc_state)
fifo_left -= plane_extra;
}
- drm_WARN_ON(&dev_priv->drm, active_planes != 0 && fifo_left != 0);
+ drm_WARN_ON(display->drm, active_planes != 0 && fifo_left != 0);
/* give it all to the first plane if none are active */
if (active_planes == 0) {
- drm_WARN_ON(&dev_priv->drm, fifo_left != fifo_size);
+ drm_WARN_ON(display->drm, fifo_left != fifo_size);
fifo_state->plane[PLANE_PRIMARY] = fifo_left;
}
@@ -1634,9 +1629,9 @@ static int vlv_compute_fifo(struct intel_crtc_state *crtc_state)
static void vlv_invalidate_wms(struct intel_crtc *crtc,
struct vlv_wm_state *wm_state, int level)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
- for (; level < dev_priv->display.wm.num_levels; level++) {
+ for (; level < display->wm.num_levels; level++) {
enum plane_id plane_id;
for_each_plane_id_on_crtc(crtc, plane_id)
@@ -1662,10 +1657,10 @@ static u16 vlv_invert_wm_value(u16 wm, u16 fifo_size)
static bool vlv_raw_plane_wm_set(struct intel_crtc_state *crtc_state,
int level, enum plane_id plane_id, u16 value)
{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(crtc_state);
bool dirty = false;
- for (; level < dev_priv->display.wm.num_levels; level++) {
+ for (; level < display->wm.num_levels; level++) {
struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];
dirty |= raw->plane[plane_id] != value;
@@ -1678,8 +1673,8 @@ static bool vlv_raw_plane_wm_set(struct intel_crtc_state *crtc_state,
static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
enum plane_id plane_id = plane->id;
int level;
bool dirty = false;
@@ -1689,7 +1684,7 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,
goto out;
}
- for (level = 0; level < dev_priv->display.wm.num_levels; level++) {
+ for (level = 0; level < display->wm.num_levels; level++) {
struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];
int wm = vlv_compute_wm_level(crtc_state, plane_state, level);
int max_wm = plane_id == PLANE_CURSOR ? 63 : 511;
@@ -1706,7 +1701,7 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,
out:
if (dirty)
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"%s watermarks: PM2=%d, PM5=%d, DDR DVFS=%d\n",
plane->base.name,
crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2].plane[plane_id],
@@ -1737,8 +1732,8 @@ static bool vlv_raw_crtc_wm_is_valid(const struct intel_crtc_state *crtc_state,
static int _vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
const struct vlv_fifo_state *fifo_state =
&crtc_state->wm.vlv.fifo_state;
@@ -1748,7 +1743,7 @@ static int _vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
int level;
/* initially allow all levels */
- wm_state->num_levels = dev_priv->display.wm.num_levels;
+ wm_state->num_levels = display->wm.num_levels;
/*
* Note that enabling cxsr with no primary/sprite planes
* enabled can wedge the pipe. Hence we only allow cxsr
@@ -1758,7 +1753,7 @@ static int _vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
for (level = 0; level < wm_state->num_levels; level++) {
const struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];
- const int sr_fifo_size = INTEL_NUM_PIPES(dev_priv) * 512 - 1;
+ const int sr_fifo_size = INTEL_NUM_PIPES(display) * 512 - 1;
if (!vlv_raw_crtc_wm_is_valid(crtc_state, level))
break;
@@ -1875,8 +1870,8 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
sprite1_start = fifo_state->plane[PLANE_SPRITE0] + sprite0_start;
fifo_size = fifo_state->plane[PLANE_SPRITE1] + sprite1_start;
- drm_WARN_ON(&dev_priv->drm, fifo_state->plane[PLANE_CURSOR] != 63);
- drm_WARN_ON(&dev_priv->drm, fifo_size != 511);
+ drm_WARN_ON(display->drm, fifo_state->plane[PLANE_CURSOR] != 63);
+ drm_WARN_ON(display->drm, fifo_size != 511);
trace_vlv_fifo_size(crtc, sprite0_start, sprite1_start, fifo_size);
@@ -2022,16 +2017,16 @@ static int vlv_compute_watermarks(struct intel_atomic_state *state,
return 0;
}
-static void vlv_merge_wm(struct drm_i915_private *dev_priv,
+static void vlv_merge_wm(struct intel_display *display,
struct vlv_wm_values *wm)
{
struct intel_crtc *crtc;
int num_active_pipes = 0;
- wm->level = dev_priv->display.wm.num_levels - 1;
+ wm->level = display->wm.num_levels - 1;
wm->cxsr = true;
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;
if (!crtc->active)
@@ -2050,7 +2045,7 @@ static void vlv_merge_wm(struct drm_i915_private *dev_priv,
if (num_active_pipes > 1)
wm->level = VLV_WM_LEVEL_PM2;
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;
enum pipe pipe = crtc->pipe;
@@ -2065,35 +2060,35 @@ static void vlv_merge_wm(struct drm_i915_private *dev_priv,
}
}
-static void vlv_program_watermarks(struct drm_i915_private *dev_priv)
+static void vlv_program_watermarks(struct intel_display *display)
{
- struct vlv_wm_values *old_wm = &dev_priv->display.wm.vlv;
+ struct vlv_wm_values *old_wm = &display->wm.vlv;
struct vlv_wm_values new_wm = {};
- vlv_merge_wm(dev_priv, &new_wm);
+ vlv_merge_wm(display, &new_wm);
if (memcmp(old_wm, &new_wm, sizeof(new_wm)) == 0)
return;
if (is_disabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_DDR_DVFS))
- chv_set_memory_dvfs(dev_priv, false);
+ chv_set_memory_dvfs(display, false);
if (is_disabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_PM5))
- chv_set_memory_pm5(dev_priv, false);
+ chv_set_memory_pm5(display, false);
if (is_disabling(old_wm->cxsr, new_wm.cxsr, true))
- _intel_set_memory_cxsr(dev_priv, false);
+ _intel_set_memory_cxsr(display, false);
- vlv_write_wm_values(dev_priv, &new_wm);
+ vlv_write_wm_values(display, &new_wm);
if (is_enabling(old_wm->cxsr, new_wm.cxsr, true))
- _intel_set_memory_cxsr(dev_priv, true);
+ _intel_set_memory_cxsr(display, true);
if (is_enabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_PM5))
- chv_set_memory_pm5(dev_priv, true);
+ chv_set_memory_pm5(display, true);
if (is_enabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_DDR_DVFS))
- chv_set_memory_dvfs(dev_priv, true);
+ chv_set_memory_dvfs(display, true);
*old_wm = new_wm;
}
@@ -2101,42 +2096,41 @@ static void vlv_program_watermarks(struct drm_i915_private *dev_priv)
static void vlv_initial_watermarks(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
const struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- mutex_lock(&dev_priv->display.wm.wm_mutex);
+ mutex_lock(&display->wm.wm_mutex);
crtc->wm.active.vlv = crtc_state->wm.vlv.intermediate;
- vlv_program_watermarks(dev_priv);
- mutex_unlock(&dev_priv->display.wm.wm_mutex);
+ vlv_program_watermarks(display);
+ mutex_unlock(&display->wm.wm_mutex);
}
static void vlv_optimize_watermarks(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
const struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
if (!crtc_state->wm.need_postvbl_update)
return;
- mutex_lock(&dev_priv->display.wm.wm_mutex);
+ mutex_lock(&display->wm.wm_mutex);
crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;
- vlv_program_watermarks(dev_priv);
- mutex_unlock(&dev_priv->display.wm.wm_mutex);
+ vlv_program_watermarks(display);
+ mutex_unlock(&display->wm.wm_mutex);
}
static void i965_update_wm(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
int srwm = 1;
int cursor_sr = 16;
bool cxsr_enabled;
/* Calc sr entries for one plane configs */
- crtc = single_enabled_crtc(dev_priv);
+ crtc = single_enabled_crtc(display);
if (crtc) {
/* self-refresh has much higher latency */
static const int sr_latency_ns = 12000;
@@ -2157,7 +2151,7 @@ static void i965_update_wm(struct intel_display *display)
if (srwm < 0)
srwm = 1;
srwm &= 0x1ff;
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"self-refresh entries: %d, wm: %d\n",
entries, srwm);
@@ -2172,7 +2166,7 @@ static void i965_update_wm(struct intel_display *display)
if (cursor_sr > i965_cursor_wm_info.max_wm)
cursor_sr = i965_cursor_wm_info.max_wm;
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"self-refresh watermark: display plane %d "
"cursor %d\n", srwm, cursor_sr);
@@ -2183,7 +2177,7 @@ static void i965_update_wm(struct intel_display *display)
intel_set_memory_cxsr(display, false);
}
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n",
srwm);
@@ -2206,13 +2200,12 @@ static void i965_update_wm(struct intel_display *display)
#undef FW_WM
-static struct intel_crtc *intel_crtc_for_plane(struct drm_i915_private *i915,
+static struct intel_crtc *intel_crtc_for_plane(struct intel_display *display,
enum i9xx_plane_id i9xx_plane)
{
- struct intel_display *display = &i915->display;
struct intel_plane *plane;
- for_each_intel_plane(&i915->drm, plane) {
+ for_each_intel_plane(display->drm, plane) {
if (plane->id == PLANE_PRIMARY &&
plane->i9xx_plane == i9xx_plane)
return intel_crtc_for_pipe(display, plane->pipe);
@@ -2223,7 +2216,6 @@ static struct intel_crtc *intel_crtc_for_plane(struct drm_i915_private *i915,
static void i9xx_update_wm(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
const struct intel_watermark_params *wm_info;
u32 fwater_lo;
u32 fwater_hi;
@@ -2232,29 +2224,29 @@ static void i9xx_update_wm(struct intel_display *display)
int planea_wm, planeb_wm;
struct intel_crtc *crtc;
- if (IS_I945GM(dev_priv))
+ if (display->platform.i945gm)
wm_info = &i945_wm_info;
- else if (DISPLAY_VER(dev_priv) != 2)
+ else if (DISPLAY_VER(display) != 2)
wm_info = &i915_wm_info;
else
wm_info = &i830_a_wm_info;
- if (DISPLAY_VER(dev_priv) == 2)
- fifo_size = i830_get_fifo_size(dev_priv, PLANE_A);
+ if (DISPLAY_VER(display) == 2)
+ fifo_size = i830_get_fifo_size(display, PLANE_A);
else
- fifo_size = i9xx_get_fifo_size(dev_priv, PLANE_A);
- crtc = intel_crtc_for_plane(dev_priv, PLANE_A);
+ fifo_size = i9xx_get_fifo_size(display, PLANE_A);
+ crtc = intel_crtc_for_plane(display, PLANE_A);
if (intel_crtc_active(crtc)) {
const struct drm_framebuffer *fb =
crtc->base.primary->state->fb;
int cpp;
- if (DISPLAY_VER(dev_priv) == 2)
+ if (DISPLAY_VER(display) == 2)
cpp = 4;
else
cpp = fb->format->cpp[0];
- planea_wm = intel_calculate_wm(dev_priv, crtc->config->pixel_rate,
+ planea_wm = intel_calculate_wm(display, crtc->config->pixel_rate,
wm_info, fifo_size, cpp,
pessimal_latency_ns);
} else {
@@ -2263,25 +2255,25 @@ static void i9xx_update_wm(struct intel_display *display)
planea_wm = wm_info->max_wm;
}
- if (DISPLAY_VER(dev_priv) == 2)
+ if (DISPLAY_VER(display) == 2)
wm_info = &i830_bc_wm_info;
- if (DISPLAY_VER(dev_priv) == 2)
- fifo_size = i830_get_fifo_size(dev_priv, PLANE_B);
+ if (DISPLAY_VER(display) == 2)
+ fifo_size = i830_get_fifo_size(display, PLANE_B);
else
- fifo_size = i9xx_get_fifo_size(dev_priv, PLANE_B);
- crtc = intel_crtc_for_plane(dev_priv, PLANE_B);
+ fifo_size = i9xx_get_fifo_size(display, PLANE_B);
+ crtc = intel_crtc_for_plane(display, PLANE_B);
if (intel_crtc_active(crtc)) {
const struct drm_framebuffer *fb =
crtc->base.primary->state->fb;
int cpp;
- if (DISPLAY_VER(dev_priv) == 2)
+ if (DISPLAY_VER(display) == 2)
cpp = 4;
else
cpp = fb->format->cpp[0];
- planeb_wm = intel_calculate_wm(dev_priv, crtc->config->pixel_rate,
+ planeb_wm = intel_calculate_wm(display, crtc->config->pixel_rate,
wm_info, fifo_size, cpp,
pessimal_latency_ns);
} else {
@@ -2290,11 +2282,11 @@ static void i9xx_update_wm(struct intel_display *display)
planeb_wm = wm_info->max_wm;
}
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
- crtc = single_enabled_crtc(dev_priv);
- if (IS_I915GM(dev_priv) && crtc) {
+ crtc = single_enabled_crtc(display);
+ if (display->platform.i915gm && crtc) {
struct drm_gem_object *obj;
obj = intel_fb_bo(crtc->base.primary->state->fb);
@@ -2313,7 +2305,7 @@ static void i9xx_update_wm(struct intel_display *display)
intel_set_memory_cxsr(display, false);
/* Calc sr entries for one plane configs */
- if (HAS_FW_BLC(dev_priv) && crtc) {
+ if (HAS_FW_BLC(display) && crtc) {
/* self-refresh has much higher latency */
static const int sr_latency_ns = 6000;
const struct drm_display_mode *pipe_mode =
@@ -2326,7 +2318,7 @@ static void i9xx_update_wm(struct intel_display *display)
int cpp;
int entries;
- if (IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
+ if (display->platform.i915gm || display->platform.i945gm)
cpp = 4;
else
cpp = fb->format->cpp[0];
@@ -2334,20 +2326,20 @@ static void i9xx_update_wm(struct intel_display *display)
entries = intel_wm_method2(pixel_rate, htotal, width, cpp,
sr_latency_ns / 100);
entries = DIV_ROUND_UP(entries, wm_info->cacheline_size);
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"self-refresh entries: %d\n", entries);
srwm = wm_info->fifo_size - entries;
if (srwm < 0)
srwm = 1;
- if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
+ if (display->platform.i945g || display->platform.i945gm)
intel_de_write(display, FW_BLC_SELF,
FW_BLC_SELF_FIFO_MASK | (srwm & 0xff));
else
intel_de_write(display, FW_BLC_SELF, srwm & 0x3f);
}
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n",
planea_wm, planeb_wm, cwm, srwm);
@@ -2367,23 +2359,22 @@ static void i9xx_update_wm(struct intel_display *display)
static void i845_update_wm(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
u32 fwater_lo;
int planea_wm;
- crtc = single_enabled_crtc(dev_priv);
+ crtc = single_enabled_crtc(display);
if (crtc == NULL)
return;
- planea_wm = intel_calculate_wm(dev_priv, crtc->config->pixel_rate,
+ planea_wm = intel_calculate_wm(display, crtc->config->pixel_rate,
&i845_wm_info,
- i845_get_fifo_size(dev_priv, PLANE_A),
+ i845_get_fifo_size(display, PLANE_A),
4, pessimal_latency_ns);
fwater_lo = intel_de_read(display, FW_BLC) & ~0xfff;
fwater_lo |= (3<<8) | planea_wm;
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Setting FIFO watermarks - A: %d\n", planea_wm);
intel_de_write(display, FW_BLC, fwater_lo);
@@ -2541,24 +2532,24 @@ static u32 ilk_compute_fbc_wm(const struct intel_crtc_state *crtc_state,
}
static unsigned int
-ilk_display_fifo_size(const struct drm_i915_private *dev_priv)
+ilk_display_fifo_size(struct intel_display *display)
{
- if (DISPLAY_VER(dev_priv) >= 8)
+ if (DISPLAY_VER(display) >= 8)
return 3072;
- else if (DISPLAY_VER(dev_priv) >= 7)
+ else if (DISPLAY_VER(display) >= 7)
return 768;
else
return 512;
}
static unsigned int
-ilk_plane_wm_reg_max(const struct drm_i915_private *dev_priv,
+ilk_plane_wm_reg_max(struct intel_display *display,
int level, bool is_sprite)
{
- if (DISPLAY_VER(dev_priv) >= 8)
+ if (DISPLAY_VER(display) >= 8)
/* BDW primary/sprite plane watermarks */
return level == 0 ? 255 : 2047;
- else if (DISPLAY_VER(dev_priv) >= 7)
+ else if (DISPLAY_VER(display) >= 7)
/* IVB/HSW primary/sprite plane watermarks */
return level == 0 ? 127 : 1023;
else if (!is_sprite)
@@ -2570,30 +2561,30 @@ ilk_plane_wm_reg_max(const struct drm_i915_private *dev_priv,
}
static unsigned int
-ilk_cursor_wm_reg_max(const struct drm_i915_private *dev_priv, int level)
+ilk_cursor_wm_reg_max(struct intel_display *display, int level)
{
- if (DISPLAY_VER(dev_priv) >= 7)
+ if (DISPLAY_VER(display) >= 7)
return level == 0 ? 63 : 255;
else
return level == 0 ? 31 : 63;
}
-static unsigned int ilk_fbc_wm_reg_max(const struct drm_i915_private *dev_priv)
+static unsigned int ilk_fbc_wm_reg_max(struct intel_display *display)
{
- if (DISPLAY_VER(dev_priv) >= 8)
+ if (DISPLAY_VER(display) >= 8)
return 31;
else
return 15;
}
/* Calculate the maximum primary/sprite plane watermark */
-static unsigned int ilk_plane_wm_max(const struct drm_i915_private *dev_priv,
+static unsigned int ilk_plane_wm_max(struct intel_display *display,
int level,
const struct intel_wm_config *config,
enum intel_ddb_partitioning ddb_partitioning,
bool is_sprite)
{
- unsigned int fifo_size = ilk_display_fifo_size(dev_priv);
+ unsigned int fifo_size = ilk_display_fifo_size(display);
/* if sprites aren't enabled, sprites get nothing */
if (is_sprite && !config->sprites_enabled)
@@ -2601,14 +2592,14 @@ static unsigned int ilk_plane_wm_max(const struct drm_i915_private *dev_priv,
/* HSW allows LP1+ watermarks even with multiple pipes */
if (level == 0 || config->num_pipes_active > 1) {
- fifo_size /= INTEL_NUM_PIPES(dev_priv);
+ fifo_size /= INTEL_NUM_PIPES(display);
/*
* For some reason the non self refresh
* FIFO size is only half of the self
* refresh FIFO size on ILK/SNB.
*/
- if (DISPLAY_VER(dev_priv) < 7)
+ if (DISPLAY_VER(display) < 7)
fifo_size /= 2;
}
@@ -2624,11 +2615,11 @@ static unsigned int ilk_plane_wm_max(const struct drm_i915_private *dev_priv,
}
/* clamp to max that the registers can hold */
- return min(fifo_size, ilk_plane_wm_reg_max(dev_priv, level, is_sprite));
+ return min(fifo_size, ilk_plane_wm_reg_max(display, level, is_sprite));
}
/* Calculate the maximum cursor plane watermark */
-static unsigned int ilk_cursor_wm_max(const struct drm_i915_private *dev_priv,
+static unsigned int ilk_cursor_wm_max(struct intel_display *display,
int level,
const struct intel_wm_config *config)
{
@@ -2637,32 +2628,32 @@ static unsigned int ilk_cursor_wm_max(const struct drm_i915_private *dev_priv,
return 64;
/* otherwise just report max that registers can hold */
- return ilk_cursor_wm_reg_max(dev_priv, level);
+ return ilk_cursor_wm_reg_max(display, level);
}
-static void ilk_compute_wm_maximums(const struct drm_i915_private *dev_priv,
+static void ilk_compute_wm_maximums(struct intel_display *display,
int level,
const struct intel_wm_config *config,
enum intel_ddb_partitioning ddb_partitioning,
struct ilk_wm_maximums *max)
{
- max->pri = ilk_plane_wm_max(dev_priv, level, config, ddb_partitioning, false);
- max->spr = ilk_plane_wm_max(dev_priv, level, config, ddb_partitioning, true);
- max->cur = ilk_cursor_wm_max(dev_priv, level, config);
- max->fbc = ilk_fbc_wm_reg_max(dev_priv);
+ max->pri = ilk_plane_wm_max(display, level, config, ddb_partitioning, false);
+ max->spr = ilk_plane_wm_max(display, level, config, ddb_partitioning, true);
+ max->cur = ilk_cursor_wm_max(display, level, config);
+ max->fbc = ilk_fbc_wm_reg_max(display);
}
-static void ilk_compute_wm_reg_maximums(const struct drm_i915_private *dev_priv,
+static void ilk_compute_wm_reg_maximums(struct intel_display *display,
int level,
struct ilk_wm_maximums *max)
{
- max->pri = ilk_plane_wm_reg_max(dev_priv, level, false);
- max->spr = ilk_plane_wm_reg_max(dev_priv, level, true);
- max->cur = ilk_cursor_wm_reg_max(dev_priv, level);
- max->fbc = ilk_fbc_wm_reg_max(dev_priv);
+ max->pri = ilk_plane_wm_reg_max(display, level, false);
+ max->spr = ilk_plane_wm_reg_max(display, level, true);
+ max->cur = ilk_cursor_wm_reg_max(display, level);
+ max->fbc = ilk_fbc_wm_reg_max(display);
}
-static bool ilk_validate_wm_level(struct drm_i915_private *i915,
+static bool ilk_validate_wm_level(struct intel_display *display,
int level,
const struct ilk_wm_maximums *max,
struct intel_wm_level *result)
@@ -2686,15 +2677,15 @@ static bool ilk_validate_wm_level(struct drm_i915_private *i915,
*/
if (level == 0 && !result->enable) {
if (result->pri_val > max->pri)
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"Primary WM%d too large %u (max %u)\n",
level, result->pri_val, max->pri);
if (result->spr_val > max->spr)
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"Sprite WM%d too large %u (max %u)\n",
level, result->spr_val, max->spr);
if (result->cur_val > max->cur)
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"Cursor WM%d too large %u (max %u)\n",
level, result->cur_val, max->cur);
@@ -2707,7 +2698,7 @@ static bool ilk_validate_wm_level(struct drm_i915_private *i915,
return ret;
}
-static void ilk_compute_wm_level(const struct drm_i915_private *dev_priv,
+static void ilk_compute_wm_level(struct intel_display *display,
const struct intel_crtc *crtc,
int level,
struct intel_crtc_state *crtc_state,
@@ -2716,9 +2707,9 @@ static void ilk_compute_wm_level(const struct drm_i915_private *dev_priv,
const struct intel_plane_state *curstate,
struct intel_wm_level *result)
{
- u16 pri_latency = dev_priv->display.wm.pri_latency[level];
- u16 spr_latency = dev_priv->display.wm.spr_latency[level];
- u16 cur_latency = dev_priv->display.wm.cur_latency[level];
+ u16 pri_latency = display->wm.pri_latency[level];
+ u16 spr_latency = display->wm.spr_latency[level];
+ u16 cur_latency = display->wm.cur_latency[level];
/* WM1+ latency values stored in 0.5us units */
if (level > 0) {
@@ -2742,11 +2733,12 @@ static void ilk_compute_wm_level(const struct drm_i915_private *dev_priv,
result->enable = true;
}
-static void hsw_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
+static void hsw_read_wm_latency(struct intel_display *display, u16 wm[])
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
u64 sskpd;
- i915->display.wm.num_levels = 5;
+ display->wm.num_levels = 5;
sskpd = intel_uncore_read64(&i915->uncore, MCH_SSKPD);
@@ -2759,11 +2751,12 @@ static void hsw_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
wm[4] = REG_FIELD_GET64(SSKPD_WM4_MASK_HSW, sskpd);
}
-static void snb_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
+static void snb_read_wm_latency(struct intel_display *display, u16 wm[])
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 sskpd;
- i915->display.wm.num_levels = 4;
+ display->wm.num_levels = 4;
sskpd = intel_uncore_read(&i915->uncore, MCH_SSKPD);
@@ -2773,11 +2766,12 @@ static void snb_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
wm[3] = REG_FIELD_GET(SSKPD_WM3_MASK_SNB, sskpd);
}
-static void ilk_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
+static void ilk_read_wm_latency(struct intel_display *display, u16 wm[])
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 mltr;
- i915->display.wm.num_levels = 3;
+ display->wm.num_levels = 3;
mltr = intel_uncore_read(&i915->uncore, MLTR_ILK);
@@ -2787,24 +2781,21 @@ static void ilk_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
wm[2] = REG_FIELD_GET(MLTR_WM2_MASK, mltr);
}
-static void intel_fixup_spr_wm_latency(struct drm_i915_private *dev_priv,
- u16 wm[5])
+static void intel_fixup_spr_wm_latency(struct intel_display *display, u16 wm[5])
{
/* ILK sprite LP0 latency is 1300 ns */
- if (DISPLAY_VER(dev_priv) == 5)
+ if (DISPLAY_VER(display) == 5)
wm[0] = 13;
}
-static void intel_fixup_cur_wm_latency(struct drm_i915_private *dev_priv,
- u16 wm[5])
+static void intel_fixup_cur_wm_latency(struct intel_display *display, u16 wm[5])
{
/* ILK cursor LP0 latency is 1300 ns */
- if (DISPLAY_VER(dev_priv) == 5)
+ if (DISPLAY_VER(display) == 5)
wm[0] = 13;
}
-static bool ilk_increase_wm_latency(struct drm_i915_private *dev_priv,
- u16 wm[5], u16 min)
+static bool ilk_increase_wm_latency(struct intel_display *display, u16 wm[5], u16 min)
{
int level;
@@ -2812,38 +2803,36 @@ static bool ilk_increase_wm_latency(struct drm_i915_private *dev_priv,
return false;
wm[0] = max(wm[0], min);
- for (level = 1; level < dev_priv->display.wm.num_levels; level++)
+ for (level = 1; level < display->wm.num_levels; level++)
wm[level] = max_t(u16, wm[level], DIV_ROUND_UP(min, 5));
return true;
}
-static void snb_wm_latency_quirk(struct drm_i915_private *dev_priv)
+static void snb_wm_latency_quirk(struct intel_display *display)
{
- struct intel_display *display = &dev_priv->display;
bool changed;
/*
* The BIOS provided WM memory latency values are often
* inadequate for high resolution displays. Adjust them.
*/
- changed = ilk_increase_wm_latency(dev_priv, dev_priv->display.wm.pri_latency, 12);
- changed |= ilk_increase_wm_latency(dev_priv, dev_priv->display.wm.spr_latency, 12);
- changed |= ilk_increase_wm_latency(dev_priv, dev_priv->display.wm.cur_latency, 12);
+ changed = ilk_increase_wm_latency(display, display->wm.pri_latency, 12);
+ changed |= ilk_increase_wm_latency(display, display->wm.spr_latency, 12);
+ changed |= ilk_increase_wm_latency(display, display->wm.cur_latency, 12);
if (!changed)
return;
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"WM latency values increased to avoid potential underruns\n");
- intel_print_wm_latency(display, "Primary", dev_priv->display.wm.pri_latency);
- intel_print_wm_latency(display, "Sprite", dev_priv->display.wm.spr_latency);
- intel_print_wm_latency(display, "Cursor", dev_priv->display.wm.cur_latency);
+ intel_print_wm_latency(display, "Primary", display->wm.pri_latency);
+ intel_print_wm_latency(display, "Sprite", display->wm.spr_latency);
+ intel_print_wm_latency(display, "Cursor", display->wm.cur_latency);
}
-static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv)
+static void snb_wm_lp3_irq_quirk(struct intel_display *display)
{
- struct intel_display *display = &dev_priv->display;
/*
* On some SNB machines (Thinkpad X220 Tablet at least)
* LP3 usage can cause vblank interrupts to be lost.
@@ -2855,52 +2844,50 @@ static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv)
* interrupts only. To play it safe we disable LP3
* watermarks entirely.
*/
- if (dev_priv->display.wm.pri_latency[3] == 0 &&
- dev_priv->display.wm.spr_latency[3] == 0 &&
- dev_priv->display.wm.cur_latency[3] == 0)
+ if (display->wm.pri_latency[3] == 0 &&
+ display->wm.spr_latency[3] == 0 &&
+ display->wm.cur_latency[3] == 0)
return;
- dev_priv->display.wm.pri_latency[3] = 0;
- dev_priv->display.wm.spr_latency[3] = 0;
- dev_priv->display.wm.cur_latency[3] = 0;
+ display->wm.pri_latency[3] = 0;
+ display->wm.spr_latency[3] = 0;
+ display->wm.cur_latency[3] = 0;
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"LP3 watermarks disabled due to potential for lost interrupts\n");
- intel_print_wm_latency(display, "Primary", dev_priv->display.wm.pri_latency);
- intel_print_wm_latency(display, "Sprite", dev_priv->display.wm.spr_latency);
- intel_print_wm_latency(display, "Cursor", dev_priv->display.wm.cur_latency);
+ intel_print_wm_latency(display, "Primary", display->wm.pri_latency);
+ intel_print_wm_latency(display, "Sprite", display->wm.spr_latency);
+ intel_print_wm_latency(display, "Cursor", display->wm.cur_latency);
}
-static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
+static void ilk_setup_wm_latency(struct intel_display *display)
{
- struct intel_display *display = &dev_priv->display;
-
- if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
- hsw_read_wm_latency(dev_priv, dev_priv->display.wm.pri_latency);
- else if (DISPLAY_VER(dev_priv) >= 6)
- snb_read_wm_latency(dev_priv, dev_priv->display.wm.pri_latency);
+ if (display->platform.broadwell || display->platform.haswell)
+ hsw_read_wm_latency(display, display->wm.pri_latency);
+ else if (DISPLAY_VER(display) >= 6)
+ snb_read_wm_latency(display, display->wm.pri_latency);
else
- ilk_read_wm_latency(dev_priv, dev_priv->display.wm.pri_latency);
+ ilk_read_wm_latency(display, display->wm.pri_latency);
- memcpy(dev_priv->display.wm.spr_latency, dev_priv->display.wm.pri_latency,
- sizeof(dev_priv->display.wm.pri_latency));
- memcpy(dev_priv->display.wm.cur_latency, dev_priv->display.wm.pri_latency,
- sizeof(dev_priv->display.wm.pri_latency));
+ memcpy(display->wm.spr_latency, display->wm.pri_latency,
+ sizeof(display->wm.pri_latency));
+ memcpy(display->wm.cur_latency, display->wm.pri_latency,
+ sizeof(display->wm.pri_latency));
- intel_fixup_spr_wm_latency(dev_priv, dev_priv->display.wm.spr_latency);
- intel_fixup_cur_wm_latency(dev_priv, dev_priv->display.wm.cur_latency);
+ intel_fixup_spr_wm_latency(display, display->wm.spr_latency);
+ intel_fixup_cur_wm_latency(display, display->wm.cur_latency);
- intel_print_wm_latency(display, "Primary", dev_priv->display.wm.pri_latency);
- intel_print_wm_latency(display, "Sprite", dev_priv->display.wm.spr_latency);
- intel_print_wm_latency(display, "Cursor", dev_priv->display.wm.cur_latency);
+ intel_print_wm_latency(display, "Primary", display->wm.pri_latency);
+ intel_print_wm_latency(display, "Sprite", display->wm.spr_latency);
+ intel_print_wm_latency(display, "Cursor", display->wm.cur_latency);
- if (DISPLAY_VER(dev_priv) == 6) {
- snb_wm_latency_quirk(dev_priv);
- snb_wm_lp3_irq_quirk(dev_priv);
+ if (DISPLAY_VER(display) == 6) {
+ snb_wm_latency_quirk(display);
+ snb_wm_lp3_irq_quirk(display);
}
}
-static bool ilk_validate_pipe_wm(struct drm_i915_private *dev_priv,
+static bool ilk_validate_pipe_wm(struct intel_display *display,
struct intel_pipe_wm *pipe_wm)
{
/* LP0 watermark maximums depend on this pipe alone */
@@ -2912,11 +2899,11 @@ static bool ilk_validate_pipe_wm(struct drm_i915_private *dev_priv,
struct ilk_wm_maximums max;
/* LP0 watermarks always use 1/2 DDB partitioning */
- ilk_compute_wm_maximums(dev_priv, 0, &config, INTEL_DDB_PART_1_2, &max);
+ ilk_compute_wm_maximums(display, 0, &config, INTEL_DDB_PART_1_2, &max);
/* At least LP0 must be valid */
- if (!ilk_validate_wm_level(dev_priv, 0, &max, &pipe_wm->wm[0])) {
- drm_dbg_kms(&dev_priv->drm, "LP0 watermark invalid\n");
+ if (!ilk_validate_wm_level(display, 0, &max, &pipe_wm->wm[0])) {
+ drm_dbg_kms(display->drm, "LP0 watermark invalid\n");
return false;
}
@@ -2927,7 +2914,7 @@ static bool ilk_validate_pipe_wm(struct drm_i915_private *dev_priv,
static int ilk_compute_pipe_wm(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct intel_pipe_wm *pipe_wm;
@@ -2954,10 +2941,10 @@ static int ilk_compute_pipe_wm(struct intel_atomic_state *state,
pipe_wm->sprites_enabled = crtc_state->active_planes & BIT(PLANE_SPRITE0);
pipe_wm->sprites_scaled = crtc_state->scaled_planes & BIT(PLANE_SPRITE0);
- usable_level = dev_priv->display.wm.num_levels - 1;
+ usable_level = display->wm.num_levels - 1;
/* ILK/SNB: LP2+ watermarks only w/o sprites */
- if (DISPLAY_VER(dev_priv) < 7 && pipe_wm->sprites_enabled)
+ if (DISPLAY_VER(display) < 7 && pipe_wm->sprites_enabled)
usable_level = 1;
/* ILK/SNB/IVB: LP1+ watermarks only w/o scaling */
@@ -2965,18 +2952,18 @@ static int ilk_compute_pipe_wm(struct intel_atomic_state *state,
usable_level = 0;
memset(&pipe_wm->wm, 0, sizeof(pipe_wm->wm));
- ilk_compute_wm_level(dev_priv, crtc, 0, crtc_state,
+ ilk_compute_wm_level(display, crtc, 0, crtc_state,
pristate, sprstate, curstate, &pipe_wm->wm[0]);
- if (!ilk_validate_pipe_wm(dev_priv, pipe_wm))
+ if (!ilk_validate_pipe_wm(display, pipe_wm))
return -EINVAL;
- ilk_compute_wm_reg_maximums(dev_priv, 1, &max);
+ ilk_compute_wm_reg_maximums(display, 1, &max);
for (level = 1; level <= usable_level; level++) {
struct intel_wm_level *wm = &pipe_wm->wm[level];
- ilk_compute_wm_level(dev_priv, crtc, level, crtc_state,
+ ilk_compute_wm_level(display, crtc, level, crtc_state,
pristate, sprstate, curstate, wm);
/*
@@ -2984,7 +2971,7 @@ static int ilk_compute_pipe_wm(struct intel_atomic_state *state,
* register maximums since such watermarks are
* always invalid.
*/
- if (!ilk_validate_wm_level(dev_priv, level, &max, wm)) {
+ if (!ilk_validate_wm_level(display, level, &max, wm)) {
memset(wm, 0, sizeof(*wm));
break;
}
@@ -3001,7 +2988,7 @@ static int ilk_compute_pipe_wm(struct intel_atomic_state *state,
static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
const struct intel_crtc_state *old_crtc_state =
@@ -3026,7 +3013,7 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
intermediate->sprites_enabled |= active->sprites_enabled;
intermediate->sprites_scaled |= active->sprites_scaled;
- for (level = 0; level < dev_priv->display.wm.num_levels; level++) {
+ for (level = 0; level < display->wm.num_levels; level++) {
struct intel_wm_level *intermediate_wm = &intermediate->wm[level];
const struct intel_wm_level *active_wm = &active->wm[level];
@@ -3047,7 +3034,7 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
* there's no safe way to transition from the old state to
* the new state, so we need to fail the atomic transaction.
*/
- if (!ilk_validate_pipe_wm(dev_priv, intermediate))
+ if (!ilk_validate_pipe_wm(display, intermediate))
return -EINVAL;
/*
@@ -3079,7 +3066,7 @@ static int ilk_compute_watermarks(struct intel_atomic_state *state,
/*
* Merge the watermarks from all active pipes for a specific level.
*/
-static void ilk_merge_wm_level(struct drm_i915_private *dev_priv,
+static void ilk_merge_wm_level(struct intel_display *display,
int level,
struct intel_wm_level *ret_wm)
{
@@ -3087,7 +3074,7 @@ static void ilk_merge_wm_level(struct drm_i915_private *dev_priv,
ret_wm->enable = true;
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
const struct intel_pipe_wm *active = &crtc->wm.active.ilk;
const struct intel_wm_level *wm = &active->wm[level];
@@ -3112,31 +3099,31 @@ static void ilk_merge_wm_level(struct drm_i915_private *dev_priv,
/*
* Merge all low power watermarks for all active pipes.
*/
-static void ilk_wm_merge(struct drm_i915_private *dev_priv,
+static void ilk_wm_merge(struct intel_display *display,
const struct intel_wm_config *config,
const struct ilk_wm_maximums *max,
struct intel_pipe_wm *merged)
{
- int level, num_levels = dev_priv->display.wm.num_levels;
+ int level, num_levels = display->wm.num_levels;
int last_enabled_level = num_levels - 1;
/* ILK/SNB/IVB: LP1+ watermarks only w/ single pipe */
- if ((DISPLAY_VER(dev_priv) < 7 || IS_IVYBRIDGE(dev_priv)) &&
+ if ((DISPLAY_VER(display) < 7 || display->platform.ivybridge) &&
config->num_pipes_active > 1)
last_enabled_level = 0;
/* ILK: FBC WM must be disabled always */
- merged->fbc_wm_enabled = DISPLAY_VER(dev_priv) >= 6;
+ merged->fbc_wm_enabled = DISPLAY_VER(display) >= 6;
/* merge each WM1+ level */
for (level = 1; level < num_levels; level++) {
struct intel_wm_level *wm = &merged->wm[level];
- ilk_merge_wm_level(dev_priv, level, wm);
+ ilk_merge_wm_level(display, level, wm);
if (level > last_enabled_level)
wm->enable = false;
- else if (!ilk_validate_wm_level(dev_priv, level, max, wm))
+ else if (!ilk_validate_wm_level(display, level, max, wm))
/* make sure all following levels get disabled */
last_enabled_level = level - 1;
@@ -3152,8 +3139,8 @@ static void ilk_wm_merge(struct drm_i915_private *dev_priv,
}
/* ILK: LP2+ must be disabled when FBC WM is disabled but FBC enabled */
- if (DISPLAY_VER(dev_priv) == 5 && HAS_FBC(dev_priv) &&
- dev_priv->display.params.enable_fbc && !merged->fbc_wm_enabled) {
+ if (DISPLAY_VER(display) == 5 && HAS_FBC(display) &&
+ display->params.enable_fbc && !merged->fbc_wm_enabled) {
for (level = 2; level < num_levels; level++) {
struct intel_wm_level *wm = &merged->wm[level];
@@ -3169,16 +3156,16 @@ static int ilk_wm_lp_to_level(int wm_lp, const struct intel_pipe_wm *pipe_wm)
}
/* The value we need to program into the WM_LPx latency field */
-static unsigned int ilk_wm_lp_latency(struct drm_i915_private *dev_priv,
+static unsigned int ilk_wm_lp_latency(struct intel_display *display,
int level)
{
- if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
+ if (display->platform.haswell || display->platform.broadwell)
return 2 * level;
else
- return dev_priv->display.wm.pri_latency[level];
+ return display->wm.pri_latency[level];
}
-static void ilk_compute_wm_results(struct drm_i915_private *dev_priv,
+static void ilk_compute_wm_results(struct intel_display *display,
const struct intel_pipe_wm *merged,
enum intel_ddb_partitioning partitioning,
struct ilk_wm_values *results)
@@ -3202,14 +3189,14 @@ static void ilk_compute_wm_results(struct drm_i915_private *dev_priv,
* disabled. Doing otherwise could cause underruns.
*/
results->wm_lp[wm_lp - 1] =
- WM_LP_LATENCY(ilk_wm_lp_latency(dev_priv, level)) |
+ WM_LP_LATENCY(ilk_wm_lp_latency(display, level)) |
WM_LP_PRIMARY(r->pri_val) |
WM_LP_CURSOR(r->cur_val);
if (r->enable)
results->wm_lp[wm_lp - 1] |= WM_LP_ENABLE;
- if (DISPLAY_VER(dev_priv) >= 8)
+ if (DISPLAY_VER(display) >= 8)
results->wm_lp[wm_lp - 1] |= WM_LP_FBC_BDW(r->fbc_val);
else
results->wm_lp[wm_lp - 1] |= WM_LP_FBC_ILK(r->fbc_val);
@@ -3220,19 +3207,19 @@ static void ilk_compute_wm_results(struct drm_i915_private *dev_priv,
* Always set WM_LP_SPRITE_EN when spr_val != 0, even if the
* level is disabled. Doing otherwise could cause underruns.
*/
- if (DISPLAY_VER(dev_priv) < 7 && r->spr_val) {
- drm_WARN_ON(&dev_priv->drm, wm_lp != 1);
+ if (DISPLAY_VER(display) < 7 && r->spr_val) {
+ drm_WARN_ON(display->drm, wm_lp != 1);
results->wm_lp_spr[wm_lp - 1] |= WM_LP_SPRITE_ENABLE;
}
}
/* LP0 register values */
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
enum pipe pipe = crtc->pipe;
const struct intel_pipe_wm *pipe_wm = &crtc->wm.active.ilk;
const struct intel_wm_level *r = &pipe_wm->wm[0];
- if (drm_WARN_ON(&dev_priv->drm, !r->enable))
+ if (drm_WARN_ON(display->drm, !r->enable))
continue;
results->wm_pipe[pipe] =
@@ -3247,13 +3234,13 @@ static void ilk_compute_wm_results(struct drm_i915_private *dev_priv,
* case both are at the same level. Prefer r1 in case they're the same.
*/
static struct intel_pipe_wm *
-ilk_find_best_result(struct drm_i915_private *dev_priv,
+ilk_find_best_result(struct intel_display *display,
struct intel_pipe_wm *r1,
struct intel_pipe_wm *r2)
{
int level, level1 = 0, level2 = 0;
- for (level = 1; level < dev_priv->display.wm.num_levels; level++) {
+ for (level = 1; level < display->wm.num_levels; level++) {
if (r1->wm[level].enable)
level1 = level;
if (r2->wm[level].enable)
@@ -3279,7 +3266,7 @@ ilk_find_best_result(struct drm_i915_private *dev_priv,
#define WM_DIRTY_FBC (1 << 24)
#define WM_DIRTY_DDB (1 << 25)
-static unsigned int ilk_compute_wm_dirty(struct drm_i915_private *dev_priv,
+static unsigned int ilk_compute_wm_dirty(struct intel_display *display,
const struct ilk_wm_values *old,
const struct ilk_wm_values *new)
{
@@ -3287,7 +3274,7 @@ static unsigned int ilk_compute_wm_dirty(struct drm_i915_private *dev_priv,
enum pipe pipe;
int wm_lp;
- for_each_pipe(dev_priv, pipe) {
+ for_each_pipe(display, pipe) {
if (old->wm_pipe[pipe] != new->wm_pipe[pipe]) {
dirty |= WM_DIRTY_PIPE(pipe);
/* Must disable LP1+ watermarks too */
@@ -3325,11 +3312,10 @@ static unsigned int ilk_compute_wm_dirty(struct drm_i915_private *dev_priv,
return dirty;
}
-static bool _ilk_disable_lp_wm(struct drm_i915_private *dev_priv,
+static bool _ilk_disable_lp_wm(struct intel_display *display,
unsigned int dirty)
{
- struct intel_display *display = &dev_priv->display;
- struct ilk_wm_values *previous = &dev_priv->display.wm.hw;
+ struct ilk_wm_values *previous = &display->wm.hw;
bool changed = false;
if (dirty & WM_DIRTY_LP(3) && previous->wm_lp[2] & WM_LP_ENABLE) {
@@ -3360,18 +3346,17 @@ static bool _ilk_disable_lp_wm(struct drm_i915_private *dev_priv,
* The spec says we shouldn't write when we don't need, because every write
* causes WMs to be re-evaluated, expending some power.
*/
-static void ilk_write_wm_values(struct drm_i915_private *dev_priv,
+static void ilk_write_wm_values(struct intel_display *display,
struct ilk_wm_values *results)
{
- struct intel_display *display = &dev_priv->display;
- struct ilk_wm_values *previous = &dev_priv->display.wm.hw;
+ struct ilk_wm_values *previous = &display->wm.hw;
unsigned int dirty;
- dirty = ilk_compute_wm_dirty(dev_priv, previous, results);
+ dirty = ilk_compute_wm_dirty(display, previous, results);
if (!dirty)
return;
- _ilk_disable_lp_wm(dev_priv, dirty);
+ _ilk_disable_lp_wm(display, dirty);
if (dirty & WM_DIRTY_PIPE(PIPE_A))
intel_de_write(display, WM0_PIPE_ILK(PIPE_A), results->wm_pipe[0]);
@@ -3381,7 +3366,7 @@ static void ilk_write_wm_values(struct drm_i915_private *dev_priv,
intel_de_write(display, WM0_PIPE_ILK(PIPE_C), results->wm_pipe[2]);
if (dirty & WM_DIRTY_DDB) {
- if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
+ if (display->platform.haswell || display->platform.broadwell)
intel_de_rmw(display, WM_MISC, WM_MISC_DATA_PARTITION_5_6,
results->partitioning == INTEL_DDB_PART_1_2 ? 0 :
WM_MISC_DATA_PARTITION_5_6);
@@ -3399,7 +3384,7 @@ static void ilk_write_wm_values(struct drm_i915_private *dev_priv,
previous->wm_lp_spr[0] != results->wm_lp_spr[0])
intel_de_write(display, WM1S_LP_ILK, results->wm_lp_spr[0]);
- if (DISPLAY_VER(dev_priv) >= 7) {
+ if (DISPLAY_VER(display) >= 7) {
if (dirty & WM_DIRTY_LP(2) && previous->wm_lp_spr[1] != results->wm_lp_spr[1])
intel_de_write(display, WM2S_LP_IVB, results->wm_lp_spr[1]);
if (dirty & WM_DIRTY_LP(3) && previous->wm_lp_spr[2] != results->wm_lp_spr[2])
@@ -3413,23 +3398,21 @@ static void ilk_write_wm_values(struct drm_i915_private *dev_priv,
if (dirty & WM_DIRTY_LP(3) && previous->wm_lp[2] != results->wm_lp[2])
intel_de_write(display, WM3_LP_ILK, results->wm_lp[2]);
- dev_priv->display.wm.hw = *results;
+ display->wm.hw = *results;
}
bool ilk_disable_cxsr(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
-
- return _ilk_disable_lp_wm(dev_priv, WM_DIRTY_LP_ALL);
+ return _ilk_disable_lp_wm(display, WM_DIRTY_LP_ALL);
}
-static void ilk_compute_wm_config(struct drm_i915_private *dev_priv,
+static void ilk_compute_wm_config(struct intel_display *display,
struct intel_wm_config *config)
{
struct intel_crtc *crtc;
/* Compute the currently _active_ config */
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
const struct intel_pipe_wm *wm = &crtc->wm.active.ilk;
if (!wm->pipe_enabled)
@@ -3441,7 +3424,7 @@ static void ilk_compute_wm_config(struct drm_i915_private *dev_priv,
}
}
-static void ilk_program_watermarks(struct drm_i915_private *dev_priv)
+static void ilk_program_watermarks(struct intel_display *display)
{
struct intel_pipe_wm lp_wm_1_2 = {}, lp_wm_5_6 = {}, *best_lp_wm;
struct ilk_wm_maximums max;
@@ -3449,18 +3432,18 @@ static void ilk_program_watermarks(struct drm_i915_private *dev_priv)
struct ilk_wm_values results = {};
enum intel_ddb_partitioning partitioning;
- ilk_compute_wm_config(dev_priv, &config);
+ ilk_compute_wm_config(display, &config);
- ilk_compute_wm_maximums(dev_priv, 1, &config, INTEL_DDB_PART_1_2, &max);
- ilk_wm_merge(dev_priv, &config, &max, &lp_wm_1_2);
+ ilk_compute_wm_maximums(display, 1, &config, INTEL_DDB_PART_1_2, &max);
+ ilk_wm_merge(display, &config, &max, &lp_wm_1_2);
/* 5/6 split only in single pipe config on IVB+ */
- if (DISPLAY_VER(dev_priv) >= 7 &&
+ if (DISPLAY_VER(display) >= 7 &&
config.num_pipes_active == 1 && config.sprites_enabled) {
- ilk_compute_wm_maximums(dev_priv, 1, &config, INTEL_DDB_PART_5_6, &max);
- ilk_wm_merge(dev_priv, &config, &max, &lp_wm_5_6);
+ ilk_compute_wm_maximums(display, 1, &config, INTEL_DDB_PART_5_6, &max);
+ ilk_wm_merge(display, &config, &max, &lp_wm_5_6);
- best_lp_wm = ilk_find_best_result(dev_priv, &lp_wm_1_2, &lp_wm_5_6);
+ best_lp_wm = ilk_find_best_result(display, &lp_wm_1_2, &lp_wm_5_6);
} else {
best_lp_wm = &lp_wm_1_2;
}
@@ -3468,46 +3451,44 @@ static void ilk_program_watermarks(struct drm_i915_private *dev_priv)
partitioning = (best_lp_wm == &lp_wm_1_2) ?
INTEL_DDB_PART_1_2 : INTEL_DDB_PART_5_6;
- ilk_compute_wm_results(dev_priv, best_lp_wm, partitioning, &results);
+ ilk_compute_wm_results(display, best_lp_wm, partitioning, &results);
- ilk_write_wm_values(dev_priv, &results);
+ ilk_write_wm_values(display, &results);
}
static void ilk_initial_watermarks(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
const struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- mutex_lock(&dev_priv->display.wm.wm_mutex);
+ mutex_lock(&display->wm.wm_mutex);
crtc->wm.active.ilk = crtc_state->wm.ilk.intermediate;
- ilk_program_watermarks(dev_priv);
- mutex_unlock(&dev_priv->display.wm.wm_mutex);
+ ilk_program_watermarks(display);
+ mutex_unlock(&display->wm.wm_mutex);
}
static void ilk_optimize_watermarks(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
const struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
if (!crtc_state->wm.need_postvbl_update)
return;
- mutex_lock(&dev_priv->display.wm.wm_mutex);
+ mutex_lock(&display->wm.wm_mutex);
crtc->wm.active.ilk = crtc_state->wm.ilk.optimal;
- ilk_program_watermarks(dev_priv);
- mutex_unlock(&dev_priv->display.wm.wm_mutex);
+ ilk_program_watermarks(display);
+ mutex_unlock(&display->wm.wm_mutex);
}
static void ilk_pipe_wm_get_hw_state(struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(crtc);
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct ilk_wm_values *hw = &dev_priv->display.wm.hw;
+ struct ilk_wm_values *hw = &display->wm.hw;
struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state);
struct intel_pipe_wm *active = &crtc_state->wm.ilk.optimal;
enum pipe pipe = crtc->pipe;
@@ -3539,7 +3520,7 @@ static void ilk_pipe_wm_get_hw_state(struct intel_crtc *crtc)
* should be marked as enabled but zeroed,
* which is what we'd compute them to.
*/
- for (level = 0; level < dev_priv->display.wm.num_levels; level++)
+ for (level = 0; level < display->wm.num_levels; level++)
active->wm[level].enable = true;
}
@@ -3590,7 +3571,6 @@ static int ilk_sanitize_watermarks_add_affected(struct drm_atomic_state *state)
*/
void ilk_wm_sanitize(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct drm_atomic_state *state;
struct intel_atomic_state *intel_state;
struct intel_crtc *crtc;
@@ -3600,14 +3580,14 @@ void ilk_wm_sanitize(struct intel_display *display)
int i;
/* Only supported on platforms that use atomic watermark design */
- if (!dev_priv->display.funcs.wm->optimize_watermarks)
+ if (!display->funcs.wm->optimize_watermarks)
return;
- if (drm_WARN_ON(&dev_priv->drm, DISPLAY_VER(dev_priv) >= 9))
+ if (drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 9))
return;
- state = drm_atomic_state_alloc(&dev_priv->drm);
- if (drm_WARN_ON(&dev_priv->drm, !state))
+ state = drm_atomic_state_alloc(display->drm);
+ if (drm_WARN_ON(display->drm, !state))
return;
intel_state = to_intel_atomic_state(state);
@@ -3623,14 +3603,14 @@ void ilk_wm_sanitize(struct intel_display *display)
* intermediate watermarks (since we don't trust the current
* watermarks).
*/
- if (!HAS_GMCH(dev_priv))
+ if (!HAS_GMCH(display))
intel_state->skip_intermediate_wm = true;
ret = ilk_sanitize_watermarks_add_affected(state);
if (ret)
goto fail;
- ret = intel_atomic_check(&dev_priv->drm, state);
+ ret = intel_atomic_check(display->drm, state);
if (ret)
goto fail;
@@ -3660,7 +3640,7 @@ void ilk_wm_sanitize(struct intel_display *display)
* If this actually happens, we'll have to just leave the
* BIOS-programmed watermarks untouched and hope for the best.
*/
- drm_WARN(&dev_priv->drm, ret,
+ drm_WARN(display->drm, ret,
"Could not determine valid watermarks for inherited state\n");
drm_atomic_state_put(state);
@@ -3674,10 +3654,9 @@ void ilk_wm_sanitize(struct intel_display *display)
#define _FW_WM_VLV(value, plane) \
(((value) & DSPFW_ ## plane ## _MASK_VLV) >> DSPFW_ ## plane ## _SHIFT)
-static void g4x_read_wm_values(struct drm_i915_private *dev_priv,
+static void g4x_read_wm_values(struct intel_display *display,
struct g4x_wm_values *wm)
{
- struct intel_display *display = &dev_priv->display;
u32 tmp;
tmp = intel_de_read(display, DSPFW1(display));
@@ -3701,14 +3680,13 @@ static void g4x_read_wm_values(struct drm_i915_private *dev_priv,
wm->hpll.plane = _FW_WM(tmp, HPLL_SR);
}
-static void vlv_read_wm_values(struct drm_i915_private *dev_priv,
+static void vlv_read_wm_values(struct intel_display *display,
struct vlv_wm_values *wm)
{
- struct intel_display *display = &dev_priv->display;
enum pipe pipe;
u32 tmp;
- for_each_pipe(dev_priv, pipe) {
+ for_each_pipe(display, pipe) {
tmp = intel_de_read(display, VLV_DDL(pipe));
wm->ddl[pipe].plane[PLANE_PRIMARY] =
@@ -3735,7 +3713,7 @@ static void vlv_read_wm_values(struct drm_i915_private *dev_priv,
tmp = intel_de_read(display, DSPFW3(display));
wm->sr.cursor = _FW_WM(tmp, CURSOR_SR);
- if (IS_CHERRYVIEW(dev_priv)) {
+ if (display->platform.cherryview) {
tmp = intel_de_read(display, DSPFW7_CHV);
wm->pipe[PIPE_B].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITED);
wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEC);
@@ -3780,15 +3758,14 @@ static void vlv_read_wm_values(struct drm_i915_private *dev_priv,
static void g4x_wm_get_hw_state(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
- struct g4x_wm_values *wm = &dev_priv->display.wm.g4x;
+ struct g4x_wm_values *wm = &display->wm.g4x;
struct intel_crtc *crtc;
- g4x_read_wm_values(dev_priv, wm);
+ g4x_read_wm_values(display, wm);
wm->cxsr = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN;
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct g4x_wm_state *active = &crtc->wm.active.g4x;
@@ -3853,7 +3830,7 @@ static void g4x_wm_get_hw_state(struct intel_display *display)
crtc_state->wm.g4x.optimal = *active;
crtc_state->wm.g4x.intermediate = *active;
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite=%d\n",
pipe_name(pipe),
wm->pipe[pipe].plane[PLANE_PRIMARY],
@@ -3861,26 +3838,25 @@ static void g4x_wm_get_hw_state(struct intel_display *display)
wm->pipe[pipe].plane[PLANE_SPRITE0]);
}
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Initial SR watermarks: plane=%d, cursor=%d fbc=%d\n",
wm->sr.plane, wm->sr.cursor, wm->sr.fbc);
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Initial HPLL watermarks: plane=%d, SR cursor=%d fbc=%d\n",
wm->hpll.plane, wm->hpll.cursor, wm->hpll.fbc);
- drm_dbg_kms(&dev_priv->drm, "Initial SR=%s HPLL=%s FBC=%s\n",
+ drm_dbg_kms(display->drm, "Initial SR=%s HPLL=%s FBC=%s\n",
str_yes_no(wm->cxsr), str_yes_no(wm->hpll_en),
str_yes_no(wm->fbc_en));
}
static void g4x_wm_sanitize(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_plane *plane;
struct intel_crtc *crtc;
- mutex_lock(&dev_priv->display.wm.wm_mutex);
+ mutex_lock(&display->wm.wm_mutex);
- for_each_intel_plane(&dev_priv->drm, plane) {
+ for_each_intel_plane(display->drm, plane) {
struct intel_crtc *crtc =
intel_crtc_for_pipe(display, plane->pipe);
struct intel_crtc_state *crtc_state =
@@ -3893,7 +3869,7 @@ static void g4x_wm_sanitize(struct intel_display *display)
if (plane_state->uapi.visible)
continue;
- for (level = 0; level < dev_priv->display.wm.num_levels; level++) {
+ for (level = 0; level < display->wm.num_levels; level++) {
struct g4x_pipe_wm *raw =
&crtc_state->wm.g4x.raw[level];
@@ -3904,37 +3880,37 @@ static void g4x_wm_sanitize(struct intel_display *display)
}
}
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
int ret;
ret = _g4x_compute_pipe_wm(crtc_state);
- drm_WARN_ON(&dev_priv->drm, ret);
+ drm_WARN_ON(display->drm, ret);
crtc_state->wm.g4x.intermediate =
crtc_state->wm.g4x.optimal;
crtc->wm.active.g4x = crtc_state->wm.g4x.optimal;
}
- g4x_program_watermarks(dev_priv);
+ g4x_program_watermarks(display);
- mutex_unlock(&dev_priv->display.wm.wm_mutex);
+ mutex_unlock(&display->wm.wm_mutex);
}
static void vlv_wm_get_hw_state(struct intel_display *display)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
- struct vlv_wm_values *wm = &dev_priv->display.wm.vlv;
+ struct vlv_wm_values *wm = &display->wm.vlv;
struct intel_crtc *crtc;
u32 val;
- vlv_read_wm_values(dev_priv, wm);
+ vlv_read_wm_values(display, wm);
wm->cxsr = intel_de_read(display, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
wm->level = VLV_WM_LEVEL_PM2;
- if (IS_CHERRYVIEW(dev_priv)) {
+ if (display->platform.cherryview) {
vlv_punit_get(dev_priv);
val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
@@ -3956,10 +3932,10 @@ static void vlv_wm_get_hw_state(struct intel_display *display)
if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) &
FORCE_DDR_FREQ_REQ_ACK) == 0, 3)) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Punit not acking DDR DVFS request, "
"assuming DDR DVFS is disabled\n");
- dev_priv->display.wm.num_levels = VLV_WM_LEVEL_PM5 + 1;
+ display->wm.num_levels = VLV_WM_LEVEL_PM5 + 1;
} else {
val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2);
if ((val & FORCE_DDR_HIGH_FREQ) == 0)
@@ -3969,7 +3945,7 @@ static void vlv_wm_get_hw_state(struct intel_display *display)
vlv_punit_put(dev_priv);
}
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct vlv_wm_state *active = &crtc->wm.active.vlv;
@@ -4009,7 +3985,7 @@ static void vlv_wm_get_hw_state(struct intel_display *display)
crtc_state->wm.vlv.optimal = *active;
crtc_state->wm.vlv.intermediate = *active;
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite0=%d, sprite1=%d\n",
pipe_name(pipe),
wm->pipe[pipe].plane[PLANE_PRIMARY],
@@ -4018,20 +3994,19 @@ static void vlv_wm_get_hw_state(struct intel_display *display)
wm->pipe[pipe].plane[PLANE_SPRITE1]);
}
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Initial watermarks: SR plane=%d, SR cursor=%d level=%d cxsr=%d\n",
wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr);
}
static void vlv_wm_sanitize(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_plane *plane;
struct intel_crtc *crtc;
- mutex_lock(&dev_priv->display.wm.wm_mutex);
+ mutex_lock(&display->wm.wm_mutex);
- for_each_intel_plane(&dev_priv->drm, plane) {
+ for_each_intel_plane(display->drm, plane) {
struct intel_crtc *crtc =
intel_crtc_for_pipe(display, plane->pipe);
struct intel_crtc_state *crtc_state =
@@ -4044,7 +4019,7 @@ static void vlv_wm_sanitize(struct intel_display *display)
if (plane_state->uapi.visible)
continue;
- for (level = 0; level < dev_priv->display.wm.num_levels; level++) {
+ for (level = 0; level < display->wm.num_levels; level++) {
struct g4x_pipe_wm *raw =
&crtc_state->wm.vlv.raw[level];
@@ -4052,32 +4027,30 @@ static void vlv_wm_sanitize(struct intel_display *display)
}
}
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
int ret;
ret = _vlv_compute_pipe_wm(crtc_state);
- drm_WARN_ON(&dev_priv->drm, ret);
+ drm_WARN_ON(display->drm, ret);
crtc_state->wm.vlv.intermediate =
crtc_state->wm.vlv.optimal;
crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;
}
- vlv_program_watermarks(dev_priv);
+ vlv_program_watermarks(display);
- mutex_unlock(&dev_priv->display.wm.wm_mutex);
+ mutex_unlock(&display->wm.wm_mutex);
}
/*
* FIXME should probably kill this and improve
* the real watermark readout/sanitation instead
*/
-static void ilk_init_lp_watermarks(struct drm_i915_private *dev_priv)
+static void ilk_init_lp_watermarks(struct intel_display *display)
{
- struct intel_display *display = &dev_priv->display;
-
intel_de_rmw(display, WM3_LP_ILK, WM_LP_ENABLE, 0);
intel_de_rmw(display, WM2_LP_ILK, WM_LP_ENABLE, 0);
intel_de_rmw(display, WM1_LP_ILK, WM_LP_ENABLE, 0);
@@ -4090,13 +4063,12 @@ static void ilk_init_lp_watermarks(struct drm_i915_private *dev_priv)
static void ilk_wm_get_hw_state(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
- struct ilk_wm_values *hw = &dev_priv->display.wm.hw;
+ struct ilk_wm_values *hw = &display->wm.hw;
struct intel_crtc *crtc;
- ilk_init_lp_watermarks(dev_priv);
+ ilk_init_lp_watermarks(display);
- for_each_intel_crtc(&dev_priv->drm, crtc)
+ for_each_intel_crtc(display->drm, crtc)
ilk_pipe_wm_get_hw_state(crtc);
hw->wm_lp[0] = intel_de_read(display, WM1_LP_ILK);
@@ -4104,16 +4076,16 @@ static void ilk_wm_get_hw_state(struct intel_display *display)
hw->wm_lp[2] = intel_de_read(display, WM3_LP_ILK);
hw->wm_lp_spr[0] = intel_de_read(display, WM1S_LP_ILK);
- if (DISPLAY_VER(dev_priv) >= 7) {
+ if (DISPLAY_VER(display) >= 7) {
hw->wm_lp_spr[1] = intel_de_read(display, WM2S_LP_IVB);
hw->wm_lp_spr[2] = intel_de_read(display, WM3S_LP_IVB);
}
- if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
+ if (display->platform.haswell || display->platform.broadwell)
hw->partitioning = (intel_de_read(display, WM_MISC) &
WM_MISC_DATA_PARTITION_5_6) ?
INTEL_DDB_PART_5_6 : INTEL_DDB_PART_1_2;
- else if (IS_IVYBRIDGE(dev_priv))
+ else if (display->platform.ivybridge)
hw->partitioning = (intel_de_read(display, DISP_ARB_CTL2) &
DISP_DATA_PARTITION_5_6) ?
INTEL_DDB_PART_5_6 : INTEL_DDB_PART_1_2;
@@ -4175,35 +4147,35 @@ void i9xx_wm_init(struct intel_display *display)
/* For FIFO watermark updates */
if (HAS_PCH_SPLIT(dev_priv)) {
- ilk_setup_wm_latency(dev_priv);
- dev_priv->display.funcs.wm = &ilk_wm_funcs;
- } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
- vlv_setup_wm_latency(dev_priv);
- dev_priv->display.funcs.wm = &vlv_wm_funcs;
- } else if (IS_G4X(dev_priv)) {
- g4x_setup_wm_latency(dev_priv);
- dev_priv->display.funcs.wm = &g4x_wm_funcs;
- } else if (IS_PINEVIEW(dev_priv)) {
- if (!pnv_get_cxsr_latency(dev_priv)) {
- drm_info(&dev_priv->drm, "Unknown FSB/MEM, disabling CxSR\n");
+ ilk_setup_wm_latency(display);
+ display->funcs.wm = &ilk_wm_funcs;
+ } else if (display->platform.valleyview || display->platform.cherryview) {
+ vlv_setup_wm_latency(display);
+ display->funcs.wm = &vlv_wm_funcs;
+ } else if (display->platform.g4x) {
+ g4x_setup_wm_latency(display);
+ display->funcs.wm = &g4x_wm_funcs;
+ } else if (display->platform.pineview) {
+ if (!pnv_get_cxsr_latency(display)) {
+ drm_info(display->drm, "Unknown FSB/MEM, disabling CxSR\n");
/* Disable CxSR and never update its watermark again */
intel_set_memory_cxsr(display, false);
- dev_priv->display.funcs.wm = &nop_funcs;
+ display->funcs.wm = &nop_funcs;
} else {
- dev_priv->display.funcs.wm = &pnv_wm_funcs;
+ display->funcs.wm = &pnv_wm_funcs;
}
- } else if (DISPLAY_VER(dev_priv) == 4) {
- dev_priv->display.funcs.wm = &i965_wm_funcs;
- } else if (DISPLAY_VER(dev_priv) == 3) {
- dev_priv->display.funcs.wm = &i9xx_wm_funcs;
- } else if (DISPLAY_VER(dev_priv) == 2) {
- if (INTEL_NUM_PIPES(dev_priv) == 1)
- dev_priv->display.funcs.wm = &i845_wm_funcs;
+ } else if (DISPLAY_VER(display) == 4) {
+ display->funcs.wm = &i965_wm_funcs;
+ } else if (DISPLAY_VER(display) == 3) {
+ display->funcs.wm = &i9xx_wm_funcs;
+ } else if (DISPLAY_VER(display) == 2) {
+ if (INTEL_NUM_PIPES(display) == 1)
+ display->funcs.wm = &i845_wm_funcs;
else
- dev_priv->display.funcs.wm = &i9xx_wm_funcs;
+ display->funcs.wm = &i9xx_wm_funcs;
} else {
- drm_err(&dev_priv->drm,
+ drm_err(display->drm,
"unexpected fall-through in %s\n", __func__);
- dev_priv->display.funcs.wm = &nop_funcs;
+ display->funcs.wm = &nop_funcs;
}
}
--
2.39.5
^ permalink raw reply related [flat|nested] 16+ messages in thread* ✓ CI.Patch_applied: success for drm/i915/wm: convert to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
` (6 preceding siblings ...)
2025-04-03 9:11 ` [PATCH 7/7] drm/i915/wm: convert i9xx_wm.c internally to struct intel_display Jani Nikula
@ 2025-04-04 5:08 ` Patchwork
2025-04-04 5:09 ` ✗ CI.checkpatch: warning " Patchwork
` (6 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-04-04 5:08 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/wm: convert to struct intel_display
URL : https://patchwork.freedesktop.org/series/147192/
State : success
== Summary ==
=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: bc18da45d48d drm-tip: 2025y-04m-03d-16h-39m-16s UTC integration manifest
=== git am output follows ===
Applying: drm/i915/wm: convert intel_wm.h external interfaces to struct intel_display
Applying: drm/i915/wm: convert intel_wm.c internally to struct intel_display
Applying: drm/i915/wm: convert skl_watermark.h external interfaces to struct intel_display
Applying: drm/i915/wm: convert skl_watermarks.c internally to struct intel_display
Applying: drm/i915/wm: convert intel_wm.h external interfaces to struct intel_display
Applying: drm/i915/wm: convert i9xx_wm.c to intel_de_*() register interface
Applying: drm/i915/wm: convert i9xx_wm.c internally to struct intel_display
^ permalink raw reply [flat|nested] 16+ messages in thread* ✗ CI.checkpatch: warning for drm/i915/wm: convert to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
` (7 preceding siblings ...)
2025-04-04 5:08 ` ✓ CI.Patch_applied: success for drm/i915/wm: convert " Patchwork
@ 2025-04-04 5:09 ` Patchwork
2025-04-04 5:10 ` ✓ CI.KUnit: success " Patchwork
` (5 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-04-04 5:09 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/wm: convert to struct intel_display
URL : https://patchwork.freedesktop.org/series/147192/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
99e5a866b5e13f134e606a3e29d9508d97826fb3
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 354a1b2e53d57817a46d8f4108f3a52e541c8aff
Author: Jani Nikula <jani.nikula@intel.com>
Date: Thu Apr 3 12:11:39 2025 +0300
drm/i915/wm: convert i9xx_wm.c internally to struct intel_display
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of i9xx_wm.c to struct
intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch bc18da45d48d337b92a7ff9546ba61da32b3b586 drm-intel
092e6e286606 drm/i915/wm: convert intel_wm.h external interfaces to struct intel_display
a76e96758e1c drm/i915/wm: convert intel_wm.c internally to struct intel_display
0050a7d5e6c9 drm/i915/wm: convert skl_watermark.h external interfaces to struct intel_display
b097254df723 drm/i915/wm: convert skl_watermarks.c internally to struct intel_display
12aa0d66617f drm/i915/wm: convert intel_wm.h external interfaces to struct intel_display
-:166: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#166: FILE: drivers/gpu/drm/i915/display/i9xx_wm.h:25:
}
+static inline void ilk_wm_sanitize(struct intel_display *display)
-:170: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#170: FILE: drivers/gpu/drm/i915/display/i9xx_wm.h:28:
}
+static inline bool intel_set_memory_cxsr(struct intel_display *display, bool enable)
-:175: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#175: FILE: drivers/gpu/drm/i915/display/i9xx_wm.h:32:
}
+static inline void i9xx_wm_init(struct intel_display *display)
total: 0 errors, 0 warnings, 3 checks, 205 lines checked
bbbde3cf4c33 drm/i915/wm: convert i9xx_wm.c to intel_de_*() register interface
354a1b2e53d5 drm/i915/wm: convert i9xx_wm.c internally to struct intel_display
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ CI.KUnit: success for drm/i915/wm: convert to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
` (8 preceding siblings ...)
2025-04-04 5:09 ` ✗ CI.checkpatch: warning " Patchwork
@ 2025-04-04 5:10 ` Patchwork
2025-04-04 5:27 ` ✓ CI.Build: " Patchwork
` (4 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-04-04 5:10 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/wm: convert to struct intel_display
URL : https://patchwork.freedesktop.org/series/147192/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[05:09:21] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:09:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
156 | u64 ioread64_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
163 | u64 ioread64_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
170 | u64 ioread64be_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
178 | u64 ioread64be_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
[05:09:52] Starting KUnit Kernel (1/1)...
[05:09:52] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:09:52] ================== guc_buf (11 subtests) ===================
[05:09:52] [PASSED] test_smallest
[05:09:52] [PASSED] test_largest
[05:09:52] [PASSED] test_granular
[05:09:52] [PASSED] test_unique
[05:09:52] [PASSED] test_overlap
[05:09:52] [PASSED] test_reusable
[05:09:52] [PASSED] test_too_big
[05:09:52] [PASSED] test_flush
[05:09:52] [PASSED] test_lookup
[05:09:52] [PASSED] test_data
[05:09:52] [PASSED] test_class
[05:09:52] ===================== [PASSED] guc_buf =====================
[05:09:52] =================== guc_dbm (7 subtests) ===================
[05:09:52] [PASSED] test_empty
[05:09:52] [PASSED] test_default
[05:09:52] ======================== test_size ========================
[05:09:52] [PASSED] 4
[05:09:52] [PASSED] 8
[05:09:52] [PASSED] 32
[05:09:52] [PASSED] 256
[05:09:52] ==================== [PASSED] test_size ====================
[05:09:52] ======================= test_reuse ========================
[05:09:52] [PASSED] 4
[05:09:52] [PASSED] 8
[05:09:52] [PASSED] 32
[05:09:52] [PASSED] 256
[05:09:52] =================== [PASSED] test_reuse ====================
[05:09:52] =================== test_range_overlap ====================
[05:09:52] [PASSED] 4
[05:09:52] [PASSED] 8
[05:09:52] [PASSED] 32
[05:09:52] [PASSED] 256
[05:09:52] =============== [PASSED] test_range_overlap ================
[05:09:52] =================== test_range_compact ====================
[05:09:52] [PASSED] 4
[05:09:52] [PASSED] 8
[05:09:52] [PASSED] 32
[05:09:52] [PASSED] 256
[05:09:52] =============== [PASSED] test_range_compact ================
[05:09:52] ==================== test_range_spare =====================
[05:09:52] [PASSED] 4
[05:09:52] [PASSED] 8
[05:09:52] [PASSED] 32
[05:09:52] [PASSED] 256
[05:09:52] ================ [PASSED] test_range_spare =================
[05:09:52] ===================== [PASSED] guc_dbm =====================
[05:09:52] =================== guc_idm (6 subtests) ===================
[05:09:52] [PASSED] bad_init
[05:09:52] [PASSED] no_init
[05:09:52] [PASSED] init_fini
[05:09:52] [PASSED] check_used
[05:09:52] [PASSED] check_quota
[05:09:52] [PASSED] check_all
[05:09:52] ===================== [PASSED] guc_idm =====================
[05:09:52] ================== no_relay (3 subtests) ===================
[05:09:52] [PASSED] xe_drops_guc2pf_if_not_ready
[05:09:52] [PASSED] xe_drops_guc2vf_if_not_ready
[05:09:52] [PASSED] xe_rejects_send_if_not_ready
[05:09:52] ==================== [PASSED] no_relay =====================
[05:09:52] ================== pf_relay (14 subtests) ==================
[05:09:52] [PASSED] pf_rejects_guc2pf_too_short
[05:09:52] [PASSED] pf_rejects_guc2pf_too_long
[05:09:52] [PASSED] pf_rejects_guc2pf_no_payload
[05:09:52] [PASSED] pf_fails_no_payload
[05:09:52] [PASSED] pf_fails_bad_origin
[05:09:52] [PASSED] pf_fails_bad_type
[05:09:52] [PASSED] pf_txn_reports_error
[05:09:52] [PASSED] pf_txn_sends_pf2guc
[05:09:52] [PASSED] pf_sends_pf2guc
[05:09:52] [SKIPPED] pf_loopback_nop
[05:09:52] [SKIPPED] pf_loopback_echo
[05:09:52] [SKIPPED] pf_loopback_fail
[05:09:52] [SKIPPED] pf_loopback_busy
[05:09:52] [SKIPPED] pf_loopback_retry
[05:09:52] ==================== [PASSED] pf_relay =====================
[05:09:52] ================== vf_relay (3 subtests) ===================
[05:09:52] [PASSED] vf_rejects_guc2vf_too_short
[05:09:52] [PASSED] vf_rejects_guc2vf_too_long
[05:09:52] [PASSED] vf_rejects_guc2vf_no_payload
[05:09:52] ==================== [PASSED] vf_relay =====================
[05:09:52] ================= pf_service (11 subtests) =================
[05:09:52] [PASSED] pf_negotiate_any
[05:09:52] [PASSED] pf_negotiate_base_match
[05:09:52] [PASSED] pf_negotiate_base_newer
[05:09:52] [PASSED] pf_negotiate_base_next
[05:09:52] [SKIPPED] pf_negotiate_base_older
[05:09:52] [PASSED] pf_negotiate_base_prev
[05:09:52] [PASSED] pf_negotiate_latest_match
[05:09:52] [PASSED] pf_negotiate_latest_newer
[05:09:52] [PASSED] pf_negotiate_latest_next
[05:09:52] [SKIPPED] pf_negotiate_latest_older
[05:09:52] [SKIPPED] pf_negotiate_latest_prev
[05:09:52] =================== [PASSED] pf_service ====================
[05:09:52] ===================== lmtt (1 subtest) =====================
[05:09:52] ======================== test_ops =========================
[05:09:52] [PASSED] 2-level
[05:09:52] [PASSED] multi-level
[05:09:52] ==================== [PASSED] test_ops =====================
[05:09:52] ====================== [PASSED] lmtt =======================
[05:09:52] =================== xe_mocs (2 subtests) ===================
[05:09:52] ================ xe_live_mocs_kernel_kunit ================
[05:09:52] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[05:09:52] ================ xe_live_mocs_reset_kunit =================
[05:09:52] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[05:09:52] ==================== [SKIPPED] xe_mocs =====================
[05:09:52] ================= xe_migrate (2 subtests) ==================
[05:09:52] ================= xe_migrate_sanity_kunit =================
[05:09:52] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[05:09:52] ================== xe_validate_ccs_kunit ==================
[05:09:52] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[05:09:52] =================== [SKIPPED] xe_migrate ===================
[05:09:52] ================== xe_dma_buf (1 subtest) ==================
[05:09:52] ==================== xe_dma_buf_kunit =====================
[05:09:52] ================ [SKIPPED] xe_dma_buf_kunit ================
[05:09:52] =================== [SKIPPED] xe_dma_buf ===================
[05:09:52] ================= xe_bo_shrink (1 subtest) =================
[05:09:52] =================== xe_bo_shrink_kunit ====================
[05:09:52] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[05:09:52] ================== [SKIPPED] xe_bo_shrink ==================
[05:09:52] ==================== xe_bo (2 subtests) ====================
[05:09:52] ================== xe_ccs_migrate_kunit ===================
[05:09:52] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
stty: 'standard input': Inappropriate ioctl for device
[05:09:52] ==================== xe_bo_evict_kunit ====================
[05:09:52] =============== [SKIPPED] xe_bo_evict_kunit ================
[05:09:52] ===================== [SKIPPED] xe_bo ======================
[05:09:52] ==================== args (11 subtests) ====================
[05:09:52] [PASSED] count_args_test
[05:09:52] [PASSED] call_args_example
[05:09:52] [PASSED] call_args_test
[05:09:52] [PASSED] drop_first_arg_example
[05:09:52] [PASSED] drop_first_arg_test
[05:09:52] [PASSED] first_arg_example
[05:09:52] [PASSED] first_arg_test
[05:09:52] [PASSED] last_arg_example
[05:09:52] [PASSED] last_arg_test
[05:09:52] [PASSED] pick_arg_example
[05:09:52] [PASSED] sep_comma_example
[05:09:52] ====================== [PASSED] args =======================
[05:09:52] =================== xe_pci (2 subtests) ====================
[05:09:52] [PASSED] xe_gmdid_graphics_ip
[05:09:52] [PASSED] xe_gmdid_media_ip
[05:09:52] ===================== [PASSED] xe_pci ======================
[05:09:52] =================== xe_rtp (2 subtests) ====================
[05:09:52] =============== xe_rtp_process_to_sr_tests ================
[05:09:52] [PASSED] coalesce-same-reg
[05:09:52] [PASSED] no-match-no-add
[05:09:52] [PASSED] match-or
[05:09:52] [PASSED] match-or-xfail
[05:09:52] [PASSED] no-match-no-add-multiple-rules
[05:09:52] [PASSED] two-regs-two-entries
[05:09:52] [PASSED] clr-one-set-other
[05:09:52] [PASSED] set-field
[05:09:52] [PASSED] conflict-duplicate
[05:09:52] [PASSED] conflict-not-disjoint
[05:09:52] [PASSED] conflict-reg-type
[05:09:52] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[05:09:52] ================== xe_rtp_process_tests ===================
[05:09:52] [PASSED] active1
[05:09:52] [PASSED] active2
[05:09:52] [PASSED] active-inactive
[05:09:52] [PASSED] inactive-active
[05:09:52] [PASSED] inactive-1st_or_active-inactive
[05:09:52] [PASSED] inactive-2nd_or_active-inactive
[05:09:52] [PASSED] inactive-last_or_active-inactive
[05:09:52] [PASSED] inactive-no_or_active-inactive
[05:09:52] ============== [PASSED] xe_rtp_process_tests ===============
[05:09:52] ===================== [PASSED] xe_rtp ======================
[05:09:52] ==================== xe_wa (1 subtest) =====================
[05:09:52] ======================== xe_wa_gt =========================
[05:09:52] [PASSED] TIGERLAKE (B0)
[05:09:52] [PASSED] DG1 (A0)
[05:09:52] [PASSED] DG1 (B0)
[05:09:52] [PASSED] ALDERLAKE_S (A0)
[05:09:52] [PASSED] ALDERLAKE_S (B0)
[05:09:52] [PASSED] ALDERLAKE_S (C0)
[05:09:52] [PASSED] ALDERLAKE_S (D0)
[05:09:52] [PASSED] ALDERLAKE_P (A0)
[05:09:52] [PASSED] ALDERLAKE_P (B0)
[05:09:52] [PASSED] ALDERLAKE_P (C0)
[05:09:52] [PASSED] ALDERLAKE_S_RPLS (D0)
[05:09:52] [PASSED] ALDERLAKE_P_RPLU (E0)
[05:09:52] [PASSED] DG2_G10 (C0)
[05:09:52] [PASSED] DG2_G11 (B1)
[05:09:52] [PASSED] DG2_G12 (A1)
[05:09:52] [PASSED] METEORLAKE (g:A0, m:A0)
[05:09:52] [PASSED] METEORLAKE (g:A0, m:A0)
[05:09:52] [PASSED] METEORLAKE (g:A0, m:A0)
[05:09:52] [PASSED] LUNARLAKE (g:A0, m:A0)
[05:09:52] [PASSED] LUNARLAKE (g:B0, m:A0)
[05:09:52] [PASSED] BATTLEMAGE (g:A0, m:A1)
[05:09:52] ==================== [PASSED] xe_wa_gt =====================
[05:09:52] ====================== [PASSED] xe_wa ======================
[05:09:52] ============================================================
[05:09:52] Testing complete. Ran 133 tests: passed: 117, skipped: 16
[05:09:52] Elapsed time: 30.598s total, 4.204s configuring, 26.128s building, 0.241s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[05:09:52] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:09:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
156 | u64 ioread64_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
163 | u64 ioread64_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
170 | u64 ioread64be_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
178 | u64 ioread64be_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
[05:10:15] Starting KUnit Kernel (1/1)...
[05:10:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:10:15] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[05:10:15] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[05:10:15] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[05:10:15] =========== drm_validate_clone_mode (2 subtests) ===========
[05:10:15] ============== drm_test_check_in_clone_mode ===============
[05:10:15] [PASSED] in_clone_mode
[05:10:15] [PASSED] not_in_clone_mode
[05:10:15] ========== [PASSED] drm_test_check_in_clone_mode ===========
[05:10:15] =============== drm_test_check_valid_clones ===============
[05:10:15] [PASSED] not_in_clone_mode
[05:10:15] [PASSED] valid_clone
[05:10:15] [PASSED] invalid_clone
[05:10:15] =========== [PASSED] drm_test_check_valid_clones ===========
[05:10:15] ============= [PASSED] drm_validate_clone_mode =============
[05:10:15] ============= drm_validate_modeset (1 subtest) =============
[05:10:15] [PASSED] drm_test_check_connector_changed_modeset
[05:10:15] ============== [PASSED] drm_validate_modeset ===============
[05:10:15] ====== drm_test_bridge_get_current_state (2 subtests) ======
[05:10:15] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[05:10:15] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[05:10:15] ======== [PASSED] drm_test_bridge_get_current_state ========
[05:10:15] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[05:10:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[05:10:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[05:10:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[05:10:15] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[05:10:15] ================== drm_buddy (7 subtests) ==================
[05:10:15] [PASSED] drm_test_buddy_alloc_limit
[05:10:15] [PASSED] drm_test_buddy_alloc_optimistic
[05:10:15] [PASSED] drm_test_buddy_alloc_pessimistic
[05:10:15] [PASSED] drm_test_buddy_alloc_pathological
[05:10:15] [PASSED] drm_test_buddy_alloc_contiguous
[05:10:15] [PASSED] drm_test_buddy_alloc_clear
[05:10:15] [PASSED] drm_test_buddy_alloc_range_bias
[05:10:15] ==================== [PASSED] drm_buddy ====================
[05:10:15] ============= drm_cmdline_parser (40 subtests) =============
[05:10:15] [PASSED] drm_test_cmdline_force_d_only
[05:10:15] [PASSED] drm_test_cmdline_force_D_only_dvi
[05:10:15] [PASSED] drm_test_cmdline_force_D_only_hdmi
[05:10:15] [PASSED] drm_test_cmdline_force_D_only_not_digital
[05:10:15] [PASSED] drm_test_cmdline_force_e_only
[05:10:15] [PASSED] drm_test_cmdline_res
[05:10:15] [PASSED] drm_test_cmdline_res_vesa
[05:10:15] [PASSED] drm_test_cmdline_res_vesa_rblank
[05:10:15] [PASSED] drm_test_cmdline_res_rblank
[05:10:15] [PASSED] drm_test_cmdline_res_bpp
[05:10:15] [PASSED] drm_test_cmdline_res_refresh
[05:10:15] [PASSED] drm_test_cmdline_res_bpp_refresh
[05:10:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[05:10:15] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[05:10:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[05:10:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[05:10:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[05:10:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[05:10:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[05:10:15] [PASSED] drm_test_cmdline_res_margins_force_on
[05:10:15] [PASSED] drm_test_cmdline_res_vesa_margins
[05:10:15] [PASSED] drm_test_cmdline_name
[05:10:15] [PASSED] drm_test_cmdline_name_bpp
[05:10:15] [PASSED] drm_test_cmdline_name_option
[05:10:15] [PASSED] drm_test_cmdline_name_bpp_option
[05:10:15] [PASSED] drm_test_cmdline_rotate_0
[05:10:15] [PASSED] drm_test_cmdline_rotate_90
[05:10:15] [PASSED] drm_test_cmdline_rotate_180
[05:10:15] [PASSED] drm_test_cmdline_rotate_270
[05:10:15] [PASSED] drm_test_cmdline_hmirror
[05:10:15] [PASSED] drm_test_cmdline_vmirror
[05:10:15] [PASSED] drm_test_cmdline_margin_options
[05:10:15] [PASSED] drm_test_cmdline_multiple_options
[05:10:15] [PASSED] drm_test_cmdline_bpp_extra_and_option
[05:10:15] [PASSED] drm_test_cmdline_extra_and_option
[05:10:15] [PASSED] drm_test_cmdline_freestanding_options
[05:10:15] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[05:10:15] [PASSED] drm_test_cmdline_panel_orientation
[05:10:15] ================ drm_test_cmdline_invalid =================
[05:10:15] [PASSED] margin_only
[05:10:15] [PASSED] interlace_only
[05:10:15] [PASSED] res_missing_x
[05:10:15] [PASSED] res_missing_y
[05:10:15] [PASSED] res_bad_y
[05:10:15] [PASSED] res_missing_y_bpp
[05:10:15] [PASSED] res_bad_bpp
[05:10:15] [PASSED] res_bad_refresh
[05:10:15] [PASSED] res_bpp_refresh_force_on_off
[05:10:15] [PASSED] res_invalid_mode
[05:10:15] [PASSED] res_bpp_wrong_place_mode
[05:10:15] [PASSED] name_bpp_refresh
[05:10:15] [PASSED] name_refresh
[05:10:15] [PASSED] name_refresh_wrong_mode
[05:10:15] [PASSED] name_refresh_invalid_mode
[05:10:15] [PASSED] rotate_multiple
[05:10:15] [PASSED] rotate_invalid_val
[05:10:15] [PASSED] rotate_truncated
[05:10:15] [PASSED] invalid_option
[05:10:15] [PASSED] invalid_tv_option
[05:10:15] [PASSED] truncated_tv_option
[05:10:15] ============ [PASSED] drm_test_cmdline_invalid =============
[05:10:15] =============== drm_test_cmdline_tv_options ===============
[05:10:15] [PASSED] NTSC
[05:10:15] [PASSED] NTSC_443
[05:10:15] [PASSED] NTSC_J
[05:10:15] [PASSED] PAL
[05:10:15] [PASSED] PAL_M
[05:10:15] [PASSED] PAL_N
[05:10:15] [PASSED] SECAM
[05:10:15] [PASSED] MONO_525
[05:10:15] [PASSED] MONO_625
[05:10:15] =========== [PASSED] drm_test_cmdline_tv_options ===========
[05:10:15] =============== [PASSED] drm_cmdline_parser ================
[05:10:15] ========== drmm_connector_hdmi_init (20 subtests) ==========
[05:10:15] [PASSED] drm_test_connector_hdmi_init_valid
[05:10:15] [PASSED] drm_test_connector_hdmi_init_bpc_8
[05:10:15] [PASSED] drm_test_connector_hdmi_init_bpc_10
[05:10:15] [PASSED] drm_test_connector_hdmi_init_bpc_12
[05:10:15] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[05:10:15] [PASSED] drm_test_connector_hdmi_init_bpc_null
[05:10:15] [PASSED] drm_test_connector_hdmi_init_formats_empty
[05:10:15] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[05:10:15] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:10:15] [PASSED] supported_formats=0x9 yuv420_allowed=1
[05:10:15] [PASSED] supported_formats=0x9 yuv420_allowed=0
[05:10:15] [PASSED] supported_formats=0x3 yuv420_allowed=1
[05:10:15] [PASSED] supported_formats=0x3 yuv420_allowed=0
[05:10:15] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:10:15] [PASSED] drm_test_connector_hdmi_init_null_ddc
[05:10:15] [PASSED] drm_test_connector_hdmi_init_null_product
[05:10:15] [PASSED] drm_test_connector_hdmi_init_null_vendor
[05:10:15] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[05:10:15] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[05:10:15] [PASSED] drm_test_connector_hdmi_init_product_valid
[05:10:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[05:10:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[05:10:15] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[05:10:15] ========= drm_test_connector_hdmi_init_type_valid =========
[05:10:15] [PASSED] HDMI-A
[05:10:15] [PASSED] HDMI-B
[05:10:15] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[05:10:15] ======== drm_test_connector_hdmi_init_type_invalid ========
[05:10:15] [PASSED] Unknown
[05:10:15] [PASSED] VGA
[05:10:15] [PASSED] DVI-I
[05:10:15] [PASSED] DVI-D
[05:10:15] [PASSED] DVI-A
[05:10:15] [PASSED] Composite
[05:10:15] [PASSED] SVIDEO
[05:10:15] [PASSED] LVDS
[05:10:15] [PASSED] Component
[05:10:15] [PASSED] DIN
[05:10:15] [PASSED] DP
[05:10:15] [PASSED] TV
[05:10:15] [PASSED] eDP
[05:10:15] [PASSED] Virtual
[05:10:15] [PASSED] DSI
[05:10:15] [PASSED] DPI
[05:10:15] [PASSED] Writeback
[05:10:15] [PASSED] SPI
[05:10:15] [PASSED] USB
[05:10:15] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[05:10:15] ============ [PASSED] drmm_connector_hdmi_init =============
[05:10:15] ============= drmm_connector_init (3 subtests) =============
[05:10:15] [PASSED] drm_test_drmm_connector_init
[05:10:15] [PASSED] drm_test_drmm_connector_init_null_ddc
[05:10:15] ========= drm_test_drmm_connector_init_type_valid =========
[05:10:15] [PASSED] Unknown
[05:10:15] [PASSED] VGA
[05:10:15] [PASSED] DVI-I
[05:10:15] [PASSED] DVI-D
[05:10:15] [PASSED] DVI-A
[05:10:15] [PASSED] Composite
[05:10:15] [PASSED] SVIDEO
[05:10:15] [PASSED] LVDS
[05:10:15] [PASSED] Component
[05:10:15] [PASSED] DIN
[05:10:15] [PASSED] DP
[05:10:15] [PASSED] HDMI-A
[05:10:15] [PASSED] HDMI-B
[05:10:15] [PASSED] TV
[05:10:15] [PASSED] eDP
[05:10:15] [PASSED] Virtual
[05:10:15] [PASSED] DSI
[05:10:15] [PASSED] DPI
[05:10:15] [PASSED] Writeback
[05:10:15] [PASSED] SPI
[05:10:15] [PASSED] USB
[05:10:15] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[05:10:15] =============== [PASSED] drmm_connector_init ===============
[05:10:15] ========= drm_connector_dynamic_init (6 subtests) ==========
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_init
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_init_properties
[05:10:15] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[05:10:15] [PASSED] Unknown
[05:10:15] [PASSED] VGA
[05:10:15] [PASSED] DVI-I
[05:10:15] [PASSED] DVI-D
[05:10:15] [PASSED] DVI-A
[05:10:15] [PASSED] Composite
[05:10:15] [PASSED] SVIDEO
[05:10:15] [PASSED] LVDS
[05:10:15] [PASSED] Component
[05:10:15] [PASSED] DIN
[05:10:15] [PASSED] DP
[05:10:15] [PASSED] HDMI-A
[05:10:15] [PASSED] HDMI-B
[05:10:15] [PASSED] TV
[05:10:15] [PASSED] eDP
[05:10:15] [PASSED] Virtual
[05:10:15] [PASSED] DSI
[05:10:15] [PASSED] DPI
[05:10:15] [PASSED] Writeback
[05:10:15] [PASSED] SPI
[05:10:15] [PASSED] USB
[05:10:15] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[05:10:15] ======== drm_test_drm_connector_dynamic_init_name =========
[05:10:15] [PASSED] Unknown
[05:10:15] [PASSED] VGA
[05:10:15] [PASSED] DVI-I
[05:10:15] [PASSED] DVI-D
[05:10:15] [PASSED] DVI-A
[05:10:15] [PASSED] Composite
[05:10:15] [PASSED] SVIDEO
[05:10:15] [PASSED] LVDS
[05:10:15] [PASSED] Component
[05:10:15] [PASSED] DIN
[05:10:15] [PASSED] DP
[05:10:15] [PASSED] HDMI-A
[05:10:15] [PASSED] HDMI-B
[05:10:15] [PASSED] TV
[05:10:15] [PASSED] eDP
[05:10:15] [PASSED] Virtual
[05:10:15] [PASSED] DSI
[05:10:15] [PASSED] DPI
[05:10:15] [PASSED] Writeback
[05:10:15] [PASSED] SPI
[05:10:15] [PASSED] USB
[05:10:15] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[05:10:15] =========== [PASSED] drm_connector_dynamic_init ============
[05:10:15] ==== drm_connector_dynamic_register_early (4 subtests) =====
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[05:10:15] ====== [PASSED] drm_connector_dynamic_register_early =======
[05:10:15] ======= drm_connector_dynamic_register (7 subtests) ========
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[05:10:15] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[05:10:15] ========= [PASSED] drm_connector_dynamic_register ==========
[05:10:15] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[05:10:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[05:10:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[05:10:15] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[05:10:15] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[05:10:15] ========== drm_test_get_tv_mode_from_name_valid ===========
[05:10:15] [PASSED] NTSC
[05:10:15] [PASSED] NTSC-443
[05:10:15] [PASSED] NTSC-J
[05:10:15] [PASSED] PAL
[05:10:15] [PASSED] PAL-M
[05:10:15] [PASSED] PAL-N
[05:10:15] [PASSED] SECAM
[05:10:15] [PASSED] Mono
[05:10:15] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[05:10:15] [PASSED] drm_test_get_tv_mode_from_name_truncated
[05:10:15] ============ [PASSED] drm_get_tv_mode_from_name ============
[05:10:15] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[05:10:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[05:10:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[05:10:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[05:10:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[05:10:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[05:10:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[05:10:15] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[05:10:15] [PASSED] VIC 96
[05:10:15] [PASSED] VIC 97
[05:10:15] [PASSED] VIC 101
[05:10:15] [PASSED] VIC 102
[05:10:15] [PASSED] VIC 106
[05:10:15] [PASSED] VIC 107
[05:10:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[05:10:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[05:10:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[05:10:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[05:10:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[05:10:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[05:10:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[05:10:15] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[05:10:15] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[05:10:15] [PASSED] Automatic
[05:10:15] [PASSED] Full
[05:10:15] [PASSED] Limited 16:235
[05:10:15] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[05:10:15] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[05:10:15] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[05:10:15] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[05:10:15] === drm_test_drm_hdmi_connector_get_output_format_name ====
[05:10:15] [PASSED] RGB
[05:10:15] [PASSED] YUV 4:2:0
[05:10:15] [PASSED] YUV 4:2:2
[05:10:15] [PASSED] YUV 4:4:4
[05:10:15] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[05:10:15] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[05:10:15] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[05:10:15] ============= drm_damage_helper (21 subtests) ==============
[05:10:15] [PASSED] drm_test_damage_iter_no_damage
[05:10:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[05:10:15] [PASSED] drm_test_damage_iter_no_damage_src_moved
[05:10:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[05:10:15] [PASSED] drm_test_damage_iter_no_damage_not_visible
[05:10:15] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[05:10:15] [PASSED] drm_test_damage_iter_no_damage_no_fb
[05:10:15] [PASSED] drm_test_damage_iter_simple_damage
[05:10:15] [PASSED] drm_test_damage_iter_single_damage
[05:10:15] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[05:10:15] [PASSED] drm_test_damage_iter_single_damage_outside_src
[05:10:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[05:10:15] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[05:10:15] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[05:10:15] [PASSED] drm_test_damage_iter_single_damage_src_moved
[05:10:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[05:10:15] [PASSED] drm_test_damage_iter_damage
[05:10:15] [PASSED] drm_test_damage_iter_damage_one_intersect
[05:10:15] [PASSED] drm_test_damage_iter_damage_one_outside
[05:10:15] [PASSED] drm_test_damage_iter_damage_src_moved
[05:10:15] [PASSED] drm_test_damage_iter_damage_not_visible
[05:10:15] ================ [PASSED] drm_damage_helper ================
[05:10:15] ============== drm_dp_mst_helper (3 subtests) ==============
[05:10:15] ============== drm_test_dp_mst_calc_pbn_mode ==============
[05:10:15] [PASSED] Clock 154000 BPP 30 DSC disabled
[05:10:15] [PASSED] Clock 234000 BPP 30 DSC disabled
[05:10:15] [PASSED] Clock 297000 BPP 24 DSC disabled
[05:10:15] [PASSED] Clock 332880 BPP 24 DSC enabled
[05:10:15] [PASSED] Clock 324540 BPP 24 DSC enabled
[05:10:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[05:10:15] ============== drm_test_dp_mst_calc_pbn_div ===============
[05:10:15] [PASSED] Link rate 2000000 lane count 4
[05:10:15] [PASSED] Link rate 2000000 lane count 2
[05:10:15] [PASSED] Link rate 2000000 lane count 1
[05:10:15] [PASSED] Link rate 1350000 lane count 4
[05:10:15] [PASSED] Link rate 1350000 lane count 2
[05:10:15] [PASSED] Link rate 1350000 lane count 1
[05:10:15] [PASSED] Link rate 1000000 lane count 4
[05:10:15] [PASSED] Link rate 1000000 lane count 2
[05:10:15] [PASSED] Link rate 1000000 lane count 1
[05:10:15] [PASSED] Link rate 810000 lane count 4
[05:10:15] [PASSED] Link rate 810000 lane count 2
[05:10:15] [PASSED] Link rate 810000 lane count 1
[05:10:15] [PASSED] Link rate 540000 lane count 4
[05:10:15] [PASSED] Link rate 540000 lane count 2
[05:10:15] [PASSED] Link rate 540000 lane count 1
[05:10:15] [PASSED] Link rate 270000 lane count 4
[05:10:15] [PASSED] Link rate 270000 lane count 2
[05:10:15] [PASSED] Link rate 270000 lane count 1
[05:10:15] [PASSED] Link rate 162000 lane count 4
[05:10:15] [PASSED] Link rate 162000 lane count 2
[05:10:15] [PASSED] Link rate 162000 lane count 1
[05:10:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[05:10:15] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[05:10:15] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[05:10:15] [PASSED] DP_POWER_UP_PHY with port number
[05:10:15] [PASSED] DP_POWER_DOWN_PHY with port number
[05:10:15] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[05:10:15] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[05:10:15] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[05:10:15] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[05:10:15] [PASSED] DP_QUERY_PAYLOAD with port number
[05:10:15] [PASSED] DP_QUERY_PAYLOAD with VCPI
[05:10:15] [PASSED] DP_REMOTE_DPCD_READ with port number
[05:10:15] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[05:10:15] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[05:10:15] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[05:10:15] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[05:10:15] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[05:10:15] [PASSED] DP_REMOTE_I2C_READ with port number
[05:10:15] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[05:10:15] [PASSED] DP_REMOTE_I2C_READ with transactions array
[05:10:15] [PASSED] DP_REMOTE_I2C_WRITE with port number
[05:10:15] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[05:10:15] [PASSED] DP_REMOTE_I2C_WRITE with data array
[05:10:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[05:10:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[05:10:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[05:10:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[05:10:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[05:10:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[05:10:15] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[05:10:15] ================ [PASSED] drm_dp_mst_helper ================
[05:10:15] ================== drm_exec (7 subtests) ===================
[05:10:15] [PASSED] sanitycheck
[05:10:15] [PASSED] test_lock
[05:10:15] [PASSED] test_lock_unlock
[05:10:15] [PASSED] test_duplicates
[05:10:15] [PASSED] test_prepare
[05:10:15] [PASSED] test_prepare_array
[05:10:15] [PASSED] test_multiple_loops
[05:10:15] ==================== [PASSED] drm_exec =====================
[05:10:15] =========== drm_format_helper_test (18 subtests) ===========
[05:10:15] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[05:10:15] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[05:10:15] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[05:10:15] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[05:10:15] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[05:10:15] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[05:10:15] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[05:10:15] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[05:10:15] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[05:10:15] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[05:10:15] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[05:10:15] ============== drm_test_fb_xrgb8888_to_mono ===============
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[05:10:15] ==================== drm_test_fb_swab =====================
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ================ [PASSED] drm_test_fb_swab =================
[05:10:15] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[05:10:15] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[05:10:15] [PASSED] single_pixel_source_buffer
[05:10:15] [PASSED] single_pixel_clip_rectangle
[05:10:15] [PASSED] well_known_colors
[05:10:15] [PASSED] destination_pitch
[05:10:15] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[05:10:15] ================= drm_test_fb_clip_offset =================
[05:10:15] [PASSED] pass through
[05:10:15] [PASSED] horizontal offset
[05:10:15] [PASSED] vertical offset
[05:10:15] [PASSED] horizontal and vertical offset
[05:10:15] [PASSED] horizontal offset (custom pitch)
[05:10:15] [PASSED] vertical offset (custom pitch)
[05:10:15] [PASSED] horizontal and vertical offset (custom pitch)
[05:10:15] ============= [PASSED] drm_test_fb_clip_offset =============
[05:10:15] ============== drm_test_fb_build_fourcc_list ==============
[05:10:15] [PASSED] no native formats
[05:10:15] [PASSED] XRGB8888 as native format
[05:10:15] [PASSED] remove duplicates
[05:10:15] [PASSED] convert alpha formats
[05:10:15] [PASSED] random formats
[05:10:15] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[05:10:15] =================== drm_test_fb_memcpy ====================
[05:10:15] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[05:10:15] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[05:10:15] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[05:10:15] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[05:10:15] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[05:10:15] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[05:10:15] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[05:10:15] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[05:10:15] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[05:10:15] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[05:10:15] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[05:10:15] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[05:10:15] =============== [PASSED] drm_test_fb_memcpy ================
[05:10:15] ============= [PASSED] drm_format_helper_test ==============
[05:10:15] ================= drm_format (18 subtests) =================
[05:10:15] [PASSED] drm_test_format_block_width_invalid
[05:10:15] [PASSED] drm_test_format_block_width_one_plane
[05:10:15] [PASSED] drm_test_format_block_width_two_plane
[05:10:15] [PASSED] drm_test_format_block_width_three_plane
[05:10:15] [PASSED] drm_test_format_block_width_tiled
[05:10:15] [PASSED] drm_test_format_block_height_invalid
[05:10:15] [PASSED] drm_test_format_block_height_one_plane
[05:10:15] [PASSED] drm_test_format_block_height_two_plane
[05:10:15] [PASSED] drm_test_format_block_height_three_plane
[05:10:15] [PASSED] drm_test_format_block_height_tiled
[05:10:15] [PASSED] drm_test_format_min_pitch_invalid
[05:10:15] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[05:10:15] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[05:10:15] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[05:10:15] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[05:10:15] [PASSED] drm_test_format_min_pitch_two_plane
[05:10:15] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[05:10:15] [PASSED] drm_test_format_min_pitch_tiled
[05:10:15] =================== [PASSED] drm_format ====================
[05:10:15] ============== drm_framebuffer (10 subtests) ===============
[05:10:15] ========== drm_test_framebuffer_check_src_coords ==========
[05:10:15] [PASSED] Success: source fits into fb
[05:10:15] [PASSED] Fail: overflowing fb with x-axis coordinate
[05:10:15] [PASSED] Fail: overflowing fb with y-axis coordinate
[05:10:15] [PASSED] Fail: overflowing fb with source width
[05:10:15] [PASSED] Fail: overflowing fb with source height
[05:10:15] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[05:10:15] [PASSED] drm_test_framebuffer_cleanup
[05:10:15] =============== drm_test_framebuffer_create ===============
[05:10:15] [PASSED] ABGR8888 normal sizes
[05:10:15] [PASSED] ABGR8888 max sizes
[05:10:15] [PASSED] ABGR8888 pitch greater than min required
[05:10:15] [PASSED] ABGR8888 pitch less than min required
[05:10:15] [PASSED] ABGR8888 Invalid width
[05:10:15] [PASSED] ABGR8888 Invalid buffer handle
[05:10:15] [PASSED] No pixel format
[05:10:15] [PASSED] ABGR8888 Width 0
[05:10:15] [PASSED] ABGR8888 Height 0
[05:10:15] [PASSED] ABGR8888 Out of bound height * pitch combination
[05:10:15] [PASSED] ABGR8888 Large buffer offset
[05:10:15] [PASSED] ABGR8888 Buffer offset for inexistent plane
[05:10:15] [PASSED] ABGR8888 Invalid flag
[05:10:15] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[05:10:15] [PASSED] ABGR8888 Valid buffer modifier
[05:10:15] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[05:10:15] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[05:10:15] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[05:10:15] [PASSED] NV12 Normal sizes
[05:10:15] [PASSED] NV12 Max sizes
[05:10:15] [PASSED] NV12 Invalid pitch
[05:10:15] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[05:10:15] [PASSED] NV12 different modifier per-plane
[05:10:15] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[05:10:15] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[05:10:15] [PASSED] NV12 Modifier for inexistent plane
[05:10:15] [PASSED] NV12 Handle for inexistent plane
[05:10:15] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[05:10:15] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[05:10:15] [PASSED] YVU420 Normal sizes
[05:10:15] [PASSED] YVU420 Max sizes
[05:10:15] [PASSED] YVU420 Invalid pitch
[05:10:15] [PASSED] YVU420 Different pitches
[05:10:15] [PASSED] YVU420 Different buffer offsets/pitches
[05:10:15] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[05:10:15] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[05:10:15] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[05:10:15] [PASSED] YVU420 Valid modifier
[05:10:15] [PASSED] YVU420 Different modifiers per plane
[05:10:15] [PASSED] YVU420 Modifier for inexistent plane
[05:10:15] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[05:10:15] [PASSED] X0L2 Normal sizes
[05:10:15] [PASSED] X0L2 Max sizes
[05:10:15] [PASSED] X0L2 Invalid pitch
[05:10:15] [PASSED] X0L2 Pitch greater than minimum required
[05:10:15] [PASSED] X0L2 Handle for inexistent plane
[05:10:15] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[05:10:15] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[05:10:15] [PASSED] X0L2 Valid modifier
[05:10:15] [PASSED] X0L2 Modifier for inexistent plane
[05:10:15] =========== [PASSED] drm_test_framebuffer_create ===========
[05:10:15] [PASSED] drm_test_framebuffer_free
[05:10:15] [PASSED] drm_test_framebuffer_init
[05:10:15] [PASSED] drm_test_framebuffer_init_bad_format
[05:10:15] [PASSED] drm_test_framebuffer_init_dev_mismatch
[05:10:15] [PASSED] drm_test_framebuffer_lookup
[05:10:15] [PASSED] drm_test_framebuffer_lookup_inexistent
[05:10:15] [PASSED] drm_test_framebuffer_modifiers_not_supported
[05:10:15] ================= [PASSED] drm_framebuffer =================
[05:10:15] ================ drm_gem_shmem (8 subtests) ================
[05:10:15] [PASSED] drm_gem_shmem_test_obj_create
[05:10:15] [PASSED] drm_gem_shmem_test_obj_create_private
[05:10:15] [PASSED] drm_gem_shmem_test_pin_pages
[05:10:15] [PASSED] drm_gem_shmem_test_vmap
[05:10:15] [PASSED] drm_gem_shmem_test_get_pages_sgt
[05:10:15] [PASSED] drm_gem_shmem_test_get_sg_table
[05:10:15] [PASSED] drm_gem_shmem_test_madvise
[05:10:15] [PASSED] drm_gem_shmem_test_purge
[05:10:15] ================== [PASSED] drm_gem_shmem ==================
[05:10:15] === drm_atomic_helper_connector_hdmi_check (23 subtests) ===
[05:10:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[05:10:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[05:10:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[05:10:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[05:10:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[05:10:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[05:10:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[05:10:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[05:10:15] [PASSED] drm_test_check_disable_connector
[05:10:15] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[05:10:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback
[05:10:15] [PASSED] drm_test_check_max_tmds_rate_format_fallback
[05:10:15] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[05:10:15] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[05:10:15] [PASSED] drm_test_check_output_bpc_dvi
[05:10:15] [PASSED] drm_test_check_output_bpc_format_vic_1
[05:10:15] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[05:10:15] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[05:10:15] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[05:10:15] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[05:10:15] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[05:10:15] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[05:10:15] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[05:10:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[05:10:15] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[05:10:15] [PASSED] drm_test_check_broadcast_rgb_value
[05:10:15] [PASSED] drm_test_check_bpc_8_value
[05:10:15] [PASSED] drm_test_check_bpc_10_value
[05:10:15] [PASSED] drm_test_check_bpc_12_value
[05:10:15] [PASSED] drm_test_check_format_value
[05:10:15] [PASSED] drm_test_check_tmds_char_value
[05:10:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[05:10:15] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[05:10:15] [PASSED] drm_test_check_mode_valid
[05:10:15] [PASSED] drm_test_check_mode_valid_reject
[05:10:15] [PASSED] drm_test_check_mode_valid_reject_rate
[05:10:15] [PASSED] drm_test_check_mode_valid_reject_max_clock
[05:10:15] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[05:10:15] ================= drm_managed (2 subtests) =================
[05:10:15] [PASSED] drm_test_managed_release_action
[05:10:15] [PASSED] drm_test_managed_run_action
[05:10:15] =================== [PASSED] drm_managed ===================
[05:10:15] =================== drm_mm (6 subtests) ====================
[05:10:15] [PASSED] drm_test_mm_init
[05:10:15] [PASSED] drm_test_mm_debug
[05:10:15] [PASSED] drm_test_mm_align32
[05:10:15] [PASSED] drm_test_mm_align64
[05:10:15] [PASSED] drm_test_mm_lowest
[05:10:15] [PASSED] drm_test_mm_highest
[05:10:15] ===================== [PASSED] drm_mm ======================
[05:10:15] ============= drm_modes_analog_tv (5 subtests) =============
[05:10:15] [PASSED] drm_test_modes_analog_tv_mono_576i
[05:10:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[05:10:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[05:10:15] [PASSED] drm_test_modes_analog_tv_pal_576i
[05:10:15] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[05:10:15] =============== [PASSED] drm_modes_analog_tv ===============
[05:10:15] ============== drm_plane_helper (2 subtests) ===============
[05:10:15] =============== drm_test_check_plane_state ================
[05:10:15] [PASSED] clipping_simple
[05:10:15] [PASSED] clipping_rotate_reflect
[05:10:15] [PASSED] positioning_simple
[05:10:15] [PASSED] upscaling
[05:10:15] [PASSED] downscaling
[05:10:15] [PASSED] rounding1
[05:10:15] [PASSED] rounding2
[05:10:15] [PASSED] rounding3
[05:10:15] [PASSED] rounding4
[05:10:15] =========== [PASSED] drm_test_check_plane_state ============
[05:10:15] =========== drm_test_check_invalid_plane_state ============
[05:10:15] [PASSED] positioning_invalid
[05:10:15] [PASSED] upscaling_invalid
[05:10:15] [PASSED] downscaling_invalid
[05:10:15] ======= [PASSED] drm_test_check_invalid_plane_state ========
[05:10:15] ================ [PASSED] drm_plane_helper =================
[05:10:15] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[05:10:15] ====== drm_test_connector_helper_tv_get_modes_check =======
[05:10:15] [PASSED] None
[05:10:15] [PASSED] PAL
[05:10:15] [PASSED] NTSC
[05:10:15] [PASSED] Both, NTSC Default
[05:10:15] [PASSED] Both, PAL Default
[05:10:15] [PASSED] Both, NTSC Default, with PAL on command-line
[05:10:15] [PASSED] Both, PAL Default, with NTSC on command-line
[05:10:15] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[05:10:15] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[05:10:15] ================== drm_rect (9 subtests) ===================
[05:10:15] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[05:10:15] [PASSED] drm_test_rect_clip_scaled_not_clipped
[05:10:15] [PASSED] drm_test_rect_clip_scaled_clipped
[05:10:15] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[05:10:15] ================= drm_test_rect_intersect =================
[05:10:15] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[05:10:15] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[05:10:15] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[05:10:15] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[05:10:15] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[05:10:15] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[05:10:15] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[05:10:15] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[05:10:15] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[05:10:15] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[05:10:15] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[05:10:15] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[05:10:15] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[05:10:15] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[05:10:15] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[05:10:15] ============= [PASSED] drm_test_rect_intersect =============
[05:10:15] ================ drm_test_rect_calc_hscale ================
[05:10:15] [PASSED] normal use
[05:10:15] [PASSED] out of max range
[05:10:15] [PASSED] out of min range
[05:10:15] [PASSED] zero dst
[05:10:15] [PASSED] negative src
[05:10:15] [PASSED] negative dst
[05:10:15] ============ [PASSED] drm_test_rect_calc_hscale ============
[05:10:15] ================ drm_test_rect_calc_vscale ================
[05:10:15] [PASSED] normal use
[05:10:15] [PASSED] out of max range
[05:10:15] [PASSED] out of min range
[05:10:15] [PASSED] zero dst
[05:10:15] [PASSED] negative src
[05:10:15] [PASSED] negative dst
[05:10:15] ============ [PASSED] drm_test_rect_calc_vscale ============
[05:10:15] ================== drm_test_rect_rotate ===================
[05:10:15] [PASSED] reflect-x
[05:10:15] [PASSED] reflect-y
[05:10:15] [PASSED] rotate-0
[05:10:15] [PASSED] rotate-90
[05:10:15] [PASSED] rotate-180
[05:10:15] [PASSED] rotate-270
[05:10:15] ============== [PASSED] drm_test_rect_rotate ===============
[05:10:15] ================ drm_test_rect_rotate_inv =================
[05:10:15] [PASSED] reflect-x
[05:10:15] [PASSED] reflect-y
[05:10:15] [PASSED] rotate-0
[05:10:15] [PASSED] rotate-90
[05:10:15] [PASSED] rotate-180
[05:10:15] [PASSED] rotate-270
[05:10:15] ============ [PASSED] drm_test_rect_rotate_inv =============
[05:10:15] ==================== [PASSED] drm_rect =====================
[05:10:15] ============================================================
[05:10:15] Testing complete. Ran 608 tests: passed: 608
[05:10:15] Elapsed time: 23.177s total, 1.691s configuring, 21.318s building, 0.144s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[05:10:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:10:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
[05:10:25] Starting KUnit Kernel (1/1)...
[05:10:25] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:10:25] ================= ttm_device (5 subtests) ==================
[05:10:25] [PASSED] ttm_device_init_basic
[05:10:25] [PASSED] ttm_device_init_multiple
[05:10:25] [PASSED] ttm_device_fini_basic
[05:10:25] [PASSED] ttm_device_init_no_vma_man
[05:10:25] ================== ttm_device_init_pools ==================
[05:10:25] [PASSED] No DMA allocations, no DMA32 required
[05:10:25] [PASSED] DMA allocations, DMA32 required
[05:10:25] [PASSED] No DMA allocations, DMA32 required
[05:10:25] [PASSED] DMA allocations, no DMA32 required
[05:10:25] ============== [PASSED] ttm_device_init_pools ==============
[05:10:25] =================== [PASSED] ttm_device ====================
[05:10:25] ================== ttm_pool (8 subtests) ===================
[05:10:25] ================== ttm_pool_alloc_basic ===================
[05:10:25] [PASSED] One page
[05:10:25] [PASSED] More than one page
[05:10:25] [PASSED] Above the allocation limit
[05:10:25] [PASSED] One page, with coherent DMA mappings enabled
[05:10:25] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:10:25] ============== [PASSED] ttm_pool_alloc_basic ===============
[05:10:25] ============== ttm_pool_alloc_basic_dma_addr ==============
[05:10:25] [PASSED] One page
[05:10:25] [PASSED] More than one page
[05:10:25] [PASSED] Above the allocation limit
[05:10:25] [PASSED] One page, with coherent DMA mappings enabled
[05:10:25] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:10:25] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[05:10:25] [PASSED] ttm_pool_alloc_order_caching_match
[05:10:25] [PASSED] ttm_pool_alloc_caching_mismatch
[05:10:25] [PASSED] ttm_pool_alloc_order_mismatch
[05:10:25] [PASSED] ttm_pool_free_dma_alloc
[05:10:25] [PASSED] ttm_pool_free_no_dma_alloc
[05:10:25] [PASSED] ttm_pool_fini_basic
[05:10:25] ==================== [PASSED] ttm_pool =====================
[05:10:25] ================ ttm_resource (8 subtests) =================
[05:10:25] ================= ttm_resource_init_basic =================
[05:10:25] [PASSED] Init resource in TTM_PL_SYSTEM
[05:10:25] [PASSED] Init resource in TTM_PL_VRAM
[05:10:25] [PASSED] Init resource in a private placement
[05:10:25] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[05:10:25] ============= [PASSED] ttm_resource_init_basic =============
[05:10:25] [PASSED] ttm_resource_init_pinned
[05:10:25] [PASSED] ttm_resource_fini_basic
[05:10:25] [PASSED] ttm_resource_manager_init_basic
[05:10:25] [PASSED] ttm_resource_manager_usage_basic
[05:10:25] [PASSED] ttm_resource_manager_set_used_basic
[05:10:25] [PASSED] ttm_sys_man_alloc_basic
[05:10:25] [PASSED] ttm_sys_man_free_basic
[05:10:25] ================== [PASSED] ttm_resource ===================
[05:10:25] =================== ttm_tt (15 subtests) ===================
[05:10:25] ==================== ttm_tt_init_basic ====================
[05:10:25] [PASSED] Page-aligned size
[05:10:25] [PASSED] Extra pages requested
[05:10:25] ================ [PASSED] ttm_tt_init_basic ================
[05:10:25] [PASSED] ttm_tt_init_misaligned
[05:10:25] [PASSED] ttm_tt_fini_basic
[05:10:25] [PASSED] ttm_tt_fini_sg
[05:10:25] [PASSED] ttm_tt_fini_shmem
[05:10:25] [PASSED] ttm_tt_create_basic
[05:10:25] [PASSED] ttm_tt_create_invalid_bo_type
[05:10:25] [PASSED] ttm_tt_create_ttm_exists
[05:10:25] [PASSED] ttm_tt_create_failed
[05:10:25] [PASSED] ttm_tt_destroy_basic
[05:10:25] [PASSED] ttm_tt_populate_null_ttm
[05:10:25] [PASSED] ttm_tt_populate_populated_ttm
[05:10:25] [PASSED] ttm_tt_unpopulate_basic
[05:10:25] [PASSED] ttm_tt_unpopulate_empty_ttm
[05:10:25] [PASSED] ttm_tt_swapin_basic
[05:10:25] ===================== [PASSED] ttm_tt ======================
[05:10:25] =================== ttm_bo (14 subtests) ===================
[05:10:25] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[05:10:25] [PASSED] Cannot be interrupted and sleeps
[05:10:25] [PASSED] Cannot be interrupted, locks straight away
[05:10:25] [PASSED] Can be interrupted, sleeps
[05:10:25] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[05:10:25] [PASSED] ttm_bo_reserve_locked_no_sleep
[05:10:25] [PASSED] ttm_bo_reserve_no_wait_ticket
[05:10:25] [PASSED] ttm_bo_reserve_double_resv
[05:10:25] [PASSED] ttm_bo_reserve_interrupted
[05:10:25] [PASSED] ttm_bo_reserve_deadlock
[05:10:25] [PASSED] ttm_bo_unreserve_basic
[05:10:25] [PASSED] ttm_bo_unreserve_pinned
[05:10:25] [PASSED] ttm_bo_unreserve_bulk
[05:10:25] [PASSED] ttm_bo_put_basic
[05:10:25] [PASSED] ttm_bo_put_shared_resv
[05:10:25] [PASSED] ttm_bo_pin_basic
[05:10:25] [PASSED] ttm_bo_pin_unpin_resource
[05:10:25] [PASSED] ttm_bo_multiple_pin_one_unpin
[05:10:25] ===================== [PASSED] ttm_bo ======================
[05:10:25] ============== ttm_bo_validate (22 subtests) ===============
[05:10:25] ============== ttm_bo_init_reserved_sys_man ===============
[05:10:25] [PASSED] Buffer object for userspace
[05:10:25] [PASSED] Kernel buffer object
[05:10:25] [PASSED] Shared buffer object
[05:10:25] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[05:10:25] ============== ttm_bo_init_reserved_mock_man ==============
[05:10:25] [PASSED] Buffer object for userspace
[05:10:25] [PASSED] Kernel buffer object
[05:10:25] [PASSED] Shared buffer object
[05:10:25] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[05:10:25] [PASSED] ttm_bo_init_reserved_resv
[05:10:25] ================== ttm_bo_validate_basic ==================
[05:10:25] [PASSED] Buffer object for userspace
[05:10:25] [PASSED] Kernel buffer object
[05:10:25] [PASSED] Shared buffer object
[05:10:25] ============== [PASSED] ttm_bo_validate_basic ==============
[05:10:25] [PASSED] ttm_bo_validate_invalid_placement
[05:10:25] ============= ttm_bo_validate_same_placement ==============
[05:10:25] [PASSED] System manager
[05:10:25] [PASSED] VRAM manager
[05:10:25] ========= [PASSED] ttm_bo_validate_same_placement ==========
[05:10:25] [PASSED] ttm_bo_validate_failed_alloc
[05:10:25] [PASSED] ttm_bo_validate_pinned
[05:10:25] [PASSED] ttm_bo_validate_busy_placement
[05:10:25] ================ ttm_bo_validate_multihop =================
[05:10:25] [PASSED] Buffer object for userspace
[05:10:25] [PASSED] Kernel buffer object
[05:10:25] [PASSED] Shared buffer object
[05:10:25] ============ [PASSED] ttm_bo_validate_multihop =============
[05:10:25] ========== ttm_bo_validate_no_placement_signaled ==========
[05:10:25] [PASSED] Buffer object in system domain, no page vector
[05:10:25] [PASSED] Buffer object in system domain with an existing page vector
[05:10:25] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[05:10:25] ======== ttm_bo_validate_no_placement_not_signaled ========
[05:10:25] [PASSED] Buffer object for userspace
[05:10:25] [PASSED] Kernel buffer object
[05:10:25] [PASSED] Shared buffer object
[05:10:25] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[05:10:25] [PASSED] ttm_bo_validate_move_fence_signaled
[05:10:25] ========= ttm_bo_validate_move_fence_not_signaled =========
[05:10:25] [PASSED] Waits for GPU
[05:10:25] [PASSED] Tries to lock straight away
[05:10:25] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[05:10:25] [PASSED] ttm_bo_validate_swapout
[05:10:25] [PASSED] ttm_bo_validate_happy_evict
[05:10:25] [PASSED] ttm_bo_validate_all_pinned_evict
[05:10:25] [PASSED] ttm_bo_validate_allowed_only_evict
[05:10:25] [PASSED] ttm_bo_validate_deleted_evict
[05:10:25] [PASSED] ttm_bo_validate_busy_domain_evict
[05:10:25] [PASSED] ttm_bo_validate_evict_gutting
[05:10:25] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[05:10:25] ================= [PASSED] ttm_bo_validate =================
[05:10:25] ============================================================
[05:10:25] Testing complete. Ran 102 tests: passed: 102
[05:10:25] Elapsed time: 10.071s total, 1.685s configuring, 7.719s building, 0.569s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ CI.Build: success for drm/i915/wm: convert to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
` (9 preceding siblings ...)
2025-04-04 5:10 ` ✓ CI.KUnit: success " Patchwork
@ 2025-04-04 5:27 ` Patchwork
2025-04-04 5:29 ` ✓ CI.Hooks: " Patchwork
` (3 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-04-04 5:27 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/wm: convert to struct intel_display
URL : https://patchwork.freedesktop.org/series/147192/
State : success
== Summary ==
lib/modules/6.14.0-xe+/kernel/arch/x86/events/amd/
lib/modules/6.14.0-xe+/kernel/arch/x86/events/amd/amd-uncore.ko
lib/modules/6.14.0-xe+/kernel/arch/x86/events/rapl.ko
lib/modules/6.14.0-xe+/kernel/arch/x86/kvm/
lib/modules/6.14.0-xe+/kernel/arch/x86/kvm/kvm.ko
lib/modules/6.14.0-xe+/kernel/arch/x86/kvm/kvm-intel.ko
lib/modules/6.14.0-xe+/kernel/arch/x86/kvm/kvm-amd.ko
lib/modules/6.14.0-xe+/kernel/kernel/
lib/modules/6.14.0-xe+/kernel/kernel/kheaders.ko
lib/modules/6.14.0-xe+/kernel/crypto/
lib/modules/6.14.0-xe+/kernel/crypto/ecrdsa_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/xcbc.ko
lib/modules/6.14.0-xe+/kernel/crypto/serpent_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/aria_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/crypto_simd.ko
lib/modules/6.14.0-xe+/kernel/crypto/adiantum.ko
lib/modules/6.14.0-xe+/kernel/crypto/tcrypt.ko
lib/modules/6.14.0-xe+/kernel/crypto/crypto_engine.ko
lib/modules/6.14.0-xe+/kernel/crypto/zstd.ko
lib/modules/6.14.0-xe+/kernel/crypto/asymmetric_keys/
lib/modules/6.14.0-xe+/kernel/crypto/asymmetric_keys/pkcs7_test_key.ko
lib/modules/6.14.0-xe+/kernel/crypto/asymmetric_keys/pkcs8_key_parser.ko
lib/modules/6.14.0-xe+/kernel/crypto/des_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/xctr.ko
lib/modules/6.14.0-xe+/kernel/crypto/authenc.ko
lib/modules/6.14.0-xe+/kernel/crypto/sm4_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/camellia_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/sm3.ko
lib/modules/6.14.0-xe+/kernel/crypto/pcrypt.ko
lib/modules/6.14.0-xe+/kernel/crypto/aegis128.ko
lib/modules/6.14.0-xe+/kernel/crypto/af_alg.ko
lib/modules/6.14.0-xe+/kernel/crypto/algif_aead.ko
lib/modules/6.14.0-xe+/kernel/crypto/cmac.ko
lib/modules/6.14.0-xe+/kernel/crypto/sm3_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/aes_ti.ko
lib/modules/6.14.0-xe+/kernel/crypto/chacha_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/poly1305_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/nhpoly1305.ko
lib/modules/6.14.0-xe+/kernel/crypto/crc32_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/essiv.ko
lib/modules/6.14.0-xe+/kernel/crypto/ccm.ko
lib/modules/6.14.0-xe+/kernel/crypto/wp512.ko
lib/modules/6.14.0-xe+/kernel/crypto/streebog_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/authencesn.ko
lib/modules/6.14.0-xe+/kernel/crypto/echainiv.ko
lib/modules/6.14.0-xe+/kernel/crypto/lrw.ko
lib/modules/6.14.0-xe+/kernel/crypto/cryptd.ko
lib/modules/6.14.0-xe+/kernel/crypto/crypto_user.ko
lib/modules/6.14.0-xe+/kernel/crypto/algif_hash.ko
lib/modules/6.14.0-xe+/kernel/crypto/polyval-generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/hctr2.ko
lib/modules/6.14.0-xe+/kernel/crypto/842.ko
lib/modules/6.14.0-xe+/kernel/crypto/pcbc.ko
lib/modules/6.14.0-xe+/kernel/crypto/ansi_cprng.ko
lib/modules/6.14.0-xe+/kernel/crypto/cast6_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/twofish_common.ko
lib/modules/6.14.0-xe+/kernel/crypto/twofish_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/lz4hc.ko
lib/modules/6.14.0-xe+/kernel/crypto/blowfish_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/md4.ko
lib/modules/6.14.0-xe+/kernel/crypto/chacha20poly1305.ko
lib/modules/6.14.0-xe+/kernel/crypto/curve25519-generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/lz4.ko
lib/modules/6.14.0-xe+/kernel/crypto/rmd160.ko
lib/modules/6.14.0-xe+/kernel/crypto/algif_skcipher.ko
lib/modules/6.14.0-xe+/kernel/crypto/cast5_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/fcrypt.ko
lib/modules/6.14.0-xe+/kernel/crypto/ecdsa_generic.ko
lib/modules/6.14.0-xe+/kernel/crypto/sm4.ko
lib/modules/6.14.0-xe+/kernel/crypto/cast_common.ko
lib/modules/6.14.0-xe+/kernel/crypto/blowfish_common.ko
lib/modules/6.14.0-xe+/kernel/crypto/michael_mic.ko
lib/modules/6.14.0-xe+/kernel/crypto/async_tx/
lib/modules/6.14.0-xe+/kernel/crypto/async_tx/async_xor.ko
lib/modules/6.14.0-xe+/kernel/crypto/async_tx/async_tx.ko
lib/modules/6.14.0-xe+/kernel/crypto/async_tx/async_memcpy.ko
lib/modules/6.14.0-xe+/kernel/crypto/async_tx/async_pq.ko
lib/modules/6.14.0-xe+/kernel/crypto/async_tx/async_raid6_recov.ko
lib/modules/6.14.0-xe+/kernel/crypto/algif_rng.ko
lib/modules/6.14.0-xe+/kernel/block/
lib/modules/6.14.0-xe+/kernel/block/bfq.ko
lib/modules/6.14.0-xe+/kernel/block/kyber-iosched.ko
lib/modules/6.14.0-xe+/build
lib/modules/6.14.0-xe+/modules.alias.bin
lib/modules/6.14.0-xe+/modules.builtin
lib/modules/6.14.0-xe+/modules.softdep
lib/modules/6.14.0-xe+/modules.alias
lib/modules/6.14.0-xe+/modules.order
lib/modules/6.14.0-xe+/modules.symbols
lib/modules/6.14.0-xe+/modules.dep.bin
+ mv kernel-nodebug.tar.gz ..
+ cd ..
+ rm -rf archive
++ date +%s
+ echo -e '\e[0Ksection_end:1743744413:package_x86_64_nodebug\r\e[0K'
^[[0Ksection_end:1743744413:package_x86_64_nodebug
^[[0K
+ sync
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ CI.Hooks: success for drm/i915/wm: convert to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
` (10 preceding siblings ...)
2025-04-04 5:27 ` ✓ CI.Build: " Patchwork
@ 2025-04-04 5:29 ` Patchwork
2025-04-04 5:30 ` ✗ CI.checksparse: warning " Patchwork
` (2 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-04-04 5:29 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/wm: convert to struct intel_display
URL : https://patchwork.freedesktop.org/series/147192/
State : success
== Summary ==
run-parts: executing /workspace/ci/hooks/00-showenv
+ export
+ grep -Ei '(^|\W)CI_'
declare -x CI_KERNEL_BUILD_DIR="/workspace/kernel/build64-default"
declare -x CI_KERNEL_SRC_DIR="/workspace/kernel"
declare -x CI_TOOLS_SRC_DIR="/workspace/ci"
declare -x CI_WORKSPACE_DIR="/workspace"
run-parts: executing /workspace/ci/hooks/10-build-W1
+ SRC_DIR=/workspace/kernel
+ RESTORE_DISPLAY_CONFIG=0
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ cd /workspace/kernel
++ nproc
+ make -j48 O=/workspace/kernel/build64-default modules_prepare
make[1]: Entering directory '/workspace/kernel/build64-default'
GEN Makefile
DESCEND objtool
CALL ../scripts/checksyscalls.sh
INSTALL libsubcmd_headers
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/exec-cmd.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/help.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/pager.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/parse-options.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/run-command.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/sigchain.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/subcmd-config.o
LD /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd-in.o
AR /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd.a
CC /workspace/kernel/build64-default/tools/objtool/weak.o
CC /workspace/kernel/build64-default/tools/objtool/check.o
CC /workspace/kernel/build64-default/tools/objtool/special.o
CC /workspace/kernel/build64-default/tools/objtool/builtin-check.o
CC /workspace/kernel/build64-default/tools/objtool/elf.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/special.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/decode.o
CC /workspace/kernel/build64-default/tools/objtool/objtool.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/orc.o
CC /workspace/kernel/build64-default/tools/objtool/orc_gen.o
CC /workspace/kernel/build64-default/tools/objtool/orc_dump.o
CC /workspace/kernel/build64-default/tools/objtool/libstring.o
CC /workspace/kernel/build64-default/tools/objtool/libctype.o
CC /workspace/kernel/build64-default/tools/objtool/str_error_r.o
CC /workspace/kernel/build64-default/tools/objtool/librbtree.o
LD /workspace/kernel/build64-default/tools/objtool/arch/x86/objtool-in.o
LD /workspace/kernel/build64-default/tools/objtool/objtool-in.o
LINK /workspace/kernel/build64-default/tools/objtool/objtool
make[1]: Leaving directory '/workspace/kernel/build64-default'
++ nproc
+ make -j48 O=/workspace/kernel/build64-default W=1 drivers/gpu/drm/xe
make[1]: Entering directory '/workspace/kernel/build64-default'
make[2]: Nothing to be done for 'drivers/gpu/drm/xe'.
make[1]: Leaving directory '/workspace/kernel/build64-default'
run-parts: executing /workspace/ci/hooks/11-build-32b
+++ realpath /workspace/ci/hooks/11-build-32b
++ dirname /workspace/ci/hooks/11-build-32b
+ THIS_SCRIPT_DIR=/workspace/ci/hooks
+ SRC_DIR=/workspace/kernel
+ TOOLS_SRC_DIR=/workspace/ci
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ BUILD_DIR=/workspace/kernel/build64-default/build32
+ cd /workspace/kernel
+ mkdir -p /workspace/kernel/build64-default/build32
++ nproc
+ make -j48 ARCH=i386 O=/workspace/kernel/build64-default/build32 defconfig
make[1]: Entering directory '/workspace/kernel/build64-default/build32'
GEN Makefile
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.[ch]
HOSTCC scripts/kconfig/menu.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTCC scripts/kconfig/util.o
HOSTCC scripts/kconfig/lexer.lex.o
HOSTCC scripts/kconfig/parser.tab.o
HOSTLD scripts/kconfig/conf
*** Default configuration is based on 'i386_defconfig'
#
# configuration written to .config
#
make[1]: Leaving directory '/workspace/kernel/build64-default/build32'
+ cd /workspace/kernel/build64-default/build32
+ /workspace/kernel/scripts/kconfig/merge_config.sh .config /workspace/ci/kernel/fragments/10-xe.fragment
Using .config as base
Merging /workspace/ci/kernel/fragments/10-xe.fragment
Value of CONFIG_DRM_XE is redefined by fragment /workspace/ci/kernel/fragments/10-xe.fragment:
Previous value: # CONFIG_DRM_XE is not set
New value: CONFIG_DRM_XE=m
GEN Makefile
#
# configuration written to .config
#
Value requested for CONFIG_HAVE_UID16 not in final .config
Requested value: CONFIG_HAVE_UID16=y
Actual value:
Value requested for CONFIG_UID16 not in final .config
Requested value: CONFIG_UID16=y
Actual value:
Value requested for CONFIG_X86_32 not in final .config
Requested value: CONFIG_X86_32=y
Actual value:
Value requested for CONFIG_OUTPUT_FORMAT not in final .config
Requested value: CONFIG_OUTPUT_FORMAT="elf32-i386"
Actual value: CONFIG_OUTPUT_FORMAT="elf64-x86-64"
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MIN not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MIN=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MIN=28
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MAX not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MAX=16
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MAX=32
Value requested for CONFIG_PGTABLE_LEVELS not in final .config
Requested value: CONFIG_PGTABLE_LEVELS=2
Actual value: CONFIG_PGTABLE_LEVELS=5
Value requested for CONFIG_X86_BIGSMP not in final .config
Requested value: # CONFIG_X86_BIGSMP is not set
Actual value:
Value requested for CONFIG_X86_INTEL_QUARK not in final .config
Requested value: # CONFIG_X86_INTEL_QUARK is not set
Actual value:
Value requested for CONFIG_X86_RDC321X not in final .config
Requested value: # CONFIG_X86_RDC321X is not set
Actual value:
Value requested for CONFIG_X86_32_NON_STANDARD not in final .config
Requested value: # CONFIG_X86_32_NON_STANDARD is not set
Actual value:
Value requested for CONFIG_X86_32_IRIS not in final .config
Requested value: # CONFIG_X86_32_IRIS is not set
Actual value:
Value requested for CONFIG_M486SX not in final .config
Requested value: # CONFIG_M486SX is not set
Actual value:
Value requested for CONFIG_M486 not in final .config
Requested value: # CONFIG_M486 is not set
Actual value:
Value requested for CONFIG_M586 not in final .config
Requested value: # CONFIG_M586 is not set
Actual value:
Value requested for CONFIG_M586TSC not in final .config
Requested value: # CONFIG_M586TSC is not set
Actual value:
Value requested for CONFIG_M586MMX not in final .config
Requested value: # CONFIG_M586MMX is not set
Actual value:
Value requested for CONFIG_M686 not in final .config
Requested value: CONFIG_M686=y
Actual value:
Value requested for CONFIG_MPENTIUMII not in final .config
Requested value: # CONFIG_MPENTIUMII is not set
Actual value:
Value requested for CONFIG_MPENTIUMIII not in final .config
Requested value: # CONFIG_MPENTIUMIII is not set
Actual value:
Value requested for CONFIG_MPENTIUMM not in final .config
Requested value: # CONFIG_MPENTIUMM is not set
Actual value:
Value requested for CONFIG_MPENTIUM4 not in final .config
Requested value: # CONFIG_MPENTIUM4 is not set
Actual value:
Value requested for CONFIG_MK6 not in final .config
Requested value: # CONFIG_MK6 is not set
Actual value:
Value requested for CONFIG_MK7 not in final .config
Requested value: # CONFIG_MK7 is not set
Actual value:
Value requested for CONFIG_MCRUSOE not in final .config
Requested value: # CONFIG_MCRUSOE is not set
Actual value:
Value requested for CONFIG_MEFFICEON not in final .config
Requested value: # CONFIG_MEFFICEON is not set
Actual value:
Value requested for CONFIG_MWINCHIPC6 not in final .config
Requested value: # CONFIG_MWINCHIPC6 is not set
Actual value:
Value requested for CONFIG_MWINCHIP3D not in final .config
Requested value: # CONFIG_MWINCHIP3D is not set
Actual value:
Value requested for CONFIG_MELAN not in final .config
Requested value: # CONFIG_MELAN is not set
Actual value:
Value requested for CONFIG_MGEODEGX1 not in final .config
Requested value: # CONFIG_MGEODEGX1 is not set
Actual value:
Value requested for CONFIG_MGEODE_LX not in final .config
Requested value: # CONFIG_MGEODE_LX is not set
Actual value:
Value requested for CONFIG_MCYRIXIII not in final .config
Requested value: # CONFIG_MCYRIXIII is not set
Actual value:
Value requested for CONFIG_MVIAC3_2 not in final .config
Requested value: # CONFIG_MVIAC3_2 is not set
Actual value:
Value requested for CONFIG_MVIAC7 not in final .config
Requested value: # CONFIG_MVIAC7 is not set
Actual value:
Value requested for CONFIG_X86_GENERIC not in final .config
Requested value: # CONFIG_X86_GENERIC is not set
Actual value:
Value requested for CONFIG_X86_INTERNODE_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_INTERNODE_CACHE_SHIFT=5
Actual value: CONFIG_X86_INTERNODE_CACHE_SHIFT=6
Value requested for CONFIG_X86_L1_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_L1_CACHE_SHIFT=5
Actual value: CONFIG_X86_L1_CACHE_SHIFT=6
Value requested for CONFIG_X86_USE_PPRO_CHECKSUM not in final .config
Requested value: CONFIG_X86_USE_PPRO_CHECKSUM=y
Actual value:
Value requested for CONFIG_X86_MINIMUM_CPU_FAMILY not in final .config
Requested value: CONFIG_X86_MINIMUM_CPU_FAMILY=6
Actual value: CONFIG_X86_MINIMUM_CPU_FAMILY=64
Value requested for CONFIG_CPU_SUP_TRANSMETA_32 not in final .config
Requested value: CONFIG_CPU_SUP_TRANSMETA_32=y
Actual value:
Value requested for CONFIG_CPU_SUP_VORTEX_32 not in final .config
Requested value: CONFIG_CPU_SUP_VORTEX_32=y
Actual value:
Value requested for CONFIG_HPET_TIMER not in final .config
Requested value: # CONFIG_HPET_TIMER is not set
Actual value: CONFIG_HPET_TIMER=y
Value requested for CONFIG_NR_CPUS_RANGE_END not in final .config
Requested value: CONFIG_NR_CPUS_RANGE_END=8
Actual value: CONFIG_NR_CPUS_RANGE_END=512
Value requested for CONFIG_NR_CPUS_DEFAULT not in final .config
Requested value: CONFIG_NR_CPUS_DEFAULT=8
Actual value: CONFIG_NR_CPUS_DEFAULT=64
Value requested for CONFIG_X86_ANCIENT_MCE not in final .config
Requested value: # CONFIG_X86_ANCIENT_MCE is not set
Actual value:
Value requested for CONFIG_X86_LEGACY_VM86 not in final .config
Requested value: # CONFIG_X86_LEGACY_VM86 is not set
Actual value:
Value requested for CONFIG_X86_ESPFIX32 not in final .config
Requested value: CONFIG_X86_ESPFIX32=y
Actual value:
Value requested for CONFIG_TOSHIBA not in final .config
Requested value: # CONFIG_TOSHIBA is not set
Actual value:
Value requested for CONFIG_X86_REBOOTFIXUPS not in final .config
Requested value: # CONFIG_X86_REBOOTFIXUPS is not set
Actual value:
Value requested for CONFIG_MICROCODE_INITRD32 not in final .config
Requested value: CONFIG_MICROCODE_INITRD32=y
Actual value:
Value requested for CONFIG_NOHIGHMEM not in final .config
Requested value: # CONFIG_NOHIGHMEM is not set
Actual value:
Value requested for CONFIG_HIGHMEM4G not in final .config
Requested value: CONFIG_HIGHMEM4G=y
Actual value:
Value requested for CONFIG_HIGHMEM64G not in final .config
Requested value: # CONFIG_HIGHMEM64G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_3G not in final .config
Requested value: CONFIG_VMSPLIT_3G=y
Actual value:
Value requested for CONFIG_VMSPLIT_3G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_3G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G not in final .config
Requested value: # CONFIG_VMSPLIT_2G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_2G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_1G not in final .config
Requested value: # CONFIG_VMSPLIT_1G is not set
Actual value:
Value requested for CONFIG_PAGE_OFFSET not in final .config
Requested value: CONFIG_PAGE_OFFSET=0xC0000000
Actual value:
Value requested for CONFIG_HIGHMEM not in final .config
Requested value: CONFIG_HIGHMEM=y
Actual value:
Value requested for CONFIG_X86_PAE not in final .config
Requested value: # CONFIG_X86_PAE is not set
Actual value:
Value requested for CONFIG_ARCH_FLATMEM_ENABLE not in final .config
Requested value: CONFIG_ARCH_FLATMEM_ENABLE=y
Actual value:
Value requested for CONFIG_ARCH_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_ARCH_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_ILLEGAL_POINTER_VALUE not in final .config
Requested value: CONFIG_ILLEGAL_POINTER_VALUE=0
Actual value: CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
Value requested for CONFIG_HIGHPTE not in final .config
Requested value: # CONFIG_HIGHPTE is not set
Actual value:
Value requested for CONFIG_COMPAT_VDSO not in final .config
Requested value: # CONFIG_COMPAT_VDSO is not set
Actual value:
Value requested for CONFIG_FUNCTION_PADDING_CFI not in final .config
Requested value: CONFIG_FUNCTION_PADDING_CFI=0
Actual value: CONFIG_FUNCTION_PADDING_CFI=11
Value requested for CONFIG_FUNCTION_PADDING_BYTES not in final .config
Requested value: CONFIG_FUNCTION_PADDING_BYTES=4
Actual value: CONFIG_FUNCTION_PADDING_BYTES=16
Value requested for CONFIG_APM not in final .config
Requested value: # CONFIG_APM is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K6 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K6 is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K7 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K7 is not set
Actual value:
Value requested for CONFIG_X86_GX_SUSPMOD not in final .config
Requested value: # CONFIG_X86_GX_SUSPMOD is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_ICH not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_ICH is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_SMI not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_SMI is not set
Actual value:
Value requested for CONFIG_X86_CPUFREQ_NFORCE2 not in final .config
Requested value: # CONFIG_X86_CPUFREQ_NFORCE2 is not set
Actual value:
Value requested for CONFIG_X86_LONGRUN not in final .config
Requested value: # CONFIG_X86_LONGRUN is not set
Actual value:
Value requested for CONFIG_X86_LONGHAUL not in final .config
Requested value: # CONFIG_X86_LONGHAUL is not set
Actual value:
Value requested for CONFIG_X86_E_POWERSAVER not in final .config
Requested value: # CONFIG_X86_E_POWERSAVER is not set
Actual value:
Value requested for CONFIG_PCI_GOBIOS not in final .config
Requested value: # CONFIG_PCI_GOBIOS is not set
Actual value:
Value requested for CONFIG_PCI_GOMMCONFIG not in final .config
Requested value: # CONFIG_PCI_GOMMCONFIG is not set
Actual value:
Value requested for CONFIG_PCI_GODIRECT not in final .config
Requested value: # CONFIG_PCI_GODIRECT is not set
Actual value:
Value requested for CONFIG_PCI_GOANY not in final .config
Requested value: CONFIG_PCI_GOANY=y
Actual value:
Value requested for CONFIG_PCI_BIOS not in final .config
Requested value: CONFIG_PCI_BIOS=y
Actual value:
Value requested for CONFIG_ISA not in final .config
Requested value: # CONFIG_ISA is not set
Actual value:
Value requested for CONFIG_SCx200 not in final .config
Requested value: # CONFIG_SCx200 is not set
Actual value:
Value requested for CONFIG_OLPC not in final .config
Requested value: # CONFIG_OLPC is not set
Actual value:
Value requested for CONFIG_ALIX not in final .config
Requested value: # CONFIG_ALIX is not set
Actual value:
Value requested for CONFIG_NET5501 not in final .config
Requested value: # CONFIG_NET5501 is not set
Actual value:
Value requested for CONFIG_GEOS not in final .config
Requested value: # CONFIG_GEOS is not set
Actual value:
Value requested for CONFIG_COMPAT_32 not in final .config
Requested value: CONFIG_COMPAT_32=y
Actual value:
Value requested for CONFIG_HAVE_ATOMIC_IOMAP not in final .config
Requested value: CONFIG_HAVE_ATOMIC_IOMAP=y
Actual value:
Value requested for CONFIG_ARCH_32BIT_OFF_T not in final .config
Requested value: CONFIG_ARCH_32BIT_OFF_T=y
Actual value:
Value requested for CONFIG_ARCH_WANT_IPC_PARSE_VERSION not in final .config
Requested value: CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
Actual value:
Value requested for CONFIG_MODULES_USE_ELF_REL not in final .config
Requested value: CONFIG_MODULES_USE_ELF_REL=y
Actual value:
Value requested for CONFIG_ARCH_MMAP_RND_BITS not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS=28
Value requested for CONFIG_CLONE_BACKWARDS not in final .config
Requested value: CONFIG_CLONE_BACKWARDS=y
Actual value:
Value requested for CONFIG_OLD_SIGSUSPEND3 not in final .config
Requested value: CONFIG_OLD_SIGSUSPEND3=y
Actual value:
Value requested for CONFIG_OLD_SIGACTION not in final .config
Requested value: CONFIG_OLD_SIGACTION=y
Actual value:
Value requested for CONFIG_ARCH_SPLIT_ARG64 not in final .config
Requested value: CONFIG_ARCH_SPLIT_ARG64=y
Actual value:
Value requested for CONFIG_FUNCTION_ALIGNMENT not in final .config
Requested value: CONFIG_FUNCTION_ALIGNMENT=4
Actual value: CONFIG_FUNCTION_ALIGNMENT=16
Value requested for CONFIG_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_FLATMEM_MANUAL not in final .config
Requested value: CONFIG_FLATMEM_MANUAL=y
Actual value:
Value requested for CONFIG_SPARSEMEM_MANUAL not in final .config
Requested value: # CONFIG_SPARSEMEM_MANUAL is not set
Actual value:
Value requested for CONFIG_FLATMEM not in final .config
Requested value: CONFIG_FLATMEM=y
Actual value:
Value requested for CONFIG_SPARSEMEM_STATIC not in final .config
Requested value: CONFIG_SPARSEMEM_STATIC=y
Actual value:
Value requested for CONFIG_BOUNCE not in final .config
Requested value: CONFIG_BOUNCE=y
Actual value:
Value requested for CONFIG_KMAP_LOCAL not in final .config
Requested value: CONFIG_KMAP_LOCAL=y
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_COMPAQ not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_COMPAQ is not set
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_IBM not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_IBM is not set
Actual value:
Value requested for CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH not in final .config
Requested value: CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH=y
Actual value:
Value requested for CONFIG_PCH_PHUB not in final .config
Requested value: # CONFIG_PCH_PHUB is not set
Actual value:
Value requested for CONFIG_SCSI_NSP32 not in final .config
Requested value: # CONFIG_SCSI_NSP32 is not set
Actual value:
Value requested for CONFIG_PATA_CS5520 not in final .config
Requested value: # CONFIG_PATA_CS5520 is not set
Actual value:
Value requested for CONFIG_PATA_CS5530 not in final .config
Requested value: # CONFIG_PATA_CS5530 is not set
Actual value:
Value requested for CONFIG_PATA_CS5535 not in final .config
Requested value: # CONFIG_PATA_CS5535 is not set
Actual value:
Value requested for CONFIG_PATA_CS5536 not in final .config
Requested value: # CONFIG_PATA_CS5536 is not set
Actual value:
Value requested for CONFIG_PATA_SC1200 not in final .config
Requested value: # CONFIG_PATA_SC1200 is not set
Actual value:
Value requested for CONFIG_PCH_GBE not in final .config
Requested value: # CONFIG_PCH_GBE is not set
Actual value:
Value requested for CONFIG_INPUT_WISTRON_BTNS not in final .config
Requested value: # CONFIG_INPUT_WISTRON_BTNS is not set
Actual value:
Value requested for CONFIG_SERIAL_TIMBERDALE not in final .config
Requested value: # CONFIG_SERIAL_TIMBERDALE is not set
Actual value:
Value requested for CONFIG_SERIAL_PCH_UART not in final .config
Requested value: # CONFIG_SERIAL_PCH_UART is not set
Actual value:
Value requested for CONFIG_HW_RANDOM_GEODE not in final .config
Requested value: CONFIG_HW_RANDOM_GEODE=y
Actual value:
Value requested for CONFIG_SONYPI not in final .config
Requested value: # CONFIG_SONYPI is not set
Actual value:
Value requested for CONFIG_PC8736x_GPIO not in final .config
Requested value: # CONFIG_PC8736x_GPIO is not set
Actual value:
Value requested for CONFIG_NSC_GPIO not in final .config
Requested value: # CONFIG_NSC_GPIO is not set
Actual value:
Value requested for CONFIG_I2C_EG20T not in final .config
Requested value: # CONFIG_I2C_EG20T is not set
Actual value:
Value requested for CONFIG_SCx200_ACB not in final .config
Requested value: # CONFIG_SCx200_ACB is not set
Actual value:
Value requested for CONFIG_PTP_1588_CLOCK_PCH not in final .config
Requested value: # CONFIG_PTP_1588_CLOCK_PCH is not set
Actual value:
Value requested for CONFIG_SBC8360_WDT not in final .config
Requested value: # CONFIG_SBC8360_WDT is not set
Actual value:
Value requested for CONFIG_SBC7240_WDT not in final .config
Requested value: # CONFIG_SBC7240_WDT is not set
Actual value:
Value requested for CONFIG_MFD_CS5535 not in final .config
Requested value: # CONFIG_MFD_CS5535 is not set
Actual value:
Value requested for CONFIG_AGP_ALI not in final .config
Requested value: # CONFIG_AGP_ALI is not set
Actual value:
Value requested for CONFIG_AGP_ATI not in final .config
Requested value: # CONFIG_AGP_ATI is not set
Actual value:
Value requested for CONFIG_AGP_AMD not in final .config
Requested value: # CONFIG_AGP_AMD is not set
Actual value:
Value requested for CONFIG_AGP_NVIDIA not in final .config
Requested value: # CONFIG_AGP_NVIDIA is not set
Actual value:
Value requested for CONFIG_AGP_SWORKS not in final .config
Requested value: # CONFIG_AGP_SWORKS is not set
Actual value:
Value requested for CONFIG_AGP_EFFICEON not in final .config
Requested value: # CONFIG_AGP_EFFICEON is not set
Actual value:
Value requested for CONFIG_SND_CS5530 not in final .config
Requested value: # CONFIG_SND_CS5530 is not set
Actual value:
Value requested for CONFIG_SND_CS5535AUDIO not in final .config
Requested value: # CONFIG_SND_CS5535AUDIO is not set
Actual value:
Value requested for CONFIG_SND_SIS7019 not in final .config
Requested value: # CONFIG_SND_SIS7019 is not set
Actual value:
Value requested for CONFIG_LEDS_OT200 not in final .config
Requested value: # CONFIG_LEDS_OT200 is not set
Actual value:
Value requested for CONFIG_PCH_DMA not in final .config
Requested value: # CONFIG_PCH_DMA is not set
Actual value:
Value requested for CONFIG_CLKSRC_I8253 not in final .config
Requested value: CONFIG_CLKSRC_I8253=y
Actual value:
Value requested for CONFIG_MAILBOX not in final .config
Requested value: # CONFIG_MAILBOX is not set
Actual value: CONFIG_MAILBOX=y
Value requested for CONFIG_CRYPTO_SERPENT_SSE2_586 not in final .config
Requested value: # CONFIG_CRYPTO_SERPENT_SSE2_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_TWOFISH_586 not in final .config
Requested value: # CONFIG_CRYPTO_TWOFISH_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_GEODE not in final .config
Requested value: # CONFIG_CRYPTO_DEV_GEODE is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_HIFN_795X not in final .config
Requested value: # CONFIG_CRYPTO_DEV_HIFN_795X is not set
Actual value:
Value requested for CONFIG_CRYPTO_LIB_POLY1305_RSIZE not in final .config
Requested value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
Actual value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11
Value requested for CONFIG_AUDIT_GENERIC not in final .config
Requested value: CONFIG_AUDIT_GENERIC=y
Actual value:
Value requested for CONFIG_GENERIC_VDSO_32 not in final .config
Requested value: CONFIG_GENERIC_VDSO_32=y
Actual value:
Value requested for CONFIG_DEBUG_KMAP_LOCAL not in final .config
Requested value: # CONFIG_DEBUG_KMAP_LOCAL is not set
Actual value:
Value requested for CONFIG_DEBUG_HIGHMEM not in final .config
Requested value: # CONFIG_DEBUG_HIGHMEM is not set
Actual value:
Value requested for CONFIG_HAVE_DEBUG_STACKOVERFLOW not in final .config
Requested value: CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
Actual value:
Value requested for CONFIG_DEBUG_STACKOVERFLOW not in final .config
Requested value: # CONFIG_DEBUG_STACKOVERFLOW is not set
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_TRACER not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_FREGS not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y
Actual value:
Value requested for CONFIG_HAVE_FTRACE_GRAPH_FUNC not in final .config
Requested value: CONFIG_HAVE_FTRACE_GRAPH_FUNC=y
Actual value:
Value requested for CONFIG_DRM_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_KUNIT_TEST=m
Actual value:
Value requested for CONFIG_DRM_XE_WERROR not in final .config
Requested value: CONFIG_DRM_XE_WERROR=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG not in final .config
Requested value: CONFIG_DRM_XE_DEBUG=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG_MEM not in final .config
Requested value: CONFIG_DRM_XE_DEBUG_MEM=y
Actual value:
Value requested for CONFIG_DRM_XE_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_XE_KUNIT_TEST=m
Actual value:
++ nproc
+ make -j48 ARCH=i386 olddefconfig
GEN Makefile
#
# configuration written to .config
#
++ nproc
+ make -j48 ARCH=i386
SYNC include/config/auto.conf.cmd
GEN Makefile
GEN Makefile
WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h
WRAP arch/x86/include/generated/uapi/asm/errno.h
WRAP arch/x86/include/generated/uapi/asm/fcntl.h
WRAP arch/x86/include/generated/uapi/asm/ioctls.h
WRAP arch/x86/include/generated/uapi/asm/ioctl.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_32.h
WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_64.h
WRAP arch/x86/include/generated/uapi/asm/param.h
UPD include/generated/uapi/linux/version.h
WRAP arch/x86/include/generated/uapi/asm/poll.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_x32.h
WRAP arch/x86/include/generated/uapi/asm/resource.h
SYSTBL arch/x86/include/generated/asm/syscalls_32.h
WRAP arch/x86/include/generated/uapi/asm/socket.h
WRAP arch/x86/include/generated/uapi/asm/sockios.h
WRAP arch/x86/include/generated/uapi/asm/termbits.h
WRAP arch/x86/include/generated/uapi/asm/termios.h
WRAP arch/x86/include/generated/uapi/asm/types.h
UPD include/generated/compile.h
HOSTCC arch/x86/tools/relocs_32.o
HOSTCC arch/x86/tools/relocs_64.o
HOSTCC arch/x86/tools/relocs_common.o
WRAP arch/x86/include/generated/asm/early_ioremap.h
WRAP arch/x86/include/generated/asm/fprobe.h
WRAP arch/x86/include/generated/asm/mcs_spinlock.h
WRAP arch/x86/include/generated/asm/mmzone.h
WRAP arch/x86/include/generated/asm/irq_regs.h
WRAP arch/x86/include/generated/asm/kmap_size.h
WRAP arch/x86/include/generated/asm/local64.h
HOSTCC scripts/kallsyms
WRAP arch/x86/include/generated/asm/mmiowb.h
WRAP arch/x86/include/generated/asm/module.lds.h
HOSTCC scripts/sorttable
WRAP arch/x86/include/generated/asm/rwonce.h
HOSTCC scripts/asn1_compiler
HOSTCC scripts/selinux/mdp/mdp
HOSTLD arch/x86/tools/relocs
UPD include/config/kernel.release
UPD include/generated/utsrelease.h
CC scripts/mod/empty.o
HOSTCC scripts/mod/mk_elfconfig
CC scripts/mod/devicetable-offsets.s
UPD scripts/mod/devicetable-offsets.h
MKELF scripts/mod/elfconfig.h
HOSTCC scripts/mod/modpost.o
HOSTCC scripts/mod/file2alias.o
HOSTCC scripts/mod/sumversion.o
HOSTCC scripts/mod/symsearch.o
HOSTLD scripts/mod/modpost
CC kernel/bounds.s
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-arch-fallback.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-instrumented.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-long.h
UPD include/generated/timeconst.h
UPD include/generated/bounds.h
CC arch/x86/kernel/asm-offsets.s
UPD include/generated/asm-offsets.h
CALL /workspace/kernel/scripts/checksyscalls.sh
LDS scripts/module.lds
HOSTCC usr/gen_init_cpio
CC init/main.o
CC init/do_mounts.o
CC certs/system_keyring.o
CC init/do_mounts_initrd.o
UPD init/utsversion-tmp.h
CC init/initramfs.o
CC ipc/util.o
CC init/calibrate.o
CC ipc/msgutil.o
CC io_uring/io_uring.o
CC security/commoncap.o
CC ipc/msg.o
CC io_uring/opdef.o
CC arch/x86/realmode/init.o
AS arch/x86/lib/atomic64_cx8_32.o
CC mm/filemap.o
CC init/init_task.o
CC io_uring/kbuf.o
CC arch/x86/events/core.o
CC ipc/sem.o
CC arch/x86/pci/i386.o
AR arch/x86/crypto/built-in.a
CC security/lsm_syscalls.o
CC arch/x86/power/cpu.o
AR arch/x86/net/built-in.a
CC arch/x86/video/video-common.o
CC init/version.o
CC security/keys/gc.o
HOSTCC security/selinux/genheaders
CC arch/x86/events/amd/core.o
CC arch/x86/events/zhaoxin/core.o
CC block/partitions/core.o
CC arch/x86/events/intel/core.o
CC fs/nfs_common/nfsacl.o
CC security/integrity/iint.o
AR virt/lib/built-in.a
CC arch/x86/mm/pat/set_memory.o
AR arch/x86/platform/atom/built-in.a
CC arch/x86/power/hibernate_32.o
AR drivers/cache/built-in.a
CC lib/math/div64.o
CC arch/x86/virt/svm/cmdline.o
CC net/core/sock.o
CC arch/x86/kernel/fpu/init.o
CC fs/notify/dnotify/dnotify.o
CC net/ethernet/eth.o
CC sound/core/seq/seq.o
AR virt/built-in.a
AR arch/x86/platform/ce4100/built-in.a
AR drivers/irqchip/built-in.a
AS arch/x86/lib/checksum_32.o
CC security/min_addr.o
CC arch/x86/entry/vdso/vma.o
CC arch/x86/platform/efi/memmap.o
CC kernel/sched/core.o
AR drivers/bus/mhi/built-in.a
CC arch/x86/lib/cmdline.o
AR drivers/bus/built-in.a
CC crypto/asymmetric_keys/asymmetric_type.o
AR drivers/pwm/built-in.a
AR drivers/leds/trigger/built-in.a
AR drivers/leds/blink/built-in.a
AR arch/x86/virt/svm/built-in.a
AR drivers/leds/simple/built-in.a
CC drivers/leds/led-core.o
AR arch/x86/virt/vmx/built-in.a
AR arch/x86/virt/built-in.a
AS arch/x86/lib/cmpxchg8b_emu.o
CC lib/math/gcd.o
GEN security/selinux/flask.h security/selinux/av_permissions.h
CC arch/x86/lib/cpu.o
CC security/selinux/avc.o
CC drivers/pci/msi/pcidev_msi.o
CC crypto/asymmetric_keys/restrict.o
CC lib/math/lcm.o
CC drivers/pci/msi/api.o
CC lib/math/int_log.o
GEN usr/initramfs_data.cpio
COPY usr/initramfs_inc_data
AS usr/initramfs_data.o
CC arch/x86/kernel/fpu/bugs.o
HOSTCC certs/extract-cert
AR usr/built-in.a
CC lib/math/int_pow.o
CC arch/x86/lib/delay.o
CC lib/math/int_sqrt.o
CC arch/x86/kernel/fpu/core.o
CC lib/math/reciprocal_div.o
CC sound/core/seq/seq_lock.o
CC fs/iomap/trace.o
CC lib/math/rational.o
AS arch/x86/realmode/rm/header.o
AS arch/x86/realmode/rm/trampoline_32.o
AR arch/x86/video/built-in.a
AS arch/x86/realmode/rm/stack.o
CC security/selinux/hooks.o
AR arch/x86/entry/vsyscall/built-in.a
AS arch/x86/realmode/rm/reboot.o
CC drivers/leds/led-class.o
CERT certs/x509_certificate_list
CERT certs/signing_key.x509
AS arch/x86/lib/getuser.o
AS certs/system_certificates.o
AS arch/x86/realmode/rm/wakeup_asm.o
AR certs/built-in.a
CC security/integrity/integrity_audit.o
CC arch/x86/events/intel/bts.o
CC arch/x86/platform/efi/quirks.o
CC arch/x86/events/intel/ds.o
GEN arch/x86/lib/inat-tables.c
CC fs/nfs_common/grace.o
CC arch/x86/realmode/rm/wakemain.o
CC fs/iomap/iter.o
CC arch/x86/lib/insn-eval.o
AR sound/i2c/other/built-in.a
AR sound/i2c/built-in.a
CC arch/x86/events/amd/lbr.o
CC drivers/pci/msi/msi.o
AR net/802/built-in.a
CC arch/x86/pci/init.o
CC crypto/asymmetric_keys/signature.o
AR arch/x86/platform/geode/built-in.a
CC security/keys/key.o
CC arch/x86/events/intel/knc.o
CC block/bdev.o
CC arch/x86/realmode/rm/video-mode.o
CC drivers/pci/pcie/portdrv.o
CC arch/x86/entry/vdso/extable.o
LDS arch/x86/entry/vdso/vdso32/vdso32.lds
AR fs/notify/dnotify/built-in.a
CC fs/notify/inotify/inotify_fsnotify.o
CC arch/x86/kernel/cpu/mce/core.o
AS arch/x86/power/hibernate_asm_32.o
CC arch/x86/kernel/cpu/mtrr/mtrr.o
CC arch/x86/power/hibernate.o
CC block/partitions/msdos.o
AR arch/x86/events/zhaoxin/built-in.a
CC block/partitions/efi.o
AS arch/x86/realmode/rm/copy.o
AS arch/x86/realmode/rm/bioscall.o
CC arch/x86/realmode/rm/regs.o
CC sound/core/seq/seq_clientmgr.o
AR lib/math/built-in.a
CC arch/x86/realmode/rm/video-vga.o
CC arch/x86/realmode/rm/video-vesa.o
CC lib/crypto/mpi/generic_mpih-lshift.o
CC arch/x86/kernel/fpu/regset.o
CC arch/x86/kernel/fpu/signal.o
CC arch/x86/realmode/rm/video-bios.o
CC arch/x86/kernel/acpi/boot.o
CC lib/crypto/mpi/generic_mpih-mul1.o
CC net/core/request_sock.o
PASYMS arch/x86/realmode/rm/pasyms.h
CC drivers/leds/led-triggers.o
CC arch/x86/mm/init.o
LDS arch/x86/realmode/rm/realmode.lds
LD arch/x86/realmode/rm/realmode.elf
CC fs/nfs_common/common.o
RELOCS arch/x86/realmode/rm/realmode.relocs
OBJCOPY arch/x86/realmode/rm/realmode.bin
AS arch/x86/realmode/rmpiggy.o
CC drivers/video/console/dummycon.o
CC crypto/asymmetric_keys/public_key.o
AR arch/x86/realmode/built-in.a
CC drivers/video/backlight/backlight.o
AR net/ethernet/built-in.a
CC arch/x86/mm/pat/memtype.o
CC fs/notify/inotify/inotify_user.o
CC drivers/video/console/vgacon.o
CC arch/x86/pci/pcbios.o
AR security/integrity/built-in.a
CC ipc/shm.o
AR drivers/video/fbdev/core/built-in.a
AR init/built-in.a
AR drivers/video/fbdev/omap/built-in.a
CC net/core/skbuff.o
AR fs/notify/fanotify/built-in.a
AR drivers/video/fbdev/omap2/omapfb/dss/built-in.a
CC block/fops.o
AR drivers/video/fbdev/omap2/omapfb/displays/built-in.a
AR drivers/video/fbdev/omap2/omapfb/built-in.a
AR drivers/video/fbdev/omap2/built-in.a
AR drivers/video/fbdev/built-in.a
CC security/security.o
AS arch/x86/entry/vdso/vdso32/note.o
AR arch/x86/power/built-in.a
CC arch/x86/mm/init_32.o
AS arch/x86/entry/vdso/vdso32/system_call.o
CC security/lsm_audit.o
CC arch/x86/lib/insn.o
AS arch/x86/entry/vdso/vdso32/sigreturn.o
AS arch/x86/entry/entry.o
CC arch/x86/kernel/cpu/mtrr/if.o
CC arch/x86/events/amd/ibs.o
CC arch/x86/platform/efi/efi.o
CC arch/x86/entry/vdso/vdso32/vclock_gettime.o
CC drivers/pci/pcie/rcec.o
CC arch/x86/kernel/apic/apic.o
AR arch/x86/platform/iris/built-in.a
CC net/core/datagram.o
CC fs/notify/fsnotify.o
CC crypto/api.o
CC lib/crypto/mpi/generic_mpih-mul2.o
CC drivers/pci/msi/irqdomain.o
CC arch/x86/kernel/acpi/sleep.o
CC fs/iomap/buffered-io.o
CC mm/mempool.o
CC security/keys/keyring.o
AR block/partitions/built-in.a
CC security/keys/keyctl.o
CC sound/core/seq/seq_memory.o
CC arch/x86/events/amd/uncore.o
CC arch/x86/kernel/fpu/xstate.o
CC arch/x86/lib/kaslr.o
AR drivers/leds/built-in.a
AR fs/nfs_common/built-in.a
ASN.1 crypto/asymmetric_keys/x509.asn1.[ch]
CC drivers/pci/pcie/bwctrl.o
ASN.1 crypto/asymmetric_keys/x509_akid.asn1.[ch]
CC crypto/asymmetric_keys/x509_loader.o
CC lib/zlib_inflate/inffast.o
CC arch/x86/kernel/cpu/microcode/core.o
CC arch/x86/entry/vdso/vdso32/vgetcpu.o
CC arch/x86/kernel/cpu/mce/severity.o
CC arch/x86/pci/mmconfig_32.o
CC lib/crypto/memneq.o
AR drivers/video/backlight/built-in.a
CC arch/x86/pci/direct.o
CC arch/x86/lib/memcpy_32.o
CC lib/zlib_inflate/inflate.o
CC crypto/asymmetric_keys/x509_public_key.o
CC kernel/locking/mutex.o
AS arch/x86/lib/memmove_32.o
CC arch/x86/lib/misc.o
CC arch/x86/kernel/cpu/mtrr/generic.o
CC arch/x86/lib/pc-conf-reg.o
CC kernel/power/qos.o
CC lib/crypto/mpi/generic_mpih-mul3.o
AS arch/x86/lib/putuser.o
CC arch/x86/mm/pat/memtype_interval.o
HOSTCC arch/x86/entry/vdso/vdso2c
CC kernel/printk/printk.o
AR fs/notify/inotify/built-in.a
CC kernel/irq/irqdesc.o
CC arch/x86/kernel/cpu/mtrr/cleanup.o
AR drivers/video/console/built-in.a
CC drivers/video/aperture.o
AS arch/x86/lib/retpoline.o
CC arch/x86/lib/string_32.o
AS arch/x86/kernel/acpi/wakeup_32.o
CC arch/x86/kernel/acpi/cstate.o
CC kernel/irq/handle.o
CC arch/x86/kernel/cpu/mtrr/amd.o
CC arch/x86/lib/strstr_32.o
AR drivers/pci/msi/built-in.a
AR drivers/idle/built-in.a
AR drivers/char/ipmi/built-in.a
CC arch/x86/kernel/cpu/mce/genpool.o
AS arch/x86/entry/entry_32.o
CC block/bio.o
CC fs/notify/notification.o
CC kernel/printk/printk_safe.o
CC arch/x86/lib/usercopy.o
CC kernel/rcu/update.o
AR kernel/livepatch/built-in.a
CC arch/x86/platform/efi/efi_32.o
CC arch/x86/entry/vdso/vdso32-setup.o
CC drivers/pci/pcie/aspm.o
CC sound/core/seq/seq_queue.o
CC kernel/irq/manage.o
CC arch/x86/kernel/cpu/microcode/intel.o
CC ipc/syscall.o
CC ipc/ipc_sysctl.o
ASN.1 crypto/asymmetric_keys/pkcs7.asn1.[ch]
CC crypto/asymmetric_keys/pkcs7_trust.o
CC crypto/asymmetric_keys/pkcs7_verify.o
CC lib/zlib_inflate/infutil.o
CC kernel/dma/mapping.o
CC arch/x86/pci/mmconfig-shared.o
CC kernel/irq/spurious.o
CC arch/x86/lib/usercopy_32.o
VDSO arch/x86/entry/vdso/vdso32.so.dbg
CC lib/crypto/mpi/generic_mpih-rshift.o
OBJCOPY arch/x86/entry/vdso/vdso32.so
VDSO2C arch/x86/entry/vdso/vdso-image-32.c
CC arch/x86/entry/vdso/vdso-image-32.o
AR arch/x86/mm/pat/built-in.a
CC arch/x86/mm/fault.o
CC io_uring/rsrc.o
CC mm/oom_kill.o
AR arch/x86/events/amd/built-in.a
CC arch/x86/entry/syscall_32.o
CC arch/x86/kernel/cpu/microcode/amd.o
CC security/keys/permission.o
AR arch/x86/kernel/acpi/built-in.a
CC sound/core/sound.o
CC arch/x86/entry/common.o
CC security/device_cgroup.o
AS arch/x86/entry/thunk.o
CC fs/notify/group.o
CC lib/crypto/mpi/generic_mpih-sub1.o
CC fs/quota/dquot.o
CC block/elevator.o
CC lib/zlib_inflate/inftrees.o
AR arch/x86/kernel/fpu/built-in.a
CC arch/x86/kernel/cpu/cacheinfo.o
CC arch/x86/lib/msr-smp.o
CC arch/x86/kernel/cpu/mce/intel.o
AR arch/x86/entry/vdso/built-in.a
CC drivers/pci/pcie/pme.o
CC arch/x86/kernel/cpu/mtrr/cyrix.o
CC kernel/sched/fair.o
CC crypto/asymmetric_keys/x509.asn1.o
CC crypto/asymmetric_keys/x509_akid.asn1.o
CC drivers/video/cmdline.o
CC arch/x86/mm/ioremap.o
CC crypto/asymmetric_keys/x509_cert_parser.o
CC arch/x86/events/intel/lbr.o
CC crypto/cipher.o
CC lib/zlib_inflate/inflate_syms.o
CC kernel/locking/semaphore.o
CC kernel/power/main.o
AS arch/x86/platform/efi/efi_stub_32.o
CC arch/x86/platform/efi/runtime-map.o
CC arch/x86/kernel/apic/apic_common.o
CC kernel/locking/rwsem.o
CC kernel/sched/build_policy.o
CC block/blk-core.o
CC sound/core/seq/seq_fifo.o
CC arch/x86/lib/cache-smp.o
CC ipc/mqueue.o
CC kernel/rcu/sync.o
CC arch/x86/lib/crc32-glue.o
AR lib/zlib_inflate/built-in.a
CC kernel/rcu/srcutree.o
AS arch/x86/lib/crc32-pclmul.o
CC lib/crypto/mpi/generic_mpih-add1.o
CC kernel/rcu/tree.o
CC fs/iomap/direct-io.o
CC kernel/printk/nbcon.o
CC security/keys/process_keys.o
CC fs/notify/mark.o
CC arch/x86/kernel/cpu/mce/amd.o
CC arch/x86/kernel/apic/apic_noop.o
CC arch/x86/pci/fixup.o
CC arch/x86/kernel/cpu/mtrr/centaur.o
CC crypto/asymmetric_keys/pkcs7.asn1.o
CC crypto/asymmetric_keys/pkcs7_parser.o
CC kernel/power/console.o
CC drivers/acpi/acpica/dsargs.o
CC arch/x86/mm/extable.o
AR drivers/acpi/pmic/built-in.a
AR drivers/pci/pcie/built-in.a
CC arch/x86/events/intel/p4.o
CC drivers/video/nomodeset.o
AR drivers/pci/pwrctrl/built-in.a
CC drivers/pci/hotplug/pci_hotplug_core.o
AR arch/x86/kernel/cpu/microcode/built-in.a
CC arch/x86/lib/msr.o
CC drivers/pci/hotplug/acpi_pcihp.o
CC arch/x86/events/probe.o
AR arch/x86/entry/built-in.a
CC sound/core/init.o
CC ipc/namespace.o
CC sound/core/seq/seq_prioq.o
CC kernel/irq/resend.o
AR arch/x86/platform/efi/built-in.a
CC arch/x86/platform/intel/iosf_mbi.o
AR arch/x86/platform/intel-mid/built-in.a
CC lib/zlib_deflate/deflate.o
CC drivers/acpi/acpica/dscontrol.o
AS arch/x86/lib/msr-reg.o
CC arch/x86/events/utils.o
CC drivers/pnp/pnpacpi/core.o
CC kernel/locking/percpu-rwsem.o
CC lib/crypto/mpi/mpicoder.o
CC arch/x86/kernel/apic/ipi.o
CC ipc/mq_sysctl.o
AR drivers/amba/built-in.a
CC arch/x86/kernel/cpu/mtrr/legacy.o
CC io_uring/notif.o
CC drivers/video/hdmi.o
CC drivers/pnp/core.o
CC fs/proc/task_mmu.o
CC arch/x86/events/intel/p6.o
CC drivers/acpi/dptf/int340x_thermal.o
AR crypto/asymmetric_keys/built-in.a
CC crypto/compress.o
CC kernel/power/process.o
CC kernel/irq/chip.o
CC drivers/acpi/acpica/dsdebug.o
CC kernel/power/suspend.o
CC security/selinux/selinuxfs.o
CC mm/fadvise.o
CC fs/proc/inode.o
CC kernel/printk/printk_ringbuffer.o
AR arch/x86/kernel/cpu/mtrr/built-in.a
CC fs/proc/root.o
CC sound/core/memory.o
CC block/blk-sysfs.o
CC fs/notify/fdinfo.o
CC arch/x86/pci/acpi.o
CC kernel/entry/common.o
CC security/keys/request_key.o
CC sound/core/seq/seq_timer.o
CC security/keys/request_key_auth.o
CC fs/iomap/fiemap.o
CC arch/x86/mm/mmap.o
CC arch/x86/kernel/apic/vector.o
AR drivers/pci/hotplug/built-in.a
CC kernel/locking/spinlock.o
AR drivers/acpi/dptf/built-in.a
AR drivers/pci/controller/dwc/built-in.a
CC drivers/pnp/pnpacpi/rsparser.o
CC block/blk-flush.o
CC arch/x86/lib/msr-reg-export.o
AR drivers/pci/controller/mobiveil/built-in.a
AR drivers/pci/controller/plda/built-in.a
AR arch/x86/platform/intel/built-in.a
AR drivers/pci/controller/built-in.a
AR arch/x86/platform/intel-quark/built-in.a
CC drivers/acpi/acpica/dsfield.o
AR arch/x86/platform/olpc/built-in.a
AR drivers/pci/switch/built-in.a
CC drivers/pci/access.o
AR arch/x86/platform/scx200/built-in.a
CC security/keys/user_defined.o
CC kernel/dma/direct.o
AR arch/x86/platform/ts5500/built-in.a
CC lib/crypto/mpi/mpi-add.o
AR arch/x86/platform/uv/built-in.a
AR arch/x86/platform/built-in.a
CC kernel/entry/syscall_user_dispatch.o
CC arch/x86/mm/pgtable.o
CC fs/iomap/seek.o
CC crypto/algapi.o
CC arch/x86/mm/physaddr.o
CC lib/zlib_deflate/deftree.o
CC arch/x86/mm/tlb.o
AS arch/x86/lib/hweight.o
AR ipc/built-in.a
CC arch/x86/mm/cpu_entry_area.o
CC arch/x86/lib/iomem.o
CC arch/x86/mm/maccess.o
CC fs/quota/quota_v2.o
CC arch/x86/kernel/cpu/mce/threshold.o
CC kernel/locking/osq_lock.o
CC arch/x86/events/intel/pt.o
AR drivers/video/built-in.a
CC kernel/power/hibernate.o
CC block/blk-settings.o
AR fs/notify/built-in.a
CC fs/quota/quota_tree.o
CC kernel/printk/sysctl.o
CC drivers/acpi/acpica/dsinit.o
CC sound/core/seq/seq_system.o
CC mm/maccess.o
CC io_uring/tctx.o
CC net/core/stream.o
CC security/keys/proc.o
CC arch/x86/kernel/cpu/scattered.o
CC kernel/locking/qspinlock.o
CC security/selinux/netlink.o
CC arch/x86/lib/atomic64_32.o
CC arch/x86/pci/legacy.o
CC kernel/dma/ops_helpers.o
CC kernel/irq/dummychip.o
CC block/blk-ioc.o
CC lib/zlib_deflate/deflate_syms.o
CC arch/x86/lib/inat.o
CC crypto/scatterwalk.o
CC lib/crypto/utils.o
CC fs/proc/base.o
CC arch/x86/events/rapl.o
CC lib/crypto/mpi/mpi-bit.o
CC mm/page-writeback.o
CC fs/iomap/swapfile.o
CC kernel/dma/remap.o
CC fs/quota/quota.o
AR arch/x86/lib/built-in.a
CC arch/x86/kernel/kprobes/core.o
AR arch/x86/lib/lib.a
CC sound/core/seq/seq_ports.o
AR kernel/printk/built-in.a
CC kernel/power/snapshot.o
CC kernel/locking/rtmutex_api.o
CC drivers/acpi/acpica/dsmethod.o
CC kernel/rcu/rcu_segcblist.o
AR drivers/pnp/pnpacpi/built-in.a
CC drivers/acpi/x86/apple.o
CC drivers/pnp/card.o
AR kernel/entry/built-in.a
CC fs/proc/generic.o
CC drivers/pci/bus.o
CC security/keys/sysctl.o
CC security/keys/keyctl_pkey.o
CC mm/folio-compat.o
AR lib/zlib_deflate/built-in.a
CC lib/crypto/mpi/mpi-cmp.o
CC net/sched/sch_generic.o
CC drivers/pnp/driver.o
CC kernel/irq/devres.o
AR drivers/clk/actions/built-in.a
AR drivers/clk/analogbits/built-in.a
AR drivers/clk/bcm/built-in.a
AR drivers/clk/imgtec/built-in.a
AR drivers/clk/imx/built-in.a
AR drivers/clk/ingenic/built-in.a
AR drivers/clk/mediatek/built-in.a
AR drivers/clk/microchip/built-in.a
AR drivers/clk/mstar/built-in.a
AR drivers/clk/mvebu/built-in.a
AR drivers/clk/ralink/built-in.a
CC sound/core/control.o
AR drivers/clk/renesas/built-in.a
CC drivers/dma/dw/core.o
AR drivers/clk/socfpga/built-in.a
CC arch/x86/pci/irq.o
AR drivers/clk/sophgo/built-in.a
AR drivers/clk/sprd/built-in.a
CC arch/x86/mm/pgprot.o
AR drivers/clk/starfive/built-in.a
CC arch/x86/events/msr.o
AR drivers/clk/sunxi-ng/built-in.a
AR drivers/clk/ti/built-in.a
CC drivers/acpi/x86/cmos_rtc.o
CC kernel/locking/qrwlock.o
AR drivers/clk/versatile/built-in.a
CC crypto/proc.o
CC drivers/acpi/acpica/dsmthdat.o
AR drivers/clk/xilinx/built-in.a
AR drivers/clk/built-in.a
CC drivers/pci/probe.o
CC drivers/pci/host-bridge.o
CC mm/readahead.o
AR arch/x86/kernel/cpu/mce/built-in.a
CC arch/x86/kernel/cpu/topology_common.o
AR kernel/dma/built-in.a
CC drivers/pnp/resource.o
CC drivers/acpi/acpica/dsobject.o
CC arch/x86/events/intel/uncore.o
CC arch/x86/kernel/apic/init.o
CC block/blk-map.o
CC mm/swap.o
CC fs/kernfs/mount.o
CC io_uring/filetable.o
AR fs/iomap/built-in.a
CC arch/x86/pci/common.o
CC arch/x86/events/intel/uncore_nhmex.o
CC fs/sysfs/file.o
CC security/selinux/nlmsgtab.o
CC kernel/irq/kexec.o
CC lib/crypto/mpi/mpi-sub-ui.o
AR security/keys/built-in.a
CC kernel/irq/autoprobe.o
CC io_uring/rw.o
CC arch/x86/kernel/kprobes/opt.o
CC sound/core/seq/seq_info.o
CC arch/x86/mm/pgtable_32.o
CC net/core/scm.o
CC io_uring/net.o
CC arch/x86/kernel/cpu/topology_ext.o
CC fs/sysfs/dir.o
CC net/netlink/af_netlink.o
CC net/sched/sch_mq.o
CC sound/core/misc.o
CC io_uring/poll.o
CC arch/x86/events/intel/uncore_snb.o
CC drivers/acpi/acpica/dsopcode.o
CC arch/x86/kernel/apic/hw_nmi.o
CC net/netlink/genetlink.o
AR kernel/locking/built-in.a
CC lib/lzo/lzo1x_compress.o
CC lib/crypto/chacha.o
CC crypto/aead.o
CC drivers/acpi/x86/lpss.o
CC lib/lzo/lzo1x_decompress_safe.o
CC arch/x86/pci/early.o
CC arch/x86/kernel/apic/io_apic.o
CC fs/quota/kqid.o
CC arch/x86/kernel/apic/msi.o
CC kernel/irq/irqdomain.o
CC arch/x86/kernel/cpu/topology_amd.o
CC lib/crypto/mpi/mpi-div.o
CC sound/core/seq/seq_dummy.o
CC fs/proc/array.o
CC fs/kernfs/inode.o
CC drivers/acpi/acpica/dspkginit.o
AR sound/drivers/opl3/built-in.a
CC arch/x86/mm/iomap_32.o
CC fs/sysfs/symlink.o
AR sound/drivers/opl4/built-in.a
CC block/blk-merge.o
CC drivers/dma/dw/dw.o
AR sound/drivers/mpu401/built-in.a
CC drivers/dma/hsu/hsu.o
AR sound/drivers/vx/built-in.a
AR sound/drivers/pcsp/built-in.a
CC fs/proc/fd.o
AR sound/drivers/built-in.a
CC arch/x86/mm/hugetlbpage.o
CC drivers/pnp/manager.o
CC arch/x86/pci/bus_numa.o
CC net/netlink/policy.o
CC security/selinux/netif.o
CC arch/x86/kernel/cpu/common.o
AR lib/lzo/built-in.a
CC drivers/dma/dw/idma32.o
CC kernel/power/swap.o
AR kernel/rcu/built-in.a
CC fs/quota/netlink.o
CC kernel/sched/build_utility.o
AR arch/x86/kernel/kprobes/built-in.a
CC net/core/gen_stats.o
AR net/bpf/built-in.a
CC lib/crypto/mpi/mpi-mod.o
CC net/ethtool/ioctl.o
AR sound/isa/ad1816a/built-in.a
AR sound/isa/ad1848/built-in.a
AR sound/isa/cs423x/built-in.a
CC net/ethtool/common.o
AR sound/isa/es1688/built-in.a
AR sound/isa/galaxy/built-in.a
AR sound/isa/gus/built-in.a
CC drivers/acpi/acpica/dsutils.o
AR sound/isa/msnd/built-in.a
CC drivers/acpi/x86/s2idle.o
CC fs/devpts/inode.o
AR sound/isa/opti9xx/built-in.a
AR sound/isa/sb/built-in.a
CC drivers/acpi/tables.o
AR sound/isa/wavefront/built-in.a
CC drivers/dma/dw/acpi.o
AR sound/isa/wss/built-in.a
AR sound/isa/built-in.a
LDS arch/x86/kernel/vmlinux.lds
AR sound/core/seq/built-in.a
CC net/ethtool/netlink.o
CC sound/core/device.o
CC mm/truncate.o
CC kernel/power/user.o
CC lib/crypto/aes.o
CC crypto/geniv.o
CC security/selinux/netnode.o
CC crypto/lskcipher.o
CC arch/x86/kernel/apic/probe_32.o
CC lib/crypto/mpi/mpi-mul.o
CC arch/x86/events/intel/uncore_snbep.o
AS arch/x86/kernel/head_32.o
CC drivers/pnp/support.o
CC drivers/acpi/osi.o
CC fs/sysfs/mount.o
CC drivers/pci/remove.o
CC kernel/power/poweroff.o
CC arch/x86/mm/dump_pagetables.o
CC net/sched/sch_frag.o
CC fs/kernfs/dir.o
CC drivers/acpi/osl.o
CC arch/x86/pci/amd_bus.o
CC security/selinux/netport.o
CC drivers/acpi/acpica/dswexec.o
CC lib/lz4/lz4_decompress.o
AR drivers/dma/hsu/built-in.a
CC net/netfilter/core.o
CC net/sched/sch_api.o
CC crypto/skcipher.o
CC fs/proc/proc_tty.o
CC kernel/irq/proc.o
CC sound/core/info.o
CC net/netfilter/nf_log.o
CC io_uring/eventfd.o
CC arch/x86/kernel/head32.o
AR fs/quota/built-in.a
CC drivers/acpi/acpica/dswload.o
AR drivers/dma/idxd/built-in.a
CC arch/x86/kernel/cpu/rdrand.o
AR drivers/dma/dw/built-in.a
AR drivers/dma/amd/built-in.a
AR drivers/dma/mediatek/built-in.a
CC kernel/irq/migration.o
AR drivers/dma/qcom/built-in.a
AR drivers/dma/stm32/built-in.a
AR fs/devpts/built-in.a
CC fs/proc/cmdline.o
AR drivers/dma/ti/built-in.a
AR drivers/dma/xilinx/built-in.a
CC drivers/dma/dmaengine.o
CC lib/crypto/mpi/mpih-cmp.o
CC net/netfilter/nf_queue.o
CC mm/vmscan.o
CC fs/kernfs/file.o
CC drivers/pnp/interface.o
AR drivers/soc/apple/built-in.a
CC net/ipv4/netfilter/nf_defrag_ipv4.o
CC net/core/gen_estimator.o
CC drivers/acpi/x86/utils.o
AR drivers/soc/aspeed/built-in.a
AR drivers/soc/bcm/built-in.a
AR drivers/soc/fsl/built-in.a
CC net/ipv4/route.o
CC drivers/pci/pci.o
AR drivers/soc/fujitsu/built-in.a
AR drivers/soc/hisilicon/built-in.a
CC arch/x86/kernel/ebda.o
AR drivers/soc/imx/built-in.a
AR drivers/soc/ixp4xx/built-in.a
AR drivers/soc/loongson/built-in.a
AR drivers/soc/mediatek/built-in.a
AR drivers/soc/microchip/built-in.a
CC fs/netfs/buffered_read.o
AR drivers/soc/nuvoton/built-in.a
CC lib/zstd/zstd_decompress_module.o
AR drivers/soc/pxa/built-in.a
AR arch/x86/kernel/apic/built-in.a
AR drivers/soc/amlogic/built-in.a
CC drivers/dma/virt-dma.o
AR drivers/soc/qcom/built-in.a
AR drivers/soc/renesas/built-in.a
CC drivers/acpi/acpica/dswload2.o
AR drivers/soc/rockchip/built-in.a
CC block/blk-timeout.o
CC fs/sysfs/group.o
AR drivers/soc/sunxi/built-in.a
AR kernel/power/built-in.a
AR drivers/soc/ti/built-in.a
CC lib/xz/xz_dec_syms.o
AR drivers/soc/versatile/built-in.a
CC drivers/virtio/virtio.o
AR drivers/soc/xilinx/built-in.a
AR arch/x86/pci/built-in.a
AR drivers/soc/built-in.a
CC drivers/virtio/virtio_ring.o
CC lib/xz/xz_dec_stream.o
CC lib/dim/dim.o
CC arch/x86/mm/highmem_32.o
CC drivers/tty/vt/vt_ioctl.o
CC drivers/tty/vt/vc_screen.o
CC drivers/pci/pci-driver.o
CC net/sched/sch_blackhole.o
CC fs/proc/consoles.o
CC kernel/irq/cpuhotplug.o
CC fs/proc/cpuinfo.o
CC arch/x86/kernel/cpu/match.o
CC io_uring/uring_cmd.o
CC drivers/tty/vt/selection.o
CC lib/crypto/mpi/mpih-div.o
AR net/netlink/built-in.a
CC fs/kernfs/symlink.o
CC lib/zstd/decompress/huf_decompress.o
CC sound/core/isadma.o
CC drivers/pnp/quirks.o
CC mm/shrinker.o
CC net/ipv4/inetpeer.o
CC drivers/acpi/acpica/dswscope.o
CC security/selinux/status.o
CC drivers/acpi/acpica/dswstate.o
CC mm/shmem.o
CC net/sched/cls_api.o
CC lib/dim/net_dim.o
CC drivers/acpi/x86/blacklist.o
CC crypto/seqiv.o
CC lib/xz/xz_dec_lzma2.o
CC lib/zstd/decompress/zstd_ddict.o
CC arch/x86/kernel/cpu/bugs.o
CC io_uring/openclose.o
CC block/blk-lib.o
AR lib/lz4/built-in.a
CC kernel/module/main.o
AR fs/sysfs/built-in.a
CC io_uring/sqpoll.o
CC arch/x86/kernel/cpu/aperfmperf.o
AR arch/x86/mm/built-in.a
CC drivers/virtio/virtio_anchor.o
CC fs/proc/devices.o
CC lib/crypto/mpi/mpih-mul.o
CC drivers/pnp/system.o
CC drivers/acpi/utils.o
CC net/core/net_namespace.o
AR sound/pci/ac97/built-in.a
CC lib/dim/rdma_dim.o
AR sound/pci/ali5451/built-in.a
CC sound/core/vmaster.o
AR sound/pci/asihpi/built-in.a
AR sound/pci/au88x0/built-in.a
AR sound/pci/aw2/built-in.a
AR sound/pci/ctxfi/built-in.a
CC drivers/acpi/acpica/evevent.o
AR sound/pci/ca0106/built-in.a
CC net/ipv4/netfilter/nf_reject_ipv4.o
AR sound/pci/cs46xx/built-in.a
CC kernel/irq/pm.o
AR sound/pci/cs5535audio/built-in.a
AR sound/pci/lola/built-in.a
CC arch/x86/kernel/cpu/cpuid-deps.o
AR sound/pci/lx6464es/built-in.a
AR sound/pci/echoaudio/built-in.a
CC drivers/dma/acpi-dma.o
AR sound/pci/emu10k1/built-in.a
AR drivers/acpi/x86/built-in.a
CC net/netfilter/nf_sockopt.o
CC lib/xz/xz_dec_bcj.o
CC sound/pci/hda/hda_bind.o
CC fs/netfs/buffered_write.o
AR fs/kernfs/built-in.a
CC drivers/acpi/reboot.o
AR sound/pci/ice1712/built-in.a
CC fs/ext4/balloc.o
CC net/ethtool/bitset.o
CC drivers/tty/vt/keyboard.o
CC mm/util.o
CC mm/mmzone.o
CC crypto/echainiv.o
CC kernel/module/strict_rwx.o
CC drivers/acpi/acpica/evgpe.o
AR drivers/pnp/built-in.a
CC sound/core/ctljack.o
CC arch/x86/events/intel/uncore_discovery.o
CC drivers/tty/hvc/hvc_console.o
CC drivers/acpi/nvs.o
CC drivers/acpi/acpica/evgpeblk.o
CC kernel/time/time.o
CC net/core/secure_seq.o
CC lib/zstd/decompress/zstd_decompress.o
CC net/ipv4/netfilter/ip_tables.o
CC fs/proc/interrupts.o
CC fs/netfs/direct_read.o
CC block/blk-mq.o
CC kernel/futex/core.o
AR lib/dim/built-in.a
CC fs/proc/loadavg.o
CC security/selinux/ss/ebitmap.o
CC fs/proc/meminfo.o
CC arch/x86/events/intel/cstate.o
AR lib/xz/built-in.a
CC sound/core/jack.o
CC sound/core/hwdep.o
CC net/ipv4/netfilter/iptable_filter.o
CC lib/crypto/mpi/mpi-pow.o
CC drivers/tty/vt/vt.o
CC kernel/irq/msi.o
CC net/netfilter/utils.o
CC kernel/futex/syscalls.o
CC net/ipv4/protocol.o
AR drivers/dma/built-in.a
CC net/ethtool/strset.o
CC drivers/char/hw_random/core.o
CC sound/pci/hda/hda_codec.o
CC drivers/acpi/acpica/evgpeinit.o
CC sound/pci/hda/hda_jack.o
CC crypto/ahash.o
CC drivers/virtio/virtio_pci_modern_dev.o
CC arch/x86/kernel/cpu/umwait.o
CC lib/crypto/mpi/mpiutil.o
CC net/core/flow_dissector.o
AR sound/pci/korg1212/built-in.a
CC fs/jbd2/transaction.o
CC arch/x86/kernel/platform-quirks.o
AR drivers/tty/hvc/built-in.a
CC lib/crypto/arc4.o
AR kernel/sched/built-in.a
CC fs/netfs/direct_write.o
CC fs/ramfs/inode.o
CC drivers/acpi/acpica/evgpeutil.o
COPY drivers/tty/vt/defkeymap.c
CC security/selinux/ss/hashtab.o
CC io_uring/xattr.o
CC security/selinux/ss/symtab.o
CC security/selinux/ss/sidtab.o
CC security/selinux/ss/avtab.o
CC sound/core/timer.o
CC lib/zstd/decompress/zstd_decompress_block.o
CC drivers/char/agp/backend.o
CC fs/proc/stat.o
CC sound/core/hrtimer.o
CC lib/zstd/zstd_common_module.o
CC kernel/time/timer.o
CC lib/fonts/fonts.o
AR arch/x86/events/intel/built-in.a
AR arch/x86/events/built-in.a
MKCAP arch/x86/kernel/cpu/capflags.c
CC sound/pci/hda/hda_auto_parser.o
CC drivers/tty/serial/8250/8250_core.o
CC lib/crypto/gf128mul.o
CC kernel/module/kmod.o
CC drivers/char/hw_random/intel-rng.o
CC drivers/tty/serial/serial_core.o
CC kernel/time/hrtimer.o
AR lib/crypto/mpi/built-in.a
CC net/ethtool/linkinfo.o
CC kernel/time/sleep_timeout.o
CC drivers/acpi/acpica/evglock.o
CC kernel/futex/pi.o
AR drivers/iommu/amd/built-in.a
AR drivers/tty/ipwireless/built-in.a
CC drivers/pci/rom.o
CC security/selinux/ss/policydb.o
CC drivers/pci/search.o
AR drivers/iommu/intel/built-in.a
CC security/selinux/ss/services.o
AR drivers/iommu/arm/arm-smmu/built-in.a
CC drivers/virtio/virtio_pci_legacy_dev.o
AR drivers/iommu/arm/arm-smmu-v3/built-in.a
AR drivers/iommu/arm/built-in.a
CC drivers/pci/setup-res.o
CC drivers/pci/irq.o
CC lib/fonts/font_8x16.o
AR drivers/iommu/iommufd/built-in.a
CC kernel/irq/affinity.o
AR drivers/iommu/riscv/built-in.a
CC drivers/iommu/iommu.o
CC fs/ext4/bitmap.o
CC net/netfilter/nfnetlink.o
CC arch/x86/kernel/cpu/powerflags.o
CC crypto/shash.o
CC drivers/acpi/wakeup.o
CC lib/argv_split.o
CC block/blk-mq-tag.o
CC net/xfrm/xfrm_policy.o
CC fs/ext4/block_validity.o
CC fs/proc/uptime.o
CC mm/vmstat.o
CC net/ipv4/netfilter/iptable_mangle.o
CC fs/ramfs/file-mmu.o
CC drivers/acpi/acpica/evhandler.o
CC lib/crypto/blake2s.o
CC drivers/char/agp/generic.o
CC fs/netfs/iterator.o
AR lib/fonts/built-in.a
CC io_uring/nop.o
CC drivers/char/agp/isoch.o
CC net/sched/act_api.o
CC crypto/akcipher.o
CC kernel/irq/matrix.o
CC net/ipv4/ip_input.o
CC drivers/char/hw_random/amd-rng.o
CC arch/x86/kernel/cpu/topology.o
CC kernel/module/tree_lookup.o
CC drivers/virtio/virtio_pci_modern.o
CC security/selinux/ss/conditional.o
CC sound/pci/hda/hda_sysfs.o
CC kernel/futex/requeue.o
CC lib/zstd/common/debug.o
CC drivers/acpi/acpica/evmisc.o
CC lib/bug.o
CC net/sched/sch_fifo.o
CC lib/crypto/blake2s-generic.o
CC drivers/tty/serial/8250/8250_platform.o
CC drivers/pci/vpd.o
CC net/core/sysctl_net_core.o
CC fs/hugetlbfs/inode.o
CC fs/proc/util.o
CC net/ethtool/linkmodes.o
CC net/sched/cls_cgroup.o
CC fs/jbd2/commit.o
AR fs/ramfs/built-in.a
CC net/ipv4/ip_fragment.o
CC fs/fat/cache.o
CC drivers/acpi/acpica/evregion.o
CC fs/ext4/dir.o
CC crypto/sig.o
CC sound/core/pcm.o
CC io_uring/fs.o
CC crypto/kpp.o
CC drivers/char/hw_random/geode-rng.o
CC lib/crypto/sha1.o
CC kernel/module/kallsyms.o
CC fs/netfs/locking.o
CC net/netfilter/nfnetlink_log.o
CC fs/fat/dir.o
CC kernel/module/procfs.o
CC kernel/module/sysfs.o
CC net/ethtool/rss.o
CC net/ipv4/netfilter/ipt_REJECT.o
CC fs/proc/version.o
CC net/unix/af_unix.o
CC kernel/futex/waitwake.o
CC sound/pci/hda/hda_controller.o
CC net/ipv6/netfilter/ip6_tables.o
CC drivers/char/agp/amd64-agp.o
CC drivers/tty/vt/consolemap.o
CC kernel/time/timekeeping.o
CC drivers/tty/serial/8250/8250_pnp.o
CC drivers/virtio/virtio_pci_common.o
CC drivers/acpi/acpica/evrgnini.o
CC drivers/pci/setup-bus.o
CC lib/crypto/sha256.o
AR kernel/irq/built-in.a
CC mm/backing-dev.o
CC net/ipv6/netfilter/ip6table_filter.o
CC net/ipv6/netfilter/ip6table_mangle.o
CC drivers/char/hw_random/via-rng.o
CC lib/zstd/common/entropy_common.o
CC net/ipv6/netfilter/nf_defrag_ipv6_hooks.o
CC lib/buildid.o
CC net/xfrm/xfrm_state.o
CC drivers/iommu/iommu-traces.o
CC fs/proc/softirqs.o
CC fs/proc/namespaces.o
CC net/ipv4/ip_forward.o
ASN.1 crypto/rsapubkey.asn1.[ch]
ASN.1 crypto/rsaprivkey.asn1.[ch]
CC crypto/rsa.o
CC crypto/rsa_helper.o
CC drivers/acpi/acpica/evsci.o
CC mm/mm_init.o
CC lib/zstd/common/error_private.o
CC mm/percpu.o
CC io_uring/splice.o
CC lib/zstd/common/fse_decompress.o
CC fs/netfs/main.o
CC fs/netfs/misc.o
AR kernel/module/built-in.a
CC kernel/time/ntp.o
CC fs/jbd2/recovery.o
CC sound/core/pcm_native.o
CC net/core/dev.o
CC fs/ext4/ext4_jbd2.o
CC block/blk-stat.o
AR kernel/futex/built-in.a
CC drivers/pci/vc.o
AR drivers/char/hw_random/built-in.a
AR sound/ppc/built-in.a
AR lib/crypto/built-in.a
CC lib/zstd/common/zstd_common.o
CC drivers/char/agp/intel-agp.o
CC drivers/virtio/virtio_pci_legacy.o
CC drivers/tty/serial/8250/8250_rsa.o
CC fs/fat/fatent.o
CC net/sched/ematch.o
CC fs/isofs/namei.o
CC drivers/acpi/acpica/evxface.o
CC net/xfrm/xfrm_hash.o
HOSTCC drivers/tty/vt/conmakehash
CC net/ethtool/linkstate.o
AR fs/hugetlbfs/built-in.a
CC fs/proc/self.o
CC [M] net/ipv4/netfilter/iptable_nat.o
CC fs/fat/file.o
CC fs/fat/inode.o
CC security/selinux/ss/mls.o
CC arch/x86/kernel/cpu/proc.o
AR lib/zstd/built-in.a
CC net/unix/garbage.o
CC drivers/tty/vt/defkeymap.o
CC crypto/rsa-pkcs1pad.o
CC lib/clz_tab.o
CC lib/cmdline.o
CC fs/fat/misc.o
CC net/netfilter/nf_conntrack_core.o
CC net/ethtool/debug.o
CONMK drivers/tty/vt/consolemap_deftbl.c
CC drivers/tty/vt/consolemap_deftbl.o
AR drivers/tty/vt/built-in.a
CC net/xfrm/xfrm_input.o
CC sound/pci/hda/hda_proc.o
CC lib/cpumask.o
CC io_uring/sync.o
CC sound/pci/hda/hda_hwdep.o
CC drivers/acpi/acpica/evxfevnt.o
CC drivers/iommu/iommu-sysfs.o
CC block/blk-mq-sysfs.o
CC drivers/pci/mmap.o
CC block/blk-mq-cpumap.o
CC drivers/acpi/sleep.o
CC drivers/acpi/device_sysfs.o
CC drivers/virtio/virtio_pci_admin_legacy_io.o
CC fs/proc/thread_self.o
CC drivers/tty/serial/8250/8250_port.o
CC drivers/virtio/virtio_input.o
CC net/ipv6/af_inet6.o
CC fs/isofs/inode.o
CC drivers/char/agp/intel-gtt.o
CC kernel/time/clocksource.o
CC fs/jbd2/checkpoint.o
CC fs/isofs/dir.o
CC net/ipv6/anycast.o
CC net/ipv6/netfilter/nf_conntrack_reasm.o
CC drivers/acpi/acpica/evxfgpe.o
CC sound/core/pcm_lib.o
CC net/core/dev_addr_lists.o
CC net/core/dst.o
CC crypto/rsassa-pkcs1.o
AR net/sched/built-in.a
CC net/core/netevent.o
CC arch/x86/kernel/process_32.o
CC lib/ctype.o
CC net/core/neighbour.o
CC kernel/cgroup/cgroup.o
CC lib/dec_and_lock.o
AR net/ipv4/netfilter/built-in.a
CC drivers/pci/devres.o
CC net/ipv4/ip_options.o
CC drivers/iommu/dma-iommu.o
CC fs/proc/proc_sysctl.o
CC fs/ext4/extents.o
CC security/selinux/ss/context.o
CC fs/proc/proc_net.o
CC net/xfrm/xfrm_output.o
CC drivers/tty/serial/serial_base_bus.o
CC drivers/tty/serial/serial_ctrl.o
CC fs/netfs/objects.o
CC fs/fat/nfs.o
CC io_uring/msg_ring.o
CC fs/proc/kcore.o
CC lib/decompress.o
CC drivers/iommu/iova.o
CC block/blk-mq-sched.o
CC net/ethtool/wol.o
CC drivers/acpi/acpica/evxfregn.o
CC lib/decompress_bunzip2.o
CC drivers/virtio/virtio_dma_buf.o
CC net/unix/sysctl_net_unix.o
CC net/ipv4/ip_output.o
CC net/ipv4/ip_sockglue.o
CC sound/pci/hda/hda_intel.o
CC kernel/time/jiffies.o
CC crypto/acompress.o
CC fs/netfs/read_collect.o
AR drivers/char/agp/built-in.a
CC drivers/char/mem.o
CC drivers/acpi/acpica/exconcat.o
CC fs/jbd2/revoke.o
CC kernel/trace/trace_clock.o
CC mm/slab_common.o
CC drivers/tty/tty_io.o
CC security/selinux/netlabel.o
CC fs/isofs/util.o
CC fs/isofs/rock.o
CC drivers/pci/proc.o
CC kernel/time/timer_list.o
AR drivers/virtio/built-in.a
CC net/xfrm/xfrm_sysctl.o
CC fs/proc/vmcore.o
CC kernel/cgroup/rstat.o
CC fs/netfs/read_pgpriv2.o
CC arch/x86/kernel/cpu/feat_ctl.o
CC arch/x86/kernel/cpu/intel.o
CC fs/fat/namei_vfat.o
CC lib/decompress_inflate.o
CC kernel/time/timeconv.o
CC drivers/acpi/acpica/exconfig.o
CC fs/nfs/client.o
CC io_uring/advise.o
CC kernel/trace/ring_buffer.o
CC kernel/bpf/core.o
CC crypto/scompress.o
CC fs/ext4/extents_status.o
CC drivers/pci/pci-sysfs.o
CC net/ipv6/netfilter/nf_reject_ipv6.o
CC drivers/pci/slot.o
CC net/ethtool/features.o
AR net/unix/built-in.a
CC block/ioctl.o
CC fs/netfs/read_retry.o
CC io_uring/epoll.o
CC drivers/tty/serial/8250/8250_dma.o
CC fs/fat/namei_msdos.o
CC fs/proc/kmsg.o
CC sound/core/pcm_misc.o
CC drivers/pci/pci-acpi.o
CC mm/compaction.o
CC drivers/tty/serial/8250/8250_dwlib.o
CC drivers/acpi/acpica/exconvrt.o
AR drivers/iommu/built-in.a
CC sound/core/pcm_memory.o
CC drivers/char/random.o
CC lib/decompress_unlz4.o
CC net/netfilter/nf_conntrack_standalone.o
CC fs/jbd2/journal.o
CC kernel/time/timecounter.o
CC net/ethtool/privflags.o
CC arch/x86/kernel/cpu/tsx.o
CC kernel/trace/trace.o
CC kernel/time/alarmtimer.o
CC fs/isofs/export.o
CC arch/x86/kernel/signal.o
CC kernel/events/core.o
CC net/packet/af_packet.o
CC fs/ext4/file.o
CC drivers/acpi/acpica/excreate.o
CC drivers/acpi/device_pm.o
AR sound/pci/mixart/built-in.a
CC net/xfrm/xfrm_replay.o
CC arch/x86/kernel/cpu/intel_epb.o
CC fs/proc/page.o
CC crypto/algboss.o
AR sound/pci/hda/built-in.a
CC net/netfilter/nf_conntrack_expect.o
AR sound/pci/nm256/built-in.a
AR security/selinux/built-in.a
AR sound/pci/oxygen/built-in.a
CC lib/decompress_unlzma.o
AR security/built-in.a
AR sound/pci/pcxhr/built-in.a
AR sound/pci/riptide/built-in.a
AR sound/pci/rme9652/built-in.a
AR sound/arm/built-in.a
AR sound/sh/built-in.a
AR sound/pci/trident/built-in.a
AR sound/synth/emux/built-in.a
AR sound/pci/ymfpci/built-in.a
CC io_uring/statx.o
AR sound/synth/built-in.a
AR sound/usb/misc/built-in.a
AR sound/pci/vx222/built-in.a
CC drivers/tty/serial/8250/8250_pcilib.o
AR sound/usb/usx2y/built-in.a
AR sound/pci/built-in.a
AR sound/usb/caiaq/built-in.a
AR sound/usb/6fire/built-in.a
AR net/dsa/built-in.a
AR sound/usb/hiface/built-in.a
CC drivers/char/misc.o
CC drivers/pci/iomap.o
AR sound/usb/bcd2000/built-in.a
CC fs/netfs/read_single.o
CC fs/isofs/joliet.o
AR sound/usb/built-in.a
CC fs/isofs/compress.o
CC drivers/tty/n_tty.o
CC fs/netfs/rolling_buffer.o
CC kernel/fork.o
CC block/genhd.o
CC sound/core/memalloc.o
CC io_uring/timeout.o
CC drivers/acpi/acpica/exdebug.o
AR fs/fat/built-in.a
CC drivers/tty/serial/8250/8250_early.o
CC fs/exportfs/expfs.o
CC arch/x86/kernel/cpu/amd.o
CC mm/show_mem.o
CC kernel/cgroup/namespace.o
CC net/ipv6/netfilter/ip6t_ipv6header.o
CC crypto/testmgr.o
CC net/ipv4/inet_hashtables.o
CC fs/lockd/clntlock.o
CC net/ethtool/rings.o
CC fs/nfs/dir.o
AR drivers/gpu/host1x/built-in.a
CC drivers/acpi/acpica/exdump.o
AR fs/proc/built-in.a
CC fs/netfs/write_collect.o
CC lib/decompress_unlzo.o
CC kernel/time/posix-timers.o
CC net/sunrpc/auth_gss/auth_gss.o
AR drivers/gpu/drm/tests/built-in.a
AR drivers/gpu/drm/arm/built-in.a
CC fs/lockd/clntproc.o
CC drivers/pci/quirks.o
AR drivers/gpu/drm/clients/built-in.a
AR net/wireless/tests/built-in.a
CC net/wireless/core.o
CC drivers/gpu/drm/display/drm_display_helper_mod.o
AR net/mac80211/tests/built-in.a
CC net/mac80211/main.o
CC drivers/gpu/drm/ttm/ttm_tt.o
CC drivers/char/virtio_console.o
CC net/netlabel/netlabel_user.o
CC drivers/gpu/drm/i915/i915_config.o
CC drivers/gpu/drm/i915/i915_driver.o
CC kernel/exec_domain.o
CC drivers/tty/serial/8250/8250_exar.o
CC net/mac80211/status.o
CC drivers/acpi/acpica/exfield.o
AR fs/isofs/built-in.a
CC net/wireless/sysfs.o
AR fs/exportfs/built-in.a
CC drivers/gpu/drm/ttm/ttm_bo.o
CC crypto/cmac.o
CC drivers/tty/serial/8250/8250_lpss.o
AR drivers/gpu/vga/built-in.a
CC drivers/tty/serial/serial_port.o
CC sound/core/pcm_timer.o
CC drivers/tty/serial/earlycon.o
CC drivers/gpu/drm/ttm/ttm_bo_util.o
CC drivers/gpu/drm/display/drm_dp_dual_mode_helper.o
CC net/xfrm/xfrm_device.o
CC net/ethtool/channels.o
CC io_uring/fdinfo.o
CC lib/decompress_unxz.o
CC arch/x86/kernel/cpu/hygon.o
CC drivers/acpi/acpica/exfldio.o
CC net/netfilter/nf_conntrack_helper.o
CC block/ioprio.o
CC net/mac80211/driver-ops.o
CC crypto/hmac.o
CC net/ethtool/coalesce.o
CC net/ipv6/netfilter/ip6t_REJECT.o
CC drivers/char/hpet.o
AR kernel/bpf/built-in.a
CC sound/core/seq_device.o
CC kernel/time/posix-cpu-timers.o
AR drivers/gpu/drm/renesas/rcar-du/built-in.a
CC arch/x86/kernel/cpu/centaur.o
AR drivers/gpu/drm/renesas/rz-du/built-in.a
AR sound/firewire/built-in.a
CC fs/netfs/write_issue.o
CC crypto/crypto_null.o
AR drivers/gpu/drm/renesas/built-in.a
CC drivers/tty/serial/8250/8250_mid.o
CC net/ethtool/pause.o
CC net/netlabel/netlabel_kapi.o
CC net/ipv4/inet_timewait_sock.o
CC net/ethtool/eee.o
CC lib/decompress_unzstd.o
CC fs/ext4/fsmap.o
CC mm/interval_tree.o
CC net/ethtool/tsinfo.o
CC drivers/acpi/acpica/exmisc.o
CC net/netfilter/nf_conntrack_proto.o
CC drivers/gpu/drm/display/drm_dp_helper.o
CC net/xfrm/xfrm_nat_keepalive.o
CC fs/lockd/clntxdr.o
CC kernel/cgroup/cgroup-v1.o
AR fs/jbd2/built-in.a
CC fs/nfs/file.o
CC io_uring/cancel.o
CC net/mac80211/sta_info.o
CC drivers/gpu/drm/ttm/ttm_bo_vm.o
CC net/ipv6/ip6_output.o
CC net/mac80211/wep.o
CC arch/x86/kernel/cpu/transmeta.o
CC block/badblocks.o
CC drivers/acpi/acpica/exmutex.o
CC kernel/panic.o
AR sound/core/built-in.a
CC lib/dump_stack.o
AR sound/sparc/built-in.a
CC fs/netfs/write_retry.o
AR sound/spi/built-in.a
CC crypto/md5.o
AR sound/parisc/built-in.a
AR sound/pcmcia/vx/built-in.a
AR sound/pcmcia/pdaudiocf/built-in.a
AR sound/pcmcia/built-in.a
AR sound/mips/built-in.a
CC drivers/gpu/drm/i915/i915_drm_client.o
CC net/ethtool/cabletest.o
AR sound/soc/built-in.a
AR sound/atmel/built-in.a
CC sound/hda/hda_bus_type.o
CC drivers/acpi/acpica/exnames.o
CC drivers/tty/serial/8250/8250_pci.o
CC drivers/char/nvram.o
CC kernel/time/posix-clock.o
CC net/wireless/radiotap.o
CC mm/list_lru.o
CC drivers/acpi/proc.o
AR sound/x86/built-in.a
CC kernel/trace/trace_output.o
CC drivers/tty/tty_ioctl.o
CC arch/x86/kernel/cpu/zhaoxin.o
CC drivers/pci/pci-label.o
AR net/ipv6/netfilter/built-in.a
CC drivers/tty/serial/8250/8250_pericom.o
CC kernel/events/ring_buffer.o
CC net/sunrpc/auth_gss/gss_mech_switch.o
AR net/packet/built-in.a
CC net/mac80211/aead_api.o
CC drivers/acpi/acpica/exoparg1.o
CC crypto/sha256_generic.o
CC drivers/gpu/drm/ttm/ttm_module.o
CC net/ipv4/inet_connection_sock.o
CC sound/hda/hdac_bus.o
CC lib/earlycpio.o
CC net/ipv4/tcp.o
CC io_uring/waitid.o
CC net/ipv4/tcp_input.o
CC fs/lockd/host.o
CC lib/extable.o
CC net/xfrm/xfrm_algo.o
CC net/netlabel/netlabel_domainhash.o
CC sound/hda/hdac_device.o
CC drivers/tty/tty_ldisc.o
CC block/blk-rq-qos.o
CC arch/x86/kernel/cpu/vortex.o
AR fs/netfs/built-in.a
CC fs/ext4/fsync.o
CC kernel/events/callchain.o
CC kernel/cgroup/freezer.o
CC block/disk-events.o
CC net/netfilter/nf_conntrack_proto_generic.o
CC lib/flex_proportions.o
AR drivers/char/built-in.a
CC net/sunrpc/auth_gss/svcauth_gss.o
CC mm/workingset.o
CC sound/hda/hdac_sysfs.o
CC drivers/acpi/acpica/exoparg2.o
CC kernel/cpu.o
CC kernel/time/itimer.o
CC net/ipv6/ip6_input.o
CC arch/x86/kernel/cpu/perfctr-watchdog.o
CC mm/debug.o
CC drivers/gpu/drm/ttm/ttm_execbuf_util.o
CC mm/gup.o
CC fs/ext4/hash.o
CC drivers/pci/vgaarb.o
CC net/netfilter/nf_conntrack_proto_tcp.o
CC net/ethtool/tunnels.o
CC crypto/sha512_generic.o
CC drivers/gpu/drm/i915/i915_getparam.o
CC drivers/gpu/drm/i915/i915_ioctl.o
AR drivers/gpu/drm/omapdrm/built-in.a
CC block/blk-ia-ranges.o
CC net/wireless/util.o
CC net/core/rtnetlink.o
CC lib/idr.o
CC net/sunrpc/auth_gss/gss_rpc_upcall.o
CC drivers/acpi/acpica/exoparg3.o
AR drivers/tty/serial/8250/built-in.a
CC fs/nls/nls_base.o
AR drivers/tty/serial/built-in.a
CC fs/lockd/svc.o
CC io_uring/register.o
AR fs/unicode/built-in.a
CC drivers/gpu/drm/display/drm_dp_mst_topology.o
CC drivers/tty/tty_buffer.o
CC net/ipv4/tcp_output.o
CC fs/nfs/getroot.o
CC crypto/sha3_generic.o
CC net/sunrpc/auth_gss/gss_rpc_xdr.o
CC drivers/acpi/acpica/exoparg6.o
CC arch/x86/kernel/cpu/vmware.o
CC drivers/gpu/drm/ttm/ttm_range_manager.o
CC net/xfrm/xfrm_user.o
CC arch/x86/kernel/signal_32.o
CC kernel/trace/trace_seq.o
CC net/wireless/reg.o
CC io_uring/truncate.o
CC kernel/cgroup/legacy_freezer.o
CC sound/hda/hdac_regmap.o
CC fs/ext4/ialloc.o
CC lib/iomem_copy.o
CC lib/irq_regs.o
CC fs/nls/nls_cp437.o
CC drivers/connector/cn_queue.o
AR sound/xen/built-in.a
CC kernel/time/clockevents.o
CC kernel/exit.o
CC block/early-lookup.o
CC net/sunrpc/clnt.o
CC drivers/tty/tty_port.o
CC fs/nls/nls_ascii.o
CC drivers/acpi/acpica/exprep.o
CC kernel/cgroup/pids.o
CC lib/is_single_threaded.o
CC net/netlabel/netlabel_addrlist.o
CC crypto/ecb.o
CC drivers/gpu/drm/i915/i915_irq.o
CC kernel/time/tick-common.o
AR drivers/pci/built-in.a
CC arch/x86/kernel/cpu/hypervisor.o
CC net/ipv4/tcp_timer.o
CC kernel/trace/trace_stat.o
CC net/ethtool/fec.o
CC net/wireless/scan.o
CC fs/nls/nls_iso8859-1.o
CC drivers/acpi/acpica/exregion.o
CC fs/nls/nls_utf8.o
CC drivers/gpu/drm/ttm/ttm_resource.o
CC drivers/gpu/drm/ttm/ttm_pool.o
CC lib/klist.o
CC io_uring/memmap.o
CC drivers/acpi/bus.o
CC arch/x86/kernel/cpu/mshyperv.o
CC drivers/acpi/glue.o
CC crypto/cbc.o
CC net/rfkill/core.o
CC net/ipv6/addrconf.o
CC fs/lockd/svclock.o
CC net/9p/mod.o
CC fs/nfs/inode.o
CC sound/hda/hdac_controller.o
CC block/bounce.o
CC net/dns_resolver/dns_key.o
CC kernel/cgroup/rdma.o
CC drivers/tty/tty_mutex.o
CC net/rfkill/input.o
CC lib/kobject.o
AR fs/nls/built-in.a
CC fs/nfs/super.o
CC drivers/acpi/acpica/exresnte.o
CC fs/lockd/svcshare.o
CC net/sunrpc/auth_gss/trace.o
CC net/netfilter/nf_conntrack_proto_udp.o
CC kernel/trace/trace_printk.o
CC drivers/connector/connector.o
CC crypto/ctr.o
CC io_uring/alloc_cache.o
CC mm/mmap_lock.o
CC net/sunrpc/xprt.o
CC kernel/time/tick-broadcast.o
CC net/9p/client.o
CC drivers/acpi/acpica/exresolv.o
CC drivers/gpu/drm/display/drm_dsc_helper.o
CC net/netlabel/netlabel_mgmt.o
CC net/dns_resolver/dns_query.o
CC drivers/tty/tty_ldsem.o
CC net/9p/error.o
CC net/ethtool/eeprom.o
CC net/wireless/nl80211.o
CC net/mac80211/wpa.o
CC kernel/cgroup/cpuset.o
CC net/sunrpc/socklib.o
CC lib/kobject_uevent.o
CC drivers/gpu/drm/i915/i915_mitigations.o
CC arch/x86/kernel/cpu/debugfs.o
CC sound/hda/hdac_stream.o
CC crypto/gcm.o
AR net/rfkill/built-in.a
CC kernel/events/hw_breakpoint.o
AR drivers/gpu/drm/tilcdc/built-in.a
CC io_uring/io-wq.o
CC drivers/acpi/acpica/exresop.o
CC drivers/gpu/drm/ttm/ttm_device.o
CC block/bsg.o
CC kernel/softirq.o
CC fs/autofs/init.o
CC kernel/trace/pid_list.o
CC fs/autofs/inode.o
CC net/ipv6/addrlabel.o
CC kernel/cgroup/misc.o
CC kernel/time/tick-broadcast-hrtimer.o
CC crypto/ccm.o
CC fs/ext4/indirect.o
CC mm/highmem.o
CC drivers/connector/cn_proc.o
CC drivers/tty/tty_baudrate.o
CC drivers/acpi/acpica/exserial.o
CC fs/lockd/svcproc.o
CC arch/x86/kernel/cpu/bus_lock.o
AR net/dns_resolver/built-in.a
CC kernel/time/tick-oneshot.o
CC net/netfilter/nf_conntrack_proto_icmp.o
CC net/sunrpc/auth_gss/gss_krb5_mech.o
CC drivers/gpu/drm/virtio/virtgpu_drv.o
AR net/xfrm/built-in.a
CC kernel/cgroup/debug.o
CC arch/x86/kernel/traps.o
CC drivers/gpu/drm/i915/i915_module.o
CC drivers/gpu/drm/display/drm_hdcp_helper.o
CC drivers/gpu/drm/ttm/ttm_sys_manager.o
CC sound/hda/array.o
CC fs/lockd/svcsubs.o
CC block/blk-cgroup.o
CC net/ethtool/stats.o
CC drivers/acpi/acpica/exstore.o
CC net/handshake/alert.o
CC kernel/time/tick-sched.o
CC drivers/tty/tty_jobctrl.o
CC crypto/aes_generic.o
CC drivers/gpu/drm/ttm/ttm_backup.o
CC lib/logic_pio.o
CC net/mac80211/scan.o
CC net/netlabel/netlabel_unlabeled.o
CC fs/nfs/io.o
CC kernel/trace/trace_sched_switch.o
CC fs/autofs/root.o
CC net/core/utils.o
CC kernel/events/uprobes.o
CC net/ipv6/route.o
CC drivers/acpi/acpica/exstoren.o
CC net/9p/protocol.o
CC mm/memory.o
CC drivers/gpu/drm/virtio/virtgpu_kms.o
CC drivers/base/power/sysfs.o
CC drivers/gpu/drm/virtio/virtgpu_gem.o
CC io_uring/futex.o
CC arch/x86/kernel/cpu/capflags.o
AR arch/x86/kernel/cpu/built-in.a
CC kernel/time/timer_migration.o
CC net/core/link_watch.o
CC drivers/base/firmware_loader/builtin/main.o
CC drivers/base/power/generic_ops.o
CC net/handshake/genl.o
CC sound/hda/hdmi_chmap.o
AR drivers/connector/built-in.a
AR sound/virtio/built-in.a
CC drivers/acpi/scan.o
CC net/ipv4/tcp_ipv4.o
CC drivers/gpu/drm/display/drm_hdmi_helper.o
CC crypto/authenc.o
CC drivers/gpu/drm/display/drm_scdc_helper.o
CC lib/maple_tree.o
CC drivers/acpi/acpica/exstorob.o
CC net/mac80211/offchannel.o
CC drivers/tty/n_null.o
CC net/sunrpc/auth_gss/gss_krb5_seal.o
CC net/netlabel/netlabel_cipso_v4.o
CC drivers/gpu/drm/ttm/ttm_agp_backend.o
CC net/devres.o
AR drivers/base/firmware_loader/builtin/built-in.a
CC drivers/base/firmware_loader/main.o
CC sound/sound_core.o
CC net/netfilter/nf_conntrack_extend.o
CC arch/x86/kernel/idt.o
CC drivers/gpu/drm/i915/i915_params.o
AR kernel/cgroup/built-in.a
CC drivers/acpi/acpica/exsystem.o
CC sound/last.o
CC drivers/base/power/common.o
CC fs/autofs/symlink.o
CC drivers/base/power/qos.o
CC drivers/base/power/runtime.o
CC mm/mincore.o
CC fs/lockd/mon.o
CC net/ethtool/phc_vclocks.o
CC net/9p/trans_common.o
CC fs/nfs/direct.o
CC fs/ext4/inline.o
CC net/ipv6/ip6_fib.o
CC drivers/gpu/drm/virtio/virtgpu_vram.o
CC drivers/base/power/wakeirq.o
CC drivers/acpi/mipi-disco-img.o
CC kernel/trace/trace_nop.o
CC drivers/acpi/resource.o
CC drivers/tty/pty.o
CC net/handshake/netlink.o
CC drivers/acpi/acpica/extrace.o
CC net/netfilter/nf_conntrack_acct.o
CC io_uring/napi.o
CC net/ipv4/tcp_minisocks.o
CC block/blk-ioprio.o
AR drivers/gpu/drm/ttm/built-in.a
CC fs/9p/vfs_super.o
AR drivers/gpu/drm/display/built-in.a
CC net/ipv4/tcp_cong.o
CC sound/hda/trace.o
CC drivers/block/loop.o
CC crypto/authencesn.o
CC net/sunrpc/auth_gss/gss_krb5_unseal.o
CC net/core/filter.o
CC arch/x86/kernel/irq.o
CC net/9p/trans_fd.o
CC drivers/acpi/acpica/exutils.o
CC fs/autofs/waitq.o
CC arch/x86/kernel/irq_32.o
CC fs/9p/vfs_inode.o
CC drivers/base/regmap/regmap.o
AR drivers/gpu/drm/imx/built-in.a
CC sound/hda/hdac_component.o
CC drivers/gpu/drm/i915/i915_pci.o
AR drivers/base/firmware_loader/built-in.a
CC kernel/time/vsyscall.o
CC fs/ext4/inode.o
AR fs/hostfs/built-in.a
CC drivers/gpu/drm/virtio/virtgpu_display.o
CC lib/memcat_p.o
CC drivers/misc/eeprom/eeprom_93cx6.o
CC kernel/trace/blktrace.o
AR drivers/mfd/built-in.a
CC net/netlabel/netlabel_calipso.o
CC lib/nmi_backtrace.o
CC net/ethtool/mm.o
CC lib/objpool.o
AR kernel/events/built-in.a
CC crypto/lzo.o
CC drivers/tty/tty_audit.o
CC drivers/acpi/acpica/hwacpi.o
CC drivers/gpu/drm/virtio/virtgpu_vq.o
CC block/blk-iolatency.o
AR drivers/gpu/drm/panel/built-in.a
CC fs/ext4/ioctl.o
CC fs/autofs/expire.o
CC net/ethtool/module.o
CC drivers/base/power/main.o
CC fs/lockd/trace.o
CC kernel/time/timekeeping_debug.o
CC kernel/time/namespace.o
CC net/mac80211/ht.o
CC net/netfilter/nf_conntrack_seqadj.o
AR drivers/misc/eeprom/built-in.a
CC net/handshake/request.o
AR drivers/misc/cb710/built-in.a
CC drivers/acpi/acpica/hwesleep.o
AR drivers/misc/lis3lv02d/built-in.a
AR drivers/misc/cardreader/built-in.a
AR drivers/misc/keba/built-in.a
AR drivers/misc/built-in.a
CC net/netfilter/nf_conntrack_proto_icmpv6.o
CC drivers/acpi/acpica/hwgpe.o
CC fs/ext4/mballoc.o
CC sound/hda/hdac_i915.o
CC net/ipv6/ipv6_sockglue.o
CC crypto/lzo-rle.o
CC kernel/resource.o
CC net/sunrpc/auth_gss/gss_krb5_wrap.o
CC kernel/sysctl.o
CC kernel/capability.o
CC drivers/block/virtio_blk.o
AR io_uring/built-in.a
CC kernel/trace/trace_events.o
CC drivers/acpi/acpica/hwregs.o
CC sound/hda/intel-dsp-config.o
CC drivers/tty/sysrq.o
CC drivers/gpu/drm/i915/i915_scatterlist.o
CC fs/9p/vfs_inode_dotl.o
CC net/core/sock_diag.o
CC fs/debugfs/inode.o
CC net/9p/trans_virtio.o
AR drivers/base/test/built-in.a
CC lib/plist.o
AR drivers/nfc/built-in.a
CC fs/tracefs/inode.o
AR kernel/time/built-in.a
CC drivers/base/regmap/regcache.o
CC drivers/base/power/wakeup.o
CC arch/x86/kernel/dumpstack_32.o
CC net/netfilter/nf_conntrack_netlink.o
CC net/socket.o
AR net/netlabel/built-in.a
CC fs/autofs/dev-ioctl.o
CC drivers/base/component.o
CC sound/hda/intel-nhlt.o
CC crypto/rng.o
CC fs/nfs/pagelist.o
CC fs/tracefs/event_inode.o
CC drivers/acpi/acpica/hwsleep.o
CC fs/nfs/read.o
CC net/ethtool/cmis_fw_update.o
CC drivers/gpu/drm/virtio/virtgpu_fence.o
CC fs/lockd/xdr.o
CC block/blk-iocost.o
CC net/ipv4/tcp_metrics.o
CC block/mq-deadline.o
CC fs/lockd/clnt4xdr.o
AR drivers/dax/hmem/built-in.a
CC drivers/gpu/drm/i915/i915_switcheroo.o
AR drivers/dax/built-in.a
CC drivers/base/core.o
CC drivers/acpi/acpica/hwvalid.o
CC net/sunrpc/auth_gss/gss_krb5_crypto.o
CC sound/hda/intel-sdw-acpi.o
CC drivers/dma-buf/dma-buf.o
CC arch/x86/kernel/time.o
CC net/handshake/tlshd.o
CC arch/x86/kernel/ioport.o
CC net/sunrpc/auth_gss/gss_krb5_keys.o
AR drivers/tty/built-in.a
CC drivers/gpu/drm/virtio/virtgpu_object.o
CC mm/mlock.o
CC lib/radix-tree.o
CC fs/nfs/symlink.o
CC fs/9p/vfs_addr.o
CC fs/debugfs/file.o
AR drivers/block/built-in.a
CC fs/ext4/migrate.o
CC [M] fs/efivarfs/inode.o
CC kernel/ptrace.o
CC crypto/drbg.o
AR fs/autofs/built-in.a
CC crypto/jitterentropy.o
CC mm/mmap.o
CC drivers/acpi/acpica/hwxface.o
CC mm/mmu_gather.o
CC drivers/gpu/drm/i915/i915_sysfs.o
CC drivers/acpi/acpi_processor.o
AR fs/tracefs/built-in.a
CC net/handshake/trace.o
AR drivers/gpu/drm/bridge/analogix/built-in.a
AR drivers/gpu/drm/bridge/cadence/built-in.a
AR sound/hda/built-in.a
AR drivers/gpu/drm/bridge/imx/built-in.a
AR sound/built-in.a
AR net/9p/built-in.a
AR drivers/gpu/drm/bridge/synopsys/built-in.a
CC net/wireless/mlme.o
AR drivers/gpu/drm/bridge/built-in.a
CC [M] fs/efivarfs/file.o
CC net/netfilter/nf_conntrack_ftp.o
CC drivers/dma-buf/dma-fence.o
CC drivers/base/power/wakeup_stats.o
CC drivers/base/regmap/regcache-rbtree.o
CC lib/ratelimit.o
CC net/ipv6/ndisc.o
CC net/ethtool/cmis_cdb.o
CC net/mac80211/agg-tx.o
CC drivers/acpi/acpica/hwxfsleep.o
CC fs/lockd/xdr4.o
CC fs/ext4/mmp.o
CC block/kyber-iosched.o
CC net/sunrpc/xprtsock.o
CC arch/x86/kernel/dumpstack.o
CC drivers/gpu/drm/virtio/virtgpu_debugfs.o
CC drivers/base/power/trace.o
CC fs/9p/vfs_file.o
CC fs/nfs/unlink.o
CC lib/rbtree.o
AR drivers/gpu/drm/hisilicon/built-in.a
CC net/wireless/ibss.o
CC net/mac80211/agg-rx.o
CC drivers/acpi/acpica/hwpci.o
CC net/netfilter/nf_conntrack_irc.o
CC [M] fs/efivarfs/super.o
CC lib/seq_buf.o
CC lib/siphash.o
AR drivers/cxl/core/built-in.a
AR drivers/cxl/built-in.a
CC net/ipv4/tcp_fastopen.o
CC crypto/jitterentropy-kcapi.o
CC net/sunrpc/sched.o
AR drivers/gpu/drm/mxsfb/built-in.a
CC net/sysctl_net.o
CC drivers/dma-buf/dma-fence-array.o
AR fs/debugfs/built-in.a
AR net/sunrpc/auth_gss/built-in.a
CC lib/string.o
CC net/ethtool/pse-pd.o
CC net/ethtool/plca.o
CC net/core/dev_ioctl.o
CC drivers/gpu/drm/i915/i915_utils.o
CC kernel/trace/trace_export.o
CC drivers/base/regmap/regcache-flat.o
CC block/blk-mq-debugfs.o
CC net/mac80211/vht.o
CC net/netfilter/nf_conntrack_sip.o
CC drivers/acpi/acpica/nsaccess.o
CC [M] fs/efivarfs/vars.o
CC fs/9p/vfs_dir.o
CC drivers/gpu/drm/virtio/virtgpu_plane.o
CC mm/mprotect.o
CC arch/x86/kernel/nmi.o
CC net/sunrpc/auth.o
AR drivers/base/power/built-in.a
CC fs/lockd/svc4proc.o
CC net/ethtool/phy.o
CC crypto/ghash-generic.o
AR drivers/gpu/drm/tiny/built-in.a
CC drivers/acpi/processor_core.o
CC net/core/tso.o
CC crypto/hash_info.o
CC kernel/trace/trace_event_perf.o
CC kernel/trace/trace_events_filter.o
CC mm/mremap.o
CC drivers/dma-buf/dma-fence-chain.o
AR net/handshake/built-in.a
CC net/netfilter/nf_nat_core.o
CC drivers/acpi/acpica/nsalloc.o
CC net/ipv4/tcp_rate.o
CC drivers/base/regmap/regcache-maple.o
CC net/ipv4/tcp_recovery.o
CC net/ipv4/tcp_ulp.o
CC fs/nfs/write.o
CC crypto/rsapubkey.asn1.o
CC crypto/rsaprivkey.asn1.o
CC net/sunrpc/auth_null.o
CC drivers/dma-buf/dma-fence-unwrap.o
AR crypto/built-in.a
CC drivers/gpu/drm/i915/intel_clock_gating.o
CC fs/open.o
CC fs/9p/vfs_dentry.o
LD [M] fs/efivarfs/efivarfs.o
CC fs/ext4/move_extent.o
CC drivers/acpi/processor_pdc.o
CC arch/x86/kernel/ldt.o
CC drivers/acpi/acpica/nsarguments.o
CC block/blk-pm.o
CC net/mac80211/he.o
CC lib/timerqueue.o
CC mm/msync.o
CC net/mac80211/s1g.o
CC net/sunrpc/auth_tls.o
CC drivers/gpu/drm/virtio/virtgpu_ioctl.o
AR drivers/gpu/drm/xlnx/built-in.a
CC drivers/gpu/drm/i915/intel_cpu_info.o
CC arch/x86/kernel/setup.o
CC lib/union_find.o
CC fs/nfs/namespace.o
CC net/mac80211/ibss.o
CC lib/vsprintf.o
CC kernel/trace/trace_events_trigger.o
CC drivers/base/regmap/regmap-debugfs.o
CC net/wireless/sme.o
CC kernel/user.o
CC drivers/acpi/acpica/nsconvert.o
CC mm/page_vma_mapped.o
CC net/netfilter/nf_nat_proto.o
CC drivers/dma-buf/dma-resv.o
CC net/ethtool/tsconfig.o
CC net/netfilter/nf_nat_helper.o
CC net/wireless/chan.o
CC fs/read_write.o
CC fs/lockd/procfs.o
CC drivers/acpi/acpica/nsdump.o
CC net/ipv6/udp.o
CC fs/9p/v9fs.o
CC block/holder.o
CC fs/ext4/namei.o
CC net/sunrpc/auth_unix.o
CC fs/nfs/mount_clnt.o
CC kernel/trace/trace_eprobe.o
CC kernel/trace/trace_kprobe.o
CC lib/win_minmax.o
CC drivers/macintosh/mac_hid.o
CC arch/x86/kernel/x86_init.o
CC mm/pagewalk.o
CC fs/nfs/nfstrace.o
CC net/ipv4/tcp_offload.o
CC drivers/gpu/drm/virtio/virtgpu_prime.o
CC drivers/acpi/acpica/nseval.o
AR drivers/gpu/drm/gud/built-in.a
CC drivers/acpi/ec.o
CC drivers/dma-buf/sync_file.o
CC arch/x86/kernel/i8259.o
AR drivers/scsi/pcmcia/built-in.a
CC drivers/scsi/scsi.o
AR drivers/base/regmap/built-in.a
CC drivers/base/bus.o
CC drivers/gpu/drm/i915/intel_device_info.o
CC lib/xarray.o
CC drivers/base/dd.o
AR drivers/nvme/common/built-in.a
AR drivers/nvme/host/built-in.a
CC fs/9p/fid.o
AR drivers/nvme/target/built-in.a
AR drivers/nvme/built-in.a
CC kernel/trace/error_report-traces.o
CC net/ipv4/tcp_plb.o
AR fs/lockd/built-in.a
CC net/sunrpc/svc.o
CC kernel/trace/power-traces.o
CC drivers/scsi/hosts.o
CC net/wireless/ethtool.o
AR block/built-in.a
CC drivers/acpi/dock.o
CC drivers/acpi/acpica/nsinit.o
CC fs/9p/xattr.o
CC fs/file_table.o
CC kernel/trace/rpm-traces.o
AR drivers/macintosh/built-in.a
CC mm/pgtable-generic.o
CC drivers/gpu/drm/virtio/virtgpu_trace_points.o
CC net/mac80211/iface.o
CC lib/lockref.o
AR net/ethtool/built-in.a
CC net/netfilter/nf_nat_masquerade.o
AR drivers/dma-buf/built-in.a
CC arch/x86/kernel/irqinit.o
CC fs/ext4/page-io.o
AR drivers/gpu/drm/solomon/built-in.a
CC drivers/scsi/scsi_ioctl.o
CC drivers/acpi/acpica/nsload.o
CC net/netfilter/nf_nat_ftp.o
CC net/core/sock_reuseport.o
CC net/core/fib_notifier.o
CC kernel/trace/trace_dynevent.o
CC net/ipv6/udplite.o
CC net/mac80211/link.o
CC net/wireless/mesh.o
CC drivers/acpi/acpica/nsnames.o
CC net/ipv4/datagram.o
CC net/ipv6/raw.o
CC drivers/base/syscore.o
CC arch/x86/kernel/jump_label.o
AR fs/9p/built-in.a
CC drivers/gpu/drm/i915/intel_memory_region.o
CC kernel/signal.o
CC mm/rmap.o
CC drivers/ata/libata-core.o
CC kernel/sys.o
AR drivers/net/phy/mediatek/built-in.a
AR drivers/net/phy/qcom/built-in.a
CC drivers/net/phy/realtek/realtek_main.o
CC mm/vmalloc.o
CC drivers/scsi/scsicam.o
CC drivers/gpu/drm/virtio/virtgpu_submit.o
CC drivers/base/driver.o
CC drivers/net/phy/mdio-boardinfo.o
CC fs/ext4/readpage.o
CC kernel/umh.o
CC drivers/acpi/acpica/nsobject.o
CC kernel/workqueue.o
CC net/core/xdp.o
CC fs/super.o
CC drivers/base/class.o
CC drivers/base/platform.o
CC net/mac80211/rate.o
CC drivers/base/cpu.o
CC arch/x86/kernel/irq_work.o
CC drivers/gpu/drm/i915/intel_pcode.o
CC drivers/acpi/pci_root.o
CC net/wireless/ap.o
CC net/ipv4/raw.o
CC drivers/firewire/init_ohci1394_dma.o
CC drivers/cdrom/cdrom.o
CC drivers/acpi/acpica/nsparse.o
CC net/mac80211/michael.o
CC drivers/net/phy/realtek/realtek_hwmon.o
CC kernel/trace/trace_probe.o
CC [M] drivers/gpu/drm/scheduler/sched_main.o
CC lib/bcd.o
CC lib/sort.o
CC drivers/scsi/scsi_error.o
CC net/netfilter/nf_nat_irc.o
CC [M] drivers/gpu/drm/scheduler/sched_fence.o
CC drivers/net/phy/stubs.o
CC lib/parser.o
AR drivers/gpu/drm/virtio/built-in.a
CC net/sunrpc/svcsock.o
AR drivers/net/pse-pd/built-in.a
CC arch/x86/kernel/probe_roms.o
CC [M] drivers/gpu/drm/scheduler/sched_entity.o
AR drivers/auxdisplay/built-in.a
CC drivers/acpi/pci_link.o
CC drivers/net/mdio/acpi_mdio.o
CC arch/x86/kernel/sys_ia32.o
CC drivers/scsi/scsi_lib.o
CC drivers/acpi/acpica/nspredef.o
CC fs/nfs/export.o
CC net/sunrpc/svcauth.o
CC net/ipv6/icmp.o
CC drivers/scsi/constants.o
AR drivers/firewire/built-in.a
CC kernel/trace/trace_uprobe.o
CC drivers/gpu/drm/i915/intel_region_ttm.o
CC lib/debug_locks.o
AR drivers/net/pcs/built-in.a
CC net/mac80211/tkip.o
CC arch/x86/kernel/ksysfs.o
CC mm/vma.o
CC drivers/base/firmware.o
CC drivers/acpi/acpica/nsprepkg.o
CC drivers/net/phy/mdio_devres.o
CC fs/ext4/resize.o
CC lib/random32.o
CC drivers/net/mdio/fwnode_mdio.o
AR drivers/net/phy/realtek/built-in.a
CC net/sunrpc/svcauth_unix.o
CC fs/nfs/sysfs.o
CC kernel/trace/rethook.o
CC net/wireless/trace.o
CC drivers/scsi/scsi_lib_dma.o
CC net/core/flow_offload.o
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
CC drivers/gpu/drm/i915/intel_runtime_pm.o
CC drivers/base/init.o
CC drivers/gpu/drm/drm_atomic.o
CC fs/char_dev.o
CC fs/stat.o
CC fs/nfs/fs_context.o
AR drivers/net/ethernet/3com/built-in.a
CC net/ipv6/mcast.o
GEN xe_wa_oob.c xe_wa_oob.h
CC [M] drivers/gpu/drm/xe/xe_bb.o
CC drivers/net/ethernet/8390/ne2k-pci.o
CC drivers/acpi/acpica/nsrepair.o
CC drivers/ata/libata-scsi.o
CC lib/bust_spinlocks.o
CC net/wireless/ocb.o
CC net/netfilter/nf_nat_sip.o
CC arch/x86/kernel/bootflag.o
LD [M] drivers/gpu/drm/scheduler/gpu-sched.o
CC fs/exec.o
CC drivers/gpu/drm/i915/intel_sbi.o
CC net/ipv4/udp.o
CC drivers/net/phy/phy.o
CC net/netfilter/x_tables.o
CC net/core/gro.o
CC drivers/acpi/acpica/nsrepair2.o
CC net/wireless/pmsr.o
CC lib/kasprintf.o
AR drivers/cdrom/built-in.a
CC kernel/pid.o
AR drivers/net/ethernet/adaptec/built-in.a
AR drivers/net/wireless/admtek/built-in.a
AR drivers/net/wireless/ath/built-in.a
CC drivers/base/map.o
AR drivers/net/wireless/atmel/built-in.a
AR drivers/net/wireless/broadcom/built-in.a
AR drivers/net/usb/built-in.a
CC fs/ext4/super.o
AR drivers/net/wireless/intel/built-in.a
AR drivers/net/mdio/built-in.a
CC drivers/gpu/drm/drm_atomic_uapi.o
AR drivers/net/wireless/intersil/built-in.a
AR drivers/net/wireless/marvell/built-in.a
AR drivers/net/wireless/mediatek/built-in.a
CC drivers/acpi/acpica/nssearch.o
AR drivers/net/wireless/microchip/built-in.a
CC fs/nfs/nfsroot.o
AR drivers/net/wireless/purelifi/built-in.a
AR drivers/net/wireless/quantenna/built-in.a
AR drivers/net/wireless/ralink/built-in.a
CC drivers/acpi/acpica/nsutils.o
CC drivers/net/mii.o
AR drivers/net/wireless/realtek/built-in.a
CC arch/x86/kernel/e820.o
AR drivers/net/wireless/rsi/built-in.a
CC lib/bitmap.o
CC drivers/net/loopback.o
AR drivers/net/wireless/silabs/built-in.a
CC [M] drivers/gpu/drm/xe/xe_bo.o
AR drivers/net/wireless/st/built-in.a
CC drivers/net/netconsole.o
CC mm/process_vm_access.o
AR drivers/net/wireless/ti/built-in.a
AR drivers/net/wireless/zydas/built-in.a
AR drivers/net/ethernet/agere/built-in.a
AR drivers/net/wireless/virtual/built-in.a
CC fs/nfs/sysctl.o
AR drivers/net/wireless/built-in.a
CC arch/x86/kernel/pci-dma.o
CC drivers/acpi/pci_irq.o
CC drivers/gpu/drm/drm_auth.o
CC drivers/acpi/acpica/nswalk.o
CC drivers/base/devres.o
CC drivers/scsi/scsi_scan.o
CC drivers/net/ethernet/8390/8390.o
CC drivers/acpi/acpi_apd.o
CC drivers/net/phy/phy-c45.o
CC drivers/ata/libata-eh.o
CC [M] drivers/gpu/drm/xe/xe_bo_evict.o
CC net/mac80211/aes_cmac.o
AR kernel/trace/built-in.a
CC net/ipv4/udplite.o
CC net/netfilter/xt_tcpudp.o
CC drivers/gpu/drm/i915/intel_step.o
CC net/core/netdev-genl.o
CC drivers/acpi/acpica/nsxfeval.o
CC net/sunrpc/addr.o
CC net/ipv6/reassembly.o
CC fs/nfs/nfs3super.o
CC drivers/net/phy/phy-core.o
CC fs/pipe.o
CC drivers/ata/libata-transport.o
CC lib/scatterlist.o
CC drivers/base/attribute_container.o
CC mm/page_alloc.o
CC drivers/net/virtio_net.o
CC fs/nfs/nfs3client.o
CC kernel/task_work.o
GEN net/wireless/shipped-certs.c
CC fs/ext4/symlink.o
CC fs/namei.o
AR drivers/net/ethernet/alacritech/built-in.a
CC net/ipv6/tcp_ipv6.o
CC drivers/acpi/acpica/nsxfname.o
CC drivers/acpi/acpica/nsxfobj.o
CC arch/x86/kernel/quirks.o
CC drivers/pcmcia/cs.o
CC fs/ext4/sysfs.o
CC lib/list_sort.o
CC net/core/netdev-genl-gen.o
CC lib/uuid.o
CC [M] drivers/gpu/drm/xe/xe_devcoredump.o
CC drivers/pcmcia/socket_sysfs.o
CC drivers/acpi/acpi_platform.o
CC net/netfilter/xt_CONNSECMARK.o
CC arch/x86/kernel/kdebugfs.o
CC drivers/gpu/drm/i915/intel_uncore.o
AR drivers/net/ethernet/alteon/built-in.a
CC [M] drivers/gpu/drm/xe/xe_device.o
CC drivers/base/transport_class.o
CC net/netfilter/xt_NFLOG.o
CC fs/fcntl.o
AR drivers/net/ethernet/8390/built-in.a
CC net/sunrpc/rpcb_clnt.o
AR drivers/net/ethernet/amazon/built-in.a
CC net/core/gso.o
AR drivers/net/ethernet/amd/built-in.a
AR drivers/net/ethernet/aquantia/built-in.a
CC net/mac80211/aes_gmac.o
CC drivers/pcmcia/cardbus.o
AR drivers/net/ethernet/arc/built-in.a
AR drivers/net/ethernet/asix/built-in.a
CC net/netfilter/xt_SECMARK.o
AR drivers/net/ethernet/atheros/built-in.a
AR drivers/net/ethernet/cadence/built-in.a
CC drivers/net/ethernet/broadcom/bnx2.o
CC drivers/net/ethernet/broadcom/tg3.o
CC drivers/acpi/acpica/psargs.o
GEN drivers/scsi/scsi_devinfo_tbl.c
CC drivers/scsi/scsi_devinfo.o
CC fs/nfs/nfs3proc.o
CC drivers/acpi/acpi_pnp.o
CC kernel/extable.o
CC mm/page_frag_cache.o
CC fs/nfs/nfs3xdr.o
CC drivers/base/topology.o
CC fs/ext4/xattr.o
CC mm/init-mm.o
CC drivers/net/phy/phy_device.o
CC kernel/params.o
CC drivers/acpi/power.o
CC drivers/net/phy/linkmode.o
CC arch/x86/kernel/alternative.o
CC arch/x86/kernel/i8253.o
CC arch/x86/kernel/hw_breakpoint.o
CC [M] drivers/gpu/drm/xe/xe_device_sysfs.o
CC arch/x86/kernel/tsc.o
CC net/mac80211/fils_aead.o
CC drivers/acpi/acpica/psloop.o
CC lib/iov_iter.o
CC drivers/acpi/acpica/psobject.o
CC drivers/gpu/drm/drm_blend.o
CC drivers/scsi/scsi_sysctl.o
CC net/sunrpc/timer.o
CC drivers/ata/libata-trace.o
CC mm/memblock.o
CC drivers/pcmcia/ds.o
CC lib/clz_ctz.o
CC drivers/usb/common/common.o
CC net/ipv4/udp_offload.o
CC drivers/usb/core/usb.o
CC drivers/usb/core/hub.o
AR drivers/usb/phy/built-in.a
CC net/netfilter/xt_TCPMSS.o
CC drivers/usb/core/hcd.o
CC drivers/net/phy/phy_link_topology.o
CC drivers/net/phy/mdio_bus.o
CC drivers/base/container.o
CC drivers/net/net_failover.o
CC net/sunrpc/xdr.o
CC drivers/usb/core/urb.o
CC net/netfilter/xt_conntrack.o
CC drivers/acpi/acpica/psopcode.o
CC kernel/kthread.o
CC net/core/net-sysfs.o
CC drivers/usb/core/message.o
CC drivers/ata/libata-sata.o
CC drivers/usb/mon/mon_main.o
CC drivers/pcmcia/pcmcia_resource.o
CC drivers/scsi/scsi_proc.o
CC drivers/base/property.o
CC [M] drivers/gpu/drm/xe/xe_dma_buf.o
CC drivers/usb/mon/mon_stat.o
CC drivers/usb/mon/mon_text.o
CC drivers/pcmcia/cistpl.o
CC lib/bsearch.o
CC drivers/acpi/acpica/psopinfo.o
CC drivers/usb/common/debug.o
CC net/ipv6/ping.o
CC net/sunrpc/sunrpc_syms.o
AR drivers/usb/common/built-in.a
CC drivers/net/phy/mdio_device.o
CC drivers/usb/core/driver.o
CC mm/slub.o
CC arch/x86/kernel/tsc_msr.o
CC drivers/base/cacheinfo.o
CC net/mac80211/cfg.o
CC drivers/acpi/acpica/psparse.o
AR drivers/net/ethernet/brocade/built-in.a
CC net/mac80211/ethtool.o
CC net/core/hotdata.o
AR drivers/net/ethernet/cavium/common/built-in.a
CC fs/ext4/xattr_hurd.o
CC net/ipv4/arp.o
AR drivers/net/ethernet/cavium/thunder/built-in.a
AR drivers/net/ethernet/cavium/liquidio/built-in.a
CC drivers/acpi/event.o
AR drivers/net/ethernet/cavium/octeon/built-in.a
AR drivers/net/ethernet/cavium/built-in.a
CC fs/nfs/nfs3acl.o
CC drivers/acpi/acpica/psscope.o
CC kernel/sys_ni.o
CC fs/ext4/xattr_trusted.o
CC drivers/scsi/scsi_debugfs.o
CC drivers/gpu/drm/i915/intel_uncore_trace.o
CC drivers/ata/libata-sff.o
CC arch/x86/kernel/io_delay.o
CC drivers/usb/mon/mon_bin.o
AR drivers/net/ethernet/chelsio/built-in.a
CC drivers/base/swnode.o
CC net/mac80211/rx.o
CC drivers/input/serio/serio.o
CC [M] drivers/gpu/drm/xe/xe_drm_client.o
CC net/core/netdev_rx_queue.o
CC [M] drivers/gpu/drm/xe/xe_eu_stall.o
CC net/netfilter/xt_policy.o
CC drivers/usb/host/pci-quirks.o
CC drivers/acpi/acpica/pstree.o
CC drivers/pcmcia/pcmcia_cis.o
CC net/sunrpc/cache.o
CC fs/ext4/xattr_user.o
CC kernel/nsproxy.o
CC net/netfilter/xt_state.o
CC drivers/gpu/drm/i915/intel_wakeref.o
CC drivers/net/phy/swphy.o
CC arch/x86/kernel/rtc.o
CC drivers/acpi/evged.o
CC net/wireless/shipped-certs.o
CC lib/find_bit.o
CC drivers/input/serio/i8042.o
CC drivers/acpi/acpica/psutils.o
CC net/ipv6/exthdrs.o
CC [M] drivers/gpu/drm/xe/xe_exec.o
AR drivers/net/ethernet/cisco/built-in.a
CC drivers/scsi/scsi_trace.o
CC drivers/input/serio/serport.o
CC [M] net/netfilter/nf_log_syslog.o
CC drivers/usb/class/usblp.o
CC arch/x86/kernel/resource.o
CC drivers/usb/storage/scsiglue.o
CC fs/ext4/fast_commit.o
AR drivers/usb/misc/built-in.a
CC mm/madvise.o
CC drivers/gpu/drm/drm_bridge.o
CC kernel/notifier.o
CC lib/llist.o
CC drivers/input/keyboard/atkbd.o
CC drivers/acpi/acpica/pswalk.o
CC lib/lwq.o
CC drivers/input/mouse/psmouse-base.o
AR drivers/input/joystick/built-in.a
CC kernel/ksysfs.o
CC drivers/pcmcia/rsrc_mgr.o
CC drivers/usb/storage/protocol.o
AS arch/x86/kernel/irqflags.o
CC drivers/base/faux.o
CC fs/nfs/nfs4proc.o
CC arch/x86/kernel/static_call.o
CC net/core/net-procfs.o
CC drivers/usb/host/ehci-hcd.o
CC lib/memweight.o
AR drivers/usb/mon/built-in.a
CC drivers/rtc/lib.o
CC drivers/net/phy/fixed_phy.o
CC lib/kfifo.o
CC drivers/acpi/acpica/psxface.o
CC drivers/input/serio/libps2.o
CC mm/page_io.o
CC kernel/cred.o
CC drivers/usb/early/ehci-dbgp.o
CC drivers/scsi/scsi_logging.o
CC net/sunrpc/rpc_pipe.o
CC fs/ext4/orphan.o
CC drivers/gpu/drm/i915/vlv_sideband.o
CC drivers/usb/storage/transport.o
CC drivers/base/auxiliary.o
CC arch/x86/kernel/process.o
CC net/ipv4/icmp.o
CC mm/swap_state.o
CC drivers/gpu/drm/drm_cache.o
CC net/sunrpc/sysfs.o
CC drivers/usb/core/config.o
CC net/mac80211/spectmgmt.o
AR drivers/usb/class/built-in.a
CC drivers/acpi/acpica/rsaddr.o
CC net/ipv6/datagram.o
CC drivers/pcmcia/rsrc_nonstatic.o
CC net/ipv6/ip6_flowlabel.o
CC [M] net/netfilter/xt_mark.o
CC [M] drivers/gpu/drm/xe/xe_exec_queue.o
CC [M] drivers/gpu/drm/xe/xe_execlist.o
CC fs/ioctl.o
CC [M] net/netfilter/xt_nat.o
CC drivers/rtc/class.o
CC drivers/ata/libata-pmp.o
CC fs/ext4/acl.o
AR drivers/input/keyboard/built-in.a
CC drivers/base/devtmpfs.o
CC [M] net/netfilter/xt_LOG.o
CC drivers/acpi/acpica/rscalc.o
AR drivers/input/serio/built-in.a
CC drivers/usb/host/ehci-pci.o
CC drivers/input/mouse/synaptics.o
CC lib/percpu-refcount.o
CC drivers/scsi/scsi_pm.o
CC net/core/netpoll.o
CC drivers/pcmcia/yenta_socket.o
AR drivers/net/phy/built-in.a
CC [M] drivers/gpu/drm/xe/xe_force_wake.o
CC drivers/ata/libata-acpi.o
CC fs/ext4/xattr_security.o
CC drivers/rtc/interface.o
CC drivers/rtc/nvmem.o
AR drivers/usb/early/built-in.a
CC kernel/reboot.o
CC net/mac80211/tx.o
CC drivers/scsi/scsi_bsg.o
AR drivers/input/tablet/built-in.a
CC drivers/usb/storage/usb.o
CC net/ipv4/devinet.o
CC drivers/gpu/drm/i915/vlv_suspend.o
CC drivers/acpi/acpica/rscreate.o
CC net/sunrpc/svc_xprt.o
CC drivers/usb/host/ohci-hcd.o
CC net/ipv6/inet6_connection_sock.o
CC drivers/gpu/drm/drm_color_mgmt.o
CC fs/readdir.o
CC lib/rhashtable.o
CC arch/x86/kernel/ptrace.o
CC drivers/usb/core/file.o
CC fs/select.o
CC net/ipv4/af_inet.o
CC drivers/rtc/dev.o
CC drivers/base/module.o
CC drivers/gpu/drm/i915/soc/intel_dram.o
CC drivers/scsi/scsi_common.o
CC fs/nfs/nfs4xdr.o
CC drivers/acpi/acpica/rsdumpinfo.o
CC drivers/rtc/proc.o
CC drivers/usb/host/ohci-pci.o
CC net/sunrpc/xprtmultipath.o
CC net/mac80211/key.o
CC mm/swapfile.o
CC arch/x86/kernel/tls.o
CC net/core/fib_rules.o
CC fs/dcache.o
CC drivers/usb/core/buffer.o
CC [M] drivers/gpu/drm/xe/xe_ggtt.o
CC [M] net/netfilter/xt_MASQUERADE.o
CC drivers/acpi/acpica/rsinfo.o
CC kernel/async.o
CC net/sunrpc/stats.o
CC drivers/base/auxiliary_sysfs.o
CC drivers/scsi/scsi_transport_spi.o
CC drivers/usb/storage/initializers.o
CC drivers/input/mouse/focaltech.o
CC net/mac80211/util.o
CC drivers/ata/libata-pata-timings.o
CC arch/x86/kernel/step.o
CC drivers/rtc/sysfs.o
AR drivers/input/touchscreen/built-in.a
CC drivers/rtc/rtc-mc146818-lib.o
CC lib/base64.o
CC mm/swap_slots.o
CC drivers/gpu/drm/drm_connector.o
CC drivers/acpi/acpica/rsio.o
CC net/core/net-traces.o
CC drivers/gpu/drm/i915/soc/intel_gmch.o
AR drivers/pcmcia/built-in.a
CC net/core/selftests.o
CC [M] drivers/gpu/drm/xe/xe_gpu_scheduler.o
CC drivers/acpi/sysfs.o
CC drivers/usb/core/sysfs.o
CC kernel/range.o
AR drivers/input/misc/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gsc.o
AR drivers/net/ethernet/cortina/built-in.a
CC net/core/ptp_classifier.o
CC drivers/base/devcoredump.o
CC net/ipv6/udp_offload.o
CC drivers/gpu/drm/i915/soc/intel_pch.o
CC kernel/smpboot.o
CC drivers/gpu/drm/i915/soc/intel_rom.o
CC lib/once.o
CC [M] drivers/gpu/drm/xe/xe_gsc_debugfs.o
CC drivers/acpi/acpica/rsirq.o
CC drivers/input/mouse/alps.o
CC drivers/usb/storage/sierra_ms.o
CC fs/nfs/nfs4state.o
CC arch/x86/kernel/i8237.o
CC net/ipv6/seg6.o
CC drivers/i2c/algos/i2c-algo-bit.o
CC drivers/rtc/rtc-cmos.o
CC drivers/ata/ahci.o
CC fs/inode.o
CC lib/refcount.o
CC drivers/gpu/drm/drm_crtc.o
CC drivers/usb/core/endpoint.o
CC drivers/acpi/acpica/rslist.o
CC [M] net/netfilter/xt_addrtype.o
CC net/core/netprio_cgroup.o
AR fs/ext4/built-in.a
CC drivers/gpu/drm/i915/i915_memcpy.o
CC kernel/ucount.o
CC net/ipv6/fib6_notifier.o
CC lib/rcuref.o
AR drivers/net/ethernet/dec/tulip/built-in.a
AR drivers/net/ethernet/dec/built-in.a
CC drivers/base/platform-msi.o
CC drivers/usb/core/devio.o
CC arch/x86/kernel/stacktrace.o
CC drivers/i2c/busses/i2c-i801.o
CC fs/nfs/nfs4renewd.o
CC drivers/usb/storage/option_ms.o
CC drivers/usb/host/uhci-hcd.o
CC lib/usercopy.o
CC net/mac80211/parse.o
CC drivers/gpu/drm/drm_displayid.o
CC drivers/acpi/acpica/rsmemory.o
CC drivers/usb/core/notify.o
CC drivers/scsi/virtio_scsi.o
CC [M] drivers/gpu/drm/xe/xe_gsc_proxy.o
CC net/ipv4/igmp.o
CC net/ipv4/fib_frontend.o
CC net/sunrpc/sysctl.o
CC mm/dmapool.o
CC fs/nfs/nfs4super.o
CC drivers/base/physical_location.o
CC lib/errseq.o
CC drivers/input/mouse/byd.o
CC kernel/regset.o
CC drivers/gpu/drm/i915/i915_mm.o
CC kernel/ksyms_common.o
CC fs/attr.o
CC drivers/input/input.o
CC drivers/acpi/acpica/rsmisc.o
CC lib/bucket_locks.o
CC drivers/input/mouse/logips2pp.o
CC drivers/gpu/drm/i915/i915_sw_fence.o
AR drivers/i2c/algos/built-in.a
CC kernel/groups.o
CC net/ipv4/fib_semantics.o
CC drivers/ata/libahci.o
CC arch/x86/kernel/reboot.o
AR drivers/rtc/built-in.a
CC drivers/input/input-compat.o
CC drivers/input/mouse/lifebook.o
CC fs/nfs/nfs4file.o
CC drivers/usb/core/generic.o
CC drivers/usb/storage/usual-tables.o
CC drivers/scsi/sd.o
CC net/ipv4/fib_trie.o
CC drivers/acpi/acpica/rsserial.o
CC drivers/gpu/drm/i915/i915_sw_fence_work.o
CC net/ipv6/rpl.o
CC drivers/base/trace.o
CC net/mac80211/wme.o
AR drivers/i2c/muxes/built-in.a
CC fs/bad_inode.o
CC lib/generic-radix-tree.o
CC drivers/acpi/acpica/rsutils.o
CC kernel/kcmp.o
CC mm/hugetlb.o
CC [M] drivers/gpu/drm/xe/xe_gsc_submit.o
CC arch/x86/kernel/msr.o
CC net/core/netclassid_cgroup.o
AR net/netfilter/built-in.a
CC net/core/dst_cache.o
CC drivers/i2c/i2c-boardinfo.o
CC drivers/usb/core/quirks.o
CC net/core/gro_cells.o
AR drivers/i2c/busses/built-in.a
CC net/ipv6/ioam6.o
CC drivers/ata/ata_piix.o
CC drivers/gpu/drm/i915/i915_syncmap.o
CC drivers/acpi/property.o
CC mm/mmu_notifier.o
CC drivers/input/mouse/trackpoint.o
AR net/sunrpc/built-in.a
AR drivers/usb/storage/built-in.a
CC drivers/input/input-mt.o
CC drivers/scsi/sr.o
CC net/mac80211/chan.o
CC drivers/usb/core/devices.o
CC lib/bitmap-str.o
AR drivers/i3c/built-in.a
CC net/core/failover.o
CC drivers/acpi/acpica/rsxface.o
CC drivers/i2c/i2c-core-base.o
CC drivers/acpi/debugfs.o
AR drivers/net/ethernet/dlink/built-in.a
CC kernel/freezer.o
CC drivers/i2c/i2c-core-smbus.o
AR net/wireless/built-in.a
CC drivers/usb/host/xhci.o
AR drivers/base/built-in.a
CC net/mac80211/trace.o
CC lib/string_helpers.o
CC drivers/gpu/drm/i915/i915_user_extensions.o
CC fs/file.o
AR drivers/media/i2c/built-in.a
AR drivers/media/tuners/built-in.a
CC drivers/input/input-poller.o
CC drivers/gpu/drm/i915/i915_debugfs.o
AR drivers/media/rc/keymaps/built-in.a
CC arch/x86/kernel/cpuid.o
CC arch/x86/kernel/early-quirks.o
AR drivers/media/rc/built-in.a
CC arch/x86/kernel/smp.o
AR drivers/media/common/b2c2/built-in.a
CC drivers/acpi/acpi_lpat.o
CC drivers/acpi/acpica/tbdata.o
AR drivers/media/common/saa7146/built-in.a
AR drivers/media/common/siano/built-in.a
AR drivers/media/common/v4l2-tpg/built-in.a
AR drivers/media/common/videobuf2/built-in.a
AR drivers/media/common/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt.o
AR drivers/media/platform/allegro-dvt/built-in.a
AR drivers/net/ethernet/emulex/built-in.a
CC drivers/input/mouse/cypress_ps2.o
AR drivers/media/platform/amphion/built-in.a
AR drivers/media/platform/amlogic/meson-ge2d/built-in.a
CC lib/hexdump.o
CC fs/filesystems.o
AR drivers/media/platform/amlogic/built-in.a
AR drivers/media/platform/aspeed/built-in.a
AR drivers/media/platform/atmel/built-in.a
CC drivers/scsi/sr_ioctl.o
AR drivers/media/platform/broadcom/built-in.a
CC net/mac80211/mlme.o
CC drivers/input/mouse/psmouse-smbus.o
AR drivers/media/platform/cadence/built-in.a
CC drivers/gpu/drm/drm_drv.o
AR drivers/media/platform/chips-media/coda/built-in.a
AR drivers/media/platform/chips-media/wave5/built-in.a
AR drivers/media/platform/chips-media/built-in.a
CC drivers/input/ff-core.o
CC drivers/i2c/i2c-core-acpi.o
AR drivers/media/platform/imagination/built-in.a
AR drivers/media/platform/intel/built-in.a
CC drivers/usb/core/phy.o
CC drivers/scsi/sr_vendor.o
AR drivers/media/platform/marvell/built-in.a
AR drivers/media/platform/mediatek/jpeg/built-in.a
AR drivers/media/platform/mediatek/mdp/built-in.a
CC fs/nfs/delegation.o
AR drivers/media/platform/microchip/built-in.a
AR drivers/media/platform/mediatek/vpu/built-in.a
AR drivers/media/platform/mediatek/vcodec/common/built-in.a
AR drivers/media/platform/nuvoton/built-in.a
AR drivers/media/pci/ttpci/built-in.a
CC drivers/acpi/acpica/tbfadt.o
CC kernel/profile.o
AR drivers/media/platform/mediatek/vcodec/encoder/built-in.a
AR drivers/media/pci/b2c2/built-in.a
AR drivers/media/pci/pluto2/built-in.a
AR drivers/media/platform/mediatek/vcodec/decoder/built-in.a
AR drivers/media/platform/mediatek/vcodec/built-in.a
CC drivers/acpi/acpi_pcc.o
AR drivers/media/pci/dm1105/built-in.a
CC drivers/i2c/i2c-smbus.o
AR drivers/media/pci/pt1/built-in.a
AR drivers/media/platform/mediatek/mdp3/built-in.a
CC drivers/gpu/drm/i915/i915_debugfs_params.o
AR drivers/media/platform/mediatek/built-in.a
AR drivers/media/pci/pt3/built-in.a
CC drivers/usb/core/port.o
AR drivers/media/pci/mantis/built-in.a
AR drivers/media/usb/b2c2/built-in.a
AR drivers/media/pci/ngene/built-in.a
AR drivers/media/usb/dvb-usb/built-in.a
AR drivers/media/platform/nvidia/tegra-vde/built-in.a
AR drivers/media/pci/ddbridge/built-in.a
AR drivers/media/platform/nvidia/built-in.a
AR drivers/media/usb/dvb-usb-v2/built-in.a
AR drivers/media/pci/saa7146/built-in.a
AR drivers/media/usb/s2255/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_ccs_mode.o
AR drivers/media/platform/nxp/dw100/built-in.a
AR drivers/media/pci/smipcie/built-in.a
AR drivers/media/usb/siano/built-in.a
AR drivers/media/platform/nxp/imx-jpeg/built-in.a
AR drivers/media/pci/netup_unidvb/built-in.a
CC drivers/ata/pata_amd.o
AR drivers/net/ethernet/broadcom/built-in.a
AR drivers/media/usb/ttusb-budget/built-in.a
AR drivers/media/platform/nxp/imx8-isi/built-in.a
CC drivers/gpu/drm/drm_dumb_buffers.o
AR drivers/media/platform/nxp/built-in.a
AR drivers/media/pci/intel/ipu3/built-in.a
AR drivers/media/usb/ttusb-dec/built-in.a
AR drivers/net/ethernet/engleder/built-in.a
AR drivers/media/usb/built-in.a
AR drivers/media/pci/intel/ivsc/built-in.a
AR drivers/net/ethernet/ezchip/built-in.a
AR drivers/media/pci/intel/built-in.a
AR drivers/media/platform/qcom/camss/built-in.a
CC drivers/acpi/acpica/tbfind.o
AR drivers/media/pci/built-in.a
AR drivers/net/ethernet/fujitsu/built-in.a
AR drivers/media/platform/qcom/venus/built-in.a
AR drivers/media/platform/qcom/built-in.a
AR drivers/net/ethernet/fungible/built-in.a
AR drivers/media/platform/raspberrypi/pisp_be/built-in.a
CC arch/x86/kernel/smpboot.o
CC drivers/scsi/sg.o
CC drivers/ata/pata_oldpiix.o
CC drivers/usb/core/hcd-pci.o
AR drivers/net/ethernet/google/built-in.a
AR drivers/media/platform/raspberrypi/rp1-cfe/built-in.a
AR drivers/media/platform/raspberrypi/built-in.a
AR drivers/net/ethernet/hisilicon/built-in.a
AR drivers/net/ethernet/huawei/built-in.a
AR drivers/media/platform/renesas/rcar-vin/built-in.a
CC drivers/net/ethernet/intel/e1000/e1000_main.o
AR drivers/media/platform/renesas/rzg2l-cru/built-in.a
AR drivers/media/platform/renesas/vsp1/built-in.a
AR drivers/media/platform/renesas/built-in.a
AR drivers/media/platform/rockchip/rga/built-in.a
AR drivers/media/platform/rockchip/rkisp1/built-in.a
AR drivers/media/platform/rockchip/built-in.a
CC lib/kstrtox.o
AR drivers/media/platform/samsung/exynos-gsc/built-in.a
AR drivers/media/platform/samsung/exynos4-is/built-in.a
AR drivers/media/platform/samsung/s3c-camif/built-in.a
AR drivers/media/platform/samsung/s5p-g2d/built-in.a
AR drivers/net/ethernet/i825xx/built-in.a
CC arch/x86/kernel/tsc_sync.o
AR drivers/media/platform/samsung/s5p-jpeg/built-in.a
CC drivers/acpi/ac.o
AR drivers/media/platform/samsung/s5p-mfc/built-in.a
AR drivers/media/platform/samsung/built-in.a
CC lib/iomap.o
AR drivers/media/platform/st/sti/bdisp/built-in.a
CC arch/x86/kernel/setup_percpu.o
AR drivers/media/platform/st/sti/c8sectpfe/built-in.a
AR drivers/media/platform/st/sti/delta/built-in.a
AR drivers/media/platform/st/sti/hva/built-in.a
AR drivers/net/ethernet/microsoft/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_clock.o
CC [M] drivers/gpu/drm/xe/xe_gt_freq.o
AR drivers/media/platform/st/stm32/built-in.a
AR drivers/media/platform/st/built-in.a
CC drivers/net/ethernet/intel/e1000e/82571.o
CC drivers/net/ethernet/intel/e100.o
AR drivers/media/platform/sunxi/sun4i-csi/built-in.a
CC drivers/acpi/acpica/tbinstal.o
CC fs/nfs/nfs4idmap.o
AR drivers/media/platform/sunxi/sun6i-csi/built-in.a
AR drivers/media/platform/sunxi/sun6i-mipi-csi2/built-in.a
AR drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/built-in.a
CC drivers/usb/core/usb-acpi.o
CC net/ipv6/sysctl_net_ipv6.o
CC arch/x86/kernel/mpparse.o
AR drivers/media/platform/sunxi/sun8i-di/built-in.a
AR drivers/media/platform/sunxi/sun8i-rotate/built-in.a
CC drivers/acpi/button.o
AR drivers/media/platform/sunxi/built-in.a
AR drivers/input/mouse/built-in.a
CC drivers/input/touchscreen.o
AR drivers/media/mmc/siano/built-in.a
AR drivers/media/mmc/built-in.a
AR drivers/media/platform/ti/am437x/built-in.a
CC drivers/ata/pata_sch.o
AR drivers/media/firewire/built-in.a
AR drivers/media/platform/ti/cal/built-in.a
CC net/ipv6/xfrm6_policy.o
AR drivers/media/platform/ti/vpe/built-in.a
CC kernel/stacktrace.o
AR drivers/media/platform/ti/davinci/built-in.a
AR drivers/media/platform/ti/j721e-csi2rx/built-in.a
CC net/ipv6/xfrm6_state.o
AR drivers/media/platform/ti/omap/built-in.a
AR drivers/media/platform/verisilicon/built-in.a
AR drivers/media/platform/ti/omap3isp/built-in.a
CC drivers/net/ethernet/intel/e1000/e1000_hw.o
AR drivers/media/platform/ti/built-in.a
AR drivers/media/platform/via/built-in.a
AR drivers/media/platform/xilinx/built-in.a
CC net/ipv4/fib_notifier.o
AR drivers/media/platform/built-in.a
CC net/mac80211/tdls.o
CC lib/iomap_copy.o
CC drivers/acpi/acpica/tbprint.o
CC drivers/usb/host/xhci-mem.o
AR drivers/media/spi/built-in.a
CC fs/namespace.o
AR drivers/media/test-drivers/built-in.a
AR drivers/media/built-in.a
CC drivers/ata/pata_mpiix.o
CC kernel/dma.o
CC arch/x86/kernel/trace_clock.o
CC drivers/gpu/drm/i915/i915_pmu.o
CC net/ipv6/xfrm6_input.o
CC net/ipv6/xfrm6_output.o
CC mm/migrate.o
CC [M] drivers/gpu/drm/xe/xe_gt_idle.o
CC net/ipv4/inet_fragment.o
CC drivers/net/ethernet/intel/e1000/e1000_ethtool.o
CC drivers/net/ethernet/intel/e1000e/ich8lan.o
CC kernel/smp.o
CC fs/nfs/callback.o
CC fs/seq_file.o
AR drivers/i2c/built-in.a
CC drivers/ata/ata_generic.o
CC drivers/scsi/scsi_sysfs.o
AR drivers/net/ethernet/litex/built-in.a
AR net/core/built-in.a
CC drivers/acpi/fan_core.o
CC fs/xattr.o
CC drivers/acpi/acpica/tbutils.o
CC arch/x86/kernel/trace.o
CC lib/devres.o
CC drivers/input/ff-memless.o
CC drivers/net/ethernet/intel/e1000e/80003es2lan.o
AR drivers/usb/core/built-in.a
CC drivers/net/ethernet/intel/e1000/e1000_param.o
CC net/ipv6/xfrm6_protocol.o
AR drivers/pps/clients/built-in.a
CC mm/page_counter.o
CC drivers/pps/pps.o
AR drivers/net/ethernet/marvell/octeon_ep/built-in.a
AR drivers/net/ethernet/marvell/octeon_ep_vf/built-in.a
AR drivers/net/ethernet/marvell/octeontx2/built-in.a
CC drivers/ptp/ptp_clock.o
AR drivers/net/ethernet/marvell/prestera/built-in.a
CC drivers/acpi/acpica/tbxface.o
CC drivers/net/ethernet/marvell/sky2.o
CC arch/x86/kernel/rethook.o
CC drivers/input/sparse-keymap.o
CC drivers/usb/host/xhci-ext-caps.o
CC kernel/uid16.o
CC lib/check_signature.o
CC drivers/gpu/drm/drm_edid.o
CC drivers/pps/kapi.o
CC drivers/acpi/fan_attr.o
CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o
CC drivers/usb/host/xhci-ring.o
CC fs/nfs/callback_xdr.o
CC lib/interval_tree.o
AR drivers/ata/built-in.a
CC drivers/gpu/drm/drm_eld.o
CC net/ipv4/ping.o
CC drivers/ptp/ptp_chardev.o
CC drivers/usb/host/xhci-hub.o
CC drivers/acpi/acpica/tbxfload.o
CC drivers/input/vivaldi-fmap.o
CC mm/hugetlb_cgroup.o
CC net/ipv6/netfilter.o
CC lib/assoc_array.o
CC net/ipv6/proc.o
CC net/ipv4/ip_tunnel_core.o
CC drivers/power/supply/power_supply_core.o
AR drivers/net/ethernet/mellanox/built-in.a
CC mm/early_ioremap.o
CC drivers/gpu/drm/drm_encoder.o
CC drivers/net/ethernet/intel/e1000e/mac.o
CC arch/x86/kernel/vmcore_info_32.o
CC lib/bitrev.o
CC drivers/gpu/drm/i915/gt/gen2_engine_cs.o
CC net/ipv4/gre_offload.o
CC drivers/input/input-leds.o
CC drivers/hwmon/hwmon.o
CC drivers/usb/host/xhci-dbg.o
AR drivers/thermal/broadcom/built-in.a
CC drivers/pps/sysfs.o
CC drivers/acpi/acpica/tbxfroot.o
CC drivers/input/evdev.o
AR drivers/thermal/renesas/built-in.a
AR drivers/scsi/built-in.a
AR drivers/thermal/samsung/built-in.a
CC drivers/ptp/ptp_sysfs.o
CC drivers/thermal/intel/intel_tcc.o
CC net/mac80211/ocb.o
CC drivers/power/supply/power_supply_sysfs.o
CC mm/secretmem.o
CC drivers/gpu/drm/i915/gt/gen6_engine_cs.o
CC kernel/kallsyms.o
CC drivers/net/ethernet/intel/e1000e/manage.o
CC drivers/gpu/drm/drm_file.o
CC drivers/acpi/acpica/utaddress.o
CC net/ipv4/metrics.o
CC drivers/power/supply/power_supply_leds.o
CC kernel/acct.o
CC drivers/thermal/intel/therm_throt.o
CC fs/nfs/callback_proc.o
AR drivers/pps/built-in.a
CC arch/x86/kernel/machine_kexec_32.o
AR drivers/watchdog/built-in.a
CC net/mac80211/airtime.o
CC drivers/md/md.o
CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o
CC lib/crc-ccitt.o
CC kernel/vmcore_info.o
CC fs/libfs.o
CC drivers/net/ethernet/intel/e1000e/nvm.o
CC drivers/gpu/drm/drm_fourcc.o
CC drivers/acpi/fan_hwmon.o
AS arch/x86/kernel/relocate_kernel_32.o
CC fs/nfs/nfs4namespace.o
CC arch/x86/kernel/crash_dump_32.o
CC arch/x86/kernel/crash.o
CC drivers/acpi/acpica/utalloc.o
CC drivers/net/ethernet/intel/e1000e/phy.o
CC drivers/power/supply/power_supply_hwmon.o
AR drivers/thermal/st/built-in.a
CC drivers/net/ethernet/intel/e1000e/param.o
CC lib/crc16.o
CC drivers/ptp/ptp_vclock.o
HOSTCC lib/gen_crc32table
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.o
CC net/mac80211/eht.o
CC mm/hmm.o
AR drivers/net/ethernet/intel/e1000/built-in.a
CC net/ipv4/netlink.o
CC fs/fs-writeback.o
CC net/ipv6/syncookies.o
CC lib/xxhash.o
CC drivers/acpi/acpica/utascii.o
AR drivers/input/built-in.a
AR drivers/net/ethernet/meta/built-in.a
CC kernel/elfcorehdr.o
AR drivers/net/ethernet/micrel/built-in.a
CC drivers/md/md-bitmap.o
AR drivers/net/ethernet/microchip/built-in.a
CC net/ipv4/nexthop.o
CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o
CC net/ipv4/udp_tunnel_stub.o
CC drivers/gpu/drm/i915/gt/gen6_ppgtt.o
CC drivers/net/ethernet/intel/e1000e/ethtool.o
CC drivers/acpi/acpi_video.o
CC drivers/ptp/ptp_kvm_x86.o
CC net/ipv6/calipso.o
CC drivers/gpu/drm/i915/gt/gen7_renderclear.o
AR drivers/power/supply/built-in.a
CC drivers/gpu/drm/drm_framebuffer.o
CC drivers/usb/host/xhci-trace.o
AR drivers/power/built-in.a
CC fs/pnode.o
CC net/mac80211/led.o
AR drivers/hwmon/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_throttle.o
CC drivers/acpi/acpica/utbuffer.o
CC arch/x86/kernel/module.o
CC drivers/ptp/ptp_kvm_common.o
CC net/ipv4/ip_tunnel.o
CC mm/memfd.o
CC fs/splice.o
CC net/mac80211/pm.o
CC drivers/acpi/video_detect.o
CC lib/genalloc.o
AR drivers/thermal/intel/built-in.a
CC kernel/crash_reserve.o
CC kernel/kexec_core.o
CC lib/percpu_counter.o
CC drivers/acpi/acpica/utcksum.o
AR drivers/thermal/qcom/built-in.a
AR drivers/thermal/tegra/built-in.a
AR drivers/thermal/mediatek/built-in.a
CC drivers/thermal/thermal_core.o
CC drivers/gpu/drm/drm_gem.o
CC drivers/thermal/thermal_sysfs.o
CC lib/audit.o
CC fs/nfs/nfs4getroot.o
CC drivers/thermal/thermal_trip.o
CC lib/syscall.o
CC drivers/acpi/processor_driver.o
CC net/ipv4/sysctl_net_ipv4.o
CC fs/nfs/nfs4client.o
CC drivers/gpu/drm/i915/gt/gen8_engine_cs.o
CC drivers/usb/host/xhci-debugfs.o
CC drivers/acpi/acpica/utcopy.o
CC arch/x86/kernel/doublefault_32.o
AR drivers/ptp/built-in.a
CC net/ipv6/ah6.o
CC drivers/net/ethernet/intel/e1000e/netdev.o
CC drivers/thermal/thermal_helpers.o
CC fs/nfs/nfs4session.o
AR drivers/net/ethernet/marvell/built-in.a
CC drivers/net/ethernet/intel/e1000e/ptp.o
CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o
CC drivers/cpufreq/cpufreq.o
CC fs/nfs/dns_resolve.o
CC drivers/md/md-autodetect.o
CC [M] drivers/gpu/drm/xe/xe_gt_topology.o
CC drivers/cpuidle/governors/menu.o
CC net/ipv4/proc.o
CC mm/ptdump.o
CC drivers/cpuidle/cpuidle.o
CC drivers/cpuidle/driver.o
CC drivers/gpu/drm/drm_ioctl.o
AR drivers/mmc/built-in.a
CC drivers/acpi/processor_thermal.o
AR drivers/net/ethernet/mscc/built-in.a
CC net/ipv4/fib_rules.o
CC lib/errname.o
CC [M] drivers/gpu/drm/xe/xe_guc.o
AR drivers/ufs/built-in.a
CC drivers/usb/host/xhci-pci.o
CC fs/nfs/nfs4trace.o
CC fs/nfs/nfs4sysctl.o
CC lib/nlattr.o
CC drivers/cpuidle/governors/haltpoll.o
CC drivers/acpi/acpica/utexcep.o
CC drivers/gpu/drm/i915/gt/gen8_ppgtt.o
CC drivers/cpuidle/governor.o
CC kernel/crash_core.o
CC drivers/md/dm.o
CC drivers/cpuidle/sysfs.o
CC drivers/cpufreq/freq_table.o
CC drivers/acpi/acpica/utdebug.o
AR drivers/net/ethernet/myricom/built-in.a
CC net/ipv4/ipmr.o
CC mm/execmem.o
CC arch/x86/kernel/early_printk.o
CC drivers/md/dm-table.o
CC net/ipv4/ipmr_base.o
AR drivers/firmware/arm_ffa/built-in.a
AR drivers/firmware/arm_scmi/built-in.a
AR drivers/firmware/broadcom/built-in.a
AR drivers/firmware/cirrus/test/built-in.a
AR drivers/firmware/cirrus/built-in.a
AR drivers/crypto/stm32/built-in.a
CC drivers/clocksource/acpi_pm.o
AR drivers/crypto/xilinx/built-in.a
AR drivers/firmware/meson/built-in.a
AR drivers/crypto/hisilicon/built-in.a
AR drivers/firmware/microchip/built-in.a
CC net/ipv6/esp6.o
CC drivers/gpu/drm/i915/gt/intel_breadcrumbs.o
AR drivers/crypto/intel/keembay/built-in.a
AR drivers/crypto/intel/ixp4xx/built-in.a
AR drivers/crypto/intel/built-in.a
CC drivers/md/dm-target.o
AR drivers/crypto/starfive/built-in.a
AR drivers/crypto/built-in.a
CC lib/cpu_rmap.o
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
CC drivers/firmware/efi/libstub/efi-stub-helper.o
CC drivers/acpi/acpica/utdecode.o
CC drivers/clocksource/i8253.o
CC drivers/firmware/efi/efi-bgrt.o
AR drivers/firmware/imx/built-in.a
CC drivers/thermal/thermal_thresholds.o
CC drivers/thermal/thermal_netlink.o
CC drivers/cpuidle/poll_state.o
CC drivers/thermal/thermal_hwmon.o
CC arch/x86/kernel/hpet.o
CC drivers/acpi/acpica/utdelete.o
CC arch/x86/kernel/amd_nb.o
CC drivers/acpi/processor_idle.o
CC [M] drivers/gpu/drm/xe/xe_guc_buf.o
CC drivers/firmware/efi/efi.o
CC drivers/gpu/drm/drm_lease.o
AR drivers/cpuidle/governors/built-in.a
CC drivers/gpu/drm/drm_managed.o
AR drivers/net/ethernet/natsemi/built-in.a
CC drivers/acpi/acpica/uterror.o
CC drivers/gpu/drm/drm_mm.o
CC drivers/hid/usbhid/hid-core.o
CC drivers/gpu/drm/drm_mode_config.o
CC drivers/md/dm-linear.o
CC drivers/gpu/drm/i915/gt/intel_context.o
AR drivers/net/ethernet/neterion/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_capture.o
CC drivers/cpuidle/cpuidle-haltpoll.o
CC lib/dynamic_queue_limits.o
AR mm/built-in.a
CC drivers/thermal/gov_step_wise.o
CC kernel/kexec.o
CC net/mac80211/rc80211_minstrel_ht.o
CC net/ipv4/syncookies.o
CC drivers/gpu/drm/drm_mode_object.o
CC drivers/md/dm-stripe.o
CC lib/glob.o
CC drivers/gpu/drm/drm_modes.o
CC arch/x86/kernel/amd_node.o
CC drivers/firmware/efi/vars.o
CC drivers/gpu/drm/i915/gt/intel_context_sseu.o
AR drivers/usb/host/built-in.a
AR drivers/usb/built-in.a
AR drivers/platform/x86/amd/built-in.a
AR drivers/clocksource/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_ct.o
AR drivers/platform/x86/intel/built-in.a
CC kernel/utsname.o
CC drivers/acpi/acpica/uteval.o
CC drivers/platform/x86/wmi.o
AR drivers/firmware/psci/built-in.a
CC drivers/acpi/processor_throttling.o
CC drivers/hid/usbhid/hiddev.o
CC drivers/firmware/efi/libstub/gop.o
AR drivers/net/ethernet/netronome/built-in.a
AR drivers/cpuidle/built-in.a
CC fs/sync.o
CC drivers/hid/hid-core.o
AR drivers/net/ethernet/ni/built-in.a
CC drivers/net/ethernet/nvidia/forcedeth.o
AR drivers/net/ethernet/oki-semi/built-in.a
CC net/ipv4/tunnel4.o
CC kernel/pid_namespace.o
CC drivers/cpufreq/cpufreq_performance.o
CC drivers/platform/x86/wmi-bmof.o
AR drivers/net/ethernet/packetengines/built-in.a
CC arch/x86/kernel/kvm.o
CC drivers/firmware/efi/reboot.o
CC drivers/acpi/acpica/utglobal.o
CC drivers/firmware/efi/libstub/secureboot.o
CC lib/strncpy_from_user.o
AR drivers/firmware/qcom/built-in.a
CC drivers/mailbox/mailbox.o
AR drivers/perf/built-in.a
CC drivers/mailbox/pcc.o
AR drivers/platform/surface/built-in.a
CC drivers/hid/hid-input.o
CC drivers/cpufreq/cpufreq_userspace.o
CC drivers/gpu/drm/i915/gt/intel_engine_cs.o
AR drivers/net/ethernet/qlogic/built-in.a
CC drivers/firmware/efi/libstub/tpm.o
CC fs/utimes.o
CC net/mac80211/wbrf.o
CC drivers/firmware/efi/memattr.o
CC lib/strnlen_user.o
CC drivers/acpi/acpica/uthex.o
AR drivers/firmware/smccc/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_db_mgr.o
CC drivers/hid/usbhid/hid-pidff.o
CC [M] drivers/gpu/drm/xe/xe_guc_engine_activity.o
AR drivers/firmware/tegra/built-in.a
CC kernel/stop_machine.o
AR drivers/thermal/built-in.a
AR drivers/firmware/xilinx/built-in.a
CC kernel/audit.o
CC drivers/cpufreq/cpufreq_ondemand.o
CC drivers/gpu/drm/i915/gt/intel_engine_heartbeat.o
CC lib/net_utils.o
CC drivers/gpu/drm/i915/gt/intel_engine_pm.o
CC drivers/firmware/dmi_scan.o
CC drivers/platform/x86/eeepc-laptop.o
CC arch/x86/kernel/kvmclock.o
CC drivers/md/dm-ioctl.o
CC drivers/md/dm-io.o
CC drivers/cpufreq/cpufreq_governor.o
CC lib/sg_pool.o
CC net/ipv6/sit.o
CC net/ipv4/ipconfig.o
AR drivers/net/ethernet/qualcomm/emac/built-in.a
AR drivers/net/ethernet/qualcomm/built-in.a
AR drivers/hwtracing/intel_th/built-in.a
CC net/ipv4/netfilter.o
CC kernel/auditfilter.o
AR drivers/android/built-in.a
CC lib/stackdepot.o
CC drivers/cpufreq/cpufreq_governor_attr_set.o
CC drivers/acpi/acpica/utids.o
CC drivers/acpi/acpica/utinit.o
CC drivers/hid/hid-quirks.o
AR drivers/mailbox/built-in.a
CC drivers/firmware/dmi-id.o
CC drivers/gpu/drm/i915/gt/intel_engine_user.o
CC arch/x86/kernel/paravirt.o
CC net/ipv6/addrconf_core.o
CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o
CC drivers/firmware/efi/libstub/file.o
CC drivers/gpu/drm/drm_modeset_lock.o
CC drivers/platform/x86/p2sb.o
CC drivers/hid/hid-debug.o
CC net/ipv6/exthdrs_core.o
CC kernel/auditsc.o
AR drivers/nvmem/layouts/built-in.a
CC drivers/md/dm-kcopyd.o
CC drivers/nvmem/core.o
CC drivers/acpi/acpica/utlock.o
CC drivers/cpufreq/acpi-cpufreq.o
CC drivers/gpu/drm/i915/gt/intel_execlists_submission.o
CC lib/asn1_decoder.o
CC drivers/firmware/efi/tpm.o
CC drivers/hid/hidraw.o
CC drivers/firmware/efi/libstub/mem.o
CC net/ipv6/ip6_checksum.o
CC fs/d_path.o
CC fs/stack.o
CC fs/fs_struct.o
CC kernel/audit_watch.o
CC drivers/acpi/acpica/utmath.o
AR fs/nfs/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_id_mgr.o
CC drivers/gpu/drm/drm_plane.o
CC drivers/hid/hid-generic.o
CC drivers/net/ethernet/realtek/8139too.o
CC net/ipv4/tcp_cubic.o
CC net/ipv4/tcp_sigpool.o
CC arch/x86/kernel/pvclock.o
CC drivers/net/ethernet/realtek/r8169_main.o
CC kernel/audit_fsnotify.o
AR drivers/hid/usbhid/built-in.a
CC drivers/firmware/efi/memmap.o
CC drivers/acpi/acpica/utmisc.o
CC [M] drivers/gpu/drm/xe/xe_guc_klv_helpers.o
CC kernel/audit_tree.o
CC drivers/net/ethernet/realtek/r8169_firmware.o
AR drivers/platform/x86/built-in.a
AR drivers/platform/built-in.a
CC drivers/cpufreq/amd-pstate.o
GEN lib/oid_registry_data.c
CC drivers/gpu/drm/drm_prime.o
CC lib/ucs2_string.o
CC drivers/hid/hid-a4tech.o
CC [M] drivers/gpu/drm/xe/xe_guc_log.o
CC drivers/gpu/drm/i915/gt/intel_ggtt.o
CC drivers/firmware/memmap.o
CC net/ipv6/ip6_icmp.o
CC lib/sbitmap.o
CC drivers/gpu/drm/drm_print.o
CC drivers/firmware/efi/libstub/random.o
CC drivers/net/ethernet/realtek/r8169_phy_config.o
AR drivers/net/ethernet/renesas/built-in.a
CC drivers/firmware/efi/libstub/randomalloc.o
CC kernel/kprobes.o
CC fs/statfs.o
CC drivers/acpi/acpica/utmutex.o
CC arch/x86/kernel/pcspeaker.o
CC drivers/md/dm-sysfs.o
CC drivers/firmware/efi/capsule.o
CC drivers/hid/hid-apple.o
AR drivers/net/ethernet/rdc/built-in.a
AR drivers/net/ethernet/rocker/built-in.a
CC net/ipv6/output_core.o
CC drivers/gpu/drm/i915/gt/intel_ggtt_fencing.o
CC drivers/firmware/efi/libstub/pci.o
CC drivers/cpufreq/amd-pstate-trace.o
CC arch/x86/kernel/check.o
CC kernel/seccomp.o
CC net/ipv4/cipso_ipv4.o
CC drivers/hid/hid-belkin.o
AR drivers/nvmem/built-in.a
CC drivers/cpufreq/intel_pstate.o
CC drivers/acpi/processor_perflib.o
AR net/mac80211/built-in.a
CC net/ipv6/protocol.o
CC lib/group_cpus.o
AR drivers/net/ethernet/samsung/built-in.a
CC lib/fw_table.o
CC kernel/relay.o
AR lib/lib.a
CC drivers/firmware/efi/libstub/skip_spaces.o
CC [M] drivers/gpu/drm/xe/xe_guc_pc.o
CC drivers/acpi/acpica/utnonansi.o
AR drivers/net/ethernet/intel/e1000e/built-in.a
AR drivers/net/ethernet/seeq/built-in.a
AR drivers/net/ethernet/intel/built-in.a
CC net/ipv6/ip6_offload.o
CC arch/x86/kernel/uprobes.o
CC kernel/utsname_sysctl.o
CC drivers/firmware/efi/esrt.o
CC drivers/hid/hid-cherry.o
CC drivers/md/dm-stats.o
CC drivers/hid/hid-chicony.o
CC net/ipv4/xfrm4_policy.o
CC drivers/acpi/acpica/utobject.o
CC kernel/delayacct.o
CC drivers/acpi/acpica/utosi.o
CC drivers/gpu/drm/i915/gt/intel_gt.o
GEN lib/crc32table.h
CC drivers/md/dm-rq.o
CC drivers/hid/hid-cypress.o
CC drivers/firmware/efi/libstub/lib-cmdline.o
CC drivers/acpi/acpica/utownerid.o
CC fs/fs_pin.o
CC drivers/md/dm-io-rewind.o
CC drivers/gpu/drm/drm_property.o
CC lib/oid_registry.o
CC net/ipv6/tcpv6_offload.o
AR drivers/net/ethernet/silan/built-in.a
CC drivers/acpi/container.o
CC drivers/firmware/efi/libstub/lib-ctype.o
CC drivers/firmware/efi/runtime-wrappers.o
CC kernel/taskstats.o
CC fs/nsfs.o
CC drivers/firmware/efi/libstub/alignedmem.o
CC fs/fs_types.o
CC fs/fs_context.o
AR drivers/net/ethernet/nvidia/built-in.a
CC drivers/gpu/drm/drm_rect.o
CC [M] drivers/gpu/drm/xe/xe_guc_submit.o
CC drivers/gpu/drm/drm_syncobj.o
CC drivers/acpi/acpica/utpredef.o
CC [M] drivers/gpu/drm/xe/xe_heci_gsc.o
CC drivers/md/dm-builtin.o
CC fs/fs_parser.o
CC net/ipv6/exthdrs_offload.o
CC drivers/gpu/drm/drm_sysfs.o
CC drivers/acpi/thermal_lib.o
CC kernel/tsacct.o
CC arch/x86/kernel/perf_regs.o
CC net/ipv6/inet6_hashtables.o
CC [M] drivers/gpu/drm/xe/xe_huc.o
CC drivers/md/dm-raid1.o
CC drivers/firmware/efi/libstub/relocate.o
CC lib/crc32.o
CC drivers/acpi/acpica/utresdecode.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine.o
CC arch/x86/kernel/tracepoint.o
CC drivers/firmware/efi/libstub/printk.o
CC drivers/md/dm-log.o
CC drivers/acpi/acpica/utresrc.o
CC drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.o
CC drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.o
CC drivers/hid/hid-ezkey.o
CC drivers/gpu/drm/i915/gt/intel_gt_clock_utils.o
CC drivers/md/dm-region-hash.o
CC net/ipv4/xfrm4_state.o
CC drivers/gpu/drm/drm_trace_points.o
CC drivers/gpu/drm/i915/gt/intel_gt_debugfs.o
AR drivers/net/ethernet/sis/built-in.a
CC drivers/firmware/efi/capsule-loader.o
CC drivers/hid/hid-gyration.o
CC drivers/acpi/thermal.o
CC drivers/acpi/nhlt.o
CC net/ipv6/mcast_snoop.o
CC kernel/tracepoint.o
CC drivers/gpu/drm/drm_vblank.o
CC drivers/firmware/efi/earlycon.o
AR lib/built-in.a
CC drivers/hid/hid-ite.o
CC drivers/firmware/efi/libstub/vsprintf.o
CC kernel/irq_work.o
CC arch/x86/kernel/itmt.o
CC drivers/md/dm-zero.o
CC drivers/acpi/acpica/utstate.o
CC net/ipv4/xfrm4_input.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.o
CC drivers/acpi/acpi_memhotplug.o
AR drivers/net/ethernet/sfc/built-in.a
AR drivers/net/ethernet/smsc/built-in.a
CC arch/x86/kernel/umip.o
CC drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.o
CC arch/x86/kernel/unwind_frame.o
CC drivers/hid/hid-kensington.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_group.o
CC drivers/acpi/acpica/utstring.o
CC fs/fsopen.o
CC net/ipv4/xfrm4_output.o
CC drivers/firmware/efi/libstub/x86-stub.o
CC drivers/gpu/drm/drm_vblank_work.o
CC drivers/hid/hid-lg.o
CC [M] drivers/gpu/drm/xe/xe_hw_fence.o
CC drivers/gpu/drm/i915/gt/intel_gt_irq.o
AR drivers/net/ethernet/socionext/built-in.a
CC net/ipv4/xfrm4_protocol.o
CC drivers/acpi/acpica/utstrsuppt.o
CC drivers/hid/hid-lgff.o
CC drivers/acpi/acpica/utstrtoul64.o
CC drivers/gpu/drm/i915/gt/intel_gt_mcr.o
AR drivers/net/ethernet/stmicro/built-in.a
CC kernel/static_call.o
CC fs/init.o
CC drivers/acpi/ioapic.o
CC drivers/hid/hid-lg4ff.o
CC kernel/padata.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm.o
CC fs/kernel_read_file.o
CC drivers/firmware/efi/libstub/smbios.o
CC drivers/acpi/acpica/utxface.o
CC drivers/gpu/drm/drm_vma_manager.o
CC fs/mnt_idmapping.o
STUBCPY drivers/firmware/efi/libstub/alignedmem.stub.o
AR drivers/net/ethernet/sun/built-in.a
STUBCPY drivers/firmware/efi/libstub/efi-stub-helper.stub.o
CC drivers/hid/hid-lg-g15.o
CC drivers/hid/hid-microsoft.o
CC drivers/acpi/battery.o
CC drivers/acpi/bgrt.o
CC drivers/gpu/drm/drm_writeback.o
CC drivers/acpi/acpica/utxfinit.o
CC fs/remap_range.o
CC [M] drivers/gpu/drm/xe/xe_irq.o
AR drivers/cpufreq/built-in.a
AR drivers/firmware/efi/built-in.a
AR drivers/md/built-in.a
CC drivers/gpu/drm/drm_panel.o
AR drivers/net/ethernet/tehuti/built-in.a
CC drivers/acpi/spcr.o
CC drivers/gpu/drm/drm_pci.o
STUBCPY drivers/firmware/efi/libstub/file.stub.o
CC kernel/jump_label.o
CC drivers/hid/hid-monterey.o
CC drivers/acpi/acpica/utxferror.o
CC [M] drivers/gpu/drm/xe/xe_lrc.o
CC drivers/hid/hid-ntrig.o
CC fs/pidfs.o
CC kernel/context_tracking.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.o
AR drivers/net/ethernet/realtek/built-in.a
AR drivers/net/ethernet/ti/built-in.a
AR drivers/net/ethernet/vertexcom/built-in.a
AR arch/x86/kernel/built-in.a
AR drivers/net/ethernet/via/built-in.a
AR drivers/net/ethernet/wangxun/built-in.a
AR net/ipv6/built-in.a
AR arch/x86/built-in.a
AR drivers/net/ethernet/xilinx/built-in.a
AR drivers/net/ethernet/wiznet/built-in.a
AR drivers/net/ethernet/xircom/built-in.a
CC drivers/gpu/drm/drm_debugfs.o
CC drivers/hid/hid-pl.o
CC drivers/hid/hid-petalynx.o
AR drivers/net/ethernet/synopsys/built-in.a
CC kernel/iomem.o
CC fs/buffer.o
CC [M] drivers/gpu/drm/xe/xe_migrate.o
AR drivers/net/ethernet/pensando/built-in.a
AR drivers/net/ethernet/built-in.a
STUBCPY drivers/firmware/efi/libstub/gop.stub.o
CC drivers/gpu/drm/drm_debugfs_crc.o
CC [M] drivers/gpu/drm/xe/xe_mmio.o
CC kernel/rseq.o
CC drivers/gpu/drm/drm_panel_orientation_quirks.o
CC drivers/hid/hid-redragon.o
CC fs/mpage.o
AR drivers/net/built-in.a
CC drivers/gpu/drm/i915/gt/intel_gt_pm_irq.o
CC drivers/acpi/acpica/utxfmutex.o
CC [M] drivers/gpu/drm/xe/xe_mocs.o
STUBCPY drivers/firmware/efi/libstub/lib-cmdline.stub.o
CC drivers/gpu/drm/drm_buddy.o
STUBCPY drivers/firmware/efi/libstub/lib-ctype.stub.o
STUBCPY drivers/firmware/efi/libstub/mem.stub.o
STUBCPY drivers/firmware/efi/libstub/pci.stub.o
STUBCPY drivers/firmware/efi/libstub/printk.stub.o
CC drivers/hid/hid-samsung.o
STUBCPY drivers/firmware/efi/libstub/random.stub.o
STUBCPY drivers/firmware/efi/libstub/randomalloc.stub.o
STUBCPY drivers/firmware/efi/libstub/relocate.stub.o
CC drivers/gpu/drm/i915/gt/intel_gt_requests.o
STUBCPY drivers/firmware/efi/libstub/secureboot.stub.o
STUBCPY drivers/firmware/efi/libstub/skip_spaces.stub.o
CC fs/proc_namespace.o
STUBCPY drivers/firmware/efi/libstub/smbios.stub.o
CC [M] drivers/gpu/drm/xe/xe_module.o
CC [M] drivers/gpu/drm/xe/xe_oa.o
STUBCPY drivers/firmware/efi/libstub/tpm.stub.o
STUBCPY drivers/firmware/efi/libstub/vsprintf.stub.o
CC drivers/hid/hid-sony.o
STUBCPY drivers/firmware/efi/libstub/x86-stub.stub.o
CC drivers/gpu/drm/drm_gem_shmem_helper.o
AR drivers/firmware/efi/libstub/lib.a
CC drivers/gpu/drm/i915/gt/intel_gt_sysfs.o
CC drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.o
AR drivers/firmware/built-in.a
CC drivers/gpu/drm/drm_atomic_helper.o
CC [M] drivers/gpu/drm/xe/xe_observation.o
CC drivers/hid/hid-sunplus.o
CC drivers/gpu/drm/drm_atomic_state_helper.o
CC fs/direct-io.o
CC [M] drivers/gpu/drm/xe/xe_pat.o
CC drivers/hid/hid-topseed.o
CC drivers/gpu/drm/drm_bridge_helper.o
CC fs/eventpoll.o
AR net/ipv4/built-in.a
AR drivers/acpi/acpica/built-in.a
AR net/built-in.a
CC drivers/gpu/drm/drm_crtc_helper.o
CC [M] drivers/gpu/drm/xe/xe_pci.o
CC drivers/gpu/drm/i915/gt/intel_gtt.o
CC fs/anon_inodes.o
CC [M] drivers/gpu/drm/xe/xe_pcode.o
CC drivers/gpu/drm/drm_damage_helper.o
AR drivers/acpi/built-in.a
CC drivers/gpu/drm/i915/gt/intel_llc.o
CC [M] drivers/gpu/drm/xe/xe_pm.o
CC fs/signalfd.o
CC fs/timerfd.o
CC drivers/gpu/drm/drm_flip_work.o
CC drivers/gpu/drm/i915/gt/intel_lrc.o
CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o
CC fs/eventfd.o
CC [M] drivers/gpu/drm/xe/xe_pt.o
CC drivers/gpu/drm/drm_format_helper.o
CC drivers/gpu/drm/i915/gt/intel_migrate.o
CC fs/aio.o
CC [M] drivers/gpu/drm/xe/xe_pt_walk.o
CC drivers/gpu/drm/drm_gem_atomic_helper.o
CC [M] drivers/gpu/drm/xe/xe_pxp.o
AR kernel/built-in.a
CC drivers/gpu/drm/i915/gt/intel_mocs.o
CC fs/locks.o
CC drivers/gpu/drm/drm_gem_framebuffer_helper.o
CC drivers/gpu/drm/i915/gt/intel_ppgtt.o
CC drivers/gpu/drm/i915/gt/intel_rc6.o
CC [M] drivers/gpu/drm/xe/xe_pxp_debugfs.o
CC fs/binfmt_misc.o
CC drivers/gpu/drm/i915/gt/intel_region_lmem.o
CC drivers/gpu/drm/drm_kms_helper_common.o
CC drivers/gpu/drm/drm_modeset_helper.o
CC [M] drivers/gpu/drm/xe/xe_pxp_submit.o
CC drivers/gpu/drm/i915/gt/intel_renderstate.o
CC fs/binfmt_script.o
CC drivers/gpu/drm/i915/gt/intel_reset.o
CC drivers/gpu/drm/drm_plane_helper.o
CC [M] drivers/gpu/drm/xe/xe_query.o
CC fs/binfmt_elf.o
CC [M] drivers/gpu/drm/xe/xe_range_fence.o
CC drivers/gpu/drm/i915/gt/intel_ring.o
CC drivers/gpu/drm/drm_probe_helper.o
CC fs/mbcache.o
CC fs/posix_acl.o
AR drivers/hid/built-in.a
CC drivers/gpu/drm/drm_self_refresh_helper.o
CC drivers/gpu/drm/i915/gt/intel_ring_submission.o
CC fs/coredump.o
CC drivers/gpu/drm/drm_simple_kms_helper.o
CC fs/drop_caches.o
CC drivers/gpu/drm/bridge/panel.o
CC fs/sysctls.o
CC drivers/gpu/drm/i915/gt/intel_rps.o
CC drivers/gpu/drm/drm_mipi_dsi.o
CC [M] drivers/gpu/drm/drm_exec.o
CC drivers/gpu/drm/i915/gt/intel_sa_media.o
CC [M] drivers/gpu/drm/drm_gpuvm.o
CC fs/fhandle.o
CC [M] drivers/gpu/drm/xe/xe_reg_sr.o
CC [M] drivers/gpu/drm/xe/xe_reg_whitelist.o
CC drivers/gpu/drm/i915/gt/intel_sseu.o
CC [M] drivers/gpu/drm/xe/xe_ring_ops.o
CC [M] drivers/gpu/drm/drm_suballoc.o
CC drivers/gpu/drm/i915/gt/intel_sseu_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_rtp.o
CC [M] drivers/gpu/drm/xe/xe_sa.o
CC [M] drivers/gpu/drm/xe/xe_sched_job.o
CC [M] drivers/gpu/drm/drm_gem_ttm_helper.o
CC drivers/gpu/drm/i915/gt/intel_timeline.o
CC [M] drivers/gpu/drm/xe/xe_shrinker.o
CC drivers/gpu/drm/i915/gt/intel_tlb.o
CC [M] drivers/gpu/drm/xe/xe_step.o
CC drivers/gpu/drm/i915/gt/intel_wopcm.o
CC [M] drivers/gpu/drm/xe/xe_survivability_mode.o
CC drivers/gpu/drm/i915/gt/intel_workarounds.o
CC [M] drivers/gpu/drm/xe/xe_sync.o
CC drivers/gpu/drm/i915/gt/shmem_utils.o
CC drivers/gpu/drm/i915/gt/sysfs_engines.o
CC drivers/gpu/drm/i915/gt/intel_ggtt_gmch.o
CC drivers/gpu/drm/i915/gt/gen6_renderstate.o
CC drivers/gpu/drm/i915/gt/gen7_renderstate.o
CC [M] drivers/gpu/drm/xe/xe_tile.o
CC [M] drivers/gpu/drm/xe/xe_tile_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_trace.o
CC drivers/gpu/drm/i915/gt/gen8_renderstate.o
CC [M] drivers/gpu/drm/xe/xe_trace_bo.o
CC drivers/gpu/drm/i915/gt/gen9_renderstate.o
CC [M] drivers/gpu/drm/xe/xe_trace_guc.o
CC drivers/gpu/drm/i915/gem/i915_gem_busy.o
CC drivers/gpu/drm/i915/gem/i915_gem_clflush.o
CC [M] drivers/gpu/drm/xe/xe_trace_lrc.o
CC [M] drivers/gpu/drm/xe/xe_ttm_stolen_mgr.o
CC drivers/gpu/drm/i915/gem/i915_gem_context.o
CC [M] drivers/gpu/drm/xe/xe_ttm_sys_mgr.o
LD [M] drivers/gpu/drm/drm_suballoc_helper.o
CC drivers/gpu/drm/i915/gem/i915_gem_create.o
CC drivers/gpu/drm/i915/gem/i915_gem_dmabuf.o
CC [M] drivers/gpu/drm/xe/xe_ttm_vram_mgr.o
CC [M] drivers/gpu/drm/xe/xe_tuning.o
LD [M] drivers/gpu/drm/drm_ttm_helper.o
CC drivers/gpu/drm/i915/gem/i915_gem_domain.o
CC [M] drivers/gpu/drm/xe/xe_uc.o
CC [M] drivers/gpu/drm/xe/xe_uc_fw.o
CC drivers/gpu/drm/i915/gem/i915_gem_execbuffer.o
CC [M] drivers/gpu/drm/xe/xe_vm.o
CC drivers/gpu/drm/i915/gem/i915_gem_internal.o
CC [M] drivers/gpu/drm/xe/xe_vram.o
CC drivers/gpu/drm/i915/gem/i915_gem_lmem.o
CC [M] drivers/gpu/drm/xe/xe_vram_freq.o
CC [M] drivers/gpu/drm/xe/xe_vsec.o
CC [M] drivers/gpu/drm/xe/xe_wa.o
CC [M] drivers/gpu/drm/xe/xe_wait_user_fence.o
CC drivers/gpu/drm/i915/gem/i915_gem_mman.o
CC [M] drivers/gpu/drm/xe/xe_wopcm.o
CC [M] drivers/gpu/drm/xe/xe_hmm.o
CC drivers/gpu/drm/i915/gem/i915_gem_object.o
CC drivers/gpu/drm/i915/gem/i915_gem_pages.o
CC [M] drivers/gpu/drm/xe/xe_hwmon.o
CC drivers/gpu/drm/i915/gem/i915_gem_phys.o
CC [M] drivers/gpu/drm/xe/xe_pmu.o
CC drivers/gpu/drm/i915/gem/i915_gem_pm.o
CC drivers/gpu/drm/i915/gem/i915_gem_region.o
CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf.o
CC [M] drivers/gpu/drm/xe/xe_guc_relay.o
CC drivers/gpu/drm/i915/gem/i915_gem_shmem.o
CC [M] drivers/gpu/drm/xe/xe_memirq.o
CC drivers/gpu/drm/i915/gem/i915_gem_shrinker.o
CC [M] drivers/gpu/drm/xe/xe_sriov.o
CC drivers/gpu/drm/i915/gem/i915_gem_stolen.o
CC drivers/gpu/drm/i915/gem/i915_gem_throttle.o
CC [M] drivers/gpu/drm/xe/xe_sriov_vf.o
AR fs/built-in.a
CC drivers/gpu/drm/i915/gem/i915_gem_tiling.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_irq.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_utils.o
CC [M] drivers/gpu/drm/xe/display/intel_bo.o
CC [M] drivers/gpu/drm/xe/display/intel_fb_bo.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm_move.o
CC [M] drivers/gpu/drm/xe/display/intel_fbdev_fb.o
CC [M] drivers/gpu/drm/xe/display/xe_display.o
CC [M] drivers/gpu/drm/xe/display/xe_display_misc.o
CC [M] drivers/gpu/drm/xe/display/xe_display_rpm.o
CC [M] drivers/gpu/drm/xe/display/xe_display_rps.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.o
CC drivers/gpu/drm/i915/gem/i915_gem_userptr.o
CC drivers/gpu/drm/i915/gem/i915_gem_wait.o
CC [M] drivers/gpu/drm/xe/display/xe_display_wa.o
CC [M] drivers/gpu/drm/xe/display/xe_dsb_buffer.o
CC [M] drivers/gpu/drm/xe/display/xe_fb_pin.o
CC drivers/gpu/drm/i915/gem/i915_gemfs.o
CC drivers/gpu/drm/i915/i915_active.o
CC [M] drivers/gpu/drm/xe/display/xe_hdcp_gsc.o
CC [M] drivers/gpu/drm/xe/display/xe_plane_initial.o
CC drivers/gpu/drm/i915/i915_cmd_parser.o
CC [M] drivers/gpu/drm/xe/display/xe_tdf.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_dram.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_pch.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_rom.o
CC drivers/gpu/drm/i915/i915_deps.o
CC [M] drivers/gpu/drm/xe/i915-display/icl_dsi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_alpm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_audio.o
CC drivers/gpu/drm/i915/i915_gem.o
CC drivers/gpu/drm/i915/i915_gem_evict.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_backlight.o
CC drivers/gpu/drm/i915/i915_gem_gtt.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bios.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bw.o
CC drivers/gpu/drm/i915/i915_gem_ww.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cdclk.o
CC drivers/gpu/drm/i915/i915_query.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cmtg.o
CC drivers/gpu/drm/i915/i915_request.o
CC drivers/gpu/drm/i915/i915_scheduler.o
CC drivers/gpu/drm/i915/i915_trace_points.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_color.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_combo_phy.o
CC drivers/gpu/drm/i915/i915_ttm_buddy_manager.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_connector.o
CC drivers/gpu/drm/i915/i915_vma.o
CC drivers/gpu/drm/i915/i915_vma_resource.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cursor.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cx0_phy.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi_buf_trans.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_conversion.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_device.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_ads.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_driver.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_capture.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_params.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_ct.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_map.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_well.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_fw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_trace.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_log.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_wa.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_rc.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dkl_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc_wl.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_submission.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux_backlight.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc_fw.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_hdcp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_link_training.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_mst.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc_fw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_test.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll_mgr.o
CC drivers/gpu/drm/i915/gt/intel_gsc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpt_common.o
CC drivers/gpu/drm/i915/i915_hwmon.o
CC drivers/gpu/drm/i915/display/hsw_ips.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_drrs.o
CC drivers/gpu/drm/i915/display/i9xx_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi.o
CC drivers/gpu/drm/i915/display/i9xx_display_sr.o
CC drivers/gpu/drm/i915/display/i9xx_wm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_dcs_backlight.o
CC drivers/gpu/drm/i915/display/intel_alpm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_vbt.o
CC drivers/gpu/drm/i915/display/intel_atomic.o
CC drivers/gpu/drm/i915/display/intel_atomic_plane.o
CC drivers/gpu/drm/i915/display/intel_audio.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_encoder.o
CC drivers/gpu/drm/i915/display/intel_bios.o
CC drivers/gpu/drm/i915/display/intel_bo.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fb.o
CC drivers/gpu/drm/i915/display/intel_bw.o
CC drivers/gpu/drm/i915/display/intel_cdclk.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fbc.o
CC drivers/gpu/drm/i915/display/intel_cmtg.o
CC drivers/gpu/drm/i915/display/intel_color.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fdi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fifo_underrun.o
CC drivers/gpu/drm/i915/display/intel_combo_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_frontbuffer.o
CC drivers/gpu/drm/i915/display/intel_connector.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_global_state.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_gmbus.o
CC drivers/gpu/drm/i915/display/intel_crtc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp_gsc_message.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdmi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug.o
CC drivers/gpu/drm/i915/display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hti.o
CC drivers/gpu/drm/i915/display/intel_cursor.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_link_bw.o
CC drivers/gpu/drm/i915/display/intel_display.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_lspcon.o
CC drivers/gpu/drm/i915/display/intel_display_conversion.o
CC drivers/gpu/drm/i915/display/intel_display_driver.o
CC drivers/gpu/drm/i915/display/intel_display_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_lock.o
CC drivers/gpu/drm/i915/display/intel_display_params.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_setup.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_verify.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_panel.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pfit.o
CC drivers/gpu/drm/i915/display/intel_display_power.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pmdemand.o
CC drivers/gpu/drm/i915/display/intel_display_power_map.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pps.o
CC drivers/gpu/drm/i915/display/intel_display_power_well.o
CC drivers/gpu/drm/i915/display/intel_display_reset.o
CC drivers/gpu/drm/i915/display/intel_display_rpm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_psr.o
CC drivers/gpu/drm/i915/display/intel_display_rps.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_qp_tables.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_quirks.o
CC drivers/gpu/drm/i915/display/intel_display_snapshot.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_hdmi_pll.o
CC drivers/gpu/drm/i915/display/intel_display_wa.o
CC drivers/gpu/drm/i915/display/intel_dmc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_phy.o
CC drivers/gpu/drm/i915/display/intel_dmc_wl.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_tc.o
CC drivers/gpu/drm/i915/display/intel_dpio_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vblank.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vdsc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vga.o
CC drivers/gpu/drm/i915/display/intel_dpll.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vrr.o
CC drivers/gpu/drm/i915/display/intel_dpll_mgr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_wm.o
CC drivers/gpu/drm/i915/display/intel_dpt.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_scaler.o
CC drivers/gpu/drm/i915/display/intel_dpt_common.o
CC drivers/gpu/drm/i915/display/intel_drrs.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_universal_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_watermark.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_acpi.o
CC drivers/gpu/drm/i915/display/intel_dsb.o
CC drivers/gpu/drm/i915/display/intel_dsb_buffer.o
CC drivers/gpu/drm/i915/display/intel_fb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_opregion.o
CC drivers/gpu/drm/i915/display/intel_fb_bo.o
CC [M] drivers/gpu/drm/xe/xe_debugfs.o
CC drivers/gpu/drm/i915/display/intel_fb_pin.o
CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o
CC drivers/gpu/drm/i915/display/intel_fbc.o
CC drivers/gpu/drm/i915/display/intel_fdi.o
CC drivers/gpu/drm/i915/display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_stats.o
CC drivers/gpu/drm/i915/display/intel_frontbuffer.o
CC drivers/gpu/drm/i915/display/intel_global_state.o
CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o
CC drivers/gpu/drm/i915/display/intel_hdcp.o
CC drivers/gpu/drm/i915/display/intel_hdcp_gsc.o
CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o
CC drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.o
CC [M] drivers/gpu/drm/xe/xe_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs_params.o
CC drivers/gpu/drm/i915/display/intel_hotplug.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pipe_crc.o
CC drivers/gpu/drm/i915/display/intel_hotplug_irq.o
CC drivers/gpu/drm/i915/display/intel_hti.o
CC drivers/gpu/drm/i915/display/intel_link_bw.o
CC drivers/gpu/drm/i915/display/intel_load_detect.o
CC drivers/gpu/drm/i915/display/intel_lpe_audio.o
CC drivers/gpu/drm/i915/display/intel_modeset_lock.o
CC drivers/gpu/drm/i915/display/intel_modeset_setup.o
CC drivers/gpu/drm/i915/display/intel_modeset_verify.o
CC drivers/gpu/drm/i915/display/intel_overlay.o
CC drivers/gpu/drm/i915/display/intel_pch_display.o
CC drivers/gpu/drm/i915/display/intel_pch_refclk.o
CC drivers/gpu/drm/i915/display/intel_plane_initial.o
CC drivers/gpu/drm/i915/display/intel_pmdemand.o
CC drivers/gpu/drm/i915/display/intel_psr.o
CC drivers/gpu/drm/i915/display/intel_quirks.o
CC drivers/gpu/drm/i915/display/intel_sprite.o
CC drivers/gpu/drm/i915/display/intel_sprite_uapi.o
CC drivers/gpu/drm/i915/display/intel_tc.o
CC drivers/gpu/drm/i915/display/intel_vblank.o
CC drivers/gpu/drm/i915/display/intel_vga.o
CC drivers/gpu/drm/i915/display/intel_wm.o
CC drivers/gpu/drm/i915/display/skl_scaler.o
CC drivers/gpu/drm/i915/display/skl_universal_plane.o
CC drivers/gpu/drm/i915/display/skl_watermark.o
CC drivers/gpu/drm/i915/display/intel_acpi.o
CC drivers/gpu/drm/i915/display/intel_opregion.o
CC drivers/gpu/drm/i915/display/intel_display_debugfs.o
CC drivers/gpu/drm/i915/display/intel_display_debugfs_params.o
CC drivers/gpu/drm/i915/display/intel_pipe_crc.o
CC drivers/gpu/drm/i915/display/dvo_ch7017.o
CC drivers/gpu/drm/i915/display/dvo_ch7xxx.o
CC drivers/gpu/drm/i915/display/dvo_ivch.o
CC drivers/gpu/drm/i915/display/dvo_ns2501.o
CC drivers/gpu/drm/i915/display/dvo_sil164.o
CC drivers/gpu/drm/i915/display/dvo_tfp410.o
CC drivers/gpu/drm/i915/display/g4x_dp.o
CC drivers/gpu/drm/i915/display/g4x_hdmi.o
CC drivers/gpu/drm/i915/display/icl_dsi.o
CC drivers/gpu/drm/i915/display/intel_backlight.o
CC drivers/gpu/drm/i915/display/intel_crt.o
CC drivers/gpu/drm/i915/display/intel_cx0_phy.o
CC drivers/gpu/drm/i915/display/intel_ddi.o
CC drivers/gpu/drm/i915/display/intel_ddi_buf_trans.o
CC drivers/gpu/drm/i915/display/intel_display_device.o
CC drivers/gpu/drm/i915/display/intel_display_trace.o
CC drivers/gpu/drm/i915/display/intel_dkl_phy.o
CC drivers/gpu/drm/i915/display/intel_dp.o
CC drivers/gpu/drm/i915/display/intel_dp_aux.o
CC drivers/gpu/drm/i915/display/intel_dp_aux_backlight.o
CC drivers/gpu/drm/i915/display/intel_dp_hdcp.o
CC drivers/gpu/drm/i915/display/intel_dp_link_training.o
CC drivers/gpu/drm/i915/display/intel_dp_mst.o
CC drivers/gpu/drm/i915/display/intel_dp_test.o
CC drivers/gpu/drm/i915/display/intel_dsi.o
CC drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.o
CC drivers/gpu/drm/i915/display/intel_dsi_vbt.o
CC drivers/gpu/drm/i915/display/intel_dvo.o
CC drivers/gpu/drm/i915/display/intel_encoder.o
CC drivers/gpu/drm/i915/display/intel_gmbus.o
CC drivers/gpu/drm/i915/display/intel_hdmi.o
CC drivers/gpu/drm/i915/display/intel_lspcon.o
CC drivers/gpu/drm/i915/display/intel_lvds.o
CC drivers/gpu/drm/i915/display/intel_panel.o
CC drivers/gpu/drm/i915/display/intel_pfit.o
CC drivers/gpu/drm/i915/display/intel_pps.o
CC drivers/gpu/drm/i915/display/intel_qp_tables.o
CC drivers/gpu/drm/i915/display/intel_sdvo.o
CC drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.o
CC drivers/gpu/drm/i915/display/intel_snps_phy.o
CC drivers/gpu/drm/i915/display/intel_tv.o
CC drivers/gpu/drm/i915/display/intel_vdsc.o
CC drivers/gpu/drm/i915/display/intel_vrr.o
CC drivers/gpu/drm/i915/display/vlv_dsi.o
CC drivers/gpu/drm/i915/display/vlv_dsi_pll.o
CC drivers/gpu/drm/i915/i915_perf.o
CC drivers/gpu/drm/i915/pxp/intel_pxp.o
CC drivers/gpu/drm/i915/pxp/intel_pxp_huc.o
CC drivers/gpu/drm/i915/pxp/intel_pxp_tee.o
CC drivers/gpu/drm/i915/i915_gpu_error.o
CC drivers/gpu/drm/i915/i915_vgpu.o
LD [M] drivers/gpu/drm/xe/xe.o
AR drivers/gpu/drm/i915/built-in.a
AR drivers/gpu/drm/built-in.a
AR drivers/gpu/built-in.a
AR drivers/built-in.a
AR built-in.a
AR vmlinux.a
LD vmlinux.o
OBJCOPY modules.builtin.modinfo
GEN modules.builtin
MODPOST Module.symvers
CC .vmlinux.export.o
CC [M] fs/efivarfs/efivarfs.mod.o
CC [M] .module-common.o
CC [M] drivers/gpu/drm/drm_exec.mod.o
CC [M] drivers/gpu/drm/drm_gpuvm.mod.o
CC [M] drivers/gpu/drm/drm_suballoc_helper.mod.o
CC [M] drivers/gpu/drm/drm_ttm_helper.mod.o
CC [M] drivers/gpu/drm/scheduler/gpu-sched.mod.o
CC [M] drivers/gpu/drm/xe/xe.mod.o
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.mod.o
CC [M] net/netfilter/nf_log_syslog.mod.o
CC [M] net/netfilter/xt_mark.mod.o
CC [M] net/netfilter/xt_nat.mod.o
CC [M] net/netfilter/xt_LOG.mod.o
CC [M] net/netfilter/xt_MASQUERADE.mod.o
CC [M] net/netfilter/xt_addrtype.mod.o
CC [M] net/ipv4/netfilter/iptable_nat.mod.o
LD [M] drivers/gpu/drm/scheduler/gpu-sched.ko
LD [M] drivers/thermal/intel/x86_pkg_temp_thermal.ko
LD [M] drivers/gpu/drm/drm_exec.ko
LD [M] drivers/gpu/drm/drm_ttm_helper.ko
LD [M] net/netfilter/xt_nat.ko
LD [M] net/netfilter/xt_MASQUERADE.ko
LD [M] fs/efivarfs/efivarfs.ko
LD [M] drivers/gpu/drm/drm_gpuvm.ko
LD [M] drivers/gpu/drm/xe/xe.ko
LD [M] net/netfilter/xt_LOG.ko
LD [M] net/ipv4/netfilter/iptable_nat.ko
LD [M] drivers/gpu/drm/drm_suballoc_helper.ko
LD [M] net/netfilter/xt_addrtype.ko
LD [M] net/netfilter/xt_mark.ko
LD [M] net/netfilter/nf_log_syslog.ko
UPD include/generated/utsversion.h
CC init/version-timestamp.o
KSYMS .tmp_vmlinux0.kallsyms.S
AS .tmp_vmlinux0.kallsyms.o
LD .tmp_vmlinux1
NM .tmp_vmlinux1.syms
KSYMS .tmp_vmlinux1.kallsyms.S
AS .tmp_vmlinux1.kallsyms.o
LD .tmp_vmlinux2
NM .tmp_vmlinux2.syms
KSYMS .tmp_vmlinux2.kallsyms.S
AS .tmp_vmlinux2.kallsyms.o
LD vmlinux
NM System.map
SORTTAB vmlinux
RELOCS arch/x86/boot/compressed/vmlinux.relocs
RSTRIP vmlinux
CC arch/x86/boot/a20.o
AS arch/x86/boot/bioscall.o
CC arch/x86/boot/cmdline.o
AS arch/x86/boot/copy.o
HOSTCC arch/x86/boot/mkcpustr
CC arch/x86/boot/cpuflags.o
CC arch/x86/boot/cpucheck.o
CC arch/x86/boot/early_serial_console.o
CC arch/x86/boot/edd.o
CC arch/x86/boot/main.o
CC arch/x86/boot/memory.o
CC arch/x86/boot/pm.o
AS arch/x86/boot/pmjump.o
CC arch/x86/boot/printf.o
CC arch/x86/boot/regs.o
CC arch/x86/boot/string.o
CC arch/x86/boot/tty.o
CC arch/x86/boot/video.o
CC arch/x86/boot/video-mode.o
CC arch/x86/boot/version.o
CC arch/x86/boot/video-vga.o
CC arch/x86/boot/video-vesa.o
CC arch/x86/boot/video-bios.o
HOSTCC arch/x86/boot/tools/build
CPUSTR arch/x86/boot/cpustr.h
LDS arch/x86/boot/compressed/vmlinux.lds
AS arch/x86/boot/compressed/kernel_info.o
AS arch/x86/boot/compressed/head_32.o
CC arch/x86/boot/cpu.o
VOFFSET arch/x86/boot/compressed/../voffset.h
CC arch/x86/boot/compressed/string.o
CC arch/x86/boot/compressed/cmdline.o
CC arch/x86/boot/compressed/error.o
OBJCOPY arch/x86/boot/compressed/vmlinux.bin
HOSTCC arch/x86/boot/compressed/mkpiggy
CC arch/x86/boot/compressed/cpuflags.o
CC arch/x86/boot/compressed/early_serial_console.o
CC arch/x86/boot/compressed/kaslr.o
CC arch/x86/boot/compressed/acpi.o
CC arch/x86/boot/compressed/efi.o
GZIP arch/x86/boot/compressed/vmlinux.bin.gz
CC arch/x86/boot/compressed/misc.o
MKPIGGY arch/x86/boot/compressed/piggy.S
AS arch/x86/boot/compressed/piggy.o
LD arch/x86/boot/compressed/vmlinux
ZOFFSET arch/x86/boot/zoffset.h
OBJCOPY arch/x86/boot/vmlinux.bin
AS arch/x86/boot/header.o
LD arch/x86/boot/setup.elf
OBJCOPY arch/x86/boot/setup.bin
BUILD arch/x86/boot/bzImage
Kernel: arch/x86/boot/bzImage is ready (#1)
run-parts: executing /workspace/ci/hooks/20-kernel-doc
+ SRC_DIR=/workspace/kernel
+ cd /workspace/kernel
+ find drivers/gpu/drm/xe/ -name '*.[ch]' -not -path 'drivers/gpu/drm/xe/display/*'
+ xargs ./scripts/kernel-doc -Werror -none include/uapi/drm/xe_drm.h
All hooks done
^ permalink raw reply [flat|nested] 16+ messages in thread* ✗ CI.checksparse: warning for drm/i915/wm: convert to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
` (11 preceding siblings ...)
2025-04-04 5:29 ` ✓ CI.Hooks: " Patchwork
@ 2025-04-04 5:30 ` Patchwork
2025-04-04 5:50 ` ✓ Xe.CI.BAT: success " Patchwork
2025-04-04 14:49 ` ✗ Xe.CI.Full: failure " Patchwork
14 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-04-04 5:30 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/wm: convert to struct intel_display
URL : https://patchwork.freedesktop.org/series/147192/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast bc18da45d48d337b92a7ff9546ba61da32b3b586
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_display_types.h:1978:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1978:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1978:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1978:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1978:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1978:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1978:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1978:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1978:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1978:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1978:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1978:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1991:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1991:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_psr.c: note: in included file:
+drivers/gpu/drm/i915/gt/intel_reset.c:1571:12: warning: context imbalance in '_intel_gt_reset_lock' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_active.c:1063:16: warning: context imbalance in '__i915_active_fence_set' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: expected struct list_head const *list
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: got struct list_head [noderef] __rcu *pos
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head [noderef] __rcu *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head [noderef] __rcu *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/i915_irq.c:491:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:491:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:499:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:499:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:504:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:504:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:504:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:542:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:542:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:550:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:550:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:555:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:555:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:555:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:599:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:599:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:602:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:602:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:606:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:606:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:613:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:613:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:613:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:613:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/intel_uncore.c:1925:1: warning: context imbalance in 'fwtable_read8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1926:1: warning: context imbalance in 'fwtable_read16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1927:1: warning: context imbalance in 'fwtable_read32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1928:1: warning: context imbalance in 'fwtable_read64' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1993:1: warning: context imbalance in 'gen6_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1994:1: warning: context imbalance in 'gen6_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1995:1: warning: context imbalance in 'gen6_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2015:1: warning: context imbalance in 'fwtable_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2016:1: warning: context imbalance in 'fwtable_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2017:1: warning: context imbalance in 'fwtable_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_wakeref.c:145:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915/wm: convert to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
` (12 preceding siblings ...)
2025-04-04 5:30 ` ✗ CI.checksparse: warning " Patchwork
@ 2025-04-04 5:50 ` Patchwork
2025-04-04 14:49 ` ✗ Xe.CI.Full: failure " Patchwork
14 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-04-04 5:50 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 3686 bytes --]
== Series Details ==
Series: drm/i915/wm: convert to struct intel_display
URL : https://patchwork.freedesktop.org/series/147192/
State : success
== Summary ==
CI Bug Log - changes from xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586_BAT -> xe-pw-147192v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 8)
------------------------------
Missing (1): bat-adlp-vm
Known issues
------------
Here are the changes found in xe-pw-147192v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_evict@evict-beng-small-cm:
- bat-adlp-vf: NOTRUN -> [SKIP][1] ([Intel XE#261] / [Intel XE#688]) +9 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/bat-adlp-vf/igt@xe_evict@evict-beng-small-cm.html
* igt@xe_exec_fault_mode@twice-rebind:
- bat-adlp-vf: NOTRUN -> [SKIP][2] ([Intel XE#288]) +32 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/bat-adlp-vf/igt@xe_exec_fault_mode@twice-rebind.html
* igt@xe_live_ktest@xe_bo:
- bat-adlp-vf: NOTRUN -> [SKIP][3] ([Intel XE#2229] / [Intel XE#455]) +2 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/bat-adlp-vf/igt@xe_live_ktest@xe_bo.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- bat-adlp-vf: NOTRUN -> [SKIP][4] ([Intel XE#2229])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/bat-adlp-vf/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
* igt@xe_pat@pat-index-xe2:
- bat-adlp-vf: NOTRUN -> [SKIP][5] ([Intel XE#977])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/bat-adlp-vf/igt@xe_pat@pat-index-xe2.html
* igt@xe_pat@pat-index-xehpc:
- bat-adlp-vf: NOTRUN -> [SKIP][6] ([Intel XE#2838] / [Intel XE#979])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/bat-adlp-vf/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelpg:
- bat-adlp-vf: NOTRUN -> [SKIP][7] ([Intel XE#979])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/bat-adlp-vf/igt@xe_pat@pat-index-xelpg.html
#### Possible fixes ####
* igt@xe_pat@pat-index-xelp@render:
- bat-adlp-vf: [ABORT][8] ([Intel XE#3970]) -> [PASS][9] +1 other test pass
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/bat-adlp-vf/igt@xe_pat@pat-index-xelp@render.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/bat-adlp-vf/igt@xe_pat@pat-index-xelp@render.html
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
Build changes
-------------
* Linux: xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586 -> xe-pw-147192v1
IGT_8304: 8304
xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586: bc18da45d48d337b92a7ff9546ba61da32b3b586
xe-pw-147192v1: 147192v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/index.html
[-- Attachment #2: Type: text/html, Size: 4561 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread* ✗ Xe.CI.Full: failure for drm/i915/wm: convert to struct intel_display
2025-04-03 9:11 [PATCH 0/7] drm/i915/wm: convert to struct intel_display Jani Nikula
` (13 preceding siblings ...)
2025-04-04 5:50 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2025-04-04 14:49 ` Patchwork
14 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-04-04 14:49 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 79946 bytes --]
== Series Details ==
Series: drm/i915/wm: convert to struct intel_display
URL : https://patchwork.freedesktop.org/series/147192/
State : failure
== Summary ==
CI Bug Log - changes from xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586_FULL -> xe-pw-147192v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-147192v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-147192v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-147192v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_render_copy@render-hstripes@render-linear-256x256:
- shard-lnl: [PASS][1] -> [ABORT][2] +1 other test abort
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-5/igt@xe_render_copy@render-hstripes@render-linear-256x256.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-3/igt@xe_render_copy@render-hstripes@render-linear-256x256.html
Known issues
------------
Here are the changes found in xe-pw-147192v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-b-hdmi-a-6-4-mc-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][3] ([Intel XE#3767]) +7 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-b-hdmi-a-6-4-mc-ccs.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-dp-4-4-mc-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][4] ([Intel XE#2550] / [Intel XE#3767]) +7 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-466/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-dp-4-4-mc-ccs.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#2327])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][6] ([Intel XE#316]) +1 other test skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-90:
- shard-adlp: NOTRUN -> [SKIP][7] ([Intel XE#316])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-180:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#1124]) +2 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-dg2-set2: NOTRUN -> [SKIP][9] ([Intel XE#1124])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
- shard-adlp: NOTRUN -> [SKIP][10] ([Intel XE#1124]) +3 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
- shard-dg2-set2: [PASS][11] -> [SKIP][12] ([Intel XE#2191])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-435/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
- shard-adlp: NOTRUN -> [SKIP][13] ([Intel XE#2191])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
* igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][14] ([Intel XE#2191])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-2-displays-2160x1440p:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#367])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-8/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-2-displays-2560x1440p:
- shard-adlp: NOTRUN -> [SKIP][16] ([Intel XE#367]) +1 other test skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-4-displays-3840x2160p:
- shard-dg2-set2: NOTRUN -> [SKIP][17] ([Intel XE#367])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][18] ([Intel XE#455] / [Intel XE#787]) +24 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-433/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2887]) +3 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][20] ([Intel XE#787]) +20 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-adlp: NOTRUN -> [SKIP][21] ([Intel XE#3442])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#3432])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][23] ([Intel XE#787]) +90 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-433/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-dp-4:
- shard-dg2-set2: [PASS][24] -> [INCOMPLETE][25] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) +1 other test incomplete
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-dp-4.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-adlp: NOTRUN -> [SKIP][26] ([Intel XE#455] / [Intel XE#787]) +13 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
- shard-dg2-set2: [PASS][27] -> [INCOMPLETE][28] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_cdclk@mode-transition@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#4417]) +3 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html
* igt@kms_chamelium_audio@dp-audio:
- shard-dg2-set2: NOTRUN -> [SKIP][30] ([Intel XE#373]) +2 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_chamelium_audio@dp-audio.html
* igt@kms_chamelium_edid@hdmi-edid-read:
- shard-adlp: NOTRUN -> [SKIP][31] ([Intel XE#373])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_chamelium_edid@hdmi-edid-read.html
* igt@kms_chamelium_edid@vga-edid-read:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#2252])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_chamelium_edid@vga-edid-read.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-adlp: NOTRUN -> [SKIP][33] ([Intel XE#307])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][34] ([Intel XE#1178]) +2 other tests fail
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-1/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html
* igt@kms_cursor_edge_walk@128x128-right-edge@pipe-a-hdmi-a-1:
- shard-adlp: NOTRUN -> [DMESG-WARN][35] ([Intel XE#4173]) +6 other tests dmesg-warn
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_cursor_edge_walk@128x128-right-edge@pipe-a-hdmi-a-1.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic:
- shard-dg2-set2: NOTRUN -> [SKIP][36] ([Intel XE#309])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [PASS][37] -> [SKIP][38] ([Intel XE#2291]) +6 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-4/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
- shard-adlp: NOTRUN -> [SKIP][39] ([Intel XE#309])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-dg2-set2: NOTRUN -> [SKIP][40] ([Intel XE#323])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_cursor_legacy@single-move:
- shard-bmg: NOTRUN -> [INCOMPLETE][41] ([Intel XE#3226]) +1 other test incomplete
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_cursor_legacy@single-move.html
* igt@kms_display_modes@extended-mode-basic:
- shard-dg2-set2: [PASS][42] -> [SKIP][43] ([Intel XE#4302])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-433/igt@kms_display_modes@extended-mode-basic.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dp_aux_dev:
- shard-dg2-set2: [PASS][44] -> [SKIP][45] ([Intel XE#3009])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-463/igt@kms_dp_aux_dev.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_dp_aux_dev.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-adlp: NOTRUN -> [SKIP][46] ([Intel XE#4354])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-dg2-set2: NOTRUN -> [SKIP][47] ([Intel XE#4331])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#4422])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-8/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
* igt@kms_feature_discovery@display-2x:
- shard-dg2-set2: [PASS][49] -> [SKIP][50] ([Intel XE#702])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-463/igt@kms_feature_discovery@display-2x.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_feature_discovery@display-2x.html
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-adlp: NOTRUN -> [SKIP][51] ([Intel XE#310]) +1 other test skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-dp2-hdmi-a3:
- shard-bmg: [PASS][52] -> [FAIL][53] ([Intel XE#3321]) +2 other tests fail
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-dp2-hdmi-a3.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-dp2-hdmi-a3.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ad-hdmi-a6-dp4:
- shard-dg2-set2: [PASS][54] -> [FAIL][55] ([Intel XE#301]) +2 other tests fail
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-433/igt@kms_flip@2x-flip-vs-expired-vblank@ad-hdmi-a6-dp4.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_flip@2x-flip-vs-expired-vblank@ad-hdmi-a6-dp4.html
* igt@kms_flip@2x-flip-vs-panning-interruptible:
- shard-bmg: [PASS][56] -> [SKIP][57] ([Intel XE#2316]) +3 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-6/igt@kms_flip@2x-flip-vs-panning-interruptible.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-4/igt@kms_flip@2x-flip-vs-panning-interruptible.html
* igt@kms_flip@2x-plain-flip-ts-check-interruptible:
- shard-dg2-set2: [PASS][58] -> [SKIP][59] ([Intel XE#310]) +10 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-463/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
- shard-adlp: NOTRUN -> [SKIP][60] ([Intel XE#455]) +5 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#2293] / [Intel XE#2380])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2293])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][63] ([Intel XE#656]) +5 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#2311]) +4 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-move:
- shard-dg2-set2: NOTRUN -> [SKIP][65] ([Intel XE#651]) +7 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#4141]) +2 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][67] ([Intel XE#2050])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
- shard-dg2-set2: [PASS][68] -> [SKIP][69] ([Intel XE#656]) +14 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-433/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move:
- shard-dg2-set2: NOTRUN -> [SKIP][70] ([Intel XE#656]) +5 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-adlp: NOTRUN -> [SKIP][71] ([Intel XE#651]) +2 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-adlp: NOTRUN -> [SKIP][72] ([Intel XE#653]) +5 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][73] ([Intel XE#653]) +6 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][74] ([Intel XE#2313]) +4 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#2352])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_hdr@invalid-hdr:
- shard-dg2-set2: NOTRUN -> [SKIP][76] ([Intel XE#455]) +4 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_hdr@invalid-hdr.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-dg2-set2: [PASS][77] -> [SKIP][78] ([Intel XE#4328])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-433/igt@kms_joiner@basic-force-big-joiner.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-bmg: [PASS][79] -> [SKIP][80] ([Intel XE#3012])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-8/igt@kms_joiner@invalid-modeset-force-big-joiner.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-4/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_plane@pixel-format-source-clamping:
- shard-adlp: NOTRUN -> [INCOMPLETE][81] ([Intel XE#1035])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_plane@pixel-format-source-clamping.html
* igt@kms_plane@pixel-format-source-clamping@pipe-a-plane-3:
- shard-adlp: NOTRUN -> [WARN][82] ([Intel XE#2078])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_plane@pixel-format-source-clamping@pipe-a-plane-3.html
* igt@kms_plane_cursor@overlay@pipe-c-hdmi-a-6-size-128:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][83] ([Intel XE#3966])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-433/igt@kms_plane_cursor@overlay@pipe-c-hdmi-a-6-size-128.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-dg2-set2: [PASS][84] -> [SKIP][85] ([Intel XE#4596])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-435/igt@kms_plane_multiple@2x-tiling-none.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-dg2-set2: [PASS][86] -> [SKIP][87] ([Intel XE#309]) +5 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-463/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation:
- shard-adlp: NOTRUN -> [SKIP][88] ([Intel XE#2763] / [Intel XE#455]) +1 other test skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-a:
- shard-adlp: NOTRUN -> [SKIP][89] ([Intel XE#2763]) +2 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-a.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b:
- shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#2763]) +4 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
- shard-dg2-set2: NOTRUN -> [SKIP][91] ([Intel XE#2763] / [Intel XE#455]) +1 other test skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b:
- shard-dg2-set2: NOTRUN -> [SKIP][92] ([Intel XE#2763]) +2 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b.html
* igt@kms_pm_dc@dc9-dpms:
- shard-adlp: NOTRUN -> [SKIP][93] ([Intel XE#734])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-dg2-set2: [PASS][94] -> [SKIP][95] ([Intel XE#836])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-433/igt@kms_pm_rpm@modeset-non-lpsp.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area:
- shard-adlp: NOTRUN -> [SKIP][96] ([Intel XE#1489]) +1 other test skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
- shard-dg2-set2: NOTRUN -> [SKIP][97] ([Intel XE#1489]) +1 other test skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#1489])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-8/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html
* igt@kms_psr@fbc-psr-primary-blt:
- shard-adlp: NOTRUN -> [SKIP][99] ([Intel XE#2850] / [Intel XE#929]) +1 other test skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_psr@fbc-psr-primary-blt.html
* igt@kms_psr@pr-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][100] ([Intel XE#2850] / [Intel XE#929]) +6 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_psr@pr-dpms.html
* igt@kms_psr@psr2-sprite-blt:
- shard-bmg: NOTRUN -> [SKIP][101] ([Intel XE#2234] / [Intel XE#2850]) +6 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_psr@psr2-sprite-blt.html
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-adlp: NOTRUN -> [DMESG-FAIL][102] ([Intel XE#4173])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1:
- shard-lnl: [PASS][103] -> [FAIL][104] ([Intel XE#771])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-6/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-7/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html
* igt@kms_vrr@negative-basic:
- shard-bmg: [PASS][105] -> [SKIP][106] ([Intel XE#1499])
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-6/igt@kms_vrr@negative-basic.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-4/igt@kms_vrr@negative-basic.html
- shard-dg2-set2: [PASS][107] -> [SKIP][108] ([Intel XE#455])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-433/igt@kms_vrr@negative-basic.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_vrr@negative-basic.html
* igt@xe_copy_basic@mem-set-linear-0x3fff:
- shard-dg2-set2: NOTRUN -> [SKIP][109] ([Intel XE#1126])
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@xe_copy_basic@mem-set-linear-0x3fff.html
* igt@xe_eudebug@basic-vm-bind-metadata-discovery:
- shard-dg2-set2: NOTRUN -> [SKIP][110] ([Intel XE#2905]) +3 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html
* igt@xe_eudebug_online@breakpoint-not-in-debug-mode:
- shard-adlp: NOTRUN -> [SKIP][111] ([Intel XE#2905]) +3 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@xe_eudebug_online@breakpoint-not-in-debug-mode.html
* igt@xe_eudebug_online@interrupt-all:
- shard-bmg: NOTRUN -> [SKIP][112] ([Intel XE#2905]) +2 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@xe_eudebug_online@interrupt-all.html
* igt@xe_eudebug_sriov@deny-eudebug:
- shard-dg2-set2: NOTRUN -> [SKIP][113] ([Intel XE#4518])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@xe_eudebug_sriov@deny-eudebug.html
- shard-bmg: NOTRUN -> [SKIP][114] ([Intel XE#4518])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@xe_eudebug_sriov@deny-eudebug.html
* igt@xe_evict@evict-beng-small-external-cm:
- shard-adlp: NOTRUN -> [SKIP][115] ([Intel XE#261] / [Intel XE#688]) +1 other test skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@xe_evict@evict-beng-small-external-cm.html
* igt@xe_exec_basic@multigpu-once-basic-defer-bind:
- shard-adlp: NOTRUN -> [SKIP][116] ([Intel XE#1392])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@xe_exec_basic@multigpu-once-basic-defer-bind.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][117] ([Intel XE#2322]) +1 other test skip
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-8/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html
* igt@xe_exec_fault_mode@many-execqueues-userptr-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][118] ([Intel XE#288]) +5 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@xe_exec_fault_mode@many-execqueues-userptr-imm.html
* igt@xe_exec_fault_mode@twice-userptr-rebind:
- shard-adlp: NOTRUN -> [SKIP][119] ([Intel XE#288]) +3 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@xe_exec_fault_mode@twice-userptr-rebind.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init:
- shard-adlp: [PASS][120] -> [DMESG-WARN][121] ([Intel XE#4173]) +11 other tests dmesg-warn
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-6/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-1/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html
* igt@xe_huc_copy@huc_copy:
- shard-dg2-set2: NOTRUN -> [SKIP][122] ([Intel XE#255])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@xe_huc_copy@huc_copy.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- shard-adlp: NOTRUN -> [SKIP][123] ([Intel XE#2229])
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
* igt@xe_mmap@pci-membarrier-parallel:
- shard-adlp: NOTRUN -> [SKIP][124] ([Intel XE#4045])
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@xe_mmap@pci-membarrier-parallel.html
* igt@xe_module_load@many-reload:
- shard-adlp: NOTRUN -> [DMESG-WARN][125] ([Intel XE#2953] / [Intel XE#4173])
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@xe_module_load@many-reload.html
* igt@xe_oa@oa-unit-exclusive-stream-exec-q:
- shard-adlp: NOTRUN -> [SKIP][126] ([Intel XE#2541] / [Intel XE#3573]) +1 other test skip
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@xe_oa@oa-unit-exclusive-stream-exec-q.html
* igt@xe_oa@unprivileged-single-ctx-counters:
- shard-dg2-set2: NOTRUN -> [SKIP][127] ([Intel XE#2541] / [Intel XE#3573]) +1 other test skip
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@xe_oa@unprivileged-single-ctx-counters.html
* igt@xe_pm@d3cold-mmap-vram:
- shard-adlp: NOTRUN -> [SKIP][128] ([Intel XE#2284] / [Intel XE#366])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@xe_pm@d3cold-mmap-vram.html
* igt@xe_pm@s4-vm-bind-unbind-all:
- shard-adlp: [PASS][129] -> [ABORT][130] ([Intel XE#1794]) +1 other test abort
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-8/igt@xe_pm@s4-vm-bind-unbind-all.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-9/igt@xe_pm@s4-vm-bind-unbind-all.html
* igt@xe_pmu@fn-engine-activity-sched-if-idle:
- shard-dg2-set2: NOTRUN -> [SKIP][131] ([Intel XE#4650])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
* igt@xe_query@multigpu-query-invalid-extension:
- shard-adlp: NOTRUN -> [SKIP][132] ([Intel XE#944]) +1 other test skip
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@xe_query@multigpu-query-invalid-extension.html
* igt@xe_query@multigpu-query-oa-units:
- shard-dg2-set2: NOTRUN -> [SKIP][133] ([Intel XE#944])
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@xe_query@multigpu-query-oa-units.html
* igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs:
- shard-bmg: NOTRUN -> [SKIP][134] ([Intel XE#4130])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html
#### Possible fixes ####
* igt@kms_async_flips@crc-atomic@pipe-c-hdmi-a-1:
- shard-adlp: [FAIL][135] ([Intel XE#3884]) -> [PASS][136]
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-1/igt@kms_async_flips@crc-atomic@pipe-c-hdmi-a-1.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@kms_async_flips@crc-atomic@pipe-c-hdmi-a-1.html
* igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1:
- shard-adlp: [FAIL][137] ([Intel XE#3908]) -> [PASS][138] +1 other test pass
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-2/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-6/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
* igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
- shard-dg2-set2: [SKIP][139] ([Intel XE#2191]) -> [PASS][140]
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-464/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-433/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [INCOMPLETE][141] ([Intel XE#3862]) -> [PASS][142]
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
- shard-dg2-set2: [SKIP][143] ([Intel XE#309]) -> [PASS][144] +1 other test pass
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-464/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-433/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
- shard-bmg: [SKIP][145] ([Intel XE#2291]) -> [PASS][146] +3 other tests pass
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
* igt@kms_display_modes@extended-mode-basic:
- shard-bmg: [SKIP][147] ([Intel XE#4302]) -> [PASS][148]
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-4/igt@kms_display_modes@extended-mode-basic.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-3/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_flip@2x-dpms-vs-vblank-race:
- shard-dg2-set2: [SKIP][149] ([Intel XE#310]) -> [PASS][150] +11 other tests pass
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-464/igt@kms_flip@2x-dpms-vs-vblank-race.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-433/igt@kms_flip@2x-dpms-vs-vblank-race.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3:
- shard-bmg: [FAIL][151] ([Intel XE#3321]) -> [PASS][152] +1 other test pass
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html
* igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-bmg: [SKIP][153] ([Intel XE#2316]) -> [PASS][154]
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-4/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-1/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@c-edp1:
- shard-lnl: [FAIL][155] ([Intel XE#886]) -> [PASS][156] +1 other test pass
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-6/igt@kms_flip@flip-vs-blocking-wf-vblank@c-edp1.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-7/igt@kms_flip@flip-vs-blocking-wf-vblank@c-edp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a6:
- shard-dg2-set2: [FAIL][157] ([Intel XE#301]) -> [PASS][158] +4 other tests pass
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-464/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a6.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a6.html
* igt@kms_flip@flip-vs-suspend:
- shard-bmg: [INCOMPLETE][159] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][160] +1 other test pass
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-3/igt@kms_flip@flip-vs-suspend.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_flip@flip-vs-suspend.html
- shard-dg2-set2: [INCOMPLETE][161] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][162] +1 other test pass
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-433/igt@kms_flip@flip-vs-suspend.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_flip@flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt:
- shard-dg2-set2: [SKIP][163] ([Intel XE#656]) -> [PASS][164] +7 other tests pass
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-bmg: [SKIP][165] ([Intel XE#3012]) -> [PASS][166]
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-4/igt@kms_joiner@basic-force-big-joiner.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-3/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-dg2-set2: [SKIP][167] ([Intel XE#4596]) -> [PASS][168] +1 other test pass
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-464/igt@kms_plane_multiple@2x-tiling-4.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-dg2-set2: [SKIP][169] ([Intel XE#836]) -> [PASS][170] +1 other test pass
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-464/igt@kms_pm_rpm@dpms-non-lpsp.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-466/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-dg2-set2: [SKIP][171] ([Intel XE#455]) -> [PASS][172]
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-464/igt@kms_setmode@invalid-clone-single-crtc.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-a-hdmi-a-6-dp-4:
- shard-dg2-set2: [ABORT][173] ([Intel XE#4540]) -> [PASS][174] +1 other test pass
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-463/igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-a-hdmi-a-6-dp-4.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-a-hdmi-a-6-dp-4.html
* igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-b-hdmi-a-6-dp-4:
- shard-dg2-set2: [DMESG-WARN][175] ([Intel XE#4212]) -> [PASS][176]
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-463/igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-b-hdmi-a-6-dp-4.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-b-hdmi-a-6-dp-4.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1:
- shard-lnl: [FAIL][177] ([Intel XE#771]) -> [PASS][178]
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-6/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-7/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html
* igt@kms_vblank@query-busy@pipe-d-hdmi-a-3:
- shard-bmg: [INCOMPLETE][179] ([Intel XE#4488]) -> [PASS][180] +1 other test pass
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-7/igt@kms_vblank@query-busy@pipe-d-hdmi-a-3.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_vblank@query-busy@pipe-d-hdmi-a-3.html
* igt@xe_compute_preempt@compute-preempt-many:
- shard-bmg: [FAIL][181] ([Intel XE#4278]) -> [PASS][182] +1 other test pass
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-1/igt@xe_compute_preempt@compute-preempt-many.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@xe_compute_preempt@compute-preempt-many.html
* igt@xe_exec_basic@many-userptr-rebind:
- shard-adlp: [INCOMPLETE][183] -> [PASS][184]
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-2/igt@xe_exec_basic@many-userptr-rebind.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@xe_exec_basic@many-userptr-rebind.html
* igt@xe_exec_basic@multigpu-once-null:
- shard-dg2-set2: [SKIP][185] ([Intel XE#1392]) -> [PASS][186] +6 other tests pass
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-432/igt@xe_exec_basic@multigpu-once-null.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-433/igt@xe_exec_basic@multigpu-once-null.html
* igt@xe_module_load@load:
- shard-lnl: ([PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [SKIP][194], [PASS][195], [PASS][196], [PASS][197], [PASS][198], [PASS][199], [PASS][200], [PASS][201], [PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207], [PASS][208], [PASS][209], [PASS][210], [PASS][211], [PASS][212]) ([Intel XE#378]) -> ([PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [PASS][221], [PASS][222], [PASS][223], [PASS][224], [PASS][225], [PASS][226], [PASS][227], [PASS][228], [PASS][229], [PASS][230], [PASS][231], [PASS][232], [PASS][233], [PASS][234], [PASS][235], [PASS][236], [PASS][237])
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-8/igt@xe_module_load@load.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-8/igt@xe_module_load@load.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-2/igt@xe_module_load@load.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-2/igt@xe_module_load@load.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-7/igt@xe_module_load@load.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-5/igt@xe_module_load@load.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-5/igt@xe_module_load@load.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-5/igt@xe_module_load@load.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-4/igt@xe_module_load@load.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-4/igt@xe_module_load@load.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-4/igt@xe_module_load@load.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-8/igt@xe_module_load@load.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-6/igt@xe_module_load@load.html
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-6/igt@xe_module_load@load.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-8/igt@xe_module_load@load.html
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-6/igt@xe_module_load@load.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-7/igt@xe_module_load@load.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-7/igt@xe_module_load@load.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-3/igt@xe_module_load@load.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-3/igt@xe_module_load@load.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-1/igt@xe_module_load@load.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-1/igt@xe_module_load@load.html
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-2/igt@xe_module_load@load.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-5/igt@xe_module_load@load.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-1/igt@xe_module_load@load.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-3/igt@xe_module_load@load.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-2/igt@xe_module_load@load.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-2/igt@xe_module_load@load.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-2/igt@xe_module_load@load.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-3/igt@xe_module_load@load.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-3/igt@xe_module_load@load.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-3/igt@xe_module_load@load.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-3/igt@xe_module_load@load.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-1/igt@xe_module_load@load.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-1/igt@xe_module_load@load.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-7/igt@xe_module_load@load.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-6/igt@xe_module_load@load.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-6/igt@xe_module_load@load.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-6/igt@xe_module_load@load.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-7/igt@xe_module_load@load.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-7/igt@xe_module_load@load.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-5/igt@xe_module_load@load.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-5/igt@xe_module_load@load.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-5/igt@xe_module_load@load.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-4/igt@xe_module_load@load.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-4/igt@xe_module_load@load.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-4/igt@xe_module_load@load.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-8/igt@xe_module_load@load.html
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-8/igt@xe_module_load@load.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-8/igt@xe_module_load@load.html
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-1/igt@xe_module_load@load.html
- shard-adlp: ([PASS][238], [PASS][239], [PASS][240], [PASS][241], [PASS][242], [PASS][243], [PASS][244], [PASS][245], [PASS][246], [PASS][247], [PASS][248], [PASS][249], [PASS][250], [SKIP][251], [PASS][252], [PASS][253], [PASS][254], [PASS][255], [PASS][256], [PASS][257], [PASS][258], [PASS][259], [PASS][260], [PASS][261], [PASS][262], [PASS][263]) ([Intel XE#378]) -> ([PASS][264], [PASS][265], [PASS][266], [PASS][267], [PASS][268], [PASS][269], [PASS][270], [PASS][271], [PASS][272], [PASS][273], [PASS][274], [PASS][275], [PASS][276], [PASS][277], [PASS][278], [PASS][279], [PASS][280], [PASS][281], [PASS][282], [PASS][283], [PASS][284], [PASS][285], [PASS][286], [PASS][287], [PASS][288])
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-9/igt@xe_module_load@load.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-8/igt@xe_module_load@load.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-6/igt@xe_module_load@load.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-4/igt@xe_module_load@load.html
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-1/igt@xe_module_load@load.html
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-1/igt@xe_module_load@load.html
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-6/igt@xe_module_load@load.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-1/igt@xe_module_load@load.html
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-1/igt@xe_module_load@load.html
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-6/igt@xe_module_load@load.html
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-8/igt@xe_module_load@load.html
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-8/igt@xe_module_load@load.html
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-6/igt@xe_module_load@load.html
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-4/igt@xe_module_load@load.html
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-8/igt@xe_module_load@load.html
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-8/igt@xe_module_load@load.html
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-4/igt@xe_module_load@load.html
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-6/igt@xe_module_load@load.html
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-9/igt@xe_module_load@load.html
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-2/igt@xe_module_load@load.html
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-2/igt@xe_module_load@load.html
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-2/igt@xe_module_load@load.html
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-2/igt@xe_module_load@load.html
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-9/igt@xe_module_load@load.html
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-4/igt@xe_module_load@load.html
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-4/igt@xe_module_load@load.html
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@xe_module_load@load.html
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@xe_module_load@load.html
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@xe_module_load@load.html
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-4/igt@xe_module_load@load.html
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-2/igt@xe_module_load@load.html
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-2/igt@xe_module_load@load.html
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-2/igt@xe_module_load@load.html
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-2/igt@xe_module_load@load.html
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-1/igt@xe_module_load@load.html
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-1/igt@xe_module_load@load.html
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-1/igt@xe_module_load@load.html
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-1/igt@xe_module_load@load.html
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-1/igt@xe_module_load@load.html
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@xe_module_load@load.html
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@xe_module_load@load.html
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@xe_module_load@load.html
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@xe_module_load@load.html
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-9/igt@xe_module_load@load.html
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-9/igt@xe_module_load@load.html
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-9/igt@xe_module_load@load.html
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-6/igt@xe_module_load@load.html
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-6/igt@xe_module_load@load.html
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-6/igt@xe_module_load@load.html
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-6/igt@xe_module_load@load.html
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-6/igt@xe_module_load@load.html
* igt@xe_pm@s4-vm-bind-prefetch:
- shard-adlp: [ABORT][289] ([Intel XE#1794]) -> [PASS][290] +1 other test pass
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-adlp-9/igt@xe_pm@s4-vm-bind-prefetch.html
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-adlp-8/igt@xe_pm@s4-vm-bind-prefetch.html
#### Warnings ####
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-6:
- shard-dg2-set2: [SKIP][291] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][292] ([Intel XE#787]) +10 other tests skip
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-464/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-6.html
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-435/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-6.html
* igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6:
- shard-dg2-set2: [SKIP][293] ([Intel XE#787]) -> [SKIP][294] ([Intel XE#455] / [Intel XE#787]) +19 other tests skip
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-433/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6.html
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [INCOMPLETE][295] ([Intel XE#2705] / [Intel XE#4212] / [Intel XE#4345]) -> [INCOMPLETE][296] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-dg2-set2: [SKIP][297] ([Intel XE#4418]) -> [SKIP][298] ([Intel XE#4440])
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-463/igt@kms_cdclk@mode-transition-all-outputs.html
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_content_protection@legacy:
- shard-bmg: [SKIP][299] ([Intel XE#2341]) -> [FAIL][300] ([Intel XE#1178]) +2 other tests fail
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-4/igt@kms_content_protection@legacy.html
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-3/igt@kms_content_protection@legacy.html
- shard-dg2-set2: [FAIL][301] ([Intel XE#1178]) -> [SKIP][302] ([Intel XE#455]) +1 other test skip
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-433/igt@kms_content_protection@legacy.html
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_content_protection@legacy.html
* igt@kms_flip@flip-vs-blocking-wf-vblank:
- shard-lnl: [FAIL][303] ([Intel XE#3098] / [Intel XE#886]) -> [FAIL][304] ([Intel XE#886])
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-6/igt@kms_flip@flip-vs-blocking-wf-vblank.html
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-7/igt@kms_flip@flip-vs-blocking-wf-vblank.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1:
- shard-lnl: [FAIL][305] ([Intel XE#3098]) -> [FAIL][306] ([Intel XE#886])
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-lnl-6/igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1.html
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-lnl-7/igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt:
- shard-bmg: [SKIP][307] ([Intel XE#2312]) -> [SKIP][308] ([Intel XE#2311]) +11 other tests skip
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt.html
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff:
- shard-dg2-set2: [SKIP][309] ([Intel XE#651]) -> [SKIP][310] ([Intel XE#656]) +26 other tests skip
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][311] ([Intel XE#2311]) -> [SKIP][312] ([Intel XE#2312]) +15 other tests skip
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][313] ([Intel XE#4141]) -> [SKIP][314] ([Intel XE#2312]) +9 other tests skip
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
- shard-bmg: [SKIP][315] ([Intel XE#2312]) -> [SKIP][316] ([Intel XE#4141]) +8 other tests skip
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-spr-indfb-move:
- shard-dg2-set2: [SKIP][317] ([Intel XE#656]) -> [SKIP][318] ([Intel XE#651]) +13 other tests skip
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-spr-indfb-move.html
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
- shard-bmg: [SKIP][319] ([Intel XE#2313]) -> [SKIP][320] ([Intel XE#2312]) +14 other tests skip
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render:
- shard-bmg: [SKIP][321] ([Intel XE#2312]) -> [SKIP][322] ([Intel XE#2313]) +8 other tests skip
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt:
- shard-dg2-set2: [SKIP][323] ([Intel XE#653]) -> [SKIP][324] ([Intel XE#656]) +20 other tests skip
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-433/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-plflip-blt:
- shard-dg2-set2: [SKIP][325] ([Intel XE#656]) -> [SKIP][326] ([Intel XE#653]) +16 other tests skip
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-plflip-blt.html
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-plflip-blt.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-bmg: [SKIP][327] ([Intel XE#4596]) -> [SKIP][328] ([Intel XE#2493])
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-y.html
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-y.html
- shard-dg2-set2: [SKIP][329] ([Intel XE#455]) -> [SKIP][330] ([Intel XE#4596])
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-433/igt@kms_plane_multiple@2x-tiling-y.html
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-464/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][331] ([Intel XE#2426]) -> [FAIL][332] ([Intel XE#1729])
[331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html
[332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
- shard-dg2-set2: [FAIL][333] ([Intel XE#1729]) -> [SKIP][334] ([Intel XE#362])
[333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-dg2-435/igt@kms_tiled_display@basic-test-pattern.html
[334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][335] ([Intel XE#2426]) -> [SKIP][336] ([Intel XE#2509])
[335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1035
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1794
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2050]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2050
[Intel XE#2078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2078
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2493]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2493
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
[Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
[Intel XE#2550]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2550
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3226]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3226
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3767]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3767
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3884]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3884
[Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
[Intel XE#3966]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3966
[Intel XE#4045]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4045
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4278
[Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
[Intel XE#4328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4328
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
[Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4440]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4440
[Intel XE#4488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4488
[Intel XE#4518]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4518
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4540
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#702]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/702
[Intel XE#734]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/734
[Intel XE#771]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/771
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586 -> xe-pw-147192v1
IGT_8304: 8304
xe-2904-bc18da45d48d337b92a7ff9546ba61da32b3b586: bc18da45d48d337b92a7ff9546ba61da32b3b586
xe-pw-147192v1: 147192v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-147192v1/index.html
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