[PATCH v2 0/6] drm/i915: add display irq hooks

[PATCH v2 0/6] drm/i915: add display irq hooks

[Jani Nikula]

v2 of [1], with the initial refactors merged, and review comments
addressed.


[1] https://lore.kernel.org/r/cover.1777458161.git.jani.nikula@intel.com


Jani Nikula (6):
  drm/i915/irq: deduplicate dg1_de_irq_postinstall() and
    gen11_de_irq_postinstall()
  drm/i915/irq: constify pipe stats parameters
  drm/i915/irq: add display irq funcs, start with
    intel_display_irq_reset()
  drm/i915/irq: add intel_display_irq_postinstall() to irq funcs
  drm/i915/irq: add intel_display_irq_ack() to irq funcs
  drm/i915/irq: add intel_display_irq_handler() to irq funcs

 .../gpu/drm/i915/display/intel_display_core.h |   3 +
 .../gpu/drm/i915/display/intel_display_irq.c  | 225 +++++++++++++++---
 .../gpu/drm/i915/display/intel_display_irq.h  |  37 +--
 drivers/gpu/drm/i915/i915_irq.c               | 182 +++++---------
 drivers/gpu/drm/xe/display/xe_display.c       |   6 +-
 5 files changed, 271 insertions(+), 182 deletions(-)

-- 
2.47.3

[PATCH v2 1/6] drm/i915/irq: deduplicate dg1_de_irq_postinstall() and gen11_de_irq_postinstall()

[Jani Nikula]

dg1_de_irq_postinstall() and gen11_de_irq_postinstall() are exactly the
same. Remove dg1_de_irq_postinstall() and call
gen11_de_irq_postinstall() instead.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_irq.c | 9 ---------
 drivers/gpu/drm/i915/display/intel_display_irq.h | 1 -
 drivers/gpu/drm/i915/i915_irq.c                  | 2 +-
 3 files changed, 1 insertion(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index b5bfdebc66ca..bf4b5e7b6011 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -2449,15 +2449,6 @@ void gen11_de_irq_postinstall(struct intel_display *display)
 	intel_de_write(display, GEN11_DISPLAY_INT_CTL, GEN11_DISPLAY_IRQ_ENABLE);
 }
 
-void dg1_de_irq_postinstall(struct intel_display *display)
-{
-	if (!HAS_DISPLAY(display))
-		return;
-
-	gen8_de_irq_postinstall(display);
-	intel_de_write(display, GEN11_DISPLAY_INT_CTL, GEN11_DISPLAY_IRQ_ENABLE);
-}
-
 struct intel_display_irq_funcs {
 	void (*reset)(struct intel_display *display);
 };
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index b25d180254d7..e2b1674fae06 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -71,7 +71,6 @@ void vlv_display_irq_postinstall(struct intel_display *display);
 void ilk_de_irq_postinstall(struct intel_display *display);
 void gen8_de_irq_postinstall(struct intel_display *display);
 void gen11_de_irq_postinstall(struct intel_display *display);
-void dg1_de_irq_postinstall(struct intel_display *display);
 
 u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);
 void i915_enable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index d4d8dd0a4174..ef9eadf38a53 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -778,7 +778,7 @@ static void dg1_irq_postinstall(struct drm_i915_private *dev_priv)
 
 	gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
 
-	dg1_de_irq_postinstall(display);
+	gen11_de_irq_postinstall(display);
 
 	dg1_master_intr_enable(intel_uncore_regs(uncore));
 	intel_uncore_posting_read(uncore, DG1_MSTR_TILE_INTR);
-- 
2.47.3

[PATCH v2 2/6] drm/i915/irq: constify pipe stats parameters

[Jani Nikula]

The pipe stat irq handling doesn't need to modify the pipe stats
arrays. Make them const.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_irq.c | 6 +++---
 drivers/gpu/drm/i915/display/intel_display_irq.h | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index bf4b5e7b6011..d30b063714b0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -597,7 +597,7 @@ void i9xx_pipestat_irq_ack(struct intel_display *display,
 }
 
 void i915_pipestat_irq_handler(struct intel_display *display,
-			       u32 iir, u32 pipe_stats[I915_MAX_PIPES])
+			       u32 iir, const u32 pipe_stats[I915_MAX_PIPES])
 {
 	bool blc_event = false;
 	enum pipe pipe;
@@ -621,7 +621,7 @@ void i915_pipestat_irq_handler(struct intel_display *display,
 }
 
 void i965_pipestat_irq_handler(struct intel_display *display,
-			       u32 iir, u32 pipe_stats[I915_MAX_PIPES])
+			       u32 iir, const u32 pipe_stats[I915_MAX_PIPES])
 {
 	bool blc_event = false;
 	enum pipe pipe;
@@ -648,7 +648,7 @@ void i965_pipestat_irq_handler(struct intel_display *display,
 }
 
 void valleyview_pipestat_irq_handler(struct intel_display *display,
-				     u32 pipe_stats[I915_MAX_PIPES])
+				     const u32 pipe_stats[I915_MAX_PIPES])
 {
 	enum pipe pipe;
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index e2b1674fae06..d25b9ea4272b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -78,9 +78,9 @@ void i915_disable_pipestat(struct intel_display *display, enum pipe pipe, u32 st
 
 void i9xx_pipestat_irq_ack(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
 
-void i915_pipestat_irq_handler(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
-void i965_pipestat_irq_handler(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
-void valleyview_pipestat_irq_handler(struct intel_display *display, u32 pipe_stats[I915_MAX_PIPES]);
+void i915_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);
+void i965_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);
+void valleyview_pipestat_irq_handler(struct intel_display *display, const u32 pipe_stats[I915_MAX_PIPES]);
 
 void vlv_display_error_irq_ack(struct intel_display *display, u32 *eir, u32 *dpinvgtt);
 void vlv_display_error_irq_handler(struct intel_display *display, u32 eir, u32 dpinvgtt);
-- 
2.47.3

[PATCH v2 3/6] drm/i915/irq: add display irq funcs, start with intel_display_irq_reset()

[Jani Nikula]

Introduce display irq hooks with struct intel_display_irq_funcs, and add
the ->reset hook as the first thing. Call the reset hooks from i915 and
xe core via intel_display_irq_reset().

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_core.h |  3 ++
 .../gpu/drm/i915/display/intel_display_irq.c  | 52 +++++++++++++++++--
 .../gpu/drm/i915/display/intel_display_irq.h  |  6 +--
 drivers/gpu/drm/i915/i915_irq.c               | 16 +++---
 drivers/gpu/drm/xe/display/xe_display.c       |  2 +-
 5 files changed, 60 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 796517e7bc6c..7bc2ff11b658 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -475,6 +475,9 @@ struct intel_display {
 	} ips;
 
 	struct {
+		/* internal display irq functions */
+		const struct intel_display_irq_funcs *funcs;
+
 		/* protects the irq masks */
 		spinlock_t lock;
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index d30b063714b0..7505652257d8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1947,7 +1947,7 @@ static void _vlv_display_irq_reset(struct intel_display *display)
 	display->irq.vlv_imr_mask = ~0u;
 }
 
-void vlv_display_irq_reset(struct intel_display *display)
+static void vlv_display_irq_reset(struct intel_display *display)
 {
 	spin_lock_irq(&display->irq.lock);
 	if (display->irq.vlv_display_irqs_enabled)
@@ -1955,7 +1955,7 @@ void vlv_display_irq_reset(struct intel_display *display)
 	spin_unlock_irq(&display->irq.lock);
 }
 
-void i9xx_display_irq_reset(struct intel_display *display)
+static void i9xx_display_irq_reset(struct intel_display *display)
 {
 	if (HAS_HOTPLUG(display)) {
 		i915_hotplug_interrupt_update(display, 0xffffffff, 0);
@@ -2076,7 +2076,7 @@ static void ibx_display_irq_reset(struct intel_display *display)
 		intel_de_write(display, SERR_INT, 0xffffffff);
 }
 
-void ilk_display_irq_reset(struct intel_display *display)
+static void ilk_display_irq_reset(struct intel_display *display)
 {
 	irq_reset(display, DE_IRQ_REGS);
 	display->irq.ilk_de_imr_mask = ~0u;
@@ -2092,7 +2092,7 @@ void ilk_display_irq_reset(struct intel_display *display)
 	ibx_display_irq_reset(display);
 }
 
-void gen8_display_irq_reset(struct intel_display *display)
+static void gen8_display_irq_reset(struct intel_display *display)
 {
 	enum pipe pipe;
 
@@ -2114,7 +2114,7 @@ void gen8_display_irq_reset(struct intel_display *display)
 		ibx_display_irq_reset(display);
 }
 
-void gen11_display_irq_reset(struct intel_display *display)
+static void gen11_display_irq_reset(struct intel_display *display)
 {
 	enum pipe pipe;
 	u32 trans_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
@@ -2453,6 +2453,35 @@ struct intel_display_irq_funcs {
 	void (*reset)(struct intel_display *display);
 };
 
+struct intel_display_irq_funcs gen11_display_irq_funcs = {
+	.reset = gen11_display_irq_reset,
+};
+
+struct intel_display_irq_funcs gen8_display_irq_funcs = {
+	.reset = gen8_display_irq_reset,
+};
+
+struct intel_display_irq_funcs vlv_display_irq_funcs = {
+	.reset = vlv_display_irq_reset,
+};
+
+struct intel_display_irq_funcs ilk_display_irq_funcs = {
+	.reset = ilk_display_irq_reset,
+};
+
+struct intel_display_irq_funcs i965_display_irq_funcs = {
+	.reset = i9xx_display_irq_reset,
+};
+
+struct intel_display_irq_funcs i915_display_irq_funcs = {
+	.reset = i9xx_display_irq_reset,
+};
+
+void intel_display_irq_reset(struct intel_display *display)
+{
+	display->irq.funcs->reset(display);
+}
+
 void intel_display_irq_init(struct intel_display *display)
 {
 	spin_lock_init(&display->irq.lock);
@@ -2463,6 +2492,19 @@ void intel_display_irq_init(struct intel_display *display)
 
 	INIT_WORK(&display->irq.vblank_notify_work,
 		  intel_display_vblank_notify_work);
+
+	if (DISPLAY_VER(display) >= 11)
+		display->irq.funcs = &gen11_display_irq_funcs;
+	else if (display->platform.cherryview || display->platform.valleyview)
+		display->irq.funcs = &vlv_display_irq_funcs;
+	else if (DISPLAY_VER(display) >= 8)
+		display->irq.funcs = &gen8_display_irq_funcs;
+	else if (DISPLAY_VER(display) >= 5)
+		display->irq.funcs = &ilk_display_irq_funcs;
+	else if (DISPLAY_VER(display) == 4)
+		display->irq.funcs = &i965_display_irq_funcs;
+	else
+		display->irq.funcs = &i915_display_irq_funcs;
 }
 
 struct intel_display_irq_snapshot {
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index d25b9ea4272b..21b2145656cd 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -58,11 +58,7 @@ void gen11_display_irq_handler(struct intel_display *display);
 u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl);
 void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);
 
-void i9xx_display_irq_reset(struct intel_display *display);
-void ilk_display_irq_reset(struct intel_display *display);
-void vlv_display_irq_reset(struct intel_display *display);
-void gen8_display_irq_reset(struct intel_display *display);
-void gen11_display_irq_reset(struct intel_display *display);
+void intel_display_irq_reset(struct intel_display *display);
 
 u32 i9xx_display_irq_enable_mask(struct intel_display *display);
 void i915_display_irq_postinstall(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index ef9eadf38a53..c4f56a869910 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -640,7 +640,7 @@ static void ilk_irq_reset(struct drm_i915_private *dev_priv)
 	struct intel_display *display = dev_priv->display;
 
 	/* The master interrupt enable is in DEIER, reset display irq first */
-	ilk_display_irq_reset(display);
+	intel_display_irq_reset(display);
 	gen5_gt_irq_reset(to_gt(dev_priv));
 }
 
@@ -653,7 +653,7 @@ static void valleyview_irq_reset(struct drm_i915_private *dev_priv)
 
 	gen5_gt_irq_reset(to_gt(dev_priv));
 
-	vlv_display_irq_reset(display);
+	intel_display_irq_reset(display);
 }
 
 static void gen8_irq_reset(struct drm_i915_private *dev_priv)
@@ -664,7 +664,7 @@ static void gen8_irq_reset(struct drm_i915_private *dev_priv)
 	gen8_master_intr_disable(intel_uncore_regs(uncore));
 
 	gen8_gt_irq_reset(to_gt(dev_priv));
-	gen8_display_irq_reset(display);
+	intel_display_irq_reset(display);
 	gen2_irq_reset(uncore, GEN8_PCU_IRQ_REGS);
 }
 
@@ -677,7 +677,7 @@ static void gen11_irq_reset(struct drm_i915_private *dev_priv)
 	gen11_master_intr_disable(intel_uncore_regs(&dev_priv->uncore));
 
 	gen11_gt_irq_reset(gt);
-	gen11_display_irq_reset(display);
+	intel_display_irq_reset(display);
 
 	gen2_irq_reset(uncore, GEN11_GU_MISC_IRQ_REGS);
 	gen2_irq_reset(uncore, GEN8_PCU_IRQ_REGS);
@@ -695,7 +695,7 @@ static void dg1_irq_reset(struct drm_i915_private *dev_priv)
 	for_each_gt(gt, dev_priv, i)
 		gen11_gt_irq_reset(gt);
 
-	gen11_display_irq_reset(display);
+	intel_display_irq_reset(display);
 
 	gen2_irq_reset(uncore, GEN11_GU_MISC_IRQ_REGS);
 	gen2_irq_reset(uncore, GEN8_PCU_IRQ_REGS);
@@ -715,7 +715,7 @@ static void cherryview_irq_reset(struct drm_i915_private *dev_priv)
 
 	gen2_irq_reset(uncore, GEN8_PCU_IRQ_REGS);
 
-	vlv_display_irq_reset(display);
+	intel_display_irq_reset(display);
 }
 
 static void ilk_irq_postinstall(struct drm_i915_private *dev_priv)
@@ -864,7 +864,7 @@ static void i915_irq_reset(struct drm_i915_private *dev_priv)
 	struct intel_display *display = dev_priv->display;
 	struct intel_uncore *uncore = &dev_priv->uncore;
 
-	i9xx_display_irq_reset(display);
+	intel_display_irq_reset(display);
 
 	gen2_error_reset(uncore, GEN2_ERROR_REGS);
 	gen2_irq_reset(uncore, GEN2_IRQ_REGS);
@@ -951,7 +951,7 @@ static void i965_irq_reset(struct drm_i915_private *dev_priv)
 	struct intel_display *display = dev_priv->display;
 	struct intel_uncore *uncore = &dev_priv->uncore;
 
-	i9xx_display_irq_reset(display);
+	intel_display_irq_reset(display);
 
 	gen2_error_reset(uncore, GEN2_ERROR_REGS);
 	gen2_irq_reset(uncore, GEN2_IRQ_REGS);
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 0747044f7c2a..d6a4546fbe94 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -235,7 +235,7 @@ void xe_display_irq_reset(struct xe_device *xe)
 	if (!xe->info.probe_display)
 		return;
 
-	gen11_display_irq_reset(display);
+	intel_display_irq_reset(display);
 }
 
 void xe_display_irq_postinstall(struct xe_device *xe)
-- 
2.47.3

[PATCH v2 4/6] drm/i915/irq: add intel_display_irq_postinstall() to irq funcs

[Jani Nikula]

Call the platform specific display irq postinstall hooks via
intel_display_irq_postinstall().

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c  | 24 ++++++++++++++-----
 .../gpu/drm/i915/display/intel_display_irq.h  |  7 +-----
 drivers/gpu/drm/i915/i915_irq.c               | 16 ++++++-------
 drivers/gpu/drm/xe/display/xe_display.c       |  2 +-
 4 files changed, 28 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 7505652257d8..6ba094a0df66 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1981,7 +1981,7 @@ u32 i9xx_display_irq_enable_mask(struct intel_display *display)
 	return enable_mask;
 }
 
-void i915_display_irq_postinstall(struct intel_display *display)
+static void i915_display_irq_postinstall(struct intel_display *display)
 {
 	/*
 	 * Interrupt setup is already guaranteed to be single-threaded, this is
@@ -1995,7 +1995,7 @@ void i915_display_irq_postinstall(struct intel_display *display)
 	i915_enable_asle_pipestat(display);
 }
 
-void i965_display_irq_postinstall(struct intel_display *display)
+static void i965_display_irq_postinstall(struct intel_display *display)
 {
 	/*
 	 * Interrupt setup is already guaranteed to be single-threaded, this is
@@ -2057,7 +2057,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
 	irq_init(display, VLV_IRQ_REGS, display->irq.vlv_imr_mask, enable_mask);
 }
 
-void vlv_display_irq_postinstall(struct intel_display *display)
+static void vlv_display_irq_postinstall(struct intel_display *display)
 {
 	spin_lock_irq(&display->irq.lock);
 	if (display->irq.vlv_display_irqs_enabled)
@@ -2268,7 +2268,7 @@ void valleyview_disable_display_irqs(struct intel_display *display)
 	spin_unlock_irq(&display->irq.lock);
 }
 
-void ilk_de_irq_postinstall(struct intel_display *display)
+static void ilk_de_irq_postinstall(struct intel_display *display)
 {
 	u32 display_mask, extra_mask;
 
@@ -2312,7 +2312,7 @@ void ilk_de_irq_postinstall(struct intel_display *display)
 static void mtp_irq_postinstall(struct intel_display *display);
 static void icp_irq_postinstall(struct intel_display *display);
 
-void gen8_de_irq_postinstall(struct intel_display *display)
+static void gen8_de_irq_postinstall(struct intel_display *display)
 {
 	u32 de_pipe_masked = gen8_de_pipe_fault_mask(display) |
 		GEN8_PIPE_CDCLK_CRC_DONE;
@@ -2439,7 +2439,7 @@ static void icp_irq_postinstall(struct intel_display *display)
 	irq_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
 }
 
-void gen11_de_irq_postinstall(struct intel_display *display)
+static void gen11_de_irq_postinstall(struct intel_display *display)
 {
 	if (!HAS_DISPLAY(display))
 		return;
@@ -2451,30 +2451,37 @@ void gen11_de_irq_postinstall(struct intel_display *display)
 
 struct intel_display_irq_funcs {
 	void (*reset)(struct intel_display *display);
+	void (*postinstall)(struct intel_display *display);
 };
 
 struct intel_display_irq_funcs gen11_display_irq_funcs = {
 	.reset = gen11_display_irq_reset,
+	.postinstall = gen11_de_irq_postinstall,
 };
 
 struct intel_display_irq_funcs gen8_display_irq_funcs = {
 	.reset = gen8_display_irq_reset,
+	.postinstall = gen8_de_irq_postinstall,
 };
 
 struct intel_display_irq_funcs vlv_display_irq_funcs = {
 	.reset = vlv_display_irq_reset,
+	.postinstall = vlv_display_irq_postinstall,
 };
 
 struct intel_display_irq_funcs ilk_display_irq_funcs = {
 	.reset = ilk_display_irq_reset,
+	.postinstall = ilk_de_irq_postinstall,
 };
 
 struct intel_display_irq_funcs i965_display_irq_funcs = {
 	.reset = i9xx_display_irq_reset,
+	.postinstall = i965_display_irq_postinstall,
 };
 
 struct intel_display_irq_funcs i915_display_irq_funcs = {
 	.reset = i9xx_display_irq_reset,
+	.postinstall = i915_display_irq_postinstall,
 };
 
 void intel_display_irq_reset(struct intel_display *display)
@@ -2482,6 +2489,11 @@ void intel_display_irq_reset(struct intel_display *display)
 	display->irq.funcs->reset(display);
 }
 
+void intel_display_irq_postinstall(struct intel_display *display)
+{
+	display->irq.funcs->postinstall(display);
+}
+
 void intel_display_irq_init(struct intel_display *display)
 {
 	spin_lock_init(&display->irq.lock);
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index 21b2145656cd..fd9873ce9755 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -59,14 +59,9 @@ u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl);
 void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);
 
 void intel_display_irq_reset(struct intel_display *display);
+void intel_display_irq_postinstall(struct intel_display *display);
 
 u32 i9xx_display_irq_enable_mask(struct intel_display *display);
-void i915_display_irq_postinstall(struct intel_display *display);
-void i965_display_irq_postinstall(struct intel_display *display);
-void vlv_display_irq_postinstall(struct intel_display *display);
-void ilk_de_irq_postinstall(struct intel_display *display);
-void gen8_de_irq_postinstall(struct intel_display *display);
-void gen11_de_irq_postinstall(struct intel_display *display);
 
 u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);
 void i915_enable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index c4f56a869910..c21b289b8007 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -724,7 +724,7 @@ static void ilk_irq_postinstall(struct drm_i915_private *dev_priv)
 
 	gen5_gt_irq_postinstall(to_gt(dev_priv));
 
-	ilk_de_irq_postinstall(display);
+	intel_display_irq_postinstall(display);
 }
 
 static void valleyview_irq_postinstall(struct drm_i915_private *dev_priv)
@@ -733,7 +733,7 @@ static void valleyview_irq_postinstall(struct drm_i915_private *dev_priv)
 
 	gen5_gt_irq_postinstall(to_gt(dev_priv));
 
-	vlv_display_irq_postinstall(display);
+	intel_display_irq_postinstall(display);
 
 	intel_uncore_write(&dev_priv->uncore, VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);
 	intel_uncore_posting_read(&dev_priv->uncore, VLV_MASTER_IER);
@@ -744,7 +744,7 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv)
 	struct intel_display *display = dev_priv->display;
 
 	gen8_gt_irq_postinstall(to_gt(dev_priv));
-	gen8_de_irq_postinstall(display);
+	intel_display_irq_postinstall(display);
 
 	gen8_master_intr_enable(intel_uncore_regs(&dev_priv->uncore));
 }
@@ -757,7 +757,7 @@ static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
 	u32 gu_misc_masked = GEN11_GU_MISC_GSE;
 
 	gen11_gt_irq_postinstall(gt);
-	gen11_de_irq_postinstall(display);
+	intel_display_irq_postinstall(display);
 
 	gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
 
@@ -778,7 +778,7 @@ static void dg1_irq_postinstall(struct drm_i915_private *dev_priv)
 
 	gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
 
-	gen11_de_irq_postinstall(display);
+	intel_display_irq_postinstall(display);
 
 	dg1_master_intr_enable(intel_uncore_regs(uncore));
 	intel_uncore_posting_read(uncore, DG1_MSTR_TILE_INTR);
@@ -790,7 +790,7 @@ static void cherryview_irq_postinstall(struct drm_i915_private *dev_priv)
 
 	gen8_gt_irq_postinstall(to_gt(dev_priv));
 
-	vlv_display_irq_postinstall(display);
+	intel_display_irq_postinstall(display);
 
 	intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
 	intel_uncore_posting_read(&dev_priv->uncore, GEN8_MASTER_IRQ);
@@ -888,7 +888,7 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
 
 	gen2_irq_init(uncore, GEN2_IRQ_REGS, dev_priv->gen2_imr_mask, enable_mask);
 
-	i915_display_irq_postinstall(display);
+	intel_display_irq_postinstall(display);
 }
 
 static irqreturn_t i915_irq_handler(int irq, void *arg)
@@ -997,7 +997,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
 
 	gen2_irq_init(uncore, GEN2_IRQ_REGS, dev_priv->gen2_imr_mask, enable_mask);
 
-	i965_display_irq_postinstall(display);
+	intel_display_irq_postinstall(display);
 }
 
 static irqreturn_t i965_irq_handler(int irq, void *arg)
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index d6a4546fbe94..736a5e6938d6 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -245,7 +245,7 @@ void xe_display_irq_postinstall(struct xe_device *xe)
 	if (!xe->info.probe_display)
 		return;
 
-	gen11_de_irq_postinstall(display);
+	intel_display_irq_postinstall(display);
 }
 
 static bool suspend_to_idle(void)
-- 
2.47.3

[PATCH v2 5/6] drm/i915/irq: add intel_display_irq_ack() to irq funcs

[Jani Nikula]

Some platforms have a separate step for acking display irqs. Call the
platform specific display irq ack hooks, if any, via
intel_display_irq_ack().

Introduce struct intel_display_irq_state to group together all the data
the ack hooks need. In the follow-up, this state will be passed on to a
shared handler function.

v2: Include LPE audio in the ack part

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c  |  56 ++++++-
 .../gpu/drm/i915/display/intel_display_irq.h  |  12 +-
 drivers/gpu/drm/i915/i915_irq.c               | 144 ++++++------------
 3 files changed, 111 insertions(+), 101 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 6ba094a0df66..a2e05945416d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -23,6 +23,7 @@
 #include "intel_fifo_underrun.h"
 #include "intel_gmbus.h"
 #include "intel_hotplug_irq.h"
+#include "intel_lpe_audio.h"
 #include "intel_parent.h"
 #include "intel_pipe_crc_regs.h"
 #include "intel_plane.h"
@@ -529,8 +530,8 @@ static void i9xx_pipestat_irq_reset(struct intel_display *display)
 	}
 }
 
-void i9xx_pipestat_irq_ack(struct intel_display *display,
-			   u32 iir, u32 pipe_stats[I915_MAX_PIPES])
+static void i9xx_pipestat_irq_ack(struct intel_display *display,
+				  u32 iir, u32 pipe_stats[I915_MAX_PIPES])
 {
 	enum pipe pipe;
 
@@ -1898,8 +1899,8 @@ static void vlv_page_table_error_irq_handler(struct intel_display *display, u32
 	}
 }
 
-void vlv_display_error_irq_ack(struct intel_display *display,
-			       u32 *eir, u32 *dpinvgtt)
+static void vlv_display_error_irq_ack(struct intel_display *display,
+				      u32 *eir, u32 *dpinvgtt)
 {
 	u32 emr;
 
@@ -2010,6 +2011,16 @@ static void i965_display_irq_postinstall(struct intel_display *display)
 	i915_enable_asle_pipestat(display);
 }
 
+static void i9xx_display_irq_ack(struct intel_display *display,
+				 struct intel_display_irq_state *state)
+{
+	if (state->iir & I915_DISPLAY_PORT_INTERRUPT)
+		state->hotplug_status = i9xx_hpd_irq_ack(display);
+
+	/* Call regardless, as some status bits might not be signalled in IIR */
+	i9xx_pipestat_irq_ack(display, state->iir, state->pipe_stats);
+}
+
 static u32 vlv_error_mask(void)
 {
 	/* TODO enable other errors too? */
@@ -2065,6 +2076,32 @@ static void vlv_display_irq_postinstall(struct intel_display *display)
 	spin_unlock_irq(&display->irq.lock);
 }
 
+static u32 vlv_lpe_irq_mask(struct intel_display *display)
+{
+	if (display->platform.cherryview)
+		return I915_LPE_PIPE_A_INTERRUPT | I915_LPE_PIPE_B_INTERRUPT |
+			I915_LPE_PIPE_C_INTERRUPT;
+	else
+		return I915_LPE_PIPE_A_INTERRUPT | I915_LPE_PIPE_B_INTERRUPT;
+}
+
+static void vlv_display_irq_ack(struct intel_display *display,
+				struct intel_display_irq_state *state)
+{
+	if (state->iir & I915_DISPLAY_PORT_INTERRUPT)
+		state->hotplug_status = i9xx_hpd_irq_ack(display);
+
+	if (state->iir & I915_MASTER_ERROR_INTERRUPT)
+		vlv_display_error_irq_ack(display, &state->eir, &state->dpinvgtt);
+
+	/* Call regardless, as some status bits might not be signalled in IIR */
+	i9xx_pipestat_irq_ack(display, state->iir, state->pipe_stats);
+
+	/* The handler acks the irq, so need to call the handler here */
+	if (state->iir & vlv_lpe_irq_mask(display))
+		intel_lpe_audio_irq_handler(display);
+}
+
 static void ibx_display_irq_reset(struct intel_display *display)
 {
 	if (HAS_PCH_NOP(display))
@@ -2452,6 +2489,7 @@ static void gen11_de_irq_postinstall(struct intel_display *display)
 struct intel_display_irq_funcs {
 	void (*reset)(struct intel_display *display);
 	void (*postinstall)(struct intel_display *display);
+	void (*ack)(struct intel_display *display, struct intel_display_irq_state *state);
 };
 
 struct intel_display_irq_funcs gen11_display_irq_funcs = {
@@ -2467,6 +2505,7 @@ struct intel_display_irq_funcs gen8_display_irq_funcs = {
 struct intel_display_irq_funcs vlv_display_irq_funcs = {
 	.reset = vlv_display_irq_reset,
 	.postinstall = vlv_display_irq_postinstall,
+	.ack = vlv_display_irq_ack,
 };
 
 struct intel_display_irq_funcs ilk_display_irq_funcs = {
@@ -2477,11 +2516,13 @@ struct intel_display_irq_funcs ilk_display_irq_funcs = {
 struct intel_display_irq_funcs i965_display_irq_funcs = {
 	.reset = i9xx_display_irq_reset,
 	.postinstall = i965_display_irq_postinstall,
+	.ack = i9xx_display_irq_ack,
 };
 
 struct intel_display_irq_funcs i915_display_irq_funcs = {
 	.reset = i9xx_display_irq_reset,
 	.postinstall = i915_display_irq_postinstall,
+	.ack = i9xx_display_irq_ack,
 };
 
 void intel_display_irq_reset(struct intel_display *display)
@@ -2494,6 +2535,13 @@ void intel_display_irq_postinstall(struct intel_display *display)
 	display->irq.funcs->postinstall(display);
 }
 
+void intel_display_irq_ack(struct intel_display *display,
+			   struct intel_display_irq_state *state)
+{
+	if (display->irq.funcs->ack)
+		display->irq.funcs->ack(display, state);
+}
+
 void intel_display_irq_init(struct intel_display *display)
 {
 	spin_lock_init(&display->irq.lock);
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index fd9873ce9755..3773a31e48f2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -58,8 +58,17 @@ void gen11_display_irq_handler(struct intel_display *display);
 u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl);
 void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);
 
+struct intel_display_irq_state {
+	u32 iir;
+	u32 eir;
+	u32 hotplug_status;
+	u32 dpinvgtt;
+	u32 pipe_stats[I915_MAX_PIPES];
+};
+
 void intel_display_irq_reset(struct intel_display *display);
 void intel_display_irq_postinstall(struct intel_display *display);
+void intel_display_irq_ack(struct intel_display *display, struct intel_display_irq_state *state);
 
 u32 i9xx_display_irq_enable_mask(struct intel_display *display);
 
@@ -67,13 +76,10 @@ u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);
 void i915_enable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
 void i915_disable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
 
-void i9xx_pipestat_irq_ack(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
-
 void i915_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);
 void i965_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);
 void valleyview_pipestat_irq_handler(struct intel_display *display, const u32 pipe_stats[I915_MAX_PIPES]);
 
-void vlv_display_error_irq_ack(struct intel_display *display, u32 *eir, u32 *dpinvgtt);
 void vlv_display_error_irq_handler(struct intel_display *display, u32 eir, u32 dpinvgtt);
 
 void intel_display_irq_init(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index c21b289b8007..b28e89fdb6fd 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -39,7 +39,6 @@
 #include "display/intel_display_irq.h"
 #include "display/intel_hotplug.h"
 #include "display/intel_hotplug_irq.h"
-#include "display/intel_lpe_audio.h"
 
 #include "gt/intel_breadcrumbs.h"
 #include "gt/intel_gt.h"
@@ -236,17 +235,15 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
 	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
 	do {
-		u32 iir, gt_iir, pm_iir;
-		u32 eir = 0, dpinvgtt = 0;
-		u32 pipe_stats[I915_MAX_PIPES] = {};
-		u32 hotplug_status = 0;
+		struct intel_display_irq_state state = {};
+		u32 gt_iir, pm_iir;
 		u32 ier = 0;
 
 		gt_iir = intel_uncore_read(&dev_priv->uncore, GTIIR);
 		pm_iir = intel_uncore_read(&dev_priv->uncore, GEN6_PMIIR);
-		iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR);
+		state.iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR);
 
-		if (gt_iir == 0 && pm_iir == 0 && iir == 0)
+		if (gt_iir == 0 && pm_iir == 0 && state.iir == 0)
 			break;
 
 		ret = IRQ_HANDLED;
@@ -272,26 +269,14 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
 		if (pm_iir)
 			intel_uncore_write(&dev_priv->uncore, GEN6_PMIIR, pm_iir);
 
-		if (iir & I915_DISPLAY_PORT_INTERRUPT)
-			hotplug_status = i9xx_hpd_irq_ack(display);
-
-		if (iir & I915_MASTER_ERROR_INTERRUPT)
-			vlv_display_error_irq_ack(display, &eir, &dpinvgtt);
-
-		/* Call regardless, as some status bits might not be
-		 * signalled in IIR */
-		i9xx_pipestat_irq_ack(display, iir, pipe_stats);
-
-		if (iir & (I915_LPE_PIPE_A_INTERRUPT |
-			   I915_LPE_PIPE_B_INTERRUPT))
-			intel_lpe_audio_irq_handler(display);
+		intel_display_irq_ack(display, &state);
 
 		/*
 		 * VLV_IIR is single buffered, and reflects the level
 		 * from PIPESTAT/PORT_HOTPLUG_STAT, hence clear it last.
 		 */
-		if (iir)
-			intel_uncore_write(&dev_priv->uncore, VLV_IIR, iir);
+		if (state.iir)
+			intel_uncore_write(&dev_priv->uncore, VLV_IIR, state.iir);
 
 		intel_uncore_write(&dev_priv->uncore, VLV_IER, ier);
 		intel_uncore_write(&dev_priv->uncore, VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);
@@ -301,13 +286,13 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
 		if (pm_iir)
 			gen6_rps_irq_handler(&to_gt(dev_priv)->rps, pm_iir);
 
-		if (hotplug_status)
-			i9xx_hpd_irq_handler(display, hotplug_status);
+		if (state.hotplug_status)
+			i9xx_hpd_irq_handler(display, state.hotplug_status);
 
-		if (iir & I915_MASTER_ERROR_INTERRUPT)
-			vlv_display_error_irq_handler(display, eir, dpinvgtt);
+		if (state.iir & I915_MASTER_ERROR_INTERRUPT)
+			vlv_display_error_irq_handler(display, state.eir, state.dpinvgtt);
 
-		valleyview_pipestat_irq_handler(display, pipe_stats);
+		valleyview_pipestat_irq_handler(display, state.pipe_stats);
 	} while (0);
 
 	pmu_irq_stats(dev_priv, ret);
@@ -330,16 +315,14 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
 	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
 	do {
-		u32 master_ctl, iir;
-		u32 eir = 0, dpinvgtt = 0;
-		u32 pipe_stats[I915_MAX_PIPES] = {};
-		u32 hotplug_status = 0;
+		struct intel_display_irq_state state = {};
+		u32 master_ctl;
 		u32 ier = 0;
 
 		master_ctl = intel_uncore_read(&dev_priv->uncore, GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL;
-		iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR);
+		state.iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR);
 
-		if (master_ctl == 0 && iir == 0)
+		if (master_ctl == 0 && state.iir == 0)
 			break;
 
 		ret = IRQ_HANDLED;
@@ -362,38 +345,25 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
 
 		gen8_gt_irq_handler(to_gt(dev_priv), master_ctl);
 
-		if (iir & I915_DISPLAY_PORT_INTERRUPT)
-			hotplug_status = i9xx_hpd_irq_ack(display);
-
-		if (iir & I915_MASTER_ERROR_INTERRUPT)
-			vlv_display_error_irq_ack(display, &eir, &dpinvgtt);
-
-		/* Call regardless, as some status bits might not be
-		 * signalled in IIR */
-		i9xx_pipestat_irq_ack(display, iir, pipe_stats);
-
-		if (iir & (I915_LPE_PIPE_A_INTERRUPT |
-			   I915_LPE_PIPE_B_INTERRUPT |
-			   I915_LPE_PIPE_C_INTERRUPT))
-			intel_lpe_audio_irq_handler(display);
+		intel_display_irq_ack(display, &state);
 
 		/*
 		 * VLV_IIR is single buffered, and reflects the level
 		 * from PIPESTAT/PORT_HOTPLUG_STAT, hence clear it last.
 		 */
-		if (iir)
-			intel_uncore_write(&dev_priv->uncore, VLV_IIR, iir);
+		if (state.iir)
+			intel_uncore_write(&dev_priv->uncore, VLV_IIR, state.iir);
 
 		intel_uncore_write(&dev_priv->uncore, VLV_IER, ier);
 		intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
 
-		if (hotplug_status)
-			i9xx_hpd_irq_handler(display, hotplug_status);
+		if (state.hotplug_status)
+			i9xx_hpd_irq_handler(display, state.hotplug_status);
 
-		if (iir & I915_MASTER_ERROR_INTERRUPT)
-			vlv_display_error_irq_handler(display, eir, dpinvgtt);
+		if (state.iir & I915_MASTER_ERROR_INTERRUPT)
+			vlv_display_error_irq_handler(display, state.eir, state.dpinvgtt);
 
-		valleyview_pipestat_irq_handler(display, pipe_stats);
+		valleyview_pipestat_irq_handler(display, state.pipe_stats);
 	} while (0);
 
 	pmu_irq_stats(dev_priv, ret);
@@ -904,39 +874,32 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
 	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
 	do {
-		u32 pipe_stats[I915_MAX_PIPES] = {};
+		struct intel_display_irq_state state = {};
 		u32 eir = 0, eir_stuck = 0;
-		u32 hotplug_status = 0;
-		u32 iir;
 
-		iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR);
-		if (iir == 0)
+		state.iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR);
+		if (state.iir == 0)
 			break;
 
 		ret = IRQ_HANDLED;
 
-		if (iir & I915_DISPLAY_PORT_INTERRUPT)
-			hotplug_status = i9xx_hpd_irq_ack(display);
+		intel_display_irq_ack(display, &state);
 
-		/* Call regardless, as some status bits might not be
-		 * signalled in IIR */
-		i9xx_pipestat_irq_ack(display, iir, pipe_stats);
-
-		if (iir & I915_MASTER_ERROR_INTERRUPT)
+		if (state.iir & I915_MASTER_ERROR_INTERRUPT)
 			i9xx_error_irq_ack(dev_priv, &eir, &eir_stuck);
 
-		intel_uncore_write(&dev_priv->uncore, GEN2_IIR, iir);
+		intel_uncore_write(&dev_priv->uncore, GEN2_IIR, state.iir);
 
-		if (iir & I915_USER_INTERRUPT)
-			intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], iir);
+		if (state.iir & I915_USER_INTERRUPT)
+			intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], state.iir);
 
-		if (iir & I915_MASTER_ERROR_INTERRUPT)
+		if (state.iir & I915_MASTER_ERROR_INTERRUPT)
 			i9xx_error_irq_handler(dev_priv, eir, eir_stuck);
 
-		if (hotplug_status)
-			i9xx_hpd_irq_handler(display, hotplug_status);
+		if (state.hotplug_status)
+			i9xx_hpd_irq_handler(display, state.hotplug_status);
 
-		i915_pipestat_irq_handler(display, iir, pipe_stats);
+		i915_pipestat_irq_handler(display, state.iir, state.pipe_stats);
 	} while (0);
 
 	pmu_irq_stats(dev_priv, ret);
@@ -1013,44 +976,37 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
 	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
 	do {
-		u32 pipe_stats[I915_MAX_PIPES] = {};
+		struct intel_display_irq_state state = {};
 		u32 eir = 0, eir_stuck = 0;
-		u32 hotplug_status = 0;
-		u32 iir;
 
-		iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR);
-		if (iir == 0)
+		state.iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR);
+		if (state.iir == 0)
 			break;
 
 		ret = IRQ_HANDLED;
 
-		if (iir & I915_DISPLAY_PORT_INTERRUPT)
-			hotplug_status = i9xx_hpd_irq_ack(display);
-
-		/* Call regardless, as some status bits might not be
-		 * signalled in IIR */
-		i9xx_pipestat_irq_ack(display, iir, pipe_stats);
+		intel_display_irq_ack(display, &state);
 
-		if (iir & I915_MASTER_ERROR_INTERRUPT)
+		if (state.iir & I915_MASTER_ERROR_INTERRUPT)
 			i9xx_error_irq_ack(dev_priv, &eir, &eir_stuck);
 
-		intel_uncore_write(&dev_priv->uncore, GEN2_IIR, iir);
+		intel_uncore_write(&dev_priv->uncore, GEN2_IIR, state.iir);
 
-		if (iir & I915_USER_INTERRUPT)
+		if (state.iir & I915_USER_INTERRUPT)
 			intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0],
-					    iir);
+					    state.iir);
 
-		if (iir & I915_BSD_USER_INTERRUPT)
+		if (state.iir & I915_BSD_USER_INTERRUPT)
 			intel_engine_cs_irq(to_gt(dev_priv)->engine[VCS0],
-					    iir >> 25);
+					    state.iir >> 25);
 
-		if (iir & I915_MASTER_ERROR_INTERRUPT)
+		if (state.iir & I915_MASTER_ERROR_INTERRUPT)
 			i9xx_error_irq_handler(dev_priv, eir, eir_stuck);
 
-		if (hotplug_status)
-			i9xx_hpd_irq_handler(display, hotplug_status);
+		if (state.hotplug_status)
+			i9xx_hpd_irq_handler(display, state.hotplug_status);
 
-		i965_pipestat_irq_handler(display, iir, pipe_stats);
+		i965_pipestat_irq_handler(display, state.iir, state.pipe_stats);
 	} while (0);
 
 	pmu_irq_stats(dev_priv, IRQ_HANDLED);
-- 
2.47.3

[PATCH v2 6/6] drm/i915/irq: add intel_display_irq_handler() to irq funcs

[Jani Nikula]

Call the platform specific display irq handler hooks via
intel_display_irq_handler(). Add master_ctl to struct
intel_display_irq_state, and pass the state pointer to the handler where
necessary.

v2: Rebase, handle LPE audio in ack (Ville)

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c  | 86 ++++++++++++++++---
 .../gpu/drm/i915/display/intel_display_irq.h  | 11 +--
 drivers/gpu/drm/i915/i915_irq.c               | 38 +++-----
 drivers/gpu/drm/xe/display/xe_display.c       |  2 +-
 4 files changed, 89 insertions(+), 48 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index a2e05945416d..afa22acfcdde 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -597,8 +597,8 @@ static void i9xx_pipestat_irq_ack(struct intel_display *display,
 	spin_unlock(&display->irq.lock);
 }
 
-void i915_pipestat_irq_handler(struct intel_display *display,
-			       u32 iir, const u32 pipe_stats[I915_MAX_PIPES])
+static void i915_pipestat_irq_handler(struct intel_display *display,
+				      u32 iir, const u32 pipe_stats[I915_MAX_PIPES])
 {
 	bool blc_event = false;
 	enum pipe pipe;
@@ -621,8 +621,8 @@ void i915_pipestat_irq_handler(struct intel_display *display,
 		intel_opregion_asle_intr(display);
 }
 
-void i965_pipestat_irq_handler(struct intel_display *display,
-			       u32 iir, const u32 pipe_stats[I915_MAX_PIPES])
+static void i965_pipestat_irq_handler(struct intel_display *display,
+				      u32 iir, const u32 pipe_stats[I915_MAX_PIPES])
 {
 	bool blc_event = false;
 	enum pipe pipe;
@@ -648,8 +648,8 @@ void i965_pipestat_irq_handler(struct intel_display *display,
 		intel_gmbus_irq_handler(display);
 }
 
-void valleyview_pipestat_irq_handler(struct intel_display *display,
-				     const u32 pipe_stats[I915_MAX_PIPES])
+static void valleyview_pipestat_irq_handler(struct intel_display *display,
+					    const u32 pipe_stats[I915_MAX_PIPES])
 {
 	enum pipe pipe;
 
@@ -1021,7 +1021,8 @@ void ilk_display_irq_master_enable(struct intel_display *display, u32 de_ier, u3
 		intel_de_write_fw(display, SDEIER, sde_ier);
 }
 
-bool ilk_display_irq_handler(struct intel_display *display)
+static bool ilk_display_irq_handler(struct intel_display *display,
+				    const struct intel_display_irq_state *state)
 {
 	u32 de_iir;
 	bool handled = false;
@@ -1405,7 +1406,7 @@ static void gen8_read_and_ack_pch_irqs(struct intel_display *display, u32 *pch_i
 		intel_de_write(display, PICAINTERRUPT_IER, pica_ier);
 }
 
-void gen8_de_irq_handler(struct intel_display *display, u32 master_ctl)
+static void gen8_de_irq_handler(struct intel_display *display, u32 master_ctl)
 {
 	u32 iir;
 	enum pipe pipe;
@@ -1566,6 +1567,14 @@ void gen8_de_irq_handler(struct intel_display *display, u32 master_ctl)
 	}
 }
 
+static bool gen8_display_irq_handler(struct intel_display *display,
+				     const struct intel_display_irq_state *state)
+{
+	gen8_de_irq_handler(display, state->master_ctl);
+
+	return true;
+}
+
 u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl)
 {
 	u32 iir;
@@ -1590,7 +1599,8 @@ void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir)
 		intel_opregion_asle_intr(display);
 }
 
-void gen11_display_irq_handler(struct intel_display *display)
+static bool gen11_display_irq_handler(struct intel_display *display,
+				      const struct intel_display_irq_state *state)
 {
 	u32 disp_ctl;
 
@@ -1606,6 +1616,8 @@ void gen11_display_irq_handler(struct intel_display *display)
 	intel_de_write(display, GEN11_DISPLAY_INT_CTL, GEN11_DISPLAY_IRQ_ENABLE);
 
 	intel_display_rpm_assert_unblock(display);
+
+	return true;
 }
 
 static void i915gm_irq_cstate_wa_enable(struct intel_display *display)
@@ -1921,8 +1933,8 @@ static void vlv_display_error_irq_ack(struct intel_display *display,
 	intel_de_write(display, VLV_EMR, emr);
 }
 
-void vlv_display_error_irq_handler(struct intel_display *display,
-				   u32 eir, u32 dpinvgtt)
+static void vlv_display_error_irq_handler(struct intel_display *display,
+					  u32 eir, u32 dpinvgtt)
 {
 	drm_dbg(display->drm, "Master Error, EIR 0x%08x\n", eir);
 
@@ -2021,6 +2033,28 @@ static void i9xx_display_irq_ack(struct intel_display *display,
 	i9xx_pipestat_irq_ack(display, state->iir, state->pipe_stats);
 }
 
+static bool i965_display_irq_handler(struct intel_display *display,
+				     const struct intel_display_irq_state *state)
+{
+	if (state->hotplug_status)
+		i9xx_hpd_irq_handler(display, state->hotplug_status);
+
+	i965_pipestat_irq_handler(display, state->iir, state->pipe_stats);
+
+	return true;
+}
+
+static bool i915_display_irq_handler(struct intel_display *display,
+				     const struct intel_display_irq_state *state)
+{
+	if (state->hotplug_status)
+		i9xx_hpd_irq_handler(display, state->hotplug_status);
+
+	i915_pipestat_irq_handler(display, state->iir, state->pipe_stats);
+
+	return true;
+}
+
 static u32 vlv_error_mask(void)
 {
 	/* TODO enable other errors too? */
@@ -2102,6 +2136,20 @@ static void vlv_display_irq_ack(struct intel_display *display,
 		intel_lpe_audio_irq_handler(display);
 }
 
+static bool vlv_display_irq_handler(struct intel_display *display,
+				    const struct intel_display_irq_state *state)
+{
+	if (state->hotplug_status)
+		i9xx_hpd_irq_handler(display, state->hotplug_status);
+
+	if (state->iir & I915_MASTER_ERROR_INTERRUPT)
+		vlv_display_error_irq_handler(display, state->eir, state->dpinvgtt);
+
+	valleyview_pipestat_irq_handler(display, state->pipe_stats);
+
+	return true;
+}
+
 static void ibx_display_irq_reset(struct intel_display *display)
 {
 	if (HAS_PCH_NOP(display))
@@ -2490,39 +2538,46 @@ struct intel_display_irq_funcs {
 	void (*reset)(struct intel_display *display);
 	void (*postinstall)(struct intel_display *display);
 	void (*ack)(struct intel_display *display, struct intel_display_irq_state *state);
+	bool (*handler)(struct intel_display *display, const struct intel_display_irq_state *state);
 };
 
 struct intel_display_irq_funcs gen11_display_irq_funcs = {
 	.reset = gen11_display_irq_reset,
 	.postinstall = gen11_de_irq_postinstall,
+	.handler = gen11_display_irq_handler,
 };
 
 struct intel_display_irq_funcs gen8_display_irq_funcs = {
 	.reset = gen8_display_irq_reset,
 	.postinstall = gen8_de_irq_postinstall,
+	.handler = gen8_display_irq_handler,
 };
 
 struct intel_display_irq_funcs vlv_display_irq_funcs = {
 	.reset = vlv_display_irq_reset,
 	.postinstall = vlv_display_irq_postinstall,
 	.ack = vlv_display_irq_ack,
+	.handler = vlv_display_irq_handler,
 };
 
 struct intel_display_irq_funcs ilk_display_irq_funcs = {
 	.reset = ilk_display_irq_reset,
 	.postinstall = ilk_de_irq_postinstall,
+	.handler = ilk_display_irq_handler,
 };
 
 struct intel_display_irq_funcs i965_display_irq_funcs = {
 	.reset = i9xx_display_irq_reset,
 	.postinstall = i965_display_irq_postinstall,
 	.ack = i9xx_display_irq_ack,
+	.handler = i965_display_irq_handler,
 };
 
 struct intel_display_irq_funcs i915_display_irq_funcs = {
 	.reset = i9xx_display_irq_reset,
 	.postinstall = i915_display_irq_postinstall,
 	.ack = i9xx_display_irq_ack,
+	.handler = i915_display_irq_handler,
 };
 
 void intel_display_irq_reset(struct intel_display *display)
@@ -2542,6 +2597,15 @@ void intel_display_irq_ack(struct intel_display *display,
 		display->irq.funcs->ack(display, state);
 }
 
+bool intel_display_irq_handler(struct intel_display *display,
+			       const struct intel_display_irq_state *state)
+{
+	if (!display->irq.funcs->handler)
+		return true;
+
+	return display->irq.funcs->handler(display, state);
+}
+
 void intel_display_irq_init(struct intel_display *display)
 {
 	spin_lock_init(&display->irq.lock);
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index 3773a31e48f2..a1227cee885a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -51,14 +51,12 @@ void bdw_disable_vblank(struct drm_crtc *crtc);
 
 void ilk_display_irq_master_disable(struct intel_display *display, u32 *de_ier, u32 *sde_ier);
 void ilk_display_irq_master_enable(struct intel_display *display, u32 de_ier, u32 sde_ier);
-bool ilk_display_irq_handler(struct intel_display *display);
-void gen8_de_irq_handler(struct intel_display *display, u32 master_ctl);
-void gen11_display_irq_handler(struct intel_display *display);
 
 u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl);
 void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);
 
 struct intel_display_irq_state {
+	u32 master_ctl;
 	u32 iir;
 	u32 eir;
 	u32 hotplug_status;
@@ -69,6 +67,7 @@ struct intel_display_irq_state {
 void intel_display_irq_reset(struct intel_display *display);
 void intel_display_irq_postinstall(struct intel_display *display);
 void intel_display_irq_ack(struct intel_display *display, struct intel_display_irq_state *state);
+bool intel_display_irq_handler(struct intel_display *display, const struct intel_display_irq_state *state);
 
 u32 i9xx_display_irq_enable_mask(struct intel_display *display);
 
@@ -76,12 +75,6 @@ u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);
 void i915_enable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
 void i915_disable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
 
-void i915_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);
-void i965_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);
-void valleyview_pipestat_irq_handler(struct intel_display *display, const u32 pipe_stats[I915_MAX_PIPES]);
-
-void vlv_display_error_irq_handler(struct intel_display *display, u32 eir, u32 dpinvgtt);
-
 void intel_display_irq_init(struct intel_display *display);
 
 void i915gm_irq_cstate_wa(struct intel_display *display, bool enable);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b28e89fdb6fd..30ce462e92ab 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -38,7 +38,6 @@
 
 #include "display/intel_display_irq.h"
 #include "display/intel_hotplug.h"
-#include "display/intel_hotplug_irq.h"
 
 #include "gt/intel_breadcrumbs.h"
 #include "gt/intel_gt.h"
@@ -286,13 +285,7 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
 		if (pm_iir)
 			gen6_rps_irq_handler(&to_gt(dev_priv)->rps, pm_iir);
 
-		if (state.hotplug_status)
-			i9xx_hpd_irq_handler(display, state.hotplug_status);
-
-		if (state.iir & I915_MASTER_ERROR_INTERRUPT)
-			vlv_display_error_irq_handler(display, state.eir, state.dpinvgtt);
-
-		valleyview_pipestat_irq_handler(display, state.pipe_stats);
+		intel_display_irq_handler(display, &state);
 	} while (0);
 
 	pmu_irq_stats(dev_priv, ret);
@@ -357,13 +350,7 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
 		intel_uncore_write(&dev_priv->uncore, VLV_IER, ier);
 		intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
 
-		if (state.hotplug_status)
-			i9xx_hpd_irq_handler(display, state.hotplug_status);
-
-		if (state.iir & I915_MASTER_ERROR_INTERRUPT)
-			vlv_display_error_irq_handler(display, state.eir, state.dpinvgtt);
-
-		valleyview_pipestat_irq_handler(display, state.pipe_stats);
+		intel_display_irq_handler(display, &state);
 	} while (0);
 
 	pmu_irq_stats(dev_priv, ret);
@@ -410,7 +397,7 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
 		ret = IRQ_HANDLED;
 	}
 
-	if (ilk_display_irq_handler(display))
+	if (intel_display_irq_handler(display, NULL))
 		ret = IRQ_HANDLED;
 
 	if (GRAPHICS_VER(i915) >= 6) {
@@ -472,8 +459,11 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
 
 	/* IRQs are synced during runtime_suspend, we don't require a wakeref */
 	if (master_ctl & ~GEN8_GT_IRQS) {
+		const struct intel_display_irq_state state = {
+			.master_ctl = master_ctl,
+		};
 		disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
-		gen8_de_irq_handler(display, master_ctl);
+		intel_display_irq_handler(display, &state);
 		enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 	}
 
@@ -525,7 +515,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
 
 	/* IRQs are synced during runtime_suspend, we don't require a wakeref */
 	if (master_ctl & GEN11_DISPLAY_IRQ)
-		gen11_display_irq_handler(display);
+		intel_display_irq_handler(display, NULL);
 
 	gu_misc_iir = gen11_gu_misc_irq_ack(display, master_ctl);
 
@@ -592,7 +582,7 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
 	gen11_gt_irq_handler(gt, master_ctl);
 
 	if (master_ctl & GEN11_DISPLAY_IRQ)
-		gen11_display_irq_handler(display);
+		intel_display_irq_handler(display, NULL);
 
 	gu_misc_iir = gen11_gu_misc_irq_ack(display, master_ctl);
 
@@ -896,10 +886,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
 		if (state.iir & I915_MASTER_ERROR_INTERRUPT)
 			i9xx_error_irq_handler(dev_priv, eir, eir_stuck);
 
-		if (state.hotplug_status)
-			i9xx_hpd_irq_handler(display, state.hotplug_status);
-
-		i915_pipestat_irq_handler(display, state.iir, state.pipe_stats);
+		intel_display_irq_handler(display, &state);
 	} while (0);
 
 	pmu_irq_stats(dev_priv, ret);
@@ -1003,10 +990,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
 		if (state.iir & I915_MASTER_ERROR_INTERRUPT)
 			i9xx_error_irq_handler(dev_priv, eir, eir_stuck);
 
-		if (state.hotplug_status)
-			i9xx_hpd_irq_handler(display, state.hotplug_status);
-
-		i965_pipestat_irq_handler(display, state.iir, state.pipe_stats);
+		intel_display_irq_handler(display, &state);
 	} while (0);
 
 	pmu_irq_stats(dev_priv, IRQ_HANDLED);
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 736a5e6938d6..4f283fb79554 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -214,7 +214,7 @@ void xe_display_irq_handler(struct xe_device *xe, u32 master_ctl)
 		return;
 
 	if (master_ctl & DISPLAY_IRQ)
-		gen11_display_irq_handler(display);
+		intel_display_irq_handler(display, NULL);
 }
 
 void xe_display_irq_enable(struct xe_device *xe, u32 gu_misc_iir)
-- 
2.47.3

✗ CI.checkpatch: warning for drm/i915: add display irq hooks

[Patchwork]

== Series Details ==

Series: drm/i915: add display irq hooks
URL   : https://patchwork.freedesktop.org/series/165936/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c8c12e558adaef7a4d125d83b6e1f8824bc13b82
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 42b79ec08acaabb8e258edcdb571599694dea2eb
Author: Jani Nikula <jani.nikula@intel.com>
Date:   Tue May 5 01:26:13 2026 +0300

    drm/i915/irq: add intel_display_irq_handler() to irq funcs
    
    Call the platform specific display irq handler hooks via
    intel_display_irq_handler(). Add master_ctl to struct
    intel_display_irq_state, and pass the state pointer to the handler where
    necessary.
    
    v2: Rebase, handle LPE audio in ack (Ville)
    
    Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch 5521e3e7a175fef7d7a35a4b8fd17ca473be8e7e drm-intel
7b761176fc8b drm/i915/irq: deduplicate dg1_de_irq_postinstall() and gen11_de_irq_postinstall()
cf68dfb97458 drm/i915/irq: constify pipe stats parameters
-:53: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#53: FILE: drivers/gpu/drm/i915/display/intel_display_irq.h:81:
+void i915_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);

-:54: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#54: FILE: drivers/gpu/drm/i915/display/intel_display_irq.h:82:
+void i965_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);

-:55: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#55: FILE: drivers/gpu/drm/i915/display/intel_display_irq.h:83:
+void valleyview_pipestat_irq_handler(struct intel_display *display, const u32 pipe_stats[I915_MAX_PIPES]);

total: 0 errors, 3 warnings, 0 checks, 36 lines checked
dea19583b863 drm/i915/irq: add display irq funcs, start with intel_display_irq_reset()
8f71ec7cb5c1 drm/i915/irq: add intel_display_irq_postinstall() to irq funcs
514c1a0515a2 drm/i915/irq: add intel_display_irq_ack() to irq funcs
42b79ec08aca drm/i915/irq: add intel_display_irq_handler() to irq funcs
-:253: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#253: FILE: drivers/gpu/drm/i915/display/intel_display_irq.h:70:
+bool intel_display_irq_handler(struct intel_display *display, const struct intel_display_irq_state *state);

total: 0 errors, 1 warnings, 0 checks, 332 lines checked

✓ CI.KUnit: success for drm/i915: add display irq hooks

[Patchwork]

== Series Details ==

Series: drm/i915: add display irq hooks
URL   : https://patchwork.freedesktop.org/series/165936/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[22:32:01] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:32:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:32:37] Starting KUnit Kernel (1/1)...
[22:32:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:32:37] ================== guc_buf (11 subtests) ===================
[22:32:37] [PASSED] test_smallest
[22:32:37] [PASSED] test_largest
[22:32:37] [PASSED] test_granular
[22:32:37] [PASSED] test_unique
[22:32:37] [PASSED] test_overlap
[22:32:37] [PASSED] test_reusable
[22:32:37] [PASSED] test_too_big
[22:32:37] [PASSED] test_flush
[22:32:37] [PASSED] test_lookup
[22:32:37] [PASSED] test_data
[22:32:37] [PASSED] test_class
[22:32:37] ===================== [PASSED] guc_buf =====================
[22:32:37] =================== guc_dbm (7 subtests) ===================
[22:32:37] [PASSED] test_empty
[22:32:37] [PASSED] test_default
[22:32:37] ======================== test_size  ========================
[22:32:37] [PASSED] 4
[22:32:37] [PASSED] 8
[22:32:37] [PASSED] 32
[22:32:37] [PASSED] 256
[22:32:37] ==================== [PASSED] test_size ====================
[22:32:37] ======================= test_reuse  ========================
[22:32:37] [PASSED] 4
[22:32:37] [PASSED] 8
[22:32:37] [PASSED] 32
[22:32:37] [PASSED] 256
[22:32:37] =================== [PASSED] test_reuse ====================
[22:32:37] =================== test_range_overlap  ====================
[22:32:37] [PASSED] 4
[22:32:37] [PASSED] 8
[22:32:37] [PASSED] 32
[22:32:37] [PASSED] 256
[22:32:37] =============== [PASSED] test_range_overlap ================
[22:32:37] =================== test_range_compact  ====================
[22:32:37] [PASSED] 4
[22:32:37] [PASSED] 8
[22:32:37] [PASSED] 32
[22:32:37] [PASSED] 256
[22:32:37] =============== [PASSED] test_range_compact ================
[22:32:37] ==================== test_range_spare  =====================
[22:32:37] [PASSED] 4
[22:32:37] [PASSED] 8
[22:32:37] [PASSED] 32
[22:32:37] [PASSED] 256
[22:32:37] ================ [PASSED] test_range_spare =================
[22:32:37] ===================== [PASSED] guc_dbm =====================
[22:32:37] =================== guc_idm (6 subtests) ===================
[22:32:37] [PASSED] bad_init
[22:32:37] [PASSED] no_init
[22:32:37] [PASSED] init_fini
[22:32:37] [PASSED] check_used
[22:32:37] [PASSED] check_quota
[22:32:37] [PASSED] check_all
[22:32:37] ===================== [PASSED] guc_idm =====================
[22:32:37] ================== no_relay (3 subtests) ===================
[22:32:37] [PASSED] xe_drops_guc2pf_if_not_ready
[22:32:37] [PASSED] xe_drops_guc2vf_if_not_ready
[22:32:37] [PASSED] xe_rejects_send_if_not_ready
[22:32:37] ==================== [PASSED] no_relay =====================
[22:32:37] ================== pf_relay (14 subtests) ==================
[22:32:37] [PASSED] pf_rejects_guc2pf_too_short
[22:32:37] [PASSED] pf_rejects_guc2pf_too_long
[22:32:37] [PASSED] pf_rejects_guc2pf_no_payload
[22:32:37] [PASSED] pf_fails_no_payload
[22:32:37] [PASSED] pf_fails_bad_origin
[22:32:37] [PASSED] pf_fails_bad_type
[22:32:37] [PASSED] pf_txn_reports_error
[22:32:37] [PASSED] pf_txn_sends_pf2guc
[22:32:37] [PASSED] pf_sends_pf2guc
[22:32:37] [SKIPPED] pf_loopback_nop
[22:32:37] [SKIPPED] pf_loopback_echo
[22:32:37] [SKIPPED] pf_loopback_fail
[22:32:37] [SKIPPED] pf_loopback_busy
[22:32:37] [SKIPPED] pf_loopback_retry
[22:32:37] ==================== [PASSED] pf_relay =====================
[22:32:37] ================== vf_relay (3 subtests) ===================
[22:32:37] [PASSED] vf_rejects_guc2vf_too_short
[22:32:37] [PASSED] vf_rejects_guc2vf_too_long
[22:32:37] [PASSED] vf_rejects_guc2vf_no_payload
[22:32:37] ==================== [PASSED] vf_relay =====================
[22:32:37] ================ pf_gt_config (9 subtests) =================
[22:32:37] [PASSED] fair_contexts_1vf
[22:32:37] [PASSED] fair_doorbells_1vf
[22:32:37] [PASSED] fair_ggtt_1vf
[22:32:37] ====================== fair_vram_1vf  ======================
[22:32:37] [PASSED] 3.50 GiB
[22:32:37] [PASSED] 11.5 GiB
[22:32:37] [PASSED] 15.5 GiB
[22:32:37] [PASSED] 31.5 GiB
[22:32:37] [PASSED] 63.5 GiB
[22:32:37] [PASSED] 1.91 GiB
[22:32:37] ================== [PASSED] fair_vram_1vf ==================
[22:32:37] ================ fair_vram_1vf_admin_only  =================
[22:32:37] [PASSED] 3.50 GiB
[22:32:37] [PASSED] 11.5 GiB
[22:32:37] [PASSED] 15.5 GiB
[22:32:37] [PASSED] 31.5 GiB
[22:32:37] [PASSED] 63.5 GiB
[22:32:37] [PASSED] 1.91 GiB
[22:32:37] ============ [PASSED] fair_vram_1vf_admin_only =============
[22:32:37] ====================== fair_contexts  ======================
[22:32:37] [PASSED] 1 VF
[22:32:37] [PASSED] 2 VFs
[22:32:37] [PASSED] 3 VFs
[22:32:37] [PASSED] 4 VFs
[22:32:37] [PASSED] 5 VFs
[22:32:37] [PASSED] 6 VFs
[22:32:37] [PASSED] 7 VFs
[22:32:37] [PASSED] 8 VFs
[22:32:37] [PASSED] 9 VFs
[22:32:37] [PASSED] 10 VFs
[22:32:37] [PASSED] 11 VFs
[22:32:37] [PASSED] 12 VFs
[22:32:37] [PASSED] 13 VFs
[22:32:37] [PASSED] 14 VFs
[22:32:37] [PASSED] 15 VFs
[22:32:37] [PASSED] 16 VFs
[22:32:37] [PASSED] 17 VFs
[22:32:37] [PASSED] 18 VFs
[22:32:37] [PASSED] 19 VFs
[22:32:37] [PASSED] 20 VFs
[22:32:37] [PASSED] 21 VFs
[22:32:37] [PASSED] 22 VFs
[22:32:37] [PASSED] 23 VFs
[22:32:37] [PASSED] 24 VFs
[22:32:37] [PASSED] 25 VFs
[22:32:37] [PASSED] 26 VFs
[22:32:37] [PASSED] 27 VFs
[22:32:37] [PASSED] 28 VFs
[22:32:37] [PASSED] 29 VFs
[22:32:37] [PASSED] 30 VFs
[22:32:37] [PASSED] 31 VFs
[22:32:37] [PASSED] 32 VFs
[22:32:37] [PASSED] 33 VFs
[22:32:37] [PASSED] 34 VFs
[22:32:37] [PASSED] 35 VFs
[22:32:37] [PASSED] 36 VFs
[22:32:37] [PASSED] 37 VFs
[22:32:37] [PASSED] 38 VFs
[22:32:37] [PASSED] 39 VFs
[22:32:37] [PASSED] 40 VFs
[22:32:37] [PASSED] 41 VFs
[22:32:37] [PASSED] 42 VFs
[22:32:37] [PASSED] 43 VFs
[22:32:37] [PASSED] 44 VFs
[22:32:37] [PASSED] 45 VFs
[22:32:37] [PASSED] 46 VFs
[22:32:37] [PASSED] 47 VFs
[22:32:37] [PASSED] 48 VFs
[22:32:37] [PASSED] 49 VFs
[22:32:37] [PASSED] 50 VFs
[22:32:37] [PASSED] 51 VFs
[22:32:37] [PASSED] 52 VFs
[22:32:37] [PASSED] 53 VFs
[22:32:37] [PASSED] 54 VFs
[22:32:37] [PASSED] 55 VFs
[22:32:37] [PASSED] 56 VFs
[22:32:37] [PASSED] 57 VFs
[22:32:37] [PASSED] 58 VFs
[22:32:37] [PASSED] 59 VFs
[22:32:37] [PASSED] 60 VFs
[22:32:37] [PASSED] 61 VFs
[22:32:37] [PASSED] 62 VFs
[22:32:37] [PASSED] 63 VFs
[22:32:37] ================== [PASSED] fair_contexts ==================
[22:32:37] ===================== fair_doorbells  ======================
[22:32:37] [PASSED] 1 VF
[22:32:37] [PASSED] 2 VFs
[22:32:37] [PASSED] 3 VFs
[22:32:37] [PASSED] 4 VFs
[22:32:37] [PASSED] 5 VFs
[22:32:37] [PASSED] 6 VFs
[22:32:37] [PASSED] 7 VFs
[22:32:37] [PASSED] 8 VFs
[22:32:37] [PASSED] 9 VFs
[22:32:37] [PASSED] 10 VFs
[22:32:37] [PASSED] 11 VFs
[22:32:37] [PASSED] 12 VFs
[22:32:37] [PASSED] 13 VFs
[22:32:37] [PASSED] 14 VFs
[22:32:37] [PASSED] 15 VFs
[22:32:37] [PASSED] 16 VFs
[22:32:37] [PASSED] 17 VFs
[22:32:37] [PASSED] 18 VFs
[22:32:37] [PASSED] 19 VFs
[22:32:37] [PASSED] 20 VFs
[22:32:37] [PASSED] 21 VFs
[22:32:37] [PASSED] 22 VFs
[22:32:37] [PASSED] 23 VFs
[22:32:37] [PASSED] 24 VFs
[22:32:37] [PASSED] 25 VFs
[22:32:37] [PASSED] 26 VFs
[22:32:37] [PASSED] 27 VFs
[22:32:37] [PASSED] 28 VFs
[22:32:37] [PASSED] 29 VFs
[22:32:37] [PASSED] 30 VFs
[22:32:37] [PASSED] 31 VFs
[22:32:37] [PASSED] 32 VFs
[22:32:37] [PASSED] 33 VFs
[22:32:37] [PASSED] 34 VFs
[22:32:37] [PASSED] 35 VFs
[22:32:37] [PASSED] 36 VFs
[22:32:37] [PASSED] 37 VFs
[22:32:37] [PASSED] 38 VFs
[22:32:37] [PASSED] 39 VFs
[22:32:37] [PASSED] 40 VFs
[22:32:37] [PASSED] 41 VFs
[22:32:37] [PASSED] 42 VFs
[22:32:37] [PASSED] 43 VFs
[22:32:37] [PASSED] 44 VFs
[22:32:37] [PASSED] 45 VFs
[22:32:37] [PASSED] 46 VFs
[22:32:37] [PASSED] 47 VFs
[22:32:37] [PASSED] 48 VFs
[22:32:37] [PASSED] 49 VFs
[22:32:37] [PASSED] 50 VFs
[22:32:37] [PASSED] 51 VFs
[22:32:37] [PASSED] 52 VFs
[22:32:37] [PASSED] 53 VFs
[22:32:37] [PASSED] 54 VFs
[22:32:37] [PASSED] 55 VFs
[22:32:37] [PASSED] 56 VFs
[22:32:37] [PASSED] 57 VFs
[22:32:37] [PASSED] 58 VFs
[22:32:37] [PASSED] 59 VFs
[22:32:37] [PASSED] 60 VFs
[22:32:37] [PASSED] 61 VFs
[22:32:37] [PASSED] 62 VFs
[22:32:37] [PASSED] 63 VFs
[22:32:37] ================= [PASSED] fair_doorbells ==================
[22:32:37] ======================== fair_ggtt  ========================
[22:32:37] [PASSED] 1 VF
[22:32:37] [PASSED] 2 VFs
[22:32:37] [PASSED] 3 VFs
[22:32:37] [PASSED] 4 VFs
[22:32:37] [PASSED] 5 VFs
[22:32:37] [PASSED] 6 VFs
[22:32:37] [PASSED] 7 VFs
[22:32:37] [PASSED] 8 VFs
[22:32:37] [PASSED] 9 VFs
[22:32:37] [PASSED] 10 VFs
[22:32:37] [PASSED] 11 VFs
[22:32:37] [PASSED] 12 VFs
[22:32:37] [PASSED] 13 VFs
[22:32:37] [PASSED] 14 VFs
[22:32:37] [PASSED] 15 VFs
[22:32:37] [PASSED] 16 VFs
[22:32:37] [PASSED] 17 VFs
[22:32:37] [PASSED] 18 VFs
[22:32:37] [PASSED] 19 VFs
[22:32:37] [PASSED] 20 VFs
[22:32:37] [PASSED] 21 VFs
[22:32:37] [PASSED] 22 VFs
[22:32:37] [PASSED] 23 VFs
[22:32:37] [PASSED] 24 VFs
[22:32:37] [PASSED] 25 VFs
[22:32:37] [PASSED] 26 VFs
[22:32:37] [PASSED] 27 VFs
[22:32:37] [PASSED] 28 VFs
[22:32:37] [PASSED] 29 VFs
[22:32:37] [PASSED] 30 VFs
[22:32:37] [PASSED] 31 VFs
[22:32:37] [PASSED] 32 VFs
[22:32:37] [PASSED] 33 VFs
[22:32:37] [PASSED] 34 VFs
[22:32:37] [PASSED] 35 VFs
[22:32:37] [PASSED] 36 VFs
[22:32:37] [PASSED] 37 VFs
[22:32:37] [PASSED] 38 VFs
[22:32:37] [PASSED] 39 VFs
[22:32:37] [PASSED] 40 VFs
[22:32:37] [PASSED] 41 VFs
[22:32:37] [PASSED] 42 VFs
[22:32:37] [PASSED] 43 VFs
[22:32:37] [PASSED] 44 VFs
[22:32:37] [PASSED] 45 VFs
[22:32:37] [PASSED] 46 VFs
[22:32:37] [PASSED] 47 VFs
[22:32:37] [PASSED] 48 VFs
[22:32:37] [PASSED] 49 VFs
[22:32:37] [PASSED] 50 VFs
[22:32:37] [PASSED] 51 VFs
[22:32:37] [PASSED] 52 VFs
[22:32:37] [PASSED] 53 VFs
[22:32:37] [PASSED] 54 VFs
[22:32:37] [PASSED] 55 VFs
[22:32:37] [PASSED] 56 VFs
[22:32:37] [PASSED] 57 VFs
[22:32:37] [PASSED] 58 VFs
[22:32:37] [PASSED] 59 VFs
[22:32:37] [PASSED] 60 VFs
[22:32:37] [PASSED] 61 VFs
[22:32:37] [PASSED] 62 VFs
[22:32:37] [PASSED] 63 VFs
[22:32:37] ==================== [PASSED] fair_ggtt ====================
[22:32:37] ======================== fair_vram  ========================
[22:32:37] [PASSED] 1 VF
[22:32:37] [PASSED] 2 VFs
[22:32:37] [PASSED] 3 VFs
[22:32:37] [PASSED] 4 VFs
[22:32:37] [PASSED] 5 VFs
[22:32:37] [PASSED] 6 VFs
[22:32:37] [PASSED] 7 VFs
[22:32:37] [PASSED] 8 VFs
[22:32:37] [PASSED] 9 VFs
[22:32:37] [PASSED] 10 VFs
[22:32:37] [PASSED] 11 VFs
[22:32:37] [PASSED] 12 VFs
[22:32:37] [PASSED] 13 VFs
[22:32:37] [PASSED] 14 VFs
[22:32:37] [PASSED] 15 VFs
[22:32:37] [PASSED] 16 VFs
[22:32:37] [PASSED] 17 VFs
[22:32:37] [PASSED] 18 VFs
[22:32:37] [PASSED] 19 VFs
[22:32:37] [PASSED] 20 VFs
[22:32:37] [PASSED] 21 VFs
[22:32:37] [PASSED] 22 VFs
[22:32:37] [PASSED] 23 VFs
[22:32:37] [PASSED] 24 VFs
[22:32:37] [PASSED] 25 VFs
[22:32:37] [PASSED] 26 VFs
[22:32:37] [PASSED] 27 VFs
[22:32:37] [PASSED] 28 VFs
[22:32:37] [PASSED] 29 VFs
[22:32:37] [PASSED] 30 VFs
[22:32:37] [PASSED] 31 VFs
[22:32:37] [PASSED] 32 VFs
[22:32:37] [PASSED] 33 VFs
[22:32:37] [PASSED] 34 VFs
[22:32:37] [PASSED] 35 VFs
[22:32:37] [PASSED] 36 VFs
[22:32:37] [PASSED] 37 VFs
[22:32:37] [PASSED] 38 VFs
[22:32:37] [PASSED] 39 VFs
[22:32:37] [PASSED] 40 VFs
[22:32:37] [PASSED] 41 VFs
[22:32:37] [PASSED] 42 VFs
[22:32:37] [PASSED] 43 VFs
[22:32:37] [PASSED] 44 VFs
[22:32:37] [PASSED] 45 VFs
[22:32:37] [PASSED] 46 VFs
[22:32:37] [PASSED] 47 VFs
[22:32:37] [PASSED] 48 VFs
[22:32:37] [PASSED] 49 VFs
[22:32:37] [PASSED] 50 VFs
[22:32:37] [PASSED] 51 VFs
[22:32:37] [PASSED] 52 VFs
[22:32:37] [PASSED] 53 VFs
[22:32:37] [PASSED] 54 VFs
[22:32:37] [PASSED] 55 VFs
[22:32:37] [PASSED] 56 VFs
[22:32:37] [PASSED] 57 VFs
[22:32:37] [PASSED] 58 VFs
[22:32:37] [PASSED] 59 VFs
[22:32:37] [PASSED] 60 VFs
[22:32:37] [PASSED] 61 VFs
[22:32:37] [PASSED] 62 VFs
[22:32:37] [PASSED] 63 VFs
[22:32:37] ==================== [PASSED] fair_vram ====================
[22:32:37] ================== [PASSED] pf_gt_config ===================
[22:32:37] ===================== lmtt (1 subtest) =====================
[22:32:37] ======================== test_ops  =========================
[22:32:37] [PASSED] 2-level
[22:32:37] [PASSED] multi-level
[22:32:37] ==================== [PASSED] test_ops =====================
[22:32:37] ====================== [PASSED] lmtt =======================
[22:32:37] ================= pf_service (11 subtests) =================
[22:32:37] [PASSED] pf_negotiate_any
[22:32:37] [PASSED] pf_negotiate_base_match
[22:32:37] [PASSED] pf_negotiate_base_newer
[22:32:37] [PASSED] pf_negotiate_base_next
[22:32:37] [SKIPPED] pf_negotiate_base_older
[22:32:37] [PASSED] pf_negotiate_base_prev
[22:32:37] [PASSED] pf_negotiate_latest_match
[22:32:37] [PASSED] pf_negotiate_latest_newer
[22:32:37] [PASSED] pf_negotiate_latest_next
[22:32:37] [SKIPPED] pf_negotiate_latest_older
[22:32:37] [SKIPPED] pf_negotiate_latest_prev
[22:32:37] =================== [PASSED] pf_service ====================
[22:32:37] ================= xe_guc_g2g (2 subtests) ==================
[22:32:37] ============== xe_live_guc_g2g_kunit_default  ==============
[22:32:37] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[22:32:37] ============== xe_live_guc_g2g_kunit_allmem  ===============
[22:32:37] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[22:32:37] =================== [SKIPPED] xe_guc_g2g ===================
[22:32:37] =================== xe_mocs (2 subtests) ===================
[22:32:37] ================ xe_live_mocs_kernel_kunit  ================
[22:32:37] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[22:32:37] ================ xe_live_mocs_reset_kunit  =================
[22:32:37] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[22:32:37] ==================== [SKIPPED] xe_mocs =====================
[22:32:37] ================= xe_migrate (2 subtests) ==================
[22:32:37] ================= xe_migrate_sanity_kunit  =================
[22:32:37] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[22:32:37] ================== xe_validate_ccs_kunit  ==================
[22:32:37] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[22:32:37] =================== [SKIPPED] xe_migrate ===================
[22:32:37] ================== xe_dma_buf (1 subtest) ==================
[22:32:37] ==================== xe_dma_buf_kunit  =====================
[22:32:37] ================ [SKIPPED] xe_dma_buf_kunit ================
[22:32:37] =================== [SKIPPED] xe_dma_buf ===================
[22:32:37] ================= xe_bo_shrink (1 subtest) =================
[22:32:37] =================== xe_bo_shrink_kunit  ====================
[22:32:37] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[22:32:37] ================== [SKIPPED] xe_bo_shrink ==================
[22:32:37] ==================== xe_bo (2 subtests) ====================
[22:32:37] ================== xe_ccs_migrate_kunit  ===================
[22:32:37] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[22:32:37] ==================== xe_bo_evict_kunit  ====================
[22:32:37] =============== [SKIPPED] xe_bo_evict_kunit ================
[22:32:37] ===================== [SKIPPED] xe_bo ======================
[22:32:37] ==================== args (13 subtests) ====================
[22:32:37] [PASSED] count_args_test
[22:32:37] [PASSED] call_args_example
[22:32:37] [PASSED] call_args_test
[22:32:37] [PASSED] drop_first_arg_example
[22:32:37] [PASSED] drop_first_arg_test
[22:32:37] [PASSED] first_arg_example
[22:32:37] [PASSED] first_arg_test
[22:32:37] [PASSED] last_arg_example
[22:32:37] [PASSED] last_arg_test
[22:32:37] [PASSED] pick_arg_example
[22:32:37] [PASSED] if_args_example
[22:32:37] [PASSED] if_args_test
[22:32:37] [PASSED] sep_comma_example
[22:32:37] ====================== [PASSED] args =======================
[22:32:37] =================== xe_pci (3 subtests) ====================
[22:32:37] ==================== check_graphics_ip  ====================
[22:32:37] [PASSED] 12.00 Xe_LP
[22:32:37] [PASSED] 12.10 Xe_LP+
[22:32:37] [PASSED] 12.55 Xe_HPG
[22:32:37] [PASSED] 12.60 Xe_HPC
[22:32:37] [PASSED] 12.70 Xe_LPG
[22:32:37] [PASSED] 12.71 Xe_LPG
[22:32:37] [PASSED] 12.74 Xe_LPG+
[22:32:37] [PASSED] 20.01 Xe2_HPG
[22:32:37] [PASSED] 20.02 Xe2_HPG
[22:32:37] [PASSED] 20.04 Xe2_LPG
[22:32:37] [PASSED] 30.00 Xe3_LPG
[22:32:37] [PASSED] 30.01 Xe3_LPG
[22:32:37] [PASSED] 30.03 Xe3_LPG
[22:32:37] [PASSED] 30.04 Xe3_LPG
[22:32:37] [PASSED] 30.05 Xe3_LPG
[22:32:37] [PASSED] 35.10 Xe3p_LPG
[22:32:37] [PASSED] 35.11 Xe3p_XPC
[22:32:37] ================ [PASSED] check_graphics_ip ================
[22:32:37] ===================== check_media_ip  ======================
[22:32:37] [PASSED] 12.00 Xe_M
[22:32:37] [PASSED] 12.55 Xe_HPM
[22:32:37] [PASSED] 13.00 Xe_LPM+
[22:32:37] [PASSED] 13.01 Xe2_HPM
[22:32:37] [PASSED] 20.00 Xe2_LPM
[22:32:37] [PASSED] 30.00 Xe3_LPM
[22:32:37] [PASSED] 30.02 Xe3_LPM
[22:32:37] [PASSED] 35.00 Xe3p_LPM
[22:32:37] [PASSED] 35.03 Xe3p_HPM
[22:32:37] ================= [PASSED] check_media_ip ==================
[22:32:37] =================== check_platform_desc  ===================
[22:32:37] [PASSED] 0x9A60 (TIGERLAKE)
[22:32:37] [PASSED] 0x9A68 (TIGERLAKE)
[22:32:37] [PASSED] 0x9A70 (TIGERLAKE)
[22:32:37] [PASSED] 0x9A40 (TIGERLAKE)
[22:32:37] [PASSED] 0x9A49 (TIGERLAKE)
[22:32:37] [PASSED] 0x9A59 (TIGERLAKE)
[22:32:37] [PASSED] 0x9A78 (TIGERLAKE)
[22:32:37] [PASSED] 0x9AC0 (TIGERLAKE)
[22:32:37] [PASSED] 0x9AC9 (TIGERLAKE)
[22:32:37] [PASSED] 0x9AD9 (TIGERLAKE)
[22:32:37] [PASSED] 0x9AF8 (TIGERLAKE)
[22:32:37] [PASSED] 0x4C80 (ROCKETLAKE)
[22:32:37] [PASSED] 0x4C8A (ROCKETLAKE)
[22:32:37] [PASSED] 0x4C8B (ROCKETLAKE)
[22:32:37] [PASSED] 0x4C8C (ROCKETLAKE)
[22:32:37] [PASSED] 0x4C90 (ROCKETLAKE)
[22:32:37] [PASSED] 0x4C9A (ROCKETLAKE)
[22:32:37] [PASSED] 0x4680 (ALDERLAKE_S)
[22:32:37] [PASSED] 0x4682 (ALDERLAKE_S)
[22:32:37] [PASSED] 0x4688 (ALDERLAKE_S)
[22:32:37] [PASSED] 0x468A (ALDERLAKE_S)
[22:32:37] [PASSED] 0x468B (ALDERLAKE_S)
[22:32:37] [PASSED] 0x4690 (ALDERLAKE_S)
[22:32:37] [PASSED] 0x4692 (ALDERLAKE_S)
[22:32:37] [PASSED] 0x4693 (ALDERLAKE_S)
[22:32:37] [PASSED] 0x46A0 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46A1 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46A2 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46A3 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46A6 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46A8 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46AA (ALDERLAKE_P)
[22:32:37] [PASSED] 0x462A (ALDERLAKE_P)
[22:32:37] [PASSED] 0x4626 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x4628 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46B0 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46B1 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46B2 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46B3 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46C0 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46C1 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46C2 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46C3 (ALDERLAKE_P)
[22:32:37] [PASSED] 0x46D0 (ALDERLAKE_N)
[22:32:37] [PASSED] 0x46D1 (ALDERLAKE_N)
[22:32:37] [PASSED] 0x46D2 (ALDERLAKE_N)
[22:32:37] [PASSED] 0x46D3 (ALDERLAKE_N)
[22:32:37] [PASSED] 0x46D4 (ALDERLAKE_N)
[22:32:37] [PASSED] 0xA721 (ALDERLAKE_P)
[22:32:37] [PASSED] 0xA7A1 (ALDERLAKE_P)
[22:32:37] [PASSED] 0xA7A9 (ALDERLAKE_P)
[22:32:37] [PASSED] 0xA7AC (ALDERLAKE_P)
[22:32:37] [PASSED] 0xA7AD (ALDERLAKE_P)
[22:32:37] [PASSED] 0xA720 (ALDERLAKE_P)
[22:32:37] [PASSED] 0xA7A0 (ALDERLAKE_P)
[22:32:37] [PASSED] 0xA7A8 (ALDERLAKE_P)
[22:32:37] [PASSED] 0xA7AA (ALDERLAKE_P)
[22:32:37] [PASSED] 0xA7AB (ALDERLAKE_P)
[22:32:37] [PASSED] 0xA780 (ALDERLAKE_S)
[22:32:37] [PASSED] 0xA781 (ALDERLAKE_S)
[22:32:37] [PASSED] 0xA782 (ALDERLAKE_S)
[22:32:37] [PASSED] 0xA783 (ALDERLAKE_S)
[22:32:37] [PASSED] 0xA788 (ALDERLAKE_S)
[22:32:37] [PASSED] 0xA789 (ALDERLAKE_S)
[22:32:37] [PASSED] 0xA78A (ALDERLAKE_S)
[22:32:37] [PASSED] 0xA78B (ALDERLAKE_S)
[22:32:37] [PASSED] 0x4905 (DG1)
[22:32:37] [PASSED] 0x4906 (DG1)
[22:32:37] [PASSED] 0x4907 (DG1)
[22:32:37] [PASSED] 0x4908 (DG1)
[22:32:37] [PASSED] 0x4909 (DG1)
[22:32:37] [PASSED] 0x56C0 (DG2)
[22:32:37] [PASSED] 0x56C2 (DG2)
[22:32:37] [PASSED] 0x56C1 (DG2)
[22:32:37] [PASSED] 0x7D51 (METEORLAKE)
[22:32:37] [PASSED] 0x7DD1 (METEORLAKE)
[22:32:37] [PASSED] 0x7D41 (METEORLAKE)
[22:32:37] [PASSED] 0x7D67 (METEORLAKE)
[22:32:37] [PASSED] 0xB640 (METEORLAKE)
[22:32:37] [PASSED] 0x56A0 (DG2)
[22:32:37] [PASSED] 0x56A1 (DG2)
[22:32:37] [PASSED] 0x56A2 (DG2)
[22:32:37] [PASSED] 0x56BE (DG2)
[22:32:37] [PASSED] 0x56BF (DG2)
[22:32:37] [PASSED] 0x5690 (DG2)
[22:32:37] [PASSED] 0x5691 (DG2)
[22:32:37] [PASSED] 0x5692 (DG2)
[22:32:37] [PASSED] 0x56A5 (DG2)
[22:32:37] [PASSED] 0x56A6 (DG2)
[22:32:37] [PASSED] 0x56B0 (DG2)
[22:32:37] [PASSED] 0x56B1 (DG2)
[22:32:37] [PASSED] 0x56BA (DG2)
[22:32:37] [PASSED] 0x56BB (DG2)
[22:32:37] [PASSED] 0x56BC (DG2)
[22:32:37] [PASSED] 0x56BD (DG2)
[22:32:37] [PASSED] 0x5693 (DG2)
[22:32:37] [PASSED] 0x5694 (DG2)
[22:32:37] [PASSED] 0x5695 (DG2)
[22:32:37] [PASSED] 0x56A3 (DG2)
[22:32:37] [PASSED] 0x56A4 (DG2)
[22:32:37] [PASSED] 0x56B2 (DG2)
[22:32:37] [PASSED] 0x56B3 (DG2)
[22:32:37] [PASSED] 0x5696 (DG2)
[22:32:37] [PASSED] 0x5697 (DG2)
[22:32:37] [PASSED] 0xB69 (PVC)
[22:32:37] [PASSED] 0xB6E (PVC)
[22:32:37] [PASSED] 0xBD4 (PVC)
[22:32:37] [PASSED] 0xBD5 (PVC)
[22:32:37] [PASSED] 0xBD6 (PVC)
[22:32:37] [PASSED] 0xBD7 (PVC)
[22:32:37] [PASSED] 0xBD8 (PVC)
[22:32:37] [PASSED] 0xBD9 (PVC)
[22:32:37] [PASSED] 0xBDA (PVC)
[22:32:37] [PASSED] 0xBDB (PVC)
[22:32:37] [PASSED] 0xBE0 (PVC)
[22:32:37] [PASSED] 0xBE1 (PVC)
[22:32:37] [PASSED] 0xBE5 (PVC)
[22:32:37] [PASSED] 0x7D40 (METEORLAKE)
[22:32:37] [PASSED] 0x7D45 (METEORLAKE)
[22:32:37] [PASSED] 0x7D55 (METEORLAKE)
[22:32:37] [PASSED] 0x7D60 (METEORLAKE)
[22:32:37] [PASSED] 0x7DD5 (METEORLAKE)
[22:32:37] [PASSED] 0x6420 (LUNARLAKE)
[22:32:37] [PASSED] 0x64A0 (LUNARLAKE)
[22:32:37] [PASSED] 0x64B0 (LUNARLAKE)
[22:32:37] [PASSED] 0xE202 (BATTLEMAGE)
[22:32:37] [PASSED] 0xE209 (BATTLEMAGE)
[22:32:37] [PASSED] 0xE20B (BATTLEMAGE)
[22:32:37] [PASSED] 0xE20C (BATTLEMAGE)
[22:32:37] [PASSED] 0xE20D (BATTLEMAGE)
[22:32:37] [PASSED] 0xE210 (BATTLEMAGE)
[22:32:37] [PASSED] 0xE211 (BATTLEMAGE)
[22:32:37] [PASSED] 0xE212 (BATTLEMAGE)
[22:32:37] [PASSED] 0xE216 (BATTLEMAGE)
[22:32:37] [PASSED] 0xE220 (BATTLEMAGE)
[22:32:37] [PASSED] 0xE221 (BATTLEMAGE)
[22:32:37] [PASSED] 0xE222 (BATTLEMAGE)
[22:32:37] [PASSED] 0xE223 (BATTLEMAGE)
[22:32:37] [PASSED] 0xB080 (PANTHERLAKE)
[22:32:37] [PASSED] 0xB081 (PANTHERLAKE)
[22:32:37] [PASSED] 0xB082 (PANTHERLAKE)
[22:32:37] [PASSED] 0xB083 (PANTHERLAKE)
[22:32:37] [PASSED] 0xB084 (PANTHERLAKE)
[22:32:37] [PASSED] 0xB085 (PANTHERLAKE)
[22:32:37] [PASSED] 0xB086 (PANTHERLAKE)
[22:32:37] [PASSED] 0xB087 (PANTHERLAKE)
[22:32:37] [PASSED] 0xB08F (PANTHERLAKE)
[22:32:37] [PASSED] 0xB090 (PANTHERLAKE)
[22:32:37] [PASSED] 0xB0A0 (PANTHERLAKE)
[22:32:37] [PASSED] 0xB0B0 (PANTHERLAKE)
[22:32:37] [PASSED] 0xFD80 (PANTHERLAKE)
[22:32:37] [PASSED] 0xFD81 (PANTHERLAKE)
[22:32:37] [PASSED] 0xD740 (NOVALAKE_S)
[22:32:37] [PASSED] 0xD741 (NOVALAKE_S)
[22:32:37] [PASSED] 0xD742 (NOVALAKE_S)
[22:32:37] [PASSED] 0xD743 (NOVALAKE_S)
[22:32:37] [PASSED] 0xD744 (NOVALAKE_S)
[22:32:37] [PASSED] 0xD745 (NOVALAKE_S)
[22:32:37] [PASSED] 0x674C (CRESCENTISLAND)
[22:32:37] [PASSED] 0xD750 (NOVALAKE_P)
[22:32:37] [PASSED] 0xD751 (NOVALAKE_P)
[22:32:37] [PASSED] 0xD752 (NOVALAKE_P)
[22:32:37] [PASSED] 0xD753 (NOVALAKE_P)
[22:32:37] [PASSED] 0xD754 (NOVALAKE_P)
[22:32:37] [PASSED] 0xD755 (NOVALAKE_P)
[22:32:37] [PASSED] 0xD756 (NOVALAKE_P)
[22:32:37] [PASSED] 0xD757 (NOVALAKE_P)
[22:32:37] [PASSED] 0xD75F (NOVALAKE_P)
[22:32:37] =============== [PASSED] check_platform_desc ===============
[22:32:37] ===================== [PASSED] xe_pci ======================
[22:32:37] =================== xe_rtp (2 subtests) ====================
[22:32:37] =============== xe_rtp_process_to_sr_tests  ================
[22:32:37] [PASSED] coalesce-same-reg
[22:32:37] [PASSED] no-match-no-add
[22:32:37] [PASSED] match-or
[22:32:37] [PASSED] match-or-xfail
[22:32:37] [PASSED] no-match-no-add-multiple-rules
[22:32:37] [PASSED] two-regs-two-entries
[22:32:37] [PASSED] clr-one-set-other
[22:32:37] [PASSED] set-field
[22:32:37] [PASSED] conflict-duplicate
[22:32:37] [PASSED] conflict-not-disjoint
[22:32:37] [PASSED] conflict-reg-type
[22:32:37] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[22:32:37] ================== xe_rtp_process_tests  ===================
[22:32:37] [PASSED] active1
[22:32:37] [PASSED] active2
[22:32:37] [PASSED] active-inactive
[22:32:37] [PASSED] inactive-active
[22:32:37] [PASSED] inactive-1st_or_active-inactive
[22:32:37] [PASSED] inactive-2nd_or_active-inactive
[22:32:37] [PASSED] inactive-last_or_active-inactive
[22:32:37] [PASSED] inactive-no_or_active-inactive
[22:32:37] ============== [PASSED] xe_rtp_process_tests ===============
[22:32:37] ===================== [PASSED] xe_rtp ======================
[22:32:37] ==================== xe_wa (1 subtest) =====================
[22:32:37] ======================== xe_wa_gt  =========================
[22:32:37] [PASSED] TIGERLAKE B0
[22:32:37] [PASSED] DG1 A0
[22:32:37] [PASSED] DG1 B0
[22:32:37] [PASSED] ALDERLAKE_S A0
[22:32:37] [PASSED] ALDERLAKE_S B0
[22:32:37] [PASSED] ALDERLAKE_S C0
[22:32:37] [PASSED] ALDERLAKE_S D0
[22:32:37] [PASSED] ALDERLAKE_P A0
[22:32:37] [PASSED] ALDERLAKE_P B0
[22:32:37] [PASSED] ALDERLAKE_P C0
[22:32:37] [PASSED] ALDERLAKE_S RPLS D0
[22:32:37] [PASSED] ALDERLAKE_P RPLU E0
[22:32:37] [PASSED] DG2 G10 C0
[22:32:37] [PASSED] DG2 G11 B1
[22:32:37] [PASSED] DG2 G12 A1
[22:32:37] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:32:37] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:32:37] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[22:32:37] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[22:32:37] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[22:32:37] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[22:32:37] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[22:32:37] ==================== [PASSED] xe_wa_gt =====================
[22:32:37] ====================== [PASSED] xe_wa ======================
[22:32:37] ============================================================
[22:32:37] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[22:32:37] Elapsed time: 36.164s total, 4.290s configuring, 31.259s building, 0.599s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[22:32:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:32:39] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:33:04] Starting KUnit Kernel (1/1)...
[22:33:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:33:04] ============ drm_test_pick_cmdline (2 subtests) ============
[22:33:04] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[22:33:04] =============== drm_test_pick_cmdline_named  ===============
[22:33:04] [PASSED] NTSC
[22:33:04] [PASSED] NTSC-J
[22:33:04] [PASSED] PAL
[22:33:04] [PASSED] PAL-M
[22:33:04] =========== [PASSED] drm_test_pick_cmdline_named ===========
[22:33:04] ============== [PASSED] drm_test_pick_cmdline ==============
[22:33:04] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[22:33:04] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[22:33:04] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[22:33:04] =========== drm_validate_clone_mode (2 subtests) ===========
[22:33:04] ============== drm_test_check_in_clone_mode  ===============
[22:33:04] [PASSED] in_clone_mode
[22:33:04] [PASSED] not_in_clone_mode
[22:33:04] ========== [PASSED] drm_test_check_in_clone_mode ===========
[22:33:04] =============== drm_test_check_valid_clones  ===============
[22:33:04] [PASSED] not_in_clone_mode
[22:33:04] [PASSED] valid_clone
[22:33:04] [PASSED] invalid_clone
[22:33:04] =========== [PASSED] drm_test_check_valid_clones ===========
[22:33:04] ============= [PASSED] drm_validate_clone_mode =============
[22:33:04] ============= drm_validate_modeset (1 subtest) =============
[22:33:04] [PASSED] drm_test_check_connector_changed_modeset
[22:33:04] ============== [PASSED] drm_validate_modeset ===============
[22:33:04] ====== drm_test_bridge_get_current_state (2 subtests) ======
[22:33:04] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[22:33:04] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[22:33:04] ======== [PASSED] drm_test_bridge_get_current_state ========
[22:33:04] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[22:33:04] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[22:33:04] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[22:33:04] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[22:33:04] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[22:33:04] ============== drm_bridge_alloc (2 subtests) ===============
[22:33:04] [PASSED] drm_test_drm_bridge_alloc_basic
[22:33:04] [PASSED] drm_test_drm_bridge_alloc_get_put
[22:33:04] ================ [PASSED] drm_bridge_alloc =================
[22:33:04] ============= drm_cmdline_parser (40 subtests) =============
[22:33:04] [PASSED] drm_test_cmdline_force_d_only
[22:33:04] [PASSED] drm_test_cmdline_force_D_only_dvi
[22:33:04] [PASSED] drm_test_cmdline_force_D_only_hdmi
[22:33:04] [PASSED] drm_test_cmdline_force_D_only_not_digital
[22:33:04] [PASSED] drm_test_cmdline_force_e_only
[22:33:04] [PASSED] drm_test_cmdline_res
[22:33:04] [PASSED] drm_test_cmdline_res_vesa
[22:33:04] [PASSED] drm_test_cmdline_res_vesa_rblank
[22:33:04] [PASSED] drm_test_cmdline_res_rblank
[22:33:04] [PASSED] drm_test_cmdline_res_bpp
[22:33:04] [PASSED] drm_test_cmdline_res_refresh
[22:33:04] [PASSED] drm_test_cmdline_res_bpp_refresh
[22:33:04] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[22:33:04] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[22:33:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[22:33:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[22:33:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[22:33:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[22:33:04] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[22:33:04] [PASSED] drm_test_cmdline_res_margins_force_on
[22:33:04] [PASSED] drm_test_cmdline_res_vesa_margins
[22:33:04] [PASSED] drm_test_cmdline_name
[22:33:04] [PASSED] drm_test_cmdline_name_bpp
[22:33:04] [PASSED] drm_test_cmdline_name_option
[22:33:04] [PASSED] drm_test_cmdline_name_bpp_option
[22:33:04] [PASSED] drm_test_cmdline_rotate_0
[22:33:04] [PASSED] drm_test_cmdline_rotate_90
[22:33:04] [PASSED] drm_test_cmdline_rotate_180
[22:33:04] [PASSED] drm_test_cmdline_rotate_270
[22:33:04] [PASSED] drm_test_cmdline_hmirror
[22:33:04] [PASSED] drm_test_cmdline_vmirror
[22:33:04] [PASSED] drm_test_cmdline_margin_options
[22:33:04] [PASSED] drm_test_cmdline_multiple_options
[22:33:04] [PASSED] drm_test_cmdline_bpp_extra_and_option
[22:33:04] [PASSED] drm_test_cmdline_extra_and_option
[22:33:04] [PASSED] drm_test_cmdline_freestanding_options
[22:33:04] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[22:33:04] [PASSED] drm_test_cmdline_panel_orientation
[22:33:04] ================ drm_test_cmdline_invalid  =================
[22:33:04] [PASSED] margin_only
[22:33:04] [PASSED] interlace_only
[22:33:04] [PASSED] res_missing_x
[22:33:04] [PASSED] res_missing_y
[22:33:04] [PASSED] res_bad_y
[22:33:04] [PASSED] res_missing_y_bpp
[22:33:04] [PASSED] res_bad_bpp
[22:33:04] [PASSED] res_bad_refresh
[22:33:04] [PASSED] res_bpp_refresh_force_on_off
[22:33:04] [PASSED] res_invalid_mode
[22:33:04] [PASSED] res_bpp_wrong_place_mode
[22:33:04] [PASSED] name_bpp_refresh
[22:33:04] [PASSED] name_refresh
[22:33:04] [PASSED] name_refresh_wrong_mode
[22:33:04] [PASSED] name_refresh_invalid_mode
[22:33:04] [PASSED] rotate_multiple
[22:33:04] [PASSED] rotate_invalid_val
[22:33:04] [PASSED] rotate_truncated
[22:33:04] [PASSED] invalid_option
[22:33:04] [PASSED] invalid_tv_option
[22:33:04] [PASSED] truncated_tv_option
[22:33:04] ============ [PASSED] drm_test_cmdline_invalid =============
[22:33:04] =============== drm_test_cmdline_tv_options  ===============
[22:33:04] [PASSED] NTSC
[22:33:04] [PASSED] NTSC_443
[22:33:04] [PASSED] NTSC_J
[22:33:04] [PASSED] PAL
[22:33:04] [PASSED] PAL_M
[22:33:04] [PASSED] PAL_N
[22:33:04] [PASSED] SECAM
[22:33:04] [PASSED] MONO_525
[22:33:04] [PASSED] MONO_625
[22:33:04] =========== [PASSED] drm_test_cmdline_tv_options ===========
[22:33:04] =============== [PASSED] drm_cmdline_parser ================
[22:33:04] ========== drmm_connector_hdmi_init (20 subtests) ==========
[22:33:04] [PASSED] drm_test_connector_hdmi_init_valid
[22:33:04] [PASSED] drm_test_connector_hdmi_init_bpc_8
[22:33:04] [PASSED] drm_test_connector_hdmi_init_bpc_10
[22:33:04] [PASSED] drm_test_connector_hdmi_init_bpc_12
[22:33:04] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[22:33:04] [PASSED] drm_test_connector_hdmi_init_bpc_null
[22:33:04] [PASSED] drm_test_connector_hdmi_init_formats_empty
[22:33:04] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[22:33:04] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[22:33:04] [PASSED] supported_formats=0x9 yuv420_allowed=1
[22:33:04] [PASSED] supported_formats=0x9 yuv420_allowed=0
[22:33:04] [PASSED] supported_formats=0x5 yuv420_allowed=1
[22:33:04] [PASSED] supported_formats=0x5 yuv420_allowed=0
[22:33:04] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:33:04] [PASSED] drm_test_connector_hdmi_init_null_ddc
[22:33:04] [PASSED] drm_test_connector_hdmi_init_null_product
[22:33:04] [PASSED] drm_test_connector_hdmi_init_null_vendor
[22:33:04] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[22:33:04] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[22:33:04] [PASSED] drm_test_connector_hdmi_init_product_valid
[22:33:04] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[22:33:04] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[22:33:04] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[22:33:04] ========= drm_test_connector_hdmi_init_type_valid  =========
[22:33:04] [PASSED] HDMI-A
[22:33:04] [PASSED] HDMI-B
[22:33:04] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[22:33:04] ======== drm_test_connector_hdmi_init_type_invalid  ========
[22:33:04] [PASSED] Unknown
[22:33:04] [PASSED] VGA
[22:33:04] [PASSED] DVI-I
[22:33:04] [PASSED] DVI-D
[22:33:04] [PASSED] DVI-A
[22:33:04] [PASSED] Composite
[22:33:04] [PASSED] SVIDEO
[22:33:04] [PASSED] LVDS
[22:33:04] [PASSED] Component
[22:33:04] [PASSED] DIN
[22:33:04] [PASSED] DP
[22:33:04] [PASSED] TV
[22:33:04] [PASSED] eDP
[22:33:04] [PASSED] Virtual
[22:33:04] [PASSED] DSI
[22:33:04] [PASSED] DPI
[22:33:04] [PASSED] Writeback
[22:33:04] [PASSED] SPI
[22:33:04] [PASSED] USB
[22:33:04] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[22:33:04] ============ [PASSED] drmm_connector_hdmi_init =============
[22:33:04] ============= drmm_connector_init (3 subtests) =============
[22:33:04] [PASSED] drm_test_drmm_connector_init
[22:33:04] [PASSED] drm_test_drmm_connector_init_null_ddc
[22:33:04] ========= drm_test_drmm_connector_init_type_valid  =========
[22:33:04] [PASSED] Unknown
[22:33:04] [PASSED] VGA
[22:33:04] [PASSED] DVI-I
[22:33:04] [PASSED] DVI-D
[22:33:04] [PASSED] DVI-A
[22:33:04] [PASSED] Composite
[22:33:04] [PASSED] SVIDEO
[22:33:04] [PASSED] LVDS
[22:33:04] [PASSED] Component
[22:33:04] [PASSED] DIN
[22:33:04] [PASSED] DP
[22:33:04] [PASSED] HDMI-A
[22:33:04] [PASSED] HDMI-B
[22:33:04] [PASSED] TV
[22:33:04] [PASSED] eDP
[22:33:04] [PASSED] Virtual
[22:33:04] [PASSED] DSI
[22:33:04] [PASSED] DPI
[22:33:04] [PASSED] Writeback
[22:33:04] [PASSED] SPI
[22:33:04] [PASSED] USB
[22:33:04] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[22:33:04] =============== [PASSED] drmm_connector_init ===============
[22:33:04] ========= drm_connector_dynamic_init (6 subtests) ==========
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_init
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_init_properties
[22:33:04] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[22:33:04] [PASSED] Unknown
[22:33:04] [PASSED] VGA
[22:33:04] [PASSED] DVI-I
[22:33:04] [PASSED] DVI-D
[22:33:04] [PASSED] DVI-A
[22:33:04] [PASSED] Composite
[22:33:04] [PASSED] SVIDEO
[22:33:04] [PASSED] LVDS
[22:33:04] [PASSED] Component
[22:33:04] [PASSED] DIN
[22:33:04] [PASSED] DP
[22:33:04] [PASSED] HDMI-A
[22:33:04] [PASSED] HDMI-B
[22:33:04] [PASSED] TV
[22:33:04] [PASSED] eDP
[22:33:04] [PASSED] Virtual
[22:33:04] [PASSED] DSI
[22:33:04] [PASSED] DPI
[22:33:04] [PASSED] Writeback
[22:33:04] [PASSED] SPI
[22:33:04] [PASSED] USB
[22:33:04] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[22:33:04] ======== drm_test_drm_connector_dynamic_init_name  =========
[22:33:04] [PASSED] Unknown
[22:33:04] [PASSED] VGA
[22:33:04] [PASSED] DVI-I
[22:33:04] [PASSED] DVI-D
[22:33:04] [PASSED] DVI-A
[22:33:04] [PASSED] Composite
[22:33:04] [PASSED] SVIDEO
[22:33:04] [PASSED] LVDS
[22:33:04] [PASSED] Component
[22:33:04] [PASSED] DIN
[22:33:04] [PASSED] DP
[22:33:04] [PASSED] HDMI-A
[22:33:04] [PASSED] HDMI-B
[22:33:04] [PASSED] TV
[22:33:04] [PASSED] eDP
[22:33:04] [PASSED] Virtual
[22:33:04] [PASSED] DSI
[22:33:04] [PASSED] DPI
[22:33:04] [PASSED] Writeback
[22:33:04] [PASSED] SPI
[22:33:04] [PASSED] USB
[22:33:04] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[22:33:04] =========== [PASSED] drm_connector_dynamic_init ============
[22:33:04] ==== drm_connector_dynamic_register_early (4 subtests) =====
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[22:33:04] ====== [PASSED] drm_connector_dynamic_register_early =======
[22:33:04] ======= drm_connector_dynamic_register (7 subtests) ========
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[22:33:04] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[22:33:04] ========= [PASSED] drm_connector_dynamic_register ==========
[22:33:04] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[22:33:04] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[22:33:04] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[22:33:04] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[22:33:04] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[22:33:04] ========== drm_test_get_tv_mode_from_name_valid  ===========
[22:33:04] [PASSED] NTSC
[22:33:04] [PASSED] NTSC-443
[22:33:04] [PASSED] NTSC-J
[22:33:04] [PASSED] PAL
[22:33:04] [PASSED] PAL-M
[22:33:04] [PASSED] PAL-N
[22:33:04] [PASSED] SECAM
[22:33:04] [PASSED] Mono
[22:33:04] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[22:33:04] [PASSED] drm_test_get_tv_mode_from_name_truncated
[22:33:04] ============ [PASSED] drm_get_tv_mode_from_name ============
[22:33:04] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[22:33:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[22:33:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[22:33:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[22:33:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[22:33:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[22:33:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[22:33:04] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[22:33:04] [PASSED] VIC 96
[22:33:04] [PASSED] VIC 97
[22:33:04] [PASSED] VIC 101
[22:33:04] [PASSED] VIC 102
[22:33:04] [PASSED] VIC 106
[22:33:04] [PASSED] VIC 107
[22:33:04] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[22:33:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[22:33:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[22:33:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[22:33:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[22:33:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[22:33:04] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[22:33:04] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[22:33:04] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[22:33:04] [PASSED] Automatic
[22:33:04] [PASSED] Full
[22:33:04] [PASSED] Limited 16:235
[22:33:04] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[22:33:04] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[22:33:04] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[22:33:04] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[22:33:04] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[22:33:04] [PASSED] RGB
[22:33:04] [PASSED] YUV 4:2:0
[22:33:04] [PASSED] YUV 4:2:2
[22:33:04] [PASSED] YUV 4:4:4
[22:33:04] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[22:33:04] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[22:33:04] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[22:33:04] ============= drm_damage_helper (21 subtests) ==============
[22:33:04] [PASSED] drm_test_damage_iter_no_damage
[22:33:04] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[22:33:04] [PASSED] drm_test_damage_iter_no_damage_src_moved
[22:33:04] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[22:33:04] [PASSED] drm_test_damage_iter_no_damage_not_visible
[22:33:04] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[22:33:04] [PASSED] drm_test_damage_iter_no_damage_no_fb
[22:33:04] [PASSED] drm_test_damage_iter_simple_damage
[22:33:04] [PASSED] drm_test_damage_iter_single_damage
[22:33:04] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[22:33:04] [PASSED] drm_test_damage_iter_single_damage_outside_src
[22:33:04] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[22:33:04] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[22:33:04] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[22:33:04] [PASSED] drm_test_damage_iter_single_damage_src_moved
[22:33:04] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[22:33:04] [PASSED] drm_test_damage_iter_damage
[22:33:04] [PASSED] drm_test_damage_iter_damage_one_intersect
[22:33:04] [PASSED] drm_test_damage_iter_damage_one_outside
[22:33:04] [PASSED] drm_test_damage_iter_damage_src_moved
[22:33:04] [PASSED] drm_test_damage_iter_damage_not_visible
[22:33:04] ================ [PASSED] drm_damage_helper ================
[22:33:04] ============== drm_dp_mst_helper (3 subtests) ==============
[22:33:04] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[22:33:04] [PASSED] Clock 154000 BPP 30 DSC disabled
[22:33:04] [PASSED] Clock 234000 BPP 30 DSC disabled
[22:33:04] [PASSED] Clock 297000 BPP 24 DSC disabled
[22:33:04] [PASSED] Clock 332880 BPP 24 DSC enabled
[22:33:04] [PASSED] Clock 324540 BPP 24 DSC enabled
[22:33:04] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[22:33:04] ============== drm_test_dp_mst_calc_pbn_div  ===============
[22:33:04] [PASSED] Link rate 2000000 lane count 4
[22:33:04] [PASSED] Link rate 2000000 lane count 2
[22:33:04] [PASSED] Link rate 2000000 lane count 1
[22:33:04] [PASSED] Link rate 1350000 lane count 4
[22:33:04] [PASSED] Link rate 1350000 lane count 2
[22:33:04] [PASSED] Link rate 1350000 lane count 1
[22:33:04] [PASSED] Link rate 1000000 lane count 4
[22:33:04] [PASSED] Link rate 1000000 lane count 2
[22:33:04] [PASSED] Link rate 1000000 lane count 1
[22:33:04] [PASSED] Link rate 810000 lane count 4
[22:33:04] [PASSED] Link rate 810000 lane count 2
[22:33:04] [PASSED] Link rate 810000 lane count 1
[22:33:04] [PASSED] Link rate 540000 lane count 4
[22:33:04] [PASSED] Link rate 540000 lane count 2
[22:33:04] [PASSED] Link rate 540000 lane count 1
[22:33:04] [PASSED] Link rate 270000 lane count 4
[22:33:04] [PASSED] Link rate 270000 lane count 2
[22:33:04] [PASSED] Link rate 270000 lane count 1
[22:33:04] [PASSED] Link rate 162000 lane count 4
[22:33:04] [PASSED] Link rate 162000 lane count 2
[22:33:04] [PASSED] Link rate 162000 lane count 1
[22:33:04] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[22:33:04] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[22:33:04] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[22:33:04] [PASSED] DP_POWER_UP_PHY with port number
[22:33:04] [PASSED] DP_POWER_DOWN_PHY with port number
[22:33:04] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[22:33:04] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[22:33:04] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[22:33:04] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[22:33:04] [PASSED] DP_QUERY_PAYLOAD with port number
[22:33:04] [PASSED] DP_QUERY_PAYLOAD with VCPI
[22:33:04] [PASSED] DP_REMOTE_DPCD_READ with port number
[22:33:04] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[22:33:04] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[22:33:04] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[22:33:04] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[22:33:04] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[22:33:04] [PASSED] DP_REMOTE_I2C_READ with port number
[22:33:04] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[22:33:04] [PASSED] DP_REMOTE_I2C_READ with transactions array
[22:33:04] [PASSED] DP_REMOTE_I2C_WRITE with port number
[22:33:04] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[22:33:04] [PASSED] DP_REMOTE_I2C_WRITE with data array
[22:33:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[22:33:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[22:33:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[22:33:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[22:33:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[22:33:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[22:33:04] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[22:33:04] ================ [PASSED] drm_dp_mst_helper ================
[22:33:04] ================== drm_exec (7 subtests) ===================
[22:33:04] [PASSED] sanitycheck
[22:33:04] [PASSED] test_lock
[22:33:04] [PASSED] test_lock_unlock
[22:33:04] [PASSED] test_duplicates
[22:33:04] [PASSED] test_prepare
[22:33:04] [PASSED] test_prepare_array
[22:33:04] [PASSED] test_multiple_loops
[22:33:04] ==================== [PASSED] drm_exec =====================
[22:33:04] =========== drm_format_helper_test (17 subtests) ===========
[22:33:04] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[22:33:04] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[22:33:04] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[22:33:04] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[22:33:04] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[22:33:04] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[22:33:04] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[22:33:04] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[22:33:04] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[22:33:04] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[22:33:04] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[22:33:04] ============== drm_test_fb_xrgb8888_to_mono  ===============
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[22:33:04] ==================== drm_test_fb_swab  =====================
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ================ [PASSED] drm_test_fb_swab =================
[22:33:04] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[22:33:04] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[22:33:04] [PASSED] single_pixel_source_buffer
[22:33:04] [PASSED] single_pixel_clip_rectangle
[22:33:04] [PASSED] well_known_colors
[22:33:04] [PASSED] destination_pitch
[22:33:04] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[22:33:04] ================= drm_test_fb_clip_offset  =================
[22:33:04] [PASSED] pass through
[22:33:04] [PASSED] horizontal offset
[22:33:04] [PASSED] vertical offset
[22:33:04] [PASSED] horizontal and vertical offset
[22:33:04] [PASSED] horizontal offset (custom pitch)
[22:33:04] [PASSED] vertical offset (custom pitch)
[22:33:04] [PASSED] horizontal and vertical offset (custom pitch)
[22:33:04] ============= [PASSED] drm_test_fb_clip_offset =============
[22:33:04] =================== drm_test_fb_memcpy  ====================
[22:33:04] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[22:33:04] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[22:33:04] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[22:33:04] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[22:33:04] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[22:33:04] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[22:33:04] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[22:33:04] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[22:33:04] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[22:33:04] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[22:33:04] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[22:33:04] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[22:33:04] =============== [PASSED] drm_test_fb_memcpy ================
[22:33:04] ============= [PASSED] drm_format_helper_test ==============
[22:33:04] ================= drm_format (18 subtests) =================
[22:33:04] [PASSED] drm_test_format_block_width_invalid
[22:33:04] [PASSED] drm_test_format_block_width_one_plane
[22:33:04] [PASSED] drm_test_format_block_width_two_plane
[22:33:04] [PASSED] drm_test_format_block_width_three_plane
[22:33:04] [PASSED] drm_test_format_block_width_tiled
[22:33:04] [PASSED] drm_test_format_block_height_invalid
[22:33:04] [PASSED] drm_test_format_block_height_one_plane
[22:33:04] [PASSED] drm_test_format_block_height_two_plane
[22:33:04] [PASSED] drm_test_format_block_height_three_plane
[22:33:04] [PASSED] drm_test_format_block_height_tiled
[22:33:04] [PASSED] drm_test_format_min_pitch_invalid
[22:33:04] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[22:33:04] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[22:33:04] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[22:33:04] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[22:33:04] [PASSED] drm_test_format_min_pitch_two_plane
[22:33:04] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[22:33:04] [PASSED] drm_test_format_min_pitch_tiled
[22:33:04] =================== [PASSED] drm_format ====================
[22:33:04] ============== drm_framebuffer (10 subtests) ===============
[22:33:04] ========== drm_test_framebuffer_check_src_coords  ==========
[22:33:04] [PASSED] Success: source fits into fb
[22:33:04] [PASSED] Fail: overflowing fb with x-axis coordinate
[22:33:04] [PASSED] Fail: overflowing fb with y-axis coordinate
[22:33:04] [PASSED] Fail: overflowing fb with source width
[22:33:04] [PASSED] Fail: overflowing fb with source height
[22:33:04] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[22:33:04] [PASSED] drm_test_framebuffer_cleanup
[22:33:04] =============== drm_test_framebuffer_create  ===============
[22:33:04] [PASSED] ABGR8888 normal sizes
[22:33:04] [PASSED] ABGR8888 max sizes
[22:33:04] [PASSED] ABGR8888 pitch greater than min required
[22:33:04] [PASSED] ABGR8888 pitch less than min required
[22:33:04] [PASSED] ABGR8888 Invalid width
[22:33:04] [PASSED] ABGR8888 Invalid buffer handle
[22:33:04] [PASSED] No pixel format
[22:33:04] [PASSED] ABGR8888 Width 0
[22:33:04] [PASSED] ABGR8888 Height 0
[22:33:04] [PASSED] ABGR8888 Out of bound height * pitch combination
[22:33:04] [PASSED] ABGR8888 Large buffer offset
[22:33:04] [PASSED] ABGR8888 Buffer offset for inexistent plane
[22:33:04] [PASSED] ABGR8888 Invalid flag
[22:33:04] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[22:33:04] [PASSED] ABGR8888 Valid buffer modifier
[22:33:04] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[22:33:04] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[22:33:04] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[22:33:04] [PASSED] NV12 Normal sizes
[22:33:04] [PASSED] NV12 Max sizes
[22:33:04] [PASSED] NV12 Invalid pitch
[22:33:04] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[22:33:04] [PASSED] NV12 different  modifier per-plane
[22:33:04] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[22:33:04] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[22:33:04] [PASSED] NV12 Modifier for inexistent plane
[22:33:04] [PASSED] NV12 Handle for inexistent plane
[22:33:04] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[22:33:04] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[22:33:04] [PASSED] YVU420 Normal sizes
[22:33:04] [PASSED] YVU420 Max sizes
[22:33:04] [PASSED] YVU420 Invalid pitch
[22:33:04] [PASSED] YVU420 Different pitches
[22:33:04] [PASSED] YVU420 Different buffer offsets/pitches
[22:33:04] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[22:33:04] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[22:33:04] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[22:33:04] [PASSED] YVU420 Valid modifier
[22:33:04] [PASSED] YVU420 Different modifiers per plane
[22:33:04] [PASSED] YVU420 Modifier for inexistent plane
[22:33:04] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[22:33:04] [PASSED] X0L2 Normal sizes
[22:33:04] [PASSED] X0L2 Max sizes
[22:33:04] [PASSED] X0L2 Invalid pitch
[22:33:04] [PASSED] X0L2 Pitch greater than minimum required
[22:33:04] [PASSED] X0L2 Handle for inexistent plane
[22:33:04] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[22:33:04] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[22:33:04] [PASSED] X0L2 Valid modifier
[22:33:04] [PASSED] X0L2 Modifier for inexistent plane
[22:33:04] =========== [PASSED] drm_test_framebuffer_create ===========
[22:33:04] [PASSED] drm_test_framebuffer_free
[22:33:04] [PASSED] drm_test_framebuffer_init
[22:33:04] [PASSED] drm_test_framebuffer_init_bad_format
[22:33:04] [PASSED] drm_test_framebuffer_init_dev_mismatch
[22:33:04] [PASSED] drm_test_framebuffer_lookup
[22:33:04] [PASSED] drm_test_framebuffer_lookup_inexistent
[22:33:04] [PASSED] drm_test_framebuffer_modifiers_not_supported
[22:33:04] ================= [PASSED] drm_framebuffer =================
[22:33:04] ================ drm_gem_shmem (8 subtests) ================
[22:33:04] [PASSED] drm_gem_shmem_test_obj_create
[22:33:04] [PASSED] drm_gem_shmem_test_obj_create_private
[22:33:04] [PASSED] drm_gem_shmem_test_pin_pages
[22:33:04] [PASSED] drm_gem_shmem_test_vmap
[22:33:04] [PASSED] drm_gem_shmem_test_get_sg_table
[22:33:04] [PASSED] drm_gem_shmem_test_get_pages_sgt
[22:33:04] [PASSED] drm_gem_shmem_test_madvise
[22:33:04] [PASSED] drm_gem_shmem_test_purge
[22:33:04] ================== [PASSED] drm_gem_shmem ==================
[22:33:04] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[22:33:04] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[22:33:04] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[22:33:04] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[22:33:04] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[22:33:04] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[22:33:04] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[22:33:04] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[22:33:04] [PASSED] Automatic
[22:33:04] [PASSED] Full
[22:33:04] [PASSED] Limited 16:235
[22:33:04] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[22:33:04] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[22:33:04] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[22:33:04] [PASSED] drm_test_check_disable_connector
[22:33:04] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[22:33:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[22:33:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[22:33:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[22:33:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[22:33:04] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[22:33:04] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[22:33:04] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[22:33:04] [PASSED] drm_test_check_output_bpc_dvi
[22:33:04] [PASSED] drm_test_check_output_bpc_format_vic_1
[22:33:04] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[22:33:04] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[22:33:04] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[22:33:04] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[22:33:04] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[22:33:04] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[22:33:04] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[22:33:04] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[22:33:04] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[22:33:04] [PASSED] drm_test_check_broadcast_rgb_value
[22:33:04] [PASSED] drm_test_check_bpc_8_value
[22:33:04] [PASSED] drm_test_check_bpc_10_value
[22:33:04] [PASSED] drm_test_check_bpc_12_value
[22:33:04] [PASSED] drm_test_check_format_value
[22:33:04] [PASSED] drm_test_check_tmds_char_value
[22:33:04] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[22:33:04] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[22:33:04] [PASSED] drm_test_check_mode_valid
[22:33:04] [PASSED] drm_test_check_mode_valid_reject
[22:33:04] [PASSED] drm_test_check_mode_valid_reject_rate
[22:33:04] [PASSED] drm_test_check_mode_valid_reject_max_clock
[22:33:04] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[22:33:04] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[22:33:04] [PASSED] drm_test_check_infoframes
[22:33:04] [PASSED] drm_test_check_reject_avi_infoframe
[22:33:04] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[22:33:04] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[22:33:04] [PASSED] drm_test_check_reject_audio_infoframe
[22:33:04] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[22:33:04] ================= drm_managed (2 subtests) =================
[22:33:04] [PASSED] drm_test_managed_release_action
[22:33:04] [PASSED] drm_test_managed_run_action
[22:33:04] =================== [PASSED] drm_managed ===================
[22:33:04] =================== drm_mm (6 subtests) ====================
[22:33:04] [PASSED] drm_test_mm_init
[22:33:04] [PASSED] drm_test_mm_debug
[22:33:04] [PASSED] drm_test_mm_align32
[22:33:04] [PASSED] drm_test_mm_align64
[22:33:04] [PASSED] drm_test_mm_lowest
[22:33:04] [PASSED] drm_test_mm_highest
[22:33:04] ===================== [PASSED] drm_mm ======================
[22:33:04] ============= drm_modes_analog_tv (5 subtests) =============
[22:33:04] [PASSED] drm_test_modes_analog_tv_mono_576i
[22:33:04] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[22:33:04] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[22:33:04] [PASSED] drm_test_modes_analog_tv_pal_576i
[22:33:04] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[22:33:04] =============== [PASSED] drm_modes_analog_tv ===============
[22:33:04] ============== drm_plane_helper (2 subtests) ===============
[22:33:04] =============== drm_test_check_plane_state  ================
[22:33:04] [PASSED] clipping_simple
[22:33:04] [PASSED] clipping_rotate_reflect
[22:33:04] [PASSED] positioning_simple
[22:33:04] [PASSED] upscaling
[22:33:04] [PASSED] downscaling
[22:33:04] [PASSED] rounding1
[22:33:04] [PASSED] rounding2
[22:33:04] [PASSED] rounding3
[22:33:04] [PASSED] rounding4
[22:33:04] =========== [PASSED] drm_test_check_plane_state ============
[22:33:04] =========== drm_test_check_invalid_plane_state  ============
[22:33:04] [PASSED] positioning_invalid
[22:33:04] [PASSED] upscaling_invalid
[22:33:04] [PASSED] downscaling_invalid
[22:33:04] ======= [PASSED] drm_test_check_invalid_plane_state ========
[22:33:04] ================ [PASSED] drm_plane_helper =================
[22:33:04] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[22:33:04] ====== drm_test_connector_helper_tv_get_modes_check  =======
[22:33:04] [PASSED] None
[22:33:04] [PASSED] PAL
[22:33:04] [PASSED] NTSC
[22:33:04] [PASSED] Both, NTSC Default
[22:33:04] [PASSED] Both, PAL Default
[22:33:04] [PASSED] Both, NTSC Default, with PAL on command-line
[22:33:04] [PASSED] Both, PAL Default, with NTSC on command-line
[22:33:04] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[22:33:04] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[22:33:04] ================== drm_rect (9 subtests) ===================
[22:33:04] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[22:33:04] [PASSED] drm_test_rect_clip_scaled_not_clipped
[22:33:04] [PASSED] drm_test_rect_clip_scaled_clipped
[22:33:04] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[22:33:04] ================= drm_test_rect_intersect  =================
[22:33:04] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[22:33:04] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[22:33:04] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[22:33:04] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[22:33:04] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[22:33:04] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[22:33:04] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[22:33:04] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[22:33:04] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[22:33:04] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[22:33:04] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[22:33:04] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[22:33:04] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[22:33:04] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[22:33:04] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[22:33:04] ============= [PASSED] drm_test_rect_intersect =============
[22:33:04] ================ drm_test_rect_calc_hscale  ================
[22:33:04] [PASSED] normal use
[22:33:04] [PASSED] out of max range
[22:33:04] [PASSED] out of min range
[22:33:04] [PASSED] zero dst
[22:33:04] [PASSED] negative src
[22:33:04] [PASSED] negative dst
[22:33:04] ============ [PASSED] drm_test_rect_calc_hscale ============
[22:33:04] ================ drm_test_rect_calc_vscale  ================
[22:33:04] [PASSED] normal use
[22:33:04] [PASSED] out of max range
[22:33:04] [PASSED] out of min range
[22:33:04] [PASSED] zero dst
[22:33:04] [PASSED] negative src
[22:33:04] [PASSED] negative dst
[22:33:04] ============ [PASSED] drm_test_rect_calc_vscale ============
[22:33:04] ================== drm_test_rect_rotate  ===================
[22:33:04] [PASSED] reflect-x
[22:33:04] [PASSED] reflect-y
[22:33:04] [PASSED] rotate-0
[22:33:04] [PASSED] rotate-90
[22:33:04] [PASSED] rotate-180
[22:33:04] [PASSED] rotate-270
[22:33:04] ============== [PASSED] drm_test_rect_rotate ===============
[22:33:04] ================ drm_test_rect_rotate_inv  =================
[22:33:04] [PASSED] reflect-x
[22:33:04] [PASSED] reflect-y
[22:33:04] [PASSED] rotate-0
[22:33:04] [PASSED] rotate-90
[22:33:04] [PASSED] rotate-180
[22:33:04] [PASSED] rotate-270
[22:33:04] ============ [PASSED] drm_test_rect_rotate_inv =============
[22:33:04] ==================== [PASSED] drm_rect =====================
[22:33:04] ============ drm_sysfb_modeset_test (1 subtest) ============
[22:33:04] ============ drm_test_sysfb_build_fourcc_list  =============
[22:33:04] [PASSED] no native formats
[22:33:04] [PASSED] XRGB8888 as native format
[22:33:04] [PASSED] remove duplicates
[22:33:04] [PASSED] convert alpha formats
[22:33:04] [PASSED] random formats
[22:33:04] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[22:33:04] ============= [PASSED] drm_sysfb_modeset_test ==============
[22:33:04] ================== drm_fixp (2 subtests) ===================
[22:33:04] [PASSED] drm_test_int2fixp
[22:33:04] [PASSED] drm_test_sm2fixp
[22:33:04] ==================== [PASSED] drm_fixp =====================
[22:33:04] ============================================================
[22:33:04] Testing complete. Ran 621 tests: passed: 621
[22:33:04] Elapsed time: 26.259s total, 1.773s configuring, 24.322s building, 0.137s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[22:33:04] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:33:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:33:15] Starting KUnit Kernel (1/1)...
[22:33:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:33:15] ================= ttm_device (5 subtests) ==================
[22:33:15] [PASSED] ttm_device_init_basic
[22:33:15] [PASSED] ttm_device_init_multiple
[22:33:15] [PASSED] ttm_device_fini_basic
[22:33:15] [PASSED] ttm_device_init_no_vma_man
[22:33:15] ================== ttm_device_init_pools  ==================
[22:33:15] [PASSED] No DMA allocations, no DMA32 required
[22:33:15] [PASSED] DMA allocations, DMA32 required
[22:33:15] [PASSED] No DMA allocations, DMA32 required
[22:33:15] [PASSED] DMA allocations, no DMA32 required
[22:33:15] ============== [PASSED] ttm_device_init_pools ==============
[22:33:15] =================== [PASSED] ttm_device ====================
[22:33:15] ================== ttm_pool (8 subtests) ===================
[22:33:15] ================== ttm_pool_alloc_basic  ===================
[22:33:15] [PASSED] One page
[22:33:15] [PASSED] More than one page
[22:33:15] [PASSED] Above the allocation limit
[22:33:15] [PASSED] One page, with coherent DMA mappings enabled
[22:33:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:33:15] ============== [PASSED] ttm_pool_alloc_basic ===============
[22:33:15] ============== ttm_pool_alloc_basic_dma_addr  ==============
[22:33:15] [PASSED] One page
[22:33:15] [PASSED] More than one page
[22:33:15] [PASSED] Above the allocation limit
[22:33:15] [PASSED] One page, with coherent DMA mappings enabled
[22:33:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:33:15] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[22:33:15] [PASSED] ttm_pool_alloc_order_caching_match
[22:33:15] [PASSED] ttm_pool_alloc_caching_mismatch
[22:33:15] [PASSED] ttm_pool_alloc_order_mismatch
[22:33:15] [PASSED] ttm_pool_free_dma_alloc
[22:33:15] [PASSED] ttm_pool_free_no_dma_alloc
[22:33:15] [PASSED] ttm_pool_fini_basic
[22:33:15] ==================== [PASSED] ttm_pool =====================
[22:33:15] ================ ttm_resource (8 subtests) =================
[22:33:15] ================= ttm_resource_init_basic  =================
[22:33:15] [PASSED] Init resource in TTM_PL_SYSTEM
[22:33:15] [PASSED] Init resource in TTM_PL_VRAM
[22:33:15] [PASSED] Init resource in a private placement
[22:33:15] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[22:33:15] ============= [PASSED] ttm_resource_init_basic =============
[22:33:15] [PASSED] ttm_resource_init_pinned
[22:33:15] [PASSED] ttm_resource_fini_basic
[22:33:15] [PASSED] ttm_resource_manager_init_basic
[22:33:15] [PASSED] ttm_resource_manager_usage_basic
[22:33:15] [PASSED] ttm_resource_manager_set_used_basic
[22:33:15] [PASSED] ttm_sys_man_alloc_basic
[22:33:15] [PASSED] ttm_sys_man_free_basic
[22:33:15] ================== [PASSED] ttm_resource ===================
[22:33:15] =================== ttm_tt (15 subtests) ===================
[22:33:15] ==================== ttm_tt_init_basic  ====================
[22:33:15] [PASSED] Page-aligned size
[22:33:15] [PASSED] Extra pages requested
[22:33:15] ================ [PASSED] ttm_tt_init_basic ================
[22:33:15] [PASSED] ttm_tt_init_misaligned
[22:33:15] [PASSED] ttm_tt_fini_basic
[22:33:15] [PASSED] ttm_tt_fini_sg
[22:33:15] [PASSED] ttm_tt_fini_shmem
[22:33:15] [PASSED] ttm_tt_create_basic
[22:33:15] [PASSED] ttm_tt_create_invalid_bo_type
[22:33:15] [PASSED] ttm_tt_create_ttm_exists
[22:33:15] [PASSED] ttm_tt_create_failed
[22:33:15] [PASSED] ttm_tt_destroy_basic
[22:33:15] [PASSED] ttm_tt_populate_null_ttm
[22:33:15] [PASSED] ttm_tt_populate_populated_ttm
[22:33:15] [PASSED] ttm_tt_unpopulate_basic
[22:33:15] [PASSED] ttm_tt_unpopulate_empty_ttm
[22:33:15] [PASSED] ttm_tt_swapin_basic
[22:33:15] ===================== [PASSED] ttm_tt ======================
[22:33:15] =================== ttm_bo (14 subtests) ===================
[22:33:15] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[22:33:15] [PASSED] Cannot be interrupted and sleeps
[22:33:15] [PASSED] Cannot be interrupted, locks straight away
[22:33:15] [PASSED] Can be interrupted, sleeps
[22:33:15] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[22:33:15] [PASSED] ttm_bo_reserve_locked_no_sleep
[22:33:15] [PASSED] ttm_bo_reserve_no_wait_ticket
[22:33:16] [PASSED] ttm_bo_reserve_double_resv
[22:33:16] [PASSED] ttm_bo_reserve_interrupted
[22:33:16] [PASSED] ttm_bo_reserve_deadlock
[22:33:16] [PASSED] ttm_bo_unreserve_basic
[22:33:16] [PASSED] ttm_bo_unreserve_pinned
[22:33:16] [PASSED] ttm_bo_unreserve_bulk
[22:33:16] [PASSED] ttm_bo_fini_basic
[22:33:16] [PASSED] ttm_bo_fini_shared_resv
[22:33:16] [PASSED] ttm_bo_pin_basic
[22:33:16] [PASSED] ttm_bo_pin_unpin_resource
[22:33:16] [PASSED] ttm_bo_multiple_pin_one_unpin
[22:33:16] ===================== [PASSED] ttm_bo ======================
[22:33:16] ============== ttm_bo_validate (22 subtests) ===============
[22:33:16] ============== ttm_bo_init_reserved_sys_man  ===============
[22:33:16] [PASSED] Buffer object for userspace
[22:33:16] [PASSED] Kernel buffer object
[22:33:16] [PASSED] Shared buffer object
[22:33:16] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[22:33:16] ============== ttm_bo_init_reserved_mock_man  ==============
[22:33:16] [PASSED] Buffer object for userspace
[22:33:16] [PASSED] Kernel buffer object
[22:33:16] [PASSED] Shared buffer object
[22:33:16] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[22:33:16] [PASSED] ttm_bo_init_reserved_resv
[22:33:16] ================== ttm_bo_validate_basic  ==================
[22:33:16] [PASSED] Buffer object for userspace
[22:33:16] [PASSED] Kernel buffer object
[22:33:16] [PASSED] Shared buffer object
[22:33:16] ============== [PASSED] ttm_bo_validate_basic ==============
[22:33:16] [PASSED] ttm_bo_validate_invalid_placement
[22:33:16] ============= ttm_bo_validate_same_placement  ==============
[22:33:16] [PASSED] System manager
[22:33:16] [PASSED] VRAM manager
[22:33:16] ========= [PASSED] ttm_bo_validate_same_placement ==========
[22:33:16] [PASSED] ttm_bo_validate_failed_alloc
[22:33:16] [PASSED] ttm_bo_validate_pinned
[22:33:16] [PASSED] ttm_bo_validate_busy_placement
[22:33:16] ================ ttm_bo_validate_multihop  =================
[22:33:16] [PASSED] Buffer object for userspace
[22:33:16] [PASSED] Kernel buffer object
[22:33:16] [PASSED] Shared buffer object
[22:33:16] ============ [PASSED] ttm_bo_validate_multihop =============
[22:33:16] ========== ttm_bo_validate_no_placement_signaled  ==========
[22:33:16] [PASSED] Buffer object in system domain, no page vector
[22:33:16] [PASSED] Buffer object in system domain with an existing page vector
[22:33:16] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[22:33:16] ======== ttm_bo_validate_no_placement_not_signaled  ========
[22:33:16] [PASSED] Buffer object for userspace
[22:33:16] [PASSED] Kernel buffer object
[22:33:16] [PASSED] Shared buffer object
[22:33:16] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[22:33:16] [PASSED] ttm_bo_validate_move_fence_signaled
[22:33:16] ========= ttm_bo_validate_move_fence_not_signaled  =========
[22:33:16] [PASSED] Waits for GPU
[22:33:16] [PASSED] Tries to lock straight away
[22:33:16] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[22:33:16] [PASSED] ttm_bo_validate_swapout
[22:33:16] [PASSED] ttm_bo_validate_happy_evict
[22:33:16] [PASSED] ttm_bo_validate_all_pinned_evict
[22:33:16] [PASSED] ttm_bo_validate_allowed_only_evict
[22:33:16] [PASSED] ttm_bo_validate_deleted_evict
[22:33:16] [PASSED] ttm_bo_validate_busy_domain_evict
[22:33:16] [PASSED] ttm_bo_validate_evict_gutting
[22:33:16] [PASSED] ttm_bo_validate_recrusive_evict
[22:33:16] ================= [PASSED] ttm_bo_validate =================
[22:33:16] ============================================================
[22:33:16] Testing complete. Ran 102 tests: passed: 102
[22:33:16] Elapsed time: 11.652s total, 1.680s configuring, 9.757s building, 0.186s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/i915: add display irq hooks

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 945 bytes --]

== Series Details ==

Series: drm/i915: add display irq hooks
URL   : https://patchwork.freedesktop.org/series/165936/
State : success

== Summary ==

CI Bug Log - changes from xe-4981-e798c5cca30e83c5793aa3d6f22456e39eeb219c_BAT -> xe-pw-165936v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-4981-e798c5cca30e83c5793aa3d6f22456e39eeb219c -> xe-pw-165936v1

  IGT_8883: 8214859d2c4ecf8f81a08a3d2cd26f0a50d2b513 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4981-e798c5cca30e83c5793aa3d6f22456e39eeb219c: e798c5cca30e83c5793aa3d6f22456e39eeb219c
  xe-pw-165936v1: 165936v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/index.html

[-- Attachment #2: Type: text/html, Size: 1493 bytes --]

✓ Xe.CI.FULL: success for drm/i915: add display irq hooks

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 24083 bytes --]

== Series Details ==

Series: drm/i915: add display irq hooks
URL   : https://patchwork.freedesktop.org/series/165936/
State : success

== Summary ==

CI Bug Log - changes from xe-4981-e798c5cca30e83c5793aa3d6f22456e39eeb219c_FULL -> xe-pw-165936v1_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-165936v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@linear-32bpp-rotate-90:
    - shard-lnl:          NOTRUN -> [SKIP][1] ([Intel XE#1407]) +2 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_big_fb@linear-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][2] ([Intel XE#1124]) +4 other tests skip
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-lnl:          NOTRUN -> [SKIP][3] ([Intel XE#1467] / [Intel XE#7367])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-2560x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][4] ([Intel XE#7676])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_bw@connected-linear-tiling-4-displays-target-2560x1440p.html

  * igt@kms_bw@linear-tiling-2-displays-target-2560x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#367])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_bw@linear-tiling-2-displays-target-2560x1440p.html

  * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][6] ([Intel XE#2887]) +8 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
    - shard-lnl:          NOTRUN -> [SKIP][7] ([Intel XE#373]) +4 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html

  * igt@kms_content_protection@dp-mst-type-1-suspend-resume:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#6974])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html

  * igt@kms_content_protection@uevent:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#7642])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-random-max-size:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#1424]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_cursor_crc@cursor-random-max-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#309] / [Intel XE#7343])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-bmg:          [PASS][12] -> [FAIL][13] ([Intel XE#7809])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4981-e798c5cca30e83c5793aa3d6f22456e39eeb219c/shard-bmg-10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#323] / [Intel XE#6035])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-lnl:          NOTRUN -> [SKIP][15] ([Intel XE#2244]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#1137] / [Intel XE#2375])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_flip@2x-plain-flip-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#1421])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_flip@2x-plain-flip-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [PASS][18] -> [FAIL][19] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4981-e798c5cca30e83c5793aa3d6f22456e39eeb219c/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][20] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#1397] / [Intel XE#7385])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][22] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-shrfb-scaledprimary:
    - shard-lnl:          NOTRUN -> [SKIP][23] ([Intel XE#6312] / [Intel XE#651]) +4 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_frontbuffer_tracking@drrs-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][24] ([Intel XE#5812] / [Intel XE#656]) +19 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][25] ([Intel XE#6312]) +1 other test skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][26] ([Intel XE#7061] / [Intel XE#7356]) +2 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-blt.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][27] ([Intel XE#6900] / [Intel XE#7362])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#7130]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5.html

  * igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping:
    - shard-lnl:          NOTRUN -> [SKIP][29] ([Intel XE#7283])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-c:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#2763] / [Intel XE#6886]) +3 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-c.html

  * igt@kms_pm_rpm@dpms-non-lpsp:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_pm_rpm@dpms-non-lpsp.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area:
    - shard-lnl:          NOTRUN -> [SKIP][32] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#4608])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#4608] / [Intel XE#7304])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area@pipe-b-edp-1.html

  * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#2893] / [Intel XE#7304])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-lnl:          NOTRUN -> [SKIP][36] ([Intel XE#1128] / [Intel XE#7413])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#1127] / [Intel XE#5813])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@sprite-rotation-270:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_rotation_crc@sprite-rotation-270.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-lnl:          NOTRUN -> [SKIP][39] ([Intel XE#1435])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@xe_eudebug@read-metadata:
    - shard-lnl:          NOTRUN -> [SKIP][40] ([Intel XE#7636]) +6 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@xe_eudebug@read-metadata.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [PASS][41] -> [INCOMPLETE][42] ([Intel XE#6321])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4981-e798c5cca30e83c5793aa3d6f22456e39eeb219c/shard-bmg-9/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-bmg-2/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_evict_ccs@evict-overcommit-simple:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#6540] / [Intel XE#688]) +5 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@xe_evict_ccs@evict-overcommit-simple.html

  * igt@xe_exec_balancer@once-parallel-userptr-invalidate:
    - shard-lnl:          NOTRUN -> [SKIP][44] ([Intel XE#7482]) +9 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@xe_exec_balancer@once-parallel-userptr-invalidate.html

  * igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind:
    - shard-lnl:          NOTRUN -> [SKIP][45] ([Intel XE#1392]) +2 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind.html

  * igt@xe_exec_fault_mode@once-multi-queue-userptr-imm:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#7136]) +3 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@xe_exec_fault_mode@once-multi-queue-userptr-imm.html

  * igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority:
    - shard-lnl:          NOTRUN -> [SKIP][47] ([Intel XE#6874]) +13 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority.html

  * igt@xe_exec_reset@multi-queue-close-execqueues:
    - shard-lnl:          NOTRUN -> [SKIP][48] ([Intel XE#7866]) +1 other test skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@xe_exec_reset@multi-queue-close-execqueues.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-wt-multi-vma:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#6196])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-wt-multi-vma.html

  * igt@xe_exec_threads@threads-multi-queue-hang-basic:
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#7138]) +4 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@xe_exec_threads@threads-multi-queue-hang-basic.html

  * igt@xe_multigpu_svm@mgpu-pagefault-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][51] ([Intel XE#6964]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@xe_multigpu_svm@mgpu-pagefault-prefetch.html

  * igt@xe_page_reclaim@pat-index-xd:
    - shard-lnl:          NOTRUN -> [SKIP][52] ([Intel XE#7793])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@xe_page_reclaim@pat-index-xd.html

  * igt@xe_pat@xa-app-transient-media-on:
    - shard-lnl:          NOTRUN -> [SKIP][53] ([Intel XE#7590] / [Intel XE#7772])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@xe_pat@xa-app-transient-media-on.html

  * igt@xe_pm@s3-exec-after:
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#584] / [Intel XE#7369])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@xe_pm@s3-exec-after.html

  * igt@xe_pm@s4-d3cold-basic-exec:
    - shard-lnl:          NOTRUN -> [SKIP][55] ([Intel XE#2284] / [Intel XE#366] / [Intel XE#7370])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@xe_pm@s4-d3cold-basic-exec.html

  * igt@xe_query@multigpu-query-gt-list:
    - shard-lnl:          NOTRUN -> [SKIP][56] ([Intel XE#944])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-3/igt@xe_query@multigpu-query-gt-list.html

  * igt@xe_sriov_auto_provisioning@selfconfig-basic:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#4130] / [Intel XE#7366]) +1 other test skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@xe_sriov_auto_provisioning@selfconfig-basic.html

  * igt@xe_sriov_vram@vf-access-after-resize-up:
    - shard-lnl:          NOTRUN -> [SKIP][58] ([Intel XE#6376] / [Intel XE#7330] / [Intel XE#7422])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-lnl-7/igt@xe_sriov_vram@vf-access-after-resize-up.html

  
#### Warnings ####

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][59] ([Intel XE#3544]) -> [SKIP][60] ([Intel XE#3374] / [Intel XE#3544])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4981-e798c5cca30e83c5793aa3d6f22456e39eeb219c/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][61] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][62] ([Intel XE#2426] / [Intel XE#5848])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4981-e798c5cca30e83c5793aa3d6f22456e39eeb219c/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
  [Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#6196]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6196
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6900
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7130
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7330
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7362
  [Intel XE#7366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7366
  [Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
  [Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7385
  [Intel XE#7413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7413
  [Intel XE#7422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7422
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7676]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7676
  [Intel XE#7772]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7772
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
  [Intel XE#7866]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7866
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4981-e798c5cca30e83c5793aa3d6f22456e39eeb219c -> xe-pw-165936v1

  IGT_8883: 8214859d2c4ecf8f81a08a3d2cd26f0a50d2b513 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4981-e798c5cca30e83c5793aa3d6f22456e39eeb219c: e798c5cca30e83c5793aa3d6f22456e39eeb219c
  xe-pw-165936v1: 165936v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165936v1/index.html

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