* [RESEND 0/6] drm/i915: crtc iteration cleanups
@ 2026-05-13 7:58 Jani Nikula
2026-05-13 7:58 ` [RESEND 1/6] drm/{i915, xe}: move xe_display_flush_cleanup_work() to i915 display Jani Nikula
` (8 more replies)
0 siblings, 9 replies; 17+ messages in thread
From: Jani Nikula @ 2026-05-13 7:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Resend of [1].
[1] https://lore.kernel.org/r/cover.1777287836.git.jani.nikula@intel.com
Jani Nikula (6):
drm/{i915,xe}: move xe_display_flush_cleanup_work() to i915 display
drm/i915/display: switch from drm_for_each_crtc() to
for_each_intel_crtc()
drm/i915/display: always pass display->drm to for_each_intel_crtc*()
drm/i915/display: pass struct intel_display to all
for_each_intel_crtc*() macros
drm/i915/display: stop passing i to for_each_*_intel_crtc_in_state()
macros
drm/i915/display: stop passing i to
for_each_pipe_crtc_modeset_{enable,disable}()
drivers/gpu/drm/i915/display/i9xx_wm.c | 32 +--
drivers/gpu/drm/i915/display/intel_atomic.c | 3 +-
drivers/gpu/drm/i915/display/intel_bw.c | 11 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 14 +-
drivers/gpu/drm/i915/display/intel_crtc.c | 13 +-
drivers/gpu/drm/i915/display/intel_dbuf_bw.c | 7 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 10 +-
drivers/gpu/drm/i915/display/intel_display.c | 193 +++++++++---------
drivers/gpu/drm/i915/display/intel_display.h | 80 ++++----
.../drm/i915/display/intel_display_debugfs.c | 6 +-
.../drm/i915/display/intel_display_power.c | 2 +-
.../drm/i915/display/intel_display_trace.h | 6 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 +-
drivers/gpu/drm/i915/display/intel_dp_test.c | 2 +-
.../gpu/drm/i915/display/intel_dp_tunnel.c | 8 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 4 +-
drivers/gpu/drm/i915/display/intel_fbdev.c | 6 +-
drivers/gpu/drm/i915/display/intel_fdi.c | 3 +-
.../drm/i915/display/intel_fifo_underrun.c | 4 +-
drivers/gpu/drm/i915/display/intel_flipq.c | 2 +-
.../gpu/drm/i915/display/intel_global_state.c | 8 +-
.../drm/i915/display/intel_initial_plane.c | 4 +-
drivers/gpu/drm/i915/display/intel_link_bw.c | 2 +-
.../gpu/drm/i915/display/intel_load_detect.c | 2 +-
.../drm/i915/display/intel_modeset_setup.c | 32 +--
drivers/gpu/drm/i915/display/intel_plane.c | 9 +-
drivers/gpu/drm/i915/display/intel_pmdemand.c | 6 +-
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
drivers/gpu/drm/i915/display/intel_tc.c | 2 +-
drivers/gpu/drm/i915/display/intel_vrr.c | 4 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 38 ++--
drivers/gpu/drm/xe/display/xe_display.c | 27 +--
34 files changed, 252 insertions(+), 305 deletions(-)
--
2.47.3
^ permalink raw reply [flat|nested] 17+ messages in thread
* [RESEND 1/6] drm/{i915, xe}: move xe_display_flush_cleanup_work() to i915 display
2026-05-13 7:58 [RESEND 0/6] drm/i915: crtc iteration cleanups Jani Nikula
@ 2026-05-13 7:58 ` Jani Nikula
2026-05-13 12:09 ` Ville Syrjälä
2026-05-13 7:58 ` [RESEND 2/6] drm/i915/display: switch from drm_for_each_crtc() to for_each_intel_crtc() Jani Nikula
` (7 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Jani Nikula @ 2026-05-13 7:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
xe_display_flush_cleanup_work() is a bit of an oddball function in xe
display code. There shouldn't be anything this specific or xe
specific. While I'm not sure what the correct refactor for the function
should be, move it to shared display code for starters, next to the
eerily similar but slightly different intel_has_pending_fb_unpin() that
is only called from i915 core.
The main goal here is to unblock some refactors on
for_each_intel_crtc().
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 21 +++++++++++++++
drivers/gpu/drm/i915/display/intel_display.h | 1 +
drivers/gpu/drm/xe/display/xe_display.c | 27 +++-----------------
3 files changed, 25 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d5cf1476c7b9..50feca52b962 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -737,6 +737,27 @@ bool intel_has_pending_fb_unpin(struct intel_display *display)
return false;
}
+void intel_display_flush_cleanup_work(struct intel_display *display)
+{
+ struct intel_crtc *crtc;
+
+ for_each_intel_crtc(display->drm, crtc) {
+ struct drm_crtc_commit *commit;
+
+ spin_lock(&crtc->base.commit_lock);
+ commit = list_first_entry_or_null(&crtc->base.commit_list,
+ struct drm_crtc_commit, commit_entry);
+ if (commit)
+ drm_crtc_commit_get(commit);
+ spin_unlock(&crtc->base.commit_lock);
+
+ if (commit) {
+ wait_for_completion(&commit->cleanup_done);
+ drm_crtc_commit_put(commit);
+ }
+ }
+}
+
/*
* Finds the encoder associated with the given CRTC. This can only be
* used when we know that the CRTC isn't feeding multiple encoders!
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index a43ada0c0502..65f8c81a7bae 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -402,6 +402,7 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state);
void i830_enable_pipe(struct intel_display *display, enum pipe pipe);
void i830_disable_pipe(struct intel_display *display, enum pipe pipe);
bool intel_has_pending_fb_unpin(struct intel_display *display);
+void intel_display_flush_cleanup_work(struct intel_display *display);
void intel_encoder_destroy(struct drm_encoder *encoder);
struct drm_display_mode *
intel_encoder_current_mode(struct intel_encoder *encoder);
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index aa73023b7398..ef27fdfdbab2 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -258,27 +258,6 @@ static bool suspend_to_idle(void)
return false;
}
-static void xe_display_flush_cleanup_work(struct xe_device *xe)
-{
- struct intel_crtc *crtc;
-
- for_each_intel_crtc(&xe->drm, crtc) {
- struct drm_crtc_commit *commit;
-
- spin_lock(&crtc->base.commit_lock);
- commit = list_first_entry_or_null(&crtc->base.commit_list,
- struct drm_crtc_commit, commit_entry);
- if (commit)
- drm_crtc_commit_get(commit);
- spin_unlock(&crtc->base.commit_lock);
-
- if (commit) {
- wait_for_completion(&commit->cleanup_done);
- drm_crtc_commit_put(commit);
- }
- }
-}
-
static void xe_display_enable_d3cold(struct xe_device *xe)
{
struct intel_display *display = xe->display;
@@ -292,7 +271,7 @@ static void xe_display_enable_d3cold(struct xe_device *xe)
*/
intel_power_domains_disable(display);
- xe_display_flush_cleanup_work(xe);
+ intel_display_flush_cleanup_work(display);
intel_opregion_suspend(display, PCI_D3cold);
@@ -347,7 +326,7 @@ void xe_display_pm_suspend(struct xe_device *xe)
intel_display_driver_suspend(display);
}
- xe_display_flush_cleanup_work(xe);
+ intel_display_flush_cleanup_work(display);
intel_encoder_block_all_hpds(display);
@@ -379,7 +358,7 @@ void xe_display_pm_shutdown(struct xe_device *xe)
intel_display_driver_suspend(display);
}
- xe_display_flush_cleanup_work(xe);
+ intel_display_flush_cleanup_work(display);
intel_dp_mst_suspend(display);
intel_encoder_block_all_hpds(display);
intel_hpd_cancel_work(display);
--
2.47.3
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [RESEND 2/6] drm/i915/display: switch from drm_for_each_crtc() to for_each_intel_crtc()
2026-05-13 7:58 [RESEND 0/6] drm/i915: crtc iteration cleanups Jani Nikula
2026-05-13 7:58 ` [RESEND 1/6] drm/{i915, xe}: move xe_display_flush_cleanup_work() to i915 display Jani Nikula
@ 2026-05-13 7:58 ` Jani Nikula
2026-05-13 7:58 ` [RESEND 3/6] drm/i915/display: always pass display->drm to for_each_intel_crtc*() Jani Nikula
` (6 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Jani Nikula @ 2026-05-13 7:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
intel_has_pending_fb_unpin() has the last direct user of
drm_for_each_crtc() in i915. Switch to for_each_intel_crtc() to ensure
pipe order iteration in all cases.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 50feca52b962..682a0514ec81 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -714,22 +714,22 @@ static void icl_set_pipe_chicken(const struct intel_crtc_state *crtc_state)
bool intel_has_pending_fb_unpin(struct intel_display *display)
{
- struct drm_crtc *crtc;
+ struct intel_crtc *crtc;
bool cleanup_done;
- drm_for_each_crtc(crtc, display->drm) {
+ for_each_intel_crtc(display->drm, crtc) {
struct drm_crtc_commit *commit;
- spin_lock(&crtc->commit_lock);
- commit = list_first_entry_or_null(&crtc->commit_list,
+ spin_lock(&crtc->base.commit_lock);
+ commit = list_first_entry_or_null(&crtc->base.commit_list,
struct drm_crtc_commit, commit_entry);
cleanup_done = commit ?
try_wait_for_completion(&commit->cleanup_done) : true;
- spin_unlock(&crtc->commit_lock);
+ spin_unlock(&crtc->base.commit_lock);
if (cleanup_done)
continue;
- intel_crtc_wait_for_next_vblank(to_intel_crtc(crtc));
+ intel_crtc_wait_for_next_vblank(crtc);
return true;
}
--
2.47.3
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [RESEND 3/6] drm/i915/display: always pass display->drm to for_each_intel_crtc*()
2026-05-13 7:58 [RESEND 0/6] drm/i915: crtc iteration cleanups Jani Nikula
2026-05-13 7:58 ` [RESEND 1/6] drm/{i915, xe}: move xe_display_flush_cleanup_work() to i915 display Jani Nikula
2026-05-13 7:58 ` [RESEND 2/6] drm/i915/display: switch from drm_for_each_crtc() to for_each_intel_crtc() Jani Nikula
@ 2026-05-13 7:58 ` Jani Nikula
2026-05-13 12:22 ` Ville Syrjälä
2026-05-13 7:58 ` [RESEND 4/6] drm/i915/display: pass struct intel_display to all for_each_intel_crtc*() macros Jani Nikula
` (5 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Jani Nikula @ 2026-05-13 7:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
In preparation for always passing struct intel_display to
for_each_intel_crtc*() family of iterators, start off by unifying their
usage to always having struct intel_display *display around, and passing
display->drm to them.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 3 ++-
drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
drivers/gpu/drm/i915/display/intel_plane.c | 3 ++-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 33d8f6b6afea..4cd07410ad72 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -3533,10 +3533,11 @@ static void ilk_pipe_wm_get_hw_state(struct intel_crtc *crtc)
static int ilk_sanitize_watermarks_add_affected(struct drm_atomic_commit *state)
{
+ struct intel_display *display = to_intel_display(state->dev);
struct drm_plane *plane;
struct intel_crtc *crtc;
- for_each_intel_crtc(state->dev, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
struct intel_crtc_state *crtc_state;
crtc_state = intel_atomic_get_crtc_state(state, crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 682a0514ec81..7126a88ca090 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5692,6 +5692,7 @@ int intel_modeset_commit_pipes(struct intel_display *display,
*/
static int hsw_mode_set_planes_workaround(struct intel_atomic_state *state)
{
+ struct intel_display *display = to_intel_display(state);
struct intel_crtc_state *crtc_state;
struct intel_crtc *crtc;
struct intel_crtc_state *first_crtc_state = NULL;
@@ -5719,7 +5720,7 @@ static int hsw_mode_set_planes_workaround(struct intel_atomic_state *state)
return 0;
/* w/a possibly needed, check how many crtc's are already enabled. */
- for_each_intel_crtc(state->base.dev, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index a1f9558d53af..911ae261d1b5 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -1794,6 +1794,7 @@ static u8 intel_joiner_affected_planes(struct intel_atomic_state *state,
static int intel_joiner_add_affected_planes(struct intel_atomic_state *state,
u8 joined_pipes)
{
+ struct intel_display *display = to_intel_display(state);
u8 prev_affected_planes, affected_planes = 0;
/*
@@ -1811,7 +1812,7 @@ static int intel_joiner_add_affected_planes(struct intel_atomic_state *state,
do {
struct intel_crtc *crtc;
- for_each_intel_crtc_in_pipe_mask(state->base.dev, crtc, joined_pipes) {
+ for_each_intel_crtc_in_pipe_mask(display->drm, crtc, joined_pipes) {
int ret;
ret = intel_crtc_add_planes_to_state(state, crtc, affected_planes);
--
2.47.3
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [RESEND 4/6] drm/i915/display: pass struct intel_display to all for_each_intel_crtc*() macros
2026-05-13 7:58 [RESEND 0/6] drm/i915: crtc iteration cleanups Jani Nikula
` (2 preceding siblings ...)
2026-05-13 7:58 ` [RESEND 3/6] drm/i915/display: always pass display->drm to for_each_intel_crtc*() Jani Nikula
@ 2026-05-13 7:58 ` Jani Nikula
2026-05-13 12:22 ` Ville Syrjälä
2026-05-13 7:58 ` [RESEND 5/6] drm/i915/display: stop passing i to for_each_*_intel_crtc_in_state() macros Jani Nikula
` (4 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Jani Nikula @ 2026-05-13 7:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Now that the for_each_intel_crtc*() iterator macros primarily use
display->pipe_list for iteration, it's more convenient to pass struct
intel_display to them directly instead of struct drm_device. Make it so.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 28 +++++++--------
drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
drivers/gpu/drm/i915/display/intel_dbuf_bw.c | 2 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 36 +++++++++----------
drivers/gpu/drm/i915/display/intel_display.h | 26 +++++++-------
.../drm/i915/display/intel_display_debugfs.c | 6 ++--
.../drm/i915/display/intel_display_power.c | 2 +-
.../drm/i915/display/intel_display_trace.h | 6 ++--
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_test.c | 2 +-
.../gpu/drm/i915/display/intel_dp_tunnel.c | 2 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 4 +--
drivers/gpu/drm/i915/display/intel_fbdev.c | 6 ++--
.../drm/i915/display/intel_fifo_underrun.c | 4 +--
drivers/gpu/drm/i915/display/intel_flipq.c | 2 +-
.../gpu/drm/i915/display/intel_global_state.c | 8 ++---
.../drm/i915/display/intel_initial_plane.c | 4 +--
drivers/gpu/drm/i915/display/intel_link_bw.c | 2 +-
.../gpu/drm/i915/display/intel_load_detect.c | 2 +-
.../drm/i915/display/intel_modeset_setup.c | 32 ++++++++---------
drivers/gpu/drm/i915/display/intel_plane.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
drivers/gpu/drm/i915/display/intel_tc.c | 2 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 16 ++++-----
29 files changed, 105 insertions(+), 105 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 4cd07410ad72..19b61d4c1fae 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -640,7 +640,7 @@ static struct intel_crtc *single_enabled_crtc(struct intel_display *display)
{
struct intel_crtc *crtc, *enabled = NULL;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
if (intel_crtc_active(crtc)) {
if (enabled)
return NULL;
@@ -1393,7 +1393,7 @@ static void g4x_merge_wm(struct intel_display *display,
wm->hpll_en = true;
wm->fbc_en = true;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
const struct g4x_wm_state *wm_state = &crtc->wm.active.g4x;
if (!crtc->active)
@@ -1415,7 +1415,7 @@ static void g4x_merge_wm(struct intel_display *display,
wm->fbc_en = false;
}
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
const struct g4x_wm_state *wm_state = &crtc->wm.active.g4x;
enum pipe pipe = crtc->pipe;
@@ -2034,7 +2034,7 @@ static void vlv_merge_wm(struct intel_display *display,
wm->level = display->wm.num_levels - 1;
wm->cxsr = true;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;
if (!crtc->active)
@@ -2053,7 +2053,7 @@ static void vlv_merge_wm(struct intel_display *display,
if (num_active_pipes > 1)
wm->level = VLV_WM_LEVEL_PM2;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;
enum pipe pipe = crtc->pipe;
@@ -3078,7 +3078,7 @@ static void ilk_merge_wm_level(struct intel_display *display,
ret_wm->enable = true;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
const struct intel_pipe_wm *active = &crtc->wm.active.ilk;
const struct intel_wm_level *wm = &active->wm[level];
@@ -3218,7 +3218,7 @@ static void ilk_compute_wm_results(struct intel_display *display,
}
/* LP0 register values */
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
enum pipe pipe = crtc->pipe;
const struct intel_pipe_wm *pipe_wm = &crtc->wm.active.ilk;
const struct intel_wm_level *r = &pipe_wm->wm[0];
@@ -3416,7 +3416,7 @@ static void ilk_compute_wm_config(struct intel_display *display,
struct intel_crtc *crtc;
/* Compute the currently _active_ config */
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
const struct intel_pipe_wm *wm = &crtc->wm.active.ilk;
if (!wm->pipe_enabled)
@@ -3537,7 +3537,7 @@ static int ilk_sanitize_watermarks_add_affected(struct drm_atomic_commit *state)
struct drm_plane *plane;
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state;
crtc_state = intel_atomic_get_crtc_state(state, crtc);
@@ -3770,7 +3770,7 @@ static void g4x_wm_get_hw_state(struct intel_display *display)
wm->cxsr = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct g4x_wm_state *active = &crtc->wm.active.g4x;
@@ -3885,7 +3885,7 @@ static void g4x_wm_sanitize(struct intel_display *display)
}
}
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
int ret;
@@ -3952,7 +3952,7 @@ static void vlv_wm_get_hw_state(struct intel_display *display)
vlv_punit_put(display);
}
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct vlv_wm_state *active = &crtc->wm.active.vlv;
@@ -4034,7 +4034,7 @@ static void vlv_wm_sanitize(struct intel_display *display)
}
}
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
int ret;
@@ -4075,7 +4075,7 @@ static void ilk_wm_get_hw_state(struct intel_display *display)
ilk_init_lp_watermarks(display);
- for_each_intel_crtc(display->drm, crtc)
+ for_each_intel_crtc(display, crtc)
ilk_pipe_wm_get_hw_state(crtc);
hw->wm_lp[0] = intel_de_read(display, WM1_LP_ILK);
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 9c3a9bbb49f6..bc8ad312ec15 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -1378,7 +1378,7 @@ void intel_bw_update_hw_state(struct intel_display *display)
bw_state->pipe_sagv_reject = 0;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
const struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
enum pipe pipe = crtc->pipe;
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index a1bf01021d65..2fa7e8c3bb26 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3647,7 +3647,7 @@ void intel_cdclk_update_hw_state(struct intel_display *display)
cdclk_state->enabled_pipes = 0;
cdclk_state->active_pipes = 0;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
const struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
enum pipe pipe = crtc->pipe;
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 03de219f7a64..e8c5aa613587 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -55,7 +55,7 @@ struct intel_crtc *intel_crtc_for_pipe(struct intel_display *display,
{
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
if (crtc->pipe == pipe)
return crtc;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dbuf_bw.c b/drivers/gpu/drm/i915/display/intel_dbuf_bw.c
index 0562d4df6a07..1f38317b38bb 100644
--- a/drivers/gpu/drm/i915/display/intel_dbuf_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_dbuf_bw.c
@@ -236,7 +236,7 @@ void intel_dbuf_bw_update_hw_state(struct intel_display *display)
if (DISPLAY_VER(display) < 9)
return;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
const struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index cd61ddb7f469..34e2b5ea9d0d 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3672,7 +3672,7 @@ void intel_ddi_update_active_dpll(struct intel_atomic_state *state,
if (!intel_encoder_is_tc(encoder) || !display->dpll.mgr)
return;
- for_each_intel_crtc_in_pipe_mask(display->drm, pipe_crtc,
+ for_each_intel_crtc_in_pipe_mask(display, pipe_crtc,
intel_crtc_joined_pipe_mask(crtc_state))
intel_dpll_update_active(state, pipe_crtc, encoder);
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7126a88ca090..d224cefc988f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -717,7 +717,7 @@ bool intel_has_pending_fb_unpin(struct intel_display *display)
struct intel_crtc *crtc;
bool cleanup_done;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct drm_crtc_commit *commit;
spin_lock(&crtc->base.commit_lock);
commit = list_first_entry_or_null(&crtc->base.commit_list,
@@ -741,7 +741,7 @@ void intel_display_flush_cleanup_work(struct intel_display *display)
{
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct drm_crtc_commit *commit;
spin_lock(&crtc->base.commit_lock);
@@ -3526,7 +3526,7 @@ static void enabled_uncompressed_joiner_pipes(struct intel_display *display,
if (!HAS_UNCOMPRESSED_JOINER(display))
return;
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc,
+ for_each_intel_crtc_in_pipe_mask(display, crtc,
joiner_pipes(display)) {
enum intel_display_power_domain power_domain;
enum pipe pipe = crtc->pipe;
@@ -3554,7 +3554,7 @@ static void enabled_bigjoiner_pipes(struct intel_display *display,
if (!HAS_BIGJOINER(display))
return;
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc,
+ for_each_intel_crtc_in_pipe_mask(display, crtc,
joiner_pipes(display)) {
enum intel_display_power_domain power_domain;
enum pipe pipe = crtc->pipe;
@@ -3623,7 +3623,7 @@ static void enabled_ultrajoiner_pipes(struct intel_display *display,
if (!HAS_ULTRAJOINER(display))
return;
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc,
+ for_each_intel_crtc_in_pipe_mask(display, crtc,
joiner_pipes(display)) {
enum intel_display_power_domain power_domain;
enum pipe pipe = crtc->pipe;
@@ -5577,7 +5577,7 @@ int intel_modeset_pipes_in_mask_early(struct intel_atomic_state *state,
struct intel_display *display = to_intel_display(state);
struct intel_crtc *crtc;
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc, mask) {
+ for_each_intel_crtc_in_pipe_mask(display, crtc, mask) {
struct intel_crtc_state *crtc_state;
int ret;
@@ -5624,7 +5624,7 @@ int intel_modeset_all_pipes_late(struct intel_atomic_state *state,
struct intel_display *display = to_intel_display(state);
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state;
int ret;
@@ -5665,7 +5665,7 @@ int intel_modeset_commit_pipes(struct intel_display *display,
state->acquire_ctx = ctx;
to_intel_atomic_state(state)->internal = true;
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {
+ for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) {
struct intel_crtc_state *crtc_state =
intel_atomic_get_crtc_state(state, crtc);
@@ -5720,7 +5720,7 @@ static int hsw_mode_set_planes_workaround(struct intel_atomic_state *state)
return 0;
/* w/a possibly needed, check how many crtc's are already enabled. */
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
@@ -5917,7 +5917,7 @@ static int intel_atomic_check_joiner(struct intel_atomic_state *state,
return -EINVAL;
}
- for_each_intel_crtc_in_pipe_mask(display->drm, secondary_crtc,
+ for_each_intel_crtc_in_pipe_mask(display, secondary_crtc,
intel_crtc_joiner_secondary_pipes(primary_crtc_state)) {
struct intel_crtc_state *secondary_crtc_state;
int ret;
@@ -5960,7 +5960,7 @@ static void kill_joiner_secondaries(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, primary_crtc);
struct intel_crtc *secondary_crtc;
- for_each_intel_crtc_in_pipe_mask(display->drm, secondary_crtc,
+ for_each_intel_crtc_in_pipe_mask(display, secondary_crtc,
intel_crtc_joiner_secondary_pipes(primary_crtc_state)) {
struct intel_crtc_state *secondary_crtc_state =
intel_atomic_get_new_crtc_state(state, secondary_crtc);
@@ -6259,13 +6259,13 @@ static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state)
modeset_pipes |= crtc_state->joiner_pipes;
}
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc, affected_pipes) {
+ for_each_intel_crtc_in_pipe_mask(display, crtc, affected_pipes) {
crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
}
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc, modeset_pipes) {
+ for_each_intel_crtc_in_pipe_mask(display, crtc, modeset_pipes) {
int ret;
crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
@@ -6750,7 +6750,7 @@ static void intel_enable_crtc(struct intel_atomic_state *state,
if (!intel_crtc_needs_modeset(new_crtc_state))
return;
- for_each_intel_crtc_in_pipe_mask_reverse(display->drm, pipe_crtc,
+ for_each_intel_crtc_in_pipe_mask_reverse(display, pipe_crtc,
intel_crtc_joined_pipe_mask(new_crtc_state)) {
const struct intel_crtc_state *pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
@@ -6888,7 +6888,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
* We need to disable pipe CRC before disabling the pipe,
* or we race against vblank off.
*/
- for_each_intel_crtc_in_pipe_mask(display->drm, pipe_crtc,
+ for_each_intel_crtc_in_pipe_mask(display, pipe_crtc,
intel_crtc_joined_pipe_mask(old_crtc_state))
intel_crtc_disable_pipe_crc(pipe_crtc);
@@ -6896,7 +6896,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
display->modeset.funcs->crtc_disable(state, crtc);
- for_each_intel_crtc_in_pipe_mask(display->drm, pipe_crtc,
+ for_each_intel_crtc_in_pipe_mask(display, pipe_crtc,
intel_crtc_joined_pipe_mask(old_crtc_state)) {
const struct intel_crtc_state *new_pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
@@ -7808,7 +7808,7 @@ static u32 intel_encoder_possible_crtcs(struct intel_encoder *encoder)
struct intel_crtc *crtc;
u32 possible_crtcs = 0;
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc, encoder->pipe_mask)
+ for_each_intel_crtc_in_pipe_mask(display, crtc, encoder->pipe_mask)
possible_crtcs |= drm_crtc_mask(&crtc->base);
return possible_crtcs;
@@ -8301,7 +8301,7 @@ int intel_initial_commit(struct intel_display *display)
to_intel_atomic_state(state)->internal = true;
retry:
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
intel_atomic_get_crtc_state(state, crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 65f8c81a7bae..a3e0def4adb0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -212,22 +212,22 @@ enum phy_fia {
base.head) \
for_each_if((intel_plane)->pipe == (intel_crtc)->pipe)
-#define for_each_intel_crtc(dev, crtc) \
+#define for_each_intel_crtc(display, crtc) \
list_for_each_entry((crtc), \
- &to_intel_display(dev)->pipe_list, \
+ &(display)->pipe_list, \
pipe_head)
-#define for_each_intel_crtc_reverse(dev, crtc) \
+#define for_each_intel_crtc_reverse(display, crtc) \
list_for_each_entry_reverse((crtc), \
- &to_intel_display(dev)->pipe_list, \
+ &(display)->pipe_list, \
pipe_head)
-#define for_each_intel_crtc_in_pipe_mask(dev, crtc, pipe_mask) \
- for_each_intel_crtc((dev), (crtc)) \
+#define for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) \
+ for_each_intel_crtc((display), (crtc)) \
for_each_if((pipe_mask) & BIT((crtc)->pipe))
-#define for_each_intel_crtc_in_pipe_mask_reverse(dev, crtc, pipe_mask) \
- for_each_intel_crtc_reverse((dev), (crtc)) \
+#define for_each_intel_crtc_in_pipe_mask_reverse(display, crtc, pipe_mask) \
+ for_each_intel_crtc_reverse((display), (crtc)) \
for_each_if((pipe_mask) & BIT((crtc)->pipe))
#define for_each_intel_encoder(dev, intel_encoder) \
@@ -288,28 +288,28 @@ enum phy_fia {
for_each_if(plane)
#define for_each_old_intel_crtc_in_state(__state, crtc, old_crtc_state, __i) \
- for_each_intel_crtc((__state)->base.dev, (crtc)) \
+ for_each_intel_crtc(to_intel_display(__state), (crtc)) \
for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
(old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc))))
#define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state, __i) \
- for_each_intel_crtc((__state)->base.dev, (crtc)) \
+ for_each_intel_crtc(to_intel_display(__state), (crtc)) \
for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
(new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
#define for_each_new_intel_crtc_in_state_reverse(__state, crtc, new_crtc_state, __i) \
- for_each_intel_crtc_reverse((__state)->base.dev, (crtc)) \
+ for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
(new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
#define for_each_oldnew_intel_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state, __i) \
- for_each_intel_crtc((__state)->base.dev, (crtc)) \
+ for_each_intel_crtc(to_intel_display(__state), (crtc)) \
for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
(old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
(new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
- for_each_intel_crtc_reverse((__state)->base.dev, (crtc)) \
+ for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
(old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
(new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 81bef000a4e3..b2a745733182 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -606,7 +606,7 @@ static int i915_display_info(struct seq_file *m, void *unused)
seq_printf(m, "CRTC info\n");
seq_printf(m, "---------\n");
- for_each_intel_crtc(display->drm, crtc)
+ for_each_intel_crtc(display, crtc)
intel_crtc_info(m, crtc);
seq_printf(m, "\n");
@@ -664,7 +664,7 @@ static int i915_ddb_info(struct seq_file *m, void *unused)
seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
enum pipe pipe = crtc->pipe;
@@ -771,7 +771,7 @@ i915_fifo_underrun_reset_write(struct file *filp,
if (!reset)
return cnt;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct drm_crtc_commit *commit;
struct intel_crtc_state *crtc_state;
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 80ecf373fb19..737ec400ab29 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1203,7 +1203,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
{
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc)
+ for_each_intel_crtc(display, crtc)
INTEL_DISPLAY_STATE_WARN(display, crtc->active,
"CRTC for pipe %c enabled\n",
pipe_name(crtc->pipe));
diff --git a/drivers/gpu/drm/i915/display/intel_display_trace.h b/drivers/gpu/drm/i915/display/intel_display_trace.h
index 27ebc32cb61a..504d105935bc 100644
--- a/drivers/gpu/drm/i915/display/intel_display_trace.h
+++ b/drivers/gpu/drm/i915/display/intel_display_trace.h
@@ -84,7 +84,7 @@ TRACE_EVENT(intel_pipe_enable,
sizeof(__entry->frame[0]) * I915_MAX_PIPES);
memset(__entry->scanline, 0,
sizeof(__entry->scanline[0]) * I915_MAX_PIPES);
- for_each_intel_crtc(display->drm, it__) {
+ for_each_intel_crtc(display, it__) {
__entry->frame[it__->pipe] = intel_crtc_get_vblank_counter(it__);
__entry->scanline[it__->pipe] = intel_get_crtc_scanline(it__);
}
@@ -114,7 +114,7 @@ TRACE_EVENT(intel_pipe_disable,
sizeof(__entry->frame[0]) * I915_MAX_PIPES);
memset(__entry->scanline, 0,
sizeof(__entry->scanline[0]) * I915_MAX_PIPES);
- for_each_intel_crtc(display->drm, it__) {
+ for_each_intel_crtc(display, it__) {
__entry->frame[it__->pipe] = intel_crtc_get_vblank_counter(it__);
__entry->scanline[it__->pipe] = intel_get_crtc_scanline(it__);
}
@@ -244,7 +244,7 @@ TRACE_EVENT(intel_memory_cxsr,
sizeof(__entry->frame[0]) * I915_MAX_PIPES);
memset(__entry->scanline, 0,
sizeof(__entry->scanline[0]) * I915_MAX_PIPES);
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
__entry->frame[crtc->pipe] = intel_crtc_get_vblank_counter(crtc);
__entry->scanline[crtc->pipe] = intel_get_crtc_scanline(crtc);
}
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 2151766546e6..25d93b2468fa 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6751,7 +6751,7 @@ static int intel_modeset_affected_transcoders(struct intel_atomic_state *state,
if (transcoders == 0)
return 0;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state;
int ret;
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 8f73e01db17c..be8febe3d234 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -837,7 +837,7 @@ static int intel_dp_mst_check_dsc_change(struct intel_atomic_state *state,
mst_pipe_mask = get_pipes_downstream_of_mst_port(state, mst_mgr, NULL);
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc, mst_pipe_mask) {
+ for_each_intel_crtc_in_pipe_mask(display, crtc, mst_pipe_mask) {
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_test.c b/drivers/gpu/drm/i915/display/intel_dp_test.c
index 5cfa1dd411da..ba44769c9cfb 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_test.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_test.c
@@ -471,7 +471,7 @@ static int intel_dp_do_phy_test(struct intel_encoder *encoder,
drm_dbg_kms(display->drm, "[ENCODER:%d:%s] PHY test\n",
encoder->base.base.id, encoder->base.name);
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {
+ for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) {
const struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
index 11712a151f72..10d47faa6996 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
@@ -146,7 +146,7 @@ static int allocate_initial_tunnel_bw_for_pipes(struct intel_dp *intel_dp, u8 pi
int tunnel_bw = 0;
int err;
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {
+ for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) {
const struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
int stream_bw = intel_dp_config_required_rate(crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index a9d88cecb338..f88536879ca9 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -4965,7 +4965,7 @@ static void readout_dpll_hw_state(struct intel_display *display,
pll->wakeref = intel_display_power_get(display, pll->info->power_domain);
pll->state.pipe_mask = 0;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 0fdb32ef241c..6c95d4ae1ea9 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -137,7 +137,7 @@ static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *c
frontbuffer_bits = INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc,
+ for_each_intel_crtc_in_pipe_mask(display, crtc,
crtc_state->joiner_pipes)
frontbuffer_bits |= INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);
@@ -227,7 +227,7 @@ static void intel_drrs_frontbuffer_update(struct intel_display *display,
{
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
unsigned int frontbuffer_bits;
mutex_lock(&crtc->drrs.mutex);
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index df1d3d9dc3e5..c8d4e3a5ce6b 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -380,7 +380,7 @@ static bool intel_fbdev_init_bios(struct intel_display *display,
unsigned int max_size = 0;
/* Find the largest fb */
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct intel_plane *plane =
@@ -419,7 +419,7 @@ static bool intel_fbdev_init_bios(struct intel_display *display,
}
/* Now make sure all the pipes will fit into it */
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct intel_plane *plane =
@@ -489,7 +489,7 @@ static bool intel_fbdev_init_bios(struct intel_display *display,
drm_framebuffer_get(&ifbdev->fb->base);
/* Final pass to check if any active pipes don't have fbs */
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct intel_plane *plane =
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
index bf047180def9..8176976f15f6 100644
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
@@ -527,7 +527,7 @@ void intel_check_cpu_fifo_underruns(struct intel_display *display)
spin_lock_irq(&display->irq.lock);
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
if (crtc->cpu_fifo_underrun_disabled)
continue;
@@ -554,7 +554,7 @@ void intel_check_pch_fifo_underruns(struct intel_display *display)
spin_lock_irq(&display->irq.lock);
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
if (crtc->pch_fifo_underrun_disabled)
continue;
diff --git a/drivers/gpu/drm/i915/display/intel_flipq.c b/drivers/gpu/drm/i915/display/intel_flipq.c
index 333d28faf4ca..bf278f60bba7 100644
--- a/drivers/gpu/drm/i915/display/intel_flipq.c
+++ b/drivers/gpu/drm/i915/display/intel_flipq.c
@@ -132,7 +132,7 @@ void intel_flipq_init(struct intel_display *display)
intel_dmc_wait_fw_load(display);
- for_each_intel_crtc(display->drm, crtc)
+ for_each_intel_crtc(display, crtc)
intel_flipq_crtc_init(crtc);
}
diff --git a/drivers/gpu/drm/i915/display/intel_global_state.c b/drivers/gpu/drm/i915/display/intel_global_state.c
index 9e1369c834e4..886caf29c9ae 100644
--- a/drivers/gpu/drm/i915/display/intel_global_state.c
+++ b/drivers/gpu/drm/i915/display/intel_global_state.c
@@ -140,7 +140,7 @@ static void assert_global_state_write_locked(struct intel_display *display)
{
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc)
+ for_each_intel_crtc(display, crtc)
drm_modeset_lock_assert_held(&crtc->base.mutex);
}
@@ -163,7 +163,7 @@ static void assert_global_state_read_locked(struct intel_atomic_state *state)
struct drm_modeset_acquire_ctx *ctx = state->base.acquire_ctx;
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
if (modeset_lock_is_held(ctx, &crtc->base.mutex))
return;
}
@@ -301,7 +301,7 @@ int intel_atomic_lock_global_state(struct intel_global_state *obj_state)
struct intel_display *display = to_intel_display(state);
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
int ret;
ret = drm_modeset_lock(&crtc->base.mutex,
@@ -334,7 +334,7 @@ intel_atomic_global_state_is_serialized(struct intel_atomic_state *state)
struct intel_display *display = to_intel_display(state);
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc)
+ for_each_intel_crtc(display, crtc)
if (!intel_atomic_get_new_crtc_state(state, crtc))
return false;
return true;
diff --git a/drivers/gpu/drm/i915/display/intel_initial_plane.c b/drivers/gpu/drm/i915/display/intel_initial_plane.c
index 034fe199c2a1..6aa253678ec9 100644
--- a/drivers/gpu/drm/i915/display/intel_initial_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_initial_plane.c
@@ -50,7 +50,7 @@ intel_reuse_initial_plane_obj(struct intel_crtc *this,
struct intel_display *display = to_intel_display(this);
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_plane *plane =
to_intel_plane(crtc->base.primary);
const struct intel_plane_state *plane_state =
@@ -208,7 +208,7 @@ void intel_initial_plane_config(struct intel_display *display)
struct intel_initial_plane_configs all_plane_configs = {};
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
const struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct intel_initial_plane_config *plane_config =
diff --git a/drivers/gpu/drm/i915/display/intel_link_bw.c b/drivers/gpu/drm/i915/display/intel_link_bw.c
index d2862de894fa..b47474a3e9fe 100644
--- a/drivers/gpu/drm/i915/display/intel_link_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_link_bw.c
@@ -108,7 +108,7 @@ static int __intel_link_bw_reduce_bpp(struct intel_atomic_state *state,
struct intel_crtc *crtc;
int max_bpp_x16 = 0;
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {
+ for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) {
struct intel_crtc_state *crtc_state;
int link_bpp_x16;
diff --git a/drivers/gpu/drm/i915/display/intel_load_detect.c b/drivers/gpu/drm/i915/display/intel_load_detect.c
index 2f767b15a7f9..3fef1ebc6357 100644
--- a/drivers/gpu/drm/i915/display/intel_load_detect.c
+++ b/drivers/gpu/drm/i915/display/intel_load_detect.c
@@ -89,7 +89,7 @@ intel_load_detect_get_pipe(struct drm_connector *connector,
}
/* Find an unused one (if possible) */
- for_each_intel_crtc(display->drm, possible_crtc) {
+ for_each_intel_crtc(display, possible_crtc) {
if (!(encoder->base.possible_crtcs &
drm_crtc_mask(&possible_crtc->base)))
continue;
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index e88082c8caac..ea6459ef495a 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -71,7 +71,7 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc,
to_intel_atomic_state(state)->internal = true;
/* Everything's already locked, -EDEADLK can't happen. */
- for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc,
+ for_each_intel_crtc_in_pipe_mask(display, temp_crtc,
BIT(pipe) |
intel_crtc_joiner_secondary_pipes(crtc_state)) {
struct intel_crtc_state *temp_crtc_state =
@@ -192,7 +192,7 @@ static u8 get_transcoder_pipes(struct intel_display *display,
struct intel_crtc *temp_crtc;
u8 pipes = 0;
- for_each_intel_crtc(display->drm, temp_crtc) {
+ for_each_intel_crtc(display, temp_crtc) {
struct intel_crtc_state *temp_crtc_state =
to_intel_crtc_state(temp_crtc->base.state);
@@ -248,7 +248,7 @@ static u8 get_joiner_secondary_pipes(struct intel_display *display, u8 primary_p
struct intel_crtc *primary_crtc;
u8 pipes = 0;
- for_each_intel_crtc_in_pipe_mask(display->drm, primary_crtc, primary_pipes_mask) {
+ for_each_intel_crtc_in_pipe_mask(display, primary_crtc, primary_pipes_mask) {
struct intel_crtc_state *primary_crtc_state =
to_intel_crtc_state(primary_crtc->base.state);
@@ -278,16 +278,16 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc,
portsync_master_mask & joiner_secondaries_mask ||
portsync_slaves_mask & joiner_secondaries_mask);
- for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc, joiner_secondaries_mask)
+ for_each_intel_crtc_in_pipe_mask(display, temp_crtc, joiner_secondaries_mask)
intel_crtc_disable_noatomic_begin(temp_crtc, ctx);
- for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc, portsync_slaves_mask)
+ for_each_intel_crtc_in_pipe_mask(display, temp_crtc, portsync_slaves_mask)
intel_crtc_disable_noatomic_begin(temp_crtc, ctx);
- for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc, portsync_master_mask)
+ for_each_intel_crtc_in_pipe_mask(display, temp_crtc, portsync_master_mask)
intel_crtc_disable_noatomic_begin(temp_crtc, ctx);
- for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc,
+ for_each_intel_crtc_in_pipe_mask(display, temp_crtc,
joiner_secondaries_mask |
portsync_slaves_mask |
portsync_master_mask)
@@ -376,7 +376,7 @@ intel_sanitize_plane_mapping(struct intel_display *display)
if (DISPLAY_VER(display) >= 4)
return;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_plane *plane =
to_intel_plane(crtc->base.primary);
struct intel_crtc *plane_crtc;
@@ -532,7 +532,7 @@ static void intel_sanitize_all_crtcs(struct intel_display *display,
for (;;) {
u32 old_mask = crtcs_forced_off;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
u32 crtc_mask = drm_crtc_mask(&crtc->base);
if (crtcs_forced_off & crtc_mask)
@@ -545,7 +545,7 @@ static void intel_sanitize_all_crtcs(struct intel_display *display,
break;
}
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
@@ -681,7 +681,7 @@ static void readout_plane_state(struct intel_display *display)
str_enabled_disabled(visible), pipe_name(pipe));
}
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
@@ -699,7 +699,7 @@ static void intel_modeset_readout_hw_state(struct intel_display *display)
struct intel_connector *connector;
struct drm_connector_list_iter conn_iter;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
@@ -741,7 +741,7 @@ static void intel_modeset_readout_hw_state(struct intel_display *display)
/* encoder should read be linked to joiner primary */
WARN_ON(intel_crtc_is_joiner_secondary(crtc_state));
- for_each_intel_crtc_in_pipe_mask(display->drm, secondary_crtc,
+ for_each_intel_crtc_in_pipe_mask(display, secondary_crtc,
intel_crtc_joiner_secondary_pipes(crtc_state)) {
struct intel_crtc_state *secondary_crtc_state;
@@ -814,7 +814,7 @@ static void intel_modeset_readout_hw_state(struct intel_display *display)
}
drm_connector_list_iter_end(&conn_iter);
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct intel_plane *plane;
@@ -961,7 +961,7 @@ void intel_modeset_setup_hw_state(struct intel_display *display,
* intel_sanitize_plane_mapping() may need to do vblank
* waits, so we need vblank interrupts restored beforehand.
*/
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
@@ -997,7 +997,7 @@ void intel_modeset_setup_hw_state(struct intel_display *display,
intel_wm_get_hw_state(display);
intel_wm_sanitize(display);
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct intel_power_domain_mask put_domains;
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index 911ae261d1b5..e191a57f02cd 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -1812,7 +1812,7 @@ static int intel_joiner_add_affected_planes(struct intel_atomic_state *state,
do {
struct intel_crtc *crtc;
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc, joined_pipes) {
+ for_each_intel_crtc_in_pipe_mask(display, crtc, joined_pipes) {
int ret;
ret = intel_crtc_add_planes_to_state(state, crtc, affected_planes);
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 9958230a3dd9..cd7944b67b59 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1868,7 +1868,7 @@ void intel_psr_set_non_psr_pipes(struct intel_dp *intel_dp,
return;
/* We ignore possible secondary PSR/Panel Replay capable eDP */
- for_each_intel_crtc(display->drm, crtc)
+ for_each_intel_crtc(display, crtc)
active_pipes |= crtc->active ? BIT(crtc->pipe) : 0;
active_pipes = intel_calc_active_pipes(state, active_pipes);
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index fc0d470fe949..c620cfa8fe06 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -1779,7 +1779,7 @@ static int reset_link_commit(struct intel_tc_port *tc,
if (!pipe_mask)
return 0;
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {
+ for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) {
struct intel_crtc_state *crtc_state;
crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 96d2dcbe7bbc..346e97d91d92 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2529,7 +2529,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
}
}
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
enum pipe pipe = crtc->pipe;
new_dbuf_state->slices[pipe] =
@@ -2574,7 +2574,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
return ret;
}
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
ret = skl_crtc_allocate_ddb(state, crtc);
if (ret)
return ret;
@@ -2845,7 +2845,7 @@ static int pkgc_max_linetime(struct intel_atomic_state *state)
}
max_linetime = 0;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
if (display->pkgc.disable[crtc->pipe])
return 0;
@@ -3033,7 +3033,7 @@ static void skl_wm_get_hw_state(struct intel_display *display)
dbuf_state->mdclk_cdclk_ratio = intel_mdclk_cdclk_ratio(display, &display->cdclk.hw);
dbuf_state->active_pipes = 0;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
enum pipe pipe = crtc->pipe;
@@ -3446,7 +3446,7 @@ static void pipe_mbus_dbox_ctl_update(struct intel_display *display,
{
struct intel_crtc *crtc;
- for_each_intel_crtc_in_pipe_mask(display->drm, crtc, dbuf_state->active_pipes)
+ for_each_intel_crtc_in_pipe_mask(display, crtc, dbuf_state->active_pipes)
intel_de_write(display, PIPE_MBUS_DBOX_CTL(crtc->pipe),
pipe_mbus_dbox_ctl(crtc, dbuf_state));
}
@@ -3758,14 +3758,14 @@ static bool skl_dbuf_is_misconfigured(struct intel_display *display)
struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
struct intel_crtc *crtc;
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
const struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
entries[crtc->pipe] = crtc_state->wm.skl.ddb;
}
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
const struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
u8 slices;
@@ -3803,7 +3803,7 @@ static void skl_dbuf_sanitize(struct intel_display *display)
drm_dbg_kms(display->drm, "BIOS has misprogrammed the DBUF, disabling all planes\n");
- for_each_intel_crtc(display->drm, crtc) {
+ for_each_intel_crtc(display, crtc) {
struct intel_plane *plane = to_intel_plane(crtc->base.primary);
const struct intel_plane_state *plane_state =
to_intel_plane_state(plane->base.state);
--
2.47.3
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [RESEND 5/6] drm/i915/display: stop passing i to for_each_*_intel_crtc_in_state() macros
2026-05-13 7:58 [RESEND 0/6] drm/i915: crtc iteration cleanups Jani Nikula
` (3 preceding siblings ...)
2026-05-13 7:58 ` [RESEND 4/6] drm/i915/display: pass struct intel_display to all for_each_intel_crtc*() macros Jani Nikula
@ 2026-05-13 7:58 ` Jani Nikula
2026-05-13 12:22 ` Ville Syrjälä
2026-05-13 7:58 ` [RESEND 6/6] drm/i915/display: stop passing i to for_each_pipe_crtc_modeset_{enable, disable}() Jani Nikula
` (3 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Jani Nikula @ 2026-05-13 7:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
None of the for_each_*_intel_crtc_in_state() macros or their users
actually need the CRTC index i variable anymore. Remove them.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 3 +-
drivers/gpu/drm/i915/display/intel_atomic.c | 3 +-
drivers/gpu/drm/i915/display/intel_bw.c | 9 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 12 +-
drivers/gpu/drm/i915/display/intel_crtc.c | 11 +-
drivers/gpu/drm/i915/display/intel_dbuf_bw.c | 5 +-
drivers/gpu/drm/i915/display/intel_display.c | 115 +++++++-----------
drivers/gpu/drm/i915/display/intel_display.h | 25 ++--
.../gpu/drm/i915/display/intel_dp_tunnel.c | 6 +-
drivers/gpu/drm/i915/display/intel_fdi.c | 3 +-
drivers/gpu/drm/i915/display/intel_plane.c | 6 +-
drivers/gpu/drm/i915/display/intel_pmdemand.c | 6 +-
drivers/gpu/drm/i915/display/intel_vrr.c | 4 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 22 ++--
14 files changed, 89 insertions(+), 141 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 19b61d4c1fae..86d1c9f7f0ff 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -3582,7 +3582,6 @@ void ilk_wm_sanitize(struct intel_display *display)
struct intel_crtc_state *crtc_state;
struct drm_modeset_acquire_ctx ctx;
int ret;
- int i;
/* Only supported on platforms that use atomic watermark design */
if (!display->wm.funcs->optimize_watermarks)
@@ -3620,7 +3619,7 @@ void ilk_wm_sanitize(struct intel_display *display)
goto fail;
/* Write calculated watermark values back */
- for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state) {
crtc_state->wm.need_postvbl_update = true;
intel_optimize_watermarks(intel_state, crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index 38bbd6964d8e..0e4f0678c53c 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -200,9 +200,8 @@ bool intel_any_crtc_needs_modeset(struct intel_atomic_state *state)
{
struct intel_crtc *crtc;
struct intel_crtc_state *crtc_state;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
if (intel_crtc_needs_modeset(crtc_state))
return true;
}
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index bc8ad312ec15..d4f991d0b25b 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -1219,10 +1219,8 @@ static int intel_bw_check_data_rate(struct intel_atomic_state *state, bool *chan
struct intel_display *display = to_intel_display(state);
const struct intel_crtc_state *new_crtc_state, *old_crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
unsigned int old_data_rate =
intel_crtc_bw_data_rate(old_crtc_state);
unsigned int new_data_rate =
@@ -1268,10 +1266,9 @@ static int intel_bw_check_sagv_mask(struct intel_atomic_state *state)
const struct intel_bw_state *old_bw_state = NULL;
struct intel_bw_state *new_bw_state = NULL;
struct intel_crtc *crtc;
- int ret, i;
+ int ret;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
if (intel_crtc_can_enable_sagv(old_crtc_state) ==
intel_crtc_can_enable_sagv(new_crtc_state))
continue;
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 2fa7e8c3bb26..189ae2d3cfc9 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3124,10 +3124,9 @@ static int bxt_compute_min_voltage_level(struct intel_atomic_state *state)
struct intel_crtc *crtc;
struct intel_crtc_state *crtc_state;
u8 min_voltage_level;
- int i;
enum pipe pipe;
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
int ret;
if (crtc_state->hw.enable)
@@ -3219,13 +3218,13 @@ static int skl_dpll0_vco(struct intel_atomic_state *state)
intel_atomic_get_new_cdclk_state(state);
struct intel_crtc *crtc;
struct intel_crtc_state *crtc_state;
- int vco, i;
+ int vco;
vco = cdclk_state->logical.vco;
if (!vco)
vco = display->cdclk.skl_preferred_vco_freq;
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
if (!crtc_state->hw.enable)
continue;
@@ -3424,10 +3423,9 @@ static int intel_crtcs_calc_min_cdclk(struct intel_atomic_state *state,
const struct intel_crtc_state *old_crtc_state;
const struct intel_crtc_state *new_crtc_state;
struct intel_crtc *crtc;
- int i, ret;
+ int ret;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
ret = intel_cdclk_update_crtc_min_cdclk(state, crtc,
old_crtc_state->min_cdclk,
new_crtc_state->min_cdclk,
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index e8c5aa613587..295ad8417c68 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -534,9 +534,8 @@ void intel_wait_for_vblank_workers(struct intel_atomic_state *state)
{
struct intel_crtc_state *crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
if (!intel_crtc_needs_vblank_work(crtc_state))
continue;
@@ -828,10 +827,8 @@ bool intel_any_crtc_enable_changed(struct intel_atomic_state *state)
{
const struct intel_crtc_state *old_crtc_state, *new_crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
if (intel_crtc_enable_changed(old_crtc_state, new_crtc_state))
return true;
}
@@ -849,10 +846,8 @@ bool intel_any_crtc_active_changed(struct intel_atomic_state *state)
{
const struct intel_crtc_state *old_crtc_state, *new_crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
if (intel_crtc_active_changed(old_crtc_state, new_crtc_state))
return true;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dbuf_bw.c b/drivers/gpu/drm/i915/display/intel_dbuf_bw.c
index 1f38317b38bb..6cf674c586dc 100644
--- a/drivers/gpu/drm/i915/display/intel_dbuf_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_dbuf_bw.c
@@ -184,13 +184,12 @@ int intel_dbuf_bw_calc_min_cdclk(struct intel_atomic_state *state,
const struct intel_crtc_state *old_crtc_state;
const struct intel_crtc_state *new_crtc_state;
struct intel_crtc *crtc;
- int ret, i;
+ int ret;
if (DISPLAY_VER(display) < 9)
return 0;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
struct intel_dbuf_bw old_dbuf_bw, new_dbuf_bw;
skl_crtc_calc_dbuf_bw(&old_dbuf_bw, old_crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d224cefc988f..cf9afc90e301 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1316,14 +1316,13 @@ static void intel_encoders_update_prepare(struct intel_atomic_state *state)
struct intel_display *display = to_intel_display(state);
struct intel_crtc_state *new_crtc_state, *old_crtc_state;
struct intel_crtc *crtc;
- int i;
/*
* Make sure the DPLL state is up-to-date for fastset TypeC ports after non-blocking commits.
* TODO: Update the DPLL state for all cases in the encoder->update_prepare() hook.
*/
if (display->dpll.mgr) {
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
if (intel_crtc_needs_modeset(new_crtc_state))
continue;
@@ -5698,10 +5697,9 @@ static int hsw_mode_set_planes_workaround(struct intel_atomic_state *state)
struct intel_crtc_state *first_crtc_state = NULL;
struct intel_crtc_state *other_crtc_state = NULL;
enum pipe first_pipe = INVALID_PIPE, enabled_pipe = INVALID_PIPE;
- int i;
/* look at all crtc's that are going to be enabled in during modeset */
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
if (!crtc_state->hw.active ||
!intel_crtc_needs_modeset(crtc_state))
continue;
@@ -5751,9 +5749,8 @@ u8 intel_calc_enabled_pipes(struct intel_atomic_state *state,
{
const struct intel_crtc_state *crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
if (crtc_state->hw.enable)
enabled_pipes |= BIT(crtc->pipe);
else
@@ -5768,9 +5765,8 @@ u8 intel_calc_active_pipes(struct intel_atomic_state *state,
{
const struct intel_crtc_state *crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
if (crtc_state->hw.active)
active_pipes |= BIT(crtc->pipe);
else
@@ -5841,9 +5837,8 @@ static int intel_atomic_check_crtcs(struct intel_atomic_state *state)
struct intel_display *display = to_intel_display(state);
struct intel_crtc_state __maybe_unused *crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
int ret;
ret = intel_crtc_atomic_check(state, crtc);
@@ -5863,9 +5858,8 @@ static bool intel_cpu_transcoders_need_modeset(struct intel_atomic_state *state,
{
const struct intel_crtc_state *new_crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
if (new_crtc_state->hw.enable &&
transcoders & BIT(new_crtc_state->cpu_transcoder) &&
intel_crtc_needs_modeset(new_crtc_state))
@@ -5880,9 +5874,8 @@ static bool intel_pipes_need_modeset(struct intel_atomic_state *state,
{
const struct intel_crtc_state *new_crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
if (new_crtc_state->hw.enable &&
pipes & BIT(crtc->pipe) &&
intel_crtc_needs_modeset(new_crtc_state))
@@ -6253,7 +6246,7 @@ static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state)
}
/* Now pull in all joined crtcs */
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
affected_pipes |= crtc_state->joiner_pipes;
if (intel_crtc_needs_modeset(crtc_state))
modeset_pipes |= crtc_state->joiner_pipes;
@@ -6281,7 +6274,7 @@ static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state)
return ret;
}
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
/* Kill old joiner link, we may re-establish afterwards */
if (intel_crtc_needs_modeset(crtc_state) &&
intel_crtc_is_joiner_primary(crtc_state))
@@ -6299,7 +6292,6 @@ static int intel_atomic_check_config(struct intel_atomic_state *state,
struct intel_crtc_state *new_crtc_state;
struct intel_crtc *crtc;
int ret;
- int i;
*failed_pipe = INVALID_PIPE;
@@ -6311,7 +6303,7 @@ static int intel_atomic_check_config(struct intel_atomic_state *state,
if (ret)
return ret;
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
if (!intel_crtc_needs_modeset(new_crtc_state)) {
if (!intel_crtc_is_joiner_secondary(new_crtc_state))
intel_crtc_copy_uapi_to_hw_state_nomodeset(state, crtc);
@@ -6333,7 +6325,7 @@ static int intel_atomic_check_config(struct intel_atomic_state *state,
goto fail;
}
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
if (!intel_crtc_needs_modeset(new_crtc_state))
continue;
@@ -6405,13 +6397,12 @@ int intel_atomic_check(struct drm_device *dev,
struct intel_atomic_state *state = to_intel_atomic_state(_state);
struct intel_crtc_state *old_crtc_state, *new_crtc_state;
struct intel_crtc *crtc;
- int ret, i;
+ int ret;
if (!intel_display_driver_check_access(display))
return -ENODEV;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
/*
* crtc's state no longer considered to be inherited
* after the first userspace/client initiated commit.
@@ -6437,7 +6428,7 @@ int intel_atomic_check(struct drm_device *dev,
if (ret)
goto fail;
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
ret = intel_async_flip_check_uapi(state, crtc);
if (ret)
return ret;
@@ -6447,7 +6438,7 @@ int intel_atomic_check(struct drm_device *dev,
if (ret)
goto fail;
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
if (!intel_crtc_needs_modeset(new_crtc_state)) {
if (intel_crtc_is_joiner_secondary(new_crtc_state))
copy_joiner_crtc_state_nomodeset(state, crtc);
@@ -6464,8 +6455,7 @@ int intel_atomic_check(struct drm_device *dev,
goto fail;
}
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
if (!intel_crtc_needs_modeset(new_crtc_state))
continue;
@@ -6485,7 +6475,7 @@ int intel_atomic_check(struct drm_device *dev,
* needs a full modeset, all other synced crtcs should be
* forced a full modeset.
*/
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
if (!new_crtc_state->hw.enable || intel_crtc_needs_modeset(new_crtc_state))
continue;
@@ -6515,8 +6505,7 @@ int intel_atomic_check(struct drm_device *dev,
}
}
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
if (!intel_crtc_needs_modeset(new_crtc_state))
continue;
@@ -6533,7 +6522,7 @@ int intel_atomic_check(struct drm_device *dev,
if (ret)
goto fail;
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
new_crtc_state->min_cdclk = intel_crtc_min_cdclk(new_crtc_state);
ret = intel_compute_global_watermarks(state);
@@ -6566,8 +6555,7 @@ int intel_atomic_check(struct drm_device *dev,
if (ret)
goto fail;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
intel_color_assert_luts(new_crtc_state);
ret = intel_async_flip_check_hw(state, crtc);
@@ -6598,8 +6586,7 @@ int intel_atomic_check(struct drm_device *dev,
* FIXME would probably be nice to know which crtc specifically
* caused the failure, in cases where we can pinpoint it.
*/
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i)
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state)
intel_crtc_state_dump(new_crtc_state, state, "failed");
return ret;
@@ -6915,10 +6902,8 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
const struct intel_crtc_state *new_crtc_state, *old_crtc_state;
struct intel_crtc *crtc;
u8 disable_pipes = 0;
- int i;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
if (!intel_crtc_needs_modeset(new_crtc_state))
continue;
@@ -6934,7 +6919,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
disable_pipes |= BIT(crtc->pipe);
}
- for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) {
+ for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state) {
if ((disable_pipes & BIT(crtc->pipe)) == 0)
continue;
@@ -6944,7 +6929,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
}
/* Only disable port sync and MST slaves */
- for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) {
+ for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state) {
if ((disable_pipes & BIT(crtc->pipe)) == 0)
continue;
@@ -6966,7 +6951,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
}
/* Disable everything else left on */
- for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) {
+ for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state) {
if ((disable_pipes & BIT(crtc->pipe)) == 0)
continue;
@@ -6985,9 +6970,8 @@ static void intel_commit_modeset_enables(struct intel_atomic_state *state)
{
struct intel_crtc_state *new_crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
if (!new_crtc_state->hw.active)
continue;
@@ -6995,7 +6979,7 @@ static void intel_commit_modeset_enables(struct intel_atomic_state *state)
intel_pre_update_crtc(state, crtc);
}
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
if (!new_crtc_state->hw.active)
continue;
@@ -7010,9 +6994,8 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
struct intel_crtc_state *old_crtc_state, *new_crtc_state;
struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
u8 update_pipes = 0, modeset_pipes = 0;
- int i;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
enum pipe pipe = crtc->pipe;
if (!new_crtc_state->hw.active)
@@ -7036,7 +7019,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
* So first lets enable all pipes that do not need a fullmodeset as
* those don't have any external dependency.
*/
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
enum pipe pipe = crtc->pipe;
if ((update_pipes & BIT(pipe)) == 0)
@@ -7052,8 +7035,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
* Commit in reverse order to make joiner primary
* send the uapi events after secondaries are done.
*/
- for_each_oldnew_intel_crtc_in_state_reverse(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state_reverse(state, crtc, old_crtc_state, new_crtc_state) {
enum pipe pipe = crtc->pipe;
if ((update_pipes & BIT(pipe)) == 0)
@@ -7089,7 +7071,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
* Enable all pipes that needs a modeset and do not depends on other
* pipes
*/
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
enum pipe pipe = crtc->pipe;
if ((modeset_pipes & BIT(pipe)) == 0)
@@ -7111,7 +7093,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
* Then we enable all remaining pipes that depend on other
* pipes: MST slaves and port sync masters
*/
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
enum pipe pipe = crtc->pipe;
if ((modeset_pipes & BIT(pipe)) == 0)
@@ -7128,7 +7110,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
/*
* Finally we do the plane updates/etc. for all pipes that got enabled.
*/
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
enum pipe pipe = crtc->pipe;
if ((update_pipes & BIT(pipe)) == 0)
@@ -7141,7 +7123,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
* Commit in reverse order to make joiner primary
* send the uapi events after secondaries are done.
*/
- for_each_new_intel_crtc_in_state_reverse(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state_reverse(state, crtc, new_crtc_state) {
enum pipe pipe = crtc->pipe;
if ((update_pipes & BIT(pipe)) == 0)
@@ -7206,9 +7188,8 @@ static void intel_atomic_cleanup_work(struct work_struct *work)
struct intel_display *display = to_intel_display(state);
struct intel_crtc_state *old_crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i)
+ for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state)
intel_atomic_dsb_cleanup(old_crtc_state);
drm_atomic_helper_cleanup_planes(display->drm, &state->base);
@@ -7438,9 +7419,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
struct intel_crtc *crtc;
struct intel_power_domain_mask put_domains[I915_MAX_PIPES] = {};
struct ref_tracker *wakeref = NULL;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
intel_atomic_dsb_prepare(state, crtc);
intel_atomic_commit_fence_wait(state);
@@ -7449,10 +7429,10 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
intel_atomic_prepare_plane_clear_colors(state);
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
intel_fbc_prepare_dirty_rect(state, crtc);
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
intel_atomic_dsb_finish(state, crtc);
drm_atomic_helper_wait_for_dependencies(&state->base);
@@ -7488,8 +7468,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
*/
wakeref = intel_display_power_get(display, POWER_DOMAIN_DC_OFF);
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
if (intel_crtc_needs_modeset(new_crtc_state) ||
intel_crtc_needs_fastset(new_crtc_state))
intel_modeset_get_crtc_power_domains(new_crtc_state, &put_domains[crtc->pipe]);
@@ -7500,7 +7479,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
intel_dp_tunnel_atomic_alloc_bw(state);
/* FIXME: Eventually get rid of our crtc->config pointer */
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
crtc->config = new_crtc_state;
/*
@@ -7522,7 +7501,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
intel_sagv_pre_plane_update(state);
/* Complete the events for pipes that have now been disabled */
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
bool modeset = intel_crtc_needs_modeset(new_crtc_state);
/* Complete events for now disable pipes here. */
@@ -7540,7 +7519,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
intel_dbuf_pre_plane_update(state);
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
if (new_crtc_state->do_async_flip)
intel_crtc_enable_flip_done(state, crtc);
}
@@ -7564,7 +7543,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
*/
drm_atomic_helper_wait_for_flip_done(display->drm, &state->base);
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
if (new_crtc_state->do_async_flip)
intel_crtc_disable_flip_done(state, crtc);
@@ -7584,8 +7563,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
*
* TODO: Move this (and other cleanup) to an async worker eventually.
*/
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
/*
* Gen2 reports pipe underruns whenever all planes are disabled.
* So re-enable underrun reporting after some planes get enabled.
@@ -7602,7 +7580,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
intel_dbuf_post_plane_update(state);
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
intel_post_plane_update(state, crtc);
intel_modeset_put_crtc_power_domains(crtc, &put_domains[crtc->pipe]);
@@ -7746,9 +7724,8 @@ int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_commit *_state
if (DISPLAY_VER(display) < 9 && state->base.legacy_cursor_update) {
struct intel_crtc_state *new_crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
if (new_crtc_state->wm.need_postvbl_update ||
new_crtc_state->update_wm_post)
state->base.legacy_cursor_update = false;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index a3e0def4adb0..7d4f83ad9412 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -287,31 +287,26 @@ enum phy_fia {
(__i)++) \
for_each_if(plane)
-#define for_each_old_intel_crtc_in_state(__state, crtc, old_crtc_state, __i) \
+#define for_each_old_intel_crtc_in_state(__state, crtc, old_crtc_state) \
for_each_intel_crtc(to_intel_display(__state), (crtc)) \
- for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
- (old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc))))
+ for_each_if((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)))
-#define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state, __i) \
+#define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state) \
for_each_intel_crtc(to_intel_display(__state), (crtc)) \
- for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
- (new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
+ for_each_if((new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc)))
-#define for_each_new_intel_crtc_in_state_reverse(__state, crtc, new_crtc_state, __i) \
+#define for_each_new_intel_crtc_in_state_reverse(__state, crtc, new_crtc_state) \
for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
- for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
- (new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
+ for_each_if((new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc)))
-#define for_each_oldnew_intel_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state, __i) \
+#define for_each_oldnew_intel_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state) \
for_each_intel_crtc(to_intel_display(__state), (crtc)) \
- for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
- (old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
+ for_each_if(((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
(new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
-#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state) \
for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
- for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
- (old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
+ for_each_if(((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
(new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
#define intel_atomic_crtc_state_for_each_plane_state( \
diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
index 10d47faa6996..d6bd1f7e01e1 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
@@ -740,9 +740,8 @@ static void atomic_decrease_bw(struct intel_atomic_state *state)
struct intel_crtc *crtc;
const struct intel_crtc_state *old_crtc_state;
const struct intel_crtc_state *new_crtc_state;
- int i;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
const struct drm_dp_tunnel_state *new_tunnel_state;
struct drm_dp_tunnel *tunnel;
int old_bw;
@@ -795,9 +794,8 @@ static void atomic_increase_bw(struct intel_atomic_state *state)
{
struct intel_crtc *crtc;
const struct intel_crtc_state *crtc_state;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
struct drm_dp_tunnel_state *tunnel_state;
struct drm_dp_tunnel *tunnel = crtc_state->dp_tunnel_ref.tunnel;
int bw;
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index cd4c38691aed..8c377d9af436 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -368,9 +368,8 @@ int intel_fdi_atomic_check_link(struct intel_atomic_state *state,
{
struct intel_crtc *crtc;
struct intel_crtc_state *crtc_state;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
int ret;
if (!crtc_state->has_pch_encoder ||
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index e191a57f02cd..2a52b36c646c 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -1831,9 +1831,8 @@ static int intel_add_affected_planes(struct intel_atomic_state *state)
{
const struct intel_crtc_state *crtc_state;
struct intel_crtc *crtc;
- int i;
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
int ret;
ret = intel_joiner_add_affected_planes(state, intel_crtc_joined_pipe_mask(crtc_state));
@@ -1867,8 +1866,7 @@ int intel_plane_atomic_check(struct intel_atomic_state *state)
}
}
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
u8 old_active_planes, new_active_planes;
ret = icl_check_nv12_planes(state, crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c b/drivers/gpu/drm/i915/display/intel_pmdemand.c
index 7819b724795b..6d32c52269a6 100644
--- a/drivers/gpu/drm/i915/display/intel_pmdemand.c
+++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c
@@ -190,7 +190,7 @@ intel_pmdemand_update_max_ddiclk(struct intel_display *display,
struct intel_crtc *crtc;
int i;
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
intel_pmdemand_update_port_clock(display, pmdemand_state,
crtc->pipe,
new_crtc_state->port_clock);
@@ -299,7 +299,6 @@ static bool intel_pmdemand_needs_update(struct intel_atomic_state *state)
{
const struct intel_crtc_state *new_crtc_state, *old_crtc_state;
struct intel_crtc *crtc;
- int i;
if (intel_bw_pmdemand_needs_update(state))
return true;
@@ -310,8 +309,7 @@ static bool intel_pmdemand_needs_update(struct intel_atomic_state *state)
if (intel_cdclk_pmdemand_needs_update(state))
return true;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i)
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state)
if (new_crtc_state->port_clock != old_crtc_state->port_clock)
return true;
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 1b09992ce9fd..e03b5daac5be 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -94,12 +94,10 @@ bool intel_vrr_possible(const struct intel_crtc_state *crtc_state)
void
intel_vrr_check_modeset(struct intel_atomic_state *state)
{
- int i;
struct intel_crtc_state *old_crtc_state, *new_crtc_state;
struct intel_crtc *crtc;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
if (new_crtc_state->uapi.vrr_enabled !=
old_crtc_state->uapi.vrr_enabled)
new_crtc_state->uapi.mode_changed = true;
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 346e97d91d92..5a3677ea25b0 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2495,9 +2495,9 @@ skl_compute_ddb(struct intel_atomic_state *state)
struct intel_dbuf_state *new_dbuf_state = NULL;
struct intel_crtc_state *new_crtc_state;
struct intel_crtc *crtc;
- int ret, i;
+ int ret;
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
new_dbuf_state = intel_atomic_get_dbuf_state(state);
if (IS_ERR(new_dbuf_state))
return PTR_ERR(new_dbuf_state);
@@ -2561,7 +2561,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
str_yes_no(new_dbuf_state->joined_mbus));
}
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
enum pipe pipe = crtc->pipe;
new_dbuf_state->weight[pipe] = intel_crtc_ddb_weight(new_crtc_state);
@@ -2580,7 +2580,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
return ret;
}
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
ret = skl_crtc_allocate_plane_ddb(state, crtc);
if (ret)
return ret;
@@ -2687,13 +2687,11 @@ skl_print_wm_changes(struct intel_atomic_state *state)
const struct intel_crtc_state *new_crtc_state;
struct intel_plane *plane;
struct intel_crtc *crtc;
- int i;
if (!drm_debug_enabled(DRM_UT_KMS))
return;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
const struct skl_pipe_wm *old_pipe_wm, *new_pipe_wm;
old_pipe_wm = &old_crtc_state->wm.skl.optimal;
@@ -2833,13 +2831,13 @@ static int pkgc_max_linetime(struct intel_atomic_state *state)
struct intel_display *display = to_intel_display(state);
const struct intel_crtc_state *crtc_state;
struct intel_crtc *crtc;
- int i, max_linetime;
+ int max_linetime;
/*
* Apparenty the hardware uses WM_LINETIME internally for
* this stuff, compute everything based on that.
*/
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
display->pkgc.disable[crtc->pipe] = crtc_state->vrr.enable;
display->pkgc.linetime[crtc->pipe] = DIV_ROUND_UP(crtc_state->linetime, 8);
}
@@ -2909,9 +2907,9 @@ skl_compute_wm(struct intel_atomic_state *state)
struct intel_display *display = to_intel_display(state);
struct intel_crtc *crtc;
struct intel_crtc_state __maybe_unused *new_crtc_state;
- int ret, i;
+ int ret;
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
ret = skl_build_pipe_wm(state, crtc);
if (ret)
return ret;
@@ -2926,7 +2924,7 @@ skl_compute_wm(struct intel_atomic_state *state)
* based on how much ddb is available. Now we can actually
* check if the final watermarks changed.
*/
- for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
struct skl_pipe_wm *pipe_wm = &new_crtc_state->wm.skl.optimal;
/*
--
2.47.3
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [RESEND 6/6] drm/i915/display: stop passing i to for_each_pipe_crtc_modeset_{enable, disable}()
2026-05-13 7:58 [RESEND 0/6] drm/i915: crtc iteration cleanups Jani Nikula
` (4 preceding siblings ...)
2026-05-13 7:58 ` [RESEND 5/6] drm/i915/display: stop passing i to for_each_*_intel_crtc_in_state() macros Jani Nikula
@ 2026-05-13 7:58 ` Jani Nikula
2026-05-13 12:23 ` Ville Syrjälä
2026-05-13 8:05 ` ✗ CI.checkpatch: warning for drm/i915: crtc iteration cleanups (rev2) Patchwork
` (2 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Jani Nikula @ 2026-05-13 7:58 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Refactor for_each_pipe_crtc_modeset_{enable,disable}() and their
underlying for_each_crtc_in_masks{,_reverse}() helpers to utilize
__UNIQUE_ID() to avoid having to pass the for loop variable to them.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 8 ++----
drivers/gpu/drm/i915/display/intel_display.c | 12 ++++----
drivers/gpu/drm/i915/display/intel_display.h | 30 ++++++++++----------
drivers/gpu/drm/i915/display/intel_dp_mst.c | 9 +++---
4 files changed, 27 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 34e2b5ea9d0d..1d4bb59a0501 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3230,9 +3230,8 @@ static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state *state,
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
struct intel_crtc *pipe_crtc;
bool is_hdmi = intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI);
- int i;
- for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
+ for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
const struct intel_crtc_state *old_pipe_crtc_state =
intel_atomic_get_old_crtc_state(state, pipe_crtc);
@@ -3259,7 +3258,7 @@ static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state *state,
intel_ddi_disable_transcoder_func(old_crtc_state);
- for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
+ for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
const struct intel_crtc_state *old_pipe_crtc_state =
intel_atomic_get_old_crtc_state(state, pipe_crtc);
@@ -3516,7 +3515,6 @@ static void intel_ddi_enable(struct intel_atomic_state *state,
struct intel_crtc *pipe_crtc;
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
bool is_hdmi = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI);
- int i;
/* 128b/132b SST */
if (!is_hdmi && intel_dp_is_uhbr(crtc_state)) {
@@ -3550,7 +3548,7 @@ static void intel_ddi_enable(struct intel_atomic_state *state,
intel_ddi_wait_for_fec_status(encoder, crtc_state, true);
- for_each_pipe_crtc_modeset_enable(display, pipe_crtc, crtc_state, i) {
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, crtc_state) {
const struct intel_crtc_state *pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index cf9afc90e301..ce5a3d5dbb79 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1653,11 +1653,10 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
struct intel_crtc *pipe_crtc;
- int i;
if (drm_WARN_ON(display->drm, crtc->active))
return;
- for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state) {
const struct intel_crtc_state *new_pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
@@ -1671,7 +1670,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
intel_encoders_pre_enable(state, crtc);
- for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state) {
const struct intel_crtc_state *pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
@@ -1689,7 +1688,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
if (!transcoder_is_dsi(cpu_transcoder))
hsw_configure_cpu_transcoder(new_crtc_state);
- for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state) {
const struct intel_crtc_state *pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
@@ -1719,7 +1718,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
intel_encoders_enable(state, crtc);
- for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state) {
const struct intel_crtc_state *pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
enum pipe hsw_workaround_pipe;
@@ -1787,7 +1786,6 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
struct intel_crtc *pipe_crtc;
- int i;
/*
* FIXME collapse everything to one hook.
@@ -1800,7 +1798,7 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
intel_encoders_post_pll_disable(state, crtc);
- for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
+ for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
const struct intel_crtc_state *old_pipe_crtc_state =
intel_atomic_get_old_crtc_state(state, pipe_crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 7d4f83ad9412..31588011d659 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -325,29 +325,29 @@ enum phy_fia {
((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
(new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))
-#define for_each_crtc_in_masks(display, crtc, first_pipes, second_pipes, i) \
- for ((i) = 0; \
+#define __for_each_crtc_in_masks(display, crtc, first_pipes, second_pipes, i) \
+ for (int (i) = 0; \
(i) < (I915_MAX_PIPES * 2) && ((crtc) = intel_crtc_for_pipe(display, (i) % I915_MAX_PIPES), 1); \
(i)++) \
for_each_if((crtc) && ((first_pipes) | ((second_pipes) << I915_MAX_PIPES)) & BIT(i))
-#define for_each_crtc_in_masks_reverse(display, crtc, first_pipes, second_pipes, i) \
- for ((i) = (I915_MAX_PIPES * 2 - 1); \
+#define __for_each_crtc_in_masks_reverse(display, crtc, first_pipes, second_pipes, i) \
+ for (int (i) = (I915_MAX_PIPES * 2 - 1); \
(i) >= 0 && ((crtc) = intel_crtc_for_pipe(display, (i) % I915_MAX_PIPES), 1); \
(i)--) \
for_each_if((crtc) && ((first_pipes) | ((second_pipes) << I915_MAX_PIPES)) & BIT(i))
-#define for_each_pipe_crtc_modeset_disable(display, crtc, crtc_state, i) \
- for_each_crtc_in_masks(display, crtc, \
- _intel_modeset_primary_pipes(crtc_state), \
- _intel_modeset_secondary_pipes(crtc_state), \
- i)
-
-#define for_each_pipe_crtc_modeset_enable(display, crtc, crtc_state, i) \
- for_each_crtc_in_masks_reverse(display, crtc, \
- _intel_modeset_primary_pipes(crtc_state), \
- _intel_modeset_secondary_pipes(crtc_state), \
- i)
+#define for_each_pipe_crtc_modeset_disable(display, crtc, crtc_state) \
+ __for_each_crtc_in_masks(display, crtc, \
+ _intel_modeset_primary_pipes(crtc_state), \
+ _intel_modeset_secondary_pipes(crtc_state), \
+ __UNIQUE_ID(i))
+
+#define for_each_pipe_crtc_modeset_enable(display, crtc, crtc_state) \
+ __for_each_crtc_in_masks_reverse(display, crtc, \
+ _intel_modeset_primary_pipes(crtc_state), \
+ _intel_modeset_secondary_pipes(crtc_state), \
+ __UNIQUE_ID(i))
int intel_atomic_check(struct drm_device *dev, struct drm_atomic_commit *state);
u8 intel_calc_enabled_pipes(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index be8febe3d234..724d3ee23350 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1065,14 +1065,13 @@ static void mst_stream_post_disable(struct intel_atomic_state *state,
drm_atomic_get_mst_payload_state(new_mst_state, connector->mst.port);
struct intel_crtc *pipe_crtc;
bool last_mst_stream;
- int i;
last_mst_stream = intel_dp_mst_dec_active_streams(intel_dp);
drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 12 && last_mst_stream &&
!intel_dp_mst_is_master_trans(old_crtc_state));
- for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
+ for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
const struct intel_crtc_state *old_pipe_crtc_state =
intel_atomic_get_old_crtc_state(state, pipe_crtc);
@@ -1099,7 +1098,7 @@ static void mst_stream_post_disable(struct intel_atomic_state *state,
intel_ddi_disable_transcoder_func(old_crtc_state);
- for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
+ for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
const struct intel_crtc_state *old_pipe_crtc_state =
intel_atomic_get_old_crtc_state(state, pipe_crtc);
@@ -1310,7 +1309,7 @@ static void mst_stream_enable(struct intel_atomic_state *state,
enum transcoder trans = pipe_config->cpu_transcoder;
bool first_mst_stream = intel_dp_mst_active_streams(intel_dp) == 1;
struct intel_crtc *pipe_crtc;
- int ret, i;
+ int ret;
drm_WARN_ON(display->drm, pipe_config->has_pch_encoder);
@@ -1355,7 +1354,7 @@ static void mst_stream_enable(struct intel_atomic_state *state,
intel_enable_transcoder(pipe_config);
- for_each_pipe_crtc_modeset_enable(display, pipe_crtc, pipe_config, i) {
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, pipe_config) {
const struct intel_crtc_state *pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
--
2.47.3
^ permalink raw reply related [flat|nested] 17+ messages in thread
* ✗ CI.checkpatch: warning for drm/i915: crtc iteration cleanups (rev2)
2026-05-13 7:58 [RESEND 0/6] drm/i915: crtc iteration cleanups Jani Nikula
` (5 preceding siblings ...)
2026-05-13 7:58 ` [RESEND 6/6] drm/i915/display: stop passing i to for_each_pipe_crtc_modeset_{enable, disable}() Jani Nikula
@ 2026-05-13 8:05 ` Patchwork
2026-05-13 8:07 ` ✓ CI.KUnit: success " Patchwork
2026-05-13 9:46 ` ✓ Xe.CI.BAT: " Patchwork
8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-05-13 8:05 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915: crtc iteration cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/165524/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit f463751a39fa1d10178fe45104ecaf32cf82d0e7
Author: Jani Nikula <jani.nikula@intel.com>
Date: Wed May 13 10:58:40 2026 +0300
drm/i915/display: stop passing i to for_each_pipe_crtc_modeset_{enable, disable}()
Refactor for_each_pipe_crtc_modeset_{enable,disable}() and their
underlying for_each_crtc_in_masks{,_reverse}() helpers to utilize
__UNIQUE_ID() to avoid having to pass the for loop variable to them.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch 434cb4b7f013cfce5ffd936d2a8a4daf0ef53d50 drm-intel
31e1fb3e801c drm/{i915, xe}: move xe_display_flush_cleanup_work() to i915 display
82467de221eb drm/i915/display: switch from drm_for_each_crtc() to for_each_intel_crtc()
ae571af1078a drm/i915/display: always pass display->drm to for_each_intel_crtc*()
99c6f078e5a2 drm/i915/display: pass struct intel_display to all for_each_intel_crtc*() macros
-:396: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#396: FILE: drivers/gpu/drm/i915/display/intel_display.h:225:
+#define for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) \
+ for_each_intel_crtc((display), (crtc)) \
for_each_if((pipe_mask) & BIT((crtc)->pipe))
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:396: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects?
#396: FILE: drivers/gpu/drm/i915/display/intel_display.h:225:
+#define for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) \
+ for_each_intel_crtc((display), (crtc)) \
for_each_if((pipe_mask) & BIT((crtc)->pipe))
-:402: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#402: FILE: drivers/gpu/drm/i915/display/intel_display.h:229:
+#define for_each_intel_crtc_in_pipe_mask_reverse(display, crtc, pipe_mask) \
+ for_each_intel_crtc_reverse((display), (crtc)) \
for_each_if((pipe_mask) & BIT((crtc)->pipe))
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:402: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects?
#402: FILE: drivers/gpu/drm/i915/display/intel_display.h:229:
+#define for_each_intel_crtc_in_pipe_mask_reverse(display, crtc, pipe_mask) \
+ for_each_intel_crtc_reverse((display), (crtc)) \
for_each_if((pipe_mask) & BIT((crtc)->pipe))
-:494: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (27, 35)
#494: FILE: drivers/gpu/drm/i915/display/intel_display_trace.h:87:
+ for_each_intel_crtc(display, it__) {
__entry->frame[it__->pipe] = intel_crtc_get_vblank_counter(it__);
-:503: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (27, 35)
#503: FILE: drivers/gpu/drm/i915/display/intel_display_trace.h:117:
+ for_each_intel_crtc(display, it__) {
__entry->frame[it__->pipe] = intel_crtc_get_vblank_counter(it__);
-:512: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (27, 35)
#512: FILE: drivers/gpu/drm/i915/display/intel_display_trace.h:247:
+ for_each_intel_crtc(display, crtc) {
__entry->frame[crtc->pipe] = intel_crtc_get_vblank_counter(crtc);
total: 2 errors, 3 warnings, 2 checks, 786 lines checked
15e028d8bc5e drm/i915/display: stop passing i to for_each_*_intel_crtc_in_state() macros
-:489: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#489: FILE: drivers/gpu/drm/i915/display/intel_display.c:7038:
+ for_each_oldnew_intel_crtc_in_state_reverse(state, crtc, old_crtc_state, new_crtc_state) {
-:649: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#649: FILE: drivers/gpu/drm/i915/display/intel_display.h:290:
+#define for_each_old_intel_crtc_in_state(__state, crtc, old_crtc_state) \
for_each_intel_crtc(to_intel_display(__state), (crtc)) \
+ for_each_if((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)))
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:649: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#649: FILE: drivers/gpu/drm/i915/display/intel_display.h:290:
+#define for_each_old_intel_crtc_in_state(__state, crtc, old_crtc_state) \
for_each_intel_crtc(to_intel_display(__state), (crtc)) \
+ for_each_if((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)))
-:649: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects?
#649: FILE: drivers/gpu/drm/i915/display/intel_display.h:290:
+#define for_each_old_intel_crtc_in_state(__state, crtc, old_crtc_state) \
for_each_intel_crtc(to_intel_display(__state), (crtc)) \
+ for_each_if((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)))
-:656: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#656: FILE: drivers/gpu/drm/i915/display/intel_display.h:294:
+#define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state) \
for_each_intel_crtc(to_intel_display(__state), (crtc)) \
+ for_each_if((new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc)))
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:656: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#656: FILE: drivers/gpu/drm/i915/display/intel_display.h:294:
+#define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state) \
for_each_intel_crtc(to_intel_display(__state), (crtc)) \
+ for_each_if((new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc)))
-:656: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects?
#656: FILE: drivers/gpu/drm/i915/display/intel_display.h:294:
+#define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state) \
for_each_intel_crtc(to_intel_display(__state), (crtc)) \
+ for_each_if((new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc)))
-:663: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#663: FILE: drivers/gpu/drm/i915/display/intel_display.h:298:
+#define for_each_new_intel_crtc_in_state_reverse(__state, crtc, new_crtc_state) \
for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
+ for_each_if((new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc)))
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:663: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#663: FILE: drivers/gpu/drm/i915/display/intel_display.h:298:
+#define for_each_new_intel_crtc_in_state_reverse(__state, crtc, new_crtc_state) \
for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
+ for_each_if((new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc)))
-:663: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects?
#663: FILE: drivers/gpu/drm/i915/display/intel_display.h:298:
+#define for_each_new_intel_crtc_in_state_reverse(__state, crtc, new_crtc_state) \
for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
+ for_each_if((new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc)))
-:670: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#670: FILE: drivers/gpu/drm/i915/display/intel_display.h:302:
+#define for_each_oldnew_intel_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state) \
for_each_intel_crtc(to_intel_display(__state), (crtc)) \
+ for_each_if(((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
(new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:670: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#670: FILE: drivers/gpu/drm/i915/display/intel_display.h:302:
+#define for_each_oldnew_intel_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state) \
for_each_intel_crtc(to_intel_display(__state), (crtc)) \
+ for_each_if(((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
(new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
-:670: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects?
#670: FILE: drivers/gpu/drm/i915/display/intel_display.h:302:
+#define for_each_oldnew_intel_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state) \
for_each_intel_crtc(to_intel_display(__state), (crtc)) \
+ for_each_if(((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
(new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
-:674: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#674: FILE: drivers/gpu/drm/i915/display/intel_display.h:304:
+ for_each_if(((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
-:678: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#678: FILE: drivers/gpu/drm/i915/display/intel_display.h:307:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state) \
for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
+ for_each_if(((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
(new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:678: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#678: FILE: drivers/gpu/drm/i915/display/intel_display.h:307:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state) \
for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
+ for_each_if(((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
(new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
-:678: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects?
#678: FILE: drivers/gpu/drm/i915/display/intel_display.h:307:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state) \
for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
+ for_each_if(((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
(new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
-:682: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#682: FILE: drivers/gpu/drm/i915/display/intel_display.h:309:
+ for_each_if(((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
total: 5 errors, 3 warnings, 10 checks, 745 lines checked
f463751a39fa drm/i915/display: stop passing i to for_each_pipe_crtc_modeset_{enable, disable}()
-:125: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects?
#125: FILE: drivers/gpu/drm/i915/display/intel_display.h:328:
+#define __for_each_crtc_in_masks(display, crtc, first_pipes, second_pipes, i) \
+ for (int (i) = 0; \
(i) < (I915_MAX_PIPES * 2) && ((crtc) = intel_crtc_for_pipe(display, (i) % I915_MAX_PIPES), 1); \
(i)++) \
for_each_if((crtc) && ((first_pipes) | ((second_pipes) << I915_MAX_PIPES)) & BIT(i))
-:125: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i' - possible side-effects?
#125: FILE: drivers/gpu/drm/i915/display/intel_display.h:328:
+#define __for_each_crtc_in_masks(display, crtc, first_pipes, second_pipes, i) \
+ for (int (i) = 0; \
(i) < (I915_MAX_PIPES * 2) && ((crtc) = intel_crtc_for_pipe(display, (i) % I915_MAX_PIPES), 1); \
(i)++) \
for_each_if((crtc) && ((first_pipes) | ((second_pipes) << I915_MAX_PIPES)) & BIT(i))
-:133: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects?
#133: FILE: drivers/gpu/drm/i915/display/intel_display.h:334:
+#define __for_each_crtc_in_masks_reverse(display, crtc, first_pipes, second_pipes, i) \
+ for (int (i) = (I915_MAX_PIPES * 2 - 1); \
(i) >= 0 && ((crtc) = intel_crtc_for_pipe(display, (i) % I915_MAX_PIPES), 1); \
(i)--) \
for_each_if((crtc) && ((first_pipes) | ((second_pipes) << I915_MAX_PIPES)) & BIT(i))
-:133: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i' - possible side-effects?
#133: FILE: drivers/gpu/drm/i915/display/intel_display.h:334:
+#define __for_each_crtc_in_masks_reverse(display, crtc, first_pipes, second_pipes, i) \
+ for (int (i) = (I915_MAX_PIPES * 2 - 1); \
(i) >= 0 && ((crtc) = intel_crtc_for_pipe(display, (i) % I915_MAX_PIPES), 1); \
(i)--) \
for_each_if((crtc) && ((first_pipes) | ((second_pipes) << I915_MAX_PIPES)) & BIT(i))
-:150: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc_state' - possible side-effects?
#150: FILE: drivers/gpu/drm/i915/display/intel_display.h:340:
+#define for_each_pipe_crtc_modeset_disable(display, crtc, crtc_state) \
+ __for_each_crtc_in_masks(display, crtc, \
+ _intel_modeset_primary_pipes(crtc_state), \
+ _intel_modeset_secondary_pipes(crtc_state), \
+ __UNIQUE_ID(i))
-:156: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc_state' - possible side-effects?
#156: FILE: drivers/gpu/drm/i915/display/intel_display.h:346:
+#define for_each_pipe_crtc_modeset_enable(display, crtc, crtc_state) \
+ __for_each_crtc_in_masks_reverse(display, crtc, \
+ _intel_modeset_primary_pipes(crtc_state), \
+ _intel_modeset_secondary_pipes(crtc_state), \
+ __UNIQUE_ID(i))
total: 0 errors, 0 warnings, 6 checks, 167 lines checked
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ CI.KUnit: success for drm/i915: crtc iteration cleanups (rev2)
2026-05-13 7:58 [RESEND 0/6] drm/i915: crtc iteration cleanups Jani Nikula
` (6 preceding siblings ...)
2026-05-13 8:05 ` ✗ CI.checkpatch: warning for drm/i915: crtc iteration cleanups (rev2) Patchwork
@ 2026-05-13 8:07 ` Patchwork
2026-05-13 9:46 ` ✓ Xe.CI.BAT: " Patchwork
8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-05-13 8:07 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915: crtc iteration cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/165524/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[08:05:34] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:05:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:06:09] Starting KUnit Kernel (1/1)...
[08:06:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:06:10] ================== guc_buf (11 subtests) ===================
[08:06:10] [PASSED] test_smallest
[08:06:10] [PASSED] test_largest
[08:06:10] [PASSED] test_granular
[08:06:10] [PASSED] test_unique
[08:06:10] [PASSED] test_overlap
[08:06:10] [PASSED] test_reusable
[08:06:10] [PASSED] test_too_big
[08:06:10] [PASSED] test_flush
[08:06:10] [PASSED] test_lookup
[08:06:10] [PASSED] test_data
[08:06:10] [PASSED] test_class
[08:06:10] ===================== [PASSED] guc_buf =====================
[08:06:10] =================== guc_dbm (7 subtests) ===================
[08:06:10] [PASSED] test_empty
[08:06:10] [PASSED] test_default
[08:06:10] ======================== test_size ========================
[08:06:10] [PASSED] 4
[08:06:10] [PASSED] 8
[08:06:10] [PASSED] 32
[08:06:10] [PASSED] 256
[08:06:10] ==================== [PASSED] test_size ====================
[08:06:10] ======================= test_reuse ========================
[08:06:10] [PASSED] 4
[08:06:10] [PASSED] 8
[08:06:10] [PASSED] 32
[08:06:10] [PASSED] 256
[08:06:10] =================== [PASSED] test_reuse ====================
[08:06:10] =================== test_range_overlap ====================
[08:06:10] [PASSED] 4
[08:06:10] [PASSED] 8
[08:06:10] [PASSED] 32
[08:06:10] [PASSED] 256
[08:06:10] =============== [PASSED] test_range_overlap ================
[08:06:10] =================== test_range_compact ====================
[08:06:10] [PASSED] 4
[08:06:10] [PASSED] 8
[08:06:10] [PASSED] 32
[08:06:10] [PASSED] 256
[08:06:10] =============== [PASSED] test_range_compact ================
[08:06:10] ==================== test_range_spare =====================
[08:06:10] [PASSED] 4
[08:06:10] [PASSED] 8
[08:06:10] [PASSED] 32
[08:06:10] [PASSED] 256
[08:06:10] ================ [PASSED] test_range_spare =================
[08:06:10] ===================== [PASSED] guc_dbm =====================
[08:06:10] =================== guc_idm (6 subtests) ===================
[08:06:10] [PASSED] bad_init
[08:06:10] [PASSED] no_init
[08:06:10] [PASSED] init_fini
[08:06:10] [PASSED] check_used
[08:06:10] [PASSED] check_quota
[08:06:10] [PASSED] check_all
[08:06:10] ===================== [PASSED] guc_idm =====================
[08:06:10] ================== no_relay (3 subtests) ===================
[08:06:10] [PASSED] xe_drops_guc2pf_if_not_ready
[08:06:10] [PASSED] xe_drops_guc2vf_if_not_ready
[08:06:10] [PASSED] xe_rejects_send_if_not_ready
[08:06:10] ==================== [PASSED] no_relay =====================
[08:06:10] ================== pf_relay (14 subtests) ==================
[08:06:10] [PASSED] pf_rejects_guc2pf_too_short
[08:06:10] [PASSED] pf_rejects_guc2pf_too_long
[08:06:10] [PASSED] pf_rejects_guc2pf_no_payload
[08:06:10] [PASSED] pf_fails_no_payload
[08:06:10] [PASSED] pf_fails_bad_origin
[08:06:10] [PASSED] pf_fails_bad_type
[08:06:10] [PASSED] pf_txn_reports_error
[08:06:10] [PASSED] pf_txn_sends_pf2guc
[08:06:10] [PASSED] pf_sends_pf2guc
[08:06:10] [SKIPPED] pf_loopback_nop
[08:06:10] [SKIPPED] pf_loopback_echo
[08:06:10] [SKIPPED] pf_loopback_fail
[08:06:10] [SKIPPED] pf_loopback_busy
[08:06:10] [SKIPPED] pf_loopback_retry
[08:06:10] ==================== [PASSED] pf_relay =====================
[08:06:10] ================== vf_relay (3 subtests) ===================
[08:06:10] [PASSED] vf_rejects_guc2vf_too_short
[08:06:10] [PASSED] vf_rejects_guc2vf_too_long
[08:06:10] [PASSED] vf_rejects_guc2vf_no_payload
[08:06:10] ==================== [PASSED] vf_relay =====================
[08:06:10] ================ pf_gt_config (9 subtests) =================
[08:06:10] [PASSED] fair_contexts_1vf
[08:06:10] [PASSED] fair_doorbells_1vf
[08:06:10] [PASSED] fair_ggtt_1vf
[08:06:10] ====================== fair_vram_1vf ======================
[08:06:10] [PASSED] 3.50 GiB
[08:06:10] [PASSED] 11.5 GiB
[08:06:10] [PASSED] 15.5 GiB
[08:06:10] [PASSED] 31.5 GiB
[08:06:10] [PASSED] 63.5 GiB
[08:06:10] [PASSED] 1.91 GiB
[08:06:10] ================== [PASSED] fair_vram_1vf ==================
[08:06:10] ================ fair_vram_1vf_admin_only =================
[08:06:10] [PASSED] 3.50 GiB
[08:06:10] [PASSED] 11.5 GiB
[08:06:10] [PASSED] 15.5 GiB
[08:06:10] [PASSED] 31.5 GiB
[08:06:10] [PASSED] 63.5 GiB
[08:06:10] [PASSED] 1.91 GiB
[08:06:10] ============ [PASSED] fair_vram_1vf_admin_only =============
[08:06:10] ====================== fair_contexts ======================
[08:06:10] [PASSED] 1 VF
[08:06:10] [PASSED] 2 VFs
[08:06:10] [PASSED] 3 VFs
[08:06:10] [PASSED] 4 VFs
[08:06:10] [PASSED] 5 VFs
[08:06:10] [PASSED] 6 VFs
[08:06:10] [PASSED] 7 VFs
[08:06:10] [PASSED] 8 VFs
[08:06:10] [PASSED] 9 VFs
[08:06:10] [PASSED] 10 VFs
[08:06:10] [PASSED] 11 VFs
[08:06:10] [PASSED] 12 VFs
[08:06:10] [PASSED] 13 VFs
[08:06:10] [PASSED] 14 VFs
[08:06:10] [PASSED] 15 VFs
[08:06:10] [PASSED] 16 VFs
[08:06:10] [PASSED] 17 VFs
[08:06:10] [PASSED] 18 VFs
[08:06:10] [PASSED] 19 VFs
[08:06:10] [PASSED] 20 VFs
[08:06:10] [PASSED] 21 VFs
[08:06:10] [PASSED] 22 VFs
[08:06:10] [PASSED] 23 VFs
[08:06:10] [PASSED] 24 VFs
[08:06:10] [PASSED] 25 VFs
[08:06:10] [PASSED] 26 VFs
[08:06:10] [PASSED] 27 VFs
[08:06:10] [PASSED] 28 VFs
[08:06:10] [PASSED] 29 VFs
[08:06:10] [PASSED] 30 VFs
[08:06:10] [PASSED] 31 VFs
[08:06:10] [PASSED] 32 VFs
[08:06:10] [PASSED] 33 VFs
[08:06:10] [PASSED] 34 VFs
[08:06:10] [PASSED] 35 VFs
[08:06:10] [PASSED] 36 VFs
[08:06:10] [PASSED] 37 VFs
[08:06:10] [PASSED] 38 VFs
[08:06:10] [PASSED] 39 VFs
[08:06:10] [PASSED] 40 VFs
[08:06:10] [PASSED] 41 VFs
[08:06:10] [PASSED] 42 VFs
[08:06:10] [PASSED] 43 VFs
[08:06:10] [PASSED] 44 VFs
[08:06:10] [PASSED] 45 VFs
[08:06:10] [PASSED] 46 VFs
[08:06:10] [PASSED] 47 VFs
[08:06:10] [PASSED] 48 VFs
[08:06:10] [PASSED] 49 VFs
[08:06:10] [PASSED] 50 VFs
[08:06:10] [PASSED] 51 VFs
[08:06:10] [PASSED] 52 VFs
[08:06:10] [PASSED] 53 VFs
[08:06:10] [PASSED] 54 VFs
[08:06:10] [PASSED] 55 VFs
[08:06:10] [PASSED] 56 VFs
[08:06:10] [PASSED] 57 VFs
[08:06:10] [PASSED] 58 VFs
[08:06:10] [PASSED] 59 VFs
[08:06:10] [PASSED] 60 VFs
[08:06:10] [PASSED] 61 VFs
[08:06:10] [PASSED] 62 VFs
[08:06:10] [PASSED] 63 VFs
[08:06:10] ================== [PASSED] fair_contexts ==================
[08:06:10] ===================== fair_doorbells ======================
[08:06:10] [PASSED] 1 VF
[08:06:10] [PASSED] 2 VFs
[08:06:10] [PASSED] 3 VFs
[08:06:10] [PASSED] 4 VFs
[08:06:10] [PASSED] 5 VFs
[08:06:10] [PASSED] 6 VFs
[08:06:10] [PASSED] 7 VFs
[08:06:10] [PASSED] 8 VFs
[08:06:10] [PASSED] 9 VFs
[08:06:10] [PASSED] 10 VFs
[08:06:10] [PASSED] 11 VFs
[08:06:10] [PASSED] 12 VFs
[08:06:10] [PASSED] 13 VFs
[08:06:10] [PASSED] 14 VFs
[08:06:10] [PASSED] 15 VFs
[08:06:10] [PASSED] 16 VFs
[08:06:10] [PASSED] 17 VFs
[08:06:10] [PASSED] 18 VFs
[08:06:10] [PASSED] 19 VFs
[08:06:10] [PASSED] 20 VFs
[08:06:10] [PASSED] 21 VFs
[08:06:10] [PASSED] 22 VFs
[08:06:10] [PASSED] 23 VFs
[08:06:10] [PASSED] 24 VFs
[08:06:10] [PASSED] 25 VFs
[08:06:10] [PASSED] 26 VFs
[08:06:10] [PASSED] 27 VFs
[08:06:10] [PASSED] 28 VFs
[08:06:10] [PASSED] 29 VFs
[08:06:10] [PASSED] 30 VFs
[08:06:10] [PASSED] 31 VFs
[08:06:10] [PASSED] 32 VFs
[08:06:10] [PASSED] 33 VFs
[08:06:10] [PASSED] 34 VFs
[08:06:10] [PASSED] 35 VFs
[08:06:10] [PASSED] 36 VFs
[08:06:10] [PASSED] 37 VFs
[08:06:10] [PASSED] 38 VFs
[08:06:10] [PASSED] 39 VFs
[08:06:10] [PASSED] 40 VFs
[08:06:10] [PASSED] 41 VFs
[08:06:10] [PASSED] 42 VFs
[08:06:10] [PASSED] 43 VFs
[08:06:10] [PASSED] 44 VFs
[08:06:10] [PASSED] 45 VFs
[08:06:10] [PASSED] 46 VFs
[08:06:10] [PASSED] 47 VFs
[08:06:10] [PASSED] 48 VFs
[08:06:10] [PASSED] 49 VFs
[08:06:10] [PASSED] 50 VFs
[08:06:10] [PASSED] 51 VFs
[08:06:10] [PASSED] 52 VFs
[08:06:10] [PASSED] 53 VFs
[08:06:10] [PASSED] 54 VFs
[08:06:10] [PASSED] 55 VFs
[08:06:10] [PASSED] 56 VFs
[08:06:10] [PASSED] 57 VFs
[08:06:10] [PASSED] 58 VFs
[08:06:10] [PASSED] 59 VFs
[08:06:10] [PASSED] 60 VFs
[08:06:10] [PASSED] 61 VFs
[08:06:10] [PASSED] 62 VFs
[08:06:10] [PASSED] 63 VFs
[08:06:10] ================= [PASSED] fair_doorbells ==================
[08:06:10] ======================== fair_ggtt ========================
[08:06:10] [PASSED] 1 VF
[08:06:10] [PASSED] 2 VFs
[08:06:10] [PASSED] 3 VFs
[08:06:10] [PASSED] 4 VFs
[08:06:10] [PASSED] 5 VFs
[08:06:10] [PASSED] 6 VFs
[08:06:10] [PASSED] 7 VFs
[08:06:10] [PASSED] 8 VFs
[08:06:10] [PASSED] 9 VFs
[08:06:10] [PASSED] 10 VFs
[08:06:10] [PASSED] 11 VFs
[08:06:10] [PASSED] 12 VFs
[08:06:10] [PASSED] 13 VFs
[08:06:10] [PASSED] 14 VFs
[08:06:10] [PASSED] 15 VFs
[08:06:10] [PASSED] 16 VFs
[08:06:10] [PASSED] 17 VFs
[08:06:10] [PASSED] 18 VFs
[08:06:10] [PASSED] 19 VFs
[08:06:10] [PASSED] 20 VFs
[08:06:10] [PASSED] 21 VFs
[08:06:10] [PASSED] 22 VFs
[08:06:10] [PASSED] 23 VFs
[08:06:10] [PASSED] 24 VFs
[08:06:10] [PASSED] 25 VFs
[08:06:10] [PASSED] 26 VFs
[08:06:10] [PASSED] 27 VFs
[08:06:10] [PASSED] 28 VFs
[08:06:10] [PASSED] 29 VFs
[08:06:10] [PASSED] 30 VFs
[08:06:10] [PASSED] 31 VFs
[08:06:10] [PASSED] 32 VFs
[08:06:10] [PASSED] 33 VFs
[08:06:10] [PASSED] 34 VFs
[08:06:10] [PASSED] 35 VFs
[08:06:10] [PASSED] 36 VFs
[08:06:10] [PASSED] 37 VFs
[08:06:10] [PASSED] 38 VFs
[08:06:10] [PASSED] 39 VFs
[08:06:10] [PASSED] 40 VFs
[08:06:10] [PASSED] 41 VFs
[08:06:10] [PASSED] 42 VFs
[08:06:10] [PASSED] 43 VFs
[08:06:10] [PASSED] 44 VFs
[08:06:10] [PASSED] 45 VFs
[08:06:10] [PASSED] 46 VFs
[08:06:10] [PASSED] 47 VFs
[08:06:10] [PASSED] 48 VFs
[08:06:10] [PASSED] 49 VFs
[08:06:10] [PASSED] 50 VFs
[08:06:10] [PASSED] 51 VFs
[08:06:10] [PASSED] 52 VFs
[08:06:10] [PASSED] 53 VFs
[08:06:10] [PASSED] 54 VFs
[08:06:10] [PASSED] 55 VFs
[08:06:10] [PASSED] 56 VFs
[08:06:10] [PASSED] 57 VFs
[08:06:10] [PASSED] 58 VFs
[08:06:10] [PASSED] 59 VFs
[08:06:10] [PASSED] 60 VFs
[08:06:10] [PASSED] 61 VFs
[08:06:10] [PASSED] 62 VFs
[08:06:10] [PASSED] 63 VFs
[08:06:10] ==================== [PASSED] fair_ggtt ====================
[08:06:10] ======================== fair_vram ========================
[08:06:10] [PASSED] 1 VF
[08:06:10] [PASSED] 2 VFs
[08:06:10] [PASSED] 3 VFs
[08:06:10] [PASSED] 4 VFs
[08:06:10] [PASSED] 5 VFs
[08:06:10] [PASSED] 6 VFs
[08:06:10] [PASSED] 7 VFs
[08:06:10] [PASSED] 8 VFs
[08:06:10] [PASSED] 9 VFs
[08:06:10] [PASSED] 10 VFs
[08:06:10] [PASSED] 11 VFs
[08:06:10] [PASSED] 12 VFs
[08:06:10] [PASSED] 13 VFs
[08:06:10] [PASSED] 14 VFs
[08:06:10] [PASSED] 15 VFs
[08:06:10] [PASSED] 16 VFs
[08:06:10] [PASSED] 17 VFs
[08:06:10] [PASSED] 18 VFs
[08:06:10] [PASSED] 19 VFs
[08:06:10] [PASSED] 20 VFs
[08:06:10] [PASSED] 21 VFs
[08:06:10] [PASSED] 22 VFs
[08:06:10] [PASSED] 23 VFs
[08:06:10] [PASSED] 24 VFs
[08:06:10] [PASSED] 25 VFs
[08:06:10] [PASSED] 26 VFs
[08:06:10] [PASSED] 27 VFs
[08:06:10] [PASSED] 28 VFs
[08:06:10] [PASSED] 29 VFs
[08:06:10] [PASSED] 30 VFs
[08:06:10] [PASSED] 31 VFs
[08:06:10] [PASSED] 32 VFs
[08:06:10] [PASSED] 33 VFs
[08:06:10] [PASSED] 34 VFs
[08:06:10] [PASSED] 35 VFs
[08:06:10] [PASSED] 36 VFs
[08:06:10] [PASSED] 37 VFs
[08:06:10] [PASSED] 38 VFs
[08:06:10] [PASSED] 39 VFs
[08:06:10] [PASSED] 40 VFs
[08:06:10] [PASSED] 41 VFs
[08:06:10] [PASSED] 42 VFs
[08:06:10] [PASSED] 43 VFs
[08:06:10] [PASSED] 44 VFs
[08:06:10] [PASSED] 45 VFs
[08:06:10] [PASSED] 46 VFs
[08:06:10] [PASSED] 47 VFs
[08:06:10] [PASSED] 48 VFs
[08:06:10] [PASSED] 49 VFs
[08:06:10] [PASSED] 50 VFs
[08:06:10] [PASSED] 51 VFs
[08:06:10] [PASSED] 52 VFs
[08:06:10] [PASSED] 53 VFs
[08:06:10] [PASSED] 54 VFs
[08:06:10] [PASSED] 55 VFs
[08:06:10] [PASSED] 56 VFs
[08:06:10] [PASSED] 57 VFs
[08:06:10] [PASSED] 58 VFs
[08:06:10] [PASSED] 59 VFs
[08:06:10] [PASSED] 60 VFs
[08:06:10] [PASSED] 61 VFs
[08:06:10] [PASSED] 62 VFs
[08:06:10] [PASSED] 63 VFs
[08:06:10] ==================== [PASSED] fair_vram ====================
[08:06:10] ================== [PASSED] pf_gt_config ===================
[08:06:10] ===================== lmtt (1 subtest) =====================
[08:06:10] ======================== test_ops =========================
[08:06:10] [PASSED] 2-level
[08:06:10] [PASSED] multi-level
[08:06:10] ==================== [PASSED] test_ops =====================
[08:06:10] ====================== [PASSED] lmtt =======================
[08:06:10] ================= pf_service (11 subtests) =================
[08:06:10] [PASSED] pf_negotiate_any
[08:06:10] [PASSED] pf_negotiate_base_match
[08:06:10] [PASSED] pf_negotiate_base_newer
[08:06:10] [PASSED] pf_negotiate_base_next
[08:06:10] [SKIPPED] pf_negotiate_base_older
[08:06:10] [PASSED] pf_negotiate_base_prev
[08:06:10] [PASSED] pf_negotiate_latest_match
[08:06:10] [PASSED] pf_negotiate_latest_newer
[08:06:10] [PASSED] pf_negotiate_latest_next
[08:06:10] [SKIPPED] pf_negotiate_latest_older
[08:06:10] [SKIPPED] pf_negotiate_latest_prev
[08:06:10] =================== [PASSED] pf_service ====================
[08:06:10] ================= xe_guc_g2g (2 subtests) ==================
[08:06:10] ============== xe_live_guc_g2g_kunit_default ==============
[08:06:10] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[08:06:10] ============== xe_live_guc_g2g_kunit_allmem ===============
[08:06:10] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[08:06:10] =================== [SKIPPED] xe_guc_g2g ===================
[08:06:10] =================== xe_mocs (2 subtests) ===================
[08:06:10] ================ xe_live_mocs_kernel_kunit ================
[08:06:10] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[08:06:10] ================ xe_live_mocs_reset_kunit =================
[08:06:10] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[08:06:10] ==================== [SKIPPED] xe_mocs =====================
[08:06:10] ================= xe_migrate (2 subtests) ==================
[08:06:10] ================= xe_migrate_sanity_kunit =================
[08:06:10] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[08:06:10] ================== xe_validate_ccs_kunit ==================
[08:06:10] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[08:06:10] =================== [SKIPPED] xe_migrate ===================
[08:06:10] ================== xe_dma_buf (1 subtest) ==================
[08:06:10] ==================== xe_dma_buf_kunit =====================
[08:06:10] ================ [SKIPPED] xe_dma_buf_kunit ================
[08:06:10] =================== [SKIPPED] xe_dma_buf ===================
[08:06:10] ================= xe_bo_shrink (1 subtest) =================
[08:06:10] =================== xe_bo_shrink_kunit ====================
[08:06:10] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[08:06:10] ================== [SKIPPED] xe_bo_shrink ==================
[08:06:10] ==================== xe_bo (2 subtests) ====================
[08:06:10] ================== xe_ccs_migrate_kunit ===================
[08:06:10] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[08:06:10] ==================== xe_bo_evict_kunit ====================
[08:06:10] =============== [SKIPPED] xe_bo_evict_kunit ================
[08:06:10] ===================== [SKIPPED] xe_bo ======================
[08:06:10] ==================== args (13 subtests) ====================
[08:06:10] [PASSED] count_args_test
[08:06:10] [PASSED] call_args_example
[08:06:10] [PASSED] call_args_test
[08:06:10] [PASSED] drop_first_arg_example
[08:06:10] [PASSED] drop_first_arg_test
[08:06:10] [PASSED] first_arg_example
[08:06:10] [PASSED] first_arg_test
[08:06:10] [PASSED] last_arg_example
[08:06:10] [PASSED] last_arg_test
[08:06:10] [PASSED] pick_arg_example
[08:06:10] [PASSED] if_args_example
[08:06:10] [PASSED] if_args_test
[08:06:10] [PASSED] sep_comma_example
[08:06:10] ====================== [PASSED] args =======================
[08:06:10] =================== xe_pci (3 subtests) ====================
[08:06:10] ==================== check_graphics_ip ====================
[08:06:10] [PASSED] 12.00 Xe_LP
[08:06:10] [PASSED] 12.10 Xe_LP+
[08:06:10] [PASSED] 12.55 Xe_HPG
[08:06:10] [PASSED] 12.60 Xe_HPC
[08:06:10] [PASSED] 12.70 Xe_LPG
[08:06:10] [PASSED] 12.71 Xe_LPG
[08:06:10] [PASSED] 12.74 Xe_LPG+
[08:06:10] [PASSED] 20.01 Xe2_HPG
[08:06:10] [PASSED] 20.02 Xe2_HPG
[08:06:10] [PASSED] 20.04 Xe2_LPG
[08:06:10] [PASSED] 30.00 Xe3_LPG
[08:06:10] [PASSED] 30.01 Xe3_LPG
[08:06:10] [PASSED] 30.03 Xe3_LPG
[08:06:10] [PASSED] 30.04 Xe3_LPG
[08:06:10] [PASSED] 30.05 Xe3_LPG
[08:06:10] [PASSED] 35.10 Xe3p_LPG
[08:06:10] [PASSED] 35.11 Xe3p_XPC
[08:06:10] ================ [PASSED] check_graphics_ip ================
[08:06:10] ===================== check_media_ip ======================
[08:06:10] [PASSED] 12.00 Xe_M
[08:06:10] [PASSED] 12.55 Xe_HPM
[08:06:10] [PASSED] 13.00 Xe_LPM+
[08:06:10] [PASSED] 13.01 Xe2_HPM
[08:06:10] [PASSED] 20.00 Xe2_LPM
[08:06:10] [PASSED] 30.00 Xe3_LPM
[08:06:10] [PASSED] 30.02 Xe3_LPM
[08:06:10] [PASSED] 35.00 Xe3p_LPM
[08:06:10] [PASSED] 35.03 Xe3p_HPM
[08:06:10] ================= [PASSED] check_media_ip ==================
[08:06:10] =================== check_platform_desc ===================
[08:06:10] [PASSED] 0x9A60 (TIGERLAKE)
[08:06:10] [PASSED] 0x9A68 (TIGERLAKE)
[08:06:10] [PASSED] 0x9A70 (TIGERLAKE)
[08:06:10] [PASSED] 0x9A40 (TIGERLAKE)
[08:06:10] [PASSED] 0x9A49 (TIGERLAKE)
[08:06:10] [PASSED] 0x9A59 (TIGERLAKE)
[08:06:10] [PASSED] 0x9A78 (TIGERLAKE)
[08:06:10] [PASSED] 0x9AC0 (TIGERLAKE)
[08:06:10] [PASSED] 0x9AC9 (TIGERLAKE)
[08:06:10] [PASSED] 0x9AD9 (TIGERLAKE)
[08:06:10] [PASSED] 0x9AF8 (TIGERLAKE)
[08:06:10] [PASSED] 0x4C80 (ROCKETLAKE)
[08:06:10] [PASSED] 0x4C8A (ROCKETLAKE)
[08:06:10] [PASSED] 0x4C8B (ROCKETLAKE)
[08:06:10] [PASSED] 0x4C8C (ROCKETLAKE)
[08:06:10] [PASSED] 0x4C90 (ROCKETLAKE)
[08:06:10] [PASSED] 0x4C9A (ROCKETLAKE)
[08:06:10] [PASSED] 0x4680 (ALDERLAKE_S)
[08:06:10] [PASSED] 0x4682 (ALDERLAKE_S)
[08:06:10] [PASSED] 0x4688 (ALDERLAKE_S)
[08:06:10] [PASSED] 0x468A (ALDERLAKE_S)
[08:06:10] [PASSED] 0x468B (ALDERLAKE_S)
[08:06:10] [PASSED] 0x4690 (ALDERLAKE_S)
[08:06:10] [PASSED] 0x4692 (ALDERLAKE_S)
[08:06:10] [PASSED] 0x4693 (ALDERLAKE_S)
[08:06:10] [PASSED] 0x46A0 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46A1 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46A2 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46A3 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46A6 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46A8 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46AA (ALDERLAKE_P)
[08:06:10] [PASSED] 0x462A (ALDERLAKE_P)
[08:06:10] [PASSED] 0x4626 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x4628 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46B0 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46B1 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46B2 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46B3 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46C0 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46C1 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46C2 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46C3 (ALDERLAKE_P)
[08:06:10] [PASSED] 0x46D0 (ALDERLAKE_N)
[08:06:10] [PASSED] 0x46D1 (ALDERLAKE_N)
[08:06:10] [PASSED] 0x46D2 (ALDERLAKE_N)
[08:06:10] [PASSED] 0x46D3 (ALDERLAKE_N)
[08:06:10] [PASSED] 0x46D4 (ALDERLAKE_N)
[08:06:10] [PASSED] 0xA721 (ALDERLAKE_P)
[08:06:10] [PASSED] 0xA7A1 (ALDERLAKE_P)
[08:06:10] [PASSED] 0xA7A9 (ALDERLAKE_P)
[08:06:10] [PASSED] 0xA7AC (ALDERLAKE_P)
[08:06:10] [PASSED] 0xA7AD (ALDERLAKE_P)
[08:06:10] [PASSED] 0xA720 (ALDERLAKE_P)
[08:06:10] [PASSED] 0xA7A0 (ALDERLAKE_P)
[08:06:10] [PASSED] 0xA7A8 (ALDERLAKE_P)
[08:06:10] [PASSED] 0xA7AA (ALDERLAKE_P)
[08:06:10] [PASSED] 0xA7AB (ALDERLAKE_P)
[08:06:10] [PASSED] 0xA780 (ALDERLAKE_S)
[08:06:10] [PASSED] 0xA781 (ALDERLAKE_S)
[08:06:10] [PASSED] 0xA782 (ALDERLAKE_S)
[08:06:10] [PASSED] 0xA783 (ALDERLAKE_S)
[08:06:10] [PASSED] 0xA788 (ALDERLAKE_S)
[08:06:10] [PASSED] 0xA789 (ALDERLAKE_S)
[08:06:10] [PASSED] 0xA78A (ALDERLAKE_S)
[08:06:10] [PASSED] 0xA78B (ALDERLAKE_S)
[08:06:10] [PASSED] 0x4905 (DG1)
[08:06:10] [PASSED] 0x4906 (DG1)
[08:06:10] [PASSED] 0x4907 (DG1)
[08:06:10] [PASSED] 0x4908 (DG1)
[08:06:10] [PASSED] 0x4909 (DG1)
[08:06:10] [PASSED] 0x56C0 (DG2)
[08:06:10] [PASSED] 0x56C2 (DG2)
[08:06:10] [PASSED] 0x56C1 (DG2)
[08:06:10] [PASSED] 0x7D51 (METEORLAKE)
[08:06:10] [PASSED] 0x7DD1 (METEORLAKE)
[08:06:10] [PASSED] 0x7D41 (METEORLAKE)
[08:06:10] [PASSED] 0x7D67 (METEORLAKE)
[08:06:10] [PASSED] 0xB640 (METEORLAKE)
[08:06:10] [PASSED] 0x56A0 (DG2)
[08:06:10] [PASSED] 0x56A1 (DG2)
[08:06:10] [PASSED] 0x56A2 (DG2)
[08:06:10] [PASSED] 0x56BE (DG2)
[08:06:10] [PASSED] 0x56BF (DG2)
[08:06:10] [PASSED] 0x5690 (DG2)
[08:06:10] [PASSED] 0x5691 (DG2)
[08:06:10] [PASSED] 0x5692 (DG2)
[08:06:10] [PASSED] 0x56A5 (DG2)
[08:06:10] [PASSED] 0x56A6 (DG2)
[08:06:10] [PASSED] 0x56B0 (DG2)
[08:06:10] [PASSED] 0x56B1 (DG2)
[08:06:10] [PASSED] 0x56BA (DG2)
[08:06:10] [PASSED] 0x56BB (DG2)
[08:06:10] [PASSED] 0x56BC (DG2)
[08:06:10] [PASSED] 0x56BD (DG2)
[08:06:10] [PASSED] 0x5693 (DG2)
[08:06:10] [PASSED] 0x5694 (DG2)
[08:06:10] [PASSED] 0x5695 (DG2)
[08:06:10] [PASSED] 0x56A3 (DG2)
[08:06:10] [PASSED] 0x56A4 (DG2)
[08:06:10] [PASSED] 0x56B2 (DG2)
[08:06:10] [PASSED] 0x56B3 (DG2)
[08:06:10] [PASSED] 0x5696 (DG2)
[08:06:10] [PASSED] 0x5697 (DG2)
[08:06:10] [PASSED] 0xB69 (PVC)
[08:06:10] [PASSED] 0xB6E (PVC)
[08:06:10] [PASSED] 0xBD4 (PVC)
[08:06:10] [PASSED] 0xBD5 (PVC)
[08:06:10] [PASSED] 0xBD6 (PVC)
[08:06:10] [PASSED] 0xBD7 (PVC)
[08:06:10] [PASSED] 0xBD8 (PVC)
[08:06:10] [PASSED] 0xBD9 (PVC)
[08:06:10] [PASSED] 0xBDA (PVC)
[08:06:10] [PASSED] 0xBDB (PVC)
[08:06:10] [PASSED] 0xBE0 (PVC)
[08:06:10] [PASSED] 0xBE1 (PVC)
[08:06:10] [PASSED] 0xBE5 (PVC)
[08:06:10] [PASSED] 0x7D40 (METEORLAKE)
[08:06:10] [PASSED] 0x7D45 (METEORLAKE)
[08:06:10] [PASSED] 0x7D55 (METEORLAKE)
[08:06:10] [PASSED] 0x7D60 (METEORLAKE)
[08:06:10] [PASSED] 0x7DD5 (METEORLAKE)
[08:06:10] [PASSED] 0x6420 (LUNARLAKE)
[08:06:10] [PASSED] 0x64A0 (LUNARLAKE)
[08:06:10] [PASSED] 0x64B0 (LUNARLAKE)
[08:06:10] [PASSED] 0xE202 (BATTLEMAGE)
[08:06:10] [PASSED] 0xE209 (BATTLEMAGE)
[08:06:10] [PASSED] 0xE20B (BATTLEMAGE)
[08:06:10] [PASSED] 0xE20C (BATTLEMAGE)
[08:06:10] [PASSED] 0xE20D (BATTLEMAGE)
[08:06:10] [PASSED] 0xE210 (BATTLEMAGE)
[08:06:10] [PASSED] 0xE211 (BATTLEMAGE)
[08:06:10] [PASSED] 0xE212 (BATTLEMAGE)
[08:06:10] [PASSED] 0xE216 (BATTLEMAGE)
[08:06:10] [PASSED] 0xE220 (BATTLEMAGE)
[08:06:10] [PASSED] 0xE221 (BATTLEMAGE)
[08:06:10] [PASSED] 0xE222 (BATTLEMAGE)
[08:06:10] [PASSED] 0xE223 (BATTLEMAGE)
[08:06:10] [PASSED] 0xB080 (PANTHERLAKE)
[08:06:10] [PASSED] 0xB081 (PANTHERLAKE)
[08:06:10] [PASSED] 0xB082 (PANTHERLAKE)
[08:06:10] [PASSED] 0xB083 (PANTHERLAKE)
[08:06:10] [PASSED] 0xB084 (PANTHERLAKE)
[08:06:10] [PASSED] 0xB085 (PANTHERLAKE)
[08:06:10] [PASSED] 0xB086 (PANTHERLAKE)
[08:06:10] [PASSED] 0xB087 (PANTHERLAKE)
[08:06:10] [PASSED] 0xB08F (PANTHERLAKE)
[08:06:10] [PASSED] 0xB090 (PANTHERLAKE)
[08:06:10] [PASSED] 0xB0A0 (PANTHERLAKE)
[08:06:10] [PASSED] 0xB0B0 (PANTHERLAKE)
[08:06:10] [PASSED] 0xFD80 (PANTHERLAKE)
[08:06:10] [PASSED] 0xFD81 (PANTHERLAKE)
[08:06:10] [PASSED] 0xD740 (NOVALAKE_S)
[08:06:10] [PASSED] 0xD741 (NOVALAKE_S)
[08:06:10] [PASSED] 0xD742 (NOVALAKE_S)
[08:06:10] [PASSED] 0xD743 (NOVALAKE_S)
[08:06:10] [PASSED] 0xD744 (NOVALAKE_S)
[08:06:10] [PASSED] 0xD745 (NOVALAKE_S)
[08:06:10] [PASSED] 0x674C (CRESCENTISLAND)
[08:06:10] [PASSED] 0x674D (CRESCENTISLAND)
[08:06:10] [PASSED] 0x674E (CRESCENTISLAND)
[08:06:10] [PASSED] 0x674F (CRESCENTISLAND)
[08:06:10] [PASSED] 0x6750 (CRESCENTISLAND)
[08:06:10] [PASSED] 0xD750 (NOVALAKE_P)
[08:06:10] [PASSED] 0xD751 (NOVALAKE_P)
[08:06:10] [PASSED] 0xD752 (NOVALAKE_P)
[08:06:10] [PASSED] 0xD753 (NOVALAKE_P)
[08:06:10] [PASSED] 0xD754 (NOVALAKE_P)
[08:06:10] [PASSED] 0xD755 (NOVALAKE_P)
[08:06:10] [PASSED] 0xD756 (NOVALAKE_P)
[08:06:10] [PASSED] 0xD757 (NOVALAKE_P)
[08:06:10] [PASSED] 0xD75F (NOVALAKE_P)
[08:06:10] =============== [PASSED] check_platform_desc ===============
[08:06:10] ===================== [PASSED] xe_pci ======================
[08:06:10] =================== xe_rtp (2 subtests) ====================
[08:06:10] =============== xe_rtp_process_to_sr_tests ================
[08:06:10] [PASSED] coalesce-same-reg
[08:06:10] [PASSED] no-match-no-add
[08:06:10] [PASSED] match-or
[08:06:10] [PASSED] match-or-xfail
[08:06:10] [PASSED] no-match-no-add-multiple-rules
[08:06:10] [PASSED] two-regs-two-entries
[08:06:10] [PASSED] clr-one-set-other
[08:06:10] [PASSED] set-field
[08:06:10] [PASSED] conflict-duplicate
[08:06:10] [PASSED] conflict-not-disjoint
[08:06:10] [PASSED] conflict-reg-type
[08:06:10] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[08:06:10] ================== xe_rtp_process_tests ===================
[08:06:10] [PASSED] active1
[08:06:10] [PASSED] active2
[08:06:10] [PASSED] active-inactive
[08:06:10] [PASSED] inactive-active
[08:06:10] [PASSED] inactive-1st_or_active-inactive
[08:06:10] [PASSED] inactive-2nd_or_active-inactive
[08:06:10] [PASSED] inactive-last_or_active-inactive
[08:06:10] [PASSED] inactive-no_or_active-inactive
[08:06:10] ============== [PASSED] xe_rtp_process_tests ===============
[08:06:10] ===================== [PASSED] xe_rtp ======================
[08:06:10] ==================== xe_wa (1 subtest) =====================
[08:06:10] ======================== xe_wa_gt =========================
[08:06:10] [PASSED] TIGERLAKE B0
[08:06:10] [PASSED] DG1 A0
[08:06:10] [PASSED] DG1 B0
[08:06:10] [PASSED] ALDERLAKE_S A0
[08:06:10] [PASSED] ALDERLAKE_S B0
[08:06:10] [PASSED] ALDERLAKE_S C0
[08:06:10] [PASSED] ALDERLAKE_S D0
[08:06:10] [PASSED] ALDERLAKE_P A0
[08:06:10] [PASSED] ALDERLAKE_P B0
[08:06:10] [PASSED] ALDERLAKE_P C0
[08:06:10] [PASSED] ALDERLAKE_S RPLS D0
[08:06:10] [PASSED] ALDERLAKE_P RPLU E0
[08:06:10] [PASSED] DG2 G10 C0
[08:06:10] [PASSED] DG2 G11 B1
[08:06:10] [PASSED] DG2 G12 A1
[08:06:10] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:06:10] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:06:10] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[08:06:10] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[08:06:10] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[08:06:10] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[08:06:10] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[08:06:10] ==================== [PASSED] xe_wa_gt =====================
[08:06:10] ====================== [PASSED] xe_wa ======================
[08:06:10] ============================================================
[08:06:10] Testing complete. Ran 601 tests: passed: 583, skipped: 18
[08:06:10] Elapsed time: 36.050s total, 4.283s configuring, 31.099s building, 0.615s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[08:06:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:06:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:06:36] Starting KUnit Kernel (1/1)...
[08:06:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:06:36] ============ drm_test_pick_cmdline (2 subtests) ============
[08:06:36] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[08:06:36] =============== drm_test_pick_cmdline_named ===============
[08:06:36] [PASSED] NTSC
[08:06:36] [PASSED] NTSC-J
[08:06:36] [PASSED] PAL
[08:06:36] [PASSED] PAL-M
[08:06:36] =========== [PASSED] drm_test_pick_cmdline_named ===========
[08:06:36] ============== [PASSED] drm_test_pick_cmdline ==============
[08:06:36] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[08:06:36] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[08:06:36] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[08:06:36] =========== drm_validate_clone_mode (2 subtests) ===========
[08:06:36] ============== drm_test_check_in_clone_mode ===============
[08:06:36] [PASSED] in_clone_mode
[08:06:36] [PASSED] not_in_clone_mode
[08:06:36] ========== [PASSED] drm_test_check_in_clone_mode ===========
[08:06:36] =============== drm_test_check_valid_clones ===============
[08:06:36] [PASSED] not_in_clone_mode
[08:06:36] [PASSED] valid_clone
[08:06:36] [PASSED] invalid_clone
[08:06:36] =========== [PASSED] drm_test_check_valid_clones ===========
[08:06:36] ============= [PASSED] drm_validate_clone_mode =============
[08:06:36] ============= drm_validate_modeset (1 subtest) =============
[08:06:36] [PASSED] drm_test_check_connector_changed_modeset
[08:06:36] ============== [PASSED] drm_validate_modeset ===============
[08:06:36] ====== drm_test_bridge_get_current_state (2 subtests) ======
[08:06:36] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[08:06:36] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[08:06:36] ======== [PASSED] drm_test_bridge_get_current_state ========
[08:06:36] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[08:06:36] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[08:06:36] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[08:06:36] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[08:06:36] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[08:06:36] ============== drm_bridge_alloc (2 subtests) ===============
[08:06:36] [PASSED] drm_test_drm_bridge_alloc_basic
[08:06:36] [PASSED] drm_test_drm_bridge_alloc_get_put
[08:06:36] ================ [PASSED] drm_bridge_alloc =================
[08:06:36] ============= drm_cmdline_parser (40 subtests) =============
[08:06:36] [PASSED] drm_test_cmdline_force_d_only
[08:06:36] [PASSED] drm_test_cmdline_force_D_only_dvi
[08:06:36] [PASSED] drm_test_cmdline_force_D_only_hdmi
[08:06:36] [PASSED] drm_test_cmdline_force_D_only_not_digital
[08:06:36] [PASSED] drm_test_cmdline_force_e_only
[08:06:36] [PASSED] drm_test_cmdline_res
[08:06:36] [PASSED] drm_test_cmdline_res_vesa
[08:06:36] [PASSED] drm_test_cmdline_res_vesa_rblank
[08:06:36] [PASSED] drm_test_cmdline_res_rblank
[08:06:36] [PASSED] drm_test_cmdline_res_bpp
[08:06:36] [PASSED] drm_test_cmdline_res_refresh
[08:06:36] [PASSED] drm_test_cmdline_res_bpp_refresh
[08:06:36] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[08:06:36] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[08:06:36] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[08:06:36] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[08:06:36] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[08:06:36] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[08:06:36] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[08:06:36] [PASSED] drm_test_cmdline_res_margins_force_on
[08:06:36] [PASSED] drm_test_cmdline_res_vesa_margins
[08:06:36] [PASSED] drm_test_cmdline_name
[08:06:36] [PASSED] drm_test_cmdline_name_bpp
[08:06:36] [PASSED] drm_test_cmdline_name_option
[08:06:36] [PASSED] drm_test_cmdline_name_bpp_option
[08:06:36] [PASSED] drm_test_cmdline_rotate_0
[08:06:36] [PASSED] drm_test_cmdline_rotate_90
[08:06:36] [PASSED] drm_test_cmdline_rotate_180
[08:06:36] [PASSED] drm_test_cmdline_rotate_270
[08:06:36] [PASSED] drm_test_cmdline_hmirror
[08:06:36] [PASSED] drm_test_cmdline_vmirror
[08:06:36] [PASSED] drm_test_cmdline_margin_options
[08:06:36] [PASSED] drm_test_cmdline_multiple_options
[08:06:36] [PASSED] drm_test_cmdline_bpp_extra_and_option
[08:06:36] [PASSED] drm_test_cmdline_extra_and_option
[08:06:36] [PASSED] drm_test_cmdline_freestanding_options
[08:06:36] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[08:06:36] [PASSED] drm_test_cmdline_panel_orientation
[08:06:36] ================ drm_test_cmdline_invalid =================
[08:06:36] [PASSED] margin_only
[08:06:36] [PASSED] interlace_only
[08:06:36] [PASSED] res_missing_x
[08:06:36] [PASSED] res_missing_y
[08:06:36] [PASSED] res_bad_y
[08:06:36] [PASSED] res_missing_y_bpp
[08:06:36] [PASSED] res_bad_bpp
[08:06:36] [PASSED] res_bad_refresh
[08:06:36] [PASSED] res_bpp_refresh_force_on_off
[08:06:36] [PASSED] res_invalid_mode
[08:06:36] [PASSED] res_bpp_wrong_place_mode
[08:06:36] [PASSED] name_bpp_refresh
[08:06:36] [PASSED] name_refresh
[08:06:36] [PASSED] name_refresh_wrong_mode
[08:06:36] [PASSED] name_refresh_invalid_mode
[08:06:36] [PASSED] rotate_multiple
[08:06:36] [PASSED] rotate_invalid_val
[08:06:36] [PASSED] rotate_truncated
[08:06:36] [PASSED] invalid_option
[08:06:36] [PASSED] invalid_tv_option
[08:06:36] [PASSED] truncated_tv_option
[08:06:36] ============ [PASSED] drm_test_cmdline_invalid =============
[08:06:36] =============== drm_test_cmdline_tv_options ===============
[08:06:36] [PASSED] NTSC
[08:06:36] [PASSED] NTSC_443
[08:06:36] [PASSED] NTSC_J
[08:06:36] [PASSED] PAL
[08:06:36] [PASSED] PAL_M
[08:06:36] [PASSED] PAL_N
[08:06:36] [PASSED] SECAM
[08:06:36] [PASSED] MONO_525
[08:06:36] [PASSED] MONO_625
[08:06:36] =========== [PASSED] drm_test_cmdline_tv_options ===========
[08:06:36] =============== [PASSED] drm_cmdline_parser ================
[08:06:36] ========== drmm_connector_hdmi_init (20 subtests) ==========
[08:06:36] [PASSED] drm_test_connector_hdmi_init_valid
[08:06:36] [PASSED] drm_test_connector_hdmi_init_bpc_8
[08:06:36] [PASSED] drm_test_connector_hdmi_init_bpc_10
[08:06:36] [PASSED] drm_test_connector_hdmi_init_bpc_12
[08:06:36] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[08:06:36] [PASSED] drm_test_connector_hdmi_init_bpc_null
[08:06:36] [PASSED] drm_test_connector_hdmi_init_formats_empty
[08:06:36] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[08:06:36] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:06:36] [PASSED] supported_formats=0x9 yuv420_allowed=1
[08:06:36] [PASSED] supported_formats=0x9 yuv420_allowed=0
[08:06:36] [PASSED] supported_formats=0x5 yuv420_allowed=1
[08:06:36] [PASSED] supported_formats=0x5 yuv420_allowed=0
[08:06:36] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:06:36] [PASSED] drm_test_connector_hdmi_init_null_ddc
[08:06:36] [PASSED] drm_test_connector_hdmi_init_null_product
[08:06:36] [PASSED] drm_test_connector_hdmi_init_null_vendor
[08:06:36] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[08:06:36] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[08:06:36] [PASSED] drm_test_connector_hdmi_init_product_valid
[08:06:36] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[08:06:36] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[08:06:36] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[08:06:36] ========= drm_test_connector_hdmi_init_type_valid =========
[08:06:36] [PASSED] HDMI-A
[08:06:36] [PASSED] HDMI-B
[08:06:36] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[08:06:36] ======== drm_test_connector_hdmi_init_type_invalid ========
[08:06:36] [PASSED] Unknown
[08:06:36] [PASSED] VGA
[08:06:36] [PASSED] DVI-I
[08:06:36] [PASSED] DVI-D
[08:06:36] [PASSED] DVI-A
[08:06:36] [PASSED] Composite
[08:06:36] [PASSED] SVIDEO
[08:06:36] [PASSED] LVDS
[08:06:36] [PASSED] Component
[08:06:36] [PASSED] DIN
[08:06:36] [PASSED] DP
[08:06:36] [PASSED] TV
[08:06:36] [PASSED] eDP
[08:06:36] [PASSED] Virtual
[08:06:36] [PASSED] DSI
[08:06:36] [PASSED] DPI
[08:06:36] [PASSED] Writeback
[08:06:36] [PASSED] SPI
[08:06:36] [PASSED] USB
[08:06:36] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[08:06:36] ============ [PASSED] drmm_connector_hdmi_init =============
[08:06:36] ============= drmm_connector_init (3 subtests) =============
[08:06:36] [PASSED] drm_test_drmm_connector_init
[08:06:36] [PASSED] drm_test_drmm_connector_init_null_ddc
[08:06:36] ========= drm_test_drmm_connector_init_type_valid =========
[08:06:36] [PASSED] Unknown
[08:06:36] [PASSED] VGA
[08:06:36] [PASSED] DVI-I
[08:06:36] [PASSED] DVI-D
[08:06:36] [PASSED] DVI-A
[08:06:36] [PASSED] Composite
[08:06:36] [PASSED] SVIDEO
[08:06:36] [PASSED] LVDS
[08:06:36] [PASSED] Component
[08:06:36] [PASSED] DIN
[08:06:36] [PASSED] DP
[08:06:36] [PASSED] HDMI-A
[08:06:36] [PASSED] HDMI-B
[08:06:36] [PASSED] TV
[08:06:36] [PASSED] eDP
[08:06:36] [PASSED] Virtual
[08:06:36] [PASSED] DSI
[08:06:36] [PASSED] DPI
[08:06:36] [PASSED] Writeback
[08:06:36] [PASSED] SPI
[08:06:36] [PASSED] USB
[08:06:36] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[08:06:36] =============== [PASSED] drmm_connector_init ===============
[08:06:36] ========= drm_connector_dynamic_init (6 subtests) ==========
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_init
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_init_properties
[08:06:36] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[08:06:36] [PASSED] Unknown
[08:06:36] [PASSED] VGA
[08:06:36] [PASSED] DVI-I
[08:06:36] [PASSED] DVI-D
[08:06:36] [PASSED] DVI-A
[08:06:36] [PASSED] Composite
[08:06:36] [PASSED] SVIDEO
[08:06:36] [PASSED] LVDS
[08:06:36] [PASSED] Component
[08:06:36] [PASSED] DIN
[08:06:36] [PASSED] DP
[08:06:36] [PASSED] HDMI-A
[08:06:36] [PASSED] HDMI-B
[08:06:36] [PASSED] TV
[08:06:36] [PASSED] eDP
[08:06:36] [PASSED] Virtual
[08:06:36] [PASSED] DSI
[08:06:36] [PASSED] DPI
[08:06:36] [PASSED] Writeback
[08:06:36] [PASSED] SPI
[08:06:36] [PASSED] USB
[08:06:36] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[08:06:36] ======== drm_test_drm_connector_dynamic_init_name =========
[08:06:36] [PASSED] Unknown
[08:06:36] [PASSED] VGA
[08:06:36] [PASSED] DVI-I
[08:06:36] [PASSED] DVI-D
[08:06:36] [PASSED] DVI-A
[08:06:36] [PASSED] Composite
[08:06:36] [PASSED] SVIDEO
[08:06:36] [PASSED] LVDS
[08:06:36] [PASSED] Component
[08:06:36] [PASSED] DIN
[08:06:36] [PASSED] DP
[08:06:36] [PASSED] HDMI-A
[08:06:36] [PASSED] HDMI-B
[08:06:36] [PASSED] TV
[08:06:36] [PASSED] eDP
[08:06:36] [PASSED] Virtual
[08:06:36] [PASSED] DSI
[08:06:36] [PASSED] DPI
[08:06:36] [PASSED] Writeback
[08:06:36] [PASSED] SPI
[08:06:36] [PASSED] USB
[08:06:36] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[08:06:36] =========== [PASSED] drm_connector_dynamic_init ============
[08:06:36] ==== drm_connector_dynamic_register_early (4 subtests) =====
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[08:06:36] ====== [PASSED] drm_connector_dynamic_register_early =======
[08:06:36] ======= drm_connector_dynamic_register (7 subtests) ========
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[08:06:36] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[08:06:36] ========= [PASSED] drm_connector_dynamic_register ==========
[08:06:36] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[08:06:36] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[08:06:36] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[08:06:36] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[08:06:36] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[08:06:36] ========== drm_test_get_tv_mode_from_name_valid ===========
[08:06:36] [PASSED] NTSC
[08:06:36] [PASSED] NTSC-443
[08:06:36] [PASSED] NTSC-J
[08:06:36] [PASSED] PAL
[08:06:36] [PASSED] PAL-M
[08:06:36] [PASSED] PAL-N
[08:06:36] [PASSED] SECAM
[08:06:36] [PASSED] Mono
[08:06:36] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[08:06:36] [PASSED] drm_test_get_tv_mode_from_name_truncated
[08:06:36] ============ [PASSED] drm_get_tv_mode_from_name ============
[08:06:36] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[08:06:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[08:06:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[08:06:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[08:06:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[08:06:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[08:06:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[08:06:36] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[08:06:36] [PASSED] VIC 96
[08:06:36] [PASSED] VIC 97
[08:06:36] [PASSED] VIC 101
[08:06:36] [PASSED] VIC 102
[08:06:36] [PASSED] VIC 106
[08:06:36] [PASSED] VIC 107
[08:06:36] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[08:06:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[08:06:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[08:06:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[08:06:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[08:06:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[08:06:36] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[08:06:36] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[08:06:36] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[08:06:36] [PASSED] Automatic
[08:06:36] [PASSED] Full
[08:06:36] [PASSED] Limited 16:235
[08:06:36] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[08:06:36] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[08:06:36] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[08:06:36] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[08:06:36] === drm_test_drm_hdmi_connector_get_output_format_name ====
[08:06:36] [PASSED] RGB
[08:06:36] [PASSED] YUV 4:2:0
[08:06:36] [PASSED] YUV 4:2:2
[08:06:36] [PASSED] YUV 4:4:4
[08:06:36] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[08:06:36] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[08:06:36] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[08:06:36] ============= drm_damage_helper (21 subtests) ==============
[08:06:36] [PASSED] drm_test_damage_iter_no_damage
[08:06:36] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[08:06:36] [PASSED] drm_test_damage_iter_no_damage_src_moved
[08:06:36] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[08:06:36] [PASSED] drm_test_damage_iter_no_damage_not_visible
[08:06:36] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[08:06:36] [PASSED] drm_test_damage_iter_no_damage_no_fb
[08:06:36] [PASSED] drm_test_damage_iter_simple_damage
[08:06:36] [PASSED] drm_test_damage_iter_single_damage
[08:06:36] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[08:06:36] [PASSED] drm_test_damage_iter_single_damage_outside_src
[08:06:36] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[08:06:36] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[08:06:36] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[08:06:36] [PASSED] drm_test_damage_iter_single_damage_src_moved
[08:06:36] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[08:06:36] [PASSED] drm_test_damage_iter_damage
[08:06:36] [PASSED] drm_test_damage_iter_damage_one_intersect
[08:06:36] [PASSED] drm_test_damage_iter_damage_one_outside
[08:06:36] [PASSED] drm_test_damage_iter_damage_src_moved
[08:06:36] [PASSED] drm_test_damage_iter_damage_not_visible
[08:06:36] ================ [PASSED] drm_damage_helper ================
[08:06:36] ============== drm_dp_mst_helper (3 subtests) ==============
[08:06:36] ============== drm_test_dp_mst_calc_pbn_mode ==============
[08:06:36] [PASSED] Clock 154000 BPP 30 DSC disabled
[08:06:36] [PASSED] Clock 234000 BPP 30 DSC disabled
[08:06:36] [PASSED] Clock 297000 BPP 24 DSC disabled
[08:06:36] [PASSED] Clock 332880 BPP 24 DSC enabled
[08:06:36] [PASSED] Clock 324540 BPP 24 DSC enabled
[08:06:36] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[08:06:36] ============== drm_test_dp_mst_calc_pbn_div ===============
[08:06:36] [PASSED] Link rate 2000000 lane count 4
[08:06:36] [PASSED] Link rate 2000000 lane count 2
[08:06:36] [PASSED] Link rate 2000000 lane count 1
[08:06:36] [PASSED] Link rate 1350000 lane count 4
[08:06:36] [PASSED] Link rate 1350000 lane count 2
[08:06:36] [PASSED] Link rate 1350000 lane count 1
[08:06:36] [PASSED] Link rate 1000000 lane count 4
[08:06:36] [PASSED] Link rate 1000000 lane count 2
[08:06:36] [PASSED] Link rate 1000000 lane count 1
[08:06:36] [PASSED] Link rate 810000 lane count 4
[08:06:36] [PASSED] Link rate 810000 lane count 2
[08:06:36] [PASSED] Link rate 810000 lane count 1
[08:06:36] [PASSED] Link rate 540000 lane count 4
[08:06:36] [PASSED] Link rate 540000 lane count 2
[08:06:36] [PASSED] Link rate 540000 lane count 1
[08:06:36] [PASSED] Link rate 270000 lane count 4
[08:06:36] [PASSED] Link rate 270000 lane count 2
[08:06:36] [PASSED] Link rate 270000 lane count 1
[08:06:36] [PASSED] Link rate 162000 lane count 4
[08:06:36] [PASSED] Link rate 162000 lane count 2
[08:06:36] [PASSED] Link rate 162000 lane count 1
[08:06:36] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[08:06:36] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[08:06:36] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[08:06:36] [PASSED] DP_POWER_UP_PHY with port number
[08:06:36] [PASSED] DP_POWER_DOWN_PHY with port number
[08:06:36] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[08:06:36] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[08:06:36] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[08:06:36] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[08:06:36] [PASSED] DP_QUERY_PAYLOAD with port number
[08:06:36] [PASSED] DP_QUERY_PAYLOAD with VCPI
[08:06:36] [PASSED] DP_REMOTE_DPCD_READ with port number
[08:06:36] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[08:06:36] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[08:06:36] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[08:06:36] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[08:06:36] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[08:06:36] [PASSED] DP_REMOTE_I2C_READ with port number
[08:06:36] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[08:06:36] [PASSED] DP_REMOTE_I2C_READ with transactions array
[08:06:36] [PASSED] DP_REMOTE_I2C_WRITE with port number
[08:06:36] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[08:06:36] [PASSED] DP_REMOTE_I2C_WRITE with data array
[08:06:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[08:06:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[08:06:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[08:06:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[08:06:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[08:06:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[08:06:36] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[08:06:36] ================ [PASSED] drm_dp_mst_helper ================
[08:06:36] ================== drm_exec (7 subtests) ===================
[08:06:36] [PASSED] sanitycheck
[08:06:36] [PASSED] test_lock
[08:06:36] [PASSED] test_lock_unlock
[08:06:36] [PASSED] test_duplicates
[08:06:36] [PASSED] test_prepare
[08:06:36] [PASSED] test_prepare_array
[08:06:36] [PASSED] test_multiple_loops
[08:06:36] ==================== [PASSED] drm_exec =====================
[08:06:36] =========== drm_format_helper_test (17 subtests) ===========
[08:06:36] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[08:06:36] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[08:06:36] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[08:06:36] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[08:06:36] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[08:06:36] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[08:06:36] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[08:06:36] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[08:06:36] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[08:06:36] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[08:06:36] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[08:06:36] ============== drm_test_fb_xrgb8888_to_mono ===============
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[08:06:36] ==================== drm_test_fb_swab =====================
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ================ [PASSED] drm_test_fb_swab =================
[08:06:36] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[08:06:36] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[08:06:36] [PASSED] single_pixel_source_buffer
[08:06:36] [PASSED] single_pixel_clip_rectangle
[08:06:36] [PASSED] well_known_colors
[08:06:36] [PASSED] destination_pitch
[08:06:36] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[08:06:36] ================= drm_test_fb_clip_offset =================
[08:06:36] [PASSED] pass through
[08:06:36] [PASSED] horizontal offset
[08:06:36] [PASSED] vertical offset
[08:06:36] [PASSED] horizontal and vertical offset
[08:06:36] [PASSED] horizontal offset (custom pitch)
[08:06:36] [PASSED] vertical offset (custom pitch)
[08:06:36] [PASSED] horizontal and vertical offset (custom pitch)
[08:06:36] ============= [PASSED] drm_test_fb_clip_offset =============
[08:06:36] =================== drm_test_fb_memcpy ====================
[08:06:36] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[08:06:36] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[08:06:36] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[08:06:36] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[08:06:36] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[08:06:36] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[08:06:36] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[08:06:36] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[08:06:36] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[08:06:36] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[08:06:36] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[08:06:36] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[08:06:36] =============== [PASSED] drm_test_fb_memcpy ================
[08:06:36] ============= [PASSED] drm_format_helper_test ==============
[08:06:36] ================= drm_format (18 subtests) =================
[08:06:36] [PASSED] drm_test_format_block_width_invalid
[08:06:36] [PASSED] drm_test_format_block_width_one_plane
[08:06:36] [PASSED] drm_test_format_block_width_two_plane
[08:06:36] [PASSED] drm_test_format_block_width_three_plane
[08:06:36] [PASSED] drm_test_format_block_width_tiled
[08:06:36] [PASSED] drm_test_format_block_height_invalid
[08:06:36] [PASSED] drm_test_format_block_height_one_plane
[08:06:36] [PASSED] drm_test_format_block_height_two_plane
[08:06:36] [PASSED] drm_test_format_block_height_three_plane
[08:06:36] [PASSED] drm_test_format_block_height_tiled
[08:06:36] [PASSED] drm_test_format_min_pitch_invalid
[08:06:36] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[08:06:36] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[08:06:36] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[08:06:36] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[08:06:36] [PASSED] drm_test_format_min_pitch_two_plane
[08:06:36] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[08:06:36] [PASSED] drm_test_format_min_pitch_tiled
[08:06:36] =================== [PASSED] drm_format ====================
[08:06:36] ============== drm_framebuffer (10 subtests) ===============
[08:06:36] ========== drm_test_framebuffer_check_src_coords ==========
[08:06:36] [PASSED] Success: source fits into fb
[08:06:36] [PASSED] Fail: overflowing fb with x-axis coordinate
[08:06:36] [PASSED] Fail: overflowing fb with y-axis coordinate
[08:06:36] [PASSED] Fail: overflowing fb with source width
[08:06:36] [PASSED] Fail: overflowing fb with source height
[08:06:36] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[08:06:36] [PASSED] drm_test_framebuffer_cleanup
[08:06:36] =============== drm_test_framebuffer_create ===============
[08:06:36] [PASSED] ABGR8888 normal sizes
[08:06:36] [PASSED] ABGR8888 max sizes
[08:06:36] [PASSED] ABGR8888 pitch greater than min required
[08:06:36] [PASSED] ABGR8888 pitch less than min required
[08:06:36] [PASSED] ABGR8888 Invalid width
[08:06:36] [PASSED] ABGR8888 Invalid buffer handle
[08:06:36] [PASSED] No pixel format
[08:06:36] [PASSED] ABGR8888 Width 0
[08:06:36] [PASSED] ABGR8888 Height 0
[08:06:36] [PASSED] ABGR8888 Out of bound height * pitch combination
[08:06:36] [PASSED] ABGR8888 Large buffer offset
[08:06:36] [PASSED] ABGR8888 Buffer offset for inexistent plane
[08:06:36] [PASSED] ABGR8888 Invalid flag
[08:06:36] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[08:06:36] [PASSED] ABGR8888 Valid buffer modifier
[08:06:36] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[08:06:36] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[08:06:36] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[08:06:36] [PASSED] NV12 Normal sizes
[08:06:36] [PASSED] NV12 Max sizes
[08:06:36] [PASSED] NV12 Invalid pitch
[08:06:36] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[08:06:36] [PASSED] NV12 different modifier per-plane
[08:06:36] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[08:06:36] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[08:06:36] [PASSED] NV12 Modifier for inexistent plane
[08:06:36] [PASSED] NV12 Handle for inexistent plane
[08:06:36] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[08:06:36] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[08:06:36] [PASSED] YVU420 Normal sizes
[08:06:36] [PASSED] YVU420 Max sizes
[08:06:36] [PASSED] YVU420 Invalid pitch
[08:06:36] [PASSED] YVU420 Different pitches
[08:06:36] [PASSED] YVU420 Different buffer offsets/pitches
[08:06:36] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[08:06:36] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[08:06:36] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[08:06:36] [PASSED] YVU420 Valid modifier
[08:06:36] [PASSED] YVU420 Different modifiers per plane
[08:06:36] [PASSED] YVU420 Modifier for inexistent plane
[08:06:36] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[08:06:36] [PASSED] X0L2 Normal sizes
[08:06:36] [PASSED] X0L2 Max sizes
[08:06:36] [PASSED] X0L2 Invalid pitch
[08:06:36] [PASSED] X0L2 Pitch greater than minimum required
[08:06:36] [PASSED] X0L2 Handle for inexistent plane
[08:06:36] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[08:06:36] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[08:06:36] [PASSED] X0L2 Valid modifier
[08:06:36] [PASSED] X0L2 Modifier for inexistent plane
[08:06:36] =========== [PASSED] drm_test_framebuffer_create ===========
[08:06:36] [PASSED] drm_test_framebuffer_free
[08:06:36] [PASSED] drm_test_framebuffer_init
[08:06:36] [PASSED] drm_test_framebuffer_init_bad_format
[08:06:36] [PASSED] drm_test_framebuffer_init_dev_mismatch
[08:06:36] [PASSED] drm_test_framebuffer_lookup
[08:06:36] [PASSED] drm_test_framebuffer_lookup_inexistent
[08:06:36] [PASSED] drm_test_framebuffer_modifiers_not_supported
[08:06:36] ================= [PASSED] drm_framebuffer =================
[08:06:36] ================ drm_gem_shmem (8 subtests) ================
[08:06:36] [PASSED] drm_gem_shmem_test_obj_create
[08:06:36] [PASSED] drm_gem_shmem_test_obj_create_private
[08:06:36] [PASSED] drm_gem_shmem_test_pin_pages
[08:06:36] [PASSED] drm_gem_shmem_test_vmap
[08:06:36] [PASSED] drm_gem_shmem_test_get_sg_table
[08:06:36] [PASSED] drm_gem_shmem_test_get_pages_sgt
[08:06:36] [PASSED] drm_gem_shmem_test_madvise
[08:06:36] [PASSED] drm_gem_shmem_test_purge
[08:06:36] ================== [PASSED] drm_gem_shmem ==================
[08:06:36] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[08:06:36] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[08:06:36] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[08:06:36] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[08:06:36] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[08:06:36] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[08:06:36] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[08:06:36] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[08:06:36] [PASSED] Automatic
[08:06:36] [PASSED] Full
[08:06:36] [PASSED] Limited 16:235
[08:06:36] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[08:06:36] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[08:06:36] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[08:06:36] [PASSED] drm_test_check_disable_connector
[08:06:36] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[08:06:36] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[08:06:36] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[08:06:36] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[08:06:36] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[08:06:36] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[08:06:36] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[08:06:36] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[08:06:36] [PASSED] drm_test_check_output_bpc_dvi
[08:06:36] [PASSED] drm_test_check_output_bpc_format_vic_1
[08:06:36] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[08:06:36] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[08:06:36] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[08:06:36] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[08:06:36] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[08:06:36] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[08:06:36] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[08:06:36] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[08:06:36] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[08:06:36] [PASSED] drm_test_check_broadcast_rgb_value
[08:06:36] [PASSED] drm_test_check_bpc_8_value
[08:06:36] [PASSED] drm_test_check_bpc_10_value
[08:06:36] [PASSED] drm_test_check_bpc_12_value
[08:06:36] [PASSED] drm_test_check_format_value
[08:06:36] [PASSED] drm_test_check_tmds_char_value
[08:06:36] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[08:06:36] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[08:06:36] [PASSED] drm_test_check_mode_valid
[08:06:36] [PASSED] drm_test_check_mode_valid_reject
[08:06:36] [PASSED] drm_test_check_mode_valid_reject_rate
[08:06:36] [PASSED] drm_test_check_mode_valid_reject_max_clock
[08:06:36] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[08:06:36] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[08:06:36] [PASSED] drm_test_check_infoframes
[08:06:36] [PASSED] drm_test_check_reject_avi_infoframe
[08:06:36] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[08:06:36] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[08:06:36] [PASSED] drm_test_check_reject_audio_infoframe
[08:06:36] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[08:06:36] ================= drm_managed (2 subtests) =================
[08:06:36] [PASSED] drm_test_managed_release_action
[08:06:36] [PASSED] drm_test_managed_run_action
[08:06:36] =================== [PASSED] drm_managed ===================
[08:06:36] =================== drm_mm (6 subtests) ====================
[08:06:36] [PASSED] drm_test_mm_init
[08:06:36] [PASSED] drm_test_mm_debug
[08:06:36] [PASSED] drm_test_mm_align32
[08:06:36] [PASSED] drm_test_mm_align64
[08:06:36] [PASSED] drm_test_mm_lowest
[08:06:36] [PASSED] drm_test_mm_highest
[08:06:36] ===================== [PASSED] drm_mm ======================
[08:06:36] ============= drm_modes_analog_tv (5 subtests) =============
[08:06:36] [PASSED] drm_test_modes_analog_tv_mono_576i
[08:06:36] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[08:06:36] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[08:06:36] [PASSED] drm_test_modes_analog_tv_pal_576i
[08:06:36] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[08:06:36] =============== [PASSED] drm_modes_analog_tv ===============
[08:06:36] ============== drm_plane_helper (2 subtests) ===============
[08:06:36] =============== drm_test_check_plane_state ================
[08:06:36] [PASSED] clipping_simple
[08:06:36] [PASSED] clipping_rotate_reflect
[08:06:36] [PASSED] positioning_simple
[08:06:36] [PASSED] upscaling
[08:06:36] [PASSED] downscaling
[08:06:36] [PASSED] rounding1
[08:06:36] [PASSED] rounding2
[08:06:36] [PASSED] rounding3
[08:06:36] [PASSED] rounding4
[08:06:36] =========== [PASSED] drm_test_check_plane_state ============
[08:06:36] =========== drm_test_check_invalid_plane_state ============
[08:06:36] [PASSED] positioning_invalid
[08:06:36] [PASSED] upscaling_invalid
[08:06:36] [PASSED] downscaling_invalid
[08:06:36] ======= [PASSED] drm_test_check_invalid_plane_state ========
[08:06:36] ================ [PASSED] drm_plane_helper =================
[08:06:36] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[08:06:36] ====== drm_test_connector_helper_tv_get_modes_check =======
[08:06:36] [PASSED] None
[08:06:36] [PASSED] PAL
[08:06:36] [PASSED] NTSC
[08:06:36] [PASSED] Both, NTSC Default
[08:06:36] [PASSED] Both, PAL Default
[08:06:36] [PASSED] Both, NTSC Default, with PAL on command-line
[08:06:36] [PASSED] Both, PAL Default, with NTSC on command-line
[08:06:36] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[08:06:36] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[08:06:36] ================== drm_rect (9 subtests) ===================
[08:06:36] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[08:06:36] [PASSED] drm_test_rect_clip_scaled_not_clipped
[08:06:36] [PASSED] drm_test_rect_clip_scaled_clipped
[08:06:36] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[08:06:36] ================= drm_test_rect_intersect =================
[08:06:36] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[08:06:36] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[08:06:36] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[08:06:36] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[08:06:36] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[08:06:36] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[08:06:36] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[08:06:36] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[08:06:36] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[08:06:36] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[08:06:36] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[08:06:36] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[08:06:36] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[08:06:36] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[08:06:36] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[08:06:36] ============= [PASSED] drm_test_rect_intersect =============
[08:06:36] ================ drm_test_rect_calc_hscale ================
[08:06:36] [PASSED] normal use
[08:06:36] [PASSED] out of max range
[08:06:36] [PASSED] out of min range
[08:06:36] [PASSED] zero dst
[08:06:36] [PASSED] negative src
[08:06:36] [PASSED] negative dst
[08:06:36] ============ [PASSED] drm_test_rect_calc_hscale ============
[08:06:36] ================ drm_test_rect_calc_vscale ================
[08:06:36] [PASSED] normal use
[08:06:36] [PASSED] out of max range
[08:06:36] [PASSED] out of min range
[08:06:36] [PASSED] zero dst
[08:06:36] [PASSED] negative src
[08:06:36] [PASSED] negative dst
[08:06:36] ============ [PASSED] drm_test_rect_calc_vscale ============
[08:06:36] ================== drm_test_rect_rotate ===================
[08:06:36] [PASSED] reflect-x
[08:06:36] [PASSED] reflect-y
[08:06:36] [PASSED] rotate-0
[08:06:36] [PASSED] rotate-90
[08:06:36] [PASSED] rotate-180
[08:06:36] [PASSED] rotate-270
[08:06:36] ============== [PASSED] drm_test_rect_rotate ===============
[08:06:36] ================ drm_test_rect_rotate_inv =================
[08:06:36] [PASSED] reflect-x
[08:06:36] [PASSED] reflect-y
[08:06:36] [PASSED] rotate-0
[08:06:36] [PASSED] rotate-90
[08:06:36] [PASSED] rotate-180
[08:06:36] [PASSED] rotate-270
[08:06:36] ============ [PASSED] drm_test_rect_rotate_inv =============
[08:06:36] ==================== [PASSED] drm_rect =====================
[08:06:36] ============ drm_sysfb_modeset_test (1 subtest) ============
[08:06:36] ============ drm_test_sysfb_build_fourcc_list =============
[08:06:36] [PASSED] no native formats
[08:06:36] [PASSED] XRGB8888 as native format
[08:06:36] [PASSED] remove duplicates
[08:06:36] [PASSED] convert alpha formats
[08:06:36] [PASSED] random formats
[08:06:36] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[08:06:36] ============= [PASSED] drm_sysfb_modeset_test ==============
[08:06:36] ================== drm_fixp (2 subtests) ===================
[08:06:36] [PASSED] drm_test_int2fixp
[08:06:36] [PASSED] drm_test_sm2fixp
[08:06:36] ==================== [PASSED] drm_fixp =====================
[08:06:36] ============================================================
[08:06:36] Testing complete. Ran 621 tests: passed: 621
[08:06:36] Elapsed time: 25.780s total, 1.739s configuring, 23.909s building, 0.131s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[08:06:36] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:06:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:06:47] Starting KUnit Kernel (1/1)...
[08:06:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:06:48] ================= ttm_device (5 subtests) ==================
[08:06:48] [PASSED] ttm_device_init_basic
[08:06:48] [PASSED] ttm_device_init_multiple
[08:06:48] [PASSED] ttm_device_fini_basic
[08:06:48] [PASSED] ttm_device_init_no_vma_man
[08:06:48] ================== ttm_device_init_pools ==================
[08:06:48] [PASSED] No DMA allocations, no DMA32 required
[08:06:48] [PASSED] DMA allocations, DMA32 required
[08:06:48] [PASSED] No DMA allocations, DMA32 required
[08:06:48] [PASSED] DMA allocations, no DMA32 required
[08:06:48] ============== [PASSED] ttm_device_init_pools ==============
[08:06:48] =================== [PASSED] ttm_device ====================
[08:06:48] ================== ttm_pool (8 subtests) ===================
[08:06:48] ================== ttm_pool_alloc_basic ===================
[08:06:48] [PASSED] One page
[08:06:48] [PASSED] More than one page
[08:06:48] [PASSED] Above the allocation limit
[08:06:48] [PASSED] One page, with coherent DMA mappings enabled
[08:06:48] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:06:48] ============== [PASSED] ttm_pool_alloc_basic ===============
[08:06:48] ============== ttm_pool_alloc_basic_dma_addr ==============
[08:06:48] [PASSED] One page
[08:06:48] [PASSED] More than one page
[08:06:48] [PASSED] Above the allocation limit
[08:06:48] [PASSED] One page, with coherent DMA mappings enabled
[08:06:48] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:06:48] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[08:06:48] [PASSED] ttm_pool_alloc_order_caching_match
[08:06:48] [PASSED] ttm_pool_alloc_caching_mismatch
[08:06:48] [PASSED] ttm_pool_alloc_order_mismatch
[08:06:48] [PASSED] ttm_pool_free_dma_alloc
[08:06:48] [PASSED] ttm_pool_free_no_dma_alloc
[08:06:48] [PASSED] ttm_pool_fini_basic
[08:06:48] ==================== [PASSED] ttm_pool =====================
[08:06:48] ================ ttm_resource (8 subtests) =================
[08:06:48] ================= ttm_resource_init_basic =================
[08:06:48] [PASSED] Init resource in TTM_PL_SYSTEM
[08:06:48] [PASSED] Init resource in TTM_PL_VRAM
[08:06:48] [PASSED] Init resource in a private placement
[08:06:48] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[08:06:48] ============= [PASSED] ttm_resource_init_basic =============
[08:06:48] [PASSED] ttm_resource_init_pinned
[08:06:48] [PASSED] ttm_resource_fini_basic
[08:06:48] [PASSED] ttm_resource_manager_init_basic
[08:06:48] [PASSED] ttm_resource_manager_usage_basic
[08:06:48] [PASSED] ttm_resource_manager_set_used_basic
[08:06:48] [PASSED] ttm_sys_man_alloc_basic
[08:06:48] [PASSED] ttm_sys_man_free_basic
[08:06:48] ================== [PASSED] ttm_resource ===================
[08:06:48] =================== ttm_tt (15 subtests) ===================
[08:06:48] ==================== ttm_tt_init_basic ====================
[08:06:48] [PASSED] Page-aligned size
[08:06:48] [PASSED] Extra pages requested
[08:06:48] ================ [PASSED] ttm_tt_init_basic ================
[08:06:48] [PASSED] ttm_tt_init_misaligned
[08:06:48] [PASSED] ttm_tt_fini_basic
[08:06:48] [PASSED] ttm_tt_fini_sg
[08:06:48] [PASSED] ttm_tt_fini_shmem
[08:06:48] [PASSED] ttm_tt_create_basic
[08:06:48] [PASSED] ttm_tt_create_invalid_bo_type
[08:06:48] [PASSED] ttm_tt_create_ttm_exists
[08:06:48] [PASSED] ttm_tt_create_failed
[08:06:48] [PASSED] ttm_tt_destroy_basic
[08:06:48] [PASSED] ttm_tt_populate_null_ttm
[08:06:48] [PASSED] ttm_tt_populate_populated_ttm
[08:06:48] [PASSED] ttm_tt_unpopulate_basic
[08:06:48] [PASSED] ttm_tt_unpopulate_empty_ttm
[08:06:48] [PASSED] ttm_tt_swapin_basic
[08:06:48] ===================== [PASSED] ttm_tt ======================
[08:06:48] =================== ttm_bo (14 subtests) ===================
[08:06:48] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[08:06:48] [PASSED] Cannot be interrupted and sleeps
[08:06:48] [PASSED] Cannot be interrupted, locks straight away
[08:06:48] [PASSED] Can be interrupted, sleeps
[08:06:48] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[08:06:48] [PASSED] ttm_bo_reserve_locked_no_sleep
[08:06:48] [PASSED] ttm_bo_reserve_no_wait_ticket
[08:06:48] [PASSED] ttm_bo_reserve_double_resv
[08:06:48] [PASSED] ttm_bo_reserve_interrupted
[08:06:48] [PASSED] ttm_bo_reserve_deadlock
[08:06:48] [PASSED] ttm_bo_unreserve_basic
[08:06:48] [PASSED] ttm_bo_unreserve_pinned
[08:06:48] [PASSED] ttm_bo_unreserve_bulk
[08:06:48] [PASSED] ttm_bo_fini_basic
[08:06:48] [PASSED] ttm_bo_fini_shared_resv
[08:06:48] [PASSED] ttm_bo_pin_basic
[08:06:48] [PASSED] ttm_bo_pin_unpin_resource
[08:06:48] [PASSED] ttm_bo_multiple_pin_one_unpin
[08:06:48] ===================== [PASSED] ttm_bo ======================
[08:06:48] ============== ttm_bo_validate (22 subtests) ===============
[08:06:48] ============== ttm_bo_init_reserved_sys_man ===============
[08:06:48] [PASSED] Buffer object for userspace
[08:06:48] [PASSED] Kernel buffer object
[08:06:48] [PASSED] Shared buffer object
[08:06:48] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[08:06:48] ============== ttm_bo_init_reserved_mock_man ==============
[08:06:48] [PASSED] Buffer object for userspace
[08:06:48] [PASSED] Kernel buffer object
[08:06:48] [PASSED] Shared buffer object
[08:06:48] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[08:06:48] [PASSED] ttm_bo_init_reserved_resv
[08:06:48] ================== ttm_bo_validate_basic ==================
[08:06:48] [PASSED] Buffer object for userspace
[08:06:48] [PASSED] Kernel buffer object
[08:06:48] [PASSED] Shared buffer object
[08:06:48] ============== [PASSED] ttm_bo_validate_basic ==============
[08:06:48] [PASSED] ttm_bo_validate_invalid_placement
[08:06:48] ============= ttm_bo_validate_same_placement ==============
[08:06:48] [PASSED] System manager
[08:06:48] [PASSED] VRAM manager
[08:06:48] ========= [PASSED] ttm_bo_validate_same_placement ==========
[08:06:48] [PASSED] ttm_bo_validate_failed_alloc
[08:06:48] [PASSED] ttm_bo_validate_pinned
[08:06:48] [PASSED] ttm_bo_validate_busy_placement
[08:06:48] ================ ttm_bo_validate_multihop =================
[08:06:48] [PASSED] Buffer object for userspace
[08:06:48] [PASSED] Kernel buffer object
[08:06:48] [PASSED] Shared buffer object
[08:06:48] ============ [PASSED] ttm_bo_validate_multihop =============
[08:06:48] ========== ttm_bo_validate_no_placement_signaled ==========
[08:06:48] [PASSED] Buffer object in system domain, no page vector
[08:06:48] [PASSED] Buffer object in system domain with an existing page vector
[08:06:48] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[08:06:48] ======== ttm_bo_validate_no_placement_not_signaled ========
[08:06:48] [PASSED] Buffer object for userspace
[08:06:48] [PASSED] Kernel buffer object
[08:06:48] [PASSED] Shared buffer object
[08:06:48] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[08:06:48] [PASSED] ttm_bo_validate_move_fence_signaled
[08:06:48] ========= ttm_bo_validate_move_fence_not_signaled =========
[08:06:48] [PASSED] Waits for GPU
[08:06:48] [PASSED] Tries to lock straight away
[08:06:48] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[08:06:48] [PASSED] ttm_bo_validate_swapout
[08:06:48] [PASSED] ttm_bo_validate_happy_evict
[08:06:48] [PASSED] ttm_bo_validate_all_pinned_evict
[08:06:48] [PASSED] ttm_bo_validate_allowed_only_evict
[08:06:48] [PASSED] ttm_bo_validate_deleted_evict
[08:06:48] [PASSED] ttm_bo_validate_busy_domain_evict
[08:06:48] [PASSED] ttm_bo_validate_evict_gutting
[08:06:48] [PASSED] ttm_bo_validate_recrusive_evict
[08:06:48] ================= [PASSED] ttm_bo_validate =================
[08:06:48] ============================================================
[08:06:48] Testing complete. Ran 102 tests: passed: 102
[08:06:48] Elapsed time: 11.590s total, 1.766s configuring, 9.558s building, 0.226s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915: crtc iteration cleanups (rev2)
2026-05-13 7:58 [RESEND 0/6] drm/i915: crtc iteration cleanups Jani Nikula
` (7 preceding siblings ...)
2026-05-13 8:07 ` ✓ CI.KUnit: success " Patchwork
@ 2026-05-13 9:46 ` Patchwork
8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-05-13 9:46 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1092 bytes --]
== Series Details ==
Series: drm/i915: crtc iteration cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/165524/
State : success
== Summary ==
CI Bug Log - changes from xe-5053-8fbb3d48e61c7e68cefdba85c3fa3ba59e7a93b4_BAT -> xe-pw-165524v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8907 -> IGT_8909
* Linux: xe-5053-8fbb3d48e61c7e68cefdba85c3fa3ba59e7a93b4 -> xe-pw-165524v2
IGT_8907: 6b305d78c65768c09cc7c0e902273bf409bbd218 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8909: e68d82b442e3909dd053c97542aeb029707124cf @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5053-8fbb3d48e61c7e68cefdba85c3fa3ba59e7a93b4: 8fbb3d48e61c7e68cefdba85c3fa3ba59e7a93b4
xe-pw-165524v2: 165524v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165524v2/index.html
[-- Attachment #2: Type: text/html, Size: 1654 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RESEND 1/6] drm/{i915, xe}: move xe_display_flush_cleanup_work() to i915 display
2026-05-13 7:58 ` [RESEND 1/6] drm/{i915, xe}: move xe_display_flush_cleanup_work() to i915 display Jani Nikula
@ 2026-05-13 12:09 ` Ville Syrjälä
2026-05-13 14:19 ` Jani Nikula
0 siblings, 1 reply; 17+ messages in thread
From: Ville Syrjälä @ 2026-05-13 12:09 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Wed, May 13, 2026 at 10:58:35AM +0300, Jani Nikula wrote:
> xe_display_flush_cleanup_work() is a bit of an oddball function in xe
> display code. There shouldn't be anything this specific or xe
> specific. While I'm not sure what the correct refactor for the function
> should be, move it to shared display code for starters, next to the
> eerily similar but slightly different intel_has_pending_fb_unpin() that
> is only called from i915 core.
>
> The main goal here is to unblock some refactors on
> for_each_intel_crtc().
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 21 +++++++++++++++
> drivers/gpu/drm/i915/display/intel_display.h | 1 +
> drivers/gpu/drm/xe/display/xe_display.c | 27 +++-----------------
> 3 files changed, 25 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index d5cf1476c7b9..50feca52b962 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -737,6 +737,27 @@ bool intel_has_pending_fb_unpin(struct intel_display *display)
> return false;
> }
>
> +void intel_display_flush_cleanup_work(struct intel_display *display)
> +{
> + struct intel_crtc *crtc;
> +
> + for_each_intel_crtc(display->drm, crtc) {
> + struct drm_crtc_commit *commit;
> +
> + spin_lock(&crtc->base.commit_lock);
> + commit = list_first_entry_or_null(&crtc->base.commit_list,
> + struct drm_crtc_commit, commit_entry);
> + if (commit)
> + drm_crtc_commit_get(commit);
> + spin_unlock(&crtc->base.commit_lock);
> +
> + if (commit) {
> + wait_for_completion(&commit->cleanup_done);
> + drm_crtc_commit_put(commit);
> + }
> + }
> +}
> +
> /*
> * Finds the encoder associated with the given CRTC. This can only be
> * used when we know that the CRTC isn't feeding multiple encoders!
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index a43ada0c0502..65f8c81a7bae 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -402,6 +402,7 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state);
> void i830_enable_pipe(struct intel_display *display, enum pipe pipe);
> void i830_disable_pipe(struct intel_display *display, enum pipe pipe);
> bool intel_has_pending_fb_unpin(struct intel_display *display);
> +void intel_display_flush_cleanup_work(struct intel_display *display);
> void intel_encoder_destroy(struct drm_encoder *encoder);
> struct drm_display_mode *
> intel_encoder_current_mode(struct intel_encoder *encoder);
> diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
> index aa73023b7398..ef27fdfdbab2 100644
> --- a/drivers/gpu/drm/xe/display/xe_display.c
> +++ b/drivers/gpu/drm/xe/display/xe_display.c
> @@ -258,27 +258,6 @@ static bool suspend_to_idle(void)
> return false;
> }
>
> -static void xe_display_flush_cleanup_work(struct xe_device *xe)
> -{
> - struct intel_crtc *crtc;
> -
> - for_each_intel_crtc(&xe->drm, crtc) {
> - struct drm_crtc_commit *commit;
> -
> - spin_lock(&crtc->base.commit_lock);
> - commit = list_first_entry_or_null(&crtc->base.commit_list,
> - struct drm_crtc_commit, commit_entry);
> - if (commit)
> - drm_crtc_commit_get(commit);
> - spin_unlock(&crtc->base.commit_lock);
> -
> - if (commit) {
> - wait_for_completion(&commit->cleanup_done);
> - drm_crtc_commit_put(commit);
> - }
> - }
> -}
> -
> static void xe_display_enable_d3cold(struct xe_device *xe)
> {
> struct intel_display *display = xe->display;
> @@ -292,7 +271,7 @@ static void xe_display_enable_d3cold(struct xe_device *xe)
> */
> intel_power_domains_disable(display);
>
> - xe_display_flush_cleanup_work(xe);
> + intel_display_flush_cleanup_work(display);
>
> intel_opregion_suspend(display, PCI_D3cold);
>
> @@ -347,7 +326,7 @@ void xe_display_pm_suspend(struct xe_device *xe)
> intel_display_driver_suspend(display);
> }
>
> - xe_display_flush_cleanup_work(xe);
> + intel_display_flush_cleanup_work(display);
intel_display_driver_suspend() already flushes the cleanup wq. So I
think this is doing nothing. The correct answer seems to be to nuke
the whole thing. We are missing the wq flush from the shutdown() path
in i915 however, so I suppose we should add it there.
>
> intel_encoder_block_all_hpds(display);
>
> @@ -379,7 +358,7 @@ void xe_display_pm_shutdown(struct xe_device *xe)
> intel_display_driver_suspend(display);
This should rather be the same atomic helper shutdown that i915 uses.
I guess what we want is a intel_display_driver_shutdown() to pair
up with intel_display_driver_suspend().
> }
>
> - xe_display_flush_cleanup_work(xe);
> + intel_display_flush_cleanup_work(display);
> intel_dp_mst_suspend(display);
> intel_encoder_block_all_hpds(display);
> intel_hpd_cancel_work(display);
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RESEND 3/6] drm/i915/display: always pass display->drm to for_each_intel_crtc*()
2026-05-13 7:58 ` [RESEND 3/6] drm/i915/display: always pass display->drm to for_each_intel_crtc*() Jani Nikula
@ 2026-05-13 12:22 ` Ville Syrjälä
0 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjälä @ 2026-05-13 12:22 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Wed, May 13, 2026 at 10:58:37AM +0300, Jani Nikula wrote:
> In preparation for always passing struct intel_display to
> for_each_intel_crtc*() family of iterators, start off by unifying their
> usage to always having struct intel_display *display around, and passing
> display->drm to them.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/i9xx_wm.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_plane.c | 3 ++-
> 3 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index 33d8f6b6afea..4cd07410ad72 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -3533,10 +3533,11 @@ static void ilk_pipe_wm_get_hw_state(struct intel_crtc *crtc)
>
> static int ilk_sanitize_watermarks_add_affected(struct drm_atomic_commit *state)
> {
> + struct intel_display *display = to_intel_display(state->dev);
> struct drm_plane *plane;
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(state->dev, crtc) {
> + for_each_intel_crtc(display->drm, crtc) {
> struct intel_crtc_state *crtc_state;
>
> crtc_state = intel_atomic_get_crtc_state(state, crtc);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 682a0514ec81..7126a88ca090 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5692,6 +5692,7 @@ int intel_modeset_commit_pipes(struct intel_display *display,
> */
> static int hsw_mode_set_planes_workaround(struct intel_atomic_state *state)
> {
> + struct intel_display *display = to_intel_display(state);
> struct intel_crtc_state *crtc_state;
> struct intel_crtc *crtc;
> struct intel_crtc_state *first_crtc_state = NULL;
> @@ -5719,7 +5720,7 @@ static int hsw_mode_set_planes_workaround(struct intel_atomic_state *state)
> return 0;
>
> /* w/a possibly needed, check how many crtc's are already enabled. */
> - for_each_intel_crtc(state->base.dev, crtc) {
> + for_each_intel_crtc(display->drm, crtc) {
> crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
> if (IS_ERR(crtc_state))
> return PTR_ERR(crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
> index a1f9558d53af..911ae261d1b5 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_plane.c
> @@ -1794,6 +1794,7 @@ static u8 intel_joiner_affected_planes(struct intel_atomic_state *state,
> static int intel_joiner_add_affected_planes(struct intel_atomic_state *state,
> u8 joined_pipes)
> {
> + struct intel_display *display = to_intel_display(state);
> u8 prev_affected_planes, affected_planes = 0;
>
> /*
> @@ -1811,7 +1812,7 @@ static int intel_joiner_add_affected_planes(struct intel_atomic_state *state,
> do {
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc_in_pipe_mask(state->base.dev, crtc, joined_pipes) {
> + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, joined_pipes) {
> int ret;
>
> ret = intel_crtc_add_planes_to_state(state, crtc, affected_planes);
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RESEND 4/6] drm/i915/display: pass struct intel_display to all for_each_intel_crtc*() macros
2026-05-13 7:58 ` [RESEND 4/6] drm/i915/display: pass struct intel_display to all for_each_intel_crtc*() macros Jani Nikula
@ 2026-05-13 12:22 ` Ville Syrjälä
0 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjälä @ 2026-05-13 12:22 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Wed, May 13, 2026 at 10:58:38AM +0300, Jani Nikula wrote:
> Now that the for_each_intel_crtc*() iterator macros primarily use
> display->pipe_list for iteration, it's more convenient to pass struct
> intel_display to them directly instead of struct drm_device. Make it so.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/i9xx_wm.c | 28 +++++++--------
> drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
> drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
> drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dbuf_bw.c | 2 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 36 +++++++++----------
> drivers/gpu/drm/i915/display/intel_display.h | 26 +++++++-------
> .../drm/i915/display/intel_display_debugfs.c | 6 ++--
> .../drm/i915/display/intel_display_power.c | 2 +-
> .../drm/i915/display/intel_display_trace.h | 6 ++--
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp_test.c | 2 +-
> .../gpu/drm/i915/display/intel_dp_tunnel.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 +-
> drivers/gpu/drm/i915/display/intel_drrs.c | 4 +--
> drivers/gpu/drm/i915/display/intel_fbdev.c | 6 ++--
> .../drm/i915/display/intel_fifo_underrun.c | 4 +--
> drivers/gpu/drm/i915/display/intel_flipq.c | 2 +-
> .../gpu/drm/i915/display/intel_global_state.c | 8 ++---
> .../drm/i915/display/intel_initial_plane.c | 4 +--
> drivers/gpu/drm/i915/display/intel_link_bw.c | 2 +-
> .../gpu/drm/i915/display/intel_load_detect.c | 2 +-
> .../drm/i915/display/intel_modeset_setup.c | 32 ++++++++---------
> drivers/gpu/drm/i915/display/intel_plane.c | 2 +-
> drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
> drivers/gpu/drm/i915/display/intel_tc.c | 2 +-
> drivers/gpu/drm/i915/display/skl_watermark.c | 16 ++++-----
> 29 files changed, 105 insertions(+), 105 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index 4cd07410ad72..19b61d4c1fae 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -640,7 +640,7 @@ static struct intel_crtc *single_enabled_crtc(struct intel_display *display)
> {
> struct intel_crtc *crtc, *enabled = NULL;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> if (intel_crtc_active(crtc)) {
> if (enabled)
> return NULL;
> @@ -1393,7 +1393,7 @@ static void g4x_merge_wm(struct intel_display *display,
> wm->hpll_en = true;
> wm->fbc_en = true;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> const struct g4x_wm_state *wm_state = &crtc->wm.active.g4x;
>
> if (!crtc->active)
> @@ -1415,7 +1415,7 @@ static void g4x_merge_wm(struct intel_display *display,
> wm->fbc_en = false;
> }
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> const struct g4x_wm_state *wm_state = &crtc->wm.active.g4x;
> enum pipe pipe = crtc->pipe;
>
> @@ -2034,7 +2034,7 @@ static void vlv_merge_wm(struct intel_display *display,
> wm->level = display->wm.num_levels - 1;
> wm->cxsr = true;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;
>
> if (!crtc->active)
> @@ -2053,7 +2053,7 @@ static void vlv_merge_wm(struct intel_display *display,
> if (num_active_pipes > 1)
> wm->level = VLV_WM_LEVEL_PM2;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;
> enum pipe pipe = crtc->pipe;
>
> @@ -3078,7 +3078,7 @@ static void ilk_merge_wm_level(struct intel_display *display,
>
> ret_wm->enable = true;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> const struct intel_pipe_wm *active = &crtc->wm.active.ilk;
> const struct intel_wm_level *wm = &active->wm[level];
>
> @@ -3218,7 +3218,7 @@ static void ilk_compute_wm_results(struct intel_display *display,
> }
>
> /* LP0 register values */
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> enum pipe pipe = crtc->pipe;
> const struct intel_pipe_wm *pipe_wm = &crtc->wm.active.ilk;
> const struct intel_wm_level *r = &pipe_wm->wm[0];
> @@ -3416,7 +3416,7 @@ static void ilk_compute_wm_config(struct intel_display *display,
> struct intel_crtc *crtc;
>
> /* Compute the currently _active_ config */
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> const struct intel_pipe_wm *wm = &crtc->wm.active.ilk;
>
> if (!wm->pipe_enabled)
> @@ -3537,7 +3537,7 @@ static int ilk_sanitize_watermarks_add_affected(struct drm_atomic_commit *state)
> struct drm_plane *plane;
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state;
>
> crtc_state = intel_atomic_get_crtc_state(state, crtc);
> @@ -3770,7 +3770,7 @@ static void g4x_wm_get_hw_state(struct intel_display *display)
>
> wm->cxsr = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> struct g4x_wm_state *active = &crtc->wm.active.g4x;
> @@ -3885,7 +3885,7 @@ static void g4x_wm_sanitize(struct intel_display *display)
> }
> }
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> int ret;
> @@ -3952,7 +3952,7 @@ static void vlv_wm_get_hw_state(struct intel_display *display)
> vlv_punit_put(display);
> }
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> struct vlv_wm_state *active = &crtc->wm.active.vlv;
> @@ -4034,7 +4034,7 @@ static void vlv_wm_sanitize(struct intel_display *display)
> }
> }
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> int ret;
> @@ -4075,7 +4075,7 @@ static void ilk_wm_get_hw_state(struct intel_display *display)
>
> ilk_init_lp_watermarks(display);
>
> - for_each_intel_crtc(display->drm, crtc)
> + for_each_intel_crtc(display, crtc)
> ilk_pipe_wm_get_hw_state(crtc);
>
> hw->wm_lp[0] = intel_de_read(display, WM1_LP_ILK);
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 9c3a9bbb49f6..bc8ad312ec15 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -1378,7 +1378,7 @@ void intel_bw_update_hw_state(struct intel_display *display)
>
> bw_state->pipe_sagv_reject = 0;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> const struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> enum pipe pipe = crtc->pipe;
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index a1bf01021d65..2fa7e8c3bb26 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -3647,7 +3647,7 @@ void intel_cdclk_update_hw_state(struct intel_display *display)
> cdclk_state->enabled_pipes = 0;
> cdclk_state->active_pipes = 0;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> const struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> enum pipe pipe = crtc->pipe;
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
> index 03de219f7a64..e8c5aa613587 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -55,7 +55,7 @@ struct intel_crtc *intel_crtc_for_pipe(struct intel_display *display,
> {
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> if (crtc->pipe == pipe)
> return crtc;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_dbuf_bw.c b/drivers/gpu/drm/i915/display/intel_dbuf_bw.c
> index 0562d4df6a07..1f38317b38bb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dbuf_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_dbuf_bw.c
> @@ -236,7 +236,7 @@ void intel_dbuf_bw_update_hw_state(struct intel_display *display)
> if (DISPLAY_VER(display) < 9)
> return;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> const struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index cd61ddb7f469..34e2b5ea9d0d 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3672,7 +3672,7 @@ void intel_ddi_update_active_dpll(struct intel_atomic_state *state,
> if (!intel_encoder_is_tc(encoder) || !display->dpll.mgr)
> return;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, pipe_crtc,
> + for_each_intel_crtc_in_pipe_mask(display, pipe_crtc,
> intel_crtc_joined_pipe_mask(crtc_state))
> intel_dpll_update_active(state, pipe_crtc, encoder);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 7126a88ca090..d224cefc988f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -717,7 +717,7 @@ bool intel_has_pending_fb_unpin(struct intel_display *display)
> struct intel_crtc *crtc;
> bool cleanup_done;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct drm_crtc_commit *commit;
> spin_lock(&crtc->base.commit_lock);
> commit = list_first_entry_or_null(&crtc->base.commit_list,
> @@ -741,7 +741,7 @@ void intel_display_flush_cleanup_work(struct intel_display *display)
> {
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct drm_crtc_commit *commit;
>
> spin_lock(&crtc->base.commit_lock);
> @@ -3526,7 +3526,7 @@ static void enabled_uncompressed_joiner_pipes(struct intel_display *display,
> if (!HAS_UNCOMPRESSED_JOINER(display))
> return;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc,
> + for_each_intel_crtc_in_pipe_mask(display, crtc,
> joiner_pipes(display)) {
> enum intel_display_power_domain power_domain;
> enum pipe pipe = crtc->pipe;
> @@ -3554,7 +3554,7 @@ static void enabled_bigjoiner_pipes(struct intel_display *display,
> if (!HAS_BIGJOINER(display))
> return;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc,
> + for_each_intel_crtc_in_pipe_mask(display, crtc,
> joiner_pipes(display)) {
> enum intel_display_power_domain power_domain;
> enum pipe pipe = crtc->pipe;
> @@ -3623,7 +3623,7 @@ static void enabled_ultrajoiner_pipes(struct intel_display *display,
> if (!HAS_ULTRAJOINER(display))
> return;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc,
> + for_each_intel_crtc_in_pipe_mask(display, crtc,
> joiner_pipes(display)) {
> enum intel_display_power_domain power_domain;
> enum pipe pipe = crtc->pipe;
> @@ -5577,7 +5577,7 @@ int intel_modeset_pipes_in_mask_early(struct intel_atomic_state *state,
> struct intel_display *display = to_intel_display(state);
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc, mask) {
> + for_each_intel_crtc_in_pipe_mask(display, crtc, mask) {
> struct intel_crtc_state *crtc_state;
> int ret;
>
> @@ -5624,7 +5624,7 @@ int intel_modeset_all_pipes_late(struct intel_atomic_state *state,
> struct intel_display *display = to_intel_display(state);
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state;
> int ret;
>
> @@ -5665,7 +5665,7 @@ int intel_modeset_commit_pipes(struct intel_display *display,
> state->acquire_ctx = ctx;
> to_intel_atomic_state(state)->internal = true;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {
> + for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) {
> struct intel_crtc_state *crtc_state =
> intel_atomic_get_crtc_state(state, crtc);
>
> @@ -5720,7 +5720,7 @@ static int hsw_mode_set_planes_workaround(struct intel_atomic_state *state)
> return 0;
>
> /* w/a possibly needed, check how many crtc's are already enabled. */
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
> if (IS_ERR(crtc_state))
> return PTR_ERR(crtc_state);
> @@ -5917,7 +5917,7 @@ static int intel_atomic_check_joiner(struct intel_atomic_state *state,
> return -EINVAL;
> }
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, secondary_crtc,
> + for_each_intel_crtc_in_pipe_mask(display, secondary_crtc,
> intel_crtc_joiner_secondary_pipes(primary_crtc_state)) {
> struct intel_crtc_state *secondary_crtc_state;
> int ret;
> @@ -5960,7 +5960,7 @@ static void kill_joiner_secondaries(struct intel_atomic_state *state,
> intel_atomic_get_new_crtc_state(state, primary_crtc);
> struct intel_crtc *secondary_crtc;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, secondary_crtc,
> + for_each_intel_crtc_in_pipe_mask(display, secondary_crtc,
> intel_crtc_joiner_secondary_pipes(primary_crtc_state)) {
> struct intel_crtc_state *secondary_crtc_state =
> intel_atomic_get_new_crtc_state(state, secondary_crtc);
> @@ -6259,13 +6259,13 @@ static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state)
> modeset_pipes |= crtc_state->joiner_pipes;
> }
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc, affected_pipes) {
> + for_each_intel_crtc_in_pipe_mask(display, crtc, affected_pipes) {
> crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
> if (IS_ERR(crtc_state))
> return PTR_ERR(crtc_state);
> }
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc, modeset_pipes) {
> + for_each_intel_crtc_in_pipe_mask(display, crtc, modeset_pipes) {
> int ret;
>
> crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
> @@ -6750,7 +6750,7 @@ static void intel_enable_crtc(struct intel_atomic_state *state,
> if (!intel_crtc_needs_modeset(new_crtc_state))
> return;
>
> - for_each_intel_crtc_in_pipe_mask_reverse(display->drm, pipe_crtc,
> + for_each_intel_crtc_in_pipe_mask_reverse(display, pipe_crtc,
> intel_crtc_joined_pipe_mask(new_crtc_state)) {
> const struct intel_crtc_state *pipe_crtc_state =
> intel_atomic_get_new_crtc_state(state, pipe_crtc);
> @@ -6888,7 +6888,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
> * We need to disable pipe CRC before disabling the pipe,
> * or we race against vblank off.
> */
> - for_each_intel_crtc_in_pipe_mask(display->drm, pipe_crtc,
> + for_each_intel_crtc_in_pipe_mask(display, pipe_crtc,
> intel_crtc_joined_pipe_mask(old_crtc_state))
> intel_crtc_disable_pipe_crc(pipe_crtc);
>
> @@ -6896,7 +6896,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
>
> display->modeset.funcs->crtc_disable(state, crtc);
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, pipe_crtc,
> + for_each_intel_crtc_in_pipe_mask(display, pipe_crtc,
> intel_crtc_joined_pipe_mask(old_crtc_state)) {
> const struct intel_crtc_state *new_pipe_crtc_state =
> intel_atomic_get_new_crtc_state(state, pipe_crtc);
> @@ -7808,7 +7808,7 @@ static u32 intel_encoder_possible_crtcs(struct intel_encoder *encoder)
> struct intel_crtc *crtc;
> u32 possible_crtcs = 0;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc, encoder->pipe_mask)
> + for_each_intel_crtc_in_pipe_mask(display, crtc, encoder->pipe_mask)
> possible_crtcs |= drm_crtc_mask(&crtc->base);
>
> return possible_crtcs;
> @@ -8301,7 +8301,7 @@ int intel_initial_commit(struct intel_display *display)
> to_intel_atomic_state(state)->internal = true;
>
> retry:
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> intel_atomic_get_crtc_state(state, crtc);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 65f8c81a7bae..a3e0def4adb0 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -212,22 +212,22 @@ enum phy_fia {
> base.head) \
> for_each_if((intel_plane)->pipe == (intel_crtc)->pipe)
>
> -#define for_each_intel_crtc(dev, crtc) \
> +#define for_each_intel_crtc(display, crtc) \
> list_for_each_entry((crtc), \
> - &to_intel_display(dev)->pipe_list, \
> + &(display)->pipe_list, \
> pipe_head)
>
> -#define for_each_intel_crtc_reverse(dev, crtc) \
> +#define for_each_intel_crtc_reverse(display, crtc) \
> list_for_each_entry_reverse((crtc), \
> - &to_intel_display(dev)->pipe_list, \
> + &(display)->pipe_list, \
> pipe_head)
>
> -#define for_each_intel_crtc_in_pipe_mask(dev, crtc, pipe_mask) \
> - for_each_intel_crtc((dev), (crtc)) \
> +#define for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) \
> + for_each_intel_crtc((display), (crtc)) \
> for_each_if((pipe_mask) & BIT((crtc)->pipe))
>
> -#define for_each_intel_crtc_in_pipe_mask_reverse(dev, crtc, pipe_mask) \
> - for_each_intel_crtc_reverse((dev), (crtc)) \
> +#define for_each_intel_crtc_in_pipe_mask_reverse(display, crtc, pipe_mask) \
> + for_each_intel_crtc_reverse((display), (crtc)) \
> for_each_if((pipe_mask) & BIT((crtc)->pipe))
>
> #define for_each_intel_encoder(dev, intel_encoder) \
> @@ -288,28 +288,28 @@ enum phy_fia {
> for_each_if(plane)
>
> #define for_each_old_intel_crtc_in_state(__state, crtc, old_crtc_state, __i) \
> - for_each_intel_crtc((__state)->base.dev, (crtc)) \
> + for_each_intel_crtc(to_intel_display(__state), (crtc)) \
> for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
> (old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc))))
>
> #define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state, __i) \
> - for_each_intel_crtc((__state)->base.dev, (crtc)) \
> + for_each_intel_crtc(to_intel_display(__state), (crtc)) \
> for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
> (new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
>
> #define for_each_new_intel_crtc_in_state_reverse(__state, crtc, new_crtc_state, __i) \
> - for_each_intel_crtc_reverse((__state)->base.dev, (crtc)) \
> + for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
> for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
> (new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
>
> #define for_each_oldnew_intel_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state, __i) \
> - for_each_intel_crtc((__state)->base.dev, (crtc)) \
> + for_each_intel_crtc(to_intel_display(__state), (crtc)) \
> for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
> (old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
> (new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
>
> #define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
> - for_each_intel_crtc_reverse((__state)->base.dev, (crtc)) \
> + for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
> for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
> (old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
> (new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 81bef000a4e3..b2a745733182 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -606,7 +606,7 @@ static int i915_display_info(struct seq_file *m, void *unused)
>
> seq_printf(m, "CRTC info\n");
> seq_printf(m, "---------\n");
> - for_each_intel_crtc(display->drm, crtc)
> + for_each_intel_crtc(display, crtc)
> intel_crtc_info(m, crtc);
>
> seq_printf(m, "\n");
> @@ -664,7 +664,7 @@ static int i915_ddb_info(struct seq_file *m, void *unused)
>
> seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> enum pipe pipe = crtc->pipe;
> @@ -771,7 +771,7 @@ i915_fifo_underrun_reset_write(struct file *filp,
> if (!reset)
> return cnt;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct drm_crtc_commit *commit;
> struct intel_crtc_state *crtc_state;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 80ecf373fb19..737ec400ab29 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1203,7 +1203,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
> {
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc)
> + for_each_intel_crtc(display, crtc)
> INTEL_DISPLAY_STATE_WARN(display, crtc->active,
> "CRTC for pipe %c enabled\n",
> pipe_name(crtc->pipe));
> diff --git a/drivers/gpu/drm/i915/display/intel_display_trace.h b/drivers/gpu/drm/i915/display/intel_display_trace.h
> index 27ebc32cb61a..504d105935bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_trace.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_trace.h
> @@ -84,7 +84,7 @@ TRACE_EVENT(intel_pipe_enable,
> sizeof(__entry->frame[0]) * I915_MAX_PIPES);
> memset(__entry->scanline, 0,
> sizeof(__entry->scanline[0]) * I915_MAX_PIPES);
> - for_each_intel_crtc(display->drm, it__) {
> + for_each_intel_crtc(display, it__) {
> __entry->frame[it__->pipe] = intel_crtc_get_vblank_counter(it__);
> __entry->scanline[it__->pipe] = intel_get_crtc_scanline(it__);
> }
> @@ -114,7 +114,7 @@ TRACE_EVENT(intel_pipe_disable,
> sizeof(__entry->frame[0]) * I915_MAX_PIPES);
> memset(__entry->scanline, 0,
> sizeof(__entry->scanline[0]) * I915_MAX_PIPES);
> - for_each_intel_crtc(display->drm, it__) {
> + for_each_intel_crtc(display, it__) {
> __entry->frame[it__->pipe] = intel_crtc_get_vblank_counter(it__);
> __entry->scanline[it__->pipe] = intel_get_crtc_scanline(it__);
> }
> @@ -244,7 +244,7 @@ TRACE_EVENT(intel_memory_cxsr,
> sizeof(__entry->frame[0]) * I915_MAX_PIPES);
> memset(__entry->scanline, 0,
> sizeof(__entry->scanline[0]) * I915_MAX_PIPES);
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> __entry->frame[crtc->pipe] = intel_crtc_get_vblank_counter(crtc);
> __entry->scanline[crtc->pipe] = intel_get_crtc_scanline(crtc);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 2151766546e6..25d93b2468fa 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -6751,7 +6751,7 @@ static int intel_modeset_affected_transcoders(struct intel_atomic_state *state,
> if (transcoders == 0)
> return 0;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state;
> int ret;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 8f73e01db17c..be8febe3d234 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -837,7 +837,7 @@ static int intel_dp_mst_check_dsc_change(struct intel_atomic_state *state,
>
> mst_pipe_mask = get_pipes_downstream_of_mst_port(state, mst_mgr, NULL);
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc, mst_pipe_mask) {
> + for_each_intel_crtc_in_pipe_mask(display, crtc, mst_pipe_mask) {
> struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_test.c b/drivers/gpu/drm/i915/display/intel_dp_test.c
> index 5cfa1dd411da..ba44769c9cfb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_test.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_test.c
> @@ -471,7 +471,7 @@ static int intel_dp_do_phy_test(struct intel_encoder *encoder,
> drm_dbg_kms(display->drm, "[ENCODER:%d:%s] PHY test\n",
> encoder->base.base.id, encoder->base.name);
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {
> + for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) {
> const struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> index 11712a151f72..10d47faa6996 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> @@ -146,7 +146,7 @@ static int allocate_initial_tunnel_bw_for_pipes(struct intel_dp *intel_dp, u8 pi
> int tunnel_bw = 0;
> int err;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {
> + for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) {
> const struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> int stream_bw = intel_dp_config_required_rate(crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index a9d88cecb338..f88536879ca9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -4965,7 +4965,7 @@ static void readout_dpll_hw_state(struct intel_display *display,
> pll->wakeref = intel_display_power_get(display, pll->info->power_domain);
>
> pll->state.pipe_mask = 0;
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
> index 0fdb32ef241c..6c95d4ae1ea9 100644
> --- a/drivers/gpu/drm/i915/display/intel_drrs.c
> +++ b/drivers/gpu/drm/i915/display/intel_drrs.c
> @@ -137,7 +137,7 @@ static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *c
>
> frontbuffer_bits = INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc,
> + for_each_intel_crtc_in_pipe_mask(display, crtc,
> crtc_state->joiner_pipes)
> frontbuffer_bits |= INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);
>
> @@ -227,7 +227,7 @@ static void intel_drrs_frontbuffer_update(struct intel_display *display,
> {
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> unsigned int frontbuffer_bits;
>
> mutex_lock(&crtc->drrs.mutex);
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
> index df1d3d9dc3e5..c8d4e3a5ce6b 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
> @@ -380,7 +380,7 @@ static bool intel_fbdev_init_bios(struct intel_display *display,
> unsigned int max_size = 0;
>
> /* Find the largest fb */
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> struct intel_plane *plane =
> @@ -419,7 +419,7 @@ static bool intel_fbdev_init_bios(struct intel_display *display,
> }
>
> /* Now make sure all the pipes will fit into it */
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> struct intel_plane *plane =
> @@ -489,7 +489,7 @@ static bool intel_fbdev_init_bios(struct intel_display *display,
> drm_framebuffer_get(&ifbdev->fb->base);
>
> /* Final pass to check if any active pipes don't have fbs */
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> struct intel_plane *plane =
> diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> index bf047180def9..8176976f15f6 100644
> --- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> +++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> @@ -527,7 +527,7 @@ void intel_check_cpu_fifo_underruns(struct intel_display *display)
>
> spin_lock_irq(&display->irq.lock);
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> if (crtc->cpu_fifo_underrun_disabled)
> continue;
>
> @@ -554,7 +554,7 @@ void intel_check_pch_fifo_underruns(struct intel_display *display)
>
> spin_lock_irq(&display->irq.lock);
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> if (crtc->pch_fifo_underrun_disabled)
> continue;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_flipq.c b/drivers/gpu/drm/i915/display/intel_flipq.c
> index 333d28faf4ca..bf278f60bba7 100644
> --- a/drivers/gpu/drm/i915/display/intel_flipq.c
> +++ b/drivers/gpu/drm/i915/display/intel_flipq.c
> @@ -132,7 +132,7 @@ void intel_flipq_init(struct intel_display *display)
>
> intel_dmc_wait_fw_load(display);
>
> - for_each_intel_crtc(display->drm, crtc)
> + for_each_intel_crtc(display, crtc)
> intel_flipq_crtc_init(crtc);
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_global_state.c b/drivers/gpu/drm/i915/display/intel_global_state.c
> index 9e1369c834e4..886caf29c9ae 100644
> --- a/drivers/gpu/drm/i915/display/intel_global_state.c
> +++ b/drivers/gpu/drm/i915/display/intel_global_state.c
> @@ -140,7 +140,7 @@ static void assert_global_state_write_locked(struct intel_display *display)
> {
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc)
> + for_each_intel_crtc(display, crtc)
> drm_modeset_lock_assert_held(&crtc->base.mutex);
> }
>
> @@ -163,7 +163,7 @@ static void assert_global_state_read_locked(struct intel_atomic_state *state)
> struct drm_modeset_acquire_ctx *ctx = state->base.acquire_ctx;
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> if (modeset_lock_is_held(ctx, &crtc->base.mutex))
> return;
> }
> @@ -301,7 +301,7 @@ int intel_atomic_lock_global_state(struct intel_global_state *obj_state)
> struct intel_display *display = to_intel_display(state);
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> int ret;
>
> ret = drm_modeset_lock(&crtc->base.mutex,
> @@ -334,7 +334,7 @@ intel_atomic_global_state_is_serialized(struct intel_atomic_state *state)
> struct intel_display *display = to_intel_display(state);
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc)
> + for_each_intel_crtc(display, crtc)
> if (!intel_atomic_get_new_crtc_state(state, crtc))
> return false;
> return true;
> diff --git a/drivers/gpu/drm/i915/display/intel_initial_plane.c b/drivers/gpu/drm/i915/display/intel_initial_plane.c
> index 034fe199c2a1..6aa253678ec9 100644
> --- a/drivers/gpu/drm/i915/display/intel_initial_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_initial_plane.c
> @@ -50,7 +50,7 @@ intel_reuse_initial_plane_obj(struct intel_crtc *this,
> struct intel_display *display = to_intel_display(this);
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_plane *plane =
> to_intel_plane(crtc->base.primary);
> const struct intel_plane_state *plane_state =
> @@ -208,7 +208,7 @@ void intel_initial_plane_config(struct intel_display *display)
> struct intel_initial_plane_configs all_plane_configs = {};
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> const struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> struct intel_initial_plane_config *plane_config =
> diff --git a/drivers/gpu/drm/i915/display/intel_link_bw.c b/drivers/gpu/drm/i915/display/intel_link_bw.c
> index d2862de894fa..b47474a3e9fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_link_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_link_bw.c
> @@ -108,7 +108,7 @@ static int __intel_link_bw_reduce_bpp(struct intel_atomic_state *state,
> struct intel_crtc *crtc;
> int max_bpp_x16 = 0;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {
> + for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) {
> struct intel_crtc_state *crtc_state;
> int link_bpp_x16;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_load_detect.c b/drivers/gpu/drm/i915/display/intel_load_detect.c
> index 2f767b15a7f9..3fef1ebc6357 100644
> --- a/drivers/gpu/drm/i915/display/intel_load_detect.c
> +++ b/drivers/gpu/drm/i915/display/intel_load_detect.c
> @@ -89,7 +89,7 @@ intel_load_detect_get_pipe(struct drm_connector *connector,
> }
>
> /* Find an unused one (if possible) */
> - for_each_intel_crtc(display->drm, possible_crtc) {
> + for_each_intel_crtc(display, possible_crtc) {
> if (!(encoder->base.possible_crtcs &
> drm_crtc_mask(&possible_crtc->base)))
> continue;
> diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> index e88082c8caac..ea6459ef495a 100644
> --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> @@ -71,7 +71,7 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc,
> to_intel_atomic_state(state)->internal = true;
>
> /* Everything's already locked, -EDEADLK can't happen. */
> - for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc,
> + for_each_intel_crtc_in_pipe_mask(display, temp_crtc,
> BIT(pipe) |
> intel_crtc_joiner_secondary_pipes(crtc_state)) {
> struct intel_crtc_state *temp_crtc_state =
> @@ -192,7 +192,7 @@ static u8 get_transcoder_pipes(struct intel_display *display,
> struct intel_crtc *temp_crtc;
> u8 pipes = 0;
>
> - for_each_intel_crtc(display->drm, temp_crtc) {
> + for_each_intel_crtc(display, temp_crtc) {
> struct intel_crtc_state *temp_crtc_state =
> to_intel_crtc_state(temp_crtc->base.state);
>
> @@ -248,7 +248,7 @@ static u8 get_joiner_secondary_pipes(struct intel_display *display, u8 primary_p
> struct intel_crtc *primary_crtc;
> u8 pipes = 0;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, primary_crtc, primary_pipes_mask) {
> + for_each_intel_crtc_in_pipe_mask(display, primary_crtc, primary_pipes_mask) {
> struct intel_crtc_state *primary_crtc_state =
> to_intel_crtc_state(primary_crtc->base.state);
>
> @@ -278,16 +278,16 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc,
> portsync_master_mask & joiner_secondaries_mask ||
> portsync_slaves_mask & joiner_secondaries_mask);
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc, joiner_secondaries_mask)
> + for_each_intel_crtc_in_pipe_mask(display, temp_crtc, joiner_secondaries_mask)
> intel_crtc_disable_noatomic_begin(temp_crtc, ctx);
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc, portsync_slaves_mask)
> + for_each_intel_crtc_in_pipe_mask(display, temp_crtc, portsync_slaves_mask)
> intel_crtc_disable_noatomic_begin(temp_crtc, ctx);
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc, portsync_master_mask)
> + for_each_intel_crtc_in_pipe_mask(display, temp_crtc, portsync_master_mask)
> intel_crtc_disable_noatomic_begin(temp_crtc, ctx);
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc,
> + for_each_intel_crtc_in_pipe_mask(display, temp_crtc,
> joiner_secondaries_mask |
> portsync_slaves_mask |
> portsync_master_mask)
> @@ -376,7 +376,7 @@ intel_sanitize_plane_mapping(struct intel_display *display)
> if (DISPLAY_VER(display) >= 4)
> return;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_plane *plane =
> to_intel_plane(crtc->base.primary);
> struct intel_crtc *plane_crtc;
> @@ -532,7 +532,7 @@ static void intel_sanitize_all_crtcs(struct intel_display *display,
> for (;;) {
> u32 old_mask = crtcs_forced_off;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> u32 crtc_mask = drm_crtc_mask(&crtc->base);
>
> if (crtcs_forced_off & crtc_mask)
> @@ -545,7 +545,7 @@ static void intel_sanitize_all_crtcs(struct intel_display *display,
> break;
> }
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
>
> @@ -681,7 +681,7 @@ static void readout_plane_state(struct intel_display *display)
> str_enabled_disabled(visible), pipe_name(pipe));
> }
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
>
> @@ -699,7 +699,7 @@ static void intel_modeset_readout_hw_state(struct intel_display *display)
> struct intel_connector *connector;
> struct drm_connector_list_iter conn_iter;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
>
> @@ -741,7 +741,7 @@ static void intel_modeset_readout_hw_state(struct intel_display *display)
> /* encoder should read be linked to joiner primary */
> WARN_ON(intel_crtc_is_joiner_secondary(crtc_state));
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, secondary_crtc,
> + for_each_intel_crtc_in_pipe_mask(display, secondary_crtc,
> intel_crtc_joiner_secondary_pipes(crtc_state)) {
> struct intel_crtc_state *secondary_crtc_state;
>
> @@ -814,7 +814,7 @@ static void intel_modeset_readout_hw_state(struct intel_display *display)
> }
> drm_connector_list_iter_end(&conn_iter);
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> struct intel_plane *plane;
> @@ -961,7 +961,7 @@ void intel_modeset_setup_hw_state(struct intel_display *display,
> * intel_sanitize_plane_mapping() may need to do vblank
> * waits, so we need vblank interrupts restored beforehand.
> */
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
>
> @@ -997,7 +997,7 @@ void intel_modeset_setup_hw_state(struct intel_display *display,
> intel_wm_get_hw_state(display);
> intel_wm_sanitize(display);
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> struct intel_power_domain_mask put_domains;
> diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
> index 911ae261d1b5..e191a57f02cd 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_plane.c
> @@ -1812,7 +1812,7 @@ static int intel_joiner_add_affected_planes(struct intel_atomic_state *state,
> do {
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc, joined_pipes) {
> + for_each_intel_crtc_in_pipe_mask(display, crtc, joined_pipes) {
> int ret;
>
> ret = intel_crtc_add_planes_to_state(state, crtc, affected_planes);
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 9958230a3dd9..cd7944b67b59 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1868,7 +1868,7 @@ void intel_psr_set_non_psr_pipes(struct intel_dp *intel_dp,
> return;
>
> /* We ignore possible secondary PSR/Panel Replay capable eDP */
> - for_each_intel_crtc(display->drm, crtc)
> + for_each_intel_crtc(display, crtc)
> active_pipes |= crtc->active ? BIT(crtc->pipe) : 0;
>
> active_pipes = intel_calc_active_pipes(state, active_pipes);
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index fc0d470fe949..c620cfa8fe06 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -1779,7 +1779,7 @@ static int reset_link_commit(struct intel_tc_port *tc,
> if (!pipe_mask)
> return 0;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {
> + for_each_intel_crtc_in_pipe_mask(display, crtc, pipe_mask) {
> struct intel_crtc_state *crtc_state;
>
> crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 96d2dcbe7bbc..346e97d91d92 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -2529,7 +2529,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
> }
> }
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> enum pipe pipe = crtc->pipe;
>
> new_dbuf_state->slices[pipe] =
> @@ -2574,7 +2574,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
> return ret;
> }
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> ret = skl_crtc_allocate_ddb(state, crtc);
> if (ret)
> return ret;
> @@ -2845,7 +2845,7 @@ static int pkgc_max_linetime(struct intel_atomic_state *state)
> }
>
> max_linetime = 0;
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> if (display->pkgc.disable[crtc->pipe])
> return 0;
>
> @@ -3033,7 +3033,7 @@ static void skl_wm_get_hw_state(struct intel_display *display)
> dbuf_state->mdclk_cdclk_ratio = intel_mdclk_cdclk_ratio(display, &display->cdclk.hw);
> dbuf_state->active_pipes = 0;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> enum pipe pipe = crtc->pipe;
> @@ -3446,7 +3446,7 @@ static void pipe_mbus_dbox_ctl_update(struct intel_display *display,
> {
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc_in_pipe_mask(display->drm, crtc, dbuf_state->active_pipes)
> + for_each_intel_crtc_in_pipe_mask(display, crtc, dbuf_state->active_pipes)
> intel_de_write(display, PIPE_MBUS_DBOX_CTL(crtc->pipe),
> pipe_mbus_dbox_ctl(crtc, dbuf_state));
> }
> @@ -3758,14 +3758,14 @@ static bool skl_dbuf_is_misconfigured(struct intel_display *display)
> struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
> struct intel_crtc *crtc;
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> const struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
>
> entries[crtc->pipe] = crtc_state->wm.skl.ddb;
> }
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> const struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> u8 slices;
> @@ -3803,7 +3803,7 @@ static void skl_dbuf_sanitize(struct intel_display *display)
>
> drm_dbg_kms(display->drm, "BIOS has misprogrammed the DBUF, disabling all planes\n");
>
> - for_each_intel_crtc(display->drm, crtc) {
> + for_each_intel_crtc(display, crtc) {
> struct intel_plane *plane = to_intel_plane(crtc->base.primary);
> const struct intel_plane_state *plane_state =
> to_intel_plane_state(plane->base.state);
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RESEND 5/6] drm/i915/display: stop passing i to for_each_*_intel_crtc_in_state() macros
2026-05-13 7:58 ` [RESEND 5/6] drm/i915/display: stop passing i to for_each_*_intel_crtc_in_state() macros Jani Nikula
@ 2026-05-13 12:22 ` Ville Syrjälä
0 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjälä @ 2026-05-13 12:22 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Wed, May 13, 2026 at 10:58:39AM +0300, Jani Nikula wrote:
> None of the for_each_*_intel_crtc_in_state() macros or their users
> actually need the CRTC index i variable anymore. Remove them.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/i9xx_wm.c | 3 +-
> drivers/gpu/drm/i915/display/intel_atomic.c | 3 +-
> drivers/gpu/drm/i915/display/intel_bw.c | 9 +-
> drivers/gpu/drm/i915/display/intel_cdclk.c | 12 +-
> drivers/gpu/drm/i915/display/intel_crtc.c | 11 +-
> drivers/gpu/drm/i915/display/intel_dbuf_bw.c | 5 +-
> drivers/gpu/drm/i915/display/intel_display.c | 115 +++++++-----------
> drivers/gpu/drm/i915/display/intel_display.h | 25 ++--
> .../gpu/drm/i915/display/intel_dp_tunnel.c | 6 +-
> drivers/gpu/drm/i915/display/intel_fdi.c | 3 +-
> drivers/gpu/drm/i915/display/intel_plane.c | 6 +-
> drivers/gpu/drm/i915/display/intel_pmdemand.c | 6 +-
> drivers/gpu/drm/i915/display/intel_vrr.c | 4 +-
> drivers/gpu/drm/i915/display/skl_watermark.c | 22 ++--
> 14 files changed, 89 insertions(+), 141 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index 19b61d4c1fae..86d1c9f7f0ff 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -3582,7 +3582,6 @@ void ilk_wm_sanitize(struct intel_display *display)
> struct intel_crtc_state *crtc_state;
> struct drm_modeset_acquire_ctx ctx;
> int ret;
> - int i;
>
> /* Only supported on platforms that use atomic watermark design */
> if (!display->wm.funcs->optimize_watermarks)
> @@ -3620,7 +3619,7 @@ void ilk_wm_sanitize(struct intel_display *display)
> goto fail;
>
> /* Write calculated watermark values back */
> - for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state) {
> crtc_state->wm.need_postvbl_update = true;
> intel_optimize_watermarks(intel_state, crtc);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
> index 38bbd6964d8e..0e4f0678c53c 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic.c
> @@ -200,9 +200,8 @@ bool intel_any_crtc_needs_modeset(struct intel_atomic_state *state)
> {
> struct intel_crtc *crtc;
> struct intel_crtc_state *crtc_state;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> if (intel_crtc_needs_modeset(crtc_state))
> return true;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index bc8ad312ec15..d4f991d0b25b 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -1219,10 +1219,8 @@ static int intel_bw_check_data_rate(struct intel_atomic_state *state, bool *chan
> struct intel_display *display = to_intel_display(state);
> const struct intel_crtc_state *new_crtc_state, *old_crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> unsigned int old_data_rate =
> intel_crtc_bw_data_rate(old_crtc_state);
> unsigned int new_data_rate =
> @@ -1268,10 +1266,9 @@ static int intel_bw_check_sagv_mask(struct intel_atomic_state *state)
> const struct intel_bw_state *old_bw_state = NULL;
> struct intel_bw_state *new_bw_state = NULL;
> struct intel_crtc *crtc;
> - int ret, i;
> + int ret;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> if (intel_crtc_can_enable_sagv(old_crtc_state) ==
> intel_crtc_can_enable_sagv(new_crtc_state))
> continue;
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 2fa7e8c3bb26..189ae2d3cfc9 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -3124,10 +3124,9 @@ static int bxt_compute_min_voltage_level(struct intel_atomic_state *state)
> struct intel_crtc *crtc;
> struct intel_crtc_state *crtc_state;
> u8 min_voltage_level;
> - int i;
> enum pipe pipe;
>
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> int ret;
>
> if (crtc_state->hw.enable)
> @@ -3219,13 +3218,13 @@ static int skl_dpll0_vco(struct intel_atomic_state *state)
> intel_atomic_get_new_cdclk_state(state);
> struct intel_crtc *crtc;
> struct intel_crtc_state *crtc_state;
> - int vco, i;
> + int vco;
>
> vco = cdclk_state->logical.vco;
> if (!vco)
> vco = display->cdclk.skl_preferred_vco_freq;
>
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> if (!crtc_state->hw.enable)
> continue;
>
> @@ -3424,10 +3423,9 @@ static int intel_crtcs_calc_min_cdclk(struct intel_atomic_state *state,
> const struct intel_crtc_state *old_crtc_state;
> const struct intel_crtc_state *new_crtc_state;
> struct intel_crtc *crtc;
> - int i, ret;
> + int ret;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> ret = intel_cdclk_update_crtc_min_cdclk(state, crtc,
> old_crtc_state->min_cdclk,
> new_crtc_state->min_cdclk,
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
> index e8c5aa613587..295ad8417c68 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -534,9 +534,8 @@ void intel_wait_for_vblank_workers(struct intel_atomic_state *state)
> {
> struct intel_crtc_state *crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> if (!intel_crtc_needs_vblank_work(crtc_state))
> continue;
>
> @@ -828,10 +827,8 @@ bool intel_any_crtc_enable_changed(struct intel_atomic_state *state)
> {
> const struct intel_crtc_state *old_crtc_state, *new_crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> if (intel_crtc_enable_changed(old_crtc_state, new_crtc_state))
> return true;
> }
> @@ -849,10 +846,8 @@ bool intel_any_crtc_active_changed(struct intel_atomic_state *state)
> {
> const struct intel_crtc_state *old_crtc_state, *new_crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> if (intel_crtc_active_changed(old_crtc_state, new_crtc_state))
> return true;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_dbuf_bw.c b/drivers/gpu/drm/i915/display/intel_dbuf_bw.c
> index 1f38317b38bb..6cf674c586dc 100644
> --- a/drivers/gpu/drm/i915/display/intel_dbuf_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_dbuf_bw.c
> @@ -184,13 +184,12 @@ int intel_dbuf_bw_calc_min_cdclk(struct intel_atomic_state *state,
> const struct intel_crtc_state *old_crtc_state;
> const struct intel_crtc_state *new_crtc_state;
> struct intel_crtc *crtc;
> - int ret, i;
> + int ret;
>
> if (DISPLAY_VER(display) < 9)
> return 0;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> struct intel_dbuf_bw old_dbuf_bw, new_dbuf_bw;
>
> skl_crtc_calc_dbuf_bw(&old_dbuf_bw, old_crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index d224cefc988f..cf9afc90e301 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1316,14 +1316,13 @@ static void intel_encoders_update_prepare(struct intel_atomic_state *state)
> struct intel_display *display = to_intel_display(state);
> struct intel_crtc_state *new_crtc_state, *old_crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> /*
> * Make sure the DPLL state is up-to-date for fastset TypeC ports after non-blocking commits.
> * TODO: Update the DPLL state for all cases in the encoder->update_prepare() hook.
> */
> if (display->dpll.mgr) {
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> if (intel_crtc_needs_modeset(new_crtc_state))
> continue;
>
> @@ -5698,10 +5697,9 @@ static int hsw_mode_set_planes_workaround(struct intel_atomic_state *state)
> struct intel_crtc_state *first_crtc_state = NULL;
> struct intel_crtc_state *other_crtc_state = NULL;
> enum pipe first_pipe = INVALID_PIPE, enabled_pipe = INVALID_PIPE;
> - int i;
>
> /* look at all crtc's that are going to be enabled in during modeset */
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> if (!crtc_state->hw.active ||
> !intel_crtc_needs_modeset(crtc_state))
> continue;
> @@ -5751,9 +5749,8 @@ u8 intel_calc_enabled_pipes(struct intel_atomic_state *state,
> {
> const struct intel_crtc_state *crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> if (crtc_state->hw.enable)
> enabled_pipes |= BIT(crtc->pipe);
> else
> @@ -5768,9 +5765,8 @@ u8 intel_calc_active_pipes(struct intel_atomic_state *state,
> {
> const struct intel_crtc_state *crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> if (crtc_state->hw.active)
> active_pipes |= BIT(crtc->pipe);
> else
> @@ -5841,9 +5837,8 @@ static int intel_atomic_check_crtcs(struct intel_atomic_state *state)
> struct intel_display *display = to_intel_display(state);
> struct intel_crtc_state __maybe_unused *crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> int ret;
>
> ret = intel_crtc_atomic_check(state, crtc);
> @@ -5863,9 +5858,8 @@ static bool intel_cpu_transcoders_need_modeset(struct intel_atomic_state *state,
> {
> const struct intel_crtc_state *new_crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> if (new_crtc_state->hw.enable &&
> transcoders & BIT(new_crtc_state->cpu_transcoder) &&
> intel_crtc_needs_modeset(new_crtc_state))
> @@ -5880,9 +5874,8 @@ static bool intel_pipes_need_modeset(struct intel_atomic_state *state,
> {
> const struct intel_crtc_state *new_crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> if (new_crtc_state->hw.enable &&
> pipes & BIT(crtc->pipe) &&
> intel_crtc_needs_modeset(new_crtc_state))
> @@ -6253,7 +6246,7 @@ static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state)
> }
>
> /* Now pull in all joined crtcs */
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> affected_pipes |= crtc_state->joiner_pipes;
> if (intel_crtc_needs_modeset(crtc_state))
> modeset_pipes |= crtc_state->joiner_pipes;
> @@ -6281,7 +6274,7 @@ static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state)
> return ret;
> }
>
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> /* Kill old joiner link, we may re-establish afterwards */
> if (intel_crtc_needs_modeset(crtc_state) &&
> intel_crtc_is_joiner_primary(crtc_state))
> @@ -6299,7 +6292,6 @@ static int intel_atomic_check_config(struct intel_atomic_state *state,
> struct intel_crtc_state *new_crtc_state;
> struct intel_crtc *crtc;
> int ret;
> - int i;
>
> *failed_pipe = INVALID_PIPE;
>
> @@ -6311,7 +6303,7 @@ static int intel_atomic_check_config(struct intel_atomic_state *state,
> if (ret)
> return ret;
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> if (!intel_crtc_needs_modeset(new_crtc_state)) {
> if (!intel_crtc_is_joiner_secondary(new_crtc_state))
> intel_crtc_copy_uapi_to_hw_state_nomodeset(state, crtc);
> @@ -6333,7 +6325,7 @@ static int intel_atomic_check_config(struct intel_atomic_state *state,
> goto fail;
> }
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> if (!intel_crtc_needs_modeset(new_crtc_state))
> continue;
>
> @@ -6405,13 +6397,12 @@ int intel_atomic_check(struct drm_device *dev,
> struct intel_atomic_state *state = to_intel_atomic_state(_state);
> struct intel_crtc_state *old_crtc_state, *new_crtc_state;
> struct intel_crtc *crtc;
> - int ret, i;
> + int ret;
>
> if (!intel_display_driver_check_access(display))
> return -ENODEV;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> /*
> * crtc's state no longer considered to be inherited
> * after the first userspace/client initiated commit.
> @@ -6437,7 +6428,7 @@ int intel_atomic_check(struct drm_device *dev,
> if (ret)
> goto fail;
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> ret = intel_async_flip_check_uapi(state, crtc);
> if (ret)
> return ret;
> @@ -6447,7 +6438,7 @@ int intel_atomic_check(struct drm_device *dev,
> if (ret)
> goto fail;
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> if (!intel_crtc_needs_modeset(new_crtc_state)) {
> if (intel_crtc_is_joiner_secondary(new_crtc_state))
> copy_joiner_crtc_state_nomodeset(state, crtc);
> @@ -6464,8 +6455,7 @@ int intel_atomic_check(struct drm_device *dev,
> goto fail;
> }
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> if (!intel_crtc_needs_modeset(new_crtc_state))
> continue;
>
> @@ -6485,7 +6475,7 @@ int intel_atomic_check(struct drm_device *dev,
> * needs a full modeset, all other synced crtcs should be
> * forced a full modeset.
> */
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> if (!new_crtc_state->hw.enable || intel_crtc_needs_modeset(new_crtc_state))
> continue;
>
> @@ -6515,8 +6505,7 @@ int intel_atomic_check(struct drm_device *dev,
> }
> }
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> if (!intel_crtc_needs_modeset(new_crtc_state))
> continue;
>
> @@ -6533,7 +6522,7 @@ int intel_atomic_check(struct drm_device *dev,
> if (ret)
> goto fail;
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
> new_crtc_state->min_cdclk = intel_crtc_min_cdclk(new_crtc_state);
>
> ret = intel_compute_global_watermarks(state);
> @@ -6566,8 +6555,7 @@ int intel_atomic_check(struct drm_device *dev,
> if (ret)
> goto fail;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> intel_color_assert_luts(new_crtc_state);
>
> ret = intel_async_flip_check_hw(state, crtc);
> @@ -6598,8 +6586,7 @@ int intel_atomic_check(struct drm_device *dev,
> * FIXME would probably be nice to know which crtc specifically
> * caused the failure, in cases where we can pinpoint it.
> */
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i)
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state)
> intel_crtc_state_dump(new_crtc_state, state, "failed");
>
> return ret;
> @@ -6915,10 +6902,8 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> const struct intel_crtc_state *new_crtc_state, *old_crtc_state;
> struct intel_crtc *crtc;
> u8 disable_pipes = 0;
> - int i;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> if (!intel_crtc_needs_modeset(new_crtc_state))
> continue;
>
> @@ -6934,7 +6919,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> disable_pipes |= BIT(crtc->pipe);
> }
>
> - for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) {
> + for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state) {
> if ((disable_pipes & BIT(crtc->pipe)) == 0)
> continue;
>
> @@ -6944,7 +6929,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> }
>
> /* Only disable port sync and MST slaves */
> - for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) {
> + for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state) {
> if ((disable_pipes & BIT(crtc->pipe)) == 0)
> continue;
>
> @@ -6966,7 +6951,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> }
>
> /* Disable everything else left on */
> - for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) {
> + for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state) {
> if ((disable_pipes & BIT(crtc->pipe)) == 0)
> continue;
>
> @@ -6985,9 +6970,8 @@ static void intel_commit_modeset_enables(struct intel_atomic_state *state)
> {
> struct intel_crtc_state *new_crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> if (!new_crtc_state->hw.active)
> continue;
>
> @@ -6995,7 +6979,7 @@ static void intel_commit_modeset_enables(struct intel_atomic_state *state)
> intel_pre_update_crtc(state, crtc);
> }
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> if (!new_crtc_state->hw.active)
> continue;
>
> @@ -7010,9 +6994,8 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
> struct intel_crtc_state *old_crtc_state, *new_crtc_state;
> struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
> u8 update_pipes = 0, modeset_pipes = 0;
> - int i;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> enum pipe pipe = crtc->pipe;
>
> if (!new_crtc_state->hw.active)
> @@ -7036,7 +7019,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
> * So first lets enable all pipes that do not need a fullmodeset as
> * those don't have any external dependency.
> */
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> enum pipe pipe = crtc->pipe;
>
> if ((update_pipes & BIT(pipe)) == 0)
> @@ -7052,8 +7035,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
> * Commit in reverse order to make joiner primary
> * send the uapi events after secondaries are done.
> */
> - for_each_oldnew_intel_crtc_in_state_reverse(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state_reverse(state, crtc, old_crtc_state, new_crtc_state) {
> enum pipe pipe = crtc->pipe;
>
> if ((update_pipes & BIT(pipe)) == 0)
> @@ -7089,7 +7071,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
> * Enable all pipes that needs a modeset and do not depends on other
> * pipes
> */
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> enum pipe pipe = crtc->pipe;
>
> if ((modeset_pipes & BIT(pipe)) == 0)
> @@ -7111,7 +7093,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
> * Then we enable all remaining pipes that depend on other
> * pipes: MST slaves and port sync masters
> */
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> enum pipe pipe = crtc->pipe;
>
> if ((modeset_pipes & BIT(pipe)) == 0)
> @@ -7128,7 +7110,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
> /*
> * Finally we do the plane updates/etc. for all pipes that got enabled.
> */
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> enum pipe pipe = crtc->pipe;
>
> if ((update_pipes & BIT(pipe)) == 0)
> @@ -7141,7 +7123,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
> * Commit in reverse order to make joiner primary
> * send the uapi events after secondaries are done.
> */
> - for_each_new_intel_crtc_in_state_reverse(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state_reverse(state, crtc, new_crtc_state) {
> enum pipe pipe = crtc->pipe;
>
> if ((update_pipes & BIT(pipe)) == 0)
> @@ -7206,9 +7188,8 @@ static void intel_atomic_cleanup_work(struct work_struct *work)
> struct intel_display *display = to_intel_display(state);
> struct intel_crtc_state *old_crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i)
> + for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state)
> intel_atomic_dsb_cleanup(old_crtc_state);
>
> drm_atomic_helper_cleanup_planes(display->drm, &state->base);
> @@ -7438,9 +7419,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
> struct intel_crtc *crtc;
> struct intel_power_domain_mask put_domains[I915_MAX_PIPES] = {};
> struct ref_tracker *wakeref = NULL;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
> intel_atomic_dsb_prepare(state, crtc);
>
> intel_atomic_commit_fence_wait(state);
> @@ -7449,10 +7429,10 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
>
> intel_atomic_prepare_plane_clear_colors(state);
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
> intel_fbc_prepare_dirty_rect(state, crtc);
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
> intel_atomic_dsb_finish(state, crtc);
>
> drm_atomic_helper_wait_for_dependencies(&state->base);
> @@ -7488,8 +7468,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
> */
> wakeref = intel_display_power_get(display, POWER_DOMAIN_DC_OFF);
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> if (intel_crtc_needs_modeset(new_crtc_state) ||
> intel_crtc_needs_fastset(new_crtc_state))
> intel_modeset_get_crtc_power_domains(new_crtc_state, &put_domains[crtc->pipe]);
> @@ -7500,7 +7479,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
> intel_dp_tunnel_atomic_alloc_bw(state);
>
> /* FIXME: Eventually get rid of our crtc->config pointer */
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
> crtc->config = new_crtc_state;
>
> /*
> @@ -7522,7 +7501,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
> intel_sagv_pre_plane_update(state);
>
> /* Complete the events for pipes that have now been disabled */
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> bool modeset = intel_crtc_needs_modeset(new_crtc_state);
>
> /* Complete events for now disable pipes here. */
> @@ -7540,7 +7519,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
>
> intel_dbuf_pre_plane_update(state);
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> if (new_crtc_state->do_async_flip)
> intel_crtc_enable_flip_done(state, crtc);
> }
> @@ -7564,7 +7543,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
> */
> drm_atomic_helper_wait_for_flip_done(display->drm, &state->base);
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> if (new_crtc_state->do_async_flip)
> intel_crtc_disable_flip_done(state, crtc);
>
> @@ -7584,8 +7563,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
> *
> * TODO: Move this (and other cleanup) to an async worker eventually.
> */
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> /*
> * Gen2 reports pipe underruns whenever all planes are disabled.
> * So re-enable underrun reporting after some planes get enabled.
> @@ -7602,7 +7580,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
>
> intel_dbuf_post_plane_update(state);
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> intel_post_plane_update(state, crtc);
>
> intel_modeset_put_crtc_power_domains(crtc, &put_domains[crtc->pipe]);
> @@ -7746,9 +7724,8 @@ int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_commit *_state
> if (DISPLAY_VER(display) < 9 && state->base.legacy_cursor_update) {
> struct intel_crtc_state *new_crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
> if (new_crtc_state->wm.need_postvbl_update ||
> new_crtc_state->update_wm_post)
> state->base.legacy_cursor_update = false;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index a3e0def4adb0..7d4f83ad9412 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -287,31 +287,26 @@ enum phy_fia {
> (__i)++) \
> for_each_if(plane)
>
> -#define for_each_old_intel_crtc_in_state(__state, crtc, old_crtc_state, __i) \
> +#define for_each_old_intel_crtc_in_state(__state, crtc, old_crtc_state) \
> for_each_intel_crtc(to_intel_display(__state), (crtc)) \
> - for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
> - (old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc))))
> + for_each_if((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)))
>
> -#define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state, __i) \
> +#define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state) \
> for_each_intel_crtc(to_intel_display(__state), (crtc)) \
> - for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
> - (new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
> + for_each_if((new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc)))
>
> -#define for_each_new_intel_crtc_in_state_reverse(__state, crtc, new_crtc_state, __i) \
> +#define for_each_new_intel_crtc_in_state_reverse(__state, crtc, new_crtc_state) \
> for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
> - for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
> - (new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
> + for_each_if((new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc)))
>
> -#define for_each_oldnew_intel_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state, __i) \
> +#define for_each_oldnew_intel_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state) \
> for_each_intel_crtc(to_intel_display(__state), (crtc)) \
> - for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
> - (old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
> + for_each_if(((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
> (new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
>
> -#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
> +#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state) \
> for_each_intel_crtc_reverse(to_intel_display(__state), (crtc)) \
> - for_each_if(((__i) = drm_crtc_index(&(crtc)->base), (void)(__i), \
> - (old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
> + for_each_if(((old_crtc_state) = intel_atomic_get_old_crtc_state((__state), (crtc)), \
> (new_crtc_state) = intel_atomic_get_new_crtc_state((__state), (crtc))))
>
> #define intel_atomic_crtc_state_for_each_plane_state( \
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> index 10d47faa6996..d6bd1f7e01e1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> @@ -740,9 +740,8 @@ static void atomic_decrease_bw(struct intel_atomic_state *state)
> struct intel_crtc *crtc;
> const struct intel_crtc_state *old_crtc_state;
> const struct intel_crtc_state *new_crtc_state;
> - int i;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> const struct drm_dp_tunnel_state *new_tunnel_state;
> struct drm_dp_tunnel *tunnel;
> int old_bw;
> @@ -795,9 +794,8 @@ static void atomic_increase_bw(struct intel_atomic_state *state)
> {
> struct intel_crtc *crtc;
> const struct intel_crtc_state *crtc_state;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> struct drm_dp_tunnel_state *tunnel_state;
> struct drm_dp_tunnel *tunnel = crtc_state->dp_tunnel_ref.tunnel;
> int bw;
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
> index cd4c38691aed..8c377d9af436 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> @@ -368,9 +368,8 @@ int intel_fdi_atomic_check_link(struct intel_atomic_state *state,
> {
> struct intel_crtc *crtc;
> struct intel_crtc_state *crtc_state;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> int ret;
>
> if (!crtc_state->has_pch_encoder ||
> diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
> index e191a57f02cd..2a52b36c646c 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_plane.c
> @@ -1831,9 +1831,8 @@ static int intel_add_affected_planes(struct intel_atomic_state *state)
> {
> const struct intel_crtc_state *crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> int ret;
>
> ret = intel_joiner_add_affected_planes(state, intel_crtc_joined_pipe_mask(crtc_state));
> @@ -1867,8 +1866,7 @@ int intel_plane_atomic_check(struct intel_atomic_state *state)
> }
> }
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> u8 old_active_planes, new_active_planes;
>
> ret = icl_check_nv12_planes(state, crtc);
> diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c b/drivers/gpu/drm/i915/display/intel_pmdemand.c
> index 7819b724795b..6d32c52269a6 100644
> --- a/drivers/gpu/drm/i915/display/intel_pmdemand.c
> +++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c
> @@ -190,7 +190,7 @@ intel_pmdemand_update_max_ddiclk(struct intel_display *display,
> struct intel_crtc *crtc;
> int i;
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state)
> intel_pmdemand_update_port_clock(display, pmdemand_state,
> crtc->pipe,
> new_crtc_state->port_clock);
> @@ -299,7 +299,6 @@ static bool intel_pmdemand_needs_update(struct intel_atomic_state *state)
> {
> const struct intel_crtc_state *new_crtc_state, *old_crtc_state;
> struct intel_crtc *crtc;
> - int i;
>
> if (intel_bw_pmdemand_needs_update(state))
> return true;
> @@ -310,8 +309,7 @@ static bool intel_pmdemand_needs_update(struct intel_atomic_state *state)
> if (intel_cdclk_pmdemand_needs_update(state))
> return true;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i)
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state)
> if (new_crtc_state->port_clock != old_crtc_state->port_clock)
> return true;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 1b09992ce9fd..e03b5daac5be 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -94,12 +94,10 @@ bool intel_vrr_possible(const struct intel_crtc_state *crtc_state)
> void
> intel_vrr_check_modeset(struct intel_atomic_state *state)
> {
> - int i;
> struct intel_crtc_state *old_crtc_state, *new_crtc_state;
> struct intel_crtc *crtc;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> if (new_crtc_state->uapi.vrr_enabled !=
> old_crtc_state->uapi.vrr_enabled)
> new_crtc_state->uapi.mode_changed = true;
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 346e97d91d92..5a3677ea25b0 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -2495,9 +2495,9 @@ skl_compute_ddb(struct intel_atomic_state *state)
> struct intel_dbuf_state *new_dbuf_state = NULL;
> struct intel_crtc_state *new_crtc_state;
> struct intel_crtc *crtc;
> - int ret, i;
> + int ret;
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> new_dbuf_state = intel_atomic_get_dbuf_state(state);
> if (IS_ERR(new_dbuf_state))
> return PTR_ERR(new_dbuf_state);
> @@ -2561,7 +2561,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
> str_yes_no(new_dbuf_state->joined_mbus));
> }
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> enum pipe pipe = crtc->pipe;
>
> new_dbuf_state->weight[pipe] = intel_crtc_ddb_weight(new_crtc_state);
> @@ -2580,7 +2580,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
> return ret;
> }
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> ret = skl_crtc_allocate_plane_ddb(state, crtc);
> if (ret)
> return ret;
> @@ -2687,13 +2687,11 @@ skl_print_wm_changes(struct intel_atomic_state *state)
> const struct intel_crtc_state *new_crtc_state;
> struct intel_plane *plane;
> struct intel_crtc *crtc;
> - int i;
>
> if (!drm_debug_enabled(DRM_UT_KMS))
> return;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state) {
> const struct skl_pipe_wm *old_pipe_wm, *new_pipe_wm;
>
> old_pipe_wm = &old_crtc_state->wm.skl.optimal;
> @@ -2833,13 +2831,13 @@ static int pkgc_max_linetime(struct intel_atomic_state *state)
> struct intel_display *display = to_intel_display(state);
> const struct intel_crtc_state *crtc_state;
> struct intel_crtc *crtc;
> - int i, max_linetime;
> + int max_linetime;
>
> /*
> * Apparenty the hardware uses WM_LINETIME internally for
> * this stuff, compute everything based on that.
> */
> - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state) {
> display->pkgc.disable[crtc->pipe] = crtc_state->vrr.enable;
> display->pkgc.linetime[crtc->pipe] = DIV_ROUND_UP(crtc_state->linetime, 8);
> }
> @@ -2909,9 +2907,9 @@ skl_compute_wm(struct intel_atomic_state *state)
> struct intel_display *display = to_intel_display(state);
> struct intel_crtc *crtc;
> struct intel_crtc_state __maybe_unused *new_crtc_state;
> - int ret, i;
> + int ret;
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> ret = skl_build_pipe_wm(state, crtc);
> if (ret)
> return ret;
> @@ -2926,7 +2924,7 @@ skl_compute_wm(struct intel_atomic_state *state)
> * based on how much ddb is available. Now we can actually
> * check if the final watermarks changed.
> */
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state) {
> struct skl_pipe_wm *pipe_wm = &new_crtc_state->wm.skl.optimal;
>
> /*
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RESEND 6/6] drm/i915/display: stop passing i to for_each_pipe_crtc_modeset_{enable, disable}()
2026-05-13 7:58 ` [RESEND 6/6] drm/i915/display: stop passing i to for_each_pipe_crtc_modeset_{enable, disable}() Jani Nikula
@ 2026-05-13 12:23 ` Ville Syrjälä
0 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjälä @ 2026-05-13 12:23 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Wed, May 13, 2026 at 10:58:40AM +0300, Jani Nikula wrote:
> Refactor for_each_pipe_crtc_modeset_{enable,disable}() and their
> underlying for_each_crtc_in_masks{,_reverse}() helpers to utilize
> __UNIQUE_ID() to avoid having to pass the for loop variable to them.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 8 ++----
> drivers/gpu/drm/i915/display/intel_display.c | 12 ++++----
> drivers/gpu/drm/i915/display/intel_display.h | 30 ++++++++++----------
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 9 +++---
> 4 files changed, 27 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 34e2b5ea9d0d..1d4bb59a0501 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3230,9 +3230,8 @@ static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state *state,
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> struct intel_crtc *pipe_crtc;
> bool is_hdmi = intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI);
> - int i;
>
> - for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
> + for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
> const struct intel_crtc_state *old_pipe_crtc_state =
> intel_atomic_get_old_crtc_state(state, pipe_crtc);
>
> @@ -3259,7 +3258,7 @@ static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state *state,
>
> intel_ddi_disable_transcoder_func(old_crtc_state);
>
> - for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
> + for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
> const struct intel_crtc_state *old_pipe_crtc_state =
> intel_atomic_get_old_crtc_state(state, pipe_crtc);
>
> @@ -3516,7 +3515,6 @@ static void intel_ddi_enable(struct intel_atomic_state *state,
> struct intel_crtc *pipe_crtc;
> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> bool is_hdmi = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI);
> - int i;
>
> /* 128b/132b SST */
> if (!is_hdmi && intel_dp_is_uhbr(crtc_state)) {
> @@ -3550,7 +3548,7 @@ static void intel_ddi_enable(struct intel_atomic_state *state,
>
> intel_ddi_wait_for_fec_status(encoder, crtc_state, true);
>
> - for_each_pipe_crtc_modeset_enable(display, pipe_crtc, crtc_state, i) {
> + for_each_pipe_crtc_modeset_enable(display, pipe_crtc, crtc_state) {
> const struct intel_crtc_state *pipe_crtc_state =
> intel_atomic_get_new_crtc_state(state, pipe_crtc);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index cf9afc90e301..ce5a3d5dbb79 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1653,11 +1653,10 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
> intel_atomic_get_new_crtc_state(state, crtc);
> enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
> struct intel_crtc *pipe_crtc;
> - int i;
>
> if (drm_WARN_ON(display->drm, crtc->active))
> return;
> - for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
> + for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state) {
> const struct intel_crtc_state *new_pipe_crtc_state =
> intel_atomic_get_new_crtc_state(state, pipe_crtc);
>
> @@ -1671,7 +1670,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
>
> intel_encoders_pre_enable(state, crtc);
>
> - for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
> + for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state) {
> const struct intel_crtc_state *pipe_crtc_state =
> intel_atomic_get_new_crtc_state(state, pipe_crtc);
>
> @@ -1689,7 +1688,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
> if (!transcoder_is_dsi(cpu_transcoder))
> hsw_configure_cpu_transcoder(new_crtc_state);
>
> - for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
> + for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state) {
> const struct intel_crtc_state *pipe_crtc_state =
> intel_atomic_get_new_crtc_state(state, pipe_crtc);
>
> @@ -1719,7 +1718,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
>
> intel_encoders_enable(state, crtc);
>
> - for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
> + for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state) {
> const struct intel_crtc_state *pipe_crtc_state =
> intel_atomic_get_new_crtc_state(state, pipe_crtc);
> enum pipe hsw_workaround_pipe;
> @@ -1787,7 +1786,6 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
> const struct intel_crtc_state *old_crtc_state =
> intel_atomic_get_old_crtc_state(state, crtc);
> struct intel_crtc *pipe_crtc;
> - int i;
>
> /*
> * FIXME collapse everything to one hook.
> @@ -1800,7 +1798,7 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
>
> intel_encoders_post_pll_disable(state, crtc);
>
> - for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
> + for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
> const struct intel_crtc_state *old_pipe_crtc_state =
> intel_atomic_get_old_crtc_state(state, pipe_crtc);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 7d4f83ad9412..31588011d659 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -325,29 +325,29 @@ enum phy_fia {
> ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
> (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))
>
> -#define for_each_crtc_in_masks(display, crtc, first_pipes, second_pipes, i) \
> - for ((i) = 0; \
> +#define __for_each_crtc_in_masks(display, crtc, first_pipes, second_pipes, i) \
> + for (int (i) = 0; \
> (i) < (I915_MAX_PIPES * 2) && ((crtc) = intel_crtc_for_pipe(display, (i) % I915_MAX_PIPES), 1); \
> (i)++) \
> for_each_if((crtc) && ((first_pipes) | ((second_pipes) << I915_MAX_PIPES)) & BIT(i))
>
> -#define for_each_crtc_in_masks_reverse(display, crtc, first_pipes, second_pipes, i) \
> - for ((i) = (I915_MAX_PIPES * 2 - 1); \
> +#define __for_each_crtc_in_masks_reverse(display, crtc, first_pipes, second_pipes, i) \
> + for (int (i) = (I915_MAX_PIPES * 2 - 1); \
> (i) >= 0 && ((crtc) = intel_crtc_for_pipe(display, (i) % I915_MAX_PIPES), 1); \
> (i)--) \
> for_each_if((crtc) && ((first_pipes) | ((second_pipes) << I915_MAX_PIPES)) & BIT(i))
>
> -#define for_each_pipe_crtc_modeset_disable(display, crtc, crtc_state, i) \
> - for_each_crtc_in_masks(display, crtc, \
> - _intel_modeset_primary_pipes(crtc_state), \
> - _intel_modeset_secondary_pipes(crtc_state), \
> - i)
> -
> -#define for_each_pipe_crtc_modeset_enable(display, crtc, crtc_state, i) \
> - for_each_crtc_in_masks_reverse(display, crtc, \
> - _intel_modeset_primary_pipes(crtc_state), \
> - _intel_modeset_secondary_pipes(crtc_state), \
> - i)
> +#define for_each_pipe_crtc_modeset_disable(display, crtc, crtc_state) \
> + __for_each_crtc_in_masks(display, crtc, \
> + _intel_modeset_primary_pipes(crtc_state), \
> + _intel_modeset_secondary_pipes(crtc_state), \
> + __UNIQUE_ID(i))
> +
> +#define for_each_pipe_crtc_modeset_enable(display, crtc, crtc_state) \
> + __for_each_crtc_in_masks_reverse(display, crtc, \
> + _intel_modeset_primary_pipes(crtc_state), \
> + _intel_modeset_secondary_pipes(crtc_state), \
> + __UNIQUE_ID(i))
>
> int intel_atomic_check(struct drm_device *dev, struct drm_atomic_commit *state);
> u8 intel_calc_enabled_pipes(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index be8febe3d234..724d3ee23350 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -1065,14 +1065,13 @@ static void mst_stream_post_disable(struct intel_atomic_state *state,
> drm_atomic_get_mst_payload_state(new_mst_state, connector->mst.port);
> struct intel_crtc *pipe_crtc;
> bool last_mst_stream;
> - int i;
>
> last_mst_stream = intel_dp_mst_dec_active_streams(intel_dp);
>
> drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 12 && last_mst_stream &&
> !intel_dp_mst_is_master_trans(old_crtc_state));
>
> - for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
> + for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
> const struct intel_crtc_state *old_pipe_crtc_state =
> intel_atomic_get_old_crtc_state(state, pipe_crtc);
>
> @@ -1099,7 +1098,7 @@ static void mst_stream_post_disable(struct intel_atomic_state *state,
>
> intel_ddi_disable_transcoder_func(old_crtc_state);
>
> - for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
> + for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
> const struct intel_crtc_state *old_pipe_crtc_state =
> intel_atomic_get_old_crtc_state(state, pipe_crtc);
>
> @@ -1310,7 +1309,7 @@ static void mst_stream_enable(struct intel_atomic_state *state,
> enum transcoder trans = pipe_config->cpu_transcoder;
> bool first_mst_stream = intel_dp_mst_active_streams(intel_dp) == 1;
> struct intel_crtc *pipe_crtc;
> - int ret, i;
> + int ret;
>
> drm_WARN_ON(display->drm, pipe_config->has_pch_encoder);
>
> @@ -1355,7 +1354,7 @@ static void mst_stream_enable(struct intel_atomic_state *state,
>
> intel_enable_transcoder(pipe_config);
>
> - for_each_pipe_crtc_modeset_enable(display, pipe_crtc, pipe_config, i) {
> + for_each_pipe_crtc_modeset_enable(display, pipe_crtc, pipe_config) {
> const struct intel_crtc_state *pipe_crtc_state =
> intel_atomic_get_new_crtc_state(state, pipe_crtc);
>
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RESEND 1/6] drm/{i915, xe}: move xe_display_flush_cleanup_work() to i915 display
2026-05-13 12:09 ` Ville Syrjälä
@ 2026-05-13 14:19 ` Jani Nikula
2026-05-13 14:56 ` Imre Deak
0 siblings, 1 reply; 17+ messages in thread
From: Jani Nikula @ 2026-05-13 14:19 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, intel-xe
On Wed, 13 May 2026, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Wed, May 13, 2026 at 10:58:35AM +0300, Jani Nikula wrote:
>> xe_display_flush_cleanup_work() is a bit of an oddball function in xe
>> display code. There shouldn't be anything this specific or xe
>> specific. While I'm not sure what the correct refactor for the function
>> should be, move it to shared display code for starters, next to the
>> eerily similar but slightly different intel_has_pending_fb_unpin() that
>> is only called from i915 core.
>>
>> The main goal here is to unblock some refactors on
>> for_each_intel_crtc().
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_display.c | 21 +++++++++++++++
>> drivers/gpu/drm/i915/display/intel_display.h | 1 +
>> drivers/gpu/drm/xe/display/xe_display.c | 27 +++-----------------
>> 3 files changed, 25 insertions(+), 24 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index d5cf1476c7b9..50feca52b962 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -737,6 +737,27 @@ bool intel_has_pending_fb_unpin(struct intel_display *display)
>> return false;
>> }
>>
>> +void intel_display_flush_cleanup_work(struct intel_display *display)
>> +{
>> + struct intel_crtc *crtc;
>> +
>> + for_each_intel_crtc(display->drm, crtc) {
>> + struct drm_crtc_commit *commit;
>> +
>> + spin_lock(&crtc->base.commit_lock);
>> + commit = list_first_entry_or_null(&crtc->base.commit_list,
>> + struct drm_crtc_commit, commit_entry);
>> + if (commit)
>> + drm_crtc_commit_get(commit);
>> + spin_unlock(&crtc->base.commit_lock);
>> +
>> + if (commit) {
>> + wait_for_completion(&commit->cleanup_done);
>> + drm_crtc_commit_put(commit);
>> + }
>> + }
>> +}
>> +
>> /*
>> * Finds the encoder associated with the given CRTC. This can only be
>> * used when we know that the CRTC isn't feeding multiple encoders!
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
>> index a43ada0c0502..65f8c81a7bae 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display.h
>> @@ -402,6 +402,7 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state);
>> void i830_enable_pipe(struct intel_display *display, enum pipe pipe);
>> void i830_disable_pipe(struct intel_display *display, enum pipe pipe);
>> bool intel_has_pending_fb_unpin(struct intel_display *display);
>> +void intel_display_flush_cleanup_work(struct intel_display *display);
>> void intel_encoder_destroy(struct drm_encoder *encoder);
>> struct drm_display_mode *
>> intel_encoder_current_mode(struct intel_encoder *encoder);
>> diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
>> index aa73023b7398..ef27fdfdbab2 100644
>> --- a/drivers/gpu/drm/xe/display/xe_display.c
>> +++ b/drivers/gpu/drm/xe/display/xe_display.c
>> @@ -258,27 +258,6 @@ static bool suspend_to_idle(void)
>> return false;
>> }
>>
>> -static void xe_display_flush_cleanup_work(struct xe_device *xe)
>> -{
>> - struct intel_crtc *crtc;
>> -
>> - for_each_intel_crtc(&xe->drm, crtc) {
>> - struct drm_crtc_commit *commit;
>> -
>> - spin_lock(&crtc->base.commit_lock);
>> - commit = list_first_entry_or_null(&crtc->base.commit_list,
>> - struct drm_crtc_commit, commit_entry);
>> - if (commit)
>> - drm_crtc_commit_get(commit);
>> - spin_unlock(&crtc->base.commit_lock);
>> -
>> - if (commit) {
>> - wait_for_completion(&commit->cleanup_done);
>> - drm_crtc_commit_put(commit);
>> - }
>> - }
>> -}
>> -
>> static void xe_display_enable_d3cold(struct xe_device *xe)
>> {
>> struct intel_display *display = xe->display;
>> @@ -292,7 +271,7 @@ static void xe_display_enable_d3cold(struct xe_device *xe)
>> */
>> intel_power_domains_disable(display);
>>
>> - xe_display_flush_cleanup_work(xe);
>> + intel_display_flush_cleanup_work(display);
>>
>> intel_opregion_suspend(display, PCI_D3cold);
>>
>> @@ -347,7 +326,7 @@ void xe_display_pm_suspend(struct xe_device *xe)
>> intel_display_driver_suspend(display);
>> }
>>
>> - xe_display_flush_cleanup_work(xe);
>> + intel_display_flush_cleanup_work(display);
>
> intel_display_driver_suspend() already flushes the cleanup wq. So I
> think this is doing nothing. The correct answer seems to be to nuke
> the whole thing. We are missing the wq flush from the shutdown() path
> in i915 however, so I suppose we should add it there.
>
>>
>> intel_encoder_block_all_hpds(display);
>>
>> @@ -379,7 +358,7 @@ void xe_display_pm_shutdown(struct xe_device *xe)
>> intel_display_driver_suspend(display);
>
> This should rather be the same atomic helper shutdown that i915 uses.
> I guess what we want is a intel_display_driver_shutdown() to pair
> up with intel_display_driver_suspend().
Yeah, well, another "Hal fixes a light bulb" moment. I just wanted to
clean up the iterators, but I can't do that with xe having crtc
iteration, which it never should have had in the first place.
I think all of the i915/xe/display probe/cleanup/suspend/resume paths
are a gigantic mess. It was a mess with just i915, and xe added another,
*different* mess. They both do things differently, but *neither* should
be calling low-level display stuff directly.
I'll try to cook something up for this.
BR,
Jani.
>
>> }
>>
>> - xe_display_flush_cleanup_work(xe);
>> + intel_display_flush_cleanup_work(display);
>> intel_dp_mst_suspend(display);
>> intel_encoder_block_all_hpds(display);
>> intel_hpd_cancel_work(display);
>> --
>> 2.47.3
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RESEND 1/6] drm/{i915, xe}: move xe_display_flush_cleanup_work() to i915 display
2026-05-13 14:19 ` Jani Nikula
@ 2026-05-13 14:56 ` Imre Deak
0 siblings, 0 replies; 17+ messages in thread
From: Imre Deak @ 2026-05-13 14:56 UTC (permalink / raw)
To: Jani Nikula; +Cc: Ville Syrjälä, intel-gfx, intel-xe
On Wed, May 13, 2026 at 05:19:19PM +0300, Jani Nikula wrote:
> On Wed, 13 May 2026, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Wed, May 13, 2026 at 10:58:35AM +0300, Jani Nikula wrote:
> >> xe_display_flush_cleanup_work() is a bit of an oddball function in xe
> >> display code. There shouldn't be anything this specific or xe
> >> specific. While I'm not sure what the correct refactor for the function
> >> should be, move it to shared display code for starters, next to the
> >> eerily similar but slightly different intel_has_pending_fb_unpin() that
> >> is only called from i915 core.
> >>
> >> The main goal here is to unblock some refactors on
> >> for_each_intel_crtc().
> >>
> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >> ---
> >> drivers/gpu/drm/i915/display/intel_display.c | 21 +++++++++++++++
> >> drivers/gpu/drm/i915/display/intel_display.h | 1 +
> >> drivers/gpu/drm/xe/display/xe_display.c | 27 +++-----------------
> >> 3 files changed, 25 insertions(+), 24 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> >> index d5cf1476c7b9..50feca52b962 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> >> @@ -737,6 +737,27 @@ bool intel_has_pending_fb_unpin(struct intel_display *display)
> >> return false;
> >> }
> >>
> >> +void intel_display_flush_cleanup_work(struct intel_display *display)
> >> +{
> >> + struct intel_crtc *crtc;
> >> +
> >> + for_each_intel_crtc(display->drm, crtc) {
> >> + struct drm_crtc_commit *commit;
> >> +
> >> + spin_lock(&crtc->base.commit_lock);
> >> + commit = list_first_entry_or_null(&crtc->base.commit_list,
> >> + struct drm_crtc_commit, commit_entry);
> >> + if (commit)
> >> + drm_crtc_commit_get(commit);
> >> + spin_unlock(&crtc->base.commit_lock);
> >> +
> >> + if (commit) {
> >> + wait_for_completion(&commit->cleanup_done);
> >> + drm_crtc_commit_put(commit);
> >> + }
> >> + }
> >> +}
> >> +
> >> /*
> >> * Finds the encoder associated with the given CRTC. This can only be
> >> * used when we know that the CRTC isn't feeding multiple encoders!
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> >> index a43ada0c0502..65f8c81a7bae 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display.h
> >> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> >> @@ -402,6 +402,7 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state);
> >> void i830_enable_pipe(struct intel_display *display, enum pipe pipe);
> >> void i830_disable_pipe(struct intel_display *display, enum pipe pipe);
> >> bool intel_has_pending_fb_unpin(struct intel_display *display);
> >> +void intel_display_flush_cleanup_work(struct intel_display *display);
> >> void intel_encoder_destroy(struct drm_encoder *encoder);
> >> struct drm_display_mode *
> >> intel_encoder_current_mode(struct intel_encoder *encoder);
> >> diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
> >> index aa73023b7398..ef27fdfdbab2 100644
> >> --- a/drivers/gpu/drm/xe/display/xe_display.c
> >> +++ b/drivers/gpu/drm/xe/display/xe_display.c
> >> @@ -258,27 +258,6 @@ static bool suspend_to_idle(void)
> >> return false;
> >> }
> >>
> >> -static void xe_display_flush_cleanup_work(struct xe_device *xe)
> >> -{
> >> - struct intel_crtc *crtc;
> >> -
> >> - for_each_intel_crtc(&xe->drm, crtc) {
> >> - struct drm_crtc_commit *commit;
> >> -
> >> - spin_lock(&crtc->base.commit_lock);
> >> - commit = list_first_entry_or_null(&crtc->base.commit_list,
> >> - struct drm_crtc_commit, commit_entry);
> >> - if (commit)
> >> - drm_crtc_commit_get(commit);
> >> - spin_unlock(&crtc->base.commit_lock);
> >> -
> >> - if (commit) {
> >> - wait_for_completion(&commit->cleanup_done);
> >> - drm_crtc_commit_put(commit);
> >> - }
> >> - }
> >> -}
> >> -
> >> static void xe_display_enable_d3cold(struct xe_device *xe)
> >> {
> >> struct intel_display *display = xe->display;
> >> @@ -292,7 +271,7 @@ static void xe_display_enable_d3cold(struct xe_device *xe)
> >> */
> >> intel_power_domains_disable(display);
> >>
> >> - xe_display_flush_cleanup_work(xe);
> >> + intel_display_flush_cleanup_work(display);
> >>
> >> intel_opregion_suspend(display, PCI_D3cold);
> >>
> >> @@ -347,7 +326,7 @@ void xe_display_pm_suspend(struct xe_device *xe)
> >> intel_display_driver_suspend(display);
> >> }
> >>
> >> - xe_display_flush_cleanup_work(xe);
> >> + intel_display_flush_cleanup_work(display);
> >
> > intel_display_driver_suspend() already flushes the cleanup wq. So I
> > think this is doing nothing. The correct answer seems to be to nuke
> > the whole thing. We are missing the wq flush from the shutdown() path
> > in i915 however, so I suppose we should add it there.
> >
> >>
> >> intel_encoder_block_all_hpds(display);
> >>
> >> @@ -379,7 +358,7 @@ void xe_display_pm_shutdown(struct xe_device *xe)
> >> intel_display_driver_suspend(display);
> >
> > This should rather be the same atomic helper shutdown that i915 uses.
> > I guess what we want is a intel_display_driver_shutdown() to pair
> > up with intel_display_driver_suspend().
>
> Yeah, well, another "Hal fixes a light bulb" moment. I just wanted to
> clean up the iterators, but I can't do that with xe having crtc
> iteration, which it never should have had in the first place.
>
> I think all of the i915/xe/display probe/cleanup/suspend/resume paths
> are a gigantic mess. It was a mess with just i915, and xe added another,
> *different* mess. They both do things differently, but *neither* should
> be calling low-level display stuff directly.
>
> I'll try to cook something up for this.
Fwiw, this came up already earlier [1] and then I came up with
https://github.com/ideak/linux/commits/suspend-shutdown-refactor
but haven't followed up with it. For reference I rebased it now on
drm-tip.
[1] https://lore.kernel.org/all/aIjizdet9ZUXB-yx@ideak-desk
>
>
> BR,
> Jani.
>
>
> >
> >> }
> >>
> >> - xe_display_flush_cleanup_work(xe);
> >> + intel_display_flush_cleanup_work(display);
> >> intel_dp_mst_suspend(display);
> >> intel_encoder_block_all_hpds(display);
> >> intel_hpd_cancel_work(display);
> >> --
> >> 2.47.3
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2026-05-13 14:56 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-13 7:58 [RESEND 0/6] drm/i915: crtc iteration cleanups Jani Nikula
2026-05-13 7:58 ` [RESEND 1/6] drm/{i915, xe}: move xe_display_flush_cleanup_work() to i915 display Jani Nikula
2026-05-13 12:09 ` Ville Syrjälä
2026-05-13 14:19 ` Jani Nikula
2026-05-13 14:56 ` Imre Deak
2026-05-13 7:58 ` [RESEND 2/6] drm/i915/display: switch from drm_for_each_crtc() to for_each_intel_crtc() Jani Nikula
2026-05-13 7:58 ` [RESEND 3/6] drm/i915/display: always pass display->drm to for_each_intel_crtc*() Jani Nikula
2026-05-13 12:22 ` Ville Syrjälä
2026-05-13 7:58 ` [RESEND 4/6] drm/i915/display: pass struct intel_display to all for_each_intel_crtc*() macros Jani Nikula
2026-05-13 12:22 ` Ville Syrjälä
2026-05-13 7:58 ` [RESEND 5/6] drm/i915/display: stop passing i to for_each_*_intel_crtc_in_state() macros Jani Nikula
2026-05-13 12:22 ` Ville Syrjälä
2026-05-13 7:58 ` [RESEND 6/6] drm/i915/display: stop passing i to for_each_pipe_crtc_modeset_{enable, disable}() Jani Nikula
2026-05-13 12:23 ` Ville Syrjälä
2026-05-13 8:05 ` ✗ CI.checkpatch: warning for drm/i915: crtc iteration cleanups (rev2) Patchwork
2026-05-13 8:07 ` ✓ CI.KUnit: success " Patchwork
2026-05-13 9:46 ` ✓ Xe.CI.BAT: " Patchwork
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox