[PATCH 00/11] drm/i915/display: switch to modern drm_dp_dpcd* accessors

[PATCH 00/11] drm/i915/display: switch to modern drm_dp_dpcd* accessors

[Jani Nikula]

Switch to the modern DPCD access functions that return negative error
codes on errors, -EIO for incomplete access, and 0 on success.

Jani Nikula (11):
  drm/i915/lspcon: use u8 variable to hold 1-byte DPCD reads
  drm/i915/lspcon: switch to
    drm_dp_dpcd_{read_byte,write_byte,write_data}
  drm/i915/alpm: switch to drm_dp_dpcd_{read_byte,write_byte}
  drm/i915/ddi: switch to drm_dp_dpcd_write_byte()
  drm/i915/lspcon: switch to
    drm_dp_dpcd_{read_byte,read_data,write_byte,write_data}()
  drm/i915/dp: switch to
    drm_dp_dpcd_{read_byte,read_data,write_byte,write_data}
  drm/i915/hdcp: switch to
    drm_dp_dpcd_{read_byte,read_data,write_data}()
  drm/i915/dp: switch link training to
    drm_dp_dpcd_{read_byte,read_data,write_byte,write_data}()
  drm/i915/dp-mst: switch to drm_dp_dpcd_read_byte()
  drm/i915/dp-test: switch to
    drm_dp_dpcd_{read_byte,read_data,write_byte,write_data}()
  drm/i915/psr: switch to
    drm_dp_dpcd_{read_byte,read_data,write_byte,write_data}()

 drivers/gpu/drm/i915/display/intel_alpm.c     |  10 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      |  16 +-
 drivers/gpu/drm/i915/display/intel_dp.c       | 142 ++++++++------
 .../drm/i915/display/intel_dp_aux_backlight.c |  51 +++---
 drivers/gpu/drm/i915/display/intel_dp_hdcp.c  | 173 +++++++++---------
 .../drm/i915/display/intel_dp_link_training.c |  48 ++---
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |   2 +-
 drivers/gpu/drm/i915/display/intel_dp_test.c  |  57 +++---
 drivers/gpu/drm/i915/display/intel_lspcon.c   |  48 +++--
 drivers/gpu/drm/i915/display/intel_psr.c      |  65 +++----
 10 files changed, 326 insertions(+), 286 deletions(-)

-- 
2.47.3

[PATCH 01/11] drm/i915/lspcon: use u8 variable to hold 1-byte DPCD reads

[Jani Nikula]

Passing a pointer to a u32 variable for a 1-byte reads is error prone,
and only works because it's always initialized to 0 before the read, and
the code's running on little-endian CPUs. Switch to u8 variables.

In _lspcon_write_avi_infoframe_mca(), add a separate variable to hold
the number of bytes written instead of reusing the same variable for two
purposes.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_lspcon.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 9ceabbc981a1..b306bf5f6130 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -435,14 +435,14 @@ static bool _lspcon_write_avi_infoframe_parade(struct drm_dp_aux *aux,
 static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
 					    const u8 *buffer, ssize_t len)
 {
-	int ret;
-	u32 val = 0;
+	int ret, written = 0;
 	u32 retry;
 	u16 reg;
 	const u8 *data = buffer;
+	u8 val;
 
 	reg = LSPCON_MCA_AVI_IF_WRITE_OFFSET;
-	while (val < len) {
+	while (written < len) {
 		/* DPCD write for AVI IF can fail on a slow FW day, so retry */
 		for (retry = 0; retry < 5; retry++) {
 			ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1);
@@ -456,7 +456,9 @@ static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
 				return false;
 			}
 		}
-		val++; reg++; data++;
+		written++;
+		reg++;
+		data++;
 	}
 
 	val = 0;
@@ -612,8 +614,8 @@ void lspcon_set_infoframes(struct intel_encoder *encoder,
 static bool _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
 {
 	int ret;
-	u32 val = 0;
 	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
+	u8 val;
 
 	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
 	if (ret < 0) {
@@ -627,8 +629,8 @@ static bool _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
 static bool _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
 {
 	int ret;
-	u32 val = 0;
 	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
+	u8 val;
 
 	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
 	if (ret < 0) {
-- 
2.47.3

[PATCH 02/11] drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte, write_byte, write_data}

[Jani Nikula]

Switch to the modern DPCD access functions that return negative error
codes on errors, -EIO for incomplete access, and 0 on success.

Use 1-byte accessors where sensible. Use local ret variables for the
return value instead of checking inline.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_lspcon.c | 34 +++++++++------------
 1 file changed, 15 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index b306bf5f6130..07b5a9d010ff 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -137,9 +137,7 @@ bool intel_lspcon_detect_hdr_capability(struct intel_digital_port *dig_port)
 	u8 hdr_caps;
 	int ret;
 
-	ret = drm_dp_dpcd_read(&intel_dp->aux, get_hdr_status_reg(lspcon),
-			       &hdr_caps, 1);
-
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, get_hdr_status_reg(lspcon), &hdr_caps);
 	if (ret < 0) {
 		drm_dbg_kms(display->drm, "HDR capability detection failed\n");
 		lspcon->hdr_supported = false;
@@ -244,10 +242,11 @@ static bool lspcon_wake_native_aux_ch(struct intel_lspcon *lspcon)
 {
 	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
 	struct intel_display *display = to_intel_display(intel_dp);
+	int ret;
 	u8 rev;
 
-	if (drm_dp_dpcd_readb(&lspcon_to_intel_dp(lspcon)->aux, DP_DPCD_REV,
-			      &rev) != 1) {
+	ret = drm_dp_dpcd_read_byte(&lspcon_to_intel_dp(lspcon)->aux, DP_DPCD_REV, &rev);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm, "Native AUX CH down\n");
 		return false;
 	}
@@ -331,15 +330,14 @@ static bool lspcon_parade_fw_ready(struct drm_dp_aux *aux)
 {
 	u8 avi_if_ctrl;
 	u8 retry;
-	ssize_t ret;
+	int ret;
 
 	/* Check if LSPCON FW is ready for data */
 	for (retry = 0; retry < 5; retry++) {
 		if (retry)
 			usleep_range(200, 300);
 
-		ret = drm_dp_dpcd_read(aux, LSPCON_PARADE_AVI_IF_CTRL,
-				       &avi_if_ctrl, 1);
+		ret = drm_dp_dpcd_read_byte(aux, LSPCON_PARADE_AVI_IF_CTRL, &avi_if_ctrl);
 		if (ret < 0) {
 			drm_err(aux->drm_dev, "Failed to read AVI IF control\n");
 			return false;
@@ -371,7 +369,7 @@ static bool _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
 
 		reg = LSPCON_PARADE_AVI_IF_WRITE_OFFSET;
 		data = avi_buf + block_count * 8;
-		ret = drm_dp_dpcd_write(aux, reg, data, 8);
+		ret = drm_dp_dpcd_write_data(aux, reg, data, 8);
 		if (ret < 0) {
 			drm_err(aux->drm_dev, "Failed to write AVI IF block %d\n",
 				block_count);
@@ -386,7 +384,7 @@ static bool _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
 		 */
 		reg = LSPCON_PARADE_AVI_IF_CTRL;
 		avi_if_ctrl = LSPCON_PARADE_AVI_IF_KICKOFF | block_count;
-		ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1);
+		ret = drm_dp_dpcd_write_byte(aux, reg, avi_if_ctrl);
 		if (ret < 0) {
 			drm_err(aux->drm_dev, "Failed to update (0x%x), block %d\n",
 				reg, block_count);
@@ -445,8 +443,8 @@ static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
 	while (written < len) {
 		/* DPCD write for AVI IF can fail on a slow FW day, so retry */
 		for (retry = 0; retry < 5; retry++) {
-			ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1);
-			if (ret == 1) {
+			ret = drm_dp_dpcd_write_byte(aux, reg, *data);
+			if (!ret) {
 				break;
 			} else if (retry < 4) {
 				mdelay(50);
@@ -461,9 +459,8 @@ static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
 		data++;
 	}
 
-	val = 0;
 	reg = LSPCON_MCA_AVI_IF_CTRL;
-	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
+	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
 	if (ret < 0) {
 		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
 		return false;
@@ -473,14 +470,13 @@ static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
 	val &= ~LSPCON_MCA_AVI_IF_HANDLED;
 	val |= LSPCON_MCA_AVI_IF_KICKOFF;
 
-	ret = drm_dp_dpcd_write(aux, reg, &val, 1);
+	ret = drm_dp_dpcd_write_byte(aux, reg, val);
 	if (ret < 0) {
 		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
 		return false;
 	}
 
-	val = 0;
-	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
+	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
 	if (ret < 0) {
 		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
 		return false;
@@ -617,7 +613,7 @@ static bool _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
 	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
 	u8 val;
 
-	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
+	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
 	if (ret < 0) {
 		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
 		return false;
@@ -632,7 +628,7 @@ static bool _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
 	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
 	u8 val;
 
-	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
+	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
 	if (ret < 0) {
 		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
 		return false;
-- 
2.47.3

[PATCH 03/11] drm/i915/alpm: switch to drm_dp_dpcd_{read_byte, write_byte}

[Jani Nikula]

Switch to the modern DPCD access functions that return negative error
codes on errors, -EIO for incomplete access, and 0 on success.

Rename an int r to ret while at it for clarity.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 10943539bc7c..9ef9d0e45258 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -628,7 +628,7 @@ void intel_alpm_enable_sink(struct intel_dp *intel_dp,
 					     intel_alpm_aux_less_wake_supported(intel_dp)))
 		val |= DP_ALPM_MODE_AUX_LESS;
 
-	drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, val);
+	drm_dp_dpcd_write_byte(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, val);
 }
 
 void intel_alpm_lobf_enable(const struct intel_crtc_state *new_crtc_state)
@@ -751,11 +751,11 @@ bool intel_alpm_get_error(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 	struct drm_dp_aux *aux = &intel_dp->aux;
+	int ret;
 	u8 val;
-	int r;
 
-	r = drm_dp_dpcd_readb(aux, DP_RECEIVER_ALPM_STATUS, &val);
-	if (r != 1) {
+	ret = drm_dp_dpcd_read_byte(aux, DP_RECEIVER_ALPM_STATUS, &val);
+	if (ret < 0) {
 		drm_err(display->drm, "Error reading ALPM status\n");
 		return true;
 	}
@@ -764,7 +764,7 @@ bool intel_alpm_get_error(struct intel_dp *intel_dp)
 		drm_dbg_kms(display->drm, "ALPM lock timeout error\n");
 
 		/* Clearing error */
-		drm_dp_dpcd_writeb(aux, DP_RECEIVER_ALPM_STATUS, val);
+		drm_dp_dpcd_write_byte(aux, DP_RECEIVER_ALPM_STATUS, val);
 		return true;
 	}
 
-- 
2.47.3

[PATCH 04/11] drm/i915/ddi: switch to drm_dp_dpcd_write_byte()

[Jani Nikula]

Switch to the modern DPCD access functions that return negative error
codes on errors, -EIO for incomplete access, and 0 on success.

Use local ret variables for the return value instead of checking inline
where sensible. This improves clarity.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 9b3b526e5e55..fbf485a54dda 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2331,12 +2331,14 @@ static void intel_dp_sink_set_msa_timing_par_ignore_state(struct intel_dp *intel
 							  bool enable)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
+	int ret;
 
 	if (!crtc_state->vrr.enable)
 		return;
 
-	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_DOWNSPREAD_CTRL,
-			       enable ? DP_MSA_TIMING_PAR_IGNORE_EN : 0) <= 0)
+	ret = drm_dp_dpcd_write_byte(&intel_dp->aux, DP_DOWNSPREAD_CTRL,
+				     enable ? DP_MSA_TIMING_PAR_IGNORE_EN : 0);
+	if (ret < 0)
 		drm_dbg_kms(display->drm,
 			    "Failed to %s MSA_TIMING_PAR_IGNORE in the sink\n",
 			    str_enable_disable(enable));
@@ -2347,18 +2349,20 @@ static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,
 					bool enable)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
+	int ret;
 
 	if (!crtc_state->fec_enable)
 		return;
 
-	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION,
-			       enable ? DP_FEC_READY : 0) <= 0)
+	ret = drm_dp_dpcd_write_byte(&intel_dp->aux, DP_FEC_CONFIGURATION,
+				     enable ? DP_FEC_READY : 0);
+	if (ret < 0)
 		drm_dbg_kms(display->drm, "Failed to set FEC_READY to %s in the sink\n",
 			    str_enabled_disabled(enable));
 
 	if (enable &&
-	    drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_STATUS,
-			       DP_FEC_DECODE_EN_DETECTED | DP_FEC_DECODE_DIS_DETECTED) <= 0)
+	    drm_dp_dpcd_write_byte(&intel_dp->aux, DP_FEC_STATUS,
+				   DP_FEC_DECODE_EN_DETECTED | DP_FEC_DECODE_DIS_DETECTED) < 0)
 		drm_dbg_kms(display->drm, "Failed to clear FEC detected flags\n");
 }
 
-- 
2.47.3

[PATCH 05/11] drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()

[Jani Nikula]

Switch to the modern DPCD access functions that return negative error
codes on errors, -EIO for incomplete access, and 0 on success.

Use local ret variables for the return value instead of checking
inline. Use %pe and ERR_PTR() for logging the errors.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_dp_aux_backlight.c | 51 ++++++++++---------
 1 file changed, 27 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
index 266e042e0023..f30da5f7e3d2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -120,8 +120,8 @@ intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector)
 
 	intel_dp_wait_source_oui(intel_dp);
 
-	ret = drm_dp_dpcd_read(aux, INTEL_EDP_HDR_TCON_CAP0, tcon_cap, sizeof(tcon_cap));
-	if (ret != sizeof(tcon_cap))
+	ret = drm_dp_dpcd_read_data(aux, INTEL_EDP_HDR_TCON_CAP0, tcon_cap, sizeof(tcon_cap));
+	if (ret < 0)
 		return false;
 
 	drm_dbg_kms(display->drm,
@@ -178,8 +178,10 @@ intel_dp_aux_hdr_get_backlight(struct intel_connector *connector, enum pipe pipe
 	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
 	u8 tmp;
 	u8 buf[2] = {};
+	int ret;
 
-	if (drm_dp_dpcd_readb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &tmp) != 1) {
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &tmp);
+	if (ret < 0) {
 		drm_err(display->drm,
 			"[CONNECTOR:%d:%s] Failed to read current backlight mode from DPCD\n",
 			connector->base.base.id, connector->base.name);
@@ -197,8 +199,9 @@ intel_dp_aux_hdr_get_backlight(struct intel_connector *connector, enum pipe pipe
 		return panel->backlight.max;
 	}
 
-	if (drm_dp_dpcd_read(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB, buf,
-			     sizeof(buf)) != sizeof(buf)) {
+	ret = drm_dp_dpcd_read_data(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB, buf,
+				    sizeof(buf));
+	if (ret < 0) {
 		drm_err(display->drm,
 			"[CONNECTOR:%d:%s] Failed to read brightness from DPCD\n",
 			connector->base.base.id, connector->base.name);
@@ -215,12 +218,14 @@ intel_dp_aux_hdr_set_aux_backlight(const struct drm_connector_state *conn_state,
 	struct drm_device *dev = connector->base.dev;
 	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
 	u8 buf[4] = {};
+	int ret;
 
 	buf[0] = level & 0xFF;
 	buf[1] = (level & 0xFF00) >> 8;
 
-	if (drm_dp_dpcd_write(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB, buf,
-			      sizeof(buf)) != sizeof(buf))
+	ret = drm_dp_dpcd_write_data(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB, buf,
+				     sizeof(buf));
+	if (ret < 0)
 		drm_err(dev, "[CONNECTOR:%d:%s] Failed to write brightness level to DPCD\n",
 			connector->base.base.id, connector->base.name);
 }
@@ -258,13 +263,12 @@ intel_dp_aux_write_content_luminance(struct intel_connector *connector,
 	buf[2] = hdr_metadata->hdmi_metadata_type1.max_fall & 0xFF;
 	buf[3] = (hdr_metadata->hdmi_metadata_type1.max_fall & 0xFF00) >> 8;
 
-	ret = drm_dp_dpcd_write(&intel_dp->aux,
-				INTEL_EDP_HDR_CONTENT_LUMINANCE,
-				buf, sizeof(buf));
+	ret = drm_dp_dpcd_write_data(&intel_dp->aux,
+				     INTEL_EDP_HDR_CONTENT_LUMINANCE,
+				     buf, sizeof(buf));
 	if (ret < 0)
 		drm_dbg_kms(display->drm,
-			    "Content Luminance DPCD reg write failed, err:-%d\n",
-			    ret);
+			    "Content Luminance DPCD reg write failed (%pe)\n", ERR_PTR(ret));
 }
 
 static void
@@ -313,11 +317,11 @@ intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state,
 
 	intel_dp_wait_source_oui(intel_dp);
 
-	ret = drm_dp_dpcd_readb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &old_ctrl);
-	if (ret != 1) {
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &old_ctrl);
+	if (ret < 0) {
 		drm_err(display->drm,
-			"[CONNECTOR:%d:%s] Failed to read current backlight control mode: %d\n",
-			connector->base.base.id, connector->base.name, ret);
+			"[CONNECTOR:%d:%s] Failed to read current backlight control mode (%pe)\n",
+			connector->base.base.id, connector->base.name, ERR_PTR(ret));
 		return;
 	}
 
@@ -338,7 +342,7 @@ intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state,
 	intel_dp_aux_fill_hdr_tcon_params(conn_state, &ctrl);
 
 	if (ctrl != old_ctrl &&
-	    drm_dp_dpcd_writeb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, ctrl) != 1)
+	    drm_dp_dpcd_write_byte(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, ctrl) < 0)
 		drm_err(display->drm,
 			"[CONNECTOR:%d:%s] Failed to configure DPCD brightness controls\n",
 			connector->base.base.id, connector->base.name);
@@ -392,13 +396,12 @@ intel_dp_aux_write_panel_luminance_override(struct intel_connector *connector)
 	buf[2] = panel->backlight.max & 0xFF;
 	buf[3] = (panel->backlight.max & 0xFF00) >> 8;
 
-	ret = drm_dp_dpcd_write(&intel_dp->aux,
-				INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE,
-				buf, sizeof(buf));
+	ret = drm_dp_dpcd_write_data(&intel_dp->aux,
+				     INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE,
+				     buf, sizeof(buf));
 	if (ret < 0)
 		drm_dbg_kms(display->drm,
-			    "Panel Luminance DPCD reg write failed, err:-%d\n",
-			    ret);
+			    "Panel Luminance DPCD reg write failed (%pe)\n", ERR_PTR(ret));
 }
 
 static int
@@ -456,8 +459,8 @@ static u32 intel_dp_aux_vesa_get_backlight(struct intel_connector *connector, en
 	int ret;
 
 	if (panel->backlight.edp.vesa.luminance_control_support) {
-		ret = drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_PANEL_TARGET_LUMINANCE_VALUE, buf,
-				       sizeof(buf));
+		ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_EDP_PANEL_TARGET_LUMINANCE_VALUE, buf,
+					    sizeof(buf));
 		if (ret < 0) {
 			drm_err(intel_dp->aux.drm_dev,
 				"[CONNECTOR:%d:%s] Failed to read Luminance from DPCD\n",
-- 
2.47.3

[PATCH 06/11] drm/i915/dp: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}

[Jani Nikula]

Switch to the modern DPCD access functions that return negative error
codes on errors, -EIO for incomplete access, and 0 on success.

Use local ret variables for the return value instead of checking inline,
where sensible. Rename local int err to ret for clarity and consistency.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 142 +++++++++++++++---------
 1 file changed, 88 insertions(+), 54 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0cd5e6b5034c..6a8cf3987aa5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3734,19 +3734,19 @@ static bool downstream_hpd_needs_d0(struct intel_dp *intel_dp)
 static int
 write_dsc_decompression_flag(struct drm_dp_aux *aux, u8 flag, bool set)
 {
-	int err;
+	int ret;
 	u8 val;
 
-	err = drm_dp_dpcd_readb(aux, DP_DSC_ENABLE, &val);
-	if (err < 0)
-		return err;
+	ret = drm_dp_dpcd_read_byte(aux, DP_DSC_ENABLE, &val);
+	if (ret < 0)
+		return ret;
 
 	if (set)
 		val |= flag;
 	else
 		val &= ~flag;
 
-	return drm_dp_dpcd_writeb(aux, DP_DSC_ENABLE, val);
+	return drm_dp_dpcd_write_byte(aux, DP_DSC_ENABLE, val);
 }
 
 static void
@@ -3910,6 +3910,7 @@ intel_dp_init_source_oui(struct intel_dp *intel_dp)
 	struct intel_display *display = to_intel_display(intel_dp);
 	u8 oui[] = { 0x00, 0xaa, 0x01 };
 	u8 buf[3] = {};
+	int ret;
 
 	if (READ_ONCE(intel_dp->oui_valid))
 		return;
@@ -3920,7 +3921,8 @@ intel_dp_init_source_oui(struct intel_dp *intel_dp)
 	 * During driver init, we want to be careful and avoid changing the source OUI if it's
 	 * already set to what we want, so as to avoid clearing any state by accident
 	 */
-	if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf, sizeof(buf)) < 0)
+	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_SOURCE_OUI, buf, sizeof(buf));
+	if (ret < 0)
 		drm_dbg_kms(display->drm, "Failed to read source OUI\n");
 
 	if (memcmp(oui, buf, sizeof(oui)) == 0) {
@@ -3929,7 +3931,8 @@ intel_dp_init_source_oui(struct intel_dp *intel_dp)
 		return;
 	}
 
-	if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0) {
+	ret = drm_dp_dpcd_write_data(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui));
+	if (ret < 0) {
 		drm_dbg_kms(display->drm, "Failed to write source OUI\n");
 		WRITE_ONCE(intel_dp->oui_valid, false);
 	}
@@ -3971,7 +3974,7 @@ void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode)
 		if (downstream_hpd_needs_d0(intel_dp))
 			return;
 
-		ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, mode);
+		ret = drm_dp_dpcd_write_byte(&intel_dp->aux, DP_SET_POWER, mode);
 	} else {
 		struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 
@@ -3985,17 +3988,17 @@ void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode)
 		 * time to wake up.
 		 */
 		for (i = 0; i < 3; i++) {
-			ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, mode);
-			if (ret == 1)
+			ret = drm_dp_dpcd_write_byte(&intel_dp->aux, DP_SET_POWER, mode);
+			if (!ret)
 				break;
 			msleep(1);
 		}
 
-		if (ret == 1 && intel_lspcon_active(dig_port))
+		if (!ret && intel_lspcon_active(dig_port))
 			intel_lspcon_wait_pcon_mode(dig_port);
 	}
 
-	if (ret != 1)
+	if (ret < 0)
 		drm_dbg_kms(display->drm,
 			    "[ENCODER:%d:%s] Set power to %s failed\n",
 			    encoder->base.base.id, encoder->base.name,
@@ -4086,6 +4089,7 @@ bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
 static void intel_dp_get_pcon_dsc_cap(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
+	int ret;
 
 	/* Clear the cached register set to avoid using stale values */
 
@@ -4094,9 +4098,10 @@ static void intel_dp_get_pcon_dsc_cap(struct intel_dp *intel_dp)
 	if (!drm_dp_is_branch(intel_dp->dpcd))
 		return;
 
-	if (drm_dp_dpcd_read(&intel_dp->aux, DP_PCON_DSC_ENCODER,
-			     intel_dp->pcon_dsc_dpcd,
-			     sizeof(intel_dp->pcon_dsc_dpcd)) < 0)
+	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_PCON_DSC_ENCODER,
+				    intel_dp->pcon_dsc_dpcd,
+				    sizeof(intel_dp->pcon_dsc_dpcd));
+	if (ret < 0)
 		drm_err(display->drm, "Failed to read DPCD register 0x%x\n",
 			DP_PCON_DSC_ENCODER);
 
@@ -4255,13 +4260,13 @@ int intel_dp_pcon_set_tmds_mode(struct intel_dp *intel_dp)
 	/* Set PCON source control mode */
 	buf |= DP_PCON_ENABLE_SOURCE_CTL_MODE;
 
-	ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf);
+	ret = drm_dp_dpcd_write_byte(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf);
 	if (ret < 0)
 		return ret;
 
 	/* Set HDMI LINK ENABLE */
 	buf |= DP_PCON_ENABLE_HDMI_LINK;
-	ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf);
+	ret = drm_dp_dpcd_write_byte(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf);
 	if (ret < 0)
 		return ret;
 
@@ -4407,6 +4412,7 @@ void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
 	bool ycbcr444_to_420 = false;
 	bool rgb_to_ycbcr = false;
 	u8 tmp;
+	int ret;
 
 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x13)
 		return;
@@ -4416,8 +4422,9 @@ void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
 
 	tmp = intel_dp_has_hdmi_sink(intel_dp) ? DP_HDMI_DVI_OUTPUT_CONFIG : 0;
 
-	if (drm_dp_dpcd_writeb(&intel_dp->aux,
-			       DP_PROTOCOL_CONVERTER_CONTROL_0, tmp) != 1)
+	ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
+				     DP_PROTOCOL_CONVERTER_CONTROL_0, tmp);
+	if (ret < 0)
 		drm_dbg_kms(display->drm,
 			    "Failed to %s protocol converter HDMI mode\n",
 			    str_enable_disable(intel_dp_has_hdmi_sink(intel_dp)));
@@ -4452,15 +4459,17 @@ void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
 
 	tmp = ycbcr444_to_420 ? DP_CONVERSION_TO_YCBCR420_ENABLE : 0;
 
-	if (drm_dp_dpcd_writeb(&intel_dp->aux,
-			       DP_PROTOCOL_CONVERTER_CONTROL_1, tmp) != 1)
+	ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
+				     DP_PROTOCOL_CONVERTER_CONTROL_1, tmp);
+	if (ret < 0)
 		drm_dbg_kms(display->drm,
 			    "Failed to %s protocol converter YCbCr 4:2:0 conversion mode\n",
 			    str_enable_disable(intel_dp->dfp.ycbcr_444_to_420));
 
 	tmp = rgb_to_ycbcr ? DP_CONVERSION_BT709_RGB_YCBCR_ENABLE : 0;
 
-	if (drm_dp_pcon_convert_rgb_to_ycbcr(&intel_dp->aux, tmp) < 0)
+	ret = drm_dp_pcon_convert_rgb_to_ycbcr(&intel_dp->aux, tmp);
+	if (ret < 0)
 		drm_dbg_kms(display->drm,
 			    "Failed to %s protocol converter RGB->YCbCr conversion mode\n",
 			    str_enable_disable(tmp));
@@ -4470,8 +4479,8 @@ static u8 intel_dp_read_dprx_feature_enum(struct intel_dp *intel_dp)
 {
 	u8 dprx = 0;
 
-	drm_dp_dpcd_read_data(&intel_dp->aux, DP_DPRX_FEATURE_ENUMERATION_LIST,
-			      &dprx, sizeof(dprx));
+	drm_dp_dpcd_read_byte(&intel_dp->aux, DP_DPRX_FEATURE_ENUMERATION_LIST, &dprx);
+
 	return dprx;
 }
 
@@ -4490,9 +4499,8 @@ static int intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
 {
 	int ret;
 
-	ret = drm_dp_dpcd_read_data(aux, DP_DSC_SUPPORT, dsc_dpcd,
-				    DP_DSC_RECEIVER_CAP_SIZE);
-	if (ret) {
+	ret = drm_dp_dpcd_read_data(aux, DP_DSC_SUPPORT, dsc_dpcd, DP_DSC_RECEIVER_CAP_SIZE);
+	if (ret < 0) {
 		drm_dbg_kms(aux->drm_dev,
 			    "Could not read DSC DPCD register 0x%x Error: %pe\n",
 			    DP_DSC_SUPPORT, ERR_PTR(ret));
@@ -4508,7 +4516,7 @@ static int intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
 static void init_dsc_overall_throughput_limits(struct intel_connector *connector, bool is_branch)
 {
 	u8 branch_caps[DP_DSC_BRANCH_CAP_SIZE];
-	int line_width;
+	int line_width, ret;
 
 	connector->dp.dsc_branch_caps.overall_throughput.rgb_yuv444 = INT_MAX;
 	connector->dp.dsc_branch_caps.overall_throughput.yuv422_420 = INT_MAX;
@@ -4517,9 +4525,10 @@ static void init_dsc_overall_throughput_limits(struct intel_connector *connector
 	if (!is_branch)
 		return;
 
-	if (drm_dp_dpcd_read_data(connector->dp.dsc_decompression_aux,
-				  DP_DSC_BRANCH_OVERALL_THROUGHPUT_0, branch_caps,
-				  sizeof(branch_caps)) != 0)
+	ret = drm_dp_dpcd_read_data(connector->dp.dsc_decompression_aux,
+				    DP_DSC_BRANCH_OVERALL_THROUGHPUT_0, branch_caps,
+				    sizeof(branch_caps));
+	if (ret < 0)
 		return;
 
 	connector->dp.dsc_branch_caps.overall_throughput.rgb_yuv444 =
@@ -4537,6 +4546,7 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
 			       struct intel_connector *connector)
 {
 	struct intel_display *display = to_intel_display(connector);
+	int ret;
 
 	/*
 	 * Clear the cached register set to avoid using stale values
@@ -4553,12 +4563,14 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
 	if (dpcd_rev < DP_DPCD_REV_14)
 		return;
 
-	if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
-				   connector->dp.dsc_dpcd) < 0)
+	ret = intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
+				     connector->dp.dsc_dpcd);
+	if (ret < 0)
 		return;
 
-	if (drm_dp_dpcd_readb(connector->dp.dsc_decompression_aux, DP_FEC_CAPABILITY,
-			      &connector->dp.fec_capability) < 0) {
+	ret = drm_dp_dpcd_read_byte(connector->dp.dsc_decompression_aux, DP_FEC_CAPABILITY,
+				    &connector->dp.fec_capability);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm, "Could not read FEC DPCD register\n");
 		return;
 	}
@@ -4668,12 +4680,14 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
 	struct intel_display *display = to_intel_display(intel_dp);
 	struct intel_connector *connector = intel_dp->attached_connector;
 	struct drm_display_info *info = &connector->base.display_info;
+	int ret;
 	u8 mso;
 
 	if (intel_dp->edp_dpcd[0] < DP_EDP_14)
 		return;
 
-	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_MSO_LINK_CAPABILITIES, &mso) != 1) {
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_EDP_MSO_LINK_CAPABILITIES, &mso);
+	if (ret < 0) {
 		drm_err(display->drm, "Failed to read MSO cap\n");
 		return;
 	}
@@ -4813,9 +4827,9 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp, struct intel_connector *connector
 	 * method). The display control registers should read zero if they're
 	 * not supported anyway.
 	 */
-	if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV,
-			     intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) ==
-			     sizeof(intel_dp->edp_dpcd)) {
+	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_EDP_DPCD_REV,
+				    intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd));
+	if (!ret) {
 		drm_dbg_kms(display->drm, "eDP DPCD: %*ph\n",
 			    (int)sizeof(intel_dp->edp_dpcd),
 			    intel_dp->edp_dpcd);
@@ -5044,6 +5058,7 @@ static bool
 intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *esi)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
+	int ret;
 
 	/*
 	 * Display WA for HSD #13013007775: mtl/arl/lnl
@@ -5052,24 +5067,30 @@ intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *esi)
 	 * inadvertently.
 	 */
 	if (IS_DISPLAY_VER(display, 14, 20) && !display->platform.battlemage) {
-		if (drm_dp_dpcd_read(&intel_dp->aux, DP_SINK_COUNT_ESI, esi, 3) != 3)
+		ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_SINK_COUNT_ESI, esi, 3);
+		if (ret < 0)
 			return false;
 
 		/* DP_SINK_COUNT_ESI + 3 == DP_LINK_SERVICE_IRQ_VECTOR_ESI0 */
-		return drm_dp_dpcd_readb(&intel_dp->aux, DP_LINK_SERVICE_IRQ_VECTOR_ESI0,
-					 &esi[3]) == 1;
+		ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_LINK_SERVICE_IRQ_VECTOR_ESI0,
+					    &esi[3]);
+		return ret == 0;
 	}
 
-	return drm_dp_dpcd_read(&intel_dp->aux, DP_SINK_COUNT_ESI, esi, 4) == 4;
+	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_SINK_COUNT_ESI, esi, 4);
+
+	return ret == 0;
 }
 
 static bool intel_dp_ack_sink_irq_esi(struct intel_dp *intel_dp, u8 esi[4])
 {
 	int retry;
+	int ret;
 
 	for (retry = 0; retry < 3; retry++) {
-		if (drm_dp_dpcd_write(&intel_dp->aux, DP_SINK_COUNT_ESI + 1,
-				      &esi[1], 3) == 3)
+		ret = drm_dp_dpcd_write_data(&intel_dp->aux, DP_SINK_COUNT_ESI + 1,
+					     &esi[1], 3);
+		if (!ret)
 			return true;
 	}
 
@@ -5079,20 +5100,24 @@ static bool intel_dp_ack_sink_irq_esi(struct intel_dp *intel_dp, u8 esi[4])
 /* Return %true if reading the ESI vector succeeded, %false otherwise. */
 static bool intel_dp_get_sink_irq_esi_sst(struct intel_dp *intel_dp, u8 esi[4])
 {
+	int ret;
+
 	memset(esi, 0, 4);
 
 	/*
 	 * TODO: For DP_DPCD_REV >= 0x12 read
 	 * DP_SINK_COUNT_ESI and DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0.
 	 */
-	if (drm_dp_dpcd_read_data(&intel_dp->aux, DP_SINK_COUNT, esi, 2) != 0)
+	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_SINK_COUNT, esi, 2);
+	if (ret < 0)
 		return false;
 
 	if (intel_dp->dpcd[DP_DPCD_REV] < DP_DPCD_REV_12)
 		return true;
 
 	/* TODO: Read DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1 as well */
-	if (drm_dp_dpcd_read_byte(&intel_dp->aux, DP_LINK_SERVICE_IRQ_VECTOR_ESI0, &esi[3]) != 0)
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_LINK_SERVICE_IRQ_VECTOR_ESI0, &esi[3]);
+	if (ret < 0)
 		return false;
 
 	return true;
@@ -5101,18 +5126,22 @@ static bool intel_dp_get_sink_irq_esi_sst(struct intel_dp *intel_dp, u8 esi[4])
 /* Return %true if acking the ESI vector IRQ events succeeded, %false otherwise. */
 static bool intel_dp_ack_sink_irq_esi_sst(struct intel_dp *intel_dp, u8 esi[4])
 {
+	int ret;
+
 	/*
 	 * TODO: For DP_DPCD_REV >= 0x12 write
 	 * DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0
 	 */
-	if (drm_dp_dpcd_write_byte(&intel_dp->aux, DP_DEVICE_SERVICE_IRQ_VECTOR, esi[1]) != 0)
+	ret = drm_dp_dpcd_write_byte(&intel_dp->aux, DP_DEVICE_SERVICE_IRQ_VECTOR, esi[1]);
+	if (ret < 0)
 		return false;
 
 	if (intel_dp->dpcd[DP_DPCD_REV] < DP_DPCD_REV_12)
 		return true;
 
 	/* TODO: Read DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1 as well */
-	if (drm_dp_dpcd_write_byte(&intel_dp->aux, DP_LINK_SERVICE_IRQ_VECTOR_ESI0, esi[3]) != 0)
+	ret = drm_dp_dpcd_write_byte(&intel_dp->aux, DP_LINK_SERVICE_IRQ_VECTOR_ESI0, esi[3]);
+	if (ret < 0)
 		return false;
 
 	return true;
@@ -5706,14 +5735,17 @@ intel_dp_handle_hdmi_link_status_change(struct intel_dp *intel_dp)
 {
 	bool is_active;
 	u8 buf = 0;
+	int ret;
 
 	is_active = drm_dp_pcon_hdmi_link_active(&intel_dp->aux);
 	if (intel_dp->frl.is_trained && !is_active) {
-		if (drm_dp_dpcd_readb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, &buf) < 0)
+		ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, &buf);
+		if (ret < 0)
 			return;
 
 		buf &=  ~DP_PCON_ENABLE_HDMI_LINK;
-		if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf) < 0)
+		ret = drm_dp_dpcd_write_byte(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf);
+		if (ret < 0)
 			return;
 
 		drm_dp_pcon_hdmi_frl_link_error_count(&intel_dp->aux, &intel_dp->attached_connector->base);
@@ -6218,6 +6250,7 @@ static bool
 intel_dp_sink_supports_as_sdp_v2(struct intel_dp *intel_dp)
 {
 	u8 rx_features;
+	int ret;
 
 	/*
 	 * The DP spec does not explicitly provide the AS SDP v2 capability.
@@ -6240,9 +6273,10 @@ intel_dp_sink_supports_as_sdp_v2(struct intel_dp *intel_dp)
 	 * support from Display ID.
 	 */
 
-	if (drm_dp_dpcd_read_byte(&intel_dp->aux,
-				  DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1,
-				  &rx_features) == 1) {
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
+				    DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1,
+				    &rx_features);
+	if (!ret) {
 		if (rx_features & DP_AS_SDP_FAVT_PAYLOAD_FIELDS_PARSING_SUPPORTED)
 			return true;
 	}
-- 
2.47.3

[PATCH 07/11] drm/i915/hdcp: switch to drm_dp_dpcd_{read_byte, read_data, write_data}()

[Jani Nikula]

Switch to the modern DPCD access functions that return negative error
codes on errors, -EIO for incomplete access, and 0 on success.

This simplifies error handling all over the place. Convert the error
logging to use %pe and ERR_PTR() while at it.

Add comments to the read/write places that depend on the functions that
return the number of bytes read/written for incomplete access.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 173 +++++++++----------
 1 file changed, 86 insertions(+), 87 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 14ed0ea22dd3..5e23be05cb51 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -60,16 +60,15 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
 {
 	struct intel_display *display = to_intel_display(dig_port);
 	u8 aksv[DRM_HDCP_KSV_LEN] = {};
-	ssize_t dpcd_ret;
+	int ret;
 
 	/* Output An first, that's easy */
-	dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AN,
+	ret = drm_dp_dpcd_write_data(&dig_port->dp.aux, DP_AUX_HDCP_AN,
 				     an, DRM_HDCP_AN_LEN);
-	if (dpcd_ret != DRM_HDCP_AN_LEN) {
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Failed to write An over DP/AUX (%zd)\n",
-			    dpcd_ret);
-		return dpcd_ret >= 0 ? -EIO : dpcd_ret;
+			    "Failed to write An over DP/AUX (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
 
 	/*
@@ -79,14 +78,14 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
 	 * the destination address which will tickle the hardware to output the
 	 * Aksv on our behalf after the header is sent.
 	 */
-	dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AKSV,
+	ret = drm_dp_dpcd_write_data(&dig_port->dp.aux, DP_AUX_HDCP_AKSV,
 				     aksv, DRM_HDCP_KSV_LEN);
-	if (dpcd_ret != DRM_HDCP_KSV_LEN) {
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Failed to write Aksv over DP/AUX (%zd)\n",
-			    dpcd_ret);
-		return dpcd_ret >= 0 ? -EIO : dpcd_ret;
+			    "Failed to write Aksv over DP/AUX (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
+
 	return 0;
 }
 
@@ -94,15 +93,16 @@ static int intel_dp_hdcp_read_bksv(struct intel_digital_port *dig_port,
 				   u8 *bksv)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
+	int ret;
 
-	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BKSV, bksv,
-			       DRM_HDCP_KSV_LEN);
-	if (ret != DRM_HDCP_KSV_LEN) {
+	ret = drm_dp_dpcd_read_data(&dig_port->dp.aux, DP_AUX_HDCP_BKSV, bksv,
+				    DRM_HDCP_KSV_LEN);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read Bksv from DP/AUX failed (%zd)\n", ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read Bksv from DP/AUX failed (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
+
 	return 0;
 }
 
@@ -110,20 +110,21 @@ static int intel_dp_hdcp_read_bstatus(struct intel_digital_port *dig_port,
 				      u8 *bstatus)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
+	int ret;
 
 	/*
 	 * For some reason the HDMI and DP HDCP specs call this register
 	 * definition by different names. In the HDMI spec, it's called BSTATUS,
 	 * but in DP it's called BINFO.
 	 */
-	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BINFO,
-			       bstatus, DRM_HDCP_BSTATUS_LEN);
-	if (ret != DRM_HDCP_BSTATUS_LEN) {
+	ret = drm_dp_dpcd_read_data(&dig_port->dp.aux, DP_AUX_HDCP_BINFO,
+				    bstatus, DRM_HDCP_BSTATUS_LEN);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read bstatus from DP/AUX failed (%zd)\n", ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read bstatus from DP/AUX failed (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
+
 	return 0;
 }
 
@@ -132,14 +133,13 @@ int intel_dp_hdcp_read_bcaps(struct drm_dp_aux *aux,
 			     struct intel_display *display,
 			     u8 *bcaps)
 {
-	ssize_t ret;
+	int ret;
 
-	ret = drm_dp_dpcd_read(aux, DP_AUX_HDCP_BCAPS,
-			       bcaps, 1);
-	if (ret != 1) {
+	ret = drm_dp_dpcd_read_byte(aux, DP_AUX_HDCP_BCAPS, bcaps);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read bcaps from DP/AUX failed (%zd)\n", ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read bcaps from DP/AUX failed (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
 
 	return 0;
@@ -166,16 +166,16 @@ int intel_dp_hdcp_read_ri_prime(struct intel_digital_port *dig_port,
 				u8 *ri_prime)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
+	int ret;
 
-	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_RI_PRIME,
-			       ri_prime, DRM_HDCP_RI_LEN);
-	if (ret != DRM_HDCP_RI_LEN) {
+	ret = drm_dp_dpcd_read_data(&dig_port->dp.aux, DP_AUX_HDCP_RI_PRIME,
+				    ri_prime, DRM_HDCP_RI_LEN);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read Ri' from DP/AUX failed (%zd)\n",
-			    ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read Ri' from DP/AUX failed (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
+
 	return 0;
 }
 
@@ -184,17 +184,18 @@ int intel_dp_hdcp_read_ksv_ready(struct intel_digital_port *dig_port,
 				 bool *ksv_ready)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
 	u8 bstatus;
+	int ret;
 
-	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
-			       &bstatus, 1);
-	if (ret != 1) {
+	ret = drm_dp_dpcd_read_byte(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
+				    &bstatus);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read bstatus from DP/AUX failed (%zd)\n", ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read bstatus from DP/AUX failed (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
 	*ksv_ready = bstatus & DP_BSTATUS_READY;
+
 	return 0;
 }
 
@@ -203,23 +204,24 @@ int intel_dp_hdcp_read_ksv_fifo(struct intel_digital_port *dig_port,
 				int num_downstream, u8 *ksv_fifo)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
+	int ret;
 	int i;
 
 	/* KSV list is read via 15 byte window (3 entries @ 5 bytes each) */
 	for (i = 0; i < num_downstream; i += 3) {
 		size_t len = min(num_downstream - i, 3) * DRM_HDCP_KSV_LEN;
-		ret = drm_dp_dpcd_read(&dig_port->dp.aux,
-				       DP_AUX_HDCP_KSV_FIFO,
-				       ksv_fifo + i * DRM_HDCP_KSV_LEN,
-				       len);
-		if (ret != len) {
+		ret = drm_dp_dpcd_read_data(&dig_port->dp.aux,
+					    DP_AUX_HDCP_KSV_FIFO,
+					    ksv_fifo + i * DRM_HDCP_KSV_LEN,
+					    len);
+		if (ret < 0) {
 			drm_dbg_kms(display->drm,
-				    "Read ksv[%d] from DP/AUX failed (%zd)\n",
-				    i, ret);
-			return ret >= 0 ? -EIO : ret;
+				    "Read ksv[%d] from DP/AUX failed (%pe)\n",
+				    i, ERR_PTR(ret));
+			return ret;
 		}
 	}
+
 	return 0;
 }
 
@@ -228,19 +230,19 @@ int intel_dp_hdcp_read_v_prime_part(struct intel_digital_port *dig_port,
 				    int i, u32 *part)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
+	int ret;
 
 	if (i >= DRM_HDCP_V_PRIME_NUM_PARTS)
 		return -EINVAL;
 
-	ret = drm_dp_dpcd_read(&dig_port->dp.aux,
-			       DP_AUX_HDCP_V_PRIME(i), part,
-			       DRM_HDCP_V_PRIME_PART_LEN);
-	if (ret != DRM_HDCP_V_PRIME_PART_LEN) {
+	ret = drm_dp_dpcd_read_data(&dig_port->dp.aux, DP_AUX_HDCP_V_PRIME(i), part,
+				    DRM_HDCP_V_PRIME_PART_LEN);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read v'[%d] from DP/AUX failed (%zd)\n", i, ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read v'[%d] from DP/AUX failed (%pe)\n", i, ERR_PTR(ret));
+		return ret;
 	}
+
 	return 0;
 }
 
@@ -258,14 +260,13 @@ bool intel_dp_hdcp_check_link(struct intel_digital_port *dig_port,
 			      struct intel_connector *connector)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
 	u8 bstatus;
+	int ret;
 
-	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
-			       &bstatus, 1);
-	if (ret != 1) {
+	ret = drm_dp_dpcd_read_byte(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS, &bstatus);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read bstatus from DP/AUX failed (%zd)\n", ret);
+			    "Read bstatus from DP/AUX failed (%pe)\n", ERR_PTR(ret));
 		return false;
 	}
 
@@ -346,15 +347,14 @@ intel_dp_hdcp2_read_rx_status(struct intel_connector *connector,
 	struct intel_display *display = to_intel_display(connector);
 	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_dp_aux *aux = &dig_port->dp.aux;
-	ssize_t ret;
+	int ret;
 
-	ret = drm_dp_dpcd_read(aux,
-			       DP_HDCP_2_2_REG_RXSTATUS_OFFSET, rx_status,
-			       HDCP_2_2_DP_RXSTATUS_LEN);
-	if (ret != HDCP_2_2_DP_RXSTATUS_LEN) {
+	ret = drm_dp_dpcd_read_data(aux, DP_HDCP_2_2_REG_RXSTATUS_OFFSET, rx_status,
+				    HDCP_2_2_DP_RXSTATUS_LEN);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read bstatus from DP/AUX failed (%zd)\n", ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read bstatus from DP/AUX failed (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
 
 	return 0;
@@ -474,8 +474,8 @@ int intel_dp_hdcp2_write_msg(struct intel_connector *connector,
 		len = bytes_to_write > DP_AUX_MAX_PAYLOAD_BYTES ?
 				DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_write;
 
-		ret = drm_dp_dpcd_write(aux,
-					offset, (void *)byte, len);
+		/* Note: This may return < len for partial writes. */
+		ret = drm_dp_dpcd_write(aux, offset, byte, len);
 		if (ret < 0)
 			return ret;
 
@@ -493,14 +493,13 @@ ssize_t get_receiver_id_list_rx_info(struct intel_connector *connector,
 {
 	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_dp_aux *aux = &dig_port->dp.aux;
-	ssize_t ret;
 	u8 *rx_info = byte;
+	int ret;
 
-	ret = drm_dp_dpcd_read(aux,
-			       DP_HDCP_2_2_REG_RXINFO_OFFSET,
-			       (void *)rx_info, HDCP_2_2_RXINFO_LEN);
-	if (ret != HDCP_2_2_RXINFO_LEN)
-		return ret >= 0 ? -EIO : ret;
+	ret = drm_dp_dpcd_read_data(aux, DP_HDCP_2_2_REG_RXINFO_OFFSET,
+				    rx_info, HDCP_2_2_RXINFO_LEN);
+	if (ret < 0)
+		return ret;
 
 	*dev_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 |
 		   HDCP_2_2_DEV_COUNT_LO(rx_info[1]));
@@ -566,11 +565,11 @@ int intel_dp_hdcp2_read_msg(struct intel_connector *connector,
 					       hdcp2_msg_data->msg_read_timeout);
 		}
 
-		ret = drm_dp_dpcd_read(aux, offset,
-				       (void *)byte, len);
+		/* Note: This may return < len for partial reads. */
+		ret = drm_dp_dpcd_read(aux, offset, byte, len);
 		if (ret < 0) {
-			drm_dbg_kms(display->drm, "msg_id %d, ret %zd\n",
-				    msg_id, ret);
+			drm_dbg_kms(display->drm, "msg_id %d, ret %pe\n",
+				    msg_id, ERR_PTR(ret));
 			return ret;
 		}
 
@@ -660,11 +659,11 @@ int _intel_dp_hdcp2_get_capability(struct drm_dp_aux *aux,
 	 * declare a monitor not capable of HDCP 2.2.
 	 */
 	for (i = 0; i < 3; i++) {
-		ret = drm_dp_dpcd_read(aux,
-				       DP_HDCP_2_2_REG_RX_CAPS_OFFSET,
-				       rx_caps, HDCP_2_2_RXCAPS_LEN);
-		if (ret != HDCP_2_2_RXCAPS_LEN)
-			return ret >= 0 ? -EIO : ret;
+		ret = drm_dp_dpcd_read_data(aux,
+					    DP_HDCP_2_2_REG_RX_CAPS_OFFSET,
+					    rx_caps, HDCP_2_2_RXCAPS_LEN);
+		if (ret < 0)
+			return ret;
 
 		if (rx_caps[0] == HDCP_2_2_RX_CAPS_VERSION_VAL &&
 		    HDCP_2_2_DP_HDCP_CAPABLE(rx_caps[2])) {
-- 
2.47.3

[PATCH 08/11] drm/i915/dp: switch link training to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()

[Jani Nikula]

Switch to the modern DPCD access functions that return negative error
codes on errors, -EIO for incomplete access, and 0 on success.

Use local ret variables for the return value instead of checking inline,
where sensible.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_dp_link_training.c | 48 ++++++++++---------
 1 file changed, 26 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index cb92cff90614..6096930fe3a1 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -929,7 +929,7 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
 {
 	int reg = intel_dp_training_pattern_set_reg(intel_dp, dp_phy);
 	u8 buf[sizeof(intel_dp->train_set) + 1];
-	int len;
+	int ret, len;
 
 	intel_dp_program_link_training_pattern(intel_dp, crtc_state,
 					       dp_phy, dp_train_pat);
@@ -939,7 +939,9 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
 	memcpy(buf + 1, intel_dp->train_set, crtc_state->lane_count);
 	len = crtc_state->lane_count + 1;
 
-	return drm_dp_dpcd_write(&intel_dp->aux, reg, buf, len) == len;
+	ret = drm_dp_dpcd_write_data(&intel_dp->aux, reg, buf, len);
+
+	return !ret;
 }
 
 static char dp_training_pattern_name(u8 train_pat)
@@ -1046,10 +1048,10 @@ intel_dp_update_link_train(struct intel_dp *intel_dp,
 
 	intel_dp_set_signal_levels(intel_dp, crtc_state, dp_phy);
 
-	ret = drm_dp_dpcd_write(&intel_dp->aux, reg,
-				intel_dp->train_set, crtc_state->lane_count);
+	ret = drm_dp_dpcd_write_data(&intel_dp->aux, reg,
+				     intel_dp->train_set, crtc_state->lane_count);
 
-	return ret == crtc_state->lane_count;
+	return !ret;
 }
 
 /* 128b/132b */
@@ -1115,7 +1117,7 @@ void intel_dp_link_training_set_mode(struct intel_dp *intel_dp, int link_rate,
 	link_config[0] |= pr_with_as_sdp_enable ? DP_FIXED_VTOTAL_AS_SDP_EN_IN_PR_ACTIVE : 0;
 	link_config[1] = drm_dp_is_uhbr_rate(link_rate) ?
 			 DP_SET_ANSI_128B132B : DP_SET_ANSI_8B10B;
-	drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2);
+	drm_dp_dpcd_write_data(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2);
 }
 
 static bool
@@ -1163,8 +1165,8 @@ void intel_dp_link_training_set_bw(struct intel_dp *intel_dp,
 		/* DP and eDP v1.3 and earlier link bw set method. */
 		u8 link_config[] = { link_bw, lane_count };
 
-		drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET, link_config,
-				  ARRAY_SIZE(link_config));
+		drm_dp_dpcd_write_data(&intel_dp->aux, DP_LINK_BW_SET, link_config,
+				       sizeof(link_config));
 	} else {
 		/*
 		 * eDP v1.4 and later link rate set method.
@@ -1175,8 +1177,8 @@ void intel_dp_link_training_set_bw(struct intel_dp *intel_dp,
 		 * eDP v1.5 sinks allow choosing either, and the last choice
 		 * shall be active.
 		 */
-		drm_dp_dpcd_writeb(&intel_dp->aux, DP_LANE_COUNT_SET, lane_count);
-		drm_dp_dpcd_writeb(&intel_dp->aux, DP_LINK_RATE_SET, rate_select);
+		drm_dp_dpcd_write_byte(&intel_dp->aux, DP_LANE_COUNT_SET, lane_count);
+		drm_dp_dpcd_write_byte(&intel_dp->aux, DP_LINK_RATE_SET, rate_select);
 	}
 }
 
@@ -1286,8 +1288,8 @@ intel_dp_prepare_link_train(struct intel_dp *intel_dp,
 
 		lt_dbg(intel_dp, DP_PHY_DPRX, "Reloading eDP link rates\n");
 
-		drm_dp_dpcd_read(&intel_dp->aux, DP_SUPPORTED_LINK_RATES,
-				 sink_rates, sizeof(sink_rates));
+		drm_dp_dpcd_read_data(&intel_dp->aux, DP_SUPPORTED_LINK_RATES,
+				      sink_rates, sizeof(sink_rates));
 	}
 
 	if (link_bw)
@@ -1612,7 +1614,7 @@ static void intel_dp_stop_post_lt_adj_req(struct intel_dp *intel_dp,
 	if (crtc_state->enhanced_framing)
 		lane_count |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
 
-	drm_dp_dpcd_writeb(&intel_dp->aux, DP_LANE_COUNT_SET, lane_count);
+	drm_dp_dpcd_write_byte(&intel_dp->aux, DP_LANE_COUNT_SET, lane_count);
 }
 
 static bool intel_dp_disable_dpcd_training_pattern(struct intel_dp *intel_dp,
@@ -1621,7 +1623,7 @@ static bool intel_dp_disable_dpcd_training_pattern(struct intel_dp *intel_dp,
 	int reg = intel_dp_training_pattern_set_reg(intel_dp, dp_phy);
 	u8 val = DP_TRAINING_PATTERN_DISABLE;
 
-	return drm_dp_dpcd_write(&intel_dp->aux, reg, &val, 1) == 1;
+	return drm_dp_dpcd_write_byte(&intel_dp->aux, reg, val) == 0;
 }
 
 static int
@@ -1631,10 +1633,10 @@ intel_dp_128b132b_intra_hop(struct intel_dp *intel_dp,
 	u8 sink_status;
 	int ret;
 
-	ret = drm_dp_dpcd_readb(&intel_dp->aux, DP_SINK_STATUS, &sink_status);
-	if (ret != 1) {
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_SINK_STATUS, &sink_status);
+	if (ret < 0) {
 		lt_dbg(intel_dp, DP_PHY_DPRX, "Failed to read sink status\n");
-		return ret < 0 ? ret : -EIO;
+		return ret;
 	}
 
 	return sink_status & DP_INTRA_HOP_AUX_REPLY_INDICATION ? 1 : 0;
@@ -2173,9 +2175,11 @@ intel_dp_128b132b_lane_cds(struct intel_dp *intel_dp,
 {
 	u8 link_status[DP_LINK_STATUS_SIZE];
 	unsigned long deadline;
+	int ret;
 
-	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TRAINING_PATTERN_SET,
-			       DP_TRAINING_PATTERN_2_CDS) != 1) {
+	ret = drm_dp_dpcd_write_byte(&intel_dp->aux, DP_TRAINING_PATTERN_SET,
+				     DP_TRAINING_PATTERN_2_CDS);
+	if (ret < 0) {
 		lt_err(intel_dp, DP_PHY_DPRX, "Failed to start 128b/132b TPS2 CDS\n");
 		return false;
 	}
@@ -2363,9 +2367,9 @@ void intel_dp_128b132b_sdp_crc16(struct intel_dp *intel_dp,
 		return;
 
 	/* DP v2.0 SCR on SDP CRC16 for 128b/132b Link Layer */
-	drm_dp_dpcd_writeb(&intel_dp->aux,
-			   DP_SDP_ERROR_DETECTION_CONFIGURATION,
-			   DP_SDP_CRC16_128B132B_EN);
+	drm_dp_dpcd_write_byte(&intel_dp->aux,
+			       DP_SDP_ERROR_DETECTION_CONFIGURATION,
+			       DP_SDP_CRC16_128B132B_EN);
 
 	lt_dbg(intel_dp, DP_PHY_DPRX, "DP2.0 SDP CRC16 for 128b/132b enabled\n");
 }
-- 
2.47.3

[PATCH 09/11] drm/i915/dp-mst: switch to drm_dp_dpcd_read_byte()

[Jani Nikula]

Switch to the modern DPCD access functions that return negative error
codes on errors, -EIO for incomplete access, and 0 on success.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 6a869d0f6ffc..87aea2a8ee69 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -2230,7 +2230,7 @@ bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp)
 	if (!intel_dp->is_mst)
 		return true;
 
-	ret = drm_dp_dpcd_readb(intel_dp->mst.mgr.aux, DP_MSTM_CTRL, &val);
+	ret = drm_dp_dpcd_read_byte(intel_dp->mst.mgr.aux, DP_MSTM_CTRL, &val);
 
 	/* Adjust the expected register value for SST + SideBand. */
 	if (ret < 0 || val != (DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC)) {
-- 
2.47.3

[PATCH 10/11] drm/i915/dp-test: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()

[Jani Nikula]

Switch to the modern DPCD access functions that return negative error
codes on errors, -EIO for incomplete access, and 0 on success.

This flags incomplete reads, and simplifies error handling all over the
place. Rename local int status to ret for clarity and consistency.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_test.c | 57 ++++++++++----------
 1 file changed, 27 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_test.c b/drivers/gpu/drm/i915/display/intel_dp_test.c
index 0551a1ce60d3..424183a65155 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_test.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_test.c
@@ -147,25 +147,24 @@ bool intel_dp_test_compute_config(struct intel_connector *connector,
 static u8 intel_dp_autotest_link_training(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	int status = 0;
+	int ret;
 	int test_link_rate;
 	u8 test_lane_count, test_link_bw;
 	/* (DP CTS 1.2)
 	 * 4.3.1.11
 	 */
 	/* Read the TEST_LANE_COUNT and TEST_LINK_RTAE fields (DP CTS 3.1.4) */
-	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LANE_COUNT,
-				   &test_lane_count);
-
-	if (status <= 0) {
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_TEST_LANE_COUNT,
+				    &test_lane_count);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm, "Lane count read failed\n");
 		return DP_TEST_NAK;
 	}
 	test_lane_count &= DP_MAX_LANE_COUNT_MASK;
 
-	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LINK_RATE,
-				   &test_link_bw);
-	if (status <= 0) {
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_TEST_LINK_RATE,
+				    &test_link_bw);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm, "Link Rate read failed\n");
 		return DP_TEST_NAK;
 	}
@@ -188,35 +187,33 @@ static u8 intel_dp_autotest_video_pattern(struct intel_dp *intel_dp)
 	u8 test_pattern;
 	u8 test_misc;
 	__be16 h_width, v_height;
-	int status = 0;
+	int ret;
 
 	/* Read the TEST_PATTERN (DP CTS 3.1.5) */
-	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_PATTERN,
-				   &test_pattern);
-	if (status <= 0) {
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_TEST_PATTERN,
+				    &test_pattern);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm, "Test pattern read failed\n");
 		return DP_TEST_NAK;
 	}
 	if (test_pattern != DP_COLOR_RAMP)
 		return DP_TEST_NAK;
 
-	status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_H_WIDTH_HI,
-				  &h_width, 2);
-	if (status <= 0) {
+	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_TEST_H_WIDTH_HI, &h_width, 2);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm, "H Width read failed\n");
 		return DP_TEST_NAK;
 	}
 
-	status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_V_HEIGHT_HI,
-				  &v_height, 2);
-	if (status <= 0) {
+	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_TEST_V_HEIGHT_HI,
+				    &v_height, 2);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm, "V Height read failed\n");
 		return DP_TEST_NAK;
 	}
 
-	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_MISC0,
-				   &test_misc);
-	if (status <= 0) {
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_TEST_MISC0, &test_misc);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm, "TEST MISC read failed\n");
 		return DP_TEST_NAK;
 	}
@@ -274,8 +271,8 @@ static u8 intel_dp_autotest_edid(struct intel_dp *intel_dp)
 		/* We have to write the checksum of the last block read */
 		block += block->extensions;
 
-		if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_EDID_CHECKSUM,
-				       block->checksum) <= 0)
+		if (drm_dp_dpcd_write_byte(&intel_dp->aux, DP_TEST_EDID_CHECKSUM,
+					   block->checksum) < 0)
 			drm_dbg_kms(display->drm,
 				    "Failed to write EDID checksum\n");
 
@@ -397,8 +394,8 @@ static void intel_dp_process_phy_request(struct intel_dp *intel_dp,
 
 	intel_dp_phy_pattern_update(intel_dp, crtc_state);
 
-	drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET,
-			  intel_dp->train_set, crtc_state->lane_count);
+	drm_dp_dpcd_write_data(&intel_dp->aux, DP_TRAINING_LANE0_SET,
+			       intel_dp->train_set, crtc_state->lane_count);
 
 	drm_dp_set_phy_test_pattern(&intel_dp->aux, data,
 				    intel_dp->dpcd[DP_DPCD_REV]);
@@ -427,10 +424,10 @@ void intel_dp_test_request(struct intel_dp *intel_dp)
 	struct intel_display *display = to_intel_display(intel_dp);
 	u8 response = DP_TEST_NAK;
 	u8 request = 0;
-	int status;
+	int ret;
 
-	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_REQUEST, &request);
-	if (status <= 0) {
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_TEST_REQUEST, &request);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
 			    "Could not read test request from sink\n");
 		goto update_status;
@@ -463,8 +460,8 @@ void intel_dp_test_request(struct intel_dp *intel_dp)
 		intel_dp->compliance.test_type = request;
 
 update_status:
-	status = drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_RESPONSE, response);
-	if (status <= 0)
+	ret = drm_dp_dpcd_write_byte(&intel_dp->aux, DP_TEST_RESPONSE, response);
+	if (ret < 0)
 		drm_dbg_kms(display->drm,
 			    "Could not write test response to sink\n");
 }
-- 
2.47.3

[PATCH 11/11] drm/i915/psr: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()

[Jani Nikula]

Switch to the modern DPCD access functions that return negative error
codes on errors, -EIO for incomplete access, and 0 on success.

This flags incomplete reads, and clarifies error handling all over the
place. Use 1-byte accessors where sensible. Rename local int r to ret
for clarity and consistency.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 65 ++++++++++++------------
 1 file changed, 33 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 872e253db178..f1d48b69a18f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -471,9 +471,10 @@ static u8 intel_dp_get_sink_sync_latency(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 	u8 val = 8; /* assume the worst if we can't read the value */
+	int ret;
 
-	if (drm_dp_dpcd_readb(&intel_dp->aux,
-			      DP_SYNCHRONIZATION_LATENCY_IN_SINK, &val) == 1)
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_SYNCHRONIZATION_LATENCY_IN_SINK, &val);
+	if (!ret)
 		val &= DP_MAX_RESYNC_FRAME_COUNT_MASK;
 	else
 		drm_dbg_kms(display->drm,
@@ -485,7 +486,7 @@ static void _psr_compute_su_granularity(struct intel_dp *intel_dp,
 					struct intel_connector *connector)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	ssize_t r;
+	int ret;
 	__le16 w;
 	u8 y;
 
@@ -500,19 +501,19 @@ static void _psr_compute_su_granularity(struct intel_dp *intel_dp,
 		goto exit;
 	}
 
-	r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_X_GRANULARITY, &w, sizeof(w));
-	if (r != sizeof(w))
+	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_PSR2_SU_X_GRANULARITY, &w, sizeof(w));
+	if (ret < 0)
 		drm_dbg_kms(display->drm,
 			    "Unable to read selective update x granularity\n");
 	/*
 	 * Spec says that if the value read is 0 the default granularity should
 	 * be used instead.
 	 */
-	if (r != sizeof(w) || w == 0)
+	if (ret < 0 || w == 0)
 		w = cpu_to_le16(4);
 
-	r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_Y_GRANULARITY, &y, 1);
-	if (r != 1) {
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_PSR2_SU_Y_GRANULARITY, &y);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
 			    "Unable to read selective update y granularity\n");
 		y = 4;
@@ -796,11 +797,11 @@ static void _panel_replay_enable_sink(struct intel_dp *intel_dp,
 		panel_replay_config[1] |=
 			DP_PANEL_REPLAY_SU_REGION_SCANLINE_CAPTURE;
 
-	drm_dp_dpcd_write(&intel_dp->aux, PANEL_REPLAY_CONFIG,
-			  panel_replay_config, sizeof(panel_replay_config));
+	drm_dp_dpcd_write_data(&intel_dp->aux, PANEL_REPLAY_CONFIG,
+			       panel_replay_config, sizeof(panel_replay_config));
 
 	panel_replay_config_3 = intel_dp_as_sdp_transmission_time();
-	drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG3, panel_replay_config_3);
+	drm_dp_dpcd_write_byte(&intel_dp->aux, PANEL_REPLAY_CONFIG3, panel_replay_config_3);
 }
 
 static void _psr_enable_sink(struct intel_dp *intel_dp,
@@ -827,10 +828,10 @@ static void _psr_enable_sink(struct intel_dp *intel_dp,
 
 	if (intel_dp->psr.entry_setup_frames > 0)
 		val |= DP_PSR_FRAME_CAPTURE;
-	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, val);
+	drm_dp_dpcd_write_byte(&intel_dp->aux, DP_PSR_EN_CFG, val);
 
 	val |= DP_PSR_ENABLE;
-	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, val);
+	drm_dp_dpcd_write_byte(&intel_dp->aux, DP_PSR_EN_CFG, val);
 }
 
 static void intel_psr_enable_sink(struct intel_dp *intel_dp,
@@ -843,7 +844,7 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp,
 		_psr_enable_sink(intel_dp, crtc_state);
 
 	if (intel_dp_is_edp(intel_dp))
-		drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
+		drm_dp_dpcd_write_byte(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
 }
 
 void intel_psr_panel_replay_enable_sink(struct intel_dp *intel_dp)
@@ -854,8 +855,8 @@ void intel_psr_panel_replay_enable_sink(struct intel_dp *intel_dp)
 	 * ensure this bit is cleared/set accordingly.
 	 */
 	if (CAN_PANEL_REPLAY(intel_dp) && panel_replay_global_enabled(intel_dp))
-		drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG,
-				   DP_PANEL_REPLAY_ENABLE);
+		drm_dp_dpcd_write_byte(&intel_dp->aux, PANEL_REPLAY_CONFIG,
+				       DP_PANEL_REPLAY_ENABLE);
 }
 
 static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp)
@@ -2373,11 +2374,11 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 
 	/* Disable PSR on Sink */
 	if (!intel_dp->psr.panel_replay_enabled) {
-		drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
+		drm_dp_dpcd_write_byte(&intel_dp->aux, DP_PSR_EN_CFG, 0);
 
 		if (intel_dp->psr.sel_update_enabled)
-			drm_dp_dpcd_writeb(&intel_dp->aux,
-					   DP_RECEIVER_ALPM_CONFIG, 0);
+			drm_dp_dpcd_write_byte(&intel_dp->aux,
+					       DP_RECEIVER_ALPM_CONFIG, 0);
 	}
 
 	/* Wa_16025596647 */
@@ -3517,7 +3518,7 @@ static void intel_psr_handle_irq(struct intel_dp *intel_dp)
 	intel_psr_disable_locked(intel_dp);
 	psr->sink_not_reliable = true;
 	/* let's make sure that sink is awaken */
-	drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
+	drm_dp_dpcd_write_byte(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
 }
 
 static void intel_psr_work(struct work_struct *work)
@@ -3796,15 +3797,15 @@ static int psr_get_status_and_error_status(struct intel_dp *intel_dp,
 	offset = intel_dp->psr.panel_replay_enabled ?
 		 DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS : DP_PSR_STATUS;
 
-	ret = drm_dp_dpcd_readb(aux, offset, status);
-	if (ret != 1)
+	ret = drm_dp_dpcd_read_byte(aux, offset, status);
+	if (ret < 0)
 		return ret;
 
 	offset = intel_dp->psr.panel_replay_enabled ?
 		 DP_PANEL_REPLAY_ERROR_STATUS : DP_PSR_ERROR_STATUS;
 
-	ret = drm_dp_dpcd_readb(aux, offset, error_status);
-	if (ret != 1)
+	ret = drm_dp_dpcd_read_byte(aux, offset, error_status);
+	if (ret < 0)
 		return ret;
 
 	*status = *status & DP_PSR_SINK_STATE_MASK;
@@ -3829,11 +3830,11 @@ static void psr_capability_changed_check(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 	struct intel_psr *psr = &intel_dp->psr;
+	int ret;
 	u8 val;
-	int r;
 
-	r = drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_ESI, &val);
-	if (r != 1) {
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_PSR_ESI, &val);
+	if (ret < 0) {
 		drm_err(display->drm, "Error reading DP_PSR_ESI\n");
 		return;
 	}
@@ -3845,7 +3846,7 @@ static void psr_capability_changed_check(struct intel_dp *intel_dp)
 			    "Sink PSR capability changed, disabling PSR\n");
 
 		/* Clearing it */
-		drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ESI, val);
+		drm_dp_dpcd_write_byte(&intel_dp->aux, DP_PSR_ESI, val);
 	}
 }
 
@@ -3913,10 +3914,10 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
 			"PSR_ERROR_STATUS unhandled errors %x\n",
 			error_status & ~errors);
 	/* clear status register */
-	drm_dp_dpcd_writeb(&intel_dp->aux,
-			   panel_replay_enabled ?
-			   DP_PANEL_REPLAY_ERROR_STATUS : DP_PSR_ERROR_STATUS,
-			   error_status);
+	drm_dp_dpcd_write_byte(&intel_dp->aux,
+			       panel_replay_enabled ?
+			       DP_PANEL_REPLAY_ERROR_STATUS : DP_PSR_ERROR_STATUS,
+			       error_status);
 
 	if (!psr->panel_replay_enabled) {
 		psr_alpm_check(intel_dp);
-- 
2.47.3

Re: [PATCH 07/11] drm/i915/hdcp: switch to drm_dp_dpcd_{read_byte, read_data, write_data}()

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/i915/hdcp: incorrect buffer advancement in intel_dp_hdcp2_read_msg()
--

commit ef5e2443a19df2b1333678ad805fe64be928f4df
Author: Jani Nikula <jani.nikula@intel.com>

drm/i915/hdcp: switch to drm_dp_dpcd_{read_byte, read_data, write_data}()

This commit switches DPCD accesses to modern functions that return 0 on success
and negative error codes on failure. It simplifies error handling and converts
logging to use %pe and ERR_PTR().

> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c

[ ... ]

> @@ -493,14 +493,13 @@ ssize_t get_receiver_id_list_rx_info(struct intel_connector *connector,
>  {
>  	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
>  	struct drm_dp_aux *aux = &dig_port->dp.aux;
> -	ssize_t ret;
>  	u8 *rx_info = byte;
> +	int ret;
>  
> -	ret = drm_dp_dpcd_read(aux,
> -			       DP_HDCP_2_2_REG_RXINFO_OFFSET,
> -			       (void *)rx_info, HDCP_2_2_RXINFO_LEN);
> -	if (ret != HDCP_2_2_RXINFO_LEN)
> -		return ret >= 0 ? -EIO : ret;
> +	ret = drm_dp_dpcd_read_data(aux, DP_HDCP_2_2_REG_RXINFO_OFFSET,
> +				    rx_info, HDCP_2_2_RXINFO_LEN);
> +	if (ret < 0)
> +		return ret;

[Severity: High]
Will this return value cause issues for downstream topology authentication?

Since drm_dp_dpcd_read_data() returns 0 on success (instead of the number of
bytes read), get_receiver_id_list_rx_info() now returns 0 on success.

Looking at the caller in intel_dp_hdcp2_read_msg(), it expects the return
value to be the number of bytes read so it can advance the buffer pointer:

	if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) {
		ret = get_receiver_id_list_rx_info(connector, &dev_cnt, byte);
		if (ret < 0)
			return ret;

		byte += ret;

Since ret is 0, the pointer won't advance, which could cause the subsequent
payload read to overwrite the rx_info field.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1789547331.git.jani.nikula@intel.com?part=7

✗ CI.checkpatch: warning for drm/i915/display: switch to modern drm_dp_dpcd* accessors

[Patchwork]

== Series Details ==

Series: drm/i915/display: switch to modern drm_dp_dpcd* accessors
URL   : https://patchwork.freedesktop.org/series/174241/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
d875049d2b299159a272bd5151994970cdcd1e31
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit a8d4f4877f91072d6a4142c062b5c3c0e727fd40
Author: Jani Nikula <jani.nikula@intel.com>
Date:   Wed Sep 16 11:29:42 2026 +0300

    drm/i915/psr: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()
    
    Switch to the modern DPCD access functions that return negative error
    codes on errors, -EIO for incomplete access, and 0 on success.
    
    This flags incomplete reads, and clarifies error handling all over the
    place. Use 1-byte accessors where sensible. Rename local int r to ret
    for clarity and consistency.
    
    Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch 0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8 drm-intel
08ce925b4347 drm/i915/lspcon: use u8 variable to hold 1-byte DPCD reads
a3cce6603281 drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte, write_byte, write_data}
f2d3cb561f8f drm/i915/alpm: switch to drm_dp_dpcd_{read_byte, write_byte}
cb6301b6c882 drm/i915/ddi: switch to drm_dp_dpcd_write_byte()
fc0eb3ecd69d drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()
-:138: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#138: FILE: drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c:462:
+		ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_EDP_PANEL_TARGET_LUMINANCE_VALUE, buf,

total: 0 errors, 1 warnings, 0 checks, 115 lines checked
ccfeb1022553 drm/i915/dp: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}
17d92a14df1c drm/i915/hdcp: switch to drm_dp_dpcd_{read_byte, read_data, write_data}()
7638f9266485 drm/i915/dp: switch link training to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()
fca38a71fb95 drm/i915/dp-mst: switch to drm_dp_dpcd_read_byte()
ea5ae759a4d4 drm/i915/dp-test: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()
a8d4f4877f91 drm/i915/psr: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()

✓ CI.KUnit: success for drm/i915/display: switch to modern drm_dp_dpcd* accessors

[Patchwork]

== Series Details ==

Series: drm/i915/display: switch to modern drm_dp_dpcd* accessors
URL   : https://patchwork.freedesktop.org/series/174241/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[08:37:07] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:37:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:37:32] Starting KUnit Kernel (1/1)...
[08:37:32] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:37:32] ============= refcount_interrupt (4 subtests) ==============
[08:37:32] [PASSED] test_single_irq_change
[08:37:32] [PASSED] test_nested_irq_change
[08:37:32] [PASSED] test_multiple_irq_change
[08:37:32] [PASSED] test_irq_save
[08:37:32] =============== [PASSED] refcount_interrupt ================
[08:37:32] ================= gpu_buddy (14 subtests) ==================
[08:37:32] [PASSED] gpu_test_buddy_alloc_limit
[08:37:32] [PASSED] gpu_test_buddy_alloc_optimistic
[08:37:32] [PASSED] gpu_test_buddy_alloc_pessimistic
[08:37:32] [PASSED] gpu_test_buddy_alloc_pathological
[08:37:32] [PASSED] gpu_test_buddy_alloc_contiguous
[08:37:32] [PASSED] gpu_test_buddy_alloc_clear
[08:37:32] [PASSED] gpu_test_buddy_alloc_range
[08:37:32] [PASSED] gpu_test_buddy_alloc_range_bias
[08:37:33] [PASSED] gpu_test_buddy_fragmentation_performance
[08:37:34] [PASSED] gpu_test_buddy_dirty_tracker_performance
[08:37:34] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[08:37:34] [PASSED] gpu_test_buddy_offset_aligned_allocation
[08:37:34] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[08:37:34] [PASSED] gpu_test_buddy_addr_to_block
[08:37:34] ==================== [PASSED] gpu_buddy ====================
[08:37:34] ============================================================
[08:37:34] Testing complete. Ran 18 tests: passed: 18
[08:37:34] Elapsed time: 26.738s total, 4.407s configuring, 20.363s building, 1.918s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[08:37:34] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:37:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:38:09] Starting KUnit Kernel (1/1)...
[08:38:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:38:09] ============= refcount_interrupt (4 subtests) ==============
[08:38:09] [PASSED] test_single_irq_change
[08:38:09] [PASSED] test_nested_irq_change
[08:38:09] [PASSED] test_multiple_irq_change
[08:38:09] [PASSED] test_irq_save
[08:38:09] =============== [PASSED] refcount_interrupt ================
[08:38:09] ================== guc_buf (11 subtests) ===================
[08:38:09] [PASSED] test_smallest
[08:38:09] [PASSED] test_largest
[08:38:10] [PASSED] test_granular
[08:38:10] [PASSED] test_unique
[08:38:10] [PASSED] test_overlap
[08:38:10] [PASSED] test_reusable
[08:38:10] [PASSED] test_too_big
[08:38:10] [PASSED] test_flush
[08:38:10] [PASSED] test_lookup
[08:38:10] [PASSED] test_data
[08:38:10] [PASSED] test_class
[08:38:10] ===================== [PASSED] guc_buf =====================
[08:38:10] =================== guc_dbm (7 subtests) ===================
[08:38:10] [PASSED] test_empty
[08:38:10] [PASSED] test_default
[08:38:10] ======================== test_size  ========================
[08:38:10] [PASSED] 4
[08:38:10] [PASSED] 8
[08:38:10] [PASSED] 32
[08:38:10] [PASSED] 256
[08:38:10] ==================== [PASSED] test_size ====================
[08:38:10] ======================= test_reuse  ========================
[08:38:10] [PASSED] 4
[08:38:10] [PASSED] 8
[08:38:10] [PASSED] 32
[08:38:10] [PASSED] 256
[08:38:10] =================== [PASSED] test_reuse ====================
[08:38:10] =================== test_range_overlap  ====================
[08:38:10] [PASSED] 4
[08:38:10] [PASSED] 8
[08:38:10] [PASSED] 32
[08:38:10] [PASSED] 256
[08:38:10] =============== [PASSED] test_range_overlap ================
[08:38:10] =================== test_range_compact  ====================
[08:38:10] [PASSED] 4
[08:38:10] [PASSED] 8
[08:38:10] [PASSED] 32
[08:38:10] [PASSED] 256
[08:38:10] =============== [PASSED] test_range_compact ================
[08:38:10] ==================== test_range_spare  =====================
[08:38:10] [PASSED] 4
[08:38:10] [PASSED] 8
[08:38:10] [PASSED] 32
[08:38:10] [PASSED] 256
[08:38:10] ================ [PASSED] test_range_spare =================
[08:38:10] ===================== [PASSED] guc_dbm =====================
[08:38:10] =================== guc_idm (6 subtests) ===================
[08:38:10] [PASSED] bad_init
[08:38:10] [PASSED] no_init
[08:38:10] [PASSED] init_fini
[08:38:10] [PASSED] check_used
[08:38:10] [PASSED] check_quota
[08:38:10] [PASSED] check_all
[08:38:10] ===================== [PASSED] guc_idm =====================
[08:38:10] =============== guc_klv_helpers (9 subtests) ===============
[08:38:10] [PASSED] test_count
[08:38:10] [PASSED] test_encode_u32
[08:38:10] [PASSED] test_encode_u64
[08:38:10] [PASSED] test_encode_string
[08:38:10] [PASSED] test_encode_object_raw
[08:38:10] [PASSED] test_encode_object_klv
[08:38:10] [PASSED] test_encode_object_nested
[08:38:10] [PASSED] test_encode_object_basic
[08:38:10] [PASSED] test_print
[08:38:10] ================= [PASSED] guc_klv_helpers =================
[08:38:10] =================== xe_log (4 subtests) ====================
[08:38:10] [PASSED] demo_cper
[08:38:10] [PASSED] demo_dmesg
[08:38:10] ======================= test_dmesg  ========================
[08:38:10] [PASSED] test_fatal
[08:38:10] [PASSED] test_fatal_tile
[08:38:10] [PASSED] test_fatal_gt
[08:38:10] [PASSED] test_fatal_comp
[08:38:10] [PASSED] test_fatal_comp_tile
[08:38:10] [PASSED] test_fatal_comp_gt
[08:38:10] [PASSED] test_fatal_all
[08:38:10] [PASSED] test_recoverable
[08:38:10] [PASSED] test_recoverable_tile
[08:38:10] [PASSED] test_recoverable_gt
[08:38:10] [PASSED] test_recoverable_comp
[08:38:10] [PASSED] test_recoverable_comp_tile
[08:38:10] [PASSED] test_recoverable_comp_gt
[08:38:10] [PASSED] test_recoverable_all
[08:38:10] [PASSED] test_info
[08:38:10] [PASSED] test_info_tile
[08:38:10] [PASSED] test_info_gt
[08:38:10] [PASSED] test_info_err
[08:38:10] [PASSED] test_info_comp
[08:38:10] [PASSED] test_info_comp_tile
[08:38:10] [PASSED] test_info_comp_gt
[08:38:10] [PASSED] test_info_all
[08:38:10] [PASSED] test_hw_fatal
[08:38:10] [PASSED] test_hw_recoverable
[08:38:10] [PASSED] test_hw_corrected
[08:38:10] [PASSED] test_hw_informational
[08:38:10] =================== [PASSED] test_dmesg ====================
[08:38:10] ====================== test_invalid  =======================
[08:38:10] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[08:38:10] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[08:38:10] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[08:38:10] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[08:38:10] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[08:38:10] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[08:38:10] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[08:38:10] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[08:38:10] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[08:38:10] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[08:38:10] ================== [SKIPPED] test_invalid ==================
[08:38:10] ===================== [PASSED] xe_log ======================
[08:38:10] ================== no_relay (3 subtests) ===================
[08:38:10] [PASSED] xe_drops_guc2pf_if_not_ready
[08:38:10] [PASSED] xe_drops_guc2vf_if_not_ready
[08:38:10] [PASSED] xe_rejects_send_if_not_ready
[08:38:10] ==================== [PASSED] no_relay =====================
[08:38:10] ================== pf_relay (14 subtests) ==================
[08:38:10] [PASSED] pf_rejects_guc2pf_too_short
[08:38:10] [PASSED] pf_rejects_guc2pf_too_long
[08:38:10] [PASSED] pf_rejects_guc2pf_no_payload
[08:38:10] [PASSED] pf_fails_no_payload
[08:38:10] [PASSED] pf_fails_bad_origin
[08:38:10] [PASSED] pf_fails_bad_type
[08:38:10] [PASSED] pf_txn_reports_error
[08:38:10] [PASSED] pf_txn_sends_pf2guc
[08:38:10] [PASSED] pf_sends_pf2guc
[08:38:10] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:38:10] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:38:10] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:38:10] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:38:10] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:38:10] ==================== [PASSED] pf_relay =====================
[08:38:10] ================== vf_relay (3 subtests) ===================
[08:38:10] [PASSED] vf_rejects_guc2vf_too_short
[08:38:10] [PASSED] vf_rejects_guc2vf_too_long
[08:38:10] [PASSED] vf_rejects_guc2vf_no_payload
[08:38:10] ==================== [PASSED] vf_relay =====================
[08:38:10] ================ pf_gt_config (9 subtests) =================
[08:38:10] [PASSED] fair_contexts_1vf
[08:38:10] [PASSED] fair_doorbells_1vf
[08:38:10] [PASSED] fair_ggtt_1vf
[08:38:10] ====================== fair_vram_1vf  ======================
[08:38:10] [PASSED] 3.50 GiB
[08:38:10] [PASSED] 11.5 GiB
[08:38:10] [PASSED] 15.5 GiB
[08:38:10] [PASSED] 31.5 GiB
[08:38:10] [PASSED] 63.5 GiB
[08:38:10] [PASSED] 1.91 GiB
[08:38:10] ================== [PASSED] fair_vram_1vf ==================
[08:38:10] ================ fair_vram_1vf_admin_only  =================
[08:38:10] [PASSED] 3.50 GiB
[08:38:10] [PASSED] 11.5 GiB
[08:38:10] [PASSED] 15.5 GiB
[08:38:10] [PASSED] 31.5 GiB
[08:38:10] [PASSED] 63.5 GiB
[08:38:10] [PASSED] 1.91 GiB
[08:38:10] ============ [PASSED] fair_vram_1vf_admin_only =============
[08:38:10] ====================== fair_contexts  ======================
[08:38:10] [PASSED] 1 VF
[08:38:10] [PASSED] 2 VFs
[08:38:10] [PASSED] 3 VFs
[08:38:10] [PASSED] 4 VFs
[08:38:10] [PASSED] 5 VFs
[08:38:10] [PASSED] 6 VFs
[08:38:10] [PASSED] 7 VFs
[08:38:10] [PASSED] 8 VFs
[08:38:10] [PASSED] 9 VFs
[08:38:10] [PASSED] 10 VFs
[08:38:10] [PASSED] 11 VFs
[08:38:10] [PASSED] 12 VFs
[08:38:10] [PASSED] 13 VFs
[08:38:10] [PASSED] 14 VFs
[08:38:10] [PASSED] 15 VFs
[08:38:10] [PASSED] 16 VFs
[08:38:10] [PASSED] 17 VFs
[08:38:10] [PASSED] 18 VFs
[08:38:10] [PASSED] 19 VFs
[08:38:10] [PASSED] 20 VFs
[08:38:10] [PASSED] 21 VFs
[08:38:10] [PASSED] 22 VFs
[08:38:10] [PASSED] 23 VFs
[08:38:10] [PASSED] 24 VFs
[08:38:10] [PASSED] 25 VFs
[08:38:10] [PASSED] 26 VFs
[08:38:10] [PASSED] 27 VFs
[08:38:10] [PASSED] 28 VFs
[08:38:10] [PASSED] 29 VFs
[08:38:10] [PASSED] 30 VFs
[08:38:10] [PASSED] 31 VFs
[08:38:10] [PASSED] 32 VFs
[08:38:10] [PASSED] 33 VFs
[08:38:10] [PASSED] 34 VFs
[08:38:10] [PASSED] 35 VFs
[08:38:10] [PASSED] 36 VFs
[08:38:10] [PASSED] 37 VFs
[08:38:10] [PASSED] 38 VFs
[08:38:10] [PASSED] 39 VFs
[08:38:10] [PASSED] 40 VFs
[08:38:10] [PASSED] 41 VFs
[08:38:10] [PASSED] 42 VFs
[08:38:10] [PASSED] 43 VFs
[08:38:10] [PASSED] 44 VFs
[08:38:10] [PASSED] 45 VFs
[08:38:10] [PASSED] 46 VFs
[08:38:10] [PASSED] 47 VFs
[08:38:10] [PASSED] 48 VFs
[08:38:10] [PASSED] 49 VFs
[08:38:10] [PASSED] 50 VFs
[08:38:10] [PASSED] 51 VFs
[08:38:10] [PASSED] 52 VFs
[08:38:10] [PASSED] 53 VFs
[08:38:10] [PASSED] 54 VFs
[08:38:10] [PASSED] 55 VFs
[08:38:10] [PASSED] 56 VFs
[08:38:10] [PASSED] 57 VFs
[08:38:10] [PASSED] 58 VFs
[08:38:10] [PASSED] 59 VFs
[08:38:10] [PASSED] 60 VFs
[08:38:10] [PASSED] 61 VFs
[08:38:10] [PASSED] 62 VFs
[08:38:10] [PASSED] 63 VFs
[08:38:10] ================== [PASSED] fair_contexts ==================
[08:38:10] ===================== fair_doorbells  ======================
[08:38:10] [PASSED] 1 VF
[08:38:10] [PASSED] 2 VFs
[08:38:10] [PASSED] 3 VFs
[08:38:10] [PASSED] 4 VFs
[08:38:10] [PASSED] 5 VFs
[08:38:10] [PASSED] 6 VFs
[08:38:10] [PASSED] 7 VFs
[08:38:10] [PASSED] 8 VFs
[08:38:10] [PASSED] 9 VFs
[08:38:10] [PASSED] 10 VFs
[08:38:10] [PASSED] 11 VFs
[08:38:10] [PASSED] 12 VFs
[08:38:10] [PASSED] 13 VFs
[08:38:10] [PASSED] 14 VFs
[08:38:10] [PASSED] 15 VFs
[08:38:10] [PASSED] 16 VFs
[08:38:10] [PASSED] 17 VFs
[08:38:10] [PASSED] 18 VFs
[08:38:10] [PASSED] 19 VFs
[08:38:10] [PASSED] 20 VFs
[08:38:10] [PASSED] 21 VFs
[08:38:10] [PASSED] 22 VFs
[08:38:10] [PASSED] 23 VFs
[08:38:10] [PASSED] 24 VFs
[08:38:10] [PASSED] 25 VFs
[08:38:10] [PASSED] 26 VFs
[08:38:10] [PASSED] 27 VFs
[08:38:10] [PASSED] 28 VFs
[08:38:10] [PASSED] 29 VFs
[08:38:10] [PASSED] 30 VFs
[08:38:10] [PASSED] 31 VFs
[08:38:10] [PASSED] 32 VFs
[08:38:10] [PASSED] 33 VFs
[08:38:10] [PASSED] 34 VFs
[08:38:10] [PASSED] 35 VFs
[08:38:10] [PASSED] 36 VFs
[08:38:10] [PASSED] 37 VFs
[08:38:10] [PASSED] 38 VFs
[08:38:10] [PASSED] 39 VFs
[08:38:10] [PASSED] 40 VFs
[08:38:10] [PASSED] 41 VFs
[08:38:10] [PASSED] 42 VFs
[08:38:10] [PASSED] 43 VFs
[08:38:10] [PASSED] 44 VFs
[08:38:10] [PASSED] 45 VFs
[08:38:10] [PASSED] 46 VFs
[08:38:10] [PASSED] 47 VFs
[08:38:10] [PASSED] 48 VFs
[08:38:10] [PASSED] 49 VFs
[08:38:10] [PASSED] 50 VFs
[08:38:10] [PASSED] 51 VFs
[08:38:10] [PASSED] 52 VFs
[08:38:10] [PASSED] 53 VFs
[08:38:10] [PASSED] 54 VFs
[08:38:10] [PASSED] 55 VFs
[08:38:10] [PASSED] 56 VFs
[08:38:10] [PASSED] 57 VFs
[08:38:10] [PASSED] 58 VFs
[08:38:10] [PASSED] 59 VFs
[08:38:10] [PASSED] 60 VFs
[08:38:10] [PASSED] 61 VFs
[08:38:10] [PASSED] 62 VFs
[08:38:10] [PASSED] 63 VFs
[08:38:10] ================= [PASSED] fair_doorbells ==================
[08:38:10] ======================== fair_ggtt  ========================
[08:38:10] [PASSED] 1 VF
[08:38:10] [PASSED] 2 VFs
[08:38:10] [PASSED] 3 VFs
[08:38:10] [PASSED] 4 VFs
[08:38:10] [PASSED] 5 VFs
[08:38:10] [PASSED] 6 VFs
[08:38:10] [PASSED] 7 VFs
[08:38:10] [PASSED] 8 VFs
[08:38:10] [PASSED] 9 VFs
[08:38:10] [PASSED] 10 VFs
[08:38:10] [PASSED] 11 VFs
[08:38:10] [PASSED] 12 VFs
[08:38:10] [PASSED] 13 VFs
[08:38:10] [PASSED] 14 VFs
[08:38:10] [PASSED] 15 VFs
[08:38:10] [PASSED] 16 VFs
[08:38:10] [PASSED] 17 VFs
[08:38:10] [PASSED] 18 VFs
[08:38:10] [PASSED] 19 VFs
[08:38:10] [PASSED] 20 VFs
[08:38:10] [PASSED] 21 VFs
[08:38:10] [PASSED] 22 VFs
[08:38:10] [PASSED] 23 VFs
[08:38:10] [PASSED] 24 VFs
[08:38:10] [PASSED] 25 VFs
[08:38:10] [PASSED] 26 VFs
[08:38:10] [PASSED] 27 VFs
[08:38:10] [PASSED] 28 VFs
[08:38:10] [PASSED] 29 VFs
[08:38:10] [PASSED] 30 VFs
[08:38:10] [PASSED] 31 VFs
[08:38:10] [PASSED] 32 VFs
[08:38:10] [PASSED] 33 VFs
[08:38:10] [PASSED] 34 VFs
[08:38:10] [PASSED] 35 VFs
[08:38:10] [PASSED] 36 VFs
[08:38:10] [PASSED] 37 VFs
[08:38:10] [PASSED] 38 VFs
[08:38:10] [PASSED] 39 VFs
[08:38:10] [PASSED] 40 VFs
[08:38:10] [PASSED] 41 VFs
[08:38:10] [PASSED] 42 VFs
[08:38:10] [PASSED] 43 VFs
[08:38:10] [PASSED] 44 VFs
[08:38:10] [PASSED] 45 VFs
[08:38:10] [PASSED] 46 VFs
[08:38:10] [PASSED] 47 VFs
[08:38:10] [PASSED] 48 VFs
[08:38:10] [PASSED] 49 VFs
[08:38:10] [PASSED] 50 VFs
[08:38:10] [PASSED] 51 VFs
[08:38:10] [PASSED] 52 VFs
[08:38:10] [PASSED] 53 VFs
[08:38:10] [PASSED] 54 VFs
[08:38:10] [PASSED] 55 VFs
[08:38:10] [PASSED] 56 VFs
[08:38:10] [PASSED] 57 VFs
[08:38:10] [PASSED] 58 VFs
[08:38:10] [PASSED] 59 VFs
[08:38:10] [PASSED] 60 VFs
[08:38:10] [PASSED] 61 VFs
[08:38:10] [PASSED] 62 VFs
[08:38:10] [PASSED] 63 VFs
[08:38:10] ==================== [PASSED] fair_ggtt ====================
[08:38:10] ======================== fair_vram  ========================
[08:38:10] [PASSED] 1 VF
[08:38:10] [PASSED] 2 VFs
[08:38:10] [PASSED] 3 VFs
[08:38:10] [PASSED] 4 VFs
[08:38:10] [PASSED] 5 VFs
[08:38:10] [PASSED] 6 VFs
[08:38:10] [PASSED] 7 VFs
[08:38:10] [PASSED] 8 VFs
[08:38:10] [PASSED] 9 VFs
[08:38:10] [PASSED] 10 VFs
[08:38:10] [PASSED] 11 VFs
[08:38:10] [PASSED] 12 VFs
[08:38:10] [PASSED] 13 VFs
[08:38:10] [PASSED] 14 VFs
[08:38:10] [PASSED] 15 VFs
[08:38:10] [PASSED] 16 VFs
[08:38:10] [PASSED] 17 VFs
[08:38:10] [PASSED] 18 VFs
[08:38:10] [PASSED] 19 VFs
[08:38:10] [PASSED] 20 VFs
[08:38:10] [PASSED] 21 VFs
[08:38:10] [PASSED] 22 VFs
[08:38:10] [PASSED] 23 VFs
[08:38:10] [PASSED] 24 VFs
[08:38:10] [PASSED] 25 VFs
[08:38:10] [PASSED] 26 VFs
[08:38:10] [PASSED] 27 VFs
[08:38:10] [PASSED] 28 VFs
[08:38:10] [PASSED] 29 VFs
[08:38:10] [PASSED] 30 VFs
[08:38:10] [PASSED] 31 VFs
[08:38:10] [PASSED] 32 VFs
[08:38:10] [PASSED] 33 VFs
[08:38:10] [PASSED] 34 VFs
[08:38:10] [PASSED] 35 VFs
[08:38:10] [PASSED] 36 VFs
[08:38:10] [PASSED] 37 VFs
[08:38:10] [PASSED] 38 VFs
[08:38:10] [PASSED] 39 VFs
[08:38:10] [PASSED] 40 VFs
[08:38:10] [PASSED] 41 VFs
[08:38:10] [PASSED] 42 VFs
[08:38:10] [PASSED] 43 VFs
[08:38:10] [PASSED] 44 VFs
[08:38:10] [PASSED] 45 VFs
[08:38:10] [PASSED] 46 VFs
[08:38:10] [PASSED] 47 VFs
[08:38:10] [PASSED] 48 VFs
[08:38:10] [PASSED] 49 VFs
[08:38:10] [PASSED] 50 VFs
[08:38:10] [PASSED] 51 VFs
[08:38:10] [PASSED] 52 VFs
[08:38:10] [PASSED] 53 VFs
[08:38:10] [PASSED] 54 VFs
[08:38:10] [PASSED] 55 VFs
[08:38:10] [PASSED] 56 VFs
[08:38:10] [PASSED] 57 VFs
[08:38:10] [PASSED] 58 VFs
[08:38:10] [PASSED] 59 VFs
[08:38:10] [PASSED] 60 VFs
[08:38:10] [PASSED] 61 VFs
[08:38:10] [PASSED] 62 VFs
[08:38:10] [PASSED] 63 VFs
[08:38:10] ==================== [PASSED] fair_vram ====================
[08:38:10] ================== [PASSED] pf_gt_config ===================
[08:38:10] ===================== lmtt (1 subtest) =====================
[08:38:10] ======================== test_ops  =========================
[08:38:10] [PASSED] 2-level
[08:38:10] [PASSED] multi-level
[08:38:10] ==================== [PASSED] test_ops =====================
[08:38:10] ====================== [PASSED] lmtt =======================
[08:38:10] ================= sriov_packet (1 subtest) =================
[08:38:10] [PASSED] test_descriptor_init
[08:38:10] ================== [PASSED] sriov_packet ===================
[08:38:10] ================= pf_service (11 subtests) =================
[08:38:10] [PASSED] pf_negotiate_any
[08:38:10] [PASSED] pf_negotiate_base_match
[08:38:10] [PASSED] pf_negotiate_base_newer
[08:38:10] [PASSED] pf_negotiate_base_next
[08:38:10] [SKIPPED] pf_negotiate_base_older (no older minor)
[08:38:10] [PASSED] pf_negotiate_base_prev
[08:38:10] [PASSED] pf_negotiate_latest_match
[08:38:10] [PASSED] pf_negotiate_latest_newer
[08:38:10] [PASSED] pf_negotiate_latest_next
[08:38:10] [SKIPPED] pf_negotiate_latest_older (no older minor)
[08:38:10] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[08:38:10] =================== [PASSED] pf_service ====================
[08:38:10] ================= xe_guc_g2g (2 subtests) ==================
[08:38:10] ============== xe_live_guc_g2g_kunit_default  ==============
[08:38:10] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[08:38:10] ============== xe_live_guc_g2g_kunit_allmem  ===============
[08:38:10] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[08:38:10] =================== [SKIPPED] xe_guc_g2g ===================
[08:38:10] =================== xe_mocs (2 subtests) ===================
[08:38:10] ================ xe_live_mocs_kernel_kunit  ================
[08:38:10] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[08:38:10] ================ xe_live_mocs_reset_kunit  =================
[08:38:10] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[08:38:10] ==================== [SKIPPED] xe_mocs =====================
[08:38:10] ================= xe_migrate (2 subtests) ==================
[08:38:10] ================= xe_migrate_sanity_kunit  =================
[08:38:10] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[08:38:10] ================== xe_validate_ccs_kunit  ==================
[08:38:10] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[08:38:10] =================== [SKIPPED] xe_migrate ===================
[08:38:10] ================== xe_dma_buf (1 subtest) ==================
[08:38:10] ==================== xe_dma_buf_kunit  =====================
[08:38:10] ================ [SKIPPED] xe_dma_buf_kunit ================
[08:38:10] =================== [SKIPPED] xe_dma_buf ===================
[08:38:10] ================= xe_bo_shrink (1 subtest) =================
[08:38:10] =================== xe_bo_shrink_kunit  ====================
[08:38:10] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[08:38:10] ================== [SKIPPED] xe_bo_shrink ==================
[08:38:10] ==================== xe_bo (2 subtests) ====================
[08:38:10] ================== xe_ccs_migrate_kunit  ===================
[08:38:10] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[08:38:10] ==================== xe_bo_evict_kunit  ====================
[08:38:10] =============== [SKIPPED] xe_bo_evict_kunit ================
[08:38:10] ===================== [SKIPPED] xe_bo ======================
[08:38:10] =================== xe_any (9 subtests) ====================
[08:38:10] [PASSED] test_to_xe
[08:38:10] [PASSED] test_to_dev
[08:38:10] [PASSED] test_to_pdev
[08:38:10] [PASSED] test_to_drm
[08:38:10] [PASSED] test_if_pdev
[08:38:10] [PASSED] test_if_xe
[08:38:10] [PASSED] test_if_tile
[08:38:10] [PASSED] test_if_gt
[08:38:10] [PASSED] test_to_id
[08:38:10] ===================== [PASSED] xe_any ======================
[08:38:10] ==================== args (13 subtests) ====================
[08:38:10] [PASSED] count_args_test
[08:38:10] [PASSED] call_args_example
[08:38:10] [PASSED] call_args_test
[08:38:10] [PASSED] drop_first_arg_example
[08:38:10] [PASSED] drop_first_arg_test
[08:38:10] [PASSED] first_arg_example
[08:38:10] [PASSED] first_arg_test
[08:38:10] [PASSED] last_arg_example
[08:38:10] [PASSED] last_arg_test
[08:38:10] [PASSED] pick_arg_example
[08:38:10] [PASSED] if_args_example
[08:38:10] [PASSED] if_args_test
[08:38:10] [PASSED] sep_comma_example
[08:38:10] ====================== [PASSED] args =======================
[08:38:10] =================== xe_pci (3 subtests) ====================
[08:38:10] ==================== check_graphics_ip  ====================
[08:38:10] [PASSED] 12.00 Xe_LP
[08:38:10] [PASSED] 12.10 Xe_LP+
[08:38:10] [PASSED] 12.55 Xe_HPG
[08:38:10] [PASSED] 12.60 Xe_HPC
[08:38:10] [PASSED] 12.70 Xe_LPG
[08:38:10] [PASSED] 12.71 Xe_LPG
[08:38:10] [PASSED] 12.74 Xe_LPG+
[08:38:10] [PASSED] 20.01 Xe2_HPG
[08:38:10] [PASSED] 20.02 Xe2_HPG
[08:38:10] [PASSED] 20.04 Xe2_LPG
[08:38:10] [PASSED] 30.00 Xe3_LPG
[08:38:10] [PASSED] 30.01 Xe3_LPG
[08:38:10] [PASSED] 30.03 Xe3_LPG
[08:38:10] [PASSED] 30.04 Xe3_LPG
[08:38:10] [PASSED] 30.05 Xe3_LPG
[08:38:10] [PASSED] 35.10 Xe3p_LPG
[08:38:10] [PASSED] 35.11 Xe3p_XPC
[08:38:10] ================ [PASSED] check_graphics_ip ================
[08:38:10] ===================== check_media_ip  ======================
[08:38:10] [PASSED] 12.00 Xe_M
[08:38:10] [PASSED] 12.55 Xe_HPM
[08:38:10] [PASSED] 13.00 Xe_LPM+
[08:38:10] [PASSED] 13.01 Xe2_HPM
[08:38:10] [PASSED] 20.00 Xe2_LPM
[08:38:10] [PASSED] 30.00 Xe3_LPM
[08:38:10] [PASSED] 30.02 Xe3_LPM
[08:38:10] [PASSED] 35.00 Xe3p_LPM
[08:38:10] [PASSED] 35.03 Xe3p_HPM
[08:38:10] ================= [PASSED] check_media_ip ==================
[08:38:10] =================== check_platform_desc  ===================
[08:38:10] [PASSED] 0x9A60 (TIGERLAKE)
[08:38:10] [PASSED] 0x9A68 (TIGERLAKE)
[08:38:10] [PASSED] 0x9A70 (TIGERLAKE)
[08:38:10] [PASSED] 0x9A40 (TIGERLAKE)
[08:38:10] [PASSED] 0x9A49 (TIGERLAKE)
[08:38:10] [PASSED] 0x9A59 (TIGERLAKE)
[08:38:10] [PASSED] 0x9A78 (TIGERLAKE)
[08:38:10] [PASSED] 0x9AC0 (TIGERLAKE)
[08:38:10] [PASSED] 0x9AC9 (TIGERLAKE)
[08:38:10] [PASSED] 0x9AD9 (TIGERLAKE)
[08:38:10] [PASSED] 0x9AF8 (TIGERLAKE)
[08:38:10] [PASSED] 0x4C80 (ROCKETLAKE)
[08:38:10] [PASSED] 0x4C8A (ROCKETLAKE)
[08:38:10] [PASSED] 0x4C8B (ROCKETLAKE)
[08:38:10] [PASSED] 0x4C8C (ROCKETLAKE)
[08:38:10] [PASSED] 0x4C90 (ROCKETLAKE)
[08:38:10] [PASSED] 0x4C9A (ROCKETLAKE)
[08:38:10] [PASSED] 0x4680 (ALDERLAKE_S)
[08:38:10] [PASSED] 0x4682 (ALDERLAKE_S)
[08:38:10] [PASSED] 0x4688 (ALDERLAKE_S)
[08:38:10] [PASSED] 0x468A (ALDERLAKE_S)
[08:38:10] [PASSED] 0x468B (ALDERLAKE_S)
[08:38:10] [PASSED] 0x4690 (ALDERLAKE_S)
[08:38:10] [PASSED] 0x4692 (ALDERLAKE_S)
[08:38:10] [PASSED] 0x4693 (ALDERLAKE_S)
[08:38:10] [PASSED] 0x46A0 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46A1 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46A2 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46A3 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46A6 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46A8 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46AA (ALDERLAKE_P)
[08:38:10] [PASSED] 0x462A (ALDERLAKE_P)
[08:38:10] [PASSED] 0x4626 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x4628 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46B0 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46B1 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46B2 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46B3 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46C0 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46C1 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46C2 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46C3 (ALDERLAKE_P)
[08:38:10] [PASSED] 0x46D0 (ALDERLAKE_N)
[08:38:10] [PASSED] 0x46D1 (ALDERLAKE_N)
[08:38:10] [PASSED] 0x46D2 (ALDERLAKE_N)
[08:38:10] [PASSED] 0x46D3 (ALDERLAKE_N)
[08:38:10] [PASSED] 0x46D4 (ALDERLAKE_N)
[08:38:10] [PASSED] 0xA721 (ALDERLAKE_P)
[08:38:10] [PASSED] 0xA7A1 (ALDERLAKE_P)
[08:38:10] [PASSED] 0xA7A9 (ALDERLAKE_P)
[08:38:10] [PASSED] 0xA7AC (ALDERLAKE_P)
[08:38:10] [PASSED] 0xA7AD (ALDERLAKE_P)
[08:38:10] [PASSED] 0xA720 (ALDERLAKE_P)
[08:38:10] [PASSED] 0xA7A0 (ALDERLAKE_P)
[08:38:10] [PASSED] 0xA7A8 (ALDERLAKE_P)
[08:38:10] [PASSED] 0xA7AA (ALDERLAKE_P)
[08:38:10] [PASSED] 0xA7AB (ALDERLAKE_P)
[08:38:10] [PASSED] 0xA780 (ALDERLAKE_S)
[08:38:10] [PASSED] 0xA781 (ALDERLAKE_S)
[08:38:10] [PASSED] 0xA782 (ALDERLAKE_S)
[08:38:10] [PASSED] 0xA783 (ALDERLAKE_S)
[08:38:10] [PASSED] 0xA788 (ALDERLAKE_S)
[08:38:10] [PASSED] 0xA789 (ALDERLAKE_S)
[08:38:10] [PASSED] 0xA78A (ALDERLAKE_S)
[08:38:10] [PASSED] 0xA78B (ALDERLAKE_S)
[08:38:10] [PASSED] 0x4905 (DG1)
[08:38:10] [PASSED] 0x4906 (DG1)
[08:38:10] [PASSED] 0x4907 (DG1)
[08:38:10] [PASSED] 0x4908 (DG1)
[08:38:10] [PASSED] 0x4909 (DG1)
[08:38:10] [PASSED] 0x56C0 (DG2)
[08:38:10] [PASSED] 0x56C2 (DG2)
[08:38:10] [PASSED] 0x56C1 (DG2)
[08:38:10] [PASSED] 0x7D51 (METEORLAKE)
[08:38:10] [PASSED] 0x7DD1 (METEORLAKE)
[08:38:10] [PASSED] 0x7D41 (METEORLAKE)
[08:38:10] [PASSED] 0x7D67 (METEORLAKE)
[08:38:10] [PASSED] 0xB640 (METEORLAKE)
[08:38:10] [PASSED] 0x56A0 (DG2)
[08:38:10] [PASSED] 0x56A1 (DG2)
[08:38:10] [PASSED] 0x56A2 (DG2)
[08:38:10] [PASSED] 0x56BE (DG2)
[08:38:10] [PASSED] 0x56BF (DG2)
[08:38:10] [PASSED] 0x5690 (DG2)
[08:38:10] [PASSED] 0x5691 (DG2)
[08:38:10] [PASSED] 0x5692 (DG2)
[08:38:10] [PASSED] 0x56A5 (DG2)
[08:38:10] [PASSED] 0x56A6 (DG2)
[08:38:10] [PASSED] 0x56B0 (DG2)
[08:38:10] [PASSED] 0x56B1 (DG2)
[08:38:10] [PASSED] 0x56BA (DG2)
[08:38:10] [PASSED] 0x56BB (DG2)
[08:38:10] [PASSED] 0x56BC (DG2)
[08:38:10] [PASSED] 0x56BD (DG2)
[08:38:10] [PASSED] 0x5693 (DG2)
[08:38:10] [PASSED] 0x5694 (DG2)
[08:38:10] [PASSED] 0x5695 (DG2)
[08:38:10] [PASSED] 0x56A3 (DG2)
[08:38:10] [PASSED] 0x56A4 (DG2)
[08:38:10] [PASSED] 0x56B2 (DG2)
[08:38:10] [PASSED] 0x56B3 (DG2)
[08:38:10] [PASSED] 0x5696 (DG2)
[08:38:10] [PASSED] 0x5697 (DG2)
[08:38:10] [PASSED] 0xB69 (PVC)
[08:38:10] [PASSED] 0xB6E (PVC)
[08:38:10] [PASSED] 0xBD4 (PVC)
[08:38:10] [PASSED] 0xBD5 (PVC)
[08:38:10] [PASSED] 0xBD6 (PVC)
[08:38:10] [PASSED] 0xBD7 (PVC)
[08:38:10] [PASSED] 0xBD8 (PVC)
[08:38:10] [PASSED] 0xBD9 (PVC)
[08:38:10] [PASSED] 0xBDA (PVC)
[08:38:10] [PASSED] 0xBDB (PVC)
[08:38:10] [PASSED] 0xBE0 (PVC)
[08:38:10] [PASSED] 0xBE1 (PVC)
[08:38:10] [PASSED] 0xBE5 (PVC)
[08:38:10] [PASSED] 0x7D40 (METEORLAKE)
[08:38:10] [PASSED] 0x7D45 (METEORLAKE)
[08:38:10] [PASSED] 0x7D55 (METEORLAKE)
[08:38:10] [PASSED] 0x7D60 (METEORLAKE)
[08:38:10] [PASSED] 0x7DD5 (METEORLAKE)
[08:38:10] [PASSED] 0x6420 (LUNARLAKE)
[08:38:10] [PASSED] 0x64A0 (LUNARLAKE)
[08:38:10] [PASSED] 0x64B0 (LUNARLAKE)
[08:38:10] [PASSED] 0xE202 (BATTLEMAGE)
[08:38:10] [PASSED] 0xE209 (BATTLEMAGE)
[08:38:10] [PASSED] 0xE20B (BATTLEMAGE)
[08:38:10] [PASSED] 0xE20C (BATTLEMAGE)
[08:38:10] [PASSED] 0xE20D (BATTLEMAGE)
[08:38:10] [PASSED] 0xE210 (BATTLEMAGE)
[08:38:10] [PASSED] 0xE211 (BATTLEMAGE)
[08:38:10] [PASSED] 0xE212 (BATTLEMAGE)
[08:38:10] [PASSED] 0xE216 (BATTLEMAGE)
[08:38:10] [PASSED] 0xE220 (BATTLEMAGE)
[08:38:10] [PASSED] 0xE221 (BATTLEMAGE)
[08:38:10] [PASSED] 0xE222 (BATTLEMAGE)
[08:38:10] [PASSED] 0xE223 (BATTLEMAGE)
[08:38:10] [PASSED] 0xB080 (PANTHERLAKE)
[08:38:10] [PASSED] 0xB081 (PANTHERLAKE)
[08:38:10] [PASSED] 0xB082 (PANTHERLAKE)
[08:38:10] [PASSED] 0xB083 (PANTHERLAKE)
[08:38:10] [PASSED] 0xB084 (PANTHERLAKE)
[08:38:10] [PASSED] 0xB085 (PANTHERLAKE)
[08:38:10] [PASSED] 0xB086 (PANTHERLAKE)
[08:38:10] [PASSED] 0xB087 (PANTHERLAKE)
[08:38:10] [PASSED] 0xB08F (PANTHERLAKE)
[08:38:10] [PASSED] 0xB090 (PANTHERLAKE)
[08:38:10] [PASSED] 0xB0A0 (PANTHERLAKE)
[08:38:10] [PASSED] 0xB0B0 (PANTHERLAKE)
[08:38:10] [PASSED] 0xFD80 (PANTHERLAKE)
[08:38:10] [PASSED] 0xFD81 (PANTHERLAKE)
[08:38:10] [PASSED] 0xD740 (NOVALAKE_S)
[08:38:10] [PASSED] 0xD741 (NOVALAKE_S)
[08:38:10] [PASSED] 0xD742 (NOVALAKE_S)
[08:38:10] [PASSED] 0xD743 (NOVALAKE_S)
[08:38:10] [PASSED] 0xD745 (NOVALAKE_S)
[08:38:10] [PASSED] 0xD74A (NOVALAKE_S)
[08:38:10] [PASSED] 0xD74B (NOVALAKE_S)
[08:38:10] [PASSED] 0x674C (CRESCENTISLAND)
[08:38:10] [PASSED] 0x674D (CRESCENTISLAND)
[08:38:10] [PASSED] 0x674E (CRESCENTISLAND)
[08:38:10] [PASSED] 0x674F (CRESCENTISLAND)
[08:38:10] [PASSED] 0x6750 (CRESCENTISLAND)
[08:38:10] [PASSED] 0xD750 (NOVALAKE_P)
[08:38:10] [PASSED] 0xD751 (NOVALAKE_P)
[08:38:10] [PASSED] 0xD752 (NOVALAKE_P)
[08:38:10] [PASSED] 0xD753 (NOVALAKE_P)
[08:38:10] [PASSED] 0xD754 (NOVALAKE_P)
[08:38:10] [PASSED] 0xD755 (NOVALAKE_P)
[08:38:10] [PASSED] 0xD756 (NOVALAKE_P)
[08:38:10] [PASSED] 0xD757 (NOVALAKE_P)
[08:38:10] [PASSED] 0xD75F (NOVALAKE_P)
[08:38:10] =============== [PASSED] check_platform_desc ===============
[08:38:10] ===================== [PASSED] xe_pci ======================
[08:38:10] ============= xe_rtp_tables_test (5 subtests) ==============
[08:38:10] ================== xe_rtp_table_gt_test  ===================
[08:38:10] [PASSED] gt_was/14011060649
[08:38:10] [PASSED] gt_was/14011059788
[08:38:10] [PASSED] gt_was/14015795083
[08:38:10] [PASSED] gt_was/16021867713
[08:38:10] [PASSED] gt_was/14019449301
[08:38:10] [PASSED] gt_was/16028005424
[08:38:10] [PASSED] gt_was/14026578760
[08:38:10] [PASSED] gt_was/1409420604
[08:38:10] [PASSED] gt_was/1408615072
[08:38:10] [PASSED] gt_was/22010523718
[08:38:10] [PASSED] gt_was/14011006942
[08:38:10] [PASSED] gt_was/14014830051
[08:38:10] [PASSED] gt_was/18018781329
[08:38:10] [PASSED] gt_was/1509235366
[08:38:10] [PASSED] gt_was/18018781329
[08:38:10] [PASSED] gt_was/16016694945
[08:38:10] [PASSED] gt_was/14018575942
[08:38:10] [PASSED] gt_was/22016670082
[08:38:10] [PASSED] gt_was/22016670082
[08:38:10] [PASSED] gt_was/14017421178
[08:38:10] [PASSED] gt_was/16025250150
[08:38:10] [PASSED] gt_was/14021871409
[08:38:10] [PASSED] gt_was/16021865536
[08:38:10] [PASSED] gt_was/14021486841
[08:38:10] [PASSED] gt_was/14025160223
[08:38:10] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[08:38:10] [PASSED] gt_was/14025635424
[08:38:10] [PASSED] gt_was/16028005424
[08:38:10] ============== [PASSED] xe_rtp_table_gt_test ===============
[08:38:10] ================== xe_rtp_table_gt_test  ===================
[08:38:10] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[08:38:10] [PASSED] gt_tunings/Tuning: 32B Access Enable
[08:38:10] [PASSED] gt_tunings/Tuning: L3 cache
[08:38:10] [PASSED] gt_tunings/Tuning: L3 cache - media
[08:38:10] [PASSED] gt_tunings/Tuning: Compression Overfetch
[08:38:10] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[08:38:10] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[08:38:10] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[08:38:10] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[08:38:10] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[08:38:10] [PASSED] gt_tunings/Tuning: Stateless compression control
[08:38:10] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[08:38:10] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[08:38:10] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[08:38:10] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[08:38:10] ============== [PASSED] xe_rtp_table_gt_test ===============
[08:38:10] ================== xe_rtp_table_oob_test  ==================
[08:38:10] [PASSED] oob_was/1607983814
[08:38:10] [PASSED] oob_was/16010904313
[08:38:10] [PASSED] oob_was/18022495364
[08:38:10] [PASSED] oob_was/22012773006
[08:38:10] [PASSED] oob_was/14014475959
[08:38:10] [PASSED] oob_was/22011391025
[08:38:10] [PASSED] oob_was/22012727170
[08:38:10] [PASSED] oob_was/22012727685
[08:38:10] [PASSED] oob_was/22016596838
[08:38:10] [PASSED] oob_was/18020744125
[08:38:10] [PASSED] oob_was/1409600907
[08:38:10] [PASSED] oob_was/22014953428
[08:38:10] [PASSED] oob_was/16017236439
[08:38:10] [PASSED] oob_was/14019821291
[08:38:10] [PASSED] oob_was/14015076503
[08:38:10] [PASSED] oob_was/14018913170
[08:38:10] [PASSED] oob_was/14018094691
[08:38:10] [PASSED] oob_was/18024947630
[08:38:10] [PASSED] oob_was/16022287689
[08:38:10] [PASSED] oob_was/13011645652
[08:38:10] [PASSED] oob_was/14022293748
[08:38:10] [PASSED] oob_was/22019794406
[08:38:10] [PASSED] oob_was/22019338487
[08:38:10] [PASSED] oob_was/16023588340
[08:38:10] [PASSED] oob_was/14019789679
[08:38:10] [PASSED] oob_was/14022866841
[08:38:10] [PASSED] oob_was/16021333562
[08:38:10] [PASSED] oob_was/14016712196
[08:38:10] [PASSED] oob_was/14015568240
[08:38:10] [PASSED] oob_was/18013179988
[08:38:10] [PASSED] oob_was/1508761755
[08:38:10] [PASSED] oob_was/16023105232
[08:38:10] [PASSED] oob_was/16026508708
[08:38:10] [PASSED] oob_was/14020001231
[08:38:10] [PASSED] oob_was/16023683509
[08:38:10] [PASSED] oob_was/14025515070
[08:38:10] [PASSED] oob_was/15015404425_disable
[08:38:10] [PASSED] oob_was/16026007364
[08:38:10] [PASSED] oob_was/14020316580
[08:38:10] [PASSED] oob_was/14025883347
[08:38:10] [PASSED] oob_was/16029380221
[08:38:10] [PASSED] oob_was/22022079272
[08:38:10] [PASSED] oob_was/16029897822
[08:38:10] [PASSED] oob_was/14027054324
[08:38:10] ============== [PASSED] xe_rtp_table_oob_test ==============
[08:38:10] ================ xe_rtp_table_dev_oob_test  ================
[08:38:10] [PASSED] device_oob_was/22010954014
[08:38:10] [PASSED] device_oob_was/15015404425
[08:38:10] [PASSED] device_oob_was/22019338487_display
[08:38:10] [PASSED] device_oob_was/14022085890
[08:38:10] [PASSED] device_oob_was/14026539277
[08:38:10] [PASSED] device_oob_was/14026633728
[08:38:10] [PASSED] device_oob_was/14026746987
[08:38:10] [PASSED] device_oob_was/14026779378
[08:38:10] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[08:38:10] ========== xe_rtp_table_missing_upper_bound_test  ==========
[08:38:10] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[08:38:10] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[08:38:10] [PASSED] register_whitelist/1806527549
[08:38:10] [PASSED] register_whitelist/allow_read_ctx_timestamp
[08:38:10] [PASSED] register_whitelist/allow_read_queue_timestamp
[08:38:10] [PASSED] register_whitelist/16014440446
[08:38:10] [PASSED] register_whitelist/16017236439
[08:38:10] [PASSED] register_whitelist/16020183090
[08:38:10] [PASSED] register_whitelist/14024997852
[08:38:10] [PASSED] register_whitelist/14024997852
[08:38:10] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[08:38:10] =============== [PASSED] xe_rtp_tables_test ================
[08:38:10] =================== xe_rtp (3 subtests) ====================
[08:38:10] =================== xe_rtp_rules_tests  ====================
[08:38:10] [PASSED] no
[08:38:10] [PASSED] yes
[08:38:10] [PASSED] no-and-no
[08:38:10] [PASSED] no-and-yes
[08:38:10] [PASSED] yes-and-no
[08:38:10] [PASSED] yes-and-yes
[08:38:10] [PASSED] no-or-no
[08:38:10] [PASSED] no-or-yes
[08:38:10] [PASSED] yes-or-no
[08:38:10] [PASSED] yes-or-yes
[08:38:10] [PASSED] no-yes-or-yes-no
[08:38:10] [PASSED] no-yes-or-yes-yes
[08:38:10] [PASSED] yes-yes-or-no-yes
[08:38:10] [PASSED] yes-yes-or-yes-yes
[08:38:10] [PASSED] no-no-or-yes-or-no
[08:38:10] [PASSED] or
[08:38:10] [PASSED] or-yes
[08:38:10] [PASSED] or-no
[08:38:10] [PASSED] yes-or
[08:38:10] [PASSED] no-or
[08:38:10] [PASSED] no-or-or-yes
[08:38:10] [PASSED] yes-or-or-no
[08:38:10] [PASSED] no-or-or-no
[08:38:10] [PASSED] missing-context-engine-class
[08:38:10] [PASSED] missing-context-engine-class-or-yes
[08:38:10] [PASSED] missing-context-engine-class-or-or-yes
[08:38:10] =============== [PASSED] xe_rtp_rules_tests ================
[08:38:10] =============== xe_rtp_process_to_sr_tests  ================
[08:38:10] [PASSED] coalesce-same-reg
[08:38:10] [PASSED] coalesce-same-reg-literal-and-func
[08:38:10] [PASSED] no-match-no-add
[08:38:10] [PASSED] two-regs-two-entries
[08:38:10] [PASSED] clr-one-set-other
[08:38:10] [PASSED] set-field
[08:38:10] [PASSED] conflict-duplicate
[08:38:10] [PASSED] conflict-not-disjoint
[08:38:10] [PASSED] conflict-not-disjoint-literal-and-func
[08:38:10] [PASSED] conflict-reg-type
[08:38:10] [PASSED] bad-mcr-reg-forced-to-regular
[08:38:10] [PASSED] bad-regular-reg-forced-to-mcr
[08:38:10] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[08:38:10] ================== xe_rtp_process_tests  ===================
[08:38:10] [PASSED] active1
[08:38:10] [PASSED] active2
[08:38:10] [PASSED] active-inactive
[08:38:10] [PASSED] inactive-active
[08:38:10] [PASSED] inactive-active-inactive
[08:38:10] [PASSED] inactive-inactive-inactive
[08:38:10] ============== [PASSED] xe_rtp_process_tests ===============
[08:38:10] ===================== [PASSED] xe_rtp ======================
[08:38:10] ==================== xe_wa (1 subtest) =====================
[08:38:10] ======================== xe_wa_gt  =========================
[08:38:10] [PASSED] TIGERLAKE B0
[08:38:10] [PASSED] DG1 A0
[08:38:10] [PASSED] DG1 B0
[08:38:10] [PASSED] ALDERLAKE_S A0
[08:38:10] [PASSED] ALDERLAKE_S B0
[08:38:10] [PASSED] ALDERLAKE_S C0
[08:38:10] [PASSED] ALDERLAKE_S D0
[08:38:10] [PASSED] ALDERLAKE_P A0
[08:38:10] [PASSED] ALDERLAKE_P B0
[08:38:10] [PASSED] ALDERLAKE_P C0
[08:38:10] [PASSED] ALDERLAKE_S RPLS D0
[08:38:10] [PASSED] ALDERLAKE_P RPLU E0
[08:38:10] [PASSED] DG2 G10 C0
[08:38:10] [PASSED] DG2 G11 B1
[08:38:10] [PASSED] DG2 G12 A1
[08:38:10] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:38:10] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:38:10] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[08:38:10] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[08:38:10] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[08:38:10] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[08:38:10] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[08:38:10] ==================== [PASSED] xe_wa_gt =====================
[08:38:10] ====================== [PASSED] xe_wa ======================
[08:38:10] ============================================================
[08:38:10] Testing complete. Ran 793 tests: passed: 765, skipped: 28
[08:38:10] Elapsed time: 36.184s total, 1.861s configuring, 33.558s building, 0.714s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[08:38:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:38:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:38:37] Starting KUnit Kernel (1/1)...
[08:38:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:38:37] ============= refcount_interrupt (4 subtests) ==============
[08:38:37] [PASSED] test_single_irq_change
[08:38:37] [PASSED] test_nested_irq_change
[08:38:37] [PASSED] test_multiple_irq_change
[08:38:37] [PASSED] test_irq_save
[08:38:37] =============== [PASSED] refcount_interrupt ================
[08:38:37] ============ drm_test_pick_cmdline (2 subtests) ============
[08:38:37] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[08:38:37] =============== drm_test_pick_cmdline_named  ===============
[08:38:37] [PASSED] NTSC
[08:38:37] [PASSED] NTSC-J
[08:38:37] [PASSED] PAL
[08:38:37] [PASSED] PAL-M
[08:38:37] =========== [PASSED] drm_test_pick_cmdline_named ===========
[08:38:37] ============== [PASSED] drm_test_pick_cmdline ==============
[08:38:37] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[08:38:37] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[08:38:37] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[08:38:37] =========== drm_validate_clone_mode (2 subtests) ===========
[08:38:37] ============== drm_test_check_in_clone_mode  ===============
[08:38:37] [PASSED] in_clone_mode
[08:38:37] [PASSED] not_in_clone_mode
[08:38:37] ========== [PASSED] drm_test_check_in_clone_mode ===========
[08:38:37] =============== drm_test_check_valid_clones  ===============
[08:38:37] [PASSED] not_in_clone_mode
[08:38:37] [PASSED] valid_clone
[08:38:37] [PASSED] invalid_clone
[08:38:37] =========== [PASSED] drm_test_check_valid_clones ===========
[08:38:37] ============= [PASSED] drm_validate_clone_mode =============
[08:38:37] ============= drm_validate_modeset (1 subtest) =============
[08:38:37] [PASSED] drm_test_check_connector_changed_modeset
[08:38:37] ============== [PASSED] drm_validate_modeset ===============
[08:38:37] ====== drm_test_bridge_get_current_state (1 subtest) =======
[08:38:37] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[08:38:37] ======== [PASSED] drm_test_bridge_get_current_state ========
[08:38:37] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[08:38:37] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[08:38:37] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[08:38:37] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[08:38:37] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[08:38:37] ============== drm_bridge_alloc (2 subtests) ===============
[08:38:37] [PASSED] drm_test_drm_bridge_alloc_basic
[08:38:37] [PASSED] drm_test_drm_bridge_alloc_get_put
[08:38:37] ================ [PASSED] drm_bridge_alloc =================
[08:38:37] ============= drm_bridge_bus_fmt (5 subtests) ==============
[08:38:37] [PASSED] drm_test_bridge_rgb_yuv_rgb
[08:38:37] [PASSED] drm_test_bridge_must_convert_to_yuv444
[08:38:37] [PASSED] drm_test_bridge_hdmi_auto_rgb
[08:38:37] [PASSED] drm_test_bridge_auto_first
[08:38:37] [PASSED] drm_test_bridge_rgb_yuv_no_path
[08:38:37] =============== [PASSED] drm_bridge_bus_fmt ================
[08:38:37] ============= drm_cmdline_parser (40 subtests) =============
[08:38:37] [PASSED] drm_test_cmdline_force_d_only
[08:38:37] [PASSED] drm_test_cmdline_force_D_only_dvi
[08:38:37] [PASSED] drm_test_cmdline_force_D_only_hdmi
[08:38:37] [PASSED] drm_test_cmdline_force_D_only_not_digital
[08:38:37] [PASSED] drm_test_cmdline_force_e_only
[08:38:37] [PASSED] drm_test_cmdline_res
[08:38:37] [PASSED] drm_test_cmdline_res_vesa
[08:38:37] [PASSED] drm_test_cmdline_res_vesa_rblank
[08:38:37] [PASSED] drm_test_cmdline_res_rblank
[08:38:37] [PASSED] drm_test_cmdline_res_bpp
[08:38:37] [PASSED] drm_test_cmdline_res_refresh
[08:38:37] [PASSED] drm_test_cmdline_res_bpp_refresh
[08:38:37] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[08:38:37] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[08:38:37] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[08:38:37] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[08:38:37] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[08:38:37] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[08:38:37] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[08:38:37] [PASSED] drm_test_cmdline_res_margins_force_on
[08:38:37] [PASSED] drm_test_cmdline_res_vesa_margins
[08:38:37] [PASSED] drm_test_cmdline_name
[08:38:37] [PASSED] drm_test_cmdline_name_bpp
[08:38:37] [PASSED] drm_test_cmdline_name_option
[08:38:37] [PASSED] drm_test_cmdline_name_bpp_option
[08:38:37] [PASSED] drm_test_cmdline_rotate_0
[08:38:37] [PASSED] drm_test_cmdline_rotate_90
[08:38:37] [PASSED] drm_test_cmdline_rotate_180
[08:38:37] [PASSED] drm_test_cmdline_rotate_270
[08:38:37] [PASSED] drm_test_cmdline_hmirror
[08:38:37] [PASSED] drm_test_cmdline_vmirror
[08:38:37] [PASSED] drm_test_cmdline_margin_options
[08:38:37] [PASSED] drm_test_cmdline_multiple_options
[08:38:37] [PASSED] drm_test_cmdline_bpp_extra_and_option
[08:38:37] [PASSED] drm_test_cmdline_extra_and_option
[08:38:37] [PASSED] drm_test_cmdline_freestanding_options
[08:38:37] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[08:38:37] [PASSED] drm_test_cmdline_panel_orientation
[08:38:37] ================ drm_test_cmdline_invalid  =================
[08:38:37] [PASSED] margin_only
[08:38:37] [PASSED] interlace_only
[08:38:37] [PASSED] res_missing_x
[08:38:37] [PASSED] res_missing_y
[08:38:37] [PASSED] res_bad_y
[08:38:37] [PASSED] res_missing_y_bpp
[08:38:37] [PASSED] res_bad_bpp
[08:38:37] [PASSED] res_bad_refresh
[08:38:37] [PASSED] res_bpp_refresh_force_on_off
[08:38:37] [PASSED] res_invalid_mode
[08:38:37] [PASSED] res_bpp_wrong_place_mode
[08:38:37] [PASSED] name_bpp_refresh
[08:38:37] [PASSED] name_refresh
[08:38:37] [PASSED] name_refresh_wrong_mode
[08:38:37] [PASSED] name_refresh_invalid_mode
[08:38:37] [PASSED] rotate_multiple
[08:38:37] [PASSED] rotate_invalid_val
[08:38:37] [PASSED] rotate_truncated
[08:38:37] [PASSED] invalid_option
[08:38:37] [PASSED] invalid_tv_option
[08:38:37] [PASSED] truncated_tv_option
[08:38:37] ============ [PASSED] drm_test_cmdline_invalid =============
[08:38:37] =============== drm_test_cmdline_tv_options  ===============
[08:38:37] [PASSED] NTSC
[08:38:37] [PASSED] NTSC_443
[08:38:37] [PASSED] NTSC_J
[08:38:37] [PASSED] PAL
[08:38:37] [PASSED] PAL_M
[08:38:37] [PASSED] PAL_N
[08:38:37] [PASSED] SECAM
[08:38:37] [PASSED] MONO_525
[08:38:37] [PASSED] MONO_625
[08:38:37] =========== [PASSED] drm_test_cmdline_tv_options ===========
[08:38:37] =============== [PASSED] drm_cmdline_parser ================
[08:38:37] ========== drmm_connector_hdmi_init (20 subtests) ==========
[08:38:37] [PASSED] drm_test_connector_hdmi_init_valid
[08:38:37] [PASSED] drm_test_connector_hdmi_init_bpc_8
[08:38:37] [PASSED] drm_test_connector_hdmi_init_bpc_10
[08:38:37] [PASSED] drm_test_connector_hdmi_init_bpc_12
[08:38:37] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[08:38:37] [PASSED] drm_test_connector_hdmi_init_bpc_null
[08:38:37] [PASSED] drm_test_connector_hdmi_init_formats_empty
[08:38:37] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[08:38:37] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[08:38:37] [PASSED] supported_formats=0x9 yuv420_allowed=1
[08:38:37] [PASSED] supported_formats=0x9 yuv420_allowed=0
[08:38:37] [PASSED] supported_formats=0x5 yuv420_allowed=1
[08:38:37] [PASSED] supported_formats=0x5 yuv420_allowed=0
[08:38:37] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:38:37] [PASSED] drm_test_connector_hdmi_init_null_ddc
[08:38:37] [PASSED] drm_test_connector_hdmi_init_null_product
[08:38:37] [PASSED] drm_test_connector_hdmi_init_null_vendor
[08:38:37] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[08:38:37] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[08:38:37] [PASSED] drm_test_connector_hdmi_init_product_valid
[08:38:37] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[08:38:37] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[08:38:37] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[08:38:37] ========= drm_test_connector_hdmi_init_type_valid  =========
[08:38:37] [PASSED] HDMI-A
[08:38:37] [PASSED] HDMI-B
[08:38:37] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[08:38:37] ======== drm_test_connector_hdmi_init_type_invalid  ========
[08:38:37] [PASSED] Unknown
[08:38:37] [PASSED] VGA
[08:38:37] [PASSED] DVI-I
[08:38:37] [PASSED] DVI-D
[08:38:37] [PASSED] DVI-A
[08:38:37] [PASSED] Composite
[08:38:37] [PASSED] SVIDEO
[08:38:37] [PASSED] LVDS
[08:38:37] [PASSED] Component
[08:38:37] [PASSED] DIN
[08:38:37] [PASSED] DP
[08:38:37] [PASSED] TV
[08:38:37] [PASSED] eDP
[08:38:37] [PASSED] Virtual
[08:38:37] [PASSED] DSI
[08:38:37] [PASSED] DPI
[08:38:37] [PASSED] Writeback
[08:38:37] [PASSED] SPI
[08:38:37] [PASSED] USB
[08:38:37] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[08:38:37] ============ [PASSED] drmm_connector_hdmi_init =============
[08:38:37] ============= drmm_connector_init (3 subtests) =============
[08:38:37] [PASSED] drm_test_drmm_connector_init
[08:38:37] [PASSED] drm_test_drmm_connector_init_null_ddc
[08:38:37] ========= drm_test_drmm_connector_init_type_valid  =========
[08:38:37] [PASSED] Unknown
[08:38:37] [PASSED] VGA
[08:38:37] [PASSED] DVI-I
[08:38:37] [PASSED] DVI-D
[08:38:37] [PASSED] DVI-A
[08:38:37] [PASSED] Composite
[08:38:37] [PASSED] SVIDEO
[08:38:37] [PASSED] LVDS
[08:38:37] [PASSED] Component
[08:38:37] [PASSED] DIN
[08:38:37] [PASSED] DP
[08:38:37] [PASSED] HDMI-A
[08:38:37] [PASSED] HDMI-B
[08:38:37] [PASSED] TV
[08:38:37] [PASSED] eDP
[08:38:37] [PASSED] Virtual
[08:38:37] [PASSED] DSI
[08:38:37] [PASSED] DPI
[08:38:37] [PASSED] Writeback
[08:38:37] [PASSED] SPI
[08:38:37] [PASSED] USB
[08:38:37] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[08:38:37] =============== [PASSED] drmm_connector_init ===============
[08:38:37] ========= drm_connector_dynamic_init (6 subtests) ==========
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_init
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_init_properties
[08:38:37] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[08:38:37] [PASSED] Unknown
[08:38:37] [PASSED] VGA
[08:38:37] [PASSED] DVI-I
[08:38:37] [PASSED] DVI-D
[08:38:37] [PASSED] DVI-A
[08:38:37] [PASSED] Composite
[08:38:37] [PASSED] SVIDEO
[08:38:37] [PASSED] LVDS
[08:38:37] [PASSED] Component
[08:38:37] [PASSED] DIN
[08:38:37] [PASSED] DP
[08:38:37] [PASSED] HDMI-A
[08:38:37] [PASSED] HDMI-B
[08:38:37] [PASSED] TV
[08:38:37] [PASSED] eDP
[08:38:37] [PASSED] Virtual
[08:38:37] [PASSED] DSI
[08:38:37] [PASSED] DPI
[08:38:37] [PASSED] Writeback
[08:38:37] [PASSED] SPI
[08:38:37] [PASSED] USB
[08:38:37] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[08:38:37] ======== drm_test_drm_connector_dynamic_init_name  =========
[08:38:37] [PASSED] Unknown
[08:38:37] [PASSED] VGA
[08:38:37] [PASSED] DVI-I
[08:38:37] [PASSED] DVI-D
[08:38:37] [PASSED] DVI-A
[08:38:37] [PASSED] Composite
[08:38:37] [PASSED] SVIDEO
[08:38:37] [PASSED] LVDS
[08:38:37] [PASSED] Component
[08:38:37] [PASSED] DIN
[08:38:37] [PASSED] DP
[08:38:37] [PASSED] HDMI-A
[08:38:37] [PASSED] HDMI-B
[08:38:37] [PASSED] TV
[08:38:37] [PASSED] eDP
[08:38:37] [PASSED] Virtual
[08:38:37] [PASSED] DSI
[08:38:37] [PASSED] DPI
[08:38:37] [PASSED] Writeback
[08:38:37] [PASSED] SPI
[08:38:37] [PASSED] USB
[08:38:37] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[08:38:37] =========== [PASSED] drm_connector_dynamic_init ============
[08:38:37] ==== drm_connector_dynamic_register_early (4 subtests) =====
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[08:38:37] ====== [PASSED] drm_connector_dynamic_register_early =======
[08:38:37] ======= drm_connector_dynamic_register (7 subtests) ========
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[08:38:37] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[08:38:37] ========= [PASSED] drm_connector_dynamic_register ==========
[08:38:37] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[08:38:37] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[08:38:37] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[08:38:37] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[08:38:37] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[08:38:37] ========== drm_test_get_tv_mode_from_name_valid  ===========
[08:38:37] [PASSED] NTSC
[08:38:37] [PASSED] NTSC-443
[08:38:37] [PASSED] NTSC-J
[08:38:37] [PASSED] PAL
[08:38:37] [PASSED] PAL-M
[08:38:37] [PASSED] PAL-N
[08:38:37] [PASSED] SECAM
[08:38:37] [PASSED] Mono
[08:38:37] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[08:38:37] [PASSED] drm_test_get_tv_mode_from_name_truncated
[08:38:37] ============ [PASSED] drm_get_tv_mode_from_name ============
[08:38:37] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[08:38:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[08:38:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[08:38:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[08:38:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[08:38:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[08:38:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[08:38:37] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[08:38:37] [PASSED] VIC 96
[08:38:37] [PASSED] VIC 97
[08:38:37] [PASSED] VIC 101
[08:38:37] [PASSED] VIC 102
[08:38:37] [PASSED] VIC 106
[08:38:37] [PASSED] VIC 107
[08:38:37] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[08:38:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[08:38:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[08:38:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[08:38:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[08:38:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[08:38:37] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[08:38:37] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[08:38:37] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[08:38:37] [PASSED] Automatic
[08:38:37] [PASSED] Full
[08:38:37] [PASSED] Limited 16:235
[08:38:37] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[08:38:37] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[08:38:37] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[08:38:37] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[08:38:37] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[08:38:37] [PASSED] RGB
[08:38:37] [PASSED] YUV 4:2:0
[08:38:37] [PASSED] YUV 4:2:2
[08:38:37] [PASSED] YUV 4:4:4
[08:38:37] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[08:38:37] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[08:38:37] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[08:38:37] ============= drm_damage_helper (21 subtests) ==============
[08:38:37] [PASSED] drm_test_damage_iter_no_damage
[08:38:37] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[08:38:37] [PASSED] drm_test_damage_iter_no_damage_src_moved
[08:38:37] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[08:38:37] [PASSED] drm_test_damage_iter_no_damage_not_visible
[08:38:37] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[08:38:37] [PASSED] drm_test_damage_iter_no_damage_no_fb
[08:38:37] [PASSED] drm_test_damage_iter_simple_damage
[08:38:37] [PASSED] drm_test_damage_iter_single_damage
[08:38:37] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[08:38:37] [PASSED] drm_test_damage_iter_single_damage_outside_src
[08:38:37] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[08:38:37] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[08:38:37] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[08:38:37] [PASSED] drm_test_damage_iter_single_damage_src_moved
[08:38:37] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[08:38:37] [PASSED] drm_test_damage_iter_damage
[08:38:37] [PASSED] drm_test_damage_iter_damage_one_intersect
[08:38:37] [PASSED] drm_test_damage_iter_damage_one_outside
[08:38:37] [PASSED] drm_test_damage_iter_damage_src_moved
[08:38:37] [PASSED] drm_test_damage_iter_damage_not_visible
[08:38:37] ================ [PASSED] drm_damage_helper ================
[08:38:37] ============== drm_dp_mst_helper (3 subtests) ==============
[08:38:37] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[08:38:37] [PASSED] Clock 154000 BPP 30 DSC disabled
[08:38:37] [PASSED] Clock 234000 BPP 30 DSC disabled
[08:38:37] [PASSED] Clock 297000 BPP 24 DSC disabled
[08:38:37] [PASSED] Clock 332880 BPP 24 DSC enabled
[08:38:37] [PASSED] Clock 324540 BPP 24 DSC enabled
[08:38:37] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[08:38:37] ============== drm_test_dp_mst_calc_pbn_div  ===============
[08:38:37] [PASSED] Link rate 2000000 lane count 4
[08:38:37] [PASSED] Link rate 2000000 lane count 2
[08:38:37] [PASSED] Link rate 2000000 lane count 1
[08:38:37] [PASSED] Link rate 1350000 lane count 4
[08:38:37] [PASSED] Link rate 1350000 lane count 2
[08:38:37] [PASSED] Link rate 1350000 lane count 1
[08:38:37] [PASSED] Link rate 1000000 lane count 4
[08:38:37] [PASSED] Link rate 1000000 lane count 2
[08:38:37] [PASSED] Link rate 1000000 lane count 1
[08:38:37] [PASSED] Link rate 810000 lane count 4
[08:38:37] [PASSED] Link rate 810000 lane count 2
[08:38:37] [PASSED] Link rate 810000 lane count 1
[08:38:37] [PASSED] Link rate 540000 lane count 4
[08:38:37] [PASSED] Link rate 540000 lane count 2
[08:38:37] [PASSED] Link rate 540000 lane count 1
[08:38:37] [PASSED] Link rate 270000 lane count 4
[08:38:37] [PASSED] Link rate 270000 lane count 2
[08:38:37] [PASSED] Link rate 270000 lane count 1
[08:38:37] [PASSED] Link rate 162000 lane count 4
[08:38:37] [PASSED] Link rate 162000 lane count 2
[08:38:37] [PASSED] Link rate 162000 lane count 1
[08:38:37] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[08:38:37] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[08:38:37] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[08:38:37] [PASSED] DP_POWER_UP_PHY with port number
[08:38:37] [PASSED] DP_POWER_DOWN_PHY with port number
[08:38:37] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[08:38:37] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[08:38:37] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[08:38:37] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[08:38:37] [PASSED] DP_QUERY_PAYLOAD with port number
[08:38:37] [PASSED] DP_QUERY_PAYLOAD with VCPI
[08:38:37] [PASSED] DP_REMOTE_DPCD_READ with port number
[08:38:37] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[08:38:37] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[08:38:37] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[08:38:37] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[08:38:37] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[08:38:37] [PASSED] DP_REMOTE_I2C_READ with port number
[08:38:37] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[08:38:37] [PASSED] DP_REMOTE_I2C_READ with transactions array
[08:38:37] [PASSED] DP_REMOTE_I2C_WRITE with port number
[08:38:37] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[08:38:37] [PASSED] DP_REMOTE_I2C_WRITE with data array
[08:38:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[08:38:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[08:38:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[08:38:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[08:38:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[08:38:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[08:38:37] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[08:38:37] ================ [PASSED] drm_dp_mst_helper ================
[08:38:37] ================== drm_exec (7 subtests) ===================
[08:38:37] [PASSED] sanitycheck
[08:38:37] [PASSED] test_lock
[08:38:37] [PASSED] test_lock_unlock
[08:38:37] [PASSED] test_duplicates
[08:38:37] [PASSED] test_prepare
[08:38:37] [PASSED] test_prepare_array
[08:38:37] [PASSED] test_multiple_loops
[08:38:37] ==================== [PASSED] drm_exec =====================
[08:38:37] =========== drm_format_helper_test (17 subtests) ===========
[08:38:37] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[08:38:37] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[08:38:37] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[08:38:37] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[08:38:37] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[08:38:37] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[08:38:37] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[08:38:37] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[08:38:37] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[08:38:37] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[08:38:37] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[08:38:37] ============== drm_test_fb_xrgb8888_to_mono  ===============
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[08:38:37] ==================== drm_test_fb_swab  =====================
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ================ [PASSED] drm_test_fb_swab =================
[08:38:37] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[08:38:37] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[08:38:37] [PASSED] single_pixel_source_buffer
[08:38:37] [PASSED] single_pixel_clip_rectangle
[08:38:37] [PASSED] well_known_colors
[08:38:37] [PASSED] destination_pitch
[08:38:37] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[08:38:37] ================= drm_test_fb_clip_offset  =================
[08:38:37] [PASSED] pass through
[08:38:37] [PASSED] horizontal offset
[08:38:37] [PASSED] vertical offset
[08:38:37] [PASSED] horizontal and vertical offset
[08:38:37] [PASSED] horizontal offset (custom pitch)
[08:38:37] [PASSED] vertical offset (custom pitch)
[08:38:37] [PASSED] horizontal and vertical offset (custom pitch)
[08:38:37] ============= [PASSED] drm_test_fb_clip_offset =============
[08:38:37] =================== drm_test_fb_memcpy  ====================
[08:38:37] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[08:38:37] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[08:38:37] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[08:38:37] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[08:38:37] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[08:38:37] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[08:38:37] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[08:38:37] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[08:38:37] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[08:38:37] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[08:38:37] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[08:38:37] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[08:38:37] =============== [PASSED] drm_test_fb_memcpy ================
[08:38:37] ============= [PASSED] drm_format_helper_test ==============
[08:38:37] ================= drm_format (18 subtests) =================
[08:38:37] [PASSED] drm_test_format_block_width_invalid
[08:38:37] [PASSED] drm_test_format_block_width_one_plane
[08:38:37] [PASSED] drm_test_format_block_width_two_plane
[08:38:37] [PASSED] drm_test_format_block_width_three_plane
[08:38:37] [PASSED] drm_test_format_block_width_tiled
[08:38:37] [PASSED] drm_test_format_block_height_invalid
[08:38:37] [PASSED] drm_test_format_block_height_one_plane
[08:38:37] [PASSED] drm_test_format_block_height_two_plane
[08:38:37] [PASSED] drm_test_format_block_height_three_plane
[08:38:37] [PASSED] drm_test_format_block_height_tiled
[08:38:37] [PASSED] drm_test_format_min_pitch_invalid
[08:38:37] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[08:38:37] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[08:38:37] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[08:38:37] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[08:38:37] [PASSED] drm_test_format_min_pitch_two_plane
[08:38:37] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[08:38:37] [PASSED] drm_test_format_min_pitch_tiled
[08:38:37] =================== [PASSED] drm_format ====================
[08:38:37] ============== drm_framebuffer (10 subtests) ===============
[08:38:37] ========== drm_test_framebuffer_check_src_coords  ==========
[08:38:37] [PASSED] Success: source fits into fb
[08:38:37] [PASSED] Fail: overflowing fb with x-axis coordinate
[08:38:37] [PASSED] Fail: overflowing fb with y-axis coordinate
[08:38:37] [PASSED] Fail: overflowing fb with source width
[08:38:37] [PASSED] Fail: overflowing fb with source height
[08:38:37] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[08:38:37] [PASSED] drm_test_framebuffer_cleanup
[08:38:37] =============== drm_test_framebuffer_create  ===============
[08:38:37] [PASSED] ABGR8888 normal sizes
[08:38:37] [PASSED] ABGR8888 max sizes
[08:38:37] [PASSED] ABGR8888 pitch greater than min required
[08:38:37] [PASSED] ABGR8888 pitch less than min required
[08:38:37] [PASSED] ABGR8888 Invalid width
[08:38:37] [PASSED] ABGR8888 Invalid buffer handle
[08:38:37] [PASSED] No pixel format
[08:38:37] [PASSED] ABGR8888 Width 0
[08:38:37] [PASSED] ABGR8888 Height 0
[08:38:37] [PASSED] ABGR8888 Out of bound height * pitch combination
[08:38:37] [PASSED] ABGR8888 Large buffer offset
[08:38:37] [PASSED] ABGR8888 Buffer offset for inexistent plane
[08:38:37] [PASSED] ABGR8888 Invalid flag
[08:38:37] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[08:38:37] [PASSED] ABGR8888 Valid buffer modifier
[08:38:37] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[08:38:37] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[08:38:37] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[08:38:37] [PASSED] NV12 Normal sizes
[08:38:37] [PASSED] NV12 Max sizes
[08:38:37] [PASSED] NV12 Invalid pitch
[08:38:37] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[08:38:37] [PASSED] NV12 different  modifier per-plane
[08:38:37] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[08:38:37] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[08:38:37] [PASSED] NV12 Modifier for inexistent plane
[08:38:37] [PASSED] NV12 Handle for inexistent plane
[08:38:37] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[08:38:37] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[08:38:37] [PASSED] YVU420 Normal sizes
[08:38:37] [PASSED] YVU420 Max sizes
[08:38:37] [PASSED] YVU420 Invalid pitch
[08:38:37] [PASSED] YVU420 Different pitches
[08:38:37] [PASSED] YVU420 Different buffer offsets/pitches
[08:38:37] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[08:38:37] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[08:38:37] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[08:38:37] [PASSED] YVU420 Valid modifier
[08:38:37] [PASSED] YVU420 Different modifiers per plane
[08:38:37] [PASSED] YVU420 Modifier for inexistent plane
[08:38:37] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[08:38:37] [PASSED] X0L2 Normal sizes
[08:38:37] [PASSED] X0L2 Max sizes
[08:38:37] [PASSED] X0L2 Invalid pitch
[08:38:37] [PASSED] X0L2 Pitch greater than minimum required
[08:38:37] [PASSED] X0L2 Handle for inexistent plane
[08:38:37] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[08:38:37] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[08:38:37] [PASSED] X0L2 Valid modifier
[08:38:37] [PASSED] X0L2 Modifier for inexistent plane
[08:38:37] =========== [PASSED] drm_test_framebuffer_create ===========
[08:38:37] [PASSED] drm_test_framebuffer_free
[08:38:37] [PASSED] drm_test_framebuffer_init
[08:38:37] [PASSED] drm_test_framebuffer_init_bad_format
[08:38:37] [PASSED] drm_test_framebuffer_init_dev_mismatch
[08:38:37] [PASSED] drm_test_framebuffer_lookup
[08:38:37] [PASSED] drm_test_framebuffer_lookup_inexistent
[08:38:37] [PASSED] drm_test_framebuffer_modifiers_not_supported
[08:38:37] ================= [PASSED] drm_framebuffer =================
[08:38:37] ================ drm_gem_shmem (8 subtests) ================
[08:38:37] [PASSED] drm_gem_shmem_test_obj_create
[08:38:37] [PASSED] drm_gem_shmem_test_obj_create_private
[08:38:37] [PASSED] drm_gem_shmem_test_pin_pages
[08:38:37] [PASSED] drm_gem_shmem_test_vmap
[08:38:37] [PASSED] drm_gem_shmem_test_get_sg_table
[08:38:37] [PASSED] drm_gem_shmem_test_get_pages_sgt
[08:38:37] [PASSED] drm_gem_shmem_test_madvise
[08:38:37] [PASSED] drm_gem_shmem_test_purge
[08:38:37] ================== [PASSED] drm_gem_shmem ==================
[08:38:37] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[08:38:37] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[08:38:37] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[08:38:37] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[08:38:37] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[08:38:37] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[08:38:37] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[08:38:37] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[08:38:37] [PASSED] Automatic
[08:38:37] [PASSED] Full
[08:38:37] [PASSED] Limited 16:235
[08:38:37] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[08:38:37] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[08:38:37] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[08:38:37] [PASSED] drm_test_check_disable_connector
[08:38:37] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[08:38:37] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[08:38:37] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[08:38:37] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[08:38:37] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[08:38:37] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[08:38:37] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[08:38:37] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[08:38:37] [PASSED] drm_test_check_output_bpc_dvi
[08:38:37] [PASSED] drm_test_check_output_bpc_format_vic_1
[08:38:37] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[08:38:37] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[08:38:37] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[08:38:37] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[08:38:37] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[08:38:37] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[08:38:37] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[08:38:37] ============ drm_test_check_hdmi_color_format  =============
[08:38:37] [PASSED] AUTO -> RGB
[08:38:37] [PASSED] YCBCR422 -> YUV422
[08:38:37] [PASSED] YCBCR420 -> YUV420
[08:38:37] [PASSED] YCBCR444 -> YUV444
[08:38:37] [PASSED] RGB -> RGB
[08:38:37] ======== [PASSED] drm_test_check_hdmi_color_format =========
[08:38:37] ======== drm_test_check_hdmi_color_format_420_only  ========
[08:38:37] [PASSED] RGB should fail
[08:38:37] [PASSED] YUV444 should fail
[08:38:37] [PASSED] YUV422 should fail
[08:38:37] [PASSED] YUV420 should work
[08:38:37] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[08:38:37] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[08:38:37] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[08:38:37] [PASSED] drm_test_check_broadcast_rgb_value
[08:38:37] [PASSED] drm_test_check_bpc_8_value
[08:38:37] [PASSED] drm_test_check_bpc_10_value
[08:38:37] [PASSED] drm_test_check_bpc_12_value
[08:38:37] [PASSED] drm_test_check_format_value
[08:38:37] [PASSED] drm_test_check_tmds_char_value
[08:38:37] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[08:38:37] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[08:38:37] [PASSED] drm_test_check_mode_valid
[08:38:37] [PASSED] drm_test_check_mode_valid_reject
[08:38:37] [PASSED] drm_test_check_mode_valid_reject_rate
[08:38:37] [PASSED] drm_test_check_mode_valid_reject_max_clock
[08:38:37] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[08:38:37] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[08:38:37] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[08:38:37] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[08:38:37] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[08:38:37] [PASSED] drm_test_check_infoframes
[08:38:37] [PASSED] drm_test_check_reject_avi_infoframe
[08:38:37] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[08:38:37] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[08:38:37] [PASSED] drm_test_check_reject_audio_infoframe
[08:38:37] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[08:38:37] ================= drm_managed (2 subtests) =================
[08:38:37] [PASSED] drm_test_managed_release_action
[08:38:37] [PASSED] drm_test_managed_run_action
[08:38:37] =================== [PASSED] drm_managed ===================
[08:38:37] =================== drm_mm (6 subtests) ====================
[08:38:37] [PASSED] drm_test_mm_init
[08:38:37] [PASSED] drm_test_mm_debug
[08:38:37] [PASSED] drm_test_mm_align32
[08:38:37] [PASSED] drm_test_mm_align64
[08:38:37] [PASSED] drm_test_mm_lowest
[08:38:37] [PASSED] drm_test_mm_highest
[08:38:37] ===================== [PASSED] drm_mm ======================
[08:38:37] ============= drm_modes_analog_tv (5 subtests) =============
[08:38:37] [PASSED] drm_test_modes_analog_tv_mono_576i
[08:38:37] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[08:38:37] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[08:38:37] [PASSED] drm_test_modes_analog_tv_pal_576i
[08:38:37] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[08:38:37] =============== [PASSED] drm_modes_analog_tv ===============
[08:38:37] ============== drm_plane_helper (2 subtests) ===============
[08:38:37] =============== drm_test_check_plane_state  ================
[08:38:37] [PASSED] clipping_simple
[08:38:37] [PASSED] clipping_rotate_reflect
[08:38:37] [PASSED] positioning_simple
[08:38:37] [PASSED] upscaling
[08:38:37] [PASSED] downscaling
[08:38:37] [PASSED] rounding1
[08:38:37] [PASSED] rounding2
[08:38:37] [PASSED] rounding3
[08:38:37] [PASSED] rounding4
[08:38:37] =========== [PASSED] drm_test_check_plane_state ============
[08:38:37] =========== drm_test_check_invalid_plane_state  ============
[08:38:37] [PASSED] positioning_invalid
[08:38:37] [PASSED] upscaling_invalid
[08:38:37] [PASSED] downscaling_invalid
[08:38:37] ======= [PASSED] drm_test_check_invalid_plane_state ========
[08:38:37] ================ [PASSED] drm_plane_helper =================
[08:38:37] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[08:38:37] ====== drm_test_connector_helper_tv_get_modes_check  =======
[08:38:37] [PASSED] None
[08:38:37] [PASSED] PAL
[08:38:37] [PASSED] NTSC
[08:38:37] [PASSED] Both, NTSC Default
[08:38:37] [PASSED] Both, PAL Default
[08:38:37] [PASSED] Both, NTSC Default, with PAL on command-line
[08:38:37] [PASSED] Both, PAL Default, with NTSC on command-line
[08:38:37] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[08:38:37] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[08:38:37] ================== drm_rect (9 subtests) ===================
[08:38:37] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[08:38:37] [PASSED] drm_test_rect_clip_scaled_not_clipped
[08:38:37] [PASSED] drm_test_rect_clip_scaled_clipped
[08:38:37] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[08:38:37] ================= drm_test_rect_intersect  =================
[08:38:37] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[08:38:37] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[08:38:37] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[08:38:37] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[08:38:37] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[08:38:37] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[08:38:37] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[08:38:37] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[08:38:37] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[08:38:37] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[08:38:37] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[08:38:37] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[08:38:37] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[08:38:37] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[08:38:37] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[08:38:37] ============= [PASSED] drm_test_rect_intersect =============
[08:38:37] ================ drm_test_rect_calc_hscale  ================
[08:38:37] [PASSED] normal use
[08:38:37] [PASSED] out of max range
[08:38:37] [PASSED] out of min range
[08:38:37] [PASSED] zero dst
[08:38:37] [PASSED] negative src
[08:38:37] [PASSED] negative dst
[08:38:37] ============ [PASSED] drm_test_rect_calc_hscale ============
[08:38:37] ================ drm_test_rect_calc_vscale  ================
[08:38:37] [PASSED] normal use
[08:38:37] [PASSED] out of max range
[08:38:37] [PASSED] out of min range
[08:38:37] [PASSED] zero dst
[08:38:37] [PASSED] negative src
[08:38:37] [PASSED] negative dst
[08:38:37] ============ [PASSED] drm_test_rect_calc_vscale ============
[08:38:37] ================== drm_test_rect_rotate  ===================
[08:38:37] [PASSED] reflect-x
[08:38:37] [PASSED] reflect-y
[08:38:37] [PASSED] rotate-0
[08:38:37] [PASSED] rotate-90
[08:38:37] [PASSED] rotate-180
[08:38:37] [PASSED] rotate-270
[08:38:37] ============== [PASSED] drm_test_rect_rotate ===============
[08:38:37] ================ drm_test_rect_rotate_inv  =================
[08:38:37] [PASSED] reflect-x
[08:38:37] [PASSED] reflect-y
[08:38:37] [PASSED] rotate-0
[08:38:37] [PASSED] rotate-90
[08:38:37] [PASSED] rotate-180
[08:38:37] [PASSED] rotate-270
[08:38:37] ============ [PASSED] drm_test_rect_rotate_inv =============
[08:38:37] ==================== [PASSED] drm_rect =====================
[08:38:37] ============ drm_sysfb_modeset_test (1 subtest) ============
[08:38:37] ============ drm_test_sysfb_build_fourcc_list  =============
[08:38:37] [PASSED] no native formats
[08:38:37] [PASSED] XRGB8888 as native format
[08:38:37] [PASSED] remove duplicates
[08:38:37] [PASSED] convert alpha formats
[08:38:37] [PASSED] random formats
[08:38:37] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[08:38:37] ============= [PASSED] drm_sysfb_modeset_test ==============
[08:38:37] ================== drm_fixp (2 subtests) ===================
[08:38:37] [PASSED] drm_test_int2fixp
[08:38:37] [PASSED] drm_test_sm2fixp
[08:38:37] ==================== [PASSED] drm_fixp =====================
[08:38:37] ============================================================
[08:38:37] Testing complete. Ran 641 tests: passed: 641
[08:38:37] Elapsed time: 26.868s total, 1.798s configuring, 24.897s building, 0.147s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[08:38:37] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:38:39] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:38:49] Starting KUnit Kernel (1/1)...
[08:38:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:38:49] ============= refcount_interrupt (4 subtests) ==============
[08:38:49] [PASSED] test_single_irq_change
[08:38:49] [PASSED] test_nested_irq_change
[08:38:49] [PASSED] test_multiple_irq_change
[08:38:49] [PASSED] test_irq_save
[08:38:49] =============== [PASSED] refcount_interrupt ================
[08:38:49] ================= ttm_device (5 subtests) ==================
[08:38:49] [PASSED] ttm_device_init_basic
[08:38:49] [PASSED] ttm_device_init_multiple
[08:38:49] [PASSED] ttm_device_fini_basic
[08:38:49] [PASSED] ttm_device_init_no_vma_man
[08:38:49] ================== ttm_device_init_pools  ==================
[08:38:49] [PASSED] No DMA allocations, no DMA32 required
[08:38:49] [PASSED] DMA allocations, DMA32 required
[08:38:49] [PASSED] No DMA allocations, DMA32 required
[08:38:49] [PASSED] DMA allocations, no DMA32 required
[08:38:49] ============== [PASSED] ttm_device_init_pools ==============
[08:38:49] =================== [PASSED] ttm_device ====================
[08:38:49] ================== ttm_pool (8 subtests) ===================
[08:38:49] ================== ttm_pool_alloc_basic  ===================
[08:38:49] [PASSED] One page
[08:38:49] [PASSED] More than one page
[08:38:49] [PASSED] Above the allocation limit
[08:38:49] [PASSED] One page, with coherent DMA mappings enabled
[08:38:49] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:38:49] ============== [PASSED] ttm_pool_alloc_basic ===============
[08:38:49] ============== ttm_pool_alloc_basic_dma_addr  ==============
[08:38:49] [PASSED] One page
[08:38:49] [PASSED] More than one page
[08:38:49] [PASSED] Above the allocation limit
[08:38:49] [PASSED] One page, with coherent DMA mappings enabled
[08:38:49] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:38:49] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[08:38:49] [PASSED] ttm_pool_alloc_order_caching_match
[08:38:49] [PASSED] ttm_pool_alloc_caching_mismatch
[08:38:49] [PASSED] ttm_pool_alloc_order_mismatch
[08:38:49] [PASSED] ttm_pool_free_dma_alloc
[08:38:49] [PASSED] ttm_pool_free_no_dma_alloc
[08:38:49] [PASSED] ttm_pool_fini_basic
[08:38:49] ==================== [PASSED] ttm_pool =====================
[08:38:49] ================ ttm_resource (8 subtests) =================
[08:38:49] ================= ttm_resource_init_basic  =================
[08:38:49] [PASSED] Init resource in TTM_PL_SYSTEM
[08:38:49] [PASSED] Init resource in TTM_PL_VRAM
[08:38:49] [PASSED] Init resource in a private placement
[08:38:49] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[08:38:49] ============= [PASSED] ttm_resource_init_basic =============
[08:38:49] [PASSED] ttm_resource_init_pinned
[08:38:49] [PASSED] ttm_resource_fini_basic
[08:38:49] [PASSED] ttm_resource_manager_init_basic
[08:38:49] [PASSED] ttm_resource_manager_usage_basic
[08:38:49] [PASSED] ttm_resource_manager_set_used_basic
[08:38:49] [PASSED] ttm_sys_man_alloc_basic
[08:38:49] [PASSED] ttm_sys_man_free_basic
[08:38:49] ================== [PASSED] ttm_resource ===================
[08:38:49] =================== ttm_tt (15 subtests) ===================
[08:38:49] ==================== ttm_tt_init_basic  ====================
[08:38:49] [PASSED] Page-aligned size
[08:38:49] [PASSED] Extra pages requested
[08:38:49] ================ [PASSED] ttm_tt_init_basic ================
[08:38:49] [PASSED] ttm_tt_init_misaligned
[08:38:49] [PASSED] ttm_tt_fini_basic
[08:38:49] [PASSED] ttm_tt_fini_sg
[08:38:49] [PASSED] ttm_tt_fini_shmem
[08:38:49] [PASSED] ttm_tt_create_basic
[08:38:49] [PASSED] ttm_tt_create_invalid_bo_type
[08:38:49] [PASSED] ttm_tt_create_ttm_exists
[08:38:49] [PASSED] ttm_tt_create_failed
[08:38:49] [PASSED] ttm_tt_destroy_basic
[08:38:49] [PASSED] ttm_tt_populate_null_ttm
[08:38:49] [PASSED] ttm_tt_populate_populated_ttm
[08:38:49] [PASSED] ttm_tt_unpopulate_basic
[08:38:49] [PASSED] ttm_tt_unpopulate_empty_ttm
[08:38:49] [PASSED] ttm_tt_swapin_basic
[08:38:49] ===================== [PASSED] ttm_tt ======================
[08:38:49] =================== ttm_bo (14 subtests) ===================
[08:38:49] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[08:38:49] [PASSED] Cannot be interrupted and sleeps
[08:38:49] [PASSED] Cannot be interrupted, locks straight away
[08:38:49] [PASSED] Can be interrupted, sleeps
[08:38:49] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[08:38:49] [PASSED] ttm_bo_reserve_locked_no_sleep
[08:38:49] [PASSED] ttm_bo_reserve_no_wait_ticket
[08:38:49] [PASSED] ttm_bo_reserve_double_resv
[08:38:49] [PASSED] ttm_bo_reserve_interrupted
[08:38:49] [PASSED] ttm_bo_reserve_deadlock
[08:38:49] [PASSED] ttm_bo_unreserve_basic
[08:38:49] [PASSED] ttm_bo_unreserve_pinned
[08:38:49] [PASSED] ttm_bo_unreserve_bulk
[08:38:49] [PASSED] ttm_bo_fini_basic
[08:38:49] [PASSED] ttm_bo_fini_shared_resv
[08:38:49] [PASSED] ttm_bo_pin_basic
[08:38:49] [PASSED] ttm_bo_pin_unpin_resource
[08:38:49] [PASSED] ttm_bo_multiple_pin_one_unpin
[08:38:49] ===================== [PASSED] ttm_bo ======================
[08:38:49] ============== ttm_bo_validate (22 subtests) ===============
[08:38:49] ============== ttm_bo_init_reserved_sys_man  ===============
[08:38:49] [PASSED] Buffer object for userspace
[08:38:49] [PASSED] Kernel buffer object
[08:38:49] [PASSED] Shared buffer object
[08:38:49] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[08:38:49] ============== ttm_bo_init_reserved_mock_man  ==============
[08:38:49] [PASSED] Buffer object for userspace
[08:38:49] [PASSED] Kernel buffer object
[08:38:49] [PASSED] Shared buffer object
[08:38:49] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[08:38:49] [PASSED] ttm_bo_init_reserved_resv
[08:38:49] ================== ttm_bo_validate_basic  ==================
[08:38:49] [PASSED] Buffer object for userspace
[08:38:49] [PASSED] Kernel buffer object
[08:38:49] [PASSED] Shared buffer object
[08:38:49] ============== [PASSED] ttm_bo_validate_basic ==============
[08:38:49] [PASSED] ttm_bo_validate_invalid_placement
[08:38:49] ============= ttm_bo_validate_same_placement  ==============
[08:38:49] [PASSED] System manager
[08:38:49] [PASSED] VRAM manager
[08:38:49] ========= [PASSED] ttm_bo_validate_same_placement ==========
[08:38:49] [PASSED] ttm_bo_validate_failed_alloc
[08:38:49] [PASSED] ttm_bo_validate_pinned
[08:38:49] [PASSED] ttm_bo_validate_busy_placement
[08:38:49] ================ ttm_bo_validate_multihop  =================
[08:38:49] [PASSED] Buffer object for userspace
[08:38:49] [PASSED] Kernel buffer object
[08:38:49] [PASSED] Shared buffer object
[08:38:49] ============ [PASSED] ttm_bo_validate_multihop =============
[08:38:49] ========== ttm_bo_validate_no_placement_signaled  ==========
[08:38:49] [PASSED] Buffer object in system domain, no page vector
[08:38:49] [PASSED] Buffer object in system domain with an existing page vector
[08:38:49] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[08:38:49] ======== ttm_bo_validate_no_placement_not_signaled  ========
[08:38:49] [PASSED] Buffer object for userspace
[08:38:49] [PASSED] Kernel buffer object
[08:38:49] [PASSED] Shared buffer object
[08:38:49] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[08:38:49] [PASSED] ttm_bo_validate_move_fence_signaled
[08:38:49] ========= ttm_bo_validate_move_fence_not_signaled  =========
[08:38:49] [PASSED] Waits for GPU
[08:38:49] [PASSED] Tries to lock straight away
[08:38:49] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[08:38:49] [PASSED] ttm_bo_validate_swapout
[08:38:49] [PASSED] ttm_bo_validate_happy_evict
[08:38:49] [PASSED] ttm_bo_validate_all_pinned_evict
[08:38:49] [PASSED] ttm_bo_validate_allowed_only_evict
[08:38:49] [PASSED] ttm_bo_validate_deleted_evict
[08:38:49] [PASSED] ttm_bo_validate_busy_domain_evict
[08:38:49] [PASSED] ttm_bo_validate_evict_gutting
[08:38:49] [PASSED] ttm_bo_validate_recrusive_evict
[08:38:49] ================= [PASSED] ttm_bo_validate =================
[08:38:49] ============================================================
[08:38:49] Testing complete. Ran 106 tests: passed: 106
[08:38:49] Elapsed time: 12.075s total, 1.832s configuring, 10.028s building, 0.179s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[08:38:49] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:38:51] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:39:00] Starting KUnit Kernel (1/1)...
[08:39:00] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:39:00] ============= refcount_interrupt (4 subtests) ==============
[08:39:00] [PASSED] test_single_irq_change
[08:39:00] [PASSED] test_nested_irq_change
[08:39:00] [PASSED] test_multiple_irq_change
[08:39:00] [PASSED] test_irq_save
[08:39:00] =============== [PASSED] refcount_interrupt ================
[08:39:00] =============== dma-buf-fence (12 subtests) ================
[08:39:00] [PASSED] test_sanitycheck
[08:39:00] [PASSED] test_signaling
[08:39:00] [PASSED] test_add_callback
[08:39:00] [PASSED] test_late_add_callback
[08:39:00] [PASSED] test_rm_callback
[08:39:00] [PASSED] test_late_rm_callback
[08:39:00] [PASSED] test_status
[08:39:00] [PASSED] test_error
[08:39:00] [PASSED] test_wait
[08:39:00] [PASSED] test_wait_timeout
[08:39:00] [PASSED] test_stub
[08:39:00] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[08:39:00] ================== [PASSED] dma-buf-fence ==================
[08:39:00] ============ dma-buf-fence-chain (11 subtests) =============
[08:39:00] [PASSED] test_sanitycheck
[08:39:00] [PASSED] test_find_seqno
[08:39:00] [PASSED] test_find_signaled
[08:39:00] [PASSED] test_find_out_of_order
[08:39:05] [PASSED] test_find_gap
[08:39:05] [PASSED] test_find_race
[08:39:05] [PASSED] test_signal_forward
[08:39:05] [PASSED] test_signal_backward
[08:39:05] [PASSED] test_wait_forward
[08:39:05] [PASSED] test_wait_backward
[08:39:05] [PASSED] test_wait_random
[08:39:05] =============== [PASSED] dma-buf-fence-chain ===============
[08:39:05] ============ dma-buf-fence-unwrap (10 subtests) ============
[08:39:05] [PASSED] test_sanitycheck
[08:39:05] [PASSED] test_unwrap_array
[08:39:05] [PASSED] test_unwrap_chain
[08:39:05] [PASSED] test_unwrap_chain_array
[08:39:05] [PASSED] test_unwrap_merge
[08:39:05] [PASSED] test_unwrap_merge_duplicate
[08:39:05] [PASSED] test_unwrap_merge_seqno
[08:39:05] [PASSED] test_unwrap_merge_order
[08:39:05] [PASSED] test_unwrap_merge_complex
[08:39:05] [PASSED] test_unwrap_merge_complex_seqno
[08:39:05] ============== [PASSED] dma-buf-fence-unwrap ===============
[08:39:05] ================ dma-buf-resv (5 subtests) =================
[08:39:05] [PASSED] test_sanitycheck
[08:39:05] ===================== test_signaling  ======================
[08:39:05] [PASSED] kernel
[08:39:05] [PASSED] write
[08:39:05] [PASSED] read
[08:39:05] [PASSED] bookkeep
[08:39:05] ================= [PASSED] test_signaling ==================
[08:39:05] ====================== test_for_each  ======================
[08:39:05] [PASSED] kernel
[08:39:05] [PASSED] write
[08:39:05] [PASSED] read
[08:39:05] [PASSED] bookkeep
[08:39:05] ================== [PASSED] test_for_each ==================
[08:39:05] ================= test_for_each_unlocked  ==================
[08:39:05] [PASSED] kernel
[08:39:05] [PASSED] write
[08:39:05] [PASSED] read
[08:39:05] [PASSED] bookkeep
[08:39:05] ============= [PASSED] test_for_each_unlocked ==============
[08:39:05] ===================== test_get_fences  =====================
[08:39:05] [PASSED] kernel
[08:39:05] [PASSED] write
[08:39:05] [PASSED] read
[08:39:05] [PASSED] bookkeep
[08:39:05] ================= [PASSED] test_get_fences =================
[08:39:05] ================== [PASSED] dma-buf-resv ===================
[08:39:05] ============================================================
[08:39:05] Testing complete. Ran 54 tests: passed: 53, skipped: 1
[08:39:05] Elapsed time: 15.879s total, 1.845s configuring, 8.763s building, 5.256s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

RE: [PATCH 01/11] drm/i915/lspcon: use u8 variable to hold 1-byte DPCD reads

[Kandpal, Suraj]

> Subject: [PATCH 01/11] drm/i915/lspcon: use u8 variable to hold 1-byte DPCD
> reads
> 
> Passing a pointer to a u32 variable for a 1-byte reads is error prone, and only
> works because it's always initialized to 0 before the read, and the code's
> running on little-endian CPUs. Switch to u8 variables.
> 
> In _lspcon_write_avi_infoframe_mca(), add a separate variable to hold the
> number of bytes written instead of reusing the same variable for two purposes.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_lspcon.c | 14 ++++++++------
>  1 file changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> b/drivers/gpu/drm/i915/display/intel_lspcon.c
> index 9ceabbc981a1..b306bf5f6130 100644
> --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> @@ -435,14 +435,14 @@ static bool
> _lspcon_write_avi_infoframe_parade(struct drm_dp_aux *aux,  static bool
> _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
>  					    const u8 *buffer, ssize_t len)  {
> -	int ret;
> -	u32 val = 0;
> +	int ret, written = 0;
>  	u32 retry;
>  	u16 reg;
>  	const u8 *data = buffer;
> +	u8 val;
> 
>  	reg = LSPCON_MCA_AVI_IF_WRITE_OFFSET;
> -	while (val < len) {
> +	while (written < len) {
>  		/* DPCD write for AVI IF can fail on a slow FW day, so retry */
>  		for (retry = 0; retry < 5; retry++) {
>  			ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1);
> @@ -456,7 +456,9 @@ static bool _lspcon_write_avi_infoframe_mca(struct
> drm_dp_aux *aux,
>  				return false;
>  			}
>  		}
> -		val++; reg++; data++;
> +		written++;
> +		reg++;
> +		data++;
>  	}
> 
>  	val = 0;
> @@ -612,8 +614,8 @@ void lspcon_set_infoframes(struct intel_encoder
> *encoder,  static bool _lspcon_read_avi_infoframe_enabled_mca(struct
> drm_dp_aux *aux)  {
>  	int ret;
> -	u32 val = 0;
>  	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> +	u8 val;
> 
>  	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
>  	if (ret < 0) {
> @@ -627,8 +629,8 @@ static bool
> _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)  static
> bool _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)  {
>  	int ret;
> -	u32 val = 0;
>  	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> +	u8 val;
> 
>  	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
>  	if (ret < 0) {
> --
> 2.47.3

RE: [PATCH 02/11] drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte, write_byte, write_data}

[Kandpal, Suraj]

> Subject: [PATCH 02/11] drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte,
> write_byte, write_data}
> 
> Switch to the modern DPCD access functions that return negative error codes
> on errors, -EIO for incomplete access, and 0 on success.
> 
> Use 1-byte accessors where sensible. Use local ret variables for the return value
> instead of checking inline.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_lspcon.c | 34 +++++++++------------
>  1 file changed, 15 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> b/drivers/gpu/drm/i915/display/intel_lspcon.c
> index b306bf5f6130..07b5a9d010ff 100644
> --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> @@ -137,9 +137,7 @@ bool intel_lspcon_detect_hdr_capability(struct
> intel_digital_port *dig_port)
>  	u8 hdr_caps;
>  	int ret;
> 
> -	ret = drm_dp_dpcd_read(&intel_dp->aux, get_hdr_status_reg(lspcon),
> -			       &hdr_caps, 1);
> -
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
> +get_hdr_status_reg(lspcon), &hdr_caps);
>  	if (ret < 0) {
>  		drm_dbg_kms(display->drm, "HDR capability detection
> failed\n");
>  		lspcon->hdr_supported = false;
> @@ -244,10 +242,11 @@ static bool lspcon_wake_native_aux_ch(struct
> intel_lspcon *lspcon)  {
>  	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
>  	struct intel_display *display = to_intel_display(intel_dp);
> +	int ret;
>  	u8 rev;
> 
> -	if (drm_dp_dpcd_readb(&lspcon_to_intel_dp(lspcon)->aux,
> DP_DPCD_REV,
> -			      &rev) != 1) {
> +	ret = drm_dp_dpcd_read_byte(&lspcon_to_intel_dp(lspcon)->aux,
> DP_DPCD_REV, &rev);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm, "Native AUX CH down\n");

I was wondering now that we have ret should we add it in the debug message using ERR_PTR()
Same for all the changes done below ?

Regards,
Suraj Kandpal

>  		return false;
>  	}
> @@ -331,15 +330,14 @@ static bool lspcon_parade_fw_ready(struct
> drm_dp_aux *aux)  {
>  	u8 avi_if_ctrl;
>  	u8 retry;
> -	ssize_t ret;
> +	int ret;
> 
>  	/* Check if LSPCON FW is ready for data */
>  	for (retry = 0; retry < 5; retry++) {
>  		if (retry)
>  			usleep_range(200, 300);
> 
> -		ret = drm_dp_dpcd_read(aux, LSPCON_PARADE_AVI_IF_CTRL,
> -				       &avi_if_ctrl, 1);
> +		ret = drm_dp_dpcd_read_byte(aux,
> LSPCON_PARADE_AVI_IF_CTRL,
> +&avi_if_ctrl);
>  		if (ret < 0) {
>  			drm_err(aux->drm_dev, "Failed to read AVI IF
> control\n");
>  			return false;
> @@ -371,7 +369,7 @@ static bool
> _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
> 
>  		reg = LSPCON_PARADE_AVI_IF_WRITE_OFFSET;
>  		data = avi_buf + block_count * 8;
> -		ret = drm_dp_dpcd_write(aux, reg, data, 8);
> +		ret = drm_dp_dpcd_write_data(aux, reg, data, 8);
>  		if (ret < 0) {
>  			drm_err(aux->drm_dev, "Failed to write AVI IF block
> %d\n",
>  				block_count);
> @@ -386,7 +384,7 @@ static bool
> _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
>  		 */
>  		reg = LSPCON_PARADE_AVI_IF_CTRL;
>  		avi_if_ctrl = LSPCON_PARADE_AVI_IF_KICKOFF | block_count;
> -		ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1);
> +		ret = drm_dp_dpcd_write_byte(aux, reg, avi_if_ctrl);
>  		if (ret < 0) {
>  			drm_err(aux->drm_dev, "Failed to update (0x%x),
> block %d\n",
>  				reg, block_count);
> @@ -445,8 +443,8 @@ static bool _lspcon_write_avi_infoframe_mca(struct
> drm_dp_aux *aux,
>  	while (written < len) {
>  		/* DPCD write for AVI IF can fail on a slow FW day, so retry */
>  		for (retry = 0; retry < 5; retry++) {
> -			ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1);
> -			if (ret == 1) {
> +			ret = drm_dp_dpcd_write_byte(aux, reg, *data);
> +			if (!ret) {
>  				break;
>  			} else if (retry < 4) {
>  				mdelay(50);
> @@ -461,9 +459,8 @@ static bool _lspcon_write_avi_infoframe_mca(struct
> drm_dp_aux *aux,
>  		data++;
>  	}
> 
> -	val = 0;
>  	reg = LSPCON_MCA_AVI_IF_CTRL;
> -	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> +	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
>  	if (ret < 0) {
>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
> reg);
>  		return false;
> @@ -473,14 +470,13 @@ static bool _lspcon_write_avi_infoframe_mca(struct
> drm_dp_aux *aux,
>  	val &= ~LSPCON_MCA_AVI_IF_HANDLED;
>  	val |= LSPCON_MCA_AVI_IF_KICKOFF;
> 
> -	ret = drm_dp_dpcd_write(aux, reg, &val, 1);
> +	ret = drm_dp_dpcd_write_byte(aux, reg, val);
>  	if (ret < 0) {
>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
> reg);
>  		return false;
>  	}
> 
> -	val = 0;
> -	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> +	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
>  	if (ret < 0) {
>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
> reg);
>  		return false;
> @@ -617,7 +613,7 @@ static bool
> _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
>  	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
>  	u8 val;
> 
> -	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> +	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
>  	if (ret < 0) {
>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
> reg);
>  		return false;
> @@ -632,7 +628,7 @@ static bool
> _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
>  	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
>  	u8 val;
> 
> -	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> +	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
>  	if (ret < 0) {
>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
> reg);
>  		return false;
> --
> 2.47.3

RE: [PATCH 03/11] drm/i915/alpm: switch to drm_dp_dpcd_{read_byte, write_byte}

[Kandpal, Suraj]

> Subject: [PATCH 03/11] drm/i915/alpm: switch to drm_dp_dpcd_{read_byte,
> write_byte}
> 
> Switch to the modern DPCD access functions that return negative error codes
> on errors, -EIO for incomplete access, and 0 on success.
> 
> Rename an int r to ret while at it for clarity.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 10943539bc7c..9ef9d0e45258 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -628,7 +628,7 @@ void intel_alpm_enable_sink(struct intel_dp *intel_dp,
> 
> intel_alpm_aux_less_wake_supported(intel_dp)))
>  		val |= DP_ALPM_MODE_AUX_LESS;
> 
> -	drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
> val);
> +	drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_RECEIVER_ALPM_CONFIG, val);
>  }
> 
>  void intel_alpm_lobf_enable(const struct intel_crtc_state *new_crtc_state)
> @@ -751,11 +751,11 @@ bool intel_alpm_get_error(struct intel_dp *intel_dp)
> {
>  	struct intel_display *display = to_intel_display(intel_dp);
>  	struct drm_dp_aux *aux = &intel_dp->aux;
> +	int ret;
>  	u8 val;
> -	int r;
> 
> -	r = drm_dp_dpcd_readb(aux, DP_RECEIVER_ALPM_STATUS, &val);
> -	if (r != 1) {
> +	ret = drm_dp_dpcd_read_byte(aux, DP_RECEIVER_ALPM_STATUS,
> &val);
> +	if (ret < 0) {
>  		drm_err(display->drm, "Error reading ALPM status\n");

Should we maybe use ERR_PTR to document error when reading DPCD 

Regards,
Suraj Kandpal

>  		return true;
>  	}
> @@ -764,7 +764,7 @@ bool intel_alpm_get_error(struct intel_dp *intel_dp)
>  		drm_dbg_kms(display->drm, "ALPM lock timeout error\n");
> 
>  		/* Clearing error */
> -		drm_dp_dpcd_writeb(aux, DP_RECEIVER_ALPM_STATUS, val);
> +		drm_dp_dpcd_write_byte(aux, DP_RECEIVER_ALPM_STATUS,
> val);
>  		return true;
>  	}
> 
> --
> 2.47.3

✓ Xe.CI.BAT: success for drm/i915/display: switch to modern drm_dp_dpcd* accessors

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 927 bytes --]

== Series Details ==

Series: drm/i915/display: switch to modern drm_dp_dpcd* accessors
URL   : https://patchwork.freedesktop.org/series/174241/
State : success

== Summary ==

CI Bug Log - changes from xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8_BAT -> xe-pw-174241v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (15 -> 15)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * IGT: IGT_9098 -> IGT_9099
  * Linux: xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8 -> xe-pw-174241v1

  IGT_9098: 9098
  IGT_9099: 9099
  xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8: 0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8
  xe-pw-174241v1: 174241v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/index.html

[-- Attachment #2: Type: text/html, Size: 1489 bytes --]

RE: [PATCH 09/11] drm/i915/dp-mst: switch to drm_dp_dpcd_read_byte()

[Kandpal, Suraj]

> Subject: [PATCH 09/11] drm/i915/dp-mst: switch to drm_dp_dpcd_read_byte()
> 
> Switch to the modern DPCD access functions that return negative error codes
> on errors, -EIO for incomplete access, and 0 on success.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 6a869d0f6ffc..87aea2a8ee69 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -2230,7 +2230,7 @@ bool intel_dp_mst_verify_dpcd_state(struct intel_dp
> *intel_dp)
>  	if (!intel_dp->is_mst)
>  		return true;
> 
> -	ret = drm_dp_dpcd_readb(intel_dp->mst.mgr.aux, DP_MSTM_CTRL,
> &val);
> +	ret = drm_dp_dpcd_read_byte(intel_dp->mst.mgr.aux,
> DP_MSTM_CTRL,
> +&val);
> 
>  	/* Adjust the expected register value for SST + SideBand. */
>  	if (ret < 0 || val != (DP_MST_EN | DP_UP_REQ_EN |
> DP_UPSTREAM_IS_SRC)) {
> --
> 2.47.3

RE: [PATCH 11/11] drm/i915/psr: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()

[Kandpal, Suraj]

> Subject: [PATCH 11/11] drm/i915/psr: switch to drm_dp_dpcd_{read_byte,
> read_data, write_byte, write_data}()
> 
> Switch to the modern DPCD access functions that return negative error codes
> on errors, -EIO for incomplete access, and 0 on success.
> 
> This flags incomplete reads, and clarifies error handling all over the place. Use
> 1-byte accessors where sensible. Rename local int r to ret for clarity and
> consistency.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 65 ++++++++++++------------
>  1 file changed, 33 insertions(+), 32 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 872e253db178..f1d48b69a18f 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -471,9 +471,10 @@ static u8 intel_dp_get_sink_sync_latency(struct
> intel_dp *intel_dp)  {
>  	struct intel_display *display = to_intel_display(intel_dp);
>  	u8 val = 8; /* assume the worst if we can't read the value */
> +	int ret;
> 
> -	if (drm_dp_dpcd_readb(&intel_dp->aux,
> -			      DP_SYNCHRONIZATION_LATENCY_IN_SINK, &val)
> == 1)
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
> DP_SYNCHRONIZATION_LATENCY_IN_SINK, &val);
> +	if (!ret)
>  		val &= DP_MAX_RESYNC_FRAME_COUNT_MASK;
>  	else
>  		drm_dbg_kms(display->drm,
> @@ -485,7 +486,7 @@ static void _psr_compute_su_granularity(struct
> intel_dp *intel_dp,
>  					struct intel_connector *connector)  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> -	ssize_t r;
> +	int ret;
>  	__le16 w;
>  	u8 y;
> 
> @@ -500,19 +501,19 @@ static void _psr_compute_su_granularity(struct
> intel_dp *intel_dp,
>  		goto exit;
>  	}
> 
> -	r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_X_GRANULARITY,
> &w, sizeof(w));
> -	if (r != sizeof(w))
> +	ret = drm_dp_dpcd_read_data(&intel_dp->aux,
> DP_PSR2_SU_X_GRANULARITY, &w, sizeof(w));
> +	if (ret < 0)
>  		drm_dbg_kms(display->drm,
>  			    "Unable to read selective update x granularity\n");
>  	/*
>  	 * Spec says that if the value read is 0 the default granularity should
>  	 * be used instead.
>  	 */
> -	if (r != sizeof(w) || w == 0)
> +	if (ret < 0 || w == 0)
>  		w = cpu_to_le16(4);
> 
> -	r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_Y_GRANULARITY,
> &y, 1);
> -	if (r != 1) {
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
> DP_PSR2_SU_Y_GRANULARITY, &y);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm,
>  			    "Unable to read selective update y granularity\n");
>  		y = 4;
> @@ -796,11 +797,11 @@ static void _panel_replay_enable_sink(struct intel_dp
> *intel_dp,
>  		panel_replay_config[1] |=
>  			DP_PANEL_REPLAY_SU_REGION_SCANLINE_CAPTURE;
> 
> -	drm_dp_dpcd_write(&intel_dp->aux, PANEL_REPLAY_CONFIG,
> -			  panel_replay_config, sizeof(panel_replay_config));
> +	drm_dp_dpcd_write_data(&intel_dp->aux, PANEL_REPLAY_CONFIG,
> +			       panel_replay_config, sizeof(panel_replay_config));
> 
>  	panel_replay_config_3 = intel_dp_as_sdp_transmission_time();
> -	drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG3,
> panel_replay_config_3);
> +	drm_dp_dpcd_write_byte(&intel_dp->aux, PANEL_REPLAY_CONFIG3,
> +panel_replay_config_3);
>  }
> 
>  static void _psr_enable_sink(struct intel_dp *intel_dp, @@ -827,10 +828,10
> @@ static void _psr_enable_sink(struct intel_dp *intel_dp,
> 
>  	if (intel_dp->psr.entry_setup_frames > 0)
>  		val |= DP_PSR_FRAME_CAPTURE;
> -	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, val);
> +	drm_dp_dpcd_write_byte(&intel_dp->aux, DP_PSR_EN_CFG, val);
> 
>  	val |= DP_PSR_ENABLE;
> -	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, val);
> +	drm_dp_dpcd_write_byte(&intel_dp->aux, DP_PSR_EN_CFG, val);
>  }
> 
>  static void intel_psr_enable_sink(struct intel_dp *intel_dp, @@ -843,7 +844,7
> @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp,
>  		_psr_enable_sink(intel_dp, crtc_state);
> 
>  	if (intel_dp_is_edp(intel_dp))
> -		drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER,
> DP_SET_POWER_D0);
> +		drm_dp_dpcd_write_byte(&intel_dp->aux, DP_SET_POWER,
> +DP_SET_POWER_D0);
>  }
> 
>  void intel_psr_panel_replay_enable_sink(struct intel_dp *intel_dp) @@ -854,8
> +855,8 @@ void intel_psr_panel_replay_enable_sink(struct intel_dp *intel_dp)
>  	 * ensure this bit is cleared/set accordingly.
>  	 */
>  	if (CAN_PANEL_REPLAY(intel_dp) &&
> panel_replay_global_enabled(intel_dp))
> -		drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG,
> -				   DP_PANEL_REPLAY_ENABLE);
> +		drm_dp_dpcd_write_byte(&intel_dp->aux,
> PANEL_REPLAY_CONFIG,
> +				       DP_PANEL_REPLAY_ENABLE);
>  }
> 
>  static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp) @@ -2373,11
> +2374,11 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
> 
>  	/* Disable PSR on Sink */
>  	if (!intel_dp->psr.panel_replay_enabled) {
> -		drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
> +		drm_dp_dpcd_write_byte(&intel_dp->aux, DP_PSR_EN_CFG,
> 0);
> 
>  		if (intel_dp->psr.sel_update_enabled)
> -			drm_dp_dpcd_writeb(&intel_dp->aux,
> -					   DP_RECEIVER_ALPM_CONFIG, 0);
> +			drm_dp_dpcd_write_byte(&intel_dp->aux,
> +					       DP_RECEIVER_ALPM_CONFIG, 0);
>  	}
> 
>  	/* Wa_16025596647 */
> @@ -3517,7 +3518,7 @@ static void intel_psr_handle_irq(struct intel_dp
> *intel_dp)
>  	intel_psr_disable_locked(intel_dp);
>  	psr->sink_not_reliable = true;
>  	/* let's make sure that sink is awaken */
> -	drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER,
> DP_SET_POWER_D0);
> +	drm_dp_dpcd_write_byte(&intel_dp->aux, DP_SET_POWER,
> DP_SET_POWER_D0);
>  }
> 
>  static void intel_psr_work(struct work_struct *work) @@ -3796,15 +3797,15
> @@ static int psr_get_status_and_error_status(struct intel_dp *intel_dp,
>  	offset = intel_dp->psr.panel_replay_enabled ?
>  		 DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS :
> DP_PSR_STATUS;
> 
> -	ret = drm_dp_dpcd_readb(aux, offset, status);
> -	if (ret != 1)
> +	ret = drm_dp_dpcd_read_byte(aux, offset, status);
> +	if (ret < 0)
>  		return ret;
> 
>  	offset = intel_dp->psr.panel_replay_enabled ?
>  		 DP_PANEL_REPLAY_ERROR_STATUS : DP_PSR_ERROR_STATUS;
> 
> -	ret = drm_dp_dpcd_readb(aux, offset, error_status);
> -	if (ret != 1)
> +	ret = drm_dp_dpcd_read_byte(aux, offset, error_status);
> +	if (ret < 0)
>  		return ret;
> 
>  	*status = *status & DP_PSR_SINK_STATE_MASK; @@ -3829,11
> +3830,11 @@ static void psr_capability_changed_check(struct intel_dp
> *intel_dp)  {
>  	struct intel_display *display = to_intel_display(intel_dp);
>  	struct intel_psr *psr = &intel_dp->psr;
> +	int ret;
>  	u8 val;
> -	int r;
> 
> -	r = drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_ESI, &val);
> -	if (r != 1) {
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_PSR_ESI, &val);
> +	if (ret < 0) {
>  		drm_err(display->drm, "Error reading DP_PSR_ESI\n");
>  		return;
>  	}
> @@ -3845,7 +3846,7 @@ static void psr_capability_changed_check(struct
> intel_dp *intel_dp)
>  			    "Sink PSR capability changed, disabling PSR\n");
> 
>  		/* Clearing it */
> -		drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ESI, val);
> +		drm_dp_dpcd_write_byte(&intel_dp->aux, DP_PSR_ESI, val);
>  	}
>  }
> 
> @@ -3913,10 +3914,10 @@ void intel_psr_short_pulse(struct intel_dp
> *intel_dp)
>  			"PSR_ERROR_STATUS unhandled errors %x\n",
>  			error_status & ~errors);
>  	/* clear status register */
> -	drm_dp_dpcd_writeb(&intel_dp->aux,
> -			   panel_replay_enabled ?
> -			   DP_PANEL_REPLAY_ERROR_STATUS :
> DP_PSR_ERROR_STATUS,
> -			   error_status);
> +	drm_dp_dpcd_write_byte(&intel_dp->aux,
> +			       panel_replay_enabled ?
> +			       DP_PANEL_REPLAY_ERROR_STATUS :
> DP_PSR_ERROR_STATUS,
> +			       error_status);
> 
>  	if (!psr->panel_replay_enabled) {
>  		psr_alpm_check(intel_dp);
> --
> 2.47.3

✗ Xe.CI.FULL: failure for drm/i915/display: switch to modern drm_dp_dpcd* accessors

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 49977 bytes --]

== Series Details ==

Series: drm/i915/display: switch to modern drm_dp_dpcd* accessors
URL   : https://patchwork.freedesktop.org/series/174241/
State : failure

== Summary ==

CI Bug Log - changes from xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8_FULL -> xe-pw-174241v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-174241v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-174241v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-174241v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_pm_dc@dc5-dpms-suspend-resume:
    - shard-bmg:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8/shard-bmg-7/igt@kms_pm_dc@dc5-dpms-suspend-resume.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-6/igt@kms_pm_dc@dc5-dpms-suspend-resume.html

  * igt@kms_sharpness_filter@invalid-plane-with-filter@pipe-a-edp-1-invalid-plane-with-filter:
    - shard-lnl:          NOTRUN -> [DMESG-WARN][3] +1 other test dmesg-warn
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@kms_sharpness_filter@invalid-plane-with-filter@pipe-a-edp-1-invalid-plane-with-filter.html

  
Known issues
------------

  Here are the changes found in xe-pw-174241v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@intel_hwmon@hwmon-write:
    - shard-lnl:          NOTRUN -> [SKIP][4] ([Intel XE#1125] / [Intel XE#7312])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@intel_hwmon@hwmon-write.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#1466])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-lnl:          NOTRUN -> [SKIP][6] ([Intel XE#3279]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2370])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-2/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#1407]) +5 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-4/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#3658] / [Intel XE#7360]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#7059] / [Intel XE#7085])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-0:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#1124]) +12 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-1/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#607] / [Intel XE#7361])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-8/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#1124]) +1 other test skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-7/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#1467] / [Intel XE#7367])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_bw@connected-linear-tiling-2-displays-target-2160x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][15] ([Intel XE#7679]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-6/igt@kms_bw@connected-linear-tiling-2-displays-target-2160x1440p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#7679])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-1/igt@kms_bw@connected-linear-tiling-4-displays-target-2560x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-target-2560x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#367]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@kms_bw@linear-tiling-3-displays-target-2560x1440p.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][18] ([Intel XE#2887]) +17 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-7/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#3432]) +3 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-5/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2887]) +5 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-10/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs.html

  * igt@kms_chamelium_color@ctm-max:
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#306] / [Intel XE#7358]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@kms_chamelium_color@ctm-max.html

  * igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d:
    - shard-lnl:          NOTRUN -> [SKIP][22] ([Intel XE#7358]) +2 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d.html

  * igt@kms_chamelium_hpd@dp-hpd:
    - shard-lnl:          NOTRUN -> [SKIP][23] ([Intel XE#373]) +9 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-5/igt@kms_chamelium_hpd@dp-hpd.html

  * igt@kms_chamelium_hpd@dp-hpd-storm:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2252]) +2 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-8/igt@kms_chamelium_hpd@dp-hpd-storm.html

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-3:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#6969]) +7 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-8/igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-3.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-lnl:          NOTRUN -> [SKIP][26] ([Intel XE#307] / [Intel XE#6974])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@lic-type-1:
    - shard-lnl:          NOTRUN -> [SKIP][27] ([Intel XE#7642]) +5 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-7/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@suspend-resume@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][28] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-10/igt@kms_content_protection@suspend-resume@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#2321] / [Intel XE#7355]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-1/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#2321] / [Intel XE#7355])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-64x21:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#1424]) +4 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@kms_cursor_crc@cursor-rapid-movement-64x21.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
    - shard-lnl:          NOTRUN -> [SKIP][32] ([Intel XE#309] / [Intel XE#7343]) +4 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-4/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#323] / [Intel XE#6035])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#4354] / [Intel XE#5882])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#8265])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-4/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-lnl:          NOTRUN -> [SKIP][36] ([Intel XE#8265]) +4 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-5/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#1137] / [Intel XE#2375])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#1421]) +11 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-1/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          NOTRUN -> [FAIL][39] ([Intel XE#301]) +1 other test fail
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp2:
    - shard-bmg:          [PASS][40] -> [FAIL][41] ([Intel XE#3321]) +1 other test fail
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8/shard-bmg-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp2.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-10/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp2.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][42] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385] / [Intel XE#9144]) +3 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-linear-to-32bpp-linear-reflect-x:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#7179])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-32bpp-linear-reflect-x.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][44] ([Intel XE#1397] / [Intel XE#7385] / [Intel XE#9144]) +3 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-10/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2311]) +9 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][48] ([Intel XE#7061] / [Intel XE#7356]) +2 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#6312] / [Intel XE#651]) +20 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-1/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-shrfb-pgflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][51] ([Intel XE#6312]) +16 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][52] ([Intel XE#7905]) +63 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][53] ([Intel XE#7865]) +34 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-7/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#7061]) +6 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][55] ([Intel XE#656] / [Intel XE#7905]) +47 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#2313]) +13 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-7/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_hdmi_inject@inject-4k:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#1470])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-5/igt@kms_hdmi_inject@inject-4k.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-lnl:          NOTRUN -> [SKIP][58] ([Intel XE#1503])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#4298] / [Intel XE#5873])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][60] ([Intel XE#7173] / [Intel XE#7294])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-6/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#7591])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-3/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#7283]) +1 other test skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-3/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier:
    - shard-lnl:          NOTRUN -> [SKIP][63] ([Intel XE#7283]) +5 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier.html

  * igt@kms_plane_lowres@tiling-yf:
    - shard-lnl:          NOTRUN -> [SKIP][64] ([Intel XE#599])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-7/igt@kms_plane_lowres@tiling-yf.html

  * igt@kms_plane_multiple@2x-tiling-none:
    - shard-lnl:          NOTRUN -> [SKIP][65] ([Intel XE#4596] / [Intel XE#5854]) +2 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@kms_plane_multiple@2x-tiling-none.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-c:
    - shard-lnl:          NOTRUN -> [SKIP][66] ([Intel XE#2763] / [Intel XE#6886]) +13 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-c.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-10/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html

  * igt@kms_pm_dc@dc3co-vpb-framegap:
    - shard-lnl:          NOTRUN -> [SKIP][68] ([Intel XE#8395] / [Intel XE#8396]) +3 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@kms_pm_dc@dc3co-vpb-framegap.html

  * igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888:
    - shard-lnl:          NOTRUN -> [SKIP][69] ([Intel XE#8396]) +3 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-lnl:          NOTRUN -> [FAIL][70] ([Intel XE#8399])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#1439] / [Intel XE#7402] / [Intel XE#836])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-7/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-lnl:          NOTRUN -> [SKIP][72] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304]) +3 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][73] ([Intel XE#4608] / [Intel XE#7304]) +3 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][74] ([Intel XE#4608]) +3 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-6/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-lnl:          NOTRUN -> [SKIP][75] ([Intel XE#2893] / [Intel XE#7304]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#1489]) +2 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-7/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-lnl:          NOTRUN -> [SKIP][77] ([Intel XE#1128] / [Intel XE#7413])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-6/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@fbc-psr2-cursor-plane-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][78] ([Intel XE#1406] / [Intel XE#7345])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-4/igt@kms_psr@fbc-psr2-cursor-plane-onoff.html

  * igt@kms_psr@fbc-psr2-cursor-plane-onoff@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][79] ([Intel XE#1406] / [Intel XE#4609] / [Intel XE#7345])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-4/igt@kms_psr@fbc-psr2-cursor-plane-onoff@edp-1.html

  * igt@kms_psr@pr-no-drrs:
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#1406]) +7 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-5/igt@kms_psr@pr-no-drrs.html

  * igt@kms_psr@psr2-sprite-plane-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-4/igt@kms_psr@psr2-sprite-plane-onoff.html

  * igt@kms_rotation_crc@bad-pixel-format:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#3904] / [Intel XE#7342])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-2/igt@kms_rotation_crc@bad-pixel-format.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
    - shard-lnl:          NOTRUN -> [SKIP][83] ([Intel XE#1127] / [Intel XE#5813])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-lnl:          NOTRUN -> [SKIP][84] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-bmg:          NOTRUN -> [SKIP][85] ([Intel XE#2413])
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-3/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all:
    - shard-lnl:          NOTRUN -> [SKIP][86] ([Intel XE#8866])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all.html

  * igt@xe_cw_post_sync@walker-post-sync:
    - shard-bmg:          NOTRUN -> [SKIP][87] ([Intel XE#8608])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-10/igt@xe_cw_post_sync@walker-post-sync.html

  * igt@xe_evict@evict-beng-mixed-threads-large-multi-vm:
    - shard-lnl:          NOTRUN -> [SKIP][88] ([Intel XE#6540] / [Intel XE#688]) +12 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-1/igt@xe_evict@evict-beng-mixed-threads-large-multi-vm.html

  * igt@xe_evict@evict-small-multi-queue-priority:
    - shard-bmg:          NOTRUN -> [SKIP][89] ([Intel XE#8370])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-7/igt@xe_evict@evict-small-multi-queue-priority.html

  * igt@xe_exec_balancer@once-parallel-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][90] ([Intel XE#7482]) +24 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-6/igt@xe_exec_balancer@once-parallel-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][91] ([Intel XE#1392]) +9 other tests skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-4/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue:
    - shard-bmg:          NOTRUN -> [SKIP][92] ([Intel XE#2322] / [Intel XE#7372]) +2 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-8/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue.html

  * igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#8374]) +1 other test skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-7/igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch.html

  * igt@xe_exec_fault_mode@once-multi-queue-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][94] ([Intel XE#8374]) +11 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-1/igt@xe_exec_fault_mode@once-multi-queue-userptr-rebind.html

  * igt@xe_exec_mix_modes@exec-multi-queue-spinner-interrupted-lr:
    - shard-lnl:          NOTRUN -> [SKIP][95] ([Intel XE#9003])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-5/igt@xe_exec_mix_modes@exec-multi-queue-spinner-interrupted-lr.html

  * igt@xe_exec_multi_queue@few-execs-preempt-mode-close-fd-smem:
    - shard-bmg:          NOTRUN -> [SKIP][96] ([Intel XE#8364]) +6 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-7/igt@xe_exec_multi_queue@few-execs-preempt-mode-close-fd-smem.html

  * igt@xe_exec_multi_queue@many-queues-preempt-mode-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][97] ([Intel XE#8364]) +34 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@xe_exec_multi_queue@many-queues-preempt-mode-userptr.html

  * igt@xe_exec_reset@cm-multi-queue-close-execqueues:
    - shard-lnl:          NOTRUN -> [SKIP][98] ([Intel XE#8369]) +2 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-6/igt@xe_exec_reset@cm-multi-queue-close-execqueues.html

  * igt@xe_exec_reset@cm-multi-queue-close-fd:
    - shard-bmg:          NOTRUN -> [SKIP][99] ([Intel XE#8369])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-3/igt@xe_exec_reset@cm-multi-queue-close-fd.html

  * igt@xe_exec_reset@gt-reset-fault-injection:
    - shard-lnl:          NOTRUN -> [ABORT][100] ([Intel XE#9140] / [Intel XE#9145])
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-5/igt@xe_exec_reset@gt-reset-fault-injection.html

  * igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][101] ([Intel XE#8378]) +1 other test skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-4/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-rebind.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][102] ([Intel XE#8378]) +12 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-rebind.html

  * igt@xe_gpgpu_fill@offset-4x4:
    - shard-lnl:          NOTRUN -> [SKIP][103] ([Intel XE#7954])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-4/igt@xe_gpgpu_fill@offset-4x4.html

  * igt@xe_mmap@pci-membarrier:
    - shard-lnl:          NOTRUN -> [SKIP][104] ([Intel XE#5100] / [Intel XE#7322] / [Intel XE#7408])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-1/igt@xe_mmap@pci-membarrier.html

  * igt@xe_multigpu_svm@mgpu-coherency-fail-basic:
    - shard-lnl:          NOTRUN -> [SKIP][105] ([Intel XE#6964]) +4 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-7/igt@xe_multigpu_svm@mgpu-coherency-fail-basic.html

  * igt@xe_multigpu_svm@mgpu-xgpu-access-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][106] ([Intel XE#6964])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-10/igt@xe_multigpu_svm@mgpu-xgpu-access-prefetch.html

  * igt@xe_page_reclaim@basic-mixed:
    - shard-bmg:          NOTRUN -> [SKIP][107] ([Intel XE#7793])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-7/igt@xe_page_reclaim@basic-mixed.html

  * igt@xe_page_reclaim@binds-null-vma:
    - shard-lnl:          NOTRUN -> [SKIP][108] ([Intel XE#7793]) +2 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-7/igt@xe_page_reclaim@binds-null-vma.html

  * igt@xe_pat@l2-flush-opt-svm-pat-restrict:
    - shard-lnl:          NOTRUN -> [SKIP][109] ([Intel XE#7590] / [Intel XE#7772])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-5/igt@xe_pat@l2-flush-opt-svm-pat-restrict.html

  * igt@xe_pat@pat-index-xelp:
    - shard-bmg:          NOTRUN -> [SKIP][110] ([Intel XE#2245] / [Intel XE#7590])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-8/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pm@d3cold-basic:
    - shard-lnl:          NOTRUN -> [SKIP][111] ([Intel XE#2284] / [Intel XE#366] / [Intel XE#7370]) +1 other test skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-1/igt@xe_pm@d3cold-basic.html

  * igt@xe_pm@s3-exec-after:
    - shard-lnl:          NOTRUN -> [SKIP][112] ([Intel XE#584] / [Intel XE#7369])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-4/igt@xe_pm@s3-exec-after.html

  * igt@xe_prefetch_fault@prefetch-fault:
    - shard-lnl:          NOTRUN -> [SKIP][113] ([Intel XE#7599])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-1/igt@xe_prefetch_fault@prefetch-fault.html

  * igt@xe_prefetch_fault@prefetch-fault-svm:
    - shard-bmg:          NOTRUN -> [SKIP][114] ([Intel XE#7599])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-5/igt@xe_prefetch_fault@prefetch-fault-svm.html

  * igt@xe_query@multigpu-query-pxp-status:
    - shard-lnl:          NOTRUN -> [SKIP][115] ([Intel XE#944]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@xe_query@multigpu-query-pxp-status.html

  * igt@xe_sriov_admin@bulk-sched-priority-vfs-disabled:
    - shard-lnl:          NOTRUN -> [SKIP][116] ([Intel XE#7174]) +2 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-1/igt@xe_sriov_admin@bulk-sched-priority-vfs-disabled.html

  * igt@xe_sriov_auto_provisioning@fair-allocation:
    - shard-lnl:          NOTRUN -> [SKIP][117] ([Intel XE#4130] / [Intel XE#7366])
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@xe_sriov_auto_provisioning@fair-allocation.html

  * igt@xe_sriov_flr@flr-twice:
    - shard-lnl:          NOTRUN -> [SKIP][118] ([Intel XE#4273])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@xe_sriov_flr@flr-twice.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - shard-bmg:          [PASS][119] -> [FAIL][120] ([Intel XE#6569])
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8/shard-bmg-4/igt@xe_sriov_flr@flr-vf1-clear.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-10/igt@xe_sriov_flr@flr-vf1-clear.html

  * igt@xe_sriov_scheduling@nonpreempt-engine-resets-low-priority:
    - shard-lnl:          NOTRUN -> [SKIP][121] ([Intel XE#8339])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-7/igt@xe_sriov_scheduling@nonpreempt-engine-resets-low-priority.html

  * igt@xe_survivability@runtime-survivability:
    - shard-lnl:          NOTRUN -> [SKIP][122] ([Intel XE#8415])
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-2/igt@xe_survivability@runtime-survivability.html

  * igt@xe_vm@overcommit-fault-vram-lr-no-overcommit:
    - shard-lnl:          NOTRUN -> [SKIP][123] ([Intel XE#7892])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-1/igt@xe_vm@overcommit-fault-vram-lr-no-overcommit.html

  * igt@xe_wedged@basic-wedged:
    - shard-lnl:          NOTRUN -> [DMESG-WARN][124] ([Intel XE#8963])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-4/igt@xe_wedged@basic-wedged.html

  
#### Possible fixes ####

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [FAIL][125] ([Intel XE#301]) -> [PASS][126] +1 other test pass
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][127] ([Intel XE#1503]) -> [PASS][128]
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8/shard-bmg-10/igt@kms_hdr@invalid-hdr.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-7/igt@kms_hdr@invalid-hdr.html

  * igt@kms_pm_dc@dc5-psr-suspend-resume:
    - shard-lnl:          [FAIL][129] ([Intel XE#8399]) -> [PASS][130]
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8/shard-lnl-4/igt@kms_pm_dc@dc5-psr-suspend-resume.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-4/igt@kms_pm_dc@dc5-psr-suspend-resume.html

  * igt@kms_pm_dc@deep-pkgc:
    - shard-lnl:          [FAIL][131] ([Intel XE#2029] / [Intel XE#7395]) -> [PASS][132]
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8/shard-lnl-1/igt@kms_pm_dc@deep-pkgc.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-lnl-3/igt@kms_pm_dc@deep-pkgc.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][133] ([Intel XE#6321] / [Intel XE#8355]) -> [PASS][134]
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-7/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_threads@threads-hang-fd-userptr-invalidate-race:
    - shard-bmg:          [FAIL][135] ([Intel XE#9096]) -> [PASS][136]
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8/shard-bmg-6/igt@xe_exec_threads@threads-hang-fd-userptr-invalidate-race.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-2/igt@xe_exec_threads@threads-hang-fd-userptr-invalidate-race.html

  * igt@xe_pm@s3-basic-exec:
    - shard-bmg:          [INCOMPLETE][137] ([Intel XE#8175]) -> [PASS][138]
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8/shard-bmg-6/igt@xe_pm@s3-basic-exec.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-4/igt@xe_pm@s3-basic-exec.html

  * igt@xe_sriov_flr@flr-vfs-parallel:
    - shard-bmg:          [FAIL][139] ([Intel XE#6569]) -> [PASS][140]
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8/shard-bmg-4/igt@xe_sriov_flr@flr-vfs-parallel.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-3/igt@xe_sriov_flr@flr-vfs-parallel.html

  
#### Warnings ####

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [SKIP][141] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][142] ([Intel XE#1729] / [Intel XE#7424])
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
  [Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1466
  [Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467
  [Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
  [Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#3279]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3279
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4273]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4273
  [Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
  [Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873
  [Intel XE#5882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5882
  [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7173
  [Intel XE#7174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7174
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7294
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7312
  [Intel XE#7322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7322
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7360
  [Intel XE#7361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7361
  [Intel XE#7366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7366
  [Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
  [Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7385
  [Intel XE#7395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7395
  [Intel XE#7402]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7402
  [Intel XE#7408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7408
  [Intel XE#7413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7413
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7591
  [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7772]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7772
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7892]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7892
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7954]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7954
  [Intel XE#8175]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8175
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8339
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8399
  [Intel XE#8415]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8415
  [Intel XE#8608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8608
  [Intel XE#8866]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8866
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#9003]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9003
  [Intel XE#9096]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9096
  [Intel XE#9140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9140
  [Intel XE#9144]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9144
  [Intel XE#9145]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9145
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * IGT: IGT_9098 -> IGT_9099
  * Linux: xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8 -> xe-pw-174241v1

  IGT_9098: 9098
  IGT_9099: 9099
  xe-5755-0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8: 0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8
  xe-pw-174241v1: 174241v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v1/index.html

[-- Attachment #2: Type: text/html, Size: 56197 bytes --]

RE: [PATCH 02/11] drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte, write_byte, write_data}

[Jani Nikula]

On Wed, 16 Sep 2026, "Kandpal, Suraj" <suraj.kandpal@intel.com> wrote:
>> Subject: [PATCH 02/11] drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte,
>> write_byte, write_data}
>> 
>> Switch to the modern DPCD access functions that return negative error codes
>> on errors, -EIO for incomplete access, and 0 on success.
>> 
>> Use 1-byte accessors where sensible. Use local ret variables for the return value
>> instead of checking inline.
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_lspcon.c | 34 +++++++++------------
>>  1 file changed, 15 insertions(+), 19 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
>> b/drivers/gpu/drm/i915/display/intel_lspcon.c
>> index b306bf5f6130..07b5a9d010ff 100644
>> --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
>> +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
>> @@ -137,9 +137,7 @@ bool intel_lspcon_detect_hdr_capability(struct
>> intel_digital_port *dig_port)
>>  	u8 hdr_caps;
>>  	int ret;
>> 
>> -	ret = drm_dp_dpcd_read(&intel_dp->aux, get_hdr_status_reg(lspcon),
>> -			       &hdr_caps, 1);
>> -
>> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
>> +get_hdr_status_reg(lspcon), &hdr_caps);
>>  	if (ret < 0) {
>>  		drm_dbg_kms(display->drm, "HDR capability detection
>> failed\n");
>>  		lspcon->hdr_supported = false;
>> @@ -244,10 +242,11 @@ static bool lspcon_wake_native_aux_ch(struct
>> intel_lspcon *lspcon)  {
>>  	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
>>  	struct intel_display *display = to_intel_display(intel_dp);
>> +	int ret;
>>  	u8 rev;
>> 
>> -	if (drm_dp_dpcd_readb(&lspcon_to_intel_dp(lspcon)->aux,
>> DP_DPCD_REV,
>> -			      &rev) != 1) {
>> +	ret = drm_dp_dpcd_read_byte(&lspcon_to_intel_dp(lspcon)->aux,
>> DP_DPCD_REV, &rev);
>> +	if (ret < 0) {
>>  		drm_dbg_kms(display->drm, "Native AUX CH down\n");
>
> I was wondering now that we have ret should we add it in the debug message using ERR_PTR()
> Same for all the changes done below ?

Feels like the changes are pretty heavy already, maybe that should be
another series on top.

BR,
Jani.

>
> Regards,
> Suraj Kandpal
>
>>  		return false;
>>  	}
>> @@ -331,15 +330,14 @@ static bool lspcon_parade_fw_ready(struct
>> drm_dp_aux *aux)  {
>>  	u8 avi_if_ctrl;
>>  	u8 retry;
>> -	ssize_t ret;
>> +	int ret;
>> 
>>  	/* Check if LSPCON FW is ready for data */
>>  	for (retry = 0; retry < 5; retry++) {
>>  		if (retry)
>>  			usleep_range(200, 300);
>> 
>> -		ret = drm_dp_dpcd_read(aux, LSPCON_PARADE_AVI_IF_CTRL,
>> -				       &avi_if_ctrl, 1);
>> +		ret = drm_dp_dpcd_read_byte(aux,
>> LSPCON_PARADE_AVI_IF_CTRL,
>> +&avi_if_ctrl);
>>  		if (ret < 0) {
>>  			drm_err(aux->drm_dev, "Failed to read AVI IF
>> control\n");
>>  			return false;
>> @@ -371,7 +369,7 @@ static bool
>> _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
>> 
>>  		reg = LSPCON_PARADE_AVI_IF_WRITE_OFFSET;
>>  		data = avi_buf + block_count * 8;
>> -		ret = drm_dp_dpcd_write(aux, reg, data, 8);
>> +		ret = drm_dp_dpcd_write_data(aux, reg, data, 8);
>>  		if (ret < 0) {
>>  			drm_err(aux->drm_dev, "Failed to write AVI IF block
>> %d\n",
>>  				block_count);
>> @@ -386,7 +384,7 @@ static bool
>> _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
>>  		 */
>>  		reg = LSPCON_PARADE_AVI_IF_CTRL;
>>  		avi_if_ctrl = LSPCON_PARADE_AVI_IF_KICKOFF | block_count;
>> -		ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1);
>> +		ret = drm_dp_dpcd_write_byte(aux, reg, avi_if_ctrl);
>>  		if (ret < 0) {
>>  			drm_err(aux->drm_dev, "Failed to update (0x%x),
>> block %d\n",
>>  				reg, block_count);
>> @@ -445,8 +443,8 @@ static bool _lspcon_write_avi_infoframe_mca(struct
>> drm_dp_aux *aux,
>>  	while (written < len) {
>>  		/* DPCD write for AVI IF can fail on a slow FW day, so retry */
>>  		for (retry = 0; retry < 5; retry++) {
>> -			ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1);
>> -			if (ret == 1) {
>> +			ret = drm_dp_dpcd_write_byte(aux, reg, *data);
>> +			if (!ret) {
>>  				break;
>>  			} else if (retry < 4) {
>>  				mdelay(50);
>> @@ -461,9 +459,8 @@ static bool _lspcon_write_avi_infoframe_mca(struct
>> drm_dp_aux *aux,
>>  		data++;
>>  	}
>> 
>> -	val = 0;
>>  	reg = LSPCON_MCA_AVI_IF_CTRL;
>> -	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
>> +	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
>>  	if (ret < 0) {
>>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
>> reg);
>>  		return false;
>> @@ -473,14 +470,13 @@ static bool _lspcon_write_avi_infoframe_mca(struct
>> drm_dp_aux *aux,
>>  	val &= ~LSPCON_MCA_AVI_IF_HANDLED;
>>  	val |= LSPCON_MCA_AVI_IF_KICKOFF;
>> 
>> -	ret = drm_dp_dpcd_write(aux, reg, &val, 1);
>> +	ret = drm_dp_dpcd_write_byte(aux, reg, val);
>>  	if (ret < 0) {
>>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
>> reg);
>>  		return false;
>>  	}
>> 
>> -	val = 0;
>> -	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
>> +	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
>>  	if (ret < 0) {
>>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
>> reg);
>>  		return false;
>> @@ -617,7 +613,7 @@ static bool
>> _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
>>  	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
>>  	u8 val;
>> 
>> -	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
>> +	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
>>  	if (ret < 0) {
>>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
>> reg);
>>  		return false;
>> @@ -632,7 +628,7 @@ static bool
>> _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
>>  	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
>>  	u8 val;
>> 
>> -	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
>> +	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
>>  	if (ret < 0) {
>>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
>> reg);
>>  		return false;
>> --
>> 2.47.3
>

-- 
Jani Nikula, Intel

RE: [PATCH 02/11] drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte, write_byte, write_data}

[Kandpal, Suraj]

> >>  		lspcon->hdr_supported = false;
> >> @@ -244,10 +242,11 @@ static bool lspcon_wake_native_aux_ch(struct
> >> intel_lspcon *lspcon)  {
> >>  	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
> >>  	struct intel_display *display = to_intel_display(intel_dp);
> >> +	int ret;
> >>  	u8 rev;
> >>
> >> -	if (drm_dp_dpcd_readb(&lspcon_to_intel_dp(lspcon)->aux,
> >> DP_DPCD_REV,
> >> -			      &rev) != 1) {
> >> +	ret = drm_dp_dpcd_read_byte(&lspcon_to_intel_dp(lspcon)->aux,
> >> DP_DPCD_REV, &rev);
> >> +	if (ret < 0) {
> >>  		drm_dbg_kms(display->drm, "Native AUX CH down\n");
> >
> > I was wondering now that we have ret should we add it in the debug
> > message using ERR_PTR() Same for all the changes done below ?
> 
> Feels like the changes are pretty heavy already, maybe that should be another
> series on top.

True ill try to send a patch series on top of this cover these debug message prints once this is merged then

With that this
LGTM
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> 
> BR,
> Jani.
> 
> >
> > Regards,
> > Suraj Kandpal
> >
> >>  		return false;
> >>  	}
> >> @@ -331,15 +330,14 @@ static bool lspcon_parade_fw_ready(struct
> >> drm_dp_aux *aux)  {
> >>  	u8 avi_if_ctrl;
> >>  	u8 retry;
> >> -	ssize_t ret;
> >> +	int ret;
> >>
> >>  	/* Check if LSPCON FW is ready for data */
> >>  	for (retry = 0; retry < 5; retry++) {
> >>  		if (retry)
> >>  			usleep_range(200, 300);
> >>
> >> -		ret = drm_dp_dpcd_read(aux, LSPCON_PARADE_AVI_IF_CTRL,
> >> -				       &avi_if_ctrl, 1);
> >> +		ret = drm_dp_dpcd_read_byte(aux,
> >> LSPCON_PARADE_AVI_IF_CTRL,
> >> +&avi_if_ctrl);
> >>  		if (ret < 0) {
> >>  			drm_err(aux->drm_dev, "Failed to read AVI IF
> control\n");
> >>  			return false;
> >> @@ -371,7 +369,7 @@ static bool
> >> _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
> >>
> >>  		reg = LSPCON_PARADE_AVI_IF_WRITE_OFFSET;
> >>  		data = avi_buf + block_count * 8;
> >> -		ret = drm_dp_dpcd_write(aux, reg, data, 8);
> >> +		ret = drm_dp_dpcd_write_data(aux, reg, data, 8);
> >>  		if (ret < 0) {
> >>  			drm_err(aux->drm_dev, "Failed to write AVI IF block
> %d\n",
> >>  				block_count);
> >> @@ -386,7 +384,7 @@ static bool
> >> _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
> >>  		 */
> >>  		reg = LSPCON_PARADE_AVI_IF_CTRL;
> >>  		avi_if_ctrl = LSPCON_PARADE_AVI_IF_KICKOFF | block_count;
> >> -		ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1);
> >> +		ret = drm_dp_dpcd_write_byte(aux, reg, avi_if_ctrl);
> >>  		if (ret < 0) {
> >>  			drm_err(aux->drm_dev, "Failed to update (0x%x),
> block %d\n",
> >>  				reg, block_count);
> >> @@ -445,8 +443,8 @@ static bool
> >> _lspcon_write_avi_infoframe_mca(struct
> >> drm_dp_aux *aux,
> >>  	while (written < len) {
> >>  		/* DPCD write for AVI IF can fail on a slow FW day, so retry */
> >>  		for (retry = 0; retry < 5; retry++) {
> >> -			ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1);
> >> -			if (ret == 1) {
> >> +			ret = drm_dp_dpcd_write_byte(aux, reg, *data);
> >> +			if (!ret) {
> >>  				break;
> >>  			} else if (retry < 4) {
> >>  				mdelay(50);
> >> @@ -461,9 +459,8 @@ static bool
> >> _lspcon_write_avi_infoframe_mca(struct
> >> drm_dp_aux *aux,
> >>  		data++;
> >>  	}
> >>
> >> -	val = 0;
> >>  	reg = LSPCON_MCA_AVI_IF_CTRL;
> >> -	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> >> +	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
> >>  	if (ret < 0) {
> >>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
> reg);
> >>  		return false;
> >> @@ -473,14 +470,13 @@ static bool
> >> _lspcon_write_avi_infoframe_mca(struct
> >> drm_dp_aux *aux,
> >>  	val &= ~LSPCON_MCA_AVI_IF_HANDLED;
> >>  	val |= LSPCON_MCA_AVI_IF_KICKOFF;
> >>
> >> -	ret = drm_dp_dpcd_write(aux, reg, &val, 1);
> >> +	ret = drm_dp_dpcd_write_byte(aux, reg, val);
> >>  	if (ret < 0) {
> >>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
> reg);
> >>  		return false;
> >>  	}
> >>
> >> -	val = 0;
> >> -	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> >> +	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
> >>  	if (ret < 0) {
> >>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
> reg);
> >>  		return false;
> >> @@ -617,7 +613,7 @@ static bool
> >> _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
> >>  	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> >>  	u8 val;
> >>
> >> -	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> >> +	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
> >>  	if (ret < 0) {
> >>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
> reg);
> >>  		return false;
> >> @@ -632,7 +628,7 @@ static bool
> >> _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
> >>  	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> >>  	u8 val;
> >>
> >> -	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> >> +	ret = drm_dp_dpcd_read_byte(aux, reg, &val);
> >>  	if (ret < 0) {
> >>  		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n",
> reg);
> >>  		return false;
> >> --
> >> 2.47.3
> >
> 
> --
> Jani Nikula, Intel

RE: [PATCH 03/11] drm/i915/alpm: switch to drm_dp_dpcd_{read_byte, write_byte}

[Kandpal, Suraj]

> Subject: RE: [PATCH 03/11] drm/i915/alpm: switch to drm_dp_dpcd_{read_byte,
> write_byte}
> 
> > Subject: [PATCH 03/11] drm/i915/alpm: switch to
> > drm_dp_dpcd_{read_byte, write_byte}
> >
> > Switch to the modern DPCD access functions that return negative error
> > codes on errors, -EIO for incomplete access, and 0 on success.
> >
> > Rename an int r to ret while at it for clarity.
> >
> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_alpm.c | 10 +++++-----
> >  1 file changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > index 10943539bc7c..9ef9d0e45258 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > @@ -628,7 +628,7 @@ void intel_alpm_enable_sink(struct intel_dp
> > *intel_dp,
> >
> > intel_alpm_aux_less_wake_supported(intel_dp)))
> >  		val |= DP_ALPM_MODE_AUX_LESS;
> >
> > -	drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
> > val);
> > +	drm_dp_dpcd_write_byte(&intel_dp->aux,
> > DP_RECEIVER_ALPM_CONFIG, val);
> >  }
> >
> >  void intel_alpm_lobf_enable(const struct intel_crtc_state
> > *new_crtc_state) @@ -751,11 +751,11 @@ bool
> > intel_alpm_get_error(struct intel_dp *intel_dp) {
> >  	struct intel_display *display = to_intel_display(intel_dp);
> >  	struct drm_dp_aux *aux = &intel_dp->aux;
> > +	int ret;
> >  	u8 val;
> > -	int r;
> >
> > -	r = drm_dp_dpcd_readb(aux, DP_RECEIVER_ALPM_STATUS, &val);
> > -	if (r != 1) {
> > +	ret = drm_dp_dpcd_read_byte(aux, DP_RECEIVER_ALPM_STATUS,
> > &val);
> > +	if (ret < 0) {
> >  		drm_err(display->drm, "Error reading ALPM status\n");
> 
> Should we maybe use ERR_PTR to document error when reading DPCD
> 
> Regards,
> Suraj Kandpal

Based on the reply sent on patch 2

LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> 
> >  		return true;
> >  	}
> > @@ -764,7 +764,7 @@ bool intel_alpm_get_error(struct intel_dp *intel_dp)
> >  		drm_dbg_kms(display->drm, "ALPM lock timeout error\n");
> >
> >  		/* Clearing error */
> > -		drm_dp_dpcd_writeb(aux, DP_RECEIVER_ALPM_STATUS, val);
> > +		drm_dp_dpcd_write_byte(aux, DP_RECEIVER_ALPM_STATUS,
> > val);
> >  		return true;
> >  	}
> >
> > --
> > 2.47.3

RE: [PATCH 04/11] drm/i915/ddi: switch to drm_dp_dpcd_write_byte()

[Kandpal, Suraj]

> Subject: [PATCH 04/11] drm/i915/ddi: switch to drm_dp_dpcd_write_byte()
> 
> Switch to the modern DPCD access functions that return negative error codes
> on errors, -EIO for incomplete access, and 0 on success.
> 
> Use local ret variables for the return value instead of checking inline where
> sensible. This improves clarity.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 16 ++++++++++------
>  1 file changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 9b3b526e5e55..fbf485a54dda 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2331,12 +2331,14 @@ static void
> intel_dp_sink_set_msa_timing_par_ignore_state(struct intel_dp *intel
>  							  bool enable)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> +	int ret;
> 
>  	if (!crtc_state->vrr.enable)
>  		return;
> 
> -	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_DOWNSPREAD_CTRL,
> -			       enable ? DP_MSA_TIMING_PAR_IGNORE_EN : 0)
> <= 0)
> +	ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_DOWNSPREAD_CTRL,
> +				     enable ?
> DP_MSA_TIMING_PAR_IGNORE_EN : 0);
> +	if (ret < 0)
>  		drm_dbg_kms(display->drm,
>  			    "Failed to %s MSA_TIMING_PAR_IGNORE in the
> sink\n",
>  			    str_enable_disable(enable));
> @@ -2347,18 +2349,20 @@ static void intel_dp_sink_set_fec_ready(struct
> intel_dp *intel_dp,
>  					bool enable)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> +	int ret;
> 
>  	if (!crtc_state->fec_enable)
>  		return;
> 
> -	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION,
> -			       enable ? DP_FEC_READY : 0) <= 0)
> +	ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_FEC_CONFIGURATION,
> +				     enable ? DP_FEC_READY : 0);
> +	if (ret < 0)
>  		drm_dbg_kms(display->drm, "Failed to set FEC_READY to %s in
> the sink\n",
>  			    str_enabled_disabled(enable));
> 
>  	if (enable &&
> -	    drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_STATUS,
> -			       DP_FEC_DECODE_EN_DETECTED |
> DP_FEC_DECODE_DIS_DETECTED) <= 0)
> +	    drm_dp_dpcd_write_byte(&intel_dp->aux, DP_FEC_STATUS,
> +				   DP_FEC_DECODE_EN_DETECTED |
> DP_FEC_DECODE_DIS_DETECTED) < 0)
>  		drm_dbg_kms(display->drm, "Failed to clear FEC detected
> flags\n");  }
> 
> --
> 2.47.3

RE: [PATCH 05/11] drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()

[Kandpal, Suraj]

> Subject: [PATCH 05/11] drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte,
> read_data, write_byte, write_data}()

The prefix here should probably be  drm/i915/backlight

> 
> Switch to the modern DPCD access functions that return negative error codes
> on errors, -EIO for incomplete access, and 0 on success.
> 
> Use local ret variables for the return value instead of checking inline. Use %pe
> and ERR_PTR() for logging the errors.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

With above fixed
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> ---
>  .../drm/i915/display/intel_dp_aux_backlight.c | 51 ++++++++++---------
>  1 file changed, 27 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> index 266e042e0023..f30da5f7e3d2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> @@ -120,8 +120,8 @@ intel_dp_aux_supports_hdr_backlight(struct
> intel_connector *connector)
> 
>  	intel_dp_wait_source_oui(intel_dp);
> 
> -	ret = drm_dp_dpcd_read(aux, INTEL_EDP_HDR_TCON_CAP0, tcon_cap,
> sizeof(tcon_cap));
> -	if (ret != sizeof(tcon_cap))
> +	ret = drm_dp_dpcd_read_data(aux, INTEL_EDP_HDR_TCON_CAP0,
> tcon_cap, sizeof(tcon_cap));
> +	if (ret < 0)
>  		return false;
> 
>  	drm_dbg_kms(display->drm,
> @@ -178,8 +178,10 @@ intel_dp_aux_hdr_get_backlight(struct
> intel_connector *connector, enum pipe pipe
>  	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
>  	u8 tmp;
>  	u8 buf[2] = {};
> +	int ret;
> 
> -	if (drm_dp_dpcd_readb(&intel_dp->aux,
> INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &tmp) != 1) {
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
> INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &tmp);
> +	if (ret < 0) {
>  		drm_err(display->drm,
>  			"[CONNECTOR:%d:%s] Failed to read current backlight
> mode from DPCD\n",
>  			connector->base.base.id, connector->base.name); @@
> -197,8 +199,9 @@ intel_dp_aux_hdr_get_backlight(struct intel_connector
> *connector, enum pipe pipe
>  		return panel->backlight.max;
>  	}
> 
> -	if (drm_dp_dpcd_read(&intel_dp->aux,
> INTEL_EDP_BRIGHTNESS_NITS_LSB, buf,
> -			     sizeof(buf)) != sizeof(buf)) {
> +	ret = drm_dp_dpcd_read_data(&intel_dp->aux,
> INTEL_EDP_BRIGHTNESS_NITS_LSB, buf,
> +				    sizeof(buf));
> +	if (ret < 0) {
>  		drm_err(display->drm,
>  			"[CONNECTOR:%d:%s] Failed to read brightness from
> DPCD\n",
>  			connector->base.base.id, connector->base.name); @@
> -215,12 +218,14 @@ intel_dp_aux_hdr_set_aux_backlight(const struct
> drm_connector_state *conn_state,
>  	struct drm_device *dev = connector->base.dev;
>  	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
>  	u8 buf[4] = {};
> +	int ret;
> 
>  	buf[0] = level & 0xFF;
>  	buf[1] = (level & 0xFF00) >> 8;
> 
> -	if (drm_dp_dpcd_write(&intel_dp->aux,
> INTEL_EDP_BRIGHTNESS_NITS_LSB, buf,
> -			      sizeof(buf)) != sizeof(buf))
> +	ret = drm_dp_dpcd_write_data(&intel_dp->aux,
> INTEL_EDP_BRIGHTNESS_NITS_LSB, buf,
> +				     sizeof(buf));
> +	if (ret < 0)
>  		drm_err(dev, "[CONNECTOR:%d:%s] Failed to write brightness
> level to DPCD\n",
>  			connector->base.base.id, connector->base.name);  }
> @@ -258,13 +263,12 @@ intel_dp_aux_write_content_luminance(struct
> intel_connector *connector,
>  	buf[2] = hdr_metadata->hdmi_metadata_type1.max_fall & 0xFF;
>  	buf[3] = (hdr_metadata->hdmi_metadata_type1.max_fall & 0xFF00) >>
> 8;
> 
> -	ret = drm_dp_dpcd_write(&intel_dp->aux,
> -				INTEL_EDP_HDR_CONTENT_LUMINANCE,
> -				buf, sizeof(buf));
> +	ret = drm_dp_dpcd_write_data(&intel_dp->aux,
> +				     INTEL_EDP_HDR_CONTENT_LUMINANCE,
> +				     buf, sizeof(buf));
>  	if (ret < 0)
>  		drm_dbg_kms(display->drm,
> -			    "Content Luminance DPCD reg write failed, err:-
> %d\n",
> -			    ret);
> +			    "Content Luminance DPCD reg write failed (%pe)\n",
> +ERR_PTR(ret));
>  }
> 
>  static void
> @@ -313,11 +317,11 @@ intel_dp_aux_hdr_enable_backlight(const struct
> intel_crtc_state *crtc_state,
> 
>  	intel_dp_wait_source_oui(intel_dp);
> 
> -	ret = drm_dp_dpcd_readb(&intel_dp->aux,
> INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &old_ctrl);
> -	if (ret != 1) {
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
> INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &old_ctrl);
> +	if (ret < 0) {
>  		drm_err(display->drm,
> -			"[CONNECTOR:%d:%s] Failed to read current backlight
> control mode: %d\n",
> -			connector->base.base.id, connector->base.name, ret);
> +			"[CONNECTOR:%d:%s] Failed to read current backlight
> control mode (%pe)\n",
> +			connector->base.base.id, connector->base.name,
> ERR_PTR(ret));
>  		return;
>  	}
> 
> @@ -338,7 +342,7 @@ intel_dp_aux_hdr_enable_backlight(const struct
> intel_crtc_state *crtc_state,
>  	intel_dp_aux_fill_hdr_tcon_params(conn_state, &ctrl);
> 
>  	if (ctrl != old_ctrl &&
> -	    drm_dp_dpcd_writeb(&intel_dp->aux,
> INTEL_EDP_HDR_GETSET_CTRL_PARAMS, ctrl) != 1)
> +	    drm_dp_dpcd_write_byte(&intel_dp->aux,
> +INTEL_EDP_HDR_GETSET_CTRL_PARAMS, ctrl) < 0)
>  		drm_err(display->drm,
>  			"[CONNECTOR:%d:%s] Failed to configure DPCD
> brightness controls\n",
>  			connector->base.base.id, connector->base.name); @@
> -392,13 +396,12 @@ intel_dp_aux_write_panel_luminance_override(struct
> intel_connector *connector)
>  	buf[2] = panel->backlight.max & 0xFF;
>  	buf[3] = (panel->backlight.max & 0xFF00) >> 8;
> 
> -	ret = drm_dp_dpcd_write(&intel_dp->aux,
> -
> 	INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE,
> -				buf, sizeof(buf));
> +	ret = drm_dp_dpcd_write_data(&intel_dp->aux,
> +
> INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE,
> +				     buf, sizeof(buf));
>  	if (ret < 0)
>  		drm_dbg_kms(display->drm,
> -			    "Panel Luminance DPCD reg write failed, err:-%d\n",
> -			    ret);
> +			    "Panel Luminance DPCD reg write failed (%pe)\n",
> ERR_PTR(ret));
>  }
> 
>  static int
> @@ -456,8 +459,8 @@ static u32 intel_dp_aux_vesa_get_backlight(struct
> intel_connector *connector, en
>  	int ret;
> 
>  	if (panel->backlight.edp.vesa.luminance_control_support) {
> -		ret = drm_dp_dpcd_read(&intel_dp->aux,
> DP_EDP_PANEL_TARGET_LUMINANCE_VALUE, buf,
> -				       sizeof(buf));
> +		ret = drm_dp_dpcd_read_data(&intel_dp->aux,
> DP_EDP_PANEL_TARGET_LUMINANCE_VALUE, buf,
> +					    sizeof(buf));
>  		if (ret < 0) {
>  			drm_err(intel_dp->aux.drm_dev,
>  				"[CONNECTOR:%d:%s] Failed to read
> Luminance from DPCD\n",
> --
> 2.47.3

RE: [PATCH 06/11] drm/i915/dp: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}

[Kandpal, Suraj]

> Subject: [PATCH 06/11] drm/i915/dp: switch to drm_dp_dpcd_{read_byte,
> read_data, write_byte, write_data}
> 
> Switch to the modern DPCD access functions that return negative error codes
> on errors, -EIO for incomplete access, and 0 on success.
> 
> Use local ret variables for the return value instead of checking inline, where
> sensible. Rename local int err to ret for clarity and consistency.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 142 +++++++++++++++---------
>  1 file changed, 88 insertions(+), 54 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0cd5e6b5034c..6a8cf3987aa5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3734,19 +3734,19 @@ static bool downstream_hpd_needs_d0(struct
> intel_dp *intel_dp)  static int  write_dsc_decompression_flag(struct
> drm_dp_aux *aux, u8 flag, bool set)  {
> -	int err;
> +	int ret;
>  	u8 val;
> 
> -	err = drm_dp_dpcd_readb(aux, DP_DSC_ENABLE, &val);
> -	if (err < 0)
> -		return err;
> +	ret = drm_dp_dpcd_read_byte(aux, DP_DSC_ENABLE, &val);
> +	if (ret < 0)
> +		return ret;
> 
>  	if (set)
>  		val |= flag;
>  	else
>  		val &= ~flag;
> 
> -	return drm_dp_dpcd_writeb(aux, DP_DSC_ENABLE, val);
> +	return drm_dp_dpcd_write_byte(aux, DP_DSC_ENABLE, val);
>  }
> 
>  static void
> @@ -3910,6 +3910,7 @@ intel_dp_init_source_oui(struct intel_dp *intel_dp)
>  	struct intel_display *display = to_intel_display(intel_dp);
>  	u8 oui[] = { 0x00, 0xaa, 0x01 };
>  	u8 buf[3] = {};
> +	int ret;
> 
>  	if (READ_ONCE(intel_dp->oui_valid))
>  		return;
> @@ -3920,7 +3921,8 @@ intel_dp_init_source_oui(struct intel_dp *intel_dp)
>  	 * During driver init, we want to be careful and avoid changing the
> source OUI if it's
>  	 * already set to what we want, so as to avoid clearing any state by
> accident
>  	 */
> -	if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf,
> sizeof(buf)) < 0)
> +	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_SOURCE_OUI, buf,
> sizeof(buf));
> +	if (ret < 0)
>  		drm_dbg_kms(display->drm, "Failed to read source OUI\n");
> 
>  	if (memcmp(oui, buf, sizeof(oui)) == 0) { @@ -3929,7 +3931,8 @@
> intel_dp_init_source_oui(struct intel_dp *intel_dp)
>  		return;
>  	}
> 
> -	if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui,
> sizeof(oui)) < 0) {
> +	ret = drm_dp_dpcd_write_data(&intel_dp->aux, DP_SOURCE_OUI, oui,
> sizeof(oui));
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm, "Failed to write source OUI\n");
>  		WRITE_ONCE(intel_dp->oui_valid, false);
>  	}
> @@ -3971,7 +3974,7 @@ void intel_dp_set_power(struct intel_dp *intel_dp,
> u8 mode)
>  		if (downstream_hpd_needs_d0(intel_dp))
>  			return;
> 
> -		ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER,
> mode);
> +		ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_SET_POWER, mode);
>  	} else {
>  		struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> 
> @@ -3985,17 +3988,17 @@ void intel_dp_set_power(struct intel_dp *intel_dp,
> u8 mode)
>  		 * time to wake up.
>  		 */
>  		for (i = 0; i < 3; i++) {
> -			ret = drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_SET_POWER, mode);
> -			if (ret == 1)
> +			ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_SET_POWER, mode);
> +			if (!ret)
>  				break;
>  			msleep(1);
>  		}
> 
> -		if (ret == 1 && intel_lspcon_active(dig_port))
> +		if (!ret && intel_lspcon_active(dig_port))
>  			intel_lspcon_wait_pcon_mode(dig_port);
>  	}
> 
> -	if (ret != 1)
> +	if (ret < 0)
>  		drm_dbg_kms(display->drm,
>  			    "[ENCODER:%d:%s] Set power to %s failed\n",
>  			    encoder->base.base.id, encoder->base.name, @@ -
> 4086,6 +4089,7 @@ bool intel_dp_initial_fastset_check(struct intel_encoder
> *encoder,  static void intel_dp_get_pcon_dsc_cap(struct intel_dp *intel_dp)  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> +	int ret;
> 
>  	/* Clear the cached register set to avoid using stale values */
> 
> @@ -4094,9 +4098,10 @@ static void intel_dp_get_pcon_dsc_cap(struct
> intel_dp *intel_dp)
>  	if (!drm_dp_is_branch(intel_dp->dpcd))
>  		return;
> 
> -	if (drm_dp_dpcd_read(&intel_dp->aux, DP_PCON_DSC_ENCODER,
> -			     intel_dp->pcon_dsc_dpcd,
> -			     sizeof(intel_dp->pcon_dsc_dpcd)) < 0)
> +	ret = drm_dp_dpcd_read_data(&intel_dp->aux,
> DP_PCON_DSC_ENCODER,
> +				    intel_dp->pcon_dsc_dpcd,
> +				    sizeof(intel_dp->pcon_dsc_dpcd));
> +	if (ret < 0)
>  		drm_err(display->drm, "Failed to read DPCD register 0x%x\n",
>  			DP_PCON_DSC_ENCODER);
> 
> @@ -4255,13 +4260,13 @@ int intel_dp_pcon_set_tmds_mode(struct intel_dp
> *intel_dp)
>  	/* Set PCON source control mode */
>  	buf |= DP_PCON_ENABLE_SOURCE_CTL_MODE;
> 
> -	ret = drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_PCON_HDMI_LINK_CONFIG_1, buf);
> +	ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
> +DP_PCON_HDMI_LINK_CONFIG_1, buf);
>  	if (ret < 0)
>  		return ret;
> 
>  	/* Set HDMI LINK ENABLE */
>  	buf |= DP_PCON_ENABLE_HDMI_LINK;
> -	ret = drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_PCON_HDMI_LINK_CONFIG_1, buf);
> +	ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
> +DP_PCON_HDMI_LINK_CONFIG_1, buf);
>  	if (ret < 0)
>  		return ret;
> 
> @@ -4407,6 +4412,7 @@ void intel_dp_configure_protocol_converter(struct
> intel_dp *intel_dp,
>  	bool ycbcr444_to_420 = false;
>  	bool rgb_to_ycbcr = false;
>  	u8 tmp;
> +	int ret;
> 
>  	if (intel_dp->dpcd[DP_DPCD_REV] < 0x13)
>  		return;
> @@ -4416,8 +4422,9 @@ void intel_dp_configure_protocol_converter(struct
> intel_dp *intel_dp,
> 
>  	tmp = intel_dp_has_hdmi_sink(intel_dp) ?
> DP_HDMI_DVI_OUTPUT_CONFIG : 0;
> 
> -	if (drm_dp_dpcd_writeb(&intel_dp->aux,
> -			       DP_PROTOCOL_CONVERTER_CONTROL_0, tmp) !=
> 1)
> +	ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
> +				     DP_PROTOCOL_CONVERTER_CONTROL_0,
> tmp);
> +	if (ret < 0)
>  		drm_dbg_kms(display->drm,
>  			    "Failed to %s protocol converter HDMI mode\n",
> 
> str_enable_disable(intel_dp_has_hdmi_sink(intel_dp)));
> @@ -4452,15 +4459,17 @@ void intel_dp_configure_protocol_converter(struct
> intel_dp *intel_dp,
> 
>  	tmp = ycbcr444_to_420 ? DP_CONVERSION_TO_YCBCR420_ENABLE : 0;
> 
> -	if (drm_dp_dpcd_writeb(&intel_dp->aux,
> -			       DP_PROTOCOL_CONVERTER_CONTROL_1, tmp) !=
> 1)
> +	ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
> +				     DP_PROTOCOL_CONVERTER_CONTROL_1,
> tmp);
> +	if (ret < 0)
>  		drm_dbg_kms(display->drm,
>  			    "Failed to %s protocol converter YCbCr 4:2:0
> conversion mode\n",
>  			    str_enable_disable(intel_dp-
> >dfp.ycbcr_444_to_420));
> 
>  	tmp = rgb_to_ycbcr ? DP_CONVERSION_BT709_RGB_YCBCR_ENABLE :
> 0;
> 
> -	if (drm_dp_pcon_convert_rgb_to_ycbcr(&intel_dp->aux, tmp) < 0)
> +	ret = drm_dp_pcon_convert_rgb_to_ycbcr(&intel_dp->aux, tmp);
> +	if (ret < 0)
>  		drm_dbg_kms(display->drm,
>  			    "Failed to %s protocol converter RGB->YCbCr
> conversion mode\n",
>  			    str_enable_disable(tmp));
> @@ -4470,8 +4479,8 @@ static u8 intel_dp_read_dprx_feature_enum(struct
> intel_dp *intel_dp)  {
>  	u8 dprx = 0;
> 
> -	drm_dp_dpcd_read_data(&intel_dp->aux,
> DP_DPRX_FEATURE_ENUMERATION_LIST,
> -			      &dprx, sizeof(dprx));
> +	drm_dp_dpcd_read_byte(&intel_dp->aux,
> +DP_DPRX_FEATURE_ENUMERATION_LIST, &dprx);
> +
>  	return dprx;
>  }
> 
> @@ -4490,9 +4499,8 @@ static int intel_dp_read_dsc_dpcd(struct drm_dp_aux
> *aux,  {
>  	int ret;
> 
> -	ret = drm_dp_dpcd_read_data(aux, DP_DSC_SUPPORT, dsc_dpcd,
> -				    DP_DSC_RECEIVER_CAP_SIZE);
> -	if (ret) {
> +	ret = drm_dp_dpcd_read_data(aux, DP_DSC_SUPPORT, dsc_dpcd,
> DP_DSC_RECEIVER_CAP_SIZE);
> +	if (ret < 0) {
>  		drm_dbg_kms(aux->drm_dev,
>  			    "Could not read DSC DPCD register 0x%x Error:
> %pe\n",
>  			    DP_DSC_SUPPORT, ERR_PTR(ret));
> @@ -4508,7 +4516,7 @@ static int intel_dp_read_dsc_dpcd(struct drm_dp_aux
> *aux,  static void init_dsc_overall_throughput_limits(struct intel_connector
> *connector, bool is_branch)  {
>  	u8 branch_caps[DP_DSC_BRANCH_CAP_SIZE];
> -	int line_width;
> +	int line_width, ret;
> 
>  	connector->dp.dsc_branch_caps.overall_throughput.rgb_yuv444 =
> INT_MAX;
>  	connector->dp.dsc_branch_caps.overall_throughput.yuv422_420 =
> INT_MAX; @@ -4517,9 +4525,10 @@ static void
> init_dsc_overall_throughput_limits(struct intel_connector *connector
>  	if (!is_branch)
>  		return;
> 
> -	if (drm_dp_dpcd_read_data(connector->dp.dsc_decompression_aux,
> -
> DP_DSC_BRANCH_OVERALL_THROUGHPUT_0, branch_caps,
> -				  sizeof(branch_caps)) != 0)
> +	ret = drm_dp_dpcd_read_data(connector->dp.dsc_decompression_aux,
> +
> DP_DSC_BRANCH_OVERALL_THROUGHPUT_0, branch_caps,
> +				    sizeof(branch_caps));
> +	if (ret < 0)
>  		return;
> 
>  	connector->dp.dsc_branch_caps.overall_throughput.rgb_yuv444 = @@
> -4537,6 +4546,7 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
>  			       struct intel_connector *connector)  {
>  	struct intel_display *display = to_intel_display(connector);
> +	int ret;
> 
>  	/*
>  	 * Clear the cached register set to avoid using stale values @@ -
> 4553,12 +4563,14 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
>  	if (dpcd_rev < DP_DPCD_REV_14)
>  		return;
> 
> -	if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> -				   connector->dp.dsc_dpcd) < 0)
> +	ret = intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> +				     connector->dp.dsc_dpcd);
> +	if (ret < 0)
>  		return;
> 
> -	if (drm_dp_dpcd_readb(connector->dp.dsc_decompression_aux,
> DP_FEC_CAPABILITY,
> -			      &connector->dp.fec_capability) < 0) {
> +	ret = drm_dp_dpcd_read_byte(connector->dp.dsc_decompression_aux,
> DP_FEC_CAPABILITY,
> +				    &connector->dp.fec_capability);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm, "Could not read FEC DPCD
> register\n");
>  		return;
>  	}
> @@ -4668,12 +4680,14 @@ static void intel_edp_mso_init(struct intel_dp
> *intel_dp)
>  	struct intel_display *display = to_intel_display(intel_dp);
>  	struct intel_connector *connector = intel_dp->attached_connector;
>  	struct drm_display_info *info = &connector->base.display_info;
> +	int ret;
>  	u8 mso;
> 
>  	if (intel_dp->edp_dpcd[0] < DP_EDP_14)
>  		return;
> 
> -	if (drm_dp_dpcd_readb(&intel_dp->aux,
> DP_EDP_MSO_LINK_CAPABILITIES, &mso) != 1) {
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
> DP_EDP_MSO_LINK_CAPABILITIES, &mso);
> +	if (ret < 0) {
>  		drm_err(display->drm, "Failed to read MSO cap\n");
>  		return;
>  	}
> @@ -4813,9 +4827,9 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp, struct
> intel_connector *connector
>  	 * method). The display control registers should read zero if they're
>  	 * not supported anyway.
>  	 */
> -	if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV,
> -			     intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) ==
> -			     sizeof(intel_dp->edp_dpcd)) {
> +	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_EDP_DPCD_REV,
> +				    intel_dp->edp_dpcd, sizeof(intel_dp-
> >edp_dpcd));
> +	if (!ret) {
>  		drm_dbg_kms(display->drm, "eDP DPCD: %*ph\n",
>  			    (int)sizeof(intel_dp->edp_dpcd),
>  			    intel_dp->edp_dpcd);
> @@ -5044,6 +5058,7 @@ static bool
>  intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *esi)  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> +	int ret;
> 
>  	/*
>  	 * Display WA for HSD #13013007775: mtl/arl/lnl @@ -5052,24
> +5067,30 @@ intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *esi)
>  	 * inadvertently.
>  	 */
>  	if (IS_DISPLAY_VER(display, 14, 20) && !display->platform.battlemage) {
> -		if (drm_dp_dpcd_read(&intel_dp->aux, DP_SINK_COUNT_ESI,
> esi, 3) != 3)
> +		ret = drm_dp_dpcd_read_data(&intel_dp->aux,
> DP_SINK_COUNT_ESI, esi, 3);
> +		if (ret < 0)
>  			return false;
> 
>  		/* DP_SINK_COUNT_ESI + 3 ==
> DP_LINK_SERVICE_IRQ_VECTOR_ESI0 */
> -		return drm_dp_dpcd_readb(&intel_dp->aux,
> DP_LINK_SERVICE_IRQ_VECTOR_ESI0,
> -					 &esi[3]) == 1;
> +		ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
> DP_LINK_SERVICE_IRQ_VECTOR_ESI0,
> +					    &esi[3]);
> +		return ret == 0;
>  	}
> 
> -	return drm_dp_dpcd_read(&intel_dp->aux, DP_SINK_COUNT_ESI, esi,
> 4) == 4;
> +	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_SINK_COUNT_ESI,
> esi,
> +4);
> +
> +	return ret == 0;
>  }
> 
>  static bool intel_dp_ack_sink_irq_esi(struct intel_dp *intel_dp, u8 esi[4])  {
>  	int retry;
> +	int ret;
> 
>  	for (retry = 0; retry < 3; retry++) {
> -		if (drm_dp_dpcd_write(&intel_dp->aux, DP_SINK_COUNT_ESI +
> 1,
> -				      &esi[1], 3) == 3)
> +		ret = drm_dp_dpcd_write_data(&intel_dp->aux,
> DP_SINK_COUNT_ESI + 1,
> +					     &esi[1], 3);
> +		if (!ret)
>  			return true;
>  	}
> 
> @@ -5079,20 +5100,24 @@ static bool intel_dp_ack_sink_irq_esi(struct
> intel_dp *intel_dp, u8 esi[4])
>  /* Return %true if reading the ESI vector succeeded, %false otherwise. */
> static bool intel_dp_get_sink_irq_esi_sst(struct intel_dp *intel_dp, u8 esi[4])  {
> +	int ret;
> +
>  	memset(esi, 0, 4);
> 
>  	/*
>  	 * TODO: For DP_DPCD_REV >= 0x12 read
>  	 * DP_SINK_COUNT_ESI and DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0.
>  	 */
> -	if (drm_dp_dpcd_read_data(&intel_dp->aux, DP_SINK_COUNT, esi, 2)
> != 0)
> +	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_SINK_COUNT, esi,
> 2);
> +	if (ret < 0)
>  		return false;
> 
>  	if (intel_dp->dpcd[DP_DPCD_REV] < DP_DPCD_REV_12)
>  		return true;
> 
>  	/* TODO: Read DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1 as well */
> -	if (drm_dp_dpcd_read_byte(&intel_dp->aux,
> DP_LINK_SERVICE_IRQ_VECTOR_ESI0, &esi[3]) != 0)
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
> DP_LINK_SERVICE_IRQ_VECTOR_ESI0, &esi[3]);
> +	if (ret < 0)
>  		return false;
> 
>  	return true;
> @@ -5101,18 +5126,22 @@ static bool intel_dp_get_sink_irq_esi_sst(struct
> intel_dp *intel_dp, u8 esi[4])
>  /* Return %true if acking the ESI vector IRQ events succeeded, %false
> otherwise. */  static bool intel_dp_ack_sink_irq_esi_sst(struct intel_dp
> *intel_dp, u8 esi[4])  {
> +	int ret;
> +
>  	/*
>  	 * TODO: For DP_DPCD_REV >= 0x12 write
>  	 * DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0
>  	 */
> -	if (drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_DEVICE_SERVICE_IRQ_VECTOR, esi[1]) != 0)
> +	ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_DEVICE_SERVICE_IRQ_VECTOR, esi[1]);
> +	if (ret < 0)
>  		return false;
> 
>  	if (intel_dp->dpcd[DP_DPCD_REV] < DP_DPCD_REV_12)
>  		return true;
> 
>  	/* TODO: Read DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1 as well */
> -	if (drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_LINK_SERVICE_IRQ_VECTOR_ESI0, esi[3]) != 0)
> +	ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_LINK_SERVICE_IRQ_VECTOR_ESI0, esi[3]);
> +	if (ret < 0)
>  		return false;
> 
>  	return true;
> @@ -5706,14 +5735,17 @@ intel_dp_handle_hdmi_link_status_change(struct
> intel_dp *intel_dp)  {
>  	bool is_active;
>  	u8 buf = 0;
> +	int ret;
> 
>  	is_active = drm_dp_pcon_hdmi_link_active(&intel_dp->aux);
>  	if (intel_dp->frl.is_trained && !is_active) {
> -		if (drm_dp_dpcd_readb(&intel_dp->aux,
> DP_PCON_HDMI_LINK_CONFIG_1, &buf) < 0)
> +		ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
> DP_PCON_HDMI_LINK_CONFIG_1, &buf);
> +		if (ret < 0)
>  			return;
> 
>  		buf &=  ~DP_PCON_ENABLE_HDMI_LINK;
> -		if (drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_PCON_HDMI_LINK_CONFIG_1, buf) < 0)
> +		ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_PCON_HDMI_LINK_CONFIG_1, buf);
> +		if (ret < 0)
>  			return;
> 
>  		drm_dp_pcon_hdmi_frl_link_error_count(&intel_dp->aux,
> &intel_dp->attached_connector->base);
> @@ -6218,6 +6250,7 @@ static bool
>  intel_dp_sink_supports_as_sdp_v2(struct intel_dp *intel_dp)  {
>  	u8 rx_features;
> +	int ret;
> 
>  	/*
>  	 * The DP spec does not explicitly provide the AS SDP v2 capability.
> @@ -6240,9 +6273,10 @@ intel_dp_sink_supports_as_sdp_v2(struct intel_dp
> *intel_dp)
>  	 * support from Display ID.
>  	 */
> 
> -	if (drm_dp_dpcd_read_byte(&intel_dp->aux,
> -
> DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1,
> -				  &rx_features) == 1) {
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
> +
> DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1,
> +				    &rx_features);
> +	if (!ret) {
>  		if (rx_features &
> DP_AS_SDP_FAVT_PAYLOAD_FIELDS_PARSING_SUPPORTED)
>  			return true;
>  	}
> --
> 2.47.3

RE: [PATCH 07/11] drm/i915/hdcp: switch to drm_dp_dpcd_{read_byte, read_data, write_data}()

[Kandpal, Suraj]

> Subject: Re: [PATCH 07/11] drm/i915/hdcp: switch to drm_dp_dpcd_{read_byte,
> read_data, write_data}()
> 
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to
> consider:
> - [High] drm/i915/hdcp: incorrect buffer advancement in
> intel_dp_hdcp2_read_msg()
> --
> 
> commit ef5e2443a19df2b1333678ad805fe64be928f4df
> Author: Jani Nikula <jani.nikula@intel.com>
> 
> drm/i915/hdcp: switch to drm_dp_dpcd_{read_byte, read_data, write_data}()
> 
> This commit switches DPCD accesses to modern functions that return 0 on
> success and negative error codes on failure. It simplifies error handling and
> converts logging to use %pe and ERR_PTR().
> 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> 
> [ ... ]
> 
> > @@ -493,14 +493,13 @@ ssize_t get_receiver_id_list_rx_info(struct
> > intel_connector *connector,  {
> >  	struct intel_digital_port *dig_port =
> intel_attached_dig_port(connector);
> >  	struct drm_dp_aux *aux = &dig_port->dp.aux;
> > -	ssize_t ret;
> >  	u8 *rx_info = byte;
> > +	int ret;
> >
> > -	ret = drm_dp_dpcd_read(aux,
> > -			       DP_HDCP_2_2_REG_RXINFO_OFFSET,
> > -			       (void *)rx_info, HDCP_2_2_RXINFO_LEN);
> > -	if (ret != HDCP_2_2_RXINFO_LEN)
> > -		return ret >= 0 ? -EIO : ret;
> > +	ret = drm_dp_dpcd_read_data(aux,
> DP_HDCP_2_2_REG_RXINFO_OFFSET,
> > +				    rx_info, HDCP_2_2_RXINFO_LEN);
> > +	if (ret < 0)
> > +		return ret;
> 
> [Severity: High]
> Will this return value cause issues for downstream topology authentication?
> 
> Since drm_dp_dpcd_read_data() returns 0 on success (instead of the number of
> bytes read), get_receiver_id_list_rx_info() now returns 0 on success.
> 
> Looking at the caller in intel_dp_hdcp2_read_msg(), it expects the return value
> to be the number of bytes read so it can advance the buffer pointer:
> 
> 	if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) {
> 		ret = get_receiver_id_list_rx_info(connector, &dev_cnt, byte);
> 		if (ret < 0)
> 			return ret;
> 
> 		byte += ret;
> 
> Since ret is 0, the pointer won't advance, which could cause the subsequent
> payload read to overwrite the rx_info field.

Even though what the review says is true I think moving ahead when the receiver id list was only partially read was the
Wrong call and I think what the code is currently doing makes more sense.

With that LGTM
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> 
> --
> Sashiko AI review ·
> https://sashiko.dev/#/patchset/cover.1789547331.git.jani.nikula@intel.com?par
> t=7

RE: [PATCH 08/11] drm/i915/dp: switch link training to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()

[Kandpal, Suraj]

> drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()
> 
> Switch to the modern DPCD access functions that return negative error codes
> on errors, -EIO for incomplete access, and 0 on success.
> 
> Use local ret variables for the return value instead of checking inline, where
> sensible.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> ---
>  .../drm/i915/display/intel_dp_link_training.c | 48 ++++++++++---------
>  1 file changed, 26 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index cb92cff90614..6096930fe3a1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -929,7 +929,7 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,  {
>  	int reg = intel_dp_training_pattern_set_reg(intel_dp, dp_phy);
>  	u8 buf[sizeof(intel_dp->train_set) + 1];
> -	int len;
> +	int ret, len;
> 
>  	intel_dp_program_link_training_pattern(intel_dp, crtc_state,
>  					       dp_phy, dp_train_pat);
> @@ -939,7 +939,9 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
>  	memcpy(buf + 1, intel_dp->train_set, crtc_state->lane_count);
>  	len = crtc_state->lane_count + 1;
> 
> -	return drm_dp_dpcd_write(&intel_dp->aux, reg, buf, len) == len;
> +	ret = drm_dp_dpcd_write_data(&intel_dp->aux, reg, buf, len);
> +
> +	return !ret;
>  }
> 
>  static char dp_training_pattern_name(u8 train_pat) @@ -1046,10 +1048,10
> @@ intel_dp_update_link_train(struct intel_dp *intel_dp,
> 
>  	intel_dp_set_signal_levels(intel_dp, crtc_state, dp_phy);
> 
> -	ret = drm_dp_dpcd_write(&intel_dp->aux, reg,
> -				intel_dp->train_set, crtc_state->lane_count);
> +	ret = drm_dp_dpcd_write_data(&intel_dp->aux, reg,
> +				     intel_dp->train_set, crtc_state-
> >lane_count);
> 
> -	return ret == crtc_state->lane_count;
> +	return !ret;
>  }
> 
>  /* 128b/132b */
> @@ -1115,7 +1117,7 @@ void intel_dp_link_training_set_mode(struct intel_dp
> *intel_dp, int link_rate,
>  	link_config[0] |= pr_with_as_sdp_enable ?
> DP_FIXED_VTOTAL_AS_SDP_EN_IN_PR_ACTIVE : 0;
>  	link_config[1] = drm_dp_is_uhbr_rate(link_rate) ?
>  			 DP_SET_ANSI_128B132B : DP_SET_ANSI_8B10B;
> -	drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL,
> link_config, 2);
> +	drm_dp_dpcd_write_data(&intel_dp->aux, DP_DOWNSPREAD_CTRL,
> +link_config, 2);
>  }
> 
>  static bool
> @@ -1163,8 +1165,8 @@ void intel_dp_link_training_set_bw(struct intel_dp
> *intel_dp,
>  		/* DP and eDP v1.3 and earlier link bw set method. */
>  		u8 link_config[] = { link_bw, lane_count };
> 
> -		drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET,
> link_config,
> -				  ARRAY_SIZE(link_config));
> +		drm_dp_dpcd_write_data(&intel_dp->aux, DP_LINK_BW_SET,
> link_config,
> +				       sizeof(link_config));
>  	} else {
>  		/*
>  		 * eDP v1.4 and later link rate set method.
> @@ -1175,8 +1177,8 @@ void intel_dp_link_training_set_bw(struct intel_dp
> *intel_dp,
>  		 * eDP v1.5 sinks allow choosing either, and the last choice
>  		 * shall be active.
>  		 */
> -		drm_dp_dpcd_writeb(&intel_dp->aux, DP_LANE_COUNT_SET,
> lane_count);
> -		drm_dp_dpcd_writeb(&intel_dp->aux, DP_LINK_RATE_SET,
> rate_select);
> +		drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_LANE_COUNT_SET, lane_count);
> +		drm_dp_dpcd_write_byte(&intel_dp->aux, DP_LINK_RATE_SET,
> +rate_select);
>  	}
>  }
> 
> @@ -1286,8 +1288,8 @@ intel_dp_prepare_link_train(struct intel_dp
> *intel_dp,
> 
>  		lt_dbg(intel_dp, DP_PHY_DPRX, "Reloading eDP link rates\n");
> 
> -		drm_dp_dpcd_read(&intel_dp->aux,
> DP_SUPPORTED_LINK_RATES,
> -				 sink_rates, sizeof(sink_rates));
> +		drm_dp_dpcd_read_data(&intel_dp->aux,
> DP_SUPPORTED_LINK_RATES,
> +				      sink_rates, sizeof(sink_rates));
>  	}
> 
>  	if (link_bw)
> @@ -1612,7 +1614,7 @@ static void intel_dp_stop_post_lt_adj_req(struct
> intel_dp *intel_dp,
>  	if (crtc_state->enhanced_framing)
>  		lane_count |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
> 
> -	drm_dp_dpcd_writeb(&intel_dp->aux, DP_LANE_COUNT_SET,
> lane_count);
> +	drm_dp_dpcd_write_byte(&intel_dp->aux, DP_LANE_COUNT_SET,
> lane_count);
>  }
> 
>  static bool intel_dp_disable_dpcd_training_pattern(struct intel_dp *intel_dp,
> @@ -1621,7 +1623,7 @@ static bool
> intel_dp_disable_dpcd_training_pattern(struct intel_dp *intel_dp,
>  	int reg = intel_dp_training_pattern_set_reg(intel_dp, dp_phy);
>  	u8 val = DP_TRAINING_PATTERN_DISABLE;
> 
> -	return drm_dp_dpcd_write(&intel_dp->aux, reg, &val, 1) == 1;
> +	return drm_dp_dpcd_write_byte(&intel_dp->aux, reg, val) == 0;
>  }
> 
>  static int
> @@ -1631,10 +1633,10 @@ intel_dp_128b132b_intra_hop(struct intel_dp
> *intel_dp,
>  	u8 sink_status;
>  	int ret;
> 
> -	ret = drm_dp_dpcd_readb(&intel_dp->aux, DP_SINK_STATUS,
> &sink_status);
> -	if (ret != 1) {
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_SINK_STATUS,
> &sink_status);
> +	if (ret < 0) {
>  		lt_dbg(intel_dp, DP_PHY_DPRX, "Failed to read sink status\n");
> -		return ret < 0 ? ret : -EIO;
> +		return ret;
>  	}
> 
>  	return sink_status & DP_INTRA_HOP_AUX_REPLY_INDICATION ? 1 : 0;
> @@ -2173,9 +2175,11 @@ intel_dp_128b132b_lane_cds(struct intel_dp
> *intel_dp,  {
>  	u8 link_status[DP_LINK_STATUS_SIZE];
>  	unsigned long deadline;
> +	int ret;
> 
> -	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TRAINING_PATTERN_SET,
> -			       DP_TRAINING_PATTERN_2_CDS) != 1) {
> +	ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_TRAINING_PATTERN_SET,
> +				     DP_TRAINING_PATTERN_2_CDS);
> +	if (ret < 0) {
>  		lt_err(intel_dp, DP_PHY_DPRX, "Failed to start 128b/132b TPS2
> CDS\n");
>  		return false;
>  	}
> @@ -2363,9 +2367,9 @@ void intel_dp_128b132b_sdp_crc16(struct intel_dp
> *intel_dp,
>  		return;
> 
>  	/* DP v2.0 SCR on SDP CRC16 for 128b/132b Link Layer */
> -	drm_dp_dpcd_writeb(&intel_dp->aux,
> -			   DP_SDP_ERROR_DETECTION_CONFIGURATION,
> -			   DP_SDP_CRC16_128B132B_EN);
> +	drm_dp_dpcd_write_byte(&intel_dp->aux,
> +			       DP_SDP_ERROR_DETECTION_CONFIGURATION,
> +			       DP_SDP_CRC16_128B132B_EN);
> 
>  	lt_dbg(intel_dp, DP_PHY_DPRX, "DP2.0 SDP CRC16 for 128b/132b
> enabled\n");  }
> --
> 2.47.3

RE: [PATCH 10/11] drm/i915/dp-test: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()

[Kandpal, Suraj]

> Subject: [PATCH 10/11] drm/i915/dp-test: switch to drm_dp_dpcd_{read_byte,
> read_data, write_byte, write_data}()
> 
> Switch to the modern DPCD access functions that return negative error codes
> on errors, -EIO for incomplete access, and 0 on success.
> 
> This flags incomplete reads, and simplifies error handling all over the place.
> Rename local int status to ret for clarity and consistency.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp_test.c | 57 ++++++++++----------
>  1 file changed, 27 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_test.c
> b/drivers/gpu/drm/i915/display/intel_dp_test.c
> index 0551a1ce60d3..424183a65155 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_test.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_test.c
> @@ -147,25 +147,24 @@ bool intel_dp_test_compute_config(struct
> intel_connector *connector,  static u8 intel_dp_autotest_link_training(struct
> intel_dp *intel_dp)  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> -	int status = 0;
> +	int ret;
>  	int test_link_rate;
>  	u8 test_lane_count, test_link_bw;
>  	/* (DP CTS 1.2)
>  	 * 4.3.1.11
>  	 */
>  	/* Read the TEST_LANE_COUNT and TEST_LINK_RTAE fields (DP CTS
> 3.1.4) */
> -	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LANE_COUNT,
> -				   &test_lane_count);
> -
> -	if (status <= 0) {
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_TEST_LANE_COUNT,
> +				    &test_lane_count);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm, "Lane count read failed\n");
>  		return DP_TEST_NAK;
>  	}
>  	test_lane_count &= DP_MAX_LANE_COUNT_MASK;
> 
> -	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LINK_RATE,
> -				   &test_link_bw);
> -	if (status <= 0) {
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_TEST_LINK_RATE,
> +				    &test_link_bw);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm, "Link Rate read failed\n");
>  		return DP_TEST_NAK;
>  	}
> @@ -188,35 +187,33 @@ static u8 intel_dp_autotest_video_pattern(struct
> intel_dp *intel_dp)
>  	u8 test_pattern;
>  	u8 test_misc;
>  	__be16 h_width, v_height;
> -	int status = 0;
> +	int ret;
> 
>  	/* Read the TEST_PATTERN (DP CTS 3.1.5) */
> -	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_PATTERN,
> -				   &test_pattern);
> -	if (status <= 0) {
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_TEST_PATTERN,
> +				    &test_pattern);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm, "Test pattern read failed\n");
>  		return DP_TEST_NAK;
>  	}
>  	if (test_pattern != DP_COLOR_RAMP)
>  		return DP_TEST_NAK;
> 
> -	status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_H_WIDTH_HI,
> -				  &h_width, 2);
> -	if (status <= 0) {
> +	ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_TEST_H_WIDTH_HI,
> &h_width, 2);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm, "H Width read failed\n");
>  		return DP_TEST_NAK;
>  	}
> 
> -	status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_V_HEIGHT_HI,
> -				  &v_height, 2);
> -	if (status <= 0) {
> +	ret = drm_dp_dpcd_read_data(&intel_dp->aux,
> DP_TEST_V_HEIGHT_HI,
> +				    &v_height, 2);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm, "V Height read failed\n");
>  		return DP_TEST_NAK;
>  	}
> 
> -	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_MISC0,
> -				   &test_misc);
> -	if (status <= 0) {
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_TEST_MISC0,
> &test_misc);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm, "TEST MISC read failed\n");
>  		return DP_TEST_NAK;
>  	}
> @@ -274,8 +271,8 @@ static u8 intel_dp_autotest_edid(struct intel_dp
> *intel_dp)
>  		/* We have to write the checksum of the last block read */
>  		block += block->extensions;
> 
> -		if (drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_TEST_EDID_CHECKSUM,
> -				       block->checksum) <= 0)
> +		if (drm_dp_dpcd_write_byte(&intel_dp->aux,
> DP_TEST_EDID_CHECKSUM,
> +					   block->checksum) < 0)
>  			drm_dbg_kms(display->drm,
>  				    "Failed to write EDID checksum\n");
> 
> @@ -397,8 +394,8 @@ static void intel_dp_process_phy_request(struct
> intel_dp *intel_dp,
> 
>  	intel_dp_phy_pattern_update(intel_dp, crtc_state);
> 
> -	drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET,
> -			  intel_dp->train_set, crtc_state->lane_count);
> +	drm_dp_dpcd_write_data(&intel_dp->aux, DP_TRAINING_LANE0_SET,
> +			       intel_dp->train_set, crtc_state->lane_count);
> 
>  	drm_dp_set_phy_test_pattern(&intel_dp->aux, data,
>  				    intel_dp->dpcd[DP_DPCD_REV]);
> @@ -427,10 +424,10 @@ void intel_dp_test_request(struct intel_dp *intel_dp)
>  	struct intel_display *display = to_intel_display(intel_dp);
>  	u8 response = DP_TEST_NAK;
>  	u8 request = 0;
> -	int status;
> +	int ret;
> 
> -	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_REQUEST,
> &request);
> -	if (status <= 0) {
> +	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_TEST_REQUEST,
> &request);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm,
>  			    "Could not read test request from sink\n");
>  		goto update_status;
> @@ -463,8 +460,8 @@ void intel_dp_test_request(struct intel_dp *intel_dp)
>  		intel_dp->compliance.test_type = request;
> 
>  update_status:
> -	status = drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_RESPONSE,
> response);
> -	if (status <= 0)
> +	ret = drm_dp_dpcd_write_byte(&intel_dp->aux, DP_TEST_RESPONSE,
> response);
> +	if (ret < 0)
>  		drm_dbg_kms(display->drm,
>  			    "Could not write test response to sink\n");  }
> --
> 2.47.3

[PATCH v2] drm/i915/hdcp: switch to drm_dp_dpcd_{read_byte, read_data, write_data}()

[Jani Nikula]

Switch to the modern DPCD access functions that return negative error
codes on errors, -EIO for incomplete access, and 0 on success.

This simplifies error handling all over the place. Convert the error
logging to use %pe and ERR_PTR() while at it.

Add comments to the read/write places that depend on the functions that
return the number of bytes read/written for incomplete access.

v2: return length from get_receiver_id_list_rx_info() (Sashiko)

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 176 +++++++++----------
 1 file changed, 88 insertions(+), 88 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 14ed0ea22dd3..566a921d18a1 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -60,16 +60,15 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
 {
 	struct intel_display *display = to_intel_display(dig_port);
 	u8 aksv[DRM_HDCP_KSV_LEN] = {};
-	ssize_t dpcd_ret;
+	int ret;
 
 	/* Output An first, that's easy */
-	dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AN,
+	ret = drm_dp_dpcd_write_data(&dig_port->dp.aux, DP_AUX_HDCP_AN,
 				     an, DRM_HDCP_AN_LEN);
-	if (dpcd_ret != DRM_HDCP_AN_LEN) {
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Failed to write An over DP/AUX (%zd)\n",
-			    dpcd_ret);
-		return dpcd_ret >= 0 ? -EIO : dpcd_ret;
+			    "Failed to write An over DP/AUX (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
 
 	/*
@@ -79,14 +78,14 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
 	 * the destination address which will tickle the hardware to output the
 	 * Aksv on our behalf after the header is sent.
 	 */
-	dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AKSV,
+	ret = drm_dp_dpcd_write_data(&dig_port->dp.aux, DP_AUX_HDCP_AKSV,
 				     aksv, DRM_HDCP_KSV_LEN);
-	if (dpcd_ret != DRM_HDCP_KSV_LEN) {
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Failed to write Aksv over DP/AUX (%zd)\n",
-			    dpcd_ret);
-		return dpcd_ret >= 0 ? -EIO : dpcd_ret;
+			    "Failed to write Aksv over DP/AUX (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
+
 	return 0;
 }
 
@@ -94,15 +93,16 @@ static int intel_dp_hdcp_read_bksv(struct intel_digital_port *dig_port,
 				   u8 *bksv)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
+	int ret;
 
-	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BKSV, bksv,
-			       DRM_HDCP_KSV_LEN);
-	if (ret != DRM_HDCP_KSV_LEN) {
+	ret = drm_dp_dpcd_read_data(&dig_port->dp.aux, DP_AUX_HDCP_BKSV, bksv,
+				    DRM_HDCP_KSV_LEN);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read Bksv from DP/AUX failed (%zd)\n", ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read Bksv from DP/AUX failed (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
+
 	return 0;
 }
 
@@ -110,20 +110,21 @@ static int intel_dp_hdcp_read_bstatus(struct intel_digital_port *dig_port,
 				      u8 *bstatus)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
+	int ret;
 
 	/*
 	 * For some reason the HDMI and DP HDCP specs call this register
 	 * definition by different names. In the HDMI spec, it's called BSTATUS,
 	 * but in DP it's called BINFO.
 	 */
-	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BINFO,
-			       bstatus, DRM_HDCP_BSTATUS_LEN);
-	if (ret != DRM_HDCP_BSTATUS_LEN) {
+	ret = drm_dp_dpcd_read_data(&dig_port->dp.aux, DP_AUX_HDCP_BINFO,
+				    bstatus, DRM_HDCP_BSTATUS_LEN);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read bstatus from DP/AUX failed (%zd)\n", ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read bstatus from DP/AUX failed (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
+
 	return 0;
 }
 
@@ -132,14 +133,13 @@ int intel_dp_hdcp_read_bcaps(struct drm_dp_aux *aux,
 			     struct intel_display *display,
 			     u8 *bcaps)
 {
-	ssize_t ret;
+	int ret;
 
-	ret = drm_dp_dpcd_read(aux, DP_AUX_HDCP_BCAPS,
-			       bcaps, 1);
-	if (ret != 1) {
+	ret = drm_dp_dpcd_read_byte(aux, DP_AUX_HDCP_BCAPS, bcaps);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read bcaps from DP/AUX failed (%zd)\n", ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read bcaps from DP/AUX failed (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
 
 	return 0;
@@ -166,16 +166,16 @@ int intel_dp_hdcp_read_ri_prime(struct intel_digital_port *dig_port,
 				u8 *ri_prime)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
+	int ret;
 
-	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_RI_PRIME,
-			       ri_prime, DRM_HDCP_RI_LEN);
-	if (ret != DRM_HDCP_RI_LEN) {
+	ret = drm_dp_dpcd_read_data(&dig_port->dp.aux, DP_AUX_HDCP_RI_PRIME,
+				    ri_prime, DRM_HDCP_RI_LEN);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read Ri' from DP/AUX failed (%zd)\n",
-			    ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read Ri' from DP/AUX failed (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
+
 	return 0;
 }
 
@@ -184,17 +184,18 @@ int intel_dp_hdcp_read_ksv_ready(struct intel_digital_port *dig_port,
 				 bool *ksv_ready)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
 	u8 bstatus;
+	int ret;
 
-	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
-			       &bstatus, 1);
-	if (ret != 1) {
+	ret = drm_dp_dpcd_read_byte(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
+				    &bstatus);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read bstatus from DP/AUX failed (%zd)\n", ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read bstatus from DP/AUX failed (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
 	*ksv_ready = bstatus & DP_BSTATUS_READY;
+
 	return 0;
 }
 
@@ -203,23 +204,24 @@ int intel_dp_hdcp_read_ksv_fifo(struct intel_digital_port *dig_port,
 				int num_downstream, u8 *ksv_fifo)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
+	int ret;
 	int i;
 
 	/* KSV list is read via 15 byte window (3 entries @ 5 bytes each) */
 	for (i = 0; i < num_downstream; i += 3) {
 		size_t len = min(num_downstream - i, 3) * DRM_HDCP_KSV_LEN;
-		ret = drm_dp_dpcd_read(&dig_port->dp.aux,
-				       DP_AUX_HDCP_KSV_FIFO,
-				       ksv_fifo + i * DRM_HDCP_KSV_LEN,
-				       len);
-		if (ret != len) {
+		ret = drm_dp_dpcd_read_data(&dig_port->dp.aux,
+					    DP_AUX_HDCP_KSV_FIFO,
+					    ksv_fifo + i * DRM_HDCP_KSV_LEN,
+					    len);
+		if (ret < 0) {
 			drm_dbg_kms(display->drm,
-				    "Read ksv[%d] from DP/AUX failed (%zd)\n",
-				    i, ret);
-			return ret >= 0 ? -EIO : ret;
+				    "Read ksv[%d] from DP/AUX failed (%pe)\n",
+				    i, ERR_PTR(ret));
+			return ret;
 		}
 	}
+
 	return 0;
 }
 
@@ -228,19 +230,19 @@ int intel_dp_hdcp_read_v_prime_part(struct intel_digital_port *dig_port,
 				    int i, u32 *part)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
+	int ret;
 
 	if (i >= DRM_HDCP_V_PRIME_NUM_PARTS)
 		return -EINVAL;
 
-	ret = drm_dp_dpcd_read(&dig_port->dp.aux,
-			       DP_AUX_HDCP_V_PRIME(i), part,
-			       DRM_HDCP_V_PRIME_PART_LEN);
-	if (ret != DRM_HDCP_V_PRIME_PART_LEN) {
+	ret = drm_dp_dpcd_read_data(&dig_port->dp.aux, DP_AUX_HDCP_V_PRIME(i), part,
+				    DRM_HDCP_V_PRIME_PART_LEN);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read v'[%d] from DP/AUX failed (%zd)\n", i, ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read v'[%d] from DP/AUX failed (%pe)\n", i, ERR_PTR(ret));
+		return ret;
 	}
+
 	return 0;
 }
 
@@ -258,14 +260,13 @@ bool intel_dp_hdcp_check_link(struct intel_digital_port *dig_port,
 			      struct intel_connector *connector)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	ssize_t ret;
 	u8 bstatus;
+	int ret;
 
-	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
-			       &bstatus, 1);
-	if (ret != 1) {
+	ret = drm_dp_dpcd_read_byte(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS, &bstatus);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read bstatus from DP/AUX failed (%zd)\n", ret);
+			    "Read bstatus from DP/AUX failed (%pe)\n", ERR_PTR(ret));
 		return false;
 	}
 
@@ -346,15 +347,14 @@ intel_dp_hdcp2_read_rx_status(struct intel_connector *connector,
 	struct intel_display *display = to_intel_display(connector);
 	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_dp_aux *aux = &dig_port->dp.aux;
-	ssize_t ret;
+	int ret;
 
-	ret = drm_dp_dpcd_read(aux,
-			       DP_HDCP_2_2_REG_RXSTATUS_OFFSET, rx_status,
-			       HDCP_2_2_DP_RXSTATUS_LEN);
-	if (ret != HDCP_2_2_DP_RXSTATUS_LEN) {
+	ret = drm_dp_dpcd_read_data(aux, DP_HDCP_2_2_REG_RXSTATUS_OFFSET, rx_status,
+				    HDCP_2_2_DP_RXSTATUS_LEN);
+	if (ret < 0) {
 		drm_dbg_kms(display->drm,
-			    "Read bstatus from DP/AUX failed (%zd)\n", ret);
-		return ret >= 0 ? -EIO : ret;
+			    "Read bstatus from DP/AUX failed (%pe)\n", ERR_PTR(ret));
+		return ret;
 	}
 
 	return 0;
@@ -474,8 +474,8 @@ int intel_dp_hdcp2_write_msg(struct intel_connector *connector,
 		len = bytes_to_write > DP_AUX_MAX_PAYLOAD_BYTES ?
 				DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_write;
 
-		ret = drm_dp_dpcd_write(aux,
-					offset, (void *)byte, len);
+		/* Note: This may return < len for partial writes. */
+		ret = drm_dp_dpcd_write(aux, offset, byte, len);
 		if (ret < 0)
 			return ret;
 
@@ -487,20 +487,20 @@ int intel_dp_hdcp2_write_msg(struct intel_connector *connector,
 	return size;
 }
 
+/* return number of bytes read on success */
 static
 ssize_t get_receiver_id_list_rx_info(struct intel_connector *connector,
 				     u32 *dev_cnt, u8 *byte)
 {
 	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_dp_aux *aux = &dig_port->dp.aux;
-	ssize_t ret;
 	u8 *rx_info = byte;
+	int ret;
 
-	ret = drm_dp_dpcd_read(aux,
-			       DP_HDCP_2_2_REG_RXINFO_OFFSET,
-			       (void *)rx_info, HDCP_2_2_RXINFO_LEN);
-	if (ret != HDCP_2_2_RXINFO_LEN)
-		return ret >= 0 ? -EIO : ret;
+	ret = drm_dp_dpcd_read_data(aux, DP_HDCP_2_2_REG_RXINFO_OFFSET,
+				    rx_info, HDCP_2_2_RXINFO_LEN);
+	if (ret < 0)
+		return ret;
 
 	*dev_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 |
 		   HDCP_2_2_DEV_COUNT_LO(rx_info[1]));
@@ -508,7 +508,7 @@ ssize_t get_receiver_id_list_rx_info(struct intel_connector *connector,
 	if (*dev_cnt > HDCP_2_2_MAX_DEVICE_COUNT)
 		*dev_cnt = HDCP_2_2_MAX_DEVICE_COUNT;
 
-	return ret;
+	return HDCP_2_2_RXINFO_LEN;
 }
 
 static
@@ -566,11 +566,11 @@ int intel_dp_hdcp2_read_msg(struct intel_connector *connector,
 					       hdcp2_msg_data->msg_read_timeout);
 		}
 
-		ret = drm_dp_dpcd_read(aux, offset,
-				       (void *)byte, len);
+		/* Note: This may return < len for partial reads. */
+		ret = drm_dp_dpcd_read(aux, offset, byte, len);
 		if (ret < 0) {
-			drm_dbg_kms(display->drm, "msg_id %d, ret %zd\n",
-				    msg_id, ret);
+			drm_dbg_kms(display->drm, "msg_id %d, ret %pe\n",
+				    msg_id, ERR_PTR(ret));
 			return ret;
 		}
 
@@ -660,11 +660,11 @@ int _intel_dp_hdcp2_get_capability(struct drm_dp_aux *aux,
 	 * declare a monitor not capable of HDCP 2.2.
 	 */
 	for (i = 0; i < 3; i++) {
-		ret = drm_dp_dpcd_read(aux,
-				       DP_HDCP_2_2_REG_RX_CAPS_OFFSET,
-				       rx_caps, HDCP_2_2_RXCAPS_LEN);
-		if (ret != HDCP_2_2_RXCAPS_LEN)
-			return ret >= 0 ? -EIO : ret;
+		ret = drm_dp_dpcd_read_data(aux,
+					    DP_HDCP_2_2_REG_RX_CAPS_OFFSET,
+					    rx_caps, HDCP_2_2_RXCAPS_LEN);
+		if (ret < 0)
+			return ret;
 
 		if (rx_caps[0] == HDCP_2_2_RX_CAPS_VERSION_VAL &&
 		    HDCP_2_2_DP_HDCP_CAPABLE(rx_caps[2])) {
-- 
2.47.3

✗ CI.checkpatch: warning for drm/i915/display: switch to modern drm_dp_dpcd* accessors (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/display: switch to modern drm_dp_dpcd* accessors (rev2)
URL   : https://patchwork.freedesktop.org/series/174241/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
6bef5ce5c74dc76b4ee69ab2832c0d1fd63c91c7
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit bcf80da15a6584fcac38a1ed90e5e1853b6b807d
Author: Jani Nikula <jani.nikula@intel.com>
Date:   Wed Sep 16 11:29:42 2026 +0300

    drm/i915/psr: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()
    
    Switch to the modern DPCD access functions that return negative error
    codes on errors, -EIO for incomplete access, and 0 on success.
    
    This flags incomplete reads, and clarifies error handling all over the
    place. Use 1-byte accessors where sensible. Rename local int r to ret
    for clarity and consistency.
    
    Signed-off-by: Jani Nikula <jani.nikula@intel.com>
    Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
+ /mt/dim checkpatch f709158f7998ec6a0c6ecebe5aa7911bfb8412bb drm-intel
ffec712d6aac drm/i915/lspcon: use u8 variable to hold 1-byte DPCD reads
e724c719eedc drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte, write_byte, write_data}
85a7bfdb2899 drm/i915/alpm: switch to drm_dp_dpcd_{read_byte, write_byte}
8e070b51d452 drm/i915/ddi: switch to drm_dp_dpcd_write_byte()
87b00a037e7b drm/i915/lspcon: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()
-:139: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#139: FILE: drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c:462:
+		ret = drm_dp_dpcd_read_data(&intel_dp->aux, DP_EDP_PANEL_TARGET_LUMINANCE_VALUE, buf,

total: 0 errors, 1 warnings, 0 checks, 115 lines checked
b6ab66dd15f9 drm/i915/dp: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}
e80ac83709d9 drm/i915/hdcp: switch to drm_dp_dpcd_{read_byte, read_data, write_data}()
d41f0443991a drm/i915/dp: switch link training to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()
3382d7d5f3c8 drm/i915/dp-mst: switch to drm_dp_dpcd_read_byte()
0a957cfd82fe drm/i915/dp-test: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()
bcf80da15a65 drm/i915/psr: switch to drm_dp_dpcd_{read_byte, read_data, write_byte, write_data}()

✓ CI.KUnit: success for drm/i915/display: switch to modern drm_dp_dpcd* accessors (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/display: switch to modern drm_dp_dpcd* accessors (rev2)
URL   : https://patchwork.freedesktop.org/series/174241/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[11:12:33] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:12:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:12:58] Starting KUnit Kernel (1/1)...
[11:12:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:12:58] ============= refcount_interrupt (4 subtests) ==============
[11:12:58] [PASSED] test_single_irq_change
[11:12:58] [PASSED] test_nested_irq_change
[11:12:58] [PASSED] test_multiple_irq_change
[11:12:58] [PASSED] test_irq_save
[11:12:58] =============== [PASSED] refcount_interrupt ================
[11:12:58] ================= gpu_buddy (14 subtests) ==================
[11:12:58] [PASSED] gpu_test_buddy_alloc_limit
[11:12:58] [PASSED] gpu_test_buddy_alloc_optimistic
[11:12:58] [PASSED] gpu_test_buddy_alloc_pessimistic
[11:12:58] [PASSED] gpu_test_buddy_alloc_pathological
[11:12:58] [PASSED] gpu_test_buddy_alloc_contiguous
[11:12:58] [PASSED] gpu_test_buddy_alloc_clear
[11:12:58] [PASSED] gpu_test_buddy_alloc_range
[11:12:58] [PASSED] gpu_test_buddy_alloc_range_bias
[11:12:59] [PASSED] gpu_test_buddy_fragmentation_performance
[11:13:00] [PASSED] gpu_test_buddy_dirty_tracker_performance
[11:13:00] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[11:13:00] [PASSED] gpu_test_buddy_offset_aligned_allocation
[11:13:00] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[11:13:00] [PASSED] gpu_test_buddy_addr_to_block
[11:13:00] ==================== [PASSED] gpu_buddy ====================
[11:13:00] ============================================================
[11:13:00] Testing complete. Ran 18 tests: passed: 18
[11:13:00] Elapsed time: 26.637s total, 4.360s configuring, 20.360s building, 1.840s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:13:00] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:13:02] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:13:36] Starting KUnit Kernel (1/1)...
[11:13:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:13:36] ============= refcount_interrupt (4 subtests) ==============
[11:13:36] [PASSED] test_single_irq_change
[11:13:36] [PASSED] test_nested_irq_change
[11:13:36] [PASSED] test_multiple_irq_change
[11:13:36] [PASSED] test_irq_save
[11:13:36] =============== [PASSED] refcount_interrupt ================
[11:13:36] ================== guc_buf (11 subtests) ===================
[11:13:36] [PASSED] test_smallest
[11:13:36] [PASSED] test_largest
[11:13:36] [PASSED] test_granular
[11:13:36] [PASSED] test_unique
[11:13:36] [PASSED] test_overlap
[11:13:36] [PASSED] test_reusable
[11:13:36] [PASSED] test_too_big
[11:13:36] [PASSED] test_flush
[11:13:36] [PASSED] test_lookup
[11:13:36] [PASSED] test_data
[11:13:36] [PASSED] test_class
[11:13:36] ===================== [PASSED] guc_buf =====================
[11:13:36] =================== guc_dbm (7 subtests) ===================
[11:13:36] [PASSED] test_empty
[11:13:36] [PASSED] test_default
[11:13:36] ======================== test_size  ========================
[11:13:36] [PASSED] 4
[11:13:36] [PASSED] 8
[11:13:36] [PASSED] 32
[11:13:36] [PASSED] 256
[11:13:36] ==================== [PASSED] test_size ====================
[11:13:36] ======================= test_reuse  ========================
[11:13:36] [PASSED] 4
[11:13:36] [PASSED] 8
[11:13:36] [PASSED] 32
[11:13:36] [PASSED] 256
[11:13:36] =================== [PASSED] test_reuse ====================
[11:13:36] =================== test_range_overlap  ====================
[11:13:36] [PASSED] 4
[11:13:36] [PASSED] 8
[11:13:36] [PASSED] 32
[11:13:36] [PASSED] 256
[11:13:36] =============== [PASSED] test_range_overlap ================
[11:13:36] =================== test_range_compact  ====================
[11:13:36] [PASSED] 4
[11:13:36] [PASSED] 8
[11:13:36] [PASSED] 32
[11:13:36] [PASSED] 256
[11:13:36] =============== [PASSED] test_range_compact ================
[11:13:36] ==================== test_range_spare  =====================
[11:13:36] [PASSED] 4
[11:13:36] [PASSED] 8
[11:13:36] [PASSED] 32
[11:13:36] [PASSED] 256
[11:13:36] ================ [PASSED] test_range_spare =================
[11:13:36] ===================== [PASSED] guc_dbm =====================
[11:13:36] =================== guc_idm (6 subtests) ===================
[11:13:36] [PASSED] bad_init
[11:13:36] [PASSED] no_init
[11:13:36] [PASSED] init_fini
[11:13:36] [PASSED] check_used
[11:13:36] [PASSED] check_quota
[11:13:36] [PASSED] check_all
[11:13:36] ===================== [PASSED] guc_idm =====================
[11:13:36] ============== guc_klv_helpers (13 subtests) ===============
[11:13:36] [PASSED] test_count
[11:13:36] [PASSED] test_encode_u32
[11:13:36] [PASSED] test_encode_u64
[11:13:36] [PASSED] test_encode_string
[11:13:36] [PASSED] test_encode_object_raw
[11:13:36] [PASSED] test_encode_object_klv
[11:13:36] [PASSED] test_encode_object_nested
[11:13:36] [PASSED] test_encode_object_basic
[11:13:36] ===================== test_decode_u16  =====================
[11:13:36] [PASSED] empty
[11:13:36] [PASSED] valid
[11:13:36] [PASSED] max
[11:13:36] [PASSED] big
[11:13:36] [PASSED] long
[11:13:36] ================= [PASSED] test_decode_u16 =================
[11:13:36] ===================== test_decode_u32  =====================
[11:13:36] [PASSED] empty
[11:13:36] [PASSED] valid
[11:13:36] [PASSED] max
[11:13:36] [PASSED] long
[11:13:36] ================= [PASSED] test_decode_u32 =================
[11:13:36] ===================== test_decode_u64  =====================
[11:13:36] [PASSED] empty
[11:13:36] [PASSED] short
[11:13:36] [PASSED] valid
[11:13:36] [PASSED] max
[11:13:36] [PASSED] long
[11:13:36] ================= [PASSED] test_decode_u64 =================
[11:13:36] ===================== test_decode_str  =====================
[11:13:36] [PASSED] empty
[11:13:36] [PASSED] one
[11:13:36] [PASSED] one_trash
[11:13:36] [PASSED] two
[11:13:36] [PASSED] two_trash
[11:13:36] [PASSED] three
[11:13:36] [PASSED] dword
[11:13:36] [PASSED] four
[11:13:36] [PASSED] five
[11:13:36] [PASSED] six
[11:13:36] [PASSED] seven
[11:13:36] [PASSED] qword
[11:13:36] ================= [PASSED] test_decode_str =================
[11:13:36] [PASSED] test_print
[11:13:36] ================= [PASSED] guc_klv_helpers =================
[11:13:36] =================== xe_log (4 subtests) ====================
[11:13:36] [PASSED] demo_cper
[11:13:36] [PASSED] demo_dmesg
[11:13:36] ======================= test_dmesg  ========================
[11:13:36] [PASSED] test_fatal
[11:13:36] [PASSED] test_fatal_tile
[11:13:36] [PASSED] test_fatal_gt
[11:13:36] [PASSED] test_fatal_comp
[11:13:36] [PASSED] test_fatal_comp_tile
[11:13:36] [PASSED] test_fatal_comp_gt
[11:13:36] [PASSED] test_fatal_all
[11:13:36] [PASSED] test_recoverable
[11:13:36] [PASSED] test_recoverable_tile
[11:13:36] [PASSED] test_recoverable_gt
[11:13:36] [PASSED] test_recoverable_comp
[11:13:36] [PASSED] test_recoverable_comp_tile
[11:13:36] [PASSED] test_recoverable_comp_gt
[11:13:36] [PASSED] test_recoverable_all
[11:13:36] [PASSED] test_info
[11:13:36] [PASSED] test_info_tile
[11:13:36] [PASSED] test_info_gt
[11:13:36] [PASSED] test_info_err
[11:13:36] [PASSED] test_info_comp
[11:13:36] [PASSED] test_info_comp_tile
[11:13:36] [PASSED] test_info_comp_gt
[11:13:36] [PASSED] test_info_all
[11:13:36] [PASSED] test_hw_fatal
[11:13:36] [PASSED] test_hw_recoverable
[11:13:36] [PASSED] test_hw_corrected
[11:13:36] [PASSED] test_hw_informational
[11:13:36] =================== [PASSED] test_dmesg ====================
[11:13:36] ====================== test_invalid  =======================
[11:13:36] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[11:13:36] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[11:13:36] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[11:13:36] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[11:13:36] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[11:13:36] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[11:13:36] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[11:13:36] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[11:13:36] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[11:13:36] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[11:13:36] ================== [SKIPPED] test_invalid ==================
[11:13:36] ===================== [PASSED] xe_log ======================
[11:13:36] ================== no_relay (3 subtests) ===================
[11:13:36] [PASSED] xe_drops_guc2pf_if_not_ready
[11:13:36] [PASSED] xe_drops_guc2vf_if_not_ready
[11:13:36] [PASSED] xe_rejects_send_if_not_ready
[11:13:36] ==================== [PASSED] no_relay =====================
[11:13:36] ================== pf_relay (14 subtests) ==================
[11:13:36] [PASSED] pf_rejects_guc2pf_too_short
[11:13:36] [PASSED] pf_rejects_guc2pf_too_long
[11:13:36] [PASSED] pf_rejects_guc2pf_no_payload
[11:13:36] [PASSED] pf_fails_no_payload
[11:13:36] [PASSED] pf_fails_bad_origin
[11:13:36] [PASSED] pf_fails_bad_type
[11:13:36] [PASSED] pf_txn_reports_error
[11:13:36] [PASSED] pf_txn_sends_pf2guc
[11:13:36] [PASSED] pf_sends_pf2guc
[11:13:36] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:13:36] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:13:36] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:13:36] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:13:36] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:13:36] ==================== [PASSED] pf_relay =====================
[11:13:36] ================== vf_relay (3 subtests) ===================
[11:13:36] [PASSED] vf_rejects_guc2vf_too_short
[11:13:36] [PASSED] vf_rejects_guc2vf_too_long
[11:13:36] [PASSED] vf_rejects_guc2vf_no_payload
[11:13:36] ==================== [PASSED] vf_relay =====================
[11:13:36] ================ pf_gt_config (9 subtests) =================
[11:13:36] [PASSED] fair_contexts_1vf
[11:13:36] [PASSED] fair_doorbells_1vf
[11:13:36] [PASSED] fair_ggtt_1vf
[11:13:36] ====================== fair_vram_1vf  ======================
[11:13:36] [PASSED] 3.50 GiB
[11:13:36] [PASSED] 11.5 GiB
[11:13:36] [PASSED] 15.5 GiB
[11:13:36] [PASSED] 31.5 GiB
[11:13:36] [PASSED] 63.5 GiB
[11:13:36] [PASSED] 1.91 GiB
[11:13:36] ================== [PASSED] fair_vram_1vf ==================
[11:13:36] ================ fair_vram_1vf_admin_only  =================
[11:13:36] [PASSED] 3.50 GiB
[11:13:36] [PASSED] 11.5 GiB
[11:13:36] [PASSED] 15.5 GiB
[11:13:36] [PASSED] 31.5 GiB
[11:13:36] [PASSED] 63.5 GiB
[11:13:36] [PASSED] 1.91 GiB
[11:13:36] ============ [PASSED] fair_vram_1vf_admin_only =============
[11:13:36] ====================== fair_contexts  ======================
[11:13:36] [PASSED] 1 VF
[11:13:36] [PASSED] 2 VFs
[11:13:36] [PASSED] 3 VFs
[11:13:36] [PASSED] 4 VFs
[11:13:36] [PASSED] 5 VFs
[11:13:36] [PASSED] 6 VFs
[11:13:36] [PASSED] 7 VFs
[11:13:36] [PASSED] 8 VFs
[11:13:36] [PASSED] 9 VFs
[11:13:36] [PASSED] 10 VFs
[11:13:36] [PASSED] 11 VFs
[11:13:36] [PASSED] 12 VFs
[11:13:36] [PASSED] 13 VFs
[11:13:36] [PASSED] 14 VFs
[11:13:36] [PASSED] 15 VFs
[11:13:36] [PASSED] 16 VFs
[11:13:36] [PASSED] 17 VFs
[11:13:36] [PASSED] 18 VFs
[11:13:36] [PASSED] 19 VFs
[11:13:36] [PASSED] 20 VFs
[11:13:36] [PASSED] 21 VFs
[11:13:36] [PASSED] 22 VFs
[11:13:36] [PASSED] 23 VFs
[11:13:36] [PASSED] 24 VFs
[11:13:36] [PASSED] 25 VFs
[11:13:36] [PASSED] 26 VFs
[11:13:36] [PASSED] 27 VFs
[11:13:36] [PASSED] 28 VFs
[11:13:36] [PASSED] 29 VFs
[11:13:36] [PASSED] 30 VFs
[11:13:36] [PASSED] 31 VFs
[11:13:36] [PASSED] 32 VFs
[11:13:36] [PASSED] 33 VFs
[11:13:36] [PASSED] 34 VFs
[11:13:36] [PASSED] 35 VFs
[11:13:36] [PASSED] 36 VFs
[11:13:36] [PASSED] 37 VFs
[11:13:36] [PASSED] 38 VFs
[11:13:36] [PASSED] 39 VFs
[11:13:36] [PASSED] 40 VFs
[11:13:36] [PASSED] 41 VFs
[11:13:36] [PASSED] 42 VFs
[11:13:36] [PASSED] 43 VFs
[11:13:36] [PASSED] 44 VFs
[11:13:36] [PASSED] 45 VFs
[11:13:36] [PASSED] 46 VFs
[11:13:36] [PASSED] 47 VFs
[11:13:36] [PASSED] 48 VFs
[11:13:36] [PASSED] 49 VFs
[11:13:36] [PASSED] 50 VFs
[11:13:36] [PASSED] 51 VFs
[11:13:36] [PASSED] 52 VFs
[11:13:36] [PASSED] 53 VFs
[11:13:36] [PASSED] 54 VFs
[11:13:36] [PASSED] 55 VFs
[11:13:36] [PASSED] 56 VFs
[11:13:36] [PASSED] 57 VFs
[11:13:36] [PASSED] 58 VFs
[11:13:36] [PASSED] 59 VFs
[11:13:36] [PASSED] 60 VFs
[11:13:36] [PASSED] 61 VFs
[11:13:36] [PASSED] 62 VFs
[11:13:36] [PASSED] 63 VFs
[11:13:36] ================== [PASSED] fair_contexts ==================
[11:13:36] ===================== fair_doorbells  ======================
[11:13:36] [PASSED] 1 VF
[11:13:36] [PASSED] 2 VFs
[11:13:36] [PASSED] 3 VFs
[11:13:36] [PASSED] 4 VFs
[11:13:36] [PASSED] 5 VFs
[11:13:36] [PASSED] 6 VFs
[11:13:36] [PASSED] 7 VFs
[11:13:36] [PASSED] 8 VFs
[11:13:36] [PASSED] 9 VFs
[11:13:36] [PASSED] 10 VFs
[11:13:36] [PASSED] 11 VFs
[11:13:36] [PASSED] 12 VFs
[11:13:36] [PASSED] 13 VFs
[11:13:36] [PASSED] 14 VFs
[11:13:36] [PASSED] 15 VFs
[11:13:36] [PASSED] 16 VFs
[11:13:36] [PASSED] 17 VFs
[11:13:36] [PASSED] 18 VFs
[11:13:36] [PASSED] 19 VFs
[11:13:36] [PASSED] 20 VFs
[11:13:36] [PASSED] 21 VFs
[11:13:36] [PASSED] 22 VFs
[11:13:36] [PASSED] 23 VFs
[11:13:36] [PASSED] 24 VFs
[11:13:36] [PASSED] 25 VFs
[11:13:36] [PASSED] 26 VFs
[11:13:36] [PASSED] 27 VFs
[11:13:36] [PASSED] 28 VFs
[11:13:36] [PASSED] 29 VFs
[11:13:36] [PASSED] 30 VFs
[11:13:36] [PASSED] 31 VFs
[11:13:36] [PASSED] 32 VFs
[11:13:36] [PASSED] 33 VFs
[11:13:36] [PASSED] 34 VFs
[11:13:36] [PASSED] 35 VFs
[11:13:36] [PASSED] 36 VFs
[11:13:36] [PASSED] 37 VFs
[11:13:36] [PASSED] 38 VFs
[11:13:36] [PASSED] 39 VFs
[11:13:36] [PASSED] 40 VFs
[11:13:36] [PASSED] 41 VFs
[11:13:36] [PASSED] 42 VFs
[11:13:36] [PASSED] 43 VFs
[11:13:36] [PASSED] 44 VFs
[11:13:36] [PASSED] 45 VFs
[11:13:36] [PASSED] 46 VFs
[11:13:36] [PASSED] 47 VFs
[11:13:36] [PASSED] 48 VFs
[11:13:36] [PASSED] 49 VFs
[11:13:36] [PASSED] 50 VFs
[11:13:36] [PASSED] 51 VFs
[11:13:36] [PASSED] 52 VFs
[11:13:36] [PASSED] 53 VFs
[11:13:36] [PASSED] 54 VFs
[11:13:36] [PASSED] 55 VFs
[11:13:36] [PASSED] 56 VFs
[11:13:36] [PASSED] 57 VFs
[11:13:36] [PASSED] 58 VFs
[11:13:36] [PASSED] 59 VFs
[11:13:36] [PASSED] 60 VFs
[11:13:36] [PASSED] 61 VFs
[11:13:36] [PASSED] 62 VFs
[11:13:36] [PASSED] 63 VFs
[11:13:36] ================= [PASSED] fair_doorbells ==================
[11:13:36] ======================== fair_ggtt  ========================
[11:13:36] [PASSED] 1 VF
[11:13:36] [PASSED] 2 VFs
[11:13:36] [PASSED] 3 VFs
[11:13:36] [PASSED] 4 VFs
[11:13:36] [PASSED] 5 VFs
[11:13:36] [PASSED] 6 VFs
[11:13:36] [PASSED] 7 VFs
[11:13:36] [PASSED] 8 VFs
[11:13:36] [PASSED] 9 VFs
[11:13:36] [PASSED] 10 VFs
[11:13:36] [PASSED] 11 VFs
[11:13:36] [PASSED] 12 VFs
[11:13:36] [PASSED] 13 VFs
[11:13:36] [PASSED] 14 VFs
[11:13:36] [PASSED] 15 VFs
[11:13:36] [PASSED] 16 VFs
[11:13:36] [PASSED] 17 VFs
[11:13:36] [PASSED] 18 VFs
[11:13:36] [PASSED] 19 VFs
[11:13:36] [PASSED] 20 VFs
[11:13:36] [PASSED] 21 VFs
[11:13:36] [PASSED] 22 VFs
[11:13:36] [PASSED] 23 VFs
[11:13:36] [PASSED] 24 VFs
[11:13:36] [PASSED] 25 VFs
[11:13:36] [PASSED] 26 VFs
[11:13:36] [PASSED] 27 VFs
[11:13:36] [PASSED] 28 VFs
[11:13:36] [PASSED] 29 VFs
[11:13:36] [PASSED] 30 VFs
[11:13:36] [PASSED] 31 VFs
[11:13:36] [PASSED] 32 VFs
[11:13:36] [PASSED] 33 VFs
[11:13:36] [PASSED] 34 VFs
[11:13:36] [PASSED] 35 VFs
[11:13:36] [PASSED] 36 VFs
[11:13:36] [PASSED] 37 VFs
[11:13:36] [PASSED] 38 VFs
[11:13:36] [PASSED] 39 VFs
[11:13:36] [PASSED] 40 VFs
[11:13:36] [PASSED] 41 VFs
[11:13:36] [PASSED] 42 VFs
[11:13:36] [PASSED] 43 VFs
[11:13:36] [PASSED] 44 VFs
[11:13:36] [PASSED] 45 VFs
[11:13:36] [PASSED] 46 VFs
[11:13:36] [PASSED] 47 VFs
[11:13:36] [PASSED] 48 VFs
[11:13:36] [PASSED] 49 VFs
[11:13:36] [PASSED] 50 VFs
[11:13:36] [PASSED] 51 VFs
[11:13:36] [PASSED] 52 VFs
[11:13:36] [PASSED] 53 VFs
[11:13:36] [PASSED] 54 VFs
[11:13:36] [PASSED] 55 VFs
[11:13:36] [PASSED] 56 VFs
[11:13:36] [PASSED] 57 VFs
[11:13:36] [PASSED] 58 VFs
[11:13:36] [PASSED] 59 VFs
[11:13:36] [PASSED] 60 VFs
[11:13:36] [PASSED] 61 VFs
[11:13:36] [PASSED] 62 VFs
[11:13:36] [PASSED] 63 VFs
[11:13:36] ==================== [PASSED] fair_ggtt ====================
[11:13:36] ======================== fair_vram  ========================
[11:13:36] [PASSED] 1 VF
[11:13:36] [PASSED] 2 VFs
[11:13:36] [PASSED] 3 VFs
[11:13:36] [PASSED] 4 VFs
[11:13:36] [PASSED] 5 VFs
[11:13:36] [PASSED] 6 VFs
[11:13:36] [PASSED] 7 VFs
[11:13:36] [PASSED] 8 VFs
[11:13:36] [PASSED] 9 VFs
[11:13:36] [PASSED] 10 VFs
[11:13:36] [PASSED] 11 VFs
[11:13:36] [PASSED] 12 VFs
[11:13:36] [PASSED] 13 VFs
[11:13:36] [PASSED] 14 VFs
[11:13:36] [PASSED] 15 VFs
[11:13:36] [PASSED] 16 VFs
[11:13:36] [PASSED] 17 VFs
[11:13:36] [PASSED] 18 VFs
[11:13:36] [PASSED] 19 VFs
[11:13:36] [PASSED] 20 VFs
[11:13:36] [PASSED] 21 VFs
[11:13:36] [PASSED] 22 VFs
[11:13:36] [PASSED] 23 VFs
[11:13:36] [PASSED] 24 VFs
[11:13:36] [PASSED] 25 VFs
[11:13:36] [PASSED] 26 VFs
[11:13:36] [PASSED] 27 VFs
[11:13:36] [PASSED] 28 VFs
[11:13:36] [PASSED] 29 VFs
[11:13:36] [PASSED] 30 VFs
[11:13:36] [PASSED] 31 VFs
[11:13:36] [PASSED] 32 VFs
[11:13:36] [PASSED] 33 VFs
[11:13:36] [PASSED] 34 VFs
[11:13:36] [PASSED] 35 VFs
[11:13:36] [PASSED] 36 VFs
[11:13:36] [PASSED] 37 VFs
[11:13:36] [PASSED] 38 VFs
[11:13:36] [PASSED] 39 VFs
[11:13:36] [PASSED] 40 VFs
[11:13:36] [PASSED] 41 VFs
[11:13:36] [PASSED] 42 VFs
[11:13:36] [PASSED] 43 VFs
[11:13:36] [PASSED] 44 VFs
[11:13:36] [PASSED] 45 VFs
[11:13:36] [PASSED] 46 VFs
[11:13:36] [PASSED] 47 VFs
[11:13:36] [PASSED] 48 VFs
[11:13:36] [PASSED] 49 VFs
[11:13:36] [PASSED] 50 VFs
[11:13:36] [PASSED] 51 VFs
[11:13:36] [PASSED] 52 VFs
[11:13:36] [PASSED] 53 VFs
[11:13:36] [PASSED] 54 VFs
[11:13:36] [PASSED] 55 VFs
[11:13:36] [PASSED] 56 VFs
[11:13:36] [PASSED] 57 VFs
[11:13:36] [PASSED] 58 VFs
[11:13:36] [PASSED] 59 VFs
[11:13:36] [PASSED] 60 VFs
[11:13:36] [PASSED] 61 VFs
[11:13:36] [PASSED] 62 VFs
[11:13:36] [PASSED] 63 VFs
[11:13:36] ==================== [PASSED] fair_vram ====================
[11:13:36] ================== [PASSED] pf_gt_config ===================
[11:13:36] ===================== lmtt (1 subtest) =====================
[11:13:36] ======================== test_ops  =========================
[11:13:36] [PASSED] 2-level
[11:13:36] [PASSED] multi-level
[11:13:36] ==================== [PASSED] test_ops =====================
[11:13:36] ====================== [PASSED] lmtt =======================
[11:13:36] ================= sriov_packet (1 subtest) =================
[11:13:36] [PASSED] test_descriptor_init
[11:13:36] ================== [PASSED] sriov_packet ===================
[11:13:36] ================= pf_service (11 subtests) =================
[11:13:36] [PASSED] pf_negotiate_any
[11:13:36] [PASSED] pf_negotiate_base_match
[11:13:36] [PASSED] pf_negotiate_base_newer
[11:13:36] [PASSED] pf_negotiate_base_next
[11:13:36] [SKIPPED] pf_negotiate_base_older (no older minor)
[11:13:36] [PASSED] pf_negotiate_base_prev
[11:13:36] [PASSED] pf_negotiate_latest_match
[11:13:36] [PASSED] pf_negotiate_latest_newer
[11:13:36] [PASSED] pf_negotiate_latest_next
[11:13:36] [SKIPPED] pf_negotiate_latest_older (no older minor)
[11:13:36] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[11:13:36] =================== [PASSED] pf_service ====================
[11:13:36] ================= xe_guc_g2g (2 subtests) ==================
[11:13:36] ============== xe_live_guc_g2g_kunit_default  ==============
[11:13:36] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:13:36] ============== xe_live_guc_g2g_kunit_allmem  ===============
[11:13:36] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:13:36] =================== [SKIPPED] xe_guc_g2g ===================
[11:13:36] =================== xe_mocs (2 subtests) ===================
[11:13:36] ================ xe_live_mocs_kernel_kunit  ================
[11:13:36] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:13:36] ================ xe_live_mocs_reset_kunit  =================
[11:13:36] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:13:36] ==================== [SKIPPED] xe_mocs =====================
[11:13:36] ================= xe_migrate (2 subtests) ==================
[11:13:36] ================= xe_migrate_sanity_kunit  =================
[11:13:36] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:13:36] ================== xe_validate_ccs_kunit  ==================
[11:13:36] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:13:36] =================== [SKIPPED] xe_migrate ===================
[11:13:36] ================== xe_dma_buf (1 subtest) ==================
[11:13:36] ==================== xe_dma_buf_kunit  =====================
[11:13:36] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:13:36] =================== [SKIPPED] xe_dma_buf ===================
[11:13:36] ================= xe_bo_shrink (1 subtest) =================
[11:13:36] =================== xe_bo_shrink_kunit  ====================
[11:13:36] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:13:36] ================== [SKIPPED] xe_bo_shrink ==================
[11:13:36] ==================== xe_bo (2 subtests) ====================
[11:13:36] ================== xe_ccs_migrate_kunit  ===================
[11:13:36] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:13:36] ==================== xe_bo_evict_kunit  ====================
[11:13:36] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:13:36] ===================== [SKIPPED] xe_bo ======================
[11:13:36] =================== xe_any (9 subtests) ====================
[11:13:36] [PASSED] test_to_xe
[11:13:36] [PASSED] test_to_dev
[11:13:36] [PASSED] test_to_pdev
[11:13:36] [PASSED] test_to_drm
[11:13:36] [PASSED] test_if_pdev
[11:13:36] [PASSED] test_if_xe
[11:13:36] [PASSED] test_if_tile
[11:13:36] [PASSED] test_if_gt
[11:13:36] [PASSED] test_to_id
[11:13:36] ===================== [PASSED] xe_any ======================
[11:13:36] ==================== args (13 subtests) ====================
[11:13:36] [PASSED] count_args_test
[11:13:36] [PASSED] call_args_example
[11:13:36] [PASSED] call_args_test
[11:13:36] [PASSED] drop_first_arg_example
[11:13:36] [PASSED] drop_first_arg_test
[11:13:36] [PASSED] first_arg_example
[11:13:36] [PASSED] first_arg_test
[11:13:36] [PASSED] last_arg_example
[11:13:36] [PASSED] last_arg_test
[11:13:36] [PASSED] pick_arg_example
[11:13:36] [PASSED] if_args_example
[11:13:36] [PASSED] if_args_test
[11:13:36] [PASSED] sep_comma_example
[11:13:36] ====================== [PASSED] args =======================
[11:13:36] =================== xe_pci (3 subtests) ====================
[11:13:36] ==================== check_graphics_ip  ====================
[11:13:36] [PASSED] 12.00 Xe_LP
[11:13:36] [PASSED] 12.10 Xe_LP+
[11:13:36] [PASSED] 12.55 Xe_HPG
[11:13:36] [PASSED] 12.60 Xe_HPC
[11:13:36] [PASSED] 12.70 Xe_LPG
[11:13:36] [PASSED] 12.71 Xe_LPG
[11:13:36] [PASSED] 12.74 Xe_LPG+
[11:13:36] [PASSED] 20.01 Xe2_HPG
[11:13:36] [PASSED] 20.02 Xe2_HPG
[11:13:36] [PASSED] 20.04 Xe2_LPG
[11:13:36] [PASSED] 30.00 Xe3_LPG
[11:13:36] [PASSED] 30.01 Xe3_LPG
[11:13:36] [PASSED] 30.03 Xe3_LPG
[11:13:36] [PASSED] 30.04 Xe3_LPG
[11:13:36] [PASSED] 30.05 Xe3_LPG
[11:13:36] [PASSED] 35.10 Xe3p_LPG
[11:13:36] [PASSED] 35.11 Xe3p_XPC
[11:13:36] ================ [PASSED] check_graphics_ip ================
[11:13:36] ===================== check_media_ip  ======================
[11:13:36] [PASSED] 12.00 Xe_M
[11:13:36] [PASSED] 12.55 Xe_HPM
[11:13:36] [PASSED] 13.00 Xe_LPM+
[11:13:36] [PASSED] 13.01 Xe2_HPM
[11:13:36] [PASSED] 20.00 Xe2_LPM
[11:13:36] [PASSED] 30.00 Xe3_LPM
[11:13:36] [PASSED] 30.02 Xe3_LPM
[11:13:36] [PASSED] 35.00 Xe3p_LPM
[11:13:36] [PASSED] 35.03 Xe3p_HPM
[11:13:36] ================= [PASSED] check_media_ip ==================
[11:13:36] =================== check_platform_desc  ===================
[11:13:36] [PASSED] 0x9A60 (TIGERLAKE)
[11:13:36] [PASSED] 0x9A68 (TIGERLAKE)
[11:13:36] [PASSED] 0x9A70 (TIGERLAKE)
[11:13:36] [PASSED] 0x9A40 (TIGERLAKE)
[11:13:36] [PASSED] 0x9A49 (TIGERLAKE)
[11:13:36] [PASSED] 0x9A59 (TIGERLAKE)
[11:13:36] [PASSED] 0x9A78 (TIGERLAKE)
[11:13:36] [PASSED] 0x9AC0 (TIGERLAKE)
[11:13:36] [PASSED] 0x9AC9 (TIGERLAKE)
[11:13:36] [PASSED] 0x9AD9 (TIGERLAKE)
[11:13:36] [PASSED] 0x9AF8 (TIGERLAKE)
[11:13:36] [PASSED] 0x4C80 (ROCKETLAKE)
[11:13:36] [PASSED] 0x4C8A (ROCKETLAKE)
[11:13:36] [PASSED] 0x4C8B (ROCKETLAKE)
[11:13:36] [PASSED] 0x4C8C (ROCKETLAKE)
[11:13:36] [PASSED] 0x4C90 (ROCKETLAKE)
[11:13:36] [PASSED] 0x4C9A (ROCKETLAKE)
[11:13:36] [PASSED] 0x4680 (ALDERLAKE_S)
[11:13:36] [PASSED] 0x4682 (ALDERLAKE_S)
[11:13:36] [PASSED] 0x4688 (ALDERLAKE_S)
[11:13:36] [PASSED] 0x468A (ALDERLAKE_S)
[11:13:36] [PASSED] 0x468B (ALDERLAKE_S)
[11:13:36] [PASSED] 0x4690 (ALDERLAKE_S)
[11:13:36] [PASSED] 0x4692 (ALDERLAKE_S)
[11:13:36] [PASSED] 0x4693 (ALDERLAKE_S)
[11:13:36] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46AA (ALDERLAKE_P)
[11:13:36] [PASSED] 0x462A (ALDERLAKE_P)
[11:13:36] [PASSED] 0x4626 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x4628 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46B0 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:13:36] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:13:36] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:13:36] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:13:36] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:13:36] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:13:36] [PASSED] 0xA721 (ALDERLAKE_P)
[11:13:36] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:13:36] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:13:36] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:13:36] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:13:36] [PASSED] 0xA720 (ALDERLAKE_P)
[11:13:36] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:13:36] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:13:36] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:13:36] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:13:36] [PASSED] 0xA780 (ALDERLAKE_S)
[11:13:36] [PASSED] 0xA781 (ALDERLAKE_S)
[11:13:36] [PASSED] 0xA782 (ALDERLAKE_S)
[11:13:36] [PASSED] 0xA783 (ALDERLAKE_S)
[11:13:36] [PASSED] 0xA788 (ALDERLAKE_S)
[11:13:36] [PASSED] 0xA789 (ALDERLAKE_S)
[11:13:36] [PASSED] 0xA78A (ALDERLAKE_S)
[11:13:36] [PASSED] 0xA78B (ALDERLAKE_S)
[11:13:36] [PASSED] 0x4905 (DG1)
[11:13:36] [PASSED] 0x4906 (DG1)
[11:13:36] [PASSED] 0x4907 (DG1)
[11:13:36] [PASSED] 0x4908 (DG1)
[11:13:36] [PASSED] 0x4909 (DG1)
[11:13:36] [PASSED] 0x56C0 (DG2)
[11:13:36] [PASSED] 0x56C2 (DG2)
[11:13:36] [PASSED] 0x56C1 (DG2)
[11:13:36] [PASSED] 0x7D51 (METEORLAKE)
[11:13:36] [PASSED] 0x7DD1 (METEORLAKE)
[11:13:36] [PASSED] 0x7D41 (METEORLAKE)
[11:13:36] [PASSED] 0x7D67 (METEORLAKE)
[11:13:36] [PASSED] 0xB640 (METEORLAKE)
[11:13:36] [PASSED] 0x56A0 (DG2)
[11:13:36] [PASSED] 0x56A1 (DG2)
[11:13:36] [PASSED] 0x56A2 (DG2)
[11:13:36] [PASSED] 0x56BE (DG2)
[11:13:36] [PASSED] 0x56BF (DG2)
[11:13:36] [PASSED] 0x5690 (DG2)
[11:13:36] [PASSED] 0x5691 (DG2)
[11:13:36] [PASSED] 0x5692 (DG2)
[11:13:36] [PASSED] 0x56A5 (DG2)
[11:13:36] [PASSED] 0x56A6 (DG2)
[11:13:36] [PASSED] 0x56B0 (DG2)
[11:13:36] [PASSED] 0x56B1 (DG2)
[11:13:36] [PASSED] 0x56BA (DG2)
[11:13:36] [PASSED] 0x56BB (DG2)
[11:13:36] [PASSED] 0x56BC (DG2)
[11:13:36] [PASSED] 0x56BD (DG2)
[11:13:36] [PASSED] 0x5693 (DG2)
[11:13:36] [PASSED] 0x5694 (DG2)
[11:13:36] [PASSED] 0x5695 (DG2)
[11:13:36] [PASSED] 0x56A3 (DG2)
[11:13:36] [PASSED] 0x56A4 (DG2)
[11:13:36] [PASSED] 0x56B2 (DG2)
[11:13:36] [PASSED] 0x56B3 (DG2)
[11:13:36] [PASSED] 0x5696 (DG2)
[11:13:36] [PASSED] 0x5697 (DG2)
[11:13:36] [PASSED] 0xB69 (PVC)
[11:13:36] [PASSED] 0xB6E (PVC)
[11:13:36] [PASSED] 0xBD4 (PVC)
[11:13:36] [PASSED] 0xBD5 (PVC)
[11:13:36] [PASSED] 0xBD6 (PVC)
[11:13:36] [PASSED] 0xBD7 (PVC)
[11:13:36] [PASSED] 0xBD8 (PVC)
[11:13:36] [PASSED] 0xBD9 (PVC)
[11:13:36] [PASSED] 0xBDA (PVC)
[11:13:36] [PASSED] 0xBDB (PVC)
[11:13:36] [PASSED] 0xBE0 (PVC)
[11:13:36] [PASSED] 0xBE1 (PVC)
[11:13:36] [PASSED] 0xBE5 (PVC)
[11:13:36] [PASSED] 0x7D40 (METEORLAKE)
[11:13:36] [PASSED] 0x7D45 (METEORLAKE)
[11:13:36] [PASSED] 0x7D55 (METEORLAKE)
[11:13:36] [PASSED] 0x7D60 (METEORLAKE)
[11:13:36] [PASSED] 0x7DD5 (METEORLAKE)
[11:13:36] [PASSED] 0x6420 (LUNARLAKE)
[11:13:36] [PASSED] 0x64A0 (LUNARLAKE)
[11:13:36] [PASSED] 0x64B0 (LUNARLAKE)
[11:13:36] [PASSED] 0xE202 (BATTLEMAGE)
[11:13:36] [PASSED] 0xE209 (BATTLEMAGE)
[11:13:36] [PASSED] 0xE20B (BATTLEMAGE)
[11:13:36] [PASSED] 0xE20C (BATTLEMAGE)
[11:13:36] [PASSED] 0xE20D (BATTLEMAGE)
[11:13:36] [PASSED] 0xE210 (BATTLEMAGE)
[11:13:36] [PASSED] 0xE211 (BATTLEMAGE)
[11:13:36] [PASSED] 0xE212 (BATTLEMAGE)
[11:13:36] [PASSED] 0xE216 (BATTLEMAGE)
[11:13:36] [PASSED] 0xE220 (BATTLEMAGE)
[11:13:36] [PASSED] 0xE221 (BATTLEMAGE)
[11:13:36] [PASSED] 0xE222 (BATTLEMAGE)
[11:13:36] [PASSED] 0xE223 (BATTLEMAGE)
[11:13:36] [PASSED] 0xB080 (PANTHERLAKE)
[11:13:36] [PASSED] 0xB081 (PANTHERLAKE)
[11:13:36] [PASSED] 0xB082 (PANTHERLAKE)
[11:13:36] [PASSED] 0xB083 (PANTHERLAKE)
[11:13:36] [PASSED] 0xB084 (PANTHERLAKE)
[11:13:36] [PASSED] 0xB085 (PANTHERLAKE)
[11:13:36] [PASSED] 0xB086 (PANTHERLAKE)
[11:13:36] [PASSED] 0xB087 (PANTHERLAKE)
[11:13:36] [PASSED] 0xB08F (PANTHERLAKE)
[11:13:36] [PASSED] 0xB090 (PANTHERLAKE)
[11:13:36] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:13:36] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:13:36] [PASSED] 0xFD80 (PANTHERLAKE)
[11:13:36] [PASSED] 0xFD81 (PANTHERLAKE)
[11:13:36] [PASSED] 0xD740 (NOVALAKE_S)
[11:13:36] [PASSED] 0xD741 (NOVALAKE_S)
[11:13:36] [PASSED] 0xD742 (NOVALAKE_S)
[11:13:36] [PASSED] 0xD743 (NOVALAKE_S)
[11:13:36] [PASSED] 0xD745 (NOVALAKE_S)
[11:13:36] [PASSED] 0xD74A (NOVALAKE_S)
[11:13:36] [PASSED] 0xD74B (NOVALAKE_S)
[11:13:36] [PASSED] 0x674C (CRESCENTISLAND)
[11:13:36] [PASSED] 0x674D (CRESCENTISLAND)
[11:13:36] [PASSED] 0x674E (CRESCENTISLAND)
[11:13:36] [PASSED] 0x674F (CRESCENTISLAND)
[11:13:36] [PASSED] 0x6750 (CRESCENTISLAND)
[11:13:36] [PASSED] 0xD750 (NOVALAKE_P)
[11:13:36] [PASSED] 0xD751 (NOVALAKE_P)
[11:13:36] [PASSED] 0xD752 (NOVALAKE_P)
[11:13:36] [PASSED] 0xD753 (NOVALAKE_P)
[11:13:36] [PASSED] 0xD754 (NOVALAKE_P)
[11:13:36] [PASSED] 0xD755 (NOVALAKE_P)
[11:13:36] [PASSED] 0xD756 (NOVALAKE_P)
[11:13:36] [PASSED] 0xD757 (NOVALAKE_P)
[11:13:36] [PASSED] 0xD75F (NOVALAKE_P)
[11:13:36] =============== [PASSED] check_platform_desc ===============
[11:13:36] ===================== [PASSED] xe_pci ======================
[11:13:36] ============= xe_rtp_tables_test (5 subtests) ==============
[11:13:36] ================== xe_rtp_table_gt_test  ===================
[11:13:36] [PASSED] gt_was/14011060649
[11:13:36] [PASSED] gt_was/14011059788
[11:13:36] [PASSED] gt_was/14015795083
[11:13:36] [PASSED] gt_was/16021867713
[11:13:36] [PASSED] gt_was/14019449301
[11:13:36] [PASSED] gt_was/16028005424
[11:13:36] [PASSED] gt_was/14026578760
[11:13:36] [PASSED] gt_was/1409420604
[11:13:36] [PASSED] gt_was/1408615072
[11:13:36] [PASSED] gt_was/22010523718
[11:13:36] [PASSED] gt_was/14011006942
[11:13:36] [PASSED] gt_was/14014830051
[11:13:36] [PASSED] gt_was/18018781329
[11:13:36] [PASSED] gt_was/1509235366
[11:13:36] [PASSED] gt_was/18018781329
[11:13:36] [PASSED] gt_was/16016694945
[11:13:36] [PASSED] gt_was/14018575942
[11:13:36] [PASSED] gt_was/22016670082
[11:13:36] [PASSED] gt_was/22016670082
[11:13:36] [PASSED] gt_was/14017421178
[11:13:36] [PASSED] gt_was/16025250150
[11:13:36] [PASSED] gt_was/14021871409
[11:13:36] [PASSED] gt_was/16021865536
[11:13:36] [PASSED] gt_was/14021486841
[11:13:36] [PASSED] gt_was/14025160223
[11:13:36] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[11:13:36] [PASSED] gt_was/14025635424
[11:13:36] [PASSED] gt_was/16028005424
[11:13:36] ============== [PASSED] xe_rtp_table_gt_test ===============
[11:13:36] ================== xe_rtp_table_gt_test  ===================
[11:13:36] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[11:13:36] [PASSED] gt_tunings/Tuning: 32B Access Enable
[11:13:36] [PASSED] gt_tunings/Tuning: L3 cache
[11:13:36] [PASSED] gt_tunings/Tuning: L3 cache - media
[11:13:36] [PASSED] gt_tunings/Tuning: Compression Overfetch
[11:13:36] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[11:13:36] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[11:13:36] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[11:13:36] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[11:13:36] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[11:13:36] [PASSED] gt_tunings/Tuning: Stateless compression control
[11:13:36] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[11:13:36] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[11:13:36] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[11:13:36] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[11:13:36] ============== [PASSED] xe_rtp_table_gt_test ===============
[11:13:36] ================== xe_rtp_table_oob_test  ==================
[11:13:36] [PASSED] oob_was/1607983814
[11:13:36] [PASSED] oob_was/16010904313
[11:13:36] [PASSED] oob_was/18022495364
[11:13:36] [PASSED] oob_was/22012773006
[11:13:36] [PASSED] oob_was/14014475959
[11:13:36] [PASSED] oob_was/22011391025
[11:13:36] [PASSED] oob_was/22012727170
[11:13:36] [PASSED] oob_was/22012727685
[11:13:36] [PASSED] oob_was/22016596838
[11:13:36] [PASSED] oob_was/18020744125
[11:13:36] [PASSED] oob_was/1409600907
[11:13:36] [PASSED] oob_was/22014953428
[11:13:36] [PASSED] oob_was/16017236439
[11:13:36] [PASSED] oob_was/14019821291
[11:13:36] [PASSED] oob_was/14015076503
[11:13:36] [PASSED] oob_was/14018913170
[11:13:36] [PASSED] oob_was/14018094691
[11:13:36] [PASSED] oob_was/18024947630
[11:13:36] [PASSED] oob_was/16022287689
[11:13:36] [PASSED] oob_was/13011645652
[11:13:36] [PASSED] oob_was/14022293748
[11:13:36] [PASSED] oob_was/22019794406
[11:13:36] [PASSED] oob_was/22019338487
[11:13:36] [PASSED] oob_was/16023588340
[11:13:36] [PASSED] oob_was/14019789679
[11:13:36] [PASSED] oob_was/14022866841
[11:13:36] [PASSED] oob_was/16021333562
[11:13:36] [PASSED] oob_was/14016712196
[11:13:36] [PASSED] oob_was/14015568240
[11:13:36] [PASSED] oob_was/18013179988
[11:13:36] [PASSED] oob_was/1508761755
[11:13:36] [PASSED] oob_was/16023105232
[11:13:36] [PASSED] oob_was/16026508708
[11:13:36] [PASSED] oob_was/14020001231
[11:13:36] [PASSED] oob_was/16023683509
[11:13:36] [PASSED] oob_was/14025515070
[11:13:36] [PASSED] oob_was/15015404425_disable
[11:13:36] [PASSED] oob_was/16026007364
[11:13:36] [PASSED] oob_was/14020316580
[11:13:36] [PASSED] oob_was/14025883347
[11:13:36] [PASSED] oob_was/16029380221
[11:13:36] [PASSED] oob_was/22022079272
[11:13:36] [PASSED] oob_was/16029897822
[11:13:36] [PASSED] oob_was/14027054324
[11:13:36] ============== [PASSED] xe_rtp_table_oob_test ==============
[11:13:36] ================ xe_rtp_table_dev_oob_test  ================
[11:13:36] [PASSED] device_oob_was/22010954014
[11:13:36] [PASSED] device_oob_was/15015404425
[11:13:36] [PASSED] device_oob_was/22019338487_display
[11:13:36] [PASSED] device_oob_was/14022085890
[11:13:36] [PASSED] device_oob_was/14026539277
[11:13:36] [PASSED] device_oob_was/14026633728
[11:13:36] [PASSED] device_oob_was/14026746987
[11:13:36] [PASSED] device_oob_was/14026779378
[11:13:36] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[11:13:36] ========== xe_rtp_table_missing_upper_bound_test  ==========
[11:13:36] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[11:13:36] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[11:13:36] [PASSED] register_whitelist/1806527549
[11:13:36] [PASSED] register_whitelist/allow_read_ctx_timestamp
[11:13:36] [PASSED] register_whitelist/allow_read_queue_timestamp
[11:13:36] [PASSED] register_whitelist/16014440446
[11:13:36] [PASSED] register_whitelist/16017236439
[11:13:36] [PASSED] register_whitelist/16020183090
[11:13:36] [PASSED] register_whitelist/14024997852
[11:13:36] [PASSED] register_whitelist/14024997852
[11:13:36] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[11:13:36] =============== [PASSED] xe_rtp_tables_test ================
[11:13:36] =================== xe_rtp (3 subtests) ====================
[11:13:36] =================== xe_rtp_rules_tests  ====================
[11:13:36] [PASSED] no
[11:13:36] [PASSED] yes
[11:13:36] [PASSED] no-and-no
[11:13:36] [PASSED] no-and-yes
[11:13:36] [PASSED] yes-and-no
[11:13:36] [PASSED] yes-and-yes
[11:13:36] [PASSED] no-or-no
[11:13:36] [PASSED] no-or-yes
[11:13:36] [PASSED] yes-or-no
[11:13:36] [PASSED] yes-or-yes
[11:13:36] [PASSED] no-yes-or-yes-no
[11:13:36] [PASSED] no-yes-or-yes-yes
[11:13:36] [PASSED] yes-yes-or-no-yes
[11:13:36] [PASSED] yes-yes-or-yes-yes
[11:13:36] [PASSED] no-no-or-yes-or-no
[11:13:36] [PASSED] or
[11:13:36] [PASSED] or-yes
[11:13:36] [PASSED] or-no
[11:13:36] [PASSED] yes-or
[11:13:36] [PASSED] no-or
[11:13:36] [PASSED] no-or-or-yes
[11:13:36] [PASSED] yes-or-or-no
[11:13:36] [PASSED] no-or-or-no
[11:13:36] [PASSED] missing-context-engine-class
[11:13:36] [PASSED] missing-context-engine-class-or-yes
[11:13:36] [PASSED] missing-context-engine-class-or-or-yes
[11:13:36] =============== [PASSED] xe_rtp_rules_tests ================
[11:13:36] =============== xe_rtp_process_to_sr_tests  ================
[11:13:36] [PASSED] coalesce-same-reg
[11:13:36] [PASSED] coalesce-same-reg-literal-and-func
[11:13:36] [PASSED] no-match-no-add
[11:13:36] [PASSED] two-regs-two-entries
[11:13:36] [PASSED] clr-one-set-other
[11:13:36] [PASSED] set-field
[11:13:36] [PASSED] conflict-duplicate
[11:13:36] [PASSED] conflict-not-disjoint
[11:13:36] [PASSED] conflict-not-disjoint-literal-and-func
[11:13:36] [PASSED] conflict-reg-type
[11:13:36] [PASSED] bad-mcr-reg-forced-to-regular
[11:13:36] [PASSED] bad-regular-reg-forced-to-mcr
[11:13:36] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:13:36] ================== xe_rtp_process_tests  ===================
[11:13:36] [PASSED] active1
[11:13:36] [PASSED] active2
[11:13:36] [PASSED] active-inactive
[11:13:36] [PASSED] inactive-active
[11:13:36] [PASSED] inactive-active-inactive
[11:13:36] [PASSED] inactive-inactive-inactive
[11:13:36] ============== [PASSED] xe_rtp_process_tests ===============
[11:13:36] ===================== [PASSED] xe_rtp ======================
[11:13:36] ==================== xe_wa (1 subtest) =====================
[11:13:36] ======================== xe_wa_gt  =========================
[11:13:36] [PASSED] TIGERLAKE B0
[11:13:36] [PASSED] DG1 A0
[11:13:36] [PASSED] DG1 B0
[11:13:36] [PASSED] ALDERLAKE_S A0
[11:13:36] [PASSED] ALDERLAKE_S B0
[11:13:36] [PASSED] ALDERLAKE_S C0
[11:13:36] [PASSED] ALDERLAKE_S D0
[11:13:36] [PASSED] ALDERLAKE_P A0
[11:13:36] [PASSED] ALDERLAKE_P B0
[11:13:36] [PASSED] ALDERLAKE_P C0
[11:13:36] [PASSED] ALDERLAKE_S RPLS D0
[11:13:36] [PASSED] ALDERLAKE_P RPLU E0
[11:13:36] [PASSED] DG2 G10 C0
[11:13:36] [PASSED] DG2 G11 B1
[11:13:36] [PASSED] DG2 G12 A1
[11:13:36] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:13:36] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:13:36] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:13:36] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:13:36] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:13:36] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:13:36] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:13:36] ==================== [PASSED] xe_wa_gt =====================
[11:13:36] ====================== [PASSED] xe_wa ======================
[11:13:36] ============================================================
[11:13:36] Testing complete. Ran 819 tests: passed: 791, skipped: 28
[11:13:36] Elapsed time: 36.424s total, 1.841s configuring, 33.818s building, 0.728s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:13:36] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:13:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:14:03] Starting KUnit Kernel (1/1)...
[11:14:03] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:14:03] ============= refcount_interrupt (4 subtests) ==============
[11:14:03] [PASSED] test_single_irq_change
[11:14:03] [PASSED] test_nested_irq_change
[11:14:03] [PASSED] test_multiple_irq_change
[11:14:03] [PASSED] test_irq_save
[11:14:03] =============== [PASSED] refcount_interrupt ================
[11:14:03] ============ drm_test_pick_cmdline (2 subtests) ============
[11:14:03] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:14:03] =============== drm_test_pick_cmdline_named  ===============
[11:14:03] [PASSED] NTSC
[11:14:03] [PASSED] NTSC-J
[11:14:03] [PASSED] PAL
[11:14:03] [PASSED] PAL-M
[11:14:03] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:14:03] ============== [PASSED] drm_test_pick_cmdline ==============
[11:14:03] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:14:03] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:14:03] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:14:03] =========== drm_validate_clone_mode (2 subtests) ===========
[11:14:03] ============== drm_test_check_in_clone_mode  ===============
[11:14:03] [PASSED] in_clone_mode
[11:14:03] [PASSED] not_in_clone_mode
[11:14:03] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:14:03] =============== drm_test_check_valid_clones  ===============
[11:14:03] [PASSED] not_in_clone_mode
[11:14:03] [PASSED] valid_clone
[11:14:03] [PASSED] invalid_clone
[11:14:03] =========== [PASSED] drm_test_check_valid_clones ===========
[11:14:03] ============= [PASSED] drm_validate_clone_mode =============
[11:14:03] ============= drm_validate_modeset (1 subtest) =============
[11:14:03] [PASSED] drm_test_check_connector_changed_modeset
[11:14:03] ============== [PASSED] drm_validate_modeset ===============
[11:14:03] ====== drm_test_bridge_get_current_state (1 subtest) =======
[11:14:03] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:14:03] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:14:03] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:14:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:14:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:14:03] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[11:14:03] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:14:03] ============== drm_bridge_alloc (2 subtests) ===============
[11:14:03] [PASSED] drm_test_drm_bridge_alloc_basic
[11:14:03] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:14:03] ================ [PASSED] drm_bridge_alloc =================
[11:14:03] ============= drm_bridge_bus_fmt (5 subtests) ==============
[11:14:03] [PASSED] drm_test_bridge_rgb_yuv_rgb
[11:14:03] [PASSED] drm_test_bridge_must_convert_to_yuv444
[11:14:03] [PASSED] drm_test_bridge_hdmi_auto_rgb
[11:14:03] [PASSED] drm_test_bridge_auto_first
[11:14:03] [PASSED] drm_test_bridge_rgb_yuv_no_path
[11:14:03] =============== [PASSED] drm_bridge_bus_fmt ================
[11:14:03] ============= drm_cmdline_parser (40 subtests) =============
[11:14:03] [PASSED] drm_test_cmdline_force_d_only
[11:14:03] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:14:03] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:14:03] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:14:03] [PASSED] drm_test_cmdline_force_e_only
[11:14:03] [PASSED] drm_test_cmdline_res
[11:14:03] [PASSED] drm_test_cmdline_res_vesa
[11:14:03] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:14:03] [PASSED] drm_test_cmdline_res_rblank
[11:14:03] [PASSED] drm_test_cmdline_res_bpp
[11:14:03] [PASSED] drm_test_cmdline_res_refresh
[11:14:03] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:14:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:14:03] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:14:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:14:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:14:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:14:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:14:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:14:03] [PASSED] drm_test_cmdline_res_margins_force_on
[11:14:03] [PASSED] drm_test_cmdline_res_vesa_margins
[11:14:03] [PASSED] drm_test_cmdline_name
[11:14:03] [PASSED] drm_test_cmdline_name_bpp
[11:14:03] [PASSED] drm_test_cmdline_name_option
[11:14:03] [PASSED] drm_test_cmdline_name_bpp_option
[11:14:03] [PASSED] drm_test_cmdline_rotate_0
[11:14:03] [PASSED] drm_test_cmdline_rotate_90
[11:14:03] [PASSED] drm_test_cmdline_rotate_180
[11:14:03] [PASSED] drm_test_cmdline_rotate_270
[11:14:03] [PASSED] drm_test_cmdline_hmirror
[11:14:03] [PASSED] drm_test_cmdline_vmirror
[11:14:03] [PASSED] drm_test_cmdline_margin_options
[11:14:03] [PASSED] drm_test_cmdline_multiple_options
[11:14:03] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:14:03] [PASSED] drm_test_cmdline_extra_and_option
[11:14:03] [PASSED] drm_test_cmdline_freestanding_options
[11:14:03] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:14:03] [PASSED] drm_test_cmdline_panel_orientation
[11:14:03] ================ drm_test_cmdline_invalid  =================
[11:14:03] [PASSED] margin_only
[11:14:03] [PASSED] interlace_only
[11:14:03] [PASSED] res_missing_x
[11:14:03] [PASSED] res_missing_y
[11:14:03] [PASSED] res_bad_y
[11:14:03] [PASSED] res_missing_y_bpp
[11:14:03] [PASSED] res_bad_bpp
[11:14:03] [PASSED] res_bad_refresh
[11:14:03] [PASSED] res_bpp_refresh_force_on_off
[11:14:03] [PASSED] res_invalid_mode
[11:14:03] [PASSED] res_bpp_wrong_place_mode
[11:14:03] [PASSED] name_bpp_refresh
[11:14:03] [PASSED] name_refresh
[11:14:03] [PASSED] name_refresh_wrong_mode
[11:14:03] [PASSED] name_refresh_invalid_mode
[11:14:03] [PASSED] rotate_multiple
[11:14:03] [PASSED] rotate_invalid_val
[11:14:03] [PASSED] rotate_truncated
[11:14:03] [PASSED] invalid_option
[11:14:03] [PASSED] invalid_tv_option
[11:14:03] [PASSED] truncated_tv_option
[11:14:03] ============ [PASSED] drm_test_cmdline_invalid =============
[11:14:03] =============== drm_test_cmdline_tv_options  ===============
[11:14:03] [PASSED] NTSC
[11:14:03] [PASSED] NTSC_443
[11:14:03] [PASSED] NTSC_J
[11:14:03] [PASSED] PAL
[11:14:03] [PASSED] PAL_M
[11:14:03] [PASSED] PAL_N
[11:14:03] [PASSED] SECAM
[11:14:03] [PASSED] MONO_525
[11:14:03] [PASSED] MONO_625
[11:14:03] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:14:03] =============== [PASSED] drm_cmdline_parser ================
[11:14:03] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:14:03] [PASSED] drm_test_connector_hdmi_init_valid
[11:14:03] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:14:03] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:14:03] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:14:03] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:14:03] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:14:03] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:14:03] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:14:03] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[11:14:03] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:14:03] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:14:03] [PASSED] supported_formats=0x5 yuv420_allowed=1
[11:14:03] [PASSED] supported_formats=0x5 yuv420_allowed=0
[11:14:03] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:14:03] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:14:03] [PASSED] drm_test_connector_hdmi_init_null_product
[11:14:03] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:14:03] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:14:03] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:14:03] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:14:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:14:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:14:03] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:14:03] ========= drm_test_connector_hdmi_init_type_valid  =========
[11:14:03] [PASSED] HDMI-A
[11:14:03] [PASSED] HDMI-B
[11:14:03] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:14:03] ======== drm_test_connector_hdmi_init_type_invalid  ========
[11:14:03] [PASSED] Unknown
[11:14:03] [PASSED] VGA
[11:14:03] [PASSED] DVI-I
[11:14:03] [PASSED] DVI-D
[11:14:03] [PASSED] DVI-A
[11:14:03] [PASSED] Composite
[11:14:03] [PASSED] SVIDEO
[11:14:03] [PASSED] LVDS
[11:14:03] [PASSED] Component
[11:14:03] [PASSED] DIN
[11:14:03] [PASSED] DP
[11:14:03] [PASSED] TV
[11:14:03] [PASSED] eDP
[11:14:03] [PASSED] Virtual
[11:14:03] [PASSED] DSI
[11:14:03] [PASSED] DPI
[11:14:03] [PASSED] Writeback
[11:14:03] [PASSED] SPI
[11:14:03] [PASSED] USB
[11:14:03] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:14:03] ============ [PASSED] drmm_connector_hdmi_init =============
[11:14:03] ============= drmm_connector_init (3 subtests) =============
[11:14:03] [PASSED] drm_test_drmm_connector_init
[11:14:03] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:14:03] ========= drm_test_drmm_connector_init_type_valid  =========
[11:14:03] [PASSED] Unknown
[11:14:03] [PASSED] VGA
[11:14:03] [PASSED] DVI-I
[11:14:03] [PASSED] DVI-D
[11:14:03] [PASSED] DVI-A
[11:14:03] [PASSED] Composite
[11:14:03] [PASSED] SVIDEO
[11:14:03] [PASSED] LVDS
[11:14:03] [PASSED] Component
[11:14:03] [PASSED] DIN
[11:14:03] [PASSED] DP
[11:14:03] [PASSED] HDMI-A
[11:14:03] [PASSED] HDMI-B
[11:14:03] [PASSED] TV
[11:14:03] [PASSED] eDP
[11:14:03] [PASSED] Virtual
[11:14:03] [PASSED] DSI
[11:14:03] [PASSED] DPI
[11:14:03] [PASSED] Writeback
[11:14:03] [PASSED] SPI
[11:14:03] [PASSED] USB
[11:14:03] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:14:03] =============== [PASSED] drmm_connector_init ===============
[11:14:03] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_init
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:14:03] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[11:14:03] [PASSED] Unknown
[11:14:03] [PASSED] VGA
[11:14:03] [PASSED] DVI-I
[11:14:03] [PASSED] DVI-D
[11:14:03] [PASSED] DVI-A
[11:14:03] [PASSED] Composite
[11:14:03] [PASSED] SVIDEO
[11:14:03] [PASSED] LVDS
[11:14:03] [PASSED] Component
[11:14:03] [PASSED] DIN
[11:14:03] [PASSED] DP
[11:14:03] [PASSED] HDMI-A
[11:14:03] [PASSED] HDMI-B
[11:14:03] [PASSED] TV
[11:14:03] [PASSED] eDP
[11:14:03] [PASSED] Virtual
[11:14:03] [PASSED] DSI
[11:14:03] [PASSED] DPI
[11:14:03] [PASSED] Writeback
[11:14:03] [PASSED] SPI
[11:14:03] [PASSED] USB
[11:14:03] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:14:03] ======== drm_test_drm_connector_dynamic_init_name  =========
[11:14:03] [PASSED] Unknown
[11:14:03] [PASSED] VGA
[11:14:03] [PASSED] DVI-I
[11:14:03] [PASSED] DVI-D
[11:14:03] [PASSED] DVI-A
[11:14:03] [PASSED] Composite
[11:14:03] [PASSED] SVIDEO
[11:14:03] [PASSED] LVDS
[11:14:03] [PASSED] Component
[11:14:03] [PASSED] DIN
[11:14:03] [PASSED] DP
[11:14:03] [PASSED] HDMI-A
[11:14:03] [PASSED] HDMI-B
[11:14:03] [PASSED] TV
[11:14:03] [PASSED] eDP
[11:14:03] [PASSED] Virtual
[11:14:03] [PASSED] DSI
[11:14:03] [PASSED] DPI
[11:14:03] [PASSED] Writeback
[11:14:03] [PASSED] SPI
[11:14:03] [PASSED] USB
[11:14:03] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:14:03] =========== [PASSED] drm_connector_dynamic_init ============
[11:14:03] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:14:03] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:14:03] ======= drm_connector_dynamic_register (7 subtests) ========
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:14:03] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:14:03] ========= [PASSED] drm_connector_dynamic_register ==========
[11:14:03] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:14:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:14:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:14:03] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:14:03] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:14:03] ========== drm_test_get_tv_mode_from_name_valid  ===========
[11:14:03] [PASSED] NTSC
[11:14:03] [PASSED] NTSC-443
[11:14:03] [PASSED] NTSC-J
[11:14:03] [PASSED] PAL
[11:14:03] [PASSED] PAL-M
[11:14:03] [PASSED] PAL-N
[11:14:03] [PASSED] SECAM
[11:14:03] [PASSED] Mono
[11:14:03] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:14:03] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:14:03] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:14:03] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:14:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:14:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:14:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:14:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:14:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:14:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:14:03] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[11:14:03] [PASSED] VIC 96
[11:14:03] [PASSED] VIC 97
[11:14:03] [PASSED] VIC 101
[11:14:03] [PASSED] VIC 102
[11:14:03] [PASSED] VIC 106
[11:14:03] [PASSED] VIC 107
[11:14:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:14:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:14:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:14:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:14:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:14:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:14:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:14:03] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:14:03] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[11:14:03] [PASSED] Automatic
[11:14:03] [PASSED] Full
[11:14:03] [PASSED] Limited 16:235
[11:14:03] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:14:03] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:14:03] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:14:03] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:14:03] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[11:14:03] [PASSED] RGB
[11:14:03] [PASSED] YUV 4:2:0
[11:14:03] [PASSED] YUV 4:2:2
[11:14:03] [PASSED] YUV 4:4:4
[11:14:03] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:14:03] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:14:03] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:14:03] ============= drm_damage_helper (21 subtests) ==============
[11:14:03] [PASSED] drm_test_damage_iter_no_damage
[11:14:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:14:03] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:14:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:14:03] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:14:03] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:14:03] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:14:03] [PASSED] drm_test_damage_iter_simple_damage
[11:14:03] [PASSED] drm_test_damage_iter_single_damage
[11:14:03] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:14:03] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:14:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:14:03] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:14:03] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:14:03] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:14:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:14:03] [PASSED] drm_test_damage_iter_damage
[11:14:03] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:14:03] [PASSED] drm_test_damage_iter_damage_one_outside
[11:14:03] [PASSED] drm_test_damage_iter_damage_src_moved
[11:14:03] [PASSED] drm_test_damage_iter_damage_not_visible
[11:14:03] ================ [PASSED] drm_damage_helper ================
[11:14:03] ============== drm_dp_mst_helper (3 subtests) ==============
[11:14:03] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[11:14:03] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:14:03] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:14:03] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:14:03] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:14:03] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:14:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:14:03] ============== drm_test_dp_mst_calc_pbn_div  ===============
[11:14:03] [PASSED] Link rate 2000000 lane count 4
[11:14:03] [PASSED] Link rate 2000000 lane count 2
[11:14:03] [PASSED] Link rate 2000000 lane count 1
[11:14:03] [PASSED] Link rate 1350000 lane count 4
[11:14:03] [PASSED] Link rate 1350000 lane count 2
[11:14:03] [PASSED] Link rate 1350000 lane count 1
[11:14:03] [PASSED] Link rate 1000000 lane count 4
[11:14:03] [PASSED] Link rate 1000000 lane count 2
[11:14:03] [PASSED] Link rate 1000000 lane count 1
[11:14:03] [PASSED] Link rate 810000 lane count 4
[11:14:03] [PASSED] Link rate 810000 lane count 2
[11:14:03] [PASSED] Link rate 810000 lane count 1
[11:14:03] [PASSED] Link rate 540000 lane count 4
[11:14:03] [PASSED] Link rate 540000 lane count 2
[11:14:03] [PASSED] Link rate 540000 lane count 1
[11:14:03] [PASSED] Link rate 270000 lane count 4
[11:14:03] [PASSED] Link rate 270000 lane count 2
[11:14:03] [PASSED] Link rate 270000 lane count 1
[11:14:03] [PASSED] Link rate 162000 lane count 4
[11:14:03] [PASSED] Link rate 162000 lane count 2
[11:14:03] [PASSED] Link rate 162000 lane count 1
[11:14:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:14:03] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[11:14:03] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:14:03] [PASSED] DP_POWER_UP_PHY with port number
[11:14:03] [PASSED] DP_POWER_DOWN_PHY with port number
[11:14:03] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:14:03] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:14:03] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:14:03] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:14:03] [PASSED] DP_QUERY_PAYLOAD with port number
[11:14:03] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:14:03] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:14:03] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:14:03] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:14:03] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:14:03] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:14:03] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:14:03] [PASSED] DP_REMOTE_I2C_READ with port number
[11:14:03] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:14:03] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:14:03] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:14:03] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:14:03] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:14:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:14:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:14:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:14:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:14:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:14:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:14:03] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:14:03] ================ [PASSED] drm_dp_mst_helper ================
[11:14:03] ================== drm_exec (7 subtests) ===================
[11:14:03] [PASSED] sanitycheck
[11:14:03] [PASSED] test_lock
[11:14:03] [PASSED] test_lock_unlock
[11:14:03] [PASSED] test_duplicates
[11:14:03] [PASSED] test_prepare
[11:14:03] [PASSED] test_prepare_array
[11:14:03] [PASSED] test_multiple_loops
[11:14:03] ==================== [PASSED] drm_exec =====================
[11:14:03] =========== drm_format_helper_test (17 subtests) ===========
[11:14:03] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:14:03] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:14:03] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:14:03] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:14:03] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:14:03] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:14:03] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:14:03] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:14:03] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:14:03] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:14:03] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:14:03] ============== drm_test_fb_xrgb8888_to_mono  ===============
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:14:03] ==================== drm_test_fb_swab  =====================
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ================ [PASSED] drm_test_fb_swab =================
[11:14:03] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:14:03] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[11:14:03] [PASSED] single_pixel_source_buffer
[11:14:03] [PASSED] single_pixel_clip_rectangle
[11:14:03] [PASSED] well_known_colors
[11:14:03] [PASSED] destination_pitch
[11:14:03] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:14:03] ================= drm_test_fb_clip_offset  =================
[11:14:03] [PASSED] pass through
[11:14:03] [PASSED] horizontal offset
[11:14:03] [PASSED] vertical offset
[11:14:03] [PASSED] horizontal and vertical offset
[11:14:03] [PASSED] horizontal offset (custom pitch)
[11:14:03] [PASSED] vertical offset (custom pitch)
[11:14:03] [PASSED] horizontal and vertical offset (custom pitch)
[11:14:03] ============= [PASSED] drm_test_fb_clip_offset =============
[11:14:03] =================== drm_test_fb_memcpy  ====================
[11:14:03] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:14:03] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:14:03] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:14:03] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:14:03] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:14:03] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:14:03] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:14:03] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:14:03] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:14:03] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:14:03] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:14:03] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:14:03] =============== [PASSED] drm_test_fb_memcpy ================
[11:14:03] ============= [PASSED] drm_format_helper_test ==============
[11:14:03] ================= drm_format (18 subtests) =================
[11:14:03] [PASSED] drm_test_format_block_width_invalid
[11:14:03] [PASSED] drm_test_format_block_width_one_plane
[11:14:03] [PASSED] drm_test_format_block_width_two_plane
[11:14:03] [PASSED] drm_test_format_block_width_three_plane
[11:14:03] [PASSED] drm_test_format_block_width_tiled
[11:14:03] [PASSED] drm_test_format_block_height_invalid
[11:14:03] [PASSED] drm_test_format_block_height_one_plane
[11:14:03] [PASSED] drm_test_format_block_height_two_plane
[11:14:03] [PASSED] drm_test_format_block_height_three_plane
[11:14:03] [PASSED] drm_test_format_block_height_tiled
[11:14:03] [PASSED] drm_test_format_min_pitch_invalid
[11:14:03] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:14:03] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:14:03] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:14:03] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:14:03] [PASSED] drm_test_format_min_pitch_two_plane
[11:14:03] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:14:03] [PASSED] drm_test_format_min_pitch_tiled
[11:14:03] =================== [PASSED] drm_format ====================
[11:14:03] ============== drm_framebuffer (10 subtests) ===============
[11:14:03] ========== drm_test_framebuffer_check_src_coords  ==========
[11:14:03] [PASSED] Success: source fits into fb
[11:14:03] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:14:03] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:14:03] [PASSED] Fail: overflowing fb with source width
[11:14:03] [PASSED] Fail: overflowing fb with source height
[11:14:03] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:14:03] [PASSED] drm_test_framebuffer_cleanup
[11:14:03] =============== drm_test_framebuffer_create  ===============
[11:14:03] [PASSED] ABGR8888 normal sizes
[11:14:03] [PASSED] ABGR8888 max sizes
[11:14:03] [PASSED] ABGR8888 pitch greater than min required
[11:14:03] [PASSED] ABGR8888 pitch less than min required
[11:14:03] [PASSED] ABGR8888 Invalid width
[11:14:03] [PASSED] ABGR8888 Invalid buffer handle
[11:14:03] [PASSED] No pixel format
[11:14:03] [PASSED] ABGR8888 Width 0
[11:14:03] [PASSED] ABGR8888 Height 0
[11:14:03] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:14:03] [PASSED] ABGR8888 Large buffer offset
[11:14:03] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:14:03] [PASSED] ABGR8888 Invalid flag
[11:14:03] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:14:03] [PASSED] ABGR8888 Valid buffer modifier
[11:14:03] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:14:03] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:14:03] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:14:03] [PASSED] NV12 Normal sizes
[11:14:03] [PASSED] NV12 Max sizes
[11:14:03] [PASSED] NV12 Invalid pitch
[11:14:03] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:14:03] [PASSED] NV12 different  modifier per-plane
[11:14:03] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:14:03] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:14:03] [PASSED] NV12 Modifier for inexistent plane
[11:14:03] [PASSED] NV12 Handle for inexistent plane
[11:14:03] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:14:03] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:14:03] [PASSED] YVU420 Normal sizes
[11:14:03] [PASSED] YVU420 Max sizes
[11:14:03] [PASSED] YVU420 Invalid pitch
[11:14:03] [PASSED] YVU420 Different pitches
[11:14:03] [PASSED] YVU420 Different buffer offsets/pitches
[11:14:03] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:14:03] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:14:03] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:14:03] [PASSED] YVU420 Valid modifier
[11:14:03] [PASSED] YVU420 Different modifiers per plane
[11:14:03] [PASSED] YVU420 Modifier for inexistent plane
[11:14:03] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:14:03] [PASSED] X0L2 Normal sizes
[11:14:03] [PASSED] X0L2 Max sizes
[11:14:03] [PASSED] X0L2 Invalid pitch
[11:14:03] [PASSED] X0L2 Pitch greater than minimum required
[11:14:03] [PASSED] X0L2 Handle for inexistent plane
[11:14:03] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:14:03] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:14:03] [PASSED] X0L2 Valid modifier
[11:14:03] [PASSED] X0L2 Modifier for inexistent plane
[11:14:03] =========== [PASSED] drm_test_framebuffer_create ===========
[11:14:03] [PASSED] drm_test_framebuffer_free
[11:14:03] [PASSED] drm_test_framebuffer_init
[11:14:03] [PASSED] drm_test_framebuffer_init_bad_format
[11:14:03] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:14:03] [PASSED] drm_test_framebuffer_lookup
[11:14:03] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:14:03] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:14:03] ================= [PASSED] drm_framebuffer =================
[11:14:03] ================ drm_gem_shmem (8 subtests) ================
[11:14:03] [PASSED] drm_gem_shmem_test_obj_create
[11:14:03] [PASSED] drm_gem_shmem_test_obj_create_private
[11:14:03] [PASSED] drm_gem_shmem_test_pin_pages
[11:14:03] [PASSED] drm_gem_shmem_test_vmap
[11:14:03] [PASSED] drm_gem_shmem_test_get_sg_table
[11:14:03] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:14:03] [PASSED] drm_gem_shmem_test_madvise
[11:14:03] [PASSED] drm_gem_shmem_test_purge
[11:14:03] ================== [PASSED] drm_gem_shmem ==================
[11:14:03] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[11:14:03] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:14:03] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:14:03] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:14:03] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:14:03] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:14:03] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:14:03] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[11:14:03] [PASSED] Automatic
[11:14:03] [PASSED] Full
[11:14:03] [PASSED] Limited 16:235
[11:14:03] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:14:03] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:14:03] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:14:03] [PASSED] drm_test_check_disable_connector
[11:14:03] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:14:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:14:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:14:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:14:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:14:03] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:14:03] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:14:03] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:14:03] [PASSED] drm_test_check_output_bpc_dvi
[11:14:03] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:14:03] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:14:03] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:14:03] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:14:03] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:14:03] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:14:03] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:14:03] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:14:03] ============ drm_test_check_hdmi_color_format  =============
[11:14:03] [PASSED] AUTO -> RGB
[11:14:03] [PASSED] YCBCR422 -> YUV422
[11:14:03] [PASSED] YCBCR420 -> YUV420
[11:14:03] [PASSED] YCBCR444 -> YUV444
[11:14:03] [PASSED] RGB -> RGB
[11:14:03] ======== [PASSED] drm_test_check_hdmi_color_format =========
[11:14:03] ======== drm_test_check_hdmi_color_format_420_only  ========
[11:14:03] [PASSED] RGB should fail
[11:14:03] [PASSED] YUV444 should fail
[11:14:03] [PASSED] YUV422 should fail
[11:14:03] [PASSED] YUV420 should work
[11:14:03] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[11:14:03] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:14:03] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:14:03] [PASSED] drm_test_check_broadcast_rgb_value
[11:14:03] [PASSED] drm_test_check_bpc_8_value
[11:14:03] [PASSED] drm_test_check_bpc_10_value
[11:14:03] [PASSED] drm_test_check_bpc_12_value
[11:14:03] [PASSED] drm_test_check_format_value
[11:14:03] [PASSED] drm_test_check_tmds_char_value
[11:14:03] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:14:03] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[11:14:03] [PASSED] drm_test_check_mode_valid
[11:14:03] [PASSED] drm_test_check_mode_valid_reject
[11:14:03] [PASSED] drm_test_check_mode_valid_reject_rate
[11:14:03] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:14:03] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[11:14:03] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[11:14:03] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[11:14:03] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:14:03] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[11:14:03] [PASSED] drm_test_check_infoframes
[11:14:03] [PASSED] drm_test_check_reject_avi_infoframe
[11:14:03] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[11:14:03] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[11:14:03] [PASSED] drm_test_check_reject_audio_infoframe
[11:14:03] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[11:14:03] ================= drm_managed (2 subtests) =================
[11:14:03] [PASSED] drm_test_managed_release_action
[11:14:03] [PASSED] drm_test_managed_run_action
[11:14:03] =================== [PASSED] drm_managed ===================
[11:14:03] =================== drm_mm (6 subtests) ====================
[11:14:03] [PASSED] drm_test_mm_init
[11:14:03] [PASSED] drm_test_mm_debug
[11:14:03] [PASSED] drm_test_mm_align32
[11:14:03] [PASSED] drm_test_mm_align64
[11:14:03] [PASSED] drm_test_mm_lowest
[11:14:03] [PASSED] drm_test_mm_highest
[11:14:03] ===================== [PASSED] drm_mm ======================
[11:14:03] ============= drm_modes_analog_tv (5 subtests) =============
[11:14:03] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:14:03] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:14:03] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:14:03] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:14:03] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:14:03] =============== [PASSED] drm_modes_analog_tv ===============
[11:14:03] ============== drm_panic_helper (3 subtests) ===============
[11:14:03] ============= drm_test_panic_screen_user_map  ==============
[11:14:03] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[11:14:03] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[11:14:03] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[11:14:03] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[11:14:03] ========= [PASSED] drm_test_panic_screen_user_map ==========
[11:14:03] ============= drm_test_panic_screen_user_page  =============
[11:14:03] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[11:14:03] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[11:14:03] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[11:14:03] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[11:14:03] ========= [PASSED] drm_test_panic_screen_user_page =========
[11:14:03] ========== drm_test_panic_screen_user_set_pixel  ===========
[11:14:03] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[11:14:03] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[11:14:04] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[11:14:04] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[11:14:04] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[11:14:04] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[11:14:04] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[11:14:04] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[11:14:04] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[11:14:04] ================ [PASSED] drm_panic_helper =================
[11:14:04] ============== drm_plane_helper (2 subtests) ===============
[11:14:04] =============== drm_test_check_plane_state  ================
[11:14:04] [PASSED] clipping_simple
[11:14:04] [PASSED] clipping_rotate_reflect
[11:14:04] [PASSED] positioning_simple
[11:14:04] [PASSED] upscaling
[11:14:04] [PASSED] downscaling
[11:14:04] [PASSED] rounding1
[11:14:04] [PASSED] rounding2
[11:14:04] [PASSED] rounding3
[11:14:04] [PASSED] rounding4
[11:14:04] =========== [PASSED] drm_test_check_plane_state ============
[11:14:04] =========== drm_test_check_invalid_plane_state  ============
[11:14:04] [PASSED] positioning_invalid
[11:14:04] [PASSED] upscaling_invalid
[11:14:04] [PASSED] downscaling_invalid
[11:14:04] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:14:04] ================ [PASSED] drm_plane_helper =================
[11:14:04] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:14:04] ====== drm_test_connector_helper_tv_get_modes_check  =======
[11:14:04] [PASSED] None
[11:14:04] [PASSED] PAL
[11:14:04] [PASSED] NTSC
[11:14:04] [PASSED] Both, NTSC Default
[11:14:04] [PASSED] Both, PAL Default
[11:14:04] [PASSED] Both, NTSC Default, with PAL on command-line
[11:14:04] [PASSED] Both, PAL Default, with NTSC on command-line
[11:14:04] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:14:04] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:14:04] ================== drm_rect (9 subtests) ===================
[11:14:04] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:14:04] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:14:04] [PASSED] drm_test_rect_clip_scaled_clipped
[11:14:04] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:14:04] ================= drm_test_rect_intersect  =================
[11:14:04] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:14:04] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:14:04] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:14:04] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:14:04] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:14:04] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:14:04] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:14:04] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:14:04] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:14:04] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:14:04] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:14:04] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:14:04] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:14:04] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:14:04] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:14:04] ============= [PASSED] drm_test_rect_intersect =============
[11:14:04] ================ drm_test_rect_calc_hscale  ================
[11:14:04] [PASSED] normal use
[11:14:04] [PASSED] out of max range
[11:14:04] [PASSED] out of min range
[11:14:04] [PASSED] zero dst
[11:14:04] [PASSED] negative src
[11:14:04] [PASSED] negative dst
[11:14:04] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:14:04] ================ drm_test_rect_calc_vscale  ================
[11:14:04] [PASSED] normal use
[11:14:04] [PASSED] out of max range
[11:14:04] [PASSED] out of min range
[11:14:04] [PASSED] zero dst
[11:14:04] [PASSED] negative src
[11:14:04] [PASSED] negative dst
[11:14:04] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:14:04] ================== drm_test_rect_rotate  ===================
[11:14:04] [PASSED] reflect-x
[11:14:04] [PASSED] reflect-y
[11:14:04] [PASSED] rotate-0
[11:14:04] [PASSED] rotate-90
[11:14:04] [PASSED] rotate-180
[11:14:04] [PASSED] rotate-270
[11:14:04] ============== [PASSED] drm_test_rect_rotate ===============
[11:14:04] ================ drm_test_rect_rotate_inv  =================
[11:14:04] [PASSED] reflect-x
[11:14:04] [PASSED] reflect-y
[11:14:04] [PASSED] rotate-0
[11:14:04] [PASSED] rotate-90
[11:14:04] [PASSED] rotate-180
[11:14:04] [PASSED] rotate-270
[11:14:04] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:14:04] ==================== [PASSED] drm_rect =====================
[11:14:04] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:14:04] ============ drm_test_sysfb_build_fourcc_list  =============
[11:14:04] [PASSED] no native formats
[11:14:04] [PASSED] XRGB8888 as native format
[11:14:04] [PASSED] remove duplicates
[11:14:04] [PASSED] convert alpha formats
[11:14:04] [PASSED] random formats
[11:14:04] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:14:04] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:14:04] ================== drm_fixp (2 subtests) ===================
[11:14:04] [PASSED] drm_test_int2fixp
[11:14:04] [PASSED] drm_test_sm2fixp
[11:14:04] ==================== [PASSED] drm_fixp =====================
[11:14:04] ============================================================
[11:14:04] Testing complete. Ran 671 tests: passed: 671
[11:14:04] Elapsed time: 27.182s total, 1.814s configuring, 24.899s building, 0.417s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:14:04] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:14:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:14:16] Starting KUnit Kernel (1/1)...
[11:14:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:14:16] ============= refcount_interrupt (4 subtests) ==============
[11:14:16] [PASSED] test_single_irq_change
[11:14:16] [PASSED] test_nested_irq_change
[11:14:16] [PASSED] test_multiple_irq_change
[11:14:16] [PASSED] test_irq_save
[11:14:16] =============== [PASSED] refcount_interrupt ================
[11:14:16] ================= ttm_device (5 subtests) ==================
[11:14:16] [PASSED] ttm_device_init_basic
[11:14:16] [PASSED] ttm_device_init_multiple
[11:14:16] [PASSED] ttm_device_fini_basic
[11:14:16] [PASSED] ttm_device_init_no_vma_man
[11:14:16] ================== ttm_device_init_pools  ==================
[11:14:16] [PASSED] No DMA allocations, no DMA32 required
[11:14:16] [PASSED] DMA allocations, DMA32 required
[11:14:16] [PASSED] No DMA allocations, DMA32 required
[11:14:16] [PASSED] DMA allocations, no DMA32 required
[11:14:16] ============== [PASSED] ttm_device_init_pools ==============
[11:14:16] =================== [PASSED] ttm_device ====================
[11:14:16] ================== ttm_pool (8 subtests) ===================
[11:14:16] ================== ttm_pool_alloc_basic  ===================
[11:14:16] [PASSED] One page
[11:14:16] [PASSED] More than one page
[11:14:16] [PASSED] Above the allocation limit
[11:14:16] [PASSED] One page, with coherent DMA mappings enabled
[11:14:16] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:14:16] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:14:16] ============== ttm_pool_alloc_basic_dma_addr  ==============
[11:14:16] [PASSED] One page
[11:14:16] [PASSED] More than one page
[11:14:16] [PASSED] Above the allocation limit
[11:14:16] [PASSED] One page, with coherent DMA mappings enabled
[11:14:16] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:14:16] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:14:16] [PASSED] ttm_pool_alloc_order_caching_match
[11:14:16] [PASSED] ttm_pool_alloc_caching_mismatch
[11:14:16] [PASSED] ttm_pool_alloc_order_mismatch
[11:14:16] [PASSED] ttm_pool_free_dma_alloc
[11:14:16] [PASSED] ttm_pool_free_no_dma_alloc
[11:14:16] [PASSED] ttm_pool_fini_basic
[11:14:16] ==================== [PASSED] ttm_pool =====================
[11:14:16] ================ ttm_resource (8 subtests) =================
[11:14:16] ================= ttm_resource_init_basic  =================
[11:14:16] [PASSED] Init resource in TTM_PL_SYSTEM
[11:14:16] [PASSED] Init resource in TTM_PL_VRAM
[11:14:16] [PASSED] Init resource in a private placement
[11:14:16] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:14:16] ============= [PASSED] ttm_resource_init_basic =============
[11:14:16] [PASSED] ttm_resource_init_pinned
[11:14:16] [PASSED] ttm_resource_fini_basic
[11:14:16] [PASSED] ttm_resource_manager_init_basic
[11:14:16] [PASSED] ttm_resource_manager_usage_basic
[11:14:16] [PASSED] ttm_resource_manager_set_used_basic
[11:14:16] [PASSED] ttm_sys_man_alloc_basic
[11:14:16] [PASSED] ttm_sys_man_free_basic
[11:14:16] ================== [PASSED] ttm_resource ===================
[11:14:16] =================== ttm_tt (15 subtests) ===================
[11:14:16] ==================== ttm_tt_init_basic  ====================
[11:14:16] [PASSED] Page-aligned size
[11:14:16] [PASSED] Extra pages requested
[11:14:16] ================ [PASSED] ttm_tt_init_basic ================
[11:14:16] [PASSED] ttm_tt_init_misaligned
[11:14:16] [PASSED] ttm_tt_fini_basic
[11:14:16] [PASSED] ttm_tt_fini_sg
[11:14:16] [PASSED] ttm_tt_fini_shmem
[11:14:16] [PASSED] ttm_tt_create_basic
[11:14:16] [PASSED] ttm_tt_create_invalid_bo_type
[11:14:16] [PASSED] ttm_tt_create_ttm_exists
[11:14:16] [PASSED] ttm_tt_create_failed
[11:14:16] [PASSED] ttm_tt_destroy_basic
[11:14:16] [PASSED] ttm_tt_populate_null_ttm
[11:14:16] [PASSED] ttm_tt_populate_populated_ttm
[11:14:16] [PASSED] ttm_tt_unpopulate_basic
[11:14:16] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:14:16] [PASSED] ttm_tt_swapin_basic
[11:14:16] ===================== [PASSED] ttm_tt ======================
[11:14:16] =================== ttm_bo (14 subtests) ===================
[11:14:16] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[11:14:16] [PASSED] Cannot be interrupted and sleeps
[11:14:16] [PASSED] Cannot be interrupted, locks straight away
[11:14:16] [PASSED] Can be interrupted, sleeps
[11:14:16] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:14:16] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:14:16] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:14:16] [PASSED] ttm_bo_reserve_double_resv
[11:14:16] [PASSED] ttm_bo_reserve_interrupted
[11:14:16] [PASSED] ttm_bo_reserve_deadlock
[11:14:16] [PASSED] ttm_bo_unreserve_basic
[11:14:16] [PASSED] ttm_bo_unreserve_pinned
[11:14:16] [PASSED] ttm_bo_unreserve_bulk
[11:14:16] [PASSED] ttm_bo_fini_basic
[11:14:16] [PASSED] ttm_bo_fini_shared_resv
[11:14:16] [PASSED] ttm_bo_pin_basic
[11:14:16] [PASSED] ttm_bo_pin_unpin_resource
[11:14:16] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:14:16] ===================== [PASSED] ttm_bo ======================
[11:14:16] ============== ttm_bo_validate (22 subtests) ===============
[11:14:16] ============== ttm_bo_init_reserved_sys_man  ===============
[11:14:16] [PASSED] Buffer object for userspace
[11:14:16] [PASSED] Kernel buffer object
[11:14:16] [PASSED] Shared buffer object
[11:14:16] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:14:16] ============== ttm_bo_init_reserved_mock_man  ==============
[11:14:16] [PASSED] Buffer object for userspace
[11:14:16] [PASSED] Kernel buffer object
[11:14:16] [PASSED] Shared buffer object
[11:14:16] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:14:16] [PASSED] ttm_bo_init_reserved_resv
[11:14:16] ================== ttm_bo_validate_basic  ==================
[11:14:16] [PASSED] Buffer object for userspace
[11:14:16] [PASSED] Kernel buffer object
[11:14:16] [PASSED] Shared buffer object
[11:14:16] ============== [PASSED] ttm_bo_validate_basic ==============
[11:14:16] [PASSED] ttm_bo_validate_invalid_placement
[11:14:16] ============= ttm_bo_validate_same_placement  ==============
[11:14:16] [PASSED] System manager
[11:14:16] [PASSED] VRAM manager
[11:14:16] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:14:16] [PASSED] ttm_bo_validate_failed_alloc
[11:14:16] [PASSED] ttm_bo_validate_pinned
[11:14:16] [PASSED] ttm_bo_validate_busy_placement
[11:14:16] ================ ttm_bo_validate_multihop  =================
[11:14:16] [PASSED] Buffer object for userspace
[11:14:16] [PASSED] Kernel buffer object
[11:14:16] [PASSED] Shared buffer object
[11:14:16] ============ [PASSED] ttm_bo_validate_multihop =============
[11:14:16] ========== ttm_bo_validate_no_placement_signaled  ==========
[11:14:16] [PASSED] Buffer object in system domain, no page vector
[11:14:16] [PASSED] Buffer object in system domain with an existing page vector
[11:14:16] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:14:16] ======== ttm_bo_validate_no_placement_not_signaled  ========
[11:14:16] [PASSED] Buffer object for userspace
[11:14:16] [PASSED] Kernel buffer object
[11:14:16] [PASSED] Shared buffer object
[11:14:16] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:14:16] [PASSED] ttm_bo_validate_move_fence_signaled
[11:14:16] ========= ttm_bo_validate_move_fence_not_signaled  =========
[11:14:16] [PASSED] Waits for GPU
[11:14:16] [PASSED] Tries to lock straight away
[11:14:16] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:14:16] [PASSED] ttm_bo_validate_swapout
[11:14:16] [PASSED] ttm_bo_validate_happy_evict
[11:14:16] [PASSED] ttm_bo_validate_all_pinned_evict
[11:14:16] [PASSED] ttm_bo_validate_allowed_only_evict
[11:14:16] [PASSED] ttm_bo_validate_deleted_evict
[11:14:16] [PASSED] ttm_bo_validate_busy_domain_evict
[11:14:16] [PASSED] ttm_bo_validate_evict_gutting
[11:14:16] [PASSED] ttm_bo_validate_recrusive_evict
[11:14:16] ================= [PASSED] ttm_bo_validate =================
[11:14:16] ============================================================
[11:14:16] Testing complete. Ran 106 tests: passed: 106
[11:14:16] Elapsed time: 12.084s total, 1.819s configuring, 10.000s building, 0.223s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[11:14:16] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:14:18] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:14:26] Starting KUnit Kernel (1/1)...
[11:14:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:14:26] ============= refcount_interrupt (4 subtests) ==============
[11:14:26] [PASSED] test_single_irq_change
[11:14:26] [PASSED] test_nested_irq_change
[11:14:26] [PASSED] test_multiple_irq_change
[11:14:26] [PASSED] test_irq_save
[11:14:26] =============== [PASSED] refcount_interrupt ================
[11:14:26] =============== dma-buf-fence (12 subtests) ================
[11:14:26] [PASSED] test_sanitycheck
[11:14:26] [PASSED] test_signaling
[11:14:26] [PASSED] test_add_callback
[11:14:26] [PASSED] test_late_add_callback
[11:14:26] [PASSED] test_rm_callback
[11:14:26] [PASSED] test_late_rm_callback
[11:14:26] [PASSED] test_status
[11:14:26] [PASSED] test_error
[11:14:26] [PASSED] test_wait
[11:14:26] [PASSED] test_wait_timeout
[11:14:26] [PASSED] test_stub
[11:14:26] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[11:14:26] ================== [PASSED] dma-buf-fence ==================
[11:14:26] ============ dma-buf-fence-chain (11 subtests) =============
[11:14:26] [PASSED] test_sanitycheck
[11:14:26] [PASSED] test_find_seqno
[11:14:26] [PASSED] test_find_signaled
[11:14:26] [PASSED] test_find_out_of_order
[11:14:32] [PASSED] test_find_gap
[11:14:32] [PASSED] test_find_race
[11:14:32] [PASSED] test_signal_forward
[11:14:32] [PASSED] test_signal_backward
[11:14:32] [PASSED] test_wait_forward
[11:14:32] [PASSED] test_wait_backward
[11:14:32] [PASSED] test_wait_random
[11:14:32] =============== [PASSED] dma-buf-fence-chain ===============
[11:14:32] ============ dma-buf-fence-unwrap (10 subtests) ============
[11:14:32] [PASSED] test_sanitycheck
[11:14:32] [PASSED] test_unwrap_array
[11:14:32] [PASSED] test_unwrap_chain
[11:14:32] [PASSED] test_unwrap_chain_array
[11:14:32] [PASSED] test_unwrap_merge
[11:14:32] [PASSED] test_unwrap_merge_duplicate
[11:14:32] [PASSED] test_unwrap_merge_seqno
[11:14:32] [PASSED] test_unwrap_merge_order
[11:14:32] [PASSED] test_unwrap_merge_complex
[11:14:32] [PASSED] test_unwrap_merge_complex_seqno
[11:14:32] ============== [PASSED] dma-buf-fence-unwrap ===============
[11:14:32] ================ dma-buf-resv (5 subtests) =================
[11:14:32] [PASSED] test_sanitycheck
[11:14:32] ===================== test_signaling  ======================
[11:14:32] [PASSED] kernel
[11:14:32] [PASSED] write
[11:14:32] [PASSED] read
[11:14:32] [PASSED] bookkeep
[11:14:32] ================= [PASSED] test_signaling ==================
[11:14:32] ====================== test_for_each  ======================
[11:14:32] [PASSED] kernel
[11:14:32] [PASSED] write
[11:14:32] [PASSED] read
[11:14:32] [PASSED] bookkeep
[11:14:32] ================== [PASSED] test_for_each ==================
[11:14:32] ================= test_for_each_unlocked  ==================
[11:14:32] [PASSED] kernel
[11:14:32] [PASSED] write
[11:14:32] [PASSED] read
[11:14:32] [PASSED] bookkeep
[11:14:32] ============= [PASSED] test_for_each_unlocked ==============
[11:14:32] ===================== test_get_fences  =====================
[11:14:32] [PASSED] kernel
[11:14:32] [PASSED] write
[11:14:32] [PASSED] read
[11:14:32] [PASSED] bookkeep
[11:14:32] ================= [PASSED] test_get_fences =================
[11:14:32] ================== [PASSED] dma-buf-resv ===================
[11:14:32] ============================================================
[11:14:32] Testing complete. Ran 54 tests: passed: 53, skipped: 1
[11:14:32] Elapsed time: 15.708s total, 1.815s configuring, 8.572s building, 5.284s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ Xe.CI.BAT: failure for drm/i915/display: switch to modern drm_dp_dpcd* accessors (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 7553 bytes --]

== Series Details ==

Series: drm/i915/display: switch to modern drm_dp_dpcd* accessors (rev2)
URL   : https://patchwork.freedesktop.org/series/174241/
State : failure

== Summary ==

CI Bug Log - changes from xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe_BAT -> xe-pw-174241v2_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-174241v2_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-174241v2_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (14 -> 15)
------------------------------

  Additional (1): bat-ptl-vm 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-174241v2_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_exec_system_allocator@many-execqueues-free:
    - bat-bmg-vm:         [PASS][1] -> [DMESG-WARN][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/bat-bmg-vm/igt@xe_exec_system_allocator@many-execqueues-free.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-bmg-vm/igt@xe_exec_system_allocator@many-execqueues-free.html

  * igt@xe_exec_system_allocator@twice-free:
    - bat-bmg-1:          [PASS][3] -> [DMESG-WARN][4] +1 other test dmesg-warn
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/bat-bmg-1/igt@xe_exec_system_allocator@twice-free.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-bmg-1/igt@xe_exec_system_allocator@twice-free.html

  * igt@xe_multigpu_svm@mgpu-pagefault-basic:
    - bat-bmg-3:          [PASS][5] -> [DMESG-WARN][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/bat-bmg-3/igt@xe_multigpu_svm@mgpu-pagefault-basic.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-bmg-3/igt@xe_multigpu_svm@mgpu-pagefault-basic.html

  
Known issues
------------

  Here are the changes found in xe-pw-174241v2_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_evict@evict-beng-small-cm:
    - bat-ptl-vm:         NOTRUN -> [SKIP][7] ([Intel XE#5764]) +11 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-ptl-vm/igt@xe_evict@evict-beng-small-cm.html

  * igt@xe_exec_balancer@no-exec-cm-virtual-basic:
    - bat-ptl-vm:         NOTRUN -> [SKIP][8] ([Intel XE#7482]) +17 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-ptl-vm/igt@xe_exec_balancer@no-exec-cm-virtual-basic.html

  * igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd:
    - bat-ptl-vm:         NOTRUN -> [SKIP][9] ([Intel XE#8364]) +13 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-ptl-vm/igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd.html

  * igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit:
    - bat-ptl-vm:         NOTRUN -> [SKIP][10] ([Intel XE#5775]) +2 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-ptl-vm/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html

  * igt@xe_mmap@vram:
    - bat-ptl-vm:         NOTRUN -> [SKIP][11] ([Intel XE#5776])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-ptl-vm/igt@xe_mmap@vram.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-ptl-vm:         NOTRUN -> [SKIP][12] ([Intel XE#5777] / [Intel XE#7590])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-ptl-vm/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelp:
    - bat-ptl-vm:         NOTRUN -> [SKIP][13] ([Intel XE#5771] / [Intel XE#7590])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-ptl-vm/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pat@pat-index-xelpg:
    - bat-ptl-vm:         NOTRUN -> [SKIP][14] ([Intel XE#5780] / [Intel XE#7590])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-ptl-vm/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_waitfence@engine:
    - bat-wcl-1:          [PASS][15] -> [FAIL][16] ([Intel XE#9103])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/bat-wcl-1/igt@xe_waitfence@engine.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-wcl-1/igt@xe_waitfence@engine.html

  * igt@xe_waitfence@reltime:
    - bat-wcl-1:          [PASS][17] -> [FAIL][18] ([Intel XE#9115])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/bat-wcl-1/igt@xe_waitfence@reltime.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-wcl-1/igt@xe_waitfence@reltime.html

  
#### Possible fixes ####

  * igt@xe_exec_system_allocator@many-execqueues-malloc:
    - bat-bmg-vm:         [DMESG-WARN][19] -> [PASS][20] +1 other test pass
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/bat-bmg-vm/igt@xe_exec_system_allocator@many-execqueues-malloc.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-bmg-vm/igt@xe_exec_system_allocator@many-execqueues-malloc.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-malloc:
    - bat-bmg-1:          [DMESG-WARN][21] -> [PASS][22] +1 other test pass
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/bat-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-malloc.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-malloc.html

  * igt@xe_multigpu_svm@mgpu-latency-copy-prefetch:
    - bat-bmg-3:          [DMESG-WARN][23] -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/bat-bmg-3/igt@xe_multigpu_svm@mgpu-latency-copy-prefetch.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/bat-bmg-3/igt@xe_multigpu_svm@mgpu-latency-copy-prefetch.html

  
  [Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
  [Intel XE#5771]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5771
  [Intel XE#5775]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5775
  [Intel XE#5776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5776
  [Intel XE#5777]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5777
  [Intel XE#5780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5780
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#9103]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9103
  [Intel XE#9115]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9115


Build changes
-------------

  * Linux: xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe -> xe-pw-174241v2

  IGT_9103: f307fd753abbe6c03d0a6e1c769fc6020ebd5d86 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe: 1a3cf4b9d76455bd9de175ca12736eff1ec60fbe
  xe-pw-174241v2: 174241v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/index.html

[-- Attachment #2: Type: text/html, Size: 8661 bytes --]

✗ Xe.CI.FULL: failure for drm/i915/display: switch to modern drm_dp_dpcd* accessors (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 42783 bytes --]

== Series Details ==

Series: drm/i915/display: switch to modern drm_dp_dpcd* accessors (rev2)
URL   : https://patchwork.freedesktop.org/series/174241/
State : failure

== Summary ==

CI Bug Log - changes from xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe_FULL -> xe-pw-174241v2_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-174241v2_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-174241v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (3 -> 3)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-174241v2_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_exec_fault_mode@many-execqueues-invalid-userptr-fault:
    - shard-bmg:          [PASS][1] -> [DMESG-WARN][2] +40 other tests dmesg-warn
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-10/igt@xe_exec_fault_mode@many-execqueues-invalid-userptr-fault.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-6/igt@xe_exec_fault_mode@many-execqueues-invalid-userptr-fault.html

  * igt@xe_exec_system_allocator@process-many-large-malloc-nomemset:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][3] +22 other tests dmesg-warn
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@xe_exec_system_allocator@process-many-large-malloc-nomemset.html

  
Known issues
------------

  Here are the changes found in xe-pw-174241v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@x-tiled-64bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#2327])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180:
    - shard-ptl:          NOTRUN -> [SKIP][5] ([Intel XE#5808]) +1 other test skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-ptl:          NOTRUN -> [SKIP][6] ([Intel XE#5850])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#607] / [Intel XE#7361])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#1124]) +3 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#7679])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-target-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#367])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_bw@linear-tiling-3-displays-target-2560x1440p.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs:
    - shard-ptl:          NOTRUN -> [SKIP][11] ([Intel XE#5822])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2887]) +5 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs.html

  * igt@kms_chamelium_color@ctm-0-25:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2325] / [Intel XE#7358])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_chamelium_color@ctm-0-25.html

  * igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d:
    - shard-ptl:          NOTRUN -> [SKIP][14] ([Intel XE#8391])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d.html

  * igt@kms_chamelium_hpd@hdmi-hpd-after-hibernate:
    - shard-ptl:          NOTRUN -> [SKIP][15] ([Intel XE#2252]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_chamelium_hpd@hdmi-hpd-after-hibernate.html

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#6969]) +7 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4.html

  * igt@kms_content_protection@atomic-hdcp14:
    - shard-bmg:          NOTRUN -> [FAIL][17] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +3 other tests fail
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@kms_content_protection@atomic-hdcp14.html

  * igt@kms_content_protection@mei-interface:
    - shard-ptl:          NOTRUN -> [SKIP][18] ([Intel XE#5845])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_content_protection@mei-interface.html

  * igt@kms_cursor_crc@cursor-random-32x32:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2320]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_cursor_crc@cursor-random-32x32.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2321] / [Intel XE#7355])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-ptl:          NOTRUN -> [SKIP][21] ([Intel XE#5962])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_dsc@dsc-basic-bigjoiner:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#8265]) +1 other test skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@kms_dsc@dsc-basic-bigjoiner.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc-bigjoiner:
    - shard-ptl:          NOTRUN -> [SKIP][23] ([Intel XE#5907])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_dsc@dsc-with-output-formats-with-bpc-bigjoiner.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
    - shard-lnl:          [PASS][24] -> [FAIL][25] ([Intel XE#301])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
    - shard-ptl:          NOTRUN -> [SKIP][26] ([Intel XE#7178])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#7179])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x.html

  * igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc:
    - shard-ptl:          NOTRUN -> [SKIP][29] ([Intel XE#7061] / [Intel XE#7356])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrshdr-shrfb-scaledprimary:
    - shard-ptl:          NOTRUN -> [SKIP][30] ([Intel XE#6312]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_frontbuffer_tracking@drrshdr-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#4141]) +1 other test skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-ptl:          NOTRUN -> [SKIP][32] ([Intel XE#5800] / [Intel XE#6312]) +2 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#7061] / [Intel XE#7356])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-rgb565-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#2311]) +29 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-rgb565-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-offscreen-pri-shrfb-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][35] ([Intel XE#7865]) +4 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#7061]) +2 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-spr-indfb-fullscreen:
    - shard-ptl:          NOTRUN -> [SKIP][37] ([Intel XE#5812]) +12 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#2313]) +18 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_panel_fitting@legacy:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2486])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@kms_panel_fitting@legacy.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#7283])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-a:
    - shard-ptl:          NOTRUN -> [SKIP][41] ([Intel XE#6886]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-a.html

  * igt@kms_pm_backlight@fade:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_pm_backlight@fade.html

  * igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888.html

  * igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#8396]) +1 other test skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420.html

  * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#1489]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr@fbc-psr-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2234] / [Intel XE#2850]) +3 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_psr@fbc-psr-primary-render.html

  * igt@kms_psr@pr-sprite-blt:
    - shard-ptl:          NOTRUN -> [SKIP][47] ([Intel XE#1406])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_psr@pr-sprite-blt.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#3904] / [Intel XE#7342])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@kms_rotation_crc@bad-tiling.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-ptl:          NOTRUN -> [SKIP][49] ([Intel XE#5821])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#2330] / [Intel XE#5813])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_sharpness_filter@filter-toggle:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#6503])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@kms_sharpness_filter@filter-toggle.html

  * igt@kms_vrr@flip-basic:
    - shard-ptl:          [PASS][52] -> [FAIL][53] ([Intel XE#4227] / [Intel XE#7397]) +1 other test fail
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-ptl-2/igt@kms_vrr@flip-basic.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-2/igt@kms_vrr@flip-basic.html

  * igt@kms_vrr@seamless-rr-switch-drrs:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#1499] / [Intel XE#9271])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@kms_vrr@seamless-rr-switch-drrs.html

  * igt@xe_cw_post_sync@walker-post-sync:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#8608])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@xe_cw_post_sync@walker-post-sync.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][56] ([Intel XE#6321] / [Intel XE#8355])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_evict@evict-small-external-multi-queue-cm:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#8370])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@xe_evict@evict-small-external-multi-queue-cm.html

  * igt@xe_evict@evict-threads-small-multi-queue:
    - shard-ptl:          NOTRUN -> [SKIP][58] ([Intel XE#5764])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@xe_evict@evict-threads-small-multi-queue.html

  * igt@xe_exec_balancer@no-exec-cm-parallel-userptr-rebind:
    - shard-ptl:          NOTRUN -> [SKIP][59] ([Intel XE#7482]) +2 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@xe_exec_balancer@no-exec-cm-parallel-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind:
    - shard-ptl:          NOTRUN -> [SKIP][60] ([Intel XE#5575] / [Intel XE#7484]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2322] / [Intel XE#7372])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate:
    - shard-ptl:          NOTRUN -> [SKIP][62] ([Intel XE#8374])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#8374]) +5 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm.html

  * igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#8364]) +10 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd.html

  * igt@xe_exec_multi_queue@many-queues-preempt-mode-fault-priority:
    - shard-ptl:          NOTRUN -> [SKIP][65] ([Intel XE#8364]) +5 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@xe_exec_multi_queue@many-queues-preempt-mode-fault-priority.html

  * igt@xe_exec_reset@gt-stress-reset-concurrent-submit:
    - shard-ptl:          [PASS][66] -> [DMESG-WARN][67] ([Intel XE#8652])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-ptl-5/igt@xe_exec_reset@gt-stress-reset-concurrent-submit.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-8/igt@xe_exec_reset@gt-stress-reset-concurrent-submit.html

  * igt@xe_exec_reset@multi-queue-cancel-on-secondary:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#8369])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@xe_exec_reset@multi-queue-cancel-on-secondary.html

  * igt@xe_exec_system_allocator@many-stride-new-prefetch:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][69] ([Intel XE#7098] / [Intel XE#8159])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@xe_exec_system_allocator@many-stride-new-prefetch.html

  * igt@xe_exec_system_allocator@twice-large-mmap-new-race:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][70] ([Intel XE#9331])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@xe_exec_system_allocator@twice-large-mmap-new-race.html

  * igt@xe_exec_system_allocator@twice-large-mmap-prefetch:
    - shard-bmg:          [PASS][71] -> [DMESG-WARN][72] ([Intel XE#9331]) +1 other test dmesg-warn
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-9/igt@xe_exec_system_allocator@twice-large-mmap-prefetch.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-10/igt@xe_exec_system_allocator@twice-large-mmap-prefetch.html

  * igt@xe_exec_threads@threads-multi-queue-basic:
    - shard-ptl:          NOTRUN -> [SKIP][73] ([Intel XE#8378])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@xe_exec_threads@threads-multi-queue-basic.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-basic:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#8378]) +2 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-basic.html

  * igt@xe_mempage_offline@inject-duplicate-page:
    - shard-ptl:          NOTRUN -> [SKIP][75] ([Intel XE#9203])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@xe_mempage_offline@inject-duplicate-page.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97], [PASS][98], [PASS][99], [PASS][100]) -> ([PASS][101], [PASS][102], [PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107], [PASS][108], [PASS][109], [PASS][110], [PASS][111], [PASS][112], [PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [SKIP][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125], [PASS][126]) ([Intel XE#2457] / [Intel XE#7405])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-5/igt@xe_module_load@load.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-4/igt@xe_module_load@load.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-4/igt@xe_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-4/igt@xe_module_load@load.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-8/igt@xe_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-8/igt@xe_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-8/igt@xe_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-10/igt@xe_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-10/igt@xe_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-10/igt@xe_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-10/igt@xe_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-1/igt@xe_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-1/igt@xe_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-1/igt@xe_module_load@load.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-9/igt@xe_module_load@load.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-9/igt@xe_module_load@load.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-2/igt@xe_module_load@load.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-2/igt@xe_module_load@load.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-6/igt@xe_module_load@load.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-6/igt@xe_module_load@load.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-6/igt@xe_module_load@load.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-3/igt@xe_module_load@load.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-3/igt@xe_module_load@load.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-5/igt@xe_module_load@load.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-5/igt@xe_module_load@load.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-8/igt@xe_module_load@load.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@xe_module_load@load.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-5/igt@xe_module_load@load.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-6/igt@xe_module_load@load.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@xe_module_load@load.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@xe_module_load@load.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-1/igt@xe_module_load@load.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-6/igt@xe_module_load@load.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-6/igt@xe_module_load@load.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-5/igt@xe_module_load@load.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-9/igt@xe_module_load@load.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-9/igt@xe_module_load@load.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-9/igt@xe_module_load@load.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@xe_module_load@load.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-10/igt@xe_module_load@load.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-10/igt@xe_module_load@load.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@xe_module_load@load.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@xe_module_load@load.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@xe_module_load@load.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@xe_module_load@load.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@xe_module_load@load.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@xe_module_load@load.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-8/igt@xe_module_load@load.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-8/igt@xe_module_load@load.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@xe_module_load@load.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-1/igt@xe_module_load@load.html

  * igt@xe_multigpu_svm@mgpu-coherency-fail-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][127] ([Intel XE#6964]) +1 other test skip
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@xe_multigpu_svm@mgpu-coherency-fail-prefetch.html

  * igt@xe_oa@non-zero-reason-all:
    - shard-ptl:          [PASS][128] -> [FAIL][129] ([Intel XE#7334]) +1 other test fail
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-ptl-3/igt@xe_oa@non-zero-reason-all.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-7/igt@xe_oa@non-zero-reason-all.html

  * igt@xe_page_reclaim@binds-1g-partial:
    - shard-bmg:          NOTRUN -> [SKIP][130] ([Intel XE#7793])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@xe_page_reclaim@binds-1g-partial.html

  * igt@xe_page_reclaim@binds-null-vma:
    - shard-ptl:          NOTRUN -> [SKIP][131] ([Intel XE#7793])
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@xe_page_reclaim@binds-null-vma.html

  * igt@xe_pm@d3cold-i2c:
    - shard-ptl:          NOTRUN -> [SKIP][132] ([Intel XE#5741])
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@xe_pm@d3cold-i2c.html

  * igt@xe_pm@s3-mocs:
    - shard-bmg:          [PASS][133] -> [INCOMPLETE][134] ([Intel XE#8175])
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-10/igt@xe_pm@s3-mocs.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-6/igt@xe_pm@s3-mocs.html

  * igt@xe_pm_residency@cpg-basic:
    - shard-bmg:          [PASS][135] -> [INCOMPLETE][136] ([Intel XE#9202])
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-10/igt@xe_pm_residency@cpg-basic.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-6/igt@xe_pm_residency@cpg-basic.html

  * igt@xe_pmu@engine-activity-accuracy-50:
    - shard-bmg:          [PASS][137] -> [FAIL][138] ([Intel XE#8555]) +2 other tests fail
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-6/igt@xe_pmu@engine-activity-accuracy-50.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@xe_pmu@engine-activity-accuracy-50.html

  * igt@xe_pxp@display-black-pxp-fb:
    - shard-bmg:          NOTRUN -> [SKIP][139] ([Intel XE#4733] / [Intel XE#7417])
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@xe_pxp@display-black-pxp-fb.html

  * igt@xe_query@multigpu-query-cs-cycles:
    - shard-bmg:          NOTRUN -> [SKIP][140] ([Intel XE#944]) +1 other test skip
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@xe_query@multigpu-query-cs-cycles.html

  * igt@xe_query@multigpu-query-mem-usage:
    - shard-ptl:          NOTRUN -> [SKIP][141] ([Intel XE#6019])
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-ptl-3/igt@xe_query@multigpu-query-mem-usage.html

  
#### Possible fixes ####

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [INCOMPLETE][142] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][143] +1 other test pass
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [FAIL][144] ([Intel XE#301]) -> [PASS][145]
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_frontbuffer_tracking@hdr-suspend:
    - shard-bmg:          [INCOMPLETE][146] ([Intel XE#9259]) -> [PASS][147]
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-6/igt@kms_frontbuffer_tracking@hdr-suspend.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-4/igt@kms_frontbuffer_tracking@hdr-suspend.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - shard-bmg:          [INCOMPLETE][148] ([Intel XE#2597]) -> [PASS][149] +1 other test pass
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-6/igt@kms_pipe_crc_basic@suspend-read-crc.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-3/igt@kms_pipe_crc_basic@suspend-read-crc.html

  * igt@xe_exec_system_allocator@many-mmap-shared-nomemset:
    - shard-bmg:          [DMESG-WARN][150] -> [PASS][151] +40 other tests pass
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-9/igt@xe_exec_system_allocator@many-mmap-shared-nomemset.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-5/igt@xe_exec_system_allocator@many-mmap-shared-nomemset.html

  
#### Warnings ####

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][152] ([Intel XE#3544]) -> [SKIP][153] ([Intel XE#3374] / [Intel XE#3544])
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][154] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][155] ([Intel XE#2426] / [Intel XE#5848])
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5741]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5741
  [Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
  [Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
  [Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
  [Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#5821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5821
  [Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
  [Intel XE#5845]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5845
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5850
  [Intel XE#5907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5907
  [Intel XE#5962]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5962
  [Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7098
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7334]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7334
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7361
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
  [Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8159]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8159
  [Intel XE#8175]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8175
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8391
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8555]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8555
  [Intel XE#8608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8608
  [Intel XE#8652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8652
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#9202]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9202
  [Intel XE#9203]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9203
  [Intel XE#9259]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9259
  [Intel XE#9271]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9271
  [Intel XE#9331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9331
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe -> xe-pw-174241v2

  IGT_9103: f307fd753abbe6c03d0a6e1c769fc6020ebd5d86 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5793-1a3cf4b9d76455bd9de175ca12736eff1ec60fbe: 1a3cf4b9d76455bd9de175ca12736eff1ec60fbe
  xe-pw-174241v2: 174241v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174241v2/index.html

[-- Attachment #2: Type: text/html, Size: 46566 bytes --]

RE: [PATCH v2] drm/i915/hdcp: switch to drm_dp_dpcd_{read_byte,read_data,write_data}()

[Kandpal, Suraj]

> Subject: [PATCH v2] drm/i915/hdcp: switch to
> drm_dp_dpcd_{read_byte,read_data,write_data}()
> 
> Switch to the modern DPCD access functions that return negative error codes on
> errors, -EIO for incomplete access, and 0 on success.
> 
> This simplifies error handling all over the place. Convert the error logging to use
> %pe and ERR_PTR() while at it.
> 
> Add comments to the read/write places that depend on the functions that return
> the number of bytes read/written for incomplete access.
> 
> v2: return length from get_receiver_id_list_rx_info() (Sashiko)
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>


> ---
>  drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 176 +++++++++----------
>  1 file changed, 88 insertions(+), 88 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index 14ed0ea22dd3..566a921d18a1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -60,16 +60,15 @@ int intel_dp_hdcp_write_an_aksv(struct
> intel_digital_port *dig_port,  {
>  	struct intel_display *display = to_intel_display(dig_port);
>  	u8 aksv[DRM_HDCP_KSV_LEN] = {};
> -	ssize_t dpcd_ret;
> +	int ret;
> 
>  	/* Output An first, that's easy */
> -	dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AN,
> +	ret = drm_dp_dpcd_write_data(&dig_port->dp.aux, DP_AUX_HDCP_AN,
>  				     an, DRM_HDCP_AN_LEN);
> -	if (dpcd_ret != DRM_HDCP_AN_LEN) {
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm,
> -			    "Failed to write An over DP/AUX (%zd)\n",
> -			    dpcd_ret);
> -		return dpcd_ret >= 0 ? -EIO : dpcd_ret;
> +			    "Failed to write An over DP/AUX (%pe)\n",
> ERR_PTR(ret));
> +		return ret;
>  	}
> 
>  	/*
> @@ -79,14 +78,14 @@ int intel_dp_hdcp_write_an_aksv(struct
> intel_digital_port *dig_port,
>  	 * the destination address which will tickle the hardware to output the
>  	 * Aksv on our behalf after the header is sent.
>  	 */
> -	dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux,
> DP_AUX_HDCP_AKSV,
> +	ret = drm_dp_dpcd_write_data(&dig_port->dp.aux,
> DP_AUX_HDCP_AKSV,
>  				     aksv, DRM_HDCP_KSV_LEN);
> -	if (dpcd_ret != DRM_HDCP_KSV_LEN) {
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm,
> -			    "Failed to write Aksv over DP/AUX (%zd)\n",
> -			    dpcd_ret);
> -		return dpcd_ret >= 0 ? -EIO : dpcd_ret;
> +			    "Failed to write Aksv over DP/AUX (%pe)\n",
> ERR_PTR(ret));
> +		return ret;
>  	}
> +
>  	return 0;
>  }
> 
> @@ -94,15 +93,16 @@ static int intel_dp_hdcp_read_bksv(struct
> intel_digital_port *dig_port,
>  				   u8 *bksv)
>  {
>  	struct intel_display *display = to_intel_display(dig_port);
> -	ssize_t ret;
> +	int ret;
> 
> -	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BKSV, bksv,
> -			       DRM_HDCP_KSV_LEN);
> -	if (ret != DRM_HDCP_KSV_LEN) {
> +	ret = drm_dp_dpcd_read_data(&dig_port->dp.aux,
> DP_AUX_HDCP_BKSV, bksv,
> +				    DRM_HDCP_KSV_LEN);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm,
> -			    "Read Bksv from DP/AUX failed (%zd)\n", ret);
> -		return ret >= 0 ? -EIO : ret;
> +			    "Read Bksv from DP/AUX failed (%pe)\n",
> ERR_PTR(ret));
> +		return ret;
>  	}
> +
>  	return 0;
>  }
> 
> @@ -110,20 +110,21 @@ static int intel_dp_hdcp_read_bstatus(struct
> intel_digital_port *dig_port,
>  				      u8 *bstatus)
>  {
>  	struct intel_display *display = to_intel_display(dig_port);
> -	ssize_t ret;
> +	int ret;
> 
>  	/*
>  	 * For some reason the HDMI and DP HDCP specs call this register
>  	 * definition by different names. In the HDMI spec, it's called BSTATUS,
>  	 * but in DP it's called BINFO.
>  	 */
> -	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BINFO,
> -			       bstatus, DRM_HDCP_BSTATUS_LEN);
> -	if (ret != DRM_HDCP_BSTATUS_LEN) {
> +	ret = drm_dp_dpcd_read_data(&dig_port->dp.aux,
> DP_AUX_HDCP_BINFO,
> +				    bstatus, DRM_HDCP_BSTATUS_LEN);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm,
> -			    "Read bstatus from DP/AUX failed (%zd)\n", ret);
> -		return ret >= 0 ? -EIO : ret;
> +			    "Read bstatus from DP/AUX failed (%pe)\n",
> ERR_PTR(ret));
> +		return ret;
>  	}
> +
>  	return 0;
>  }
> 
> @@ -132,14 +133,13 @@ int intel_dp_hdcp_read_bcaps(struct drm_dp_aux
> *aux,
>  			     struct intel_display *display,
>  			     u8 *bcaps)
>  {
> -	ssize_t ret;
> +	int ret;
> 
> -	ret = drm_dp_dpcd_read(aux, DP_AUX_HDCP_BCAPS,
> -			       bcaps, 1);
> -	if (ret != 1) {
> +	ret = drm_dp_dpcd_read_byte(aux, DP_AUX_HDCP_BCAPS, bcaps);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm,
> -			    "Read bcaps from DP/AUX failed (%zd)\n", ret);
> -		return ret >= 0 ? -EIO : ret;
> +			    "Read bcaps from DP/AUX failed (%pe)\n",
> ERR_PTR(ret));
> +		return ret;
>  	}
> 
>  	return 0;
> @@ -166,16 +166,16 @@ int intel_dp_hdcp_read_ri_prime(struct
> intel_digital_port *dig_port,
>  				u8 *ri_prime)
>  {
>  	struct intel_display *display = to_intel_display(dig_port);
> -	ssize_t ret;
> +	int ret;
> 
> -	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_RI_PRIME,
> -			       ri_prime, DRM_HDCP_RI_LEN);
> -	if (ret != DRM_HDCP_RI_LEN) {
> +	ret = drm_dp_dpcd_read_data(&dig_port->dp.aux,
> DP_AUX_HDCP_RI_PRIME,
> +				    ri_prime, DRM_HDCP_RI_LEN);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm,
> -			    "Read Ri' from DP/AUX failed (%zd)\n",
> -			    ret);
> -		return ret >= 0 ? -EIO : ret;
> +			    "Read Ri' from DP/AUX failed (%pe)\n", ERR_PTR(ret));
> +		return ret;
>  	}
> +
>  	return 0;
>  }
> 
> @@ -184,17 +184,18 @@ int intel_dp_hdcp_read_ksv_ready(struct
> intel_digital_port *dig_port,
>  				 bool *ksv_ready)
>  {
>  	struct intel_display *display = to_intel_display(dig_port);
> -	ssize_t ret;
>  	u8 bstatus;
> +	int ret;
> 
> -	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
> -			       &bstatus, 1);
> -	if (ret != 1) {
> +	ret = drm_dp_dpcd_read_byte(&dig_port->dp.aux,
> DP_AUX_HDCP_BSTATUS,
> +				    &bstatus);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm,
> -			    "Read bstatus from DP/AUX failed (%zd)\n", ret);
> -		return ret >= 0 ? -EIO : ret;
> +			    "Read bstatus from DP/AUX failed (%pe)\n",
> ERR_PTR(ret));
> +		return ret;
>  	}
>  	*ksv_ready = bstatus & DP_BSTATUS_READY;
> +
>  	return 0;
>  }
> 
> @@ -203,23 +204,24 @@ int intel_dp_hdcp_read_ksv_fifo(struct
> intel_digital_port *dig_port,
>  				int num_downstream, u8 *ksv_fifo)
>  {
>  	struct intel_display *display = to_intel_display(dig_port);
> -	ssize_t ret;
> +	int ret;
>  	int i;
> 
>  	/* KSV list is read via 15 byte window (3 entries @ 5 bytes each) */
>  	for (i = 0; i < num_downstream; i += 3) {
>  		size_t len = min(num_downstream - i, 3) *
> DRM_HDCP_KSV_LEN;
> -		ret = drm_dp_dpcd_read(&dig_port->dp.aux,
> -				       DP_AUX_HDCP_KSV_FIFO,
> -				       ksv_fifo + i * DRM_HDCP_KSV_LEN,
> -				       len);
> -		if (ret != len) {
> +		ret = drm_dp_dpcd_read_data(&dig_port->dp.aux,
> +					    DP_AUX_HDCP_KSV_FIFO,
> +					    ksv_fifo + i * DRM_HDCP_KSV_LEN,
> +					    len);
> +		if (ret < 0) {
>  			drm_dbg_kms(display->drm,
> -				    "Read ksv[%d] from DP/AUX failed (%zd)\n",
> -				    i, ret);
> -			return ret >= 0 ? -EIO : ret;
> +				    "Read ksv[%d] from DP/AUX failed (%pe)\n",
> +				    i, ERR_PTR(ret));
> +			return ret;
>  		}
>  	}
> +
>  	return 0;
>  }
> 
> @@ -228,19 +230,19 @@ int intel_dp_hdcp_read_v_prime_part(struct
> intel_digital_port *dig_port,
>  				    int i, u32 *part)
>  {
>  	struct intel_display *display = to_intel_display(dig_port);
> -	ssize_t ret;
> +	int ret;
> 
>  	if (i >= DRM_HDCP_V_PRIME_NUM_PARTS)
>  		return -EINVAL;
> 
> -	ret = drm_dp_dpcd_read(&dig_port->dp.aux,
> -			       DP_AUX_HDCP_V_PRIME(i), part,
> -			       DRM_HDCP_V_PRIME_PART_LEN);
> -	if (ret != DRM_HDCP_V_PRIME_PART_LEN) {
> +	ret = drm_dp_dpcd_read_data(&dig_port->dp.aux,
> DP_AUX_HDCP_V_PRIME(i), part,
> +				    DRM_HDCP_V_PRIME_PART_LEN);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm,
> -			    "Read v'[%d] from DP/AUX failed (%zd)\n", i, ret);
> -		return ret >= 0 ? -EIO : ret;
> +			    "Read v'[%d] from DP/AUX failed (%pe)\n", i,
> ERR_PTR(ret));
> +		return ret;
>  	}
> +
>  	return 0;
>  }
> 
> @@ -258,14 +260,13 @@ bool intel_dp_hdcp_check_link(struct
> intel_digital_port *dig_port,
>  			      struct intel_connector *connector)  {
>  	struct intel_display *display = to_intel_display(dig_port);
> -	ssize_t ret;
>  	u8 bstatus;
> +	int ret;
> 
> -	ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
> -			       &bstatus, 1);
> -	if (ret != 1) {
> +	ret = drm_dp_dpcd_read_byte(&dig_port->dp.aux,
> DP_AUX_HDCP_BSTATUS, &bstatus);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm,
> -			    "Read bstatus from DP/AUX failed (%zd)\n", ret);
> +			    "Read bstatus from DP/AUX failed (%pe)\n",
> ERR_PTR(ret));
>  		return false;
>  	}
> 
> @@ -346,15 +347,14 @@ intel_dp_hdcp2_read_rx_status(struct intel_connector
> *connector,
>  	struct intel_display *display = to_intel_display(connector);
>  	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
>  	struct drm_dp_aux *aux = &dig_port->dp.aux;
> -	ssize_t ret;
> +	int ret;
> 
> -	ret = drm_dp_dpcd_read(aux,
> -			       DP_HDCP_2_2_REG_RXSTATUS_OFFSET, rx_status,
> -			       HDCP_2_2_DP_RXSTATUS_LEN);
> -	if (ret != HDCP_2_2_DP_RXSTATUS_LEN) {
> +	ret = drm_dp_dpcd_read_data(aux,
> DP_HDCP_2_2_REG_RXSTATUS_OFFSET, rx_status,
> +				    HDCP_2_2_DP_RXSTATUS_LEN);
> +	if (ret < 0) {
>  		drm_dbg_kms(display->drm,
> -			    "Read bstatus from DP/AUX failed (%zd)\n", ret);
> -		return ret >= 0 ? -EIO : ret;
> +			    "Read bstatus from DP/AUX failed (%pe)\n",
> ERR_PTR(ret));
> +		return ret;
>  	}
> 
>  	return 0;
> @@ -474,8 +474,8 @@ int intel_dp_hdcp2_write_msg(struct intel_connector
> *connector,
>  		len = bytes_to_write > DP_AUX_MAX_PAYLOAD_BYTES ?
>  				DP_AUX_MAX_PAYLOAD_BYTES :
> bytes_to_write;
> 
> -		ret = drm_dp_dpcd_write(aux,
> -					offset, (void *)byte, len);
> +		/* Note: This may return < len for partial writes. */
> +		ret = drm_dp_dpcd_write(aux, offset, byte, len);
>  		if (ret < 0)
>  			return ret;
> 
> @@ -487,20 +487,20 @@ int intel_dp_hdcp2_write_msg(struct intel_connector
> *connector,
>  	return size;
>  }
> 
> +/* return number of bytes read on success */
>  static
>  ssize_t get_receiver_id_list_rx_info(struct intel_connector *connector,
>  				     u32 *dev_cnt, u8 *byte)
>  {
>  	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
>  	struct drm_dp_aux *aux = &dig_port->dp.aux;
> -	ssize_t ret;
>  	u8 *rx_info = byte;
> +	int ret;
> 
> -	ret = drm_dp_dpcd_read(aux,
> -			       DP_HDCP_2_2_REG_RXINFO_OFFSET,
> -			       (void *)rx_info, HDCP_2_2_RXINFO_LEN);
> -	if (ret != HDCP_2_2_RXINFO_LEN)
> -		return ret >= 0 ? -EIO : ret;
> +	ret = drm_dp_dpcd_read_data(aux,
> DP_HDCP_2_2_REG_RXINFO_OFFSET,
> +				    rx_info, HDCP_2_2_RXINFO_LEN);
> +	if (ret < 0)
> +		return ret;
> 
>  	*dev_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 |
>  		   HDCP_2_2_DEV_COUNT_LO(rx_info[1]));
> @@ -508,7 +508,7 @@ ssize_t get_receiver_id_list_rx_info(struct
> intel_connector *connector,
>  	if (*dev_cnt > HDCP_2_2_MAX_DEVICE_COUNT)
>  		*dev_cnt = HDCP_2_2_MAX_DEVICE_COUNT;
> 
> -	return ret;
> +	return HDCP_2_2_RXINFO_LEN;
>  }
> 
>  static
> @@ -566,11 +566,11 @@ int intel_dp_hdcp2_read_msg(struct intel_connector
> *connector,
>  					       hdcp2_msg_data-
> >msg_read_timeout);
>  		}
> 
> -		ret = drm_dp_dpcd_read(aux, offset,
> -				       (void *)byte, len);
> +		/* Note: This may return < len for partial reads. */
> +		ret = drm_dp_dpcd_read(aux, offset, byte, len);
>  		if (ret < 0) {
> -			drm_dbg_kms(display->drm, "msg_id %d, ret %zd\n",
> -				    msg_id, ret);
> +			drm_dbg_kms(display->drm, "msg_id %d, ret %pe\n",
> +				    msg_id, ERR_PTR(ret));
>  			return ret;
>  		}
> 
> @@ -660,11 +660,11 @@ int _intel_dp_hdcp2_get_capability(struct
> drm_dp_aux *aux,
>  	 * declare a monitor not capable of HDCP 2.2.
>  	 */
>  	for (i = 0; i < 3; i++) {
> -		ret = drm_dp_dpcd_read(aux,
> -				       DP_HDCP_2_2_REG_RX_CAPS_OFFSET,
> -				       rx_caps, HDCP_2_2_RXCAPS_LEN);
> -		if (ret != HDCP_2_2_RXCAPS_LEN)
> -			return ret >= 0 ? -EIO : ret;
> +		ret = drm_dp_dpcd_read_data(aux,
> +
> DP_HDCP_2_2_REG_RX_CAPS_OFFSET,
> +					    rx_caps, HDCP_2_2_RXCAPS_LEN);
> +		if (ret < 0)
> +			return ret;
> 
>  		if (rx_caps[0] == HDCP_2_2_RX_CAPS_VERSION_VAL &&
>  		    HDCP_2_2_DP_HDCP_CAPABLE(rx_caps[2])) {
> --
> 2.47.3

RE: [PATCH v2] drm/i915/hdcp: switch to drm_dp_dpcd_{read_byte,read_data,write_data}()

[Jani Nikula]

On Tue, 22 Sep 2026, "Kandpal, Suraj" <suraj.kandpal@intel.com> wrote:
>> Subject: [PATCH v2] drm/i915/hdcp: switch to
>> drm_dp_dpcd_{read_byte,read_data,write_data}()
>> 
>> Switch to the modern DPCD access functions that return negative error codes on
>> errors, -EIO for incomplete access, and 0 on success.
>> 
>> This simplifies error handling all over the place. Convert the error logging to use
>> %pe and ERR_PTR() while at it.
>> 
>> Add comments to the read/write places that depend on the functions that return
>> the number of bytes read/written for incomplete access.
>> 
>> v2: return length from get_receiver_id_list_rx_info() (Sashiko)
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> LGTM,
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

Thanks for the reviews, pushed the lot to drm-intel-next.

BR,
Jani.


-- 
Jani Nikula, Intel