From: "Hogander, Jouni" <jouni.hogander@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>
Cc: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH v3 2/3] drm/i915/psr: Perform full frame update on async flip
Date: Wed, 3 Dec 2025 15:13:11 +0000 [thread overview]
Message-ID: <d1465eae2faf7545fbb16e8038b802f981606274.camel@intel.com> (raw)
In-Reply-To: <aTBSYy78qNjFoOOt@intel.com>
On Wed, 2025-12-03 at 17:08 +0200, Ville Syrjälä wrote:
> On Wed, Dec 03, 2025 at 01:58:23PM +0000, Hogander, Jouni wrote:
> > On Wed, 2025-12-03 at 15:22 +0200, Ville Syrjälä wrote:
> > > On Mon, Dec 01, 2025 at 03:24:56PM +0200, Jouni Högander wrote:
> > > > According to bspec selective fetch is not supported with async
> > > > flips and
> > > > instructing full frame update on async flip.
> > > >
> > > > v3:
> > > > - rebase
> > > > - fix old_crtc_state->pipe_srcsz_early_tpt
> > > > - fix using intel_atomic_get_new_crtc_state
> > > > v2:
> > > > - check also crtc_state->async_flip_planes in
> > > > psr2_sel_fetch_plane_state_supported
> > > >
> > > > Bspec: 55229
> > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_psr.c | 72 ++++++++++++++--
> > > > ----
> > > > ----
> > > > 1 file changed, 41 insertions(+), 31 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > index 15ef3b6caad6..53cf292247d7 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > @@ -2728,13 +2728,20 @@
> > > > intel_psr2_sel_fetch_et_alignment(struct
> > > > intel_atomic_state *state,
> > > > * Plane scaling and rotation is not supported by selective
> > > > fetch
> > > > and both
> > > > * properties can change without a modeset, so need to be
> > > > check at
> > > > every
> > > > * atomic commit.
> > > > + *
> > > > + * If plane was having async flip previously we can't use
> > > > selective
> > > > + * fetch as we don't know if the flip is completed.
> > > > */
> > > > -static bool psr2_sel_fetch_plane_state_supported(const struct
> > > > intel_plane_state *plane_state)
> > > > +static bool psr2_sel_fetch_plane_state_supported(const struct
> > > > intel_crtc_state *old_crtc_state,
> > > > + const struct
> > > > intel_plane_state *plane_state)
> > > > {
> > > > + struct intel_plane *plane =
> > > > to_intel_plane(plane_state-
> > > > > uapi.plane);
> > > > +
> > > > if (plane_state->uapi.dst.y1 < 0 ||
> > > > plane_state->uapi.dst.x1 < 0 ||
> > > > plane_state->scaler_id >= 0 ||
> > > > - plane_state->hw.rotation != DRM_MODE_ROTATE_0)
> > > > + plane_state->hw.rotation != DRM_MODE_ROTATE_0 ||
> > > > + old_crtc_state->async_flip_planes & plane->id)
> > >
> > > Why are you looking at the old crtc state? There should be
> > > nothing of
> > > interest to us there.
> >
> > To continue keeping CFF bit set if previous update was async flip.
> > This
> > is how I understood it (please correct):
> >
> > 0. syncronous update
> >
> > 1. async_flip:
> > new_crtc_state->async_flip_planes != 0
> > old_crtc_state->async_flip_planes == 0
> > crtc_state->uapi.async_flip == true)
> > -> full frame update
> >
> > 2. async_flip:
> > new_crtc_state->async_flip_planes != 0
> > old_crtc_state->async_flip_planes != 0
> > crtc_state->uapi.async_flip == true
> > -> full frame update
> >
> > 3. syncronous update
> > new_crtc_state->async_flip_planes == 0
> > old_crtc_state->async_flip_planes != 0
> > crtc_state->uapi.async_flip == false
> > -> full frame update
> >
> > 4. syncronous update
> > new_crtc_state->async_flip_planes == 0
> > old_crtc_state->async_flip_planes == 0
> > crtc_state->uapi.async_flip == false
> > -> selective update
> >
> > >
> > > > return false;
> > > >
> > > > return true;
> > > > @@ -2749,7 +2756,8 @@ static bool
> > > > psr2_sel_fetch_plane_state_supported(const struct
> > > > intel_plane_state
> > > > */
> > > > static bool psr2_sel_fetch_pipe_state_supported(const struct
> > > > intel_crtc_state *crtc_state)
> > > > {
> > > > - if (crtc_state->scaler_state.scaler_id >= 0)
> > > > + if (crtc_state->scaler_state.scaler_id >= 0 ||
> > > > + crtc_state->uapi.async_flip)
> > >
> > > I think just checking crtc_state->async_flip_planes!=0 here
> > > should be
> > > sufficient.
> >
> > I'm doing this to handle step 1. above. Alternatively I could check
> > both new_crtc_state->async_flip_planes and old_crtc_state-
> > > async_flip_planes. When using crtc_state->uapi.async_flip I can
> > > decide
> > earlier.
> >
> > > The rest of the patch seems unnecessary.
> >
> > No need to handle selective update where planes having pending
> > async
> > flip are not involved?
>
> There won't be pending flips of any kind. We whole CRTC commit queue
> is handled in a strict FIFO order (apart from the legacy cursor
> special case).
>
Ok, so it's not possible to take in new CRTC commit before async flip
is completed?
BR,
Jouni Högander
next prev parent reply other threads:[~2025-12-03 15:13 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-01 13:24 [PATCH v3 0/3] Selective Fetch and async flip Jouni Högander
2025-12-01 13:24 ` [PATCH v3 1/3] drm/i915/psr: Set plane id bit in crtc_state->async_flip_planes for PSR Jouni Högander
2025-12-03 13:15 ` Ville Syrjälä
2025-12-04 7:09 ` Hogander, Jouni
2025-12-16 8:38 ` Hogander, Jouni
2025-12-01 13:24 ` [PATCH v3 2/3] drm/i915/psr: Perform full frame update on async flip Jouni Högander
2025-12-03 13:22 ` Ville Syrjälä
2025-12-03 13:58 ` Hogander, Jouni
2025-12-03 15:08 ` Ville Syrjälä
2025-12-03 15:13 ` Hogander, Jouni [this message]
2025-12-03 15:55 ` Ville Syrjälä
2025-12-04 5:49 ` Hogander, Jouni
2025-12-04 7:10 ` Hogander, Jouni
2025-12-01 13:24 ` [PATCH v3 3/3] drm/i915/psr: Allow async flip when Selective Fetch enabled Jouni Högander
2025-12-01 14:45 ` ✓ CI.KUnit: success for Selective Fetch and async flip (rev3) Patchwork
2025-12-01 15:03 ` ✗ CI.checksparse: warning " Patchwork
2025-12-01 15:27 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-01 17:25 ` ✗ Xe.CI.Full: failure " Patchwork
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