[PATCH v9 0/9] Introducing firmware late binding

[PATCH v9 0/9] Introducing firmware late binding

[Badal Nilawar]

Introducing firmware late binding feature to enable firmware loading
for the devices, such as the fan controller and voltage regulator,
during the driver probe.
Typically, firmware for these devices are part of IFWI flash image but
can be replaced at probe after OEM tuning.

v2:
 - Dropped voltage regulator specific code as binaries for it will not
   be available for upstreaming as of now.
 - Address review comments
v3:
 - Dropped fwctl patch for now
 - Added new patch to extract binary version
 - Address v2 review comments
v4:
 - Address v3 review comments
v5:
 xe_kmd:
 - Dropped mutex is worker flush in unbind blocking component
   removal while fw download is in progress
 - Handled the fw load in all 3 scenarios (probe, system resume, rpm resume)
   by holding rpm wake ref in outer bounds of worker.
 mei:
 - Most of the review comments
v6:
 - rebased
 - Disabled fw load upon error
v7:
 xe_kmd:
 - resolved kernel doc warnings
 mei:
 - Address v6 review comments (greg kh)
v8:
 - https://lore.kernel.org/intel-xe/20250710150831.3018674-11-rodrigo.vivi@intel.com
v9:
 mei:
 - The MEI patches underwent internal review, as requested by Greg in v8.
 xe_kmd:
 - Rebased, Address review comments

Alexander Usyskin (2):
  mei: bus: add mei_cldev_mtu interface
  mei: late_bind: add late binding component driver

Badal Nilawar (7):
  drm/xe/xe_late_bind_fw: Introduce xe_late_bind_fw
  drm/xe/xe_late_bind_fw: Initialize late binding firmware
  drm/xe/xe_late_bind_fw: Load late binding firmware
  drm/xe/xe_late_bind_fw: Reload late binding fw in rpm resume
  drm/xe/xe_late_bind_fw: Reload late binding fw during system resume
  drm/xe/xe_late_bind_fw: Introduce debug fs node to disable late
    binding
  drm/xe/xe_late_bind_fw: Extract and print version info

 drivers/gpu/drm/xe/Makefile                |   1 +
 drivers/gpu/drm/xe/xe_debugfs.c            |  41 ++
 drivers/gpu/drm/xe/xe_device.c             |   5 +
 drivers/gpu/drm/xe/xe_device_types.h       |   6 +
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 464 +++++++++++++++++++++
 drivers/gpu/drm/xe/xe_late_bind_fw.h       |  17 +
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |  75 ++++
 drivers/gpu/drm/xe/xe_pci.c                |   2 +
 drivers/gpu/drm/xe/xe_pci_types.h          |   1 +
 drivers/gpu/drm/xe/xe_pm.c                 |   8 +
 drivers/gpu/drm/xe/xe_uc_fw_abi.h          |  66 +++
 drivers/misc/mei/Kconfig                   |  13 +
 drivers/misc/mei/Makefile                  |   1 +
 drivers/misc/mei/bus.c                     |  13 +
 drivers/misc/mei/mei_lb.c                  | 312 ++++++++++++++
 include/drm/intel/i915_component.h         |   1 +
 include/drm/intel/intel_lb_mei_interface.h |  70 ++++
 include/linux/mei_cl_bus.h                 |   1 +
 18 files changed, 1097 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw.c
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw.h
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw_types.h
 create mode 100644 drivers/misc/mei/mei_lb.c
 create mode 100644 include/drm/intel/intel_lb_mei_interface.h

-- 
2.34.1

[PATCH v9 1/9] mei: bus: add mei_cldev_mtu interface

[Badal Nilawar]

From: Alexander Usyskin <alexander.usyskin@intel.com>

Add a new helper function that allows MEI client drivers
to query the maximum transmission unit (MTU) for a connected
MEI client.

This is useful for clients that need to transmit large payloads,
such as firmware blobs, allowing them to determine the maximum
message size that can be safely sent before starting transmission and
size of the buffer to allocate when receiving data.

Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/misc/mei/bus.c     | 13 +++++++++++++
 include/linux/mei_cl_bus.h |  1 +
 2 files changed, 14 insertions(+)

diff --git a/drivers/misc/mei/bus.c b/drivers/misc/mei/bus.c
index 5cc3ad07d5be..09aae8f9d225 100644
--- a/drivers/misc/mei/bus.c
+++ b/drivers/misc/mei/bus.c
@@ -614,6 +614,19 @@ u8 mei_cldev_ver(const struct mei_cl_device *cldev)
 }
 EXPORT_SYMBOL_GPL(mei_cldev_ver);
 
+/**
+ * mei_cldev_mtu - max message that client can send and receive
+ *
+ * @cldev: mei client device
+ *
+ * Return: mtu or 0 if client is not connected
+ */
+size_t mei_cldev_mtu(const struct mei_cl_device *cldev)
+{
+	return mei_cl_mtu(cldev->cl);
+}
+EXPORT_SYMBOL_GPL(mei_cldev_mtu);
+
 /**
  * mei_cldev_enabled - check whether the device is enabled
  *
diff --git a/include/linux/mei_cl_bus.h b/include/linux/mei_cl_bus.h
index 725fd7727422..a82755e1fc40 100644
--- a/include/linux/mei_cl_bus.h
+++ b/include/linux/mei_cl_bus.h
@@ -113,6 +113,7 @@ int mei_cldev_register_notif_cb(struct mei_cl_device *cldev,
 				mei_cldev_cb_t notif_cb);
 
 u8 mei_cldev_ver(const struct mei_cl_device *cldev);
+size_t mei_cldev_mtu(const struct mei_cl_device *cldev);
 
 void *mei_cldev_get_drvdata(const struct mei_cl_device *cldev);
 void mei_cldev_set_drvdata(struct mei_cl_device *cldev, void *data);
-- 
2.34.1

[PATCH v9 2/9] mei: late_bind: add late binding component driver

[Badal Nilawar]

From: Alexander Usyskin <alexander.usyskin@intel.com>

Introduce a new MEI client driver to support Late Binding firmware
upload/update for Intel discrete graphics platforms.

Late Binding is a runtime firmware upload/update mechanism that allows
payloads, such as fan control and voltage regulator, to be securely
delivered and applied without requiring SPI flash updates or
system reboots. This driver enables the Xe graphics driver and other
user-space tools to push such firmware blobs to the authentication
firmware via the MEI interface.

The driver handles authentication, versioning, and communication
with the authentication firmware, which in turn coordinates with
the PUnit/PCODE to apply the payload.

This is a foundational component for enabling dynamic, secure,
and re-entrant configuration updates on platforms like Battlemage.

Cc: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
 drivers/misc/mei/Kconfig                   |  13 +
 drivers/misc/mei/Makefile                  |   1 +
 drivers/misc/mei/mei_lb.c                  | 312 +++++++++++++++++++++
 include/drm/intel/i915_component.h         |   1 +
 include/drm/intel/intel_lb_mei_interface.h |  70 +++++
 5 files changed, 397 insertions(+)
 create mode 100644 drivers/misc/mei/mei_lb.c
 create mode 100644 include/drm/intel/intel_lb_mei_interface.h

diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
index 7575fee96cc6..f8b04e49e4ba 100644
--- a/drivers/misc/mei/Kconfig
+++ b/drivers/misc/mei/Kconfig
@@ -81,6 +81,19 @@ config INTEL_MEI_VSC
 	  This driver can also be built as a module. If so, the module
 	  will be called mei-vsc.
 
+config INTEL_MEI_LB
+	tristate "Intel Late Binding (LB) support on ME Interface"
+	depends on INTEL_MEI_ME
+	depends on DRM_XE
+	help
+	  Enable support for Intel Late Binding (LB) via the MEI interface.
+
+	  Late Binding is a method for applying firmware updates at runtime,
+	  allowing the Intel Xe driver to load firmware payloads such as
+	  fan controller or voltage regulator. These firmware updates are
+	  authenticated and versioned, and do not require firmware flashing
+	  or system reboot.
+
 source "drivers/misc/mei/hdcp/Kconfig"
 source "drivers/misc/mei/pxp/Kconfig"
 source "drivers/misc/mei/gsc_proxy/Kconfig"
diff --git a/drivers/misc/mei/Makefile b/drivers/misc/mei/Makefile
index 6f9fdbf1a495..a203ed766b33 100644
--- a/drivers/misc/mei/Makefile
+++ b/drivers/misc/mei/Makefile
@@ -31,6 +31,7 @@ CFLAGS_mei-trace.o = -I$(src)
 obj-$(CONFIG_INTEL_MEI_HDCP) += hdcp/
 obj-$(CONFIG_INTEL_MEI_PXP) += pxp/
 obj-$(CONFIG_INTEL_MEI_GSC_PROXY) += gsc_proxy/
+obj-$(CONFIG_INTEL_MEI_LB) += mei_lb.o
 
 obj-$(CONFIG_INTEL_MEI_VSC_HW) += mei-vsc-hw.o
 mei-vsc-hw-y := vsc-tp.o
diff --git a/drivers/misc/mei/mei_lb.c b/drivers/misc/mei/mei_lb.c
new file mode 100644
index 000000000000..77686b108d3c
--- /dev/null
+++ b/drivers/misc/mei/mei_lb.c
@@ -0,0 +1,312 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Intel Corporation
+ */
+
+#include <linux/component.h>
+#include <linux/mei_cl_bus.h>
+#include <linux/module.h>
+#include <linux/overflow.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/uuid.h>
+
+#include <drm/intel/i915_component.h>
+#include <drm/intel/intel_lb_mei_interface.h>
+
+#include "mkhi.h"
+
+/**
+ * DOC: Late Binding Firmware Update/Upload
+ *
+ * Late Binding is a firmware update/upload mechanism that allows configuration
+ * payloads to be securely delivered and applied at runtime, rather than
+ * being embedded in the system firmware image (e.g., IFWI or SPI flash).
+ *
+ * This mechanism is used to update device-level configuration such as:
+ * - Fan controller
+ * - Voltage regulator (VR)
+ *
+ * Key Characteristics:
+ * ---------------------
+ * - Runtime Delivery:
+ *   Firmware blobs are loaded by the host driver (e.g., Xe KMD)
+ *   after the GPU or SoC has booted.
+ *
+ * - Secure and Authenticated:
+ *   All payloads are signed and verified by the authentication firmware.
+ *
+ * - No Firmware Flashing Required:
+ *   Updates are applied in volatile memory and do not require SPI flash
+ *   modification or system reboot.
+ *
+ * - Re-entrant:
+ *   Multiple updates of the same or different types can be applied
+ *   sequentially within a single boot session.
+ *
+ * - Version Controlled:
+ *   Each payload includes version and security version number (SVN)
+ *   metadata to support anti-rollback enforcement.
+ *
+ * Upload Flow:
+ * ------------
+ * 1. Host driver (KMD or user-space tool) loads the late binding firmware.
+ * 2. Firmware is passed to the MEI interface and forwarded to
+ *    authentication firmware.
+ * 3. Authentication firmware authenticates the payload and extracts
+ *    command and data arrays.
+ * 4. Authentication firmware delivers the configuration to PUnit/PCODE.
+ * 5. Status is returned back to the host via MEI.
+ */
+
+#define INTEL_LB_CMD	0x12
+#define INTEL_LB_RSP	(INTEL_LB_CMD | 0x80)
+
+#define INTEL_LB_SEND_TIMEOUT_MSEC 3000
+#define INTEL_LB_RECV_TIMEOUT_MSEC 3000
+
+/**
+ * struct mei_lb_req - Late Binding request structure
+ * @header: MKHI message header (see struct mkhi_msg_hdr)
+ * @type: Type of the Late Binding payload
+ * @flags: Flags to be passed to the authentication firmware (e.g. %INTEL_LB_FLAGS_IS_PERSISTENT)
+ * @reserved: Reserved for future use by authentication firmware, must be set to 0
+ * @payload_size: Size of the payload data in bytes
+ * @payload: Payload data to be sent to the authentication firmware
+ */
+struct mei_lb_req {
+	struct mkhi_msg_hdr header;
+	__le32 type;
+	__le32 flags;
+	__le32 reserved[2];
+	__le32 payload_size;
+	u8 payload[] __counted_by(payload_size);
+} __packed;
+
+/**
+ * struct mei_lb_rsp - Late Binding response structure
+ * @header: MKHI message header (see struct mkhi_msg_hdr)
+ * @type: Type of the Late Binding payload
+ * @reserved: Reserved for future use by authentication firmware, must be set to 0
+ * @status: Status returned by authentication firmware (see &enum intel_lb_status)
+ */
+struct mei_lb_rsp {
+	struct mkhi_msg_hdr header;
+	__le32 type;
+	__le32 reserved[2];
+	__le32 status;
+} __packed;
+
+static bool mei_lb_check_response(const struct device *dev, ssize_t bytes,
+				  struct mei_lb_rsp *rsp)
+{
+	/*
+	 * Received message size may be smaller than the full message size when
+	 * reply contains only MKHI header with result field set to the error code.
+	 * Check the header size and content first to output exact error, if needed,
+	 * and then process to the whole message.
+	 */
+	if (bytes < sizeof(rsp->header)) {
+		dev_err(dev, "Received less than header size from the firmware: %zd < %zu\n",
+			bytes, sizeof(rsp->header));
+		return false;
+	}
+	if (rsp->header.group_id != MKHI_GROUP_ID_GFX) {
+		dev_err(dev, "Mismatch group id: 0x%x instead of 0x%x\n",
+			rsp->header.group_id, MKHI_GROUP_ID_GFX);
+		return false;
+	}
+	if (rsp->header.command != INTEL_LB_RSP) {
+		dev_err(dev, "Mismatch command: 0x%x instead of 0x%x\n",
+			rsp->header.command, INTEL_LB_RSP);
+		return false;
+	}
+	if (rsp->header.result) {
+		dev_err(dev, "Error in result: 0x%x\n", rsp->header.result);
+		return false;
+	}
+	if (bytes < sizeof(*rsp)) {
+		dev_err(dev, "Received less than message size from the firmware: %zd < %zu\n",
+			bytes, sizeof(*rsp));
+		return false;
+	}
+
+	return true;
+}
+
+static int mei_lb_push_payload(struct device *dev,
+			       enum intel_lb_type type, u32 flags,
+			       const void *payload, size_t payload_size)
+{
+	struct mei_cl_device *cldev;
+	struct mei_lb_req *req = NULL;
+	struct mei_lb_rsp rsp;
+	size_t req_size;
+	ssize_t bytes;
+	int ret;
+
+	cldev = to_mei_cl_device(dev);
+
+	ret = mei_cldev_enable(cldev);
+	if (ret) {
+		dev_dbg(dev, "Failed to enable firmware client. %d\n", ret);
+		return ret;
+	}
+
+	req_size = struct_size(req, payload, payload_size);
+	if (req_size > mei_cldev_mtu(cldev)) {
+		dev_err(dev, "Payload is too big: %zu\n", payload_size);
+		ret = -EMSGSIZE;
+		goto end;
+	}
+
+	req = kmalloc(req_size, GFP_KERNEL);
+	if (!req) {
+		ret = -ENOMEM;
+		goto end;
+	}
+
+	req->header.group_id = MKHI_GROUP_ID_GFX;
+	req->header.command = INTEL_LB_CMD;
+	req->type = cpu_to_le32(type);
+	req->flags = cpu_to_le32(flags);
+	req->reserved[0] = 0;
+	req->reserved[1] = 0;
+	req->payload_size = cpu_to_le32(payload_size);
+	memcpy(req->payload, payload, payload_size);
+
+	bytes = mei_cldev_send_timeout(cldev, (u8 *)req, req_size,
+				       INTEL_LB_SEND_TIMEOUT_MSEC);
+	if (bytes < 0) {
+		dev_err(dev, "Failed to send late binding request to firmware. %zd\n", bytes);
+		ret = bytes;
+		goto end;
+	}
+
+	bytes = mei_cldev_recv_timeout(cldev, (u8 *)&rsp, sizeof(rsp),
+				       INTEL_LB_RECV_TIMEOUT_MSEC);
+	if (bytes < 0) {
+		dev_err(dev, "Failed to receive late binding reply from MEI firmware. %zd\n",
+			bytes);
+		ret = bytes;
+		goto end;
+	}
+	if (!mei_lb_check_response(dev, bytes, &rsp)) {
+		dev_err(dev, "Bad response from the firmware. header: %02x %02x %02x %02x\n",
+			rsp.header.group_id, rsp.header.command,
+			rsp.header.reserved, rsp.header.result);
+		ret = -EPROTO;
+		goto end;
+	}
+
+	dev_dbg(dev, "status = %u\n", le32_to_cpu(rsp.status));
+	ret = (int)le32_to_cpu(rsp.status);
+end:
+	mei_cldev_disable(cldev);
+	kfree(req);
+	return ret;
+}
+
+static const struct intel_lb_component_ops mei_lb_ops = {
+	.push_payload = mei_lb_push_payload,
+};
+
+static int mei_lb_component_master_bind(struct device *dev)
+{
+	return component_bind_all(dev, (void *)&mei_lb_ops);
+}
+
+static void mei_lb_component_master_unbind(struct device *dev)
+{
+	component_unbind_all(dev, (void *)&mei_lb_ops);
+}
+
+static const struct component_master_ops mei_lb_component_master_ops = {
+	.bind = mei_lb_component_master_bind,
+	.unbind = mei_lb_component_master_unbind,
+};
+
+static int mei_lb_component_match(struct device *dev, int subcomponent,
+				  void *data)
+{
+	/*
+	 * This function checks if requester is Intel %PCI_CLASS_DISPLAY_VGA or
+	 * %PCI_CLASS_DISPLAY_OTHER device, and checks if the requester is the
+	 * grand parent of mei_if i.e. late bind MEI device
+	 */
+	struct device *base = data;
+	struct pci_dev *pdev;
+
+	if (!dev)
+		return 0;
+
+	if (!dev_is_pci(dev))
+		return 0;
+
+	pdev = to_pci_dev(dev);
+
+	if (pdev->vendor != PCI_VENDOR_ID_INTEL)
+		return 0;
+
+	if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8) &&
+	    pdev->class != (PCI_CLASS_DISPLAY_OTHER << 8))
+		return 0;
+
+	if (subcomponent != INTEL_COMPONENT_LB)
+		return 0;
+
+	base = base->parent;
+	if (!base) /* mei device */
+		return 0;
+
+	base = base->parent; /* pci device */
+
+	return !!base && dev == base;
+}
+
+static int mei_lb_probe(struct mei_cl_device *cldev,
+			const struct mei_cl_device_id *id)
+{
+	struct component_match *master_match = NULL;
+	int ret;
+
+	component_match_add_typed(&cldev->dev, &master_match,
+				  mei_lb_component_match, &cldev->dev);
+	if (IS_ERR_OR_NULL(master_match))
+		return -ENOMEM;
+
+	ret = component_master_add_with_match(&cldev->dev,
+					      &mei_lb_component_master_ops,
+					      master_match);
+	if (ret < 0)
+		dev_err(&cldev->dev, "Failed to add late binding master component. %d\n", ret);
+
+	return ret;
+}
+
+static void mei_lb_remove(struct mei_cl_device *cldev)
+{
+	component_master_del(&cldev->dev, &mei_lb_component_master_ops);
+}
+
+#define MEI_GUID_MKHI UUID_LE(0xe2c2afa2, 0x3817, 0x4d19, \
+			      0x9d, 0x95, 0x6, 0xb1, 0x6b, 0x58, 0x8a, 0x5d)
+
+static const struct mei_cl_device_id mei_lb_tbl[] = {
+	{ .uuid = MEI_GUID_MKHI, .version = MEI_CL_VERSION_ANY },
+	{ }
+};
+MODULE_DEVICE_TABLE(mei, mei_lb_tbl);
+
+static struct mei_cl_driver mei_lb_driver = {
+	.id_table = mei_lb_tbl,
+	.name = "mei_lb",
+	.probe = mei_lb_probe,
+	.remove	= mei_lb_remove,
+};
+
+module_mei_cl_driver(mei_lb_driver);
+
+MODULE_AUTHOR("Intel Corporation");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("MEI Late Binding Firmware Update/Upload");
diff --git a/include/drm/intel/i915_component.h b/include/drm/intel/i915_component.h
index 4ea3b17aa143..8082db222e00 100644
--- a/include/drm/intel/i915_component.h
+++ b/include/drm/intel/i915_component.h
@@ -31,6 +31,7 @@ enum i915_component_type {
 	I915_COMPONENT_HDCP,
 	I915_COMPONENT_PXP,
 	I915_COMPONENT_GSC_PROXY,
+	INTEL_COMPONENT_LB,
 };
 
 /* MAX_PORT is the number of port
diff --git a/include/drm/intel/intel_lb_mei_interface.h b/include/drm/intel/intel_lb_mei_interface.h
new file mode 100644
index 000000000000..d65be2cba2ab
--- /dev/null
+++ b/include/drm/intel/intel_lb_mei_interface.h
@@ -0,0 +1,70 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright (c) 2025 Intel Corporation
+ */
+
+#ifndef _INTEL_LB_MEI_INTERFACE_H_
+#define _INTEL_LB_MEI_INTERFACE_H_
+
+#include <linux/types.h>
+
+struct device;
+
+/**
+ * define INTEL_LB_FLAG_IS_PERSISTENT - Mark the payload as persistent
+ *
+ * This flag indicates that the late binding payload should be stored
+ * persistently in flash across warm resets.
+ */
+#define INTEL_LB_FLAG_IS_PERSISTENT	BIT(0)
+
+/**
+ * enum intel_lb_type - enum to determine late binding payload type
+ * @INTEL_LB_TYPE_FAN_CONTROL: Fan controller configuration
+ */
+enum intel_lb_type {
+	INTEL_LB_TYPE_FAN_CONTROL = 1,
+};
+
+/**
+ * enum intel_lb_status - Status codes returned on late binding transmissions
+ * @INTEL_LB_STATUS_SUCCESS: Operation completed successfully
+ * @INTEL_LB_STATUS_4ID_MISMATCH: Mismatch in the expected 4ID (firmware identity/token)
+ * @INTEL_LB_STATUS_ARB_FAILURE: Arbitration failure (e.g. conflicting access or state)
+ * @INTEL_LB_STATUS_GENERAL_ERROR: General firmware error not covered by other codes
+ * @INTEL_LB_STATUS_INVALID_PARAMS: One or more input parameters are invalid
+ * @INTEL_LB_STATUS_INVALID_SIGNATURE: Payload has an invalid or untrusted signature
+ * @INTEL_LB_STATUS_INVALID_PAYLOAD: Payload contents are not accepted by firmware
+ * @INTEL_LB_STATUS_TIMEOUT: Operation timed out before completion
+ */
+enum intel_lb_status {
+	INTEL_LB_STATUS_SUCCESS           = 0,
+	INTEL_LB_STATUS_4ID_MISMATCH      = 1,
+	INTEL_LB_STATUS_ARB_FAILURE       = 2,
+	INTEL_LB_STATUS_GENERAL_ERROR     = 3,
+	INTEL_LB_STATUS_INVALID_PARAMS    = 4,
+	INTEL_LB_STATUS_INVALID_SIGNATURE = 5,
+	INTEL_LB_STATUS_INVALID_PAYLOAD   = 6,
+	INTEL_LB_STATUS_TIMEOUT           = 7,
+};
+
+/**
+ * struct intel_lb_component_ops - Ops for late binding services
+ */
+struct intel_lb_component_ops {
+	/**
+	 * push_payload - Sends a payload to the authentication firmware
+	 * @dev: Device struct corresponding to the mei device
+	 * @type: Payload type (see &enum intel_lb_type)
+	 * @flags: Payload flags bitmap (e.g. %INTEL_LB_FLAGS_IS_PERSISTENT)
+	 * @payload: Pointer to payload buffer
+	 * @payload_size: Payload buffer size in bytes
+	 *
+	 * Return: 0 success, negative errno value on transport failure,
+	 *         positive status returned by firmware
+	 */
+	int (*push_payload)(struct device *dev, u32 type, u32 flags,
+			    const void *payload, size_t payload_size);
+};
+
+#endif /* _INTEL_LB_MEI_INTERFACE_H_ */
-- 
2.34.1

Re: [PATCH v9 2/9] mei: late_bind: add late binding component driver

[Lucas De Marchi]

On Fri, Sep 05, 2025 at 09:19:46PM +0530, Badal Nilawar wrote:
>From: Alexander Usyskin <alexander.usyskin@intel.com>
>
>Introduce a new MEI client driver to support Late Binding firmware
>upload/update for Intel discrete graphics platforms.
>
>Late Binding is a runtime firmware upload/update mechanism that allows
>payloads, such as fan control and voltage regulator, to be securely
>delivered and applied without requiring SPI flash updates or
>system reboots. This driver enables the Xe graphics driver and other
>user-space tools to push such firmware blobs to the authentication
>firmware via the MEI interface.
>
>The driver handles authentication, versioning, and communication
>with the authentication firmware, which in turn coordinates with
>the PUnit/PCODE to apply the payload.
>
>This is a foundational component for enabling dynamic, secure,
>and re-entrant configuration updates on platforms like Battlemage.
>
>Cc: Badal Nilawar <badal.nilawar@intel.com>
>Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
>Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
>Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
>Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
>---
> drivers/misc/mei/Kconfig                   |  13 +
> drivers/misc/mei/Makefile                  |   1 +
> drivers/misc/mei/mei_lb.c                  | 312 +++++++++++++++++++++
> include/drm/intel/i915_component.h         |   1 +
> include/drm/intel/intel_lb_mei_interface.h |  70 +++++
> 5 files changed, 397 insertions(+)
> create mode 100644 drivers/misc/mei/mei_lb.c
> create mode 100644 include/drm/intel/intel_lb_mei_interface.h
>
>diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
>index 7575fee96cc6..f8b04e49e4ba 100644
>--- a/drivers/misc/mei/Kconfig
>+++ b/drivers/misc/mei/Kconfig
>@@ -81,6 +81,19 @@ config INTEL_MEI_VSC
> 	  This driver can also be built as a module. If so, the module
> 	  will be called mei-vsc.
>
>+config INTEL_MEI_LB
>+	tristate "Intel Late Binding (LB) support on ME Interface"
>+	depends on INTEL_MEI_ME
>+	depends on DRM_XE
>+	help
>+	  Enable support for Intel Late Binding (LB) via the MEI interface.
>+
>+	  Late Binding is a method for applying firmware updates at runtime,
>+	  allowing the Intel Xe driver to load firmware payloads such as
>+	  fan controller or voltage regulator. These firmware updates are
>+	  authenticated and versioned, and do not require firmware flashing
>+	  or system reboot.
>+
> source "drivers/misc/mei/hdcp/Kconfig"
> source "drivers/misc/mei/pxp/Kconfig"
> source "drivers/misc/mei/gsc_proxy/Kconfig"
>diff --git a/drivers/misc/mei/Makefile b/drivers/misc/mei/Makefile
>index 6f9fdbf1a495..a203ed766b33 100644
>--- a/drivers/misc/mei/Makefile
>+++ b/drivers/misc/mei/Makefile
>@@ -31,6 +31,7 @@ CFLAGS_mei-trace.o = -I$(src)
> obj-$(CONFIG_INTEL_MEI_HDCP) += hdcp/
> obj-$(CONFIG_INTEL_MEI_PXP) += pxp/
> obj-$(CONFIG_INTEL_MEI_GSC_PROXY) += gsc_proxy/
>+obj-$(CONFIG_INTEL_MEI_LB) += mei_lb.o
>
> obj-$(CONFIG_INTEL_MEI_VSC_HW) += mei-vsc-hw.o
> mei-vsc-hw-y := vsc-tp.o
>diff --git a/drivers/misc/mei/mei_lb.c b/drivers/misc/mei/mei_lb.c
>new file mode 100644
>index 000000000000..77686b108d3c
>--- /dev/null
>+++ b/drivers/misc/mei/mei_lb.c
>@@ -0,0 +1,312 @@
>+// SPDX-License-Identifier: GPL-2.0
>+/*
>+ * Copyright (C) 2025 Intel Corporation
>+ */
>+
>+#include <linux/component.h>
>+#include <linux/mei_cl_bus.h>
>+#include <linux/module.h>
>+#include <linux/overflow.h>
>+#include <linux/pci.h>
>+#include <linux/slab.h>
>+#include <linux/uuid.h>
>+
>+#include <drm/intel/i915_component.h>
>+#include <drm/intel/intel_lb_mei_interface.h>
>+
>+#include "mkhi.h"
>+
>+/**
>+ * DOC: Late Binding Firmware Update/Upload
>+ *
>+ * Late Binding is a firmware update/upload mechanism that allows configuration
>+ * payloads to be securely delivered and applied at runtime, rather than
>+ * being embedded in the system firmware image (e.g., IFWI or SPI flash).
>+ *
>+ * This mechanism is used to update device-level configuration such as:
>+ * - Fan controller
>+ * - Voltage regulator (VR)
>+ *
>+ * Key Characteristics:
>+ * ---------------------
>+ * - Runtime Delivery:
>+ *   Firmware blobs are loaded by the host driver (e.g., Xe KMD)
>+ *   after the GPU or SoC has booted.
>+ *
>+ * - Secure and Authenticated:
>+ *   All payloads are signed and verified by the authentication firmware.
>+ *
>+ * - No Firmware Flashing Required:
>+ *   Updates are applied in volatile memory and do not require SPI flash
>+ *   modification or system reboot.
>+ *
>+ * - Re-entrant:
>+ *   Multiple updates of the same or different types can be applied
>+ *   sequentially within a single boot session.
>+ *
>+ * - Version Controlled:
>+ *   Each payload includes version and security version number (SVN)
>+ *   metadata to support anti-rollback enforcement.
>+ *
>+ * Upload Flow:
>+ * ------------
>+ * 1. Host driver (KMD or user-space tool) loads the late binding firmware.
>+ * 2. Firmware is passed to the MEI interface and forwarded to
>+ *    authentication firmware.
>+ * 3. Authentication firmware authenticates the payload and extracts
>+ *    command and data arrays.
>+ * 4. Authentication firmware delivers the configuration to PUnit/PCODE.
>+ * 5. Status is returned back to the host via MEI.
>+ */
>+
>+#define INTEL_LB_CMD	0x12
>+#define INTEL_LB_RSP	(INTEL_LB_CMD | 0x80)
>+
>+#define INTEL_LB_SEND_TIMEOUT_MSEC 3000
>+#define INTEL_LB_RECV_TIMEOUT_MSEC 3000
>+
>+/**
>+ * struct mei_lb_req - Late Binding request structure
>+ * @header: MKHI message header (see struct mkhi_msg_hdr)
>+ * @type: Type of the Late Binding payload
>+ * @flags: Flags to be passed to the authentication firmware (e.g. %INTEL_LB_FLAGS_IS_PERSISTENT)
>+ * @reserved: Reserved for future use by authentication firmware, must be set to 0
>+ * @payload_size: Size of the payload data in bytes
>+ * @payload: Payload data to be sent to the authentication firmware
>+ */
>+struct mei_lb_req {
>+	struct mkhi_msg_hdr header;
>+	__le32 type;
>+	__le32 flags;
>+	__le32 reserved[2];
>+	__le32 payload_size;
>+	u8 payload[] __counted_by(payload_size);
>+} __packed;
>+
>+/**
>+ * struct mei_lb_rsp - Late Binding response structure
>+ * @header: MKHI message header (see struct mkhi_msg_hdr)
>+ * @type: Type of the Late Binding payload
>+ * @reserved: Reserved for future use by authentication firmware, must be set to 0
>+ * @status: Status returned by authentication firmware (see &enum intel_lb_status)
>+ */
>+struct mei_lb_rsp {
>+	struct mkhi_msg_hdr header;
>+	__le32 type;
>+	__le32 reserved[2];
>+	__le32 status;
>+} __packed;
>+
>+static bool mei_lb_check_response(const struct device *dev, ssize_t bytes,
>+				  struct mei_lb_rsp *rsp)
>+{
>+	/*
>+	 * Received message size may be smaller than the full message size when
>+	 * reply contains only MKHI header with result field set to the error code.
>+	 * Check the header size and content first to output exact error, if needed,
>+	 * and then process to the whole message.
>+	 */
>+	if (bytes < sizeof(rsp->header)) {
>+		dev_err(dev, "Received less than header size from the firmware: %zd < %zu\n",
>+			bytes, sizeof(rsp->header));
>+		return false;
>+	}
>+	if (rsp->header.group_id != MKHI_GROUP_ID_GFX) {
>+		dev_err(dev, "Mismatch group id: 0x%x instead of 0x%x\n",
>+			rsp->header.group_id, MKHI_GROUP_ID_GFX);
>+		return false;
>+	}
>+	if (rsp->header.command != INTEL_LB_RSP) {
>+		dev_err(dev, "Mismatch command: 0x%x instead of 0x%x\n",
>+			rsp->header.command, INTEL_LB_RSP);
>+		return false;
>+	}
>+	if (rsp->header.result) {
>+		dev_err(dev, "Error in result: 0x%x\n", rsp->header.result);
>+		return false;
>+	}
>+	if (bytes < sizeof(*rsp)) {
>+		dev_err(dev, "Received less than message size from the firmware: %zd < %zu\n",
>+			bytes, sizeof(*rsp));
>+		return false;
>+	}
>+
>+	return true;
>+}
>+
>+static int mei_lb_push_payload(struct device *dev,
>+			       enum intel_lb_type type, u32 flags,
>+			       const void *payload, size_t payload_size)
>+{
>+	struct mei_cl_device *cldev;
>+	struct mei_lb_req *req = NULL;
>+	struct mei_lb_rsp rsp;
>+	size_t req_size;
>+	ssize_t bytes;
>+	int ret;
>+
>+	cldev = to_mei_cl_device(dev);
>+
>+	ret = mei_cldev_enable(cldev);
>+	if (ret) {
>+		dev_dbg(dev, "Failed to enable firmware client. %d\n", ret);
>+		return ret;
>+	}
>+
>+	req_size = struct_size(req, payload, payload_size);
>+	if (req_size > mei_cldev_mtu(cldev)) {
>+		dev_err(dev, "Payload is too big: %zu\n", payload_size);
>+		ret = -EMSGSIZE;
>+		goto end;
>+	}
>+
>+	req = kmalloc(req_size, GFP_KERNEL);
>+	if (!req) {
>+		ret = -ENOMEM;
>+		goto end;
>+	}
>+
>+	req->header.group_id = MKHI_GROUP_ID_GFX;
>+	req->header.command = INTEL_LB_CMD;
>+	req->type = cpu_to_le32(type);
>+	req->flags = cpu_to_le32(flags);
>+	req->reserved[0] = 0;
>+	req->reserved[1] = 0;
>+	req->payload_size = cpu_to_le32(payload_size);
>+	memcpy(req->payload, payload, payload_size);
>+
>+	bytes = mei_cldev_send_timeout(cldev, (u8 *)req, req_size,
>+				       INTEL_LB_SEND_TIMEOUT_MSEC);
>+	if (bytes < 0) {
>+		dev_err(dev, "Failed to send late binding request to firmware. %zd\n", bytes);
>+		ret = bytes;
>+		goto end;
>+	}
>+
>+	bytes = mei_cldev_recv_timeout(cldev, (u8 *)&rsp, sizeof(rsp),
>+				       INTEL_LB_RECV_TIMEOUT_MSEC);
>+	if (bytes < 0) {
>+		dev_err(dev, "Failed to receive late binding reply from MEI firmware. %zd\n",
>+			bytes);
>+		ret = bytes;
>+		goto end;
>+	}
>+	if (!mei_lb_check_response(dev, bytes, &rsp)) {
>+		dev_err(dev, "Bad response from the firmware. header: %02x %02x %02x %02x\n",
>+			rsp.header.group_id, rsp.header.command,
>+			rsp.header.reserved, rsp.header.result);
>+		ret = -EPROTO;
>+		goto end;
>+	}
>+
>+	dev_dbg(dev, "status = %u\n", le32_to_cpu(rsp.status));
>+	ret = (int)le32_to_cpu(rsp.status);
>+end:
>+	mei_cldev_disable(cldev);
>+	kfree(req);
>+	return ret;
>+}
>+
>+static const struct intel_lb_component_ops mei_lb_ops = {
>+	.push_payload = mei_lb_push_payload,
>+};
>+
>+static int mei_lb_component_master_bind(struct device *dev)
>+{
>+	return component_bind_all(dev, (void *)&mei_lb_ops);
>+}
>+
>+static void mei_lb_component_master_unbind(struct device *dev)
>+{
>+	component_unbind_all(dev, (void *)&mei_lb_ops);
>+}
>+
>+static const struct component_master_ops mei_lb_component_master_ops = {
>+	.bind = mei_lb_component_master_bind,
>+	.unbind = mei_lb_component_master_unbind,
>+};
>+
>+static int mei_lb_component_match(struct device *dev, int subcomponent,
>+				  void *data)
>+{
>+	/*
>+	 * This function checks if requester is Intel %PCI_CLASS_DISPLAY_VGA or
>+	 * %PCI_CLASS_DISPLAY_OTHER device, and checks if the requester is the
>+	 * grand parent of mei_if i.e. late bind MEI device
>+	 */
>+	struct device *base = data;
>+	struct pci_dev *pdev;
>+
>+	if (!dev)
>+		return 0;
>+
>+	if (!dev_is_pci(dev))
>+		return 0;
>+
>+	pdev = to_pci_dev(dev);
>+
>+	if (pdev->vendor != PCI_VENDOR_ID_INTEL)
>+		return 0;
>+
>+	if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8) &&
>+	    pdev->class != (PCI_CLASS_DISPLAY_OTHER << 8))

this doesn't seem right, we should allow other PCI classes. AFAICS this
check could just be removed and just leave the INTEL_COMPONENT_LB below
to protect for component match

Lucas De Marchi

>+		return 0;
>+
>+	if (subcomponent != INTEL_COMPONENT_LB)
>+		return 0;
>+
>+	base = base->parent;
>+	if (!base) /* mei device */
>+		return 0;
>+
>+	base = base->parent; /* pci device */
>+
>+	return !!base && dev == base;
>+}
>+
>+static int mei_lb_probe(struct mei_cl_device *cldev,
>+			const struct mei_cl_device_id *id)
>+{
>+	struct component_match *master_match = NULL;
>+	int ret;
>+
>+	component_match_add_typed(&cldev->dev, &master_match,
>+				  mei_lb_component_match, &cldev->dev);
>+	if (IS_ERR_OR_NULL(master_match))
>+		return -ENOMEM;
>+
>+	ret = component_master_add_with_match(&cldev->dev,
>+					      &mei_lb_component_master_ops,
>+					      master_match);
>+	if (ret < 0)
>+		dev_err(&cldev->dev, "Failed to add late binding master component. %d\n", ret);
>+
>+	return ret;
>+}
>+
>+static void mei_lb_remove(struct mei_cl_device *cldev)
>+{
>+	component_master_del(&cldev->dev, &mei_lb_component_master_ops);
>+}
>+
>+#define MEI_GUID_MKHI UUID_LE(0xe2c2afa2, 0x3817, 0x4d19, \
>+			      0x9d, 0x95, 0x6, 0xb1, 0x6b, 0x58, 0x8a, 0x5d)
>+
>+static const struct mei_cl_device_id mei_lb_tbl[] = {
>+	{ .uuid = MEI_GUID_MKHI, .version = MEI_CL_VERSION_ANY },
>+	{ }
>+};
>+MODULE_DEVICE_TABLE(mei, mei_lb_tbl);
>+
>+static struct mei_cl_driver mei_lb_driver = {
>+	.id_table = mei_lb_tbl,
>+	.name = "mei_lb",
>+	.probe = mei_lb_probe,
>+	.remove	= mei_lb_remove,
>+};
>+
>+module_mei_cl_driver(mei_lb_driver);
>+
>+MODULE_AUTHOR("Intel Corporation");
>+MODULE_LICENSE("GPL");
>+MODULE_DESCRIPTION("MEI Late Binding Firmware Update/Upload");
>diff --git a/include/drm/intel/i915_component.h b/include/drm/intel/i915_component.h
>index 4ea3b17aa143..8082db222e00 100644
>--- a/include/drm/intel/i915_component.h
>+++ b/include/drm/intel/i915_component.h
>@@ -31,6 +31,7 @@ enum i915_component_type {
> 	I915_COMPONENT_HDCP,
> 	I915_COMPONENT_PXP,
> 	I915_COMPONENT_GSC_PROXY,
>+	INTEL_COMPONENT_LB,
> };
>
> /* MAX_PORT is the number of port
>diff --git a/include/drm/intel/intel_lb_mei_interface.h b/include/drm/intel/intel_lb_mei_interface.h
>new file mode 100644
>index 000000000000..d65be2cba2ab
>--- /dev/null
>+++ b/include/drm/intel/intel_lb_mei_interface.h
>@@ -0,0 +1,70 @@
>+/* SPDX-License-Identifier: MIT */
>+/*
>+ * Copyright (c) 2025 Intel Corporation
>+ */
>+
>+#ifndef _INTEL_LB_MEI_INTERFACE_H_
>+#define _INTEL_LB_MEI_INTERFACE_H_
>+
>+#include <linux/types.h>
>+
>+struct device;
>+
>+/**
>+ * define INTEL_LB_FLAG_IS_PERSISTENT - Mark the payload as persistent
>+ *
>+ * This flag indicates that the late binding payload should be stored
>+ * persistently in flash across warm resets.
>+ */
>+#define INTEL_LB_FLAG_IS_PERSISTENT	BIT(0)
>+
>+/**
>+ * enum intel_lb_type - enum to determine late binding payload type
>+ * @INTEL_LB_TYPE_FAN_CONTROL: Fan controller configuration
>+ */
>+enum intel_lb_type {
>+	INTEL_LB_TYPE_FAN_CONTROL = 1,
>+};
>+
>+/**
>+ * enum intel_lb_status - Status codes returned on late binding transmissions
>+ * @INTEL_LB_STATUS_SUCCESS: Operation completed successfully
>+ * @INTEL_LB_STATUS_4ID_MISMATCH: Mismatch in the expected 4ID (firmware identity/token)
>+ * @INTEL_LB_STATUS_ARB_FAILURE: Arbitration failure (e.g. conflicting access or state)
>+ * @INTEL_LB_STATUS_GENERAL_ERROR: General firmware error not covered by other codes
>+ * @INTEL_LB_STATUS_INVALID_PARAMS: One or more input parameters are invalid
>+ * @INTEL_LB_STATUS_INVALID_SIGNATURE: Payload has an invalid or untrusted signature
>+ * @INTEL_LB_STATUS_INVALID_PAYLOAD: Payload contents are not accepted by firmware
>+ * @INTEL_LB_STATUS_TIMEOUT: Operation timed out before completion
>+ */
>+enum intel_lb_status {
>+	INTEL_LB_STATUS_SUCCESS           = 0,
>+	INTEL_LB_STATUS_4ID_MISMATCH      = 1,
>+	INTEL_LB_STATUS_ARB_FAILURE       = 2,
>+	INTEL_LB_STATUS_GENERAL_ERROR     = 3,
>+	INTEL_LB_STATUS_INVALID_PARAMS    = 4,
>+	INTEL_LB_STATUS_INVALID_SIGNATURE = 5,
>+	INTEL_LB_STATUS_INVALID_PAYLOAD   = 6,
>+	INTEL_LB_STATUS_TIMEOUT           = 7,
>+};
>+
>+/**
>+ * struct intel_lb_component_ops - Ops for late binding services
>+ */
>+struct intel_lb_component_ops {
>+	/**
>+	 * push_payload - Sends a payload to the authentication firmware
>+	 * @dev: Device struct corresponding to the mei device
>+	 * @type: Payload type (see &enum intel_lb_type)
>+	 * @flags: Payload flags bitmap (e.g. %INTEL_LB_FLAGS_IS_PERSISTENT)
>+	 * @payload: Pointer to payload buffer
>+	 * @payload_size: Payload buffer size in bytes
>+	 *
>+	 * Return: 0 success, negative errno value on transport failure,
>+	 *         positive status returned by firmware
>+	 */
>+	int (*push_payload)(struct device *dev, u32 type, u32 flags,
>+			    const void *payload, size_t payload_size);
>+};
>+
>+#endif /* _INTEL_LB_MEI_INTERFACE_H_ */
>-- 
>2.34.1
>

RE: [PATCH v9 2/9] mei: late_bind: add late binding component driver

[Usyskin, Alexander]

> >+static int mei_lb_component_match(struct device *dev, int subcomponent,
> >+				  void *data)
> >+{
> >+	/*
> >+	 * This function checks if requester is Intel %PCI_CLASS_DISPLAY_VGA
> or
> >+	 * %PCI_CLASS_DISPLAY_OTHER device, and checks if the requester is
> the
> >+	 * grand parent of mei_if i.e. late bind MEI device
> >+	 */
> >+	struct device *base = data;
> >+	struct pci_dev *pdev;
> >+
> >+	if (!dev)
> >+		return 0;
> >+
> >+	if (!dev_is_pci(dev))
> >+		return 0;
> >+
> >+	pdev = to_pci_dev(dev);
> >+
> >+	if (pdev->vendor != PCI_VENDOR_ID_INTEL)
> >+		return 0;
> >+
> >+	if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8) &&
> >+	    pdev->class != (PCI_CLASS_DISPLAY_OTHER << 8))
> 
> this doesn't seem right, we should allow other PCI classes. AFAICS this
> check could just be removed and just leave the INTEL_COMPONENT_LB below
> to protect for component match
> 
> Lucas De Marchi
> 

The subcomponent is unique only in its own instance of the component framework.
Or I'm wrong here?
We have to ensure that we have Intel display device, not any other device to
subcomponent check to work correctly.

- - 
Thanks,
Sasha


> >+		return 0;
> >+
> >+	if (subcomponent != INTEL_COMPONENT_LB)
> >+		return 0;
> >+
> >+	base = base->parent;
> >+	if (!base) /* mei device */
> >+		return 0;
> >+
> >+	base = base->parent; /* pci device */
> >+
> >+	return !!base && dev == base;
> >+}
> >+

Re: [PATCH v9 2/9] mei: late_bind: add late binding component driver

[Lucas De Marchi]

On Tue, Sep 09, 2025 at 04:50:41AM +0000, Usyskin, Alexander wrote:
>> >+static int mei_lb_component_match(struct device *dev, int subcomponent,
>> >+				  void *data)
>> >+{
>> >+	/*
>> >+	 * This function checks if requester is Intel %PCI_CLASS_DISPLAY_VGA
>> or
>> >+	 * %PCI_CLASS_DISPLAY_OTHER device, and checks if the requester is
>> the
>> >+	 * grand parent of mei_if i.e. late bind MEI device
>> >+	 */
>> >+	struct device *base = data;
>> >+	struct pci_dev *pdev;
>> >+
>> >+	if (!dev)
>> >+		return 0;
>> >+
>> >+	if (!dev_is_pci(dev))
>> >+		return 0;
>> >+
>> >+	pdev = to_pci_dev(dev);
>> >+
>> >+	if (pdev->vendor != PCI_VENDOR_ID_INTEL)
>> >+		return 0;
>> >+
>> >+	if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8) &&
>> >+	    pdev->class != (PCI_CLASS_DISPLAY_OTHER << 8))
>>
>> this doesn't seem right, we should allow other PCI classes. AFAICS this
>> check could just be removed and just leave the INTEL_COMPONENT_LB below
>> to protect for component match
>>
>> Lucas De Marchi
>>
>
>The subcomponent is unique only in its own instance of the component framework.
>Or I'm wrong here?
>We have to ensure that we have Intel display device, not any other device to
>subcomponent check to work correctly.

We are matching by child-parent relationship + the component id. So you
have both the mei device and another pci device that added that specific
subcomponent and both need to have a common parent. Thinking about
another device that would match the parent-child relationship:  audio,
but audio doesn't add that.

what scenario would cause a false match that I'm not seeing?

Lucas De Marchi

Re: [PATCH v9 2/9] mei: late_bind: add late binding component driver

[Lucas De Marchi]

On Tue, Sep 09, 2025 at 09:43:02AM -0500, Lucas De Marchi wrote:
>On Tue, Sep 09, 2025 at 04:50:41AM +0000, Usyskin, Alexander wrote:
>>>>+static int mei_lb_component_match(struct device *dev, int subcomponent,
>>>>+				  void *data)
>>>>+{
>>>>+	/*
>>>>+	 * This function checks if requester is Intel %PCI_CLASS_DISPLAY_VGA
>>>or
>>>>+	 * %PCI_CLASS_DISPLAY_OTHER device, and checks if the requester is
>>>the
>>>>+	 * grand parent of mei_if i.e. late bind MEI device
>>>>+	 */
>>>>+	struct device *base = data;
>>>>+	struct pci_dev *pdev;
>>>>+
>>>>+	if (!dev)
>>>>+		return 0;
>>>>+
>>>>+	if (!dev_is_pci(dev))
>>>>+		return 0;
>>>>+
>>>>+	pdev = to_pci_dev(dev);
>>>>+
>>>>+	if (pdev->vendor != PCI_VENDOR_ID_INTEL)
>>>>+		return 0;
>>>>+
>>>>+	if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8) &&
>>>>+	    pdev->class != (PCI_CLASS_DISPLAY_OTHER << 8))
>>>
>>>this doesn't seem right, we should allow other PCI classes. AFAICS this
>>>check could just be removed and just leave the INTEL_COMPONENT_LB below
>>>to protect for component match
>>>
>>>Lucas De Marchi
>>>
>>
>>The subcomponent is unique only in its own instance of the component framework.
>>Or I'm wrong here?
>>We have to ensure that we have Intel display device, not any other device to
>>subcomponent check to work correctly.
>
>We are matching by child-parent relationship + the component id. So you
>have both the mei device and another pci device that added that specific
>subcomponent and both need to have a common parent. Thinking about
>another device that would match the parent-child relationship:  audio,
>but audio doesn't add that.
>
>what scenario would cause a false match that I'm not seeing?

so, I doesn't seem it would fail any, but it's fine as a sanity check.
This is in fact very similar to mei_pxp_component_match(). If we are
going to remove the display check, it could be done later on top, making
sure not to match what it shouldn't.

So, this looks good to me. I tested this on a Battlemage card
it's correclty loading the firmware:

	xe 0000:03:00.0: [drm:xe_late_bind_init [xe]] Request late binding firmware xe/fan_control_8086_e20b_8086_1100.bin
	xe 0000:03:00.0: [drm] Using fan_control firmware from xe/fan_control_8086_e20b_8086_1100.bin version 203.0.0.0
	...
	mei_lb xe.mei-gscfi.768-e2c2afa2-3817-4d19-9d95-06b16b588a5d: bound 0000:03:00.0 (ops xe_late_bind_component_ops [xe])
	xe 0000:03:00.0: [drm:xe_late_bind_work [xe]] Load fan_control firmware
	xe 0000:03:00.0: [drm:xe_late_bind_work [xe]] Load fan_control firmware successful


Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

Greg, does this look ok to you now for us to merge through drm?

thanks
Lucas De Marchi

>
>Lucas De Marchi

Re: [PATCH v9 2/9] mei: late_bind: add late binding component driver

[Rodrigo Vivi]

On Fri, Sep 12, 2025 at 12:19:21AM -0500, Lucas De Marchi wrote:
> On Tue, Sep 09, 2025 at 09:43:02AM -0500, Lucas De Marchi wrote:
> > On Tue, Sep 09, 2025 at 04:50:41AM +0000, Usyskin, Alexander wrote:
> > > > > +static int mei_lb_component_match(struct device *dev, int subcomponent,
> > > > > +				  void *data)
> > > > > +{
> > > > > +	/*
> > > > > +	 * This function checks if requester is Intel %PCI_CLASS_DISPLAY_VGA
> > > > or
> > > > > +	 * %PCI_CLASS_DISPLAY_OTHER device, and checks if the requester is
> > > > the
> > > > > +	 * grand parent of mei_if i.e. late bind MEI device
> > > > > +	 */
> > > > > +	struct device *base = data;
> > > > > +	struct pci_dev *pdev;
> > > > > +
> > > > > +	if (!dev)
> > > > > +		return 0;
> > > > > +
> > > > > +	if (!dev_is_pci(dev))
> > > > > +		return 0;
> > > > > +
> > > > > +	pdev = to_pci_dev(dev);
> > > > > +
> > > > > +	if (pdev->vendor != PCI_VENDOR_ID_INTEL)
> > > > > +		return 0;
> > > > > +
> > > > > +	if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8) &&
> > > > > +	    pdev->class != (PCI_CLASS_DISPLAY_OTHER << 8))
> > > > 
> > > > this doesn't seem right, we should allow other PCI classes. AFAICS this
> > > > check could just be removed and just leave the INTEL_COMPONENT_LB below
> > > > to protect for component match
> > > > 
> > > > Lucas De Marchi
> > > > 
> > > 
> > > The subcomponent is unique only in its own instance of the component framework.
> > > Or I'm wrong here?
> > > We have to ensure that we have Intel display device, not any other device to
> > > subcomponent check to work correctly.
> > 
> > We are matching by child-parent relationship + the component id. So you
> > have both the mei device and another pci device that added that specific
> > subcomponent and both need to have a common parent. Thinking about
> > another device that would match the parent-child relationship:  audio,
> > but audio doesn't add that.
> > 
> > what scenario would cause a false match that I'm not seeing?
> 
> so, I doesn't seem it would fail any, but it's fine as a sanity check.
> This is in fact very similar to mei_pxp_component_match(). If we are
> going to remove the display check, it could be done later on top, making
> sure not to match what it shouldn't.
> 
> So, this looks good to me. I tested this on a Battlemage card
> it's correclty loading the firmware:
> 
> 	xe 0000:03:00.0: [drm:xe_late_bind_init [xe]] Request late binding firmware xe/fan_control_8086_e20b_8086_1100.bin
> 	xe 0000:03:00.0: [drm] Using fan_control firmware from xe/fan_control_8086_e20b_8086_1100.bin version 203.0.0.0
> 	...
> 	mei_lb xe.mei-gscfi.768-e2c2afa2-3817-4d19-9d95-06b16b588a5d: bound 0000:03:00.0 (ops xe_late_bind_component_ops [xe])
> 	xe 0000:03:00.0: [drm:xe_late_bind_work [xe]] Load fan_control firmware
> 	xe 0000:03:00.0: [drm:xe_late_bind_work [xe]] Load fan_control firmware successful
> 
> 
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
> 
> Greg, does this look ok to you now for us to merge through drm?

Greg or Arnd,

ack on getting these 2 mei patches in this series from drm-next trees?

Thanks,
Rodrigo.

> 
> thanks
> Lucas De Marchi
> 
> > 
> > Lucas De Marchi

Re: [PATCH v9 2/9] mei: late_bind: add late binding component driver

[gregkh]

On Fri, Sep 12, 2025 at 12:19:21AM -0500, Lucas De Marchi wrote:
> On Tue, Sep 09, 2025 at 09:43:02AM -0500, Lucas De Marchi wrote:
> > On Tue, Sep 09, 2025 at 04:50:41AM +0000, Usyskin, Alexander wrote:
> > > > > +static int mei_lb_component_match(struct device *dev, int subcomponent,
> > > > > +				  void *data)
> > > > > +{
> > > > > +	/*
> > > > > +	 * This function checks if requester is Intel %PCI_CLASS_DISPLAY_VGA
> > > > or
> > > > > +	 * %PCI_CLASS_DISPLAY_OTHER device, and checks if the requester is
> > > > the
> > > > > +	 * grand parent of mei_if i.e. late bind MEI device
> > > > > +	 */
> > > > > +	struct device *base = data;
> > > > > +	struct pci_dev *pdev;
> > > > > +
> > > > > +	if (!dev)
> > > > > +		return 0;
> > > > > +
> > > > > +	if (!dev_is_pci(dev))
> > > > > +		return 0;
> > > > > +
> > > > > +	pdev = to_pci_dev(dev);
> > > > > +
> > > > > +	if (pdev->vendor != PCI_VENDOR_ID_INTEL)
> > > > > +		return 0;
> > > > > +
> > > > > +	if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8) &&
> > > > > +	    pdev->class != (PCI_CLASS_DISPLAY_OTHER << 8))
> > > > 
> > > > this doesn't seem right, we should allow other PCI classes. AFAICS this
> > > > check could just be removed and just leave the INTEL_COMPONENT_LB below
> > > > to protect for component match
> > > > 
> > > > Lucas De Marchi
> > > > 
> > > 
> > > The subcomponent is unique only in its own instance of the component framework.
> > > Or I'm wrong here?
> > > We have to ensure that we have Intel display device, not any other device to
> > > subcomponent check to work correctly.
> > 
> > We are matching by child-parent relationship + the component id. So you
> > have both the mei device and another pci device that added that specific
> > subcomponent and both need to have a common parent. Thinking about
> > another device that would match the parent-child relationship:  audio,
> > but audio doesn't add that.
> > 
> > what scenario would cause a false match that I'm not seeing?
> 
> so, I doesn't seem it would fail any, but it's fine as a sanity check.
> This is in fact very similar to mei_pxp_component_match(). If we are
> going to remove the display check, it could be done later on top, making
> sure not to match what it shouldn't.
> 
> So, this looks good to me. I tested this on a Battlemage card
> it's correclty loading the firmware:
> 
> 	xe 0000:03:00.0: [drm:xe_late_bind_init [xe]] Request late binding firmware xe/fan_control_8086_e20b_8086_1100.bin
> 	xe 0000:03:00.0: [drm] Using fan_control firmware from xe/fan_control_8086_e20b_8086_1100.bin version 203.0.0.0
> 	...
> 	mei_lb xe.mei-gscfi.768-e2c2afa2-3817-4d19-9d95-06b16b588a5d: bound 0000:03:00.0 (ops xe_late_bind_component_ops [xe])
> 	xe 0000:03:00.0: [drm:xe_late_bind_work [xe]] Load fan_control firmware
> 	xe 0000:03:00.0: [drm:xe_late_bind_work [xe]] Load fan_control firmware successful
> 
> 
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
> 
> Greg, does this look ok to you now for us to merge through drm?

No objection from me:

Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

[PATCH v9 3/9] drm/xe/xe_late_bind_fw: Introduce xe_late_bind_fw

[Badal Nilawar]

Introduce xe_late_bind_fw to enable firmware loading for the devices,
such as the fan controller, during the driver probe. Typically,
firmware for such devices are part of IFWI flash image but can be
replaced at probe after OEM tuning.
This patch binds mei late binding component to enable firmware loading.

v2:
 - Add devm_add_action_or_reset to remove the component (Daniele)
 - Add INTEL_MEI_GSC check in xe_late_bind_init() (Daniele)
v3:
 - Fail driver probe if late bind initialization fails,
   add has_late_bind flag (Daniele)
v4:
 - %s/I915_COMPONENT_LATE_BIND/INTEL_COMPONENT_LATE_BIND/
v6:
 - rebased
v7:
 - rebased
 - In xe_late_bind_init, use drm_err when returning an error to
   stop the probe (Lucas)
 - Use imperative mode in commit message (Lucas)

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/Makefile                |  1 +
 drivers/gpu/drm/xe/xe_device.c             |  5 ++
 drivers/gpu/drm/xe/xe_device_types.h       |  6 ++
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 84 ++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_late_bind_fw.h       | 15 ++++
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h | 33 +++++++++
 drivers/gpu/drm/xe/xe_pci.c                |  2 +
 drivers/gpu/drm/xe/xe_pci_types.h          |  1 +
 8 files changed, 147 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw.c
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw.h
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw_types.h

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index d6bd139c5839..1b062005ac8d 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -84,6 +84,7 @@ xe-y += xe_bb.o \
 	xe_hw_error.o \
 	xe_hw_fence.o \
 	xe_irq.o \
+	xe_late_bind_fw.o \
 	xe_lrc.o \
 	xe_migrate.o \
 	xe_mmio.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 9e2952c9c06a..3fbae3e579d0 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -45,6 +45,7 @@
 #include "xe_hwmon.h"
 #include "xe_i2c.h"
 #include "xe_irq.h"
+#include "xe_late_bind_fw.h"
 #include "xe_mmio.h"
 #include "xe_module.h"
 #include "xe_nvm.h"
@@ -901,6 +902,10 @@ int xe_device_probe(struct xe_device *xe)
 	if (err)
 		return err;
 
+	err = xe_late_bind_init(&xe->late_bind);
+	if (err)
+		return err;
+
 	err = xe_oa_init(xe);
 	if (err)
 		return err;
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 092004d14db2..0aab247075ca 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -14,6 +14,7 @@
 
 #include "xe_devcoredump_types.h"
 #include "xe_heci_gsc.h"
+#include "xe_late_bind_fw_types.h"
 #include "xe_lmtt_types.h"
 #include "xe_memirq_types.h"
 #include "xe_oa_types.h"
@@ -282,6 +283,8 @@ struct xe_device {
 		u8 has_heci_cscfi:1;
 		/** @info.has_heci_gscfi: device has heci gscfi */
 		u8 has_heci_gscfi:1;
+		/** @info.has_late_bind: Device has firmware late binding support */
+		u8 has_late_bind:1;
 		/** @info.has_llc: Device has a shared CPU+GPU last level cache */
 		u8 has_llc:1;
 		/** @info.has_mbx_power_limits: Device has support to manage power limits using
@@ -529,6 +532,9 @@ struct xe_device {
 	/** @nvm: discrete graphics non-volatile memory */
 	struct intel_dg_nvm_dev *nvm;
 
+	/** @late_bind: xe mei late bind interface */
+	struct xe_late_bind late_bind;
+
 	/** @oa: oa observation subsystem */
 	struct xe_oa oa;
 
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
new file mode 100644
index 000000000000..5f386f860728
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#include <linux/component.h>
+#include <linux/delay.h>
+
+#include <drm/drm_managed.h>
+#include <drm/intel/i915_component.h>
+#include <drm/intel/intel_lb_mei_interface.h>
+#include <drm/drm_print.h>
+
+#include "xe_device.h"
+#include "xe_late_bind_fw.h"
+
+static struct xe_device *
+late_bind_to_xe(struct xe_late_bind *late_bind)
+{
+	return container_of(late_bind, struct xe_device, late_bind);
+}
+
+static int xe_late_bind_component_bind(struct device *xe_kdev,
+				       struct device *mei_kdev, void *data)
+{
+	struct xe_device *xe = kdev_to_xe_device(xe_kdev);
+	struct xe_late_bind *late_bind = &xe->late_bind;
+
+	late_bind->component.ops = data;
+	late_bind->component.mei_dev = mei_kdev;
+
+	return 0;
+}
+
+static void xe_late_bind_component_unbind(struct device *xe_kdev,
+					  struct device *mei_kdev, void *data)
+{
+	struct xe_device *xe = kdev_to_xe_device(xe_kdev);
+	struct xe_late_bind *late_bind = &xe->late_bind;
+
+	late_bind->component.ops = NULL;
+}
+
+static const struct component_ops xe_late_bind_component_ops = {
+	.bind   = xe_late_bind_component_bind,
+	.unbind = xe_late_bind_component_unbind,
+};
+
+static void xe_late_bind_remove(void *arg)
+{
+	struct xe_late_bind *late_bind = arg;
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+
+	component_del(xe->drm.dev, &xe_late_bind_component_ops);
+}
+
+/**
+ * xe_late_bind_init() - add xe mei late binding component
+ * @late_bind: pointer to late bind structure.
+ *
+ * Return: 0 if the initialization was successful, a negative errno otherwise.
+ */
+int xe_late_bind_init(struct xe_late_bind *late_bind)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	int err;
+
+	if (!xe->info.has_late_bind)
+		return 0;
+
+	if (!IS_ENABLED(CONFIG_INTEL_MEI_LB) || !IS_ENABLED(CONFIG_INTEL_MEI_GSC)) {
+		drm_info(&xe->drm, "Can't init xe mei late bind missing mei component\n");
+		return 0;
+	}
+
+	err = component_add_typed(xe->drm.dev, &xe_late_bind_component_ops,
+				  INTEL_COMPONENT_LB);
+	if (err < 0) {
+		drm_err(&xe->drm, "Failed to add mei late bind component (%pe)\n", ERR_PTR(err));
+		return err;
+	}
+
+	return devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
+}
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.h b/drivers/gpu/drm/xe/xe_late_bind_fw.h
new file mode 100644
index 000000000000..4c73571c3e62
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef _XE_LATE_BIND_FW_H_
+#define _XE_LATE_BIND_FW_H_
+
+#include <linux/types.h>
+
+struct xe_late_bind;
+
+int xe_late_bind_init(struct xe_late_bind *late_bind);
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
new file mode 100644
index 000000000000..f79e5aefed94
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef _XE_LATE_BIND_TYPES_H_
+#define _XE_LATE_BIND_TYPES_H_
+
+#include <linux/iosys-map.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+
+/**
+ * struct xe_late_bind_component - Late Binding services component
+ * @mei_dev: device that provide Late Binding service.
+ * @ops: Ops implemented by Late Binding driver, used by Xe driver.
+ *
+ * Communication between Xe and MEI drivers for Late Binding services
+ */
+struct xe_late_bind_component {
+	struct device *mei_dev;
+	const struct late_bind_component_ops *ops;
+};
+
+/**
+ * struct xe_late_bind
+ */
+struct xe_late_bind {
+	/** @component: struct for communication with mei component */
+	struct xe_late_bind_component component;
+};
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 701ba9baa9d7..77bee811a150 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -334,6 +334,7 @@ static const struct xe_device_desc bmg_desc = {
 	.has_mbx_power_limits = true,
 	.has_gsc_nvm = 1,
 	.has_heci_cscfi = 1,
+	.has_late_bind = true,
 	.has_sriov = true,
 	.max_gt_per_tile = 2,
 	.needs_scratch = true,
@@ -588,6 +589,7 @@ static int xe_info_init_early(struct xe_device *xe,
 	xe->info.has_gsc_nvm = desc->has_gsc_nvm;
 	xe->info.has_heci_gscfi = desc->has_heci_gscfi;
 	xe->info.has_heci_cscfi = desc->has_heci_cscfi;
+	xe->info.has_late_bind = desc->has_late_bind;
 	xe->info.has_llc = desc->has_llc;
 	xe->info.has_pxp = desc->has_pxp;
 	xe->info.has_sriov = desc->has_sriov;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index b63002fc0f67..9b9766a3baa3 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -39,6 +39,7 @@ struct xe_device_desc {
 	u8 has_gsc_nvm:1;
 	u8 has_heci_gscfi:1;
 	u8 has_heci_cscfi:1;
+	u8 has_late_bind:1;
 	u8 has_llc:1;
 	u8 has_mbx_power_limits:1;
 	u8 has_pxp:1;
-- 
2.34.1

[PATCH v9 4/9] drm/xe/xe_late_bind_fw: Initialize late binding firmware

[Badal Nilawar]

Search for late binding firmware binaries and populate the meta data of
firmware structures.

v2 (Daniele):
 - drm_err if firmware size is more than max pay load size
 - s/request_firmware/firmware_request_nowarn/ as firmware will
   not be available for all possible cards
v3 (Daniele):
 - init firmware from within xe_late_bind_init, propagate error
 - switch late_bind_fw to array to handle multiple firmware types
v4 (Daniele):
 - Alloc payload dynamically, fix nits
v6 (Daniele)
 - %s/MAX_PAYLOAD_SIZE/XE_LB_MAX_PAYLOAD_SIZE/

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 100 ++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |  30 +++++++
 2 files changed, 129 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index 5f386f860728..2a9255e73747 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -5,6 +5,7 @@
 
 #include <linux/component.h>
 #include <linux/delay.h>
+#include <linux/firmware.h>
 
 #include <drm/drm_managed.h>
 #include <drm/intel/i915_component.h>
@@ -13,6 +14,16 @@
 
 #include "xe_device.h"
 #include "xe_late_bind_fw.h"
+#include "xe_pcode.h"
+#include "xe_pcode_api.h"
+
+static const u32 fw_id_to_type[] = {
+		[XE_LB_FW_FAN_CONTROL] = INTEL_LB_TYPE_FAN_CONTROL,
+	};
+
+static const char * const fw_id_to_name[] = {
+		[XE_LB_FW_FAN_CONTROL] = "fan_control",
+	};
 
 static struct xe_device *
 late_bind_to_xe(struct xe_late_bind *late_bind)
@@ -20,6 +31,89 @@ late_bind_to_xe(struct xe_late_bind *late_bind)
 	return container_of(late_bind, struct xe_device, late_bind);
 }
 
+static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	struct xe_tile *root_tile = xe_device_get_root_tile(xe);
+	u32 uval;
+
+	if (!xe_pcode_read(root_tile,
+			   PCODE_MBOX(FAN_SPEED_CONTROL, FSC_READ_NUM_FANS, 0), &uval, NULL))
+		return uval;
+	else
+		return 0;
+}
+
+static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	struct xe_late_bind_fw *lb_fw;
+	const struct firmware *fw;
+	u32 num_fans;
+	int ret;
+
+	if (fw_id >= XE_LB_FW_MAX_ID)
+		return -EINVAL;
+
+	lb_fw = &late_bind->late_bind_fw[fw_id];
+
+	lb_fw->id = fw_id;
+	lb_fw->type = fw_id_to_type[lb_fw->id];
+	lb_fw->flags &= ~INTEL_LB_FLAG_IS_PERSISTENT;
+
+	if (lb_fw->type == INTEL_LB_TYPE_FAN_CONTROL) {
+		num_fans = xe_late_bind_fw_num_fans(late_bind);
+		drm_dbg(&xe->drm, "Number of Fans: %d\n", num_fans);
+		if (!num_fans)
+			return 0;
+	}
+
+	snprintf(lb_fw->blob_path, sizeof(lb_fw->blob_path), "xe/%s_8086_%04x_%04x_%04x.bin",
+		 fw_id_to_name[lb_fw->id], pdev->device,
+		 pdev->subsystem_vendor, pdev->subsystem_device);
+
+	drm_dbg(&xe->drm, "Request late binding firmware %s\n", lb_fw->blob_path);
+	ret = firmware_request_nowarn(&fw, lb_fw->blob_path, xe->drm.dev);
+	if (ret) {
+		drm_dbg(&xe->drm, "%s late binding fw not available for current device",
+			fw_id_to_name[lb_fw->id]);
+		return 0;
+	}
+
+	if (fw->size > XE_LB_MAX_PAYLOAD_SIZE) {
+		drm_err(&xe->drm, "Firmware %s size %zu is larger than max pay load size %u\n",
+			lb_fw->blob_path, fw->size, XE_LB_MAX_PAYLOAD_SIZE);
+		release_firmware(fw);
+		return -ENODATA;
+	}
+
+	lb_fw->payload_size = fw->size;
+	lb_fw->payload = drmm_kzalloc(&xe->drm, lb_fw->payload_size, GFP_KERNEL);
+	if (!lb_fw->payload) {
+		release_firmware(fw);
+		return -ENOMEM;
+	}
+
+	memcpy((void *)lb_fw->payload, fw->data, lb_fw->payload_size);
+	release_firmware(fw);
+
+	return 0;
+}
+
+static int xe_late_bind_fw_init(struct xe_late_bind *late_bind)
+{
+	int ret;
+	int fw_id;
+
+	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
+		ret = __xe_late_bind_fw_init(late_bind, fw_id);
+		if (ret)
+			return ret;
+	}
+	return 0;
+}
+
 static int xe_late_bind_component_bind(struct device *xe_kdev,
 				       struct device *mei_kdev, void *data)
 {
@@ -80,5 +174,9 @@ int xe_late_bind_init(struct xe_late_bind *late_bind)
 		return err;
 	}
 
-	return devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
+	err = devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
+	if (err)
+		return err;
+
+	return xe_late_bind_fw_init(late_bind);
 }
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
index f79e5aefed94..c4a8042f2600 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -10,6 +10,34 @@
 #include <linux/mutex.h>
 #include <linux/types.h>
 
+#define XE_LB_MAX_PAYLOAD_SIZE SZ_4K
+
+/**
+ * xe_late_bind_fw_id - enum to determine late binding fw index
+ */
+enum xe_late_bind_fw_id {
+	XE_LB_FW_FAN_CONTROL = 0,
+	XE_LB_FW_MAX_ID
+};
+
+/**
+ * struct xe_late_bind_fw
+ */
+struct xe_late_bind_fw {
+	/** @id: firmware index */
+	u32 id;
+	/** @blob_path: firmware binary path */
+	char blob_path[PATH_MAX];
+	/** @type: firmware type */
+	u32  type;
+	/** @flags: firmware flags */
+	u32  flags;
+	/** @payload: to store the late binding blob */
+	const u8  *payload;
+	/** @payload_size: late binding blob payload_size */
+	size_t payload_size;
+};
+
 /**
  * struct xe_late_bind_component - Late Binding services component
  * @mei_dev: device that provide Late Binding service.
@@ -28,6 +56,8 @@ struct xe_late_bind_component {
 struct xe_late_bind {
 	/** @component: struct for communication with mei component */
 	struct xe_late_bind_component component;
+	/** @late_bind_fw: late binding firmware array */
+	struct xe_late_bind_fw late_bind_fw[XE_LB_FW_MAX_ID];
 };
 
 #endif
-- 
2.34.1

[PATCH v9 5/9] drm/xe/xe_late_bind_fw: Load late binding firmware

[Badal Nilawar]

Load late binding firmware

v2:
 - s/EAGAIN/EBUSY/
 - Flush worker in suspend and driver unload (Daniele)
v3:
 - Use retry interval of 6s, in steps of 200ms, to allow
   other OS components release MEI CL handle (Sasha)
v4:
 - return -ENODEV if component not added (Daniele)
 - parse and print status returned by csc
v5:
 - Use payload to check firmware valid (Daniele)
 - Obtain the RPM reference before scheduling the worker to
   ensure the device remains awake until the worker completes
   firmware loading (Rodrigo)
v6:
 - In case of error donot re-attempt fw download (Daniele)
v7 (Rodrigo):
 - Rename of mei structs and callback.

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 157 ++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_late_bind_fw.h       |   1 +
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |   9 +-
 3 files changed, 165 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index 2a9255e73747..bb161d99602e 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -16,6 +16,20 @@
 #include "xe_late_bind_fw.h"
 #include "xe_pcode.h"
 #include "xe_pcode_api.h"
+#include "xe_pm.h"
+
+/*
+ * The component should load quite quickly in most cases, but it could take
+ * a bit. Using a very big timeout just to cover the worst case scenario
+ */
+#define LB_INIT_TIMEOUT_MS 20000
+
+/*
+ * Retry interval set to 6 seconds, in steps of 200 ms, to allow time for
+ * other OS components to release the MEI CL handle
+ */
+#define LB_FW_LOAD_RETRY_MAXCOUNT 30
+#define LB_FW_LOAD_RETRY_PAUSE_MS 200
 
 static const u32 fw_id_to_type[] = {
 		[XE_LB_FW_FAN_CONTROL] = INTEL_LB_TYPE_FAN_CONTROL,
@@ -31,6 +45,30 @@ late_bind_to_xe(struct xe_late_bind *late_bind)
 	return container_of(late_bind, struct xe_device, late_bind);
 }
 
+static const char *xe_late_bind_parse_status(uint32_t status)
+{
+	switch (status) {
+	case INTEL_LB_STATUS_SUCCESS:
+		return "success";
+	case INTEL_LB_STATUS_4ID_MISMATCH:
+		return "4Id Mismatch";
+	case INTEL_LB_STATUS_ARB_FAILURE:
+		return "ARB Failure";
+	case INTEL_LB_STATUS_GENERAL_ERROR:
+		return "General Error";
+	case INTEL_LB_STATUS_INVALID_PARAMS:
+		return "Invalid Params";
+	case INTEL_LB_STATUS_INVALID_SIGNATURE:
+		return "Invalid Signature";
+	case INTEL_LB_STATUS_INVALID_PAYLOAD:
+		return "Invalid Payload";
+	case INTEL_LB_STATUS_TIMEOUT:
+		return "Timeout";
+	default:
+		return "Unknown error";
+	}
+}
+
 static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
 {
 	struct xe_device *xe = late_bind_to_xe(late_bind);
@@ -44,6 +82,101 @@ static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
 		return 0;
 }
 
+static void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	struct xe_late_bind_fw *lbfw;
+	int fw_id;
+
+	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
+		lbfw = &late_bind->late_bind_fw[fw_id];
+		if (lbfw->payload && late_bind->wq) {
+			drm_dbg(&xe->drm, "Flush work: load %s firmware\n",
+				fw_id_to_name[lbfw->id]);
+			flush_work(&lbfw->work);
+		}
+	}
+}
+
+static void xe_late_bind_work(struct work_struct *work)
+{
+	struct xe_late_bind_fw *lbfw = container_of(work, struct xe_late_bind_fw, work);
+	struct xe_late_bind *late_bind = container_of(lbfw, struct xe_late_bind,
+						      late_bind_fw[lbfw->id]);
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	int retry = LB_FW_LOAD_RETRY_MAXCOUNT;
+	int ret;
+	int slept;
+
+	xe_device_assert_mem_access(xe);
+
+	/* we can queue this before the component is bound */
+	for (slept = 0; slept < LB_INIT_TIMEOUT_MS; slept += 100) {
+		if (late_bind->component.ops)
+			break;
+		msleep(100);
+	}
+
+	if (!late_bind->component.ops) {
+		drm_err(&xe->drm, "Late bind component not bound\n");
+		/* Do not re-attempt fw load */
+		drmm_kfree(&xe->drm, (void *)lbfw->payload);
+		lbfw->payload = NULL;
+		goto out;
+	}
+
+	drm_dbg(&xe->drm, "Load %s firmware\n", fw_id_to_name[lbfw->id]);
+
+	do {
+		ret = late_bind->component.ops->push_payload(late_bind->component.mei_dev,
+							     lbfw->type,
+							     lbfw->flags,
+							     lbfw->payload,
+							     lbfw->payload_size);
+		if (!ret)
+			break;
+		msleep(LB_FW_LOAD_RETRY_PAUSE_MS);
+	} while (--retry && ret == -EBUSY);
+
+	if (!ret) {
+		drm_dbg(&xe->drm, "Load %s firmware successful\n",
+			fw_id_to_name[lbfw->id]);
+		goto out;
+	}
+
+	if (ret > 0)
+		drm_err(&xe->drm, "Load %s firmware failed with err %d, %s\n",
+			fw_id_to_name[lbfw->id], ret, xe_late_bind_parse_status(ret));
+	else
+		drm_err(&xe->drm, "Load %s firmware failed with err %d",
+			fw_id_to_name[lbfw->id], ret);
+	/* Do not re-attempt fw load */
+	drmm_kfree(&xe->drm, (void *)lbfw->payload);
+	lbfw->payload = NULL;
+
+out:
+	xe_pm_runtime_put(xe);
+}
+
+int xe_late_bind_fw_load(struct xe_late_bind *late_bind)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	struct xe_late_bind_fw *lbfw;
+	int fw_id;
+
+	if (!late_bind->component_added)
+		return -ENODEV;
+
+	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
+		lbfw = &late_bind->late_bind_fw[fw_id];
+		if (lbfw->payload) {
+			xe_pm_runtime_get_noresume(xe);
+			queue_work(late_bind->wq, &lbfw->work);
+		}
+	}
+	return 0;
+}
+
 static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
 {
 	struct xe_device *xe = late_bind_to_xe(late_bind);
@@ -97,6 +230,7 @@ static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
 
 	memcpy((void *)lb_fw->payload, fw->data, lb_fw->payload_size);
 	release_firmware(fw);
+	INIT_WORK(&lb_fw->work, xe_late_bind_work);
 
 	return 0;
 }
@@ -106,11 +240,16 @@ static int xe_late_bind_fw_init(struct xe_late_bind *late_bind)
 	int ret;
 	int fw_id;
 
+	late_bind->wq = alloc_ordered_workqueue("late-bind-ordered-wq", 0);
+	if (!late_bind->wq)
+		return -ENOMEM;
+
 	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
 		ret = __xe_late_bind_fw_init(late_bind, fw_id);
 		if (ret)
 			return ret;
 	}
+
 	return 0;
 }
 
@@ -132,6 +271,8 @@ static void xe_late_bind_component_unbind(struct device *xe_kdev,
 	struct xe_device *xe = kdev_to_xe_device(xe_kdev);
 	struct xe_late_bind *late_bind = &xe->late_bind;
 
+	xe_late_bind_wait_for_worker_completion(late_bind);
+
 	late_bind->component.ops = NULL;
 }
 
@@ -145,7 +286,15 @@ static void xe_late_bind_remove(void *arg)
 	struct xe_late_bind *late_bind = arg;
 	struct xe_device *xe = late_bind_to_xe(late_bind);
 
+	xe_late_bind_wait_for_worker_completion(late_bind);
+
+	late_bind->component_added = false;
+
 	component_del(xe->drm.dev, &xe_late_bind_component_ops);
+	if (late_bind->wq) {
+		destroy_workqueue(late_bind->wq);
+		late_bind->wq = NULL;
+	}
 }
 
 /**
@@ -174,9 +323,15 @@ int xe_late_bind_init(struct xe_late_bind *late_bind)
 		return err;
 	}
 
+	late_bind->component_added = true;
+
 	err = devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
 	if (err)
 		return err;
 
-	return xe_late_bind_fw_init(late_bind);
+	err = xe_late_bind_fw_init(late_bind);
+	if (err)
+		return err;
+
+	return xe_late_bind_fw_load(late_bind);
 }
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.h b/drivers/gpu/drm/xe/xe_late_bind_fw.h
index 4c73571c3e62..28d56ed2bfdc 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.h
@@ -11,5 +11,6 @@
 struct xe_late_bind;
 
 int xe_late_bind_init(struct xe_late_bind *late_bind);
+int xe_late_bind_fw_load(struct xe_late_bind *late_bind);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
index c4a8042f2600..5c0574aff7b9 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -9,6 +9,7 @@
 #include <linux/iosys-map.h>
 #include <linux/mutex.h>
 #include <linux/types.h>
+#include <linux/workqueue.h>
 
 #define XE_LB_MAX_PAYLOAD_SIZE SZ_4K
 
@@ -36,6 +37,8 @@ struct xe_late_bind_fw {
 	const u8  *payload;
 	/** @payload_size: late binding blob payload_size */
 	size_t payload_size;
+	/** @work: worker to upload latebind blob */
+	struct work_struct work;
 };
 
 /**
@@ -47,7 +50,7 @@ struct xe_late_bind_fw {
  */
 struct xe_late_bind_component {
 	struct device *mei_dev;
-	const struct late_bind_component_ops *ops;
+	const struct intel_lb_component_ops *ops;
 };
 
 /**
@@ -58,6 +61,10 @@ struct xe_late_bind {
 	struct xe_late_bind_component component;
 	/** @late_bind_fw: late binding firmware array */
 	struct xe_late_bind_fw late_bind_fw[XE_LB_FW_MAX_ID];
+	/** @wq: workqueue to submit request to download late bind blob */
+	struct workqueue_struct *wq;
+	/** @component_added: whether the component has been added */
+	bool component_added;
 };
 
 #endif
-- 
2.34.1

[PATCH v9 6/9] drm/xe/xe_late_bind_fw: Reload late binding fw in rpm resume

[Badal Nilawar]

Reload late binding fw during runtime resume.

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_late_bind_fw.c | 2 +-
 drivers/gpu/drm/xe/xe_late_bind_fw.h | 1 +
 drivers/gpu/drm/xe/xe_pm.c           | 4 ++++
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index bb161d99602e..d4d64677bf48 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -82,7 +82,7 @@ static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
 		return 0;
 }
 
-static void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind)
+void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind)
 {
 	struct xe_device *xe = late_bind_to_xe(late_bind);
 	struct xe_late_bind_fw *lbfw;
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.h b/drivers/gpu/drm/xe/xe_late_bind_fw.h
index 28d56ed2bfdc..07e437390539 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.h
@@ -12,5 +12,6 @@ struct xe_late_bind;
 
 int xe_late_bind_init(struct xe_late_bind *late_bind);
 int xe_late_bind_fw_load(struct xe_late_bind *late_bind);
+void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index a2e85030b7f4..b7c05508f67a 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -21,6 +21,7 @@
 #include "xe_gt_idle.h"
 #include "xe_i2c.h"
 #include "xe_irq.h"
+#include "xe_late_bind_fw.h"
 #include "xe_pcode.h"
 #include "xe_pxp.h"
 #include "xe_sriov_vf_ccs.h"
@@ -575,6 +576,9 @@ int xe_pm_runtime_resume(struct xe_device *xe)
 	if (IS_SRIOV_VF(xe))
 		xe_sriov_vf_ccs_register_context(xe);
 
+	if (xe->d3cold.allowed)
+		xe_late_bind_fw_load(&xe->late_bind);
+
 out:
 	xe_rpm_lockmap_release(xe);
 	xe_pm_write_callback_task(xe, NULL);
-- 
2.34.1

[PATCH v9 7/9] drm/xe/xe_late_bind_fw: Reload late binding fw during system resume

[Badal Nilawar]

Reload late binding fw during resume from system suspend

v2:
  - Unconditionally reload late binding fw (Rodrigo)
  - Flush worker during system suspend

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_pm.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index b7c05508f67a..6a170c8581e5 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -129,6 +129,8 @@ int xe_pm_suspend(struct xe_device *xe)
 	if (err)
 		goto err;
 
+	xe_late_bind_wait_for_worker_completion(&xe->late_bind);
+
 	for_each_gt(gt, xe, id)
 		xe_gt_suspend_prepare(gt);
 
@@ -216,6 +218,8 @@ int xe_pm_resume(struct xe_device *xe)
 	if (IS_SRIOV_VF(xe))
 		xe_sriov_vf_ccs_register_context(xe);
 
+	xe_late_bind_fw_load(&xe->late_bind);
+
 	drm_dbg(&xe->drm, "Device resumed\n");
 	return 0;
 err:
-- 
2.34.1

[PATCH v9 8/9] drm/xe/xe_late_bind_fw: Introduce debug fs node to disable late binding

[Badal Nilawar]

Introduce a debug filesystem node to disable late binding fw reload
during the system or runtime resume. This is intended for situations
where the late binding fw needs to be loaded from user mode,
perticularly for validation purpose.
Note that xe kmd doesn't participate in late binding flow from user
space. Binary loaded from the userspace will be lost upon entering to
D3 cold hence user space app need to handle this situation.

v2:
  - s/(uval == 1) ? true : false/!!uval/ (Daniele)
v3:
  - Refine the commit message (Daniele)

Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_debugfs.c            | 41 ++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_late_bind_fw.c       |  3 ++
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |  2 ++
 3 files changed, 46 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index 4b71570529a6..c68e8d73802f 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -330,6 +330,44 @@ static const struct file_operations atomic_svm_timeslice_ms_fops = {
 	.write = atomic_svm_timeslice_ms_set,
 };
 
+static ssize_t disable_late_binding_show(struct file *f, char __user *ubuf,
+					 size_t size, loff_t *pos)
+{
+	struct xe_device *xe = file_inode(f)->i_private;
+	struct xe_late_bind *late_bind = &xe->late_bind;
+	char buf[32];
+	int len;
+
+	len = scnprintf(buf, sizeof(buf), "%d\n", late_bind->disable);
+
+	return simple_read_from_buffer(ubuf, size, pos, buf, len);
+}
+
+static ssize_t disable_late_binding_set(struct file *f, const char __user *ubuf,
+					size_t size, loff_t *pos)
+{
+	struct xe_device *xe = file_inode(f)->i_private;
+	struct xe_late_bind *late_bind = &xe->late_bind;
+	u32 uval;
+	ssize_t ret;
+
+	ret = kstrtouint_from_user(ubuf, size, sizeof(uval), &uval);
+	if (ret)
+		return ret;
+
+	if (uval > 1)
+		return -EINVAL;
+
+	late_bind->disable = !!uval;
+	return size;
+}
+
+static const struct file_operations disable_late_binding_fops = {
+	.owner = THIS_MODULE,
+	.read = disable_late_binding_show,
+	.write = disable_late_binding_set,
+};
+
 void xe_debugfs_register(struct xe_device *xe)
 {
 	struct ttm_device *bdev = &xe->ttm;
@@ -363,6 +401,9 @@ void xe_debugfs_register(struct xe_device *xe)
 	debugfs_create_file("atomic_svm_timeslice_ms", 0600, root, xe,
 			    &atomic_svm_timeslice_ms_fops);
 
+	debugfs_create_file("disable_late_binding", 0600, root, xe,
+			    &disable_late_binding_fops);
+
 	for (mem_type = XE_PL_VRAM0; mem_type <= XE_PL_VRAM1; ++mem_type) {
 		man = ttm_manager_type(bdev, mem_type);
 
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index d4d64677bf48..0f062008ca83 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -167,6 +167,9 @@ int xe_late_bind_fw_load(struct xe_late_bind *late_bind)
 	if (!late_bind->component_added)
 		return -ENODEV;
 
+	if (late_bind->disable)
+		return 0;
+
 	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
 		lbfw = &late_bind->late_bind_fw[fw_id];
 		if (lbfw->payload) {
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
index 5c0574aff7b9..158dc1abe072 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -65,6 +65,8 @@ struct xe_late_bind {
 	struct workqueue_struct *wq;
 	/** @component_added: whether the component has been added */
 	bool component_added;
+	/** @disable: to block late binding reload during pm resume flow*/
+	bool disable;
 };
 
 #endif
-- 
2.34.1

[PATCH v9 9/9] drm/xe/xe_late_bind_fw: Extract and print version info

[Badal Nilawar]

Extract and print version info of the late binding binary.

v2: Some refinements (Daniele)

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 124 +++++++++++++++++++++
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |   3 +
 drivers/gpu/drm/xe/xe_uc_fw_abi.h          |  66 +++++++++++
 3 files changed, 193 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index 0f062008ca83..38f3feb2aecd 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -45,6 +45,121 @@ late_bind_to_xe(struct xe_late_bind *late_bind)
 	return container_of(late_bind, struct xe_device, late_bind);
 }
 
+static struct xe_device *
+late_bind_fw_to_xe(struct xe_late_bind_fw *lb_fw)
+{
+	return container_of(lb_fw, struct xe_device, late_bind.late_bind_fw[lb_fw->id]);
+}
+
+/* Refer to the "Late Bind based Firmware Layout" documentation entry for details */
+static int parse_cpd_header(struct xe_late_bind_fw *lb_fw,
+			    const void *data, size_t size, const char *manifest_entry)
+{
+	struct xe_device *xe = late_bind_fw_to_xe(lb_fw);
+	const struct gsc_cpd_header_v2 *header = data;
+	const struct gsc_manifest_header *manifest;
+	const struct gsc_cpd_entry *entry;
+	size_t min_size = sizeof(*header);
+	u32 offset;
+	int i;
+
+	/* manifest_entry is mandatory */
+	xe_assert(xe, manifest_entry);
+
+	if (size < min_size || header->header_marker != GSC_CPD_HEADER_MARKER)
+		return -ENOENT;
+
+	if (header->header_length < sizeof(struct gsc_cpd_header_v2)) {
+		drm_err(&xe->drm, "%s late binding fw: Invalid CPD header length %u!\n",
+			fw_id_to_name[lb_fw->id], header->header_length);
+		return -EINVAL;
+	}
+
+	min_size = header->header_length + sizeof(struct gsc_cpd_entry) * header->num_of_entries;
+	if (size < min_size) {
+		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
+			fw_id_to_name[lb_fw->id], size, min_size);
+		return -ENODATA;
+	}
+
+	/* Look for the manifest first */
+	entry = (void *)header + header->header_length;
+	for (i = 0; i < header->num_of_entries; i++, entry++)
+		if (strcmp(entry->name, manifest_entry) == 0)
+			offset = entry->offset & GSC_CPD_ENTRY_OFFSET_MASK;
+
+	if (!offset) {
+		drm_err(&xe->drm, "%s late binding fw: Failed to find manifest_entry\n",
+			fw_id_to_name[lb_fw->id]);
+		return -ENODATA;
+	}
+
+	min_size = offset + sizeof(struct gsc_manifest_header);
+	if (size < min_size) {
+		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
+			fw_id_to_name[lb_fw->id], size, min_size);
+		return -ENODATA;
+	}
+
+	manifest = data + offset;
+
+	lb_fw->version = manifest->fw_version;
+
+	return 0;
+}
+
+/* Refer to the "Late Bind based Firmware Layout" documentation entry for details */
+static int parse_lb_layout(struct xe_late_bind_fw *lb_fw,
+			   const void *data, size_t size, const char *fpt_entry)
+{
+	struct xe_device *xe = late_bind_fw_to_xe(lb_fw);
+	const struct csc_fpt_header *header = data;
+	const struct csc_fpt_entry *entry;
+	size_t min_size = sizeof(*header);
+	u32 offset;
+	int i;
+
+	/* fpt_entry is mandatory */
+	xe_assert(xe, fpt_entry);
+
+	if (size < min_size || header->header_marker != CSC_FPT_HEADER_MARKER)
+		return -ENOENT;
+
+	if (header->header_length < sizeof(struct csc_fpt_header)) {
+		drm_err(&xe->drm, "%s late binding fw: Invalid FPT header length %u!\n",
+			fw_id_to_name[lb_fw->id], header->header_length);
+		return -EINVAL;
+	}
+
+	min_size = header->header_length + sizeof(struct csc_fpt_entry) * header->num_of_entries;
+	if (size < min_size) {
+		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
+			fw_id_to_name[lb_fw->id], size, min_size);
+		return -ENODATA;
+	}
+
+	/* Look for the cpd header first */
+	entry = (void *)header + header->header_length;
+	for (i = 0; i < header->num_of_entries; i++, entry++)
+		if (strcmp(entry->name, fpt_entry) == 0)
+			offset = entry->offset;
+
+	if (!offset) {
+		drm_err(&xe->drm, "%s late binding fw: Failed to find fpt_entry\n",
+			fw_id_to_name[lb_fw->id]);
+		return -ENODATA;
+	}
+
+	min_size = offset + sizeof(struct gsc_cpd_header_v2);
+	if (size < min_size) {
+		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
+			fw_id_to_name[lb_fw->id], size, min_size);
+		return -ENODATA;
+	}
+
+	return parse_cpd_header(lb_fw, data + offset, size - offset, "LTES.man");
+}
+
 static const char *xe_late_bind_parse_status(uint32_t status)
 {
 	switch (status) {
@@ -224,6 +339,10 @@ static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
 		return -ENODATA;
 	}
 
+	ret = parse_lb_layout(lb_fw, fw->data, fw->size, "LTES");
+	if (ret)
+		return ret;
+
 	lb_fw->payload_size = fw->size;
 	lb_fw->payload = drmm_kzalloc(&xe->drm, lb_fw->payload_size, GFP_KERNEL);
 	if (!lb_fw->payload) {
@@ -231,6 +350,11 @@ static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
 		return -ENOMEM;
 	}
 
+	drm_info(&xe->drm, "Using %s firmware from %s version %u.%u.%u.%u\n",
+		 fw_id_to_name[lb_fw->id], lb_fw->blob_path,
+		 lb_fw->version.major, lb_fw->version.minor,
+		 lb_fw->version.hotfix, lb_fw->version.build);
+
 	memcpy((void *)lb_fw->payload, fw->data, lb_fw->payload_size);
 	release_firmware(fw);
 	INIT_WORK(&lb_fw->work, xe_late_bind_work);
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
index 158dc1abe072..0f5da89ce98b 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -10,6 +10,7 @@
 #include <linux/mutex.h>
 #include <linux/types.h>
 #include <linux/workqueue.h>
+#include "xe_uc_fw_abi.h"
 
 #define XE_LB_MAX_PAYLOAD_SIZE SZ_4K
 
@@ -39,6 +40,8 @@ struct xe_late_bind_fw {
 	size_t payload_size;
 	/** @work: worker to upload latebind blob */
 	struct work_struct work;
+	/** @version: late binding blob manifest version */
+	struct gsc_version version;
 };
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_uc_fw_abi.h b/drivers/gpu/drm/xe/xe_uc_fw_abi.h
index 87ade41209d0..78782d105fa9 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw_abi.h
+++ b/drivers/gpu/drm/xe/xe_uc_fw_abi.h
@@ -318,4 +318,70 @@ struct gsc_manifest_header {
 	u32 exponent_size; /* in dwords */
 } __packed;
 
+/**
+ * DOC: Late binding Firmware Layout
+ *
+ * The Late binding binary starts with FPT header, which contains locations
+ * of various partitions of the binary. Here we're interested in finding out
+ * manifest version. To the manifest version, we need to locate CPD header
+ * one of the entry in CPD header points to manifest header. Manifest header
+ * contains the version.
+ *
+ *      +================================================+
+ *      |  FPT Header                                    |
+ *      +================================================+
+ *      |  FPT entries[]                                 |
+ *      |      entry1                                    |
+ *      |      ...                                       |
+ *      |      entryX                                    |
+ *      |          "LTES"                                |
+ *      |          ...                                   |
+ *      |          offset  >-----------------------------|------o
+ *      +================================================+      |
+ *                                                              |
+ *      +================================================+      |
+ *      |  CPD Header                                    |<-----o
+ *      +================================================+
+ *      |  CPD entries[]                                 |
+ *      |      entry1                                    |
+ *      |      ...                                       |
+ *      |      entryX                                    |
+ *      |          "LTES.man"                            |
+ *      |           ...                                  |
+ *      |           offset  >----------------------------|------o
+ *      +================================================+      |
+ *                                                              |
+ *      +================================================+      |
+ *      |  Manifest Header                               |<-----o
+ *      |      ...                                       |
+ *      |      FW version                                |
+ *      |      ...                                       |
+ *      +================================================+
+ */
+
+/* FPT Headers */
+struct csc_fpt_header {
+	u32 header_marker;
+#define CSC_FPT_HEADER_MARKER 0x54504624
+	u32 num_of_entries;
+	u8 header_version;
+	u8 entry_version;
+	u8 header_length; /* in bytes */
+	u8 flags;
+	u16 ticks_to_add;
+	u16 tokens_to_add;
+	u32 uma_size;
+	u32 crc32;
+	struct gsc_version fitc_version;
+} __packed;
+
+struct csc_fpt_entry {
+	u8 name[4]; /* partition name */
+	u32 reserved1;
+	u32 offset; /* offset from beginning of CSE region */
+	u32 length; /* partition length in bytes */
+	u32 reserved2[3];
+	u32 partition_flags;
+} __packed;
+
 #endif
-- 
2.34.1

Re: [PATCH v9 9/9] drm/xe/xe_late_bind_fw: Extract and print version info

[Kees Bakker]

Op 05-09-2025 om 17:49 schreef Badal Nilawar:
> Extract and print version info of the late binding binary.
>
> v2: Some refinements (Daniele)
>
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_late_bind_fw.c       | 124 +++++++++++++++++++++
>   drivers/gpu/drm/xe/xe_late_bind_fw_types.h |   3 +
>   drivers/gpu/drm/xe/xe_uc_fw_abi.h          |  66 +++++++++++
>   3 files changed, 193 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
> index 0f062008ca83..38f3feb2aecd 100644
> --- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
> +++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
> @@ -45,6 +45,121 @@ late_bind_to_xe(struct xe_late_bind *late_bind)
>   	return container_of(late_bind, struct xe_device, late_bind);
>   }
>   
> +static struct xe_device *
> +late_bind_fw_to_xe(struct xe_late_bind_fw *lb_fw)
> +{
> +	return container_of(lb_fw, struct xe_device, late_bind.late_bind_fw[lb_fw->id]);
> +}
> +
> +/* Refer to the "Late Bind based Firmware Layout" documentation entry for details */
> +static int parse_cpd_header(struct xe_late_bind_fw *lb_fw,
> +			    const void *data, size_t size, const char *manifest_entry)
> +{
> +	struct xe_device *xe = late_bind_fw_to_xe(lb_fw);
> +	const struct gsc_cpd_header_v2 *header = data;
> +	const struct gsc_manifest_header *manifest;
> +	const struct gsc_cpd_entry *entry;
> +	size_t min_size = sizeof(*header);
> +	u32 offset;
> +	int i;
> +
> +	/* manifest_entry is mandatory */
> +	xe_assert(xe, manifest_entry);
> +
> +	if (size < min_size || header->header_marker != GSC_CPD_HEADER_MARKER)
> +		return -ENOENT;
> +
> +	if (header->header_length < sizeof(struct gsc_cpd_header_v2)) {
> +		drm_err(&xe->drm, "%s late binding fw: Invalid CPD header length %u!\n",
> +			fw_id_to_name[lb_fw->id], header->header_length);
> +		return -EINVAL;
> +	}
> +
> +	min_size = header->header_length + sizeof(struct gsc_cpd_entry) * header->num_of_entries;
> +	if (size < min_size) {
> +		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
> +			fw_id_to_name[lb_fw->id], size, min_size);
> +		return -ENODATA;
> +	}
> +
> +	/* Look for the manifest first */
> +	entry = (void *)header + header->header_length;
> +	for (i = 0; i < header->num_of_entries; i++, entry++)
> +		if (strcmp(entry->name, manifest_entry) == 0)
> +			offset = entry->offset & GSC_CPD_ENTRY_OFFSET_MASK;
> +
> +	if (!offset) {
This for loop looks suspicious. Do you continue the loop on purpose
after finding the first match? Or should there be a break?
Also, if there is no match then offset is uninitialized. Isn't it better
to initialize offset at the start?
-- 
Kees

Re: [PATCH v9 9/9] drm/xe/xe_late_bind_fw: Extract and print version info

[Nilawar, Badal]

On 25-09-2025 02:14, Kees Bakker wrote:
> Op 05-09-2025 om 17:49 schreef Badal Nilawar:
>> Extract and print version info of the late binding binary.
>>
>> v2: Some refinements (Daniele)
>>
>> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
>> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_late_bind_fw.c       | 124 +++++++++++++++++++++
>>   drivers/gpu/drm/xe/xe_late_bind_fw_types.h |   3 +
>>   drivers/gpu/drm/xe/xe_uc_fw_abi.h          |  66 +++++++++++
>>   3 files changed, 193 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c 
>> b/drivers/gpu/drm/xe/xe_late_bind_fw.c
>> index 0f062008ca83..38f3feb2aecd 100644
>> --- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
>> +++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
>> @@ -45,6 +45,121 @@ late_bind_to_xe(struct xe_late_bind *late_bind)
>>       return container_of(late_bind, struct xe_device, late_bind);
>>   }
>>   +static struct xe_device *
>> +late_bind_fw_to_xe(struct xe_late_bind_fw *lb_fw)
>> +{
>> +    return container_of(lb_fw, struct xe_device, 
>> late_bind.late_bind_fw[lb_fw->id]);
>> +}
>> +
>> +/* Refer to the "Late Bind based Firmware Layout" documentation 
>> entry for details */
>> +static int parse_cpd_header(struct xe_late_bind_fw *lb_fw,
>> +                const void *data, size_t size, const char 
>> *manifest_entry)
>> +{
>> +    struct xe_device *xe = late_bind_fw_to_xe(lb_fw);
>> +    const struct gsc_cpd_header_v2 *header = data;
>> +    const struct gsc_manifest_header *manifest;
>> +    const struct gsc_cpd_entry *entry;
>> +    size_t min_size = sizeof(*header);
>> +    u32 offset;
>> +    int i;
>> +
>> +    /* manifest_entry is mandatory */
>> +    xe_assert(xe, manifest_entry);
>> +
>> +    if (size < min_size || header->header_marker != 
>> GSC_CPD_HEADER_MARKER)
>> +        return -ENOENT;
>> +
>> +    if (header->header_length < sizeof(struct gsc_cpd_header_v2)) {
>> +        drm_err(&xe->drm, "%s late binding fw: Invalid CPD header 
>> length %u!\n",
>> +            fw_id_to_name[lb_fw->id], header->header_length);
>> +        return -EINVAL;
>> +    }
>> +
>> +    min_size = header->header_length + sizeof(struct gsc_cpd_entry) 
>> * header->num_of_entries;
>> +    if (size < min_size) {
>> +        drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
>> +            fw_id_to_name[lb_fw->id], size, min_size);
>> +        return -ENODATA;
>> +    }
>> +
>> +    /* Look for the manifest first */
>> +    entry = (void *)header + header->header_length;
>> +    for (i = 0; i < header->num_of_entries; i++, entry++)
>> +        if (strcmp(entry->name, manifest_entry) == 0)
>> +            offset = entry->offset & GSC_CPD_ENTRY_OFFSET_MASK;
>> +
>> +    if (!offset) {
> This for loop looks suspicious. Do you continue the loop on purpose
> after finding the first match? Or should there be a break?
> Also, if there is no match then offset is uninitialized. Isn't it better
> to initialize offset at the start?

Thanks for highlighting. This has been addressed in this patch 
https://lore.kernel.org/intel-xe/20250924102208.9216-1-colin.i.king@gmail.com/.

Regards,
Badal

✗ CI.checkpatch: warning for Introducing firmware late binding

[Patchwork]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/154104/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
4087ecac9007bf53f0d36756bd06d570e5d7050f
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 7b5b06fea4e4f2cdffc61e7a7649a22e74d1eed6
Author: Badal Nilawar <badal.nilawar@intel.com>
Date:   Fri Sep 5 21:19:53 2025 +0530

    drm/xe/xe_late_bind_fw: Extract and print version info
    
    Extract and print version info of the late binding binary.
    
    v2: Some refinements (Daniele)
    
    Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
    Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
    Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+ /mt/dim checkpatch 1f778fbdf929e24ce13112d14835b780959892b0 drm-intel
c3ad2c0941bf mei: bus: add mei_cldev_mtu interface
4e11fb875031 mei: late_bind: add late binding component driver
-:67: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#67: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 415 lines checked
8a94cf22377c drm/xe/xe_late_bind_fw: Introduce xe_late_bind_fw
-:99: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#99: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 201 lines checked
fa22ee3e6aa6 drm/xe/xe_late_bind_fw: Initialize late binding firmware
a1e0e1c13b21 drm/xe/xe_late_bind_fw: Load late binding firmware
55e2bdf5faff drm/xe/xe_late_bind_fw: Reload late binding fw in rpm resume
ed495665ff01 drm/xe/xe_late_bind_fw: Reload late binding fw during system resume
e14862c3a1fb drm/xe/xe_late_bind_fw: Introduce debug fs node to disable late binding
7b5b06fea4e4 drm/xe/xe_late_bind_fw: Extract and print version info

✓ CI.KUnit: success for Introducing firmware late binding

[Patchwork]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/154104/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[16:08:10] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:08:14] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:08:43] Starting KUnit Kernel (1/1)...
[16:08:43] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:08:43] ================== guc_buf (11 subtests) ===================
[16:08:43] [PASSED] test_smallest
[16:08:43] [PASSED] test_largest
[16:08:43] [PASSED] test_granular
[16:08:43] [PASSED] test_unique
[16:08:43] [PASSED] test_overlap
[16:08:43] [PASSED] test_reusable
[16:08:43] [PASSED] test_too_big
[16:08:43] [PASSED] test_flush
[16:08:43] [PASSED] test_lookup
[16:08:43] [PASSED] test_data
[16:08:43] [PASSED] test_class
[16:08:43] ===================== [PASSED] guc_buf =====================
[16:08:43] =================== guc_dbm (7 subtests) ===================
[16:08:43] [PASSED] test_empty
[16:08:43] [PASSED] test_default
[16:08:43] ======================== test_size  ========================
[16:08:43] [PASSED] 4
[16:08:43] [PASSED] 8
[16:08:43] [PASSED] 32
[16:08:43] [PASSED] 256
[16:08:43] ==================== [PASSED] test_size ====================
[16:08:43] ======================= test_reuse  ========================
[16:08:43] [PASSED] 4
[16:08:43] [PASSED] 8
[16:08:43] [PASSED] 32
[16:08:43] [PASSED] 256
[16:08:43] =================== [PASSED] test_reuse ====================
[16:08:43] =================== test_range_overlap  ====================
[16:08:43] [PASSED] 4
[16:08:43] [PASSED] 8
[16:08:43] [PASSED] 32
[16:08:43] [PASSED] 256
[16:08:43] =============== [PASSED] test_range_overlap ================
[16:08:43] =================== test_range_compact  ====================
[16:08:43] [PASSED] 4
[16:08:43] [PASSED] 8
[16:08:43] [PASSED] 32
[16:08:43] [PASSED] 256
[16:08:43] =============== [PASSED] test_range_compact ================
[16:08:43] ==================== test_range_spare  =====================
[16:08:43] [PASSED] 4
[16:08:43] [PASSED] 8
[16:08:43] [PASSED] 32
[16:08:43] [PASSED] 256
[16:08:43] ================ [PASSED] test_range_spare =================
[16:08:43] ===================== [PASSED] guc_dbm =====================
[16:08:43] =================== guc_idm (6 subtests) ===================
[16:08:43] [PASSED] bad_init
[16:08:43] [PASSED] no_init
[16:08:43] [PASSED] init_fini
[16:08:43] [PASSED] check_used
[16:08:43] [PASSED] check_quota
[16:08:43] [PASSED] check_all
[16:08:43] ===================== [PASSED] guc_idm =====================
[16:08:43] ================== no_relay (3 subtests) ===================
[16:08:43] [PASSED] xe_drops_guc2pf_if_not_ready
[16:08:43] [PASSED] xe_drops_guc2vf_if_not_ready
[16:08:43] [PASSED] xe_rejects_send_if_not_ready
[16:08:43] ==================== [PASSED] no_relay =====================
[16:08:43] ================== pf_relay (14 subtests) ==================
[16:08:43] [PASSED] pf_rejects_guc2pf_too_short
[16:08:43] [PASSED] pf_rejects_guc2pf_too_long
[16:08:43] [PASSED] pf_rejects_guc2pf_no_payload
[16:08:43] [PASSED] pf_fails_no_payload
[16:08:43] [PASSED] pf_fails_bad_origin
[16:08:43] [PASSED] pf_fails_bad_type
[16:08:43] [PASSED] pf_txn_reports_error
[16:08:43] [PASSED] pf_txn_sends_pf2guc
[16:08:43] [PASSED] pf_sends_pf2guc
[16:08:43] [SKIPPED] pf_loopback_nop
[16:08:43] [SKIPPED] pf_loopback_echo
[16:08:43] [SKIPPED] pf_loopback_fail
[16:08:43] [SKIPPED] pf_loopback_busy
[16:08:43] [SKIPPED] pf_loopback_retry
[16:08:43] ==================== [PASSED] pf_relay =====================
[16:08:43] ================== vf_relay (3 subtests) ===================
[16:08:43] [PASSED] vf_rejects_guc2vf_too_short
[16:08:43] [PASSED] vf_rejects_guc2vf_too_long
[16:08:43] [PASSED] vf_rejects_guc2vf_no_payload
[16:08:43] ==================== [PASSED] vf_relay =====================
[16:08:43] ===================== lmtt (1 subtest) =====================
[16:08:43] ======================== test_ops  =========================
[16:08:43] [PASSED] 2-level
[16:08:43] [PASSED] multi-level
[16:08:43] ==================== [PASSED] test_ops =====================
[16:08:43] ====================== [PASSED] lmtt =======================
[16:08:43] ================= pf_service (11 subtests) =================
[16:08:43] [PASSED] pf_negotiate_any
[16:08:43] [PASSED] pf_negotiate_base_match
[16:08:43] [PASSED] pf_negotiate_base_newer
[16:08:43] [PASSED] pf_negotiate_base_next
[16:08:43] [SKIPPED] pf_negotiate_base_older
[16:08:43] [PASSED] pf_negotiate_base_prev
[16:08:43] [PASSED] pf_negotiate_latest_match
[16:08:43] [PASSED] pf_negotiate_latest_newer
[16:08:43] [PASSED] pf_negotiate_latest_next
[16:08:43] [SKIPPED] pf_negotiate_latest_older
[16:08:43] [SKIPPED] pf_negotiate_latest_prev
[16:08:43] =================== [PASSED] pf_service ====================
[16:08:43] =================== xe_mocs (2 subtests) ===================
[16:08:43] ================ xe_live_mocs_kernel_kunit  ================
[16:08:43] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[16:08:43] ================ xe_live_mocs_reset_kunit  =================
[16:08:43] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[16:08:43] ==================== [SKIPPED] xe_mocs =====================
[16:08:43] ================= xe_migrate (2 subtests) ==================
[16:08:43] ================= xe_migrate_sanity_kunit  =================
[16:08:43] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[16:08:43] ================== xe_validate_ccs_kunit  ==================
[16:08:43] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[16:08:43] =================== [SKIPPED] xe_migrate ===================
[16:08:43] ================== xe_dma_buf (1 subtest) ==================
[16:08:43] ==================== xe_dma_buf_kunit  =====================
[16:08:43] ================ [SKIPPED] xe_dma_buf_kunit ================
[16:08:43] =================== [SKIPPED] xe_dma_buf ===================
[16:08:43] ================= xe_bo_shrink (1 subtest) =================
[16:08:43] =================== xe_bo_shrink_kunit  ====================
[16:08:43] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[16:08:43] ================== [SKIPPED] xe_bo_shrink ==================
[16:08:43] ==================== xe_bo (2 subtests) ====================
[16:08:43] ================== xe_ccs_migrate_kunit  ===================
[16:08:43] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[16:08:43] ==================== xe_bo_evict_kunit  ====================
[16:08:43] =============== [SKIPPED] xe_bo_evict_kunit ================
[16:08:43] ===================== [SKIPPED] xe_bo ======================
[16:08:43] ==================== args (11 subtests) ====================
[16:08:43] [PASSED] count_args_test
[16:08:43] [PASSED] call_args_example
[16:08:43] [PASSED] call_args_test
[16:08:43] [PASSED] drop_first_arg_example
[16:08:43] [PASSED] drop_first_arg_test
[16:08:43] [PASSED] first_arg_example
[16:08:43] [PASSED] first_arg_test
[16:08:43] [PASSED] last_arg_example
[16:08:43] [PASSED] last_arg_test
[16:08:43] [PASSED] pick_arg_example
[16:08:43] [PASSED] sep_comma_example
[16:08:43] ====================== [PASSED] args =======================
[16:08:43] =================== xe_pci (3 subtests) ====================
[16:08:43] ==================== check_graphics_ip  ====================
[16:08:43] [PASSED] 12.70 Xe_LPG
[16:08:43] [PASSED] 12.71 Xe_LPG
[16:08:43] [PASSED] 12.74 Xe_LPG+
[16:08:43] [PASSED] 20.01 Xe2_HPG
[16:08:43] [PASSED] 20.02 Xe2_HPG
[16:08:43] [PASSED] 20.04 Xe2_LPG
[16:08:43] [PASSED] 30.00 Xe3_LPG
[16:08:43] [PASSED] 30.01 Xe3_LPG
[16:08:43] [PASSED] 30.03 Xe3_LPG
[16:08:43] ================ [PASSED] check_graphics_ip ================
[16:08:43] ===================== check_media_ip  ======================
[16:08:43] [PASSED] 13.00 Xe_LPM+
[16:08:43] [PASSED] 13.01 Xe2_HPM
[16:08:43] [PASSED] 20.00 Xe2_LPM
[16:08:43] [PASSED] 30.00 Xe3_LPM
[16:08:43] [PASSED] 30.02 Xe3_LPM
[16:08:43] ================= [PASSED] check_media_ip ==================
[16:08:43] ================= check_platform_gt_count  =================
[16:08:43] [PASSED] 0x9A60 (TIGERLAKE)
[16:08:43] [PASSED] 0x9A68 (TIGERLAKE)
[16:08:43] [PASSED] 0x9A70 (TIGERLAKE)
[16:08:43] [PASSED] 0x9A40 (TIGERLAKE)
[16:08:43] [PASSED] 0x9A49 (TIGERLAKE)
[16:08:43] [PASSED] 0x9A59 (TIGERLAKE)
[16:08:43] [PASSED] 0x9A78 (TIGERLAKE)
[16:08:43] [PASSED] 0x9AC0 (TIGERLAKE)
[16:08:43] [PASSED] 0x9AC9 (TIGERLAKE)
[16:08:43] [PASSED] 0x9AD9 (TIGERLAKE)
[16:08:43] [PASSED] 0x9AF8 (TIGERLAKE)
[16:08:43] [PASSED] 0x4C80 (ROCKETLAKE)
[16:08:43] [PASSED] 0x4C8A (ROCKETLAKE)
[16:08:43] [PASSED] 0x4C8B (ROCKETLAKE)
[16:08:43] [PASSED] 0x4C8C (ROCKETLAKE)
[16:08:43] [PASSED] 0x4C90 (ROCKETLAKE)
[16:08:43] [PASSED] 0x4C9A (ROCKETLAKE)
[16:08:43] [PASSED] 0x4680 (ALDERLAKE_S)
[16:08:43] [PASSED] 0x4682 (ALDERLAKE_S)
[16:08:43] [PASSED] 0x4688 (ALDERLAKE_S)
[16:08:43] [PASSED] 0x468A (ALDERLAKE_S)
[16:08:43] [PASSED] 0x468B (ALDERLAKE_S)
[16:08:43] [PASSED] 0x4690 (ALDERLAKE_S)
[16:08:43] [PASSED] 0x4692 (ALDERLAKE_S)
[16:08:43] [PASSED] 0x4693 (ALDERLAKE_S)
[16:08:43] [PASSED] 0x46A0 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46A1 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46A2 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46A3 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46A6 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46A8 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46AA (ALDERLAKE_P)
[16:08:43] [PASSED] 0x462A (ALDERLAKE_P)
[16:08:43] [PASSED] 0x4626 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x4628 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46B0 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46B1 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46B2 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46B3 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46C0 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46C1 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46C2 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46C3 (ALDERLAKE_P)
[16:08:43] [PASSED] 0x46D0 (ALDERLAKE_N)
[16:08:43] [PASSED] 0x46D1 (ALDERLAKE_N)
[16:08:43] [PASSED] 0x46D2 (ALDERLAKE_N)
[16:08:43] [PASSED] 0x46D3 (ALDERLAKE_N)
[16:08:43] [PASSED] 0x46D4 (ALDERLAKE_N)
[16:08:43] [PASSED] 0xA721 (ALDERLAKE_P)
[16:08:43] [PASSED] 0xA7A1 (ALDERLAKE_P)
[16:08:43] [PASSED] 0xA7A9 (ALDERLAKE_P)
[16:08:43] [PASSED] 0xA7AC (ALDERLAKE_P)
[16:08:43] [PASSED] 0xA7AD (ALDERLAKE_P)
[16:08:43] [PASSED] 0xA720 (ALDERLAKE_P)
[16:08:43] [PASSED] 0xA7A0 (ALDERLAKE_P)
[16:08:43] [PASSED] 0xA7A8 (ALDERLAKE_P)
[16:08:43] [PASSED] 0xA7AA (ALDERLAKE_P)
[16:08:43] [PASSED] 0xA7AB (ALDERLAKE_P)
[16:08:43] [PASSED] 0xA780 (ALDERLAKE_S)
[16:08:43] [PASSED] 0xA781 (ALDERLAKE_S)
[16:08:43] [PASSED] 0xA782 (ALDERLAKE_S)
[16:08:43] [PASSED] 0xA783 (ALDERLAKE_S)
[16:08:43] [PASSED] 0xA788 (ALDERLAKE_S)
[16:08:43] [PASSED] 0xA789 (ALDERLAKE_S)
[16:08:43] [PASSED] 0xA78A (ALDERLAKE_S)
[16:08:43] [PASSED] 0xA78B (ALDERLAKE_S)
[16:08:43] [PASSED] 0x4905 (DG1)
[16:08:43] [PASSED] 0x4906 (DG1)
[16:08:43] [PASSED] 0x4907 (DG1)
[16:08:43] [PASSED] 0x4908 (DG1)
[16:08:43] [PASSED] 0x4909 (DG1)
[16:08:43] [PASSED] 0x56C0 (DG2)
[16:08:43] [PASSED] 0x56C2 (DG2)
[16:08:43] [PASSED] 0x56C1 (DG2)
[16:08:43] [PASSED] 0x7D51 (METEORLAKE)
[16:08:43] [PASSED] 0x7DD1 (METEORLAKE)
[16:08:43] [PASSED] 0x7D41 (METEORLAKE)
[16:08:43] [PASSED] 0x7D67 (METEORLAKE)
[16:08:43] [PASSED] 0xB640 (METEORLAKE)
[16:08:43] [PASSED] 0x56A0 (DG2)
[16:08:43] [PASSED] 0x56A1 (DG2)
[16:08:43] [PASSED] 0x56A2 (DG2)
[16:08:43] [PASSED] 0x56BE (DG2)
[16:08:43] [PASSED] 0x56BF (DG2)
[16:08:43] [PASSED] 0x5690 (DG2)
[16:08:43] [PASSED] 0x5691 (DG2)
[16:08:43] [PASSED] 0x5692 (DG2)
[16:08:43] [PASSED] 0x56A5 (DG2)
[16:08:43] [PASSED] 0x56A6 (DG2)
[16:08:43] [PASSED] 0x56B0 (DG2)
[16:08:43] [PASSED] 0x56B1 (DG2)
[16:08:43] [PASSED] 0x56BA (DG2)
[16:08:43] [PASSED] 0x56BB (DG2)
[16:08:43] [PASSED] 0x56BC (DG2)
[16:08:43] [PASSED] 0x56BD (DG2)
[16:08:43] [PASSED] 0x5693 (DG2)
[16:08:43] [PASSED] 0x5694 (DG2)
[16:08:43] [PASSED] 0x5695 (DG2)
[16:08:43] [PASSED] 0x56A3 (DG2)
[16:08:43] [PASSED] 0x56A4 (DG2)
[16:08:43] [PASSED] 0x56B2 (DG2)
[16:08:43] [PASSED] 0x56B3 (DG2)
[16:08:43] [PASSED] 0x5696 (DG2)
[16:08:43] [PASSED] 0x5697 (DG2)
[16:08:43] [PASSED] 0xB69 (PVC)
[16:08:43] [PASSED] 0xB6E (PVC)
[16:08:43] [PASSED] 0xBD4 (PVC)
[16:08:43] [PASSED] 0xBD5 (PVC)
[16:08:43] [PASSED] 0xBD6 (PVC)
[16:08:43] [PASSED] 0xBD7 (PVC)
[16:08:43] [PASSED] 0xBD8 (PVC)
[16:08:43] [PASSED] 0xBD9 (PVC)
[16:08:43] [PASSED] 0xBDA (PVC)
[16:08:43] [PASSED] 0xBDB (PVC)
[16:08:43] [PASSED] 0xBE0 (PVC)
[16:08:43] [PASSED] 0xBE1 (PVC)
[16:08:43] [PASSED] 0xBE5 (PVC)
[16:08:43] [PASSED] 0x7D40 (METEORLAKE)
[16:08:43] [PASSED] 0x7D45 (METEORLAKE)
[16:08:43] [PASSED] 0x7D55 (METEORLAKE)
[16:08:43] [PASSED] 0x7D60 (METEORLAKE)
[16:08:43] [PASSED] 0x7DD5 (METEORLAKE)
[16:08:43] [PASSED] 0x6420 (LUNARLAKE)
[16:08:43] [PASSED] 0x64A0 (LUNARLAKE)
[16:08:43] [PASSED] 0x64B0 (LUNARLAKE)
[16:08:43] [PASSED] 0xE202 (BATTLEMAGE)
[16:08:43] [PASSED] 0xE209 (BATTLEMAGE)
[16:08:43] [PASSED] 0xE20B (BATTLEMAGE)
[16:08:43] [PASSED] 0xE20C (BATTLEMAGE)
[16:08:43] [PASSED] 0xE20D (BATTLEMAGE)
[16:08:43] [PASSED] 0xE210 (BATTLEMAGE)
[16:08:43] [PASSED] 0xE211 (BATTLEMAGE)
[16:08:43] [PASSED] 0xE212 (BATTLEMAGE)
[16:08:43] [PASSED] 0xE216 (BATTLEMAGE)
[16:08:43] [PASSED] 0xE220 (BATTLEMAGE)
[16:08:43] [PASSED] 0xE221 (BATTLEMAGE)
[16:08:43] [PASSED] 0xE222 (BATTLEMAGE)
[16:08:43] [PASSED] 0xE223 (BATTLEMAGE)
[16:08:43] [PASSED] 0xB080 (PANTHERLAKE)
[16:08:43] [PASSED] 0xB081 (PANTHERLAKE)
[16:08:43] [PASSED] 0xB082 (PANTHERLAKE)
[16:08:43] [PASSED] 0xB083 (PANTHERLAKE)
[16:08:43] [PASSED] 0xB084 (PANTHERLAKE)
[16:08:43] [PASSED] 0xB085 (PANTHERLAKE)
[16:08:43] [PASSED] 0xB086 (PANTHERLAKE)
[16:08:43] [PASSED] 0xB087 (PANTHERLAKE)
[16:08:43] [PASSED] 0xB08F (PANTHERLAKE)
[16:08:43] [PASSED] 0xB090 (PANTHERLAKE)
[16:08:43] [PASSED] 0xB0A0 (PANTHERLAKE)
[16:08:43] [PASSED] 0xB0B0 (PANTHERLAKE)
[16:08:43] [PASSED] 0xFD80 (PANTHERLAKE)
[16:08:43] [PASSED] 0xFD81 (PANTHERLAKE)
[16:08:43] ============= [PASSED] check_platform_gt_count =============
[16:08:43] ===================== [PASSED] xe_pci ======================
[16:08:43] =================== xe_rtp (2 subtests) ====================
[16:08:43] =============== xe_rtp_process_to_sr_tests  ================
[16:08:43] [PASSED] coalesce-same-reg
[16:08:43] [PASSED] no-match-no-add
[16:08:43] [PASSED] match-or
[16:08:43] [PASSED] match-or-xfail
[16:08:43] [PASSED] no-match-no-add-multiple-rules
[16:08:43] [PASSED] two-regs-two-entries
[16:08:43] [PASSED] clr-one-set-other
[16:08:43] [PASSED] set-field
[16:08:43] [PASSED] conflict-duplicate
[16:08:43] [PASSED] conflict-not-disjoint
[16:08:43] [PASSED] conflict-reg-type
[16:08:43] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[16:08:43] ================== xe_rtp_process_tests  ===================
[16:08:43] [PASSED] active1
[16:08:43] [PASSED] active2
[16:08:43] [PASSED] active-inactive
[16:08:43] [PASSED] inactive-active
[16:08:43] [PASSED] inactive-1st_or_active-inactive
[16:08:43] [PASSED] inactive-2nd_or_active-inactive
[16:08:43] [PASSED] inactive-last_or_active-inactive
[16:08:43] [PASSED] inactive-no_or_active-inactive
[16:08:43] ============== [PASSED] xe_rtp_process_tests ===============
[16:08:43] ===================== [PASSED] xe_rtp ======================
[16:08:43] ==================== xe_wa (1 subtest) =====================
[16:08:43] ======================== xe_wa_gt  =========================
[16:08:43] [PASSED] TIGERLAKE B0
[16:08:43] [PASSED] DG1 A0
[16:08:43] [PASSED] DG1 B0
[16:08:43] [PASSED] ALDERLAKE_S A0
[16:08:43] [PASSED] ALDERLAKE_S B0
[16:08:43] [PASSED] ALDERLAKE_S C0
[16:08:43] [PASSED] ALDERLAKE_S D0
[16:08:43] [PASSED] ALDERLAKE_P A0
[16:08:43] [PASSED] ALDERLAKE_P B0
[16:08:43] [PASSED] ALDERLAKE_P C0
[16:08:43] [PASSED] ALDERLAKE_S RPLS D0
[16:08:43] [PASSED] ALDERLAKE_P RPLU E0
[16:08:43] [PASSED] DG2 G10 C0
[16:08:43] [PASSED] DG2 G11 B1
[16:08:43] [PASSED] DG2 G12 A1
[16:08:43] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:08:43] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:08:43] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[16:08:43] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
stty: 'standard input': Inappropriate ioctl for device
[16:08:43] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[16:08:43] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[16:08:43] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[16:08:43] ==================== [PASSED] xe_wa_gt =====================
[16:08:43] ====================== [PASSED] xe_wa ======================
[16:08:43] ============================================================
[16:08:43] Testing complete. Ran 298 tests: passed: 282, skipped: 16
[16:08:43] Elapsed time: 33.226s total, 4.205s configuring, 28.654s building, 0.328s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[16:08:43] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:08:45] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:09:08] Starting KUnit Kernel (1/1)...
[16:09:08] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:09:08] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[16:09:08] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[16:09:08] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[16:09:08] =========== drm_validate_clone_mode (2 subtests) ===========
[16:09:08] ============== drm_test_check_in_clone_mode  ===============
[16:09:08] [PASSED] in_clone_mode
[16:09:08] [PASSED] not_in_clone_mode
[16:09:08] ========== [PASSED] drm_test_check_in_clone_mode ===========
[16:09:08] =============== drm_test_check_valid_clones  ===============
[16:09:08] [PASSED] not_in_clone_mode
[16:09:08] [PASSED] valid_clone
[16:09:08] [PASSED] invalid_clone
[16:09:08] =========== [PASSED] drm_test_check_valid_clones ===========
[16:09:08] ============= [PASSED] drm_validate_clone_mode =============
[16:09:08] ============= drm_validate_modeset (1 subtest) =============
[16:09:08] [PASSED] drm_test_check_connector_changed_modeset
[16:09:08] ============== [PASSED] drm_validate_modeset ===============
[16:09:08] ====== drm_test_bridge_get_current_state (2 subtests) ======
[16:09:08] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[16:09:08] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[16:09:08] ======== [PASSED] drm_test_bridge_get_current_state ========
[16:09:08] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[16:09:08] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[16:09:08] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[16:09:08] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[16:09:08] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[16:09:08] ============== drm_bridge_alloc (2 subtests) ===============
[16:09:08] [PASSED] drm_test_drm_bridge_alloc_basic
[16:09:08] [PASSED] drm_test_drm_bridge_alloc_get_put
[16:09:08] ================ [PASSED] drm_bridge_alloc =================
[16:09:08] ================== drm_buddy (7 subtests) ==================
[16:09:08] [PASSED] drm_test_buddy_alloc_limit
[16:09:08] [PASSED] drm_test_buddy_alloc_optimistic
[16:09:08] [PASSED] drm_test_buddy_alloc_pessimistic
[16:09:08] [PASSED] drm_test_buddy_alloc_pathological
[16:09:08] [PASSED] drm_test_buddy_alloc_contiguous
[16:09:08] [PASSED] drm_test_buddy_alloc_clear
[16:09:08] [PASSED] drm_test_buddy_alloc_range_bias
[16:09:08] ==================== [PASSED] drm_buddy ====================
[16:09:08] ============= drm_cmdline_parser (40 subtests) =============
[16:09:08] [PASSED] drm_test_cmdline_force_d_only
[16:09:08] [PASSED] drm_test_cmdline_force_D_only_dvi
[16:09:08] [PASSED] drm_test_cmdline_force_D_only_hdmi
[16:09:08] [PASSED] drm_test_cmdline_force_D_only_not_digital
[16:09:08] [PASSED] drm_test_cmdline_force_e_only
[16:09:08] [PASSED] drm_test_cmdline_res
[16:09:08] [PASSED] drm_test_cmdline_res_vesa
[16:09:08] [PASSED] drm_test_cmdline_res_vesa_rblank
[16:09:08] [PASSED] drm_test_cmdline_res_rblank
[16:09:08] [PASSED] drm_test_cmdline_res_bpp
[16:09:08] [PASSED] drm_test_cmdline_res_refresh
[16:09:08] [PASSED] drm_test_cmdline_res_bpp_refresh
[16:09:08] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[16:09:08] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[16:09:08] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[16:09:08] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[16:09:08] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[16:09:08] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[16:09:08] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[16:09:08] [PASSED] drm_test_cmdline_res_margins_force_on
[16:09:08] [PASSED] drm_test_cmdline_res_vesa_margins
[16:09:08] [PASSED] drm_test_cmdline_name
[16:09:08] [PASSED] drm_test_cmdline_name_bpp
[16:09:08] [PASSED] drm_test_cmdline_name_option
[16:09:08] [PASSED] drm_test_cmdline_name_bpp_option
[16:09:08] [PASSED] drm_test_cmdline_rotate_0
[16:09:08] [PASSED] drm_test_cmdline_rotate_90
[16:09:08] [PASSED] drm_test_cmdline_rotate_180
[16:09:08] [PASSED] drm_test_cmdline_rotate_270
[16:09:08] [PASSED] drm_test_cmdline_hmirror
[16:09:08] [PASSED] drm_test_cmdline_vmirror
[16:09:08] [PASSED] drm_test_cmdline_margin_options
[16:09:08] [PASSED] drm_test_cmdline_multiple_options
[16:09:08] [PASSED] drm_test_cmdline_bpp_extra_and_option
[16:09:08] [PASSED] drm_test_cmdline_extra_and_option
[16:09:08] [PASSED] drm_test_cmdline_freestanding_options
[16:09:08] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[16:09:08] [PASSED] drm_test_cmdline_panel_orientation
[16:09:08] ================ drm_test_cmdline_invalid  =================
[16:09:08] [PASSED] margin_only
[16:09:08] [PASSED] interlace_only
[16:09:08] [PASSED] res_missing_x
[16:09:08] [PASSED] res_missing_y
[16:09:08] [PASSED] res_bad_y
[16:09:08] [PASSED] res_missing_y_bpp
[16:09:08] [PASSED] res_bad_bpp
[16:09:08] [PASSED] res_bad_refresh
[16:09:08] [PASSED] res_bpp_refresh_force_on_off
[16:09:08] [PASSED] res_invalid_mode
[16:09:08] [PASSED] res_bpp_wrong_place_mode
[16:09:08] [PASSED] name_bpp_refresh
[16:09:08] [PASSED] name_refresh
[16:09:08] [PASSED] name_refresh_wrong_mode
[16:09:08] [PASSED] name_refresh_invalid_mode
[16:09:08] [PASSED] rotate_multiple
[16:09:08] [PASSED] rotate_invalid_val
[16:09:08] [PASSED] rotate_truncated
[16:09:08] [PASSED] invalid_option
[16:09:08] [PASSED] invalid_tv_option
[16:09:08] [PASSED] truncated_tv_option
[16:09:08] ============ [PASSED] drm_test_cmdline_invalid =============
[16:09:08] =============== drm_test_cmdline_tv_options  ===============
[16:09:08] [PASSED] NTSC
[16:09:08] [PASSED] NTSC_443
[16:09:08] [PASSED] NTSC_J
[16:09:08] [PASSED] PAL
[16:09:08] [PASSED] PAL_M
[16:09:08] [PASSED] PAL_N
[16:09:08] [PASSED] SECAM
[16:09:08] [PASSED] MONO_525
[16:09:08] [PASSED] MONO_625
[16:09:08] =========== [PASSED] drm_test_cmdline_tv_options ===========
[16:09:08] =============== [PASSED] drm_cmdline_parser ================
[16:09:08] ========== drmm_connector_hdmi_init (20 subtests) ==========
[16:09:08] [PASSED] drm_test_connector_hdmi_init_valid
[16:09:08] [PASSED] drm_test_connector_hdmi_init_bpc_8
[16:09:08] [PASSED] drm_test_connector_hdmi_init_bpc_10
[16:09:08] [PASSED] drm_test_connector_hdmi_init_bpc_12
[16:09:08] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[16:09:08] [PASSED] drm_test_connector_hdmi_init_bpc_null
[16:09:08] [PASSED] drm_test_connector_hdmi_init_formats_empty
[16:09:08] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[16:09:08] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[16:09:08] [PASSED] supported_formats=0x9 yuv420_allowed=1
[16:09:08] [PASSED] supported_formats=0x9 yuv420_allowed=0
[16:09:08] [PASSED] supported_formats=0x3 yuv420_allowed=1
[16:09:08] [PASSED] supported_formats=0x3 yuv420_allowed=0
[16:09:08] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:09:08] [PASSED] drm_test_connector_hdmi_init_null_ddc
[16:09:08] [PASSED] drm_test_connector_hdmi_init_null_product
[16:09:08] [PASSED] drm_test_connector_hdmi_init_null_vendor
[16:09:08] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[16:09:08] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[16:09:08] [PASSED] drm_test_connector_hdmi_init_product_valid
[16:09:08] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[16:09:08] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[16:09:08] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[16:09:08] ========= drm_test_connector_hdmi_init_type_valid  =========
[16:09:08] [PASSED] HDMI-A
[16:09:08] [PASSED] HDMI-B
[16:09:08] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[16:09:08] ======== drm_test_connector_hdmi_init_type_invalid  ========
[16:09:08] [PASSED] Unknown
[16:09:08] [PASSED] VGA
[16:09:08] [PASSED] DVI-I
[16:09:08] [PASSED] DVI-D
[16:09:08] [PASSED] DVI-A
[16:09:08] [PASSED] Composite
[16:09:08] [PASSED] SVIDEO
[16:09:08] [PASSED] LVDS
[16:09:08] [PASSED] Component
[16:09:08] [PASSED] DIN
[16:09:08] [PASSED] DP
[16:09:08] [PASSED] TV
[16:09:08] [PASSED] eDP
[16:09:08] [PASSED] Virtual
[16:09:08] [PASSED] DSI
[16:09:08] [PASSED] DPI
[16:09:08] [PASSED] Writeback
[16:09:08] [PASSED] SPI
[16:09:08] [PASSED] USB
[16:09:08] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[16:09:08] ============ [PASSED] drmm_connector_hdmi_init =============
[16:09:08] ============= drmm_connector_init (3 subtests) =============
[16:09:08] [PASSED] drm_test_drmm_connector_init
[16:09:08] [PASSED] drm_test_drmm_connector_init_null_ddc
[16:09:08] ========= drm_test_drmm_connector_init_type_valid  =========
[16:09:08] [PASSED] Unknown
[16:09:08] [PASSED] VGA
[16:09:08] [PASSED] DVI-I
[16:09:08] [PASSED] DVI-D
[16:09:08] [PASSED] DVI-A
[16:09:08] [PASSED] Composite
[16:09:08] [PASSED] SVIDEO
[16:09:08] [PASSED] LVDS
[16:09:08] [PASSED] Component
[16:09:08] [PASSED] DIN
[16:09:08] [PASSED] DP
[16:09:08] [PASSED] HDMI-A
[16:09:08] [PASSED] HDMI-B
[16:09:08] [PASSED] TV
[16:09:08] [PASSED] eDP
[16:09:08] [PASSED] Virtual
[16:09:08] [PASSED] DSI
[16:09:08] [PASSED] DPI
[16:09:08] [PASSED] Writeback
[16:09:08] [PASSED] SPI
[16:09:08] [PASSED] USB
[16:09:08] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[16:09:08] =============== [PASSED] drmm_connector_init ===============
[16:09:08] ========= drm_connector_dynamic_init (6 subtests) ==========
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_init
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_init_properties
[16:09:08] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[16:09:08] [PASSED] Unknown
[16:09:08] [PASSED] VGA
[16:09:08] [PASSED] DVI-I
[16:09:08] [PASSED] DVI-D
[16:09:08] [PASSED] DVI-A
[16:09:08] [PASSED] Composite
[16:09:08] [PASSED] SVIDEO
[16:09:08] [PASSED] LVDS
[16:09:08] [PASSED] Component
[16:09:08] [PASSED] DIN
[16:09:08] [PASSED] DP
[16:09:08] [PASSED] HDMI-A
[16:09:08] [PASSED] HDMI-B
[16:09:08] [PASSED] TV
[16:09:08] [PASSED] eDP
[16:09:08] [PASSED] Virtual
[16:09:08] [PASSED] DSI
[16:09:08] [PASSED] DPI
[16:09:08] [PASSED] Writeback
[16:09:08] [PASSED] SPI
[16:09:08] [PASSED] USB
[16:09:08] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[16:09:08] ======== drm_test_drm_connector_dynamic_init_name  =========
[16:09:08] [PASSED] Unknown
[16:09:08] [PASSED] VGA
[16:09:08] [PASSED] DVI-I
[16:09:08] [PASSED] DVI-D
[16:09:08] [PASSED] DVI-A
[16:09:08] [PASSED] Composite
[16:09:08] [PASSED] SVIDEO
[16:09:08] [PASSED] LVDS
[16:09:08] [PASSED] Component
[16:09:08] [PASSED] DIN
[16:09:08] [PASSED] DP
[16:09:08] [PASSED] HDMI-A
[16:09:08] [PASSED] HDMI-B
[16:09:08] [PASSED] TV
[16:09:08] [PASSED] eDP
[16:09:08] [PASSED] Virtual
[16:09:08] [PASSED] DSI
[16:09:08] [PASSED] DPI
[16:09:08] [PASSED] Writeback
[16:09:08] [PASSED] SPI
[16:09:08] [PASSED] USB
[16:09:08] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[16:09:08] =========== [PASSED] drm_connector_dynamic_init ============
[16:09:08] ==== drm_connector_dynamic_register_early (4 subtests) =====
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[16:09:08] ====== [PASSED] drm_connector_dynamic_register_early =======
[16:09:08] ======= drm_connector_dynamic_register (7 subtests) ========
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[16:09:08] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[16:09:08] ========= [PASSED] drm_connector_dynamic_register ==========
[16:09:08] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[16:09:08] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[16:09:08] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[16:09:08] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[16:09:08] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[16:09:08] ========== drm_test_get_tv_mode_from_name_valid  ===========
[16:09:08] [PASSED] NTSC
[16:09:08] [PASSED] NTSC-443
[16:09:08] [PASSED] NTSC-J
[16:09:08] [PASSED] PAL
[16:09:08] [PASSED] PAL-M
[16:09:08] [PASSED] PAL-N
[16:09:08] [PASSED] SECAM
[16:09:08] [PASSED] Mono
[16:09:08] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[16:09:08] [PASSED] drm_test_get_tv_mode_from_name_truncated
[16:09:08] ============ [PASSED] drm_get_tv_mode_from_name ============
[16:09:08] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[16:09:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[16:09:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[16:09:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[16:09:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[16:09:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[16:09:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[16:09:08] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[16:09:08] [PASSED] VIC 96
[16:09:08] [PASSED] VIC 97
[16:09:08] [PASSED] VIC 101
[16:09:08] [PASSED] VIC 102
[16:09:08] [PASSED] VIC 106
[16:09:08] [PASSED] VIC 107
[16:09:08] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[16:09:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[16:09:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[16:09:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[16:09:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[16:09:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[16:09:08] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[16:09:08] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[16:09:08] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[16:09:08] [PASSED] Automatic
[16:09:08] [PASSED] Full
[16:09:08] [PASSED] Limited 16:235
[16:09:08] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[16:09:08] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[16:09:08] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[16:09:08] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[16:09:08] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[16:09:08] [PASSED] RGB
[16:09:08] [PASSED] YUV 4:2:0
[16:09:08] [PASSED] YUV 4:2:2
[16:09:08] [PASSED] YUV 4:4:4
[16:09:08] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[16:09:08] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[16:09:08] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[16:09:08] ============= drm_damage_helper (21 subtests) ==============
[16:09:08] [PASSED] drm_test_damage_iter_no_damage
[16:09:08] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[16:09:08] [PASSED] drm_test_damage_iter_no_damage_src_moved
[16:09:08] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[16:09:08] [PASSED] drm_test_damage_iter_no_damage_not_visible
[16:09:08] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[16:09:08] [PASSED] drm_test_damage_iter_no_damage_no_fb
[16:09:08] [PASSED] drm_test_damage_iter_simple_damage
[16:09:08] [PASSED] drm_test_damage_iter_single_damage
[16:09:08] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[16:09:08] [PASSED] drm_test_damage_iter_single_damage_outside_src
[16:09:08] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[16:09:08] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[16:09:08] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[16:09:08] [PASSED] drm_test_damage_iter_single_damage_src_moved
[16:09:08] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[16:09:08] [PASSED] drm_test_damage_iter_damage
[16:09:08] [PASSED] drm_test_damage_iter_damage_one_intersect
[16:09:08] [PASSED] drm_test_damage_iter_damage_one_outside
[16:09:08] [PASSED] drm_test_damage_iter_damage_src_moved
[16:09:08] [PASSED] drm_test_damage_iter_damage_not_visible
[16:09:08] ================ [PASSED] drm_damage_helper ================
[16:09:08] ============== drm_dp_mst_helper (3 subtests) ==============
[16:09:08] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[16:09:08] [PASSED] Clock 154000 BPP 30 DSC disabled
[16:09:08] [PASSED] Clock 234000 BPP 30 DSC disabled
[16:09:08] [PASSED] Clock 297000 BPP 24 DSC disabled
[16:09:08] [PASSED] Clock 332880 BPP 24 DSC enabled
[16:09:08] [PASSED] Clock 324540 BPP 24 DSC enabled
[16:09:08] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[16:09:08] ============== drm_test_dp_mst_calc_pbn_div  ===============
[16:09:08] [PASSED] Link rate 2000000 lane count 4
[16:09:08] [PASSED] Link rate 2000000 lane count 2
[16:09:08] [PASSED] Link rate 2000000 lane count 1
[16:09:08] [PASSED] Link rate 1350000 lane count 4
[16:09:08] [PASSED] Link rate 1350000 lane count 2
[16:09:08] [PASSED] Link rate 1350000 lane count 1
[16:09:08] [PASSED] Link rate 1000000 lane count 4
[16:09:08] [PASSED] Link rate 1000000 lane count 2
[16:09:08] [PASSED] Link rate 1000000 lane count 1
[16:09:08] [PASSED] Link rate 810000 lane count 4
[16:09:08] [PASSED] Link rate 810000 lane count 2
[16:09:08] [PASSED] Link rate 810000 lane count 1
[16:09:08] [PASSED] Link rate 540000 lane count 4
[16:09:08] [PASSED] Link rate 540000 lane count 2
[16:09:08] [PASSED] Link rate 540000 lane count 1
[16:09:08] [PASSED] Link rate 270000 lane count 4
[16:09:08] [PASSED] Link rate 270000 lane count 2
[16:09:08] [PASSED] Link rate 270000 lane count 1
[16:09:08] [PASSED] Link rate 162000 lane count 4
[16:09:08] [PASSED] Link rate 162000 lane count 2
[16:09:08] [PASSED] Link rate 162000 lane count 1
[16:09:08] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[16:09:08] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[16:09:08] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[16:09:08] [PASSED] DP_POWER_UP_PHY with port number
[16:09:08] [PASSED] DP_POWER_DOWN_PHY with port number
[16:09:08] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[16:09:08] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[16:09:08] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[16:09:08] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[16:09:08] [PASSED] DP_QUERY_PAYLOAD with port number
[16:09:08] [PASSED] DP_QUERY_PAYLOAD with VCPI
[16:09:08] [PASSED] DP_REMOTE_DPCD_READ with port number
[16:09:08] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[16:09:08] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[16:09:08] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[16:09:08] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[16:09:08] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[16:09:08] [PASSED] DP_REMOTE_I2C_READ with port number
[16:09:08] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[16:09:08] [PASSED] DP_REMOTE_I2C_READ with transactions array
[16:09:08] [PASSED] DP_REMOTE_I2C_WRITE with port number
[16:09:08] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[16:09:08] [PASSED] DP_REMOTE_I2C_WRITE with data array
[16:09:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[16:09:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[16:09:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[16:09:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[16:09:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[16:09:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[16:09:08] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[16:09:08] ================ [PASSED] drm_dp_mst_helper ================
[16:09:08] ================== drm_exec (7 subtests) ===================
[16:09:08] [PASSED] sanitycheck
[16:09:08] [PASSED] test_lock
[16:09:08] [PASSED] test_lock_unlock
[16:09:08] [PASSED] test_duplicates
[16:09:08] [PASSED] test_prepare
[16:09:08] [PASSED] test_prepare_array
[16:09:08] [PASSED] test_multiple_loops
[16:09:08] ==================== [PASSED] drm_exec =====================
[16:09:08] =========== drm_format_helper_test (17 subtests) ===========
[16:09:08] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[16:09:08] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[16:09:08] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[16:09:08] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[16:09:08] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[16:09:08] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[16:09:08] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[16:09:08] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[16:09:08] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[16:09:08] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[16:09:08] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[16:09:08] ============== drm_test_fb_xrgb8888_to_mono  ===============
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[16:09:08] ==================== drm_test_fb_swab  =====================
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ================ [PASSED] drm_test_fb_swab =================
[16:09:08] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[16:09:08] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[16:09:08] [PASSED] single_pixel_source_buffer
[16:09:08] [PASSED] single_pixel_clip_rectangle
[16:09:08] [PASSED] well_known_colors
[16:09:08] [PASSED] destination_pitch
[16:09:08] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[16:09:08] ================= drm_test_fb_clip_offset  =================
[16:09:08] [PASSED] pass through
[16:09:08] [PASSED] horizontal offset
[16:09:08] [PASSED] vertical offset
[16:09:08] [PASSED] horizontal and vertical offset
[16:09:08] [PASSED] horizontal offset (custom pitch)
[16:09:08] [PASSED] vertical offset (custom pitch)
[16:09:08] [PASSED] horizontal and vertical offset (custom pitch)
[16:09:08] ============= [PASSED] drm_test_fb_clip_offset =============
[16:09:08] =================== drm_test_fb_memcpy  ====================
[16:09:08] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[16:09:08] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[16:09:08] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[16:09:08] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[16:09:08] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[16:09:08] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[16:09:08] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[16:09:08] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[16:09:08] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[16:09:08] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[16:09:08] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[16:09:08] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[16:09:08] =============== [PASSED] drm_test_fb_memcpy ================
[16:09:08] ============= [PASSED] drm_format_helper_test ==============
[16:09:08] ================= drm_format (18 subtests) =================
[16:09:08] [PASSED] drm_test_format_block_width_invalid
[16:09:08] [PASSED] drm_test_format_block_width_one_plane
[16:09:08] [PASSED] drm_test_format_block_width_two_plane
[16:09:08] [PASSED] drm_test_format_block_width_three_plane
[16:09:08] [PASSED] drm_test_format_block_width_tiled
[16:09:08] [PASSED] drm_test_format_block_height_invalid
[16:09:08] [PASSED] drm_test_format_block_height_one_plane
[16:09:08] [PASSED] drm_test_format_block_height_two_plane
[16:09:08] [PASSED] drm_test_format_block_height_three_plane
[16:09:08] [PASSED] drm_test_format_block_height_tiled
[16:09:08] [PASSED] drm_test_format_min_pitch_invalid
[16:09:08] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[16:09:08] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[16:09:08] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[16:09:08] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[16:09:08] [PASSED] drm_test_format_min_pitch_two_plane
[16:09:08] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[16:09:08] [PASSED] drm_test_format_min_pitch_tiled
[16:09:08] =================== [PASSED] drm_format ====================
[16:09:08] ============== drm_framebuffer (10 subtests) ===============
[16:09:08] ========== drm_test_framebuffer_check_src_coords  ==========
[16:09:08] [PASSED] Success: source fits into fb
[16:09:08] [PASSED] Fail: overflowing fb with x-axis coordinate
[16:09:08] [PASSED] Fail: overflowing fb with y-axis coordinate
[16:09:08] [PASSED] Fail: overflowing fb with source width
[16:09:08] [PASSED] Fail: overflowing fb with source height
[16:09:08] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[16:09:08] [PASSED] drm_test_framebuffer_cleanup
[16:09:08] =============== drm_test_framebuffer_create  ===============
[16:09:08] [PASSED] ABGR8888 normal sizes
[16:09:08] [PASSED] ABGR8888 max sizes
[16:09:08] [PASSED] ABGR8888 pitch greater than min required
[16:09:08] [PASSED] ABGR8888 pitch less than min required
[16:09:08] [PASSED] ABGR8888 Invalid width
[16:09:08] [PASSED] ABGR8888 Invalid buffer handle
[16:09:08] [PASSED] No pixel format
[16:09:08] [PASSED] ABGR8888 Width 0
[16:09:08] [PASSED] ABGR8888 Height 0
[16:09:08] [PASSED] ABGR8888 Out of bound height * pitch combination
[16:09:08] [PASSED] ABGR8888 Large buffer offset
[16:09:08] [PASSED] ABGR8888 Buffer offset for inexistent plane
[16:09:08] [PASSED] ABGR8888 Invalid flag
[16:09:08] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[16:09:08] [PASSED] ABGR8888 Valid buffer modifier
[16:09:08] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[16:09:08] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[16:09:08] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[16:09:08] [PASSED] NV12 Normal sizes
[16:09:08] [PASSED] NV12 Max sizes
[16:09:08] [PASSED] NV12 Invalid pitch
[16:09:08] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[16:09:08] [PASSED] NV12 different  modifier per-plane
[16:09:08] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[16:09:08] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[16:09:08] [PASSED] NV12 Modifier for inexistent plane
[16:09:08] [PASSED] NV12 Handle for inexistent plane
[16:09:08] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[16:09:08] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[16:09:08] [PASSED] YVU420 Normal sizes
[16:09:08] [PASSED] YVU420 Max sizes
[16:09:08] [PASSED] YVU420 Invalid pitch
[16:09:08] [PASSED] YVU420 Different pitches
[16:09:08] [PASSED] YVU420 Different buffer offsets/pitches
[16:09:08] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[16:09:08] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[16:09:08] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[16:09:08] [PASSED] YVU420 Valid modifier
[16:09:08] [PASSED] YVU420 Different modifiers per plane
[16:09:08] [PASSED] YVU420 Modifier for inexistent plane
[16:09:08] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[16:09:08] [PASSED] X0L2 Normal sizes
[16:09:08] [PASSED] X0L2 Max sizes
[16:09:08] [PASSED] X0L2 Invalid pitch
[16:09:08] [PASSED] X0L2 Pitch greater than minimum required
[16:09:08] [PASSED] X0L2 Handle for inexistent plane
[16:09:08] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[16:09:08] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[16:09:08] [PASSED] X0L2 Valid modifier
[16:09:08] [PASSED] X0L2 Modifier for inexistent plane
[16:09:08] =========== [PASSED] drm_test_framebuffer_create ===========
[16:09:08] [PASSED] drm_test_framebuffer_free
[16:09:08] [PASSED] drm_test_framebuffer_init
[16:09:08] [PASSED] drm_test_framebuffer_init_bad_format
[16:09:08] [PASSED] drm_test_framebuffer_init_dev_mismatch
[16:09:08] [PASSED] drm_test_framebuffer_lookup
[16:09:08] [PASSED] drm_test_framebuffer_lookup_inexistent
[16:09:08] [PASSED] drm_test_framebuffer_modifiers_not_supported
[16:09:08] ================= [PASSED] drm_framebuffer =================
[16:09:08] ================ drm_gem_shmem (8 subtests) ================
[16:09:08] [PASSED] drm_gem_shmem_test_obj_create
[16:09:08] [PASSED] drm_gem_shmem_test_obj_create_private
[16:09:08] [PASSED] drm_gem_shmem_test_pin_pages
[16:09:08] [PASSED] drm_gem_shmem_test_vmap
[16:09:08] [PASSED] drm_gem_shmem_test_get_pages_sgt
[16:09:08] [PASSED] drm_gem_shmem_test_get_sg_table
[16:09:08] [PASSED] drm_gem_shmem_test_madvise
[16:09:08] [PASSED] drm_gem_shmem_test_purge
[16:09:08] ================== [PASSED] drm_gem_shmem ==================
[16:09:08] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[16:09:08] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[16:09:08] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[16:09:08] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[16:09:08] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[16:09:08] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[16:09:08] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[16:09:08] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[16:09:08] [PASSED] Automatic
[16:09:08] [PASSED] Full
[16:09:08] [PASSED] Limited 16:235
[16:09:08] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[16:09:08] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[16:09:08] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[16:09:08] [PASSED] drm_test_check_disable_connector
[16:09:08] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[16:09:08] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[16:09:08] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[16:09:08] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[16:09:08] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[16:09:08] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[16:09:08] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[16:09:08] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[16:09:08] [PASSED] drm_test_check_output_bpc_dvi
[16:09:08] [PASSED] drm_test_check_output_bpc_format_vic_1
[16:09:08] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[16:09:08] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[16:09:08] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[16:09:08] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[16:09:08] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[16:09:08] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[16:09:08] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[16:09:08] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[16:09:08] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[16:09:08] [PASSED] drm_test_check_broadcast_rgb_value
[16:09:08] [PASSED] drm_test_check_bpc_8_value
[16:09:08] [PASSED] drm_test_check_bpc_10_value
[16:09:08] [PASSED] drm_test_check_bpc_12_value
[16:09:08] [PASSED] drm_test_check_format_value
[16:09:08] [PASSED] drm_test_check_tmds_char_value
[16:09:08] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[16:09:08] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[16:09:08] [PASSED] drm_test_check_mode_valid
[16:09:08] [PASSED] drm_test_check_mode_valid_reject
[16:09:08] [PASSED] drm_test_check_mode_valid_reject_rate
[16:09:08] [PASSED] drm_test_check_mode_valid_reject_max_clock
[16:09:08] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[16:09:08] ================= drm_managed (2 subtests) =================
[16:09:08] [PASSED] drm_test_managed_release_action
[16:09:08] [PASSED] drm_test_managed_run_action
[16:09:08] =================== [PASSED] drm_managed ===================
[16:09:08] =================== drm_mm (6 subtests) ====================
[16:09:08] [PASSED] drm_test_mm_init
[16:09:08] [PASSED] drm_test_mm_debug
[16:09:08] [PASSED] drm_test_mm_align32
[16:09:08] [PASSED] drm_test_mm_align64
[16:09:08] [PASSED] drm_test_mm_lowest
[16:09:08] [PASSED] drm_test_mm_highest
[16:09:08] ===================== [PASSED] drm_mm ======================
[16:09:08] ============= drm_modes_analog_tv (5 subtests) =============
[16:09:08] [PASSED] drm_test_modes_analog_tv_mono_576i
[16:09:08] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[16:09:08] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[16:09:08] [PASSED] drm_test_modes_analog_tv_pal_576i
[16:09:08] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[16:09:08] =============== [PASSED] drm_modes_analog_tv ===============
[16:09:08] ============== drm_plane_helper (2 subtests) ===============
[16:09:08] =============== drm_test_check_plane_state  ================
[16:09:08] [PASSED] clipping_simple
[16:09:08] [PASSED] clipping_rotate_reflect
[16:09:08] [PASSED] positioning_simple
[16:09:08] [PASSED] upscaling
[16:09:08] [PASSED] downscaling
[16:09:08] [PASSED] rounding1
[16:09:08] [PASSED] rounding2
[16:09:08] [PASSED] rounding3
[16:09:08] [PASSED] rounding4
[16:09:08] =========== [PASSED] drm_test_check_plane_state ============
[16:09:08] =========== drm_test_check_invalid_plane_state  ============
[16:09:08] [PASSED] positioning_invalid
[16:09:08] [PASSED] upscaling_invalid
[16:09:08] [PASSED] downscaling_invalid
[16:09:08] ======= [PASSED] drm_test_check_invalid_plane_state ========
[16:09:08] ================ [PASSED] drm_plane_helper =================
[16:09:08] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[16:09:08] ====== drm_test_connector_helper_tv_get_modes_check  =======
[16:09:08] [PASSED] None
[16:09:08] [PASSED] PAL
[16:09:08] [PASSED] NTSC
[16:09:08] [PASSED] Both, NTSC Default
[16:09:08] [PASSED] Both, PAL Default
[16:09:08] [PASSED] Both, NTSC Default, with PAL on command-line
[16:09:08] [PASSED] Both, PAL Default, with NTSC on command-line
[16:09:08] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[16:09:08] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[16:09:08] ================== drm_rect (9 subtests) ===================
[16:09:08] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[16:09:08] [PASSED] drm_test_rect_clip_scaled_not_clipped
[16:09:08] [PASSED] drm_test_rect_clip_scaled_clipped
[16:09:08] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[16:09:08] ================= drm_test_rect_intersect  =================
[16:09:08] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[16:09:08] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[16:09:08] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[16:09:08] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[16:09:08] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[16:09:08] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[16:09:08] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[16:09:08] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[16:09:08] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[16:09:08] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[16:09:08] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[16:09:08] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[16:09:08] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[16:09:08] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[16:09:08] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[16:09:08] ============= [PASSED] drm_test_rect_intersect =============
[16:09:08] ================ drm_test_rect_calc_hscale  ================
[16:09:08] [PASSED] normal use
[16:09:08] [PASSED] out of max range
[16:09:08] [PASSED] out of min range
[16:09:08] [PASSED] zero dst
[16:09:08] [PASSED] negative src
[16:09:08] [PASSED] negative dst
[16:09:08] ============ [PASSED] drm_test_rect_calc_hscale ============
[16:09:08] ================ drm_test_rect_calc_vscale  ================
[16:09:08] [PASSED] normal use
[16:09:08] [PASSED] out of max range
[16:09:08] [PASSED] out of min range
[16:09:08] [PASSED] zero dst
[16:09:08] [PASSED] negative src
[16:09:08] [PASSED] negative dst
[16:09:08] ============ [PASSED] drm_test_rect_calc_vscale ============
[16:09:08] ================== drm_test_rect_rotate  ===================
[16:09:08] [PASSED] reflect-x
[16:09:08] [PASSED] reflect-y
[16:09:08] [PASSED] rotate-0
[16:09:08] [PASSED] rotate-90
[16:09:08] [PASSED] rotate-180
[16:09:08] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[16:09:08] ============== [PASSED] drm_test_rect_rotate ===============
[16:09:08] ================ drm_test_rect_rotate_inv  =================
[16:09:08] [PASSED] reflect-x
[16:09:08] [PASSED] reflect-y
[16:09:08] [PASSED] rotate-0
[16:09:08] [PASSED] rotate-90
[16:09:08] [PASSED] rotate-180
[16:09:08] [PASSED] rotate-270
[16:09:08] ============ [PASSED] drm_test_rect_rotate_inv =============
[16:09:08] ==================== [PASSED] drm_rect =====================
[16:09:08] ============ drm_sysfb_modeset_test (1 subtest) ============
[16:09:08] ============ drm_test_sysfb_build_fourcc_list  =============
[16:09:08] [PASSED] no native formats
[16:09:08] [PASSED] XRGB8888 as native format
[16:09:08] [PASSED] remove duplicates
[16:09:08] [PASSED] convert alpha formats
[16:09:08] [PASSED] random formats
[16:09:08] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[16:09:08] ============= [PASSED] drm_sysfb_modeset_test ==============
[16:09:08] ============================================================
[16:09:08] Testing complete. Ran 616 tests: passed: 616
[16:09:08] Elapsed time: 24.624s total, 1.749s configuring, 22.706s building, 0.138s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[16:09:08] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:09:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:09:18] Starting KUnit Kernel (1/1)...
[16:09:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:09:18] ================= ttm_device (5 subtests) ==================
[16:09:18] [PASSED] ttm_device_init_basic
[16:09:18] [PASSED] ttm_device_init_multiple
[16:09:18] [PASSED] ttm_device_fini_basic
[16:09:18] [PASSED] ttm_device_init_no_vma_man
[16:09:18] ================== ttm_device_init_pools  ==================
[16:09:18] [PASSED] No DMA allocations, no DMA32 required
[16:09:18] [PASSED] DMA allocations, DMA32 required
[16:09:18] [PASSED] No DMA allocations, DMA32 required
[16:09:18] [PASSED] DMA allocations, no DMA32 required
[16:09:18] ============== [PASSED] ttm_device_init_pools ==============
[16:09:18] =================== [PASSED] ttm_device ====================
[16:09:18] ================== ttm_pool (8 subtests) ===================
[16:09:18] ================== ttm_pool_alloc_basic  ===================
[16:09:18] [PASSED] One page
[16:09:18] [PASSED] More than one page
[16:09:18] [PASSED] Above the allocation limit
[16:09:18] [PASSED] One page, with coherent DMA mappings enabled
[16:09:18] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:09:18] ============== [PASSED] ttm_pool_alloc_basic ===============
[16:09:18] ============== ttm_pool_alloc_basic_dma_addr  ==============
[16:09:18] [PASSED] One page
[16:09:18] [PASSED] More than one page
[16:09:18] [PASSED] Above the allocation limit
[16:09:18] [PASSED] One page, with coherent DMA mappings enabled
[16:09:18] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:09:18] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[16:09:18] [PASSED] ttm_pool_alloc_order_caching_match
[16:09:18] [PASSED] ttm_pool_alloc_caching_mismatch
[16:09:18] [PASSED] ttm_pool_alloc_order_mismatch
[16:09:18] [PASSED] ttm_pool_free_dma_alloc
[16:09:18] [PASSED] ttm_pool_free_no_dma_alloc
[16:09:18] [PASSED] ttm_pool_fini_basic
[16:09:18] ==================== [PASSED] ttm_pool =====================
[16:09:18] ================ ttm_resource (8 subtests) =================
[16:09:18] ================= ttm_resource_init_basic  =================
[16:09:18] [PASSED] Init resource in TTM_PL_SYSTEM
[16:09:18] [PASSED] Init resource in TTM_PL_VRAM
[16:09:18] [PASSED] Init resource in a private placement
[16:09:18] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[16:09:18] ============= [PASSED] ttm_resource_init_basic =============
[16:09:18] [PASSED] ttm_resource_init_pinned
[16:09:18] [PASSED] ttm_resource_fini_basic
[16:09:18] [PASSED] ttm_resource_manager_init_basic
[16:09:18] [PASSED] ttm_resource_manager_usage_basic
[16:09:18] [PASSED] ttm_resource_manager_set_used_basic
[16:09:18] [PASSED] ttm_sys_man_alloc_basic
[16:09:18] [PASSED] ttm_sys_man_free_basic
[16:09:18] ================== [PASSED] ttm_resource ===================
[16:09:18] =================== ttm_tt (15 subtests) ===================
[16:09:18] ==================== ttm_tt_init_basic  ====================
[16:09:18] [PASSED] Page-aligned size
[16:09:18] [PASSED] Extra pages requested
[16:09:18] ================ [PASSED] ttm_tt_init_basic ================
[16:09:18] [PASSED] ttm_tt_init_misaligned
[16:09:18] [PASSED] ttm_tt_fini_basic
[16:09:18] [PASSED] ttm_tt_fini_sg
[16:09:18] [PASSED] ttm_tt_fini_shmem
[16:09:18] [PASSED] ttm_tt_create_basic
[16:09:18] [PASSED] ttm_tt_create_invalid_bo_type
[16:09:18] [PASSED] ttm_tt_create_ttm_exists
[16:09:18] [PASSED] ttm_tt_create_failed
[16:09:18] [PASSED] ttm_tt_destroy_basic
[16:09:18] [PASSED] ttm_tt_populate_null_ttm
[16:09:18] [PASSED] ttm_tt_populate_populated_ttm
[16:09:18] [PASSED] ttm_tt_unpopulate_basic
[16:09:18] [PASSED] ttm_tt_unpopulate_empty_ttm
[16:09:18] [PASSED] ttm_tt_swapin_basic
[16:09:18] ===================== [PASSED] ttm_tt ======================
[16:09:18] =================== ttm_bo (14 subtests) ===================
[16:09:18] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[16:09:18] [PASSED] Cannot be interrupted and sleeps
[16:09:18] [PASSED] Cannot be interrupted, locks straight away
[16:09:18] [PASSED] Can be interrupted, sleeps
[16:09:18] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[16:09:18] [PASSED] ttm_bo_reserve_locked_no_sleep
[16:09:18] [PASSED] ttm_bo_reserve_no_wait_ticket
[16:09:18] [PASSED] ttm_bo_reserve_double_resv
[16:09:18] [PASSED] ttm_bo_reserve_interrupted
[16:09:18] [PASSED] ttm_bo_reserve_deadlock
[16:09:18] [PASSED] ttm_bo_unreserve_basic
[16:09:18] [PASSED] ttm_bo_unreserve_pinned
[16:09:18] [PASSED] ttm_bo_unreserve_bulk
[16:09:18] [PASSED] ttm_bo_put_basic
[16:09:18] [PASSED] ttm_bo_put_shared_resv
[16:09:18] [PASSED] ttm_bo_pin_basic
[16:09:18] [PASSED] ttm_bo_pin_unpin_resource
[16:09:18] [PASSED] ttm_bo_multiple_pin_one_unpin
[16:09:18] ===================== [PASSED] ttm_bo ======================
[16:09:18] ============== ttm_bo_validate (21 subtests) ===============
[16:09:18] ============== ttm_bo_init_reserved_sys_man  ===============
[16:09:18] [PASSED] Buffer object for userspace
[16:09:18] [PASSED] Kernel buffer object
[16:09:18] [PASSED] Shared buffer object
[16:09:18] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[16:09:18] ============== ttm_bo_init_reserved_mock_man  ==============
[16:09:18] [PASSED] Buffer object for userspace
[16:09:18] [PASSED] Kernel buffer object
[16:09:18] [PASSED] Shared buffer object
[16:09:18] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[16:09:18] [PASSED] ttm_bo_init_reserved_resv
[16:09:18] ================== ttm_bo_validate_basic  ==================
[16:09:18] [PASSED] Buffer object for userspace
[16:09:18] [PASSED] Kernel buffer object
[16:09:18] [PASSED] Shared buffer object
[16:09:18] ============== [PASSED] ttm_bo_validate_basic ==============
[16:09:18] [PASSED] ttm_bo_validate_invalid_placement
[16:09:18] ============= ttm_bo_validate_same_placement  ==============
[16:09:18] [PASSED] System manager
[16:09:18] [PASSED] VRAM manager
[16:09:18] ========= [PASSED] ttm_bo_validate_same_placement ==========
[16:09:18] [PASSED] ttm_bo_validate_failed_alloc
[16:09:18] [PASSED] ttm_bo_validate_pinned
[16:09:18] [PASSED] ttm_bo_validate_busy_placement
[16:09:18] ================ ttm_bo_validate_multihop  =================
[16:09:18] [PASSED] Buffer object for userspace
[16:09:18] [PASSED] Kernel buffer object
[16:09:18] [PASSED] Shared buffer object
[16:09:18] ============ [PASSED] ttm_bo_validate_multihop =============
[16:09:18] ========== ttm_bo_validate_no_placement_signaled  ==========
[16:09:18] [PASSED] Buffer object in system domain, no page vector
[16:09:18] [PASSED] Buffer object in system domain with an existing page vector
[16:09:18] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[16:09:18] ======== ttm_bo_validate_no_placement_not_signaled  ========
[16:09:18] [PASSED] Buffer object for userspace
[16:09:18] [PASSED] Kernel buffer object
[16:09:18] [PASSED] Shared buffer object
[16:09:18] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[16:09:18] [PASSED] ttm_bo_validate_move_fence_signaled
[16:09:18] ========= ttm_bo_validate_move_fence_not_signaled  =========
[16:09:18] [PASSED] Waits for GPU
[16:09:18] [PASSED] Tries to lock straight away
[16:09:18] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[16:09:18] [PASSED] ttm_bo_validate_happy_evict
[16:09:18] [PASSED] ttm_bo_validate_all_pinned_evict
[16:09:18] [PASSED] ttm_bo_validate_allowed_only_evict
[16:09:18] [PASSED] ttm_bo_validate_deleted_evict
[16:09:18] [PASSED] ttm_bo_validate_busy_domain_evict
[16:09:18] [PASSED] ttm_bo_validate_evict_gutting
[16:09:18] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[16:09:18] ================= [PASSED] ttm_bo_validate =================
[16:09:18] ============================================================
[16:09:18] Testing complete. Ran 101 tests: passed: 101
[16:09:18] Elapsed time: 9.892s total, 1.710s configuring, 7.965s building, 0.179s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for Introducing firmware late binding

[Patchwork]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/154104/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 1f778fbdf929e24ce13112d14835b780959892b0
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_display_types.h:2021:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2034:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Introducing firmware late binding

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2554 bytes --]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/154104/
State : success

== Summary ==

CI Bug Log - changes from xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15_BAT -> xe-pw-154104v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-154104v1_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_flip@basic-plain-flip@a-edp1:
    - bat-adlp-7:         [PASS][1] -> [DMESG-WARN][2] ([Intel XE#4543]) +1 other test dmesg-warn
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/bat-adlp-7/igt@kms_flip@basic-plain-flip@a-edp1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/bat-adlp-7/igt@kms_flip@basic-plain-flip@a-edp1.html

  * igt@xe_pat@pat-index-xe2@render:
    - bat-bmg-2:          [PASS][3] -> [FAIL][4] ([Intel XE#5507]) +1 other test fail
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/bat-bmg-2/igt@xe_pat@pat-index-xe2@render.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/bat-bmg-2/igt@xe_pat@pat-index-xe2@render.html

  
#### Possible fixes ####

  * igt@xe_vm@bind-execqueues-independent:
    - {bat-ptl-2}:        [FAIL][5] ([Intel XE#5783]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/bat-ptl-2/igt@xe_vm@bind-execqueues-independent.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/bat-ptl-2/igt@xe_vm@bind-execqueues-independent.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#5507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5507
  [Intel XE#5783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5783


Build changes
-------------

  * Linux: xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15 -> xe-pw-154104v1

  IGT_8524: 8524
  xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15: ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15
  xe-pw-154104v1: 154104v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/index.html

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✓ Xe.CI.Full: success for Introducing firmware late binding

[Patchwork]

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== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/154104/
State : success

== Summary ==

CI Bug Log - changes from xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15_FULL -> xe-pw-154104v1_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

New tests
---------

  New tests have been introduced between xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15_FULL and xe-pw-154104v1_FULL:

### New IGT tests (20) ###

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [2.14] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-b-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [2.16] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [2.16] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-d-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [2.17] s

  * igt@kms_cursor_crc@cursor-sliding-64x64@pipe-a-hdmi-a-2:
    - Statuses : 1 pass(s)
    - Exec time: [3.92] s

  * igt@kms_fbc_dirty_rect:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@flip-vs-suspend@a-hdmi-a3:
    - Statuses : 1 pass(s)
    - Exec time: [2.62] s

  * igt@kms_flip@flip-vs-suspend@b-hdmi-a3:
    - Statuses : 1 pass(s)
    - Exec time: [2.55] s

  * igt@kms_flip@flip-vs-suspend@c-hdmi-a3:
    - Statuses : 1 pass(s)
    - Exec time: [2.63] s

  * igt@kms_plane_multiple@tiling-none@pipe-a-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.77] s

  * igt@kms_plane_multiple@tiling-none@pipe-b-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.76] s

  * igt@kms_plane_multiple@tiling-none@pipe-c-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.78] s

  * igt@kms_plane_multiple@tiling-none@pipe-d-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.81] s

  * igt@kms_plane_multiple@tiling-x@pipe-a-dp-2:
    - Statuses : 1 pass(s)
    - Exec time: [0.87] s

  * igt@kms_plane_multiple@tiling-x@pipe-a-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.76] s

  * igt@kms_plane_multiple@tiling-x@pipe-b-dp-2:
    - Statuses : 1 pass(s)
    - Exec time: [0.92] s

  * igt@kms_plane_multiple@tiling-x@pipe-b-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.76] s

  * igt@kms_plane_multiple@tiling-x@pipe-c-dp-2:
    - Statuses : 1 pass(s)
    - Exec time: [0.90] s

  * igt@kms_plane_multiple@tiling-x@pipe-c-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.78] s

  * igt@kms_plane_multiple@tiling-x@pipe-d-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.76] s

  

Known issues
------------

  Here are the changes found in xe-pw-154104v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@invalid-get-prop-any:
    - shard-adlp:         [PASS][1] -> [DMESG-WARN][2] ([Intel XE#2953] / [Intel XE#4173]) +7 other tests dmesg-warn
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-adlp-3/igt@kms_addfb_basic@invalid-get-prop-any.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-1/igt@kms_addfb_basic@invalid-get-prop-any.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-hdmi-a-1-y:
    - shard-adlp:         NOTRUN -> [DMESG-WARN][3] ([Intel XE#4543]) +3 other tests dmesg-warn
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-hdmi-a-1-y.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][4] ([Intel XE#316])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-adlp:         NOTRUN -> [SKIP][5] ([Intel XE#1124]) +3 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-90:
    - shard-adlp:         NOTRUN -> [SKIP][6] ([Intel XE#316])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#1124])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#607])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][9] ([Intel XE#1124]) +3 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-466/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p:
    - shard-adlp:         NOTRUN -> [SKIP][10] ([Intel XE#367]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
    - shard-bmg:          [PASS][11] -> [SKIP][12] ([Intel XE#2314] / [Intel XE#2894])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-2-displays-1920x1080p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][13] ([Intel XE#367])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][14] ([Intel XE#455] / [Intel XE#787]) +5 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][15] ([Intel XE#787]) +97 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc@pipe-a-dp-4.html

  * igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-d-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][16] ([Intel XE#455] / [Intel XE#787]) +15 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-432/igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-d-dp-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][17] ([Intel XE#3442])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-a-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][18] ([Intel XE#787]) +8 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][19] ([Intel XE#2907])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [PASS][20] -> [INCOMPLETE][21] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [PASS][22] -> [INCOMPLETE][23] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4:
    - shard-dg2-set2:     [PASS][24] -> [INCOMPLETE][25] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html

  * igt@kms_chamelium_color@ctm-0-25:
    - shard-adlp:         NOTRUN -> [SKIP][26] ([Intel XE#306])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_chamelium_color@ctm-0-25.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2252])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k.html

  * igt@kms_chamelium_edid@vga-edid-read:
    - shard-adlp:         NOTRUN -> [SKIP][28] ([Intel XE#373]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_chamelium_edid@vga-edid-read.html

  * igt@kms_chamelium_hpd@dp-hpd-after-hibernate:
    - shard-dg2-set2:     NOTRUN -> [SKIP][29] ([Intel XE#373])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@kms_chamelium_hpd@dp-hpd-after-hibernate.html

  * igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][30] ([Intel XE#1178])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html

  * igt@kms_content_protection@atomic-dpms@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [FAIL][31] ([Intel XE#1178]) +2 other tests fail
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-435/igt@kms_content_protection@atomic-dpms@pipe-a-dp-4.html

  * igt@kms_cursor_crc@cursor-offscreen-max-size:
    - shard-adlp:         NOTRUN -> [SKIP][32] ([Intel XE#455]) +6 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_cursor_crc@cursor-offscreen-max-size.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
    - shard-bmg:          [PASS][33] -> [SKIP][34] ([Intel XE#2291]) +3 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-adlp:         NOTRUN -> [SKIP][35] ([Intel XE#323])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-dg2-set2:     NOTRUN -> [SKIP][36] ([Intel XE#455])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][37] ([Intel XE#4494] / [i915#3804])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-435/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-dg2-set2:     NOTRUN -> [SKIP][38] ([Intel XE#4422])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
    - shard-bmg:          [PASS][39] -> [SKIP][40] ([Intel XE#2316]) +6 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-2/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_flip@2x-modeset-vs-vblank-race-interruptible:
    - shard-adlp:         NOTRUN -> [SKIP][41] ([Intel XE#310]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-dg2-set2:     [PASS][42] -> [INCOMPLETE][43] ([Intel XE#2049] / [Intel XE#2597])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-dg2-432/igt@kms_flip@flip-vs-suspend.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-434/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend@d-dp4:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][44] ([Intel XE#2049] / [Intel XE#2597])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-434/igt@kms_flip@flip-vs-suspend@d-dp4.html

  * igt@kms_frontbuffer_tracking@drrs-1p-rte:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#2311]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-1p-rte.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-onoff:
    - shard-dg2-set2:     NOTRUN -> [SKIP][46] ([Intel XE#651]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
    - shard-adlp:         NOTRUN -> [SKIP][47] ([Intel XE#656]) +11 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-pri-indfb-multidraw:
    - shard-adlp:         NOTRUN -> [SKIP][48] ([Intel XE#651]) +2 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_frontbuffer_tracking@fbcdrrs-1p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#2313]) +2 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move:
    - shard-adlp:         NOTRUN -> [SKIP][50] ([Intel XE#653]) +2 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][51] ([Intel XE#653]) +3 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
    - shard-adlp:         NOTRUN -> [SKIP][52] ([Intel XE#1151])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-bmg:          [PASS][53] -> [SKIP][54] ([Intel XE#3012])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-2/igt@kms_joiner@basic-force-big-joiner.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-6/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-adlp:         NOTRUN -> [SKIP][55] ([Intel XE#4596])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
    - shard-dg2-set2:     NOTRUN -> [SKIP][56] ([Intel XE#1406] / [Intel XE#1489]) +2 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-466/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
    - shard-adlp:         NOTRUN -> [SKIP][57] ([Intel XE#1406] / [Intel XE#1489]) +1 other test skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr@fbc-pr-basic:
    - shard-adlp:         NOTRUN -> [SKIP][58] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_psr@fbc-pr-basic.html

  * igt@kms_psr@psr2-cursor-plane-move:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_psr@psr2-cursor-plane-move.html

  * igt@kms_psr@psr2-primary-render:
    - shard-dg2-set2:     NOTRUN -> [SKIP][60] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-466/igt@kms_psr@psr2-primary-render.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-adlp:         NOTRUN -> [SKIP][61] ([Intel XE#3414])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@kms_rotation_crc@bad-tiling.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][62] ([Intel XE#3414])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-466/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#3414] / [Intel XE#3904])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#1499])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@xe_copy_basic@mem-copy-linear-0xfffe:
    - shard-adlp:         NOTRUN -> [SKIP][65] ([Intel XE#1123])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@xe_copy_basic@mem-copy-linear-0xfffe.html

  * igt@xe_eu_stall@non-blocking-read:
    - shard-dg2-set2:     NOTRUN -> [SKIP][66] ([Intel XE#5626])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@xe_eu_stall@non-blocking-read.html

  * igt@xe_eu_stall@unprivileged-access:
    - shard-adlp:         NOTRUN -> [SKIP][67] ([Intel XE#5626])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@xe_eu_stall@unprivileged-access.html

  * igt@xe_eudebug@basic-client-th:
    - shard-adlp:         NOTRUN -> [SKIP][68] ([Intel XE#4837] / [Intel XE#5565]) +3 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@xe_eudebug@basic-client-th.html

  * igt@xe_eudebug@vm-bind-clear-faultable:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#4837])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@xe_eudebug@vm-bind-clear-faultable.html

  * igt@xe_eudebug_online@breakpoint-many-sessions-single-tile:
    - shard-dg2-set2:     NOTRUN -> [SKIP][70] ([Intel XE#4837]) +1 other test skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@xe_eudebug_online@breakpoint-many-sessions-single-tile.html

  * igt@xe_evict@evict-beng-large-cm:
    - shard-adlp:         NOTRUN -> [SKIP][71] ([Intel XE#261] / [Intel XE#5564])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@xe_evict@evict-beng-large-cm.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#2322]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-rebind:
    - shard-adlp:         NOTRUN -> [SKIP][73] ([Intel XE#1392] / [Intel XE#5575]) +1 other test skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-rebind.html

  * igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
    - shard-dg2-set2:     [PASS][74] -> [SKIP][75] ([Intel XE#1392]) +3 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-dg2-463/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html

  * igt@xe_exec_fault_mode@many-basic-imm:
    - shard-adlp:         NOTRUN -> [SKIP][76] ([Intel XE#288] / [Intel XE#5561]) +6 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@xe_exec_fault_mode@many-basic-imm.html

  * igt@xe_exec_fault_mode@once-basic:
    - shard-dg2-set2:     NOTRUN -> [SKIP][77] ([Intel XE#288]) +1 other test skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@xe_exec_fault_mode@once-basic.html

  * igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence:
    - shard-dg2-set2:     NOTRUN -> [SKIP][78] ([Intel XE#2360])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html

  * igt@xe_exec_system_allocator@once-mmap-huge-nomemset:
    - shard-adlp:         NOTRUN -> [SKIP][79] ([Intel XE#4915]) +57 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@xe_exec_system_allocator@once-mmap-huge-nomemset.html

  * igt@xe_exec_system_allocator@process-many-stride-mmap-remap-ro-dontunmap:
    - shard-dg2-set2:     NOTRUN -> [SKIP][80] ([Intel XE#4915]) +34 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@xe_exec_system_allocator@process-many-stride-mmap-remap-ro-dontunmap.html

  * igt@xe_exec_system_allocator@threads-many-execqueues-mmap-free-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#4943]) +3 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-free-huge-nomemset.html

  * igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind:
    - shard-dg2-set2:     [PASS][82] -> [ABORT][83] ([Intel XE#4847] / [Intel XE#5732])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-dg2-435/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-433/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html

  * igt@xe_oa@oa-unit-exclusive-stream-exec-q:
    - shard-dg2-set2:     NOTRUN -> [SKIP][84] ([Intel XE#3573])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@xe_oa@oa-unit-exclusive-stream-exec-q.html

  * igt@xe_oa@syncs-syncobj-cfg:
    - shard-adlp:         NOTRUN -> [SKIP][85] ([Intel XE#3573])
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@xe_oa@syncs-syncobj-cfg.html

  * igt@xe_peer2peer@read:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#2427])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@xe_peer2peer@read.html

  * igt@xe_peer2peer@write:
    - shard-adlp:         NOTRUN -> [SKIP][87] ([Intel XE#1061] / [Intel XE#5568])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@xe_peer2peer@write.html

  * igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p:
    - shard-dg2-set2:     NOTRUN -> [FAIL][88] ([Intel XE#1173])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-435/igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p.html

  * igt@xe_pm@s2idle-basic-exec:
    - shard-adlp:         [PASS][89] -> [ABORT][90] ([Intel XE#4847])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-adlp-6/igt@xe_pm@s2idle-basic-exec.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-1/igt@xe_pm@s2idle-basic-exec.html
    - shard-lnl:          [PASS][91] -> [ABORT][92] ([Intel XE#4847])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-lnl-8/igt@xe_pm@s2idle-basic-exec.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-lnl-8/igt@xe_pm@s2idle-basic-exec.html

  * igt@xe_query@multigpu-query-cs-cycles:
    - shard-adlp:         NOTRUN -> [SKIP][93] ([Intel XE#944])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-3/igt@xe_query@multigpu-query-cs-cycles.html

  
#### Possible fixes ####

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][94] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [INCOMPLETE][96] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [PASS][97]
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html

  * igt@kms_cursor_crc@cursor-rapid-movement-64x64:
    - shard-adlp:         [DMESG-WARN][98] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][99] +5 other tests pass
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-adlp-2/igt@kms_cursor_crc@cursor-rapid-movement-64x64.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-9/igt@kms_cursor_crc@cursor-rapid-movement-64x64.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [SKIP][100] ([Intel XE#2291]) -> [PASS][101] +1 other test pass
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc:
    - shard-bmg:          [SKIP][102] ([Intel XE#1340]) -> [PASS][103]
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
    - shard-bmg:          [SKIP][104] ([Intel XE#2316]) -> [PASS][105] +6 other tests pass
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-2/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][106] ([Intel XE#4543]) -> [PASS][107] +1 other test pass
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-adlp-2/igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a1.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-9/igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a1.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-lnl:          [FAIL][108] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][109] +1 other test pass
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-bmg:          [INCOMPLETE][110] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][111] +1 other test pass
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-7/igt@kms_flip@flip-vs-suspend.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-bmg:          [SKIP][112] ([Intel XE#1503]) -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-6/igt@kms_hdr@invalid-metadata-sizes.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-2/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-bmg:          [SKIP][114] ([Intel XE#1435]) -> [PASS][115]
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-2/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@kms_vrr@negative-basic:
    - shard-bmg:          [SKIP][116] ([Intel XE#1499]) -> [PASS][117]
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-6/igt@kms_vrr@negative-basic.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-7/igt@kms_vrr@negative-basic.html

  * igt@xe_exec_basic@multigpu-once-null:
    - shard-dg2-set2:     [SKIP][118] ([Intel XE#1392]) -> [PASS][119] +2 other tests pass
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-dg2-432/igt@xe_exec_basic@multigpu-once-null.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-435/igt@xe_exec_basic@multigpu-once-null.html

  * {igt@xe_exec_system_allocator@many-stride-malloc-prefetch}:
    - shard-bmg:          [WARN][120] ([Intel XE#5786]) -> [PASS][121]
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-4/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-3/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html

  * igt@xe_pm@s2idle-exec-after:
    - shard-adlp:         [DMESG-WARN][122] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4504]) -> [PASS][123]
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-adlp-3/igt@xe_pm@s2idle-exec-after.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-adlp-1/igt@xe_pm@s2idle-exec-after.html

  
#### Warnings ####

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-dg2-set2:     [INCOMPLETE][124] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [INCOMPLETE][125] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-bmg:          [SKIP][126] ([Intel XE#2341]) -> [FAIL][127] ([Intel XE#1178])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-6/igt@kms_content_protection@atomic-dpms.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][128] ([Intel XE#2312]) -> [SKIP][129] ([Intel XE#2311]) +12 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-render:
    - shard-bmg:          [SKIP][130] ([Intel XE#2311]) -> [SKIP][131] ([Intel XE#2312]) +8 other tests skip
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-render.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          [SKIP][132] ([Intel XE#5390]) -> [SKIP][133] ([Intel XE#2312]) +2 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
    - shard-bmg:          [SKIP][134] ([Intel XE#2312]) -> [SKIP][135] ([Intel XE#5390]) +4 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt:
    - shard-bmg:          [SKIP][136] ([Intel XE#2312]) -> [SKIP][137] ([Intel XE#2313]) +16 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          [SKIP][138] ([Intel XE#2313]) -> [SKIP][139] ([Intel XE#2312]) +11 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][140] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][141] ([Intel XE#3544])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          [SKIP][142] ([Intel XE#4596]) -> [SKIP][143] ([Intel XE#5021])
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-y.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          [SKIP][144] ([Intel XE#5021]) -> [SKIP][145] ([Intel XE#4596])
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-yf.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][146] ([Intel XE#2426]) -> [SKIP][147] ([Intel XE#2509])
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
    - shard-dg2-set2:     [INCOMPLETE][148] -> [INCOMPLETE][149] ([Intel XE#4842])
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-dg2-435/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-435/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-bmg:          [ABORT][150] ([Intel XE#4917] / [Intel XE#5466] / [Intel XE#5530]) -> [ABORT][151] ([Intel XE#5466] / [Intel XE#5530])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-bmg-8/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-bmg-5/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  * igt@xe_peer2peer@write:
    - shard-dg2-set2:     [SKIP][152] ([Intel XE#1061]) -> [FAIL][153] ([Intel XE#1173])
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15/shard-dg2-432/igt@xe_peer2peer@write.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/shard-dg2-435/igt@xe_peer2peer@write.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
  [Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1151
  [Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4494]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4494
  [Intel XE#4504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4504
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4842]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4842
  [Intel XE#4847]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4847
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5530
  [Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
  [Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
  [Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
  [Intel XE#5568]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5568
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
  [Intel XE#5732]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5732
  [Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804


Build changes
-------------

  * Linux: xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15 -> xe-pw-154104v1

  IGT_8524: 8524
  xe-3690-ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15: ac08f4fce7a3c22d6fcb7aee3a1d61cd96ea6b15
  xe-pw-154104v1: 154104v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154104v1/index.html

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