From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Matthew Brost <matthew.brost@intel.com>,
<intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v4 15/34] drm/xe/vf: Close multi-GT GGTT shift race
Date: Fri, 3 Oct 2025 16:24:13 +0200 [thread overview]
Message-ID: <d9c9b830-3deb-469d-83e9-93a5adb3ffc9@intel.com> (raw)
In-Reply-To: <20251002055402.1865880-16-matthew.brost@intel.com>
On 10/2/2025 7:53 AM, Matthew Brost wrote:
> As multi-GT VF post-migration recovery can run in parallel on different
> workqueues, but both GTs point to the same GGTT, only one GT needs to
> shift the GGTT. However, both GTs need to know when this step has
> completed. To coordinate this, perform the GGTT shift under the GGTT
> lock. With shift being done under the lock, storing the shift value
> becomes unnecessary.
>
> v3:
> - Update commmit message (Tomasz)
> v4:
> - Move GGTT values to tile state (Michal)
I'm wondering if this would be huge task to make this move as a separate step/patch?
> - Use GGTT lock (Michal)
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_device_types.h | 3 +
> drivers/gpu/drm/xe/xe_gt_sriov_vf.c | 166 +++++++-------------
> drivers/gpu/drm/xe/xe_gt_sriov_vf.h | 5 +-
> drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h | 7 +-
> drivers/gpu/drm/xe/xe_guc.c | 2 +-
> drivers/gpu/drm/xe/xe_tile_sriov_vf.c | 30 +++-
> drivers/gpu/drm/xe/xe_tile_sriov_vf.h | 2 +-
> drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h | 23 +++
> drivers/gpu/drm/xe/xe_vram.c | 6 +-
> 9 files changed, 117 insertions(+), 127 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
>
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index a6c361db11d9..c27414d4e856 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -27,6 +27,7 @@
> #include "xe_sriov_vf_ccs_types.h"
> #include "xe_step_types.h"
> #include "xe_survivability_mode_types.h"
> +#include "xe_tile_sriov_vf_types.h"
> #include "xe_validation.h"
>
> #if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> @@ -185,6 +186,8 @@ struct xe_tile {
> struct {
> /** @sriov.vf.ggtt_balloon: GGTT regions excluded from use. */
> struct xe_ggtt_node *ggtt_balloon[2];
> + /** @sriov.vf.self_config: VF configuration data */
> + struct xe_tile_sriov_vf_selfconfig self_config;
> } vf;
> } sriov;
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> index dc2516be590b..768c192eb662 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> @@ -436,42 +436,57 @@ u32 xe_gt_sriov_vf_gmdid(struct xe_gt *gt)
> return value;
> }
>
> -static int vf_get_ggtt_info(struct xe_gt *gt)
> +static int vf_get_ggtt_info(struct xe_gt *gt, bool recovery)
> {
> - struct xe_gt_sriov_vf_selfconfig *config = >->sriov.vf.self_config;
> + struct xe_tile_sriov_vf_selfconfig *config =
> + >_to_tile(gt)->sriov.vf.self_config;
> + struct xe_ggtt *ggtt = gt_to_tile(gt)->mem.ggtt;
> struct xe_guc *guc = >->uc.guc;
> u64 start, size;
> + s64 shift;
> int err;
>
> xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
>
> + mutex_lock(&ggtt->lock);
with
guard(mutex)(&ggtt->lock);
you will avoid all below error prone goto's
> +
> err = guc_action_query_single_klv64(guc, GUC_KLV_VF_CFG_GGTT_START_KEY, &start);
> if (unlikely(err))
> - return err;
> + goto out;
>
> err = guc_action_query_single_klv64(guc, GUC_KLV_VF_CFG_GGTT_SIZE_KEY, &size);
> if (unlikely(err))
> - return err;
> + goto out;
>
> if (config->ggtt_size && config->ggtt_size != size) {
> xe_gt_sriov_err(gt, "Unexpected GGTT reassignment: %lluK != %lluK\n",
> size / SZ_1K, config->ggtt_size / SZ_1K);
> - return -EREMCHG;
> + err = -EREMCHG;
> + goto out;
> }
>
> xe_gt_sriov_dbg_verbose(gt, "GGTT %#llx-%#llx = %lluK\n",
> start, start + size - 1, size / SZ_1K);
>
> - config->ggtt_shift = start - (s64)config->ggtt_base;
> + shift = start - (s64)config->ggtt_base;
> config->ggtt_base = start;
> config->ggtt_size = size;
> + err = config->ggtt_size ? 0 : -ENODATA;
>
> - return config->ggtt_size ? 0 : -ENODATA;
> + if (!err && shift && recovery) {
> + xe_gt_sriov_info(gt, "Shifting GGTT base by %lld to 0x%016llx\\n",
> + shift, config->ggtt_base);
> + xe_tile_sriov_vf_fixup_ggtt_nodes(gt_to_tile(gt), shift);
> + }
> +out:
> + mutex_unlock(&ggtt->lock);
> + return err;
> }
>
> static int vf_get_lmem_info(struct xe_gt *gt)
> {
> - struct xe_gt_sriov_vf_selfconfig *config = >->sriov.vf.self_config;
> + struct xe_tile_sriov_vf_selfconfig *config =
> + >_to_tile(gt)->sriov.vf.self_config;
I would try to avoid accessing directly tile-level data from here,
but we can fix that in follow up
> struct xe_guc *guc = >->uc.guc;
> char size_str[10];
> u64 size;
> @@ -481,20 +496,23 @@ static int vf_get_lmem_info(struct xe_gt *gt)
>
> err = guc_action_query_single_klv64(guc, GUC_KLV_VF_CFG_LMEM_SIZE_KEY, &size);
> if (unlikely(err))
> - return err;
> + goto out;
these goto's seems to be unnecessary now
>
> if (config->lmem_size && config->lmem_size != size) {
> xe_gt_sriov_err(gt, "Unexpected LMEM reassignment: %lluM != %lluM\n",
> size / SZ_1M, config->lmem_size / SZ_1M);
> - return -EREMCHG;
> + err = -EREMCHG;
> + goto out;
> }
>
> string_get_size(size, 1, STRING_UNITS_2, size_str, sizeof(size_str));
> xe_gt_sriov_dbg_verbose(gt, "LMEM %lluM %s\n", size / SZ_1M, size_str);
>
> config->lmem_size = size;
> + err = config->lmem_size ? 0 : -ENODATA;
>
> - return config->lmem_size ? 0 : -ENODATA;
> +out:
> + return err;
> }
>
> static int vf_get_submission_cfg(struct xe_gt *gt)
> @@ -508,21 +526,23 @@ static int vf_get_submission_cfg(struct xe_gt *gt)
>
> err = guc_action_query_single_klv32(guc, GUC_KLV_VF_CFG_NUM_CONTEXTS_KEY, &num_ctxs);
> if (unlikely(err))
> - return err;
> + goto out;
>
> err = guc_action_query_single_klv32(guc, GUC_KLV_VF_CFG_NUM_DOORBELLS_KEY, &num_dbs);
> if (unlikely(err))
> - return err;
> + goto out;
same here
>
> if (config->num_ctxs && config->num_ctxs != num_ctxs) {
> xe_gt_sriov_err(gt, "Unexpected CTXs reassignment: %u != %u\n",
> num_ctxs, config->num_ctxs);
> - return -EREMCHG;
> + err = -EREMCHG;
> + goto out;
> }
> if (config->num_dbs && config->num_dbs != num_dbs) {
> xe_gt_sriov_err(gt, "Unexpected DBs reassignment: %u != %u\n",
> num_dbs, config->num_dbs);
> - return -EREMCHG;
> + err = -EREMCHG;
> + goto out;
> }
>
> xe_gt_sriov_dbg_verbose(gt, "CTXs %u DBs %u\n", num_ctxs, num_dbs);
> @@ -530,7 +550,10 @@ static int vf_get_submission_cfg(struct xe_gt *gt)
> config->num_ctxs = num_ctxs;
> config->num_dbs = num_dbs;
>
> - return config->num_ctxs ? 0 : -ENODATA;
> + err = config->num_ctxs ? 0 : -ENODATA;
> +
> +out:
> + return err;
> }
>
> static void vf_cache_gmdid(struct xe_gt *gt)
> @@ -544,17 +567,18 @@ static void vf_cache_gmdid(struct xe_gt *gt)
> /**
> * xe_gt_sriov_vf_query_config - Query SR-IOV config data over MMIO.
> * @gt: the &xe_gt
> + * @recovery: VF post migration recovery path
small note about what's different in this path would not hurt
> *
> * This function is for VF use only.
> *
> * Return: 0 on success or a negative error code on failure.
> */
> -int xe_gt_sriov_vf_query_config(struct xe_gt *gt)
> +int xe_gt_sriov_vf_query_config(struct xe_gt *gt, bool recovery)
> {
> struct xe_device *xe = gt_to_xe(gt);
> int err;
>
> - err = vf_get_ggtt_info(gt);
> + err = vf_get_ggtt_info(gt, recovery);
> if (unlikely(err))
> return err;
>
> @@ -584,80 +608,16 @@ int xe_gt_sriov_vf_query_config(struct xe_gt *gt)
> */
> u16 xe_gt_sriov_vf_guc_ids(struct xe_gt *gt)
> {
> - xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> - xe_gt_assert(gt, gt->sriov.vf.guc_version.major);
> - xe_gt_assert(gt, gt->sriov.vf.self_config.num_ctxs);
> -
> - return gt->sriov.vf.self_config.num_ctxs;
> -}
> -
> -/**
> - * xe_gt_sriov_vf_lmem - VF LMEM configuration.
> - * @gt: the &xe_gt
> - *
> - * This function is for VF use only.
> - *
> - * Return: size of the LMEM assigned to VF.
> - */
> -u64 xe_gt_sriov_vf_lmem(struct xe_gt *gt)
> -{
> - xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> - xe_gt_assert(gt, gt->sriov.vf.guc_version.major);
> - xe_gt_assert(gt, gt->sriov.vf.self_config.lmem_size);
> -
> - return gt->sriov.vf.self_config.lmem_size;
> -}
> -
> -/**
> - * xe_gt_sriov_vf_ggtt - VF GGTT configuration.
> - * @gt: the &xe_gt
> - *
> - * This function is for VF use only.
> - *
> - * Return: size of the GGTT assigned to VF.
> - */
> -u64 xe_gt_sriov_vf_ggtt(struct xe_gt *gt)
> -{
> - xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> - xe_gt_assert(gt, gt->sriov.vf.guc_version.major);
> - xe_gt_assert(gt, gt->sriov.vf.self_config.ggtt_size);
> -
> - return gt->sriov.vf.self_config.ggtt_size;
> -}
> + struct xe_gt_sriov_vf_selfconfig *config = >->sriov.vf.self_config;
> + u16 val;
>
> -/**
> - * xe_gt_sriov_vf_ggtt_base - VF GGTT base offset.
> - * @gt: the &xe_gt
> - *
> - * This function is for VF use only.
> - *
> - * Return: base offset of the GGTT assigned to VF.
> - */
> -u64 xe_gt_sriov_vf_ggtt_base(struct xe_gt *gt)
> -{
> xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> xe_gt_assert(gt, gt->sriov.vf.guc_version.major);
> - xe_gt_assert(gt, gt->sriov.vf.self_config.ggtt_size);
>
> - return gt->sriov.vf.self_config.ggtt_base;
> -}
> + xe_gt_assert(gt, config->num_ctxs);
> + val = config->num_ctxs;
>
> -/**
> - * xe_gt_sriov_vf_ggtt_shift - Return shift in GGTT range due to VF migration
> - * @gt: the &xe_gt struct instance
> - *
> - * This function is for VF use only.
> - *
> - * Return: The shift value; could be negative
> - */
> -s64 xe_gt_sriov_vf_ggtt_shift(struct xe_gt *gt)
> -{
> - struct xe_gt_sriov_vf_selfconfig *config = >->sriov.vf.self_config;
> -
> - xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> - xe_gt_assert(gt, xe_gt_is_main_type(gt));
> -
> - return config->ggtt_shift;
> + return val;
> }
>
> static int relay_action_handshake(struct xe_gt *gt, u32 *major, u32 *minor)
> @@ -1057,6 +1017,8 @@ void xe_gt_sriov_vf_write32(struct xe_gt *gt, struct xe_reg reg, u32 val)
> */
> void xe_gt_sriov_vf_print_config(struct xe_gt *gt, struct drm_printer *p)
> {
> + struct xe_tile_sriov_vf_selfconfig *tconfig =
> + >_to_tile(gt)->sriov.vf.self_config;
> struct xe_gt_sriov_vf_selfconfig *config = >->sriov.vf.self_config;
> struct xe_device *xe = gt_to_xe(gt);
> char buf[10];
> @@ -1064,17 +1026,15 @@ void xe_gt_sriov_vf_print_config(struct xe_gt *gt, struct drm_printer *p)
> xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
>
> drm_printf(p, "GGTT range:\t%#llx-%#llx\n",
> - config->ggtt_base,
> - config->ggtt_base + config->ggtt_size - 1);
> -
> - string_get_size(config->ggtt_size, 1, STRING_UNITS_2, buf, sizeof(buf));
> - drm_printf(p, "GGTT size:\t%llu (%s)\n", config->ggtt_size, buf);
> + tconfig->ggtt_base,
> + tconfig->ggtt_base + tconfig->ggtt_size - 1);
>
> - drm_printf(p, "GGTT shift on last restore:\t%lld\n", config->ggtt_shift);
> + string_get_size(tconfig->ggtt_size, 1, STRING_UNITS_2, buf, sizeof(buf));
> + drm_printf(p, "GGTT size:\t%llu (%s)\n", tconfig->ggtt_size, buf);
>
> if (IS_DGFX(xe) && xe_gt_is_main_type(gt)) {
> - string_get_size(config->lmem_size, 1, STRING_UNITS_2, buf, sizeof(buf));
> - drm_printf(p, "LMEM size:\t%llu (%s)\n", config->lmem_size, buf);
> + string_get_size(tconfig->lmem_size, 1, STRING_UNITS_2, buf, sizeof(buf));
> + drm_printf(p, "LMEM size:\t%llu (%s)\n", tconfig->lmem_size, buf);
> }
>
> drm_printf(p, "GuC contexts:\t%u\n", config->num_ctxs);
> @@ -1161,21 +1121,16 @@ static size_t post_migration_scratch_size(struct xe_device *xe)
> static int vf_post_migration_fixups(struct xe_gt *gt)
> {
> void *buf = gt->sriov.vf.migration.scratch;
> - s64 shift;
> int err;
>
> - err = xe_gt_sriov_vf_query_config(gt);
> + err = xe_gt_sriov_vf_query_config(gt, true);
> if (err)
> return err;
>
> - shift = xe_gt_sriov_vf_ggtt_shift(gt);
> - if (shift) {
> - xe_tile_sriov_vf_fixup_ggtt_nodes(gt_to_tile(gt), shift);
> - xe_gt_sriov_vf_default_lrcs_hwsp_rebase(gt);
> - err = xe_guc_contexts_hwsp_rebase(>->uc.guc, buf);
> - if (err)
> - return err;
> - }
> + xe_gt_sriov_vf_default_lrcs_hwsp_rebase(gt);
> + err = xe_guc_contexts_hwsp_rebase(>->uc.guc, buf);
> + if (err)
> + return err;
>
> return 0;
> }
> @@ -1274,7 +1229,6 @@ int xe_gt_sriov_vf_init_early(struct xe_gt *gt)
> return -ENOMEM;
>
> gt->sriov.vf.migration.scratch = buf;
> - init_rwsem(>->sriov.vf.self_config.lock);
> spin_lock_init(>->sriov.vf.migration.lock);
> INIT_WORK(>->sriov.vf.migration.worker, migration_worker_func);
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> index 0b0f2a30e67c..08568e68447d 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> @@ -18,7 +18,7 @@ int xe_gt_sriov_vf_bootstrap(struct xe_gt *gt);
> void xe_gt_sriov_vf_guc_versions(struct xe_gt *gt,
> struct xe_uc_fw_version *wanted,
> struct xe_uc_fw_version *found);
> -int xe_gt_sriov_vf_query_config(struct xe_gt *gt);
> +int xe_gt_sriov_vf_query_config(struct xe_gt *gt, bool recovery);
> int xe_gt_sriov_vf_connect(struct xe_gt *gt);
> int xe_gt_sriov_vf_query_runtime(struct xe_gt *gt);
> void xe_gt_sriov_vf_migrated_event_handler(struct xe_gt *gt);
> @@ -29,9 +29,6 @@ bool xe_gt_sriov_vf_recovery_inprogress(struct xe_gt *gt);
> u32 xe_gt_sriov_vf_gmdid(struct xe_gt *gt);
> u16 xe_gt_sriov_vf_guc_ids(struct xe_gt *gt);
> u64 xe_gt_sriov_vf_lmem(struct xe_gt *gt);
> -u64 xe_gt_sriov_vf_ggtt(struct xe_gt *gt);
> -u64 xe_gt_sriov_vf_ggtt_base(struct xe_gt *gt);
> -s64 xe_gt_sriov_vf_ggtt_shift(struct xe_gt *gt);
>
> u32 xe_gt_sriov_vf_read32(struct xe_gt *gt, struct xe_reg reg);
> void xe_gt_sriov_vf_write32(struct xe_gt *gt, struct xe_reg reg, u32 val);
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> index e753646debc4..1796d4caf62f 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> @@ -6,6 +6,7 @@
> #ifndef _XE_GT_SRIOV_VF_TYPES_H_
> #define _XE_GT_SRIOV_VF_TYPES_H_
>
> +#include <linux/rwsem.h>
> #include <linux/types.h>
> #include <linux/workqueue.h>
> #include "xe_uc_fw_types.h"
> @@ -14,12 +15,6 @@
> * struct xe_gt_sriov_vf_selfconfig - VF configuration data.
> */
> struct xe_gt_sriov_vf_selfconfig {
> - /** @ggtt_base: assigned base offset of the GGTT region. */
> - u64 ggtt_base;
> - /** @ggtt_size: assigned size of the GGTT region. */
> - u64 ggtt_size;
maybe we can keep GGTT base/size at the GT level, as this is still
a valid data that we get from the GuC, and the base/size at the
Tile-level would be just what we actually use/setup?
in theory both (or rather all 3 is some cases) should be always the same,
but you never know ...
> - /** @ggtt_shift: difference in ggtt_base on last migration */
> - s64 ggtt_shift;
> /** @lmem_size: assigned size of the LMEM. */
> u64 lmem_size;
and this one should then either be removed or keep it like proposed above
> /** @num_ctxs: assigned number of GuC submission context IDs. */
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index d5adbbb013ec..c016a11b6ab1 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -713,7 +713,7 @@ static int vf_guc_init_noalloc(struct xe_guc *guc)
> if (err)
> return err;
>
> - err = xe_gt_sriov_vf_query_config(gt);
> + err = xe_gt_sriov_vf_query_config(gt, false);
> if (err)
> return err;
>
> diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> index f221dbed16f0..074981e2ef07 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> @@ -9,7 +9,6 @@
>
> #include "xe_assert.h"
> #include "xe_ggtt.h"
> -#include "xe_gt_sriov_vf.h"
> #include "xe_sriov.h"
> #include "xe_sriov_printk.h"
> #include "xe_tile_sriov_vf.h"
> @@ -40,10 +39,10 @@ static int vf_init_ggtt_balloons(struct xe_tile *tile)
> *
> * Return: 0 on success or a negative error code on failure.
> */
> -int xe_tile_sriov_vf_balloon_ggtt_locked(struct xe_tile *tile)
> +static int xe_tile_sriov_vf_balloon_ggtt_locked(struct xe_tile *tile)
nit: if it's static then no need for "xe_tile_sriov" prefix
vf_balloon_ggtt_locked()
> {
> - u64 ggtt_base = xe_gt_sriov_vf_ggtt_base(tile->primary_gt);
> - u64 ggtt_size = xe_gt_sriov_vf_ggtt(tile->primary_gt);
> + u64 ggtt_base = tile->sriov.vf.self_config.ggtt_base;
> + u64 ggtt_size = tile->sriov.vf.self_config.ggtt_size;
> struct xe_device *xe = tile_to_xe(tile);
> u64 wopcm = xe_wopcm_size(xe);
> u64 start, end;
> @@ -244,11 +243,30 @@ void xe_tile_sriov_vf_fixup_ggtt_nodes(struct xe_tile *tile, s64 shift)
> {
> struct xe_ggtt *ggtt = tile->mem.ggtt;
>
> - mutex_lock(&ggtt->lock);
> + lockdep_assert_held(&ggtt->lock);
>
> xe_tile_sriov_vf_deballoon_ggtt_locked(tile);
> xe_ggtt_shift_nodes_locked(ggtt, shift);
> xe_tile_sriov_vf_balloon_ggtt_locked(tile);
> +}
>
> - mutex_unlock(&ggtt->lock);
> +/**
> + * xe_tile_sriov_vf_lmem - VF LMEM configuration.
> + * @tile: the &xe_tile
> + *
> + * This function is for VF use only.
> + *
> + * Return: size of the LMEM assigned to VF.
> + */
> +u64 xe_tile_sriov_vf_lmem(struct xe_tile *tile)
> +{
> + struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
> + u64 val;
> +
> + xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> +
drop this sep line
> + xe_tile_assert(tile, config->lmem_size);
or rather move it here
> + val = config->lmem_size;
> +
> + return val;
> }
> diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> index 93eb043171e8..54e7f2a5c4e4 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> @@ -11,8 +11,8 @@
> struct xe_tile;
>
> int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile);
> -int xe_tile_sriov_vf_balloon_ggtt_locked(struct xe_tile *tile);
> void xe_tile_sriov_vf_deballoon_ggtt_locked(struct xe_tile *tile);
> void xe_tile_sriov_vf_fixup_ggtt_nodes(struct xe_tile *tile, s64 shift);
> +u64 xe_tile_sriov_vf_lmem(struct xe_tile *tile);
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> new file mode 100644
> index 000000000000..140717f81d8f
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> @@ -0,0 +1,23 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef _XE_TILE_SRIOV_VF_TYPES_H_
> +#define _XE_TILE_SRIOV_VF_TYPES_H_
> +
> +#include <linux/mutex.h>
not needed
> +
> +/**
> + * struct xe_tile_sriov_vf_selfconfig - VF configuration data.
> + */
> +struct xe_tile_sriov_vf_selfconfig {
> + /** @ggtt_base: assigned base offset of the GGTT region. */
> + u64 ggtt_base;
> + /** @ggtt_size: assigned size of the GGTT region. */
> + u64 ggtt_size;
> + /** @lmem_size: assigned size of the LMEM. */
> + u64 lmem_size;
> +};
> +
> +#endif
> diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c
> index b44ebf50fedb..bc471e3dd494 100644
> --- a/drivers/gpu/drm/xe/xe_vram.c
> +++ b/drivers/gpu/drm/xe/xe_vram.c
> @@ -16,10 +16,10 @@
> #include "xe_device.h"
> #include "xe_force_wake.h"
> #include "xe_gt_mcr.h"
> -#include "xe_gt_sriov_vf.h"
> #include "xe_mmio.h"
> #include "xe_module.h"
> #include "xe_sriov.h"
> +#include "xe_tile_sriov_vf.h"
> #include "xe_ttm_vram_mgr.h"
> #include "xe_vram.h"
> #include "xe_vram_types.h"
> @@ -237,9 +237,9 @@ static int tile_vram_size(struct xe_tile *tile, u64 *vram_size,
> offset = 0;
> for_each_tile(t, xe, id)
> for_each_if(t->id < tile->id)
> - offset += xe_gt_sriov_vf_lmem(t->primary_gt);
> + offset += xe_tile_sriov_vf_lmem(t);
>
> - *tile_size = xe_gt_sriov_vf_lmem(gt);
> + *tile_size = xe_tile_sriov_vf_lmem(tile);
> *vram_size = *tile_size;
> *tile_offset = offset;
>
next prev parent reply other threads:[~2025-10-03 14:24 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-02 5:53 [PATCH v4 00/34] VF migration redesign Matthew Brost
2025-10-02 5:53 ` [PATCH v4 01/34] drm/xe: Add NULL checks to scratch LRC allocation Matthew Brost
2025-10-02 22:02 ` Lis, Tomasz
2025-10-02 5:53 ` [PATCH v4 02/34] Revert "drm/xe/vf: Rebase exec queue parallel commands during migration recovery" Matthew Brost
2025-10-02 5:53 ` [PATCH v4 03/34] Revert "drm/xe/vf: Post migration, repopulate ring area for pending request" Matthew Brost
2025-10-02 5:53 ` [PATCH v4 04/34] Revert "drm/xe/vf: Fixup CTB send buffer messages after migration" Matthew Brost
2025-10-02 5:53 ` [PATCH v4 05/34] drm/xe: Save off position in ring in which a job was programmed Matthew Brost
2025-10-02 5:53 ` [PATCH v4 06/34] drm/xe/guc: Track pending-enable source in submission state Matthew Brost
2025-10-02 5:53 ` [PATCH v4 07/34] drm/xe: Track LR jobs in DRM scheduler pending list Matthew Brost
2025-10-02 16:14 ` Matthew Auld
2025-10-05 5:21 ` Matthew Brost
2025-10-02 5:53 ` [PATCH v4 08/34] drm/xe: Don't change LRC ring head on job resubmission Matthew Brost
2025-10-02 14:15 ` Matthew Auld
2025-10-05 5:25 ` Matthew Brost
2025-10-05 6:53 ` Matthew Brost
2025-10-06 8:59 ` Matthew Auld
2025-10-02 5:53 ` [PATCH v4 09/34] drm/xe: Make LRC W/A scratch buffer usage consistent Matthew Brost
2025-10-02 5:53 ` [PATCH v4 10/34] drm/xe/guc: Document GuC submission backend Matthew Brost
2025-10-03 14:30 ` Lis, Tomasz
2025-10-02 5:53 ` [PATCH v4 11/34] drm/xe/vf: Add xe_gt_recovery_inprogress helper Matthew Brost
2025-10-03 1:39 ` Lis, Tomasz
2025-10-04 4:32 ` Matthew Brost
2025-10-03 8:40 ` Michal Wajdeczko
2025-10-04 4:32 ` Matthew Brost
2025-10-02 5:53 ` [PATCH v4 12/34] drm/xe/vf: Make VF recovery run on per-GT worker Matthew Brost
2025-10-02 5:53 ` [PATCH v4 13/34] drm/xe/vf: Abort H2G sends during VF post-migration recovery Matthew Brost
2025-10-02 5:53 ` [PATCH v4 14/34] drm/xe/vf: Remove memory allocations from VF post migration recovery Matthew Brost
2025-10-02 5:53 ` [PATCH v4 15/34] drm/xe/vf: Close multi-GT GGTT shift race Matthew Brost
2025-10-03 14:24 ` Michal Wajdeczko [this message]
2025-10-04 4:36 ` Matthew Brost
2025-10-02 5:53 ` [PATCH v4 16/34] drm/xe/vf: Teardown VF post migration worker on driver unload Matthew Brost
2025-10-02 5:53 ` [PATCH v4 17/34] drm/xe/vf: Don't allow GT reset to be queued during VF post migration recovery Matthew Brost
2025-10-03 16:09 ` Lis, Tomasz
2025-10-02 5:53 ` [PATCH v4 18/34] drm/xe/vf: Wakeup in GuC backend on " Matthew Brost
2025-10-03 14:38 ` Michal Wajdeczko
2025-10-05 6:22 ` Matthew Brost
2025-10-05 6:35 ` Matthew Brost
2025-10-02 5:53 ` [PATCH v4 19/34] drm/xe/vf: Avoid indefinite blocking in preempt rebind worker for VFs supporting migration Matthew Brost
2025-10-02 5:53 ` [PATCH v4 20/34] drm/xe/vf: Use GUC_HXG_TYPE_EVENT for GuC context register Matthew Brost
2025-10-03 14:26 ` Lis, Tomasz
2025-10-05 5:43 ` Matthew Brost
2025-10-03 14:57 ` Michal Wajdeczko
2025-10-02 5:53 ` [PATCH v4 21/34] drm/xe/vf: Flush and stop CTs in VF post migration recovery Matthew Brost
2025-10-02 5:53 ` [PATCH v4 22/34] drm/xe/vf: Reset TLB invalidations during " Matthew Brost
2025-10-02 5:53 ` [PATCH v4 23/34] drm/xe/vf: Kickstart after resfix in " Matthew Brost
2025-10-02 5:53 ` [PATCH v4 24/34] drm/xe/vf: Start CTs before resfix " Matthew Brost
2025-10-02 21:50 ` Lis, Tomasz
2025-10-03 15:10 ` Michal Wajdeczko
2025-10-05 6:49 ` Matthew Brost
2025-10-05 12:28 ` Michal Wajdeczko
2025-10-02 5:53 ` [PATCH v4 25/34] drm/xe/vf: Abort VF post migration recovery on failure Matthew Brost
2025-10-02 5:53 ` [PATCH v4 26/34] drm/xe/vf: Replay GuC submission state on pause / unpause Matthew Brost
2025-10-02 5:53 ` [PATCH v4 27/34] drm/xe: Move queue init before LRC creation Matthew Brost
2025-10-03 13:25 ` Lis, Tomasz
2025-10-05 8:03 ` Matthew Brost
2025-10-02 5:53 ` [PATCH v4 28/34] drm/xe/vf: Add debug prints for GuC replaying state during VF recovery Matthew Brost
2025-10-03 13:08 ` Lis, Tomasz
2025-10-02 5:53 ` [PATCH v4 29/34] drm/xe/vf: Workaround for race condition in GuC firmware during VF pause Matthew Brost
2025-10-03 13:06 ` Lis, Tomasz
2025-10-02 5:53 ` [PATCH v4 30/34] drm/xe: Use PPGTT addresses for TLB invalidation to avoid GGTT fixups Matthew Brost
2025-10-02 5:53 ` [PATCH v4 31/34] drm/xe/vf: Use primary GT ordered work queue on media GT on PTL VF Matthew Brost
2025-10-02 21:00 ` Lis, Tomasz
2025-10-05 7:03 ` Matthew Brost
2025-10-02 5:54 ` [PATCH v4 32/34] drm/xe/vf: Ensure media GT VF recovery runs after primary GT on PTL Matthew Brost
2025-10-02 20:19 ` Lis, Tomasz
2025-10-02 5:54 ` [PATCH v4 33/34] drm/xe/vf: Rebase CCS save/restore BB GGTT addresses Matthew Brost
2025-10-02 5:54 ` [PATCH v4 34/34] drm/xe/guc: Increase wait timeout to 2sec after BUSY reply from GuC Matthew Brost
2025-10-02 6:45 ` ✗ CI.checkpatch: warning for VF migration redesign (rev4) Patchwork
2025-10-02 6:47 ` ✓ CI.KUnit: success " Patchwork
2025-10-02 7:33 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-10-02 9:19 ` ✗ Xe.CI.Full: " Patchwork
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