* [PATCH 1/2] drm/xe: Fix error handling if PXP fails to start
@ 2025-08-18 23:46 Daniele Ceraolo Spurio
2025-08-18 23:46 ` [PATCH 2/2] drm/xe: Allow error injection for xe_pxp_exec_queue_add Daniele Ceraolo Spurio
` (5 more replies)
0 siblings, 6 replies; 11+ messages in thread
From: Daniele Ceraolo Spurio @ 2025-08-18 23:46 UTC (permalink / raw)
To: intel-xe; +Cc: Daniele Ceraolo Spurio, John Harrison, Matthew Brost
Since the PXP start comes after __xe_exec_queue_init() has completed,
we need to cleanup what was done in that function in case of a PXP
start error.
__xe_exec_queue_init calls the submission backend init() function,
so we need to introduce an opposite for that. Unfortunately, while
we already have a fini() function pointer, it is does perform other
operations in addition to cleaning up what was done by the init().
Therefore, for clarity, the existing fini() has been renamed to
destroy(), while a new fini() has been added to only clean up what was
done by the init(), with the latter being called by the former (via
xe_exec_queue_fini).
Fixes: 72d479601d67 ("drm/xe/pxp/uapi: Add userspace and LRC support for PXP-using queues")
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_exec_queue.c | 24 ++++++---
drivers/gpu/drm/xe/xe_exec_queue_types.h | 8 ++-
drivers/gpu/drm/xe/xe_execlist.c | 25 ++++++----
drivers/gpu/drm/xe/xe_execlist_types.h | 2 +-
drivers/gpu/drm/xe/xe_guc_exec_queue_types.h | 4 +-
drivers/gpu/drm/xe/xe_guc_submit.c | 52 ++++++++++++--------
6 files changed, 74 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 2d10a53f701d..bce507c49517 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -199,6 +199,18 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q)
return err;
}
+static void __xe_exec_queue_fini(struct xe_exec_queue *q)
+{
+ int i;
+
+ q->ops->fini(q);
+
+ for (i = 0; i < q->width; ++i)
+ xe_lrc_put(q->lrc[i]);
+
+ return;
+}
+
struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
u32 logical_mask, u16 width,
struct xe_hw_engine *hwe, u32 flags,
@@ -229,11 +241,13 @@ struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *v
if (xe_exec_queue_uses_pxp(q)) {
err = xe_pxp_exec_queue_add(xe->pxp, q);
if (err)
- goto err_post_alloc;
+ goto err_post_init;
}
return q;
+err_post_init:
+ __xe_exec_queue_fini(q);
err_post_alloc:
__xe_exec_queue_free(q);
return ERR_PTR(err);
@@ -331,13 +345,11 @@ void xe_exec_queue_destroy(struct kref *ref)
xe_exec_queue_put(eq);
}
- q->ops->fini(q);
+ q->ops->destroy(q);
}
void xe_exec_queue_fini(struct xe_exec_queue *q)
{
- int i;
-
/*
* Before releasing our ref to lrc and xef, accumulate our run ticks
* and wakeup any waiters.
@@ -346,9 +358,7 @@ void xe_exec_queue_fini(struct xe_exec_queue *q)
if (q->xef && atomic_dec_and_test(&q->xef->exec_queue.pending_removal))
wake_up_var(&q->xef->exec_queue.pending_removal);
- for (i = 0; i < q->width; ++i)
- xe_lrc_put(q->lrc[i]);
-
+ __xe_exec_queue_fini(q);
__xe_exec_queue_free(q);
}
diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index ba443a497b38..27b76cf9da89 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -181,8 +181,14 @@ struct xe_exec_queue_ops {
int (*init)(struct xe_exec_queue *q);
/** @kill: Kill inflight submissions for backend */
void (*kill)(struct xe_exec_queue *q);
- /** @fini: Fini exec queue for submission backend */
+ /** @fini: Undoes the init() for submission backend */
void (*fini)(struct xe_exec_queue *q);
+ /**
+ * @destroy: Destroy exec queue for submission backend. The backend
+ * function must call xe_exec_queue_fini() (which will in turn call the
+ * fini() backend function) to ensure the queue is properly cleaned up.
+ */
+ void (*destroy)(struct xe_exec_queue *q);
/** @set_priority: Set priority for exec queue */
int (*set_priority)(struct xe_exec_queue *q,
enum xe_exec_queue_priority priority);
diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execlist.c
index 788f56b066b6..f83d421ac9d3 100644
--- a/drivers/gpu/drm/xe/xe_execlist.c
+++ b/drivers/gpu/drm/xe/xe_execlist.c
@@ -385,10 +385,20 @@ static int execlist_exec_queue_init(struct xe_exec_queue *q)
return err;
}
-static void execlist_exec_queue_fini_async(struct work_struct *w)
+static void execlist_exec_queue_fini(struct xe_exec_queue *q)
+{
+ struct xe_execlist_exec_queue *exl = q->execlist;
+
+ drm_sched_entity_fini(&exl->entity);
+ drm_sched_fini(&exl->sched);
+
+ kfree(exl);
+}
+
+static void execlist_exec_queue_destroy_async(struct work_struct *w)
{
struct xe_execlist_exec_queue *ee =
- container_of(w, struct xe_execlist_exec_queue, fini_async);
+ container_of(w, struct xe_execlist_exec_queue, destroy_async);
struct xe_exec_queue *q = ee->q;
struct xe_execlist_exec_queue *exl = q->execlist;
struct xe_device *xe = gt_to_xe(q->gt);
@@ -401,10 +411,6 @@ static void execlist_exec_queue_fini_async(struct work_struct *w)
list_del(&exl->active_link);
spin_unlock_irqrestore(&exl->port->lock, flags);
- drm_sched_entity_fini(&exl->entity);
- drm_sched_fini(&exl->sched);
- kfree(exl);
-
xe_exec_queue_fini(q);
}
@@ -413,10 +419,10 @@ static void execlist_exec_queue_kill(struct xe_exec_queue *q)
/* NIY */
}
-static void execlist_exec_queue_fini(struct xe_exec_queue *q)
+static void execlist_exec_queue_destroy(struct xe_exec_queue *q)
{
- INIT_WORK(&q->execlist->fini_async, execlist_exec_queue_fini_async);
- queue_work(system_unbound_wq, &q->execlist->fini_async);
+ INIT_WORK(&q->execlist->destroy_async, execlist_exec_queue_destroy_async);
+ queue_work(system_unbound_wq, &q->execlist->destroy_async);
}
static int execlist_exec_queue_set_priority(struct xe_exec_queue *q,
@@ -467,6 +473,7 @@ static const struct xe_exec_queue_ops execlist_exec_queue_ops = {
.init = execlist_exec_queue_init,
.kill = execlist_exec_queue_kill,
.fini = execlist_exec_queue_fini,
+ .destroy = execlist_exec_queue_destroy,
.set_priority = execlist_exec_queue_set_priority,
.set_timeslice = execlist_exec_queue_set_timeslice,
.set_preempt_timeout = execlist_exec_queue_set_preempt_timeout,
diff --git a/drivers/gpu/drm/xe/xe_execlist_types.h b/drivers/gpu/drm/xe/xe_execlist_types.h
index 415140936f11..92c4ba52db0c 100644
--- a/drivers/gpu/drm/xe/xe_execlist_types.h
+++ b/drivers/gpu/drm/xe/xe_execlist_types.h
@@ -42,7 +42,7 @@ struct xe_execlist_exec_queue {
bool has_run;
- struct work_struct fini_async;
+ struct work_struct destroy_async;
enum xe_exec_queue_priority active_priority;
struct list_head active_link;
diff --git a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
index a3f421e2adc0..c30c0e3ccbbb 100644
--- a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
@@ -35,8 +35,8 @@ struct xe_guc_exec_queue {
struct xe_sched_msg static_msgs[MAX_STATIC_MSG_TYPE];
/** @lr_tdr: long running TDR worker */
struct work_struct lr_tdr;
- /** @fini_async: do final fini async from this worker */
- struct work_struct fini_async;
+ /** @destroy_async: do final destroy async from this worker */
+ struct work_struct destroy_async;
/** @resume_time: time of last resume */
u64 resume_time;
/** @state: GuC specific state for this xe_exec_queue */
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 860c07da598a..75208ea4d408 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1418,48 +1418,57 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
return DRM_GPU_SCHED_STAT_NO_HANG;
}
-static void __guc_exec_queue_fini_async(struct work_struct *w)
+static void guc_exec_queue_fini(struct xe_exec_queue *q)
+{
+ struct xe_guc_exec_queue *ge = q->guc;
+ struct xe_guc *guc = exec_queue_to_guc(q);
+
+ release_guc_id(guc, q);
+ xe_sched_entity_fini(&ge->entity);
+ xe_sched_fini(&ge->sched);
+
+ /*
+ * RCU free due sched being exported via DRM scheduler fences
+ * (timeline name).
+ */
+ kfree_rcu(ge, rcu);
+}
+
+static void __guc_exec_queue_destroy_async(struct work_struct *w)
{
struct xe_guc_exec_queue *ge =
- container_of(w, struct xe_guc_exec_queue, fini_async);
+ container_of(w, struct xe_guc_exec_queue, destroy_async);
struct xe_exec_queue *q = ge->q;
struct xe_guc *guc = exec_queue_to_guc(q);
xe_pm_runtime_get(guc_to_xe(guc));
trace_xe_exec_queue_destroy(q);
- release_guc_id(guc, q);
if (xe_exec_queue_is_lr(q))
cancel_work_sync(&ge->lr_tdr);
/* Confirm no work left behind accessing device structures */
cancel_delayed_work_sync(&ge->sched.base.work_tdr);
- xe_sched_entity_fini(&ge->entity);
- xe_sched_fini(&ge->sched);
- /*
- * RCU free due sched being exported via DRM scheduler fences
- * (timeline name).
- */
- kfree_rcu(ge, rcu);
xe_exec_queue_fini(q);
+
xe_pm_runtime_put(guc_to_xe(guc));
}
-static void guc_exec_queue_fini_async(struct xe_exec_queue *q)
+static void guc_exec_queue_destroy_async(struct xe_exec_queue *q)
{
struct xe_guc *guc = exec_queue_to_guc(q);
struct xe_device *xe = guc_to_xe(guc);
- INIT_WORK(&q->guc->fini_async, __guc_exec_queue_fini_async);
+ INIT_WORK(&q->guc->destroy_async, __guc_exec_queue_destroy_async);
/* We must block on kernel engines so slabs are empty on driver unload */
if (q->flags & EXEC_QUEUE_FLAG_PERMANENT || exec_queue_wedged(q))
- __guc_exec_queue_fini_async(&q->guc->fini_async);
+ __guc_exec_queue_destroy_async(&q->guc->destroy_async);
else
- queue_work(xe->destroy_wq, &q->guc->fini_async);
+ queue_work(xe->destroy_wq, &q->guc->destroy_async);
}
-static void __guc_exec_queue_fini(struct xe_guc *guc, struct xe_exec_queue *q)
+static void __guc_exec_queue_destroy(struct xe_guc *guc, struct xe_exec_queue *q)
{
/*
* Might be done from within the GPU scheduler, need to do async as we
@@ -1468,7 +1477,7 @@ static void __guc_exec_queue_fini(struct xe_guc *guc, struct xe_exec_queue *q)
* this we and don't really care when everything is fini'd, just that it
* is.
*/
- guc_exec_queue_fini_async(q);
+ guc_exec_queue_destroy_async(q);
}
static void __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg)
@@ -1482,7 +1491,7 @@ static void __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg)
if (exec_queue_registered(q))
disable_scheduling_deregister(guc, q);
else
- __guc_exec_queue_fini(guc, q);
+ __guc_exec_queue_destroy(guc, q);
}
static bool guc_exec_queue_allowed_to_change_state(struct xe_exec_queue *q)
@@ -1715,14 +1724,14 @@ static bool guc_exec_queue_try_add_msg(struct xe_exec_queue *q,
#define STATIC_MSG_CLEANUP 0
#define STATIC_MSG_SUSPEND 1
#define STATIC_MSG_RESUME 2
-static void guc_exec_queue_fini(struct xe_exec_queue *q)
+static void guc_exec_queue_destroy(struct xe_exec_queue *q)
{
struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_CLEANUP;
if (!(q->flags & EXEC_QUEUE_FLAG_PERMANENT) && !exec_queue_wedged(q))
guc_exec_queue_add_msg(q, msg, CLEANUP);
else
- __guc_exec_queue_fini(exec_queue_to_guc(q), q);
+ __guc_exec_queue_destroy(exec_queue_to_guc(q), q);
}
static int guc_exec_queue_set_priority(struct xe_exec_queue *q,
@@ -1852,6 +1861,7 @@ static const struct xe_exec_queue_ops guc_exec_queue_ops = {
.init = guc_exec_queue_init,
.kill = guc_exec_queue_kill,
.fini = guc_exec_queue_fini,
+ .destroy = guc_exec_queue_destroy,
.set_priority = guc_exec_queue_set_priority,
.set_timeslice = guc_exec_queue_set_timeslice,
.set_preempt_timeout = guc_exec_queue_set_preempt_timeout,
@@ -1873,7 +1883,7 @@ static void guc_exec_queue_stop(struct xe_guc *guc, struct xe_exec_queue *q)
if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
xe_exec_queue_put(q);
else if (exec_queue_destroyed(q))
- __guc_exec_queue_fini(guc, q);
+ __guc_exec_queue_destroy(guc, q);
}
if (q->guc->suspend_pending) {
set_exec_queue_suspended(q);
@@ -2202,7 +2212,7 @@ static void handle_deregister_done(struct xe_guc *guc, struct xe_exec_queue *q)
if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
xe_exec_queue_put(q);
else
- __guc_exec_queue_fini(guc, q);
+ __guc_exec_queue_destroy(guc, q);
}
int xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/2] drm/xe: Allow error injection for xe_pxp_exec_queue_add
2025-08-18 23:46 [PATCH 1/2] drm/xe: Fix error handling if PXP fails to start Daniele Ceraolo Spurio
@ 2025-08-18 23:46 ` Daniele Ceraolo Spurio
2025-09-04 20:46 ` John Harrison
2025-08-19 0:18 ` ✗ CI.checkpatch: warning for series starting with [1/2] drm/xe: Fix error handling if PXP fails to start Patchwork
` (4 subsequent siblings)
5 siblings, 1 reply; 11+ messages in thread
From: Daniele Ceraolo Spurio @ 2025-08-18 23:46 UTC (permalink / raw)
To: intel-xe; +Cc: Daniele Ceraolo Spurio, John Harrison
This will allow us to simulate this function returning an error like
we do for other functions called in the exec_queue_create path.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/xe/xe_pxp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/xe_pxp.c b/drivers/gpu/drm/xe/xe_pxp.c
index 3d62008c99f1..bdbdbbf6a678 100644
--- a/drivers/gpu/drm/xe/xe_pxp.c
+++ b/drivers/gpu/drm/xe/xe_pxp.c
@@ -688,6 +688,7 @@ int xe_pxp_exec_queue_add(struct xe_pxp *pxp, struct xe_exec_queue *q)
return ret;
}
+ALLOW_ERROR_INJECTION(xe_pxp_exec_queue_add, ERRNO);
static void __pxp_exec_queue_remove(struct xe_pxp *pxp, struct xe_exec_queue *q, bool lock)
{
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* ✗ CI.checkpatch: warning for series starting with [1/2] drm/xe: Fix error handling if PXP fails to start
2025-08-18 23:46 [PATCH 1/2] drm/xe: Fix error handling if PXP fails to start Daniele Ceraolo Spurio
2025-08-18 23:46 ` [PATCH 2/2] drm/xe: Allow error injection for xe_pxp_exec_queue_add Daniele Ceraolo Spurio
@ 2025-08-19 0:18 ` Patchwork
2025-08-19 0:19 ` ✓ CI.KUnit: success " Patchwork
` (3 subsequent siblings)
5 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2025-08-19 0:18 UTC (permalink / raw)
To: Daniele Ceraolo Spurio; +Cc: intel-xe
== Series Details ==
Series: series starting with [1/2] drm/xe: Fix error handling if PXP fails to start
URL : https://patchwork.freedesktop.org/series/153095/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
553439844b6500767ce8aef522cfe9fbb7ece541
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 00dc4fda6ccb0d149d5bd0163b7e2207a759fde0
Author: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Date: Mon Aug 18 16:46:41 2025 -0700
drm/xe: Allow error injection for xe_pxp_exec_queue_add
This will allow us to simulate this function returning an error like
we do for other functions called in the exec_queue_create path.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
+ /mt/dim checkpatch c3cf4289245819615518b536cd16ebe6612694f9 drm-intel
a1e66aeb9865 drm/xe: Fix error handling if PXP fails to start
-:41: WARNING:RETURN_VOID: void function return statements are not generally useful
#41: FILE: drivers/gpu/drm/xe/xe_exec_queue.c:212:
+ return;
+}
total: 0 errors, 1 warnings, 0 checks, 268 lines checked
00dc4fda6ccb drm/xe: Allow error injection for xe_pxp_exec_queue_add
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ CI.KUnit: success for series starting with [1/2] drm/xe: Fix error handling if PXP fails to start
2025-08-18 23:46 [PATCH 1/2] drm/xe: Fix error handling if PXP fails to start Daniele Ceraolo Spurio
2025-08-18 23:46 ` [PATCH 2/2] drm/xe: Allow error injection for xe_pxp_exec_queue_add Daniele Ceraolo Spurio
2025-08-19 0:18 ` ✗ CI.checkpatch: warning for series starting with [1/2] drm/xe: Fix error handling if PXP fails to start Patchwork
@ 2025-08-19 0:19 ` Patchwork
2025-08-19 0:52 ` ✓ Xe.CI.BAT: " Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2025-08-19 0:19 UTC (permalink / raw)
To: Daniele Ceraolo Spurio; +Cc: intel-xe
== Series Details ==
Series: series starting with [1/2] drm/xe: Fix error handling if PXP fails to start
URL : https://patchwork.freedesktop.org/series/153095/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[00:18:06] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:18:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:18:39] Starting KUnit Kernel (1/1)...
[00:18:39] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:18:39] ================== guc_buf (11 subtests) ===================
[00:18:39] [PASSED] test_smallest
[00:18:39] [PASSED] test_largest
[00:18:39] [PASSED] test_granular
[00:18:39] [PASSED] test_unique
[00:18:39] [PASSED] test_overlap
[00:18:39] [PASSED] test_reusable
[00:18:39] [PASSED] test_too_big
[00:18:39] [PASSED] test_flush
[00:18:39] [PASSED] test_lookup
[00:18:39] [PASSED] test_data
[00:18:39] [PASSED] test_class
[00:18:39] ===================== [PASSED] guc_buf =====================
[00:18:39] =================== guc_dbm (7 subtests) ===================
[00:18:39] [PASSED] test_empty
[00:18:39] [PASSED] test_default
[00:18:39] ======================== test_size ========================
[00:18:39] [PASSED] 4
[00:18:39] [PASSED] 8
[00:18:39] [PASSED] 32
[00:18:39] [PASSED] 256
[00:18:39] ==================== [PASSED] test_size ====================
[00:18:39] ======================= test_reuse ========================
[00:18:39] [PASSED] 4
[00:18:39] [PASSED] 8
[00:18:39] [PASSED] 32
[00:18:39] [PASSED] 256
[00:18:39] =================== [PASSED] test_reuse ====================
[00:18:39] =================== test_range_overlap ====================
[00:18:39] [PASSED] 4
[00:18:39] [PASSED] 8
[00:18:39] [PASSED] 32
[00:18:39] [PASSED] 256
[00:18:39] =============== [PASSED] test_range_overlap ================
[00:18:39] =================== test_range_compact ====================
[00:18:39] [PASSED] 4
[00:18:39] [PASSED] 8
[00:18:39] [PASSED] 32
[00:18:39] [PASSED] 256
[00:18:39] =============== [PASSED] test_range_compact ================
[00:18:39] ==================== test_range_spare =====================
[00:18:39] [PASSED] 4
[00:18:39] [PASSED] 8
[00:18:39] [PASSED] 32
[00:18:39] [PASSED] 256
[00:18:39] ================ [PASSED] test_range_spare =================
[00:18:39] ===================== [PASSED] guc_dbm =====================
[00:18:39] =================== guc_idm (6 subtests) ===================
[00:18:39] [PASSED] bad_init
[00:18:39] [PASSED] no_init
[00:18:39] [PASSED] init_fini
[00:18:39] [PASSED] check_used
[00:18:39] [PASSED] check_quota
[00:18:39] [PASSED] check_all
[00:18:39] ===================== [PASSED] guc_idm =====================
[00:18:39] ================== no_relay (3 subtests) ===================
[00:18:39] [PASSED] xe_drops_guc2pf_if_not_ready
[00:18:39] [PASSED] xe_drops_guc2vf_if_not_ready
[00:18:39] [PASSED] xe_rejects_send_if_not_ready
[00:18:39] ==================== [PASSED] no_relay =====================
[00:18:39] ================== pf_relay (14 subtests) ==================
[00:18:39] [PASSED] pf_rejects_guc2pf_too_short
[00:18:39] [PASSED] pf_rejects_guc2pf_too_long
[00:18:39] [PASSED] pf_rejects_guc2pf_no_payload
[00:18:39] [PASSED] pf_fails_no_payload
[00:18:39] [PASSED] pf_fails_bad_origin
[00:18:39] [PASSED] pf_fails_bad_type
[00:18:39] [PASSED] pf_txn_reports_error
[00:18:39] [PASSED] pf_txn_sends_pf2guc
[00:18:39] [PASSED] pf_sends_pf2guc
[00:18:39] [SKIPPED] pf_loopback_nop
[00:18:39] [SKIPPED] pf_loopback_echo
[00:18:39] [SKIPPED] pf_loopback_fail
[00:18:39] [SKIPPED] pf_loopback_busy
[00:18:39] [SKIPPED] pf_loopback_retry
[00:18:39] ==================== [PASSED] pf_relay =====================
[00:18:39] ================== vf_relay (3 subtests) ===================
[00:18:39] [PASSED] vf_rejects_guc2vf_too_short
[00:18:39] [PASSED] vf_rejects_guc2vf_too_long
[00:18:39] [PASSED] vf_rejects_guc2vf_no_payload
[00:18:39] ==================== [PASSED] vf_relay =====================
[00:18:39] ===================== lmtt (1 subtest) =====================
[00:18:39] ======================== test_ops =========================
[00:18:39] [PASSED] 2-level
[00:18:39] [PASSED] multi-level
[00:18:39] ==================== [PASSED] test_ops =====================
[00:18:39] ====================== [PASSED] lmtt =======================
[00:18:39] ================= pf_service (11 subtests) =================
[00:18:39] [PASSED] pf_negotiate_any
[00:18:39] [PASSED] pf_negotiate_base_match
[00:18:39] [PASSED] pf_negotiate_base_newer
[00:18:39] [PASSED] pf_negotiate_base_next
[00:18:39] [SKIPPED] pf_negotiate_base_older
[00:18:39] [PASSED] pf_negotiate_base_prev
[00:18:39] [PASSED] pf_negotiate_latest_match
[00:18:39] [PASSED] pf_negotiate_latest_newer
[00:18:39] [PASSED] pf_negotiate_latest_next
[00:18:39] [SKIPPED] pf_negotiate_latest_older
[00:18:39] [SKIPPED] pf_negotiate_latest_prev
[00:18:39] =================== [PASSED] pf_service ====================
[00:18:39] =================== xe_mocs (2 subtests) ===================
[00:18:39] ================ xe_live_mocs_kernel_kunit ================
[00:18:39] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[00:18:39] ================ xe_live_mocs_reset_kunit =================
[00:18:39] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[00:18:39] ==================== [SKIPPED] xe_mocs =====================
[00:18:39] ================= xe_migrate (2 subtests) ==================
[00:18:39] ================= xe_migrate_sanity_kunit =================
[00:18:39] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[00:18:39] ================== xe_validate_ccs_kunit ==================
[00:18:39] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[00:18:39] =================== [SKIPPED] xe_migrate ===================
[00:18:39] ================== xe_dma_buf (1 subtest) ==================
[00:18:39] ==================== xe_dma_buf_kunit =====================
[00:18:39] ================ [SKIPPED] xe_dma_buf_kunit ================
[00:18:39] =================== [SKIPPED] xe_dma_buf ===================
[00:18:39] ================= xe_bo_shrink (1 subtest) =================
[00:18:39] =================== xe_bo_shrink_kunit ====================
[00:18:39] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[00:18:39] ================== [SKIPPED] xe_bo_shrink ==================
[00:18:39] ==================== xe_bo (2 subtests) ====================
[00:18:39] ================== xe_ccs_migrate_kunit ===================
[00:18:39] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[00:18:39] ==================== xe_bo_evict_kunit ====================
[00:18:39] =============== [SKIPPED] xe_bo_evict_kunit ================
[00:18:39] ===================== [SKIPPED] xe_bo ======================
[00:18:39] ==================== args (11 subtests) ====================
[00:18:39] [PASSED] count_args_test
[00:18:39] [PASSED] call_args_example
[00:18:39] [PASSED] call_args_test
[00:18:39] [PASSED] drop_first_arg_example
[00:18:39] [PASSED] drop_first_arg_test
[00:18:39] [PASSED] first_arg_example
[00:18:39] [PASSED] first_arg_test
[00:18:39] [PASSED] last_arg_example
[00:18:39] [PASSED] last_arg_test
[00:18:39] [PASSED] pick_arg_example
[00:18:39] [PASSED] sep_comma_example
[00:18:39] ====================== [PASSED] args =======================
[00:18:39] =================== xe_pci (3 subtests) ====================
[00:18:39] ==================== check_graphics_ip ====================
[00:18:39] [PASSED] 12.70 Xe_LPG
[00:18:39] [PASSED] 12.71 Xe_LPG
[00:18:39] [PASSED] 12.74 Xe_LPG+
[00:18:39] [PASSED] 20.01 Xe2_HPG
[00:18:39] [PASSED] 20.02 Xe2_HPG
[00:18:39] [PASSED] 20.04 Xe2_LPG
[00:18:39] [PASSED] 30.00 Xe3_LPG
[00:18:39] [PASSED] 30.01 Xe3_LPG
[00:18:39] [PASSED] 30.03 Xe3_LPG
[00:18:39] ================ [PASSED] check_graphics_ip ================
[00:18:39] ===================== check_media_ip ======================
[00:18:39] [PASSED] 13.00 Xe_LPM+
[00:18:39] [PASSED] 13.01 Xe2_HPM
[00:18:39] [PASSED] 20.00 Xe2_LPM
[00:18:39] [PASSED] 30.00 Xe3_LPM
[00:18:39] [PASSED] 30.02 Xe3_LPM
[00:18:39] ================= [PASSED] check_media_ip ==================
[00:18:39] ================= check_platform_gt_count =================
[00:18:39] [PASSED] 0x9A60 (TIGERLAKE)
[00:18:39] [PASSED] 0x9A68 (TIGERLAKE)
[00:18:39] [PASSED] 0x9A70 (TIGERLAKE)
[00:18:39] [PASSED] 0x9A40 (TIGERLAKE)
[00:18:39] [PASSED] 0x9A49 (TIGERLAKE)
[00:18:39] [PASSED] 0x9A59 (TIGERLAKE)
[00:18:39] [PASSED] 0x9A78 (TIGERLAKE)
[00:18:39] [PASSED] 0x9AC0 (TIGERLAKE)
[00:18:39] [PASSED] 0x9AC9 (TIGERLAKE)
[00:18:39] [PASSED] 0x9AD9 (TIGERLAKE)
[00:18:39] [PASSED] 0x9AF8 (TIGERLAKE)
[00:18:39] [PASSED] 0x4C80 (ROCKETLAKE)
[00:18:39] [PASSED] 0x4C8A (ROCKETLAKE)
[00:18:39] [PASSED] 0x4C8B (ROCKETLAKE)
[00:18:39] [PASSED] 0x4C8C (ROCKETLAKE)
[00:18:39] [PASSED] 0x4C90 (ROCKETLAKE)
[00:18:39] [PASSED] 0x4C9A (ROCKETLAKE)
[00:18:39] [PASSED] 0x4680 (ALDERLAKE_S)
[00:18:39] [PASSED] 0x4682 (ALDERLAKE_S)
[00:18:39] [PASSED] 0x4688 (ALDERLAKE_S)
[00:18:39] [PASSED] 0x468A (ALDERLAKE_S)
[00:18:39] [PASSED] 0x468B (ALDERLAKE_S)
[00:18:39] [PASSED] 0x4690 (ALDERLAKE_S)
[00:18:39] [PASSED] 0x4692 (ALDERLAKE_S)
[00:18:39] [PASSED] 0x4693 (ALDERLAKE_S)
[00:18:39] [PASSED] 0x46A0 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46A1 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46A2 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46A3 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46A6 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46A8 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46AA (ALDERLAKE_P)
[00:18:39] [PASSED] 0x462A (ALDERLAKE_P)
[00:18:39] [PASSED] 0x4626 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x4628 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46B0 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46B1 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46B2 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46B3 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46C0 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46C1 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46C2 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46C3 (ALDERLAKE_P)
[00:18:39] [PASSED] 0x46D0 (ALDERLAKE_N)
[00:18:39] [PASSED] 0x46D1 (ALDERLAKE_N)
[00:18:39] [PASSED] 0x46D2 (ALDERLAKE_N)
[00:18:39] [PASSED] 0x46D3 (ALDERLAKE_N)
[00:18:39] [PASSED] 0x46D4 (ALDERLAKE_N)
[00:18:39] [PASSED] 0xA721 (ALDERLAKE_P)
[00:18:39] [PASSED] 0xA7A1 (ALDERLAKE_P)
[00:18:39] [PASSED] 0xA7A9 (ALDERLAKE_P)
[00:18:39] [PASSED] 0xA7AC (ALDERLAKE_P)
[00:18:39] [PASSED] 0xA7AD (ALDERLAKE_P)
[00:18:39] [PASSED] 0xA720 (ALDERLAKE_P)
[00:18:39] [PASSED] 0xA7A0 (ALDERLAKE_P)
[00:18:39] [PASSED] 0xA7A8 (ALDERLAKE_P)
[00:18:39] [PASSED] 0xA7AA (ALDERLAKE_P)
[00:18:39] [PASSED] 0xA7AB (ALDERLAKE_P)
[00:18:39] [PASSED] 0xA780 (ALDERLAKE_S)
[00:18:39] [PASSED] 0xA781 (ALDERLAKE_S)
[00:18:39] [PASSED] 0xA782 (ALDERLAKE_S)
[00:18:39] [PASSED] 0xA783 (ALDERLAKE_S)
[00:18:39] [PASSED] 0xA788 (ALDERLAKE_S)
[00:18:39] [PASSED] 0xA789 (ALDERLAKE_S)
[00:18:39] [PASSED] 0xA78A (ALDERLAKE_S)
[00:18:39] [PASSED] 0xA78B (ALDERLAKE_S)
[00:18:39] [PASSED] 0x4905 (DG1)
[00:18:39] [PASSED] 0x4906 (DG1)
[00:18:39] [PASSED] 0x4907 (DG1)
[00:18:39] [PASSED] 0x4908 (DG1)
[00:18:39] [PASSED] 0x4909 (DG1)
[00:18:39] [PASSED] 0x56C0 (DG2)
[00:18:39] [PASSED] 0x56C2 (DG2)
[00:18:39] [PASSED] 0x56C1 (DG2)
[00:18:39] [PASSED] 0x7D51 (METEORLAKE)
[00:18:39] [PASSED] 0x7DD1 (METEORLAKE)
[00:18:39] [PASSED] 0x7D41 (METEORLAKE)
[00:18:39] [PASSED] 0x7D67 (METEORLAKE)
[00:18:39] [PASSED] 0xB640 (METEORLAKE)
[00:18:39] [PASSED] 0x56A0 (DG2)
[00:18:39] [PASSED] 0x56A1 (DG2)
[00:18:39] [PASSED] 0x56A2 (DG2)
[00:18:39] [PASSED] 0x56BE (DG2)
[00:18:39] [PASSED] 0x56BF (DG2)
[00:18:39] [PASSED] 0x5690 (DG2)
[00:18:39] [PASSED] 0x5691 (DG2)
[00:18:39] [PASSED] 0x5692 (DG2)
[00:18:39] [PASSED] 0x56A5 (DG2)
[00:18:39] [PASSED] 0x56A6 (DG2)
[00:18:39] [PASSED] 0x56B0 (DG2)
[00:18:39] [PASSED] 0x56B1 (DG2)
[00:18:39] [PASSED] 0x56BA (DG2)
[00:18:39] [PASSED] 0x56BB (DG2)
[00:18:39] [PASSED] 0x56BC (DG2)
[00:18:39] [PASSED] 0x56BD (DG2)
[00:18:39] [PASSED] 0x5693 (DG2)
[00:18:39] [PASSED] 0x5694 (DG2)
[00:18:39] [PASSED] 0x5695 (DG2)
[00:18:39] [PASSED] 0x56A3 (DG2)
[00:18:39] [PASSED] 0x56A4 (DG2)
[00:18:39] [PASSED] 0x56B2 (DG2)
[00:18:39] [PASSED] 0x56B3 (DG2)
[00:18:39] [PASSED] 0x5696 (DG2)
[00:18:39] [PASSED] 0x5697 (DG2)
[00:18:39] [PASSED] 0xB69 (PVC)
[00:18:39] [PASSED] 0xB6E (PVC)
[00:18:39] [PASSED] 0xBD4 (PVC)
[00:18:39] [PASSED] 0xBD5 (PVC)
[00:18:39] [PASSED] 0xBD6 (PVC)
[00:18:39] [PASSED] 0xBD7 (PVC)
[00:18:39] [PASSED] 0xBD8 (PVC)
[00:18:39] [PASSED] 0xBD9 (PVC)
[00:18:39] [PASSED] 0xBDA (PVC)
[00:18:39] [PASSED] 0xBDB (PVC)
[00:18:39] [PASSED] 0xBE0 (PVC)
[00:18:39] [PASSED] 0xBE1 (PVC)
[00:18:39] [PASSED] 0xBE5 (PVC)
[00:18:39] [PASSED] 0x7D40 (METEORLAKE)
[00:18:39] [PASSED] 0x7D45 (METEORLAKE)
[00:18:39] [PASSED] 0x7D55 (METEORLAKE)
[00:18:39] [PASSED] 0x7D60 (METEORLAKE)
[00:18:39] [PASSED] 0x7DD5 (METEORLAKE)
[00:18:39] [PASSED] 0x6420 (LUNARLAKE)
[00:18:39] [PASSED] 0x64A0 (LUNARLAKE)
[00:18:39] [PASSED] 0x64B0 (LUNARLAKE)
[00:18:39] [PASSED] 0xE202 (BATTLEMAGE)
[00:18:39] [PASSED] 0xE209 (BATTLEMAGE)
[00:18:39] [PASSED] 0xE20B (BATTLEMAGE)
[00:18:39] [PASSED] 0xE20C (BATTLEMAGE)
[00:18:39] [PASSED] 0xE20D (BATTLEMAGE)
[00:18:39] [PASSED] 0xE210 (BATTLEMAGE)
[00:18:39] [PASSED] 0xE211 (BATTLEMAGE)
[00:18:39] [PASSED] 0xE212 (BATTLEMAGE)
[00:18:39] [PASSED] 0xE216 (BATTLEMAGE)
[00:18:39] [PASSED] 0xE220 (BATTLEMAGE)
[00:18:39] [PASSED] 0xE221 (BATTLEMAGE)
[00:18:39] [PASSED] 0xE222 (BATTLEMAGE)
[00:18:39] [PASSED] 0xE223 (BATTLEMAGE)
[00:18:39] [PASSED] 0xB080 (PANTHERLAKE)
[00:18:39] [PASSED] 0xB081 (PANTHERLAKE)
[00:18:39] [PASSED] 0xB082 (PANTHERLAKE)
[00:18:39] [PASSED] 0xB083 (PANTHERLAKE)
[00:18:39] [PASSED] 0xB084 (PANTHERLAKE)
[00:18:39] [PASSED] 0xB085 (PANTHERLAKE)
[00:18:39] [PASSED] 0xB086 (PANTHERLAKE)
[00:18:39] [PASSED] 0xB087 (PANTHERLAKE)
[00:18:39] [PASSED] 0xB08F (PANTHERLAKE)
[00:18:39] [PASSED] 0xB090 (PANTHERLAKE)
[00:18:39] [PASSED] 0xB0A0 (PANTHERLAKE)
[00:18:39] [PASSED] 0xB0B0 (PANTHERLAKE)
[00:18:39] [PASSED] 0xFD80 (PANTHERLAKE)
[00:18:39] [PASSED] 0xFD81 (PANTHERLAKE)
[00:18:39] ============= [PASSED] check_platform_gt_count =============
[00:18:39] ===================== [PASSED] xe_pci ======================
[00:18:39] =================== xe_rtp (2 subtests) ====================
[00:18:39] =============== xe_rtp_process_to_sr_tests ================
[00:18:39] [PASSED] coalesce-same-reg
[00:18:39] [PASSED] no-match-no-add
[00:18:39] [PASSED] match-or
[00:18:39] [PASSED] match-or-xfail
[00:18:39] [PASSED] no-match-no-add-multiple-rules
[00:18:39] [PASSED] two-regs-two-entries
[00:18:39] [PASSED] clr-one-set-other
[00:18:39] [PASSED] set-field
[00:18:39] [PASSED] conflict-duplicate
[00:18:39] [PASSED] conflict-not-disjoint
[00:18:39] [PASSED] conflict-reg-type
[00:18:39] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[00:18:39] ================== xe_rtp_process_tests ===================
[00:18:39] [PASSED] active1
[00:18:39] [PASSED] active2
[00:18:39] [PASSED] active-inactive
[00:18:39] [PASSED] inactive-active
[00:18:39] [PASSED] inactive-1st_or_active-inactive
[00:18:39] [PASSED] inactive-2nd_or_active-inactive
[00:18:39] [PASSED] inactive-last_or_active-inactive
[00:18:39] [PASSED] inactive-no_or_active-inactive
[00:18:39] ============== [PASSED] xe_rtp_process_tests ===============
[00:18:39] ===================== [PASSED] xe_rtp ======================
[00:18:39] ==================== xe_wa (1 subtest) =====================
[00:18:39] ======================== xe_wa_gt =========================
[00:18:39] [PASSED] TIGERLAKE (B0)
[00:18:39] [PASSED] DG1 (A0)
[00:18:39] [PASSED] DG1 (B0)
[00:18:39] [PASSED] ALDERLAKE_S (A0)
[00:18:39] [PASSED] ALDERLAKE_S (B0)
[00:18:39] [PASSED] ALDERLAKE_S (C0)
[00:18:39] [PASSED] ALDERLAKE_S (D0)
[00:18:39] [PASSED] ALDERLAKE_P (A0)
[00:18:39] [PASSED] ALDERLAKE_P (B0)
[00:18:39] [PASSED] ALDERLAKE_P (C0)
[00:18:39] [PASSED] ALDERLAKE_S_RPLS (D0)
[00:18:39] [PASSED] ALDERLAKE_P_RPLU (E0)
[00:18:39] [PASSED] DG2_G10 (C0)
[00:18:39] [PASSED] DG2_G11 (B1)
[00:18:39] [PASSED] DG2_G12 (A1)
[00:18:39] [PASSED] METEORLAKE (g:A0, m:A0)
[00:18:39] [PASSED] METEORLAKE (g:A0, m:A0)
[00:18:39] [PASSED] METEORLAKE (g:A0, m:A0)
[00:18:39] [PASSED] LUNARLAKE (g:A0, m:A0)
[00:18:39] [PASSED] LUNARLAKE (g:B0, m:A0)
stty: 'standard input': Inappropriate ioctl for device
[00:18:39] [PASSED] BATTLEMAGE (g:A0, m:A1)
[00:18:39] ==================== [PASSED] xe_wa_gt =====================
[00:18:39] ====================== [PASSED] xe_wa ======================
[00:18:39] ============================================================
[00:18:39] Testing complete. Ran 297 tests: passed: 281, skipped: 16
[00:18:40] Elapsed time: 33.352s total, 4.279s configuring, 28.706s building, 0.327s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[00:18:40] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:18:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:19:04] Starting KUnit Kernel (1/1)...
[00:19:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:19:04] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[00:19:04] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[00:19:04] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[00:19:04] =========== drm_validate_clone_mode (2 subtests) ===========
[00:19:04] ============== drm_test_check_in_clone_mode ===============
[00:19:04] [PASSED] in_clone_mode
[00:19:04] [PASSED] not_in_clone_mode
[00:19:04] ========== [PASSED] drm_test_check_in_clone_mode ===========
[00:19:04] =============== drm_test_check_valid_clones ===============
[00:19:04] [PASSED] not_in_clone_mode
[00:19:04] [PASSED] valid_clone
[00:19:04] [PASSED] invalid_clone
[00:19:04] =========== [PASSED] drm_test_check_valid_clones ===========
[00:19:04] ============= [PASSED] drm_validate_clone_mode =============
[00:19:04] ============= drm_validate_modeset (1 subtest) =============
[00:19:04] [PASSED] drm_test_check_connector_changed_modeset
[00:19:04] ============== [PASSED] drm_validate_modeset ===============
[00:19:04] ====== drm_test_bridge_get_current_state (2 subtests) ======
[00:19:04] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[00:19:04] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[00:19:04] ======== [PASSED] drm_test_bridge_get_current_state ========
[00:19:04] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[00:19:04] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[00:19:04] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[00:19:04] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[00:19:04] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[00:19:04] ============== drm_bridge_alloc (2 subtests) ===============
[00:19:04] [PASSED] drm_test_drm_bridge_alloc_basic
[00:19:04] [PASSED] drm_test_drm_bridge_alloc_get_put
[00:19:04] ================ [PASSED] drm_bridge_alloc =================
[00:19:04] ================== drm_buddy (7 subtests) ==================
[00:19:04] [PASSED] drm_test_buddy_alloc_limit
[00:19:04] [PASSED] drm_test_buddy_alloc_optimistic
[00:19:04] [PASSED] drm_test_buddy_alloc_pessimistic
[00:19:04] [PASSED] drm_test_buddy_alloc_pathological
[00:19:04] [PASSED] drm_test_buddy_alloc_contiguous
[00:19:04] [PASSED] drm_test_buddy_alloc_clear
[00:19:04] [PASSED] drm_test_buddy_alloc_range_bias
[00:19:04] ==================== [PASSED] drm_buddy ====================
[00:19:04] ============= drm_cmdline_parser (40 subtests) =============
[00:19:04] [PASSED] drm_test_cmdline_force_d_only
[00:19:04] [PASSED] drm_test_cmdline_force_D_only_dvi
[00:19:04] [PASSED] drm_test_cmdline_force_D_only_hdmi
[00:19:04] [PASSED] drm_test_cmdline_force_D_only_not_digital
[00:19:04] [PASSED] drm_test_cmdline_force_e_only
[00:19:04] [PASSED] drm_test_cmdline_res
[00:19:04] [PASSED] drm_test_cmdline_res_vesa
[00:19:04] [PASSED] drm_test_cmdline_res_vesa_rblank
[00:19:04] [PASSED] drm_test_cmdline_res_rblank
[00:19:04] [PASSED] drm_test_cmdline_res_bpp
[00:19:04] [PASSED] drm_test_cmdline_res_refresh
[00:19:04] [PASSED] drm_test_cmdline_res_bpp_refresh
[00:19:04] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[00:19:04] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[00:19:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[00:19:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[00:19:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[00:19:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[00:19:04] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[00:19:04] [PASSED] drm_test_cmdline_res_margins_force_on
[00:19:04] [PASSED] drm_test_cmdline_res_vesa_margins
[00:19:04] [PASSED] drm_test_cmdline_name
[00:19:04] [PASSED] drm_test_cmdline_name_bpp
[00:19:04] [PASSED] drm_test_cmdline_name_option
[00:19:04] [PASSED] drm_test_cmdline_name_bpp_option
[00:19:04] [PASSED] drm_test_cmdline_rotate_0
[00:19:04] [PASSED] drm_test_cmdline_rotate_90
[00:19:04] [PASSED] drm_test_cmdline_rotate_180
[00:19:04] [PASSED] drm_test_cmdline_rotate_270
[00:19:04] [PASSED] drm_test_cmdline_hmirror
[00:19:04] [PASSED] drm_test_cmdline_vmirror
[00:19:04] [PASSED] drm_test_cmdline_margin_options
[00:19:04] [PASSED] drm_test_cmdline_multiple_options
[00:19:04] [PASSED] drm_test_cmdline_bpp_extra_and_option
[00:19:04] [PASSED] drm_test_cmdline_extra_and_option
[00:19:04] [PASSED] drm_test_cmdline_freestanding_options
[00:19:04] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[00:19:04] [PASSED] drm_test_cmdline_panel_orientation
[00:19:04] ================ drm_test_cmdline_invalid =================
[00:19:04] [PASSED] margin_only
[00:19:04] [PASSED] interlace_only
[00:19:04] [PASSED] res_missing_x
[00:19:04] [PASSED] res_missing_y
[00:19:04] [PASSED] res_bad_y
[00:19:04] [PASSED] res_missing_y_bpp
[00:19:04] [PASSED] res_bad_bpp
[00:19:04] [PASSED] res_bad_refresh
[00:19:04] [PASSED] res_bpp_refresh_force_on_off
[00:19:04] [PASSED] res_invalid_mode
[00:19:04] [PASSED] res_bpp_wrong_place_mode
[00:19:04] [PASSED] name_bpp_refresh
[00:19:04] [PASSED] name_refresh
[00:19:04] [PASSED] name_refresh_wrong_mode
[00:19:04] [PASSED] name_refresh_invalid_mode
[00:19:04] [PASSED] rotate_multiple
[00:19:04] [PASSED] rotate_invalid_val
[00:19:04] [PASSED] rotate_truncated
[00:19:04] [PASSED] invalid_option
[00:19:04] [PASSED] invalid_tv_option
[00:19:04] [PASSED] truncated_tv_option
[00:19:04] ============ [PASSED] drm_test_cmdline_invalid =============
[00:19:04] =============== drm_test_cmdline_tv_options ===============
[00:19:04] [PASSED] NTSC
[00:19:04] [PASSED] NTSC_443
[00:19:04] [PASSED] NTSC_J
[00:19:04] [PASSED] PAL
[00:19:04] [PASSED] PAL_M
[00:19:04] [PASSED] PAL_N
[00:19:04] [PASSED] SECAM
[00:19:04] [PASSED] MONO_525
[00:19:04] [PASSED] MONO_625
[00:19:04] =========== [PASSED] drm_test_cmdline_tv_options ===========
[00:19:04] =============== [PASSED] drm_cmdline_parser ================
[00:19:04] ========== drmm_connector_hdmi_init (20 subtests) ==========
[00:19:04] [PASSED] drm_test_connector_hdmi_init_valid
[00:19:04] [PASSED] drm_test_connector_hdmi_init_bpc_8
[00:19:04] [PASSED] drm_test_connector_hdmi_init_bpc_10
[00:19:04] [PASSED] drm_test_connector_hdmi_init_bpc_12
[00:19:04] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[00:19:04] [PASSED] drm_test_connector_hdmi_init_bpc_null
[00:19:04] [PASSED] drm_test_connector_hdmi_init_formats_empty
[00:19:04] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[00:19:04] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[00:19:04] [PASSED] supported_formats=0x9 yuv420_allowed=1
[00:19:04] [PASSED] supported_formats=0x9 yuv420_allowed=0
[00:19:04] [PASSED] supported_formats=0x3 yuv420_allowed=1
[00:19:04] [PASSED] supported_formats=0x3 yuv420_allowed=0
[00:19:04] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[00:19:04] [PASSED] drm_test_connector_hdmi_init_null_ddc
[00:19:04] [PASSED] drm_test_connector_hdmi_init_null_product
[00:19:04] [PASSED] drm_test_connector_hdmi_init_null_vendor
[00:19:04] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[00:19:04] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[00:19:04] [PASSED] drm_test_connector_hdmi_init_product_valid
[00:19:04] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[00:19:04] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[00:19:04] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[00:19:04] ========= drm_test_connector_hdmi_init_type_valid =========
[00:19:04] [PASSED] HDMI-A
[00:19:04] [PASSED] HDMI-B
[00:19:04] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[00:19:04] ======== drm_test_connector_hdmi_init_type_invalid ========
[00:19:04] [PASSED] Unknown
[00:19:04] [PASSED] VGA
[00:19:04] [PASSED] DVI-I
[00:19:04] [PASSED] DVI-D
[00:19:04] [PASSED] DVI-A
[00:19:04] [PASSED] Composite
[00:19:04] [PASSED] SVIDEO
[00:19:04] [PASSED] LVDS
[00:19:04] [PASSED] Component
[00:19:04] [PASSED] DIN
[00:19:04] [PASSED] DP
[00:19:04] [PASSED] TV
[00:19:04] [PASSED] eDP
[00:19:04] [PASSED] Virtual
[00:19:04] [PASSED] DSI
[00:19:04] [PASSED] DPI
[00:19:04] [PASSED] Writeback
[00:19:04] [PASSED] SPI
[00:19:04] [PASSED] USB
[00:19:04] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[00:19:04] ============ [PASSED] drmm_connector_hdmi_init =============
[00:19:04] ============= drmm_connector_init (3 subtests) =============
[00:19:04] [PASSED] drm_test_drmm_connector_init
[00:19:04] [PASSED] drm_test_drmm_connector_init_null_ddc
[00:19:04] ========= drm_test_drmm_connector_init_type_valid =========
[00:19:04] [PASSED] Unknown
[00:19:04] [PASSED] VGA
[00:19:04] [PASSED] DVI-I
[00:19:04] [PASSED] DVI-D
[00:19:04] [PASSED] DVI-A
[00:19:04] [PASSED] Composite
[00:19:04] [PASSED] SVIDEO
[00:19:04] [PASSED] LVDS
[00:19:04] [PASSED] Component
[00:19:04] [PASSED] DIN
[00:19:04] [PASSED] DP
[00:19:04] [PASSED] HDMI-A
[00:19:04] [PASSED] HDMI-B
[00:19:04] [PASSED] TV
[00:19:04] [PASSED] eDP
[00:19:04] [PASSED] Virtual
[00:19:04] [PASSED] DSI
[00:19:04] [PASSED] DPI
[00:19:04] [PASSED] Writeback
[00:19:04] [PASSED] SPI
[00:19:04] [PASSED] USB
[00:19:04] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[00:19:04] =============== [PASSED] drmm_connector_init ===============
[00:19:04] ========= drm_connector_dynamic_init (6 subtests) ==========
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_init
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_init_properties
[00:19:04] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[00:19:04] [PASSED] Unknown
[00:19:04] [PASSED] VGA
[00:19:04] [PASSED] DVI-I
[00:19:04] [PASSED] DVI-D
[00:19:04] [PASSED] DVI-A
[00:19:04] [PASSED] Composite
[00:19:04] [PASSED] SVIDEO
[00:19:04] [PASSED] LVDS
[00:19:04] [PASSED] Component
[00:19:04] [PASSED] DIN
[00:19:04] [PASSED] DP
[00:19:04] [PASSED] HDMI-A
[00:19:04] [PASSED] HDMI-B
[00:19:04] [PASSED] TV
[00:19:04] [PASSED] eDP
[00:19:04] [PASSED] Virtual
[00:19:04] [PASSED] DSI
[00:19:04] [PASSED] DPI
[00:19:04] [PASSED] Writeback
[00:19:04] [PASSED] SPI
[00:19:04] [PASSED] USB
[00:19:04] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[00:19:04] ======== drm_test_drm_connector_dynamic_init_name =========
[00:19:04] [PASSED] Unknown
[00:19:04] [PASSED] VGA
[00:19:04] [PASSED] DVI-I
[00:19:04] [PASSED] DVI-D
[00:19:04] [PASSED] DVI-A
[00:19:04] [PASSED] Composite
[00:19:04] [PASSED] SVIDEO
[00:19:04] [PASSED] LVDS
[00:19:04] [PASSED] Component
[00:19:04] [PASSED] DIN
[00:19:04] [PASSED] DP
[00:19:04] [PASSED] HDMI-A
[00:19:04] [PASSED] HDMI-B
[00:19:04] [PASSED] TV
[00:19:04] [PASSED] eDP
[00:19:04] [PASSED] Virtual
[00:19:04] [PASSED] DSI
[00:19:04] [PASSED] DPI
[00:19:04] [PASSED] Writeback
[00:19:04] [PASSED] SPI
[00:19:04] [PASSED] USB
[00:19:04] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[00:19:04] =========== [PASSED] drm_connector_dynamic_init ============
[00:19:04] ==== drm_connector_dynamic_register_early (4 subtests) =====
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[00:19:04] ====== [PASSED] drm_connector_dynamic_register_early =======
[00:19:04] ======= drm_connector_dynamic_register (7 subtests) ========
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[00:19:04] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[00:19:04] ========= [PASSED] drm_connector_dynamic_register ==========
[00:19:04] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[00:19:04] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[00:19:04] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[00:19:04] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[00:19:04] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[00:19:04] ========== drm_test_get_tv_mode_from_name_valid ===========
[00:19:04] [PASSED] NTSC
[00:19:04] [PASSED] NTSC-443
[00:19:04] [PASSED] NTSC-J
[00:19:04] [PASSED] PAL
[00:19:04] [PASSED] PAL-M
[00:19:04] [PASSED] PAL-N
[00:19:04] [PASSED] SECAM
[00:19:04] [PASSED] Mono
[00:19:04] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[00:19:04] [PASSED] drm_test_get_tv_mode_from_name_truncated
[00:19:04] ============ [PASSED] drm_get_tv_mode_from_name ============
[00:19:04] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[00:19:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[00:19:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[00:19:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[00:19:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[00:19:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[00:19:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[00:19:04] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[00:19:04] [PASSED] VIC 96
[00:19:04] [PASSED] VIC 97
[00:19:04] [PASSED] VIC 101
[00:19:04] [PASSED] VIC 102
[00:19:04] [PASSED] VIC 106
[00:19:04] [PASSED] VIC 107
[00:19:04] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[00:19:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[00:19:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[00:19:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[00:19:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[00:19:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[00:19:04] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[00:19:04] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[00:19:04] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[00:19:04] [PASSED] Automatic
[00:19:04] [PASSED] Full
[00:19:04] [PASSED] Limited 16:235
[00:19:04] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[00:19:04] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[00:19:04] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[00:19:04] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[00:19:04] === drm_test_drm_hdmi_connector_get_output_format_name ====
[00:19:04] [PASSED] RGB
[00:19:04] [PASSED] YUV 4:2:0
[00:19:04] [PASSED] YUV 4:2:2
[00:19:04] [PASSED] YUV 4:4:4
[00:19:04] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[00:19:04] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[00:19:04] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[00:19:04] ============= drm_damage_helper (21 subtests) ==============
[00:19:04] [PASSED] drm_test_damage_iter_no_damage
[00:19:04] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[00:19:04] [PASSED] drm_test_damage_iter_no_damage_src_moved
[00:19:04] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[00:19:04] [PASSED] drm_test_damage_iter_no_damage_not_visible
[00:19:04] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[00:19:04] [PASSED] drm_test_damage_iter_no_damage_no_fb
[00:19:04] [PASSED] drm_test_damage_iter_simple_damage
[00:19:04] [PASSED] drm_test_damage_iter_single_damage
[00:19:04] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[00:19:04] [PASSED] drm_test_damage_iter_single_damage_outside_src
[00:19:04] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[00:19:04] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[00:19:04] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[00:19:04] [PASSED] drm_test_damage_iter_single_damage_src_moved
[00:19:04] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[00:19:04] [PASSED] drm_test_damage_iter_damage
[00:19:04] [PASSED] drm_test_damage_iter_damage_one_intersect
[00:19:04] [PASSED] drm_test_damage_iter_damage_one_outside
[00:19:04] [PASSED] drm_test_damage_iter_damage_src_moved
[00:19:04] [PASSED] drm_test_damage_iter_damage_not_visible
[00:19:04] ================ [PASSED] drm_damage_helper ================
[00:19:04] ============== drm_dp_mst_helper (3 subtests) ==============
[00:19:04] ============== drm_test_dp_mst_calc_pbn_mode ==============
[00:19:04] [PASSED] Clock 154000 BPP 30 DSC disabled
[00:19:04] [PASSED] Clock 234000 BPP 30 DSC disabled
[00:19:04] [PASSED] Clock 297000 BPP 24 DSC disabled
[00:19:04] [PASSED] Clock 332880 BPP 24 DSC enabled
[00:19:04] [PASSED] Clock 324540 BPP 24 DSC enabled
[00:19:04] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[00:19:04] ============== drm_test_dp_mst_calc_pbn_div ===============
[00:19:04] [PASSED] Link rate 2000000 lane count 4
[00:19:04] [PASSED] Link rate 2000000 lane count 2
[00:19:04] [PASSED] Link rate 2000000 lane count 1
[00:19:04] [PASSED] Link rate 1350000 lane count 4
[00:19:04] [PASSED] Link rate 1350000 lane count 2
[00:19:04] [PASSED] Link rate 1350000 lane count 1
[00:19:04] [PASSED] Link rate 1000000 lane count 4
[00:19:04] [PASSED] Link rate 1000000 lane count 2
[00:19:04] [PASSED] Link rate 1000000 lane count 1
[00:19:04] [PASSED] Link rate 810000 lane count 4
[00:19:04] [PASSED] Link rate 810000 lane count 2
[00:19:04] [PASSED] Link rate 810000 lane count 1
[00:19:04] [PASSED] Link rate 540000 lane count 4
[00:19:04] [PASSED] Link rate 540000 lane count 2
[00:19:04] [PASSED] Link rate 540000 lane count 1
[00:19:04] [PASSED] Link rate 270000 lane count 4
[00:19:04] [PASSED] Link rate 270000 lane count 2
[00:19:04] [PASSED] Link rate 270000 lane count 1
[00:19:04] [PASSED] Link rate 162000 lane count 4
[00:19:04] [PASSED] Link rate 162000 lane count 2
[00:19:04] [PASSED] Link rate 162000 lane count 1
[00:19:04] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[00:19:04] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[00:19:04] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[00:19:04] [PASSED] DP_POWER_UP_PHY with port number
[00:19:04] [PASSED] DP_POWER_DOWN_PHY with port number
[00:19:04] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[00:19:04] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[00:19:04] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[00:19:04] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[00:19:04] [PASSED] DP_QUERY_PAYLOAD with port number
[00:19:04] [PASSED] DP_QUERY_PAYLOAD with VCPI
[00:19:04] [PASSED] DP_REMOTE_DPCD_READ with port number
[00:19:04] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[00:19:04] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[00:19:04] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[00:19:04] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[00:19:04] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[00:19:04] [PASSED] DP_REMOTE_I2C_READ with port number
[00:19:04] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[00:19:04] [PASSED] DP_REMOTE_I2C_READ with transactions array
[00:19:04] [PASSED] DP_REMOTE_I2C_WRITE with port number
[00:19:04] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[00:19:04] [PASSED] DP_REMOTE_I2C_WRITE with data array
[00:19:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[00:19:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[00:19:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[00:19:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[00:19:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[00:19:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[00:19:04] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[00:19:04] ================ [PASSED] drm_dp_mst_helper ================
[00:19:04] ================== drm_exec (7 subtests) ===================
[00:19:04] [PASSED] sanitycheck
[00:19:04] [PASSED] test_lock
[00:19:04] [PASSED] test_lock_unlock
[00:19:04] [PASSED] test_duplicates
[00:19:04] [PASSED] test_prepare
[00:19:04] [PASSED] test_prepare_array
[00:19:04] [PASSED] test_multiple_loops
[00:19:04] ==================== [PASSED] drm_exec =====================
[00:19:04] =========== drm_format_helper_test (17 subtests) ===========
[00:19:04] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[00:19:04] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[00:19:04] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[00:19:04] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[00:19:04] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[00:19:04] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[00:19:04] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[00:19:04] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[00:19:04] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[00:19:04] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[00:19:04] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[00:19:04] ============== drm_test_fb_xrgb8888_to_mono ===============
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[00:19:04] ==================== drm_test_fb_swab =====================
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ================ [PASSED] drm_test_fb_swab =================
[00:19:04] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[00:19:04] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[00:19:04] [PASSED] single_pixel_source_buffer
[00:19:04] [PASSED] single_pixel_clip_rectangle
[00:19:04] [PASSED] well_known_colors
[00:19:04] [PASSED] destination_pitch
[00:19:04] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[00:19:04] ================= drm_test_fb_clip_offset =================
[00:19:04] [PASSED] pass through
[00:19:04] [PASSED] horizontal offset
[00:19:04] [PASSED] vertical offset
[00:19:04] [PASSED] horizontal and vertical offset
[00:19:04] [PASSED] horizontal offset (custom pitch)
[00:19:04] [PASSED] vertical offset (custom pitch)
[00:19:04] [PASSED] horizontal and vertical offset (custom pitch)
[00:19:04] ============= [PASSED] drm_test_fb_clip_offset =============
[00:19:04] =================== drm_test_fb_memcpy ====================
[00:19:04] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[00:19:04] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[00:19:04] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[00:19:04] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[00:19:04] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[00:19:04] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[00:19:04] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[00:19:04] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[00:19:04] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[00:19:04] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[00:19:04] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[00:19:04] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[00:19:04] =============== [PASSED] drm_test_fb_memcpy ================
[00:19:04] ============= [PASSED] drm_format_helper_test ==============
[00:19:04] ================= drm_format (18 subtests) =================
[00:19:04] [PASSED] drm_test_format_block_width_invalid
[00:19:04] [PASSED] drm_test_format_block_width_one_plane
[00:19:04] [PASSED] drm_test_format_block_width_two_plane
[00:19:04] [PASSED] drm_test_format_block_width_three_plane
[00:19:04] [PASSED] drm_test_format_block_width_tiled
[00:19:04] [PASSED] drm_test_format_block_height_invalid
[00:19:04] [PASSED] drm_test_format_block_height_one_plane
[00:19:04] [PASSED] drm_test_format_block_height_two_plane
[00:19:04] [PASSED] drm_test_format_block_height_three_plane
[00:19:04] [PASSED] drm_test_format_block_height_tiled
[00:19:04] [PASSED] drm_test_format_min_pitch_invalid
[00:19:04] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[00:19:04] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[00:19:04] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[00:19:04] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[00:19:04] [PASSED] drm_test_format_min_pitch_two_plane
[00:19:04] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[00:19:04] [PASSED] drm_test_format_min_pitch_tiled
[00:19:04] =================== [PASSED] drm_format ====================
[00:19:04] ============== drm_framebuffer (10 subtests) ===============
[00:19:04] ========== drm_test_framebuffer_check_src_coords ==========
[00:19:04] [PASSED] Success: source fits into fb
[00:19:04] [PASSED] Fail: overflowing fb with x-axis coordinate
[00:19:04] [PASSED] Fail: overflowing fb with y-axis coordinate
[00:19:04] [PASSED] Fail: overflowing fb with source width
[00:19:04] [PASSED] Fail: overflowing fb with source height
[00:19:04] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[00:19:04] [PASSED] drm_test_framebuffer_cleanup
[00:19:04] =============== drm_test_framebuffer_create ===============
[00:19:04] [PASSED] ABGR8888 normal sizes
[00:19:04] [PASSED] ABGR8888 max sizes
[00:19:04] [PASSED] ABGR8888 pitch greater than min required
[00:19:04] [PASSED] ABGR8888 pitch less than min required
[00:19:04] [PASSED] ABGR8888 Invalid width
[00:19:04] [PASSED] ABGR8888 Invalid buffer handle
[00:19:04] [PASSED] No pixel format
[00:19:04] [PASSED] ABGR8888 Width 0
[00:19:04] [PASSED] ABGR8888 Height 0
[00:19:04] [PASSED] ABGR8888 Out of bound height * pitch combination
[00:19:04] [PASSED] ABGR8888 Large buffer offset
[00:19:04] [PASSED] ABGR8888 Buffer offset for inexistent plane
[00:19:04] [PASSED] ABGR8888 Invalid flag
[00:19:04] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[00:19:04] [PASSED] ABGR8888 Valid buffer modifier
[00:19:04] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[00:19:04] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[00:19:04] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[00:19:04] [PASSED] NV12 Normal sizes
[00:19:04] [PASSED] NV12 Max sizes
[00:19:04] [PASSED] NV12 Invalid pitch
[00:19:04] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[00:19:04] [PASSED] NV12 different modifier per-plane
[00:19:04] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[00:19:04] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[00:19:04] [PASSED] NV12 Modifier for inexistent plane
[00:19:04] [PASSED] NV12 Handle for inexistent plane
[00:19:04] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[00:19:04] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[00:19:04] [PASSED] YVU420 Normal sizes
[00:19:04] [PASSED] YVU420 Max sizes
[00:19:04] [PASSED] YVU420 Invalid pitch
[00:19:04] [PASSED] YVU420 Different pitches
[00:19:04] [PASSED] YVU420 Different buffer offsets/pitches
[00:19:04] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[00:19:04] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[00:19:04] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[00:19:04] [PASSED] YVU420 Valid modifier
[00:19:04] [PASSED] YVU420 Different modifiers per plane
[00:19:04] [PASSED] YVU420 Modifier for inexistent plane
[00:19:04] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[00:19:04] [PASSED] X0L2 Normal sizes
[00:19:04] [PASSED] X0L2 Max sizes
[00:19:04] [PASSED] X0L2 Invalid pitch
[00:19:04] [PASSED] X0L2 Pitch greater than minimum required
[00:19:04] [PASSED] X0L2 Handle for inexistent plane
[00:19:04] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[00:19:04] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[00:19:04] [PASSED] X0L2 Valid modifier
[00:19:04] [PASSED] X0L2 Modifier for inexistent plane
[00:19:04] =========== [PASSED] drm_test_framebuffer_create ===========
[00:19:04] [PASSED] drm_test_framebuffer_free
[00:19:04] [PASSED] drm_test_framebuffer_init
[00:19:04] [PASSED] drm_test_framebuffer_init_bad_format
[00:19:04] [PASSED] drm_test_framebuffer_init_dev_mismatch
[00:19:04] [PASSED] drm_test_framebuffer_lookup
[00:19:04] [PASSED] drm_test_framebuffer_lookup_inexistent
[00:19:04] [PASSED] drm_test_framebuffer_modifiers_not_supported
[00:19:04] ================= [PASSED] drm_framebuffer =================
[00:19:04] ================ drm_gem_shmem (8 subtests) ================
[00:19:04] [PASSED] drm_gem_shmem_test_obj_create
[00:19:04] [PASSED] drm_gem_shmem_test_obj_create_private
[00:19:04] [PASSED] drm_gem_shmem_test_pin_pages
[00:19:04] [PASSED] drm_gem_shmem_test_vmap
[00:19:04] [PASSED] drm_gem_shmem_test_get_pages_sgt
[00:19:04] [PASSED] drm_gem_shmem_test_get_sg_table
[00:19:04] [PASSED] drm_gem_shmem_test_madvise
[00:19:04] [PASSED] drm_gem_shmem_test_purge
[00:19:04] ================== [PASSED] drm_gem_shmem ==================
[00:19:04] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[00:19:04] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[00:19:04] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[00:19:04] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[00:19:04] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[00:19:04] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[00:19:04] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[00:19:04] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[00:19:04] [PASSED] Automatic
[00:19:04] [PASSED] Full
[00:19:04] [PASSED] Limited 16:235
[00:19:04] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[00:19:04] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[00:19:04] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[00:19:04] [PASSED] drm_test_check_disable_connector
[00:19:04] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[00:19:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[00:19:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[00:19:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[00:19:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[00:19:04] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[00:19:04] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[00:19:04] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[00:19:04] [PASSED] drm_test_check_output_bpc_dvi
[00:19:04] [PASSED] drm_test_check_output_bpc_format_vic_1
[00:19:04] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[00:19:04] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[00:19:04] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[00:19:04] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[00:19:04] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[00:19:04] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[00:19:04] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[00:19:04] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[00:19:04] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[00:19:04] [PASSED] drm_test_check_broadcast_rgb_value
[00:19:04] [PASSED] drm_test_check_bpc_8_value
[00:19:04] [PASSED] drm_test_check_bpc_10_value
[00:19:04] [PASSED] drm_test_check_bpc_12_value
[00:19:04] [PASSED] drm_test_check_format_value
[00:19:04] [PASSED] drm_test_check_tmds_char_value
[00:19:04] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[00:19:04] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[00:19:04] [PASSED] drm_test_check_mode_valid
[00:19:04] [PASSED] drm_test_check_mode_valid_reject
[00:19:04] [PASSED] drm_test_check_mode_valid_reject_rate
[00:19:04] [PASSED] drm_test_check_mode_valid_reject_max_clock
[00:19:04] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[00:19:04] ================= drm_managed (2 subtests) =================
[00:19:04] [PASSED] drm_test_managed_release_action
[00:19:04] [PASSED] drm_test_managed_run_action
[00:19:04] =================== [PASSED] drm_managed ===================
[00:19:04] =================== drm_mm (6 subtests) ====================
[00:19:04] [PASSED] drm_test_mm_init
[00:19:04] [PASSED] drm_test_mm_debug
[00:19:04] [PASSED] drm_test_mm_align32
[00:19:04] [PASSED] drm_test_mm_align64
[00:19:04] [PASSED] drm_test_mm_lowest
[00:19:04] [PASSED] drm_test_mm_highest
[00:19:04] ===================== [PASSED] drm_mm ======================
[00:19:04] ============= drm_modes_analog_tv (5 subtests) =============
[00:19:04] [PASSED] drm_test_modes_analog_tv_mono_576i
[00:19:04] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[00:19:04] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[00:19:04] [PASSED] drm_test_modes_analog_tv_pal_576i
[00:19:04] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[00:19:04] =============== [PASSED] drm_modes_analog_tv ===============
[00:19:04] ============== drm_plane_helper (2 subtests) ===============
[00:19:04] =============== drm_test_check_plane_state ================
[00:19:04] [PASSED] clipping_simple
[00:19:04] [PASSED] clipping_rotate_reflect
[00:19:04] [PASSED] positioning_simple
[00:19:04] [PASSED] upscaling
[00:19:04] [PASSED] downscaling
[00:19:04] [PASSED] rounding1
[00:19:04] [PASSED] rounding2
[00:19:04] [PASSED] rounding3
[00:19:04] [PASSED] rounding4
[00:19:04] =========== [PASSED] drm_test_check_plane_state ============
[00:19:04] =========== drm_test_check_invalid_plane_state ============
[00:19:04] [PASSED] positioning_invalid
[00:19:04] [PASSED] upscaling_invalid
[00:19:04] [PASSED] downscaling_invalid
[00:19:04] ======= [PASSED] drm_test_check_invalid_plane_state ========
[00:19:04] ================ [PASSED] drm_plane_helper =================
[00:19:04] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[00:19:04] ====== drm_test_connector_helper_tv_get_modes_check =======
[00:19:04] [PASSED] None
[00:19:04] [PASSED] PAL
[00:19:04] [PASSED] NTSC
[00:19:04] [PASSED] Both, NTSC Default
[00:19:04] [PASSED] Both, PAL Default
[00:19:04] [PASSED] Both, NTSC Default, with PAL on command-line
[00:19:04] [PASSED] Both, PAL Default, with NTSC on command-line
[00:19:04] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[00:19:04] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[00:19:04] ================== drm_rect (9 subtests) ===================
[00:19:04] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[00:19:04] [PASSED] drm_test_rect_clip_scaled_not_clipped
[00:19:04] [PASSED] drm_test_rect_clip_scaled_clipped
[00:19:04] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[00:19:04] ================= drm_test_rect_intersect =================
[00:19:04] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[00:19:04] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[00:19:04] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[00:19:04] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[00:19:04] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[00:19:04] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[00:19:04] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[00:19:04] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[00:19:04] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[00:19:04] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[00:19:04] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[00:19:04] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[00:19:04] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[00:19:04] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[00:19:04] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[00:19:04] ============= [PASSED] drm_test_rect_intersect =============
[00:19:04] ================ drm_test_rect_calc_hscale ================
[00:19:04] [PASSED] normal use
[00:19:04] [PASSED] out of max range
[00:19:04] [PASSED] out of min range
[00:19:04] [PASSED] zero dst
[00:19:04] [PASSED] negative src
[00:19:04] [PASSED] negative dst
[00:19:04] ============ [PASSED] drm_test_rect_calc_hscale ============
[00:19:04] ================ drm_test_rect_calc_vscale ================
[00:19:04] [PASSED] normal use
[00:19:04] [PASSED] out of max range
[00:19:04] [PASSED] out of min range
[00:19:04] [PASSED] zero dst
[00:19:04] [PASSED] negative src
[00:19:04] [PASSED] negative dst
[00:19:04] ============ [PASSED] drm_test_rect_calc_vscale ============
[00:19:04] ================== drm_test_rect_rotate ===================
[00:19:04] [PASSED] reflect-x
[00:19:04] [PASSED] reflect-y
[00:19:04] [PASSED] rotate-0
[00:19:04] [PASSED] rotate-90
[00:19:04] [PASSED] rotate-180
[00:19:04] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[00:19:04] ============== [PASSED] drm_test_rect_rotate ===============
[00:19:04] ================ drm_test_rect_rotate_inv =================
[00:19:04] [PASSED] reflect-x
[00:19:04] [PASSED] reflect-y
[00:19:04] [PASSED] rotate-0
[00:19:04] [PASSED] rotate-90
[00:19:04] [PASSED] rotate-180
[00:19:04] [PASSED] rotate-270
[00:19:04] ============ [PASSED] drm_test_rect_rotate_inv =============
[00:19:04] ==================== [PASSED] drm_rect =====================
[00:19:04] ============ drm_sysfb_modeset_test (1 subtest) ============
[00:19:04] ============ drm_test_sysfb_build_fourcc_list =============
[00:19:04] [PASSED] no native formats
[00:19:04] [PASSED] XRGB8888 as native format
[00:19:04] [PASSED] remove duplicates
[00:19:04] [PASSED] convert alpha formats
[00:19:04] [PASSED] random formats
[00:19:04] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[00:19:04] ============= [PASSED] drm_sysfb_modeset_test ==============
[00:19:04] ============================================================
[00:19:04] Testing complete. Ran 616 tests: passed: 616
[00:19:04] Elapsed time: 24.519s total, 1.660s configuring, 22.638s building, 0.199s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[00:19:04] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:19:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:19:14] Starting KUnit Kernel (1/1)...
[00:19:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:19:14] ================= ttm_device (5 subtests) ==================
[00:19:14] [PASSED] ttm_device_init_basic
[00:19:14] [PASSED] ttm_device_init_multiple
[00:19:14] [PASSED] ttm_device_fini_basic
[00:19:14] [PASSED] ttm_device_init_no_vma_man
[00:19:14] ================== ttm_device_init_pools ==================
[00:19:14] [PASSED] No DMA allocations, no DMA32 required
[00:19:14] [PASSED] DMA allocations, DMA32 required
[00:19:14] [PASSED] No DMA allocations, DMA32 required
[00:19:14] [PASSED] DMA allocations, no DMA32 required
[00:19:14] ============== [PASSED] ttm_device_init_pools ==============
[00:19:14] =================== [PASSED] ttm_device ====================
[00:19:14] ================== ttm_pool (8 subtests) ===================
[00:19:14] ================== ttm_pool_alloc_basic ===================
[00:19:14] [PASSED] One page
[00:19:14] [PASSED] More than one page
[00:19:14] [PASSED] Above the allocation limit
[00:19:14] [PASSED] One page, with coherent DMA mappings enabled
[00:19:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[00:19:14] ============== [PASSED] ttm_pool_alloc_basic ===============
[00:19:14] ============== ttm_pool_alloc_basic_dma_addr ==============
[00:19:14] [PASSED] One page
[00:19:14] [PASSED] More than one page
[00:19:14] [PASSED] Above the allocation limit
[00:19:14] [PASSED] One page, with coherent DMA mappings enabled
[00:19:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[00:19:14] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[00:19:14] [PASSED] ttm_pool_alloc_order_caching_match
[00:19:14] [PASSED] ttm_pool_alloc_caching_mismatch
[00:19:14] [PASSED] ttm_pool_alloc_order_mismatch
[00:19:14] [PASSED] ttm_pool_free_dma_alloc
[00:19:14] [PASSED] ttm_pool_free_no_dma_alloc
[00:19:14] [PASSED] ttm_pool_fini_basic
[00:19:14] ==================== [PASSED] ttm_pool =====================
[00:19:14] ================ ttm_resource (8 subtests) =================
[00:19:14] ================= ttm_resource_init_basic =================
[00:19:14] [PASSED] Init resource in TTM_PL_SYSTEM
[00:19:14] [PASSED] Init resource in TTM_PL_VRAM
[00:19:14] [PASSED] Init resource in a private placement
[00:19:14] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[00:19:14] ============= [PASSED] ttm_resource_init_basic =============
[00:19:14] [PASSED] ttm_resource_init_pinned
[00:19:14] [PASSED] ttm_resource_fini_basic
[00:19:14] [PASSED] ttm_resource_manager_init_basic
[00:19:14] [PASSED] ttm_resource_manager_usage_basic
[00:19:14] [PASSED] ttm_resource_manager_set_used_basic
[00:19:14] [PASSED] ttm_sys_man_alloc_basic
[00:19:14] [PASSED] ttm_sys_man_free_basic
[00:19:14] ================== [PASSED] ttm_resource ===================
[00:19:14] =================== ttm_tt (15 subtests) ===================
[00:19:14] ==================== ttm_tt_init_basic ====================
[00:19:14] [PASSED] Page-aligned size
[00:19:14] [PASSED] Extra pages requested
[00:19:14] ================ [PASSED] ttm_tt_init_basic ================
[00:19:14] [PASSED] ttm_tt_init_misaligned
[00:19:14] [PASSED] ttm_tt_fini_basic
[00:19:14] [PASSED] ttm_tt_fini_sg
[00:19:14] [PASSED] ttm_tt_fini_shmem
[00:19:14] [PASSED] ttm_tt_create_basic
[00:19:14] [PASSED] ttm_tt_create_invalid_bo_type
[00:19:14] [PASSED] ttm_tt_create_ttm_exists
[00:19:14] [PASSED] ttm_tt_create_failed
[00:19:14] [PASSED] ttm_tt_destroy_basic
[00:19:14] [PASSED] ttm_tt_populate_null_ttm
[00:19:14] [PASSED] ttm_tt_populate_populated_ttm
[00:19:14] [PASSED] ttm_tt_unpopulate_basic
[00:19:14] [PASSED] ttm_tt_unpopulate_empty_ttm
[00:19:14] [PASSED] ttm_tt_swapin_basic
[00:19:14] ===================== [PASSED] ttm_tt ======================
[00:19:14] =================== ttm_bo (14 subtests) ===================
[00:19:14] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[00:19:14] [PASSED] Cannot be interrupted and sleeps
[00:19:14] [PASSED] Cannot be interrupted, locks straight away
[00:19:14] [PASSED] Can be interrupted, sleeps
[00:19:14] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[00:19:14] [PASSED] ttm_bo_reserve_locked_no_sleep
[00:19:14] [PASSED] ttm_bo_reserve_no_wait_ticket
[00:19:14] [PASSED] ttm_bo_reserve_double_resv
[00:19:14] [PASSED] ttm_bo_reserve_interrupted
[00:19:14] [PASSED] ttm_bo_reserve_deadlock
[00:19:14] [PASSED] ttm_bo_unreserve_basic
[00:19:14] [PASSED] ttm_bo_unreserve_pinned
[00:19:14] [PASSED] ttm_bo_unreserve_bulk
[00:19:14] [PASSED] ttm_bo_put_basic
[00:19:14] [PASSED] ttm_bo_put_shared_resv
[00:19:14] [PASSED] ttm_bo_pin_basic
[00:19:14] [PASSED] ttm_bo_pin_unpin_resource
[00:19:14] [PASSED] ttm_bo_multiple_pin_one_unpin
[00:19:14] ===================== [PASSED] ttm_bo ======================
[00:19:14] ============== ttm_bo_validate (21 subtests) ===============
[00:19:14] ============== ttm_bo_init_reserved_sys_man ===============
[00:19:14] [PASSED] Buffer object for userspace
[00:19:14] [PASSED] Kernel buffer object
[00:19:14] [PASSED] Shared buffer object
[00:19:14] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[00:19:14] ============== ttm_bo_init_reserved_mock_man ==============
[00:19:14] [PASSED] Buffer object for userspace
[00:19:14] [PASSED] Kernel buffer object
[00:19:14] [PASSED] Shared buffer object
[00:19:14] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[00:19:14] [PASSED] ttm_bo_init_reserved_resv
[00:19:14] ================== ttm_bo_validate_basic ==================
[00:19:14] [PASSED] Buffer object for userspace
[00:19:14] [PASSED] Kernel buffer object
[00:19:14] [PASSED] Shared buffer object
[00:19:14] ============== [PASSED] ttm_bo_validate_basic ==============
[00:19:14] [PASSED] ttm_bo_validate_invalid_placement
[00:19:14] ============= ttm_bo_validate_same_placement ==============
[00:19:14] [PASSED] System manager
[00:19:14] [PASSED] VRAM manager
[00:19:14] ========= [PASSED] ttm_bo_validate_same_placement ==========
[00:19:14] [PASSED] ttm_bo_validate_failed_alloc
[00:19:14] [PASSED] ttm_bo_validate_pinned
[00:19:14] [PASSED] ttm_bo_validate_busy_placement
[00:19:14] ================ ttm_bo_validate_multihop =================
[00:19:14] [PASSED] Buffer object for userspace
[00:19:14] [PASSED] Kernel buffer object
[00:19:14] [PASSED] Shared buffer object
[00:19:14] ============ [PASSED] ttm_bo_validate_multihop =============
[00:19:14] ========== ttm_bo_validate_no_placement_signaled ==========
[00:19:14] [PASSED] Buffer object in system domain, no page vector
[00:19:14] [PASSED] Buffer object in system domain with an existing page vector
[00:19:14] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[00:19:14] ======== ttm_bo_validate_no_placement_not_signaled ========
[00:19:14] [PASSED] Buffer object for userspace
[00:19:14] [PASSED] Kernel buffer object
[00:19:14] [PASSED] Shared buffer object
[00:19:14] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[00:19:14] [PASSED] ttm_bo_validate_move_fence_signaled
[00:19:14] ========= ttm_bo_validate_move_fence_not_signaled =========
[00:19:14] [PASSED] Waits for GPU
[00:19:14] [PASSED] Tries to lock straight away
[00:19:14] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[00:19:14] [PASSED] ttm_bo_validate_happy_evict
[00:19:14] [PASSED] ttm_bo_validate_all_pinned_evict
[00:19:14] [PASSED] ttm_bo_validate_allowed_only_evict
[00:19:14] [PASSED] ttm_bo_validate_deleted_evict
[00:19:14] [PASSED] ttm_bo_validate_busy_domain_evict
[00:19:14] [PASSED] ttm_bo_validate_evict_gutting
[00:19:14] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[00:19:14] ================= [PASSED] ttm_bo_validate =================
[00:19:14] ============================================================
[00:19:14] Testing complete. Ran 101 tests: passed: 101
[00:19:14] Elapsed time: 9.876s total, 1.728s configuring, 7.881s building, 0.232s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Xe.CI.BAT: success for series starting with [1/2] drm/xe: Fix error handling if PXP fails to start
2025-08-18 23:46 [PATCH 1/2] drm/xe: Fix error handling if PXP fails to start Daniele Ceraolo Spurio
` (2 preceding siblings ...)
2025-08-19 0:19 ` ✓ CI.KUnit: success " Patchwork
@ 2025-08-19 0:52 ` Patchwork
2025-08-19 18:50 ` ✓ Xe.CI.Full: " Patchwork
2025-09-04 20:45 ` [PATCH 1/2] " John Harrison
5 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2025-08-19 0:52 UTC (permalink / raw)
To: Daniele Ceraolo Spurio; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1312 bytes --]
== Series Details ==
Series: series starting with [1/2] drm/xe: Fix error handling if PXP fails to start
URL : https://patchwork.freedesktop.org/series/153095/
State : success
== Summary ==
CI Bug Log - changes from xe-3572-c3cf4289245819615518b536cd16ebe6612694f9_BAT -> xe-pw-153095v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 9)
------------------------------
Missing (2): bat-adlp-vm bat-ptl-vm
Known issues
------------
Here are the changes found in xe-pw-153095v1_BAT that come from known issues:
### IGT changes ###
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#5783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5783
Build changes
-------------
* Linux: xe-3572-c3cf4289245819615518b536cd16ebe6612694f9 -> xe-pw-153095v1
IGT_8496: acea60af09e5f4b3cb0cd6838c23ef1e92c17323 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3572-c3cf4289245819615518b536cd16ebe6612694f9: c3cf4289245819615518b536cd16ebe6612694f9
xe-pw-153095v1: 153095v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/index.html
[-- Attachment #2: Type: text/html, Size: 1789 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Xe.CI.Full: success for series starting with [1/2] drm/xe: Fix error handling if PXP fails to start
2025-08-18 23:46 [PATCH 1/2] drm/xe: Fix error handling if PXP fails to start Daniele Ceraolo Spurio
` (3 preceding siblings ...)
2025-08-19 0:52 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-08-19 18:50 ` Patchwork
2025-09-04 20:45 ` [PATCH 1/2] " John Harrison
5 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2025-08-19 18:50 UTC (permalink / raw)
To: Daniele Ceraolo Spurio; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 43268 bytes --]
== Series Details ==
Series: series starting with [1/2] drm/xe: Fix error handling if PXP fails to start
URL : https://patchwork.freedesktop.org/series/153095/
State : success
== Summary ==
CI Bug Log - changes from xe-3572-c3cf4289245819615518b536cd16ebe6612694f9_FULL -> xe-pw-153095v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-153095v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
- shard-adlp: NOTRUN -> [SKIP][1] ([Intel XE#1124])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-270:
- shard-dg2-set2: NOTRUN -> [SKIP][2] ([Intel XE#1124])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-463/igt@kms_big_fb@yf-tiled-32bpp-rotate-270.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][3] ([Intel XE#787]) +181 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-432/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-a-dp-2.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][4] ([Intel XE#455] / [Intel XE#787]) +27 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-434/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][5] ([Intel XE#787]) +2 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][6] ([Intel XE#455] / [Intel XE#787]) +1 other test skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: [PASS][7] -> [INCOMPLETE][8] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) +1 other test incomplete
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_chamelium_frames@dp-crc-single:
- shard-adlp: NOTRUN -> [SKIP][9] ([Intel XE#373]) +2 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_chamelium_frames@dp-crc-single.html
* igt@kms_content_protection@atomic@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [FAIL][10] ([Intel XE#1178]) +1 other test fail
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-432/igt@kms_content_protection@atomic@pipe-a-dp-2.html
* igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
- shard-bmg: [PASS][11] -> [DMESG-WARN][12] ([Intel XE#5354])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-8/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-1/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
- shard-bmg: [PASS][13] -> [SKIP][14] ([Intel XE#2291])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-7/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-bmg: [PASS][15] -> [SKIP][16] ([Intel XE#1340])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][17] ([Intel XE#4494] / [i915#3804])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-464/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-adlp: NOTRUN -> [SKIP][18] ([Intel XE#4356])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-bmg: [PASS][19] -> [SKIP][20] ([Intel XE#2316]) +1 other test skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-7/igt@kms_flip@2x-plain-flip-interruptible.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-6/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1:
- shard-adlp: [PASS][21] -> [DMESG-WARN][22] ([Intel XE#4543]) +5 other tests dmesg-warn
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-9/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-3/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [PASS][23] -> [FAIL][24] ([Intel XE#301])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip@flip-vs-suspend:
- shard-dg2-set2: [PASS][25] -> [INCOMPLETE][26] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-dg2-463/igt@kms_flip@flip-vs-suspend.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-435/igt@kms_flip@flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-render:
- shard-adlp: NOTRUN -> [SKIP][27] ([Intel XE#651]) +1 other test skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-render:
- shard-adlp: NOTRUN -> [SKIP][28] ([Intel XE#656]) +4 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-msflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#651])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move:
- shard-adlp: NOTRUN -> [SKIP][30] ([Intel XE#653]) +2 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff:
- shard-dg2-set2: NOTRUN -> [SKIP][31] ([Intel XE#653])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff.html
* igt@kms_joiner@basic-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#346])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-5/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-bmg: [PASS][33] -> [SKIP][34] ([Intel XE#3012])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-7/igt@kms_joiner@basic-force-big-joiner.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-6/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_pipe_crc_basic@read-crc@pipe-a-hdmi-a-1:
- shard-adlp: [PASS][35] -> [DMESG-WARN][36] ([Intel XE#2953] / [Intel XE#4173]) +2 other tests dmesg-warn
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-3/igt@kms_pipe_crc_basic@read-crc@pipe-a-hdmi-a-1.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-1/igt@kms_pipe_crc_basic@read-crc@pipe-a-hdmi-a-1.html
* igt@kms_pm_dc@dc5-psr:
- shard-dg2-set2: NOTRUN -> [SKIP][37] ([Intel XE#1129])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-463/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-2/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#1489] / [Intel XE#5899])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
- shard-dg2-set2: NOTRUN -> [SKIP][40] ([Intel XE#1489] / [Intel XE#5899]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-463/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb:
- shard-adlp: NOTRUN -> [SKIP][41] ([Intel XE#1489] / [Intel XE#5899])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr@psr-primary-page-flip:
- shard-dg2-set2: NOTRUN -> [SKIP][42] ([Intel XE#2850] / [Intel XE#5899] / [Intel XE#929]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-463/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_psr@psr2-sprite-render:
- shard-adlp: NOTRUN -> [SKIP][43] ([Intel XE#2850] / [Intel XE#5899] / [Intel XE#929])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_psr@psr2-sprite-render.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-dg2-set2: NOTRUN -> [SKIP][44] ([Intel XE#3414])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-435/igt@kms_rotation_crc@primary-rotation-90.html
* igt@kms_vrr@max-min:
- shard-adlp: NOTRUN -> [SKIP][45] ([Intel XE#455]) +1 other test skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_vrr@max-min.html
* igt@kms_vrr@negative-basic:
- shard-bmg: [PASS][46] -> [SKIP][47] ([Intel XE#1499])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-7/igt@kms_vrr@negative-basic.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-6/igt@kms_vrr@negative-basic.html
* igt@xe_eu_stall@non-blocking-re-enable:
- shard-adlp: NOTRUN -> [SKIP][48] ([Intel XE#5626])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@xe_eu_stall@non-blocking-re-enable.html
* igt@xe_eudebug@basic-vm-access-faultable:
- shard-dg2-set2: NOTRUN -> [SKIP][49] ([Intel XE#4837]) +1 other test skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-464/igt@xe_eudebug@basic-vm-access-faultable.html
* igt@xe_eudebug@basic-vm-bind-metadata-discovery:
- shard-adlp: NOTRUN -> [SKIP][50] ([Intel XE#4837] / [Intel XE#5565])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html
* igt@xe_eudebug@discovery-race-sigint:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#4837]) +1 other test skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-6/igt@xe_eudebug@discovery-race-sigint.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
- shard-dg2-set2: [PASS][52] -> [SKIP][53] ([Intel XE#1392]) +8 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-dg2-464/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate-race:
- shard-dg2-set2: NOTRUN -> [SKIP][54] ([Intel XE#1392])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-435/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate-race.html
* igt@xe_exec_fault_mode@many-userptr-invalidate-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][55] ([Intel XE#288]) +3 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-463/igt@xe_exec_fault_mode@many-userptr-invalidate-imm.html
* igt@xe_exec_fault_mode@many-userptr-invalidate-race-prefetch:
- shard-adlp: NOTRUN -> [SKIP][56] ([Intel XE#288] / [Intel XE#5561]) +1 other test skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@xe_exec_fault_mode@many-userptr-invalidate-race-prefetch.html
* igt@xe_exec_system_allocator@many-new-busy:
- shard-adlp: NOTRUN -> [SKIP][57] ([Intel XE#4915]) +33 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@xe_exec_system_allocator@many-new-busy.html
* igt@xe_exec_system_allocator@once-large-mmap-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#4943]) +1 other test skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-6/igt@xe_exec_system_allocator@once-large-mmap-huge-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc:
- shard-dg2-set2: NOTRUN -> [SKIP][59] ([Intel XE#4915]) +36 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-464/igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc.html
* igt@xe_exec_threads@threads-hang-fd-userptr-invalidate:
- shard-dg2-set2: [PASS][60] -> [DMESG-WARN][61] ([Intel XE#3876])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-dg2-432/igt@xe_exec_threads@threads-hang-fd-userptr-invalidate.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-434/igt@xe_exec_threads@threads-hang-fd-userptr-invalidate.html
* igt@xe_module_load@load:
- shard-adlp: ([PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86]) -> ([PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97], [PASS][98], [PASS][99], [PASS][100], [SKIP][101], [PASS][102], [PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107], [PASS][108], [PASS][109], [PASS][110], [PASS][111], [PASS][112]) ([Intel XE#378] / [Intel XE#5612])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-3/igt@xe_module_load@load.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-3/igt@xe_module_load@load.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-9/igt@xe_module_load@load.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-8/igt@xe_module_load@load.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-8/igt@xe_module_load@load.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-6/igt@xe_module_load@load.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-3/igt@xe_module_load@load.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-2/igt@xe_module_load@load.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-4/igt@xe_module_load@load.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-8/igt@xe_module_load@load.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-1/igt@xe_module_load@load.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-8/igt@xe_module_load@load.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-4/igt@xe_module_load@load.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-6/igt@xe_module_load@load.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-6/igt@xe_module_load@load.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-9/igt@xe_module_load@load.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-1/igt@xe_module_load@load.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-1/igt@xe_module_load@load.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-1/igt@xe_module_load@load.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-9/igt@xe_module_load@load.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-2/igt@xe_module_load@load.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-2/igt@xe_module_load@load.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-9/igt@xe_module_load@load.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-4/igt@xe_module_load@load.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-2/igt@xe_module_load@load.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-9/igt@xe_module_load@load.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-9/igt@xe_module_load@load.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-8/igt@xe_module_load@load.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-3/igt@xe_module_load@load.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-3/igt@xe_module_load@load.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-3/igt@xe_module_load@load.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-4/igt@xe_module_load@load.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-2/igt@xe_module_load@load.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-9/igt@xe_module_load@load.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-4/igt@xe_module_load@load.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-4/igt@xe_module_load@load.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-8/igt@xe_module_load@load.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-8/igt@xe_module_load@load.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-2/igt@xe_module_load@load.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@xe_module_load@load.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@xe_module_load@load.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@xe_module_load@load.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@xe_module_load@load.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-1/igt@xe_module_load@load.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-1/igt@xe_module_load@load.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-4/igt@xe_module_load@load.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-1/igt@xe_module_load@load.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-3/igt@xe_module_load@load.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-2/igt@xe_module_load@load.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-2/igt@xe_module_load@load.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@xe_module_load@load.html
* igt@xe_oa@oa-unit-concurrent-oa-buffer-read:
- shard-dg2-set2: NOTRUN -> [SKIP][113] ([Intel XE#3573])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-463/igt@xe_oa@oa-unit-concurrent-oa-buffer-read.html
* igt@xe_oa@rc6-disable:
- shard-adlp: NOTRUN -> [SKIP][114] ([Intel XE#3573]) +1 other test skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@xe_oa@rc6-disable.html
* igt@xe_pm@d3hot-i2c:
- shard-adlp: NOTRUN -> [SKIP][115] ([Intel XE#5742])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@xe_pm@d3hot-i2c.html
* igt@xe_pm@s3-d3hot-basic-exec:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][116] ([Intel XE#569])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-435/igt@xe_pm@s3-d3hot-basic-exec.html
* igt@xe_query@multigpu-query-hwconfig:
- shard-adlp: NOTRUN -> [SKIP][117] ([Intel XE#944])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@xe_query@multigpu-query-hwconfig.html
* igt@xe_render_copy@render-stress-4-copies:
- shard-dg2-set2: NOTRUN -> [SKIP][118] ([Intel XE#4814])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-463/igt@xe_render_copy@render-stress-4-copies.html
#### Possible fixes ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [INCOMPLETE][119] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [PASS][120] +1 other test pass
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
- shard-bmg: [SKIP][121] ([Intel XE#2291]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [FAIL][123] ([Intel XE#5299]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@single-move@pipe-c:
- shard-dg2-set2: [DMESG-WARN][125] ([Intel XE#5666]) -> [PASS][126] +1 other test pass
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-dg2-435/igt@kms_cursor_legacy@single-move@pipe-c.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-436/igt@kms_cursor_legacy@single-move@pipe-c.html
* igt@kms_flip@dpms-off-confusion@c-hdmi-a1:
- shard-adlp: [DMESG-WARN][127] ([Intel XE#4543]) -> [PASS][128] +5 other tests pass
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-2/igt@kms_flip@dpms-off-confusion@c-hdmi-a1.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-9/igt@kms_flip@dpms-off-confusion@c-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [FAIL][129] ([Intel XE#301]) -> [PASS][130] +2 other tests pass
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][131] ([Intel XE#1503]) -> [PASS][132]
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-1/igt@kms_hdr@invalid-hdr.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-3/igt@kms_hdr@invalid-hdr.html
* igt@kms_lease@lease-revoke:
- shard-adlp: [ABORT][133] ([Intel XE#2953]) -> [PASS][134] +1 other test pass
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-8/igt@kms_lease@lease-revoke.html
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_lease@lease-revoke.html
* igt@kms_lease@lease-revoke@pipe-b-hdmi-a-1:
- shard-adlp: [DMESG-WARN][135] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][136] +11 other tests pass
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-8/igt@kms_lease@lease-revoke@pipe-b-hdmi-a-1.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-6/igt@kms_lease@lease-revoke@pipe-b-hdmi-a-1.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-lnl: [SKIP][137] ([Intel XE#4692] / [Intel XE#5899]) -> [PASS][138]
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-lnl-2/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-lnl-5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_setmode@basic@pipe-a-hdmi-a-6:
- shard-dg2-set2: [FAIL][139] ([Intel XE#2883]) -> [PASS][140] +1 other test pass
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-dg2-435/igt@kms_setmode@basic@pipe-a-hdmi-a-6.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-464/igt@kms_setmode@basic@pipe-a-hdmi-a-6.html
* igt@xe_exec_basic@multigpu-once-basic-defer-mmap:
- shard-dg2-set2: [SKIP][141] ([Intel XE#1392]) -> [PASS][142] +4 other tests pass
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-dg2-432/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-463/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html
* igt@xe_exec_compute_mode@many-bindexecqueue-userptr-rebind:
- shard-adlp: [FAIL][143] -> [PASS][144]
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-9/igt@xe_exec_compute_mode@many-bindexecqueue-userptr-rebind.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-3/igt@xe_exec_compute_mode@many-bindexecqueue-userptr-rebind.html
* igt@xe_exec_threads@threads-cm-userptr:
- shard-bmg: [FAIL][145] -> [PASS][146] +1 other test pass
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-1/igt@xe_exec_threads@threads-cm-userptr.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-3/igt@xe_exec_threads@threads-cm-userptr.html
* igt@xe_exec_threads@threads-hang-fd-rebind:
- shard-bmg: [DMESG-FAIL][147] ([Intel XE#3876]) -> [PASS][148] +2 other tests pass
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-1/igt@xe_exec_threads@threads-hang-fd-rebind.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-3/igt@xe_exec_threads@threads-hang-fd-rebind.html
* igt@xe_pm@s3-vm-bind-prefetch:
- shard-adlp: [DMESG-WARN][149] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#569]) -> [PASS][150]
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-9/igt@xe_pm@s3-vm-bind-prefetch.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-2/igt@xe_pm@s3-vm-bind-prefetch.html
* igt@xe_pm@s4-basic:
- shard-lnl: [DMESG-WARN][151] -> [PASS][152]
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-lnl-4/igt@xe_pm@s4-basic.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-lnl-1/igt@xe_pm@s4-basic.html
#### Warnings ####
* igt@kms_content_protection@uevent:
- shard-bmg: [FAIL][153] ([Intel XE#1188]) -> [SKIP][154] ([Intel XE#2341])
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-7/igt@kms_content_protection@uevent.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-6/igt@kms_content_protection@uevent.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-adlp: [DMESG-WARN][155] ([Intel XE#2953] / [Intel XE#4173]) -> [DMESG-WARN][156] ([Intel XE#4543])
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-adlp-6/igt@kms_flip@flip-vs-suspend-interruptible.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-adlp-2/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt:
- shard-bmg: [SKIP][157] ([Intel XE#2311]) -> [SKIP][158] ([Intel XE#2312]) +3 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][159] ([Intel XE#2312]) -> [SKIP][160] ([Intel XE#2311]) +2 other tests skip
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-mmap-wc.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: [SKIP][161] ([Intel XE#2312]) -> [SKIP][162] ([Intel XE#5390]) +1 other test skip
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][163] ([Intel XE#5390]) -> [SKIP][164] ([Intel XE#2312]) +1 other test skip
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][165] ([Intel XE#2312]) -> [SKIP][166] ([Intel XE#2313]) +2 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
- shard-bmg: [SKIP][167] ([Intel XE#2313]) -> [SKIP][168] ([Intel XE#2312]) +3 other tests skip
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][169] ([Intel XE#2509]) -> [SKIP][170] ([Intel XE#2426])
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null:
- shard-dg2-set2: [INCOMPLETE][171] -> [SKIP][172] ([Intel XE#1392])
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-dg2-436/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-435/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
- shard-lnl: [INCOMPLETE][173] ([Intel XE#5466]) -> [ABORT][174] ([Intel XE#4917] / [Intel XE#5466])
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-lnl-7/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-lnl-1/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
* igt@xe_peer2peer@write:
- shard-dg2-set2: [FAIL][175] ([Intel XE#1173]) -> [SKIP][176] ([Intel XE#1061])
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3572-c3cf4289245819615518b536cd16ebe6612694f9/shard-dg2-434/igt@xe_peer2peer@write.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/shard-dg2-432/igt@xe_peer2peer@write.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
[Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2883]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2883
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4356
[Intel XE#4494]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4494
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4692]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4692
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
[Intel XE#5299]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5299
[Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
[Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#5666]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5666
[Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
[Intel XE#5899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5899
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
Build changes
-------------
* Linux: xe-3572-c3cf4289245819615518b536cd16ebe6612694f9 -> xe-pw-153095v1
IGT_8496: acea60af09e5f4b3cb0cd6838c23ef1e92c17323 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3572-c3cf4289245819615518b536cd16ebe6612694f9: c3cf4289245819615518b536cd16ebe6612694f9
xe-pw-153095v1: 153095v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153095v1/index.html
[-- Attachment #2: Type: text/html, Size: 49315 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/xe: Fix error handling if PXP fails to start
2025-08-18 23:46 [PATCH 1/2] drm/xe: Fix error handling if PXP fails to start Daniele Ceraolo Spurio
` (4 preceding siblings ...)
2025-08-19 18:50 ` ✓ Xe.CI.Full: " Patchwork
@ 2025-09-04 20:45 ` John Harrison
2025-09-04 20:55 ` Daniele Ceraolo Spurio
5 siblings, 1 reply; 11+ messages in thread
From: John Harrison @ 2025-09-04 20:45 UTC (permalink / raw)
To: Daniele Ceraolo Spurio, intel-xe; +Cc: Matthew Brost
On 8/18/2025 4:46 PM, Daniele Ceraolo Spurio wrote:
> Since the PXP start comes after __xe_exec_queue_init() has completed,
> we need to cleanup what was done in that function in case of a PXP
> start error.
> __xe_exec_queue_init calls the submission backend init() function,
> so we need to introduce an opposite for that. Unfortunately, while
> we already have a fini() function pointer, it is does perform other
it is does?
> operations in addition to cleaning up what was done by the init().
> Therefore, for clarity, the existing fini() has been renamed to
> destroy(), while a new fini() has been added to only clean up what was
> done by the init(), with the latter being called by the former (via
> xe_exec_queue_fini).
It would be much easier to follow the changes if the rename was split
into a prep patch and then the behaviour change patch was just the
behaviour change.
John.
>
> Fixes: 72d479601d67 ("drm/xe/pxp/uapi: Add userspace and LRC support for PXP-using queues")
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_exec_queue.c | 24 ++++++---
> drivers/gpu/drm/xe/xe_exec_queue_types.h | 8 ++-
> drivers/gpu/drm/xe/xe_execlist.c | 25 ++++++----
> drivers/gpu/drm/xe/xe_execlist_types.h | 2 +-
> drivers/gpu/drm/xe/xe_guc_exec_queue_types.h | 4 +-
> drivers/gpu/drm/xe/xe_guc_submit.c | 52 ++++++++++++--------
> 6 files changed, 74 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 2d10a53f701d..bce507c49517 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -199,6 +199,18 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q)
> return err;
> }
>
> +static void __xe_exec_queue_fini(struct xe_exec_queue *q)
> +{
> + int i;
> +
> + q->ops->fini(q);
> +
> + for (i = 0; i < q->width; ++i)
> + xe_lrc_put(q->lrc[i]);
> +
> + return;
> +}
> +
> struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
> u32 logical_mask, u16 width,
> struct xe_hw_engine *hwe, u32 flags,
> @@ -229,11 +241,13 @@ struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *v
> if (xe_exec_queue_uses_pxp(q)) {
> err = xe_pxp_exec_queue_add(xe->pxp, q);
> if (err)
> - goto err_post_alloc;
> + goto err_post_init;
> }
>
> return q;
>
> +err_post_init:
> + __xe_exec_queue_fini(q);
> err_post_alloc:
> __xe_exec_queue_free(q);
> return ERR_PTR(err);
> @@ -331,13 +345,11 @@ void xe_exec_queue_destroy(struct kref *ref)
> xe_exec_queue_put(eq);
> }
>
> - q->ops->fini(q);
> + q->ops->destroy(q);
> }
>
> void xe_exec_queue_fini(struct xe_exec_queue *q)
> {
> - int i;
> -
> /*
> * Before releasing our ref to lrc and xef, accumulate our run ticks
> * and wakeup any waiters.
> @@ -346,9 +358,7 @@ void xe_exec_queue_fini(struct xe_exec_queue *q)
> if (q->xef && atomic_dec_and_test(&q->xef->exec_queue.pending_removal))
> wake_up_var(&q->xef->exec_queue.pending_removal);
>
> - for (i = 0; i < q->width; ++i)
> - xe_lrc_put(q->lrc[i]);
> -
> + __xe_exec_queue_fini(q);
> __xe_exec_queue_free(q);
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> index ba443a497b38..27b76cf9da89 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> @@ -181,8 +181,14 @@ struct xe_exec_queue_ops {
> int (*init)(struct xe_exec_queue *q);
> /** @kill: Kill inflight submissions for backend */
> void (*kill)(struct xe_exec_queue *q);
> - /** @fini: Fini exec queue for submission backend */
> + /** @fini: Undoes the init() for submission backend */
> void (*fini)(struct xe_exec_queue *q);
> + /**
> + * @destroy: Destroy exec queue for submission backend. The backend
> + * function must call xe_exec_queue_fini() (which will in turn call the
> + * fini() backend function) to ensure the queue is properly cleaned up.
> + */
> + void (*destroy)(struct xe_exec_queue *q);
> /** @set_priority: Set priority for exec queue */
> int (*set_priority)(struct xe_exec_queue *q,
> enum xe_exec_queue_priority priority);
> diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execlist.c
> index 788f56b066b6..f83d421ac9d3 100644
> --- a/drivers/gpu/drm/xe/xe_execlist.c
> +++ b/drivers/gpu/drm/xe/xe_execlist.c
> @@ -385,10 +385,20 @@ static int execlist_exec_queue_init(struct xe_exec_queue *q)
> return err;
> }
>
> -static void execlist_exec_queue_fini_async(struct work_struct *w)
> +static void execlist_exec_queue_fini(struct xe_exec_queue *q)
> +{
> + struct xe_execlist_exec_queue *exl = q->execlist;
> +
> + drm_sched_entity_fini(&exl->entity);
> + drm_sched_fini(&exl->sched);
> +
> + kfree(exl);
> +}
> +
> +static void execlist_exec_queue_destroy_async(struct work_struct *w)
> {
> struct xe_execlist_exec_queue *ee =
> - container_of(w, struct xe_execlist_exec_queue, fini_async);
> + container_of(w, struct xe_execlist_exec_queue, destroy_async);
> struct xe_exec_queue *q = ee->q;
> struct xe_execlist_exec_queue *exl = q->execlist;
> struct xe_device *xe = gt_to_xe(q->gt);
> @@ -401,10 +411,6 @@ static void execlist_exec_queue_fini_async(struct work_struct *w)
> list_del(&exl->active_link);
> spin_unlock_irqrestore(&exl->port->lock, flags);
>
> - drm_sched_entity_fini(&exl->entity);
> - drm_sched_fini(&exl->sched);
> - kfree(exl);
> -
> xe_exec_queue_fini(q);
> }
>
> @@ -413,10 +419,10 @@ static void execlist_exec_queue_kill(struct xe_exec_queue *q)
> /* NIY */
> }
>
> -static void execlist_exec_queue_fini(struct xe_exec_queue *q)
> +static void execlist_exec_queue_destroy(struct xe_exec_queue *q)
> {
> - INIT_WORK(&q->execlist->fini_async, execlist_exec_queue_fini_async);
> - queue_work(system_unbound_wq, &q->execlist->fini_async);
> + INIT_WORK(&q->execlist->destroy_async, execlist_exec_queue_destroy_async);
> + queue_work(system_unbound_wq, &q->execlist->destroy_async);
> }
>
> static int execlist_exec_queue_set_priority(struct xe_exec_queue *q,
> @@ -467,6 +473,7 @@ static const struct xe_exec_queue_ops execlist_exec_queue_ops = {
> .init = execlist_exec_queue_init,
> .kill = execlist_exec_queue_kill,
> .fini = execlist_exec_queue_fini,
> + .destroy = execlist_exec_queue_destroy,
> .set_priority = execlist_exec_queue_set_priority,
> .set_timeslice = execlist_exec_queue_set_timeslice,
> .set_preempt_timeout = execlist_exec_queue_set_preempt_timeout,
> diff --git a/drivers/gpu/drm/xe/xe_execlist_types.h b/drivers/gpu/drm/xe/xe_execlist_types.h
> index 415140936f11..92c4ba52db0c 100644
> --- a/drivers/gpu/drm/xe/xe_execlist_types.h
> +++ b/drivers/gpu/drm/xe/xe_execlist_types.h
> @@ -42,7 +42,7 @@ struct xe_execlist_exec_queue {
>
> bool has_run;
>
> - struct work_struct fini_async;
> + struct work_struct destroy_async;
>
> enum xe_exec_queue_priority active_priority;
> struct list_head active_link;
> diff --git a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
> index a3f421e2adc0..c30c0e3ccbbb 100644
> --- a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
> +++ b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
> @@ -35,8 +35,8 @@ struct xe_guc_exec_queue {
> struct xe_sched_msg static_msgs[MAX_STATIC_MSG_TYPE];
> /** @lr_tdr: long running TDR worker */
> struct work_struct lr_tdr;
> - /** @fini_async: do final fini async from this worker */
> - struct work_struct fini_async;
> + /** @destroy_async: do final destroy async from this worker */
> + struct work_struct destroy_async;
> /** @resume_time: time of last resume */
> u64 resume_time;
> /** @state: GuC specific state for this xe_exec_queue */
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index 860c07da598a..75208ea4d408 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -1418,48 +1418,57 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> return DRM_GPU_SCHED_STAT_NO_HANG;
> }
>
> -static void __guc_exec_queue_fini_async(struct work_struct *w)
> +static void guc_exec_queue_fini(struct xe_exec_queue *q)
> +{
> + struct xe_guc_exec_queue *ge = q->guc;
> + struct xe_guc *guc = exec_queue_to_guc(q);
> +
> + release_guc_id(guc, q);
> + xe_sched_entity_fini(&ge->entity);
> + xe_sched_fini(&ge->sched);
> +
> + /*
> + * RCU free due sched being exported via DRM scheduler fences
> + * (timeline name).
> + */
> + kfree_rcu(ge, rcu);
> +}
> +
> +static void __guc_exec_queue_destroy_async(struct work_struct *w)
> {
> struct xe_guc_exec_queue *ge =
> - container_of(w, struct xe_guc_exec_queue, fini_async);
> + container_of(w, struct xe_guc_exec_queue, destroy_async);
> struct xe_exec_queue *q = ge->q;
> struct xe_guc *guc = exec_queue_to_guc(q);
>
> xe_pm_runtime_get(guc_to_xe(guc));
> trace_xe_exec_queue_destroy(q);
>
> - release_guc_id(guc, q);
> if (xe_exec_queue_is_lr(q))
> cancel_work_sync(&ge->lr_tdr);
> /* Confirm no work left behind accessing device structures */
> cancel_delayed_work_sync(&ge->sched.base.work_tdr);
> - xe_sched_entity_fini(&ge->entity);
> - xe_sched_fini(&ge->sched);
>
> - /*
> - * RCU free due sched being exported via DRM scheduler fences
> - * (timeline name).
> - */
> - kfree_rcu(ge, rcu);
> xe_exec_queue_fini(q);
> +
> xe_pm_runtime_put(guc_to_xe(guc));
> }
>
> -static void guc_exec_queue_fini_async(struct xe_exec_queue *q)
> +static void guc_exec_queue_destroy_async(struct xe_exec_queue *q)
> {
> struct xe_guc *guc = exec_queue_to_guc(q);
> struct xe_device *xe = guc_to_xe(guc);
>
> - INIT_WORK(&q->guc->fini_async, __guc_exec_queue_fini_async);
> + INIT_WORK(&q->guc->destroy_async, __guc_exec_queue_destroy_async);
>
> /* We must block on kernel engines so slabs are empty on driver unload */
> if (q->flags & EXEC_QUEUE_FLAG_PERMANENT || exec_queue_wedged(q))
> - __guc_exec_queue_fini_async(&q->guc->fini_async);
> + __guc_exec_queue_destroy_async(&q->guc->destroy_async);
> else
> - queue_work(xe->destroy_wq, &q->guc->fini_async);
> + queue_work(xe->destroy_wq, &q->guc->destroy_async);
> }
>
> -static void __guc_exec_queue_fini(struct xe_guc *guc, struct xe_exec_queue *q)
> +static void __guc_exec_queue_destroy(struct xe_guc *guc, struct xe_exec_queue *q)
> {
> /*
> * Might be done from within the GPU scheduler, need to do async as we
> @@ -1468,7 +1477,7 @@ static void __guc_exec_queue_fini(struct xe_guc *guc, struct xe_exec_queue *q)
> * this we and don't really care when everything is fini'd, just that it
> * is.
> */
> - guc_exec_queue_fini_async(q);
> + guc_exec_queue_destroy_async(q);
> }
>
> static void __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg)
> @@ -1482,7 +1491,7 @@ static void __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg)
> if (exec_queue_registered(q))
> disable_scheduling_deregister(guc, q);
> else
> - __guc_exec_queue_fini(guc, q);
> + __guc_exec_queue_destroy(guc, q);
> }
>
> static bool guc_exec_queue_allowed_to_change_state(struct xe_exec_queue *q)
> @@ -1715,14 +1724,14 @@ static bool guc_exec_queue_try_add_msg(struct xe_exec_queue *q,
> #define STATIC_MSG_CLEANUP 0
> #define STATIC_MSG_SUSPEND 1
> #define STATIC_MSG_RESUME 2
> -static void guc_exec_queue_fini(struct xe_exec_queue *q)
> +static void guc_exec_queue_destroy(struct xe_exec_queue *q)
> {
> struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_CLEANUP;
>
> if (!(q->flags & EXEC_QUEUE_FLAG_PERMANENT) && !exec_queue_wedged(q))
> guc_exec_queue_add_msg(q, msg, CLEANUP);
> else
> - __guc_exec_queue_fini(exec_queue_to_guc(q), q);
> + __guc_exec_queue_destroy(exec_queue_to_guc(q), q);
> }
>
> static int guc_exec_queue_set_priority(struct xe_exec_queue *q,
> @@ -1852,6 +1861,7 @@ static const struct xe_exec_queue_ops guc_exec_queue_ops = {
> .init = guc_exec_queue_init,
> .kill = guc_exec_queue_kill,
> .fini = guc_exec_queue_fini,
> + .destroy = guc_exec_queue_destroy,
> .set_priority = guc_exec_queue_set_priority,
> .set_timeslice = guc_exec_queue_set_timeslice,
> .set_preempt_timeout = guc_exec_queue_set_preempt_timeout,
> @@ -1873,7 +1883,7 @@ static void guc_exec_queue_stop(struct xe_guc *guc, struct xe_exec_queue *q)
> if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
> xe_exec_queue_put(q);
> else if (exec_queue_destroyed(q))
> - __guc_exec_queue_fini(guc, q);
> + __guc_exec_queue_destroy(guc, q);
> }
> if (q->guc->suspend_pending) {
> set_exec_queue_suspended(q);
> @@ -2202,7 +2212,7 @@ static void handle_deregister_done(struct xe_guc *guc, struct xe_exec_queue *q)
> if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
> xe_exec_queue_put(q);
> else
> - __guc_exec_queue_fini(guc, q);
> + __guc_exec_queue_destroy(guc, q);
> }
>
> int xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] drm/xe: Allow error injection for xe_pxp_exec_queue_add
2025-08-18 23:46 ` [PATCH 2/2] drm/xe: Allow error injection for xe_pxp_exec_queue_add Daniele Ceraolo Spurio
@ 2025-09-04 20:46 ` John Harrison
0 siblings, 0 replies; 11+ messages in thread
From: John Harrison @ 2025-09-04 20:46 UTC (permalink / raw)
To: Daniele Ceraolo Spurio, intel-xe
On 8/18/2025 4:46 PM, Daniele Ceraolo Spurio wrote:
> This will allow us to simulate this function returning an error like
> we do for other functions called in the exec_queue_create path.
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/xe/xe_pxp.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_pxp.c b/drivers/gpu/drm/xe/xe_pxp.c
> index 3d62008c99f1..bdbdbbf6a678 100644
> --- a/drivers/gpu/drm/xe/xe_pxp.c
> +++ b/drivers/gpu/drm/xe/xe_pxp.c
> @@ -688,6 +688,7 @@ int xe_pxp_exec_queue_add(struct xe_pxp *pxp, struct xe_exec_queue *q)
>
> return ret;
> }
> +ALLOW_ERROR_INJECTION(xe_pxp_exec_queue_add, ERRNO);
>
> static void __pxp_exec_queue_remove(struct xe_pxp *pxp, struct xe_exec_queue *q, bool lock)
> {
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/xe: Fix error handling if PXP fails to start
2025-09-04 20:45 ` [PATCH 1/2] " John Harrison
@ 2025-09-04 20:55 ` Daniele Ceraolo Spurio
2025-09-04 20:57 ` Daniele Ceraolo Spurio
0 siblings, 1 reply; 11+ messages in thread
From: Daniele Ceraolo Spurio @ 2025-09-04 20:55 UTC (permalink / raw)
To: John Harrison, intel-xe; +Cc: Matthew Brost
On 9/4/2025 1:45 PM, John Harrison wrote:
> On 8/18/2025 4:46 PM, Daniele Ceraolo Spurio wrote:
>> Since the PXP start comes after __xe_exec_queue_init() has completed,
>> we need to cleanup what was done in that function in case of a PXP
>> start error.
>> __xe_exec_queue_init calls the submission backend init() function,
>> so we need to introduce an opposite for that. Unfortunately, while
>> we already have a fini() function pointer, it is does perform other
> it is does?
>
>> operations in addition to cleaning up what was done by the init().
>> Therefore, for clarity, the existing fini() has been renamed to
>> destroy(), while a new fini() has been added to only clean up what was
>> done by the init(), with the latter being called by the former (via
>> xe_exec_queue_fini).
> It would be much easier to follow the changes if the rename was split
> into a prep patch and then the behaviour change patch was just the
> behaviour change.
This is a fixes patch, so I wanted to avoid having prerequisite patches
for it because it'll make it fail to apply.
The other option I thought of is to do something like:
patch 1 (fixes): add a new function pointer with a new name (fini_last
?) to undo the init() action.
patch 2: swap the function names (fini -> destroy, fini_last -> fini)
However, not sure if this is better because we'd leave unbalanced naming
with only patch 1.
Thoughts?
Daniele
>
> John.
>
>>
>> Fixes: 72d479601d67 ("drm/xe/pxp/uapi: Add userspace and LRC support
>> for PXP-using queues")
>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Cc: John Harrison <John.C.Harrison@Intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_exec_queue.c | 24 ++++++---
>> drivers/gpu/drm/xe/xe_exec_queue_types.h | 8 ++-
>> drivers/gpu/drm/xe/xe_execlist.c | 25 ++++++----
>> drivers/gpu/drm/xe/xe_execlist_types.h | 2 +-
>> drivers/gpu/drm/xe/xe_guc_exec_queue_types.h | 4 +-
>> drivers/gpu/drm/xe/xe_guc_submit.c | 52 ++++++++++++--------
>> 6 files changed, 74 insertions(+), 41 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c
>> b/drivers/gpu/drm/xe/xe_exec_queue.c
>> index 2d10a53f701d..bce507c49517 100644
>> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
>> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
>> @@ -199,6 +199,18 @@ static int __xe_exec_queue_init(struct
>> xe_exec_queue *q)
>> return err;
>> }
>> +static void __xe_exec_queue_fini(struct xe_exec_queue *q)
>> +{
>> + int i;
>> +
>> + q->ops->fini(q);
>> +
>> + for (i = 0; i < q->width; ++i)
>> + xe_lrc_put(q->lrc[i]);
>> +
>> + return;
>> +}
>> +
>> struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe,
>> struct xe_vm *vm,
>> u32 logical_mask, u16 width,
>> struct xe_hw_engine *hwe, u32 flags,
>> @@ -229,11 +241,13 @@ struct xe_exec_queue
>> *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *v
>> if (xe_exec_queue_uses_pxp(q)) {
>> err = xe_pxp_exec_queue_add(xe->pxp, q);
>> if (err)
>> - goto err_post_alloc;
>> + goto err_post_init;
>> }
>> return q;
>> +err_post_init:
>> + __xe_exec_queue_fini(q);
>> err_post_alloc:
>> __xe_exec_queue_free(q);
>> return ERR_PTR(err);
>> @@ -331,13 +345,11 @@ void xe_exec_queue_destroy(struct kref *ref)
>> xe_exec_queue_put(eq);
>> }
>> - q->ops->fini(q);
>> + q->ops->destroy(q);
>> }
>> void xe_exec_queue_fini(struct xe_exec_queue *q)
>> {
>> - int i;
>> -
>> /*
>> * Before releasing our ref to lrc and xef, accumulate our run
>> ticks
>> * and wakeup any waiters.
>> @@ -346,9 +358,7 @@ void xe_exec_queue_fini(struct xe_exec_queue *q)
>> if (q->xef &&
>> atomic_dec_and_test(&q->xef->exec_queue.pending_removal))
>> wake_up_var(&q->xef->exec_queue.pending_removal);
>> - for (i = 0; i < q->width; ++i)
>> - xe_lrc_put(q->lrc[i]);
>> -
>> + __xe_exec_queue_fini(q);
>> __xe_exec_queue_free(q);
>> }
>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h
>> b/drivers/gpu/drm/xe/xe_exec_queue_types.h
>> index ba443a497b38..27b76cf9da89 100644
>> --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
>> +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
>> @@ -181,8 +181,14 @@ struct xe_exec_queue_ops {
>> int (*init)(struct xe_exec_queue *q);
>> /** @kill: Kill inflight submissions for backend */
>> void (*kill)(struct xe_exec_queue *q);
>> - /** @fini: Fini exec queue for submission backend */
>> + /** @fini: Undoes the init() for submission backend */
>> void (*fini)(struct xe_exec_queue *q);
>> + /**
>> + * @destroy: Destroy exec queue for submission backend. The backend
>> + * function must call xe_exec_queue_fini() (which will in turn
>> call the
>> + * fini() backend function) to ensure the queue is properly
>> cleaned up.
>> + */
>> + void (*destroy)(struct xe_exec_queue *q);
>> /** @set_priority: Set priority for exec queue */
>> int (*set_priority)(struct xe_exec_queue *q,
>> enum xe_exec_queue_priority priority);
>> diff --git a/drivers/gpu/drm/xe/xe_execlist.c
>> b/drivers/gpu/drm/xe/xe_execlist.c
>> index 788f56b066b6..f83d421ac9d3 100644
>> --- a/drivers/gpu/drm/xe/xe_execlist.c
>> +++ b/drivers/gpu/drm/xe/xe_execlist.c
>> @@ -385,10 +385,20 @@ static int execlist_exec_queue_init(struct
>> xe_exec_queue *q)
>> return err;
>> }
>> -static void execlist_exec_queue_fini_async(struct work_struct *w)
>> +static void execlist_exec_queue_fini(struct xe_exec_queue *q)
>> +{
>> + struct xe_execlist_exec_queue *exl = q->execlist;
>> +
>> + drm_sched_entity_fini(&exl->entity);
>> + drm_sched_fini(&exl->sched);
>> +
>> + kfree(exl);
>> +}
>> +
>> +static void execlist_exec_queue_destroy_async(struct work_struct *w)
>> {
>> struct xe_execlist_exec_queue *ee =
>> - container_of(w, struct xe_execlist_exec_queue, fini_async);
>> + container_of(w, struct xe_execlist_exec_queue, destroy_async);
>> struct xe_exec_queue *q = ee->q;
>> struct xe_execlist_exec_queue *exl = q->execlist;
>> struct xe_device *xe = gt_to_xe(q->gt);
>> @@ -401,10 +411,6 @@ static void
>> execlist_exec_queue_fini_async(struct work_struct *w)
>> list_del(&exl->active_link);
>> spin_unlock_irqrestore(&exl->port->lock, flags);
>> - drm_sched_entity_fini(&exl->entity);
>> - drm_sched_fini(&exl->sched);
>> - kfree(exl);
>> -
>> xe_exec_queue_fini(q);
>> }
>> @@ -413,10 +419,10 @@ static void execlist_exec_queue_kill(struct
>> xe_exec_queue *q)
>> /* NIY */
>> }
>> -static void execlist_exec_queue_fini(struct xe_exec_queue *q)
>> +static void execlist_exec_queue_destroy(struct xe_exec_queue *q)
>> {
>> - INIT_WORK(&q->execlist->fini_async,
>> execlist_exec_queue_fini_async);
>> - queue_work(system_unbound_wq, &q->execlist->fini_async);
>> + INIT_WORK(&q->execlist->destroy_async,
>> execlist_exec_queue_destroy_async);
>> + queue_work(system_unbound_wq, &q->execlist->destroy_async);
>> }
>> static int execlist_exec_queue_set_priority(struct xe_exec_queue *q,
>> @@ -467,6 +473,7 @@ static const struct xe_exec_queue_ops
>> execlist_exec_queue_ops = {
>> .init = execlist_exec_queue_init,
>> .kill = execlist_exec_queue_kill,
>> .fini = execlist_exec_queue_fini,
>> + .destroy = execlist_exec_queue_destroy,
>> .set_priority = execlist_exec_queue_set_priority,
>> .set_timeslice = execlist_exec_queue_set_timeslice,
>> .set_preempt_timeout = execlist_exec_queue_set_preempt_timeout,
>> diff --git a/drivers/gpu/drm/xe/xe_execlist_types.h
>> b/drivers/gpu/drm/xe/xe_execlist_types.h
>> index 415140936f11..92c4ba52db0c 100644
>> --- a/drivers/gpu/drm/xe/xe_execlist_types.h
>> +++ b/drivers/gpu/drm/xe/xe_execlist_types.h
>> @@ -42,7 +42,7 @@ struct xe_execlist_exec_queue {
>> bool has_run;
>> - struct work_struct fini_async;
>> + struct work_struct destroy_async;
>> enum xe_exec_queue_priority active_priority;
>> struct list_head active_link;
>> diff --git a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
>> b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
>> index a3f421e2adc0..c30c0e3ccbbb 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
>> @@ -35,8 +35,8 @@ struct xe_guc_exec_queue {
>> struct xe_sched_msg static_msgs[MAX_STATIC_MSG_TYPE];
>> /** @lr_tdr: long running TDR worker */
>> struct work_struct lr_tdr;
>> - /** @fini_async: do final fini async from this worker */
>> - struct work_struct fini_async;
>> + /** @destroy_async: do final destroy async from this worker */
>> + struct work_struct destroy_async;
>> /** @resume_time: time of last resume */
>> u64 resume_time;
>> /** @state: GuC specific state for this xe_exec_queue */
>> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c
>> b/drivers/gpu/drm/xe/xe_guc_submit.c
>> index 860c07da598a..75208ea4d408 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
>> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
>> @@ -1418,48 +1418,57 @@ guc_exec_queue_timedout_job(struct
>> drm_sched_job *drm_job)
>> return DRM_GPU_SCHED_STAT_NO_HANG;
>> }
>> -static void __guc_exec_queue_fini_async(struct work_struct *w)
>> +static void guc_exec_queue_fini(struct xe_exec_queue *q)
>> +{
>> + struct xe_guc_exec_queue *ge = q->guc;
>> + struct xe_guc *guc = exec_queue_to_guc(q);
>> +
>> + release_guc_id(guc, q);
>> + xe_sched_entity_fini(&ge->entity);
>> + xe_sched_fini(&ge->sched);
>> +
>> + /*
>> + * RCU free due sched being exported via DRM scheduler fences
>> + * (timeline name).
>> + */
>> + kfree_rcu(ge, rcu);
>> +}
>> +
>> +static void __guc_exec_queue_destroy_async(struct work_struct *w)
>> {
>> struct xe_guc_exec_queue *ge =
>> - container_of(w, struct xe_guc_exec_queue, fini_async);
>> + container_of(w, struct xe_guc_exec_queue, destroy_async);
>> struct xe_exec_queue *q = ge->q;
>> struct xe_guc *guc = exec_queue_to_guc(q);
>> xe_pm_runtime_get(guc_to_xe(guc));
>> trace_xe_exec_queue_destroy(q);
>> - release_guc_id(guc, q);
>> if (xe_exec_queue_is_lr(q))
>> cancel_work_sync(&ge->lr_tdr);
>> /* Confirm no work left behind accessing device structures */
>> cancel_delayed_work_sync(&ge->sched.base.work_tdr);
>> - xe_sched_entity_fini(&ge->entity);
>> - xe_sched_fini(&ge->sched);
>> - /*
>> - * RCU free due sched being exported via DRM scheduler fences
>> - * (timeline name).
>> - */
>> - kfree_rcu(ge, rcu);
>> xe_exec_queue_fini(q);
>> +
>> xe_pm_runtime_put(guc_to_xe(guc));
>> }
>> -static void guc_exec_queue_fini_async(struct xe_exec_queue *q)
>> +static void guc_exec_queue_destroy_async(struct xe_exec_queue *q)
>> {
>> struct xe_guc *guc = exec_queue_to_guc(q);
>> struct xe_device *xe = guc_to_xe(guc);
>> - INIT_WORK(&q->guc->fini_async, __guc_exec_queue_fini_async);
>> + INIT_WORK(&q->guc->destroy_async, __guc_exec_queue_destroy_async);
>> /* We must block on kernel engines so slabs are empty on
>> driver unload */
>> if (q->flags & EXEC_QUEUE_FLAG_PERMANENT || exec_queue_wedged(q))
>> - __guc_exec_queue_fini_async(&q->guc->fini_async);
>> + __guc_exec_queue_destroy_async(&q->guc->destroy_async);
>> else
>> - queue_work(xe->destroy_wq, &q->guc->fini_async);
>> + queue_work(xe->destroy_wq, &q->guc->destroy_async);
>> }
>> -static void __guc_exec_queue_fini(struct xe_guc *guc, struct
>> xe_exec_queue *q)
>> +static void __guc_exec_queue_destroy(struct xe_guc *guc, struct
>> xe_exec_queue *q)
>> {
>> /*
>> * Might be done from within the GPU scheduler, need to do
>> async as we
>> @@ -1468,7 +1477,7 @@ static void __guc_exec_queue_fini(struct xe_guc
>> *guc, struct xe_exec_queue *q)
>> * this we and don't really care when everything is fini'd,
>> just that it
>> * is.
>> */
>> - guc_exec_queue_fini_async(q);
>> + guc_exec_queue_destroy_async(q);
>> }
>> static void __guc_exec_queue_process_msg_cleanup(struct
>> xe_sched_msg *msg)
>> @@ -1482,7 +1491,7 @@ static void
>> __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg)
>> if (exec_queue_registered(q))
>> disable_scheduling_deregister(guc, q);
>> else
>> - __guc_exec_queue_fini(guc, q);
>> + __guc_exec_queue_destroy(guc, q);
>> }
>> static bool guc_exec_queue_allowed_to_change_state(struct
>> xe_exec_queue *q)
>> @@ -1715,14 +1724,14 @@ static bool guc_exec_queue_try_add_msg(struct
>> xe_exec_queue *q,
>> #define STATIC_MSG_CLEANUP 0
>> #define STATIC_MSG_SUSPEND 1
>> #define STATIC_MSG_RESUME 2
>> -static void guc_exec_queue_fini(struct xe_exec_queue *q)
>> +static void guc_exec_queue_destroy(struct xe_exec_queue *q)
>> {
>> struct xe_sched_msg *msg = q->guc->static_msgs +
>> STATIC_MSG_CLEANUP;
>> if (!(q->flags & EXEC_QUEUE_FLAG_PERMANENT) &&
>> !exec_queue_wedged(q))
>> guc_exec_queue_add_msg(q, msg, CLEANUP);
>> else
>> - __guc_exec_queue_fini(exec_queue_to_guc(q), q);
>> + __guc_exec_queue_destroy(exec_queue_to_guc(q), q);
>> }
>> static int guc_exec_queue_set_priority(struct xe_exec_queue *q,
>> @@ -1852,6 +1861,7 @@ static const struct xe_exec_queue_ops
>> guc_exec_queue_ops = {
>> .init = guc_exec_queue_init,
>> .kill = guc_exec_queue_kill,
>> .fini = guc_exec_queue_fini,
>> + .destroy = guc_exec_queue_destroy,
>> .set_priority = guc_exec_queue_set_priority,
>> .set_timeslice = guc_exec_queue_set_timeslice,
>> .set_preempt_timeout = guc_exec_queue_set_preempt_timeout,
>> @@ -1873,7 +1883,7 @@ static void guc_exec_queue_stop(struct xe_guc
>> *guc, struct xe_exec_queue *q)
>> if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
>> xe_exec_queue_put(q);
>> else if (exec_queue_destroyed(q))
>> - __guc_exec_queue_fini(guc, q);
>> + __guc_exec_queue_destroy(guc, q);
>> }
>> if (q->guc->suspend_pending) {
>> set_exec_queue_suspended(q);
>> @@ -2202,7 +2212,7 @@ static void handle_deregister_done(struct
>> xe_guc *guc, struct xe_exec_queue *q)
>> if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
>> xe_exec_queue_put(q);
>> else
>> - __guc_exec_queue_fini(guc, q);
>> + __guc_exec_queue_destroy(guc, q);
>> }
>> int xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg,
>> u32 len)
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/xe: Fix error handling if PXP fails to start
2025-09-04 20:55 ` Daniele Ceraolo Spurio
@ 2025-09-04 20:57 ` Daniele Ceraolo Spurio
2025-09-04 21:11 ` John Harrison
0 siblings, 1 reply; 11+ messages in thread
From: Daniele Ceraolo Spurio @ 2025-09-04 20:57 UTC (permalink / raw)
To: John Harrison, intel-xe; +Cc: Matthew Brost
On 9/4/2025 1:55 PM, Daniele Ceraolo Spurio wrote:
>
>
> On 9/4/2025 1:45 PM, John Harrison wrote:
>> On 8/18/2025 4:46 PM, Daniele Ceraolo Spurio wrote:
>>> Since the PXP start comes after __xe_exec_queue_init() has completed,
>>> we need to cleanup what was done in that function in case of a PXP
>>> start error.
>>> __xe_exec_queue_init calls the submission backend init() function,
>>> so we need to introduce an opposite for that. Unfortunately, while
>>> we already have a fini() function pointer, it is does perform other
>> it is does?
>>
>>> operations in addition to cleaning up what was done by the init().
>>> Therefore, for clarity, the existing fini() has been renamed to
>>> destroy(), while a new fini() has been added to only clean up what was
>>> done by the init(), with the latter being called by the former (via
>>> xe_exec_queue_fini).
>> It would be much easier to follow the changes if the rename was split
>> into a prep patch and then the behaviour change patch was just the
>> behaviour change.
>
> This is a fixes patch, so I wanted to avoid having prerequisite
> patches for it because it'll make it fail to apply.
> The other option I thought of is to do something like:
>
> patch 1 (fixes): add a new function pointer with a new name (fini_last
> ?) to undo the init() action.
> patch 2: swap the function names (fini -> destroy, fini_last -> fini)
>
> However, not sure if this is better because we'd leave unbalanced
> naming with only patch 1.
>
> Thoughts?
> Daniele
>
Thinking about it a bit more, I could also split it as you suggested for
review and then squash it before merging.
Daniele
>>
>> John.
>>
>>>
>>> Fixes: 72d479601d67 ("drm/xe/pxp/uapi: Add userspace and LRC support
>>> for PXP-using queues")
>>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>>> Cc: John Harrison <John.C.Harrison@Intel.com>
>>> Cc: Matthew Brost <matthew.brost@intel.com>
>>> ---
>>> drivers/gpu/drm/xe/xe_exec_queue.c | 24 ++++++---
>>> drivers/gpu/drm/xe/xe_exec_queue_types.h | 8 ++-
>>> drivers/gpu/drm/xe/xe_execlist.c | 25 ++++++----
>>> drivers/gpu/drm/xe/xe_execlist_types.h | 2 +-
>>> drivers/gpu/drm/xe/xe_guc_exec_queue_types.h | 4 +-
>>> drivers/gpu/drm/xe/xe_guc_submit.c | 52
>>> ++++++++++++--------
>>> 6 files changed, 74 insertions(+), 41 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c
>>> b/drivers/gpu/drm/xe/xe_exec_queue.c
>>> index 2d10a53f701d..bce507c49517 100644
>>> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
>>> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
>>> @@ -199,6 +199,18 @@ static int __xe_exec_queue_init(struct
>>> xe_exec_queue *q)
>>> return err;
>>> }
>>> +static void __xe_exec_queue_fini(struct xe_exec_queue *q)
>>> +{
>>> + int i;
>>> +
>>> + q->ops->fini(q);
>>> +
>>> + for (i = 0; i < q->width; ++i)
>>> + xe_lrc_put(q->lrc[i]);
>>> +
>>> + return;
>>> +}
>>> +
>>> struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe,
>>> struct xe_vm *vm,
>>> u32 logical_mask, u16 width,
>>> struct xe_hw_engine *hwe, u32 flags,
>>> @@ -229,11 +241,13 @@ struct xe_exec_queue
>>> *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *v
>>> if (xe_exec_queue_uses_pxp(q)) {
>>> err = xe_pxp_exec_queue_add(xe->pxp, q);
>>> if (err)
>>> - goto err_post_alloc;
>>> + goto err_post_init;
>>> }
>>> return q;
>>> +err_post_init:
>>> + __xe_exec_queue_fini(q);
>>> err_post_alloc:
>>> __xe_exec_queue_free(q);
>>> return ERR_PTR(err);
>>> @@ -331,13 +345,11 @@ void xe_exec_queue_destroy(struct kref *ref)
>>> xe_exec_queue_put(eq);
>>> }
>>> - q->ops->fini(q);
>>> + q->ops->destroy(q);
>>> }
>>> void xe_exec_queue_fini(struct xe_exec_queue *q)
>>> {
>>> - int i;
>>> -
>>> /*
>>> * Before releasing our ref to lrc and xef, accumulate our run
>>> ticks
>>> * and wakeup any waiters.
>>> @@ -346,9 +358,7 @@ void xe_exec_queue_fini(struct xe_exec_queue *q)
>>> if (q->xef &&
>>> atomic_dec_and_test(&q->xef->exec_queue.pending_removal))
>>> wake_up_var(&q->xef->exec_queue.pending_removal);
>>> - for (i = 0; i < q->width; ++i)
>>> - xe_lrc_put(q->lrc[i]);
>>> -
>>> + __xe_exec_queue_fini(q);
>>> __xe_exec_queue_free(q);
>>> }
>>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h
>>> b/drivers/gpu/drm/xe/xe_exec_queue_types.h
>>> index ba443a497b38..27b76cf9da89 100644
>>> --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
>>> +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
>>> @@ -181,8 +181,14 @@ struct xe_exec_queue_ops {
>>> int (*init)(struct xe_exec_queue *q);
>>> /** @kill: Kill inflight submissions for backend */
>>> void (*kill)(struct xe_exec_queue *q);
>>> - /** @fini: Fini exec queue for submission backend */
>>> + /** @fini: Undoes the init() for submission backend */
>>> void (*fini)(struct xe_exec_queue *q);
>>> + /**
>>> + * @destroy: Destroy exec queue for submission backend. The
>>> backend
>>> + * function must call xe_exec_queue_fini() (which will in turn
>>> call the
>>> + * fini() backend function) to ensure the queue is properly
>>> cleaned up.
>>> + */
>>> + void (*destroy)(struct xe_exec_queue *q);
>>> /** @set_priority: Set priority for exec queue */
>>> int (*set_priority)(struct xe_exec_queue *q,
>>> enum xe_exec_queue_priority priority);
>>> diff --git a/drivers/gpu/drm/xe/xe_execlist.c
>>> b/drivers/gpu/drm/xe/xe_execlist.c
>>> index 788f56b066b6..f83d421ac9d3 100644
>>> --- a/drivers/gpu/drm/xe/xe_execlist.c
>>> +++ b/drivers/gpu/drm/xe/xe_execlist.c
>>> @@ -385,10 +385,20 @@ static int execlist_exec_queue_init(struct
>>> xe_exec_queue *q)
>>> return err;
>>> }
>>> -static void execlist_exec_queue_fini_async(struct work_struct *w)
>>> +static void execlist_exec_queue_fini(struct xe_exec_queue *q)
>>> +{
>>> + struct xe_execlist_exec_queue *exl = q->execlist;
>>> +
>>> + drm_sched_entity_fini(&exl->entity);
>>> + drm_sched_fini(&exl->sched);
>>> +
>>> + kfree(exl);
>>> +}
>>> +
>>> +static void execlist_exec_queue_destroy_async(struct work_struct *w)
>>> {
>>> struct xe_execlist_exec_queue *ee =
>>> - container_of(w, struct xe_execlist_exec_queue, fini_async);
>>> + container_of(w, struct xe_execlist_exec_queue, destroy_async);
>>> struct xe_exec_queue *q = ee->q;
>>> struct xe_execlist_exec_queue *exl = q->execlist;
>>> struct xe_device *xe = gt_to_xe(q->gt);
>>> @@ -401,10 +411,6 @@ static void
>>> execlist_exec_queue_fini_async(struct work_struct *w)
>>> list_del(&exl->active_link);
>>> spin_unlock_irqrestore(&exl->port->lock, flags);
>>> - drm_sched_entity_fini(&exl->entity);
>>> - drm_sched_fini(&exl->sched);
>>> - kfree(exl);
>>> -
>>> xe_exec_queue_fini(q);
>>> }
>>> @@ -413,10 +419,10 @@ static void execlist_exec_queue_kill(struct
>>> xe_exec_queue *q)
>>> /* NIY */
>>> }
>>> -static void execlist_exec_queue_fini(struct xe_exec_queue *q)
>>> +static void execlist_exec_queue_destroy(struct xe_exec_queue *q)
>>> {
>>> - INIT_WORK(&q->execlist->fini_async,
>>> execlist_exec_queue_fini_async);
>>> - queue_work(system_unbound_wq, &q->execlist->fini_async);
>>> + INIT_WORK(&q->execlist->destroy_async,
>>> execlist_exec_queue_destroy_async);
>>> + queue_work(system_unbound_wq, &q->execlist->destroy_async);
>>> }
>>> static int execlist_exec_queue_set_priority(struct xe_exec_queue
>>> *q,
>>> @@ -467,6 +473,7 @@ static const struct xe_exec_queue_ops
>>> execlist_exec_queue_ops = {
>>> .init = execlist_exec_queue_init,
>>> .kill = execlist_exec_queue_kill,
>>> .fini = execlist_exec_queue_fini,
>>> + .destroy = execlist_exec_queue_destroy,
>>> .set_priority = execlist_exec_queue_set_priority,
>>> .set_timeslice = execlist_exec_queue_set_timeslice,
>>> .set_preempt_timeout = execlist_exec_queue_set_preempt_timeout,
>>> diff --git a/drivers/gpu/drm/xe/xe_execlist_types.h
>>> b/drivers/gpu/drm/xe/xe_execlist_types.h
>>> index 415140936f11..92c4ba52db0c 100644
>>> --- a/drivers/gpu/drm/xe/xe_execlist_types.h
>>> +++ b/drivers/gpu/drm/xe/xe_execlist_types.h
>>> @@ -42,7 +42,7 @@ struct xe_execlist_exec_queue {
>>> bool has_run;
>>> - struct work_struct fini_async;
>>> + struct work_struct destroy_async;
>>> enum xe_exec_queue_priority active_priority;
>>> struct list_head active_link;
>>> diff --git a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
>>> b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
>>> index a3f421e2adc0..c30c0e3ccbbb 100644
>>> --- a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
>>> +++ b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
>>> @@ -35,8 +35,8 @@ struct xe_guc_exec_queue {
>>> struct xe_sched_msg static_msgs[MAX_STATIC_MSG_TYPE];
>>> /** @lr_tdr: long running TDR worker */
>>> struct work_struct lr_tdr;
>>> - /** @fini_async: do final fini async from this worker */
>>> - struct work_struct fini_async;
>>> + /** @destroy_async: do final destroy async from this worker */
>>> + struct work_struct destroy_async;
>>> /** @resume_time: time of last resume */
>>> u64 resume_time;
>>> /** @state: GuC specific state for this xe_exec_queue */
>>> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c
>>> b/drivers/gpu/drm/xe/xe_guc_submit.c
>>> index 860c07da598a..75208ea4d408 100644
>>> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
>>> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
>>> @@ -1418,48 +1418,57 @@ guc_exec_queue_timedout_job(struct
>>> drm_sched_job *drm_job)
>>> return DRM_GPU_SCHED_STAT_NO_HANG;
>>> }
>>> -static void __guc_exec_queue_fini_async(struct work_struct *w)
>>> +static void guc_exec_queue_fini(struct xe_exec_queue *q)
>>> +{
>>> + struct xe_guc_exec_queue *ge = q->guc;
>>> + struct xe_guc *guc = exec_queue_to_guc(q);
>>> +
>>> + release_guc_id(guc, q);
>>> + xe_sched_entity_fini(&ge->entity);
>>> + xe_sched_fini(&ge->sched);
>>> +
>>> + /*
>>> + * RCU free due sched being exported via DRM scheduler fences
>>> + * (timeline name).
>>> + */
>>> + kfree_rcu(ge, rcu);
>>> +}
>>> +
>>> +static void __guc_exec_queue_destroy_async(struct work_struct *w)
>>> {
>>> struct xe_guc_exec_queue *ge =
>>> - container_of(w, struct xe_guc_exec_queue, fini_async);
>>> + container_of(w, struct xe_guc_exec_queue, destroy_async);
>>> struct xe_exec_queue *q = ge->q;
>>> struct xe_guc *guc = exec_queue_to_guc(q);
>>> xe_pm_runtime_get(guc_to_xe(guc));
>>> trace_xe_exec_queue_destroy(q);
>>> - release_guc_id(guc, q);
>>> if (xe_exec_queue_is_lr(q))
>>> cancel_work_sync(&ge->lr_tdr);
>>> /* Confirm no work left behind accessing device structures */
>>> cancel_delayed_work_sync(&ge->sched.base.work_tdr);
>>> - xe_sched_entity_fini(&ge->entity);
>>> - xe_sched_fini(&ge->sched);
>>> - /*
>>> - * RCU free due sched being exported via DRM scheduler fences
>>> - * (timeline name).
>>> - */
>>> - kfree_rcu(ge, rcu);
>>> xe_exec_queue_fini(q);
>>> +
>>> xe_pm_runtime_put(guc_to_xe(guc));
>>> }
>>> -static void guc_exec_queue_fini_async(struct xe_exec_queue *q)
>>> +static void guc_exec_queue_destroy_async(struct xe_exec_queue *q)
>>> {
>>> struct xe_guc *guc = exec_queue_to_guc(q);
>>> struct xe_device *xe = guc_to_xe(guc);
>>> - INIT_WORK(&q->guc->fini_async, __guc_exec_queue_fini_async);
>>> + INIT_WORK(&q->guc->destroy_async, __guc_exec_queue_destroy_async);
>>> /* We must block on kernel engines so slabs are empty on
>>> driver unload */
>>> if (q->flags & EXEC_QUEUE_FLAG_PERMANENT || exec_queue_wedged(q))
>>> - __guc_exec_queue_fini_async(&q->guc->fini_async);
>>> + __guc_exec_queue_destroy_async(&q->guc->destroy_async);
>>> else
>>> - queue_work(xe->destroy_wq, &q->guc->fini_async);
>>> + queue_work(xe->destroy_wq, &q->guc->destroy_async);
>>> }
>>> -static void __guc_exec_queue_fini(struct xe_guc *guc, struct
>>> xe_exec_queue *q)
>>> +static void __guc_exec_queue_destroy(struct xe_guc *guc, struct
>>> xe_exec_queue *q)
>>> {
>>> /*
>>> * Might be done from within the GPU scheduler, need to do
>>> async as we
>>> @@ -1468,7 +1477,7 @@ static void __guc_exec_queue_fini(struct
>>> xe_guc *guc, struct xe_exec_queue *q)
>>> * this we and don't really care when everything is fini'd,
>>> just that it
>>> * is.
>>> */
>>> - guc_exec_queue_fini_async(q);
>>> + guc_exec_queue_destroy_async(q);
>>> }
>>> static void __guc_exec_queue_process_msg_cleanup(struct
>>> xe_sched_msg *msg)
>>> @@ -1482,7 +1491,7 @@ static void
>>> __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg)
>>> if (exec_queue_registered(q))
>>> disable_scheduling_deregister(guc, q);
>>> else
>>> - __guc_exec_queue_fini(guc, q);
>>> + __guc_exec_queue_destroy(guc, q);
>>> }
>>> static bool guc_exec_queue_allowed_to_change_state(struct
>>> xe_exec_queue *q)
>>> @@ -1715,14 +1724,14 @@ static bool
>>> guc_exec_queue_try_add_msg(struct xe_exec_queue *q,
>>> #define STATIC_MSG_CLEANUP 0
>>> #define STATIC_MSG_SUSPEND 1
>>> #define STATIC_MSG_RESUME 2
>>> -static void guc_exec_queue_fini(struct xe_exec_queue *q)
>>> +static void guc_exec_queue_destroy(struct xe_exec_queue *q)
>>> {
>>> struct xe_sched_msg *msg = q->guc->static_msgs +
>>> STATIC_MSG_CLEANUP;
>>> if (!(q->flags & EXEC_QUEUE_FLAG_PERMANENT) &&
>>> !exec_queue_wedged(q))
>>> guc_exec_queue_add_msg(q, msg, CLEANUP);
>>> else
>>> - __guc_exec_queue_fini(exec_queue_to_guc(q), q);
>>> + __guc_exec_queue_destroy(exec_queue_to_guc(q), q);
>>> }
>>> static int guc_exec_queue_set_priority(struct xe_exec_queue *q,
>>> @@ -1852,6 +1861,7 @@ static const struct xe_exec_queue_ops
>>> guc_exec_queue_ops = {
>>> .init = guc_exec_queue_init,
>>> .kill = guc_exec_queue_kill,
>>> .fini = guc_exec_queue_fini,
>>> + .destroy = guc_exec_queue_destroy,
>>> .set_priority = guc_exec_queue_set_priority,
>>> .set_timeslice = guc_exec_queue_set_timeslice,
>>> .set_preempt_timeout = guc_exec_queue_set_preempt_timeout,
>>> @@ -1873,7 +1883,7 @@ static void guc_exec_queue_stop(struct xe_guc
>>> *guc, struct xe_exec_queue *q)
>>> if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
>>> xe_exec_queue_put(q);
>>> else if (exec_queue_destroyed(q))
>>> - __guc_exec_queue_fini(guc, q);
>>> + __guc_exec_queue_destroy(guc, q);
>>> }
>>> if (q->guc->suspend_pending) {
>>> set_exec_queue_suspended(q);
>>> @@ -2202,7 +2212,7 @@ static void handle_deregister_done(struct
>>> xe_guc *guc, struct xe_exec_queue *q)
>>> if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
>>> xe_exec_queue_put(q);
>>> else
>>> - __guc_exec_queue_fini(guc, q);
>>> + __guc_exec_queue_destroy(guc, q);
>>> }
>>> int xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg,
>>> u32 len)
>>
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/xe: Fix error handling if PXP fails to start
2025-09-04 20:57 ` Daniele Ceraolo Spurio
@ 2025-09-04 21:11 ` John Harrison
0 siblings, 0 replies; 11+ messages in thread
From: John Harrison @ 2025-09-04 21:11 UTC (permalink / raw)
To: Daniele Ceraolo Spurio, intel-xe; +Cc: Matthew Brost
On 9/4/2025 1:57 PM, Daniele Ceraolo Spurio wrote:
> On 9/4/2025 1:55 PM, Daniele Ceraolo Spurio wrote:
>> On 9/4/2025 1:45 PM, John Harrison wrote:
>>> On 8/18/2025 4:46 PM, Daniele Ceraolo Spurio wrote:
>>>> Since the PXP start comes after __xe_exec_queue_init() has completed,
>>>> we need to cleanup what was done in that function in case of a PXP
>>>> start error.
>>>> __xe_exec_queue_init calls the submission backend init() function,
>>>> so we need to introduce an opposite for that. Unfortunately, while
>>>> we already have a fini() function pointer, it is does perform other
>>> it is does?
>>>
>>>> operations in addition to cleaning up what was done by the init().
>>>> Therefore, for clarity, the existing fini() has been renamed to
>>>> destroy(), while a new fini() has been added to only clean up what was
>>>> done by the init(), with the latter being called by the former (via
>>>> xe_exec_queue_fini).
>>> It would be much easier to follow the changes if the rename was
>>> split into a prep patch and then the behaviour change patch was just
>>> the behaviour change.
>>
>> This is a fixes patch, so I wanted to avoid having prerequisite
>> patches for it because it'll make it fail to apply.
>> The other option I thought of is to do something like:
>>
>> patch 1 (fixes): add a new function pointer with a new name
>> (fini_last ?) to undo the init() action.
>> patch 2: swap the function names (fini -> destroy, fini_last -> fini)
>>
>> However, not sure if this is better because we'd leave unbalanced
>> naming with only patch 1.
>>
>> Thoughts?
>> Daniele
>>
>
> Thinking about it a bit more, I could also split it as you suggested
> for review and then squash it before merging.
I guess it's not really possible to only do the squash on the backported
patch but leave it split in mainline. But yeah, split then squash would
definitely help for review purposes.
Thanks,
John.
>
> Daniele
>
>>>
>>> John.
>>>
>>>>
>>>> Fixes: 72d479601d67 ("drm/xe/pxp/uapi: Add userspace and LRC
>>>> support for PXP-using queues")
>>>> Signed-off-by: Daniele Ceraolo Spurio
>>>> <daniele.ceraolospurio@intel.com>
>>>> Cc: John Harrison <John.C.Harrison@Intel.com>
>>>> Cc: Matthew Brost <matthew.brost@intel.com>
>>>> ---
>>>> drivers/gpu/drm/xe/xe_exec_queue.c | 24 ++++++---
>>>> drivers/gpu/drm/xe/xe_exec_queue_types.h | 8 ++-
>>>> drivers/gpu/drm/xe/xe_execlist.c | 25 ++++++----
>>>> drivers/gpu/drm/xe/xe_execlist_types.h | 2 +-
>>>> drivers/gpu/drm/xe/xe_guc_exec_queue_types.h | 4 +-
>>>> drivers/gpu/drm/xe/xe_guc_submit.c | 52
>>>> ++++++++++++--------
>>>> 6 files changed, 74 insertions(+), 41 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c
>>>> b/drivers/gpu/drm/xe/xe_exec_queue.c
>>>> index 2d10a53f701d..bce507c49517 100644
>>>> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
>>>> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
>>>> @@ -199,6 +199,18 @@ static int __xe_exec_queue_init(struct
>>>> xe_exec_queue *q)
>>>> return err;
>>>> }
>>>> +static void __xe_exec_queue_fini(struct xe_exec_queue *q)
>>>> +{
>>>> + int i;
>>>> +
>>>> + q->ops->fini(q);
>>>> +
>>>> + for (i = 0; i < q->width; ++i)
>>>> + xe_lrc_put(q->lrc[i]);
>>>> +
>>>> + return;
>>>> +}
>>>> +
>>>> struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe,
>>>> struct xe_vm *vm,
>>>> u32 logical_mask, u16 width,
>>>> struct xe_hw_engine *hwe, u32 flags,
>>>> @@ -229,11 +241,13 @@ struct xe_exec_queue
>>>> *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *v
>>>> if (xe_exec_queue_uses_pxp(q)) {
>>>> err = xe_pxp_exec_queue_add(xe->pxp, q);
>>>> if (err)
>>>> - goto err_post_alloc;
>>>> + goto err_post_init;
>>>> }
>>>> return q;
>>>> +err_post_init:
>>>> + __xe_exec_queue_fini(q);
>>>> err_post_alloc:
>>>> __xe_exec_queue_free(q);
>>>> return ERR_PTR(err);
>>>> @@ -331,13 +345,11 @@ void xe_exec_queue_destroy(struct kref *ref)
>>>> xe_exec_queue_put(eq);
>>>> }
>>>> - q->ops->fini(q);
>>>> + q->ops->destroy(q);
>>>> }
>>>> void xe_exec_queue_fini(struct xe_exec_queue *q)
>>>> {
>>>> - int i;
>>>> -
>>>> /*
>>>> * Before releasing our ref to lrc and xef, accumulate our
>>>> run ticks
>>>> * and wakeup any waiters.
>>>> @@ -346,9 +358,7 @@ void xe_exec_queue_fini(struct xe_exec_queue *q)
>>>> if (q->xef &&
>>>> atomic_dec_and_test(&q->xef->exec_queue.pending_removal))
>>>> wake_up_var(&q->xef->exec_queue.pending_removal);
>>>> - for (i = 0; i < q->width; ++i)
>>>> - xe_lrc_put(q->lrc[i]);
>>>> -
>>>> + __xe_exec_queue_fini(q);
>>>> __xe_exec_queue_free(q);
>>>> }
>>>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h
>>>> b/drivers/gpu/drm/xe/xe_exec_queue_types.h
>>>> index ba443a497b38..27b76cf9da89 100644
>>>> --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
>>>> +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
>>>> @@ -181,8 +181,14 @@ struct xe_exec_queue_ops {
>>>> int (*init)(struct xe_exec_queue *q);
>>>> /** @kill: Kill inflight submissions for backend */
>>>> void (*kill)(struct xe_exec_queue *q);
>>>> - /** @fini: Fini exec queue for submission backend */
>>>> + /** @fini: Undoes the init() for submission backend */
>>>> void (*fini)(struct xe_exec_queue *q);
>>>> + /**
>>>> + * @destroy: Destroy exec queue for submission backend. The
>>>> backend
>>>> + * function must call xe_exec_queue_fini() (which will in turn
>>>> call the
>>>> + * fini() backend function) to ensure the queue is properly
>>>> cleaned up.
>>>> + */
>>>> + void (*destroy)(struct xe_exec_queue *q);
>>>> /** @set_priority: Set priority for exec queue */
>>>> int (*set_priority)(struct xe_exec_queue *q,
>>>> enum xe_exec_queue_priority priority);
>>>> diff --git a/drivers/gpu/drm/xe/xe_execlist.c
>>>> b/drivers/gpu/drm/xe/xe_execlist.c
>>>> index 788f56b066b6..f83d421ac9d3 100644
>>>> --- a/drivers/gpu/drm/xe/xe_execlist.c
>>>> +++ b/drivers/gpu/drm/xe/xe_execlist.c
>>>> @@ -385,10 +385,20 @@ static int execlist_exec_queue_init(struct
>>>> xe_exec_queue *q)
>>>> return err;
>>>> }
>>>> -static void execlist_exec_queue_fini_async(struct work_struct *w)
>>>> +static void execlist_exec_queue_fini(struct xe_exec_queue *q)
>>>> +{
>>>> + struct xe_execlist_exec_queue *exl = q->execlist;
>>>> +
>>>> + drm_sched_entity_fini(&exl->entity);
>>>> + drm_sched_fini(&exl->sched);
>>>> +
>>>> + kfree(exl);
>>>> +}
>>>> +
>>>> +static void execlist_exec_queue_destroy_async(struct work_struct *w)
>>>> {
>>>> struct xe_execlist_exec_queue *ee =
>>>> - container_of(w, struct xe_execlist_exec_queue, fini_async);
>>>> + container_of(w, struct xe_execlist_exec_queue,
>>>> destroy_async);
>>>> struct xe_exec_queue *q = ee->q;
>>>> struct xe_execlist_exec_queue *exl = q->execlist;
>>>> struct xe_device *xe = gt_to_xe(q->gt);
>>>> @@ -401,10 +411,6 @@ static void
>>>> execlist_exec_queue_fini_async(struct work_struct *w)
>>>> list_del(&exl->active_link);
>>>> spin_unlock_irqrestore(&exl->port->lock, flags);
>>>> - drm_sched_entity_fini(&exl->entity);
>>>> - drm_sched_fini(&exl->sched);
>>>> - kfree(exl);
>>>> -
>>>> xe_exec_queue_fini(q);
>>>> }
>>>> @@ -413,10 +419,10 @@ static void execlist_exec_queue_kill(struct
>>>> xe_exec_queue *q)
>>>> /* NIY */
>>>> }
>>>> -static void execlist_exec_queue_fini(struct xe_exec_queue *q)
>>>> +static void execlist_exec_queue_destroy(struct xe_exec_queue *q)
>>>> {
>>>> - INIT_WORK(&q->execlist->fini_async,
>>>> execlist_exec_queue_fini_async);
>>>> - queue_work(system_unbound_wq, &q->execlist->fini_async);
>>>> + INIT_WORK(&q->execlist->destroy_async,
>>>> execlist_exec_queue_destroy_async);
>>>> + queue_work(system_unbound_wq, &q->execlist->destroy_async);
>>>> }
>>>> static int execlist_exec_queue_set_priority(struct
>>>> xe_exec_queue *q,
>>>> @@ -467,6 +473,7 @@ static const struct xe_exec_queue_ops
>>>> execlist_exec_queue_ops = {
>>>> .init = execlist_exec_queue_init,
>>>> .kill = execlist_exec_queue_kill,
>>>> .fini = execlist_exec_queue_fini,
>>>> + .destroy = execlist_exec_queue_destroy,
>>>> .set_priority = execlist_exec_queue_set_priority,
>>>> .set_timeslice = execlist_exec_queue_set_timeslice,
>>>> .set_preempt_timeout = execlist_exec_queue_set_preempt_timeout,
>>>> diff --git a/drivers/gpu/drm/xe/xe_execlist_types.h
>>>> b/drivers/gpu/drm/xe/xe_execlist_types.h
>>>> index 415140936f11..92c4ba52db0c 100644
>>>> --- a/drivers/gpu/drm/xe/xe_execlist_types.h
>>>> +++ b/drivers/gpu/drm/xe/xe_execlist_types.h
>>>> @@ -42,7 +42,7 @@ struct xe_execlist_exec_queue {
>>>> bool has_run;
>>>> - struct work_struct fini_async;
>>>> + struct work_struct destroy_async;
>>>> enum xe_exec_queue_priority active_priority;
>>>> struct list_head active_link;
>>>> diff --git a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
>>>> b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
>>>> index a3f421e2adc0..c30c0e3ccbbb 100644
>>>> --- a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
>>>> +++ b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
>>>> @@ -35,8 +35,8 @@ struct xe_guc_exec_queue {
>>>> struct xe_sched_msg static_msgs[MAX_STATIC_MSG_TYPE];
>>>> /** @lr_tdr: long running TDR worker */
>>>> struct work_struct lr_tdr;
>>>> - /** @fini_async: do final fini async from this worker */
>>>> - struct work_struct fini_async;
>>>> + /** @destroy_async: do final destroy async from this worker */
>>>> + struct work_struct destroy_async;
>>>> /** @resume_time: time of last resume */
>>>> u64 resume_time;
>>>> /** @state: GuC specific state for this xe_exec_queue */
>>>> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c
>>>> b/drivers/gpu/drm/xe/xe_guc_submit.c
>>>> index 860c07da598a..75208ea4d408 100644
>>>> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
>>>> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
>>>> @@ -1418,48 +1418,57 @@ guc_exec_queue_timedout_job(struct
>>>> drm_sched_job *drm_job)
>>>> return DRM_GPU_SCHED_STAT_NO_HANG;
>>>> }
>>>> -static void __guc_exec_queue_fini_async(struct work_struct *w)
>>>> +static void guc_exec_queue_fini(struct xe_exec_queue *q)
>>>> +{
>>>> + struct xe_guc_exec_queue *ge = q->guc;
>>>> + struct xe_guc *guc = exec_queue_to_guc(q);
>>>> +
>>>> + release_guc_id(guc, q);
>>>> + xe_sched_entity_fini(&ge->entity);
>>>> + xe_sched_fini(&ge->sched);
>>>> +
>>>> + /*
>>>> + * RCU free due sched being exported via DRM scheduler fences
>>>> + * (timeline name).
>>>> + */
>>>> + kfree_rcu(ge, rcu);
>>>> +}
>>>> +
>>>> +static void __guc_exec_queue_destroy_async(struct work_struct *w)
>>>> {
>>>> struct xe_guc_exec_queue *ge =
>>>> - container_of(w, struct xe_guc_exec_queue, fini_async);
>>>> + container_of(w, struct xe_guc_exec_queue, destroy_async);
>>>> struct xe_exec_queue *q = ge->q;
>>>> struct xe_guc *guc = exec_queue_to_guc(q);
>>>> xe_pm_runtime_get(guc_to_xe(guc));
>>>> trace_xe_exec_queue_destroy(q);
>>>> - release_guc_id(guc, q);
>>>> if (xe_exec_queue_is_lr(q))
>>>> cancel_work_sync(&ge->lr_tdr);
>>>> /* Confirm no work left behind accessing device structures */
>>>> cancel_delayed_work_sync(&ge->sched.base.work_tdr);
>>>> - xe_sched_entity_fini(&ge->entity);
>>>> - xe_sched_fini(&ge->sched);
>>>> - /*
>>>> - * RCU free due sched being exported via DRM scheduler fences
>>>> - * (timeline name).
>>>> - */
>>>> - kfree_rcu(ge, rcu);
>>>> xe_exec_queue_fini(q);
>>>> +
>>>> xe_pm_runtime_put(guc_to_xe(guc));
>>>> }
>>>> -static void guc_exec_queue_fini_async(struct xe_exec_queue *q)
>>>> +static void guc_exec_queue_destroy_async(struct xe_exec_queue *q)
>>>> {
>>>> struct xe_guc *guc = exec_queue_to_guc(q);
>>>> struct xe_device *xe = guc_to_xe(guc);
>>>> - INIT_WORK(&q->guc->fini_async, __guc_exec_queue_fini_async);
>>>> + INIT_WORK(&q->guc->destroy_async,
>>>> __guc_exec_queue_destroy_async);
>>>> /* We must block on kernel engines so slabs are empty on
>>>> driver unload */
>>>> if (q->flags & EXEC_QUEUE_FLAG_PERMANENT ||
>>>> exec_queue_wedged(q))
>>>> - __guc_exec_queue_fini_async(&q->guc->fini_async);
>>>> + __guc_exec_queue_destroy_async(&q->guc->destroy_async);
>>>> else
>>>> - queue_work(xe->destroy_wq, &q->guc->fini_async);
>>>> + queue_work(xe->destroy_wq, &q->guc->destroy_async);
>>>> }
>>>> -static void __guc_exec_queue_fini(struct xe_guc *guc, struct
>>>> xe_exec_queue *q)
>>>> +static void __guc_exec_queue_destroy(struct xe_guc *guc, struct
>>>> xe_exec_queue *q)
>>>> {
>>>> /*
>>>> * Might be done from within the GPU scheduler, need to do
>>>> async as we
>>>> @@ -1468,7 +1477,7 @@ static void __guc_exec_queue_fini(struct
>>>> xe_guc *guc, struct xe_exec_queue *q)
>>>> * this we and don't really care when everything is fini'd,
>>>> just that it
>>>> * is.
>>>> */
>>>> - guc_exec_queue_fini_async(q);
>>>> + guc_exec_queue_destroy_async(q);
>>>> }
>>>> static void __guc_exec_queue_process_msg_cleanup(struct
>>>> xe_sched_msg *msg)
>>>> @@ -1482,7 +1491,7 @@ static void
>>>> __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg)
>>>> if (exec_queue_registered(q))
>>>> disable_scheduling_deregister(guc, q);
>>>> else
>>>> - __guc_exec_queue_fini(guc, q);
>>>> + __guc_exec_queue_destroy(guc, q);
>>>> }
>>>> static bool guc_exec_queue_allowed_to_change_state(struct
>>>> xe_exec_queue *q)
>>>> @@ -1715,14 +1724,14 @@ static bool
>>>> guc_exec_queue_try_add_msg(struct xe_exec_queue *q,
>>>> #define STATIC_MSG_CLEANUP 0
>>>> #define STATIC_MSG_SUSPEND 1
>>>> #define STATIC_MSG_RESUME 2
>>>> -static void guc_exec_queue_fini(struct xe_exec_queue *q)
>>>> +static void guc_exec_queue_destroy(struct xe_exec_queue *q)
>>>> {
>>>> struct xe_sched_msg *msg = q->guc->static_msgs +
>>>> STATIC_MSG_CLEANUP;
>>>> if (!(q->flags & EXEC_QUEUE_FLAG_PERMANENT) &&
>>>> !exec_queue_wedged(q))
>>>> guc_exec_queue_add_msg(q, msg, CLEANUP);
>>>> else
>>>> - __guc_exec_queue_fini(exec_queue_to_guc(q), q);
>>>> + __guc_exec_queue_destroy(exec_queue_to_guc(q), q);
>>>> }
>>>> static int guc_exec_queue_set_priority(struct xe_exec_queue *q,
>>>> @@ -1852,6 +1861,7 @@ static const struct xe_exec_queue_ops
>>>> guc_exec_queue_ops = {
>>>> .init = guc_exec_queue_init,
>>>> .kill = guc_exec_queue_kill,
>>>> .fini = guc_exec_queue_fini,
>>>> + .destroy = guc_exec_queue_destroy,
>>>> .set_priority = guc_exec_queue_set_priority,
>>>> .set_timeslice = guc_exec_queue_set_timeslice,
>>>> .set_preempt_timeout = guc_exec_queue_set_preempt_timeout,
>>>> @@ -1873,7 +1883,7 @@ static void guc_exec_queue_stop(struct xe_guc
>>>> *guc, struct xe_exec_queue *q)
>>>> if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
>>>> xe_exec_queue_put(q);
>>>> else if (exec_queue_destroyed(q))
>>>> - __guc_exec_queue_fini(guc, q);
>>>> + __guc_exec_queue_destroy(guc, q);
>>>> }
>>>> if (q->guc->suspend_pending) {
>>>> set_exec_queue_suspended(q);
>>>> @@ -2202,7 +2212,7 @@ static void handle_deregister_done(struct
>>>> xe_guc *guc, struct xe_exec_queue *q)
>>>> if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
>>>> xe_exec_queue_put(q);
>>>> else
>>>> - __guc_exec_queue_fini(guc, q);
>>>> + __guc_exec_queue_destroy(guc, q);
>>>> }
>>>> int xe_guc_deregister_done_handler(struct xe_guc *guc, u32
>>>> *msg, u32 len)
>>>
>>
>
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2025-09-04 21:11 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-08-18 23:46 [PATCH 1/2] drm/xe: Fix error handling if PXP fails to start Daniele Ceraolo Spurio
2025-08-18 23:46 ` [PATCH 2/2] drm/xe: Allow error injection for xe_pxp_exec_queue_add Daniele Ceraolo Spurio
2025-09-04 20:46 ` John Harrison
2025-08-19 0:18 ` ✗ CI.checkpatch: warning for series starting with [1/2] drm/xe: Fix error handling if PXP fails to start Patchwork
2025-08-19 0:19 ` ✓ CI.KUnit: success " Patchwork
2025-08-19 0:52 ` ✓ Xe.CI.BAT: " Patchwork
2025-08-19 18:50 ` ✓ Xe.CI.Full: " Patchwork
2025-09-04 20:45 ` [PATCH 1/2] " John Harrison
2025-09-04 20:55 ` Daniele Ceraolo Spurio
2025-09-04 20:57 ` Daniele Ceraolo Spurio
2025-09-04 21:11 ` John Harrison
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