Re: [PATCH v4 13/13] drm/i915/cmtg: Set target_dc_state flag for lobf/psr2/pr-alpm

[Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>]

On 12-04-2026 16:07, Animesh Manna wrote:
> Set the target_dc_state in specific scenarios such as LOBF/PSR2/PR-ALPM,
> where DC3CO enablement will be targeted, allowing CMTG to be programmed.
> DC3CO enablement will be implemented in a separate patch series.
>
> Note: This patch currently added to test cmtg and need to revisit once
> DC3co enablement design in finilized.
>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++++++
>   1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index b8b6d62fb275..5de6cfde8bf5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -7342,6 +7342,7 @@ int intel_dp_compute_config_late(struct intel_encoder *encoder,
>   				 struct intel_crtc_state *crtc_state,
>   				 struct drm_connector_state *conn_state)
>   {
> +	struct intel_display *display = to_intel_display(crtc_state);
>   	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>   	int ret;
>   
> @@ -7353,6 +7354,13 @@ int intel_dp_compute_config_late(struct intel_encoder *encoder,
>   
>   	intel_alpm_lobf_compute_config_late(intel_dp, crtc_state);
>   
> +	if (DISPLAY_VER(display) >= 35 && intel_dp_is_edp(intel_dp) &&
> +	    (crtc_state->has_lobf || crtc_state->has_sel_update ||
> +	     crtc_state->has_panel_replay))
> +		intel_display_power_set_target_dc_state(display, DC_STATE_EN_DC3CO);
> +	else
> +		intel_display_power_set_target_dc_state(display, DC_STATE_EN_UPTO_DC6);
> +
>   	return 0;
>   }
>   

I have two concerns here:

1. intel_dp_compute_config_late() is part of the atomic check path. Calling
intel_display_power_set_target_dc_state() here introduces a global power
policy side effect during state computation. This is also the wrong phase
to potentially wake the display (refer intel_display_power_set_target_dc_state()),
since the atomic check path should not affect runtime power state. Normally,
the display is woken up in intel_atomic_commit_tail().

2. The target DC state is a global display power decision and should not be
derived directly from a single crtc_state. This should be computed after
considering all active CRTCs in the atomic state.