[PULL] topic/drm-intel-plane-color-pipeline for v6.19

[PULL] topic/drm-intel-plane-color-pipeline for v6.19

[Jani Nikula]

Hi Dave & Sima -

Similar to the late drm-misc-next pull request [1] for the color
pipeline support, here's the implementation for i915 and xe display, in
a topic branch based on drm-next.

BR,
Jani.


[1] https://lore.kernel.org/r/aa5cbd50-7676-4a59-bbed-e8428af86804@linux.intel.com


topic/drm-intel-plane-color-pipeline-2025-12-04:
drm/i915 topic pull request for v6.19:

Features and functionality:
- Add plane color management support (Uma, Chaitanya)

BR,
Jani.

The following changes since commit 0692602defb0c273f80dec9c564ca50726404aca:

  Merge tag 'amd-drm-next-6.19-2025-12-02' of https://gitlab.freedesktop.org/agd5f/linux into drm-next (2025-12-03 09:43:49 +1000)

are available in the Git repository at:

  https://gitlab.freedesktop.org/drm/i915/kernel.git tags/topic/drm-intel-plane-color-pipeline-2025-12-04

for you to fetch changes up to 860daa4b0d09a398a0ac9ae6fe67efd73a275968:

  drm/i915/color: Enable Plane Color Pipelines (2025-12-04 19:44:36 +0200)

----------------------------------------------------------------
drm/i915 topic pull request for v6.19:

Features and functionality:
- Add plane color management support (Uma, Chaitanya)

----------------------------------------------------------------
Chaitanya Kumar Borah (8):
      drm/i915/display: Add identifiers for driver specific blocks
      drm/i915: Add intel_color_op
      drm/i915/color: Add helper to create intel colorop
      drm/i915/color: Create a transfer function color pipeline
      drm/i915/color: Add framework to program CSC
      drm/i915/color: Preserve sign bit when int_bits is Zero
      drm/i915/color: Add registers for 3D LUT
      drm/i915/color: Add 3D LUT to color pipeline

Uma Shankar (7):
      drm/i915/color: Add plane CTM callback for D12 and beyond
      drm/i915: Add register definitions for Plane Degamma
      drm/i915: Add register definitions for Plane Post CSC
      drm/i915/color: Add framework to program PRE/POST CSC LUT
      drm/i915/color: Program Pre-CSC registers
      drm/i915/color: Program Plane Post CSC Registers
      drm/i915/color: Enable Plane Color Pipelines

 drivers/gpu/drm/i915/Makefile                      |   2 +
 drivers/gpu/drm/i915/display/intel_color.c         | 335 +++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_color.h         |   8 +-
 .../gpu/drm/i915/display/intel_color_pipeline.c    |  99 ++++++
 .../gpu/drm/i915/display/intel_color_pipeline.h    |  14 +
 drivers/gpu/drm/i915/display/intel_color_regs.h    |  29 ++
 drivers/gpu/drm/i915/display/intel_colorop.c       |  35 +++
 drivers/gpu/drm/i915/display/intel_colorop.h       |  15 +
 drivers/gpu/drm/i915/display/intel_display.c       |   5 +-
 .../gpu/drm/i915/display/intel_display_limits.h    |   9 +
 drivers/gpu/drm/i915/display/intel_display_types.h |   9 +
 drivers/gpu/drm/i915/display/intel_plane.c         |  55 ++++
 drivers/gpu/drm/i915/display/skl_universal_plane.c |  21 ++
 .../drm/i915/display/skl_universal_plane_regs.h    | 115 +++++++
 drivers/gpu/drm/xe/Makefile                        |   2 +
 15 files changed, 751 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_color_pipeline.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_color_pipeline.h
 create mode 100644 drivers/gpu/drm/i915/display/intel_colorop.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_colorop.h

-- 
Jani Nikula, Intel