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From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: <intel-gfx@lists.freedesktop.org>, <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH 2/8] drm/i915/vrr: s/intel_vrr_compute_config_late/intel_vrr_compute_guardband
Date: Mon, 13 Oct 2025 08:01:45 +0530	[thread overview]
Message-ID: <f6f004e6-99dc-4a97-b04d-610a2c345a31@intel.com> (raw)
In-Reply-To: <aOkd3YQC6ESQ-RAE@intel.com>


On 10/10/2025 8:23 PM, Ville Syrjälä wrote:
> On Thu, Oct 09, 2025 at 02:30:56PM +0530, Ankit Nautiyal wrote:
>> The helper intel_vrr_compute_config_late() practically just computes the
>> guardband. Rename intel_vrr_compute_config_late() to
>> intel_vrr_compute_guardband().
>>
>> Since we are going to compute the guardband and then move the
>> vblank_start for optmizing guardband move it to
>> intel_crtc_compute_config() which handles such changes.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
>>   drivers/gpu/drm/i915/display/intel_vrr.c     | 2 +-
>>   drivers/gpu/drm/i915/display/intel_vrr.h     | 2 +-
>>   3 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index b57efd870774..cd499e58bed3 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -2414,6 +2414,8 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state,
>>   	if (ret)
>>   		return ret;
>>   
>> +	intel_vrr_compute_guardband(crtc_state);
>> +
>>   	ret = intel_dpll_crtc_compute_clock(state, crtc);
> Hmm. The intel_dpll_crtc_compute_clock() probably needs to move to the
> very start of the function, so that we'll have an accurate clock for the
> eventual guardband calculations. In fact my plan has been to move it
> into .compute_config() entirely, but I haven't had time to revisit
> this topic in a while :/
>
> For easier bisectability I'd do that move first as a separate patch.

Ohh I missed that, will move intel_dpll_crtc_compute_clock() in the 
beginning of the function.


>
>>   	if (ret)
>>   		return ret;
> The other thing we have here is intel_crtc_compute_pipe_mode(). I have
> a feeling I didn't consider the joiner aspect at all with the prefill
> helpers. We might need the pipe_mode for the guardband calculations.
> I'll have to have a look at what I did there and think a bit more about
> how the joiner affects that stuff.

Hmm in that case I guess will move intel_vrr_compute_guardband() at the 
last or perhaps atleast after intel_crtc_compute_pipe_mode().


>
>
> And the other thing I haven't considered at all is MSO. Right now
> adjusted_mode will contain the per-segment timings with MSO which,
> now that I think about it again, migth be a bad idea (my idea IIRC).
> Eg. adjusted_mode based linetime calculations will be skewed by the
> overlap included in the segement timings.
>
> We may have to rethink the MSO apporoach to keep the full timings in
> adjusted_mode and either introduce yet another mode for the per-segment
> timings, or perhaps just do the full<->segment conversions as needed
> (set_transcoder_timings()+its readout, compute_m_n(), maybe some other
> places as well?).

I still look into the series for pre-fill, but yes now I can see how 
joiner and MSO need to be accounted for the prefill computation.

Regards,

Ankit


>
>> @@ -4722,8 +4724,6 @@ intel_modeset_pipe_config_late(struct intel_atomic_state *state,
>>   	struct drm_connector *connector;
>>   	int i;
>>   
>> -	intel_vrr_compute_config_late(crtc_state);
>> -
>>   	for_each_new_connector_in_state(&state->base, connector,
>>   					conn_state, i) {
>>   		struct intel_encoder *encoder =
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
>> index 4bc14b5e685f..8d71d7dc9d12 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>> @@ -433,7 +433,7 @@ intel_vrr_max_guardband(struct intel_crtc_state *crtc_state)
>>   		   intel_vrr_max_vblank_guardband(crtc_state));
>>   }
>>   
>> -void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
>> +void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
>>   {
>>   	struct intel_display *display = to_intel_display(crtc_state);
>>   	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
>> index 7317f8730089..bc9044621635 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
>> @@ -21,7 +21,7 @@ bool intel_vrr_possible(const struct intel_crtc_state *crtc_state);
>>   void intel_vrr_check_modeset(struct intel_atomic_state *state);
>>   void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
>>   			      struct drm_connector_state *conn_state);
>> -void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state);
>> +void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state);
>>   void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
>>   void intel_vrr_enable(const struct intel_crtc_state *crtc_state);
>>   void intel_vrr_send_push(struct intel_dsb *dsb,
>> -- 
>> 2.45.2

  reply	other threads:[~2025-10-13  2:32 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-09  9:00 [PATCH 0/8] Preparatory patches for guardband optimization Ankit Nautiyal
2025-10-09  9:00 ` [PATCH 1/8] drm/i915/vrr: Use crtc_vsync_start/end for computing vrr.vsync_start/end Ankit Nautiyal
2025-10-09  9:00 ` [PATCH 2/8] drm/i915/vrr: s/intel_vrr_compute_config_late/intel_vrr_compute_guardband Ankit Nautiyal
2025-10-10 14:53   ` Ville Syrjälä
2025-10-13  2:31     ` Nautiyal, Ankit K [this message]
2025-10-09  9:00 ` [PATCH 3/8] drm/i915/vblank: Add helper to get correct vblank length Ankit Nautiyal
2025-10-10 14:54   ` Ville Syrjälä
2025-10-09  9:00 ` [PATCH 4/8] drm/i915/psr: Consider SCL lines when validating vblank for wake latency Ankit Nautiyal
2025-10-10  6:40   ` Hogander, Jouni
2025-10-10 13:01     ` Nautiyal, Ankit K
2025-10-09  9:00 ` [PATCH 5/8] drm/i915/display: Check if final vblank is sufficient for PSR features Ankit Nautiyal
2025-10-10  6:53   ` Hogander, Jouni
2025-10-10 13:42     ` Nautiyal, Ankit K
2025-10-13 10:57       ` Hogander, Jouni
2025-10-13 12:29         ` Nautiyal, Ankit K
2025-10-09  9:01 ` [PATCH 6/8] drm/i915/vrr: Recompute vblank_start for platforms with always-on VRR TG Ankit Nautiyal
2025-10-09  9:01 ` [PATCH 7/8] drm/i915/display: Add vblank_start adjustment logic for " Ankit Nautiyal
2025-10-10 15:05   ` Ville Syrjälä
2025-10-13  2:23     ` Nautiyal, Ankit K
2025-10-09  9:01 ` [PATCH 8/8] drm/i915/display: Prepare for vblank_delay for LRR Ankit Nautiyal
2025-10-09  9:22 ` ✓ CI.KUnit: success for Preparatory patches for guardband optimization (rev2) Patchwork
2025-10-09  9:37 ` ✗ CI.checksparse: warning " Patchwork
2025-10-09 10:14 ` ✓ Xe.CI.BAT: success " Patchwork
2025-10-09 12:42 ` ✓ Xe.CI.Full: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2025-10-09  7:17 [PATCH 0/8] Preparatory patches for guardband optimization Ankit Nautiyal
2025-10-09  7:17 ` [PATCH 2/8] drm/i915/vrr: s/intel_vrr_compute_config_late/intel_vrr_compute_guardband Ankit Nautiyal

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