* [PATCH 00/10] Preparatory patches for guardband optimization
@ 2025-10-15 7:22 Ankit Nautiyal
0 siblings, 0 replies; 18+ messages in thread
From: Ankit Nautiyal @ 2025-10-15 7:22 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Ankit Nautiyal
Handle few cases which will need changes when guardband will no longer
be matched to vblank length.
- Fix the vblank_start evaluation.
- Fix PSR wake latency checks wrt to guradband.
Rev 2: PSR went through some changes recently, rebase the patches on latest
PSR changes.
Rev 3: Address comments from Ville and Jouni:
- Add a patch to move intel_dpll_crtc_compute_clock() early in the
function.
- Merge patch to adjust vblank_start and the readout changes.
- Fix agument to alpm_config_valid()
- Add documentation for retionale behind PSR late-stage configuration.
Rev 4:
- Update pipe_mode->vblank_start and actually merge patch to adjust
vblank_start and readout changes.
Rev 5:
- Reset other psr flags based on features that are dropped.
Rev 6:
- Make the order of panel_replay/sel_update flags consistent in Patch#5
- Add a patch to have separate function for
intel_psr_set_non_psr_pipes()
- Split patch to introduce intel_psr_compute_config_late() from patch to
check final vblank. Move Wa_18037818876 and
intel_psr_set_non_psr_pipes() to intel_psr_compute_config_late().
Ankit Nautiyal (10):
drm/i915/vrr: Use crtc_vsync_start/end for computing
vrr.vsync_start/end
drm/i915/display: Move intel_dpll_crtc_compute_clock early
drm/i915/vrr:
s/intel_vrr_compute_config_late/intel_vrr_compute_guardband
drm/i915/vblank: Add helper to get correct vblank length
drm/i915/psr: Consider SCL lines when validating vblank for wake
latency
drm/i915/psr: Introduce helper intel_psr_set_non_psr_pipes
drm/i915/display: Introduce dp/psr_compute_config_late()
drm/i915/psr: Check if final vblank is sufficient for PSR features
drm/i915/display: Add vblank_start adjustment logic for always-on VRR
TG
drm/i915/display: Prepare for vblank_delay for LRR
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +
drivers/gpu/drm/i915/display/intel_display.c | 18 +-
drivers/gpu/drm/i915/display/intel_dp.c | 9 +
drivers/gpu/drm/i915/display/intel_dp.h | 3 +
drivers/gpu/drm/i915/display/intel_psr.c | 251 +++++++++++++------
drivers/gpu/drm/i915/display/intel_psr.h | 2 +
drivers/gpu/drm/i915/display/intel_vblank.c | 10 +
drivers/gpu/drm/i915/display/intel_vblank.h | 2 +
drivers/gpu/drm/i915/display/intel_vrr.c | 29 ++-
drivers/gpu/drm/i915/display/intel_vrr.h | 2 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 3 +-
11 files changed, 243 insertions(+), 89 deletions(-)
--
2.45.2
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 00/10] Preparatory patches for guardband optimization
@ 2025-10-16 5:54 Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 01/10] drm/i915/vrr: Use crtc_vsync_start/end for computing vrr.vsync_start/end Ankit Nautiyal
` (15 more replies)
0 siblings, 16 replies; 18+ messages in thread
From: Ankit Nautiyal @ 2025-10-16 5:54 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Ankit Nautiyal
Handle few cases which will need changes when guardband will no longer
be matched to vblank length.
- Fix the vblank_start evaluation.
- Fix PSR wake latency checks wrt to guradband.
Rev 2: PSR went through some changes recently, rebase the patches on latest
PSR changes.
Rev 3: Address comments from Ville and Jouni:
- Add a patch to move intel_dpll_crtc_compute_clock() early in the
function.
- Merge patch to adjust vblank_start and the readout changes.
- Fix agument to alpm_config_valid()
- Add documentation for retionale behind PSR late-stage configuration.
Rev 4:
- Update pipe_mode->vblank_start and actually merge patch to adjust
vblank_start and readout changes.
Rev 5:
- Reset other psr flags based on features that are dropped.
Rev 6:
- Make the order of panel_replay/sel_update flags consistent in Patch#5
- Add a patch to have separate function for
intel_psr_set_non_psr_pipes()
- Split patch to introduce intel_psr_compute_config_late() from patch to
check final vblank. Move Wa_18037818876 and
intel_psr_set_non_psr_pipes() to intel_psr_compute_config_late().
Rev 7:
- Address comments from Jouni on Patch#8
Rev8:
- Update the return type for intel_dp_compute_config_late() in patch#7
- Add comments about pipe_mode update in patch#9
Ankit Nautiyal (10):
drm/i915/vrr: Use crtc_vsync_start/end for computing
vrr.vsync_start/end
drm/i915/display: Move intel_dpll_crtc_compute_clock early
drm/i915/vrr:
s/intel_vrr_compute_config_late/intel_vrr_compute_guardband
drm/i915/vblank: Add helper to get correct vblank length
drm/i915/psr: Consider SCL lines when validating vblank for wake
latency
drm/i915/psr: Introduce helper intel_psr_set_non_psr_pipes()
drm/i915/display: Introduce dp/psr_compute_config_late()
drm/i915/psr: Check if final vblank is sufficient for PSR features
drm/i915/display: Add vblank_start adjustment logic for always-on VRR
TG
drm/i915/display: Prepare for vblank_delay for LRR
drivers/gpu/drm/i915/display/intel_ddi.c | 7 +
drivers/gpu/drm/i915/display/intel_display.c | 18 +-
drivers/gpu/drm/i915/display/intel_dp.c | 11 +
drivers/gpu/drm/i915/display/intel_dp.h | 3 +
drivers/gpu/drm/i915/display/intel_psr.c | 244 +++++++++++++------
drivers/gpu/drm/i915/display/intel_psr.h | 2 +
drivers/gpu/drm/i915/display/intel_vblank.c | 10 +
drivers/gpu/drm/i915/display/intel_vblank.h | 2 +
drivers/gpu/drm/i915/display/intel_vrr.c | 33 ++-
drivers/gpu/drm/i915/display/intel_vrr.h | 2 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 3 +-
11 files changed, 246 insertions(+), 89 deletions(-)
--
2.45.2
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 01/10] drm/i915/vrr: Use crtc_vsync_start/end for computing vrr.vsync_start/end
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
@ 2025-10-16 5:54 ` Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 02/10] drm/i915/display: Move intel_dpll_crtc_compute_clock early Ankit Nautiyal
` (14 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Ankit Nautiyal @ 2025-10-16 5:54 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Ankit Nautiyal,
Uma Shankar
Use adjusted_mode->crtc_vsync_start/end instead of
adjusted_mode->vsync_start while computing vrr.vsync_start/end.
For most modes, these are same but for 3D/stereo modes the
crtc_vsync_start is different than vsync_start.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 190c51be5cbc..4bc14b5e685f 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -394,10 +394,10 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
if (HAS_AS_SDP(display)) {
crtc_state->vrr.vsync_start =
(crtc_state->hw.adjusted_mode.crtc_vtotal -
- crtc_state->hw.adjusted_mode.vsync_start);
+ crtc_state->hw.adjusted_mode.crtc_vsync_start);
crtc_state->vrr.vsync_end =
(crtc_state->hw.adjusted_mode.crtc_vtotal -
- crtc_state->hw.adjusted_mode.vsync_end);
+ crtc_state->hw.adjusted_mode.crtc_vsync_end);
}
}
--
2.45.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 02/10] drm/i915/display: Move intel_dpll_crtc_compute_clock early
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 01/10] drm/i915/vrr: Use crtc_vsync_start/end for computing vrr.vsync_start/end Ankit Nautiyal
@ 2025-10-16 5:54 ` Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 03/10] drm/i915/vrr: s/intel_vrr_compute_config_late/intel_vrr_compute_guardband Ankit Nautiyal
` (13 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Ankit Nautiyal @ 2025-10-16 5:54 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Ankit Nautiyal
Move intel_dpll_crtc_compute_clock in the beginning of the function so that
clocks are set before other things.
This will help in subsequent changes when the vrr guardband computation
is moved to intel_crtc_compute_config().
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d5b2612d4ec2..3f725553599e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2410,11 +2410,11 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
int ret;
- ret = intel_crtc_compute_set_context_latency(state, crtc);
+ ret = intel_dpll_crtc_compute_clock(state, crtc);
if (ret)
return ret;
- ret = intel_dpll_crtc_compute_clock(state, crtc);
+ ret = intel_crtc_compute_set_context_latency(state, crtc);
if (ret)
return ret;
--
2.45.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 03/10] drm/i915/vrr: s/intel_vrr_compute_config_late/intel_vrr_compute_guardband
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 01/10] drm/i915/vrr: Use crtc_vsync_start/end for computing vrr.vsync_start/end Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 02/10] drm/i915/display: Move intel_dpll_crtc_compute_clock early Ankit Nautiyal
@ 2025-10-16 5:54 ` Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 04/10] drm/i915/vblank: Add helper to get correct vblank length Ankit Nautiyal
` (12 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Ankit Nautiyal @ 2025-10-16 5:54 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Ankit Nautiyal
The helper intel_vrr_compute_config_late() practically just computes the
guardband. Rename intel_vrr_compute_config_late() to
intel_vrr_compute_guardband().
Since we are going to compute the guardband and then move the
vblank_start for optmizing guardband move it to
intel_crtc_compute_config() which handles such changes.
v2: Move the function at the last after clocks, pipe_mode etc. are all
set. (Ville)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_vrr.c | 2 +-
drivers/gpu/drm/i915/display/intel_vrr.h | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3f725553599e..ceee5ae99c2c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2431,6 +2431,8 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state,
if (crtc_state->has_pch_encoder)
return ilk_fdi_compute_config(crtc, crtc_state);
+ intel_vrr_compute_guardband(crtc_state);
+
return 0;
}
@@ -4722,8 +4724,6 @@ intel_modeset_pipe_config_late(struct intel_atomic_state *state,
struct drm_connector *connector;
int i;
- intel_vrr_compute_config_late(crtc_state);
-
for_each_new_connector_in_state(&state->base, connector,
conn_state, i) {
struct intel_encoder *encoder =
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 4bc14b5e685f..8d71d7dc9d12 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -433,7 +433,7 @@ intel_vrr_max_guardband(struct intel_crtc_state *crtc_state)
intel_vrr_max_vblank_guardband(crtc_state));
}
-void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
+void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index 7317f8730089..bc9044621635 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -21,7 +21,7 @@ bool intel_vrr_possible(const struct intel_crtc_state *crtc_state);
void intel_vrr_check_modeset(struct intel_atomic_state *state);
void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state);
-void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state);
+void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state);
void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
void intel_vrr_enable(const struct intel_crtc_state *crtc_state);
void intel_vrr_send_push(struct intel_dsb *dsb,
--
2.45.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 04/10] drm/i915/vblank: Add helper to get correct vblank length
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (2 preceding siblings ...)
2025-10-16 5:54 ` [PATCH 03/10] drm/i915/vrr: s/intel_vrr_compute_config_late/intel_vrr_compute_guardband Ankit Nautiyal
@ 2025-10-16 5:54 ` Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 05/10] drm/i915/psr: Consider SCL lines when validating vblank for wake latency Ankit Nautiyal
` (11 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Ankit Nautiyal @ 2025-10-16 5:54 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Ankit Nautiyal
Currently crtc_vblank_start is assumed to be the vblank_start for the fixed
refresh rate case. That value can be different from the variable refresh
rate case whenever always_use_vrr_tg()==false. On icl/tgl it's always
different due to the extra vblank delay, and also on adl+ it could be
different if we were to use an optimized guardband.
So places where crtc_vblank_start is used to compute vblank length needs
change so as to account for cases where vrr is enabled. Specifically
with vrr.enable the effective vblank length is actually guardband.
Add a helper to get the correct vblank length for both vrr and fixed
refresh rate cases. Use this helper where vblank_start is used to
compute the vblank length.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_vblank.c | 10 ++++++++++
drivers/gpu/drm/i915/display/intel_vblank.h | 2 ++
drivers/gpu/drm/i915/display/skl_watermark.c | 3 ++-
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 0b7fcc05e64c..2fc0c1c0bb87 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -767,3 +767,13 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
return scanline;
}
+
+int intel_crtc_vblank_length(const struct intel_crtc_state *crtc_state)
+{
+ const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+
+ if (crtc_state->vrr.enable)
+ return crtc_state->vrr.guardband;
+ else
+ return adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.h b/drivers/gpu/drm/i915/display/intel_vblank.h
index 21fbb08d61d5..98d04cacd65f 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.h
+++ b/drivers/gpu/drm/i915/display/intel_vblank.h
@@ -48,4 +48,6 @@ const struct intel_crtc_state *
intel_pre_commit_crtc_state(struct intel_atomic_state *state,
struct intel_crtc *crtc);
+int intel_crtc_vblank_length(const struct intel_crtc_state *crtc_state);
+
#endif /* __INTEL_VBLANK_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 9df9ee137bf9..06e5e6c77d2e 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -28,6 +28,7 @@
#include "intel_flipq.h"
#include "intel_pcode.h"
#include "intel_plane.h"
+#include "intel_vblank.h"
#include "intel_wm.h"
#include "skl_universal_plane_regs.h"
#include "skl_watermark.h"
@@ -2241,7 +2242,7 @@ skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state,
scaler_prefill_latency(crtc_state) +
dsc_prefill_latency(crtc_state) +
wm0_lines >
- adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start;
+ intel_crtc_vblank_length(crtc_state);
}
static int skl_max_wm0_lines(const struct intel_crtc_state *crtc_state)
--
2.45.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 05/10] drm/i915/psr: Consider SCL lines when validating vblank for wake latency
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (3 preceding siblings ...)
2025-10-16 5:54 ` [PATCH 04/10] drm/i915/vblank: Add helper to get correct vblank length Ankit Nautiyal
@ 2025-10-16 5:54 ` Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 06/10] drm/i915/psr: Introduce helper intel_psr_set_non_psr_pipes() Ankit Nautiyal
` (10 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Ankit Nautiyal @ 2025-10-16 5:54 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Ankit Nautiyal
Panel Replay and PSR2 selective update require sufficient vblank duration
to accommodate wake latencies. However, the current
wake_lines_fit_into_vblank() logic does not account for the minimum
Set Context Latency (SCL) lines.
Separate out _intel_psr_min_set_context_latency() to compute the minimum
SCL requirement based on platform and feature usage.
The alpm_config_valid() helper is updated to pass the necessary context for
determining whether Panel Replay or PSR2 selective update is enabled.
v2: While calling alpm_config_valid() for selective_update use false flag
instead of has_panel_replay. (Jouni)
v3: Correct ordering of the panel_replay, sel_update flags. (Jouni)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 102 ++++++++++++++---------
1 file changed, 61 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 2131473cead6..1d06011a97ce 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1361,14 +1361,64 @@ static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
return entry_setup_frames;
}
+static
+int _intel_psr_min_set_context_latency(const struct intel_crtc_state *crtc_state,
+ bool needs_panel_replay,
+ bool needs_sel_update)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+
+ if (!crtc_state->has_psr)
+ return 0;
+
+ /* Wa_14015401596 */
+ if (intel_vrr_possible(crtc_state) && IS_DISPLAY_VER(display, 13, 14))
+ return 1;
+
+ /* Rest is for SRD_STATUS needed on LunarLake and onwards */
+ if (DISPLAY_VER(display) < 20)
+ return 0;
+
+ /*
+ * Comment on SRD_STATUS register in Bspec for LunarLake and onwards:
+ *
+ * To deterministically capture the transition of the state machine
+ * going from SRDOFFACK to IDLE, the delayed V. Blank should be at least
+ * one line after the non-delayed V. Blank.
+ *
+ * Legacy TG: TRANS_SET_CONTEXT_LATENCY > 0
+ * VRR TG: TRANS_VRR_CTL[ VRR Guardband ] < (TRANS_VRR_VMAX[ VRR Vmax ]
+ * - TRANS_VTOTAL[ Vertical Active ])
+ *
+ * SRD_STATUS is used only by PSR1 on PantherLake.
+ * SRD_STATUS is used by PSR1 and Panel Replay DP on LunarLake.
+ */
+
+ if (DISPLAY_VER(display) >= 30 && (needs_panel_replay ||
+ needs_sel_update))
+ return 0;
+ else if (DISPLAY_VER(display) < 30 && (needs_sel_update ||
+ intel_crtc_has_type(crtc_state,
+ INTEL_OUTPUT_EDP)))
+ return 0;
+ else
+ return 1;
+}
+
static bool wake_lines_fit_into_vblank(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
- bool aux_less)
+ bool aux_less,
+ bool needs_panel_replay,
+ bool needs_sel_update)
{
struct intel_display *display = to_intel_display(intel_dp);
int vblank = crtc_state->hw.adjusted_mode.crtc_vblank_end -
crtc_state->hw.adjusted_mode.crtc_vblank_start;
int wake_lines;
+ int scl = _intel_psr_min_set_context_latency(crtc_state,
+ needs_panel_replay,
+ needs_sel_update);
+ vblank -= scl;
if (aux_less)
wake_lines = crtc_state->alpm_state.aux_less_wake_lines;
@@ -1390,7 +1440,9 @@ static bool wake_lines_fit_into_vblank(struct intel_dp *intel_dp,
static bool alpm_config_valid(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state,
- bool aux_less)
+ bool aux_less,
+ bool needs_panel_replay,
+ bool needs_sel_update)
{
struct intel_display *display = to_intel_display(intel_dp);
@@ -1400,7 +1452,8 @@ static bool alpm_config_valid(struct intel_dp *intel_dp,
return false;
}
- if (!wake_lines_fit_into_vblank(intel_dp, crtc_state, aux_less)) {
+ if (!wake_lines_fit_into_vblank(intel_dp, crtc_state, aux_less,
+ needs_panel_replay, needs_sel_update)) {
drm_dbg_kms(display->drm,
"PSR2/Panel Replay not enabled, too short vblank time\n");
return false;
@@ -1492,7 +1545,7 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
return false;
}
- if (!alpm_config_valid(intel_dp, crtc_state, false))
+ if (!alpm_config_valid(intel_dp, crtc_state, false, false, true))
return false;
if (!crtc_state->enable_psr2_sel_fetch &&
@@ -1643,7 +1696,7 @@ _panel_replay_compute_config(struct intel_dp *intel_dp,
return false;
}
- if (!alpm_config_valid(intel_dp, crtc_state, true))
+ if (!alpm_config_valid(intel_dp, crtc_state, true, true, false))
return false;
return true;
@@ -2371,43 +2424,10 @@ void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,
*/
int intel_psr_min_set_context_latency(const struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(crtc_state);
-
- if (!crtc_state->has_psr)
- return 0;
-
- /* Wa_14015401596 */
- if (intel_vrr_possible(crtc_state) && IS_DISPLAY_VER(display, 13, 14))
- return 1;
-
- /* Rest is for SRD_STATUS needed on LunarLake and onwards */
- if (DISPLAY_VER(display) < 20)
- return 0;
- /*
- * Comment on SRD_STATUS register in Bspec for LunarLake and onwards:
- *
- * To deterministically capture the transition of the state machine
- * going from SRDOFFACK to IDLE, the delayed V. Blank should be at least
- * one line after the non-delayed V. Blank.
- *
- * Legacy TG: TRANS_SET_CONTEXT_LATENCY > 0
- * VRR TG: TRANS_VRR_CTL[ VRR Guardband ] < (TRANS_VRR_VMAX[ VRR Vmax ]
- * - TRANS_VTOTAL[ Vertical Active ])
- *
- * SRD_STATUS is used only by PSR1 on PantherLake.
- * SRD_STATUS is used by PSR1 and Panel Replay DP on LunarLake.
- */
-
- if (DISPLAY_VER(display) >= 30 && (crtc_state->has_panel_replay ||
- crtc_state->has_sel_update))
- return 0;
- else if (DISPLAY_VER(display) < 30 && (crtc_state->has_sel_update ||
- intel_crtc_has_type(crtc_state,
- INTEL_OUTPUT_EDP)))
- return 0;
- else
- return 1;
+ return _intel_psr_min_set_context_latency(crtc_state,
+ crtc_state->has_panel_replay,
+ crtc_state->has_sel_update);
}
static u32 man_trk_ctl_enable_bit_get(struct intel_display *display)
--
2.45.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 06/10] drm/i915/psr: Introduce helper intel_psr_set_non_psr_pipes()
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (4 preceding siblings ...)
2025-10-16 5:54 ` [PATCH 05/10] drm/i915/psr: Consider SCL lines when validating vblank for wake latency Ankit Nautiyal
@ 2025-10-16 5:54 ` Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 07/10] drm/i915/display: Introduce dp/psr_compute_config_late() Ankit Nautiyal
` (9 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Ankit Nautiyal @ 2025-10-16 5:54 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Ankit Nautiyal
Add a function to set non-psr pipes in crtc_state based on psr features.
This will help to move this part later where we re-evaluate psr features
and update the non-psr pipes.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 49 ++++++++++++++----------
1 file changed, 29 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 1d06011a97ce..e97dcfa7673c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1711,15 +1711,40 @@ static bool intel_psr_needs_wa_18037818876(struct intel_dp *intel_dp,
!crtc_state->has_sel_update);
}
+static
+void intel_psr_set_non_psr_pipes(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+ struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state);
+ struct intel_crtc *crtc;
+ u8 active_pipes = 0;
+
+ /* Wa_16025596647 */
+ if (DISPLAY_VER(display) != 20 &&
+ !IS_DISPLAY_VERx100_STEP(display, 3000, STEP_A0, STEP_B0))
+ return;
+
+ /* Not needed by Panel Replay */
+ if (crtc_state->has_panel_replay)
+ return;
+
+ /* We ignore possible secondary PSR/Panel Replay capable eDP */
+ for_each_intel_crtc(display->drm, crtc)
+ active_pipes |= crtc->active ? BIT(crtc->pipe) : 0;
+
+ active_pipes = intel_calc_active_pipes(state, active_pipes);
+
+ crtc_state->active_non_psr_pipes = active_pipes &
+ ~BIT(to_intel_crtc(crtc_state->uapi.crtc)->pipe);
+}
+
void intel_psr_compute_config(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(intel_dp);
const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
- struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state);
- struct intel_crtc *crtc;
- u8 active_pipes = 0;
if (!psr_global_enabled(intel_dp)) {
drm_dbg_kms(display->drm, "PSR disabled by flag\n");
@@ -1768,23 +1793,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
"PSR disabled to workaround PSR FSM hang issue\n");
}
- /* Rest is for Wa_16025596647 */
- if (DISPLAY_VER(display) != 20 &&
- !IS_DISPLAY_VERx100_STEP(display, 3000, STEP_A0, STEP_B0))
- return;
-
- /* Not needed by Panel Replay */
- if (crtc_state->has_panel_replay)
- return;
-
- /* We ignore possible secondary PSR/Panel Replay capable eDP */
- for_each_intel_crtc(display->drm, crtc)
- active_pipes |= crtc->active ? BIT(crtc->pipe) : 0;
-
- active_pipes = intel_calc_active_pipes(state, active_pipes);
-
- crtc_state->active_non_psr_pipes = active_pipes &
- ~BIT(to_intel_crtc(crtc_state->uapi.crtc)->pipe);
+ intel_psr_set_non_psr_pipes(intel_dp, crtc_state);
}
void intel_psr_get_config(struct intel_encoder *encoder,
--
2.45.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 07/10] drm/i915/display: Introduce dp/psr_compute_config_late()
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (5 preceding siblings ...)
2025-10-16 5:54 ` [PATCH 06/10] drm/i915/psr: Introduce helper intel_psr_set_non_psr_pipes() Ankit Nautiyal
@ 2025-10-16 5:54 ` Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 08/10] drm/i915/psr: Check if final vblank is sufficient for PSR features Ankit Nautiyal
` (8 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Ankit Nautiyal @ 2025-10-16 5:54 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Ankit Nautiyal
Introduce intel_dp_compute_config_late() to handle late-stage
configuration checks for DP/eDP features. For now, it paves path for
psr_compute_config_late() to handle psr parameters that need to be
computed late.
Move the handling of psr_flag for Wa_18037818876 and setting of non-psr
pipes to intel_psr_compute_config_late() as these are the last things
to be configured for PSR features.
v2: Update dp_compute_config_late() to return int.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com> (#v1)
---
drivers/gpu/drm/i915/display/intel_ddi.c | 7 +++++++
drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++++++
drivers/gpu/drm/i915/display/intel_dp.h | 3 +++
drivers/gpu/drm/i915/display/intel_psr.c | 24 +++++++++++++++---------
drivers/gpu/drm/i915/display/intel_psr.h | 2 ++
5 files changed, 38 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index c09aa759f4d4..870140340342 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4559,6 +4559,13 @@ static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
struct intel_display *display = to_intel_display(encoder);
struct drm_connector *connector = conn_state->connector;
u8 port_sync_transcoders = 0;
+ int ret = 0;
+
+ if (intel_crtc_has_dp_encoder(crtc_state))
+ ret = intel_dp_compute_config_late(encoder, crtc_state, conn_state);
+
+ if (ret)
+ return ret;
drm_dbg_kms(display->drm, "[ENCODER:%d:%s] [CRTC:%d:%s]\n",
encoder->base.base.id, encoder->base.name,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a723e846321f..7059d55687cf 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6979,3 +6979,14 @@ void intel_dp_mst_resume(struct intel_display *display)
}
}
}
+
+int intel_dp_compute_config_late(struct intel_encoder *encoder,
+ struct intel_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state)
+{
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+
+ intel_psr_compute_config_late(intel_dp, crtc_state);
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index b379443e0211..281ced3a3b39 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -218,5 +218,8 @@ int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state,
int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector);
void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool force_on_external);
bool intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state);
+int intel_dp_compute_config_late(struct intel_encoder *encoder,
+ struct intel_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state);
#endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index e97dcfa7673c..383e6dc1ed63 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1785,15 +1785,6 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
return;
crtc_state->has_sel_update = intel_sel_update_config_valid(intel_dp, crtc_state);
-
- /* Wa_18037818876 */
- if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) {
- crtc_state->has_psr = false;
- drm_dbg_kms(display->drm,
- "PSR disabled to workaround PSR FSM hang issue\n");
- }
-
- intel_psr_set_non_psr_pipes(intel_dp, crtc_state);
}
void intel_psr_get_config(struct intel_encoder *encoder,
@@ -4355,3 +4346,18 @@ bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
{
return intel_dp_is_edp(intel_dp) && crtc_state->has_panel_replay;
}
+
+void intel_psr_compute_config_late(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+
+ /* Wa_18037818876 */
+ if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) {
+ crtc_state->has_psr = false;
+ drm_dbg_kms(display->drm,
+ "PSR disabled to workaround PSR FSM hang issue\n");
+ }
+
+ intel_psr_set_non_psr_pipes(intel_dp, crtc_state);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index 9147996d6c9e..b17ce312dc37 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -83,5 +83,7 @@ void intel_psr_debugfs_register(struct intel_display *display);
bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state);
bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
+void intel_psr_compute_config_late(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state);
#endif /* __INTEL_PSR_H__ */
--
2.45.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 08/10] drm/i915/psr: Check if final vblank is sufficient for PSR features
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (6 preceding siblings ...)
2025-10-16 5:54 ` [PATCH 07/10] drm/i915/display: Introduce dp/psr_compute_config_late() Ankit Nautiyal
@ 2025-10-16 5:54 ` Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 09/10] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG Ankit Nautiyal
` (7 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Ankit Nautiyal @ 2025-10-16 5:54 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Ankit Nautiyal
Currently, wake line latency checks rely on the vblank length,
which does not account for either the extra vblank delay for icl/tgl or for
the optimized guardband which will come into picture later at some point.
Validate whether the final vblank (with extra vblank delay) or guardband
is sufficient to support wake line latencies required by Panel Replay and
PSR2 selective update. Disable the PSR features if their wake requirements
cannot be accomodated.
v2: Add comments clarifying wake line checks and rationale for not
resetting SCL. (Jouni)
v3: Reset other psr flags based on features that are dropped. (Jouni)
v4: Update commit message.
v5: Remove early return and simplify the checking for wakelines. (Jouni)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 71 +++++++++++++++++++++---
1 file changed, 63 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 383e6dc1ed63..703e5f6af04c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1405,6 +1405,20 @@ int _intel_psr_min_set_context_latency(const struct intel_crtc_state *crtc_state
return 1;
}
+static bool _wake_lines_fit_into_vblank(const struct intel_crtc_state *crtc_state,
+ int vblank,
+ int wake_lines)
+{
+ if (crtc_state->req_psr2_sdp_prior_scanline)
+ vblank -= 1;
+
+ /* Vblank >= PSR2_CTL Block Count Number maximum line count */
+ if (vblank < wake_lines)
+ return false;
+
+ return true;
+}
+
static bool wake_lines_fit_into_vblank(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
bool aux_less,
@@ -1428,14 +1442,16 @@ static bool wake_lines_fit_into_vblank(struct intel_dp *intel_dp,
crtc_state->alpm_state.fast_wake_lines) :
crtc_state->alpm_state.io_wake_lines;
- if (crtc_state->req_psr2_sdp_prior_scanline)
- vblank -= 1;
-
- /* Vblank >= PSR2_CTL Block Count Number maximum line count */
- if (vblank < wake_lines)
- return false;
-
- return true;
+ /*
+ * Guardband has not been computed yet, so we conservatively check if the
+ * full vblank duration is sufficient to accommodate wake line requirements
+ * for PSR features like Panel Replay and Selective Update.
+ *
+ * Once the actual guardband is available, a more accurate validation is
+ * performed in intel_psr_compute_config_late(), and PSR features are
+ * disabled if wake lines exceed the available guardband.
+ */
+ return _wake_lines_fit_into_vblank(crtc_state, vblank, wake_lines);
}
static bool alpm_config_valid(struct intel_dp *intel_dp,
@@ -4351,6 +4367,45 @@ void intel_psr_compute_config_late(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(intel_dp);
+ int vblank = intel_crtc_vblank_length(crtc_state);
+ int wake_lines;
+
+ if (intel_psr_needs_alpm_aux_less(intel_dp, crtc_state))
+ wake_lines = crtc_state->alpm_state.aux_less_wake_lines;
+ else if (intel_psr_needs_alpm(intel_dp, crtc_state))
+ wake_lines = DISPLAY_VER(display) < 20 ?
+ psr2_block_count_lines(crtc_state->alpm_state.io_wake_lines,
+ crtc_state->alpm_state.fast_wake_lines) :
+ crtc_state->alpm_state.io_wake_lines;
+ else
+ wake_lines = 0;
+
+ /*
+ * Disable the PSR features if wake lines exceed the available vblank.
+ * Though SCL is computed based on these PSR features, it is not reset
+ * even if the PSR features are disabled to avoid changing vblank start
+ * at this stage.
+ */
+ if (wake_lines && !_wake_lines_fit_into_vblank(crtc_state, vblank, wake_lines)) {
+ drm_dbg_kms(display->drm,
+ "Adjusting PSR/PR mode: vblank too short for wake lines = %d\n",
+ wake_lines);
+
+ if (crtc_state->has_panel_replay) {
+ crtc_state->has_panel_replay = false;
+ /*
+ * #TODO : Add fall back to PSR/PSR2
+ * Since panel replay cannot be supported, we can fall back to PSR/PSR2.
+ * This will require calling compute_config for psr and psr2 with check for
+ * actual guardband instead of vblank_length.
+ */
+ crtc_state->has_psr = false;
+ }
+
+ crtc_state->has_sel_update = false;
+ crtc_state->enable_psr2_su_region_et = false;
+ crtc_state->enable_psr2_sel_fetch = false;
+ }
/* Wa_18037818876 */
if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) {
--
2.45.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 09/10] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (7 preceding siblings ...)
2025-10-16 5:54 ` [PATCH 08/10] drm/i915/psr: Check if final vblank is sufficient for PSR features Ankit Nautiyal
@ 2025-10-16 5:54 ` Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 10/10] drm/i915/display: Prepare for vblank_delay for LRR Ankit Nautiyal
` (6 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Ankit Nautiyal @ 2025-10-16 5:54 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Ankit Nautiyal
As we move towards using a shorter, optimized guardband, we need to adjust
how the delayed vblank start is computed.
Adjust the crtc_vblank_start using Vmin Vtotal - guardband only when
intel_vrr_always_use_vrr_tg() is true. Also update the
pipe_mode->crtc_vblank_start which is derived from
adjusted_mode->crtc_vblank_start in intel_crtc_compute_pipe_mode().
To maintain consistency between the computed and readout paths, update
the readout logic in intel_vrr_get_config() to overwrite crtc_vblank_start
with the same value (vtotal - guardband) on platforms with always-on
VRR TG.
This also paves way for guardband optimization, by handling the movement of
the crtc_vblank_start for platforms that have VRR TG always active.
v2: Drop the helper and add the adjustment directly to
intel_vrr_compute_guardband(). (Ville)
v3: Use adjusted_mode.crtc_vtotal instead of vmin and include the readout
logic to keep the compute and readout paths in sync. (Ville)
v4: Also set pipe_mode->crtc_vblank_start as its derived from
adjusted_mode. (Ville)
v5: Add a comment about rationale behind updating
pipe_mode->crtc_vblank_start. (Ville)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 27 +++++++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 8d71d7dc9d12..597008a6c744 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -436,7 +436,8 @@ intel_vrr_max_guardband(struct intel_crtc_state *crtc_state)
void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
- const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+ struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+ struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode;
if (!intel_vrr_possible(crtc_state))
return;
@@ -444,6 +445,17 @@ void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
crtc_state->vrr.guardband = min(crtc_state->vrr.vmin - adjusted_mode->crtc_vdisplay,
intel_vrr_max_guardband(crtc_state));
+ if (intel_vrr_always_use_vrr_tg(display)) {
+ adjusted_mode->crtc_vblank_start =
+ adjusted_mode->crtc_vtotal - crtc_state->vrr.guardband;
+ /*
+ * pipe_mode has already been derived from the
+ * original adjusted_mode, keep the two in sync.
+ */
+ pipe_mode->crtc_vblank_start =
+ adjusted_mode->crtc_vblank_start;
+ }
+
if (DISPLAY_VER(display) < 13)
crtc_state->vrr.pipeline_full =
intel_vrr_guardband_to_pipeline_full(crtc_state,
@@ -821,6 +833,19 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
*/
if (crtc_state->vrr.enable)
crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
+
+ /*
+ * For platforms that always use the VRR timing generator, we overwrite
+ * crtc_vblank_start with vtotal - guardband to reflect the delayed
+ * vblank start. This works for both default and optimized guardband values.
+ * On other platforms, we keep the original value from
+ * intel_get_transcoder_timings() and apply adjustments only in VRR-specific
+ * paths as needed.
+ */
+ if (intel_vrr_always_use_vrr_tg(display))
+ crtc_state->hw.adjusted_mode.crtc_vblank_start =
+ crtc_state->hw.adjusted_mode.crtc_vtotal -
+ crtc_state->vrr.guardband;
}
int intel_vrr_safe_window_start(const struct intel_crtc_state *crtc_state)
--
2.45.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 10/10] drm/i915/display: Prepare for vblank_delay for LRR
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (8 preceding siblings ...)
2025-10-16 5:54 ` [PATCH 09/10] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG Ankit Nautiyal
@ 2025-10-16 5:54 ` Ankit Nautiyal
2025-10-16 6:51 ` ✓ CI.KUnit: success for Preparatory patches for guardband optimization (rev8) Patchwork
` (5 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Ankit Nautiyal @ 2025-10-16 5:54 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Ankit Nautiyal
Update allow_vblank_delay_fastset() to permit vblank delay adjustments
during with LRR when VRR TG is always active.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index ceee5ae99c2c..65a7da694ef6 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4958,9 +4958,15 @@ static bool allow_vblank_delay_fastset(const struct intel_crtc_state *old_crtc_s
* Allow fastboot to fix up vblank delay (handled via LRR
* codepaths), a bit dodgy as the registers aren't
* double buffered but seems to be working more or less...
+ *
+ * Also allow this when the VRR timing generator is always on,
+ * and optimized guardband is used. In such cases,
+ * vblank delay may vary even without inherited state, but it's
+ * still safe as VRR guardband is still same.
*/
- return HAS_LRR(display) && old_crtc_state->inherited &&
- !intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DSI);
+ return HAS_LRR(display) &&
+ (old_crtc_state->inherited || intel_vrr_always_use_vrr_tg(display)) &&
+ !intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DSI);
}
bool
--
2.45.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* ✓ CI.KUnit: success for Preparatory patches for guardband optimization (rev8)
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (9 preceding siblings ...)
2025-10-16 5:54 ` [PATCH 10/10] drm/i915/display: Prepare for vblank_delay for LRR Ankit Nautiyal
@ 2025-10-16 6:51 ` Patchwork
2025-10-16 7:06 ` ✗ CI.checksparse: warning " Patchwork
` (4 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-10-16 6:51 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-xe
== Series Details ==
Series: Preparatory patches for guardband optimization (rev8)
URL : https://patchwork.freedesktop.org/series/155662/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[06:50:07] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:50:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:50:42] Starting KUnit Kernel (1/1)...
[06:50:42] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:50:42] ================== guc_buf (11 subtests) ===================
[06:50:42] [PASSED] test_smallest
[06:50:42] [PASSED] test_largest
[06:50:42] [PASSED] test_granular
[06:50:42] [PASSED] test_unique
[06:50:42] [PASSED] test_overlap
[06:50:42] [PASSED] test_reusable
[06:50:42] [PASSED] test_too_big
[06:50:42] [PASSED] test_flush
[06:50:42] [PASSED] test_lookup
[06:50:42] [PASSED] test_data
[06:50:42] [PASSED] test_class
[06:50:42] ===================== [PASSED] guc_buf =====================
[06:50:42] =================== guc_dbm (7 subtests) ===================
[06:50:42] [PASSED] test_empty
[06:50:42] [PASSED] test_default
[06:50:42] ======================== test_size ========================
[06:50:42] [PASSED] 4
[06:50:42] [PASSED] 8
[06:50:42] [PASSED] 32
[06:50:42] [PASSED] 256
[06:50:42] ==================== [PASSED] test_size ====================
[06:50:42] ======================= test_reuse ========================
[06:50:42] [PASSED] 4
[06:50:42] [PASSED] 8
[06:50:42] [PASSED] 32
[06:50:42] [PASSED] 256
[06:50:42] =================== [PASSED] test_reuse ====================
[06:50:42] =================== test_range_overlap ====================
[06:50:42] [PASSED] 4
[06:50:42] [PASSED] 8
[06:50:42] [PASSED] 32
[06:50:42] [PASSED] 256
[06:50:42] =============== [PASSED] test_range_overlap ================
[06:50:42] =================== test_range_compact ====================
[06:50:42] [PASSED] 4
[06:50:42] [PASSED] 8
[06:50:42] [PASSED] 32
[06:50:42] [PASSED] 256
[06:50:42] =============== [PASSED] test_range_compact ================
[06:50:42] ==================== test_range_spare =====================
[06:50:42] [PASSED] 4
[06:50:42] [PASSED] 8
[06:50:42] [PASSED] 32
[06:50:42] [PASSED] 256
[06:50:42] ================ [PASSED] test_range_spare =================
[06:50:42] ===================== [PASSED] guc_dbm =====================
[06:50:42] =================== guc_idm (6 subtests) ===================
[06:50:42] [PASSED] bad_init
[06:50:42] [PASSED] no_init
[06:50:42] [PASSED] init_fini
[06:50:42] [PASSED] check_used
[06:50:42] [PASSED] check_quota
[06:50:42] [PASSED] check_all
[06:50:42] ===================== [PASSED] guc_idm =====================
[06:50:42] ================== no_relay (3 subtests) ===================
[06:50:42] [PASSED] xe_drops_guc2pf_if_not_ready
[06:50:42] [PASSED] xe_drops_guc2vf_if_not_ready
[06:50:42] [PASSED] xe_rejects_send_if_not_ready
[06:50:42] ==================== [PASSED] no_relay =====================
[06:50:42] ================== pf_relay (14 subtests) ==================
[06:50:42] [PASSED] pf_rejects_guc2pf_too_short
[06:50:42] [PASSED] pf_rejects_guc2pf_too_long
[06:50:42] [PASSED] pf_rejects_guc2pf_no_payload
[06:50:42] [PASSED] pf_fails_no_payload
[06:50:42] [PASSED] pf_fails_bad_origin
[06:50:42] [PASSED] pf_fails_bad_type
[06:50:42] [PASSED] pf_txn_reports_error
[06:50:42] [PASSED] pf_txn_sends_pf2guc
[06:50:42] [PASSED] pf_sends_pf2guc
[06:50:42] [SKIPPED] pf_loopback_nop
[06:50:42] [SKIPPED] pf_loopback_echo
[06:50:42] [SKIPPED] pf_loopback_fail
[06:50:42] [SKIPPED] pf_loopback_busy
[06:50:43] [SKIPPED] pf_loopback_retry
[06:50:43] ==================== [PASSED] pf_relay =====================
[06:50:43] ================== vf_relay (3 subtests) ===================
[06:50:43] [PASSED] vf_rejects_guc2vf_too_short
[06:50:43] [PASSED] vf_rejects_guc2vf_too_long
[06:50:43] [PASSED] vf_rejects_guc2vf_no_payload
[06:50:43] ==================== [PASSED] vf_relay =====================
[06:50:43] ===================== lmtt (1 subtest) =====================
[06:50:43] ======================== test_ops =========================
[06:50:43] [PASSED] 2-level
[06:50:43] [PASSED] multi-level
[06:50:43] ==================== [PASSED] test_ops =====================
[06:50:43] ====================== [PASSED] lmtt =======================
[06:50:43] ================= pf_service (11 subtests) =================
[06:50:43] [PASSED] pf_negotiate_any
[06:50:43] [PASSED] pf_negotiate_base_match
[06:50:43] [PASSED] pf_negotiate_base_newer
[06:50:43] [PASSED] pf_negotiate_base_next
[06:50:43] [SKIPPED] pf_negotiate_base_older
[06:50:43] [PASSED] pf_negotiate_base_prev
[06:50:43] [PASSED] pf_negotiate_latest_match
[06:50:43] [PASSED] pf_negotiate_latest_newer
[06:50:43] [PASSED] pf_negotiate_latest_next
[06:50:43] [SKIPPED] pf_negotiate_latest_older
[06:50:43] [SKIPPED] pf_negotiate_latest_prev
[06:50:43] =================== [PASSED] pf_service ====================
[06:50:43] ================= xe_guc_g2g (2 subtests) ==================
[06:50:43] ============== xe_live_guc_g2g_kunit_default ==============
[06:50:43] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[06:50:43] ============== xe_live_guc_g2g_kunit_allmem ===============
[06:50:43] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[06:50:43] =================== [SKIPPED] xe_guc_g2g ===================
[06:50:43] =================== xe_mocs (2 subtests) ===================
[06:50:43] ================ xe_live_mocs_kernel_kunit ================
[06:50:43] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[06:50:43] ================ xe_live_mocs_reset_kunit =================
[06:50:43] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[06:50:43] ==================== [SKIPPED] xe_mocs =====================
[06:50:43] ================= xe_migrate (2 subtests) ==================
[06:50:43] ================= xe_migrate_sanity_kunit =================
[06:50:43] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[06:50:43] ================== xe_validate_ccs_kunit ==================
[06:50:43] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[06:50:43] =================== [SKIPPED] xe_migrate ===================
[06:50:43] ================== xe_dma_buf (1 subtest) ==================
[06:50:43] ==================== xe_dma_buf_kunit =====================
[06:50:43] ================ [SKIPPED] xe_dma_buf_kunit ================
[06:50:43] =================== [SKIPPED] xe_dma_buf ===================
[06:50:43] ================= xe_bo_shrink (1 subtest) =================
[06:50:43] =================== xe_bo_shrink_kunit ====================
[06:50:43] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[06:50:43] ================== [SKIPPED] xe_bo_shrink ==================
[06:50:43] ==================== xe_bo (2 subtests) ====================
[06:50:43] ================== xe_ccs_migrate_kunit ===================
[06:50:43] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[06:50:43] ==================== xe_bo_evict_kunit ====================
[06:50:43] =============== [SKIPPED] xe_bo_evict_kunit ================
[06:50:43] ===================== [SKIPPED] xe_bo ======================
[06:50:43] ==================== args (11 subtests) ====================
[06:50:43] [PASSED] count_args_test
[06:50:43] [PASSED] call_args_example
[06:50:43] [PASSED] call_args_test
[06:50:43] [PASSED] drop_first_arg_example
[06:50:43] [PASSED] drop_first_arg_test
[06:50:43] [PASSED] first_arg_example
[06:50:43] [PASSED] first_arg_test
[06:50:43] [PASSED] last_arg_example
[06:50:43] [PASSED] last_arg_test
[06:50:43] [PASSED] pick_arg_example
[06:50:43] [PASSED] sep_comma_example
[06:50:43] ====================== [PASSED] args =======================
[06:50:43] =================== xe_pci (3 subtests) ====================
[06:50:43] ==================== check_graphics_ip ====================
[06:50:43] [PASSED] 12.00 Xe_LP
[06:50:43] [PASSED] 12.10 Xe_LP+
[06:50:43] [PASSED] 12.55 Xe_HPG
[06:50:43] [PASSED] 12.60 Xe_HPC
[06:50:43] [PASSED] 12.70 Xe_LPG
[06:50:43] [PASSED] 12.71 Xe_LPG
[06:50:43] [PASSED] 12.74 Xe_LPG+
[06:50:43] [PASSED] 20.01 Xe2_HPG
[06:50:43] [PASSED] 20.02 Xe2_HPG
[06:50:43] [PASSED] 20.04 Xe2_LPG
[06:50:43] [PASSED] 30.00 Xe3_LPG
[06:50:43] [PASSED] 30.01 Xe3_LPG
[06:50:43] [PASSED] 30.03 Xe3_LPG
[06:50:43] ================ [PASSED] check_graphics_ip ================
[06:50:43] ===================== check_media_ip ======================
[06:50:43] [PASSED] 12.00 Xe_M
[06:50:43] [PASSED] 12.55 Xe_HPM
[06:50:43] [PASSED] 13.00 Xe_LPM+
[06:50:43] [PASSED] 13.01 Xe2_HPM
[06:50:43] [PASSED] 20.00 Xe2_LPM
[06:50:43] [PASSED] 30.00 Xe3_LPM
[06:50:43] [PASSED] 30.02 Xe3_LPM
[06:50:43] ================= [PASSED] check_media_ip ==================
[06:50:43] ================= check_platform_gt_count =================
[06:50:43] [PASSED] 0x9A60 (TIGERLAKE)
[06:50:43] [PASSED] 0x9A68 (TIGERLAKE)
[06:50:43] [PASSED] 0x9A70 (TIGERLAKE)
[06:50:43] [PASSED] 0x9A40 (TIGERLAKE)
[06:50:43] [PASSED] 0x9A49 (TIGERLAKE)
[06:50:43] [PASSED] 0x9A59 (TIGERLAKE)
[06:50:43] [PASSED] 0x9A78 (TIGERLAKE)
[06:50:43] [PASSED] 0x9AC0 (TIGERLAKE)
[06:50:43] [PASSED] 0x9AC9 (TIGERLAKE)
[06:50:43] [PASSED] 0x9AD9 (TIGERLAKE)
[06:50:43] [PASSED] 0x9AF8 (TIGERLAKE)
[06:50:43] [PASSED] 0x4C80 (ROCKETLAKE)
[06:50:43] [PASSED] 0x4C8A (ROCKETLAKE)
[06:50:43] [PASSED] 0x4C8B (ROCKETLAKE)
[06:50:43] [PASSED] 0x4C8C (ROCKETLAKE)
[06:50:43] [PASSED] 0x4C90 (ROCKETLAKE)
[06:50:43] [PASSED] 0x4C9A (ROCKETLAKE)
[06:50:43] [PASSED] 0x4680 (ALDERLAKE_S)
[06:50:43] [PASSED] 0x4682 (ALDERLAKE_S)
[06:50:43] [PASSED] 0x4688 (ALDERLAKE_S)
[06:50:43] [PASSED] 0x468A (ALDERLAKE_S)
[06:50:43] [PASSED] 0x468B (ALDERLAKE_S)
[06:50:43] [PASSED] 0x4690 (ALDERLAKE_S)
[06:50:43] [PASSED] 0x4692 (ALDERLAKE_S)
[06:50:43] [PASSED] 0x4693 (ALDERLAKE_S)
[06:50:43] [PASSED] 0x46A0 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46A1 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46A2 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46A3 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46A6 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46A8 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46AA (ALDERLAKE_P)
[06:50:43] [PASSED] 0x462A (ALDERLAKE_P)
[06:50:43] [PASSED] 0x4626 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x4628 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46B0 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46B1 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46B2 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46B3 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46C0 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46C1 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46C2 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46C3 (ALDERLAKE_P)
[06:50:43] [PASSED] 0x46D0 (ALDERLAKE_N)
[06:50:43] [PASSED] 0x46D1 (ALDERLAKE_N)
[06:50:43] [PASSED] 0x46D2 (ALDERLAKE_N)
[06:50:43] [PASSED] 0x46D3 (ALDERLAKE_N)
[06:50:43] [PASSED] 0x46D4 (ALDERLAKE_N)
[06:50:43] [PASSED] 0xA721 (ALDERLAKE_P)
[06:50:43] [PASSED] 0xA7A1 (ALDERLAKE_P)
[06:50:43] [PASSED] 0xA7A9 (ALDERLAKE_P)
[06:50:43] [PASSED] 0xA7AC (ALDERLAKE_P)
[06:50:43] [PASSED] 0xA7AD (ALDERLAKE_P)
[06:50:43] [PASSED] 0xA720 (ALDERLAKE_P)
[06:50:43] [PASSED] 0xA7A0 (ALDERLAKE_P)
[06:50:43] [PASSED] 0xA7A8 (ALDERLAKE_P)
[06:50:43] [PASSED] 0xA7AA (ALDERLAKE_P)
[06:50:43] [PASSED] 0xA7AB (ALDERLAKE_P)
[06:50:43] [PASSED] 0xA780 (ALDERLAKE_S)
[06:50:43] [PASSED] 0xA781 (ALDERLAKE_S)
[06:50:43] [PASSED] 0xA782 (ALDERLAKE_S)
[06:50:43] [PASSED] 0xA783 (ALDERLAKE_S)
[06:50:43] [PASSED] 0xA788 (ALDERLAKE_S)
[06:50:43] [PASSED] 0xA789 (ALDERLAKE_S)
[06:50:43] [PASSED] 0xA78A (ALDERLAKE_S)
[06:50:43] [PASSED] 0xA78B (ALDERLAKE_S)
[06:50:43] [PASSED] 0x4905 (DG1)
[06:50:43] [PASSED] 0x4906 (DG1)
[06:50:43] [PASSED] 0x4907 (DG1)
[06:50:43] [PASSED] 0x4908 (DG1)
[06:50:43] [PASSED] 0x4909 (DG1)
[06:50:43] [PASSED] 0x56C0 (DG2)
[06:50:43] [PASSED] 0x56C2 (DG2)
[06:50:43] [PASSED] 0x56C1 (DG2)
[06:50:43] [PASSED] 0x7D51 (METEORLAKE)
[06:50:43] [PASSED] 0x7DD1 (METEORLAKE)
[06:50:43] [PASSED] 0x7D41 (METEORLAKE)
[06:50:43] [PASSED] 0x7D67 (METEORLAKE)
[06:50:43] [PASSED] 0xB640 (METEORLAKE)
[06:50:43] [PASSED] 0x56A0 (DG2)
[06:50:43] [PASSED] 0x56A1 (DG2)
[06:50:43] [PASSED] 0x56A2 (DG2)
[06:50:43] [PASSED] 0x56BE (DG2)
[06:50:43] [PASSED] 0x56BF (DG2)
[06:50:43] [PASSED] 0x5690 (DG2)
[06:50:43] [PASSED] 0x5691 (DG2)
[06:50:43] [PASSED] 0x5692 (DG2)
[06:50:43] [PASSED] 0x56A5 (DG2)
[06:50:43] [PASSED] 0x56A6 (DG2)
[06:50:43] [PASSED] 0x56B0 (DG2)
[06:50:43] [PASSED] 0x56B1 (DG2)
[06:50:43] [PASSED] 0x56BA (DG2)
[06:50:43] [PASSED] 0x56BB (DG2)
[06:50:43] [PASSED] 0x56BC (DG2)
[06:50:43] [PASSED] 0x56BD (DG2)
[06:50:43] [PASSED] 0x5693 (DG2)
[06:50:43] [PASSED] 0x5694 (DG2)
[06:50:43] [PASSED] 0x5695 (DG2)
[06:50:43] [PASSED] 0x56A3 (DG2)
[06:50:43] [PASSED] 0x56A4 (DG2)
[06:50:43] [PASSED] 0x56B2 (DG2)
[06:50:43] [PASSED] 0x56B3 (DG2)
[06:50:43] [PASSED] 0x5696 (DG2)
[06:50:43] [PASSED] 0x5697 (DG2)
[06:50:43] [PASSED] 0xB69 (PVC)
[06:50:43] [PASSED] 0xB6E (PVC)
[06:50:43] [PASSED] 0xBD4 (PVC)
[06:50:43] [PASSED] 0xBD5 (PVC)
[06:50:43] [PASSED] 0xBD6 (PVC)
[06:50:43] [PASSED] 0xBD7 (PVC)
[06:50:43] [PASSED] 0xBD8 (PVC)
[06:50:43] [PASSED] 0xBD9 (PVC)
[06:50:43] [PASSED] 0xBDA (PVC)
[06:50:43] [PASSED] 0xBDB (PVC)
[06:50:43] [PASSED] 0xBE0 (PVC)
[06:50:43] [PASSED] 0xBE1 (PVC)
[06:50:43] [PASSED] 0xBE5 (PVC)
[06:50:43] [PASSED] 0x7D40 (METEORLAKE)
[06:50:43] [PASSED] 0x7D45 (METEORLAKE)
[06:50:43] [PASSED] 0x7D55 (METEORLAKE)
[06:50:43] [PASSED] 0x7D60 (METEORLAKE)
[06:50:43] [PASSED] 0x7DD5 (METEORLAKE)
[06:50:43] [PASSED] 0x6420 (LUNARLAKE)
[06:50:43] [PASSED] 0x64A0 (LUNARLAKE)
[06:50:43] [PASSED] 0x64B0 (LUNARLAKE)
[06:50:43] [PASSED] 0xE202 (BATTLEMAGE)
[06:50:43] [PASSED] 0xE209 (BATTLEMAGE)
[06:50:43] [PASSED] 0xE20B (BATTLEMAGE)
[06:50:43] [PASSED] 0xE20C (BATTLEMAGE)
[06:50:43] [PASSED] 0xE20D (BATTLEMAGE)
[06:50:43] [PASSED] 0xE210 (BATTLEMAGE)
[06:50:43] [PASSED] 0xE211 (BATTLEMAGE)
[06:50:43] [PASSED] 0xE212 (BATTLEMAGE)
[06:50:43] [PASSED] 0xE216 (BATTLEMAGE)
[06:50:43] [PASSED] 0xE220 (BATTLEMAGE)
[06:50:43] [PASSED] 0xE221 (BATTLEMAGE)
[06:50:43] [PASSED] 0xE222 (BATTLEMAGE)
[06:50:43] [PASSED] 0xE223 (BATTLEMAGE)
[06:50:43] [PASSED] 0xB080 (PANTHERLAKE)
[06:50:43] [PASSED] 0xB081 (PANTHERLAKE)
[06:50:43] [PASSED] 0xB082 (PANTHERLAKE)
[06:50:43] [PASSED] 0xB083 (PANTHERLAKE)
[06:50:43] [PASSED] 0xB084 (PANTHERLAKE)
[06:50:43] [PASSED] 0xB085 (PANTHERLAKE)
[06:50:43] [PASSED] 0xB086 (PANTHERLAKE)
[06:50:43] [PASSED] 0xB087 (PANTHERLAKE)
[06:50:43] [PASSED] 0xB08F (PANTHERLAKE)
[06:50:43] [PASSED] 0xB090 (PANTHERLAKE)
[06:50:43] [PASSED] 0xB0A0 (PANTHERLAKE)
[06:50:43] [PASSED] 0xB0B0 (PANTHERLAKE)
[06:50:43] [PASSED] 0xFD80 (PANTHERLAKE)
[06:50:43] [PASSED] 0xFD81 (PANTHERLAKE)
[06:50:43] ============= [PASSED] check_platform_gt_count =============
[06:50:43] ===================== [PASSED] xe_pci ======================
[06:50:43] =================== xe_rtp (2 subtests) ====================
[06:50:43] =============== xe_rtp_process_to_sr_tests ================
[06:50:43] [PASSED] coalesce-same-reg
[06:50:43] [PASSED] no-match-no-add
[06:50:43] [PASSED] match-or
[06:50:43] [PASSED] match-or-xfail
[06:50:43] [PASSED] no-match-no-add-multiple-rules
[06:50:43] [PASSED] two-regs-two-entries
[06:50:43] [PASSED] clr-one-set-other
[06:50:43] [PASSED] set-field
[06:50:43] [PASSED] conflict-duplicate
[06:50:43] [PASSED] conflict-not-disjoint
[06:50:43] [PASSED] conflict-reg-type
[06:50:43] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[06:50:43] ================== xe_rtp_process_tests ===================
[06:50:43] [PASSED] active1
[06:50:43] [PASSED] active2
[06:50:43] [PASSED] active-inactive
[06:50:43] [PASSED] inactive-active
[06:50:43] [PASSED] inactive-1st_or_active-inactive
[06:50:43] [PASSED] inactive-2nd_or_active-inactive
[06:50:43] [PASSED] inactive-last_or_active-inactive
[06:50:43] [PASSED] inactive-no_or_active-inactive
[06:50:43] ============== [PASSED] xe_rtp_process_tests ===============
[06:50:43] ===================== [PASSED] xe_rtp ======================
[06:50:43] ==================== xe_wa (1 subtest) =====================
[06:50:43] ======================== xe_wa_gt =========================
[06:50:43] [PASSED] TIGERLAKE B0
[06:50:43] [PASSED] DG1 A0
[06:50:43] [PASSED] DG1 B0
[06:50:43] [PASSED] ALDERLAKE_S A0
[06:50:43] [PASSED] ALDERLAKE_S B0
stty: 'standard input': Inappropriate ioctl for device
[06:50:43] [PASSED] ALDERLAKE_S C0
[06:50:43] [PASSED] ALDERLAKE_S D0
[06:50:43] [PASSED] ALDERLAKE_P A0
[06:50:43] [PASSED] ALDERLAKE_P B0
[06:50:43] [PASSED] ALDERLAKE_P C0
[06:50:43] [PASSED] ALDERLAKE_S RPLS D0
[06:50:43] [PASSED] ALDERLAKE_P RPLU E0
[06:50:43] [PASSED] DG2 G10 C0
[06:50:43] [PASSED] DG2 G11 B1
[06:50:43] [PASSED] DG2 G12 A1
[06:50:43] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:50:43] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:50:43] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[06:50:43] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[06:50:43] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[06:50:43] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[06:50:43] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[06:50:43] ==================== [PASSED] xe_wa_gt =====================
[06:50:43] ====================== [PASSED] xe_wa ======================
[06:50:43] ============================================================
[06:50:43] Testing complete. Ran 306 tests: passed: 288, skipped: 18
[06:50:43] Elapsed time: 35.424s total, 4.224s configuring, 30.834s building, 0.321s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[06:50:43] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:50:44] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:51:09] Starting KUnit Kernel (1/1)...
[06:51:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:51:09] ============ drm_test_pick_cmdline (2 subtests) ============
[06:51:09] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[06:51:09] =============== drm_test_pick_cmdline_named ===============
[06:51:09] [PASSED] NTSC
[06:51:09] [PASSED] NTSC-J
[06:51:09] [PASSED] PAL
[06:51:09] [PASSED] PAL-M
[06:51:09] =========== [PASSED] drm_test_pick_cmdline_named ===========
[06:51:09] ============== [PASSED] drm_test_pick_cmdline ==============
[06:51:09] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[06:51:09] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[06:51:09] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[06:51:09] =========== drm_validate_clone_mode (2 subtests) ===========
[06:51:09] ============== drm_test_check_in_clone_mode ===============
[06:51:09] [PASSED] in_clone_mode
[06:51:09] [PASSED] not_in_clone_mode
[06:51:09] ========== [PASSED] drm_test_check_in_clone_mode ===========
[06:51:09] =============== drm_test_check_valid_clones ===============
[06:51:09] [PASSED] not_in_clone_mode
[06:51:09] [PASSED] valid_clone
[06:51:09] [PASSED] invalid_clone
[06:51:09] =========== [PASSED] drm_test_check_valid_clones ===========
[06:51:09] ============= [PASSED] drm_validate_clone_mode =============
[06:51:09] ============= drm_validate_modeset (1 subtest) =============
[06:51:09] [PASSED] drm_test_check_connector_changed_modeset
[06:51:09] ============== [PASSED] drm_validate_modeset ===============
[06:51:09] ====== drm_test_bridge_get_current_state (2 subtests) ======
[06:51:09] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[06:51:09] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[06:51:09] ======== [PASSED] drm_test_bridge_get_current_state ========
[06:51:09] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[06:51:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[06:51:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[06:51:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[06:51:09] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[06:51:09] ============== drm_bridge_alloc (2 subtests) ===============
[06:51:09] [PASSED] drm_test_drm_bridge_alloc_basic
[06:51:09] [PASSED] drm_test_drm_bridge_alloc_get_put
[06:51:09] ================ [PASSED] drm_bridge_alloc =================
[06:51:09] ================== drm_buddy (8 subtests) ==================
[06:51:09] [PASSED] drm_test_buddy_alloc_limit
[06:51:09] [PASSED] drm_test_buddy_alloc_optimistic
[06:51:09] [PASSED] drm_test_buddy_alloc_pessimistic
[06:51:09] [PASSED] drm_test_buddy_alloc_pathological
[06:51:09] [PASSED] drm_test_buddy_alloc_contiguous
[06:51:09] [PASSED] drm_test_buddy_alloc_clear
[06:51:09] [PASSED] drm_test_buddy_alloc_range_bias
[06:51:10] [PASSED] drm_test_buddy_fragmentation_performance
[06:51:10] ==================== [PASSED] drm_buddy ====================
[06:51:10] ============= drm_cmdline_parser (40 subtests) =============
[06:51:10] [PASSED] drm_test_cmdline_force_d_only
[06:51:10] [PASSED] drm_test_cmdline_force_D_only_dvi
[06:51:10] [PASSED] drm_test_cmdline_force_D_only_hdmi
[06:51:10] [PASSED] drm_test_cmdline_force_D_only_not_digital
[06:51:10] [PASSED] drm_test_cmdline_force_e_only
[06:51:10] [PASSED] drm_test_cmdline_res
[06:51:10] [PASSED] drm_test_cmdline_res_vesa
[06:51:10] [PASSED] drm_test_cmdline_res_vesa_rblank
[06:51:10] [PASSED] drm_test_cmdline_res_rblank
[06:51:10] [PASSED] drm_test_cmdline_res_bpp
[06:51:10] [PASSED] drm_test_cmdline_res_refresh
[06:51:10] [PASSED] drm_test_cmdline_res_bpp_refresh
[06:51:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[06:51:10] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[06:51:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[06:51:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[06:51:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[06:51:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[06:51:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[06:51:10] [PASSED] drm_test_cmdline_res_margins_force_on
[06:51:10] [PASSED] drm_test_cmdline_res_vesa_margins
[06:51:10] [PASSED] drm_test_cmdline_name
[06:51:10] [PASSED] drm_test_cmdline_name_bpp
[06:51:10] [PASSED] drm_test_cmdline_name_option
[06:51:10] [PASSED] drm_test_cmdline_name_bpp_option
[06:51:10] [PASSED] drm_test_cmdline_rotate_0
[06:51:10] [PASSED] drm_test_cmdline_rotate_90
[06:51:10] [PASSED] drm_test_cmdline_rotate_180
[06:51:10] [PASSED] drm_test_cmdline_rotate_270
[06:51:10] [PASSED] drm_test_cmdline_hmirror
[06:51:10] [PASSED] drm_test_cmdline_vmirror
[06:51:10] [PASSED] drm_test_cmdline_margin_options
[06:51:10] [PASSED] drm_test_cmdline_multiple_options
[06:51:10] [PASSED] drm_test_cmdline_bpp_extra_and_option
[06:51:10] [PASSED] drm_test_cmdline_extra_and_option
[06:51:10] [PASSED] drm_test_cmdline_freestanding_options
[06:51:10] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[06:51:10] [PASSED] drm_test_cmdline_panel_orientation
[06:51:10] ================ drm_test_cmdline_invalid =================
[06:51:10] [PASSED] margin_only
[06:51:10] [PASSED] interlace_only
[06:51:10] [PASSED] res_missing_x
[06:51:10] [PASSED] res_missing_y
[06:51:10] [PASSED] res_bad_y
[06:51:10] [PASSED] res_missing_y_bpp
[06:51:10] [PASSED] res_bad_bpp
[06:51:10] [PASSED] res_bad_refresh
[06:51:10] [PASSED] res_bpp_refresh_force_on_off
[06:51:10] [PASSED] res_invalid_mode
[06:51:10] [PASSED] res_bpp_wrong_place_mode
[06:51:10] [PASSED] name_bpp_refresh
[06:51:10] [PASSED] name_refresh
[06:51:10] [PASSED] name_refresh_wrong_mode
[06:51:10] [PASSED] name_refresh_invalid_mode
[06:51:10] [PASSED] rotate_multiple
[06:51:10] [PASSED] rotate_invalid_val
[06:51:10] [PASSED] rotate_truncated
[06:51:10] [PASSED] invalid_option
[06:51:10] [PASSED] invalid_tv_option
[06:51:10] [PASSED] truncated_tv_option
[06:51:10] ============ [PASSED] drm_test_cmdline_invalid =============
[06:51:10] =============== drm_test_cmdline_tv_options ===============
[06:51:10] [PASSED] NTSC
[06:51:10] [PASSED] NTSC_443
[06:51:10] [PASSED] NTSC_J
[06:51:10] [PASSED] PAL
[06:51:10] [PASSED] PAL_M
[06:51:10] [PASSED] PAL_N
[06:51:10] [PASSED] SECAM
[06:51:10] [PASSED] MONO_525
[06:51:10] [PASSED] MONO_625
[06:51:10] =========== [PASSED] drm_test_cmdline_tv_options ===========
[06:51:10] =============== [PASSED] drm_cmdline_parser ================
[06:51:10] ========== drmm_connector_hdmi_init (20 subtests) ==========
[06:51:10] [PASSED] drm_test_connector_hdmi_init_valid
[06:51:10] [PASSED] drm_test_connector_hdmi_init_bpc_8
[06:51:10] [PASSED] drm_test_connector_hdmi_init_bpc_10
[06:51:10] [PASSED] drm_test_connector_hdmi_init_bpc_12
[06:51:10] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[06:51:10] [PASSED] drm_test_connector_hdmi_init_bpc_null
[06:51:10] [PASSED] drm_test_connector_hdmi_init_formats_empty
[06:51:10] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[06:51:10] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:51:10] [PASSED] supported_formats=0x9 yuv420_allowed=1
[06:51:10] [PASSED] supported_formats=0x9 yuv420_allowed=0
[06:51:10] [PASSED] supported_formats=0x3 yuv420_allowed=1
[06:51:10] [PASSED] supported_formats=0x3 yuv420_allowed=0
[06:51:10] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:51:10] [PASSED] drm_test_connector_hdmi_init_null_ddc
[06:51:10] [PASSED] drm_test_connector_hdmi_init_null_product
[06:51:10] [PASSED] drm_test_connector_hdmi_init_null_vendor
[06:51:10] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[06:51:10] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[06:51:10] [PASSED] drm_test_connector_hdmi_init_product_valid
[06:51:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[06:51:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[06:51:10] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[06:51:10] ========= drm_test_connector_hdmi_init_type_valid =========
[06:51:10] [PASSED] HDMI-A
[06:51:10] [PASSED] HDMI-B
[06:51:10] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[06:51:10] ======== drm_test_connector_hdmi_init_type_invalid ========
[06:51:10] [PASSED] Unknown
[06:51:10] [PASSED] VGA
[06:51:10] [PASSED] DVI-I
[06:51:10] [PASSED] DVI-D
[06:51:10] [PASSED] DVI-A
[06:51:10] [PASSED] Composite
[06:51:10] [PASSED] SVIDEO
[06:51:10] [PASSED] LVDS
[06:51:10] [PASSED] Component
[06:51:10] [PASSED] DIN
[06:51:10] [PASSED] DP
[06:51:10] [PASSED] TV
[06:51:10] [PASSED] eDP
[06:51:10] [PASSED] Virtual
[06:51:10] [PASSED] DSI
[06:51:10] [PASSED] DPI
[06:51:10] [PASSED] Writeback
[06:51:10] [PASSED] SPI
[06:51:10] [PASSED] USB
[06:51:10] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[06:51:10] ============ [PASSED] drmm_connector_hdmi_init =============
[06:51:10] ============= drmm_connector_init (3 subtests) =============
[06:51:10] [PASSED] drm_test_drmm_connector_init
[06:51:10] [PASSED] drm_test_drmm_connector_init_null_ddc
[06:51:10] ========= drm_test_drmm_connector_init_type_valid =========
[06:51:10] [PASSED] Unknown
[06:51:10] [PASSED] VGA
[06:51:10] [PASSED] DVI-I
[06:51:10] [PASSED] DVI-D
[06:51:10] [PASSED] DVI-A
[06:51:10] [PASSED] Composite
[06:51:10] [PASSED] SVIDEO
[06:51:10] [PASSED] LVDS
[06:51:10] [PASSED] Component
[06:51:10] [PASSED] DIN
[06:51:10] [PASSED] DP
[06:51:10] [PASSED] HDMI-A
[06:51:10] [PASSED] HDMI-B
[06:51:10] [PASSED] TV
[06:51:10] [PASSED] eDP
[06:51:10] [PASSED] Virtual
[06:51:10] [PASSED] DSI
[06:51:10] [PASSED] DPI
[06:51:10] [PASSED] Writeback
[06:51:10] [PASSED] SPI
[06:51:10] [PASSED] USB
[06:51:10] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[06:51:10] =============== [PASSED] drmm_connector_init ===============
[06:51:10] ========= drm_connector_dynamic_init (6 subtests) ==========
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_init
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_init_properties
[06:51:10] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[06:51:10] [PASSED] Unknown
[06:51:10] [PASSED] VGA
[06:51:10] [PASSED] DVI-I
[06:51:10] [PASSED] DVI-D
[06:51:10] [PASSED] DVI-A
[06:51:10] [PASSED] Composite
[06:51:10] [PASSED] SVIDEO
[06:51:10] [PASSED] LVDS
[06:51:10] [PASSED] Component
[06:51:10] [PASSED] DIN
[06:51:10] [PASSED] DP
[06:51:10] [PASSED] HDMI-A
[06:51:10] [PASSED] HDMI-B
[06:51:10] [PASSED] TV
[06:51:10] [PASSED] eDP
[06:51:10] [PASSED] Virtual
[06:51:10] [PASSED] DSI
[06:51:10] [PASSED] DPI
[06:51:10] [PASSED] Writeback
[06:51:10] [PASSED] SPI
[06:51:10] [PASSED] USB
[06:51:10] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[06:51:10] ======== drm_test_drm_connector_dynamic_init_name =========
[06:51:10] [PASSED] Unknown
[06:51:10] [PASSED] VGA
[06:51:10] [PASSED] DVI-I
[06:51:10] [PASSED] DVI-D
[06:51:10] [PASSED] DVI-A
[06:51:10] [PASSED] Composite
[06:51:10] [PASSED] SVIDEO
[06:51:10] [PASSED] LVDS
[06:51:10] [PASSED] Component
[06:51:10] [PASSED] DIN
[06:51:10] [PASSED] DP
[06:51:10] [PASSED] HDMI-A
[06:51:10] [PASSED] HDMI-B
[06:51:10] [PASSED] TV
[06:51:10] [PASSED] eDP
[06:51:10] [PASSED] Virtual
[06:51:10] [PASSED] DSI
[06:51:10] [PASSED] DPI
[06:51:10] [PASSED] Writeback
[06:51:10] [PASSED] SPI
[06:51:10] [PASSED] USB
[06:51:10] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[06:51:10] =========== [PASSED] drm_connector_dynamic_init ============
[06:51:10] ==== drm_connector_dynamic_register_early (4 subtests) =====
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[06:51:10] ====== [PASSED] drm_connector_dynamic_register_early =======
[06:51:10] ======= drm_connector_dynamic_register (7 subtests) ========
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[06:51:10] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[06:51:10] ========= [PASSED] drm_connector_dynamic_register ==========
[06:51:10] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[06:51:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[06:51:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[06:51:10] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[06:51:10] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[06:51:10] ========== drm_test_get_tv_mode_from_name_valid ===========
[06:51:10] [PASSED] NTSC
[06:51:10] [PASSED] NTSC-443
[06:51:10] [PASSED] NTSC-J
[06:51:10] [PASSED] PAL
[06:51:10] [PASSED] PAL-M
[06:51:10] [PASSED] PAL-N
[06:51:10] [PASSED] SECAM
[06:51:10] [PASSED] Mono
[06:51:10] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[06:51:10] [PASSED] drm_test_get_tv_mode_from_name_truncated
[06:51:10] ============ [PASSED] drm_get_tv_mode_from_name ============
[06:51:10] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[06:51:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[06:51:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[06:51:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[06:51:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[06:51:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[06:51:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[06:51:10] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[06:51:10] [PASSED] VIC 96
[06:51:10] [PASSED] VIC 97
[06:51:10] [PASSED] VIC 101
[06:51:10] [PASSED] VIC 102
[06:51:10] [PASSED] VIC 106
[06:51:10] [PASSED] VIC 107
[06:51:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[06:51:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[06:51:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[06:51:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[06:51:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[06:51:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[06:51:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[06:51:10] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[06:51:10] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[06:51:10] [PASSED] Automatic
[06:51:10] [PASSED] Full
[06:51:10] [PASSED] Limited 16:235
[06:51:10] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[06:51:10] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[06:51:10] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[06:51:10] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[06:51:10] === drm_test_drm_hdmi_connector_get_output_format_name ====
[06:51:10] [PASSED] RGB
[06:51:10] [PASSED] YUV 4:2:0
[06:51:10] [PASSED] YUV 4:2:2
[06:51:10] [PASSED] YUV 4:4:4
[06:51:10] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[06:51:10] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[06:51:10] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[06:51:10] ============= drm_damage_helper (21 subtests) ==============
[06:51:10] [PASSED] drm_test_damage_iter_no_damage
[06:51:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[06:51:10] [PASSED] drm_test_damage_iter_no_damage_src_moved
[06:51:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[06:51:10] [PASSED] drm_test_damage_iter_no_damage_not_visible
[06:51:10] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[06:51:10] [PASSED] drm_test_damage_iter_no_damage_no_fb
[06:51:10] [PASSED] drm_test_damage_iter_simple_damage
[06:51:10] [PASSED] drm_test_damage_iter_single_damage
[06:51:10] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[06:51:10] [PASSED] drm_test_damage_iter_single_damage_outside_src
[06:51:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[06:51:10] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[06:51:10] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[06:51:10] [PASSED] drm_test_damage_iter_single_damage_src_moved
[06:51:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[06:51:10] [PASSED] drm_test_damage_iter_damage
[06:51:10] [PASSED] drm_test_damage_iter_damage_one_intersect
[06:51:10] [PASSED] drm_test_damage_iter_damage_one_outside
[06:51:10] [PASSED] drm_test_damage_iter_damage_src_moved
[06:51:10] [PASSED] drm_test_damage_iter_damage_not_visible
[06:51:10] ================ [PASSED] drm_damage_helper ================
[06:51:10] ============== drm_dp_mst_helper (3 subtests) ==============
[06:51:10] ============== drm_test_dp_mst_calc_pbn_mode ==============
[06:51:10] [PASSED] Clock 154000 BPP 30 DSC disabled
[06:51:10] [PASSED] Clock 234000 BPP 30 DSC disabled
[06:51:10] [PASSED] Clock 297000 BPP 24 DSC disabled
[06:51:10] [PASSED] Clock 332880 BPP 24 DSC enabled
[06:51:10] [PASSED] Clock 324540 BPP 24 DSC enabled
[06:51:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[06:51:10] ============== drm_test_dp_mst_calc_pbn_div ===============
[06:51:10] [PASSED] Link rate 2000000 lane count 4
[06:51:10] [PASSED] Link rate 2000000 lane count 2
[06:51:10] [PASSED] Link rate 2000000 lane count 1
[06:51:10] [PASSED] Link rate 1350000 lane count 4
[06:51:10] [PASSED] Link rate 1350000 lane count 2
[06:51:10] [PASSED] Link rate 1350000 lane count 1
[06:51:10] [PASSED] Link rate 1000000 lane count 4
[06:51:10] [PASSED] Link rate 1000000 lane count 2
[06:51:10] [PASSED] Link rate 1000000 lane count 1
[06:51:10] [PASSED] Link rate 810000 lane count 4
[06:51:10] [PASSED] Link rate 810000 lane count 2
[06:51:10] [PASSED] Link rate 810000 lane count 1
[06:51:10] [PASSED] Link rate 540000 lane count 4
[06:51:10] [PASSED] Link rate 540000 lane count 2
[06:51:10] [PASSED] Link rate 540000 lane count 1
[06:51:10] [PASSED] Link rate 270000 lane count 4
[06:51:10] [PASSED] Link rate 270000 lane count 2
[06:51:10] [PASSED] Link rate 270000 lane count 1
[06:51:10] [PASSED] Link rate 162000 lane count 4
[06:51:10] [PASSED] Link rate 162000 lane count 2
[06:51:10] [PASSED] Link rate 162000 lane count 1
[06:51:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[06:51:10] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[06:51:10] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[06:51:10] [PASSED] DP_POWER_UP_PHY with port number
[06:51:10] [PASSED] DP_POWER_DOWN_PHY with port number
[06:51:10] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[06:51:10] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[06:51:10] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[06:51:10] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[06:51:10] [PASSED] DP_QUERY_PAYLOAD with port number
[06:51:10] [PASSED] DP_QUERY_PAYLOAD with VCPI
[06:51:10] [PASSED] DP_REMOTE_DPCD_READ with port number
[06:51:10] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[06:51:10] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[06:51:10] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[06:51:10] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[06:51:10] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[06:51:10] [PASSED] DP_REMOTE_I2C_READ with port number
[06:51:10] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[06:51:10] [PASSED] DP_REMOTE_I2C_READ with transactions array
[06:51:10] [PASSED] DP_REMOTE_I2C_WRITE with port number
[06:51:10] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[06:51:10] [PASSED] DP_REMOTE_I2C_WRITE with data array
[06:51:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[06:51:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[06:51:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[06:51:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[06:51:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[06:51:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[06:51:10] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[06:51:10] ================ [PASSED] drm_dp_mst_helper ================
[06:51:10] ================== drm_exec (7 subtests) ===================
[06:51:10] [PASSED] sanitycheck
[06:51:10] [PASSED] test_lock
[06:51:10] [PASSED] test_lock_unlock
[06:51:10] [PASSED] test_duplicates
[06:51:10] [PASSED] test_prepare
[06:51:10] [PASSED] test_prepare_array
[06:51:10] [PASSED] test_multiple_loops
[06:51:10] ==================== [PASSED] drm_exec =====================
[06:51:10] =========== drm_format_helper_test (17 subtests) ===========
[06:51:10] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[06:51:10] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[06:51:10] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[06:51:10] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[06:51:10] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[06:51:10] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[06:51:10] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[06:51:10] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[06:51:10] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[06:51:10] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[06:51:10] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[06:51:10] ============== drm_test_fb_xrgb8888_to_mono ===============
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[06:51:10] ==================== drm_test_fb_swab =====================
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ================ [PASSED] drm_test_fb_swab =================
[06:51:10] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[06:51:10] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[06:51:10] [PASSED] single_pixel_source_buffer
[06:51:10] [PASSED] single_pixel_clip_rectangle
[06:51:10] [PASSED] well_known_colors
[06:51:10] [PASSED] destination_pitch
[06:51:10] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[06:51:10] ================= drm_test_fb_clip_offset =================
[06:51:10] [PASSED] pass through
[06:51:10] [PASSED] horizontal offset
[06:51:10] [PASSED] vertical offset
[06:51:10] [PASSED] horizontal and vertical offset
[06:51:10] [PASSED] horizontal offset (custom pitch)
[06:51:10] [PASSED] vertical offset (custom pitch)
[06:51:10] [PASSED] horizontal and vertical offset (custom pitch)
[06:51:10] ============= [PASSED] drm_test_fb_clip_offset =============
[06:51:10] =================== drm_test_fb_memcpy ====================
[06:51:10] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[06:51:10] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[06:51:10] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[06:51:10] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[06:51:10] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[06:51:10] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[06:51:10] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[06:51:10] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[06:51:10] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[06:51:10] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[06:51:10] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[06:51:10] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[06:51:10] =============== [PASSED] drm_test_fb_memcpy ================
[06:51:10] ============= [PASSED] drm_format_helper_test ==============
[06:51:10] ================= drm_format (18 subtests) =================
[06:51:10] [PASSED] drm_test_format_block_width_invalid
[06:51:10] [PASSED] drm_test_format_block_width_one_plane
[06:51:10] [PASSED] drm_test_format_block_width_two_plane
[06:51:10] [PASSED] drm_test_format_block_width_three_plane
[06:51:10] [PASSED] drm_test_format_block_width_tiled
[06:51:10] [PASSED] drm_test_format_block_height_invalid
[06:51:10] [PASSED] drm_test_format_block_height_one_plane
[06:51:10] [PASSED] drm_test_format_block_height_two_plane
[06:51:10] [PASSED] drm_test_format_block_height_three_plane
[06:51:10] [PASSED] drm_test_format_block_height_tiled
[06:51:10] [PASSED] drm_test_format_min_pitch_invalid
[06:51:10] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[06:51:10] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[06:51:10] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[06:51:10] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[06:51:10] [PASSED] drm_test_format_min_pitch_two_plane
[06:51:10] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[06:51:10] [PASSED] drm_test_format_min_pitch_tiled
[06:51:10] =================== [PASSED] drm_format ====================
[06:51:10] ============== drm_framebuffer (10 subtests) ===============
[06:51:10] ========== drm_test_framebuffer_check_src_coords ==========
[06:51:10] [PASSED] Success: source fits into fb
[06:51:10] [PASSED] Fail: overflowing fb with x-axis coordinate
[06:51:10] [PASSED] Fail: overflowing fb with y-axis coordinate
[06:51:10] [PASSED] Fail: overflowing fb with source width
[06:51:10] [PASSED] Fail: overflowing fb with source height
[06:51:10] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[06:51:10] [PASSED] drm_test_framebuffer_cleanup
[06:51:10] =============== drm_test_framebuffer_create ===============
[06:51:10] [PASSED] ABGR8888 normal sizes
[06:51:10] [PASSED] ABGR8888 max sizes
[06:51:10] [PASSED] ABGR8888 pitch greater than min required
[06:51:10] [PASSED] ABGR8888 pitch less than min required
[06:51:10] [PASSED] ABGR8888 Invalid width
[06:51:10] [PASSED] ABGR8888 Invalid buffer handle
[06:51:10] [PASSED] No pixel format
[06:51:10] [PASSED] ABGR8888 Width 0
[06:51:10] [PASSED] ABGR8888 Height 0
[06:51:10] [PASSED] ABGR8888 Out of bound height * pitch combination
[06:51:10] [PASSED] ABGR8888 Large buffer offset
[06:51:10] [PASSED] ABGR8888 Buffer offset for inexistent plane
[06:51:10] [PASSED] ABGR8888 Invalid flag
[06:51:10] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[06:51:10] [PASSED] ABGR8888 Valid buffer modifier
[06:51:10] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[06:51:10] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[06:51:10] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[06:51:10] [PASSED] NV12 Normal sizes
[06:51:10] [PASSED] NV12 Max sizes
[06:51:10] [PASSED] NV12 Invalid pitch
[06:51:10] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[06:51:10] [PASSED] NV12 different modifier per-plane
[06:51:10] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[06:51:10] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[06:51:10] [PASSED] NV12 Modifier for inexistent plane
[06:51:10] [PASSED] NV12 Handle for inexistent plane
[06:51:10] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[06:51:10] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[06:51:10] [PASSED] YVU420 Normal sizes
[06:51:10] [PASSED] YVU420 Max sizes
[06:51:10] [PASSED] YVU420 Invalid pitch
[06:51:10] [PASSED] YVU420 Different pitches
[06:51:10] [PASSED] YVU420 Different buffer offsets/pitches
[06:51:10] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[06:51:10] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[06:51:10] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[06:51:10] [PASSED] YVU420 Valid modifier
[06:51:10] [PASSED] YVU420 Different modifiers per plane
[06:51:10] [PASSED] YVU420 Modifier for inexistent plane
[06:51:10] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[06:51:10] [PASSED] X0L2 Normal sizes
[06:51:10] [PASSED] X0L2 Max sizes
[06:51:10] [PASSED] X0L2 Invalid pitch
[06:51:10] [PASSED] X0L2 Pitch greater than minimum required
[06:51:10] [PASSED] X0L2 Handle for inexistent plane
[06:51:10] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[06:51:10] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[06:51:10] [PASSED] X0L2 Valid modifier
[06:51:10] [PASSED] X0L2 Modifier for inexistent plane
[06:51:10] =========== [PASSED] drm_test_framebuffer_create ===========
[06:51:10] [PASSED] drm_test_framebuffer_free
[06:51:10] [PASSED] drm_test_framebuffer_init
[06:51:10] [PASSED] drm_test_framebuffer_init_bad_format
[06:51:10] [PASSED] drm_test_framebuffer_init_dev_mismatch
[06:51:10] [PASSED] drm_test_framebuffer_lookup
[06:51:10] [PASSED] drm_test_framebuffer_lookup_inexistent
[06:51:10] [PASSED] drm_test_framebuffer_modifiers_not_supported
[06:51:10] ================= [PASSED] drm_framebuffer =================
[06:51:10] ================ drm_gem_shmem (8 subtests) ================
[06:51:10] [PASSED] drm_gem_shmem_test_obj_create
[06:51:10] [PASSED] drm_gem_shmem_test_obj_create_private
[06:51:10] [PASSED] drm_gem_shmem_test_pin_pages
[06:51:10] [PASSED] drm_gem_shmem_test_vmap
[06:51:10] [PASSED] drm_gem_shmem_test_get_pages_sgt
[06:51:10] [PASSED] drm_gem_shmem_test_get_sg_table
[06:51:10] [PASSED] drm_gem_shmem_test_madvise
[06:51:10] [PASSED] drm_gem_shmem_test_purge
[06:51:10] ================== [PASSED] drm_gem_shmem ==================
[06:51:10] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[06:51:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[06:51:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[06:51:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[06:51:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[06:51:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[06:51:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[06:51:10] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[06:51:10] [PASSED] Automatic
[06:51:10] [PASSED] Full
[06:51:10] [PASSED] Limited 16:235
[06:51:10] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[06:51:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[06:51:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[06:51:10] [PASSED] drm_test_check_disable_connector
[06:51:10] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[06:51:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[06:51:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[06:51:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[06:51:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[06:51:10] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[06:51:10] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[06:51:10] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[06:51:10] [PASSED] drm_test_check_output_bpc_dvi
[06:51:10] [PASSED] drm_test_check_output_bpc_format_vic_1
[06:51:10] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[06:51:10] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[06:51:10] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[06:51:10] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[06:51:10] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[06:51:10] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[06:51:10] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[06:51:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[06:51:10] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[06:51:10] [PASSED] drm_test_check_broadcast_rgb_value
[06:51:10] [PASSED] drm_test_check_bpc_8_value
[06:51:10] [PASSED] drm_test_check_bpc_10_value
[06:51:10] [PASSED] drm_test_check_bpc_12_value
[06:51:10] [PASSED] drm_test_check_format_value
[06:51:10] [PASSED] drm_test_check_tmds_char_value
[06:51:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[06:51:10] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[06:51:10] [PASSED] drm_test_check_mode_valid
[06:51:10] [PASSED] drm_test_check_mode_valid_reject
[06:51:10] [PASSED] drm_test_check_mode_valid_reject_rate
[06:51:10] [PASSED] drm_test_check_mode_valid_reject_max_clock
[06:51:10] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[06:51:10] ================= drm_managed (2 subtests) =================
[06:51:10] [PASSED] drm_test_managed_release_action
[06:51:10] [PASSED] drm_test_managed_run_action
[06:51:10] =================== [PASSED] drm_managed ===================
[06:51:10] =================== drm_mm (6 subtests) ====================
[06:51:10] [PASSED] drm_test_mm_init
[06:51:10] [PASSED] drm_test_mm_debug
[06:51:10] [PASSED] drm_test_mm_align32
[06:51:10] [PASSED] drm_test_mm_align64
[06:51:10] [PASSED] drm_test_mm_lowest
[06:51:10] [PASSED] drm_test_mm_highest
[06:51:10] ===================== [PASSED] drm_mm ======================
[06:51:10] ============= drm_modes_analog_tv (5 subtests) =============
[06:51:10] [PASSED] drm_test_modes_analog_tv_mono_576i
[06:51:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[06:51:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[06:51:10] [PASSED] drm_test_modes_analog_tv_pal_576i
[06:51:10] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[06:51:10] =============== [PASSED] drm_modes_analog_tv ===============
[06:51:10] ============== drm_plane_helper (2 subtests) ===============
[06:51:10] =============== drm_test_check_plane_state ================
[06:51:10] [PASSED] clipping_simple
[06:51:10] [PASSED] clipping_rotate_reflect
[06:51:10] [PASSED] positioning_simple
[06:51:10] [PASSED] upscaling
[06:51:10] [PASSED] downscaling
[06:51:10] [PASSED] rounding1
[06:51:10] [PASSED] rounding2
[06:51:10] [PASSED] rounding3
[06:51:10] [PASSED] rounding4
[06:51:10] =========== [PASSED] drm_test_check_plane_state ============
[06:51:10] =========== drm_test_check_invalid_plane_state ============
[06:51:10] [PASSED] positioning_invalid
[06:51:10] [PASSED] upscaling_invalid
[06:51:10] [PASSED] downscaling_invalid
[06:51:10] ======= [PASSED] drm_test_check_invalid_plane_state ========
[06:51:10] ================ [PASSED] drm_plane_helper =================
[06:51:10] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[06:51:10] ====== drm_test_connector_helper_tv_get_modes_check =======
[06:51:10] [PASSED] None
[06:51:10] [PASSED] PAL
[06:51:10] [PASSED] NTSC
[06:51:10] [PASSED] Both, NTSC Default
[06:51:10] [PASSED] Both, PAL Default
[06:51:10] [PASSED] Both, NTSC Default, with PAL on command-line
[06:51:10] [PASSED] Both, PAL Default, with NTSC on command-line
[06:51:10] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[06:51:10] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[06:51:10] ================== drm_rect (9 subtests) ===================
[06:51:10] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[06:51:10] [PASSED] drm_test_rect_clip_scaled_not_clipped
[06:51:10] [PASSED] drm_test_rect_clip_scaled_clipped
[06:51:10] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[06:51:10] ================= drm_test_rect_intersect =================
[06:51:10] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[06:51:10] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[06:51:10] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[06:51:10] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[06:51:10] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[06:51:10] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[06:51:10] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[06:51:10] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[06:51:10] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[06:51:10] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[06:51:10] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[06:51:10] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[06:51:10] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[06:51:10] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[06:51:10] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[06:51:10] ============= [PASSED] drm_test_rect_intersect =============
[06:51:10] ================ drm_test_rect_calc_hscale ================
[06:51:10] [PASSED] normal use
[06:51:10] [PASSED] out of max range
[06:51:10] [PASSED] out of min range
[06:51:10] [PASSED] zero dst
[06:51:10] [PASSED] negative src
[06:51:10] [PASSED] negative dst
[06:51:10] ============ [PASSED] drm_test_rect_calc_hscale ============
[06:51:10] ================ drm_test_rect_calc_vscale ================
[06:51:10] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[06:51:10] [PASSED] out of max range
[06:51:10] [PASSED] out of min range
[06:51:10] [PASSED] zero dst
[06:51:10] [PASSED] negative src
[06:51:10] [PASSED] negative dst
[06:51:10] ============ [PASSED] drm_test_rect_calc_vscale ============
[06:51:10] ================== drm_test_rect_rotate ===================
[06:51:10] [PASSED] reflect-x
[06:51:10] [PASSED] reflect-y
[06:51:10] [PASSED] rotate-0
[06:51:10] [PASSED] rotate-90
[06:51:10] [PASSED] rotate-180
[06:51:10] [PASSED] rotate-270
[06:51:10] ============== [PASSED] drm_test_rect_rotate ===============
[06:51:10] ================ drm_test_rect_rotate_inv =================
[06:51:10] [PASSED] reflect-x
[06:51:10] [PASSED] reflect-y
[06:51:10] [PASSED] rotate-0
[06:51:10] [PASSED] rotate-90
[06:51:10] [PASSED] rotate-180
[06:51:10] [PASSED] rotate-270
[06:51:10] ============ [PASSED] drm_test_rect_rotate_inv =============
[06:51:10] ==================== [PASSED] drm_rect =====================
[06:51:10] ============ drm_sysfb_modeset_test (1 subtest) ============
[06:51:10] ============ drm_test_sysfb_build_fourcc_list =============
[06:51:10] [PASSED] no native formats
[06:51:10] [PASSED] XRGB8888 as native format
[06:51:10] [PASSED] remove duplicates
[06:51:10] [PASSED] convert alpha formats
[06:51:10] [PASSED] random formats
[06:51:10] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[06:51:10] ============= [PASSED] drm_sysfb_modeset_test ==============
[06:51:10] ============================================================
[06:51:10] Testing complete. Ran 622 tests: passed: 622
[06:51:10] Elapsed time: 26.950s total, 1.728s configuring, 24.802s building, 0.393s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[06:51:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:51:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:51:21] Starting KUnit Kernel (1/1)...
[06:51:21] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:51:21] ================= ttm_device (5 subtests) ==================
[06:51:21] [PASSED] ttm_device_init_basic
[06:51:21] [PASSED] ttm_device_init_multiple
[06:51:21] [PASSED] ttm_device_fini_basic
[06:51:21] [PASSED] ttm_device_init_no_vma_man
[06:51:21] ================== ttm_device_init_pools ==================
[06:51:21] [PASSED] No DMA allocations, no DMA32 required
[06:51:21] [PASSED] DMA allocations, DMA32 required
[06:51:21] [PASSED] No DMA allocations, DMA32 required
[06:51:21] [PASSED] DMA allocations, no DMA32 required
[06:51:21] ============== [PASSED] ttm_device_init_pools ==============
[06:51:21] =================== [PASSED] ttm_device ====================
[06:51:21] ================== ttm_pool (8 subtests) ===================
[06:51:21] ================== ttm_pool_alloc_basic ===================
[06:51:21] [PASSED] One page
[06:51:21] [PASSED] More than one page
[06:51:21] [PASSED] Above the allocation limit
[06:51:21] [PASSED] One page, with coherent DMA mappings enabled
[06:51:21] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:51:21] ============== [PASSED] ttm_pool_alloc_basic ===============
[06:51:21] ============== ttm_pool_alloc_basic_dma_addr ==============
[06:51:21] [PASSED] One page
[06:51:21] [PASSED] More than one page
[06:51:21] [PASSED] Above the allocation limit
[06:51:21] [PASSED] One page, with coherent DMA mappings enabled
[06:51:21] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:51:21] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[06:51:21] [PASSED] ttm_pool_alloc_order_caching_match
[06:51:21] [PASSED] ttm_pool_alloc_caching_mismatch
[06:51:21] [PASSED] ttm_pool_alloc_order_mismatch
[06:51:21] [PASSED] ttm_pool_free_dma_alloc
[06:51:21] [PASSED] ttm_pool_free_no_dma_alloc
[06:51:21] [PASSED] ttm_pool_fini_basic
[06:51:21] ==================== [PASSED] ttm_pool =====================
[06:51:21] ================ ttm_resource (8 subtests) =================
[06:51:21] ================= ttm_resource_init_basic =================
[06:51:21] [PASSED] Init resource in TTM_PL_SYSTEM
[06:51:21] [PASSED] Init resource in TTM_PL_VRAM
[06:51:21] [PASSED] Init resource in a private placement
[06:51:21] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[06:51:21] ============= [PASSED] ttm_resource_init_basic =============
[06:51:21] [PASSED] ttm_resource_init_pinned
[06:51:21] [PASSED] ttm_resource_fini_basic
[06:51:21] [PASSED] ttm_resource_manager_init_basic
[06:51:21] [PASSED] ttm_resource_manager_usage_basic
[06:51:21] [PASSED] ttm_resource_manager_set_used_basic
[06:51:21] [PASSED] ttm_sys_man_alloc_basic
[06:51:21] [PASSED] ttm_sys_man_free_basic
[06:51:21] ================== [PASSED] ttm_resource ===================
[06:51:21] =================== ttm_tt (15 subtests) ===================
[06:51:21] ==================== ttm_tt_init_basic ====================
[06:51:21] [PASSED] Page-aligned size
[06:51:21] [PASSED] Extra pages requested
[06:51:21] ================ [PASSED] ttm_tt_init_basic ================
[06:51:21] [PASSED] ttm_tt_init_misaligned
[06:51:21] [PASSED] ttm_tt_fini_basic
[06:51:21] [PASSED] ttm_tt_fini_sg
[06:51:21] [PASSED] ttm_tt_fini_shmem
[06:51:21] [PASSED] ttm_tt_create_basic
[06:51:21] [PASSED] ttm_tt_create_invalid_bo_type
[06:51:21] [PASSED] ttm_tt_create_ttm_exists
[06:51:21] [PASSED] ttm_tt_create_failed
[06:51:21] [PASSED] ttm_tt_destroy_basic
[06:51:21] [PASSED] ttm_tt_populate_null_ttm
[06:51:21] [PASSED] ttm_tt_populate_populated_ttm
[06:51:21] [PASSED] ttm_tt_unpopulate_basic
[06:51:21] [PASSED] ttm_tt_unpopulate_empty_ttm
[06:51:21] [PASSED] ttm_tt_swapin_basic
[06:51:21] ===================== [PASSED] ttm_tt ======================
[06:51:21] =================== ttm_bo (14 subtests) ===================
[06:51:21] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[06:51:21] [PASSED] Cannot be interrupted and sleeps
[06:51:21] [PASSED] Cannot be interrupted, locks straight away
[06:51:21] [PASSED] Can be interrupted, sleeps
[06:51:21] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[06:51:21] [PASSED] ttm_bo_reserve_locked_no_sleep
[06:51:21] [PASSED] ttm_bo_reserve_no_wait_ticket
[06:51:21] [PASSED] ttm_bo_reserve_double_resv
[06:51:21] [PASSED] ttm_bo_reserve_interrupted
[06:51:21] [PASSED] ttm_bo_reserve_deadlock
[06:51:21] [PASSED] ttm_bo_unreserve_basic
[06:51:21] [PASSED] ttm_bo_unreserve_pinned
[06:51:21] [PASSED] ttm_bo_unreserve_bulk
[06:51:21] [PASSED] ttm_bo_fini_basic
[06:51:21] [PASSED] ttm_bo_fini_shared_resv
[06:51:21] [PASSED] ttm_bo_pin_basic
[06:51:21] [PASSED] ttm_bo_pin_unpin_resource
[06:51:21] [PASSED] ttm_bo_multiple_pin_one_unpin
[06:51:21] ===================== [PASSED] ttm_bo ======================
[06:51:21] ============== ttm_bo_validate (21 subtests) ===============
[06:51:21] ============== ttm_bo_init_reserved_sys_man ===============
[06:51:21] [PASSED] Buffer object for userspace
[06:51:21] [PASSED] Kernel buffer object
[06:51:21] [PASSED] Shared buffer object
[06:51:21] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[06:51:21] ============== ttm_bo_init_reserved_mock_man ==============
[06:51:21] [PASSED] Buffer object for userspace
[06:51:21] [PASSED] Kernel buffer object
[06:51:21] [PASSED] Shared buffer object
[06:51:21] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[06:51:21] [PASSED] ttm_bo_init_reserved_resv
[06:51:21] ================== ttm_bo_validate_basic ==================
[06:51:21] [PASSED] Buffer object for userspace
[06:51:21] [PASSED] Kernel buffer object
[06:51:21] [PASSED] Shared buffer object
[06:51:21] ============== [PASSED] ttm_bo_validate_basic ==============
[06:51:21] [PASSED] ttm_bo_validate_invalid_placement
[06:51:21] ============= ttm_bo_validate_same_placement ==============
[06:51:21] [PASSED] System manager
[06:51:21] [PASSED] VRAM manager
[06:51:21] ========= [PASSED] ttm_bo_validate_same_placement ==========
[06:51:21] [PASSED] ttm_bo_validate_failed_alloc
[06:51:21] [PASSED] ttm_bo_validate_pinned
[06:51:21] [PASSED] ttm_bo_validate_busy_placement
[06:51:21] ================ ttm_bo_validate_multihop =================
[06:51:21] [PASSED] Buffer object for userspace
[06:51:21] [PASSED] Kernel buffer object
[06:51:21] [PASSED] Shared buffer object
[06:51:21] ============ [PASSED] ttm_bo_validate_multihop =============
[06:51:21] ========== ttm_bo_validate_no_placement_signaled ==========
[06:51:21] [PASSED] Buffer object in system domain, no page vector
[06:51:21] [PASSED] Buffer object in system domain with an existing page vector
[06:51:21] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[06:51:21] ======== ttm_bo_validate_no_placement_not_signaled ========
[06:51:21] [PASSED] Buffer object for userspace
[06:51:21] [PASSED] Kernel buffer object
[06:51:21] [PASSED] Shared buffer object
[06:51:21] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[06:51:21] [PASSED] ttm_bo_validate_move_fence_signaled
[06:51:21] ========= ttm_bo_validate_move_fence_not_signaled =========
[06:51:21] [PASSED] Waits for GPU
[06:51:21] [PASSED] Tries to lock straight away
[06:51:21] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[06:51:21] [PASSED] ttm_bo_validate_happy_evict
[06:51:21] [PASSED] ttm_bo_validate_all_pinned_evict
[06:51:21] [PASSED] ttm_bo_validate_allowed_only_evict
[06:51:21] [PASSED] ttm_bo_validate_deleted_evict
[06:51:21] [PASSED] ttm_bo_validate_busy_domain_evict
[06:51:21] [PASSED] ttm_bo_validate_evict_gutting
[06:51:21] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[06:51:21] ================= [PASSED] ttm_bo_validate =================
[06:51:21] ============================================================
[06:51:21] Testing complete. Ran 101 tests: passed: 101
[06:51:21] Elapsed time: 11.378s total, 1.725s configuring, 9.436s building, 0.178s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✗ CI.checksparse: warning for Preparatory patches for guardband optimization (rev8)
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (10 preceding siblings ...)
2025-10-16 6:51 ` ✓ CI.KUnit: success for Preparatory patches for guardband optimization (rev8) Patchwork
@ 2025-10-16 7:06 ` Patchwork
2025-10-16 7:50 ` ✓ Xe.CI.BAT: success " Patchwork
` (3 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-10-16 7:06 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-xe
== Series Details ==
Series: Preparatory patches for guardband optimization (rev8)
URL : https://patchwork.freedesktop.org/series/155662/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast aaaff197c9186f4959c2bcb18035725188b950ed
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_alpm.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2055:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2055:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_psr.c: note: in included file:
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ Xe.CI.BAT: success for Preparatory patches for guardband optimization (rev8)
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (11 preceding siblings ...)
2025-10-16 7:06 ` ✗ CI.checksparse: warning " Patchwork
@ 2025-10-16 7:50 ` Patchwork
2025-10-16 9:55 ` ✗ Xe.CI.Full: failure " Patchwork
` (2 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-10-16 7:50 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 876 bytes --]
== Series Details ==
Series: Preparatory patches for guardband optimization (rev8)
URL : https://patchwork.freedesktop.org/series/155662/
State : success
== Summary ==
CI Bug Log - changes from xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8_BAT -> xe-pw-155662v8_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8 -> xe-pw-155662v8
IGT_8587: 8587
xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8: 7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8
xe-pw-155662v8: 155662v8
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/index.html
[-- Attachment #2: Type: text/html, Size: 1424 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✗ Xe.CI.Full: failure for Preparatory patches for guardband optimization (rev8)
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (12 preceding siblings ...)
2025-10-16 7:50 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2025-10-16 9:55 ` Patchwork
2025-10-16 12:42 ` Patchwork
2025-10-16 14:15 ` [PATCH 00/10] Preparatory patches for guardband optimization Nautiyal, Ankit K
15 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-10-16 9:55 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 384 bytes --]
== Series Details ==
Series: Preparatory patches for guardband optimization (rev8)
URL : https://patchwork.freedesktop.org/series/155662/
State : failure
== Summary ==
ERROR: The runconfig 'xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8_FULL' does not exist in the database
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/index.html
[-- Attachment #2: Type: text/html, Size: 949 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✗ Xe.CI.Full: failure for Preparatory patches for guardband optimization (rev8)
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (13 preceding siblings ...)
2025-10-16 9:55 ` ✗ Xe.CI.Full: failure " Patchwork
@ 2025-10-16 12:42 ` Patchwork
2025-10-16 14:15 ` [PATCH 00/10] Preparatory patches for guardband optimization Nautiyal, Ankit K
15 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-10-16 12:42 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 59521 bytes --]
== Series Details ==
Series: Preparatory patches for guardband optimization (rev8)
URL : https://patchwork.freedesktop.org/series/155662/
State : failure
== Summary ==
CI Bug Log - changes from xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8_FULL -> xe-pw-155662v8_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-155662v8_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-155662v8_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-155662v8_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_gt_freq@freq_fixed_idle:
- shard-dg2-set2: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-dg2-432/igt@xe_gt_freq@freq_fixed_idle.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-463/igt@xe_gt_freq@freq_fixed_idle.html
Known issues
------------
Here are the changes found in xe-pw-155662v8_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#2327]) +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-0:
- shard-adlp: NOTRUN -> [DMESG-FAIL][4] ([Intel XE#4543]) +6 other tests dmesg-fail
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0:
- shard-adlp: NOTRUN -> [FAIL][5] ([Intel XE#1874])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-270:
- shard-adlp: NOTRUN -> [SKIP][6] ([Intel XE#316]) +1 other test skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@kms_big_fb@y-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#1124]) +2 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-4/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-0:
- shard-dg2-set2: NOTRUN -> [SKIP][8] ([Intel XE#1124]) +1 other test skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-435/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#610])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
- shard-adlp: NOTRUN -> [SKIP][10] ([Intel XE#1124]) +7 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2314] / [Intel XE#2894])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
- shard-adlp: NOTRUN -> [SKIP][12] ([Intel XE#2191]) +2 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-2560x1440p:
- shard-adlp: NOTRUN -> [SKIP][13] ([Intel XE#367]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
* igt@kms_ccs@bad-pixel-format-yf-tiled-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][14] ([Intel XE#455] / [Intel XE#787]) +9 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-434/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc:
- shard-adlp: NOTRUN -> [SKIP][15] ([Intel XE#455] / [Intel XE#787]) +25 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][16] ([Intel XE#787]) +38 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4:
- shard-dg2-set2: [PASS][17] -> [INCOMPLETE][18] ([Intel XE#3862]) +1 other test incomplete
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#3432])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][20] ([Intel XE#3862]) +1 other test incomplete
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-435/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2887]) +4 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][22] ([Intel XE#787]) +34 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-435/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [PASS][23] -> [INCOMPLETE][24] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4:
- shard-dg2-set2: [PASS][25] -> [INCOMPLETE][26] ([Intel XE#6168])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6:
- shard-dg2-set2: [PASS][27] -> [DMESG-WARN][28] ([Intel XE#1727] / [Intel XE#3113])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-d-hdmi-a-6:
- shard-dg2-set2: [PASS][29] -> [INCOMPLETE][30] ([Intel XE#2705] / [Intel XE#4212] / [Intel XE#4522])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-d-hdmi-a-6.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-d-hdmi-a-6.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-adlp: NOTRUN -> [SKIP][31] ([Intel XE#4418])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_audio@hdmi-audio-edid:
- shard-adlp: NOTRUN -> [SKIP][32] ([Intel XE#373]) +6 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@kms_chamelium_audio@hdmi-audio-edid.html
* igt@kms_chamelium_color@ctm-green-to-red:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2325])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_chamelium_color@ctm-green-to-red.html
* igt@kms_chamelium_color@ctm-red-to-blue:
- shard-adlp: NOTRUN -> [SKIP][34] ([Intel XE#306]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_chamelium_color@ctm-red-to-blue.html
* igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
- shard-dg2-set2: NOTRUN -> [SKIP][35] ([Intel XE#373]) +4 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-435/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
* igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2252]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-4/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-adlp: NOTRUN -> [SKIP][37] ([Intel XE#308]) +1 other test skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_crc@cursor-rapid-movement-128x42:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#2320]) +1 other test skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-2/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-adlp: NOTRUN -> [SKIP][39] ([Intel XE#309])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
- shard-bmg: [PASS][40] -> [SKIP][41] ([Intel XE#2291]) +2 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-adlp: NOTRUN -> [SKIP][42] ([Intel XE#323])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_dp_aux_dev:
- shard-bmg: [PASS][43] -> [SKIP][44] ([Intel XE#3009])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@kms_dp_aux_dev.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@kms_dp_aux_dev.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-dg2-set2: NOTRUN -> [SKIP][45] ([Intel XE#4354])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-434/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-bmg: [PASS][46] -> [SKIP][47] ([Intel XE#4354])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@kms_dp_link_training@non-uhbr-sst.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-adlp: NOTRUN -> [SKIP][48] ([Intel XE#4331])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#4331])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2244])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
- shard-adlp: NOTRUN -> [SKIP][51] ([Intel XE#4422])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-adlp: [PASS][52] -> [DMESG-WARN][53] ([Intel XE#2953] / [Intel XE#4173]) +1 other test dmesg-warn
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-adlp-8/igt@kms_fbcon_fbt@fbc-suspend.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-9/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_feature_discovery@display-2x:
- shard-adlp: NOTRUN -> [SKIP][54] ([Intel XE#702])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_feature_discovery@display-2x.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible@ab-dp2-hdmi-a3:
- shard-bmg: [PASS][55] -> [FAIL][56] ([Intel XE#5338] / [Intel XE#5416]) +1 other test fail
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-1/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible@ab-dp2-hdmi-a3.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-4/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible@ab-dp2-hdmi-a3.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
- shard-adlp: NOTRUN -> [SKIP][57] ([Intel XE#310]) +4 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-bmg: [PASS][58] -> [SKIP][59] ([Intel XE#2316]) +1 other test skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@kms_flip@2x-plain-flip-fb-recreate.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@flip-vs-panning-interruptible:
- shard-adlp: NOTRUN -> [DMESG-WARN][60] ([Intel XE#4543] / [Intel XE#5208])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@kms_flip@flip-vs-panning-interruptible.html
* igt@kms_flip@plain-flip-interruptible@b-hdmi-a1:
- shard-adlp: NOTRUN -> [DMESG-WARN][61] ([Intel XE#4543]) +12 other tests dmesg-warn
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_flip@plain-flip-interruptible@b-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
- shard-adlp: NOTRUN -> [SKIP][62] ([Intel XE#455]) +15 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#2380]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-indfb-pgflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][64] ([Intel XE#651]) +3 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-adlp: NOTRUN -> [SKIP][65] ([Intel XE#651]) +7 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#5390]) +3 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#2311]) +7 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary:
- shard-adlp: NOTRUN -> [SKIP][68] ([Intel XE#653]) +8 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][69] ([Intel XE#2313]) +11 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-render:
- shard-dg2-set2: NOTRUN -> [SKIP][70] ([Intel XE#653]) +5 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-435/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][71] ([Intel XE#656]) +28 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_hdr@static-toggle:
- shard-bmg: [PASS][72] -> [SKIP][73] ([Intel XE#1503])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@kms_hdr@static-toggle.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@kms_hdr@static-toggle.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-bmg: NOTRUN -> [SKIP][74] ([Intel XE#2486])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-2/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-adlp: NOTRUN -> [SKIP][75] ([Intel XE#870])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_dc@dc5-psr:
- shard-adlp: NOTRUN -> [SKIP][76] ([Intel XE#1129])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_pm_dc@dc5-psr.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-adlp: NOTRUN -> [SKIP][77] ([Intel XE#1406] / [Intel XE#1489]) +5 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][78] ([Intel XE#1406] / [Intel XE#1489]) +3 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][79] ([Intel XE#1406] / [Intel XE#1489]) +2 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-434/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][80] ([Intel XE#1406] / [Intel XE#2387])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@fbc-psr2-sprite-plane-onoff:
- shard-dg2-set2: NOTRUN -> [SKIP][81] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +1 other test skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-434/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html
* igt@kms_psr@pr-suspend:
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +3 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-2/igt@kms_psr@pr-suspend.html
* igt@kms_psr@psr-cursor-plane-onoff:
- shard-adlp: NOTRUN -> [SKIP][83] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +9 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@kms_psr@psr-cursor-plane-onoff.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-bmg: NOTRUN -> [SKIP][84] ([Intel XE#3414] / [Intel XE#3904])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
- shard-adlp: NOTRUN -> [SKIP][85] ([Intel XE#1127])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-bmg: NOTRUN -> [SKIP][86] ([Intel XE#2330])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-adlp: NOTRUN -> [SKIP][87] ([Intel XE#3414])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-bmg: [PASS][88] -> [SKIP][89] ([Intel XE#1435])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-1/igt@kms_setmode@invalid-clone-single-crtc.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@kms_vrr@cmrr@pipe-a-edp-1:
- shard-lnl: [PASS][90] -> [FAIL][91] ([Intel XE#4459]) +1 other test fail
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-lnl-8/igt@kms_vrr@cmrr@pipe-a-edp-1.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-lnl-5/igt@kms_vrr@cmrr@pipe-a-edp-1.html
* igt@xe_ccs@suspend-resume:
- shard-adlp: NOTRUN -> [SKIP][92] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607]) +1 other test skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@xe_ccs@suspend-resume.html
* igt@xe_configfs@survivability-mode:
- shard-adlp: NOTRUN -> [SKIP][93] ([Intel XE#6010])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@xe_configfs@survivability-mode.html
* igt@xe_copy_basic@mem-set-linear-0xfd:
- shard-adlp: NOTRUN -> [SKIP][94] ([Intel XE#1126])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@xe_copy_basic@mem-set-linear-0xfd.html
* igt@xe_eu_stall@non-blocking-re-enable:
- shard-adlp: NOTRUN -> [SKIP][95] ([Intel XE#5626]) +1 other test skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@xe_eu_stall@non-blocking-re-enable.html
* igt@xe_eudebug@basic-vm-bind:
- shard-bmg: NOTRUN -> [SKIP][96] ([Intel XE#4837]) +4 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@xe_eudebug@basic-vm-bind.html
* igt@xe_eudebug@discovery-empty:
- shard-adlp: NOTRUN -> [SKIP][97] ([Intel XE#4837] / [Intel XE#5565]) +7 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@xe_eudebug@discovery-empty.html
* igt@xe_eudebug_online@debugger-reopen:
- shard-dg2-set2: NOTRUN -> [SKIP][98] ([Intel XE#4837]) +3 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-435/igt@xe_eudebug_online@debugger-reopen.html
* igt@xe_evict@evict-beng-large-external:
- shard-adlp: NOTRUN -> [SKIP][99] ([Intel XE#261] / [Intel XE#5564])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@xe_evict@evict-beng-large-external.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-adlp: NOTRUN -> [SKIP][100] ([Intel XE#261]) +3 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_evict@evict-threads-small:
- shard-adlp: NOTRUN -> [SKIP][101] ([Intel XE#261] / [Intel XE#688])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@xe_evict@evict-threads-small.html
* igt@xe_evict_ccs@evict-overcommit-parallel-nofree-reopen:
- shard-adlp: NOTRUN -> [SKIP][102] ([Intel XE#688]) +1 other test skip
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-reopen.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
- shard-bmg: NOTRUN -> [SKIP][103] ([Intel XE#2322]) +2 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind:
- shard-adlp: NOTRUN -> [SKIP][104] ([Intel XE#1392] / [Intel XE#5575]) +7 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind.html
* igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][105] ([Intel XE#288]) +5 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-434/igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-imm.html
* igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-prefetch:
- shard-adlp: NOTRUN -> [SKIP][106] ([Intel XE#288] / [Intel XE#5561]) +17 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-prefetch.html
* igt@xe_exec_system_allocator@once-mmap-remap-ro-dontunmap:
- shard-adlp: NOTRUN -> [SKIP][107] ([Intel XE#4915]) +180 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@xe_exec_system_allocator@once-mmap-remap-ro-dontunmap.html
* igt@xe_exec_system_allocator@process-many-execqueues-mmap-new-huge:
- shard-bmg: NOTRUN -> [SKIP][108] ([Intel XE#4943]) +3 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@xe_exec_system_allocator@process-many-execqueues-mmap-new-huge.html
* igt@xe_exec_system_allocator@threads-many-malloc-mlock-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][109] ([Intel XE#4915]) +59 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-434/igt@xe_exec_system_allocator@threads-many-malloc-mlock-nomemset.html
* igt@xe_live_ktest@xe_dma_buf:
- shard-dg2-set2: NOTRUN -> [FAIL][110] ([Intel XE#3099]) +1 other test fail
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-434/igt@xe_live_ktest@xe_dma_buf.html
* igt@xe_mmap@pci-membarrier-bad-object:
- shard-adlp: NOTRUN -> [SKIP][111] ([Intel XE#5100])
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@xe_mmap@pci-membarrier-bad-object.html
* igt@xe_module_load@load:
- shard-bmg: ([PASS][112], [PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125], [PASS][126], [PASS][127], [PASS][128], [PASS][129], [PASS][130], [PASS][131], [PASS][132], [PASS][133], [PASS][134], [PASS][135], [PASS][136]) -> ([PASS][137], [PASS][138], [PASS][139], [PASS][140], [PASS][141], [PASS][142], [PASS][143], [PASS][144], [SKIP][145], [PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151], [PASS][152], [PASS][153], [PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161]) ([Intel XE#2457])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@xe_module_load@load.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-8/igt@xe_module_load@load.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-5/igt@xe_module_load@load.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-5/igt@xe_module_load@load.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-8/igt@xe_module_load@load.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-7/igt@xe_module_load@load.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-7/igt@xe_module_load@load.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-3/igt@xe_module_load@load.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@xe_module_load@load.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-8/igt@xe_module_load@load.html
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-1/igt@xe_module_load@load.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-2/igt@xe_module_load@load.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-5/igt@xe_module_load@load.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-5/igt@xe_module_load@load.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-3/igt@xe_module_load@load.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-3/igt@xe_module_load@load.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-1/igt@xe_module_load@load.html
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-1/igt@xe_module_load@load.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-5/igt@xe_module_load@load.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-7/igt@xe_module_load@load.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-1/igt@xe_module_load@load.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-2/igt@xe_module_load@load.html
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-2/igt@xe_module_load@load.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@xe_module_load@load.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@xe_module_load@load.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-3/igt@xe_module_load@load.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-3/igt@xe_module_load@load.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-2/igt@xe_module_load@load.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@xe_module_load@load.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-2/igt@xe_module_load@load.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-1/igt@xe_module_load@load.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-1/igt@xe_module_load@load.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-8/igt@xe_module_load@load.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@xe_module_load@load.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-4/igt@xe_module_load@load.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-4/igt@xe_module_load@load.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@xe_module_load@load.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-8/igt@xe_module_load@load.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-8/igt@xe_module_load@load.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@xe_module_load@load.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@xe_module_load@load.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@xe_module_load@load.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-2/igt@xe_module_load@load.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-4/igt@xe_module_load@load.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-5/igt@xe_module_load@load.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-5/igt@xe_module_load@load.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-4/igt@xe_module_load@load.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-1/igt@xe_module_load@load.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-1/igt@xe_module_load@load.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@xe_module_load@load.html
* igt@xe_oa@non-sampling-read-error:
- shard-dg2-set2: NOTRUN -> [SKIP][162] ([Intel XE#3573])
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-434/igt@xe_oa@non-sampling-read-error.html
* igt@xe_oa@privileged-forked-access-vaddr:
- shard-adlp: NOTRUN -> [SKIP][163] ([Intel XE#3573]) +4 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@xe_oa@privileged-forked-access-vaddr.html
* igt@xe_pat@pat-index-xehpc:
- shard-adlp: NOTRUN -> [SKIP][164] ([Intel XE#2838] / [Intel XE#979])
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@xe_pat@pat-index-xehpc.html
* igt@xe_peer2peer@write:
- shard-bmg: NOTRUN -> [SKIP][165] ([Intel XE#2427])
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@xe_peer2peer@write.html
* igt@xe_pm@d3cold-mmap-vram:
- shard-adlp: NOTRUN -> [SKIP][166] ([Intel XE#2284] / [Intel XE#366])
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@xe_pm@d3cold-mmap-vram.html
* igt@xe_pm@s3-vm-bind-unbind-all:
- shard-bmg: [PASS][167] -> [ABORT][168] ([Intel XE#3970])
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-7/igt@xe_pm@s3-vm-bind-unbind-all.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@xe_pm@s3-vm-bind-unbind-all.html
* igt@xe_pm@s4-d3hot-basic-exec:
- shard-dg2-set2: NOTRUN -> [FAIL][169] ([Intel XE#6339])
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-434/igt@xe_pm@s4-d3hot-basic-exec.html
* igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_render0:
- shard-adlp: NOTRUN -> [TIMEOUT][170] ([Intel XE#5213]) +1 other test timeout
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_render0.html
* igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
- shard-adlp: NOTRUN -> [SKIP][171] ([Intel XE#4733] / [Intel XE#5594]) +1 other test skip
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html
* igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
- shard-bmg: NOTRUN -> [SKIP][172] ([Intel XE#4733])
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
* igt@xe_pxp@pxp-termination-key-update-post-rpm:
- shard-dg2-set2: NOTRUN -> [SKIP][173] ([Intel XE#4733])
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-434/igt@xe_pxp@pxp-termination-key-update-post-rpm.html
* igt@xe_query@multigpu-query-pxp-status:
- shard-adlp: NOTRUN -> [SKIP][174] ([Intel XE#944])
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@xe_query@multigpu-query-pxp-status.html
* igt@xe_query@multigpu-query-topology-l3-bank-mask:
- shard-bmg: NOTRUN -> [SKIP][175] ([Intel XE#944])
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-7/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
* igt@xe_render_copy@render-stress-4-copies:
- shard-adlp: NOTRUN -> [SKIP][176] ([Intel XE#4814] / [Intel XE#5614])
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-6/igt@xe_render_copy@render-stress-4-copies.html
* igt@xe_spin_batch@spin-mem-copy:
- shard-adlp: NOTRUN -> [SKIP][177] ([Intel XE#4821])
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-1/igt@xe_spin_batch@spin-mem-copy.html
* igt@xe_sriov_flr@flr-each-isolation:
- shard-dg2-set2: NOTRUN -> [SKIP][178] ([Intel XE#3342])
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-434/igt@xe_sriov_flr@flr-each-isolation.html
#### Possible fixes ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-dp-4:
- shard-dg2-set2: [INCOMPLETE][179] ([Intel XE#2705] / [Intel XE#4212] / [Intel XE#4345]) -> [PASS][180] +1 other test pass
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-dp-4.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6:
- shard-dg2-set2: ([PASS][181], [INCOMPLETE][182]) ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][183]
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html
* igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic:
- shard-adlp: ([DMESG-WARN][184], [PASS][185]) ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][186]
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-adlp-1/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-adlp-8/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-8/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
* igt@kms_cursor_legacy@forked-bo:
- shard-bmg: [DMESG-WARN][187] ([Intel XE#5354]) -> [PASS][188] +1 other test pass
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-7/igt@kms_cursor_legacy@forked-bo.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-5/igt@kms_cursor_legacy@forked-bo.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-bmg: [INCOMPLETE][189] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][190] +1 other test pass
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-2/igt@kms_flip@flip-vs-suspend-interruptible.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-2/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-suspend@b-hdmi-a1:
- shard-adlp: [DMESG-WARN][191] ([Intel XE#4543]) -> [PASS][192] +8 other tests pass
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-adlp-6/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-2/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y:
- shard-adlp: [DMESG-FAIL][193] ([Intel XE#4543]) -> [PASS][194] +1 other test pass
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-adlp-9/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-8/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y:
- shard-adlp: [FAIL][195] ([Intel XE#1874]) -> [PASS][196]
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-adlp-9/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-8/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: ([SKIP][197], [PASS][198]) ([Intel XE#1503]) -> [PASS][199]
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@kms_hdr@invalid-hdr.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-4/igt@kms_hdr@invalid-hdr.html
* igt@xe_exec_reset@parallel-gt-reset:
- shard-bmg: [DMESG-WARN][200] ([Intel XE#3876]) -> [PASS][201]
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-8/igt@xe_exec_reset@parallel-gt-reset.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-8/igt@xe_exec_reset@parallel-gt-reset.html
* igt@xe_pm@s3-mocs:
- shard-bmg: [DMESG-WARN][202] -> [PASS][203]
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@xe_pm@s3-mocs.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@xe_pm@s3-mocs.html
#### Warnings ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: ([INCOMPLETE][204], [PASS][205]) ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345]) -> [INCOMPLETE][206] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168])
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
- shard-bmg: [SKIP][207] ([Intel XE#5390]) -> [SKIP][208] ([Intel XE#2312]) +7 other tests skip
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][209] ([Intel XE#2311]) -> [SKIP][210] ([Intel XE#2312]) +10 other tests skip
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt:
- shard-bmg: [SKIP][211] ([Intel XE#2313]) -> [SKIP][212] ([Intel XE#2312]) +10 other tests skip
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][213] ([Intel XE#3544]) -> [SKIP][214] ([Intel XE#3374] / [Intel XE#3544])
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-6/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: ([FAIL][215], [SKIP][216]) ([Intel XE#1729] / [Intel XE#2426]) -> [SKIP][217] ([Intel XE#2426])
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random:
- shard-adlp: ([PASS][218], [DMESG-FAIL][219]) ([Intel XE#3868] / [Intel XE#5213]) -> [ABORT][220] ([Intel XE#4917]) +1 other test abort
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-adlp-1/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8/shard-adlp-8/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/shard-adlp-8/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3099]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3099
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4821
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
[Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
[Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
[Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
[Intel XE#5338]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5338
[Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5416
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
[Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
[Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
[Intel XE#5614]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5614
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#6010]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6010
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#6168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6168
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6313
[Intel XE#6339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6339
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#702]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/702
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
Build changes
-------------
* Linux: xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8 -> xe-pw-155662v8
IGT_8587: 8587
xe-3929-7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8: 7ba235d0e0cf055008e2f28b3b3bea6673bfc6c8
xe-pw-155662v8: 155662v8
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155662v8/index.html
[-- Attachment #2: Type: text/html, Size: 68172 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 00/10] Preparatory patches for guardband optimization
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
` (14 preceding siblings ...)
2025-10-16 12:42 ` Patchwork
@ 2025-10-16 14:15 ` Nautiyal, Ankit K
15 siblings, 0 replies; 18+ messages in thread
From: Nautiyal, Ankit K @ 2025-10-16 14:15 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, jouni.hogander, animesh.manna, Uma Shankar
On 10/16/2025 11:24 AM, Ankit Nautiyal wrote:
> Handle few cases which will need changes when guardband will no longer
> be matched to vblank length.
> - Fix the vblank_start evaluation.
> - Fix PSR wake latency checks wrt to guradband.
>
> Rev 2: PSR went through some changes recently, rebase the patches on latest
> PSR changes.
>
> Rev 3: Address comments from Ville and Jouni:
> - Add a patch to move intel_dpll_crtc_compute_clock() early in the
> function.
> - Merge patch to adjust vblank_start and the readout changes.
> - Fix agument to alpm_config_valid()
> - Add documentation for retionale behind PSR late-stage configuration.
>
> Rev 4:
> - Update pipe_mode->vblank_start and actually merge patch to adjust
> vblank_start and readout changes.
>
> Rev 5:
> - Reset other psr flags based on features that are dropped.
>
> Rev 6:
> - Make the order of panel_replay/sel_update flags consistent in Patch#5
> - Add a patch to have separate function for
> intel_psr_set_non_psr_pipes()
> - Split patch to introduce intel_psr_compute_config_late() from patch to
> check final vblank. Move Wa_18037818876 and
> intel_psr_set_non_psr_pipes() to intel_psr_compute_config_late().
>
> Rev 7:
> - Address comments from Jouni on Patch#8
>
> Rev8:
> - Update the return type for intel_dp_compute_config_late() in patch#7
> - Add comments about pipe_mode update in patch#9
Thanks for the reviews. Pushed to drm-intel-next.
Regards,
Ankit
>
> Ankit Nautiyal (10):
> drm/i915/vrr: Use crtc_vsync_start/end for computing
> vrr.vsync_start/end
> drm/i915/display: Move intel_dpll_crtc_compute_clock early
> drm/i915/vrr:
> s/intel_vrr_compute_config_late/intel_vrr_compute_guardband
> drm/i915/vblank: Add helper to get correct vblank length
> drm/i915/psr: Consider SCL lines when validating vblank for wake
> latency
> drm/i915/psr: Introduce helper intel_psr_set_non_psr_pipes()
> drm/i915/display: Introduce dp/psr_compute_config_late()
> drm/i915/psr: Check if final vblank is sufficient for PSR features
> drm/i915/display: Add vblank_start adjustment logic for always-on VRR
> TG
> drm/i915/display: Prepare for vblank_delay for LRR
>
> drivers/gpu/drm/i915/display/intel_ddi.c | 7 +
> drivers/gpu/drm/i915/display/intel_display.c | 18 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 11 +
> drivers/gpu/drm/i915/display/intel_dp.h | 3 +
> drivers/gpu/drm/i915/display/intel_psr.c | 244 +++++++++++++------
> drivers/gpu/drm/i915/display/intel_psr.h | 2 +
> drivers/gpu/drm/i915/display/intel_vblank.c | 10 +
> drivers/gpu/drm/i915/display/intel_vblank.h | 2 +
> drivers/gpu/drm/i915/display/intel_vrr.c | 33 ++-
> drivers/gpu/drm/i915/display/intel_vrr.h | 2 +-
> drivers/gpu/drm/i915/display/skl_watermark.c | 3 +-
> 11 files changed, 246 insertions(+), 89 deletions(-)
>
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2025-10-16 14:15 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 01/10] drm/i915/vrr: Use crtc_vsync_start/end for computing vrr.vsync_start/end Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 02/10] drm/i915/display: Move intel_dpll_crtc_compute_clock early Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 03/10] drm/i915/vrr: s/intel_vrr_compute_config_late/intel_vrr_compute_guardband Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 04/10] drm/i915/vblank: Add helper to get correct vblank length Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 05/10] drm/i915/psr: Consider SCL lines when validating vblank for wake latency Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 06/10] drm/i915/psr: Introduce helper intel_psr_set_non_psr_pipes() Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 07/10] drm/i915/display: Introduce dp/psr_compute_config_late() Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 08/10] drm/i915/psr: Check if final vblank is sufficient for PSR features Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 09/10] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 10/10] drm/i915/display: Prepare for vblank_delay for LRR Ankit Nautiyal
2025-10-16 6:51 ` ✓ CI.KUnit: success for Preparatory patches for guardband optimization (rev8) Patchwork
2025-10-16 7:06 ` ✗ CI.checksparse: warning " Patchwork
2025-10-16 7:50 ` ✓ Xe.CI.BAT: success " Patchwork
2025-10-16 9:55 ` ✗ Xe.CI.Full: failure " Patchwork
2025-10-16 12:42 ` Patchwork
2025-10-16 14:15 ` [PATCH 00/10] Preparatory patches for guardband optimization Nautiyal, Ankit K
-- strict thread matches above, loose matches on Subject: below --
2025-10-15 7:22 Ankit Nautiyal
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox