[PATCH 0/5] drm/xe/cper: Software (driver-detected) CPER error reporting

[PATCH 0/5] drm/xe/cper: Software (driver-detected) CPER error reporting

[Mallesh Koujalagi]

This series wires up CPER record generation for driver-detected
(software) errors, i.e. the INTEL_SIGID_GPU_XE_SOFTWARE_START..
INTEL_SIGID_BATCH SIGID range, alongside the existing RAS-counter-
sourced (hardware) CPER path.

Patch 1 is a prerequisite carried over from patchwork series 169692
(https://patchwork.freedesktop.org/series/169692/), included here only
so the tree compiles; it is explicitly marked DO NOT REVIEW and is not
part of this submission.

Badal Nilawar (1):
  Add CPER logging support for CRI-Do not review

Mallesh Koujalagi (4):
  drm/xe/cper: Add driver error classification definitions
  drm/xe/cper: Let caller initialize error_class
  drm/xe/cper: Add CPER support for software errors
  drm/xe/log: Add software CPER KUnit test

 .../ABI/testing/sysfs-driver-intel-xe-cper    |  18 +
 drivers/gpu/drm/xe/Makefile                   |   3 +
 drivers/gpu/drm/xe/tests/xe_log_kunit.c       |  94 ++-
 drivers/gpu/drm/xe/xe_cper.c                  | 616 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_cper.h                  |  37 ++
 drivers/gpu/drm/xe/xe_cper_types.h            | 226 +++++++
 drivers/gpu/drm/xe/xe_device_types.h          |   4 +
 drivers/gpu/drm/xe/xe_log.c                   |   5 +-
 drivers/gpu/drm/xe/xe_ras.c                   | 249 ++++++-
 drivers/gpu/drm/xe/xe_ras.h                   |   5 +
 drivers/gpu/drm/xe/xe_ras_types.h             | 118 +++-
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |   2 +
 drivers/gpu/drm/xe/xe_trace_cper.c            |   9 +
 drivers/gpu/drm/xe/xe_trace_cper.h            |  65 ++
 14 files changed, 1418 insertions(+), 33 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-cper
 create mode 100644 drivers/gpu/drm/xe/xe_cper.c
 create mode 100644 drivers/gpu/drm/xe/xe_cper.h
 create mode 100644 drivers/gpu/drm/xe/xe_cper_types.h
 create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.c
 create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.h

-- 
2.48.1

[PATCH 1/5] Add CPER logging support for CRI-Do not review

[Mallesh Koujalagi]

From: Badal Nilawar <badal.nilawar@intel.com>

DO NOT REVIEW. COMPILATION ONLY
This patch is from https://patchwork.freedesktop.org/series/169692/
Added only for Compilation.

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 .../ABI/testing/sysfs-driver-intel-xe-cper    |  18 +
 drivers/gpu/drm/xe/Makefile                   |   3 +
 drivers/gpu/drm/xe/xe_cper.c                  | 530 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_cper.h                  |  37 ++
 drivers/gpu/drm/xe/xe_cper_types.h            | 185 ++++++
 drivers/gpu/drm/xe/xe_device_types.h          |   4 +
 drivers/gpu/drm/xe/xe_log.c                   |   5 +-
 drivers/gpu/drm/xe/xe_ras.c                   | 249 +++++++-
 drivers/gpu/drm/xe/xe_ras.h                   |   5 +
 drivers/gpu/drm/xe/xe_ras_types.h             | 118 +++-
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |   2 +
 drivers/gpu/drm/xe/xe_trace_cper.c            |   9 +
 drivers/gpu/drm/xe/xe_trace_cper.h            |  65 +++
 13 files changed, 1198 insertions(+), 32 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-cper
 create mode 100644 drivers/gpu/drm/xe/xe_cper.c
 create mode 100644 drivers/gpu/drm/xe/xe_cper.h
 create mode 100644 drivers/gpu/drm/xe/xe_cper_types.h
 create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.c
 create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.h

diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-cper b/Documentation/ABI/testing/sysfs-driver-intel-xe-cper
new file mode 100644
index 000000000000..19f56d2c0ab3
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-cper
@@ -0,0 +1,18 @@
+What:		/sys/bus/pci/drivers/xe/.../cper_on_query
+Date:		October 2026
+KernelVersion:	7.4
+Contact:	intel-xe@lists.freedesktop.org
+Description:
+		This file controls whether a CPER (Common Platform Error Record)
+		is emitted each time a RAS error counter is queried.
+
+		This sysfs file is present only on Intel Xe platforms that support
+		the RAS error counter interface and when the kernel is built with
+		CPER support. Reading the current setting is available to all
+		users, while updating it is restricted to administrative users
+		only.
+
+		The value is a boolean. When set to 1, every counter query emits
+		a CPER record built from the counter and its associated info
+		queue data. When set to 0 (default), no record is emitted on
+		query.
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 10930c924070..5458119ddf40 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -168,6 +168,9 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
 xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
 xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
 
+xe-$(CONFIG_UEFI_CPER) += xe_cper.o \
+			  xe_trace_cper.o
+
 # graphics virtualization (SR-IOV) support
 xe-y += \
 	xe_gt_sriov_vf.o \
diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
new file mode 100644
index 000000000000..0fedef06e138
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -0,0 +1,530 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <linux/bcd.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/minmax.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/sysfs.h>
+#include <linux/time.h>
+#include <linux/timekeeping.h>
+
+#include "xe_cper.h"
+#include "xe_cper_types.h"
+#include "xe_device.h"
+#include "xe_printk.h"
+#include "xe_ras.h"
+#include "xe_ras_types.h"
+#include "xe_trace_cper.h"
+
+static bool is_hw_sigid(enum xe_sigid sigid)
+{
+	return in_range(sigid, INTEL_SIGID_GPU_XE_HARDWARE_START, INTEL_SIGID_BATCH);
+}
+
+static const struct xe_platform_id_entry xe_platform_ids[] = {
+	/* 0x674C  platform/8086:674c */
+	{ 0x674C, GUID_INIT(0x9046afe5, 0x9041, 0x5124,
+			    0x86, 0x14, 0x92, 0x55, 0x0d, 0x9e, 0x9d, 0xa6) },
+	/* 0x674D  platform/8086:674d */
+	{ 0x674D, GUID_INIT(0xf95911b8, 0x6564, 0x5905,
+			    0xa6, 0xa7, 0xb9, 0xbf, 0x54, 0xab, 0x6c, 0x27) },
+	/* 0x674E  platform/8086:674e */
+	{ 0x674E, GUID_INIT(0xb8d24106, 0x0108, 0x59f1,
+			    0x8f, 0xfc, 0x9f, 0xc4, 0xa9, 0xc9, 0xb7, 0xb0) },
+	/* 0x674F  platform/8086:674f */
+	{ 0x674F, GUID_INIT(0xdd8dd88e, 0xef2f, 0x59b1,
+			    0x99, 0x15, 0xdb, 0x6f, 0x1d, 0xc9, 0xb4, 0x5d) },
+	/* 0x6750  platform/8086:6750 */
+	{ 0x6750, GUID_INIT(0x1dd66c44, 0x87d5, 0x524a,
+			    0xad, 0x6e, 0xfc, 0x18, 0x9d, 0x42, 0x6f, 0x1a) },
+	/* 0x6751  platform/8086:6751 */
+	{ 0x6751, GUID_INIT(0x17d0dd04, 0x2fad, 0x5400,
+			    0x99, 0xc8, 0x9b, 0x45, 0x51, 0x3b, 0x67, 0xe3) },
+};
+
+static const guid_t *lookup_platform_id(const struct pci_dev *pdev)
+{
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(xe_platform_ids); i++)
+		if (xe_platform_ids[i].device_id == pdev->device)
+			return &xe_platform_ids[i].platform_id;
+	return NULL;
+}
+
+static u64 cper_timestamp_now(void)
+{
+	struct tm tm;
+	u64 ts = 0;
+	u8 *p = (u8 *)&ts;
+	int year;
+
+	time64_to_tm(ktime_get_real_seconds(), 0, &tm);
+
+	year = tm.tm_year + 1900;
+
+	p[0] = bin2bcd(tm.tm_sec);
+	p[1] = bin2bcd(tm.tm_min);
+	p[2] = bin2bcd(tm.tm_hour);
+	p[3] = 0x1; /* precise time */
+	p[4] = bin2bcd(tm.tm_mday);
+	p[5] = bin2bcd(tm.tm_mon + 1);
+	p[6] = bin2bcd(year % 100);
+	p[7] = bin2bcd(year / 100);
+
+	return ts;
+}
+
+static void fill_cper_error_class(struct xe_cper_error_class *dst,
+				  const struct xe_ras_error_class *src)
+{
+	dst->error_type = src->common.severity;
+	dst->error_component = src->common.component;
+	dst->tile = src->product.unit.tile;
+	dst->instance = src->product.unit.instance;
+	dst->cause = src->product.cause.cause;
+}
+
+static void xe_cper_init_intel_err_hdr(struct xe_device *xe,
+				       const struct xe_ras_error_class *error_class,
+				       u64 first_timestamp, u32 sig_id, u32 error_count,
+				       struct xe_cper_sec_intel_err_hdr *ihdr)
+{
+	fill_cper_error_class(&ihdr->error_class, error_class);
+	ihdr->validation_bits |= XE_CPER_VALID_LOCATION;
+
+	if (first_timestamp) {
+		ihdr->first_timestamp = first_timestamp;
+		ihdr->validation_bits |= XE_CPER_VALID_FIRST_TIMESTAMP;
+	}
+
+	if (sig_id != U32_MAX) {
+		ihdr->sig_id = sig_id;
+		ihdr->validation_bits |= XE_CPER_VALID_SIG_ID;
+	}
+
+	ihdr->error_count = error_count;
+
+	strscpy(ihdr->pci_bdf, pci_name(to_pci_dev(xe->drm.dev)), sizeof(ihdr->pci_bdf));
+	ihdr->validation_bits |= XE_CPER_VALID_PCI_BDF;
+
+#ifdef MODULE
+	if (THIS_MODULE->srcversion) {
+		strscpy(ihdr->drv_version, THIS_MODULE->srcversion, sizeof(ihdr->drv_version));
+		ihdr->validation_bits |= XE_CPER_VALID_DRV_VERSION;
+	}
+#endif
+
+	/* TODO: fill fw_id and set XE_CPER_VALID_FW_ID */
+}
+
+static void xe_cper_record_emit(struct xe_device *xe, u8 severity,
+				const guid_t *notification_type,
+				const struct xe_cper_sec_intel_err_hdr *ihdr,
+				const void *einfo, u32 einfo_len)
+{
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	const guid_t *platform_id = lookup_platform_id(pdev);
+	u32 total_len = sizeof(struct xe_cper_nonstd_record) + einfo_len;
+	struct cper_section_descriptor *sdesc;
+	struct cper_record_header *rhdr;
+	struct xe_cper_nonstd_record *rec;
+
+	rec = kzalloc(total_len, GFP_KERNEL);
+	if (!rec)
+		return;
+
+	rhdr = &rec->record_hdr;
+	sdesc = &rec->section_desc;
+
+	/* Assemble the CPER record header (UEFI Appendix N.2.1) */
+	memcpy(rhdr->signature, CPER_SIG_RECORD, CPER_SIG_SIZE);
+	rhdr->revision          = CPER_RECORD_REV;
+	rhdr->signature_end     = CPER_SIG_END;
+	rhdr->section_count     = 1;
+	rhdr->error_severity    = severity;
+	rhdr->validation_bits   = CPER_VALID_TIMESTAMP;
+	rhdr->record_length     = total_len;
+	rhdr->timestamp         = cper_timestamp_now();
+	if (platform_id) {
+		rhdr->platform_id      = *platform_id;
+		rhdr->validation_bits |= CPER_VALID_PLATFORM_ID;
+	}
+	rhdr->creator_id        = INTEL_CPER_CREATOR_XEKMD;
+	rhdr->notification_type = *notification_type;
+	rhdr->record_id         = cper_next_record_id();
+
+	/* Assemble the section descriptor (UEFI Appendix N.2.2) */
+	sdesc->section_offset   = sizeof(struct cper_record_header) +
+				  sizeof(struct cper_section_descriptor);
+	sdesc->section_length   = sizeof(struct xe_cper_sec_intel_err_hdr) + einfo_len;
+	sdesc->revision         = CPER_SEC_REV;
+	sdesc->validation_bits  = 0;
+	sdesc->section_type     = INTEL_CPER_SECTION_ACCEL_GENERIC;
+	if (xe->info.has_device_uid) {
+		memcpy(&sdesc->fru_id, &xe->device_uid, sizeof(xe->device_uid));
+		sdesc->validation_bits |= CPER_SEC_VALID_FRU_ID;
+	}
+	sdesc->section_severity = severity;
+
+	/* Copy the Intel-specific section header */
+	rec->intel_hdr = *ihdr;
+
+	/* Append optional variable-length error info */
+	if (einfo && einfo_len)
+		memcpy((u8 *)rec + sizeof(*rec), einfo, einfo_len);
+
+	trace_xe_error_cper(xe, &rhdr->platform_id, &sdesc->fru_id, severity,
+			    &rec->intel_hdr, total_len, (u8 *)rec);
+
+	kfree(rec);
+}
+
+/* Entries built from RAS error logs carry fixed-size error_details */
+#define XE_CPER_RAS_LOG_ENTRY_SIZE \
+	(offsetof(struct xe_intel_priv_event_entry, metadata) + \
+	 sizeof_field(struct xe_ras_error_log, error_details))
+
+static struct xe_cper_sec_intel_error_info *
+build_einfo(const struct xe_ras_error_log *logs, u32 num_logs,
+	    const struct xe_ras_error_class *ec, u32 error_count)
+{
+	u32 queue_len = num_logs * XE_CPER_RAS_LOG_ENTRY_SIZE;
+	struct xe_cper_sec_intel_error_info *einfo;
+	struct xe_intel_priv_event_entry *entry;
+	u32 i;
+
+	einfo = kzalloc_flex(*einfo, event_queue, queue_len);
+	if (!einfo)
+		return NULL;
+
+	einfo->error_count        = error_count;
+	einfo->event_queue_length = queue_len;
+	einfo->event_queue_count  = num_logs;
+	fill_cper_error_class(&einfo->error_class, ec);
+
+	entry = (struct xe_intel_priv_event_entry *)einfo->event_queue;
+	for (i = 0; i < num_logs; i++) {
+		entry->entry_length = sizeof_field(struct xe_ras_error_log, error_details);
+		entry->timestamp    = logs[i].timestamp;
+		memcpy(entry->metadata, logs[i].error_details, sizeof(logs[i].error_details));
+		entry = (void *)entry + XE_CPER_RAS_LOG_ENTRY_SIZE;
+	}
+
+	return einfo;
+}
+
+static void free_einfo_arr(struct xe_cper_einfo_entry *einfo_arr, u32 count)
+{
+	u32 i;
+
+	for (i = 0; i < count; i++)
+		kfree(einfo_arr[i].einfo);
+	kfree(einfo_arr);
+}
+
+static bool fill_einfo_entry(struct xe_cper_einfo_entry *entry,
+			     const struct xe_ras_info_queue_dynamic_counter_hdr *hdr,
+			     const struct xe_ras_error_log *logs, u32 num_logs)
+{
+	entry->einfo = build_einfo(logs, num_logs, &hdr->error_class, hdr->counter);
+	if (!entry->einfo)
+		return false;
+
+	entry->einfo_size = struct_size(entry->einfo, event_queue,
+					entry->einfo->event_queue_length);
+	/* The first log is the first occurrence of the error */
+	entry->timestamp = logs[0].timestamp;
+	entry->hdr = *hdr;
+	return true;
+}
+
+static u32 build_detail_einfo(const struct xe_ras_error_class *error_class, u32 error_count,
+			      const struct xe_ras_error_log *logs, u32 num_logs,
+			      struct xe_cper_einfo_entry *einfo_arr)
+{
+	/* All logs belong to the queried class; the error count may exceed the logs kept */
+	const struct xe_ras_info_queue_dynamic_counter_hdr hdr = {
+		.error_class = *error_class,
+		.counter = error_count,
+	};
+
+	if (!num_logs)
+		return 0;
+
+	return fill_einfo_entry(&einfo_arr[0], &hdr, logs, num_logs) ? 1 : 0;
+}
+
+static u32 build_aggregate_einfo(struct xe_device *xe,
+				 const struct xe_ras_info_queue_dynamic_counter_hdr *hdrs,
+				 u32 num_hdrs, const struct xe_ras_error_log *logs,
+				 u32 avail_logs, struct xe_cper_einfo_entry *einfo_arr)
+{
+	u32 log_offset = 0, count = 0, i;
+
+	for (i = 0; i < num_hdrs; i++) {
+		/* @counter is the error count; firmware logs at most XE_RAS_NUM_COUNTERS */
+		u32 num_logs = min_t(u32, hdrs[i].counter, XE_RAS_NUM_COUNTERS);
+
+		if (num_logs > avail_logs - log_offset) {
+			xe_warn(xe, "CPER: header[%u] claims %u logs but only %u remain\n",
+				i, num_logs, avail_logs - log_offset);
+			break;
+		}
+
+		if (!num_logs)
+			continue;
+
+		if (!fill_einfo_entry(&einfo_arr[count], &hdrs[i], &logs[log_offset], num_logs))
+			break;
+
+		log_offset += num_logs;
+		count++;
+	}
+
+	return count;
+}
+
+/**
+ * xe_prepare_cper_error_info() - Build the CPER error info records from RAS info queue data
+ * @xe: xe device instance
+ * @counter_resp: counter response containing the first embedded chunk
+ * @error_class: RAS error class used to populate the einfo error_class fields
+ * @count_out: output number of entries in the returned array
+ *
+ * Assembles the complete raw info queue data from the first chunk already
+ * embedded in @counter_resp and any additional chunks fetched via
+ * GET_INFO_QUEUE.  Two use cases are supported based on num_headers in
+ * the info queue header:
+ *
+ * Detail error counter (num_headers == 0)::
+ *
+ *   [xe_ras_error_log * N]
+ *
+ *   Returns one xe_cper_einfo_entry covering all N logs.
+ *
+ * Aggregate error counter (num_headers > 0)::
+ *
+ *   [xe_ras_info_queue_dynamic_counter_hdr * num_headers]
+ *   [xe_ras_error_log * N]
+ *
+ *   Returns one xe_cper_einfo_entry per header.  Each header's @counter field
+ *   is the error count of its class; at most XE_RAS_NUM_COUNTERS
+ *   xe_ras_error_log entries follow it and its @error_class is used to
+ *   populate the entry's einfo->error_class.
+ *
+ * Returns: allocated xe_cper_einfo_entry array on success (caller must free it
+ *          with free_einfo_arr()), NULL if no error info could be built.
+ *          @count_out is set to the number of entries in the array.
+ */
+static struct xe_cper_einfo_entry *
+xe_prepare_cper_error_info(struct xe_device *xe,
+			   const struct xe_ras_get_counter_response *counter_resp,
+			   const struct xe_ras_error_class *error_class,
+			   u32 *count_out)
+{
+	const struct xe_ras_info_queue_header *first_qhdr = &counter_resp->first.header;
+	struct xe_cper_einfo_entry *einfo_arr = NULL;
+	const struct xe_ras_error_log *logs;
+	u32 buf_size, raw_total, num_headers, headers_size;
+	u32 avail_logs, count = 0;
+	u8 *raw_buf = NULL;
+
+	if (!first_qhdr->total_size) {
+		xe_warn(xe, "CPER: info queue reports zero total size\n");
+		goto out;
+	}
+
+	buf_size = min(first_qhdr->total_size, XE_RAS_INFO_QUEUE_MAX_TOTAL_SIZE);
+	raw_buf = kzalloc_objs(*raw_buf, buf_size);
+	if (!raw_buf)
+		goto out;
+
+	raw_total = xe_ras_drain_info_queue_raw(xe, counter_resp, raw_buf, buf_size);
+	if (!raw_total)
+		goto out;
+
+	num_headers = first_qhdr->num_headers;
+	headers_size = num_headers * sizeof(struct xe_ras_info_queue_dynamic_counter_hdr);
+	if (headers_size > raw_total) {
+		xe_warn(xe, "CPER: aggregate headers size (%u) exceeds raw total (%u)\n",
+			headers_size, raw_total);
+		goto out;
+	}
+
+	logs = (const struct xe_ras_error_log *)(raw_buf + headers_size);
+	avail_logs = (raw_total - headers_size) / sizeof(*logs);
+
+	einfo_arr = kzalloc_objs(*einfo_arr, num_headers ?: 1);
+	if (!einfo_arr)
+		goto out;
+
+	if (num_headers)
+		count = build_aggregate_einfo(xe, (const void *)raw_buf, num_headers,
+					      logs, avail_logs, einfo_arr);
+	else
+		count = build_detail_einfo(error_class, counter_resp->value,
+					   logs, avail_logs, einfo_arr);
+
+	if (!count) {
+		kfree(einfo_arr);
+		einfo_arr = NULL;
+	}
+out:
+	kfree(raw_buf);
+	*count_out = count;
+	return einfo_arr;
+}
+
+/**
+ * xe_cper_emit_counter() - Emit CPER records for an already fetched error counter
+ * @xe: The &xe_device
+ * @cper_sev: CPER severity
+ * @sigid: Error signature identifier
+ * @error_class: RAS error class of the counter
+ * @resp: Counter response returned by firmware for @error_class
+ *
+ * Build and emit CPER records from @resp, including any info queue data.
+ * Must be called from a sleepable context with a runtime PM reference held.
+ */
+void xe_cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+			  const struct xe_ras_error_class *error_class,
+			  const struct xe_ras_get_counter_response *resp)
+{
+	struct xe_cper_einfo_entry *einfo_arr = NULL, *entries;
+	struct xe_cper_einfo_entry single = {};
+	u32 einfo_count = 0, count, i;
+
+	if (!is_hw_sigid(sigid))
+		return;
+
+	/* Draining the info queue sends sysctrl commands */
+	might_sleep();
+	xe_device_assert_mem_access(xe);
+
+	/* Without info queue data, emit a single record from the counter itself */
+	single.hdr.error_class = *error_class;
+	single.hdr.counter = resp->value;
+	single.timestamp = resp->timestamp;
+	entries = &single;
+	count = 1;
+
+	if (resp->has_info_queue) {
+		einfo_arr = xe_prepare_cper_error_info(xe, resp, error_class, &einfo_count);
+		if (einfo_arr) {
+			entries = einfo_arr;
+			count = einfo_count;
+		} else {
+			xe_warn(xe, "CPER: failed to build error info from info queue, emitting record without it\n");
+		}
+	}
+
+	for (i = 0; i < count; i++) {
+		struct xe_cper_sec_intel_err_hdr ihdr = {};
+
+		xe_cper_init_intel_err_hdr(xe, &entries[i].hdr.error_class, entries[i].timestamp,
+					   sigid, entries[i].hdr.counter, &ihdr);
+
+		xe_cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_GPU_ERROR, &ihdr,
+				    entries[i].einfo, entries[i].einfo_size);
+	}
+
+	free_einfo_arr(einfo_arr, einfo_count);
+}
+
+static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+				const struct xe_ras_error_class *error_class)
+{
+	struct xe_ras_get_counter_response resp;
+
+	/* Fetching the counter sends a sysctrl command */
+	might_sleep();
+	xe_device_assert_mem_access(xe);
+
+	if (xe_ras_get_counter_response(xe, error_class, &resp)) {
+		xe_err(xe, "CPER: failed to get counter, skipping record\n");
+		return;
+	}
+
+	xe_cper_emit_counter(xe, cper_sev, sigid, error_class, &resp);
+}
+
+/**
+ * xe_cper_emit() - Emit a CPER record for a SIGID log entry
+ * @xe: The &xe_device
+ * @cper_sev: CPER severity
+ * @sigid: Error signature identifier
+ * @component: Component identifier
+ * @location: Location details of the @component
+ * @data: Pointer to the additional details, or ERR_PTR, or NULL if not applicable
+ * @len: Length of the @data in bytes, or 0 if not applicable
+ * @vaf: Formatted log message
+ *
+ * Emit a CPER record for a SIGID log entry
+ */
+void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+		  u32 component, u32 location, const void *data, size_t len,
+		  struct va_format *vaf)
+{
+	if (!xe)
+		return;
+
+	if (is_hw_sigid(sigid)) {
+		if (!IS_ERR_OR_NULL(data) && len == sizeof(struct xe_ras_error_class))
+			xe_cper_emit_hw_err(xe, cper_sev, sigid, data);
+		return;
+	}
+
+	/* TODO software CPER */
+}
+
+static ssize_t cper_on_query_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct xe_device *xe = kdev_to_xe_device(dev);
+
+	return sysfs_emit(buf, "%u\n", READ_ONCE(xe->cper.on_query));
+}
+
+static ssize_t cper_on_query_store(struct device *dev, struct device_attribute *attr,
+				   const char *buf, size_t count)
+{
+	struct xe_device *xe = kdev_to_xe_device(dev);
+	bool enable;
+	int ret;
+
+	ret = kstrtobool(buf, &enable);
+	if (ret)
+		return ret;
+
+	WRITE_ONCE(xe->cper.on_query, enable);
+
+	return count;
+}
+static DEVICE_ATTR_RW(cper_on_query);
+
+static struct attribute *cper_attrs[] = {
+	&dev_attr_cper_on_query.attr,
+	NULL
+};
+
+/* See Documentation/ABI/testing/sysfs-driver-intel-xe-cper */
+static const struct attribute_group cper_group = {
+	.attrs = cper_attrs,
+};
+
+/**
+ * xe_cper_sysfs_init() - Create the CPER sysfs attributes
+ * @xe: The &xe_device
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int xe_cper_sysfs_init(struct xe_device *xe)
+{
+	return devm_device_add_group(xe->drm.dev, &cper_group);
+}
diff --git a/drivers/gpu/drm/xe/xe_cper.h b/drivers/gpu/drm/xe/xe_cper.h
new file mode 100644
index 000000000000..ad50349c0a6f
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_cper.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_CPER_H_
+#define _XE_CPER_H_
+
+#include <linux/types.h>
+
+#include "abi/xe_sigid_abi.h"
+
+struct va_format;
+struct xe_device;
+struct xe_ras_error_class;
+struct xe_ras_get_counter_response;
+
+#if IS_ENABLED(CONFIG_UEFI_CPER)
+void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+		  u32 component, u32 location, const void *data, size_t len,
+		  struct va_format *vaf);
+void xe_cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+			  const struct xe_ras_error_class *error_class,
+			  const struct xe_ras_get_counter_response *resp);
+int xe_cper_sysfs_init(struct xe_device *xe);
+#else
+static inline void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+				u32 component, u32 location, const void *data, size_t len,
+				struct va_format *vaf) {}
+static inline void xe_cper_emit_counter(struct xe_device *xe, int cper_sev,
+					enum xe_sigid sigid,
+					const struct xe_ras_error_class *error_class,
+					const struct xe_ras_get_counter_response *resp) {}
+static inline int xe_cper_sysfs_init(struct xe_device *xe) { return 0; }
+#endif
+
+#endif /* _XE_CPER_H_ */
diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
new file mode 100644
index 000000000000..e0034429e661
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_cper_types.h
@@ -0,0 +1,185 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_CPER_TYPES_H_
+#define _XE_CPER_TYPES_H_
+
+#include <linux/cper.h>
+#include <linux/types.h>
+#include <linux/uuid.h>
+
+#include "xe_ras_types.h"
+
+/*
+ * Validation bits definition for validation_bits in struct
+ * xe_cper_sec_intel_err_hdr. When set, corresponding fields in header
+ * contains valid data
+ */
+#define XE_CPER_VALID_LOCATION		0x0001
+#define XE_CPER_VALID_FIRST_TIMESTAMP	0x0002
+#define XE_CPER_VALID_SIG_ID		0x0004
+#define XE_CPER_VALID_PCI_BDF		0x0008
+#define XE_CPER_VALID_DRV_VERSION	0x0010
+#define XE_CPER_VALID_FW_ID		0x0020
+
+/*
+ * Intel CPER GUID Namespace — RFC 9562 UUIDv5 (SHA-1 name-based)
+ *
+ * All values below are generated deterministically by uuid generator.
+ * Do not hand-edit the byte values.
+ */
+
+/* Creator IDs */
+#define INTEL_CPER_CREATOR_XEKMD \
+	GUID_INIT(0x9a42070f, 0xdf9d, 0x555e, \
+		  0xba, 0x02, 0x7c, 0xbc, 0x86, 0x3d, 0x37, 0x1c)
+
+/* Notification Types */
+#define INTEL_CPER_NOTIFY_GPU_ERROR \
+	GUID_INIT(0x4ae12aef, 0x8745, 0x5fc7, \
+		  0xb9, 0x96, 0x71, 0xee, 0xbb, 0x51, 0xf2, 0x23)
+
+/* Section Types */
+#define INTEL_CPER_SECTION_ACCEL_GENERIC \
+	GUID_INIT(0xea9d8f84, 0x4258, 0x5227, \
+		  0x80, 0x28, 0xb9, 0xb1, 0x3e, 0x6d, 0x58, 0xb0)
+
+#pragma pack(push, 1)
+
+/**
+ * struct xe_cper_error_class - Intel GPU CPER error classification
+ */
+struct xe_cper_error_class {
+	/** @error_type: RAS error severity */
+	u8  error_type;
+	/** @error_component: IP block that raised the error */
+	u8  error_component;
+	/** @tile: Tile number */
+	u8  tile;
+	/** @instance: Instance within the tile */
+	u32 instance;
+	/** @cause: Error cause code */
+	u32 cause;
+	/** @reserved: Reserved, must be zero */
+	u8  reserved;
+};
+
+/**
+ * struct xe_cper_sec_intel_err_hdr - Intel-specific CPER error section header
+ *
+ * Fixed-size header for the Intel GPU error section of a CPER record.
+ * All multi-byte fields are little-endian; the structure is packed.
+ */
+struct xe_cper_sec_intel_err_hdr {
+	/** @error_class: Error classification (type, component, location, cause) */
+	struct xe_cper_error_class error_class;
+	/** @first_timestamp: First occurrence of this error class, in ticks */
+	u64 first_timestamp;
+	/** @sig_id: Aggregated error class SIG ID; set to U32_MAX if unknown */
+	u32 sig_id;
+	/** @error_count: Number of times this error has been observed */
+	u32 error_count;
+	/** @validation_bits: Raw u16 view of all valid bits */
+	u16 validation_bits;
+	/** @pci_bdf: PCI location string, format "DDDD:bb:dd.f" */
+	char pci_bdf[16];
+	/** @drv_version: Driver source version string (THIS_MODULE->srcversion) */
+	char drv_version[25];
+	/** @fw_id: Firmware version string (GFSP+PCODE+CSC+GUC or MNG+NUC+RAS+GUC) */
+	char fw_id[256];
+	/** @reserved: Reserved for future use, must be zero */
+	u8 reserved[5];
+};
+
+/**
+ * struct xe_cper_sec_intel_error_info - Variable-length Intel GPU error payload
+ *
+ * Appended after &xe_cper_sec_intel_err_hdr when detailed per-event data
+ * is available. The @event_queue flexible array holds @event_queue_count
+ * packed &xe_intel_priv_event_entry records.
+ */
+struct xe_cper_sec_intel_error_info {
+	/** @error_class: Error classification */
+	struct xe_cper_error_class error_class;
+	/** @error_count: Total number of errors recorded */
+	u32 error_count;
+	/** @event_queue_length: Total byte size of the @event_queue array */
+	u32 event_queue_length;
+	/** @event_queue_count: Number of entries in @event_queue */
+	u32 event_queue_count;
+	/** @event_queue: Packed array of &xe_intel_priv_event_entry records */
+	u8 event_queue[];
+};
+
+/**
+ * struct xe_intel_priv_event_entry - Single error event in the event queue
+ *
+ * Each entry is variable-length; @entry_length gives the byte size of
+ * @metadata only (not including @entry_length or @timestamp).
+ */
+struct xe_intel_priv_event_entry {
+	/** @entry_length: Byte length of the @metadata payload */
+	u32 entry_length;
+	/** @timestamp: Timestamp of this event, in firmware ticks */
+	u64 timestamp;
+	/** @metadata: Event-specific payload bytes */
+	u8  metadata[];
+};
+
+/**
+ * struct xe_cper_nonstd_record - Intel GPU CPER record
+ *
+ * Contains the standard CPER record header, section descriptor, and the
+ * Intel error section header. A &xe_cper_sec_intel_error_info payload
+ * may be appended dynamically.
+ */
+struct xe_cper_nonstd_record {
+	/** @record_hdr: Standard CPER record header (UEFI Appendix N.2.1) */
+	struct cper_record_header record_hdr;
+	/** @section_desc: CPER section descriptor */
+	struct cper_section_descriptor section_desc;
+	/** @intel_hdr: Intel-specific error section header */
+	struct xe_cper_sec_intel_err_hdr intel_hdr;
+};
+
+#pragma pack(pop)
+
+/**
+ * struct xe_platform_id_entry - Mapping from PCI device ID to CPER platform GUID
+ *
+ * Used to resolve the platform_id field in a CPER section descriptor.
+ * GUIDs are UUIDv5 (RFC 9562, SHA-1) derived from the Intel CPER namespace
+ * with name string "platform/8086:<dev_id_hex_lower>".
+ */
+struct xe_platform_id_entry {
+	/** @device_id: PCI device ID */
+	u16       device_id;
+	/** @platform_id: Corresponding UUIDv5 platform GUID */
+	guid_t    platform_id;
+};
+
+/**
+ * struct xe_cper_einfo_entry - One CPER error info payload and its source counter
+ */
+struct xe_cper_einfo_entry {
+	/** @hdr: Error class and counter value used for the CPER section header */
+	struct xe_ras_info_queue_dynamic_counter_hdr hdr;
+	/** @einfo: Allocated error info payload, NULL if none */
+	struct xe_cper_sec_intel_error_info *einfo;
+	/** @einfo_size: Byte size of @einfo including the event queue */
+	u32 einfo_size;
+	/** @timestamp: Timestamp of the first occurrence of this error class */
+	u64 timestamp;
+};
+
+/**
+ * struct xe_cper - Xe CPER state
+ */
+struct xe_cper {
+	/** @on_query: Emit a CPER record on each RAS counter query */
+	bool on_query;
+};
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index aa3a98ddb457..cd93142c68ba 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -12,6 +12,7 @@
 #include <drm/drm_file.h>
 #include <drm/ttm/ttm_device.h>
 
+#include "xe_cper_types.h"
 #include "xe_devcoredump_types.h"
 #include "xe_drm_ras_types.h"
 #include "xe_heci_gsc.h"
@@ -590,6 +591,9 @@ struct xe_device {
 		struct xe_ras_state state;
 	} ras;
 
+	/** @cper: CPER state */
+	struct xe_cper cper;
+
 	/** @i2c: I2C host controller */
 	struct xe_i2c *i2c;
 
diff --git a/drivers/gpu/drm/xe/xe_log.c b/drivers/gpu/drm/xe/xe_log.c
index 29eb16db3320..80e2b1724ceb 100644
--- a/drivers/gpu/drm/xe/xe_log.c
+++ b/drivers/gpu/drm/xe/xe_log.c
@@ -8,6 +8,7 @@
 
 #include "abi/xe_log_abi.h"
 
+#include "xe_cper.h"
 #include "xe_device.h"
 #include "xe_log.h"
 #include "xe_pci_types.h"
@@ -19,7 +20,9 @@ static void log_emit_cper(struct pci_dev *pdev, int cper_sev, enum xe_sigid sigi
 {
 	KUNIT_STATIC_STUB_REDIRECT(log_emit_cper, pdev, cper_sev, sigid,
 				   component, location, data, len, vaf);
-	/* TODO */
+
+	xe_cper_emit(xe_any_to_xe(pdev), cper_sev, sigid,
+		     component, location, data, len, vaf);
 }
 
 static const char *log_unknown_component_prefix(u32 component)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 9c15ce8f0b6a..afd41b7e9e86 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -3,9 +3,12 @@
  * Copyright © 2026 Intel Corporation
  */
 
+#include <linux/bitfield.h>
+
 #include "xe_assert.h"
 #include "xe_bo.h"
 #include "xe_configfs.h"
+#include "xe_cper.h"
 #include "xe_debugfs.h"
 #include "xe_device.h"
 #include "xe_drm_ras.h"
@@ -109,8 +112,6 @@ static const char * const gpu_health_states[] = {
 };
 static_assert(ARRAY_SIZE(gpu_health_states) == XE_RAS_HEALTH_MAX);
 
-static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter, u32 *value);
-
 static u8 drm_to_xe_ras_severity(u8 severity)
 {
 	switch (severity) {
@@ -191,6 +192,44 @@ static int ras_status_to_errno(u32 status)
 	}
 }
 
+static enum xe_sigid ras_comp_to_hw_sigid(u8 component)
+{
+	switch (component) {
+	case XE_RAS_COMP_DEVICE_MEMORY:
+		return XE_SIGID_DEVICE_MEMORY;
+	case XE_RAS_COMP_CORE_COMPUTE:
+		return XE_SIGID_CORE_COMPUTE;
+	case XE_RAS_COMP_PCIE:
+		return XE_SIGID_PCIE;
+	case XE_RAS_COMP_FABRIC:
+		return XE_SIGID_FABRIC;
+	case XE_RAS_COMP_SOC_INTERNAL:
+		return XE_SIGID_SOC_INTERNAL;
+	default:
+		return XE_SIGID_HW;
+	}
+}
+
+static u8 ras_sev_to_cper_sev(u8 ras_sev)
+{
+	switch (ras_sev) {
+	case XE_RAS_SEV_CORRECTABLE:
+		return CPER_SEV_CORRECTED;
+	case XE_RAS_SEV_UNCORRECTABLE:
+		return CPER_SEV_RECOVERABLE;
+	case XE_RAS_SEV_INFORMATIONAL:
+		return CPER_SEV_INFORMATIONAL;
+	default:
+		return CPER_SEV_RECOVERABLE;
+	}
+}
+
+static u16 ras_comp_to_log_comp(u8 component)
+{
+	return FIELD_PREP(XE_LOG_COMPONENT_CLASS_MASK, XE_LOG_COMPONENT_CLASS_HARDWARE) |
+	       FIELD_PREP(XE_LOG_COMPONENT_TYPE_MASK, component);
+}
+
 static inline const char *sev_to_str(u8 severity)
 {
 	if (severity >= XE_RAS_SEV_MAX)
@@ -526,38 +565,44 @@ static void ras_usp_aer_init(struct xe_device *xe)
 static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component)
 {
 	struct xe_ras_error_class counter = {0};
+	struct xe_ras_get_counter_response response = {0};
 	u8 drm_severity, drm_component;
-	u32 value;
 	int ret;
 
 	counter.common.severity = severity;
 	counter.common.component = component;
 
-	ret = get_counter(xe, &counter, &value);
+	ret = xe_ras_get_counter_response(xe, &counter, &response);
 	if (ret)
 		return;
 
 	drm_severity = xe_to_drm_ras_severity(severity);
 	drm_component = xe_to_drm_ras_component(component);
 
-	xe_drm_ras_event(xe, drm_component, drm_severity, value);
+	xe_drm_ras_event(xe, drm_component, drm_severity, response.value);
 }
 
-static u8 handle_core_compute_errors(struct xe_ras_error_array *arr)
+static u8 handle_core_compute_errors(struct xe_device *xe, struct xe_ras_error_array *arr)
 {
 	struct xe_ras_compute_error *error_info = (void *)arr->details;
+	u8 cper_sev = ras_sev_to_cper_sev(arr->counter.common.severity);
 	u8 uncorr_type;
 
 	uncorr_type = FIELD_GET(CORE_COMPUTE_UNCORR_TYPE, error_info->log_header);
 
 	/* Request a reset if error is global */
-	if (uncorr_type == GLOBAL_UNCORR_ERROR)
+	if (uncorr_type == GLOBAL_UNCORR_ERROR) {
+		xe_log_comp(xe, cper_sev, CORE_COMPUTE, &arr->counter, sizeof(arr->counter),
+			    "Global uncorrectable error detected\n");
 		return XE_RAS_RECOVERY_ACTION_RESET;
+	}
 
 	/*
 	 * No action needed for other errors.
 	 * Local errors are recovered using an engine reset by GuC.
 	 */
+	xe_log_comp(xe, cper_sev, CORE_COMPUTE, &arr->counter, sizeof(arr->counter),
+		    "Other compute errors\n");
 	return XE_RAS_RECOVERY_ACTION_RECOVERED;
 }
 
@@ -571,7 +616,6 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
 {
 	struct xe_ras_soc_error *info = (void *)arr->details;
 	struct xe_ras_soc_error_source *source = &info->source;
-	struct xe_ras_error_class *counter = &arr->counter;
 
 	if (source->csc) {
 		struct xe_ras_csc_error *csc_error = (void *)info->details;
@@ -585,9 +629,8 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
 		 * is required.
 		 */
 		if (csc_error->hec_fw_error) {
-			xe_err(xe, "[RAS]: CSC %s detected: 0x%x\n",
-			       sev_to_str(counter->common.severity),
-			       csc_error->hec_fw_error);
+			xe_log_comp_fatal(xe, SOC_INTERNAL, &arr->counter, sizeof(arr->counter),
+					  "CSC error detected: 0x%x\n", csc_error->hec_fw_error);
 			xe_survivability_mode_runtime_enable(xe);
 			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
 		}
@@ -595,9 +638,9 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
 		struct xe_ras_ieh_error *ieh_error = (void *)info->details;
 
 		if (ieh_error->global_error_status & XE_RAS_SOC_IEH_PUNIT) {
-			xe_err(xe, "[RAS]: PUNIT %s detected: 0x%x\n",
-			       sev_to_str(counter->common.severity),
-			       ieh_error->global_error_status);
+			xe_log_comp_fatal(xe, SOC_INTERNAL, &arr->counter, sizeof(arr->counter),
+					  "PUNIT error detected: 0x%x\n",
+					  ieh_error->global_error_status);
 			punit_error_handler(xe);
 			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
 		}
@@ -621,10 +664,12 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
 	 */
 	switch (info->category) {
 	case XE_RAS_MEMORY_POISON:
-		xe_info(xe, "[RAS]: Poison error detected\n");
+		xe_log_comp_info(xe, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+				 "Poison error detected\n");
 		break;
 	case XE_RAS_MEMORY_DATA_PARITY:
-		xe_info(xe, "[RAS]: Data parity error detected\n");
+		xe_log_comp_info(xe, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+				 "Data parity error detected\n");
 		break;
 	case XE_RAS_MEMORY_DB_ECC:
 		ret = handle_page_offline(xe, info->sw_address, true);
@@ -664,8 +709,11 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 		if (!ras_counter_is_valid(xe, &errors[id]))
 			continue;
 
-		xe_warn(xe, "[RAS]: %s %s detected\n",
-			comp_to_str(component), sev_to_str(severity));
+		xe_log_from(xe, ras_sev_to_cper_sev(severity),
+			    ras_comp_to_hw_sigid(component),
+			    ras_comp_to_log_comp(component),
+			    &errors[id], sizeof(errors[id]),
+			    "error detected\n");
 
 		/* Send event once per component */
 		if (sent & BIT(component))
@@ -676,19 +724,30 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 	}
 }
 
-static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter, u32 *value)
+/**
+ * xe_ras_get_counter_response() - Get error counter record
+ * @xe: Xe device instance
+ * @counter: RAS error class
+ * @out: Counter record retrieved
+ *
+ * Retrieve the counter record of a specific error class from firmware.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
+				struct xe_ras_get_counter_response *out)
 {
-	struct xe_ras_get_counter_response response = {0};
 	struct xe_ras_get_counter_request request = {0};
 	struct xe_sysctrl_mailbox_command command = {0};
 	struct xe_ras_error_common *common;
 	size_t rlen;
 	int ret;
 
+	memset(out, 0, sizeof(*out));
 	request.counter = *counter;
 
 	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_COUNTER,
-				  &request, sizeof(request), &response, sizeof(response));
+				  &request, sizeof(request), out, sizeof(*out));
 
 	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
 	if (ret) {
@@ -696,19 +755,18 @@ static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter,
 		return ret;
 	}
 
-	if (rlen != sizeof(response)) {
+	if (rlen != sizeof(*out)) {
 		xe_err(xe, "sysctrl: unexpected get counter response length %zu (expected %zu)\n",
-		       rlen, sizeof(response));
+		       rlen, sizeof(*out));
 		return -EIO;
 	}
 
-	if (!ras_counter_is_valid(xe, &response.counter))
+	if (!ras_counter_is_valid(xe, &out->counter))
 		return -EBADMSG;
 
-	common = &response.counter.common;
-	*value = response.value;
+	common = &out->counter.common;
 
-	xe_dbg(xe, "[RAS]: get counter %u for %s %s\n", *value, comp_to_str(common->component),
+	xe_dbg(xe, "[RAS]: get counter %u for %s %s\n", out->value, comp_to_str(common->component),
 	       sev_to_str(common->severity));
 
 	return 0;
@@ -791,7 +849,7 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 
 			switch (component) {
 			case XE_RAS_COMP_CORE_COMPUTE:
-				action = handle_core_compute_errors(arr);
+				action = handle_core_compute_errors(xe, arr);
 				break;
 			case XE_RAS_COMP_SOC_INTERNAL:
 				action = handle_soc_internal_errors(xe, arr);
@@ -839,12 +897,24 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 int xe_ras_get_counter(struct xe_device *xe, u8 severity, u8 component, u32 *value)
 {
 	struct xe_ras_error_class counter = {0};
+	struct xe_ras_get_counter_response response = {0};
+	int ret;
 
 	counter.common.severity = drm_to_xe_ras_severity(severity);
 	counter.common.component = drm_to_xe_ras_component(component);
 
 	guard(xe_pm_runtime)(xe);
-	return get_counter(xe, &counter, value);
+	ret = xe_ras_get_counter_response(xe, &counter, &response);
+	if (ret)
+		return ret;
+
+	*value = response.value;
+
+	if (READ_ONCE(xe->cper.on_query))
+		xe_cper_emit_counter(xe, ras_sev_to_cper_sev(counter.common.severity),
+				     ras_comp_to_hw_sigid(counter.common.component),
+				     &counter, &response);
+	return 0;
 }
 
 /**
@@ -1016,6 +1086,123 @@ int xe_ras_set_threshold(struct xe_device *xe, u8 severity, u8 component, u32 th
 	return 0;
 }
 
+static int get_info_queue_data(struct xe_device *xe,
+			       struct xe_ras_get_info_queue_request *req,
+			       struct xe_ras_get_info_queue_response *out)
+{
+	struct xe_ras_get_info_queue_response response = {0};
+	struct xe_sysctrl_mailbox_command command = {0};
+	const struct xe_ras_info_queue_header *hdr;
+	size_t rlen;
+	int ret;
+
+	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_INFO_QUEUE,
+				  req, sizeof(*req), &response, sizeof(response));
+
+	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+	if (ret) {
+		xe_err(xe, "sysctrl: failed to get info queue data %d\n", ret);
+		return ret;
+	}
+
+	if (rlen != sizeof(response)) {
+		xe_err(xe, "sysctrl: unexpected get info queue data response length %zu (expected %zu)\n",
+		       rlen, sizeof(response));
+		return -EIO;
+	}
+
+	hdr = &response.queue_response.header;
+	xe_dbg(xe, "[RAS]: info queue data: status=%u chunk_size=%u flags=0x%x\n",
+	       response.operation_status, hdr->chunk_size, hdr->flags);
+
+	*out = response;
+	return 0;
+}
+
+static bool chunk_is_valid(const struct xe_ras_info_queue_header *hdr,
+			   u32 expected_offset, u32 dest_size)
+{
+	u32 end;
+
+	return hdr->chunk_offset == expected_offset &&
+	       hdr->chunk_size && hdr->chunk_size <= XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE &&
+	       !check_add_overflow(hdr->chunk_offset, hdr->chunk_size, &end) &&
+	       end <= XE_RAS_INFO_QUEUE_MAX_TOTAL_SIZE && end <= dest_size;
+}
+
+/**
+ * xe_ras_drain_info_queue_raw() - Drain the full RAS info queue into a flat buffer
+ * @xe: xe device
+ * @counter_resp: counter response carrying the first embedded chunk and the
+ *                counter identifier used as the source context for subsequent
+ *                GET_INFO_QUEUE fetches
+ * @dest_buf: destination buffer supplied by the caller
+ * @dest_size: size of @dest_buf in bytes; also caps the total amount of data
+ *             assembled from the info queue
+ *
+ * Copies the first chunk already embedded in @counter_resp, then loops
+ * issuing GET_INFO_QUEUE to fetch any remaining chunks until the queue
+ * signals no more data or a transport/bounds error is encountered.  On
+ * transport or bounds errors the function stops and returns whatever has
+ * been assembled so far.
+ *
+ * Returns: number of valid bytes written into @dest_buf.  Zero if @dest_buf is
+ *          NULL or @dest_size is 0.
+ */
+u32 xe_ras_drain_info_queue_raw(struct xe_device *xe,
+				const struct xe_ras_get_counter_response *counter_resp,
+				u8 *dest_buf, u32 dest_size)
+{
+	const struct xe_ras_info_queue_header *first_hdr = &counter_resp->first.header;
+	struct xe_ras_get_info_queue_request req = {0};
+	struct xe_ras_get_info_queue_response resp;
+	u32 flags = first_hdr->flags;
+	u32 offset = 0;
+
+	if (!dest_buf || !dest_size)
+		return 0;
+
+	if (first_hdr->total_size > dest_size)
+		xe_warn(xe, "[RAS]: info queue size %u exceeds %u, truncating\n",
+			first_hdr->total_size, dest_size);
+
+	/* Copy first chunk already embedded in the counter response */
+	if (chunk_is_valid(first_hdr, offset, dest_size)) {
+		memcpy(dest_buf, counter_resp->first.data, first_hdr->chunk_size);
+		offset = first_hdr->chunk_size;
+	}
+
+	req.source_command = XE_SYSCTRL_CMD_GET_COUNTER;
+	req.source_context = counter_resp->counter;
+	req.queue_request.session_id = counter_resp->counter;
+
+	/* Fetch any remaining chunks */
+	while ((flags & XE_RAS_INFO_QUEUE_FLAG_MORE_DATA) && offset < dest_size) {
+		const struct xe_ras_info_queue_header *hdr = &resp.queue_response.header;
+
+		req.queue_request.offset = offset;
+		req.queue_request.size = min(XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE, dest_size - offset);
+
+		if (get_info_queue_data(xe, &req, &resp)) {
+			xe_err(xe, "[RAS]: info queue drain aborted: fetch at offset=%u failed\n",
+			       offset);
+			return offset;
+		}
+
+		if (!chunk_is_valid(hdr, offset, dest_size)) {
+			xe_warn(xe, "[RAS]: invalid info queue chunk (offset=%u size=%u, expected offset=%u)\n",
+				hdr->chunk_offset, hdr->chunk_size, offset);
+			return offset;
+		}
+
+		memcpy(dest_buf + offset, resp.queue_response.data, hdr->chunk_size);
+		offset += hdr->chunk_size;
+		flags = hdr->flags;
+	}
+
+	return min(offset, first_hdr->total_size);
+}
+
 static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct xe_ras_get_health_response response = {0};
@@ -1216,5 +1403,9 @@ int xe_ras_init(struct xe_device *xe)
 	if (ret)
 		xe_err(xe, "Failed to create GPU health sysfs, err=%d\n", ret);
 
+	ret = xe_cper_sysfs_init(xe);
+	if (ret)
+		xe_err(xe, "Failed to create cper_on_query sysfs, err=%d\n", ret);
+
 	return devm_add_action_or_reset(xe->drm.dev, ras_fini, xe);
 }
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index 1b358c7d040f..ccb79f2c2844 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -23,5 +23,10 @@ int xe_ras_init(struct xe_device *xe);
 enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe);
 bool xe_ras_get_disable_vram_page_offline(struct xe_device *xe);
 u32 xe_ras_get_max_pages(struct xe_device *xe);
+int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
+				struct xe_ras_get_counter_response *out);
+u32 xe_ras_drain_info_queue_raw(struct xe_device *xe,
+				const struct xe_ras_get_counter_response *counter_resp,
+				u8 *dest_buf, u32 dest_size);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index a86f9d2b8c92..85602efa5b01 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -19,6 +19,10 @@
 #define XE_RAS_MEMORY_POISON			BIT(2)
 #define XE_RAS_MEMORY_DATA_PARITY		BIT(5)
 
+#define XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE	200
+#define XE_RAS_INFO_QUEUE_MAX_TOTAL_SIZE	5120
+#define XE_RAS_INFO_QUEUE_FLAG_MORE_DATA	0x02
+
 /**
  * enum xe_ras_page_action - Page offline actions for page offline request
  *
@@ -110,6 +114,110 @@ struct xe_ras_threshold_crossed {
 	struct xe_ras_error_class counters[XE_RAS_NUM_COUNTERS];
 } __packed;
 
+/**
+ * struct xe_ras_info_queue_header - Metadata for large info queue data transfers
+ *
+ * Provides chunk metadata for commands that support extended info queue
+ * functionality. Used when the total data exceeds a single mailbox response.
+ */
+struct xe_ras_info_queue_header {
+	/** @total_size: Total size of the complete info queue data in bytes */
+	u32 total_size;
+	/** @chunk_offset: Offset of this chunk within the total data in bytes */
+	u32 chunk_offset;
+	/** @chunk_size: Size of the data in this chunk in bytes */
+	u32 chunk_size;
+	/** @reserved0: Reserved for future use */
+	u32 reserved0;
+	/** @flags: Info queue control flags (XE_RAS_INFO_QUEUE_FLAG_*) */
+	u32 flags:8;
+	/** @reserved1: Reserved for future use */
+	u32 reserved1:4;
+	/** @num_headers: Number of detailed counter headers at start of the data */
+	u32 num_headers:5;
+	/** @reserved2: Reserved for future use */
+	u32 reserved2:15;
+	/** @checksum: CRC32 checksum of this chunk data */
+	u32 checksum;
+} __packed;
+
+/**
+ * struct xe_ras_info_queue_data_request - Request for a specific chunk of info queue data
+ *
+ * Allows the driver to request continuation of large info queue transfers
+ * by specifying an offset and size within the full data set.
+ */
+struct xe_ras_info_queue_data_request {
+	/** @offset: Byte offset of the requested data chunk */
+	u32 offset;
+	/** @size: Maximum size of the requested chunk in bytes */
+	u32 size;
+	/** @session_id: Session ID to correlate multi-chunk transfers */
+	struct xe_ras_error_class session_id;
+	/** @reserved: Reserved for future use */
+	u32 reserved;
+} __packed;
+
+/**
+ * struct xe_ras_info_queue_data_response - Generic response for commands with info queues
+ *
+ * Standard response format for any command that returns an info queue
+ * payload. May be embedded in a command-specific response structure.
+ */
+struct xe_ras_info_queue_data_response {
+	/** @header: Info queue metadata for this chunk */
+	struct xe_ras_info_queue_header header;
+	/** @data: Info queue data for this chunk */
+	u8 data[XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE];
+} __packed;
+
+/**
+ * struct xe_ras_info_queue_dynamic_counter_hdr - Aggregate counter header entry
+ *
+ * When a session requests aggregate counter data, one header per matching
+ * dynamic counter class is prepended to the queue data. The @counter field
+ * is the error count of this class; at most XE_RAS_NUM_COUNTERS error log
+ * entries follow for it.
+ */
+struct xe_ras_info_queue_dynamic_counter_hdr {
+	/** @error_class: Error class associated with this counter group */
+	struct xe_ras_error_class error_class;
+	/** @counter: Error count of this class */
+	u32 counter;
+} __packed;
+
+/**
+ * struct xe_ras_error_log - Single error log entry following dynamic counter headers
+ */
+struct xe_ras_error_log {
+	/** @timestamp: Timestamp when the error was recorded */
+	u64 timestamp;
+	/** @error_details: Error-specific details */
+	u32 error_details[16];
+} __packed;
+
+/**
+ * struct xe_ras_get_info_queue_request - Request for XE_SYSCTRL_CMD_GET_INFO_QUEUE
+ */
+struct xe_ras_get_info_queue_request {
+	/** @queue_request: Info queue request parameters */
+	struct xe_ras_info_queue_data_request queue_request;
+	/** @source_command: Original command that generated the info queue */
+	u32 source_command;
+	/** @source_context: Context from original command, if applicable */
+	struct xe_ras_error_class source_context;
+} __packed;
+
+/**
+ * struct xe_ras_get_info_queue_response - Response for XE_SYSCTRL_CMD_GET_INFO_QUEUE
+ */
+struct xe_ras_get_info_queue_response {
+	/** @operation_status: Status of the retrieval operation */
+	u32 operation_status;
+	/** @queue_response: Info queue data chunk */
+	struct xe_ras_info_queue_data_response queue_response;
+} __packed;
+
 /**
  * struct xe_ras_get_counter_request - Request structure for get counter
  */
@@ -132,8 +240,14 @@ struct xe_ras_get_counter_response {
 	u64 timestamp;
 	/** @threshold: Threshold value for the counter */
 	u32 threshold;
-	/** @reserved: Reserved  */
-	u32 reserved[57];
+	/** @reserved: Reserved for future use */
+	u32 reserved:9;
+	/** @has_info_queue: Set if info queue is available */
+	u32 has_info_queue:1;
+	/** @reserved1: Reserved for future use */
+	u32 reserved1:22;
+	/** @first: First info queue chunk, if @has_info_queue is set */
+	struct xe_ras_info_queue_data_response first;
 } __packed;
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 1f3f782d770e..9188457ef7ae 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -37,6 +37,7 @@ enum xe_sysctrl_group {
  * @XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE: Retrieve list of offlined queued pages from firmware
  * @XE_SYSCTRL_CMD_GET_HEALTH: Retrieve gpu health
  * @XE_SYSCTRL_CMD_SET_HEALTH: Set gpu health
+ * @XE_SYSCTRL_CMD_GET_INFO_QUEUE: Retrieve a chunk of info queue data
  */
 enum xe_sysctrl_gfsp_cmd {
 	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01,
@@ -50,6 +51,7 @@ enum xe_sysctrl_gfsp_cmd {
 	XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE	= 0x0A,
 	XE_SYSCTRL_CMD_GET_HEALTH		= 0x0B,
 	XE_SYSCTRL_CMD_SET_HEALTH		= 0x0C,
+	XE_SYSCTRL_CMD_GET_INFO_QUEUE		= 0x0D,
 };
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_trace_cper.c b/drivers/gpu/drm/xe/xe_trace_cper.c
new file mode 100644
index 000000000000..caea8783ab7c
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_trace_cper.c
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef __CHECKER__
+#define CREATE_TRACE_POINTS
+#include "xe_trace_cper.h"
+#endif
diff --git a/drivers/gpu/drm/xe/xe_trace_cper.h b/drivers/gpu/drm/xe/xe_trace_cper.h
new file mode 100644
index 000000000000..76e53ec6a673
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_trace_cper.h
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM xe
+
+#if !defined(_XE_TRACE_CPER_H_) || defined(TRACE_HEADER_MULTI_READ)
+#define _XE_TRACE_CPER_H_
+
+#include <linux/tracepoint.h>
+#include <linux/types.h>
+
+#include "xe_cper_types.h"
+#include "xe_device_types.h"
+
+#define __dev_name_xe(xe)	dev_name((xe)->drm.dev)
+
+TRACE_EVENT(xe_error_cper,
+	TP_PROTO(struct xe_device *xe,
+		 const guid_t *platform_id, const guid_t *fru_id,
+		 const u8 severity,
+		 const struct xe_cper_sec_intel_err_hdr *ihdr,
+		 u32 cper_len, const u8 *cper),
+	TP_ARGS(xe, platform_id, fru_id, severity, ihdr, cper_len, cper),
+
+	TP_STRUCT__entry(
+	    __string(dev, __dev_name_xe(xe))
+	    __array(char, platform_id, UUID_SIZE)
+	    __array(char, fru_id, UUID_SIZE)
+	    __field(u8, sev)
+	    __array(u8, ihdr_raw, sizeof(struct xe_cper_sec_intel_err_hdr))
+	    __field(u32, cper_len)
+	    __dynamic_array(u8, cper, cper_len)
+	    ),
+
+	TP_fast_assign(
+	    __assign_str(dev);
+	    __entry->sev = severity;
+	    memcpy(__entry->platform_id, platform_id, UUID_SIZE);
+	    memcpy(__entry->fru_id, fru_id, UUID_SIZE);
+	    memcpy(__entry->ihdr_raw, ihdr, sizeof(struct xe_cper_sec_intel_err_hdr));
+	    __entry->cper_len = cper_len;
+	    memcpy(__get_dynamic_array(cper), cper, cper_len);
+	    ),
+
+	TP_printk("dev=%s severity=%d platform_id=%pU fru_id=%pU intel_err_hdr_raw=%s cper_len=%u cper_raw=%s",
+		  __get_str(dev), __entry->sev,
+		  __entry->platform_id, __entry->fru_id,
+		  __print_hex(__entry->ihdr_raw,
+			      sizeof(struct xe_cper_sec_intel_err_hdr)),
+		  __entry->cper_len,
+		  __print_hex(__get_dynamic_array(cper),
+			      __entry->cper_len))
+);
+
+#endif
+
+/* This part must be outside protection */
+#undef TRACE_INCLUDE_PATH
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
+#define TRACE_INCLUDE_FILE xe_trace_cper
+#include <trace/define_trace.h>
-- 
2.48.1

Re: [PATCH 1/5] Add CPER logging support for CRI-Do not review

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] drm/xe/ras: unchecked firmware operation_status in get_info_queue_data()
- [Medium] drm/xe/ras: missing return on invalid first chunk in xe_ras_drain_info_queue_raw()
--

commit 28084d0de339fad58072c0f9a2f90f9570a279f9
Author: Badal Nilawar <badal.nilawar@intel.com>

Add CPER logging support for CRI-Do not review

This commit adds UEFI CPER error record generation and tracepoint logging
for Intel Xe RAS hardware errors and counter queries, including draining
extended error info queues from system controller firmware and exposing a
cper_on_query sysfs toggle.

> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 9c15ce8f0b6a8..afd41b7e9e86c 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c

[ ... ]

> @@ -1016,6 +1086,123 @@ int xe_ras_set_threshold(struct xe_device *xe, u8 severity, u8 component, u32 th
>  	return 0;
>  }
>  
> +static int get_info_queue_data(struct xe_device *xe,
> +			       struct xe_ras_get_info_queue_request *req,
> +			       struct xe_ras_get_info_queue_response *out)
> +{
> +	struct xe_ras_get_info_queue_response response = {0};
> +	struct xe_sysctrl_mailbox_command command = {0};
> +	const struct xe_ras_info_queue_header *hdr;
> +	size_t rlen;
> +	int ret;
> +
> +	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_INFO_QUEUE,
> +				  req, sizeof(*req), &response, sizeof(response));
> +
> +	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> +	if (ret) {
> +		xe_err(xe, "sysctrl: failed to get info queue data %d\n", ret);
> +		return ret;
> +	}
> +
> +	if (rlen != sizeof(response)) {
> +		xe_err(xe, "sysctrl: unexpected get info queue data response length %zu (expected %zu)\n",
> +		       rlen, sizeof(response));
> +		return -EIO;
> +	}
> +
> +	hdr = &response.queue_response.header;
> +	xe_dbg(xe, "[RAS]: info queue data: status=%u chunk_size=%u flags=0x%x\n",
> +	       response.operation_status, hdr->chunk_size, hdr->flags);
> +
> +	*out = response;
> +	return 0;
> +}

[Severity: Medium]
In drivers/gpu/drm/xe/xe_ras.c, get_info_queue_data() logs
response.operation_status (defined in struct xe_ras_get_info_queue_response
in drivers/gpu/drm/xe/xe_ras_types.h) via xe_dbg(), but never validates it
with ras_status_to_errno() before copying response to *out and returning 0.

Other command handlers in drivers/gpu/drm/xe/xe_ras.c that receive a status
field in their response structure (send_page_offline_cmd(),
xe_ras_clear_counter(), xe_ras_set_threshold(), and gpu_health_store())
convert the status via ras_status_to_errno() and return a negative error
code when it is non-zero.

When draining multi-chunk info queues via:

  xe_cper_emit_counter()
    -> xe_prepare_cper_error_info()
      -> xe_ras_drain_info_queue_raw()
        -> get_info_queue_data()

if firmware returns a non-zero error code in response.operation_status while
the mailbox transport succeeds, should get_info_queue_data() check
response.operation_status with ras_status_to_errno() so callers do not
parse a failed or unpopulated info-queue response chunk?

> +
> +static bool chunk_is_valid(const struct xe_ras_info_queue_header *hdr,
> +			   u32 expected_offset, u32 dest_size)
> +{
> +	u32 end;
> +
> +	return hdr->chunk_offset == expected_offset &&
> +	       hdr->chunk_size && hdr->chunk_size <= XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE &&
> +	       !check_add_overflow(hdr->chunk_offset, hdr->chunk_size, &end) &&
> +	       end <= XE_RAS_INFO_QUEUE_MAX_TOTAL_SIZE && end <= dest_size;
> +}
> +
> +/**
> + * xe_ras_drain_info_queue_raw() - Drain the full RAS info queue into a flat buffer
> + * @xe: xe device
> + * @counter_resp: counter response carrying the first embedded chunk and the
> + *                counter identifier used as the source context for subsequent
> + *                GET_INFO_QUEUE fetches
> + * @dest_buf: destination buffer supplied by the caller
> + * @dest_size: size of @dest_buf in bytes; also caps the total amount of data
> + *             assembled from the info queue
> + *
> + * Copies the first chunk already embedded in @counter_resp, then loops
> + * issuing GET_INFO_QUEUE to fetch any remaining chunks until the queue
> + * signals no more data or a transport/bounds error is encountered.  On
> + * transport or bounds errors the function stops and returns whatever has
> + * been assembled so far.
> + *
> + * Returns: number of valid bytes written into @dest_buf.  Zero if @dest_buf is
> + *          NULL or @dest_size is 0.
> + */
> +u32 xe_ras_drain_info_queue_raw(struct xe_device *xe,
> +				const struct xe_ras_get_counter_response *counter_resp,
> +				u8 *dest_buf, u32 dest_size)
> +{
> +	const struct xe_ras_info_queue_header *first_hdr = &counter_resp->first.header;
> +	struct xe_ras_get_info_queue_request req = {0};
> +	struct xe_ras_get_info_queue_response resp;
> +	u32 flags = first_hdr->flags;
> +	u32 offset = 0;
> +
> +	if (!dest_buf || !dest_size)
> +		return 0;
> +
> +	if (first_hdr->total_size > dest_size)
> +		xe_warn(xe, "[RAS]: info queue size %u exceeds %u, truncating\n",
> +			first_hdr->total_size, dest_size);
> +
> +	/* Copy first chunk already embedded in the counter response */
> +	if (chunk_is_valid(first_hdr, offset, dest_size)) {
> +		memcpy(dest_buf, counter_resp->first.data, first_hdr->chunk_size);
> +		offset = first_hdr->chunk_size;
> +	}

[Severity: Medium]
In drivers/gpu/drm/xe/xe_ras.c, when xe_ras_drain_info_queue_raw() is called
from xe_cper_emit_counter() -> xe_prepare_cper_error_info() with
counter_resp->has_info_queue set, what happens if the first embedded chunk
in counter_resp->first fails chunk_is_valid(first_hdr, offset, dest_size)
(for example, when first_hdr->chunk_offset is non-zero, first_hdr->chunk_size
is 0, or first_hdr->chunk_size exceeds dest_size)?

Here xe_ras_drain_info_queue_raw() skips copying the first chunk without
logging a warning or returning 0, leaving offset at 0 while keeping flags
initialized from the invalid first_hdr->flags. If the more-data flag bit is
set in flags, execution falls through into the while loop below and issues a
follow-up info queue fetch starting at offset 0.

Should a bounds or header validation failure on the first chunk log a
warning and return 0 immediately, matching the !chunk_is_valid() handling
inside the while loop below?

> +
> +	req.source_command = XE_SYSCTRL_CMD_GET_COUNTER;
> +	req.source_context = counter_resp->counter;
> +	req.queue_request.session_id = counter_resp->counter;
> +
> +	/* Fetch any remaining chunks */
> +	while ((flags & XE_RAS_INFO_QUEUE_FLAG_MORE_DATA) && offset < dest_size) {
> +		const struct xe_ras_info_queue_header *hdr = &resp.queue_response.header;
> +
> +		req.queue_request.offset = offset;
> +		req.queue_request.size = min(XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE, dest_size - offset);
> +
> +		if (get_info_queue_data(xe, &req, &resp)) {
> +			xe_err(xe, "[RAS]: info queue drain aborted: fetch at offset=%u failed\n",
> +			       offset);
> +			return offset;
> +		}
> +
> +		if (!chunk_is_valid(hdr, offset, dest_size)) {
> +			xe_warn(xe, "[RAS]: invalid info queue chunk (offset=%u size=%u, expected offset=%u)\n",
> +				hdr->chunk_offset, hdr->chunk_size, offset);
> +			return offset;
> +		}
> +
> +		memcpy(dest_buf + offset, resp.queue_response.data, hdr->chunk_size);
> +		offset += hdr->chunk_size;
> +		flags = hdr->flags;
> +	}
> +
> +	return min(offset, first_hdr->total_size);
> +}

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261021162508.265700-7-mallesh.koujalagi@intel.com?part=1

[PATCH 2/5] drm/xe/cper: Add driver error classification definitions

[Mallesh Koujalagi]

Add definitions for driver-detected CPER error classification,
including xe_cper_driver_error_class, a common union for raw and
typed access, and the INTEL_CPER_NOTIFY_DRV_ERROR notification GUID.

These definitions will be used for software-generated CPER records.

Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/xe_cper_types.h | 41 ++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
index e0034429e661..5e7bceef703e 100644
--- a/drivers/gpu/drm/xe/xe_cper_types.h
+++ b/drivers/gpu/drm/xe/xe_cper_types.h
@@ -41,6 +41,10 @@
 	GUID_INIT(0x4ae12aef, 0x8745, 0x5fc7, \
 		  0xb9, 0x96, 0x71, 0xee, 0xbb, 0x51, 0xf2, 0x23)
 
+#define INTEL_CPER_NOTIFY_DRV_ERROR \
+	GUID_INIT(0xcef7e934, 0x51e7, 0x535f, \
+		  0xa6, 0x78, 0x5a, 0x4c, 0xcc, 0xb6, 0x96, 0x09)
+
 /* Section Types */
 #define INTEL_CPER_SECTION_ACCEL_GENERIC \
 	GUID_INIT(0xea9d8f84, 0x4258, 0x5227, \
@@ -66,6 +70,43 @@ struct xe_cper_error_class {
 	u8  reserved;
 };
 
+/**
+ * struct xe_cper_driver_error_class - Intel GPU CPER driver-detected error classification
+ */
+struct xe_cper_driver_error_class {
+	/** @error_type: CPER severity: CPER_SEV_* */
+	u8  error_type;
+	/** @reserved0: Reserved, must be zero */
+	u8  reserved0;
+	/** @error_component: Driver component id: CLASS[7:0].TYPE[15:8] */
+	u16 error_component;
+	/** @tile: Driver location id: TYPE[7:0].ID[15:8] ('tile' and 'GT' field region) */
+	u16 tile;
+	/** @reserved1: Reserved, must be zero */
+	u16 reserved1;
+	/** @cause: errno of the failing operation, or 0 if none */
+	u32 cause;
+};
+
+/* Same size as the counter-sourced error_class */
+#define XE_CPER_ERROR_CLASS_SIZE	12
+
+/**
+ * union xe_cper_error_class_u - RAS counter-sourced or driver-sourced error classification
+ */
+union xe_cper_error_class_u {
+	/** @ras: RAS counter-sourced error classification */
+	struct xe_cper_error_class ras;
+	/** @driver: Driver-detected (software) error classification */
+	struct xe_cper_driver_error_class driver;
+	/** @raw: Raw byte view */
+	u8 raw[XE_CPER_ERROR_CLASS_SIZE];
+};
+
+static_assert(sizeof(struct xe_cper_error_class) == XE_CPER_ERROR_CLASS_SIZE);
+static_assert(sizeof(struct xe_cper_driver_error_class) == XE_CPER_ERROR_CLASS_SIZE);
+static_assert(sizeof(union xe_cper_error_class_u) == XE_CPER_ERROR_CLASS_SIZE);
+
 /**
  * struct xe_cper_sec_intel_err_hdr - Intel-specific CPER error section header
  *
-- 
2.48.1

[PATCH 3/5] drm/xe/cper: Let caller initialize error_class

[Mallesh Koujalagi]

Move error_class population from
xe_cper_init_intel_err_hdr() to its caller.

This decouples the helper from the RAS-specific error_class format
and allows future paths to provide their own encoding.

Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/xe_cper.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index 0fedef06e138..1dab6ea93fea 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -91,12 +91,9 @@ static void fill_cper_error_class(struct xe_cper_error_class *dst,
 	dst->cause = src->product.cause.cause;
 }
 
-static void xe_cper_init_intel_err_hdr(struct xe_device *xe,
-				       const struct xe_ras_error_class *error_class,
-				       u64 first_timestamp, u32 sig_id, u32 error_count,
-				       struct xe_cper_sec_intel_err_hdr *ihdr)
+static void xe_cper_init_intel_err_hdr(struct xe_device *xe, u64 first_timestamp, u32 sig_id,
+				       u32 error_count, struct xe_cper_sec_intel_err_hdr *ihdr)
 {
-	fill_cper_error_class(&ihdr->error_class, error_class);
 	ihdr->validation_bits |= XE_CPER_VALID_LOCATION;
 
 	if (first_timestamp) {
@@ -428,8 +425,9 @@ void xe_cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigi
 	for (i = 0; i < count; i++) {
 		struct xe_cper_sec_intel_err_hdr ihdr = {};
 
-		xe_cper_init_intel_err_hdr(xe, &entries[i].hdr.error_class, entries[i].timestamp,
-					   sigid, entries[i].hdr.counter, &ihdr);
+		fill_cper_error_class(&ihdr.error_class, &entries[i].hdr.error_class);
+		xe_cper_init_intel_err_hdr(xe, entries[i].timestamp, sigid,
+					   entries[i].hdr.counter, &ihdr);
 
 		xe_cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_GPU_ERROR, &ihdr,
 				    entries[i].einfo, entries[i].einfo_size);
-- 
2.48.1

[PATCH 4/5] drm/xe/cper: Add CPER support for software errors

[Mallesh Koujalagi]

Add CPER record generation for software SIGIDs through
xe_cper_emit_sw_err().

Store driver-specific information, such as severity,
component, location, and error cause, in the CPER error
class. Also attach the formatted log message to the CPER
record so that useful debugging information is preserved.

This allows driver-detected errors to be reported through
CPER, similar to hardware error reporting.

Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/xe_cper.c | 90 +++++++++++++++++++++++++++++++++++-
 1 file changed, 89 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index 1dab6ea93fea..cb4be6f3de7f 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -14,6 +14,8 @@
 #include <linux/time.h>
 #include <linux/timekeeping.h>
 
+#include "abi/xe_log_abi.h"
+
 #include "xe_cper.h"
 #include "xe_cper_types.h"
 #include "xe_device.h"
@@ -27,6 +29,11 @@ static bool is_hw_sigid(enum xe_sigid sigid)
 	return in_range(sigid, INTEL_SIGID_GPU_XE_HARDWARE_START, INTEL_SIGID_BATCH);
 }
 
+static bool is_sw_sigid(enum xe_sigid sigid)
+{
+	return in_range(sigid, INTEL_SIGID_GPU_XE_SOFTWARE_START, INTEL_SIGID_BATCH);
+}
+
 static const struct xe_platform_id_entry xe_platform_ids[] = {
 	/* 0x674C  platform/8086:674c */
 	{ 0x674C, GUID_INIT(0x9046afe5, 0x9041, 0x5124,
@@ -453,6 +460,84 @@ static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigi
 	xe_cper_emit_counter(xe, cper_sev, sigid, error_class, &resp);
 }
 
+#define XE_CPER_SW_MSG_MAX	256
+
+static size_t sw_format_msg(struct va_format *vaf, char *buf, size_t size)
+{
+	int len = snprintf(buf, size, "%pV", vaf);
+
+	return min_t(size_t, len + 1, size);
+}
+
+static void fill_cper_driver_error_class(struct xe_cper_driver_error_class *dst, int cper_sev,
+					 u32 component, u32 location, const void *data)
+{
+	dst->error_type = cper_sev;
+	dst->error_component = component;
+	dst->tile = location;
+
+	if (IS_ERR(data))
+		dst->cause = -PTR_ERR(data);
+}
+
+static struct xe_cper_sec_intel_error_info *
+build_sw_einfo(const union xe_cper_error_class_u *uec, struct va_format *vaf,
+	       u64 timestamp, u32 *einfo_size)
+{
+	struct xe_cper_sec_intel_error_info *einfo;
+	struct xe_intel_priv_event_entry *entry;
+	char msg[XE_CPER_SW_MSG_MAX];
+	size_t msg_len;
+	u32 queue_len;
+
+	msg_len = sw_format_msg(vaf, msg, sizeof(msg));
+
+	queue_len = offsetof(struct xe_intel_priv_event_entry, metadata) + msg_len;
+
+	einfo = kzalloc_flex(*einfo, event_queue, queue_len);
+	if (!einfo)
+		return NULL;
+
+	einfo->error_count        = 1;
+	einfo->event_queue_length = queue_len;
+	einfo->event_queue_count  = 1;
+	einfo->error_class = uec->ras;
+
+	entry = (struct xe_intel_priv_event_entry *)einfo->event_queue;
+	entry->entry_length = msg_len;
+	entry->timestamp    = timestamp;
+	memcpy(entry->metadata, msg, msg_len);
+
+	*einfo_size = struct_size(einfo, event_queue, queue_len);
+	return einfo;
+}
+
+static void xe_cper_emit_sw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+				u32 component, u32 location, const void *data,
+				struct va_format *vaf)
+{
+	struct xe_cper_sec_intel_error_info *einfo;
+	struct xe_cper_sec_intel_err_hdr ihdr = {};
+	u64 timestamp = ktime_get_boottime_ns();
+	union xe_cper_error_class_u uec = {};
+	u32 einfo_size = 0;
+
+	might_sleep();
+
+	fill_cper_driver_error_class(&uec.driver, cper_sev, component, location, data);
+
+	einfo = build_sw_einfo(&uec, vaf, timestamp, &einfo_size);
+	if (!einfo)
+		return;
+
+	ihdr.error_class = uec.ras;
+	xe_cper_init_intel_err_hdr(xe, timestamp, sigid, 1, &ihdr);
+	xe_cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_DRV_ERROR, &ihdr,
+			    einfo, einfo_size);
+
+	kfree(einfo);
+}
+
 /**
  * xe_cper_emit() - Emit a CPER record for a SIGID log entry
  * @xe: The &xe_device
@@ -479,7 +564,10 @@ void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
 		return;
 	}
 
-	/* TODO software CPER */
+	if (is_sw_sigid(sigid)) {
+		xe_cper_emit_sw_err(xe, cper_sev, sigid, component, location, data, vaf);
+		return;
+	}
 }
 
 static ssize_t cper_on_query_show(struct device *dev, struct device_attribute *attr, char *buf)
-- 
2.48.1

Re: [PATCH 4/5] drm/xe/cper: Add CPER support for software errors

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/xe/cper: sleeping in atomic context in xe_cper_emit_sw_err()
--

commit 6345dec09856b9879b434e9169adbfef7ce12b5e
Author: Mallesh Koujalagi <mallesh.koujalagi@intel.com>

drm/xe/cper: Add CPER support for software errors

This commit adds CPER record generation for software SIGIDs through
xe_cper_emit_sw_err(), storing driver error classification details and the
formatted log message in the CPER record.

> diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
> index 1dab6ea93fea3..cb4be6f3de7f4 100644
> --- a/drivers/gpu/drm/xe/xe_cper.c
> +++ b/drivers/gpu/drm/xe/xe_cper.c

[ ... ]

> @@ -453,6 +460,84 @@ static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigi

[ ... ]

> +static struct xe_cper_sec_intel_error_info *
> +build_sw_einfo(const union xe_cper_error_class_u *uec, struct va_format *vaf,
> +	       u64 timestamp, u32 *einfo_size)
> +{
> +	struct xe_cper_sec_intel_error_info *einfo;
> +	struct xe_intel_priv_event_entry *entry;
> +	char msg[XE_CPER_SW_MSG_MAX];
> +	size_t msg_len;
> +	u32 queue_len;
> +
> +	msg_len = sw_format_msg(vaf, msg, sizeof(msg));
> +
> +	queue_len = offsetof(struct xe_intel_priv_event_entry, metadata) + msg_len;
> +
> +	einfo = kzalloc_flex(*einfo, event_queue, queue_len);
> +	if (!einfo)
> +		return NULL;

[ ... ]

> +static void xe_cper_emit_sw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
> +				u32 component, u32 location, const void *data,
> +				struct va_format *vaf)
> +{
> +	struct xe_cper_sec_intel_error_info *einfo;
> +	struct xe_cper_sec_intel_err_hdr ihdr = {};
> +	u64 timestamp = ktime_get_boottime_ns();
> +	union xe_cper_error_class_u uec = {};
> +	u32 einfo_size = 0;
> +
> +	might_sleep();
> +
> +	fill_cper_driver_error_class(&uec.driver, cper_sev, component, location, data);
> +
> +	einfo = build_sw_einfo(&uec, vaf, timestamp, &einfo_size);
> +	if (!einfo)
> +		return;
> +
> +	ihdr.error_class = uec.ras;
> +	xe_cper_init_intel_err_hdr(xe, timestamp, sigid, 1, &ihdr);
> +	xe_cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_DRV_ERROR, &ihdr,
> +			    einfo, einfo_size);
> +
> +	kfree(einfo);
> +}
> +
>  /**
>   * xe_cper_emit() - Emit a CPER record for a SIGID log entry
>   * @xe: The &xe_device
> @@ -479,7 +564,10 @@ void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
>  		return;
>  	}
>  
> -	/* TODO software CPER */
> +	if (is_sw_sigid(sigid)) {
> +		xe_cper_emit_sw_err(xe, cper_sev, sigid, component, location, data, vaf);
> +		return;
> +	}
>  }

[Severity: High]
Can xe_cper_emit_sw_err() sleep when called from atomic contexts via
xe_log_err() or xe_log_err_fatal()?

xe_cper_emit() is invoked synchronously by __xe_log_emit() ->
log_emit_cper(). With this change, software SIGIDs call
xe_cper_emit_sw_err(), which asserts might_sleep() and allocates memory
using GFP_KERNEL in both build_sw_einfo() (via kzalloc_flex()) and
xe_cper_record_emit() (via kzalloc()).

However, several paths in drivers/gpu/drm/xe/ emit software SIGID logs from
atomic contexts where sleeping is not permitted.

For example, in drivers/gpu/drm/xe/xe_guc_ct.c, xe_guc_ct_fast_path() runs
in the interrupt handler under ct->fast_lock:

drivers/gpu/drm/xe/xe_guc_ct.c:xe_guc_ct_fast_path() {
	spin_lock(&ct->fast_lock);
	do {
		len = g2h_read(ct, ct->fast_msg, true);
		if (len > 0)
			g2h_fast_path(ct, ct->fast_msg, len);
	} while (len > 0);
	spin_unlock(&ct->fast_lock);
}

Both g2h_read() -> ct_corrupted() and g2h_fast_path() ->
__g2h_release_space() call xe_log_err(ct_to_gt(ct), GUC, ...), which maps
to the software SIGID XE_SIGID_RUNTIME_FW. Similarly, g2h_release_space(),
__guc_ct_send_locked(), and dequeue_one_g2h() call into those helpers while
holding spin_lock_irq(&ct->fast_lock).

In drivers/gpu/drm/xe/xe_pagefault.c, xe_pagefault_handler() acquires
pf_queue->lock with spinlock_irqsave and calls xe_pagefault_queue_add():

drivers/gpu/drm/xe/xe_pagefault.c:xe_pagefault_queue_add() {
	lockdep_assert_held(&pf_queue->lock);

	do {
		/* Not possible, warn on and drop page fault */
		if (WARN_ON_ONCE(xe_pagefault_queue_full(pf_queue))) {
			xe_log_err(xe, PAGEFAULT, -ENOSPC, "Queue full!\n");
			return NULL;
		}
}

And in drivers/gpu/drm/xe/xe_pcode.c, xe_pcode_request() disables
preemption around pcode_try_request() -> pcode_mailbox_rw() ->
__pcode_mailbox_rw() -> pcode_mailbox_status(), which calls
xe_log_err(tile, PCODE, ...):

drivers/gpu/drm/xe/xe_pcode.c:xe_pcode_request() {
	preempt_disable();
	ret = pcode_try_request(tile, mbox, request, reply_mask, reply, &status,
				true, 50 * 1000, true);
	preempt_enable();
}

Likewise, xe_mert_irq_handler() in drivers/gpu/drm/xe/xe_mert.c runs in
hardirq context and calls mert_handle_cat_error() ->
xe_device_declare_wedged() -> xe_log_err_fatal(xe, WEDGED, -EIO, ...).

Would these paths trigger a sleeping-while-atomic regression when a
software error is logged?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261021162508.265700-7-mallesh.koujalagi@intel.com?part=4

[PATCH 5/5] drm/xe/log: Add software CPER KUnit test

[Mallesh Koujalagi]

Add test_sw_cper() to validate software CPER logging.

Verify that xe_log_emit() forwards severity, SIGID, component,
and error data correctly, and ensure the SIGID stays in the
software range.

Print the generated error class to simplify debugging and
record inspection.

Assisted-by: LLM
Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/tests/xe_log_kunit.c | 94 ++++++++++++++++++++++++-
 1 file changed, 93 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/tests/xe_log_kunit.c b/drivers/gpu/drm/xe/tests/xe_log_kunit.c
index 56c36c8a08e1..e53100df5b32 100644
--- a/drivers/gpu/drm/xe/tests/xe_log_kunit.c
+++ b/drivers/gpu/drm/xe/tests/xe_log_kunit.c
@@ -6,11 +6,14 @@
 #include <kunit/static_stub.h>
 #include <kunit/test.h>
 #include <kunit/test-bug.h>
+#include <linux/minmax.h>
 
 #include "tests/xe_kunit_helpers.h"
 #include "tests/xe_pci_test.h"
+#include "xe_cper.h"
 #include "xe_device.h"
 #include "xe_log.h"
+#include "xe_ras_types.h"
 
 static void nop_dmesg_vprintk(struct pci_dev *pdev, int cper_sev, struct va_format *vaf)
 {
@@ -43,6 +46,19 @@ static const char *location_type(u32 location)
 	       location ? "?" : "";
 }
 
+static bool is_sw_cper(enum xe_sigid sigid)
+{
+	return in_range(sigid, INTEL_SIGID_GPU_XE_SOFTWARE_START, INTEL_SIGID_BATCH);
+}
+
+static void fake_emit_sw_cper(int cper_sev, u32 component, u32 location, const void *data)
+{
+	/* mirrors xe_cper_driver_error_class: full 16-bit component/tile, unconditional */
+	pr_info("SW CPER CLASS=severity:%u component:%u tile:%u cause:%u\n",
+		cper_sev, (u16)component, (u16)location,
+		IS_ERR(data) ? (u32)-PTR_ERR(data) : 0);
+}
+
 static void fake_emit_cper(struct pci_dev *pdev, int cper_sev,
 			   enum xe_sigid sigid, u32 component, u32 location,
 			   const void *data, size_t len, struct va_format *vaf)
@@ -51,7 +67,8 @@ static void fake_emit_cper(struct pci_dev *pdev, int cper_sev,
 	int n;
 
 	pr_info("\n");
-	pr_info("CPER SEV=%u SIGID=%u\n", cper_sev, sigid);
+	pr_info("CPER SEV=%u SIGID=%u \t# %s\n", cper_sev, sigid,
+		is_sw_cper(sigid) ? "software" : "");
 	pr_info("CPER DEVICE=%s\n", dev_name(&pdev->dev));
 	if (location)
 		pr_info("CPER LOCATION=%#x \t# %s.%u\n",
@@ -68,6 +85,8 @@ static void fake_emit_cper(struct pci_dev *pdev, int cper_sev,
 
 	n = vscnprintf(msg, sizeof(msg), vaf->fmt, *vaf->va);
 	print_hex_dump(KERN_INFO, "CPER MSG=", DUMP_PREFIX_OFFSET, 16, 1, msg, n, true);
+	if (is_sw_cper(sigid))
+		fake_emit_sw_cper(cper_sev, component, location, data);
 	pr_info("CPER END\n");
 }
 
@@ -130,6 +149,78 @@ static void demo_cper(struct kunit *test)
 	demo(test->priv);
 }
 
+/*
+ * Software CPER
+ */
+static struct {
+	unsigned int count;
+	int cper_sev;
+	enum xe_sigid sigid;
+	u32 component;
+	u32 location;
+	const void *data;
+	size_t len;
+} sw_cper_capture;
+
+static void capture_emit_cper(struct pci_dev *pdev, int cper_sev,
+			      enum xe_sigid sigid, u32 component, u32 location,
+			      const void *data, size_t len, struct va_format *vaf)
+{
+	sw_cper_capture.count++;
+	sw_cper_capture.cper_sev = cper_sev;
+	sw_cper_capture.sigid = sigid;
+	sw_cper_capture.component = component;
+	sw_cper_capture.location = location;
+	sw_cper_capture.data = data;
+	sw_cper_capture.len = len;
+}
+
+static const struct sw_cper_param {
+	int cper_sev;
+	enum xe_sigid sigid;
+	u32 component;
+	int err;		/* reported as ERR_PTR when non-zero */
+	size_t len;		/* bytes of @blob passed as data */
+	const char *name;
+} sw_cper_params[] = {
+	{ CPER_SEV_FATAL, XE_SIGID_PROBE, XE_LOG_COMPONENT_PROBE,
+	  -ENODEV, 0, "sw-fatal-errno" },
+	{ CPER_SEV_RECOVERABLE, XE_SIGID_GT_TDR, XE_LOG_COMPONENT_GUCSUBMIT,
+	  -ETIMEDOUT, 0, "sw-recoverable-errno" },
+	{ CPER_SEV_CORRECTED, XE_SIGID_MEM_FAULT, XE_LOG_COMPONENT_PAGEFAULT,
+	  0, 0, "sw-corrected" },
+	{ CPER_SEV_INFORMATIONAL, XE_SIGID_SURVIVABILITY, XE_LOG_COMPONENT_SURVIVABILITY,
+	  0, 0, "sw-informational" },
+	{ CPER_SEV_FATAL, XE_SIGID_SW, XE_LOG_COMPONENT_NONE,
+	  0, sizeof(struct xe_ras_error_class), "sw-with-error-class" },
+};
+
+KUNIT_ARRAY_PARAM_DESC(sw_cper, sw_cper_params, name);
+
+static void test_sw_cper(struct kunit *test)
+{
+	const struct sw_cper_param *param = test->param_value;
+	struct xe_device *xe = test->priv;
+	struct pci_dev *pdev = xe_any_to_pdev(xe);
+	const void *data = param->err ? ERR_PTR(param->err) : param->len ? blob : NULL;
+
+	memset(&sw_cper_capture, 0, sizeof(sw_cper_capture));
+	kunit_activate_static_stub(test, log_emit_cper, capture_emit_cper);
+	kunit_activate_static_stub(test, log_dmesg_vprintk, nop_dmesg_vprintk);
+
+	xe_log_emit(pdev, param->cper_sev, param->sigid, param->component,
+		    XE_LOG_LOCATION_NONE, data, param->len, "testing %s\n", param->name);
+
+	KUNIT_ASSERT_EQ(test, sw_cper_capture.count, 1);
+	KUNIT_EXPECT_EQ(test, sw_cper_capture.cper_sev, param->cper_sev);
+	KUNIT_EXPECT_EQ(test, (u32)sw_cper_capture.sigid, (u32)param->sigid);
+	KUNIT_EXPECT_EQ(test, sw_cper_capture.component, param->component);
+	KUNIT_EXPECT_PTR_EQ(test, sw_cper_capture.data, data);
+	KUNIT_EXPECT_EQ(test, sw_cper_capture.len, param->len);
+
+	KUNIT_EXPECT_TRUE(test, is_sw_cper(sw_cper_capture.sigid));
+}
+
 static const char *test_fatal(struct xe_device *xe)
 {
 	struct pci_dev *pdev = to_pdev_safe(xe);
@@ -540,6 +631,7 @@ static struct kunit_case xe_log_test_cases[] = {
 	KUNIT_CASE(demo_cper),
 	KUNIT_CASE(demo_dmesg),
 	KUNIT_CASE_PARAM(test_dmesg, log_gen_params),
+	KUNIT_CASE_PARAM(test_sw_cper, sw_cper_gen_params),
 	KUNIT_CASE_PARAM(test_invalid, invalid_param_gen_params),
 	{}
 };
-- 
2.48.1

✗ CI.checkpatch: warning for drm/xe/cper: Software (driver-detected) CPER error reporting

[Patchwork]

== Series Details ==

Series: drm/xe/cper: Software (driver-detected) CPER error reporting
URL   : https://patchwork.freedesktop.org/series/176576/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
6bef5ce5c74dc76b4ee69ab2832c0d1fd63c91c7
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit ea06e3b7c1da8c5f12a066e6f845ef3ac14b8fed
Author: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Date:   Wed Oct 21 21:55:13 2026 +0530

    drm/xe/log: Add software CPER KUnit test
    
    Add test_sw_cper() to validate software CPER logging.
    
    Verify that xe_log_emit() forwards severity, SIGID, component,
    and error data correctly, and ensure the SIGID stays in the
    software range.
    
    Print the generated error class to simplify debugging and
    record inspection.
    
    Assisted-by: LLM
    Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
+ /mt/dim checkpatch ebd1c72d97840a55564c37670affe5c28dca6ad2 drm-intel
dff6934c7988 Add CPER logging support for CRI-Do not review
-:14: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#14: 
new file mode 100644

-:1496: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1496: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:21:
+TRACE_EVENT(xe_error_cper,
+	TP_PROTO(struct xe_device *xe,

-:1503: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#1503: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:28:
+	TP_STRUCT__entry(

-:1513: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#1513: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:38:
+	TP_fast_assign(

-:1538: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#1538: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                              ^

-:1538: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#1538: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                                 ^

-:1538: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#1538: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                                         ^

-:1538: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#1538: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                                             ^

-:1538: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#1538: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                                                 ^

total: 0 errors, 1 warnings, 8 checks, 1438 lines checked
4906d53cc9eb drm/xe/cper: Add driver error classification definitions
8cc396bab1c1 drm/xe/cper: Let caller initialize error_class
a1e2e669a46e drm/xe/cper: Add CPER support for software errors
ea06e3b7c1da drm/xe/log: Add software CPER KUnit test

✓ CI.KUnit: success for drm/xe/cper: Software (driver-detected) CPER error reporting

[Patchwork]

== Series Details ==

Series: drm/xe/cper: Software (driver-detected) CPER error reporting
URL   : https://patchwork.freedesktop.org/series/176576/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[16:31:39] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:31:43] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:32:04] Starting KUnit Kernel (1/1)...
[16:32:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:32:04] ================= gpu_buddy (14 subtests) ==================
[16:32:04] [PASSED] gpu_test_buddy_alloc_limit
[16:32:04] [PASSED] gpu_test_buddy_alloc_optimistic
[16:32:04] [PASSED] gpu_test_buddy_alloc_pessimistic
[16:32:04] [PASSED] gpu_test_buddy_alloc_pathological
[16:32:04] [PASSED] gpu_test_buddy_alloc_contiguous
[16:32:04] [PASSED] gpu_test_buddy_alloc_clear
[16:32:04] [PASSED] gpu_test_buddy_alloc_range
[16:32:04] [PASSED] gpu_test_buddy_alloc_range_bias
[16:32:05] [PASSED] gpu_test_buddy_fragmentation_performance
[16:32:06] [PASSED] gpu_test_buddy_dirty_tracker_performance
[16:32:06] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[16:32:06] [PASSED] gpu_test_buddy_offset_aligned_allocation
[16:32:06] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[16:32:06] [PASSED] gpu_test_buddy_addr_to_block
[16:32:06] ==================== [PASSED] gpu_buddy ====================
[16:32:06] ============================================================
[16:32:06] Testing complete. Ran 14 tests: passed: 14
[16:32:06] Elapsed time: 26.900s total, 4.461s configuring, 20.572s building, 1.828s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[16:32:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:32:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:32:47] Starting KUnit Kernel (1/1)...
[16:32:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:32:47] ================== guc_buf (11 subtests) ===================
[16:32:47] [PASSED] test_smallest
[16:32:47] [PASSED] test_largest
[16:32:47] [PASSED] test_granular
[16:32:47] [PASSED] test_unique
[16:32:47] [PASSED] test_overlap
[16:32:47] [PASSED] test_reusable
[16:32:47] [PASSED] test_too_big
[16:32:47] [PASSED] test_flush
[16:32:47] [PASSED] test_lookup
[16:32:47] [PASSED] test_data
[16:32:47] [PASSED] test_class
[16:32:47] ===================== [PASSED] guc_buf =====================
[16:32:47] =================== guc_dbm (7 subtests) ===================
[16:32:47] [PASSED] test_empty
[16:32:47] [PASSED] test_default
[16:32:47] ======================== test_size  ========================
[16:32:47] [PASSED] 4
[16:32:47] [PASSED] 8
[16:32:47] [PASSED] 32
[16:32:47] [PASSED] 256
[16:32:47] ==================== [PASSED] test_size ====================
[16:32:47] ======================= test_reuse  ========================
[16:32:47] [PASSED] 4
[16:32:47] [PASSED] 8
[16:32:47] [PASSED] 32
[16:32:47] [PASSED] 256
[16:32:47] =================== [PASSED] test_reuse ====================
[16:32:47] =================== test_range_overlap  ====================
[16:32:47] [PASSED] 4
[16:32:47] [PASSED] 8
[16:32:47] [PASSED] 32
[16:32:47] [PASSED] 256
[16:32:47] =============== [PASSED] test_range_overlap ================
[16:32:47] =================== test_range_compact  ====================
[16:32:47] [PASSED] 4
[16:32:47] [PASSED] 8
[16:32:47] [PASSED] 32
[16:32:47] [PASSED] 256
[16:32:47] =============== [PASSED] test_range_compact ================
[16:32:47] ==================== test_range_spare  =====================
[16:32:47] [PASSED] 4
[16:32:47] [PASSED] 8
[16:32:47] [PASSED] 32
[16:32:47] [PASSED] 256
[16:32:47] ================ [PASSED] test_range_spare =================
[16:32:47] ===================== [PASSED] guc_dbm =====================
[16:32:47] ================== guc_idm (22 subtests) ===================
[16:32:47] [PASSED] bad_init
[16:32:47] [PASSED] no_init
[16:32:47] [PASSED] init_fini
[16:32:47] [PASSED] check_init_small
[16:32:47] [PASSED] check_init_shared
[16:32:47] [PASSED] check_used
[16:32:47] [PASSED] check_quota
[16:32:47] [PASSED] check_all
[16:32:47] [PASSED] check_limits
[16:32:47] [PASSED] check_overlap
[16:32:47] [PASSED] check_overlap_alloc
[16:32:47] [PASSED] check_overlap_release
[16:32:47] [PASSED] check_overlap_partial_init
[16:32:47] [PASSED] check_overlap_partial_shared_range_blocking
[16:32:47] [PASSED] check_used_usable
[16:32:47] [PASSED] check_used_shareable
[16:32:47] [PASSED] check_used_mixed
[16:32:47] [PASSED] check_release_usable_range
[16:32:47] [PASSED] check_release_shareable_range
[16:32:47] [PASSED] check_split_boundaries
[16:32:47] [PASSED] check_shareable_spare
[16:32:47] [PASSED] check_shareable_spare_fragmented_tail
[16:32:47] ===================== [PASSED] guc_idm =====================
[16:32:47] ============== guc_klv_helpers (13 subtests) ===============
[16:32:47] [PASSED] test_count
[16:32:47] [PASSED] test_encode_u32
[16:32:47] [PASSED] test_encode_u64
[16:32:47] [PASSED] test_encode_string
[16:32:47] [PASSED] test_encode_object_raw
[16:32:47] [PASSED] test_encode_object_klv
[16:32:47] [PASSED] test_encode_object_nested
[16:32:47] [PASSED] test_encode_object_basic
[16:32:47] ===================== test_decode_u16  =====================
[16:32:47] [PASSED] empty
[16:32:47] [PASSED] valid
[16:32:47] [PASSED] max
[16:32:47] [PASSED] big
[16:32:47] [PASSED] long
[16:32:47] ================= [PASSED] test_decode_u16 =================
[16:32:47] ===================== test_decode_u32  =====================
[16:32:47] [PASSED] empty
[16:32:47] [PASSED] valid
[16:32:47] [PASSED] max
[16:32:47] [PASSED] long
[16:32:47] ================= [PASSED] test_decode_u32 =================
[16:32:47] ===================== test_decode_u64  =====================
[16:32:47] [PASSED] empty
[16:32:47] [PASSED] short
[16:32:47] [PASSED] valid
[16:32:47] [PASSED] max
[16:32:47] [PASSED] long
[16:32:47] ================= [PASSED] test_decode_u64 =================
[16:32:47] ===================== test_decode_str  =====================
[16:32:47] [PASSED] empty
[16:32:47] [PASSED] one
[16:32:47] [PASSED] one_trash
[16:32:47] [PASSED] two
[16:32:47] [PASSED] two_trash
[16:32:47] [PASSED] three
[16:32:47] [PASSED] dword
[16:32:47] [PASSED] four
[16:32:47] [PASSED] five
[16:32:47] [PASSED] six
[16:32:47] [PASSED] seven
[16:32:47] [PASSED] qword
[16:32:47] ================= [PASSED] test_decode_str =================
[16:32:47] [PASSED] test_print
[16:32:47] ================= [PASSED] guc_klv_helpers =================
[16:32:47] =================== xe_log (5 subtests) ====================
[16:32:47] [PASSED] demo_cper
[16:32:47] [PASSED] demo_dmesg
[16:32:47] ======================= test_dmesg  ========================
[16:32:47] [PASSED] test_fatal
[16:32:47] [PASSED] test_fatal_tile
[16:32:47] [PASSED] test_fatal_gt
[16:32:47] [PASSED] test_fatal_comp
[16:32:47] [PASSED] test_fatal_comp_tile
[16:32:47] [PASSED] test_fatal_comp_gt
[16:32:47] [PASSED] test_fatal_all
[16:32:47] [PASSED] test_recoverable
[16:32:47] [PASSED] test_recoverable_tile
[16:32:47] [PASSED] test_recoverable_gt
[16:32:47] [PASSED] test_recoverable_comp
[16:32:47] [PASSED] test_recoverable_comp_tile
[16:32:47] [PASSED] test_recoverable_comp_gt
[16:32:47] [PASSED] test_recoverable_all
[16:32:47] [PASSED] test_info
[16:32:47] [PASSED] test_info_tile
[16:32:47] [PASSED] test_info_gt
[16:32:47] [PASSED] test_info_err
[16:32:47] [PASSED] test_info_comp
[16:32:47] [PASSED] test_info_comp_tile
[16:32:47] [PASSED] test_info_comp_gt
[16:32:47] [PASSED] test_info_all
[16:32:47] [PASSED] test_hw_fatal
[16:32:47] [PASSED] test_hw_recoverable
[16:32:47] [PASSED] test_hw_corrected
[16:32:47] [PASSED] test_hw_informational
[16:32:47] =================== [PASSED] test_dmesg ====================
[16:32:47] ====================== test_sw_cper  =======================
[16:32:47] [PASSED] sw-fatal-errno
[16:32:47] [PASSED] sw-recoverable-errno
[16:32:47] [PASSED] sw-corrected
[16:32:47] [PASSED] sw-informational
[16:32:47] [PASSED] sw-with-error-class
[16:32:47] ================== [PASSED] test_sw_cper ===================
[16:32:47] ====================== test_invalid  =======================
[16:32:47] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[16:32:47] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[16:32:47] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[16:32:47] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[16:32:47] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[16:32:47] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[16:32:47] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[16:32:47] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[16:32:47] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[16:32:47] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[16:32:47] ================== [SKIPPED] test_invalid ==================
[16:32:47] ===================== [PASSED] xe_log ======================
[16:32:47] ================== no_relay (3 subtests) ===================
[16:32:47] [PASSED] xe_drops_guc2pf_if_not_ready
[16:32:47] [PASSED] xe_drops_guc2vf_if_not_ready
[16:32:47] [PASSED] xe_rejects_send_if_not_ready
[16:32:47] ==================== [PASSED] no_relay =====================
[16:32:47] ================== pf_relay (14 subtests) ==================
[16:32:47] [PASSED] pf_rejects_guc2pf_too_short
[16:32:47] [PASSED] pf_rejects_guc2pf_too_long
[16:32:47] [PASSED] pf_rejects_guc2pf_no_payload
[16:32:47] [PASSED] pf_fails_no_payload
[16:32:47] [PASSED] pf_fails_bad_origin
[16:32:47] [PASSED] pf_fails_bad_type
[16:32:47] [PASSED] pf_txn_reports_error
[16:32:47] [PASSED] pf_txn_sends_pf2guc
[16:32:47] [PASSED] pf_sends_pf2guc
[16:32:47] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:32:47] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:32:47] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:32:47] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:32:47] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:32:47] ==================== [PASSED] pf_relay =====================
[16:32:47] ================== vf_relay (3 subtests) ===================
[16:32:47] [PASSED] vf_rejects_guc2vf_too_short
[16:32:47] [PASSED] vf_rejects_guc2vf_too_long
[16:32:47] [PASSED] vf_rejects_guc2vf_no_payload
[16:32:47] ==================== [PASSED] vf_relay =====================
[16:32:47] ================ pf_gt_config (9 subtests) =================
[16:32:47] [PASSED] fair_contexts_1vf
[16:32:47] [PASSED] fair_doorbells_1vf
[16:32:47] [PASSED] fair_ggtt_1vf
[16:32:47] ====================== fair_vram_1vf  ======================
[16:32:47] [PASSED] 3.50 GiB
[16:32:47] [PASSED] 11.5 GiB
[16:32:47] [PASSED] 15.5 GiB
[16:32:47] [PASSED] 31.5 GiB
[16:32:47] [PASSED] 63.5 GiB
[16:32:47] [PASSED] 1.91 GiB
[16:32:47] ================== [PASSED] fair_vram_1vf ==================
[16:32:47] ================ fair_vram_1vf_admin_only  =================
[16:32:47] [PASSED] 3.50 GiB
[16:32:47] [PASSED] 11.5 GiB
[16:32:47] [PASSED] 15.5 GiB
[16:32:47] [PASSED] 31.5 GiB
[16:32:47] [PASSED] 63.5 GiB
[16:32:47] [PASSED] 1.91 GiB
[16:32:47] ============ [PASSED] fair_vram_1vf_admin_only =============
[16:32:47] ====================== fair_contexts  ======================
[16:32:47] [PASSED] 1 VF
[16:32:47] [PASSED] 2 VFs
[16:32:47] [PASSED] 3 VFs
[16:32:47] [PASSED] 4 VFs
[16:32:47] [PASSED] 5 VFs
[16:32:47] [PASSED] 6 VFs
[16:32:47] [PASSED] 7 VFs
[16:32:47] [PASSED] 8 VFs
[16:32:47] [PASSED] 9 VFs
[16:32:47] [PASSED] 10 VFs
[16:32:47] [PASSED] 11 VFs
[16:32:47] [PASSED] 12 VFs
[16:32:47] [PASSED] 13 VFs
[16:32:47] [PASSED] 14 VFs
[16:32:47] [PASSED] 15 VFs
[16:32:47] [PASSED] 16 VFs
[16:32:47] [PASSED] 17 VFs
[16:32:47] [PASSED] 18 VFs
[16:32:47] [PASSED] 19 VFs
[16:32:47] [PASSED] 20 VFs
[16:32:47] [PASSED] 21 VFs
[16:32:47] [PASSED] 22 VFs
[16:32:47] [PASSED] 23 VFs
[16:32:47] [PASSED] 24 VFs
[16:32:47] [PASSED] 25 VFs
[16:32:47] [PASSED] 26 VFs
[16:32:47] [PASSED] 27 VFs
[16:32:47] [PASSED] 28 VFs
[16:32:47] [PASSED] 29 VFs
[16:32:47] [PASSED] 30 VFs
[16:32:47] [PASSED] 31 VFs
[16:32:47] [PASSED] 32 VFs
[16:32:47] [PASSED] 33 VFs
[16:32:47] [PASSED] 34 VFs
[16:32:47] [PASSED] 35 VFs
[16:32:47] [PASSED] 36 VFs
[16:32:47] [PASSED] 37 VFs
[16:32:47] [PASSED] 38 VFs
[16:32:47] [PASSED] 39 VFs
[16:32:47] [PASSED] 40 VFs
[16:32:47] [PASSED] 41 VFs
[16:32:47] [PASSED] 42 VFs
[16:32:47] [PASSED] 43 VFs
[16:32:47] [PASSED] 44 VFs
[16:32:47] [PASSED] 45 VFs
[16:32:47] [PASSED] 46 VFs
[16:32:47] [PASSED] 47 VFs
[16:32:47] [PASSED] 48 VFs
[16:32:47] [PASSED] 49 VFs
[16:32:47] [PASSED] 50 VFs
[16:32:47] [PASSED] 51 VFs
[16:32:47] [PASSED] 52 VFs
[16:32:47] [PASSED] 53 VFs
[16:32:47] [PASSED] 54 VFs
[16:32:47] [PASSED] 55 VFs
[16:32:47] [PASSED] 56 VFs
[16:32:47] [PASSED] 57 VFs
[16:32:47] [PASSED] 58 VFs
[16:32:47] [PASSED] 59 VFs
[16:32:47] [PASSED] 60 VFs
[16:32:47] [PASSED] 61 VFs
[16:32:47] [PASSED] 62 VFs
[16:32:47] [PASSED] 63 VFs
[16:32:47] ================== [PASSED] fair_contexts ==================
[16:32:47] ===================== fair_doorbells  ======================
[16:32:47] [PASSED] 1 VF
[16:32:47] [PASSED] 2 VFs
[16:32:47] [PASSED] 3 VFs
[16:32:47] [PASSED] 4 VFs
[16:32:47] [PASSED] 5 VFs
[16:32:47] [PASSED] 6 VFs
[16:32:47] [PASSED] 7 VFs
[16:32:47] [PASSED] 8 VFs
[16:32:47] [PASSED] 9 VFs
[16:32:47] [PASSED] 10 VFs
[16:32:47] [PASSED] 11 VFs
[16:32:47] [PASSED] 12 VFs
[16:32:47] [PASSED] 13 VFs
[16:32:47] [PASSED] 14 VFs
[16:32:47] [PASSED] 15 VFs
[16:32:47] [PASSED] 16 VFs
[16:32:47] [PASSED] 17 VFs
[16:32:47] [PASSED] 18 VFs
[16:32:47] [PASSED] 19 VFs
[16:32:47] [PASSED] 20 VFs
[16:32:47] [PASSED] 21 VFs
[16:32:47] [PASSED] 22 VFs
[16:32:47] [PASSED] 23 VFs
[16:32:47] [PASSED] 24 VFs
[16:32:47] [PASSED] 25 VFs
[16:32:47] [PASSED] 26 VFs
[16:32:47] [PASSED] 27 VFs
[16:32:47] [PASSED] 28 VFs
[16:32:47] [PASSED] 29 VFs
[16:32:47] [PASSED] 30 VFs
[16:32:47] [PASSED] 31 VFs
[16:32:47] [PASSED] 32 VFs
[16:32:47] [PASSED] 33 VFs
[16:32:47] [PASSED] 34 VFs
[16:32:47] [PASSED] 35 VFs
[16:32:47] [PASSED] 36 VFs
[16:32:47] [PASSED] 37 VFs
[16:32:47] [PASSED] 38 VFs
[16:32:47] [PASSED] 39 VFs
[16:32:47] [PASSED] 40 VFs
[16:32:47] [PASSED] 41 VFs
[16:32:47] [PASSED] 42 VFs
[16:32:47] [PASSED] 43 VFs
[16:32:47] [PASSED] 44 VFs
[16:32:47] [PASSED] 45 VFs
[16:32:47] [PASSED] 46 VFs
[16:32:47] [PASSED] 47 VFs
[16:32:47] [PASSED] 48 VFs
[16:32:47] [PASSED] 49 VFs
[16:32:47] [PASSED] 50 VFs
[16:32:47] [PASSED] 51 VFs
[16:32:47] [PASSED] 52 VFs
[16:32:47] [PASSED] 53 VFs
[16:32:47] [PASSED] 54 VFs
[16:32:47] [PASSED] 55 VFs
[16:32:47] [PASSED] 56 VFs
[16:32:47] [PASSED] 57 VFs
[16:32:47] [PASSED] 58 VFs
[16:32:47] [PASSED] 59 VFs
[16:32:47] [PASSED] 60 VFs
[16:32:47] [PASSED] 61 VFs
[16:32:47] [PASSED] 62 VFs
[16:32:47] [PASSED] 63 VFs
[16:32:47] ================= [PASSED] fair_doorbells ==================
[16:32:47] ======================== fair_ggtt  ========================
[16:32:47] [PASSED] 1 VF
[16:32:47] [PASSED] 2 VFs
[16:32:47] [PASSED] 3 VFs
[16:32:47] [PASSED] 4 VFs
[16:32:47] [PASSED] 5 VFs
[16:32:47] [PASSED] 6 VFs
[16:32:47] [PASSED] 7 VFs
[16:32:47] [PASSED] 8 VFs
[16:32:47] [PASSED] 9 VFs
[16:32:47] [PASSED] 10 VFs
[16:32:47] [PASSED] 11 VFs
[16:32:47] [PASSED] 12 VFs
[16:32:47] [PASSED] 13 VFs
[16:32:47] [PASSED] 14 VFs
[16:32:47] [PASSED] 15 VFs
[16:32:47] [PASSED] 16 VFs
[16:32:47] [PASSED] 17 VFs
[16:32:47] [PASSED] 18 VFs
[16:32:47] [PASSED] 19 VFs
[16:32:47] [PASSED] 20 VFs
[16:32:47] [PASSED] 21 VFs
[16:32:47] [PASSED] 22 VFs
[16:32:47] [PASSED] 23 VFs
[16:32:47] [PASSED] 24 VFs
[16:32:47] [PASSED] 25 VFs
[16:32:47] [PASSED] 26 VFs
[16:32:47] [PASSED] 27 VFs
[16:32:47] [PASSED] 28 VFs
[16:32:48] [PASSED] 29 VFs
[16:32:48] [PASSED] 30 VFs
[16:32:48] [PASSED] 31 VFs
[16:32:48] [PASSED] 32 VFs
[16:32:48] [PASSED] 33 VFs
[16:32:48] [PASSED] 34 VFs
[16:32:48] [PASSED] 35 VFs
[16:32:48] [PASSED] 36 VFs
[16:32:48] [PASSED] 37 VFs
[16:32:48] [PASSED] 38 VFs
[16:32:48] [PASSED] 39 VFs
[16:32:48] [PASSED] 40 VFs
[16:32:48] [PASSED] 41 VFs
[16:32:48] [PASSED] 42 VFs
[16:32:48] [PASSED] 43 VFs
[16:32:48] [PASSED] 44 VFs
[16:32:48] [PASSED] 45 VFs
[16:32:48] [PASSED] 46 VFs
[16:32:48] [PASSED] 47 VFs
[16:32:48] [PASSED] 48 VFs
[16:32:48] [PASSED] 49 VFs
[16:32:48] [PASSED] 50 VFs
[16:32:48] [PASSED] 51 VFs
[16:32:48] [PASSED] 52 VFs
[16:32:48] [PASSED] 53 VFs
[16:32:48] [PASSED] 54 VFs
[16:32:48] [PASSED] 55 VFs
[16:32:48] [PASSED] 56 VFs
[16:32:48] [PASSED] 57 VFs
[16:32:48] [PASSED] 58 VFs
[16:32:48] [PASSED] 59 VFs
[16:32:48] [PASSED] 60 VFs
[16:32:48] [PASSED] 61 VFs
[16:32:48] [PASSED] 62 VFs
[16:32:48] [PASSED] 63 VFs
[16:32:48] ==================== [PASSED] fair_ggtt ====================
[16:32:48] ======================== fair_vram  ========================
[16:32:48] [PASSED] 1 VF
[16:32:48] [PASSED] 2 VFs
[16:32:48] [PASSED] 3 VFs
[16:32:48] [PASSED] 4 VFs
[16:32:48] [PASSED] 5 VFs
[16:32:48] [PASSED] 6 VFs
[16:32:48] [PASSED] 7 VFs
[16:32:48] [PASSED] 8 VFs
[16:32:48] [PASSED] 9 VFs
[16:32:48] [PASSED] 10 VFs
[16:32:48] [PASSED] 11 VFs
[16:32:48] [PASSED] 12 VFs
[16:32:48] [PASSED] 13 VFs
[16:32:48] [PASSED] 14 VFs
[16:32:48] [PASSED] 15 VFs
[16:32:48] [PASSED] 16 VFs
[16:32:48] [PASSED] 17 VFs
[16:32:48] [PASSED] 18 VFs
[16:32:48] [PASSED] 19 VFs
[16:32:48] [PASSED] 20 VFs
[16:32:48] [PASSED] 21 VFs
[16:32:48] [PASSED] 22 VFs
[16:32:48] [PASSED] 23 VFs
[16:32:48] [PASSED] 24 VFs
[16:32:48] [PASSED] 25 VFs
[16:32:48] [PASSED] 26 VFs
[16:32:48] [PASSED] 27 VFs
[16:32:48] [PASSED] 28 VFs
[16:32:48] [PASSED] 29 VFs
[16:32:48] [PASSED] 30 VFs
[16:32:48] [PASSED] 31 VFs
[16:32:48] [PASSED] 32 VFs
[16:32:48] [PASSED] 33 VFs
[16:32:48] [PASSED] 34 VFs
[16:32:48] [PASSED] 35 VFs
[16:32:48] [PASSED] 36 VFs
[16:32:48] [PASSED] 37 VFs
[16:32:48] [PASSED] 38 VFs
[16:32:48] [PASSED] 39 VFs
[16:32:48] [PASSED] 40 VFs
[16:32:48] [PASSED] 41 VFs
[16:32:48] [PASSED] 42 VFs
[16:32:48] [PASSED] 43 VFs
[16:32:48] [PASSED] 44 VFs
[16:32:48] [PASSED] 45 VFs
[16:32:48] [PASSED] 46 VFs
[16:32:48] [PASSED] 47 VFs
[16:32:48] [PASSED] 48 VFs
[16:32:48] [PASSED] 49 VFs
[16:32:48] [PASSED] 50 VFs
[16:32:48] [PASSED] 51 VFs
[16:32:48] [PASSED] 52 VFs
[16:32:48] [PASSED] 53 VFs
[16:32:48] [PASSED] 54 VFs
[16:32:48] [PASSED] 55 VFs
[16:32:48] [PASSED] 56 VFs
[16:32:48] [PASSED] 57 VFs
[16:32:48] [PASSED] 58 VFs
[16:32:48] [PASSED] 59 VFs
[16:32:48] [PASSED] 60 VFs
[16:32:48] [PASSED] 61 VFs
[16:32:48] [PASSED] 62 VFs
[16:32:48] [PASSED] 63 VFs
[16:32:48] ==================== [PASSED] fair_vram ====================
[16:32:48] ================== [PASSED] pf_gt_config ===================
[16:32:48] ===================== lmtt (1 subtest) =====================
[16:32:48] ======================== test_ops  =========================
[16:32:48] [PASSED] 2-level
[16:32:48] [PASSED] multi-level
[16:32:48] ==================== [PASSED] test_ops =====================
[16:32:48] ====================== [PASSED] lmtt =======================
[16:32:48] ================= sriov_packet (1 subtest) =================
[16:32:48] [PASSED] test_descriptor_init
[16:32:48] ================== [PASSED] sriov_packet ===================
[16:32:48] ================= pf_service (11 subtests) =================
[16:32:48] [PASSED] pf_negotiate_any
[16:32:48] [PASSED] pf_negotiate_base_match
[16:32:48] [PASSED] pf_negotiate_base_newer
[16:32:48] [PASSED] pf_negotiate_base_next
[16:32:48] [SKIPPED] pf_negotiate_base_older (no older minor)
[16:32:48] [PASSED] pf_negotiate_base_prev
[16:32:48] [PASSED] pf_negotiate_latest_match
[16:32:48] [PASSED] pf_negotiate_latest_newer
[16:32:48] [PASSED] pf_negotiate_latest_next
[16:32:48] [SKIPPED] pf_negotiate_latest_older (no older minor)
[16:32:48] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[16:32:48] =================== [PASSED] pf_service ====================
[16:32:48] ================= xe_guc_g2g (2 subtests) ==================
[16:32:48] ============== xe_live_guc_g2g_kunit_default  ==============
[16:32:48] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[16:32:48] ============== xe_live_guc_g2g_kunit_allmem  ===============
[16:32:48] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[16:32:48] =================== [SKIPPED] xe_guc_g2g ===================
[16:32:48] =================== xe_mocs (2 subtests) ===================
[16:32:48] ================ xe_live_mocs_kernel_kunit  ================
[16:32:48] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[16:32:48] ================ xe_live_mocs_reset_kunit  =================
[16:32:48] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[16:32:48] ==================== [SKIPPED] xe_mocs =====================
[16:32:48] ================= xe_migrate (2 subtests) ==================
[16:32:48] ================= xe_migrate_sanity_kunit  =================
[16:32:48] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[16:32:48] ================== xe_validate_ccs_kunit  ==================
[16:32:48] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[16:32:48] =================== [SKIPPED] xe_migrate ===================
[16:32:48] ================== xe_dma_buf (1 subtest) ==================
[16:32:48] ==================== xe_dma_buf_kunit  =====================
[16:32:48] ================ [SKIPPED] xe_dma_buf_kunit ================
[16:32:48] =================== [SKIPPED] xe_dma_buf ===================
[16:32:48] ================= xe_bo_shrink (1 subtest) =================
[16:32:48] =================== xe_bo_shrink_kunit  ====================
[16:32:48] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[16:32:48] ================== [SKIPPED] xe_bo_shrink ==================
[16:32:48] ==================== xe_bo (2 subtests) ====================
[16:32:48] ================== xe_ccs_migrate_kunit  ===================
[16:32:48] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[16:32:48] ==================== xe_bo_evict_kunit  ====================
[16:32:48] =============== [SKIPPED] xe_bo_evict_kunit ================
[16:32:48] ===================== [SKIPPED] xe_bo ======================
[16:32:48] =================== xe_any (9 subtests) ====================
[16:32:48] [PASSED] test_to_xe
[16:32:48] [PASSED] test_to_dev
[16:32:48] [PASSED] test_to_pdev
[16:32:48] [PASSED] test_to_drm
[16:32:48] [PASSED] test_if_pdev
[16:32:48] [PASSED] test_if_xe
[16:32:48] [PASSED] test_if_tile
[16:32:48] [PASSED] test_if_gt
[16:32:48] [PASSED] test_to_id
[16:32:48] ===================== [PASSED] xe_any ======================
[16:32:48] ==================== args (13 subtests) ====================
[16:32:48] [PASSED] count_args_test
[16:32:48] [PASSED] call_args_example
[16:32:48] [PASSED] call_args_test
[16:32:48] [PASSED] drop_first_arg_example
[16:32:48] [PASSED] drop_first_arg_test
[16:32:48] [PASSED] first_arg_example
[16:32:48] [PASSED] first_arg_test
[16:32:48] [PASSED] last_arg_example
[16:32:48] [PASSED] last_arg_test
[16:32:48] [PASSED] pick_arg_example
[16:32:48] [PASSED] if_args_example
[16:32:48] [PASSED] if_args_test
[16:32:48] [PASSED] sep_comma_example
[16:32:48] ====================== [PASSED] args =======================
[16:32:48] =================== xe_pci (3 subtests) ====================
[16:32:48] ==================== check_graphics_ip  ====================
[16:32:48] [PASSED] 12.00 Xe_LP
[16:32:48] [PASSED] 12.10 Xe_LP+
[16:32:48] [PASSED] 12.55 Xe_HPG
[16:32:48] [PASSED] 12.60 Xe_HPC
[16:32:48] [PASSED] 12.70 Xe_LPG
[16:32:48] [PASSED] 12.71 Xe_LPG
[16:32:48] [PASSED] 12.74 Xe_LPG+
[16:32:48] [PASSED] 20.01 Xe2_HPG
[16:32:48] [PASSED] 20.02 Xe2_HPG
[16:32:48] [PASSED] 20.04 Xe2_LPG
[16:32:48] [PASSED] 30.00 Xe3_LPG
[16:32:48] [PASSED] 30.01 Xe3_LPG
[16:32:48] [PASSED] 30.03 Xe3_LPG
[16:32:48] [PASSED] 30.04 Xe3_LPG
[16:32:48] [PASSED] 30.05 Xe3_LPG
[16:32:48] [PASSED] 35.10 Xe3p_LPG
[16:32:48] [PASSED] 35.11 Xe3p_XPC
[16:32:48] ================ [PASSED] check_graphics_ip ================
[16:32:48] ===================== check_media_ip  ======================
[16:32:48] [PASSED] 12.00 Xe_M
[16:32:48] [PASSED] 12.55 Xe_HPM
[16:32:48] [PASSED] 13.00 Xe_LPM+
[16:32:48] [PASSED] 13.01 Xe2_HPM
[16:32:48] [PASSED] 20.00 Xe2_LPM
[16:32:48] [PASSED] 30.00 Xe3_LPM
[16:32:48] [PASSED] 30.02 Xe3_LPM
[16:32:48] [PASSED] 35.00 Xe3p_LPM
[16:32:48] [PASSED] 35.03 Xe3p_HPM
[16:32:48] ================= [PASSED] check_media_ip ==================
[16:32:48] =================== check_platform_desc  ===================
[16:32:48] [PASSED] 0x9A60 (TIGERLAKE)
[16:32:48] [PASSED] 0x9A68 (TIGERLAKE)
[16:32:48] [PASSED] 0x9A70 (TIGERLAKE)
[16:32:48] [PASSED] 0x9A40 (TIGERLAKE)
[16:32:48] [PASSED] 0x9A49 (TIGERLAKE)
[16:32:48] [PASSED] 0x9A59 (TIGERLAKE)
[16:32:48] [PASSED] 0x9A78 (TIGERLAKE)
[16:32:48] [PASSED] 0x9AC0 (TIGERLAKE)
[16:32:48] [PASSED] 0x9AC9 (TIGERLAKE)
[16:32:48] [PASSED] 0x9AD9 (TIGERLAKE)
[16:32:48] [PASSED] 0x9AF8 (TIGERLAKE)
[16:32:48] [PASSED] 0x4C80 (ROCKETLAKE)
[16:32:48] [PASSED] 0x4C8A (ROCKETLAKE)
[16:32:48] [PASSED] 0x4C8B (ROCKETLAKE)
[16:32:48] [PASSED] 0x4C8C (ROCKETLAKE)
[16:32:48] [PASSED] 0x4C90 (ROCKETLAKE)
[16:32:48] [PASSED] 0x4C9A (ROCKETLAKE)
[16:32:48] [PASSED] 0x4680 (ALDERLAKE_S)
[16:32:48] [PASSED] 0x4682 (ALDERLAKE_S)
[16:32:48] [PASSED] 0x4688 (ALDERLAKE_S)
[16:32:48] [PASSED] 0x468A (ALDERLAKE_S)
[16:32:48] [PASSED] 0x468B (ALDERLAKE_S)
[16:32:48] [PASSED] 0x4690 (ALDERLAKE_S)
[16:32:48] [PASSED] 0x4692 (ALDERLAKE_S)
[16:32:48] [PASSED] 0x4693 (ALDERLAKE_S)
[16:32:48] [PASSED] 0x46A0 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46A1 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46A2 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46A3 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46A6 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46A8 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46AA (ALDERLAKE_P)
[16:32:48] [PASSED] 0x462A (ALDERLAKE_P)
[16:32:48] [PASSED] 0x4626 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x4628 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46B0 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46B1 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46B2 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46B3 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46C0 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46C1 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46C2 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46C3 (ALDERLAKE_P)
[16:32:48] [PASSED] 0x46D0 (ALDERLAKE_N)
[16:32:48] [PASSED] 0x46D1 (ALDERLAKE_N)
[16:32:48] [PASSED] 0x46D2 (ALDERLAKE_N)
[16:32:48] [PASSED] 0x46D3 (ALDERLAKE_N)
[16:32:48] [PASSED] 0x46D4 (ALDERLAKE_N)
[16:32:48] [PASSED] 0xA721 (ALDERLAKE_P)
[16:32:48] [PASSED] 0xA7A1 (ALDERLAKE_P)
[16:32:48] [PASSED] 0xA7A9 (ALDERLAKE_P)
[16:32:48] [PASSED] 0xA7AC (ALDERLAKE_P)
[16:32:48] [PASSED] 0xA7AD (ALDERLAKE_P)
[16:32:48] [PASSED] 0xA720 (ALDERLAKE_P)
[16:32:48] [PASSED] 0xA7A0 (ALDERLAKE_P)
[16:32:48] [PASSED] 0xA7A8 (ALDERLAKE_P)
[16:32:48] [PASSED] 0xA7AA (ALDERLAKE_P)
[16:32:48] [PASSED] 0xA7AB (ALDERLAKE_P)
[16:32:48] [PASSED] 0xA780 (ALDERLAKE_S)
[16:32:48] [PASSED] 0xA781 (ALDERLAKE_S)
[16:32:48] [PASSED] 0xA782 (ALDERLAKE_S)
[16:32:48] [PASSED] 0xA783 (ALDERLAKE_S)
[16:32:48] [PASSED] 0xA788 (ALDERLAKE_S)
[16:32:48] [PASSED] 0xA789 (ALDERLAKE_S)
[16:32:48] [PASSED] 0xA78A (ALDERLAKE_S)
[16:32:48] [PASSED] 0xA78B (ALDERLAKE_S)
[16:32:48] [PASSED] 0x4905 (DG1)
[16:32:48] [PASSED] 0x4906 (DG1)
[16:32:48] [PASSED] 0x4907 (DG1)
[16:32:48] [PASSED] 0x4908 (DG1)
[16:32:48] [PASSED] 0x4909 (DG1)
[16:32:48] [PASSED] 0x56C0 (DG2)
[16:32:48] [PASSED] 0x56C2 (DG2)
[16:32:48] [PASSED] 0x56C1 (DG2)
[16:32:48] [PASSED] 0x7D51 (METEORLAKE)
[16:32:48] [PASSED] 0x7DD1 (METEORLAKE)
[16:32:48] [PASSED] 0x7D41 (METEORLAKE)
[16:32:48] [PASSED] 0x7D67 (METEORLAKE)
[16:32:48] [PASSED] 0xB640 (METEORLAKE)
[16:32:48] [PASSED] 0x56A0 (DG2)
[16:32:48] [PASSED] 0x56A1 (DG2)
[16:32:48] [PASSED] 0x56A2 (DG2)
[16:32:48] [PASSED] 0x56BE (DG2)
[16:32:48] [PASSED] 0x56BF (DG2)
[16:32:48] [PASSED] 0x5690 (DG2)
[16:32:48] [PASSED] 0x5691 (DG2)
[16:32:48] [PASSED] 0x5692 (DG2)
[16:32:48] [PASSED] 0x56A5 (DG2)
[16:32:48] [PASSED] 0x56A6 (DG2)
[16:32:48] [PASSED] 0x56B0 (DG2)
[16:32:48] [PASSED] 0x56B1 (DG2)
[16:32:48] [PASSED] 0x56BA (DG2)
[16:32:48] [PASSED] 0x56BB (DG2)
[16:32:48] [PASSED] 0x56BC (DG2)
[16:32:48] [PASSED] 0x56BD (DG2)
[16:32:48] [PASSED] 0x5693 (DG2)
[16:32:48] [PASSED] 0x5694 (DG2)
[16:32:48] [PASSED] 0x5695 (DG2)
[16:32:48] [PASSED] 0x56A3 (DG2)
[16:32:48] [PASSED] 0x56A4 (DG2)
[16:32:48] [PASSED] 0x56B2 (DG2)
[16:32:48] [PASSED] 0x56B3 (DG2)
[16:32:48] [PASSED] 0x5696 (DG2)
[16:32:48] [PASSED] 0x5697 (DG2)
[16:32:48] [PASSED] 0xB69 (PVC)
[16:32:48] [PASSED] 0xB6E (PVC)
[16:32:48] [PASSED] 0xBD4 (PVC)
[16:32:48] [PASSED] 0xBD5 (PVC)
[16:32:48] [PASSED] 0xBD6 (PVC)
[16:32:48] [PASSED] 0xBD7 (PVC)
[16:32:48] [PASSED] 0xBD8 (PVC)
[16:32:48] [PASSED] 0xBD9 (PVC)
[16:32:48] [PASSED] 0xBDA (PVC)
[16:32:48] [PASSED] 0xBDB (PVC)
[16:32:48] [PASSED] 0xBE0 (PVC)
[16:32:48] [PASSED] 0xBE1 (PVC)
[16:32:48] [PASSED] 0xBE5 (PVC)
[16:32:48] [PASSED] 0x7D40 (METEORLAKE)
[16:32:48] [PASSED] 0x7D45 (METEORLAKE)
[16:32:48] [PASSED] 0x7D55 (METEORLAKE)
[16:32:48] [PASSED] 0x7D60 (METEORLAKE)
[16:32:48] [PASSED] 0x7DD5 (METEORLAKE)
[16:32:48] [PASSED] 0x6420 (LUNARLAKE)
[16:32:48] [PASSED] 0x64A0 (LUNARLAKE)
[16:32:48] [PASSED] 0x64B0 (LUNARLAKE)
[16:32:48] [PASSED] 0xE202 (BATTLEMAGE)
[16:32:48] [PASSED] 0xE209 (BATTLEMAGE)
[16:32:48] [PASSED] 0xE20B (BATTLEMAGE)
[16:32:48] [PASSED] 0xE20C (BATTLEMAGE)
[16:32:48] [PASSED] 0xE20D (BATTLEMAGE)
[16:32:48] [PASSED] 0xE210 (BATTLEMAGE)
[16:32:48] [PASSED] 0xE211 (BATTLEMAGE)
[16:32:48] [PASSED] 0xE212 (BATTLEMAGE)
[16:32:48] [PASSED] 0xE216 (BATTLEMAGE)
[16:32:48] [PASSED] 0xE220 (BATTLEMAGE)
[16:32:48] [PASSED] 0xE221 (BATTLEMAGE)
[16:32:48] [PASSED] 0xE222 (BATTLEMAGE)
[16:32:48] [PASSED] 0xE223 (BATTLEMAGE)
[16:32:48] [PASSED] 0xB080 (PANTHERLAKE)
[16:32:48] [PASSED] 0xB081 (PANTHERLAKE)
[16:32:48] [PASSED] 0xB082 (PANTHERLAKE)
[16:32:48] [PASSED] 0xB083 (PANTHERLAKE)
[16:32:48] [PASSED] 0xB084 (PANTHERLAKE)
[16:32:48] [PASSED] 0xB085 (PANTHERLAKE)
[16:32:48] [PASSED] 0xB086 (PANTHERLAKE)
[16:32:48] [PASSED] 0xB087 (PANTHERLAKE)
[16:32:48] [PASSED] 0xB08F (PANTHERLAKE)
[16:32:48] [PASSED] 0xB090 (PANTHERLAKE)
[16:32:48] [PASSED] 0xB0A0 (PANTHERLAKE)
[16:32:48] [PASSED] 0xB0A1 (PANTHERLAKE)
[16:32:48] [PASSED] 0xB0B0 (PANTHERLAKE)
[16:32:48] [PASSED] 0xFD80 (PANTHERLAKE)
[16:32:48] [PASSED] 0xFD81 (PANTHERLAKE)
[16:32:48] [PASSED] 0xD740 (NOVALAKE_S)
[16:32:48] [PASSED] 0xD741 (NOVALAKE_S)
[16:32:48] [PASSED] 0xD742 (NOVALAKE_S)
[16:32:48] [PASSED] 0xD743 (NOVALAKE_S)
[16:32:48] [PASSED] 0xD745 (NOVALAKE_S)
[16:32:48] [PASSED] 0xD74A (NOVALAKE_S)
[16:32:48] [PASSED] 0xD74B (NOVALAKE_S)
[16:32:48] [PASSED] 0x674C (CRESCENTISLAND)
[16:32:48] [PASSED] 0x674D (CRESCENTISLAND)
[16:32:48] [PASSED] 0x674E (CRESCENTISLAND)
[16:32:48] [PASSED] 0x674F (CRESCENTISLAND)
[16:32:48] [PASSED] 0x6750 (CRESCENTISLAND)
[16:32:48] [PASSED] 0x6751 (CRESCENTISLAND)
[16:32:48] [PASSED] 0xD750 (NOVALAKE_P)
[16:32:48] [PASSED] 0xD751 (NOVALAKE_P)
[16:32:48] [PASSED] 0xD752 (NOVALAKE_P)
[16:32:48] [PASSED] 0xD753 (NOVALAKE_P)
[16:32:48] [PASSED] 0xD754 (NOVALAKE_P)
[16:32:48] [PASSED] 0xD755 (NOVALAKE_P)
[16:32:48] [PASSED] 0xD756 (NOVALAKE_P)
[16:32:48] [PASSED] 0xD757 (NOVALAKE_P)
[16:32:48] [PASSED] 0xD75F (NOVALAKE_P)
[16:32:48] =============== [PASSED] check_platform_desc ===============
[16:32:48] ===================== [PASSED] xe_pci ======================
[16:32:48] ============= xe_rtp_tables_test (5 subtests) ==============
[16:32:48] ================== xe_rtp_table_gt_test  ===================
[16:32:48] [PASSED] gt_was/14011060649
[16:32:48] [PASSED] gt_was/14011059788
[16:32:48] [PASSED] gt_was/14015795083
[16:32:48] [PASSED] gt_was/16021867713
[16:32:48] [PASSED] gt_was/14019449301
[16:32:48] [PASSED] gt_was/16028005424
[16:32:48] [PASSED] gt_was/14026578760
[16:32:48] [PASSED] gt_was/1409420604
[16:32:48] [PASSED] gt_was/1408615072
[16:32:48] [PASSED] gt_was/22010523718
[16:32:48] [PASSED] gt_was/14011006942
[16:32:48] [PASSED] gt_was/14014830051
[16:32:48] [PASSED] gt_was/18018781329
[16:32:48] [PASSED] gt_was/1509235366
[16:32:48] [PASSED] gt_was/18018781329
[16:32:48] [PASSED] gt_was/16016694945
[16:32:48] [PASSED] gt_was/14018575942
[16:32:48] [PASSED] gt_was/22016670082
[16:32:48] [PASSED] gt_was/22016670082
[16:32:48] [PASSED] gt_was/14017421178
[16:32:48] [PASSED] gt_was/16025250150
[16:32:48] [PASSED] gt_was/14021871409
[16:32:48] [PASSED] gt_was/16021865536
[16:32:48] [PASSED] gt_was/14021486841
[16:32:48] [PASSED] gt_was/14025160223
[16:32:48] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[16:32:48] [PASSED] gt_was/14025635424
[16:32:48] [PASSED] gt_was/16028005424
[16:32:48] ============== [PASSED] xe_rtp_table_gt_test ===============
[16:32:48] ================== xe_rtp_table_gt_test  ===================
[16:32:48] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[16:32:48] [PASSED] gt_tunings/Tuning: 32B Access Enable
[16:32:48] [PASSED] gt_tunings/Tuning: L3 cache
[16:32:48] [PASSED] gt_tunings/Tuning: L3 cache - media
[16:32:48] [PASSED] gt_tunings/Tuning: Compression Overfetch
[16:32:48] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[16:32:48] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[16:32:48] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[16:32:48] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[16:32:48] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[16:32:48] [PASSED] gt_tunings/Tuning: Stateless compression control
[16:32:48] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[16:32:48] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[16:32:48] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[16:32:48] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[16:32:48] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[16:32:48] ============== [PASSED] xe_rtp_table_gt_test ===============
[16:32:48] ================== xe_rtp_table_oob_test  ==================
[16:32:48] [PASSED] oob_was/1607983814
[16:32:48] [PASSED] oob_was/16010904313
[16:32:48] [PASSED] oob_was/18022495364
[16:32:48] [PASSED] oob_was/22012773006
[16:32:48] [PASSED] oob_was/14014475959
[16:32:48] [PASSED] oob_was/22011391025
[16:32:48] [PASSED] oob_was/22012727170
[16:32:48] [PASSED] oob_was/22012727685
[16:32:48] [PASSED] oob_was/22016596838
[16:32:48] [PASSED] oob_was/18020744125
[16:32:48] [PASSED] oob_was/1409600907
[16:32:48] [PASSED] oob_was/22014953428
[16:32:48] [PASSED] oob_was/16017236439
[16:32:48] [PASSED] oob_was/14019821291
[16:32:48] [PASSED] oob_was/14015076503
[16:32:48] [PASSED] oob_was/22016122933
[16:32:48] [PASSED] oob_was/14018913170
[16:32:48] [PASSED] oob_was/14018094691
[16:32:48] [PASSED] oob_was/18024947630
[16:32:48] [PASSED] oob_was/16022287689
[16:32:48] [PASSED] oob_was/13011645652
[16:32:48] [PASSED] oob_was/14022293748
[16:32:48] [PASSED] oob_was/22019794406
[16:32:48] [PASSED] oob_was/22019338487
[16:32:48] [PASSED] oob_was/16023588340
[16:32:48] [PASSED] oob_was/14019789679
[16:32:48] [PASSED] oob_was/14022866841
[16:32:48] [PASSED] oob_was/16021333562
[16:32:48] [PASSED] oob_was/14016712196
[16:32:48] [PASSED] oob_was/14015568240
[16:32:48] [PASSED] oob_was/18013179988
[16:32:48] [PASSED] oob_was/1508761755
[16:32:48] [PASSED] oob_was/16023105232
[16:32:48] [PASSED] oob_was/16026508708
[16:32:48] [PASSED] oob_was/14020001231
[16:32:48] [PASSED] oob_was/16023683509
[16:32:48] [PASSED] oob_was/14025515070
[16:32:48] [PASSED] oob_was/15015404425_disable
[16:32:48] [PASSED] oob_was/16026007364
[16:32:48] [PASSED] oob_was/14020316580
[16:32:48] [PASSED] oob_was/14025883347
[16:32:48] [PASSED] oob_was/16029380221
[16:32:48] [PASSED] oob_was/22022079272
[16:32:48] [PASSED] oob_was/16029897822
[16:32:48] [PASSED] oob_was/14027054324
[16:32:48] [PASSED] oob_was/14025941587
[16:32:48] [PASSED] oob_was/16030224309
[16:32:48] ============== [PASSED] xe_rtp_table_oob_test ==============
[16:32:48] ================ xe_rtp_table_dev_oob_test  ================
[16:32:48] [PASSED] device_oob_was/22010954014
[16:32:48] [PASSED] device_oob_was/15015404425
[16:32:48] [PASSED] device_oob_was/22019338487_display
[16:32:48] [PASSED] device_oob_was/14022085890
[16:32:48] [PASSED] device_oob_was/14026539277
[16:32:48] [PASSED] device_oob_was/14026633728
[16:32:48] [PASSED] device_oob_was/14026746987
[16:32:48] [PASSED] device_oob_was/14026779378
[16:32:48] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[16:32:48] ========== xe_rtp_table_missing_upper_bound_test  ==========
[16:32:48] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[16:32:48] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[16:32:48] [PASSED] register_whitelist/1806527549
[16:32:48] [PASSED] register_whitelist/allow_read_ctx_timestamp
[16:32:48] [PASSED] register_whitelist/allow_read_queue_timestamp
[16:32:48] [PASSED] register_whitelist/16014440446
[16:32:48] [PASSED] register_whitelist/16017236439
[16:32:48] [PASSED] register_whitelist/16020183090
[16:32:48] [PASSED] register_whitelist/14024997852
[16:32:48] [PASSED] register_whitelist/14024997852
[16:32:48] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[16:32:48] =============== [PASSED] xe_rtp_tables_test ================
[16:32:48] =================== xe_rtp (3 subtests) ====================
[16:32:48] =================== xe_rtp_rules_tests  ====================
[16:32:48] [PASSED] no
[16:32:48] [PASSED] yes
[16:32:48] [PASSED] no-and-no
[16:32:48] [PASSED] no-and-yes
[16:32:48] [PASSED] yes-and-no
[16:32:48] [PASSED] yes-and-yes
[16:32:48] [PASSED] no-or-no
[16:32:48] [PASSED] no-or-yes
[16:32:48] [PASSED] yes-or-no
[16:32:48] [PASSED] yes-or-yes
[16:32:48] [PASSED] no-yes-or-yes-no
[16:32:48] [PASSED] no-yes-or-yes-yes
[16:32:48] [PASSED] yes-yes-or-no-yes
[16:32:48] [PASSED] yes-yes-or-yes-yes
[16:32:48] [PASSED] no-no-or-yes-or-no
[16:32:48] [PASSED] or
[16:32:48] [PASSED] or-yes
[16:32:48] [PASSED] or-no
[16:32:48] [PASSED] yes-or
[16:32:48] [PASSED] no-or
[16:32:48] [PASSED] no-or-or-yes
[16:32:48] [PASSED] yes-or-or-no
[16:32:48] [PASSED] no-or-or-no
[16:32:48] [PASSED] missing-context-engine-class
[16:32:48] [PASSED] missing-context-engine-class-or-yes
[16:32:48] [PASSED] missing-context-engine-class-or-or-yes
[16:32:48] =============== [PASSED] xe_rtp_rules_tests ================
[16:32:48] =============== xe_rtp_process_to_sr_tests  ================
[16:32:48] [PASSED] coalesce-same-reg
[16:32:48] [PASSED] coalesce-same-reg-literal-and-func
[16:32:48] [PASSED] no-match-no-add
[16:32:48] [PASSED] two-regs-two-entries
[16:32:48] [PASSED] clr-one-set-other
[16:32:48] [PASSED] set-field
[16:32:48] [PASSED] conflict-duplicate
[16:32:48] [PASSED] conflict-not-disjoint
[16:32:48] [PASSED] conflict-not-disjoint-literal-and-func
[16:32:48] [PASSED] conflict-reg-type
[16:32:48] [PASSED] bad-mcr-reg-forced-to-regular
[16:32:48] [PASSED] bad-regular-reg-forced-to-mcr
[16:32:48] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[16:32:48] ================== xe_rtp_process_tests  ===================
[16:32:48] [PASSED] active1
[16:32:48] [PASSED] active2
[16:32:48] [PASSED] active-inactive
[16:32:48] [PASSED] inactive-active
[16:32:48] [PASSED] inactive-active-inactive
[16:32:48] [PASSED] inactive-inactive-inactive
[16:32:48] ============== [PASSED] xe_rtp_process_tests ===============
[16:32:48] ===================== [PASSED] xe_rtp ======================
[16:32:48] ==================== xe_wa (1 subtest) =====================
[16:32:48] ======================== xe_wa_gt  =========================
[16:32:48] [PASSED] TIGERLAKE B0
[16:32:48] [PASSED] DG1 A0
[16:32:48] [PASSED] DG1 B0
[16:32:48] [PASSED] ALDERLAKE_S A0
[16:32:48] [PASSED] ALDERLAKE_S B0
[16:32:48] [PASSED] ALDERLAKE_S C0
[16:32:48] [PASSED] ALDERLAKE_S D0
[16:32:48] [PASSED] ALDERLAKE_P A0
[16:32:48] [PASSED] ALDERLAKE_P B0
[16:32:48] [PASSED] ALDERLAKE_P C0
[16:32:48] [PASSED] ALDERLAKE_S RPLS D0
[16:32:48] [PASSED] ALDERLAKE_P RPLU E0
[16:32:48] [PASSED] DG2 G10 C0
[16:32:48] [PASSED] DG2 G11 B1
[16:32:48] [PASSED] DG2 G12 A1
[16:32:48] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:32:48] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:32:48] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[16:32:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[16:32:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[16:32:48] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[16:32:48] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[16:32:48] ==================== [PASSED] xe_wa_gt =====================
[16:32:48] ====================== [PASSED] xe_wa ======================
[16:32:48] ============================================================
[16:32:48] Testing complete. Ran 842 tests: passed: 814, skipped: 28
[16:32:48] Elapsed time: 41.889s total, 1.873s configuring, 39.250s building, 0.726s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[16:32:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:32:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:33:15] Starting KUnit Kernel (1/1)...
[16:33:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:33:15] ============ drm_test_pick_cmdline (2 subtests) ============
[16:33:15] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[16:33:15] =============== drm_test_pick_cmdline_named  ===============
[16:33:15] [PASSED] NTSC
[16:33:15] [PASSED] NTSC-J
[16:33:15] [PASSED] PAL
[16:33:15] [PASSED] PAL-M
[16:33:15] =========== [PASSED] drm_test_pick_cmdline_named ===========
[16:33:15] ============== [PASSED] drm_test_pick_cmdline ==============
[16:33:15] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[16:33:15] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[16:33:15] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[16:33:15] =========== drm_validate_clone_mode (2 subtests) ===========
[16:33:15] ============== drm_test_check_in_clone_mode  ===============
[16:33:15] [PASSED] in_clone_mode
[16:33:15] [PASSED] not_in_clone_mode
[16:33:15] ========== [PASSED] drm_test_check_in_clone_mode ===========
[16:33:15] =============== drm_test_check_valid_clones  ===============
[16:33:15] [PASSED] not_in_clone_mode
[16:33:15] [PASSED] valid_clone
[16:33:15] [PASSED] invalid_clone
[16:33:15] =========== [PASSED] drm_test_check_valid_clones ===========
[16:33:15] ============= [PASSED] drm_validate_clone_mode =============
[16:33:15] ============= drm_validate_modeset (1 subtest) =============
[16:33:15] [PASSED] drm_test_check_connector_changed_modeset
[16:33:15] ============== [PASSED] drm_validate_modeset ===============
[16:33:15] ====== drm_test_bridge_get_current_state (1 subtest) =======
[16:33:15] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[16:33:15] ======== [PASSED] drm_test_bridge_get_current_state ========
[16:33:15] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[16:33:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[16:33:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[16:33:15] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[16:33:15] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[16:33:15] ============== drm_bridge_alloc (2 subtests) ===============
[16:33:15] [PASSED] drm_test_drm_bridge_alloc_basic
[16:33:15] [PASSED] drm_test_drm_bridge_alloc_get_put
[16:33:15] ================ [PASSED] drm_bridge_alloc =================
[16:33:15] ============= drm_bridge_bus_fmt (5 subtests) ==============
[16:33:15] [PASSED] drm_test_bridge_rgb_yuv_rgb
[16:33:15] [PASSED] drm_test_bridge_must_convert_to_yuv444
[16:33:15] [PASSED] drm_test_bridge_hdmi_auto_rgb
[16:33:15] [PASSED] drm_test_bridge_auto_first
[16:33:15] [PASSED] drm_test_bridge_rgb_yuv_no_path
[16:33:15] =============== [PASSED] drm_bridge_bus_fmt ================
[16:33:15] ============= drm_cmdline_parser (40 subtests) =============
[16:33:15] [PASSED] drm_test_cmdline_force_d_only
[16:33:15] [PASSED] drm_test_cmdline_force_D_only_dvi
[16:33:15] [PASSED] drm_test_cmdline_force_D_only_hdmi
[16:33:15] [PASSED] drm_test_cmdline_force_D_only_not_digital
[16:33:15] [PASSED] drm_test_cmdline_force_e_only
[16:33:15] [PASSED] drm_test_cmdline_res
[16:33:15] [PASSED] drm_test_cmdline_res_vesa
[16:33:15] [PASSED] drm_test_cmdline_res_vesa_rblank
[16:33:15] [PASSED] drm_test_cmdline_res_rblank
[16:33:15] [PASSED] drm_test_cmdline_res_bpp
[16:33:15] [PASSED] drm_test_cmdline_res_refresh
[16:33:15] [PASSED] drm_test_cmdline_res_bpp_refresh
[16:33:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[16:33:15] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[16:33:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[16:33:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[16:33:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[16:33:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[16:33:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[16:33:15] [PASSED] drm_test_cmdline_res_margins_force_on
[16:33:15] [PASSED] drm_test_cmdline_res_vesa_margins
[16:33:15] [PASSED] drm_test_cmdline_name
[16:33:15] [PASSED] drm_test_cmdline_name_bpp
[16:33:15] [PASSED] drm_test_cmdline_name_option
[16:33:15] [PASSED] drm_test_cmdline_name_bpp_option
[16:33:15] [PASSED] drm_test_cmdline_rotate_0
[16:33:15] [PASSED] drm_test_cmdline_rotate_90
[16:33:15] [PASSED] drm_test_cmdline_rotate_180
[16:33:15] [PASSED] drm_test_cmdline_rotate_270
[16:33:15] [PASSED] drm_test_cmdline_hmirror
[16:33:15] [PASSED] drm_test_cmdline_vmirror
[16:33:15] [PASSED] drm_test_cmdline_margin_options
[16:33:15] [PASSED] drm_test_cmdline_multiple_options
[16:33:15] [PASSED] drm_test_cmdline_bpp_extra_and_option
[16:33:15] [PASSED] drm_test_cmdline_extra_and_option
[16:33:15] [PASSED] drm_test_cmdline_freestanding_options
[16:33:15] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[16:33:15] [PASSED] drm_test_cmdline_panel_orientation
[16:33:15] ================ drm_test_cmdline_invalid  =================
[16:33:15] [PASSED] margin_only
[16:33:15] [PASSED] interlace_only
[16:33:15] [PASSED] res_missing_x
[16:33:15] [PASSED] res_missing_y
[16:33:15] [PASSED] res_bad_y
[16:33:15] [PASSED] res_missing_y_bpp
[16:33:15] [PASSED] res_bad_bpp
[16:33:15] [PASSED] res_bad_refresh
[16:33:15] [PASSED] res_bpp_refresh_force_on_off
[16:33:15] [PASSED] res_invalid_mode
[16:33:15] [PASSED] res_bpp_wrong_place_mode
[16:33:15] [PASSED] name_bpp_refresh
[16:33:15] [PASSED] name_refresh
[16:33:15] [PASSED] name_refresh_wrong_mode
[16:33:15] [PASSED] name_refresh_invalid_mode
[16:33:15] [PASSED] rotate_multiple
[16:33:15] [PASSED] rotate_invalid_val
[16:33:15] [PASSED] rotate_truncated
[16:33:15] [PASSED] invalid_option
[16:33:15] [PASSED] invalid_tv_option
[16:33:15] [PASSED] truncated_tv_option
[16:33:15] ============ [PASSED] drm_test_cmdline_invalid =============
[16:33:15] =============== drm_test_cmdline_tv_options  ===============
[16:33:15] [PASSED] NTSC
[16:33:15] [PASSED] NTSC_443
[16:33:15] [PASSED] NTSC_J
[16:33:15] [PASSED] PAL
[16:33:15] [PASSED] PAL_M
[16:33:15] [PASSED] PAL_N
[16:33:15] [PASSED] SECAM
[16:33:15] [PASSED] MONO_525
[16:33:15] [PASSED] MONO_625
[16:33:15] =========== [PASSED] drm_test_cmdline_tv_options ===========
[16:33:15] =============== [PASSED] drm_cmdline_parser ================
[16:33:15] ========== drmm_connector_hdmi_init (20 subtests) ==========
[16:33:15] [PASSED] drm_test_connector_hdmi_init_valid
[16:33:15] [PASSED] drm_test_connector_hdmi_init_bpc_8
[16:33:15] [PASSED] drm_test_connector_hdmi_init_bpc_10
[16:33:15] [PASSED] drm_test_connector_hdmi_init_bpc_12
[16:33:15] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[16:33:15] [PASSED] drm_test_connector_hdmi_init_bpc_null
[16:33:15] [PASSED] drm_test_connector_hdmi_init_formats_empty
[16:33:15] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[16:33:15] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[16:33:15] [PASSED] supported_formats=0x9 yuv420_allowed=1
[16:33:15] [PASSED] supported_formats=0x9 yuv420_allowed=0
[16:33:15] [PASSED] supported_formats=0x5 yuv420_allowed=1
[16:33:15] [PASSED] supported_formats=0x5 yuv420_allowed=0
[16:33:15] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:33:15] [PASSED] drm_test_connector_hdmi_init_null_ddc
[16:33:15] [PASSED] drm_test_connector_hdmi_init_null_product
[16:33:15] [PASSED] drm_test_connector_hdmi_init_null_vendor
[16:33:15] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[16:33:15] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[16:33:15] [PASSED] drm_test_connector_hdmi_init_product_valid
[16:33:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[16:33:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[16:33:15] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[16:33:15] ========= drm_test_connector_hdmi_init_type_valid  =========
[16:33:15] [PASSED] HDMI-A
[16:33:15] [PASSED] HDMI-B
[16:33:15] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[16:33:15] ======== drm_test_connector_hdmi_init_type_invalid  ========
[16:33:15] [PASSED] Unknown
[16:33:15] [PASSED] VGA
[16:33:15] [PASSED] DVI-I
[16:33:15] [PASSED] DVI-D
[16:33:15] [PASSED] DVI-A
[16:33:15] [PASSED] Composite
[16:33:15] [PASSED] SVIDEO
[16:33:15] [PASSED] LVDS
[16:33:15] [PASSED] Component
[16:33:15] [PASSED] DIN
[16:33:15] [PASSED] DP
[16:33:15] [PASSED] TV
[16:33:15] [PASSED] eDP
[16:33:15] [PASSED] Virtual
[16:33:15] [PASSED] DSI
[16:33:15] [PASSED] DPI
[16:33:15] [PASSED] Writeback
[16:33:15] [PASSED] SPI
[16:33:15] [PASSED] USB
[16:33:15] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[16:33:15] ============ [PASSED] drmm_connector_hdmi_init =============
[16:33:15] ============= drmm_connector_init (3 subtests) =============
[16:33:15] [PASSED] drm_test_drmm_connector_init
[16:33:15] [PASSED] drm_test_drmm_connector_init_null_ddc
[16:33:15] ========= drm_test_drmm_connector_init_type_valid  =========
[16:33:15] [PASSED] Unknown
[16:33:15] [PASSED] VGA
[16:33:15] [PASSED] DVI-I
[16:33:15] [PASSED] DVI-D
[16:33:15] [PASSED] DVI-A
[16:33:15] [PASSED] Composite
[16:33:15] [PASSED] SVIDEO
[16:33:15] [PASSED] LVDS
[16:33:15] [PASSED] Component
[16:33:15] [PASSED] DIN
[16:33:15] [PASSED] DP
[16:33:15] [PASSED] HDMI-A
[16:33:15] [PASSED] HDMI-B
[16:33:15] [PASSED] TV
[16:33:15] [PASSED] eDP
[16:33:15] [PASSED] Virtual
[16:33:15] [PASSED] DSI
[16:33:15] [PASSED] DPI
[16:33:15] [PASSED] Writeback
[16:33:15] [PASSED] SPI
[16:33:15] [PASSED] USB
[16:33:15] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[16:33:15] =============== [PASSED] drmm_connector_init ===============
[16:33:15] ========= drm_connector_dynamic_init (6 subtests) ==========
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_init
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_init_properties
[16:33:15] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[16:33:15] [PASSED] Unknown
[16:33:15] [PASSED] VGA
[16:33:15] [PASSED] DVI-I
[16:33:15] [PASSED] DVI-D
[16:33:15] [PASSED] DVI-A
[16:33:15] [PASSED] Composite
[16:33:15] [PASSED] SVIDEO
[16:33:15] [PASSED] LVDS
[16:33:15] [PASSED] Component
[16:33:15] [PASSED] DIN
[16:33:15] [PASSED] DP
[16:33:15] [PASSED] HDMI-A
[16:33:15] [PASSED] HDMI-B
[16:33:15] [PASSED] TV
[16:33:15] [PASSED] eDP
[16:33:15] [PASSED] Virtual
[16:33:15] [PASSED] DSI
[16:33:15] [PASSED] DPI
[16:33:15] [PASSED] Writeback
[16:33:15] [PASSED] SPI
[16:33:15] [PASSED] USB
[16:33:15] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[16:33:15] ======== drm_test_drm_connector_dynamic_init_name  =========
[16:33:15] [PASSED] Unknown
[16:33:15] [PASSED] VGA
[16:33:15] [PASSED] DVI-I
[16:33:15] [PASSED] DVI-D
[16:33:15] [PASSED] DVI-A
[16:33:15] [PASSED] Composite
[16:33:15] [PASSED] SVIDEO
[16:33:15] [PASSED] LVDS
[16:33:15] [PASSED] Component
[16:33:15] [PASSED] DIN
[16:33:15] [PASSED] DP
[16:33:15] [PASSED] HDMI-A
[16:33:15] [PASSED] HDMI-B
[16:33:15] [PASSED] TV
[16:33:15] [PASSED] eDP
[16:33:15] [PASSED] Virtual
[16:33:15] [PASSED] DSI
[16:33:15] [PASSED] DPI
[16:33:15] [PASSED] Writeback
[16:33:15] [PASSED] SPI
[16:33:15] [PASSED] USB
[16:33:15] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[16:33:15] =========== [PASSED] drm_connector_dynamic_init ============
[16:33:15] ==== drm_connector_dynamic_register_early (4 subtests) =====
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[16:33:15] ====== [PASSED] drm_connector_dynamic_register_early =======
[16:33:15] ======= drm_connector_dynamic_register (7 subtests) ========
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[16:33:15] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[16:33:15] ========= [PASSED] drm_connector_dynamic_register ==========
[16:33:15] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[16:33:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[16:33:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[16:33:15] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[16:33:15] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[16:33:15] ========== drm_test_get_tv_mode_from_name_valid  ===========
[16:33:15] [PASSED] NTSC
[16:33:15] [PASSED] NTSC-443
[16:33:15] [PASSED] NTSC-J
[16:33:15] [PASSED] PAL
[16:33:15] [PASSED] PAL-M
[16:33:15] [PASSED] PAL-N
[16:33:15] [PASSED] SECAM
[16:33:15] [PASSED] Mono
[16:33:15] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[16:33:15] [PASSED] drm_test_get_tv_mode_from_name_truncated
[16:33:15] ============ [PASSED] drm_get_tv_mode_from_name ============
[16:33:15] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[16:33:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[16:33:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[16:33:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[16:33:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[16:33:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[16:33:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[16:33:15] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[16:33:15] [PASSED] VIC 96
[16:33:15] [PASSED] VIC 97
[16:33:15] [PASSED] VIC 101
[16:33:15] [PASSED] VIC 102
[16:33:15] [PASSED] VIC 106
[16:33:15] [PASSED] VIC 107
[16:33:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[16:33:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[16:33:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[16:33:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[16:33:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[16:33:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[16:33:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[16:33:15] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[16:33:15] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[16:33:15] [PASSED] Automatic
[16:33:15] [PASSED] Full
[16:33:15] [PASSED] Limited 16:235
[16:33:15] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[16:33:15] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[16:33:15] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[16:33:15] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[16:33:15] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[16:33:15] [PASSED] RGB
[16:33:15] [PASSED] YUV 4:2:0
[16:33:15] [PASSED] YUV 4:2:2
[16:33:15] [PASSED] YUV 4:4:4
[16:33:15] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[16:33:15] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[16:33:15] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[16:33:15] ============= drm_damage_helper (21 subtests) ==============
[16:33:15] [PASSED] drm_test_damage_iter_no_damage
[16:33:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[16:33:15] [PASSED] drm_test_damage_iter_no_damage_src_moved
[16:33:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[16:33:15] [PASSED] drm_test_damage_iter_no_damage_not_visible
[16:33:15] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[16:33:15] [PASSED] drm_test_damage_iter_no_damage_no_fb
[16:33:15] [PASSED] drm_test_damage_iter_simple_damage
[16:33:15] [PASSED] drm_test_damage_iter_single_damage
[16:33:15] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[16:33:15] [PASSED] drm_test_damage_iter_single_damage_outside_src
[16:33:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[16:33:15] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[16:33:15] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[16:33:15] [PASSED] drm_test_damage_iter_single_damage_src_moved
[16:33:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[16:33:15] [PASSED] drm_test_damage_iter_damage
[16:33:15] [PASSED] drm_test_damage_iter_damage_one_intersect
[16:33:15] [PASSED] drm_test_damage_iter_damage_one_outside
[16:33:15] [PASSED] drm_test_damage_iter_damage_src_moved
[16:33:15] [PASSED] drm_test_damage_iter_damage_not_visible
[16:33:15] ================ [PASSED] drm_damage_helper ================
[16:33:15] ============== drm_dp_mst_helper (3 subtests) ==============
[16:33:15] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[16:33:15] [PASSED] Clock 154000 BPP 30 DSC disabled
[16:33:15] [PASSED] Clock 234000 BPP 30 DSC disabled
[16:33:15] [PASSED] Clock 297000 BPP 24 DSC disabled
[16:33:15] [PASSED] Clock 332880 BPP 24 DSC enabled
[16:33:15] [PASSED] Clock 324540 BPP 24 DSC enabled
[16:33:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[16:33:15] ============== drm_test_dp_mst_calc_pbn_div  ===============
[16:33:15] [PASSED] Link rate 2000000 lane count 4
[16:33:15] [PASSED] Link rate 2000000 lane count 2
[16:33:15] [PASSED] Link rate 2000000 lane count 1
[16:33:15] [PASSED] Link rate 1350000 lane count 4
[16:33:15] [PASSED] Link rate 1350000 lane count 2
[16:33:15] [PASSED] Link rate 1350000 lane count 1
[16:33:15] [PASSED] Link rate 1000000 lane count 4
[16:33:15] [PASSED] Link rate 1000000 lane count 2
[16:33:15] [PASSED] Link rate 1000000 lane count 1
[16:33:15] [PASSED] Link rate 810000 lane count 4
[16:33:15] [PASSED] Link rate 810000 lane count 2
[16:33:15] [PASSED] Link rate 810000 lane count 1
[16:33:15] [PASSED] Link rate 540000 lane count 4
[16:33:15] [PASSED] Link rate 540000 lane count 2
[16:33:15] [PASSED] Link rate 540000 lane count 1
[16:33:15] [PASSED] Link rate 270000 lane count 4
[16:33:15] [PASSED] Link rate 270000 lane count 2
[16:33:15] [PASSED] Link rate 270000 lane count 1
[16:33:15] [PASSED] Link rate 162000 lane count 4
[16:33:15] [PASSED] Link rate 162000 lane count 2
[16:33:15] [PASSED] Link rate 162000 lane count 1
[16:33:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[16:33:15] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[16:33:15] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[16:33:15] [PASSED] DP_POWER_UP_PHY with port number
[16:33:15] [PASSED] DP_POWER_DOWN_PHY with port number
[16:33:15] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[16:33:15] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[16:33:15] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[16:33:15] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[16:33:15] [PASSED] DP_QUERY_PAYLOAD with port number
[16:33:15] [PASSED] DP_QUERY_PAYLOAD with VCPI
[16:33:15] [PASSED] DP_REMOTE_DPCD_READ with port number
[16:33:15] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[16:33:15] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[16:33:15] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[16:33:15] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[16:33:15] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[16:33:15] [PASSED] DP_REMOTE_I2C_READ with port number
[16:33:15] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[16:33:15] [PASSED] DP_REMOTE_I2C_READ with transactions array
[16:33:15] [PASSED] DP_REMOTE_I2C_WRITE with port number
[16:33:15] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[16:33:15] [PASSED] DP_REMOTE_I2C_WRITE with data array
[16:33:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[16:33:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[16:33:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[16:33:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[16:33:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[16:33:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[16:33:15] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[16:33:15] ================ [PASSED] drm_dp_mst_helper ================
[16:33:15] ================== drm_exec (7 subtests) ===================
[16:33:15] [PASSED] sanitycheck
[16:33:15] [PASSED] test_lock
[16:33:15] [PASSED] test_lock_unlock
[16:33:15] [PASSED] test_duplicates
[16:33:15] [PASSED] test_prepare
[16:33:15] [PASSED] test_prepare_array
[16:33:15] [PASSED] test_multiple_loops
[16:33:15] ==================== [PASSED] drm_exec =====================
[16:33:15] =========== drm_format_helper_test (17 subtests) ===========
[16:33:15] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[16:33:15] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[16:33:15] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[16:33:15] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[16:33:15] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[16:33:15] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[16:33:15] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[16:33:15] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[16:33:15] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[16:33:15] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[16:33:15] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[16:33:15] ============== drm_test_fb_xrgb8888_to_mono  ===============
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[16:33:15] ==================== drm_test_fb_swab  =====================
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ================ [PASSED] drm_test_fb_swab =================
[16:33:15] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[16:33:15] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[16:33:15] [PASSED] single_pixel_source_buffer
[16:33:15] [PASSED] single_pixel_clip_rectangle
[16:33:15] [PASSED] well_known_colors
[16:33:15] [PASSED] destination_pitch
[16:33:15] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[16:33:15] ================= drm_test_fb_clip_offset  =================
[16:33:15] [PASSED] pass through
[16:33:15] [PASSED] horizontal offset
[16:33:15] [PASSED] vertical offset
[16:33:15] [PASSED] horizontal and vertical offset
[16:33:15] [PASSED] horizontal offset (custom pitch)
[16:33:15] [PASSED] vertical offset (custom pitch)
[16:33:15] [PASSED] horizontal and vertical offset (custom pitch)
[16:33:15] ============= [PASSED] drm_test_fb_clip_offset =============
[16:33:15] =================== drm_test_fb_memcpy  ====================
[16:33:15] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[16:33:15] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[16:33:15] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[16:33:15] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[16:33:15] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[16:33:15] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[16:33:15] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[16:33:15] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[16:33:15] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[16:33:15] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[16:33:15] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[16:33:15] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[16:33:15] =============== [PASSED] drm_test_fb_memcpy ================
[16:33:15] ============= [PASSED] drm_format_helper_test ==============
[16:33:15] ================= drm_format (18 subtests) =================
[16:33:15] [PASSED] drm_test_format_block_width_invalid
[16:33:15] [PASSED] drm_test_format_block_width_one_plane
[16:33:15] [PASSED] drm_test_format_block_width_two_plane
[16:33:15] [PASSED] drm_test_format_block_width_three_plane
[16:33:15] [PASSED] drm_test_format_block_width_tiled
[16:33:15] [PASSED] drm_test_format_block_height_invalid
[16:33:15] [PASSED] drm_test_format_block_height_one_plane
[16:33:15] [PASSED] drm_test_format_block_height_two_plane
[16:33:15] [PASSED] drm_test_format_block_height_three_plane
[16:33:15] [PASSED] drm_test_format_block_height_tiled
[16:33:15] [PASSED] drm_test_format_min_pitch_invalid
[16:33:15] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[16:33:15] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[16:33:15] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[16:33:15] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[16:33:15] [PASSED] drm_test_format_min_pitch_two_plane
[16:33:15] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[16:33:15] [PASSED] drm_test_format_min_pitch_tiled
[16:33:15] =================== [PASSED] drm_format ====================
[16:33:15] ============== drm_framebuffer (10 subtests) ===============
[16:33:15] ========== drm_test_framebuffer_check_src_coords  ==========
[16:33:15] [PASSED] Success: source fits into fb
[16:33:15] [PASSED] Fail: overflowing fb with x-axis coordinate
[16:33:15] [PASSED] Fail: overflowing fb with y-axis coordinate
[16:33:15] [PASSED] Fail: overflowing fb with source width
[16:33:15] [PASSED] Fail: overflowing fb with source height
[16:33:15] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[16:33:15] [PASSED] drm_test_framebuffer_cleanup
[16:33:15] =============== drm_test_framebuffer_create  ===============
[16:33:15] [PASSED] ABGR8888 normal sizes
[16:33:15] [PASSED] ABGR8888 max sizes
[16:33:15] [PASSED] ABGR8888 pitch greater than min required
[16:33:15] [PASSED] ABGR8888 pitch less than min required
[16:33:15] [PASSED] ABGR8888 Invalid width
[16:33:15] [PASSED] ABGR8888 Invalid buffer handle
[16:33:15] [PASSED] No pixel format
[16:33:15] [PASSED] ABGR8888 Width 0
[16:33:15] [PASSED] ABGR8888 Height 0
[16:33:15] [PASSED] ABGR8888 Out of bound height * pitch combination
[16:33:15] [PASSED] ABGR8888 Large buffer offset
[16:33:15] [PASSED] ABGR8888 Buffer offset for inexistent plane
[16:33:15] [PASSED] ABGR8888 Invalid flag
[16:33:15] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[16:33:15] [PASSED] ABGR8888 Valid buffer modifier
[16:33:15] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[16:33:15] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[16:33:15] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[16:33:15] [PASSED] NV12 Normal sizes
[16:33:15] [PASSED] NV12 Max sizes
[16:33:15] [PASSED] NV12 Invalid pitch
[16:33:15] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[16:33:15] [PASSED] NV12 different  modifier per-plane
[16:33:15] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[16:33:15] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[16:33:15] [PASSED] NV12 Modifier for inexistent plane
[16:33:15] [PASSED] NV12 Handle for inexistent plane
[16:33:15] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[16:33:15] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[16:33:15] [PASSED] YVU420 Normal sizes
[16:33:15] [PASSED] YVU420 Max sizes
[16:33:15] [PASSED] YVU420 Invalid pitch
[16:33:15] [PASSED] YVU420 Different pitches
[16:33:15] [PASSED] YVU420 Different buffer offsets/pitches
[16:33:15] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[16:33:15] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[16:33:15] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[16:33:15] [PASSED] YVU420 Valid modifier
[16:33:15] [PASSED] YVU420 Different modifiers per plane
[16:33:15] [PASSED] YVU420 Modifier for inexistent plane
[16:33:15] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[16:33:15] [PASSED] X0L2 Normal sizes
[16:33:15] [PASSED] X0L2 Max sizes
[16:33:15] [PASSED] X0L2 Invalid pitch
[16:33:15] [PASSED] X0L2 Pitch greater than minimum required
[16:33:15] [PASSED] X0L2 Handle for inexistent plane
[16:33:15] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[16:33:15] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[16:33:15] [PASSED] X0L2 Valid modifier
[16:33:15] [PASSED] X0L2 Modifier for inexistent plane
[16:33:15] =========== [PASSED] drm_test_framebuffer_create ===========
[16:33:15] [PASSED] drm_test_framebuffer_free
[16:33:15] [PASSED] drm_test_framebuffer_init
[16:33:15] [PASSED] drm_test_framebuffer_init_bad_format
[16:33:15] [PASSED] drm_test_framebuffer_init_dev_mismatch
[16:33:15] [PASSED] drm_test_framebuffer_lookup
[16:33:15] [PASSED] drm_test_framebuffer_lookup_inexistent
[16:33:15] [PASSED] drm_test_framebuffer_modifiers_not_supported
[16:33:15] ================= [PASSED] drm_framebuffer =================
[16:33:15] ================ drm_gem_shmem (8 subtests) ================
[16:33:15] [PASSED] drm_gem_shmem_test_obj_create
[16:33:15] [PASSED] drm_gem_shmem_test_obj_create_private
[16:33:15] [PASSED] drm_gem_shmem_test_pin_pages
[16:33:15] [PASSED] drm_gem_shmem_test_vmap
[16:33:15] [PASSED] drm_gem_shmem_test_get_sg_table
[16:33:15] [PASSED] drm_gem_shmem_test_get_pages_sgt
[16:33:15] [PASSED] drm_gem_shmem_test_madvise
[16:33:15] [PASSED] drm_gem_shmem_test_purge
[16:33:15] ================== [PASSED] drm_gem_shmem ==================
[16:33:15] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[16:33:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[16:33:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[16:33:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[16:33:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[16:33:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[16:33:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[16:33:15] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[16:33:15] [PASSED] Automatic
[16:33:15] [PASSED] Full
[16:33:15] [PASSED] Limited 16:235
[16:33:15] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[16:33:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[16:33:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[16:33:15] [PASSED] drm_test_check_disable_connector
[16:33:15] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[16:33:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[16:33:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[16:33:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[16:33:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[16:33:15] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[16:33:15] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[16:33:15] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[16:33:15] [PASSED] drm_test_check_output_bpc_dvi
[16:33:15] [PASSED] drm_test_check_output_bpc_format_vic_1
[16:33:15] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[16:33:15] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[16:33:15] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[16:33:15] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[16:33:15] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[16:33:15] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[16:33:15] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[16:33:15] ============ drm_test_check_hdmi_color_format  =============
[16:33:15] [PASSED] AUTO -> RGB
[16:33:15] [PASSED] YCBCR422 -> YUV422
[16:33:15] [PASSED] YCBCR420 -> YUV420
[16:33:15] [PASSED] YCBCR444 -> YUV444
[16:33:15] [PASSED] RGB -> RGB
[16:33:15] ======== [PASSED] drm_test_check_hdmi_color_format =========
[16:33:15] ======== drm_test_check_hdmi_color_format_420_only  ========
[16:33:15] [PASSED] RGB should fail
[16:33:15] [PASSED] YUV444 should fail
[16:33:15] [PASSED] YUV422 should fail
[16:33:15] [PASSED] YUV420 should work
[16:33:15] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[16:33:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[16:33:15] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[16:33:15] [PASSED] drm_test_check_broadcast_rgb_value
[16:33:15] [PASSED] drm_test_check_bpc_8_value
[16:33:15] [PASSED] drm_test_check_bpc_10_value
[16:33:15] [PASSED] drm_test_check_bpc_12_value
[16:33:15] [PASSED] drm_test_check_format_value
[16:33:15] [PASSED] drm_test_check_tmds_char_value
[16:33:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[16:33:15] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[16:33:15] [PASSED] drm_test_check_mode_valid
[16:33:15] [PASSED] drm_test_check_mode_valid_reject
[16:33:15] [PASSED] drm_test_check_mode_valid_reject_rate
[16:33:15] [PASSED] drm_test_check_mode_valid_reject_max_clock
[16:33:15] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[16:33:15] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[16:33:15] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[16:33:15] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[16:33:15] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[16:33:15] [PASSED] drm_test_check_infoframes
[16:33:15] [PASSED] drm_test_check_reject_avi_infoframe
[16:33:15] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[16:33:15] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[16:33:15] [PASSED] drm_test_check_reject_audio_infoframe
[16:33:15] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[16:33:15] ================= drm_managed (2 subtests) =================
[16:33:15] [PASSED] drm_test_managed_release_action
[16:33:15] [PASSED] drm_test_managed_run_action
[16:33:15] =================== [PASSED] drm_managed ===================
[16:33:15] =================== drm_mm (6 subtests) ====================
[16:33:15] [PASSED] drm_test_mm_init
[16:33:15] [PASSED] drm_test_mm_debug
[16:33:15] [PASSED] drm_test_mm_align32
[16:33:15] [PASSED] drm_test_mm_align64
[16:33:15] [PASSED] drm_test_mm_lowest
[16:33:15] [PASSED] drm_test_mm_highest
[16:33:15] ===================== [PASSED] drm_mm ======================
[16:33:15] ============= drm_modes_analog_tv (5 subtests) =============
[16:33:15] [PASSED] drm_test_modes_analog_tv_mono_576i
[16:33:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[16:33:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[16:33:15] [PASSED] drm_test_modes_analog_tv_pal_576i
[16:33:15] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[16:33:15] =============== [PASSED] drm_modes_analog_tv ===============
[16:33:15] ============== drm_panic_helper (3 subtests) ===============
[16:33:15] ============= drm_test_panic_screen_user_map  ==============
[16:33:15] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[16:33:15] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[16:33:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[16:33:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[16:33:15] ========= [PASSED] drm_test_panic_screen_user_map ==========
[16:33:15] ============= drm_test_panic_screen_user_page  =============
[16:33:15] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[16:33:15] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[16:33:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[16:33:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[16:33:15] ========= [PASSED] drm_test_panic_screen_user_page =========
[16:33:15] ========== drm_test_panic_screen_user_set_pixel  ===========
[16:33:15] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[16:33:15] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[16:33:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[16:33:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[16:33:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[16:33:15] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[16:33:15] ================ [PASSED] drm_panic_helper =================
[16:33:15] ============== drm_plane_helper (2 subtests) ===============
[16:33:15] =============== drm_test_check_plane_state  ================
[16:33:15] [PASSED] clipping_simple
[16:33:15] [PASSED] clipping_rotate_reflect
[16:33:15] [PASSED] positioning_simple
[16:33:15] [PASSED] upscaling
[16:33:15] [PASSED] downscaling
[16:33:15] [PASSED] rounding1
[16:33:15] [PASSED] rounding2
[16:33:15] [PASSED] rounding3
[16:33:15] [PASSED] rounding4
[16:33:15] =========== [PASSED] drm_test_check_plane_state ============
[16:33:15] =========== drm_test_check_invalid_plane_state  ============
[16:33:15] [PASSED] positioning_invalid
[16:33:15] [PASSED] upscaling_invalid
[16:33:15] [PASSED] downscaling_invalid
[16:33:15] ======= [PASSED] drm_test_check_invalid_plane_state ========
[16:33:15] ================ [PASSED] drm_plane_helper =================
[16:33:15] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[16:33:15] ====== drm_test_connector_helper_tv_get_modes_check  =======
[16:33:15] [PASSED] None
[16:33:15] [PASSED] PAL
[16:33:15] [PASSED] NTSC
[16:33:15] [PASSED] Both, NTSC Default
[16:33:15] [PASSED] Both, PAL Default
[16:33:15] [PASSED] Both, NTSC Default, with PAL on command-line
[16:33:15] [PASSED] Both, PAL Default, with NTSC on command-line
[16:33:15] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[16:33:15] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[16:33:15] ================== drm_rect (9 subtests) ===================
[16:33:15] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[16:33:15] [PASSED] drm_test_rect_clip_scaled_not_clipped
[16:33:15] [PASSED] drm_test_rect_clip_scaled_clipped
[16:33:15] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[16:33:15] ================= drm_test_rect_intersect  =================
[16:33:15] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[16:33:15] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[16:33:15] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[16:33:15] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[16:33:15] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[16:33:15] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[16:33:15] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[16:33:15] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[16:33:15] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[16:33:15] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[16:33:15] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[16:33:15] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[16:33:15] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[16:33:15] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[16:33:15] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[16:33:15] ============= [PASSED] drm_test_rect_intersect =============
[16:33:15] ================ drm_test_rect_calc_hscale  ================
[16:33:15] [PASSED] normal use
[16:33:15] [PASSED] out of max range
[16:33:15] [PASSED] out of min range
[16:33:15] [PASSED] zero dst
[16:33:15] [PASSED] negative src
[16:33:15] [PASSED] negative dst
[16:33:15] ============ [PASSED] drm_test_rect_calc_hscale ============
[16:33:15] ================ drm_test_rect_calc_vscale  ================
[16:33:15] [PASSED] normal use
[16:33:15] [PASSED] out of max range
[16:33:15] [PASSED] out of min range
[16:33:15] [PASSED] zero dst
[16:33:15] [PASSED] negative src
[16:33:15] [PASSED] negative dst
[16:33:15] ============ [PASSED] drm_test_rect_calc_vscale ============
[16:33:15] ================== drm_test_rect_rotate  ===================
[16:33:15] [PASSED] reflect-x
[16:33:15] [PASSED] reflect-y
[16:33:15] [PASSED] rotate-0
[16:33:15] [PASSED] rotate-90
[16:33:15] [PASSED] rotate-180
[16:33:15] [PASSED] rotate-270
[16:33:15] ============== [PASSED] drm_test_rect_rotate ===============
[16:33:15] ================ drm_test_rect_rotate_inv  =================
[16:33:15] [PASSED] reflect-x
[16:33:15] [PASSED] reflect-y
[16:33:15] [PASSED] rotate-0
[16:33:15] [PASSED] rotate-90
[16:33:15] [PASSED] rotate-180
[16:33:15] [PASSED] rotate-270
[16:33:15] ============ [PASSED] drm_test_rect_rotate_inv =============
[16:33:15] ==================== [PASSED] drm_rect =====================
[16:33:15] ============ drm_sysfb_modeset_test (1 subtest) ============
[16:33:15] ============ drm_test_sysfb_build_fourcc_list  =============
[16:33:15] [PASSED] no native formats
[16:33:15] [PASSED] XRGB8888 as native format
[16:33:15] [PASSED] remove duplicates
[16:33:15] [PASSED] convert alpha formats
[16:33:15] [PASSED] random formats
[16:33:15] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[16:33:15] ============= [PASSED] drm_sysfb_modeset_test ==============
[16:33:15] ================== drm_fixp (2 subtests) ===================
[16:33:15] [PASSED] drm_test_int2fixp
[16:33:15] [PASSED] drm_test_sm2fixp
[16:33:15] ==================== [PASSED] drm_fixp =====================
[16:33:15] ============================================================
[16:33:15] Testing complete. Ran 667 tests: passed: 667
[16:33:15] Elapsed time: 27.417s total, 1.808s configuring, 25.190s building, 0.410s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[16:33:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:33:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:33:27] Starting KUnit Kernel (1/1)...
[16:33:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:33:28] ================= ttm_device (5 subtests) ==================
[16:33:28] [PASSED] ttm_device_init_basic
[16:33:28] [PASSED] ttm_device_init_multiple
[16:33:28] [PASSED] ttm_device_fini_basic
[16:33:28] [PASSED] ttm_device_init_no_vma_man
[16:33:28] ================== ttm_device_init_pools  ==================
[16:33:28] [PASSED] No DMA allocations, no DMA32 required
[16:33:28] [PASSED] DMA allocations, DMA32 required
[16:33:28] [PASSED] No DMA allocations, DMA32 required
[16:33:28] [PASSED] DMA allocations, no DMA32 required
[16:33:28] ============== [PASSED] ttm_device_init_pools ==============
[16:33:28] =================== [PASSED] ttm_device ====================
[16:33:28] ================== ttm_pool (8 subtests) ===================
[16:33:28] ================== ttm_pool_alloc_basic  ===================
[16:33:28] [PASSED] One page
[16:33:28] [PASSED] More than one page
[16:33:28] [PASSED] Above the allocation limit
[16:33:28] [PASSED] One page, with coherent DMA mappings enabled
[16:33:28] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:33:28] ============== [PASSED] ttm_pool_alloc_basic ===============
[16:33:28] ============== ttm_pool_alloc_basic_dma_addr  ==============
[16:33:28] [PASSED] One page
[16:33:28] [PASSED] More than one page
[16:33:28] [PASSED] Above the allocation limit
[16:33:28] [PASSED] One page, with coherent DMA mappings enabled
[16:33:28] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:33:28] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[16:33:28] [PASSED] ttm_pool_alloc_order_caching_match
[16:33:28] [PASSED] ttm_pool_alloc_caching_mismatch
[16:33:28] [PASSED] ttm_pool_alloc_order_mismatch
[16:33:28] [PASSED] ttm_pool_free_dma_alloc
[16:33:28] [PASSED] ttm_pool_free_no_dma_alloc
[16:33:28] [PASSED] ttm_pool_fini_basic
[16:33:28] ==================== [PASSED] ttm_pool =====================
[16:33:28] ================ ttm_resource (8 subtests) =================
[16:33:28] ================= ttm_resource_init_basic  =================
[16:33:28] [PASSED] Init resource in TTM_PL_SYSTEM
[16:33:28] [PASSED] Init resource in TTM_PL_VRAM
[16:33:28] [PASSED] Init resource in a private placement
[16:33:28] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[16:33:28] ============= [PASSED] ttm_resource_init_basic =============
[16:33:28] [PASSED] ttm_resource_init_pinned
[16:33:28] [PASSED] ttm_resource_fini_basic
[16:33:28] [PASSED] ttm_resource_manager_init_basic
[16:33:28] [PASSED] ttm_resource_manager_usage_basic
[16:33:28] [PASSED] ttm_resource_manager_set_used_basic
[16:33:28] [PASSED] ttm_sys_man_alloc_basic
[16:33:28] [PASSED] ttm_sys_man_free_basic
[16:33:28] ================== [PASSED] ttm_resource ===================
[16:33:28] =================== ttm_tt (15 subtests) ===================
[16:33:28] ==================== ttm_tt_init_basic  ====================
[16:33:28] [PASSED] Page-aligned size
[16:33:28] [PASSED] Extra pages requested
[16:33:28] ================ [PASSED] ttm_tt_init_basic ================
[16:33:28] [PASSED] ttm_tt_init_misaligned
[16:33:28] [PASSED] ttm_tt_fini_basic
[16:33:28] [PASSED] ttm_tt_fini_sg
[16:33:28] [PASSED] ttm_tt_fini_shmem
[16:33:28] [PASSED] ttm_tt_create_basic
[16:33:28] [PASSED] ttm_tt_create_invalid_bo_type
[16:33:28] [PASSED] ttm_tt_create_ttm_exists
[16:33:28] [PASSED] ttm_tt_create_failed
[16:33:28] [PASSED] ttm_tt_destroy_basic
[16:33:28] [PASSED] ttm_tt_populate_null_ttm
[16:33:28] [PASSED] ttm_tt_populate_populated_ttm
[16:33:28] [PASSED] ttm_tt_unpopulate_basic
[16:33:28] [PASSED] ttm_tt_unpopulate_empty_ttm
[16:33:28] [PASSED] ttm_tt_swapin_basic
[16:33:28] ===================== [PASSED] ttm_tt ======================
[16:33:28] =================== ttm_bo (14 subtests) ===================
[16:33:28] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[16:33:28] [PASSED] Cannot be interrupted and sleeps
[16:33:28] [PASSED] Cannot be interrupted, locks straight away
[16:33:28] [PASSED] Can be interrupted, sleeps
[16:33:28] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[16:33:28] [PASSED] ttm_bo_reserve_locked_no_sleep
[16:33:28] [PASSED] ttm_bo_reserve_no_wait_ticket
[16:33:28] [PASSED] ttm_bo_reserve_double_resv
[16:33:28] [PASSED] ttm_bo_reserve_interrupted
[16:33:28] [PASSED] ttm_bo_reserve_deadlock
[16:33:28] [PASSED] ttm_bo_unreserve_basic
[16:33:28] [PASSED] ttm_bo_unreserve_pinned
[16:33:28] [PASSED] ttm_bo_unreserve_bulk
[16:33:28] [PASSED] ttm_bo_fini_basic
[16:33:28] [PASSED] ttm_bo_fini_shared_resv
[16:33:28] [PASSED] ttm_bo_pin_basic
[16:33:28] [PASSED] ttm_bo_pin_unpin_resource
[16:33:28] [PASSED] ttm_bo_multiple_pin_one_unpin
[16:33:28] ===================== [PASSED] ttm_bo ======================
[16:33:28] ============== ttm_bo_validate (22 subtests) ===============
[16:33:28] ============== ttm_bo_init_reserved_sys_man  ===============
[16:33:28] [PASSED] Buffer object for userspace
[16:33:28] [PASSED] Kernel buffer object
[16:33:28] [PASSED] Shared buffer object
[16:33:28] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[16:33:28] ============== ttm_bo_init_reserved_mock_man  ==============
[16:33:28] [PASSED] Buffer object for userspace
[16:33:28] [PASSED] Kernel buffer object
[16:33:28] [PASSED] Shared buffer object
[16:33:28] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[16:33:28] [PASSED] ttm_bo_init_reserved_resv
[16:33:28] ================== ttm_bo_validate_basic  ==================
[16:33:28] [PASSED] Buffer object for userspace
[16:33:28] [PASSED] Kernel buffer object
[16:33:28] [PASSED] Shared buffer object
[16:33:28] ============== [PASSED] ttm_bo_validate_basic ==============
[16:33:28] [PASSED] ttm_bo_validate_invalid_placement
[16:33:28] ============= ttm_bo_validate_same_placement  ==============
[16:33:28] [PASSED] System manager
[16:33:28] [PASSED] VRAM manager
[16:33:28] ========= [PASSED] ttm_bo_validate_same_placement ==========
[16:33:28] [PASSED] ttm_bo_validate_failed_alloc
[16:33:28] [PASSED] ttm_bo_validate_pinned
[16:33:28] [PASSED] ttm_bo_validate_busy_placement
[16:33:28] ================ ttm_bo_validate_multihop  =================
[16:33:28] [PASSED] Buffer object for userspace
[16:33:28] [PASSED] Kernel buffer object
[16:33:28] [PASSED] Shared buffer object
[16:33:28] ============ [PASSED] ttm_bo_validate_multihop =============
[16:33:28] ========== ttm_bo_validate_no_placement_signaled  ==========
[16:33:28] [PASSED] Buffer object in system domain, no page vector
[16:33:28] [PASSED] Buffer object in system domain with an existing page vector
[16:33:28] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[16:33:28] ======== ttm_bo_validate_no_placement_not_signaled  ========
[16:33:28] [PASSED] Buffer object for userspace
[16:33:28] [PASSED] Kernel buffer object
[16:33:28] [PASSED] Shared buffer object
[16:33:28] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[16:33:28] [PASSED] ttm_bo_validate_move_fence_signaled
[16:33:28] ========= ttm_bo_validate_move_fence_not_signaled  =========
[16:33:28] [PASSED] Waits for GPU
[16:33:28] [PASSED] Tries to lock straight away
[16:33:28] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[16:33:28] [PASSED] ttm_bo_validate_swapout
[16:33:28] [PASSED] ttm_bo_validate_happy_evict
[16:33:28] [PASSED] ttm_bo_validate_all_pinned_evict
[16:33:28] [PASSED] ttm_bo_validate_allowed_only_evict
[16:33:28] [PASSED] ttm_bo_validate_deleted_evict
[16:33:28] [PASSED] ttm_bo_validate_busy_domain_evict
[16:33:28] [PASSED] ttm_bo_validate_evict_gutting
[16:33:28] [PASSED] ttm_bo_validate_recrusive_evict
[16:33:28] ================= [PASSED] ttm_bo_validate =================
[16:33:28] ============================================================
[16:33:28] Testing complete. Ran 102 tests: passed: 102
[16:33:28] Elapsed time: 12.207s total, 1.855s configuring, 10.136s building, 0.185s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[16:33:28] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:33:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:33:38] Starting KUnit Kernel (1/1)...
[16:33:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:33:38] =============== dma-buf-fence (12 subtests) ================
[16:33:38] [PASSED] test_sanitycheck
[16:33:38] [PASSED] test_signaling
[16:33:38] [PASSED] test_add_callback
[16:33:38] [PASSED] test_late_add_callback
[16:33:38] [PASSED] test_rm_callback
[16:33:38] [PASSED] test_late_rm_callback
[16:33:38] [PASSED] test_status
[16:33:38] [PASSED] test_error
[16:33:38] [PASSED] test_wait
[16:33:38] [PASSED] test_wait_timeout
[16:33:38] [PASSED] test_stub
[16:33:38] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[16:33:38] ================== [PASSED] dma-buf-fence ==================
[16:33:38] ============ dma-buf-fence-chain (11 subtests) =============
[16:33:38] [PASSED] test_sanitycheck
[16:33:38] [PASSED] test_find_seqno
[16:33:38] [PASSED] test_find_signaled
[16:33:38] [PASSED] test_find_out_of_order
[16:33:43] [PASSED] test_find_gap
[16:33:43] [PASSED] test_find_race
[16:33:43] [PASSED] test_signal_forward
[16:33:44] [PASSED] test_signal_backward
[16:33:44] [PASSED] test_wait_forward
[16:33:44] [PASSED] test_wait_backward
[16:33:44] [PASSED] test_wait_random
[16:33:44] =============== [PASSED] dma-buf-fence-chain ===============
[16:33:44] ============ dma-buf-fence-unwrap (11 subtests) ============
[16:33:44] [PASSED] test_sanitycheck
[16:33:44] [PASSED] test_unwrap_array
[16:33:44] [PASSED] test_unwrap_chain
[16:33:44] [PASSED] test_unwrap_chain_array
[16:33:44] [PASSED] test_unwrap_merge
[16:33:44] [PASSED] test_unwrap_merge_duplicate
[16:33:44] [PASSED] test_unwrap_merge_seqno
[16:33:44] [PASSED] test_unwrap_merge_order
[16:33:44] [PASSED] test_unwrap_merge_complex
[16:33:44] [PASSED] test_unwrap_merge_complex_seqno
[16:33:44] [PASSED] test_dedup_empty
[16:33:44] ============== [PASSED] dma-buf-fence-unwrap ===============
[16:33:44] ================ dma-buf-resv (5 subtests) =================
[16:33:44] [PASSED] test_sanitycheck
[16:33:44] ===================== test_signaling  ======================
[16:33:44] [PASSED] kernel
[16:33:44] [PASSED] write
[16:33:44] [PASSED] read
[16:33:44] [PASSED] bookkeep
[16:33:44] ================= [PASSED] test_signaling ==================
[16:33:44] ====================== test_for_each  ======================
[16:33:44] [PASSED] kernel
[16:33:44] [PASSED] write
[16:33:44] [PASSED] read
[16:33:44] [PASSED] bookkeep
[16:33:44] ================== [PASSED] test_for_each ==================
[16:33:44] ================= test_for_each_unlocked  ==================
[16:33:44] [PASSED] kernel
[16:33:44] [PASSED] write
[16:33:44] [PASSED] read
[16:33:44] [PASSED] bookkeep
[16:33:44] ============= [PASSED] test_for_each_unlocked ==============
[16:33:44] ===================== test_get_fences  =====================
[16:33:44] [PASSED] kernel
[16:33:44] [PASSED] write
[16:33:44] [PASSED] read
[16:33:44] [PASSED] bookkeep
[16:33:44] ================= [PASSED] test_get_fences =================
[16:33:44] ================== [PASSED] dma-buf-resv ===================
[16:33:44] ============================================================
[16:33:44] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[16:33:44] Elapsed time: 15.795s total, 1.889s configuring, 8.634s building, 5.260s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe/cper: Software (driver-detected) CPER error reporting

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 883 bytes --]

== Series Details ==

Series: drm/xe/cper: Software (driver-detected) CPER error reporting
URL   : https://patchwork.freedesktop.org/series/176576/
State : success

== Summary ==

CI Bug Log - changes from xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569_BAT -> xe-pw-176576v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (15 -> 15)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569 -> xe-pw-176576v1

  IGT_9156: 9156
  xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569: 0be91e56eb2afd32a5793865231161cfb3b12569
  xe-pw-176576v1: 176576v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/index.html

[-- Attachment #2: Type: text/html, Size: 1431 bytes --]

✗ Xe.CI.FULL: failure for drm/xe/cper: Software (driver-detected) CPER error reporting

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 42942 bytes --]

== Series Details ==

Series: drm/xe/cper: Software (driver-detected) CPER error reporting
URL   : https://patchwork.freedesktop.org/series/176576/
State : failure

== Summary ==

CI Bug Log - changes from xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569_FULL -> xe-pw-176576v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-176576v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-176576v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (3 -> 3)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-176576v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_plane_cursor@viewport:
    - shard-bmg:          [PASS][1] -> [ABORT][2] +3 other tests abort
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-bmg-3/igt@kms_plane_cursor@viewport.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-5/igt@kms_plane_cursor@viewport.html

  * igt@kms_plane_cursor@viewport@pipe-c-dp-2-size-256:
    - shard-bmg:          [PASS][3] -> [DMESG-FAIL][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-bmg-3/igt@kms_plane_cursor@viewport@pipe-c-dp-2-size-256.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-5/igt@kms_plane_cursor@viewport@pipe-c-dp-2-size-256.html

  
Known issues
------------

  Here are the changes found in xe-pw-176576v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-bmg:          [PASS][5] -> [FAIL][6] ([Intel XE#3718] / [Intel XE#6078])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2:
    - shard-bmg:          [PASS][7] -> [FAIL][8] ([Intel XE#6078])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html

  * igt@kms_async_flips@async-flip-suspend-resume@pipe-b-dp-2:
    - shard-bmg:          [PASS][9] -> [ABORT][10] ([Intel XE#9405] / [Intel XE#9422]) +1 other test abort
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-bmg-8/igt@kms_async_flips@async-flip-suspend-resume@pipe-b-dp-2.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-5/igt@kms_async_flips@async-flip-suspend-resume@pipe-b-dp-2.html

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-ptl:          NOTRUN -> [SKIP][11] ([Intel XE#5947])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_atomic_transition@plane-all-modeset-transition.html

  * igt@kms_big_fb@linear-16bpp-rotate-270:
    - shard-ptl:          NOTRUN -> [SKIP][12] ([Intel XE#5901])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_big_fb@linear-16bpp-rotate-270.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#7059] / [Intel XE#7085])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-ptl:          NOTRUN -> [SKIP][14] ([Intel XE#5808]) +3 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#1124]) +2 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#1124])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-target-3840x2160p:
    - shard-ptl:          NOTRUN -> [SKIP][17] ([Intel XE#7679])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_bw@connected-linear-tiling-2-displays-target-3840x2160p.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2887]) +2 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-1:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2652]) +7 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-7/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-ptl:          NOTRUN -> [SKIP][20] ([Intel XE#5822]) +2 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs@pipe-d-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][21] ([Intel XE#5823] / [Intel XE#6918]) +4 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs@pipe-d-edp-1.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-ptl:          NOTRUN -> [SKIP][22] ([Intel XE#7008])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_cdclk@plane-scaling@pipe-b-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][23] ([Intel XE#9219]) +4 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_cdclk@plane-scaling@pipe-b-edp-1.html

  * igt@kms_chamelium_color@ctm-red-to-blue:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2325] / [Intel XE#7358])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_chamelium_color@ctm-red-to-blue.html

  * igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim:
    - shard-ptl:          NOTRUN -> [SKIP][25] ([Intel XE#8391])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim.html

  * igt@kms_chamelium_frames@hdmi-frame-dump:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2252])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_chamelium_frames@hdmi-frame-dump.html

  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
    - shard-ptl:          NOTRUN -> [SKIP][27] ([Intel XE#2252])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_chamelium_hpd@common-hpd-after-suspend.html

  * igt@kms_content_protection@atomic:
    - shard-ptl:          NOTRUN -> [SKIP][28] ([Intel XE#7642])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@atomic@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][29] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-6/igt@kms_content_protection@atomic@pipe-a-dp-2.html

  * igt@kms_content_protection@lic-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#7642])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@type1:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#7642])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@kms_content_protection@type1.html

  * igt@kms_content_protection@uevent@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][32] ([Intel XE#6707] / [Intel XE#7439])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-6/igt@kms_content_protection@uevent@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-offscreen-256x85:
    - shard-ptl:          NOTRUN -> [SKIP][33] ([Intel XE#5900])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_cursor_crc@cursor-offscreen-256x85.html

  * igt@kms_cursor_crc@cursor-onscreen-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#2320])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_cursor_crc@cursor-onscreen-32x10.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-ptl:          NOTRUN -> [SKIP][35] ([Intel XE#5846])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic:
    - shard-ptl:          NOTRUN -> [SKIP][36] ([Intel XE#5962])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#309] / [Intel XE#7343])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
    - shard-ptl:          NOTRUN -> [SKIP][38] ([Intel XE#5962] / [Intel XE#7343])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html

  * igt@kms_dp_link_training@uhbr-sst-direct-train:
    - shard-ptl:          NOTRUN -> [SKIP][39] ([Intel XE#9529])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_dp_link_training@uhbr-sst-direct-train.html

  * igt@kms_dsc@dsc-with-bpc-ultrajoiner:
    - shard-lnl:          NOTRUN -> [SKIP][40] ([Intel XE#8265])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@kms_dsc@dsc-with-bpc-ultrajoiner.html

  * igt@kms_dsc@dsc-with-output-formats-ultrajoiner:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#8265]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_dsc@dsc-with-output-formats-ultrajoiner.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop:
    - shard-ptl:          NOTRUN -> [SKIP][42] ([Intel XE#2316]) +3 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_flip@2x-flip-vs-dpms-on-nop.html

  * igt@kms_flip@2x-flip-vs-modeset-vs-hang:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#1421])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-bmg:          [PASS][44] -> [ABORT][45] ([Intel XE#9362]) +1 other test abort
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-bmg-10/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-2/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [PASS][46] -> [FAIL][47] ([Intel XE#301]) +1 other test fail
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yuv-linear-to-32bpp-yuv-linear-reflect-x:
    - shard-lnl:          NOTRUN -> [SKIP][48] ([Intel XE#7179])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-32bpp-yuv-linear-to-32bpp-yuv-linear-reflect-x.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#7178] / [Intel XE#7351])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][50] ([Intel XE#5800] / [Intel XE#6312]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][51] ([Intel XE#6312] / [Intel XE#651])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2311]) +10 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrshdr-abgr161616f-draw-mmap-wc:
    - shard-ptl:          NOTRUN -> [SKIP][53] ([Intel XE#7061])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_frontbuffer_tracking@drrshdr-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#4141]) +1 other test skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#7061] / [Intel XE#7356]) +2 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-pri-indfb-draw-render:
    - shard-ptl:          NOTRUN -> [SKIP][56] ([Intel XE#6312]) +3 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-modesetfrombusy:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#6312]) +4 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrshdr-modesetfrombusy.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff:
    - shard-ptl:          NOTRUN -> [SKIP][58] ([Intel XE#5812]) +23 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][59] ([Intel XE#7061] / [Intel XE#7356])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-offscreen-pri-indfb-draw-render:
    - shard-ptl:          NOTRUN -> [SKIP][60] ([Intel XE#7865]) +6 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-offscreen-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][61] ([Intel XE#7905]) +2 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@hdr-rgb565-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][62] ([Intel XE#7865]) +3 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@kms_frontbuffer_tracking@hdr-rgb565-draw-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#2313]) +12 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-ptl:          NOTRUN -> [SKIP][64] ([Intel XE#6901])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#6911] / [Intel XE#7378])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_pipe_stress@stress-xrgb8888-xtiled:
    - shard-ptl:          NOTRUN -> [SKIP][66] ([Intel XE#6912])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_pipe_stress@stress-xrgb8888-xtiled.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping:
    - shard-ptl:          NOTRUN -> [SKIP][67] ([Intel XE#7283]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#8303]) +1 other test skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5.html

  * igt@kms_plane_lowres@tiling-none@pipe-b-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][69] ([Intel XE#5844]) +4 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-d:
    - shard-ptl:          NOTRUN -> [SKIP][70] ([Intel XE#6886]) +4 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-d.html

  * igt@kms_psr2_sf@pr-cursor-plane-update-sf:
    - shard-lnl:          NOTRUN -> [SKIP][71] ([Intel XE#2893] / [Intel XE#7304]) +1 other test skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@psr2-cursor-plane-update-sf:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#1489])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html

  * igt@kms_psr@fbc-pr-basic:
    - shard-lnl:          NOTRUN -> [SKIP][73] ([Intel XE#1406])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@kms_psr@fbc-pr-basic.html

  * igt@kms_psr@fbc-pr-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_psr@fbc-pr-suspend.html

  * igt@kms_psr@pr-basic:
    - shard-ptl:          NOTRUN -> [SKIP][75] ([Intel XE#1406]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_psr@pr-basic.html

  * igt@kms_rotation_crc@primary-x-tiled-reflect-x-180:
    - shard-ptl:          NOTRUN -> [SKIP][76] ([Intel XE#5813])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@kms_rotation_crc@primary-x-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#3904] / [Intel XE#7342])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#2413])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@kms_vrr@cmrr-desktop-mode:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#9271])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@kms_vrr@cmrr-desktop-mode.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#1091] / [Intel XE#2849])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html

  * igt@sriov_basic@pf-unbind-with-vf-probed:
    - shard-ptl:          NOTRUN -> [ABORT][81] ([Intel XE#8868])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@sriov_basic@pf-unbind-with-vf-probed.html

  * igt@xe_ccs@vm-bind-fault-mode-decompress:
    - shard-ptl:          NOTRUN -> [SKIP][82] ([Intel XE#7644])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_ccs@vm-bind-fault-mode-decompress.html

  * igt@xe_compute_preempt@compute-preempt-many-vram-evict:
    - shard-ptl:          NOTRUN -> [SKIP][83] ([Intel XE#5191])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_compute_preempt@compute-preempt-many-vram-evict.html

  * igt@xe_create@create-big-vram:
    - shard-ptl:          NOTRUN -> [SKIP][84] ([Intel XE#5853] / [Intel XE#7457])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_create@create-big-vram.html

  * igt@xe_evict@evict-beng-cm-threads-small:
    - shard-lnl:          NOTRUN -> [SKIP][85] ([Intel XE#6540] / [Intel XE#688]) +1 other test skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@xe_evict@evict-beng-cm-threads-small.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [PASS][86] -> [INCOMPLETE][87] ([Intel XE#6321] / [Intel XE#8355])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-bmg-3/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-10/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_evict@evict-beng-threads-small:
    - shard-ptl:          NOTRUN -> [SKIP][88] ([Intel XE#5764]) +1 other test skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_evict@evict-beng-threads-small.html

  * igt@xe_exec_balancer@no-exec-cm-parallel-userptr-invalidate-race:
    - shard-ptl:          NOTRUN -> [SKIP][89] ([Intel XE#7482]) +4 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_exec_balancer@no-exec-cm-parallel-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind:
    - shard-ptl:          NOTRUN -> [SKIP][90] ([Intel XE#5575] / [Intel XE#7484]) +2 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null.html

  * igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
    - shard-lnl:          NOTRUN -> [SKIP][92] ([Intel XE#1392])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#8374]) +1 other test skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-rebind-imm:
    - shard-ptl:          NOTRUN -> [SKIP][94] ([Intel XE#8374]) +2 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_exec_fault_mode@many-execqueues-multi-queue-rebind-imm.html

  * igt@xe_exec_fault_mode@many-multi-queue-invalid-userptr-fault:
    - shard-lnl:          NOTRUN -> [SKIP][95] ([Intel XE#8374])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@xe_exec_fault_mode@many-multi-queue-invalid-userptr-fault.html

  * igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-priority:
    - shard-bmg:          NOTRUN -> [SKIP][96] ([Intel XE#8364]) +6 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-priority.html

  * igt@xe_exec_multi_queue@max-queues-preempt-mode-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][97] ([Intel XE#8364]) +4 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@xe_exec_multi_queue@max-queues-preempt-mode-userptr.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-priority-smem:
    - shard-ptl:          NOTRUN -> [SKIP][98] ([Intel XE#8364]) +6 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-priority-smem.html

  * igt@xe_exec_reset@multi-queue-close-fd:
    - shard-ptl:          NOTRUN -> [SKIP][99] ([Intel XE#8369])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_exec_reset@multi-queue-close-fd.html

  * igt@xe_exec_threads@threads-multi-queue-cm-userptr:
    - shard-ptl:          NOTRUN -> [SKIP][100] ([Intel XE#8378]) +3 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_exec_threads@threads-multi-queue-cm-userptr.html

  * igt@xe_exec_threads@threads-multi-queue-fd-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][101] ([Intel XE#8378]) +1 other test skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-fd-userptr.html

  * igt@xe_exec_threads@threads-multi-queue-shared-vm-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][102] ([Intel XE#8378])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@xe_exec_threads@threads-multi-queue-shared-vm-rebind.html

  * igt@xe_multigpu_svm@mgpu-coherency-conflict:
    - shard-bmg:          NOTRUN -> [SKIP][103] ([Intel XE#6964])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@xe_multigpu_svm@mgpu-coherency-conflict.html

  * igt@xe_multigpu_svm@mgpu-latency-prefetch:
    - shard-ptl:          NOTRUN -> [SKIP][104] ([Intel XE#6964])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_multigpu_svm@mgpu-latency-prefetch.html

  * igt@xe_oa@buffer-size:
    - shard-bmg:          [PASS][105] -> [FAIL][106] ([Intel XE#7334])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-bmg-9/igt@xe_oa@buffer-size.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-3/igt@xe_oa@buffer-size.html

  * igt@xe_oa@buffer-size@oag-0-32m:
    - shard-bmg:          NOTRUN -> [FAIL][107] ([Intel XE#7334])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-3/igt@xe_oa@buffer-size@oag-0-32m.html

  * igt@xe_page_reclaim@pat-index-xd:
    - shard-ptl:          NOTRUN -> [SKIP][108] ([Intel XE#7793])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_page_reclaim@pat-index-xd.html

  * igt@xe_pat@pat-sw-hw-suspend:
    - shard-bmg:          NOTRUN -> [FAIL][109] ([Intel XE#7695])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@xe_pat@pat-sw-hw-suspend.html

  * igt@xe_pm@d3cold-basic:
    - shard-lnl:          NOTRUN -> [SKIP][110] ([Intel XE#2284] / [Intel XE#366] / [Intel XE#7370])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@xe_pm@d3cold-basic.html

  * igt@xe_pm@s3-vm-bind-unbind-all:
    - shard-lnl:          NOTRUN -> [SKIP][111] ([Intel XE#584] / [Intel XE#7369])
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-4/igt@xe_pm@s3-vm-bind-unbind-all.html

  * igt@xe_pm@s4-vm-bind-userptr:
    - shard-lnl:          [PASS][112] -> [ABORT][113] ([Intel XE#9362])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-lnl-7/igt@xe_pm@s4-vm-bind-userptr.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-6/igt@xe_pm@s4-vm-bind-userptr.html

  * igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy:
    - shard-bmg:          NOTRUN -> [SKIP][114] ([Intel XE#4733] / [Intel XE#7417])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy.html

  * igt@xe_query@multigpu-query-hwconfig:
    - shard-bmg:          NOTRUN -> [SKIP][115] ([Intel XE#944])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-8/igt@xe_query@multigpu-query-hwconfig.html

  * igt@xe_query@multigpu-query-invalid-query:
    - shard-ptl:          NOTRUN -> [SKIP][116] ([Intel XE#6019])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_query@multigpu-query-invalid-query.html

  
#### Possible fixes ####

  * igt@kms_bw@linear-tiling-1-displays-target-1920x1080p:
    - shard-bmg:          [SKIP][117] ([Intel XE#367]) -> [PASS][118]
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-bmg-2/igt@kms_bw@linear-tiling-1-displays-target-1920x1080p.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-target-1920x1080p.html

  * igt@kms_cursor_crc@cursor-suspend:
    - shard-bmg:          [DMESG-WARN][119] ([Intel XE#9365]) -> [PASS][120] +2 other tests pass
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-bmg-7/igt@kms_cursor_crc@cursor-suspend.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-6/igt@kms_cursor_crc@cursor-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [FAIL][121] ([Intel XE#301]) -> [PASS][122] +1 other test pass
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@xe_exec_threads@threads-hang-userptr-invalidate-race:
    - shard-bmg:          [FAIL][123] ([Intel XE#9096]) -> [PASS][124]
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-bmg-9/igt@xe_exec_threads@threads-hang-userptr-invalidate-race.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-bmg-3/igt@xe_exec_threads@threads-hang-userptr-invalidate-race.html

  * igt@xe_pm@s4-basic:
    - shard-ptl:          [ABORT][125] ([Intel XE#9362]) -> [PASS][126] +1 other test pass
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-ptl-1/igt@xe_pm@s4-basic.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-6/igt@xe_pm@s4-basic.html

  
#### Warnings ####

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-lnl:          [SKIP][127] ([Intel XE#309] / [Intel XE#7343]) -> [SKIP][128] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@xe_pm@s4-mocs:
    - shard-ptl:          [DMESG-WARN][129] ([Intel XE#7727]) -> [ABORT][130] ([Intel XE#9362])
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569/shard-ptl-3/igt@xe_pm@s4-mocs.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/shard-ptl-7/igt@xe_pm@s4-mocs.html

  
  [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
  [Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
  [Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
  [Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
  [Intel XE#5823]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5823
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5844]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5844
  [Intel XE#5846]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5846
  [Intel XE#5853]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5853
  [Intel XE#5900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5900
  [Intel XE#5901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5901
  [Intel XE#5947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5947
  [Intel XE#5962]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5962
  [Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
  [Intel XE#6918]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6918
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7008]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7008
  [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7334]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7334
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7378
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
  [Intel XE#7457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7457
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7644]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7644
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7695
  [Intel XE#7727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7727
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8391
  [Intel XE#8868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8868
  [Intel XE#9096]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9096
  [Intel XE#9219]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9219
  [Intel XE#9271]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9271
  [Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
  [Intel XE#9365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9365
  [Intel XE#9405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9405
  [Intel XE#9422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9422
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#9529]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9529


Build changes
-------------

  * Linux: xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569 -> xe-pw-176576v1

  IGT_9156: 9156
  xe-5989-0be91e56eb2afd32a5793865231161cfb3b12569: 0be91e56eb2afd32a5793865231161cfb3b12569
  xe-pw-176576v1: 176576v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v1/index.html

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