* [PATCH 1/3] drm/xe/wedge: add fault inspection with debugfs release
2026-11-02 21:02 [PATCH 0/3] drm/xe: Add mode-3 fault inspection with debugfs release Daniel Charles
@ 2026-11-02 21:02 ` Daniel Charles
2026-11-02 21:27 ` sashiko-bot
2026-11-02 21:02 ` [PATCH 2/3] drm/xe/wedge: preserve pending TLB invalidations during inspection Daniel Charles
` (5 subsequent siblings)
6 siblings, 1 reply; 11+ messages in thread
From: Daniel Charles @ 2026-11-02 21:02 UTC (permalink / raw)
To: intel-xe; +Cc: alan.previn.teres.alexis, Daniel Charles
From: Alan Previn <alan.previn.teres.alexis@intel.com>
Add wedged_mode=3 for inspecting hardware after a fault without automatic
engine recovery. Extend the no-reset GuC policy and provide a debugfs
release interface backed by a dedicated worker.
The worker stops submission on all GTs and blocks new Xe ioctls while
waiting for a skip or continue response. Skip does not undo the GT stop
or restore normal operation; continue proceeds into permanent wedging
and userspace notification. The stop is best-effort, not an atomic
snapshot, and in-flight ioctls can still complete.
Configure wedged_mode=3 before starting workloads: changing modes does not
atomically synchronize GuC policy updates with concurrent submissions.
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
---
drivers/gpu/drm/xe/xe_debugfs.c | 27 ++-
drivers/gpu/drm/xe/xe_device.c | 12 +-
drivers/gpu/drm/xe/xe_gt.c | 17 +-
drivers/gpu/drm/xe/xe_gt.h | 1 +
drivers/gpu/drm/xe/xe_guc.c | 2 +-
drivers/gpu/drm/xe/xe_guc_ads.c | 2 +-
drivers/gpu/drm/xe/xe_guc_capture.c | 2 +-
drivers/gpu/drm/xe/xe_guc_submit.c | 18 +-
drivers/gpu/drm/xe/xe_pci.c | 16 +-
drivers/gpu/drm/xe/xe_uc.c | 2 +-
drivers/gpu/drm/xe/xe_wedge.c | 250 ++++++++++++++++++++++++++--
drivers/gpu/drm/xe/xe_wedge.h | 3 +
drivers/gpu/drm/xe/xe_wedge_types.h | 36 ++++
13 files changed, 357 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index e59d4964d811..162423c50e63 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -419,7 +419,7 @@ static ssize_t wedged_mode_show(struct file *f, char __user *ubuf,
char buf[32];
int len = 0;
- len = scnprintf(buf, sizeof(buf), "%d\n", xe->wedged.mode);
+ len = scnprintf(buf, sizeof(buf), "%d\n", READ_ONCE(xe->wedged.mode));
return simple_read_from_buffer(ubuf, size, pos, buf, len);
}
@@ -448,6 +448,25 @@ static const struct file_operations wedged_mode_fops = {
.write = wedged_mode_set,
};
+static ssize_t wedged_pause_resume_set(struct file *f, const char __user *ubuf,
+ size_t size, loff_t *pos)
+{
+ struct xe_device *xe = file_inode(f)->i_private;
+ u32 reply;
+ int ret;
+
+ ret = kstrtouint_from_user(ubuf, size, 0, &reply);
+ if (ret)
+ return ret;
+ ret = xe_wedge_set_reply(xe, reply);
+ return ret ? ret : size;
+}
+
+static const struct file_operations wedged_pause_resume_fops = {
+ .owner = THIS_MODULE,
+ .write = wedged_pause_resume_set,
+};
+
static ssize_t page_reclaim_hw_assist_show(struct file *f, char __user *ubuf,
size_t size, loff_t *pos)
{
@@ -723,6 +742,12 @@ void xe_debugfs_register(struct xe_device *xe)
debugfs_create_file("wedged_mode", 0600, root, xe,
&wedged_mode_fops);
+ /*
+ * Skip is not recovery: GTs remain stopped. Inspection has no automatic
+ * timeout. Continue completes permanent wedging, not normal execution.
+ */
+ debugfs_create_file("wedged_pause_resume", 0200, root, xe,
+ &wedged_pause_resume_fops);
debugfs_create_file("atomic_svm_timeslice_ms", 0600, root, xe,
&atomic_svm_timeslice_ms_fops);
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index d3bb42e4d0d7..210bb4229402 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -239,7 +239,7 @@ static long xe_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
struct xe_device *xe = to_xe_device(file_priv->minor->dev);
long ret;
- if (xe_wedged(xe))
+ if (xe_wedged(xe) || atomic_read(&xe->wedged.declare_pending))
return -ECANCELED;
ACQUIRE(xe_pm_runtime_ioctl, pm)(xe);
@@ -257,7 +257,7 @@ static long xe_drm_compat_ioctl(struct file *file, unsigned int cmd, unsigned lo
struct xe_device *xe = to_xe_device(file_priv->minor->dev);
long ret;
- if (xe_wedged(xe))
+ if (xe_wedged(xe) || atomic_read(&xe->wedged.declare_pending))
return -ECANCELED;
ACQUIRE(xe_pm_runtime_ioctl, pm)(xe);
@@ -461,6 +461,11 @@ int xe_device_init_early(struct xe_device *xe)
{
int err;
+ mutex_init(&xe->wedged.mode_mutex);
+ spin_lock_init(&xe->wedged.mode_lock);
+ atomic_set(&xe->wedged.declare_pending, 0);
+ init_waitqueue_head(&xe->wedged.pause_waitq);
+
err = ttm_device_init(&xe->ttm, &xe_ttm_funcs, xe->drm.dev,
xe->drm.anon_inode->i_mapping,
xe->drm.vma_offset_manager,
@@ -1110,6 +1115,7 @@ int xe_device_probe(struct xe_device *xe)
return 0;
err_unregister_display:
+ xe_wedge_prepare_fini(xe);
xe_display_unregister(xe);
drm_dev_unregister(&xe->drm);
@@ -1132,6 +1138,8 @@ void xe_device_shutdown(struct xe_device *xe)
drm_dbg(&xe->drm, "Shutting down device\n");
+ xe_wedge_prepare_fini(xe);
+
xe_display_shutdown(xe);
xe_irq_suspend(xe);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 45fb074812a2..a84fa80e9fa9 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -1194,10 +1194,25 @@ void xe_gt_wedge_declare(struct xe_gt *gt)
{
struct xe_device *xe = gt_to_xe(gt);
- xe_gt_assert(gt, xe->wedged.mode);
+ xe_gt_assert(gt, READ_ONCE(xe->wedged.mode));
xe_uc_reset_prepare(>->uc);
xe_pm_runtime_get_noresume(xe);
if (!queue_work(gt->ordered_wq, >->wedge.worker))
xe_pm_runtime_put(xe);
}
+
+/**
+ * xe_gt_wedge_pause() - Stop GT submission synchronously for mode-3 inspection
+ * @gt: GT to stop
+ *
+ * Called only by the sleepable device inspection worker.
+ */
+void xe_gt_wedge_pause(struct xe_gt *gt)
+{
+ xe_gt_assert(gt, READ_ONCE(gt_to_xe(gt)->wedged.mode) ==
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE);
+ xe_uc_reset_prepare(>->uc);
+ xe_uc_wedge_declare(>->uc);
+ xe_tlb_inval_reset(>->tlb_inval);
+}
diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
index 7b6952fe804c..a2591c5f0ffa 100644
--- a/drivers/gpu/drm/xe/xe_gt.h
+++ b/drivers/gpu/drm/xe/xe_gt.h
@@ -41,6 +41,7 @@ int xe_gt_init_early(struct xe_gt *gt);
int xe_gt_init(struct xe_gt *gt);
void xe_gt_mmio_init(struct xe_gt *gt);
void xe_gt_wedge_declare(struct xe_gt *gt);
+void xe_gt_wedge_pause(struct xe_gt *gt);
int xe_gt_record_default_lrcs(struct xe_gt *gt);
/**
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index b1f4e132fa0c..1f8df08544ed 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -1839,7 +1839,7 @@ int xe_guc_print_info(struct xe_guc *guc, struct drm_printer *p)
*/
void xe_guc_wedge_declare(struct xe_guc *guc)
{
- xe_gt_assert(guc_to_gt(guc), guc_to_xe(guc)->wedged.mode);
+ xe_gt_assert(guc_to_gt(guc), READ_ONCE(guc_to_xe(guc)->wedged.mode));
xe_guc_ct_stop(&guc->ct);
xe_guc_submit_wedge(guc);
diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index 43a2951a66d6..01026c024da0 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -534,7 +534,7 @@ static void guc_policies_init(struct xe_guc_ads *ads)
ads_blob_write(ads, policies.max_num_work_items,
GLOBAL_POLICY_MAX_NUM_WI);
- if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)
+ if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode)))
global_flags |= GLOBAL_POLICY_DISABLE_ENGINE_RESET;
ads_blob_write(ads, policies.global_flags, global_flags);
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
index 5a4d085660a2..dfedabc651a5 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.c
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -1894,7 +1894,7 @@ xe_guc_capture_get_matching_and_lock(struct xe_exec_queue *q)
xe = gt_to_xe(q->gt);
- if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)
+ if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode)))
return NULL;
if (!xe_device_uc_enabled(xe))
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 9e7c2778029c..57e258283935 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1424,7 +1424,7 @@ void xe_guc_submit_wedge(struct xe_guc *guc)
struct xe_exec_queue *q;
unsigned long index;
- xe_gt_assert(guc_to_gt(guc), guc_to_xe(guc)->wedged.mode);
+ xe_gt_assert(guc_to_gt(guc), READ_ONCE(guc_to_xe(guc)->wedged.mode));
/*
* If device is being wedged even before submission_state is
@@ -1433,7 +1433,7 @@ void xe_guc_submit_wedge(struct xe_guc *guc)
if (!guc->submission_state.initialized)
return;
- if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET) {
+ if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode))) {
mutex_lock(&guc->submission_state.lock);
xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
if (xe_exec_queue_get_unless_zero(q))
@@ -1453,7 +1453,7 @@ static bool guc_submit_hint_wedged(struct xe_guc *guc)
{
struct xe_device *xe = guc_to_xe(guc);
- if (xe->wedged.mode != XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)
+ if (!xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode)))
return false;
if (xe_wedged(xe))
@@ -1672,7 +1672,10 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
if (!exec_queue_killed(q))
wedged = guc_submit_hint_wedged(exec_queue_to_guc(q));
else
- wedged = xe_wedged(xe);
+ wedged = xe_wedged(xe) ||
+ (READ_ONCE(xe->wedged.mode) ==
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE &&
+ exec_queue_wedged(q));
/*
* Only tag as GPU hang if this is the original timeout, not a
@@ -1726,6 +1729,12 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
goto handle_vf_resume;
if (!ret || xe_guc_read_stopped(guc)) {
trigger_reset:
+ if (READ_ONCE(xe->wedged.mode) ==
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE &&
+ (exec_queue_wedged(q) || exec_queue_wedged(primary))) {
+ wedged = true;
+ goto complete_jobs;
+ }
if (!ret)
xe_gt_warn(guc_to_gt(guc),
"Schedule disable failed to respond, guc_id=%d",
@@ -1778,6 +1787,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
}
}
+complete_jobs:
/* Mark all outstanding jobs as bad, thus completing them */
xe_sched_job_set_error(job, err);
drm_sched_for_each_pending_job(tmp_job, &sched->base, NULL)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 0c13eb901aa7..331a80baa649 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -39,6 +39,7 @@
#include "xe_survivability_mode.h"
#include "xe_tile.h"
#include "xe_tile_printk.h"
+#include "xe_wedge.h"
enum toggle_d3cold {
D3COLD_DISABLE,
@@ -1120,6 +1121,8 @@ static void xe_pci_remove(struct pci_dev *pdev)
{
struct xe_device *xe = pdev_to_xe_device(pdev);
+ xe_wedge_prepare_fini(xe);
+
if (IS_SRIOV_PF(xe))
xe_pci_sriov_configure(pdev, 0);
@@ -1252,15 +1255,15 @@ static int __xe_pci_probe(struct pci_dev *pdev, const struct xe_device_desc *des
err = xe_probe_info(xe, &probed_info);
if (err)
- return err;
+ goto err_wedge_cleanup;
err = xe_info_init(xe, &probed_info);
if (err)
- return err;
+ goto err_wedge_cleanup;
err = xe_display_probe(xe);
if (err)
- return err;
+ goto err_wedge_cleanup;
drm_dbg(&xe->drm, "%s %s %04x:%04x dgfx:%d gfx:%s (%d.%02d) media:%s (%d.%02d) display:%s dma_m_s:%d tc:%d gscfi:%d cscfi:%d",
desc->platform_name,
@@ -1288,11 +1291,11 @@ static int __xe_pci_probe(struct pci_dev *pdev, const struct xe_device_desc *des
err = xe_pm_probe(xe);
if (err)
- return err;
+ goto err_wedge_cleanup;
err = xe_device_probe(xe);
if (err)
- return err;
+ goto err_wedge_cleanup;
err = xe_pm_init(xe);
if (err)
@@ -1303,6 +1306,9 @@ static int __xe_pci_probe(struct pci_dev *pdev, const struct xe_device_desc *des
err_driver_cleanup:
xe_pci_remove(pdev);
return err;
+err_wedge_cleanup:
+ xe_wedge_prepare_fini(xe);
+ return err;
}
static void xe_pci_shutdown(struct pci_dev *pdev)
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index 686c28856014..ae428bbe72ac 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -334,7 +334,7 @@ void xe_uc_runtime_resume(struct xe_uc *uc)
*/
void xe_uc_wedge_declare(struct xe_uc *uc)
{
- xe_gt_assert(uc_to_gt(uc), uc_to_xe(uc)->wedged.mode);
+ xe_gt_assert(uc_to_gt(uc), READ_ONCE(uc_to_xe(uc)->wedged.mode));
xe_guc_wedge_declare(&uc->guc);
}
diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
index 2f35937c5e66..c22c3544adca 100644
--- a/drivers/gpu/drm/xe/xe_wedge.c
+++ b/drivers/gpu/drm/xe/xe_wedge.c
@@ -5,6 +5,7 @@
#include <drm/drm_drv.h>
#include <drm/drm_managed.h>
+#include <linux/workqueue.h>
#include "xe_defaults.h"
#include "xe_device.h"
@@ -67,9 +68,10 @@ static void wedge_work(struct work_struct *work)
#define XE_BUG_URL "https://gitlab.freedesktop.org/drm/xe/kernel/issues/new"
/**
- * xe_wedge_declare() - Declare device wedged
+ * wedge_declare_now() - Declare device wedged
* @xe: xe device instance
* @method: method(s) to be used for recovery
+ * @gts_already_wedged: Inspection has already stopped GT submission
*
* This is the final state that can only be cleared with the recovery method
* specified in the drm wedged uevent.
@@ -87,7 +89,8 @@ static void wedge_work(struct work_struct *work)
* Since the wedge handling is done as part of worker thread, this is safe for
* atomic callers.
*/
-void xe_wedge_declare(struct xe_device *xe, unsigned long method)
+static void wedge_declare_now(struct xe_device *xe, unsigned long method,
+ bool gts_already_wedged)
{
struct xe_gt *gt;
u8 id;
@@ -109,15 +112,17 @@ void xe_wedge_declare(struct xe_device *xe, unsigned long method)
"Please file a _new_ bug report at %s\n",
WEDGED_URL, XE_BUG_URL);
- for_each_initialized_gt(gt, xe, id)
- xe_gt_wedge_declare(gt);
+ if (!gts_already_wedged) {
+ for_each_initialized_gt(gt, xe, id)
+ xe_gt_wedge_declare(gt);
+ }
/*
* XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET is intended for debugging
* hangs, so wedge the device with 'none' recovery method and have
* it available to the user for debugging.
*/
- if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)
+ if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode)))
xe->wedged.method = DRM_WEDGE_RECOVERY_NONE;
else
xe->wedged.method = method;
@@ -125,6 +130,188 @@ void xe_wedge_declare(struct xe_device *xe, unsigned long method)
schedule_work(&xe->wedged.work);
}
+static bool wedge_reply_ready(struct xe_device *xe)
+{
+ u32 reply = READ_ONCE(xe->wedged.reply);
+
+ return reply == XE_WEDGE_REPLY_SKIP || reply == XE_WEDGE_REPLY_CONTINUE;
+}
+
+int xe_wedge_set_reply(struct xe_device *xe, u32 reply)
+{
+ unsigned long flags;
+ int ret = 0;
+
+ if (reply != XE_WEDGE_REPLY_SKIP && reply != XE_WEDGE_REPLY_CONTINUE)
+ return -EINVAL;
+
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ if (READ_ONCE(xe->wedged.mode) !=
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE ||
+ !atomic_read(&xe->wedged.declare_pending) ||
+ !xe->wedged.wait_active || READ_ONCE(xe->wedged.shutting_down))
+ ret = -EINVAL;
+ else if (READ_ONCE(xe->wedged.reply))
+ ret = -EALREADY;
+ else
+ WRITE_ONCE(xe->wedged.reply, reply);
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+
+ if (!ret)
+ wake_up_all(&xe->wedged.pause_waitq);
+ return ret;
+}
+
+static void wedge_pause_work(struct work_struct *work)
+{
+ struct xe_device *xe = container_of(work, struct xe_device, wedged.pause_work);
+ struct xe_gt *gt;
+ unsigned long flags;
+ bool pm_ref;
+ u32 reply;
+ u8 id;
+
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ pm_ref = xe->wedged.pause_pm_ref;
+ xe->wedged.pause_pm_ref = false;
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+
+ if (READ_ONCE(xe->wedged.shutting_down)) {
+ if (pm_ref)
+ goto put_runtime_ref;
+ goto clear_pending;
+ }
+
+ if (!pm_ref) {
+ xe_warn(xe, "Mode-3 wedge could not retain active runtime PM; resuming for inspection, hardware state may have changed\n");
+ if (!xe_pm_runtime_resume_and_get(xe)) {
+ xe_err(xe, "Failed to resume device for mode-3 inspection; aborting pause\n");
+ goto clear_pending;
+ }
+ }
+
+ if (READ_ONCE(xe->wedged.shutting_down))
+ goto put_runtime_ref;
+
+ for_each_initialized_gt(gt, xe, id)
+ xe_gt_wedge_pause(gt);
+
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ WRITE_ONCE(xe->wedged.reply, 0);
+ xe->wedged.wait_active = true;
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+
+ xe_err(xe, "GT submission stopped for mode-3 hardware debugging.\n"
+ "New DRM ioctls are blocked while waiting for 'wedged_pause_resume'.\n"
+ "Skip: 0x%08x; continue into permanent wedge: 0x%08x.\n"
+ "Skip does not restart GTs or recover the fault.\n",
+ XE_WEDGE_REPLY_SKIP, XE_WEDGE_REPLY_CONTINUE);
+
+ wait_event_idle(xe->wedged.pause_waitq,
+ wedge_reply_ready(xe) || READ_ONCE(xe->wedged.shutting_down));
+
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ xe->wedged.wait_active = false;
+ reply = READ_ONCE(xe->wedged.reply);
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+
+ if (!READ_ONCE(xe->wedged.shutting_down) && reply == XE_WEDGE_REPLY_CONTINUE)
+ wedge_declare_now(xe, DRM_WEDGE_RECOVERY_NONE, true);
+ else
+ xe_info(xe, "Inspection released without permanent wedge; GTs remain stopped\n");
+put_runtime_ref:
+ xe_pm_runtime_put(xe);
+clear_pending:
+ atomic_set(&xe->wedged.declare_pending, 0);
+}
+
+static void wedge_request(struct xe_device *xe, unsigned long method, bool mode3_only)
+{
+ unsigned long flags;
+ enum xe_wedged_mode mode;
+ bool pm_ref;
+
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ mode = READ_ONCE(xe->wedged.mode);
+ if (READ_ONCE(xe->wedged.shutting_down) ||
+ (mode3_only && mode != XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE)) {
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ return;
+ }
+
+ if (mode != XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE) {
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ wedge_declare_now(xe, method, false);
+ return;
+ }
+
+ if (atomic_read(&xe->wedged.declare_pending)) {
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ return;
+ }
+
+ atomic_set(&xe->wedged.declare_pending, 1);
+ pm_ref = xe_pm_runtime_get_if_active(xe);
+ if (WARN_ON_ONCE(!queue_work(xe->wedged.pause_workqueue, &xe->wedged.pause_work))) {
+ xe_err(xe, "Mode-3 inspection work already queued\n");
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ if (pm_ref)
+ xe_pm_runtime_put(xe);
+ return;
+ }
+ xe->wedged.pause_pm_ref = pm_ref;
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+}
+
+/**
+ * xe_wedge_declare() - Request device wedging
+ * @xe: Xe device
+ * @method: Recovery methods for a permanent wedge
+ *
+ * Mode 3 defers all requests, including critical errors, to inspection.
+ * Returning does not imply GT stopping is complete. Permanent wedging and
+ * its userspace notification occur only on continue. Teardown suppresses
+ * new inspection requests. Other modes retain normal wedge handling.
+ */
+void xe_wedge_declare(struct xe_device *xe, unsigned long method)
+{
+ wedge_request(xe, method, false);
+}
+
+/**
+ * xe_wedge_declare_mode3() - Request inspection only in mode 3
+ * @xe: Xe device
+ *
+ * Safe for atomic callers. Returning does not imply the GTs are stopped.
+ */
+void xe_wedge_declare_mode3(struct xe_device *xe)
+{
+ wedge_request(xe, DRM_WEDGE_RECOVERY_NONE, true);
+}
+
+/**
+ * xe_wedge_prepare_fini() - Release and join mode-3 inspection before teardown
+ * @xe: Xe device
+ */
+void xe_wedge_prepare_fini(struct xe_device *xe)
+{
+ unsigned long flags;
+ bool mode3;
+
+ mutex_lock(&xe->wedged.mode_mutex);
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ mode3 = READ_ONCE(xe->wedged.mode) ==
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE;
+ if (mode3)
+ WRITE_ONCE(xe->wedged.shutting_down, true);
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ if (mode3 && xe->wedged.pause_workqueue) {
+ wake_up_all(&xe->wedged.pause_waitq);
+ flush_work(&xe->wedged.pause_work);
+ }
+ mutex_unlock(&xe->wedged.mode_mutex);
+}
+
static const char *wedge_mode_to_string(enum xe_wedged_mode mode)
{
switch (mode) {
@@ -134,6 +321,8 @@ static const char *wedge_mode_to_string(enum xe_wedged_mode mode)
return "upon-critical-error";
case XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET:
return "upon-any-hang-no-reset";
+ case XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE:
+ return "upon-any-hang-no-reset-wait-for-release";
default:
return "<invalid>";
}
@@ -141,10 +330,10 @@ static const char *wedge_mode_to_string(enum xe_wedged_mode mode)
static int wedge_validate_mode(struct xe_device *xe, unsigned int mode)
{
- if (mode > XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET) {
+ if (mode > XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE) {
xe_dbg(xe, "wedged_mode: invalid value (%u)\n", mode);
return -EINVAL;
- } else if (mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET && (IS_SRIOV_VF(xe) ||
+ } else if (xe_wedge_is_hanging_on_any(mode) && (IS_SRIOV_VF(xe) ||
(IS_SRIOV_PF(xe) && !IS_ENABLED(CONFIG_DRM_XE_DEBUG)))) {
xe_dbg(xe, "wedged_mode: (%u) %s mode is not supported for %s\n",
mode, wedge_mode_to_string(mode),
@@ -160,11 +349,11 @@ static bool wedge_mode_needs_policy_update(struct xe_device *xe, enum xe_wedged_
if (xe->wedged.inconsistent_reset)
return true;
- if (xe->wedged.mode == mode)
+ if (READ_ONCE(xe->wedged.mode) == mode)
return false;
- if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET ||
- mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)
+ if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode)) ||
+ xe_wedge_is_hanging_on_any(mode))
return true;
return false;
@@ -175,7 +364,7 @@ static int __wedge_mode_set_reset_policy(struct xe_gt *gt, enum xe_wedged_mode m
bool enable_engine_reset;
int ret;
- enable_engine_reset = (mode != XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET);
+ enable_engine_reset = !xe_wedge_is_hanging_on_any(mode);
ret = xe_guc_ads_scheduler_policy_toggle_reset(>->uc.guc.ads,
enable_engine_reset);
if (ret)
@@ -216,20 +405,46 @@ static int wedge_mode_set_reset_policy(struct xe_device *xe, enum xe_wedged_mode
*/
int xe_wedge_set_mode(struct xe_device *xe, enum xe_wedged_mode mode)
{
+ unsigned long flags;
+ enum xe_wedged_mode old_mode;
+ bool update_policy;
int ret;
ret = wedge_validate_mode(xe, mode);
if (ret)
return ret;
- if (wedge_mode_needs_policy_update(xe, mode)) {
+ mutex_lock(&xe->wedged.mode_mutex);
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ if (atomic_read(&xe->wedged.declare_pending) || READ_ONCE(xe->wedged.shutting_down)) {
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ ret = -EBUSY;
+ goto out_unlock;
+ }
+ old_mode = READ_ONCE(xe->wedged.mode);
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+
+ update_policy = wedge_mode_needs_policy_update(xe, mode);
+ if (update_policy) {
ret = wedge_mode_set_reset_policy(xe, mode);
if (ret)
- return ret;
+ goto out_unlock;
}
- xe->wedged.mode = mode;
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ if (atomic_read(&xe->wedged.declare_pending)) {
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ ret = update_policy ? wedge_mode_set_reset_policy(xe, old_mode) : 0;
+ if (!ret)
+ ret = -EBUSY;
+ goto out_unlock;
+ }
+ WRITE_ONCE(xe->wedged.mode, mode);
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ ret = 0;
+out_unlock:
+ mutex_unlock(&xe->wedged.mode_mutex);
return ret;
}
@@ -237,6 +452,9 @@ static void xe_wedge_fini(struct drm_device *drm, void *arg)
{
struct xe_device *xe = arg;
+ xe_wedge_prepare_fini(xe);
+ if (xe->wedged.pause_workqueue)
+ destroy_workqueue(xe->wedged.pause_workqueue);
disable_work_sync(&xe->wedged.work);
if (atomic_read(&xe->wedged.flag))
@@ -252,6 +470,10 @@ static void xe_wedge_fini(struct drm_device *drm, void *arg)
int xe_wedge_init(struct xe_device *xe)
{
INIT_WORK(&xe->wedged.work, wedge_work);
+ INIT_WORK(&xe->wedged.pause_work, wedge_pause_work);
+ xe->wedged.pause_workqueue = alloc_workqueue("xe_wedge_pause", WQ_UNBOUND, 1);
+ if (!xe->wedged.pause_workqueue)
+ return -ENOMEM;
xe->wedged.mode = wedge_validate_mode(xe, xe_modparam.wedged_mode) ?
XE_DEFAULT_WEDGED_MODE : xe_modparam.wedged_mode;
diff --git a/drivers/gpu/drm/xe/xe_wedge.h b/drivers/gpu/drm/xe/xe_wedge.h
index 3b5499dfc30d..3fef49d448f5 100644
--- a/drivers/gpu/drm/xe/xe_wedge.h
+++ b/drivers/gpu/drm/xe/xe_wedge.h
@@ -18,6 +18,9 @@ static inline bool xe_wedged(struct xe_device *xe)
}
void xe_wedge_declare(struct xe_device *xe, unsigned long method);
+void xe_wedge_declare_mode3(struct xe_device *xe);
+void xe_wedge_prepare_fini(struct xe_device *xe);
+int xe_wedge_set_reply(struct xe_device *xe, u32 reply);
int xe_wedge_init(struct xe_device *xe);
int xe_wedge_set_mode(struct xe_device *xe, enum xe_wedged_mode mode);
diff --git a/drivers/gpu/drm/xe/xe_wedge_types.h b/drivers/gpu/drm/xe/xe_wedge_types.h
index e472c5fcbd26..855036e3f197 100644
--- a/drivers/gpu/drm/xe/xe_wedge_types.h
+++ b/drivers/gpu/drm/xe/xe_wedge_types.h
@@ -7,6 +7,9 @@
#define _XE_WEDGE_TYPES_H_
#include <linux/types.h>
+#include <linux/mutex.h>
+#include <linux/spinlock_types.h>
+#include <linux/wait.h>
#include <linux/workqueue_types.h>
/**
@@ -18,13 +21,26 @@
* @XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET: Device will be declared wedged on
* any hang. In this mode, engine resets are disabled to avoid automatic
* recovery attempts. This mode is primarily intended for debugging hangs.
+ * @XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE: Stop submission
+ * for inspection and wait for a debugfs skip or continue response.
*/
enum xe_wedged_mode {
XE_WEDGED_MODE_NEVER = 0,
XE_WEDGED_MODE_UPON_CRITICAL_ERROR = 1,
XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET = 2,
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE = 3,
};
+/* Skip releases inspection without recovering the fault or restarting GTs. */
+#define XE_WEDGE_REPLY_CONTINUE 0xdeadbbbb
+#define XE_WEDGE_REPLY_SKIP 0xdeadf001
+
+static inline bool xe_wedge_is_hanging_on_any(enum xe_wedged_mode mode)
+{
+ return mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET ||
+ mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE;
+}
+
/**
* struct xe_wedge - Struct to control Wedged States and mode
*/
@@ -39,6 +55,26 @@ struct xe_wedge {
bool inconsistent_reset;
/** @work: Worker to defer non-atomic calls */
struct work_struct work;
+ /** @mode_mutex: Serializes mode changes and inspection teardown. */
+ struct mutex mode_mutex;
+ /** @mode_lock: Protects mode updates and inspection activation/replies. */
+ spinlock_t mode_lock;
+ /** @declare_pending: An inspection request owns the ioctl gate. */
+ atomic_t declare_pending;
+ /** @pause_work: Sleepable mode-3 stop and inspection worker. */
+ struct work_struct pause_work;
+ /** @pause_workqueue: Isolated queue for the indefinite inspection wait. */
+ struct workqueue_struct *pause_workqueue;
+ /** @pause_pm_ref: Queued worker's reference, protected by mode_lock. */
+ bool pause_pm_ref;
+ /** @pause_waitq: Wait for a reply or teardown. */
+ wait_queue_head_t pause_waitq;
+ /** @wait_active: Inspection is accepting replies under mode_lock. */
+ bool wait_active;
+ /** @shutting_down: Suppress new requests while tearing down mode 3. */
+ bool shutting_down;
+ /** @reply: Accepted debugfs response, protected by mode_lock. */
+ u32 reply;
};
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 1/3] drm/xe/wedge: add fault inspection with debugfs release
2026-11-02 21:02 ` [PATCH 1/3] drm/xe/wedge: add " Daniel Charles
@ 2026-11-02 21:27 ` sashiko-bot
0 siblings, 0 replies; 11+ messages in thread
From: sashiko-bot @ 2026-11-02 21:27 UTC (permalink / raw)
To: Daniel Charles, intel-xe
Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [High] drm/xe/wedge: exec_queue ref leak on repeated xe_guc_submit_wedge()
- [High] drm/xe/wedge: suspend deadlock and RPM corruption after mode-3 skip
- [Medium] drm/xe/wedge: GT reset race in xe_gt_wedge_pause() and gt_reset_worker()
- [Medium] drm/xe/wedge: teardown race on shutting_down in xe_wedge_prepare_fini()
--
commit efc71b82b1b8d7ea492bbcdc755faa39da7e7570
Author: Alan Previn <alan.previn.teres.alexis@intel.com>
drm/xe/wedge: add fault inspection with debugfs release
This commit introduces wedged_mode=3 to pause GT submission and block new
Xe ioctls after a hang so hardware state can be inspected before releasing
via debugfs. It extends the GuC no-reset policy to cover mode 3 and adds a
worker that waits for a skip or continue command from wedged_pause_resume.
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index be79a0da2f2ff..1633b203255a3 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -1207,10 +1207,25 @@ void xe_gt_wedge_declare(struct xe_gt *gt)
[ ... ]
> +void xe_gt_wedge_pause(struct xe_gt *gt)
> +{
> + xe_gt_assert(gt, READ_ONCE(gt_to_xe(gt)->wedged.mode) ==
> + XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE);
> + xe_uc_reset_prepare(>->uc);
> + xe_uc_wedge_declare(>->uc);
> + xe_tlb_inval_reset(>->tlb_inval);
> +}
[ ... ]
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index 9e7c2778029ca..57e258283935a 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -1424,7 +1424,7 @@ void xe_guc_submit_wedge(struct xe_guc *guc)
[ ... ]
> @@ -1433,7 +1433,7 @@ void xe_guc_submit_wedge(struct xe_guc *guc)
> if (!guc->submission_state.initialized)
> return;
>
> - if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET) {
> + if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode))) {
> mutex_lock(&guc->submission_state.lock);
> xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
> if (xe_exec_queue_get_unless_zero(q))
[ ... ]
> @@ -1672,7 +1672,10 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> if (!exec_queue_killed(q))
> wedged = guc_submit_hint_wedged(exec_queue_to_guc(q));
> else
> - wedged = xe_wedged(xe);
> + wedged = xe_wedged(xe) ||
> + (READ_ONCE(xe->wedged.mode) ==
> + XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE &&
> + exec_queue_wedged(q));
>
> /*
> * Only tag as GPU hang if this is the original timeout, not a
> @@ -1726,6 +1729,12 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> goto handle_vf_resume;
> if (!ret || xe_guc_read_stopped(guc)) {
> trigger_reset:
> + if (READ_ONCE(xe->wedged.mode) ==
> + XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE &&
> + (exec_queue_wedged(q) || exec_queue_wedged(primary))) {
> + wedged = true;
> + goto complete_jobs;
> + }
> if (!ret)
> xe_gt_warn(guc_to_gt(guc),
> "Schedule disable failed to respond, guc_id=%d",
[Severity: Medium]
Can a concurrent job timeout on a killed queue still trigger a full hardware
GT reset during mode-3 inspection?
In xe_gt_wedge_pause(), xe_uc_reset_prepare() runs first, setting
guc->submission_state.stopped = 1 and waking guc->ct.wq. Then
xe_uc_wedge_declare() -> xe_guc_wedge_declare() calls xe_guc_ct_stop(),
which takes ct->lock and sleeps in cancel_work_sync() before
xe_guc_submit_wedge() sets EXEC_QUEUE_STATE_WEDGED on the queues:
xe_gt_wedge_pause()
xe_uc_reset_prepare()
xe_guc_reset_prepare()
xe_guc_submit_reset_prepare() /* sets stopped = 1, wakes guc->ct.wq */
xe_uc_wedge_declare()
xe_guc_wedge_declare()
xe_guc_ct_stop() /* sleeps in cancel_work_sync() */
xe_guc_submit_wedge() /* sets EXEC_QUEUE_STATE_WEDGED */
If a killed queue is concurrently waiting in guc_exec_queue_timedout_job()
on guc->ct.wq, it wakes up as soon as xe_guc_read_stopped(guc) becomes true
and jumps to trigger_reset before xe_guc_submit_wedge() has marked the
queues wedged (and similarly if a killed queue enters
guc_exec_queue_timedout_job() after declare_pending is set but before
xe_guc_submit_wedge() runs). At trigger_reset, both exec_queue_wedged(q)
and exec_queue_wedged(primary) are still false, so it falls through to
xe_gt_reset_async(primary->gt).
In addition, gt_reset_worker() in drivers/gpu/drm/xe/xe_gt.c only checks
xe_wedged(gt_to_xe(gt)):
drivers/gpu/drm/xe/xe_gt.c:gt_reset_worker() {
...
if (xe_wedged(gt_to_xe(gt)))
goto err_pm_put;
...
}
Since xe_wedged(xe) remains false during mode-3 inspection and after a
skip reply, wouldn't gt_reset_worker() proceed to run do_gt_reset() and
do_gt_restart(), wiping out the fault state under inspection?
> diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
> index 2f35937c5e661..c22c3544adcaa 100644
> --- a/drivers/gpu/drm/xe/xe_wedge.c
> +++ b/drivers/gpu/drm/xe/xe_wedge.c
[ ... ]
> +static void wedge_pause_work(struct work_struct *work)
> +{
[ ... ]
> + for_each_initialized_gt(gt, xe, id)
> + xe_gt_wedge_pause(gt);
> +
> + spin_lock_irqsave(&xe->wedged.mode_lock, flags);
> + WRITE_ONCE(xe->wedged.reply, 0);
> + xe->wedged.wait_active = true;
> + spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
> +
> + xe_err(xe, "GT submission stopped for mode-3 hardware debugging.\n"
> + "New DRM ioctls are blocked while waiting for 'wedged_pause_resume'.\n"
> + "Skip: 0x%08x; continue into permanent wedge: 0x%08x.\n"
> + "Skip does not restart GTs or recover the fault.\n",
> + XE_WEDGE_REPLY_SKIP, XE_WEDGE_REPLY_CONTINUE);
> +
> + wait_event_idle(xe->wedged.pause_waitq,
> + wedge_reply_ready(xe) || READ_ONCE(xe->wedged.shutting_down));
> +
> + spin_lock_irqsave(&xe->wedged.mode_lock, flags);
> + xe->wedged.wait_active = false;
> + reply = READ_ONCE(xe->wedged.reply);
> + spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
> +
> + if (!READ_ONCE(xe->wedged.shutting_down) && reply == XE_WEDGE_REPLY_CONTINUE)
> + wedge_declare_now(xe, DRM_WEDGE_RECOVERY_NONE, true);
> + else
> + xe_info(xe, "Inspection released without permanent wedge; GTs remain stopped\n");
> +put_runtime_ref:
> + xe_pm_runtime_put(xe);
> +clear_pending:
> + atomic_set(&xe->wedged.declare_pending, 0);
> +}
[Severity: High]
What happens if system suspend or runtime suspend runs during mode-3
inspection or after XE_WEDGE_REPLY_SKIP?
In wedge_pause_work(), xe_gt_wedge_pause() calls xe_uc_reset_prepare(),
which sets guc->submission_state.stopped = 1, and xe_uc_wedge_declare(),
which stops GuC CT and marks queues wedged. However, while waiting in
wait_event_idle(), or after the user writes XE_WEDGE_REPLY_SKIP,
wedge_declare_now() is not called, so xe_wedged(xe) remains false and
xe->needs_flr_on_fini is not set. On XE_WEDGE_REPLY_SKIP, wedge_pause_work()
also drops its runtime PM reference at put_runtime_ref.
If system suspend runs while paused or after XE_WEDGE_REPLY_SKIP (or D3cold
runtime suspend runs after the runtime PM reference is dropped),
xe_gt_suspend() -> xe_uc_suspend() -> uc_reset_wait() -> xe_guc_reset_wait()
calls xe_guc_submit_reset_wait():
drivers/gpu/drm/xe/xe_guc_submit.c:xe_guc_submit_reset_wait() {
wait_event(guc->ct.wq, xe_wedged(guc_to_xe(guc)) ||
!xe_guc_read_stopped(guc));
}
Because xe_wedged(xe) is false and xe_guc_read_stopped(guc) stays 1
permanently, won't xe_guc_submit_reset_wait() (and the loop in
uc_reset_wait()) sleep uninterruptibly forever?
Also, on platforms where D3cold is disallowed, dropping the runtime PM
reference on XE_WEDGE_REPLY_SKIP allows xe_pm_runtime_suspend() ->
xe_gt_runtime_suspend() -> xe_guc_ct_runtime_suspend() to hit the
g2h->info.space == credits assert if any G2H credits were outstanding, and
a subsequent xe_pm_runtime_resume() -> xe_guc_runtime_resume() will re-enable
GuC CT and submission even though GTs are supposed to remain stopped.
> +
> +static void wedge_request(struct xe_device *xe, unsigned long method, bool mode3_only)
> +{
> + unsigned long flags;
> + enum xe_wedged_mode mode;
> + bool pm_ref;
> +
> + spin_lock_irqsave(&xe->wedged.mode_lock, flags);
> + mode = READ_ONCE(xe->wedged.mode);
> + if (READ_ONCE(xe->wedged.shutting_down) ||
> + (mode3_only && mode != XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE)) {
> + spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
> + return;
> + }
> +
> + if (mode != XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE) {
> + spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
> + wedge_declare_now(xe, method, false);
> + return;
> + }
> +
> + if (atomic_read(&xe->wedged.declare_pending)) {
> + spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
> + return;
> + }
> +
> + atomic_set(&xe->wedged.declare_pending, 1);
> + pm_ref = xe_pm_runtime_get_if_active(xe);
> + if (WARN_ON_ONCE(!queue_work(xe->wedged.pause_workqueue, &xe->wedged.pause_work))) {
> + xe_err(xe, "Mode-3 inspection work already queued\n");
> + spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
> + if (pm_ref)
> + xe_pm_runtime_put(xe);
> + return;
> + }
> + xe->wedged.pause_pm_ref = pm_ref;
> + spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
> +}
[Severity: High]
Does this leak xe_exec_queue references if xe_guc_submit_wedge() runs more
than once?
When wedge_pause_work() finishes, it resets xe->wedged.declare_pending to 0:
1. If the user writes XE_WEDGE_REPLY_SKIP, xe->wedged.flag remains 0 and
declare_pending becomes 0, which also re-opens the ioctl gate in
xe_drm_ioctl() while GTs remain stopped. Any subsequent timeout on
another non-killed queue in guc_exec_queue_timedout_job() sees
!exec_queue_killed(q) (since xe_guc_submit_wedge() only sets
EXEC_QUEUE_STATE_WEDGED) and calls guc_submit_hint_wedged() ->
xe_wedge_declare() -> wedge_request(), queueing wedge_pause_work() a
second time.
2. Even if the user writes XE_WEDGE_REPLY_CONTINUE (setting
xe->wedged.flag = 1), wedge_request() does not check xe_wedged(xe)
before handling mode 3, so any later xe_wedge_declare() or
xe_wedge_declare_mode3() call after declare_pending is cleared will
queue wedge_pause_work() again.
Each run of wedge_pause_work() calls xe_gt_wedge_pause() ->
xe_uc_wedge_declare() -> xe_guc_wedge_declare() -> xe_guc_submit_wedge():
drivers/gpu/drm/xe/xe_guc_submit.c:xe_guc_submit_wedge() {
...
if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode))) {
mutex_lock(&guc->submission_state.lock);
xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
if (xe_exec_queue_get_unless_zero(q))
set_exec_queue_wedged(q);
mutex_unlock(&guc->submission_state.lock);
}
...
}
Because xe_guc_submit_wedge() takes a new reference with
xe_exec_queue_get_unless_zero(q) without checking if exec_queue_wedged(q)
is already set, while guc_submit_fini() only calls xe_exec_queue_put(q) once
per wedged entry during teardown:
drivers/gpu/drm/xe/xe_guc_submit.c:guc_submit_fini() {
...
mutex_lock(&guc->submission_state.lock);
xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
if (exec_queue_wedged(q)) {
mutex_unlock(&guc->submission_state.lock);
xe_exec_queue_put(q);
mutex_lock(&guc->submission_state.lock);
}
}
mutex_unlock(&guc->submission_state.lock);
}
won't every repeated call to xe_guc_submit_wedge() leak a reference on all
registered queues in exec_queue_lookup?
[ ... ]
> +void xe_wedge_prepare_fini(struct xe_device *xe)
> +{
> + unsigned long flags;
> + bool mode3;
> +
> + mutex_lock(&xe->wedged.mode_mutex);
> + spin_lock_irqsave(&xe->wedged.mode_lock, flags);
> + mode3 = READ_ONCE(xe->wedged.mode) ==
> + XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE;
> + if (mode3)
> + WRITE_ONCE(xe->wedged.shutting_down, true);
> + spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
> + if (mode3 && xe->wedged.pause_workqueue) {
> + wake_up_all(&xe->wedged.pause_waitq);
> + flush_work(&xe->wedged.pause_work);
> + }
> + mutex_unlock(&xe->wedged.mode_mutex);
> +}
[Severity: Medium]
Why is xe->wedged.shutting_down only set when xe->wedged.mode is currently
mode 3?
xe_wedge_prepare_fini() is called at the start of xe_pci_remove() (before
drm_dev_unplug() removes debugfs), at the start of xe_device_shutdown()
(where debugfs is not removed), and in xe_device_probe() error cleanup
before drm_dev_unregister().
If xe->wedged.mode is not 3 when xe_wedge_prepare_fini() runs,
xe->wedged.shutting_down is left false. A concurrent write to the
wedged_mode debugfs file can then call xe_wedge_set_mode(), see
shutting_down == false, and switch the device into mode 3 after
xe_wedge_prepare_fini() has already returned. Similarly, if
wedge_pause_work() clears declare_pending just before exit and a concurrent
xe_wedge_set_mode() changes wedged.mode away from 3 before
xe_wedge_prepare_fini() acquires mode_mutex, xe_wedge_prepare_fini() will
see mode3 == false and skip flushing pause_work.
Should xe_wedge_prepare_fini() unconditionally set shutting_down = true and
flush pause_work whenever pause_workqueue is initialized?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261102210242.635207-1-daniel.charles@intel.com?part=1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 2/3] drm/xe/wedge: preserve pending TLB invalidations during inspection
2026-11-02 21:02 [PATCH 0/3] drm/xe: Add mode-3 fault inspection with debugfs release Daniel Charles
2026-11-02 21:02 ` [PATCH 1/3] drm/xe/wedge: add " Daniel Charles
@ 2026-11-02 21:02 ` Daniel Charles
2026-11-02 21:34 ` sashiko-bot
2026-11-02 21:02 ` [PATCH 3/3] drm/xe/wedge: request inspection for additional fault paths Daniel Charles
` (4 subsequent siblings)
6 siblings, 1 reply; 11+ messages in thread
From: Daniel Charles @ 2026-11-02 21:02 UTC (permalink / raw)
To: intel-xe; +Cc: alan.previn.teres.alexis, Daniel Charles
Pause TLB invalidation timeout and completion processing when the mode-3
inspection worker stops a GT. Keep pending invalidation fences unsignaled
during inspection rather than resetting them as part of the GT stop.
CONTINUE resets the preserved invalidations before permanent wedging;
SKIP leaves them paused with the GTs stopped. Ordinary GT wedging retains
its existing TLB reset behavior.
Document that preserved fences can block process exit, unbind or unload,
and that a power cycle may be necessary. Inspection has no automatic
timeout, and SKIP does not restore normal operation.
Assisted-by: LLM
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
---
drivers/gpu/drm/xe/xe_debugfs.c | 2 ++
drivers/gpu/drm/xe/xe_gt.c | 2 +-
drivers/gpu/drm/xe/xe_tlb_inval.c | 33 +++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_tlb_inval.h | 1 +
drivers/gpu/drm/xe/xe_tlb_inval_types.h | 2 ++
drivers/gpu/drm/xe/xe_wedge.c | 5 ++++
drivers/gpu/drm/xe/xe_wedge_types.h | 7 +++++-
7 files changed, 50 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index 162423c50e63..911df712f7b0 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -745,6 +745,8 @@ void xe_debugfs_register(struct xe_device *xe)
/*
* Skip is not recovery: GTs remain stopped. Inspection has no automatic
* timeout. Continue completes permanent wedging, not normal execution.
+ * Preserved TLB fences may block process exit, unbind or unload; a power
+ * cycle may be necessary. Automatic recovery is not guaranteed.
*/
debugfs_create_file("wedged_pause_resume", 0200, root, xe,
&wedged_pause_resume_fops);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index a84fa80e9fa9..8be2053e6cb0 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -1212,7 +1212,7 @@ void xe_gt_wedge_pause(struct xe_gt *gt)
{
xe_gt_assert(gt, READ_ONCE(gt_to_xe(gt)->wedged.mode) ==
XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE);
+ xe_tlb_inval_debug_pause(>->tlb_inval);
xe_uc_reset_prepare(>->uc);
xe_uc_wedge_declare(>->uc);
- xe_tlb_inval_reset(>->tlb_inval);
}
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index c9cc5842d65b..293929f92eb0 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -83,9 +83,17 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
long timeout_delay = tlb_inval->ops->timeout_delay(tlb_inval);
int timedout_seqno = 0, seqno_recv = 0;
+ spin_lock_irq(&tlb_inval->pending_lock);
+ if (tlb_inval->debug_paused)
+ goto out_unlock;
+ spin_unlock_irq(&tlb_inval->pending_lock);
+
tlb_inval->ops->flush(tlb_inval);
spin_lock_irq(&tlb_inval->pending_lock);
+ if (tlb_inval->debug_paused)
+ goto out_unlock;
+
list_for_each_entry_safe(fence, next,
&tlb_inval->pending_fences, link) {
s64 since_inval_ms = ktime_ms_delta(ktime_get(),
@@ -124,6 +132,7 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
queue_delayed_work(tlb_inval->timeout_wq, &tlb_inval->fence_tdr,
timeout_delay);
seqno_recv = tlb_inval->seqno_recv;
+out_unlock:
spin_unlock_irq(&tlb_inval->pending_lock);
/*
@@ -184,6 +193,7 @@ int xe_gt_tlb_inval_init_early(struct xe_gt *gt)
tlb_inval->seqno = 1;
INIT_LIST_HEAD(&tlb_inval->pending_fences);
spin_lock_init(&tlb_inval->pending_lock);
+ tlb_inval->debug_paused = false;
spin_lock_init(&tlb_inval->lock);
INIT_DELAYED_WORK(&tlb_inval->fence_tdr, xe_tlb_inval_fence_timeout);
@@ -209,6 +219,24 @@ int xe_gt_tlb_inval_init_early(struct xe_gt *gt)
return drmm_add_action_or_reset(&xe->drm, tlb_inval_fini, tlb_inval);
}
+/**
+ * xe_tlb_inval_debug_pause() - Preserve pending invalidations for inspection
+ * @tlb_inval: TLB invalidation client
+ *
+ * A reset ends this pause even while inspection waits for a reply.
+ * Holding a runtime PM reference does not prevent system suspend.
+ */
+void xe_tlb_inval_debug_pause(struct xe_tlb_inval *tlb_inval)
+{
+ if (!tlb_inval->ops->initialized(tlb_inval))
+ return;
+
+ spin_lock_irq(&tlb_inval->pending_lock);
+ tlb_inval->debug_paused = true;
+ cancel_delayed_work(&tlb_inval->fence_tdr);
+ spin_unlock_irq(&tlb_inval->pending_lock);
+}
+
/**
* xe_tlb_inval_reset() - TLB invalidation reset
* @tlb_inval: TLB invalidation client
@@ -235,6 +263,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval)
mutex_lock(&tlb_inval->seqno_lock);
spin_lock_irq(&tlb_inval->pending_lock);
+ tlb_inval->debug_paused = false;
cancel_delayed_work(&tlb_inval->fence_tdr);
/*
* We might have various kworkers waiting for TLB flushes to complete
@@ -464,6 +493,10 @@ void xe_tlb_inval_done_handler(struct xe_tlb_inval *tlb_inval, int seqno)
* process_g2h_msg().
*/
spin_lock_irqsave(&tlb_inval->pending_lock, flags);
+ if (tlb_inval->debug_paused) {
+ spin_unlock_irqrestore(&tlb_inval->pending_lock, flags);
+ return;
+ }
if (seqno == TLB_INVALIDATION_SEQNO_INVALID) {
xe_tlb_inval_reset_timeout(tlb_inval);
spin_unlock_irqrestore(&tlb_inval->pending_lock, flags);
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
index 665072b4b81d..65bb2f6e530b 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
@@ -17,6 +17,7 @@ struct xe_vm;
int xe_gt_tlb_inval_init_early(struct xe_gt *gt);
void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
+void xe_tlb_inval_debug_pause(struct xe_tlb_inval *tlb_inval);
int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
struct xe_tlb_inval_fence *fence);
int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
index 80d2019fa20b..7ccd66c2eea7 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
@@ -112,6 +112,8 @@ struct xe_tlb_inval {
* @pending_lock: protects @pending_fences and updating @seqno_recv.
*/
spinlock_t pending_lock;
+ /** @debug_paused: Preserve mode-3 pending state under pending_lock. */
+ bool debug_paused;
/**
* @timedout_seqno: seqno of the most recent timed out TLB
* invalidation, 0 if none. Used to measure how late the ack for a
diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
index c22c3544adca..f7b2ec9d6886 100644
--- a/drivers/gpu/drm/xe/xe_wedge.c
+++ b/drivers/gpu/drm/xe/xe_wedge.c
@@ -17,6 +17,7 @@
#include "xe_pm.h"
#include "xe_printk.h"
#include "xe_sriov.h"
+#include "xe_tlb_inval.h"
#include "xe_wedge.h"
/**
@@ -115,6 +116,9 @@ static void wedge_declare_now(struct xe_device *xe, unsigned long method,
if (!gts_already_wedged) {
for_each_initialized_gt(gt, xe, id)
xe_gt_wedge_declare(gt);
+ } else {
+ for_each_initialized_gt(gt, xe, id)
+ xe_tlb_inval_reset(>->tlb_inval);
}
/*
@@ -203,6 +207,7 @@ static void wedge_pause_work(struct work_struct *work)
xe_err(xe, "GT submission stopped for mode-3 hardware debugging.\n"
"New DRM ioctls are blocked while waiting for 'wedged_pause_resume'.\n"
+ "Pending TLB invalidations are preserved until continue or another reset.\n"
"Skip: 0x%08x; continue into permanent wedge: 0x%08x.\n"
"Skip does not restart GTs or recover the fault.\n",
XE_WEDGE_REPLY_SKIP, XE_WEDGE_REPLY_CONTINUE);
diff --git a/drivers/gpu/drm/xe/xe_wedge_types.h b/drivers/gpu/drm/xe/xe_wedge_types.h
index 855036e3f197..d64a4db49e4c 100644
--- a/drivers/gpu/drm/xe/xe_wedge_types.h
+++ b/drivers/gpu/drm/xe/xe_wedge_types.h
@@ -31,7 +31,12 @@ enum xe_wedged_mode {
XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE = 3,
};
-/* Skip releases inspection without recovering the fault or restarting GTs. */
+/*
+ * Skip releases inspection without recovering the fault or restarting GTs.
+ * Pending TLB invalidations remain paused; fence waiters may block indefinitely.
+ * Later resets are possible, but automatic recovery is not guaranteed.
+ * Continue resets deferred invalidations and completes permanent wedging.
+ */
#define XE_WEDGE_REPLY_CONTINUE 0xdeadbbbb
#define XE_WEDGE_REPLY_SKIP 0xdeadf001
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 2/3] drm/xe/wedge: preserve pending TLB invalidations during inspection
2026-11-02 21:02 ` [PATCH 2/3] drm/xe/wedge: preserve pending TLB invalidations during inspection Daniel Charles
@ 2026-11-02 21:34 ` sashiko-bot
0 siblings, 0 replies; 11+ messages in thread
From: sashiko-bot @ 2026-11-02 21:34 UTC (permalink / raw)
To: Daniel Charles, intel-xe
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] drm/xe: out-of-order fence signaling and MMIO invalidation when debug_paused
- [High] drm/xe/wedge: broken TLB reset and queue ref leak in wedge_pause_work()
--
commit c122991e71ecbb496ea6c81f3c4f283b79307727
Author: Daniel Charles <daniel.charles@intel.com>
drm/xe/wedge: preserve pending TLB invalidations during inspection
This patch pauses TLB invalidation timeout and completion processing when the
mode-3 inspection worker stops a GT, preserving pending invalidation fences
unsignaled during inspection. Replying continue resets the preserved
invalidations before permanent wedging, while skip leaves them paused.
> diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
> index c9cc5842d65b6..293929f92eb0f 100644
> --- a/drivers/gpu/drm/xe/xe_tlb_inval.c
> +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
[ ... ]
> @@ -209,6 +219,24 @@ int xe_gt_tlb_inval_init_early(struct xe_gt *gt)
> return drmm_add_action_or_reset(&xe->drm, tlb_inval_fini, tlb_inval);
> }
>
> +/**
> + * xe_tlb_inval_debug_pause() - Preserve pending invalidations for inspection
> + * @tlb_inval: TLB invalidation client
> + *
> + * A reset ends this pause even while inspection waits for a reply.
> + * Holding a runtime PM reference does not prevent system suspend.
> + */
> +void xe_tlb_inval_debug_pause(struct xe_tlb_inval *tlb_inval)
> +{
> + if (!tlb_inval->ops->initialized(tlb_inval))
> + return;
> +
> + spin_lock_irq(&tlb_inval->pending_lock);
> + tlb_inval->debug_paused = true;
> + cancel_delayed_work(&tlb_inval->fence_tdr);
> + spin_unlock_irq(&tlb_inval->pending_lock);
> +}
[Severity: High]
Can new TLB invalidations issued while tlb_inval->debug_paused is true cause
out-of-order dma_fence signaling and unintended MMIO invalidations during
inspection?
When wedge_pause_work() -> xe_gt_wedge_pause() runs, it calls
xe_tlb_inval_debug_pause() to leave in-flight fences on
tlb_inval->pending_fences unsignaled, and then calls xe_uc_wedge_declare() ->
xe_guc_ct_stop(), which sets ct->state = XE_GUC_CT_STATE_STOPPED without
setting xe->wedged.flag.
However, per-queue TLB invalidation dependency schedulers
(q->tlb_inval[i].dep_scheduler running on gt->tlb_inval.job_wq), in-flight
ioctls, MMU notifiers, VM teardown, and new operations after
XE_WEDGE_REPLY_SKIP are not prevented from calling xe_tlb_inval_range(),
xe_tlb_inval_ggtt(), xe_tlb_inval_all(), or xe_tlb_inval_vm().
Because neither xe_tlb_inval_fence_prep() nor xe_tlb_inval_issue() checks
tlb_inval->debug_paused:
drivers/gpu/drm/xe/xe_tlb_inval.c:xe_tlb_inval_issue() {
mutex_lock(&(__tlb_inval)->seqno_lock);
xe_tlb_inval_fence_prep((__fence));
__ret = op((__tlb_inval), (__fence)->seqno, ##args);
if (__ret < 0)
xe_tlb_inval_fence_signal_unlocked((__fence));
mutex_unlock(&(__tlb_inval)->seqno_lock);
/* Undelivered: fence already signalled, report done */
(__ret == -ECANCELED || __ret == -ENOTRECOVERABLE) ? 0 : __ret;
}
When a subsequent invalidation runs while ct->state is
XE_GUC_CT_STATE_STOPPED, xe_guc_ct_send() returns -ECANCELED.
xe_tlb_inval_issue() then immediately signals the newly issued fence via
xe_tlb_inval_fence_signal_unlocked() and returns 0 while earlier preserved
fences remain unsignaled in tlb_inval->pending_fences.
In xe_tlb_inval_job_push(), jobs on the same (q, gt) xe_dep_scheduler export
&job->dep.drm.s_fence->finished on a shared drm_sched_entity fence context so
that later jobs squash earlier jobs in dma_resv and
q->tlb_inval[idx].last_fence:
drivers/gpu/drm/xe/xe_tlb_inval_job.c:xe_tlb_inval_job_push() {
...
xe_exec_queue_tlb_inval_last_fence_set(job->q, job->vm,
&job->dep.drm.s_fence->finished,
job->idx);
...
return &job->dep.drm.s_fence->finished;
}
If an earlier job's fence is preserved unsignaled in pending_fences and a
later job gets -ECANCELED, the later job's finished fence signals out of order
on that timeline while the earlier fence is still unsignaled, allowing
dma_resv, last_fence waiters, and attached prl_sa suballocations to observe
completion even though neither invalidation completed and the GT was not
reset.
In addition, in send_tlb_inval_ggtt() (called directly or as a dummy
invalidation from send_tlb_inval_ctx_ppgtt() when !last_q &&
!xe_tlb_inval_idle(tlb_inval)):
drivers/gpu/drm/xe/xe_guc_tlb_inval.c:send_tlb_inval_ggtt() {
if (xe_guc_ct_enabled(&guc->ct) && guc->submission_state.initialized) {
return send_tlb_inval(&guc->ct, action, ARRAY_SIZE(action));
} else if (xe_device_uc_enabled(xe) && !xe_wedged(xe)) {
...
CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
if (xe->info.platform == XE_PVC || GRAPHICS_VER(xe) >= 20) {
xe_mmio_write32(mmio, PVC_GUC_TLB_INV_DESC1,
PVC_GUC_TLB_INV_DESC1_INVALIDATE);
xe_mmio_write32(mmio, PVC_GUC_TLB_INV_DESC0,
PVC_GUC_TLB_INV_DESC0_VALID);
} else {
xe_mmio_write32(mmio, GUC_TLB_INV_CR,
GUC_TLB_INV_CR_INVALIDATE);
}
}
return -ECANCELED;
}
Because xe_guc_ct_enabled(&guc->ct) is false while !xe_wedged(xe) remains true
during mode-3 inspection and after skip, wouldn't this wake the GT and write
GuC TLB invalidation MMIO registers during hardware inspection?
[ ... ]
> diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
> index c22c3544adcaa..f7b2ec9d68863 100644
> --- a/drivers/gpu/drm/xe/xe_wedge.c
> +++ b/drivers/gpu/drm/xe/xe_wedge.c
> @@ -17,6 +17,7 @@
> #include "xe_pm.h"
> #include "xe_printk.h"
> #include "xe_sriov.h"
> +#include "xe_tlb_inval.h"
> #include "xe_wedge.h"
>
> /**
> @@ -115,6 +116,9 @@ static void wedge_declare_now(struct xe_device *xe, unsigned long method,
> if (!gts_already_wedged) {
> for_each_initialized_gt(gt, xe, id)
> xe_gt_wedge_declare(gt);
> + } else {
> + for_each_initialized_gt(gt, xe, id)
> + xe_tlb_inval_reset(>->tlb_inval);
> }
[Severity: High]
What happens in wedge_declare_now() if a GT was reset or resumed while
wedge_pause_work() was waiting, or if wedge_pause_work() is re-entered after
xe->wedged.declare_pending is cleared?
First, as noted in the comment on xe_tlb_inval_debug_pause(), a GT reset or
system suspend/resume cycle can run while wedge_pause_work() waits in
wait_event_idle(), restarting the GT and re-enabling GuC CT and submission
while xe_wedged(xe) is still false. When the user then replies
XE_WEDGE_REPLY_CONTINUE, wedge_pause_work() calls
wedge_declare_now(xe, DRM_WEDGE_RECOVERY_NONE, true), which skips
xe_gt_wedge_declare(gt) and calls xe_tlb_inval_reset(>->tlb_inval) directly
while the GT's TLB invalidation backend is active and running.
Second, when wedge_pause_work() finishes, it clears
atomic_set(&xe->wedged.declare_pending, 0):
drivers/gpu/drm/xe/xe_wedge.c:wedge_pause_work() {
...
if (!READ_ONCE(xe->wedged.shutting_down) && reply == XE_WEDGE_REPLY_CONTINUE)
wedge_declare_now(xe, DRM_WEDGE_RECOVERY_NONE, true);
else
xe_info(xe, "Inspection released without permanent wedge; GTs remain stopped\n");
put_runtime_ref:
xe_pm_runtime_put(xe);
clear_pending:
atomic_set(&xe->wedged.declare_pending, 0);
}
Because wedge_request() does not check xe_wedged(xe) in mode 3 before queuing
pause_work again, a subsequent wedge request after XE_WEDGE_REPLY_CONTINUE (or
after another path sets xe->wedged.flag) can re-enter wedge_pause_work() and
call xe_gt_wedge_pause() -> xe_tlb_inval_debug_pause(), setting
tlb_inval->debug_paused = true again. When the user replies
XE_WEDGE_REPLY_CONTINUE to that second pause, wedge_declare_now() returns
early at:
if (atomic_xchg(&xe->wedged.flag, 1))
return;
before reaching xe_tlb_inval_reset(>->tlb_inval), leaving
tlb_inval->debug_paused permanently true.
Furthermore, each time xe_gt_wedge_pause() runs on repeated pauses (or when
xe_gt_wedge_declare() later runs), it calls xe_uc_wedge_declare() ->
xe_guc_submit_wedge():
drivers/gpu/drm/xe/xe_guc_submit.c:xe_guc_submit_wedge() {
...
if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode))) {
mutex_lock(&guc->submission_state.lock);
xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
if (xe_exec_queue_get_unless_zero(q))
set_exec_queue_wedged(q);
mutex_unlock(&guc->submission_state.lock);
}
}
Since xe_guc_submit_wedge() grabs a new reference via
xe_exec_queue_get_unless_zero(q) without checking !exec_queue_wedged(q), while
guc_submit_fini() only drops one reference per wedged queue, wouldn't repeated
calls leak xe_exec_queue references?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261102210242.635207-1-daniel.charles@intel.com?part=2
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 3/3] drm/xe/wedge: request inspection for additional fault paths
2026-11-02 21:02 [PATCH 0/3] drm/xe: Add mode-3 fault inspection with debugfs release Daniel Charles
2026-11-02 21:02 ` [PATCH 1/3] drm/xe/wedge: add " Daniel Charles
2026-11-02 21:02 ` [PATCH 2/3] drm/xe/wedge: preserve pending TLB invalidations during inspection Daniel Charles
@ 2026-11-02 21:02 ` Daniel Charles
2026-11-02 21:27 ` sashiko-bot
2026-11-02 21:31 ` ✗ CI.checkpatch: warning for drm/xe: Add mode-3 fault inspection with debugfs release Patchwork
` (3 subsequent siblings)
6 siblings, 1 reply; 11+ messages in thread
From: Daniel Charles @ 2026-11-02 21:02 UTC (permalink / raw)
To: intel-xe; +Cc: alan.previn.teres.alexis, Daniel Charles
Request mode-3 inspection for unsuccessful pagefault service, GuC memory
CAT errors, and TLB invalidation fence timeouts. Keep the resume-failure
fallback with the TLB timeout trigger so a failed inspection resume
restores normal timeout handling and completes expired fences with -ETIME.
Preserve the existing TLB timeout diagnostics outside inspection.
For MMIO-enabled RAS reset requests, request or join inspection and wait
before preparing PCI reset or disabling the device. Retain the GT-stop
outcome after SKIP or CONTINUE and decline this device's reset request
after either reply. Fall back to normal recovery if inspection aborts
before stopping GTs, except during teardown. Release mode_mutex before
waiting so teardown can abort inspection.
Keep the existing separation between synchronous inspection-only GT
stopping and asynchronous ordinary GT wedging, including the PCI reset
path's worker flushes. Leave frozen-channel recovery and other wedge
modes unchanged.
Inspection can stall shared PCI recovery indefinitely and cannot prevent
resets forced by the PCI core or requested by other devices. Reference
the SKIP and CONTINUE reply constants in the debugfs documentation.
Assisted-by: LLM
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
---
drivers/gpu/drm/xe/xe_debugfs.c | 5 ++--
drivers/gpu/drm/xe/xe_guc_submit.c | 6 +++-
drivers/gpu/drm/xe/xe_pagefault.c | 3 ++
drivers/gpu/drm/xe/xe_pci_error.c | 11 +++++++
drivers/gpu/drm/xe/xe_tlb_inval.c | 36 ++++++++++++++++++++---
drivers/gpu/drm/xe/xe_tlb_inval_types.h | 2 ++
drivers/gpu/drm/xe/xe_wedge.c | 39 ++++++++++++++++++++++++-
drivers/gpu/drm/xe/xe_wedge.h | 1 +
drivers/gpu/drm/xe/xe_wedge_types.h | 7 +++++
9 files changed, 102 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index 911df712f7b0..bd304b42ea26 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -743,8 +743,9 @@ void xe_debugfs_register(struct xe_device *xe)
debugfs_create_file("wedged_mode", 0600, root, xe,
&wedged_mode_fops);
/*
- * Skip is not recovery: GTs remain stopped. Inspection has no automatic
- * timeout. Continue completes permanent wedging, not normal execution.
+ * XE_WEDGE_REPLY_SKIP (SKIP) is not recovery: GTs remain stopped.
+ * Inspection has no automatic timeout. XE_WEDGE_REPLY_CONTINUE
+ * (CONTINUE) completes permanent wedging, not normal execution.
* Preserved TLB fences may block process exit, unbind or unload; a power
* cycle may be necessary. Automatic recovery is not guaranteed.
*/
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 57e258283935..5767296d1e0c 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -3579,12 +3579,15 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
* context. In such case only PF will be notified about that fault.
*/
xe_gt_err_ratelimited(gt, "Memory CAT error reported by GuC!\n");
+ xe_wedge_declare_mode3(gt_to_xe(gt));
return 0;
}
q = g2h_exec_queue_lookup(guc, guc_id);
- if (unlikely(!q))
+ if (unlikely(!q)) {
+ xe_wedge_declare_mode3(gt_to_xe(gt));
return -EPROTO;
+ }
/*
* The type is HW-defined and changes based on platform, so we don't
@@ -3601,6 +3604,7 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
trace_xe_exec_queue_memory_cat_error(q);
+ xe_wedge_declare_mode3(gt_to_xe(gt));
/* Treat the same as engine reset */
xe_guc_exec_queue_reset_trigger_cleanup(q);
diff --git a/drivers/gpu/drm/xe/xe_pagefault.c b/drivers/gpu/drm/xe/xe_pagefault.c
index 5247321c805e..8f96252cd018 100644
--- a/drivers/gpu/drm/xe/xe_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_pagefault.c
@@ -21,6 +21,7 @@
#include "xe_svm.h"
#include "xe_trace_bo.h"
#include "xe_vm.h"
+#include "xe_wedge.h"
/**
* DOC: Xe page faults
@@ -705,10 +706,12 @@ static void xe_pagefault_queue_work(struct work_struct *w)
xe_pagefault_cache_start_invalidate(cache_start);
xe_pagefault_print(pf);
xe_log_err_info(pf->gt, PAGEFAULT, err, "Unsuccessful response\n");
+ xe_wedge_declare_mode3(xe);
} else {
xe_gt_stats_incr(pf->gt, XE_GT_STATS_ID_INVALID_PREFETCH_PAGEFAULT_COUNT, 1);
xe_gt_dbg(pf->gt, "Prefetch Fault response: Unsuccessful %pe\n",
ERR_PTR(err));
+ xe_wedge_declare_mode3(xe);
}
} else {
/* Cache valid fault locally */
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 9bf0da3a3d15..b04c20a7ba28 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -93,6 +93,17 @@ static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
return PCI_ERS_RESULT_DISCONNECT;
}
+ /*
+ * Wait before reset preparation changes device state or disables PCI.
+ * Neither inspection reply recovers the GTs, so decline our reset request.
+ * Frozen-channel recovery bypasses this callback and may force a reset.
+ */
+ if (action == XE_RAS_RECOVERY_ACTION_RESET &&
+ xe_wedge_mode3_wait(xe)) {
+ xe_info(xe, "PCI recovery stopped after mode-3 inspection or teardown; not requesting reset\n");
+ return PCI_ERS_RESULT_DISCONNECT;
+ }
+
return ras_action_to_pci_result(pdev, action);
}
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index 293929f92eb0..ffb839c3b752 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -17,6 +17,7 @@
#include "xe_printk.h"
#include "xe_tlb_inval.h"
#include "xe_trace.h"
+#include "xe_wedge.h"
/**
* DOC: Xe TLB invalidation
@@ -84,15 +85,27 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
int timedout_seqno = 0, seqno_recv = 0;
spin_lock_irq(&tlb_inval->pending_lock);
- if (tlb_inval->debug_paused)
- goto out_unlock;
+ if (tlb_inval->debug_paused) {
+ if (!tlb_inval->debug_pause_pending)
+ goto out_unlock;
+ if (!READ_ONCE(xe->wedged.pause_failed))
+ goto out_rearm;
+ tlb_inval->debug_paused = false;
+ tlb_inval->debug_pause_pending = false;
+ }
spin_unlock_irq(&tlb_inval->pending_lock);
tlb_inval->ops->flush(tlb_inval);
spin_lock_irq(&tlb_inval->pending_lock);
- if (tlb_inval->debug_paused)
- goto out_unlock;
+ if (tlb_inval->debug_paused) {
+ if (!tlb_inval->debug_pause_pending)
+ goto out_unlock;
+ if (!READ_ONCE(xe->wedged.pause_failed))
+ goto out_rearm;
+ tlb_inval->debug_paused = false;
+ tlb_inval->debug_pause_pending = false;
+ }
list_for_each_entry_safe(fence, next,
&tlb_inval->pending_fences, link) {
@@ -106,6 +119,17 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
drm_err(&xe->drm,
"TLB invalidation fence timeout, seqno=%d recv=%d",
fence->seqno, tlb_inval->seqno_recv);
+ if (!READ_ONCE(xe->wedged.pause_failed))
+ xe_wedge_declare_mode3(xe);
+ if (!READ_ONCE(xe->wedged.pause_failed) &&
+ READ_ONCE(xe->wedged.mode) ==
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE &&
+ atomic_read(&xe->wedged.declare_pending)) {
+ tlb_inval->debug_paused = true;
+ tlb_inval->debug_pause_pending = true;
+ /* Keep timeout processing until inspection owns the pause. */
+ goto out_rearm;
+ }
if (!timedout_seqno) {
/*
@@ -128,6 +152,7 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
fence->base.error = -ETIME;
xe_tlb_inval_fence_signal(fence);
}
+out_rearm:
if (!list_empty(&tlb_inval->pending_fences))
queue_delayed_work(tlb_inval->timeout_wq, &tlb_inval->fence_tdr,
timeout_delay);
@@ -194,6 +219,7 @@ int xe_gt_tlb_inval_init_early(struct xe_gt *gt)
INIT_LIST_HEAD(&tlb_inval->pending_fences);
spin_lock_init(&tlb_inval->pending_lock);
tlb_inval->debug_paused = false;
+ tlb_inval->debug_pause_pending = false;
spin_lock_init(&tlb_inval->lock);
INIT_DELAYED_WORK(&tlb_inval->fence_tdr, xe_tlb_inval_fence_timeout);
@@ -233,6 +259,7 @@ void xe_tlb_inval_debug_pause(struct xe_tlb_inval *tlb_inval)
spin_lock_irq(&tlb_inval->pending_lock);
tlb_inval->debug_paused = true;
+ tlb_inval->debug_pause_pending = false;
cancel_delayed_work(&tlb_inval->fence_tdr);
spin_unlock_irq(&tlb_inval->pending_lock);
}
@@ -264,6 +291,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval)
mutex_lock(&tlb_inval->seqno_lock);
spin_lock_irq(&tlb_inval->pending_lock);
tlb_inval->debug_paused = false;
+ tlb_inval->debug_pause_pending = false;
cancel_delayed_work(&tlb_inval->fence_tdr);
/*
* We might have various kworkers waiting for TLB flushes to complete
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
index 7ccd66c2eea7..8e8cb115c9af 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
@@ -114,6 +114,8 @@ struct xe_tlb_inval {
spinlock_t pending_lock;
/** @debug_paused: Preserve mode-3 pending state under pending_lock. */
bool debug_paused;
+ /** @debug_pause_pending: Worker has not taken over; under pending_lock. */
+ bool debug_pause_pending;
/**
* @timedout_seqno: seqno of the most recent timed out TLB
* invalidation, 0 if none. Used to measure how late the ack for a
diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
index f7b2ec9d6886..4ed215991cfe 100644
--- a/drivers/gpu/drm/xe/xe_wedge.c
+++ b/drivers/gpu/drm/xe/xe_wedge.c
@@ -189,7 +189,8 @@ static void wedge_pause_work(struct work_struct *work)
if (!pm_ref) {
xe_warn(xe, "Mode-3 wedge could not retain active runtime PM; resuming for inspection, hardware state may have changed\n");
if (!xe_pm_runtime_resume_and_get(xe)) {
- xe_err(xe, "Failed to resume device for mode-3 inspection; aborting pause\n");
+ xe_err(xe, "Failed to resume device for mode-3 inspection; restoring TLB timeout handling\n");
+ WRITE_ONCE(xe->wedged.pause_failed, true);
goto clear_pending;
}
}
@@ -197,8 +198,10 @@ static void wedge_pause_work(struct work_struct *work)
if (READ_ONCE(xe->wedged.shutting_down))
goto put_runtime_ref;
+ WRITE_ONCE(xe->wedged.pause_failed, false);
for_each_initialized_gt(gt, xe, id)
xe_gt_wedge_pause(gt);
+ WRITE_ONCE(xe->wedged.pause_stopped, true);
spin_lock_irqsave(&xe->wedged.mode_lock, flags);
WRITE_ONCE(xe->wedged.reply, 0);
@@ -294,6 +297,39 @@ void xe_wedge_declare_mode3(struct xe_device *xe)
wedge_request(xe, DRM_WEDGE_RECOVERY_NONE, true);
}
+/**
+ * xe_wedge_mode3_wait() - Inspect a recoverable PCI error before reset
+ * @xe: Device with accessible MMIO, kept alive by the caller
+ *
+ * Request or join mode-3 inspection and wait for its worker to finish.
+ * Do not hold mode_mutex while waiting; teardown needs it to abort inspection.
+ * Waiting has no timeout and can stall recovery and removal of devices in the
+ * same PCI hierarchy. Other devices can request reset after this callback
+ * returns; frozen-channel recovery can force reset regardless of our vote.
+ *
+ * Return: true if reset must be declined because inspection stopped the GTs,
+ * the device is wedged, or teardown started. Otherwise, normal recovery may
+ * proceed.
+ */
+bool xe_wedge_mode3_wait(struct xe_device *xe)
+{
+ mutex_lock(&xe->wedged.mode_mutex);
+ if (READ_ONCE(xe->wedged.mode) !=
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE) {
+ mutex_unlock(&xe->wedged.mode_mutex);
+ return false;
+ }
+
+ if (!READ_ONCE(xe->wedged.pause_stopped) && !xe_wedged(xe))
+ xe_wedge_declare_mode3(xe);
+ mutex_unlock(&xe->wedged.mode_mutex);
+
+ flush_work(&xe->wedged.pause_work);
+
+ return READ_ONCE(xe->wedged.pause_stopped) ||
+ READ_ONCE(xe->wedged.shutting_down) || xe_wedged(xe);
+}
+
/**
* xe_wedge_prepare_fini() - Release and join mode-3 inspection before teardown
* @xe: Xe device
@@ -474,6 +510,7 @@ static void xe_wedge_fini(struct drm_device *drm, void *arg)
*/
int xe_wedge_init(struct xe_device *xe)
{
+ xe->wedged.pause_stopped = false;
INIT_WORK(&xe->wedged.work, wedge_work);
INIT_WORK(&xe->wedged.pause_work, wedge_pause_work);
xe->wedged.pause_workqueue = alloc_workqueue("xe_wedge_pause", WQ_UNBOUND, 1);
diff --git a/drivers/gpu/drm/xe/xe_wedge.h b/drivers/gpu/drm/xe/xe_wedge.h
index 3fef49d448f5..c74cb0ec42c8 100644
--- a/drivers/gpu/drm/xe/xe_wedge.h
+++ b/drivers/gpu/drm/xe/xe_wedge.h
@@ -19,6 +19,7 @@ static inline bool xe_wedged(struct xe_device *xe)
void xe_wedge_declare(struct xe_device *xe, unsigned long method);
void xe_wedge_declare_mode3(struct xe_device *xe);
+bool xe_wedge_mode3_wait(struct xe_device *xe);
void xe_wedge_prepare_fini(struct xe_device *xe);
int xe_wedge_set_reply(struct xe_device *xe, u32 reply);
int xe_wedge_init(struct xe_device *xe);
diff --git a/drivers/gpu/drm/xe/xe_wedge_types.h b/drivers/gpu/drm/xe/xe_wedge_types.h
index d64a4db49e4c..a9da9e2dc1cd 100644
--- a/drivers/gpu/drm/xe/xe_wedge_types.h
+++ b/drivers/gpu/drm/xe/xe_wedge_types.h
@@ -72,6 +72,13 @@ struct xe_wedge {
struct workqueue_struct *pause_workqueue;
/** @pause_pm_ref: Queued worker's reference, protected by mode_lock. */
bool pause_pm_ref;
+ /** @pause_failed: Suppress TLB-triggered inspection after resume failure. */
+ bool pause_failed;
+ /**
+ * @pause_stopped: Inspection stopped the GTs at least once.
+ * Remains set after SKIP or CONTINUE; neither restarts the GTs.
+ */
+ bool pause_stopped;
/** @pause_waitq: Wait for a reply or teardown. */
wait_queue_head_t pause_waitq;
/** @wait_active: Inspection is accepting replies under mode_lock. */
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 3/3] drm/xe/wedge: request inspection for additional fault paths
2026-11-02 21:02 ` [PATCH 3/3] drm/xe/wedge: request inspection for additional fault paths Daniel Charles
@ 2026-11-02 21:27 ` sashiko-bot
0 siblings, 0 replies; 11+ messages in thread
From: sashiko-bot @ 2026-11-02 21:27 UTC (permalink / raw)
To: Daniel Charles, intel-xe
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] drm/xe: infinite TDR loop in xe_tlb_inval_fence_timeout() on aborted pause
- [High] drm/xe: wedge_request() re-runs mode-3 pause after CONTINUE or SKIP
- [Medium] drm/xe: stale pause_failed in wedge_pause_work() blocks TLB inspection
--
commit dd97fca485155b946444998386ef977057638b19
Author: Daniel Charles <daniel.charles@intel.com>
drm/xe/wedge: request inspection for additional fault paths
This commit extends mode-3 wedge inspection to cover unsuccessful pagefault
service, GuC memory CAT errors, TLB invalidation fence timeouts, and
MMIO-enabled RAS reset requests. It also adds fallback handling for TLB
timeout inspection when runtime PM resume fails.
> diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
> index 293929f92eb0f..ffb839c3b7524 100644
> --- a/drivers/gpu/drm/xe/xe_tlb_inval.c
> +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
> @@ -17,6 +17,7 @@
> #include "xe_printk.h"
> #include "xe_tlb_inval.h"
> #include "xe_trace.h"
> +#include "xe_wedge.h"
>
> /**
> * DOC: Xe TLB invalidation
> @@ -84,15 +85,27 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
> int timedout_seqno = 0, seqno_recv = 0;
>
> spin_lock_irq(&tlb_inval->pending_lock);
> - if (tlb_inval->debug_paused)
> - goto out_unlock;
> + if (tlb_inval->debug_paused) {
> + if (!tlb_inval->debug_pause_pending)
> + goto out_unlock;
> + if (!READ_ONCE(xe->wedged.pause_failed))
> + goto out_rearm;
> + tlb_inval->debug_paused = false;
> + tlb_inval->debug_pause_pending = false;
> + }
> spin_unlock_irq(&tlb_inval->pending_lock);
>
> tlb_inval->ops->flush(tlb_inval);
>
> spin_lock_irq(&tlb_inval->pending_lock);
> - if (tlb_inval->debug_paused)
> - goto out_unlock;
> + if (tlb_inval->debug_paused) {
> + if (!tlb_inval->debug_pause_pending)
> + goto out_unlock;
> + if (!READ_ONCE(xe->wedged.pause_failed))
> + goto out_rearm;
> + tlb_inval->debug_paused = false;
> + tlb_inval->debug_pause_pending = false;
> + }
>
> list_for_each_entry_safe(fence, next,
> &tlb_inval->pending_fences, link) {
> @@ -106,6 +119,17 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
> drm_err(&xe->drm,
> "TLB invalidation fence timeout, seqno=%d recv=%d",
> fence->seqno, tlb_inval->seqno_recv);
> + if (!READ_ONCE(xe->wedged.pause_failed))
> + xe_wedge_declare_mode3(xe);
> + if (!READ_ONCE(xe->wedged.pause_failed) &&
> + READ_ONCE(xe->wedged.mode) ==
> + XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE &&
> + atomic_read(&xe->wedged.declare_pending)) {
> + tlb_inval->debug_paused = true;
> + tlb_inval->debug_pause_pending = true;
> + /* Keep timeout processing until inspection owns the pause. */
> + goto out_rearm;
> + }
[Severity: High]
Can xe_tlb_inval_fence_timeout() get stuck in an infinite out_rearm loop if
wedge_pause_work() exits without calling xe_tlb_inval_debug_pause() and
without setting xe->wedged.pause_failed?
When both tlb_inval->debug_paused and tlb_inval->debug_pause_pending are set,
subsequent runs of xe_tlb_inval_fence_timeout() only exit the re-arm loop if
debug_pause_pending is cleared by xe_tlb_inval_debug_pause() or if
xe->wedged.pause_failed becomes true.
However, wedge_pause_work() can finish and reset xe->wedged.declare_pending
to 0 with pause_failed still false in two ways:
1. If xe_wedge_prepare_fini() sets xe->wedged.shutting_down = true during
teardown before wedge_pause_work() reaches the for_each_initialized_gt()
loop:
drivers/gpu/drm/xe/xe_wedge.c:wedge_pause_work() {
if (READ_ONCE(xe->wedged.shutting_down)) {
if (pm_ref)
goto put_runtime_ref;
goto clear_pending;
}
...
if (READ_ONCE(xe->wedged.shutting_down))
goto put_runtime_ref;
}
2. If wedge_pause_work() has already executed its xe_gt_wedge_pause() loop
and declare_pending is still 1 (for example, after wedge_declare_now() runs
xe_tlb_inval_reset() on XE_WEDGE_REPLY_CONTINUE, or after a concurrent GT
reset clears debug_paused while waiting in wait_event_idle()) when another
TLB fence times out and sets debug_paused = true and
debug_pause_pending = true.
In both cases, once declare_pending is cleared to 0, debug_paused and
debug_pause_pending remain true while pause_failed is false. Because
debug_paused is true, xe_tlb_inval_done_handler() ignores incoming TLB
completions, and xe_tlb_inval_fence_timeout() re-arms fence_tdr forever
without signaling the expired fences with -ETIME, hanging callers waiting on
pending TLB fences during xe_pci_remove().
> diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
> index f7b2ec9d68863..4ed215991cfe1 100644
> --- a/drivers/gpu/drm/xe/xe_wedge.c
> +++ b/drivers/gpu/drm/xe/xe_wedge.c
> @@ -189,7 +189,8 @@ static void wedge_pause_work(struct work_struct *work)
> if (!pm_ref) {
> xe_warn(xe, "Mode-3 wedge could not retain active runtime PM; resuming for inspection, hardware state may have changed\n");
> if (!xe_pm_runtime_resume_and_get(xe)) {
> - xe_err(xe, "Failed to resume device for mode-3 inspection; aborting pause\n");
> + xe_err(xe, "Failed to resume device for mode-3 inspection; restoring TLB timeout handling\n");
> + WRITE_ONCE(xe->wedged.pause_failed, true);
> goto clear_pending;
> }
> }
> @@ -197,8 +198,10 @@ static void wedge_pause_work(struct work_struct *work)
> if (READ_ONCE(xe->wedged.shutting_down))
> goto put_runtime_ref;
>
> + WRITE_ONCE(xe->wedged.pause_failed, false);
[Severity: Medium]
Once wedge_pause_work() sets xe->wedged.pause_failed = true on a runtime PM
resume failure, how is pause_failed cleared for subsequent TLB invalidation
timeouts?
In xe_tlb_inval_fence_timeout(), xe_wedge_declare_mode3(xe) is guarded by
!READ_ONCE(xe->wedged.pause_failed):
if (!READ_ONCE(xe->wedged.pause_failed))
xe_wedge_declare_mode3(xe);
After xe_tlb_inval_fence_timeout() observes pause_failed == true, clears
debug_paused and debug_pause_pending, and signals the expired fences with
-ETIME, nothing resets pause_failed to false except a future execution of
wedge_pause_work(). Because future TLB invalidation timeouts skip calling
xe_wedge_declare_mode3(xe) while pause_failed is true, TLB-triggered mode-3
inspection remains disabled indefinitely after a single failed resume.
In addition, if a later non-TLB fault (such as a pagefault or GuC CAT error)
calls xe_wedge_declare_mode3(xe) -> wedge_request(), pause_failed is still
true until wedge_pause_work() is scheduled and reaches WRITE_ONCE(...,
false), so any concurrent xe_tlb_inval_fence_timeout() will fail pending TLB
fences with -ETIME instead of pausing them for the new inspection.
> for_each_initialized_gt(gt, xe, id)
> xe_gt_wedge_pause(gt);
> + WRITE_ONCE(xe->wedged.pause_stopped, true);
>
> spin_lock_irqsave(&xe->wedged.mode_lock, flags);
> WRITE_ONCE(xe->wedged.reply, 0);
> @@ -294,6 +297,39 @@ void xe_wedge_declare_mode3(struct xe_device *xe)
> wedge_request(xe, DRM_WEDGE_RECOVERY_NONE, true);
> }
>
> +/**
> + * xe_wedge_mode3_wait() - Inspect a recoverable PCI error before reset
> + * @xe: Device with accessible MMIO, kept alive by the caller
> + *
> + * Request or join mode-3 inspection and wait for its worker to finish.
> + * Do not hold mode_mutex while waiting; teardown needs it to abort inspection.
> + * Waiting has no timeout and can stall recovery and removal of devices in the
> + * same PCI hierarchy. Other devices can request reset after this callback
> + * returns; frozen-channel recovery can force reset regardless of our vote.
> + *
> + * Return: true if reset must be declined because inspection stopped the GTs,
> + * the device is wedged, or teardown started. Otherwise, normal recovery may
> + * proceed.
> + */
> +bool xe_wedge_mode3_wait(struct xe_device *xe)
> +{
> + mutex_lock(&xe->wedged.mode_mutex);
> + if (READ_ONCE(xe->wedged.mode) !=
> + XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE) {
> + mutex_unlock(&xe->wedged.mode_mutex);
> + return false;
> + }
> +
> + if (!READ_ONCE(xe->wedged.pause_stopped) && !xe_wedged(xe))
> + xe_wedge_declare_mode3(xe);
[Severity: High]
Should wedge_request() also check xe->wedged.pause_stopped and xe_wedged(xe)
before setting declare_pending and queuing pause_work?
Here in xe_wedge_mode3_wait(), xe_wedge_declare_mode3(xe) is skipped if
pause_stopped or xe_wedged(xe) is true. However, direct callers of
xe_wedge_declare_mode3() and xe_wedge_declare() (such as
xe_pagefault_queue_work() draining additional failed faults in pf_queue,
xe_guc_exec_queue_memory_cat_error_handler(), or xe_tlb_inval_fence_timeout())
go straight to wedge_request(), which only checks shutting_down and
declare_pending.
When wedge_pause_work() finishes after XE_WEDGE_REPLY_CONTINUE or
XE_WEDGE_REPLY_SKIP and resets declare_pending to 0, any subsequent fault
calls wedge_request() and queues wedge_pause_work() again:
1. After XE_WEDGE_REPLY_CONTINUE has already wedged the device and called
xe_tlb_inval_reset(), a second run of wedge_pause_work() calls
xe_gt_wedge_pause() -> xe_tlb_inval_debug_pause(), setting
tlb_inval->debug_paused = true again. Even if the user writes
XE_WEDGE_REPLY_CONTINUE a second time, wedge_declare_now() returns early at:
if (atomic_xchg(&xe->wedged.flag, 1))
return;
without calling xe_tlb_inval_reset(), leaving TLB invalidations permanently
paused.
2. Each repeated execution of xe_gt_wedge_pause() -> xe_uc_wedge_declare() ->
xe_guc_submit_wedge() walks guc->submission_state.exec_queue_lookup and takes
another reference on every queue via xe_exec_queue_get_unless_zero(q) before
calling set_exec_queue_wedged(q), whereas guc_submit_fini() only drops one
reference per wedged queue, leaking xe_exec_queue references.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261102210242.635207-1-daniel.charles@intel.com?part=3
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe: Add mode-3 fault inspection with debugfs release
2026-11-02 21:02 [PATCH 0/3] drm/xe: Add mode-3 fault inspection with debugfs release Daniel Charles
` (2 preceding siblings ...)
2026-11-02 21:02 ` [PATCH 3/3] drm/xe/wedge: request inspection for additional fault paths Daniel Charles
@ 2026-11-02 21:31 ` Patchwork
2026-11-02 21:33 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-11-02 21:31 UTC (permalink / raw)
To: Daniel Charles; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Add mode-3 fault inspection with debugfs release
URL : https://patchwork.freedesktop.org/series/177508/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
3009867cd31863246e4afc138520a7a8bd37bb11
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit fad02e4322897dc99550f7bb558a899ab756bbec
Author: Daniel Charles <daniel.charles@intel.com>
Date: Mon Nov 2 13:02:42 2026 -0800
drm/xe/wedge: request inspection for additional fault paths
Request mode-3 inspection for unsuccessful pagefault service, GuC memory
CAT errors, and TLB invalidation fence timeouts. Keep the resume-failure
fallback with the TLB timeout trigger so a failed inspection resume
restores normal timeout handling and completes expired fences with -ETIME.
Preserve the existing TLB timeout diagnostics outside inspection.
For MMIO-enabled RAS reset requests, request or join inspection and wait
before preparing PCI reset or disabling the device. Retain the GT-stop
outcome after SKIP or CONTINUE and decline this device's reset request
after either reply. Fall back to normal recovery if inspection aborts
before stopping GTs, except during teardown. Release mode_mutex before
waiting so teardown can abort inspection.
Keep the existing separation between synchronous inspection-only GT
stopping and asynchronous ordinary GT wedging, including the PCI reset
path's worker flushes. Leave frozen-channel recovery and other wedge
modes unchanged.
Inspection can stall shared PCI recovery indefinitely and cannot prevent
resets forced by the PCI core or requested by other devices. Reference
the SKIP and CONTINUE reply constants in the debugfs documentation.
Assisted-by: LLM
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
+ /mt/dim checkpatch 2cd78713d917a02987f21b437561a5e1e13ddda2 drm-intel
6cbd14759b3f drm/xe/wedge: add fault inspection with debugfs release
879f69e79bd1 drm/xe/wedge: preserve pending TLB invalidations during inspection
-:19: WARNING:BAD_SIGN_OFF: Non-standard signature: Assisted-by:
#19:
Assisted-by: LLM
-:19: ERROR:BAD_SIGN_OFF: Unrecognized email address: 'LLM'
#19:
Assisted-by: LLM
total: 1 errors, 1 warnings, 0 checks, 139 lines checked
fad02e432289 drm/xe/wedge: request inspection for additional fault paths
-:28: WARNING:BAD_SIGN_OFF: Non-standard signature: Assisted-by:
#28:
Assisted-by: LLM
-:28: ERROR:BAD_SIGN_OFF: Unrecognized email address: 'LLM'
#28:
Assisted-by: LLM
total: 1 errors, 1 warnings, 0 checks, 246 lines checked
^ permalink raw reply [flat|nested] 11+ messages in thread* ✓ CI.KUnit: success for drm/xe: Add mode-3 fault inspection with debugfs release
2026-11-02 21:02 [PATCH 0/3] drm/xe: Add mode-3 fault inspection with debugfs release Daniel Charles
` (3 preceding siblings ...)
2026-11-02 21:31 ` ✗ CI.checkpatch: warning for drm/xe: Add mode-3 fault inspection with debugfs release Patchwork
@ 2026-11-02 21:33 ` Patchwork
2026-11-02 22:08 ` ✓ Xe.CI.BAT: " Patchwork
2026-11-03 0:08 ` ✓ Xe.CI.FULL: " Patchwork
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-11-02 21:33 UTC (permalink / raw)
To: Daniel Charles; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Add mode-3 fault inspection with debugfs release
URL : https://patchwork.freedesktop.org/series/177508/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[21:31:36] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:31:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:32:01] Starting KUnit Kernel (1/1)...
[21:32:01] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:32:01] ================= gpu_buddy (14 subtests) ==================
[21:32:01] [PASSED] gpu_test_buddy_alloc_limit
[21:32:01] [PASSED] gpu_test_buddy_alloc_optimistic
[21:32:01] [PASSED] gpu_test_buddy_alloc_pessimistic
[21:32:01] [PASSED] gpu_test_buddy_alloc_pathological
[21:32:01] [PASSED] gpu_test_buddy_alloc_contiguous
[21:32:01] [PASSED] gpu_test_buddy_alloc_clear
[21:32:01] [PASSED] gpu_test_buddy_alloc_range
[21:32:02] [PASSED] gpu_test_buddy_alloc_range_bias
[21:32:03] [PASSED] gpu_test_buddy_fragmentation_performance
[21:32:03] [PASSED] gpu_test_buddy_dirty_tracker_performance
[21:32:03] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[21:32:03] [PASSED] gpu_test_buddy_offset_aligned_allocation
[21:32:03] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[21:32:03] [PASSED] gpu_test_buddy_addr_to_block
[21:32:03] ==================== [PASSED] gpu_buddy ====================
[21:32:03] ============================================================
[21:32:03] Testing complete. Ran 14 tests: passed: 14
[21:32:03] Elapsed time: 27.735s total, 5.155s configuring, 20.512s building, 2.019s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[21:32:04] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:32:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:32:45] Starting KUnit Kernel (1/1)...
[21:32:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:32:45] ================== guc_buf (11 subtests) ===================
[21:32:45] [PASSED] test_smallest
[21:32:45] [PASSED] test_largest
[21:32:45] [PASSED] test_granular
[21:32:45] [PASSED] test_unique
[21:32:45] [PASSED] test_overlap
[21:32:45] [PASSED] test_reusable
[21:32:45] [PASSED] test_too_big
[21:32:45] [PASSED] test_flush
[21:32:45] [PASSED] test_lookup
[21:32:45] [PASSED] test_data
[21:32:45] [PASSED] test_class
[21:32:45] ===================== [PASSED] guc_buf =====================
[21:32:45] =================== guc_dbm (7 subtests) ===================
[21:32:45] [PASSED] test_empty
[21:32:45] [PASSED] test_default
[21:32:45] ======================== test_size ========================
[21:32:45] [PASSED] 4
[21:32:45] [PASSED] 8
[21:32:45] [PASSED] 32
[21:32:45] [PASSED] 256
[21:32:45] ==================== [PASSED] test_size ====================
[21:32:45] ======================= test_reuse ========================
[21:32:45] [PASSED] 4
[21:32:45] [PASSED] 8
[21:32:45] [PASSED] 32
[21:32:45] [PASSED] 256
[21:32:45] =================== [PASSED] test_reuse ====================
[21:32:45] =================== test_range_overlap ====================
[21:32:45] [PASSED] 4
[21:32:45] [PASSED] 8
[21:32:45] [PASSED] 32
[21:32:45] [PASSED] 256
[21:32:45] =============== [PASSED] test_range_overlap ================
[21:32:45] =================== test_range_compact ====================
[21:32:45] [PASSED] 4
[21:32:45] [PASSED] 8
[21:32:45] [PASSED] 32
[21:32:45] [PASSED] 256
[21:32:45] =============== [PASSED] test_range_compact ================
[21:32:45] ==================== test_range_spare =====================
[21:32:45] [PASSED] 4
[21:32:45] [PASSED] 8
[21:32:45] [PASSED] 32
[21:32:45] [PASSED] 256
[21:32:45] ================ [PASSED] test_range_spare =================
[21:32:45] ===================== [PASSED] guc_dbm =====================
[21:32:45] ================== guc_idm (22 subtests) ===================
[21:32:45] [PASSED] bad_init
[21:32:45] [PASSED] no_init
[21:32:45] [PASSED] init_fini
[21:32:45] [PASSED] check_init_small
[21:32:45] [PASSED] check_init_shared
[21:32:45] [PASSED] check_used
[21:32:45] [PASSED] check_quota
[21:32:45] [PASSED] check_all
[21:32:45] [PASSED] check_limits
[21:32:45] [PASSED] check_overlap
[21:32:45] [PASSED] check_overlap_alloc
[21:32:45] [PASSED] check_overlap_release
[21:32:45] [PASSED] check_overlap_partial_init
[21:32:45] [PASSED] check_overlap_partial_shared_range_blocking
[21:32:45] [PASSED] check_used_usable
[21:32:45] [PASSED] check_used_shareable
[21:32:45] [PASSED] check_used_mixed
[21:32:45] [PASSED] check_release_usable_range
[21:32:45] [PASSED] check_release_shareable_range
[21:32:45] [PASSED] check_split_boundaries
[21:32:45] [PASSED] check_shareable_spare
[21:32:45] [PASSED] check_shareable_spare_fragmented_tail
[21:32:45] ===================== [PASSED] guc_idm =====================
[21:32:45] ============== guc_klv_helpers (13 subtests) ===============
[21:32:45] [PASSED] test_count
[21:32:45] [PASSED] test_encode_u32
[21:32:45] [PASSED] test_encode_u64
[21:32:45] [PASSED] test_encode_string
[21:32:45] [PASSED] test_encode_object_raw
[21:32:45] [PASSED] test_encode_object_klv
[21:32:45] [PASSED] test_encode_object_nested
[21:32:45] [PASSED] test_encode_object_basic
[21:32:45] ===================== test_decode_u16 =====================
[21:32:45] [PASSED] empty
[21:32:45] [PASSED] valid
[21:32:45] [PASSED] max
[21:32:45] [PASSED] big
[21:32:45] [PASSED] long
[21:32:45] ================= [PASSED] test_decode_u16 =================
[21:32:45] ===================== test_decode_u32 =====================
[21:32:45] [PASSED] empty
[21:32:45] [PASSED] valid
[21:32:45] [PASSED] max
[21:32:45] [PASSED] long
[21:32:45] ================= [PASSED] test_decode_u32 =================
[21:32:45] ===================== test_decode_u64 =====================
[21:32:45] [PASSED] empty
[21:32:45] [PASSED] short
[21:32:45] [PASSED] valid
[21:32:45] [PASSED] max
[21:32:45] [PASSED] long
[21:32:45] ================= [PASSED] test_decode_u64 =================
[21:32:45] ===================== test_decode_str =====================
[21:32:45] [PASSED] empty
[21:32:45] [PASSED] one
[21:32:45] [PASSED] one_trash
[21:32:45] [PASSED] two
[21:32:45] [PASSED] two_trash
[21:32:45] [PASSED] three
[21:32:45] [PASSED] dword
[21:32:45] [PASSED] four
[21:32:45] [PASSED] five
[21:32:45] [PASSED] six
[21:32:45] [PASSED] seven
[21:32:45] [PASSED] qword
[21:32:45] ================= [PASSED] test_decode_str =================
[21:32:45] [PASSED] test_print
[21:32:45] ================= [PASSED] guc_klv_helpers =================
[21:32:45] =================== xe_log (4 subtests) ====================
[21:32:45] [PASSED] demo_cper
[21:32:45] [PASSED] demo_dmesg
[21:32:45] ======================= test_dmesg ========================
[21:32:45] [PASSED] test_fatal
[21:32:45] [PASSED] test_fatal_tile
[21:32:45] [PASSED] test_fatal_gt
[21:32:45] [PASSED] test_fatal_comp
[21:32:45] [PASSED] test_fatal_comp_tile
[21:32:45] [PASSED] test_fatal_comp_gt
[21:32:45] [PASSED] test_fatal_all
[21:32:45] [PASSED] test_recoverable
[21:32:45] [PASSED] test_recoverable_tile
[21:32:45] [PASSED] test_recoverable_gt
[21:32:45] [PASSED] test_recoverable_comp
[21:32:45] [PASSED] test_recoverable_comp_tile
[21:32:45] [PASSED] test_recoverable_comp_gt
[21:32:45] [PASSED] test_recoverable_all
[21:32:45] [PASSED] test_info
[21:32:45] [PASSED] test_info_tile
[21:32:45] [PASSED] test_info_gt
[21:32:45] [PASSED] test_info_err
[21:32:45] [PASSED] test_info_comp
[21:32:45] [PASSED] test_info_comp_tile
[21:32:45] [PASSED] test_info_comp_gt
[21:32:45] [PASSED] test_info_all
[21:32:45] [PASSED] test_hw_fatal
[21:32:45] [PASSED] test_hw_recoverable
[21:32:45] [PASSED] test_hw_corrected
[21:32:45] [PASSED] test_hw_informational
[21:32:45] =================== [PASSED] test_dmesg ====================
[21:32:45] ====================== test_invalid =======================
[21:32:45] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[21:32:45] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[21:32:45] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[21:32:45] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[21:32:45] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[21:32:45] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[21:32:45] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[21:32:45] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[21:32:45] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[21:32:45] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[21:32:45] ================== [SKIPPED] test_invalid ==================
[21:32:45] ===================== [PASSED] xe_log ======================
[21:32:45] ================== no_relay (3 subtests) ===================
[21:32:45] [PASSED] xe_drops_guc2pf_if_not_ready
[21:32:45] [PASSED] xe_drops_guc2vf_if_not_ready
[21:32:45] [PASSED] xe_rejects_send_if_not_ready
[21:32:45] ==================== [PASSED] no_relay =====================
[21:32:45] ================== pf_relay (14 subtests) ==================
[21:32:45] [PASSED] pf_rejects_guc2pf_too_short
[21:32:45] [PASSED] pf_rejects_guc2pf_too_long
[21:32:45] [PASSED] pf_rejects_guc2pf_no_payload
[21:32:45] [PASSED] pf_fails_no_payload
[21:32:45] [PASSED] pf_fails_bad_origin
[21:32:45] [PASSED] pf_fails_bad_type
[21:32:45] [PASSED] pf_txn_reports_error
[21:32:45] [PASSED] pf_txn_sends_pf2guc
[21:32:45] [PASSED] pf_sends_pf2guc
[21:32:45] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:32:45] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:32:45] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:32:45] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:32:45] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:32:45] ==================== [PASSED] pf_relay =====================
[21:32:45] ================== vf_relay (3 subtests) ===================
[21:32:45] [PASSED] vf_rejects_guc2vf_too_short
[21:32:45] [PASSED] vf_rejects_guc2vf_too_long
[21:32:45] [PASSED] vf_rejects_guc2vf_no_payload
[21:32:45] ==================== [PASSED] vf_relay =====================
[21:32:45] ================ pf_gt_config (9 subtests) =================
[21:32:45] [PASSED] fair_contexts_1vf
[21:32:45] [PASSED] fair_doorbells_1vf
[21:32:45] [PASSED] fair_ggtt_1vf
[21:32:45] ====================== fair_vram_1vf ======================
[21:32:45] [PASSED] 3.50 GiB
[21:32:45] [PASSED] 11.5 GiB
[21:32:45] [PASSED] 15.5 GiB
[21:32:45] [PASSED] 31.5 GiB
[21:32:45] [PASSED] 63.5 GiB
[21:32:45] [PASSED] 1.91 GiB
[21:32:45] ================== [PASSED] fair_vram_1vf ==================
[21:32:45] ================ fair_vram_1vf_admin_only =================
[21:32:45] [PASSED] 3.50 GiB
[21:32:45] [PASSED] 11.5 GiB
[21:32:45] [PASSED] 15.5 GiB
[21:32:45] [PASSED] 31.5 GiB
[21:32:45] [PASSED] 63.5 GiB
[21:32:45] [PASSED] 1.91 GiB
[21:32:45] ============ [PASSED] fair_vram_1vf_admin_only =============
[21:32:45] ====================== fair_contexts ======================
[21:32:45] [PASSED] 1 VF
[21:32:45] [PASSED] 2 VFs
[21:32:45] [PASSED] 3 VFs
[21:32:45] [PASSED] 4 VFs
[21:32:45] [PASSED] 5 VFs
[21:32:45] [PASSED] 6 VFs
[21:32:45] [PASSED] 7 VFs
[21:32:45] [PASSED] 8 VFs
[21:32:45] [PASSED] 9 VFs
[21:32:45] [PASSED] 10 VFs
[21:32:45] [PASSED] 11 VFs
[21:32:45] [PASSED] 12 VFs
[21:32:45] [PASSED] 13 VFs
[21:32:45] [PASSED] 14 VFs
[21:32:45] [PASSED] 15 VFs
[21:32:45] [PASSED] 16 VFs
[21:32:45] [PASSED] 17 VFs
[21:32:45] [PASSED] 18 VFs
[21:32:45] [PASSED] 19 VFs
[21:32:45] [PASSED] 20 VFs
[21:32:45] [PASSED] 21 VFs
[21:32:45] [PASSED] 22 VFs
[21:32:45] [PASSED] 23 VFs
[21:32:45] [PASSED] 24 VFs
[21:32:45] [PASSED] 25 VFs
[21:32:45] [PASSED] 26 VFs
[21:32:45] [PASSED] 27 VFs
[21:32:45] [PASSED] 28 VFs
[21:32:45] [PASSED] 29 VFs
[21:32:45] [PASSED] 30 VFs
[21:32:45] [PASSED] 31 VFs
[21:32:45] [PASSED] 32 VFs
[21:32:45] [PASSED] 33 VFs
[21:32:45] [PASSED] 34 VFs
[21:32:45] [PASSED] 35 VFs
[21:32:45] [PASSED] 36 VFs
[21:32:45] [PASSED] 37 VFs
[21:32:45] [PASSED] 38 VFs
[21:32:45] [PASSED] 39 VFs
[21:32:45] [PASSED] 40 VFs
[21:32:45] [PASSED] 41 VFs
[21:32:45] [PASSED] 42 VFs
[21:32:45] [PASSED] 43 VFs
[21:32:45] [PASSED] 44 VFs
[21:32:45] [PASSED] 45 VFs
[21:32:45] [PASSED] 46 VFs
[21:32:45] [PASSED] 47 VFs
[21:32:45] [PASSED] 48 VFs
[21:32:45] [PASSED] 49 VFs
[21:32:45] [PASSED] 50 VFs
[21:32:45] [PASSED] 51 VFs
[21:32:45] [PASSED] 52 VFs
[21:32:45] [PASSED] 53 VFs
[21:32:45] [PASSED] 54 VFs
[21:32:45] [PASSED] 55 VFs
[21:32:45] [PASSED] 56 VFs
[21:32:45] [PASSED] 57 VFs
[21:32:45] [PASSED] 58 VFs
[21:32:45] [PASSED] 59 VFs
[21:32:45] [PASSED] 60 VFs
[21:32:45] [PASSED] 61 VFs
[21:32:45] [PASSED] 62 VFs
[21:32:45] [PASSED] 63 VFs
[21:32:45] ================== [PASSED] fair_contexts ==================
[21:32:45] ===================== fair_doorbells ======================
[21:32:45] [PASSED] 1 VF
[21:32:45] [PASSED] 2 VFs
[21:32:45] [PASSED] 3 VFs
[21:32:45] [PASSED] 4 VFs
[21:32:45] [PASSED] 5 VFs
[21:32:45] [PASSED] 6 VFs
[21:32:45] [PASSED] 7 VFs
[21:32:45] [PASSED] 8 VFs
[21:32:45] [PASSED] 9 VFs
[21:32:45] [PASSED] 10 VFs
[21:32:45] [PASSED] 11 VFs
[21:32:45] [PASSED] 12 VFs
[21:32:45] [PASSED] 13 VFs
[21:32:45] [PASSED] 14 VFs
[21:32:45] [PASSED] 15 VFs
[21:32:45] [PASSED] 16 VFs
[21:32:45] [PASSED] 17 VFs
[21:32:45] [PASSED] 18 VFs
[21:32:45] [PASSED] 19 VFs
[21:32:45] [PASSED] 20 VFs
[21:32:45] [PASSED] 21 VFs
[21:32:45] [PASSED] 22 VFs
[21:32:45] [PASSED] 23 VFs
[21:32:45] [PASSED] 24 VFs
[21:32:45] [PASSED] 25 VFs
[21:32:45] [PASSED] 26 VFs
[21:32:45] [PASSED] 27 VFs
[21:32:45] [PASSED] 28 VFs
[21:32:45] [PASSED] 29 VFs
[21:32:45] [PASSED] 30 VFs
[21:32:45] [PASSED] 31 VFs
[21:32:45] [PASSED] 32 VFs
[21:32:45] [PASSED] 33 VFs
[21:32:45] [PASSED] 34 VFs
[21:32:45] [PASSED] 35 VFs
[21:32:45] [PASSED] 36 VFs
[21:32:45] [PASSED] 37 VFs
[21:32:45] [PASSED] 38 VFs
[21:32:45] [PASSED] 39 VFs
[21:32:45] [PASSED] 40 VFs
[21:32:45] [PASSED] 41 VFs
[21:32:45] [PASSED] 42 VFs
[21:32:45] [PASSED] 43 VFs
[21:32:45] [PASSED] 44 VFs
[21:32:45] [PASSED] 45 VFs
[21:32:45] [PASSED] 46 VFs
[21:32:45] [PASSED] 47 VFs
[21:32:45] [PASSED] 48 VFs
[21:32:45] [PASSED] 49 VFs
[21:32:45] [PASSED] 50 VFs
[21:32:45] [PASSED] 51 VFs
[21:32:45] [PASSED] 52 VFs
[21:32:45] [PASSED] 53 VFs
[21:32:45] [PASSED] 54 VFs
[21:32:45] [PASSED] 55 VFs
[21:32:45] [PASSED] 56 VFs
[21:32:45] [PASSED] 57 VFs
[21:32:45] [PASSED] 58 VFs
[21:32:45] [PASSED] 59 VFs
[21:32:45] [PASSED] 60 VFs
[21:32:45] [PASSED] 61 VFs
[21:32:45] [PASSED] 62 VFs
[21:32:45] [PASSED] 63 VFs
[21:32:45] ================= [PASSED] fair_doorbells ==================
[21:32:45] ======================== fair_ggtt ========================
[21:32:45] [PASSED] 1 VF
[21:32:45] [PASSED] 2 VFs
[21:32:45] [PASSED] 3 VFs
[21:32:45] [PASSED] 4 VFs
[21:32:45] [PASSED] 5 VFs
[21:32:45] [PASSED] 6 VFs
[21:32:45] [PASSED] 7 VFs
[21:32:45] [PASSED] 8 VFs
[21:32:45] [PASSED] 9 VFs
[21:32:45] [PASSED] 10 VFs
[21:32:45] [PASSED] 11 VFs
[21:32:45] [PASSED] 12 VFs
[21:32:45] [PASSED] 13 VFs
[21:32:45] [PASSED] 14 VFs
[21:32:45] [PASSED] 15 VFs
[21:32:45] [PASSED] 16 VFs
[21:32:45] [PASSED] 17 VFs
[21:32:45] [PASSED] 18 VFs
[21:32:45] [PASSED] 19 VFs
[21:32:45] [PASSED] 20 VFs
[21:32:45] [PASSED] 21 VFs
[21:32:45] [PASSED] 22 VFs
[21:32:45] [PASSED] 23 VFs
[21:32:45] [PASSED] 24 VFs
[21:32:45] [PASSED] 25 VFs
[21:32:45] [PASSED] 26 VFs
[21:32:45] [PASSED] 27 VFs
[21:32:45] [PASSED] 28 VFs
[21:32:45] [PASSED] 29 VFs
[21:32:45] [PASSED] 30 VFs
[21:32:45] [PASSED] 31 VFs
[21:32:45] [PASSED] 32 VFs
[21:32:45] [PASSED] 33 VFs
[21:32:45] [PASSED] 34 VFs
[21:32:45] [PASSED] 35 VFs
[21:32:45] [PASSED] 36 VFs
[21:32:45] [PASSED] 37 VFs
[21:32:45] [PASSED] 38 VFs
[21:32:45] [PASSED] 39 VFs
[21:32:45] [PASSED] 40 VFs
[21:32:45] [PASSED] 41 VFs
[21:32:45] [PASSED] 42 VFs
[21:32:45] [PASSED] 43 VFs
[21:32:45] [PASSED] 44 VFs
[21:32:45] [PASSED] 45 VFs
[21:32:45] [PASSED] 46 VFs
[21:32:45] [PASSED] 47 VFs
[21:32:45] [PASSED] 48 VFs
[21:32:45] [PASSED] 49 VFs
[21:32:45] [PASSED] 50 VFs
[21:32:45] [PASSED] 51 VFs
[21:32:45] [PASSED] 52 VFs
[21:32:45] [PASSED] 53 VFs
[21:32:45] [PASSED] 54 VFs
[21:32:45] [PASSED] 55 VFs
[21:32:45] [PASSED] 56 VFs
[21:32:45] [PASSED] 57 VFs
[21:32:45] [PASSED] 58 VFs
[21:32:45] [PASSED] 59 VFs
[21:32:45] [PASSED] 60 VFs
[21:32:45] [PASSED] 61 VFs
[21:32:45] [PASSED] 62 VFs
[21:32:45] [PASSED] 63 VFs
[21:32:45] ==================== [PASSED] fair_ggtt ====================
[21:32:45] ======================== fair_vram ========================
[21:32:45] [PASSED] 1 VF
[21:32:45] [PASSED] 2 VFs
[21:32:45] [PASSED] 3 VFs
[21:32:45] [PASSED] 4 VFs
[21:32:45] [PASSED] 5 VFs
[21:32:45] [PASSED] 6 VFs
[21:32:45] [PASSED] 7 VFs
[21:32:45] [PASSED] 8 VFs
[21:32:45] [PASSED] 9 VFs
[21:32:45] [PASSED] 10 VFs
[21:32:45] [PASSED] 11 VFs
[21:32:45] [PASSED] 12 VFs
[21:32:45] [PASSED] 13 VFs
[21:32:45] [PASSED] 14 VFs
[21:32:45] [PASSED] 15 VFs
[21:32:45] [PASSED] 16 VFs
[21:32:45] [PASSED] 17 VFs
[21:32:45] [PASSED] 18 VFs
[21:32:45] [PASSED] 19 VFs
[21:32:45] [PASSED] 20 VFs
[21:32:45] [PASSED] 21 VFs
[21:32:45] [PASSED] 22 VFs
[21:32:45] [PASSED] 23 VFs
[21:32:45] [PASSED] 24 VFs
[21:32:45] [PASSED] 25 VFs
[21:32:45] [PASSED] 26 VFs
[21:32:45] [PASSED] 27 VFs
[21:32:45] [PASSED] 28 VFs
[21:32:45] [PASSED] 29 VFs
[21:32:45] [PASSED] 30 VFs
[21:32:45] [PASSED] 31 VFs
[21:32:45] [PASSED] 32 VFs
[21:32:45] [PASSED] 33 VFs
[21:32:45] [PASSED] 34 VFs
[21:32:45] [PASSED] 35 VFs
[21:32:45] [PASSED] 36 VFs
[21:32:45] [PASSED] 37 VFs
[21:32:45] [PASSED] 38 VFs
[21:32:45] [PASSED] 39 VFs
[21:32:45] [PASSED] 40 VFs
[21:32:45] [PASSED] 41 VFs
[21:32:45] [PASSED] 42 VFs
[21:32:45] [PASSED] 43 VFs
[21:32:45] [PASSED] 44 VFs
[21:32:45] [PASSED] 45 VFs
[21:32:45] [PASSED] 46 VFs
[21:32:45] [PASSED] 47 VFs
[21:32:45] [PASSED] 48 VFs
[21:32:45] [PASSED] 49 VFs
[21:32:45] [PASSED] 50 VFs
[21:32:45] [PASSED] 51 VFs
[21:32:45] [PASSED] 52 VFs
[21:32:45] [PASSED] 53 VFs
[21:32:45] [PASSED] 54 VFs
[21:32:45] [PASSED] 55 VFs
[21:32:45] [PASSED] 56 VFs
[21:32:45] [PASSED] 57 VFs
[21:32:45] [PASSED] 58 VFs
[21:32:45] [PASSED] 59 VFs
[21:32:45] [PASSED] 60 VFs
[21:32:45] [PASSED] 61 VFs
[21:32:45] [PASSED] 62 VFs
[21:32:45] [PASSED] 63 VFs
[21:32:45] ==================== [PASSED] fair_vram ====================
[21:32:45] ================== [PASSED] pf_gt_config ===================
[21:32:45] ===================== lmtt (1 subtest) =====================
[21:32:45] ======================== test_ops =========================
[21:32:45] [PASSED] 2-level
[21:32:45] [PASSED] multi-level
[21:32:45] ==================== [PASSED] test_ops =====================
[21:32:45] ====================== [PASSED] lmtt =======================
[21:32:45] ================= sriov_packet (1 subtest) =================
[21:32:45] [PASSED] test_descriptor_init
[21:32:45] ================== [PASSED] sriov_packet ===================
[21:32:45] ================= pf_service (11 subtests) =================
[21:32:45] [PASSED] pf_negotiate_any
[21:32:45] [PASSED] pf_negotiate_base_match
[21:32:45] [PASSED] pf_negotiate_base_newer
[21:32:45] [PASSED] pf_negotiate_base_next
[21:32:45] [SKIPPED] pf_negotiate_base_older (no older minor)
[21:32:45] [PASSED] pf_negotiate_base_prev
[21:32:45] [PASSED] pf_negotiate_latest_match
[21:32:45] [PASSED] pf_negotiate_latest_newer
[21:32:45] [PASSED] pf_negotiate_latest_next
[21:32:45] [SKIPPED] pf_negotiate_latest_older (no older minor)
[21:32:45] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[21:32:45] =================== [PASSED] pf_service ====================
[21:32:45] ================= xe_guc_g2g (2 subtests) ==================
[21:32:45] ============== xe_live_guc_g2g_kunit_default ==============
[21:32:45] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[21:32:45] ============== xe_live_guc_g2g_kunit_allmem ===============
[21:32:45] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[21:32:45] =================== [SKIPPED] xe_guc_g2g ===================
[21:32:45] =================== xe_mocs (2 subtests) ===================
[21:32:45] ================ xe_live_mocs_kernel_kunit ================
[21:32:45] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[21:32:45] ================ xe_live_mocs_reset_kunit =================
[21:32:45] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[21:32:45] ==================== [SKIPPED] xe_mocs =====================
[21:32:45] ================= xe_migrate (3 subtests) ==================
[21:32:45] ================= xe_migrate_sanity_kunit =================
[21:32:45] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[21:32:45] ================== xe_validate_ccs_kunit ==================
[21:32:45] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[21:32:45] ============= xe_migrate_access_memory_kunit ==============
[21:32:45] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[21:32:45] =================== [SKIPPED] xe_migrate ===================
[21:32:45] ================== xe_dma_buf (1 subtest) ==================
[21:32:45] ==================== xe_dma_buf_kunit =====================
[21:32:45] ================ [SKIPPED] xe_dma_buf_kunit ================
[21:32:45] =================== [SKIPPED] xe_dma_buf ===================
[21:32:45] ================= xe_bo_shrink (1 subtest) =================
[21:32:45] =================== xe_bo_shrink_kunit ====================
[21:32:45] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[21:32:45] ================== [SKIPPED] xe_bo_shrink ==================
[21:32:45] ==================== xe_bo (2 subtests) ====================
[21:32:45] ================== xe_ccs_migrate_kunit ===================
[21:32:45] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[21:32:45] ==================== xe_bo_evict_kunit ====================
[21:32:45] =============== [SKIPPED] xe_bo_evict_kunit ================
[21:32:45] ===================== [SKIPPED] xe_bo ======================
[21:32:45] =================== xe_any (9 subtests) ====================
[21:32:45] [PASSED] test_to_xe
[21:32:45] [PASSED] test_to_dev
[21:32:45] [PASSED] test_to_pdev
[21:32:45] [PASSED] test_to_drm
[21:32:45] [PASSED] test_if_pdev
[21:32:45] [PASSED] test_if_xe
[21:32:45] [PASSED] test_if_tile
[21:32:45] [PASSED] test_if_gt
[21:32:45] [PASSED] test_to_id
[21:32:45] ===================== [PASSED] xe_any ======================
[21:32:45] ==================== args (13 subtests) ====================
[21:32:45] [PASSED] count_args_test
[21:32:45] [PASSED] call_args_example
[21:32:45] [PASSED] call_args_test
[21:32:45] [PASSED] drop_first_arg_example
[21:32:45] [PASSED] drop_first_arg_test
[21:32:45] [PASSED] first_arg_example
[21:32:45] [PASSED] first_arg_test
[21:32:45] [PASSED] last_arg_example
[21:32:45] [PASSED] last_arg_test
[21:32:45] [PASSED] pick_arg_example
[21:32:45] [PASSED] if_args_example
[21:32:45] [PASSED] if_args_test
[21:32:45] [PASSED] sep_comma_example
[21:32:45] ====================== [PASSED] args =======================
[21:32:45] =================== xe_pci (3 subtests) ====================
[21:32:45] ==================== check_graphics_ip ====================
[21:32:45] [PASSED] 12.00 Xe_LP
[21:32:45] [PASSED] 12.10 Xe_LP+
[21:32:45] [PASSED] 12.55 Xe_HPG
[21:32:45] [PASSED] 12.60 Xe_HPC
[21:32:45] [PASSED] 12.70 Xe_LPG
[21:32:45] [PASSED] 12.71 Xe_LPG
[21:32:45] [PASSED] 12.74 Xe_LPG+
[21:32:45] [PASSED] 20.01 Xe2_HPG
[21:32:45] [PASSED] 20.02 Xe2_HPG
[21:32:45] [PASSED] 20.04 Xe2_LPG
[21:32:45] [PASSED] 30.00 Xe3_LPG
[21:32:45] [PASSED] 30.01 Xe3_LPG
[21:32:45] [PASSED] 30.03 Xe3_LPG
[21:32:45] [PASSED] 30.04 Xe3_LPG
[21:32:45] [PASSED] 30.05 Xe3_LPG
[21:32:45] [PASSED] 35.10 Xe3p_LPG
[21:32:45] [PASSED] 35.11 Xe3p_XPC
[21:32:45] ================ [PASSED] check_graphics_ip ================
[21:32:45] ===================== check_media_ip ======================
[21:32:45] [PASSED] 12.00 Xe_M
[21:32:45] [PASSED] 12.55 Xe_HPM
[21:32:45] [PASSED] 13.00 Xe_LPM+
[21:32:45] [PASSED] 13.01 Xe2_HPM
[21:32:45] [PASSED] 20.00 Xe2_LPM
[21:32:45] [PASSED] 30.00 Xe3_LPM
[21:32:45] [PASSED] 30.02 Xe3_LPM
[21:32:45] [PASSED] 35.00 Xe3p_LPM
[21:32:45] [PASSED] 35.03 Xe3p_HPM
[21:32:45] ================= [PASSED] check_media_ip ==================
[21:32:45] =================== check_platform_desc ===================
[21:32:45] [PASSED] 0x9A60 (TIGERLAKE)
[21:32:45] [PASSED] 0x9A68 (TIGERLAKE)
[21:32:45] [PASSED] 0x9A70 (TIGERLAKE)
[21:32:45] [PASSED] 0x9A40 (TIGERLAKE)
[21:32:45] [PASSED] 0x9A49 (TIGERLAKE)
[21:32:45] [PASSED] 0x9A59 (TIGERLAKE)
[21:32:45] [PASSED] 0x9A78 (TIGERLAKE)
[21:32:45] [PASSED] 0x9AC0 (TIGERLAKE)
[21:32:45] [PASSED] 0x9AC9 (TIGERLAKE)
[21:32:45] [PASSED] 0x9AD9 (TIGERLAKE)
[21:32:45] [PASSED] 0x9AF8 (TIGERLAKE)
[21:32:45] [PASSED] 0x4C80 (ROCKETLAKE)
[21:32:45] [PASSED] 0x4C8A (ROCKETLAKE)
[21:32:45] [PASSED] 0x4C8B (ROCKETLAKE)
[21:32:45] [PASSED] 0x4C8C (ROCKETLAKE)
[21:32:45] [PASSED] 0x4C90 (ROCKETLAKE)
[21:32:45] [PASSED] 0x4C9A (ROCKETLAKE)
[21:32:45] [PASSED] 0x4680 (ALDERLAKE_S)
[21:32:45] [PASSED] 0x4682 (ALDERLAKE_S)
[21:32:45] [PASSED] 0x4688 (ALDERLAKE_S)
[21:32:45] [PASSED] 0x468A (ALDERLAKE_S)
[21:32:45] [PASSED] 0x468B (ALDERLAKE_S)
[21:32:45] [PASSED] 0x4690 (ALDERLAKE_S)
[21:32:45] [PASSED] 0x4692 (ALDERLAKE_S)
[21:32:45] [PASSED] 0x4693 (ALDERLAKE_S)
[21:32:45] [PASSED] 0x46A0 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46A1 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46A2 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46A3 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46A6 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46A8 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46AA (ALDERLAKE_P)
[21:32:45] [PASSED] 0x462A (ALDERLAKE_P)
[21:32:45] [PASSED] 0x4626 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x4628 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46B0 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46B1 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46B2 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46B3 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46C0 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46C1 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46C2 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46C3 (ALDERLAKE_P)
[21:32:45] [PASSED] 0x46D0 (ALDERLAKE_N)
[21:32:45] [PASSED] 0x46D1 (ALDERLAKE_N)
[21:32:45] [PASSED] 0x46D2 (ALDERLAKE_N)
[21:32:45] [PASSED] 0x46D3 (ALDERLAKE_N)
[21:32:45] [PASSED] 0x46D4 (ALDERLAKE_N)
[21:32:45] [PASSED] 0xA721 (ALDERLAKE_P)
[21:32:45] [PASSED] 0xA7A1 (ALDERLAKE_P)
[21:32:45] [PASSED] 0xA7A9 (ALDERLAKE_P)
[21:32:45] [PASSED] 0xA7AC (ALDERLAKE_P)
[21:32:45] [PASSED] 0xA7AD (ALDERLAKE_P)
[21:32:45] [PASSED] 0xA720 (ALDERLAKE_P)
[21:32:45] [PASSED] 0xA7A0 (ALDERLAKE_P)
[21:32:45] [PASSED] 0xA7A8 (ALDERLAKE_P)
[21:32:45] [PASSED] 0xA7AA (ALDERLAKE_P)
[21:32:45] [PASSED] 0xA7AB (ALDERLAKE_P)
[21:32:45] [PASSED] 0xA780 (ALDERLAKE_S)
[21:32:45] [PASSED] 0xA781 (ALDERLAKE_S)
[21:32:45] [PASSED] 0xA782 (ALDERLAKE_S)
[21:32:45] [PASSED] 0xA783 (ALDERLAKE_S)
[21:32:45] [PASSED] 0xA788 (ALDERLAKE_S)
[21:32:45] [PASSED] 0xA789 (ALDERLAKE_S)
[21:32:45] [PASSED] 0xA78A (ALDERLAKE_S)
[21:32:45] [PASSED] 0xA78B (ALDERLAKE_S)
[21:32:45] [PASSED] 0x4905 (DG1)
[21:32:45] [PASSED] 0x4906 (DG1)
[21:32:45] [PASSED] 0x4907 (DG1)
[21:32:45] [PASSED] 0x4908 (DG1)
[21:32:45] [PASSED] 0x4909 (DG1)
[21:32:45] [PASSED] 0x56C0 (DG2)
[21:32:45] [PASSED] 0x56C2 (DG2)
[21:32:45] [PASSED] 0x56C1 (DG2)
[21:32:45] [PASSED] 0x7D51 (METEORLAKE)
[21:32:45] [PASSED] 0x7DD1 (METEORLAKE)
[21:32:45] [PASSED] 0x7D41 (METEORLAKE)
[21:32:45] [PASSED] 0x7D67 (METEORLAKE)
[21:32:45] [PASSED] 0xB640 (METEORLAKE)
[21:32:45] [PASSED] 0x56A0 (DG2)
[21:32:45] [PASSED] 0x56A1 (DG2)
[21:32:45] [PASSED] 0x56A2 (DG2)
[21:32:45] [PASSED] 0x56BE (DG2)
[21:32:45] [PASSED] 0x56BF (DG2)
[21:32:45] [PASSED] 0x5690 (DG2)
[21:32:45] [PASSED] 0x5691 (DG2)
[21:32:45] [PASSED] 0x5692 (DG2)
[21:32:45] [PASSED] 0x56A5 (DG2)
[21:32:45] [PASSED] 0x56A6 (DG2)
[21:32:45] [PASSED] 0x56B0 (DG2)
[21:32:45] [PASSED] 0x56B1 (DG2)
[21:32:45] [PASSED] 0x56BA (DG2)
[21:32:45] [PASSED] 0x56BB (DG2)
[21:32:45] [PASSED] 0x56BC (DG2)
[21:32:45] [PASSED] 0x56BD (DG2)
[21:32:45] [PASSED] 0x5693 (DG2)
[21:32:45] [PASSED] 0x5694 (DG2)
[21:32:45] [PASSED] 0x5695 (DG2)
[21:32:45] [PASSED] 0x56A3 (DG2)
[21:32:45] [PASSED] 0x56A4 (DG2)
[21:32:45] [PASSED] 0x56B2 (DG2)
[21:32:45] [PASSED] 0x56B3 (DG2)
[21:32:45] [PASSED] 0x5696 (DG2)
[21:32:45] [PASSED] 0x5697 (DG2)
[21:32:45] [PASSED] 0xB69 (PVC)
[21:32:45] [PASSED] 0xB6E (PVC)
[21:32:45] [PASSED] 0xBD4 (PVC)
[21:32:45] [PASSED] 0xBD5 (PVC)
[21:32:45] [PASSED] 0xBD6 (PVC)
[21:32:45] [PASSED] 0xBD7 (PVC)
[21:32:45] [PASSED] 0xBD8 (PVC)
[21:32:45] [PASSED] 0xBD9 (PVC)
[21:32:45] [PASSED] 0xBDA (PVC)
[21:32:45] [PASSED] 0xBDB (PVC)
[21:32:45] [PASSED] 0xBE0 (PVC)
[21:32:45] [PASSED] 0xBE1 (PVC)
[21:32:45] [PASSED] 0xBE5 (PVC)
[21:32:45] [PASSED] 0x7D40 (METEORLAKE)
[21:32:45] [PASSED] 0x7D45 (METEORLAKE)
[21:32:45] [PASSED] 0x7D55 (METEORLAKE)
[21:32:45] [PASSED] 0x7D60 (METEORLAKE)
[21:32:45] [PASSED] 0x7DD5 (METEORLAKE)
[21:32:45] [PASSED] 0x6420 (LUNARLAKE)
[21:32:45] [PASSED] 0x64A0 (LUNARLAKE)
[21:32:45] [PASSED] 0x64B0 (LUNARLAKE)
[21:32:45] [PASSED] 0xE202 (BATTLEMAGE)
[21:32:45] [PASSED] 0xE209 (BATTLEMAGE)
[21:32:45] [PASSED] 0xE20B (BATTLEMAGE)
[21:32:45] [PASSED] 0xE20C (BATTLEMAGE)
[21:32:45] [PASSED] 0xE20D (BATTLEMAGE)
[21:32:45] [PASSED] 0xE210 (BATTLEMAGE)
[21:32:45] [PASSED] 0xE211 (BATTLEMAGE)
[21:32:45] [PASSED] 0xE212 (BATTLEMAGE)
[21:32:45] [PASSED] 0xE216 (BATTLEMAGE)
[21:32:45] [PASSED] 0xE220 (BATTLEMAGE)
[21:32:45] [PASSED] 0xE221 (BATTLEMAGE)
[21:32:45] [PASSED] 0xE222 (BATTLEMAGE)
[21:32:45] [PASSED] 0xE223 (BATTLEMAGE)
[21:32:45] [PASSED] 0xB080 (PANTHERLAKE)
[21:32:45] [PASSED] 0xB081 (PANTHERLAKE)
[21:32:45] [PASSED] 0xB082 (PANTHERLAKE)
[21:32:45] [PASSED] 0xB083 (PANTHERLAKE)
[21:32:45] [PASSED] 0xB084 (PANTHERLAKE)
[21:32:45] [PASSED] 0xB085 (PANTHERLAKE)
[21:32:45] [PASSED] 0xB086 (PANTHERLAKE)
[21:32:45] [PASSED] 0xB087 (PANTHERLAKE)
[21:32:45] [PASSED] 0xB08F (PANTHERLAKE)
[21:32:45] [PASSED] 0xB090 (PANTHERLAKE)
[21:32:45] [PASSED] 0xB0A0 (PANTHERLAKE)
[21:32:45] [PASSED] 0xB0A1 (PANTHERLAKE)
[21:32:45] [PASSED] 0xB0B0 (PANTHERLAKE)
[21:32:45] [PASSED] 0xFD80 (PANTHERLAKE)
[21:32:45] [PASSED] 0xFD81 (PANTHERLAKE)
[21:32:45] [PASSED] 0xD740 (NOVALAKE_S)
[21:32:45] [PASSED] 0xD741 (NOVALAKE_S)
[21:32:45] [PASSED] 0xD742 (NOVALAKE_S)
[21:32:45] [PASSED] 0xD743 (NOVALAKE_S)
[21:32:45] [PASSED] 0xD745 (NOVALAKE_S)
[21:32:45] [PASSED] 0xD74A (NOVALAKE_S)
[21:32:45] [PASSED] 0xD74B (NOVALAKE_S)
[21:32:45] [PASSED] 0x674C (CRESCENTISLAND)
[21:32:45] [PASSED] 0x674D (CRESCENTISLAND)
[21:32:45] [PASSED] 0x674E (CRESCENTISLAND)
[21:32:45] [PASSED] 0x674F (CRESCENTISLAND)
[21:32:45] [PASSED] 0x6750 (CRESCENTISLAND)
[21:32:45] [PASSED] 0x6751 (CRESCENTISLAND)
[21:32:45] [PASSED] 0x6752 (CRESCENTISLAND)
[21:32:45] [PASSED] 0xD750 (NOVALAKE_P)
[21:32:45] [PASSED] 0xD751 (NOVALAKE_P)
[21:32:45] [PASSED] 0xD752 (NOVALAKE_P)
[21:32:45] [PASSED] 0xD753 (NOVALAKE_P)
[21:32:45] [PASSED] 0xD754 (NOVALAKE_P)
[21:32:45] [PASSED] 0xD755 (NOVALAKE_P)
[21:32:45] [PASSED] 0xD756 (NOVALAKE_P)
[21:32:45] [PASSED] 0xD757 (NOVALAKE_P)
[21:32:45] [PASSED] 0xD75F (NOVALAKE_P)
[21:32:45] =============== [PASSED] check_platform_desc ===============
[21:32:45] ===================== [PASSED] xe_pci ======================
[21:32:45] ============= xe_rtp_tables_test (5 subtests) ==============
[21:32:45] ================== xe_rtp_table_gt_test ===================
[21:32:45] [PASSED] gt_was/14011060649
[21:32:45] [PASSED] gt_was/14011059788
[21:32:45] [PASSED] gt_was/14015795083
[21:32:45] [PASSED] gt_was/16021867713
[21:32:45] [PASSED] gt_was/14019449301
[21:32:45] [PASSED] gt_was/16028005424
[21:32:45] [PASSED] gt_was/14026578760
[21:32:45] [PASSED] gt_was/1409420604
[21:32:45] [PASSED] gt_was/1408615072
[21:32:45] [PASSED] gt_was/22010523718
[21:32:45] [PASSED] gt_was/14011006942
[21:32:45] [PASSED] gt_was/14014830051
[21:32:45] [PASSED] gt_was/18018781329
[21:32:45] [PASSED] gt_was/1509235366
[21:32:45] [PASSED] gt_was/18018781329
[21:32:45] [PASSED] gt_was/16016694945
[21:32:45] [PASSED] gt_was/14018575942
[21:32:45] [PASSED] gt_was/22016670082
[21:32:45] [PASSED] gt_was/22016670082
[21:32:45] [PASSED] gt_was/14017421178
[21:32:45] [PASSED] gt_was/16025250150
[21:32:45] [PASSED] gt_was/14021871409
[21:32:45] [PASSED] gt_was/16021865536
[21:32:45] [PASSED] gt_was/14021486841
[21:32:45] [PASSED] gt_was/14025160223
[21:32:45] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[21:32:45] [PASSED] gt_was/14025635424
[21:32:45] [PASSED] gt_was/16028005424
[21:32:45] ============== [PASSED] xe_rtp_table_gt_test ===============
[21:32:45] ================== xe_rtp_table_gt_test ===================
[21:32:45] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[21:32:45] [PASSED] gt_tunings/Tuning: 32B Access Enable
[21:32:45] [PASSED] gt_tunings/Tuning: L3 cache
[21:32:45] [PASSED] gt_tunings/Tuning: L3 cache - media
[21:32:45] [PASSED] gt_tunings/Tuning: Compression Overfetch
[21:32:45] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[21:32:45] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[21:32:45] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[21:32:45] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[21:32:45] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[21:32:45] [PASSED] gt_tunings/Tuning: Stateless compression control
[21:32:45] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[21:32:45] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[21:32:45] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[21:32:45] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[21:32:45] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[21:32:45] ============== [PASSED] xe_rtp_table_gt_test ===============
[21:32:45] ================== xe_rtp_table_oob_test ==================
[21:32:45] [PASSED] oob_was/1607983814
[21:32:45] [PASSED] oob_was/16010904313
[21:32:45] [PASSED] oob_was/18022495364
[21:32:45] [PASSED] oob_was/22012773006
[21:32:45] [PASSED] oob_was/14014475959
[21:32:45] [PASSED] oob_was/22011391025
[21:32:45] [PASSED] oob_was/22012727170
[21:32:45] [PASSED] oob_was/22012727685
[21:32:45] [PASSED] oob_was/22016596838
[21:32:45] [PASSED] oob_was/18020744125
[21:32:45] [PASSED] oob_was/1409600907
[21:32:45] [PASSED] oob_was/22014953428
[21:32:45] [PASSED] oob_was/16017236439
[21:32:45] [PASSED] oob_was/14019821291
[21:32:45] [PASSED] oob_was/14015076503
[21:32:45] [PASSED] oob_was/22016122933
[21:32:45] [PASSED] oob_was/14018913170
[21:32:45] [PASSED] oob_was/14018094691
[21:32:45] [PASSED] oob_was/18024947630
[21:32:45] [PASSED] oob_was/16022287689
[21:32:45] [PASSED] oob_was/13011645652
[21:32:45] [PASSED] oob_was/14022293748
[21:32:45] [PASSED] oob_was/22019794406
[21:32:45] [PASSED] oob_was/22019338487
[21:32:45] [PASSED] oob_was/16023588340
[21:32:45] [PASSED] oob_was/14019789679
[21:32:45] [PASSED] oob_was/14022866841
[21:32:45] [PASSED] oob_was/16021333562
[21:32:45] [PASSED] oob_was/14016712196
[21:32:45] [PASSED] oob_was/14015568240
[21:32:45] [PASSED] oob_was/18013179988
[21:32:45] [PASSED] oob_was/1508761755
[21:32:45] [PASSED] oob_was/16023105232
[21:32:45] [PASSED] oob_was/16026508708
[21:32:45] [PASSED] oob_was/14020001231
[21:32:45] [PASSED] oob_was/16023683509
[21:32:45] [PASSED] oob_was/14025515070
[21:32:45] [PASSED] oob_was/15015404425_disable
[21:32:45] [PASSED] oob_was/16026007364
[21:32:45] [PASSED] oob_was/14020316580
[21:32:45] [PASSED] oob_was/14025883347
[21:32:45] [PASSED] oob_was/16029380221
[21:32:45] [PASSED] oob_was/22022079272
[21:32:45] [PASSED] oob_was/16029897822
[21:32:45] [PASSED] oob_was/14026539277
[21:32:45] [PASSED] oob_was/14027054324
[21:32:45] [PASSED] oob_was/14025941587
[21:32:45] [PASSED] oob_was/16030224309
[21:32:45] [PASSED] oob_was/14028709524
[21:32:45] ============== [PASSED] xe_rtp_table_oob_test ==============
[21:32:45] ================ xe_rtp_table_dev_oob_test ================
[21:32:45] [PASSED] device_oob_was/22010954014
[21:32:45] [PASSED] device_oob_was/15015404425
[21:32:45] [PASSED] device_oob_was/22019338487_display
[21:32:45] [PASSED] device_oob_was/14022085890
[21:32:45] [PASSED] device_oob_was/14026633728
[21:32:45] [PASSED] device_oob_was/14026746987
[21:32:45] [PASSED] device_oob_was/14026779378
[21:32:45] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[21:32:45] ========== xe_rtp_table_missing_upper_bound_test ==========
[21:32:45] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[21:32:45] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[21:32:45] [PASSED] register_whitelist/1806527549
[21:32:45] [PASSED] register_whitelist/allow_read_ctx_timestamp
[21:32:45] [PASSED] register_whitelist/allow_read_queue_timestamp
[21:32:45] [PASSED] register_whitelist/16014440446
[21:32:45] [PASSED] register_whitelist/16017236439
[21:32:45] [PASSED] register_whitelist/16020183090
[21:32:45] [PASSED] register_whitelist/14024997852
[21:32:45] [PASSED] register_whitelist/14024997852
[21:32:45] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[21:32:45] =============== [PASSED] xe_rtp_tables_test ================
[21:32:45] =================== xe_rtp (3 subtests) ====================
[21:32:45] =================== xe_rtp_rules_tests ====================
[21:32:45] [PASSED] no
[21:32:45] [PASSED] yes
[21:32:45] [PASSED] no-and-no
[21:32:45] [PASSED] no-and-yes
[21:32:45] [PASSED] yes-and-no
[21:32:45] [PASSED] yes-and-yes
[21:32:45] [PASSED] no-or-no
[21:32:45] [PASSED] no-or-yes
[21:32:45] [PASSED] yes-or-no
[21:32:45] [PASSED] yes-or-yes
[21:32:45] [PASSED] no-yes-or-yes-no
[21:32:45] [PASSED] no-yes-or-yes-yes
[21:32:45] [PASSED] yes-yes-or-no-yes
[21:32:45] [PASSED] yes-yes-or-yes-yes
[21:32:45] [PASSED] no-no-or-yes-or-no
[21:32:45] [PASSED] or
[21:32:45] [PASSED] or-yes
[21:32:45] [PASSED] or-no
[21:32:45] [PASSED] yes-or
[21:32:45] [PASSED] no-or
[21:32:45] [PASSED] no-or-or-yes
[21:32:45] [PASSED] yes-or-or-no
[21:32:45] [PASSED] no-or-or-no
[21:32:45] [PASSED] missing-context-engine-class
[21:32:45] [PASSED] missing-context-engine-class-or-yes
[21:32:45] [PASSED] missing-context-engine-class-or-or-yes
[21:32:45] =============== [PASSED] xe_rtp_rules_tests ================
[21:32:45] =============== xe_rtp_process_to_sr_tests ================
[21:32:45] [PASSED] coalesce-same-reg
[21:32:45] [PASSED] coalesce-same-reg-literal-and-func
[21:32:45] [PASSED] no-match-no-add
[21:32:45] [PASSED] two-regs-two-entries
[21:32:45] [PASSED] clr-one-set-other
[21:32:45] [PASSED] set-field
[21:32:45] [PASSED] conflict-duplicate
[21:32:45] [PASSED] conflict-not-disjoint
[21:32:45] [PASSED] conflict-not-disjoint-literal-and-func
[21:32:45] [PASSED] conflict-reg-type
[21:32:45] [PASSED] bad-mcr-reg-forced-to-regular
[21:32:45] [PASSED] bad-regular-reg-forced-to-mcr
[21:32:45] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[21:32:45] ================== xe_rtp_process_tests ===================
[21:32:45] [PASSED] active1
[21:32:45] [PASSED] active2
[21:32:45] [PASSED] active-inactive
[21:32:45] [PASSED] inactive-active
[21:32:45] [PASSED] inactive-active-inactive
[21:32:45] [PASSED] inactive-inactive-inactive
[21:32:45] ============== [PASSED] xe_rtp_process_tests ===============
[21:32:45] ===================== [PASSED] xe_rtp ======================
[21:32:45] ==================== xe_wa (1 subtest) =====================
[21:32:45] ======================== xe_wa_gt =========================
[21:32:45] [PASSED] TIGERLAKE B0
[21:32:45] [PASSED] DG1 A0
[21:32:45] [PASSED] DG1 B0
[21:32:45] [PASSED] ALDERLAKE_S A0
[21:32:45] [PASSED] ALDERLAKE_S B0
[21:32:45] [PASSED] ALDERLAKE_S C0
[21:32:45] [PASSED] ALDERLAKE_S D0
[21:32:45] [PASSED] ALDERLAKE_P A0
[21:32:45] [PASSED] ALDERLAKE_P B0
[21:32:45] [PASSED] ALDERLAKE_P C0
[21:32:45] [PASSED] ALDERLAKE_S RPLS D0
[21:32:45] [PASSED] ALDERLAKE_P RPLU E0
[21:32:45] [PASSED] DG2 G10 C0
[21:32:45] [PASSED] DG2 G11 B1
[21:32:45] [PASSED] DG2 G12 A1
[21:32:45] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:32:45] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:32:45] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[21:32:45] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[21:32:45] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[21:32:45] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[21:32:45] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[21:32:45] ==================== [PASSED] xe_wa_gt =====================
[21:32:45] ====================== [PASSED] xe_wa ======================
[21:32:45] ============================================================
[21:32:45] Testing complete. Ran 840 tests: passed: 811, skipped: 29
[21:32:45] Elapsed time: 41.889s total, 2.537s configuring, 38.636s building, 0.705s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[21:32:46] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:32:48] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:33:13] Starting KUnit Kernel (1/1)...
[21:33:13] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:33:13] ============ drm_test_pick_cmdline (2 subtests) ============
[21:33:13] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[21:33:13] =============== drm_test_pick_cmdline_named ===============
[21:33:13] [PASSED] NTSC
[21:33:13] [PASSED] NTSC-J
[21:33:13] [PASSED] PAL
[21:33:13] [PASSED] PAL-M
[21:33:13] =========== [PASSED] drm_test_pick_cmdline_named ===========
[21:33:13] ============== [PASSED] drm_test_pick_cmdline ==============
[21:33:13] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[21:33:13] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[21:33:13] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[21:33:13] =========== drm_validate_clone_mode (2 subtests) ===========
[21:33:13] ============== drm_test_check_in_clone_mode ===============
[21:33:13] [PASSED] in_clone_mode
[21:33:13] [PASSED] not_in_clone_mode
[21:33:13] ========== [PASSED] drm_test_check_in_clone_mode ===========
[21:33:13] =============== drm_test_check_valid_clones ===============
[21:33:13] [PASSED] not_in_clone_mode
[21:33:13] [PASSED] valid_clone
[21:33:13] [PASSED] invalid_clone
[21:33:13] =========== [PASSED] drm_test_check_valid_clones ===========
[21:33:13] ============= [PASSED] drm_validate_clone_mode =============
[21:33:13] ============= drm_validate_modeset (1 subtest) =============
[21:33:13] [PASSED] drm_test_check_connector_changed_modeset
[21:33:13] ============== [PASSED] drm_validate_modeset ===============
[21:33:13] ====== drm_test_bridge_get_current_state (1 subtest) =======
[21:33:13] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[21:33:13] ======== [PASSED] drm_test_bridge_get_current_state ========
[21:33:13] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[21:33:13] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[21:33:13] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[21:33:13] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[21:33:13] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[21:33:13] ============== drm_bridge_alloc (2 subtests) ===============
[21:33:13] [PASSED] drm_test_drm_bridge_alloc_basic
[21:33:13] [PASSED] drm_test_drm_bridge_alloc_get_put
[21:33:13] ================ [PASSED] drm_bridge_alloc =================
[21:33:13] ============= drm_bridge_bus_fmt (5 subtests) ==============
[21:33:13] [PASSED] drm_test_bridge_rgb_yuv_rgb
[21:33:13] [PASSED] drm_test_bridge_must_convert_to_yuv444
[21:33:13] [PASSED] drm_test_bridge_hdmi_auto_rgb
[21:33:13] [PASSED] drm_test_bridge_auto_first
[21:33:13] [PASSED] drm_test_bridge_rgb_yuv_no_path
[21:33:13] =============== [PASSED] drm_bridge_bus_fmt ================
[21:33:13] ============= drm_cmdline_parser (40 subtests) =============
[21:33:13] [PASSED] drm_test_cmdline_force_d_only
[21:33:13] [PASSED] drm_test_cmdline_force_D_only_dvi
[21:33:13] [PASSED] drm_test_cmdline_force_D_only_hdmi
[21:33:13] [PASSED] drm_test_cmdline_force_D_only_not_digital
[21:33:13] [PASSED] drm_test_cmdline_force_e_only
[21:33:13] [PASSED] drm_test_cmdline_res
[21:33:13] [PASSED] drm_test_cmdline_res_vesa
[21:33:13] [PASSED] drm_test_cmdline_res_vesa_rblank
[21:33:13] [PASSED] drm_test_cmdline_res_rblank
[21:33:13] [PASSED] drm_test_cmdline_res_bpp
[21:33:13] [PASSED] drm_test_cmdline_res_refresh
[21:33:13] [PASSED] drm_test_cmdline_res_bpp_refresh
[21:33:13] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[21:33:13] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[21:33:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[21:33:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[21:33:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[21:33:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[21:33:13] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[21:33:13] [PASSED] drm_test_cmdline_res_margins_force_on
[21:33:13] [PASSED] drm_test_cmdline_res_vesa_margins
[21:33:13] [PASSED] drm_test_cmdline_name
[21:33:13] [PASSED] drm_test_cmdline_name_bpp
[21:33:13] [PASSED] drm_test_cmdline_name_option
[21:33:13] [PASSED] drm_test_cmdline_name_bpp_option
[21:33:13] [PASSED] drm_test_cmdline_rotate_0
[21:33:13] [PASSED] drm_test_cmdline_rotate_90
[21:33:13] [PASSED] drm_test_cmdline_rotate_180
[21:33:13] [PASSED] drm_test_cmdline_rotate_270
[21:33:13] [PASSED] drm_test_cmdline_hmirror
[21:33:13] [PASSED] drm_test_cmdline_vmirror
[21:33:13] [PASSED] drm_test_cmdline_margin_options
[21:33:13] [PASSED] drm_test_cmdline_multiple_options
[21:33:13] [PASSED] drm_test_cmdline_bpp_extra_and_option
[21:33:13] [PASSED] drm_test_cmdline_extra_and_option
[21:33:13] [PASSED] drm_test_cmdline_freestanding_options
[21:33:13] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[21:33:13] [PASSED] drm_test_cmdline_panel_orientation
[21:33:13] ================ drm_test_cmdline_invalid =================
[21:33:13] [PASSED] margin_only
[21:33:13] [PASSED] interlace_only
[21:33:13] [PASSED] res_missing_x
[21:33:13] [PASSED] res_missing_y
[21:33:13] [PASSED] res_bad_y
[21:33:13] [PASSED] res_missing_y_bpp
[21:33:13] [PASSED] res_bad_bpp
[21:33:13] [PASSED] res_bad_refresh
[21:33:13] [PASSED] res_bpp_refresh_force_on_off
[21:33:13] [PASSED] res_invalid_mode
[21:33:13] [PASSED] res_bpp_wrong_place_mode
[21:33:13] [PASSED] name_bpp_refresh
[21:33:13] [PASSED] name_refresh
[21:33:13] [PASSED] name_refresh_wrong_mode
[21:33:13] [PASSED] name_refresh_invalid_mode
[21:33:13] [PASSED] rotate_multiple
[21:33:13] [PASSED] rotate_invalid_val
[21:33:13] [PASSED] rotate_truncated
[21:33:13] [PASSED] invalid_option
[21:33:13] [PASSED] invalid_tv_option
[21:33:13] [PASSED] truncated_tv_option
[21:33:13] ============ [PASSED] drm_test_cmdline_invalid =============
[21:33:13] =============== drm_test_cmdline_tv_options ===============
[21:33:13] [PASSED] NTSC
[21:33:13] [PASSED] NTSC_443
[21:33:13] [PASSED] NTSC_J
[21:33:13] [PASSED] PAL
[21:33:13] [PASSED] PAL_M
[21:33:13] [PASSED] PAL_N
[21:33:13] [PASSED] SECAM
[21:33:13] [PASSED] MONO_525
[21:33:13] [PASSED] MONO_625
[21:33:13] =========== [PASSED] drm_test_cmdline_tv_options ===========
[21:33:13] =============== [PASSED] drm_cmdline_parser ================
[21:33:13] ========== drmm_connector_hdmi_init (20 subtests) ==========
[21:33:13] [PASSED] drm_test_connector_hdmi_init_valid
[21:33:13] [PASSED] drm_test_connector_hdmi_init_bpc_8
[21:33:13] [PASSED] drm_test_connector_hdmi_init_bpc_10
[21:33:13] [PASSED] drm_test_connector_hdmi_init_bpc_12
[21:33:13] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[21:33:13] [PASSED] drm_test_connector_hdmi_init_bpc_null
[21:33:13] [PASSED] drm_test_connector_hdmi_init_formats_empty
[21:33:13] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[21:33:13] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:33:13] [PASSED] supported_formats=0x9 yuv420_allowed=1
[21:33:13] [PASSED] supported_formats=0x9 yuv420_allowed=0
[21:33:13] [PASSED] supported_formats=0x5 yuv420_allowed=1
[21:33:13] [PASSED] supported_formats=0x5 yuv420_allowed=0
[21:33:13] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:33:13] [PASSED] drm_test_connector_hdmi_init_null_ddc
[21:33:13] [PASSED] drm_test_connector_hdmi_init_null_product
[21:33:13] [PASSED] drm_test_connector_hdmi_init_null_vendor
[21:33:13] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[21:33:13] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[21:33:13] [PASSED] drm_test_connector_hdmi_init_product_valid
[21:33:13] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[21:33:13] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[21:33:13] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[21:33:13] ========= drm_test_connector_hdmi_init_type_valid =========
[21:33:13] [PASSED] HDMI-A
[21:33:13] [PASSED] HDMI-B
[21:33:13] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[21:33:13] ======== drm_test_connector_hdmi_init_type_invalid ========
[21:33:13] [PASSED] Unknown
[21:33:13] [PASSED] VGA
[21:33:13] [PASSED] DVI-I
[21:33:13] [PASSED] DVI-D
[21:33:13] [PASSED] DVI-A
[21:33:13] [PASSED] Composite
[21:33:13] [PASSED] SVIDEO
[21:33:13] [PASSED] LVDS
[21:33:13] [PASSED] Component
[21:33:13] [PASSED] DIN
[21:33:13] [PASSED] DP
[21:33:13] [PASSED] TV
[21:33:13] [PASSED] eDP
[21:33:13] [PASSED] Virtual
[21:33:13] [PASSED] DSI
[21:33:13] [PASSED] DPI
[21:33:13] [PASSED] Writeback
[21:33:13] [PASSED] SPI
[21:33:13] [PASSED] USB
[21:33:13] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[21:33:13] ============ [PASSED] drmm_connector_hdmi_init =============
[21:33:13] ============= drmm_connector_init (3 subtests) =============
[21:33:13] [PASSED] drm_test_drmm_connector_init
[21:33:13] [PASSED] drm_test_drmm_connector_init_null_ddc
[21:33:13] ========= drm_test_drmm_connector_init_type_valid =========
[21:33:13] [PASSED] Unknown
[21:33:13] [PASSED] VGA
[21:33:13] [PASSED] DVI-I
[21:33:13] [PASSED] DVI-D
[21:33:13] [PASSED] DVI-A
[21:33:13] [PASSED] Composite
[21:33:13] [PASSED] SVIDEO
[21:33:13] [PASSED] LVDS
[21:33:13] [PASSED] Component
[21:33:13] [PASSED] DIN
[21:33:13] [PASSED] DP
[21:33:13] [PASSED] HDMI-A
[21:33:13] [PASSED] HDMI-B
[21:33:13] [PASSED] TV
[21:33:13] [PASSED] eDP
[21:33:13] [PASSED] Virtual
[21:33:13] [PASSED] DSI
[21:33:13] [PASSED] DPI
[21:33:13] [PASSED] Writeback
[21:33:13] [PASSED] SPI
[21:33:13] [PASSED] USB
[21:33:13] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[21:33:13] =============== [PASSED] drmm_connector_init ===============
[21:33:13] ========= drm_connector_dynamic_init (6 subtests) ==========
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_init
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_init_properties
[21:33:13] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[21:33:13] [PASSED] Unknown
[21:33:13] [PASSED] VGA
[21:33:13] [PASSED] DVI-I
[21:33:13] [PASSED] DVI-D
[21:33:13] [PASSED] DVI-A
[21:33:13] [PASSED] Composite
[21:33:13] [PASSED] SVIDEO
[21:33:13] [PASSED] LVDS
[21:33:13] [PASSED] Component
[21:33:13] [PASSED] DIN
[21:33:13] [PASSED] DP
[21:33:13] [PASSED] HDMI-A
[21:33:13] [PASSED] HDMI-B
[21:33:13] [PASSED] TV
[21:33:13] [PASSED] eDP
[21:33:13] [PASSED] Virtual
[21:33:13] [PASSED] DSI
[21:33:13] [PASSED] DPI
[21:33:13] [PASSED] Writeback
[21:33:13] [PASSED] SPI
[21:33:13] [PASSED] USB
[21:33:13] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[21:33:13] ======== drm_test_drm_connector_dynamic_init_name =========
[21:33:13] [PASSED] Unknown
[21:33:13] [PASSED] VGA
[21:33:13] [PASSED] DVI-I
[21:33:13] [PASSED] DVI-D
[21:33:13] [PASSED] DVI-A
[21:33:13] [PASSED] Composite
[21:33:13] [PASSED] SVIDEO
[21:33:13] [PASSED] LVDS
[21:33:13] [PASSED] Component
[21:33:13] [PASSED] DIN
[21:33:13] [PASSED] DP
[21:33:13] [PASSED] HDMI-A
[21:33:13] [PASSED] HDMI-B
[21:33:13] [PASSED] TV
[21:33:13] [PASSED] eDP
[21:33:13] [PASSED] Virtual
[21:33:13] [PASSED] DSI
[21:33:13] [PASSED] DPI
[21:33:13] [PASSED] Writeback
[21:33:13] [PASSED] SPI
[21:33:13] [PASSED] USB
[21:33:13] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[21:33:13] =========== [PASSED] drm_connector_dynamic_init ============
[21:33:13] ==== drm_connector_dynamic_register_early (4 subtests) =====
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[21:33:13] ====== [PASSED] drm_connector_dynamic_register_early =======
[21:33:13] ======= drm_connector_dynamic_register (7 subtests) ========
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[21:33:13] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[21:33:13] ========= [PASSED] drm_connector_dynamic_register ==========
[21:33:13] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[21:33:13] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[21:33:13] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[21:33:13] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[21:33:13] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[21:33:13] ========== drm_test_get_tv_mode_from_name_valid ===========
[21:33:13] [PASSED] NTSC
[21:33:13] [PASSED] NTSC-443
[21:33:13] [PASSED] NTSC-J
[21:33:13] [PASSED] PAL
[21:33:13] [PASSED] PAL-M
[21:33:13] [PASSED] PAL-N
[21:33:13] [PASSED] SECAM
[21:33:13] [PASSED] Mono
[21:33:13] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[21:33:13] [PASSED] drm_test_get_tv_mode_from_name_truncated
[21:33:13] ============ [PASSED] drm_get_tv_mode_from_name ============
[21:33:13] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[21:33:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[21:33:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[21:33:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[21:33:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[21:33:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[21:33:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[21:33:13] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[21:33:13] [PASSED] VIC 96
[21:33:13] [PASSED] VIC 97
[21:33:13] [PASSED] VIC 101
[21:33:13] [PASSED] VIC 102
[21:33:13] [PASSED] VIC 106
[21:33:13] [PASSED] VIC 107
[21:33:13] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[21:33:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[21:33:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[21:33:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[21:33:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[21:33:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[21:33:13] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[21:33:13] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[21:33:13] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[21:33:13] [PASSED] Automatic
[21:33:13] [PASSED] Full
[21:33:13] [PASSED] Limited 16:235
[21:33:13] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[21:33:13] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[21:33:13] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[21:33:13] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[21:33:13] === drm_test_drm_hdmi_connector_get_output_format_name ====
[21:33:13] [PASSED] RGB
[21:33:13] [PASSED] YUV 4:2:0
[21:33:13] [PASSED] YUV 4:2:2
[21:33:13] [PASSED] YUV 4:4:4
[21:33:13] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[21:33:13] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[21:33:13] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[21:33:13] ============= drm_damage_helper (21 subtests) ==============
[21:33:13] [PASSED] drm_test_damage_iter_no_damage
[21:33:13] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[21:33:13] [PASSED] drm_test_damage_iter_no_damage_src_moved
[21:33:13] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[21:33:13] [PASSED] drm_test_damage_iter_no_damage_not_visible
[21:33:13] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[21:33:13] [PASSED] drm_test_damage_iter_no_damage_no_fb
[21:33:13] [PASSED] drm_test_damage_iter_simple_damage
[21:33:13] [PASSED] drm_test_damage_iter_single_damage
[21:33:13] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[21:33:13] [PASSED] drm_test_damage_iter_single_damage_outside_src
[21:33:13] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[21:33:13] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[21:33:13] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[21:33:13] [PASSED] drm_test_damage_iter_single_damage_src_moved
[21:33:13] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[21:33:13] [PASSED] drm_test_damage_iter_damage
[21:33:13] [PASSED] drm_test_damage_iter_damage_one_intersect
[21:33:13] [PASSED] drm_test_damage_iter_damage_one_outside
[21:33:13] [PASSED] drm_test_damage_iter_damage_src_moved
[21:33:13] [PASSED] drm_test_damage_iter_damage_not_visible
[21:33:13] ================ [PASSED] drm_damage_helper ================
[21:33:13] ============== drm_dp_mst_helper (3 subtests) ==============
[21:33:13] ============== drm_test_dp_mst_calc_pbn_mode ==============
[21:33:13] [PASSED] Clock 154000 BPP 30 DSC disabled
[21:33:13] [PASSED] Clock 234000 BPP 30 DSC disabled
[21:33:13] [PASSED] Clock 297000 BPP 24 DSC disabled
[21:33:13] [PASSED] Clock 332880 BPP 24 DSC enabled
[21:33:13] [PASSED] Clock 324540 BPP 24 DSC enabled
[21:33:13] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[21:33:13] ============== drm_test_dp_mst_calc_pbn_div ===============
[21:33:13] [PASSED] Link rate 2000000 lane count 4
[21:33:13] [PASSED] Link rate 2000000 lane count 2
[21:33:13] [PASSED] Link rate 2000000 lane count 1
[21:33:13] [PASSED] Link rate 1350000 lane count 4
[21:33:13] [PASSED] Link rate 1350000 lane count 2
[21:33:13] [PASSED] Link rate 1350000 lane count 1
[21:33:13] [PASSED] Link rate 1000000 lane count 4
[21:33:13] [PASSED] Link rate 1000000 lane count 2
[21:33:13] [PASSED] Link rate 1000000 lane count 1
[21:33:13] [PASSED] Link rate 810000 lane count 4
[21:33:13] [PASSED] Link rate 810000 lane count 2
[21:33:13] [PASSED] Link rate 810000 lane count 1
[21:33:13] [PASSED] Link rate 540000 lane count 4
[21:33:13] [PASSED] Link rate 540000 lane count 2
[21:33:13] [PASSED] Link rate 540000 lane count 1
[21:33:13] [PASSED] Link rate 270000 lane count 4
[21:33:13] [PASSED] Link rate 270000 lane count 2
[21:33:13] [PASSED] Link rate 270000 lane count 1
[21:33:13] [PASSED] Link rate 162000 lane count 4
[21:33:13] [PASSED] Link rate 162000 lane count 2
[21:33:13] [PASSED] Link rate 162000 lane count 1
[21:33:13] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[21:33:13] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[21:33:13] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[21:33:13] [PASSED] DP_POWER_UP_PHY with port number
[21:33:13] [PASSED] DP_POWER_DOWN_PHY with port number
[21:33:13] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[21:33:13] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[21:33:13] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[21:33:13] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[21:33:13] [PASSED] DP_QUERY_PAYLOAD with port number
[21:33:13] [PASSED] DP_QUERY_PAYLOAD with VCPI
[21:33:13] [PASSED] DP_REMOTE_DPCD_READ with port number
[21:33:13] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[21:33:13] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[21:33:13] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[21:33:13] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[21:33:13] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[21:33:13] [PASSED] DP_REMOTE_I2C_READ with port number
[21:33:13] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[21:33:13] [PASSED] DP_REMOTE_I2C_READ with transactions array
[21:33:13] [PASSED] DP_REMOTE_I2C_WRITE with port number
[21:33:13] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[21:33:13] [PASSED] DP_REMOTE_I2C_WRITE with data array
[21:33:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[21:33:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[21:33:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[21:33:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[21:33:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[21:33:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[21:33:13] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[21:33:13] ================ [PASSED] drm_dp_mst_helper ================
[21:33:13] ================== drm_exec (7 subtests) ===================
[21:33:13] [PASSED] sanitycheck
[21:33:13] [PASSED] test_lock
[21:33:13] [PASSED] test_lock_unlock
[21:33:13] [PASSED] test_duplicates
[21:33:13] [PASSED] test_prepare
[21:33:13] [PASSED] test_prepare_array
[21:33:13] [PASSED] test_multiple_loops
[21:33:13] ==================== [PASSED] drm_exec =====================
[21:33:13] =========== drm_format_helper_test (17 subtests) ===========
[21:33:13] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[21:33:13] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[21:33:13] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[21:33:13] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[21:33:13] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[21:33:13] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[21:33:13] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[21:33:13] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[21:33:13] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[21:33:13] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[21:33:13] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[21:33:13] ============== drm_test_fb_xrgb8888_to_mono ===============
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[21:33:13] ==================== drm_test_fb_swab =====================
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ================ [PASSED] drm_test_fb_swab =================
[21:33:13] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[21:33:13] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[21:33:13] [PASSED] single_pixel_source_buffer
[21:33:13] [PASSED] single_pixel_clip_rectangle
[21:33:13] [PASSED] well_known_colors
[21:33:13] [PASSED] destination_pitch
[21:33:13] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[21:33:13] ================= drm_test_fb_clip_offset =================
[21:33:13] [PASSED] pass through
[21:33:13] [PASSED] horizontal offset
[21:33:13] [PASSED] vertical offset
[21:33:13] [PASSED] horizontal and vertical offset
[21:33:13] [PASSED] horizontal offset (custom pitch)
[21:33:13] [PASSED] vertical offset (custom pitch)
[21:33:13] [PASSED] horizontal and vertical offset (custom pitch)
[21:33:13] ============= [PASSED] drm_test_fb_clip_offset =============
[21:33:13] =================== drm_test_fb_memcpy ====================
[21:33:13] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[21:33:13] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[21:33:13] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[21:33:13] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[21:33:13] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[21:33:13] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[21:33:13] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[21:33:13] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[21:33:13] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[21:33:13] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[21:33:13] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[21:33:13] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[21:33:13] =============== [PASSED] drm_test_fb_memcpy ================
[21:33:13] ============= [PASSED] drm_format_helper_test ==============
[21:33:13] ================= drm_format (18 subtests) =================
[21:33:13] [PASSED] drm_test_format_block_width_invalid
[21:33:13] [PASSED] drm_test_format_block_width_one_plane
[21:33:13] [PASSED] drm_test_format_block_width_two_plane
[21:33:13] [PASSED] drm_test_format_block_width_three_plane
[21:33:13] [PASSED] drm_test_format_block_width_tiled
[21:33:13] [PASSED] drm_test_format_block_height_invalid
[21:33:13] [PASSED] drm_test_format_block_height_one_plane
[21:33:13] [PASSED] drm_test_format_block_height_two_plane
[21:33:13] [PASSED] drm_test_format_block_height_three_plane
[21:33:13] [PASSED] drm_test_format_block_height_tiled
[21:33:13] [PASSED] drm_test_format_min_pitch_invalid
[21:33:13] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[21:33:13] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[21:33:13] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[21:33:13] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[21:33:13] [PASSED] drm_test_format_min_pitch_two_plane
[21:33:13] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[21:33:13] [PASSED] drm_test_format_min_pitch_tiled
[21:33:13] =================== [PASSED] drm_format ====================
[21:33:13] ============== drm_framebuffer (10 subtests) ===============
[21:33:13] ========== drm_test_framebuffer_check_src_coords ==========
[21:33:13] [PASSED] Success: source fits into fb
[21:33:13] [PASSED] Fail: overflowing fb with x-axis coordinate
[21:33:13] [PASSED] Fail: overflowing fb with y-axis coordinate
[21:33:13] [PASSED] Fail: overflowing fb with source width
[21:33:13] [PASSED] Fail: overflowing fb with source height
[21:33:13] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[21:33:13] [PASSED] drm_test_framebuffer_cleanup
[21:33:13] =============== drm_test_framebuffer_create ===============
[21:33:13] [PASSED] ABGR8888 normal sizes
[21:33:13] [PASSED] ABGR8888 max sizes
[21:33:13] [PASSED] ABGR8888 pitch greater than min required
[21:33:13] [PASSED] ABGR8888 pitch less than min required
[21:33:13] [PASSED] ABGR8888 Invalid width
[21:33:13] [PASSED] ABGR8888 Invalid buffer handle
[21:33:13] [PASSED] No pixel format
[21:33:13] [PASSED] ABGR8888 Width 0
[21:33:13] [PASSED] ABGR8888 Height 0
[21:33:13] [PASSED] ABGR8888 Out of bound height * pitch combination
[21:33:13] [PASSED] ABGR8888 Large buffer offset
[21:33:13] [PASSED] ABGR8888 Buffer offset for inexistent plane
[21:33:13] [PASSED] ABGR8888 Invalid flag
[21:33:13] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[21:33:13] [PASSED] ABGR8888 Valid buffer modifier
[21:33:13] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[21:33:13] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[21:33:13] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[21:33:13] [PASSED] NV12 Normal sizes
[21:33:13] [PASSED] NV12 Max sizes
[21:33:13] [PASSED] NV12 Invalid pitch
[21:33:13] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[21:33:13] [PASSED] NV12 different modifier per-plane
[21:33:13] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[21:33:13] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[21:33:13] [PASSED] NV12 Modifier for inexistent plane
[21:33:13] [PASSED] NV12 Handle for inexistent plane
[21:33:13] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[21:33:13] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[21:33:13] [PASSED] YVU420 Normal sizes
[21:33:13] [PASSED] YVU420 Max sizes
[21:33:13] [PASSED] YVU420 Invalid pitch
[21:33:13] [PASSED] YVU420 Different pitches
[21:33:13] [PASSED] YVU420 Different buffer offsets/pitches
[21:33:13] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[21:33:13] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[21:33:13] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[21:33:13] [PASSED] YVU420 Valid modifier
[21:33:13] [PASSED] YVU420 Different modifiers per plane
[21:33:13] [PASSED] YVU420 Modifier for inexistent plane
[21:33:13] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[21:33:13] [PASSED] X0L2 Normal sizes
[21:33:13] [PASSED] X0L2 Max sizes
[21:33:13] [PASSED] X0L2 Invalid pitch
[21:33:13] [PASSED] X0L2 Pitch greater than minimum required
[21:33:13] [PASSED] X0L2 Handle for inexistent plane
[21:33:13] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[21:33:13] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[21:33:13] [PASSED] X0L2 Valid modifier
[21:33:13] [PASSED] X0L2 Modifier for inexistent plane
[21:33:13] =========== [PASSED] drm_test_framebuffer_create ===========
[21:33:13] [PASSED] drm_test_framebuffer_free
[21:33:13] [PASSED] drm_test_framebuffer_init
[21:33:13] [PASSED] drm_test_framebuffer_init_bad_format
[21:33:13] [PASSED] drm_test_framebuffer_init_dev_mismatch
[21:33:13] [PASSED] drm_test_framebuffer_lookup
[21:33:13] [PASSED] drm_test_framebuffer_lookup_inexistent
[21:33:13] [PASSED] drm_test_framebuffer_modifiers_not_supported
[21:33:13] ================= [PASSED] drm_framebuffer =================
[21:33:13] ================ drm_gem_shmem (8 subtests) ================
[21:33:13] [PASSED] drm_gem_shmem_test_obj_create
[21:33:13] [PASSED] drm_gem_shmem_test_obj_create_private
[21:33:13] [PASSED] drm_gem_shmem_test_pin_pages
[21:33:13] [PASSED] drm_gem_shmem_test_vmap
[21:33:13] [PASSED] drm_gem_shmem_test_get_sg_table
[21:33:13] [PASSED] drm_gem_shmem_test_get_pages_sgt
[21:33:13] [PASSED] drm_gem_shmem_test_madvise
[21:33:13] [PASSED] drm_gem_shmem_test_purge
[21:33:13] ================== [PASSED] drm_gem_shmem ==================
[21:33:13] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[21:33:13] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[21:33:13] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[21:33:13] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[21:33:13] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[21:33:13] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[21:33:13] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[21:33:13] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[21:33:13] [PASSED] Automatic
[21:33:13] [PASSED] Full
[21:33:13] [PASSED] Limited 16:235
[21:33:13] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[21:33:13] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[21:33:13] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[21:33:13] [PASSED] drm_test_check_disable_connector
[21:33:13] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[21:33:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[21:33:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[21:33:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[21:33:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[21:33:13] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[21:33:13] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[21:33:13] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[21:33:13] [PASSED] drm_test_check_output_bpc_dvi
[21:33:13] [PASSED] drm_test_check_output_bpc_format_vic_1
[21:33:13] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[21:33:13] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[21:33:13] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[21:33:13] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[21:33:13] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[21:33:13] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[21:33:13] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[21:33:13] ============ drm_test_check_hdmi_color_format =============
[21:33:13] [PASSED] AUTO -> RGB
[21:33:13] [PASSED] YCBCR422 -> YUV422
[21:33:13] [PASSED] YCBCR420 -> YUV420
[21:33:13] [PASSED] YCBCR444 -> YUV444
[21:33:13] [PASSED] RGB -> RGB
[21:33:13] ======== [PASSED] drm_test_check_hdmi_color_format =========
[21:33:13] ======== drm_test_check_hdmi_color_format_420_only ========
[21:33:13] [PASSED] RGB should fail
[21:33:13] [PASSED] YUV444 should fail
[21:33:13] [PASSED] YUV422 should fail
[21:33:13] [PASSED] YUV420 should work
[21:33:13] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[21:33:13] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[21:33:13] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[21:33:13] [PASSED] drm_test_check_broadcast_rgb_value
[21:33:13] [PASSED] drm_test_check_bpc_8_value
[21:33:13] [PASSED] drm_test_check_bpc_10_value
[21:33:13] [PASSED] drm_test_check_bpc_12_value
[21:33:13] [PASSED] drm_test_check_format_value
[21:33:13] [PASSED] drm_test_check_tmds_char_value
[21:33:13] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[21:33:13] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[21:33:13] [PASSED] drm_test_check_mode_valid
[21:33:13] [PASSED] drm_test_check_mode_valid_reject
[21:33:13] [PASSED] drm_test_check_mode_valid_reject_rate
[21:33:13] [PASSED] drm_test_check_mode_valid_reject_max_clock
[21:33:13] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[21:33:13] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[21:33:13] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[21:33:13] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[21:33:13] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[21:33:13] [PASSED] drm_test_check_infoframes
[21:33:13] [PASSED] drm_test_check_reject_avi_infoframe
[21:33:13] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[21:33:13] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[21:33:13] [PASSED] drm_test_check_reject_audio_infoframe
[21:33:13] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[21:33:13] ================= drm_managed (2 subtests) =================
[21:33:13] [PASSED] drm_test_managed_release_action
[21:33:13] [PASSED] drm_test_managed_run_action
[21:33:13] =================== [PASSED] drm_managed ===================
[21:33:13] =================== drm_mm (6 subtests) ====================
[21:33:13] [PASSED] drm_test_mm_init
[21:33:13] [PASSED] drm_test_mm_debug
[21:33:13] [PASSED] drm_test_mm_align32
[21:33:13] [PASSED] drm_test_mm_align64
[21:33:13] [PASSED] drm_test_mm_lowest
[21:33:13] [PASSED] drm_test_mm_highest
[21:33:13] ===================== [PASSED] drm_mm ======================
[21:33:13] ============= drm_modes_analog_tv (5 subtests) =============
[21:33:13] [PASSED] drm_test_modes_analog_tv_mono_576i
[21:33:13] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[21:33:13] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[21:33:13] [PASSED] drm_test_modes_analog_tv_pal_576i
[21:33:13] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[21:33:13] =============== [PASSED] drm_modes_analog_tv ===============
[21:33:13] ============== drm_panic_helper (3 subtests) ===============
[21:33:13] ============= drm_test_panic_screen_user_map ==============
[21:33:13] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[21:33:13] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[21:33:13] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[21:33:13] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[21:33:14] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[21:33:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[21:33:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[21:33:14] ========= [PASSED] drm_test_panic_screen_user_map ==========
[21:33:14] ============= drm_test_panic_screen_user_page =============
[21:33:14] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[21:33:14] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[21:33:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[21:33:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[21:33:14] ========= [PASSED] drm_test_panic_screen_user_page =========
[21:33:14] ========== drm_test_panic_screen_user_set_pixel ===========
[21:33:14] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[21:33:14] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[21:33:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[21:33:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[21:33:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[21:33:14] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[21:33:14] ================ [PASSED] drm_panic_helper =================
[21:33:14] ============== drm_plane_helper (2 subtests) ===============
[21:33:14] =============== drm_test_check_plane_state ================
[21:33:14] [PASSED] clipping_simple
[21:33:14] [PASSED] clipping_rotate_reflect
[21:33:14] [PASSED] positioning_simple
[21:33:14] [PASSED] upscaling
[21:33:14] [PASSED] downscaling
[21:33:14] [PASSED] rounding1
[21:33:14] [PASSED] rounding2
[21:33:14] [PASSED] rounding3
[21:33:14] [PASSED] rounding4
[21:33:14] =========== [PASSED] drm_test_check_plane_state ============
[21:33:14] =========== drm_test_check_invalid_plane_state ============
[21:33:14] [PASSED] positioning_invalid
[21:33:14] [PASSED] upscaling_invalid
[21:33:14] [PASSED] downscaling_invalid
[21:33:14] ======= [PASSED] drm_test_check_invalid_plane_state ========
[21:33:14] ================ [PASSED] drm_plane_helper =================
[21:33:14] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[21:33:14] ====== drm_test_connector_helper_tv_get_modes_check =======
[21:33:14] [PASSED] None
[21:33:14] [PASSED] PAL
[21:33:14] [PASSED] NTSC
[21:33:14] [PASSED] Both, NTSC Default
[21:33:14] [PASSED] Both, PAL Default
[21:33:14] [PASSED] Both, NTSC Default, with PAL on command-line
[21:33:14] [PASSED] Both, PAL Default, with NTSC on command-line
[21:33:14] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[21:33:14] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[21:33:14] ================== drm_rect (9 subtests) ===================
[21:33:14] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[21:33:14] [PASSED] drm_test_rect_clip_scaled_not_clipped
[21:33:14] [PASSED] drm_test_rect_clip_scaled_clipped
[21:33:14] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[21:33:14] ================= drm_test_rect_intersect =================
[21:33:14] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[21:33:14] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[21:33:14] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[21:33:14] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[21:33:14] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[21:33:14] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[21:33:14] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[21:33:14] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[21:33:14] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[21:33:14] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[21:33:14] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[21:33:14] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[21:33:14] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[21:33:14] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[21:33:14] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[21:33:14] ============= [PASSED] drm_test_rect_intersect =============
[21:33:14] ================ drm_test_rect_calc_hscale ================
[21:33:14] [PASSED] normal use
[21:33:14] [PASSED] out of max range
[21:33:14] [PASSED] out of min range
[21:33:14] [PASSED] zero dst
[21:33:14] [PASSED] negative src
[21:33:14] [PASSED] negative dst
[21:33:14] ============ [PASSED] drm_test_rect_calc_hscale ============
[21:33:14] ================ drm_test_rect_calc_vscale ================
[21:33:14] [PASSED] normal use
[21:33:14] [PASSED] out of max range
[21:33:14] [PASSED] out of min range
[21:33:14] [PASSED] zero dst
[21:33:14] [PASSED] negative src
[21:33:14] [PASSED] negative dst
[21:33:14] ============ [PASSED] drm_test_rect_calc_vscale ============
[21:33:14] ================== drm_test_rect_rotate ===================
[21:33:14] [PASSED] reflect-x
[21:33:14] [PASSED] reflect-y
[21:33:14] [PASSED] rotate-0
[21:33:14] [PASSED] rotate-90
[21:33:14] [PASSED] rotate-180
[21:33:14] [PASSED] rotate-270
[21:33:14] ============== [PASSED] drm_test_rect_rotate ===============
[21:33:14] ================ drm_test_rect_rotate_inv =================
[21:33:14] [PASSED] reflect-x
[21:33:14] [PASSED] reflect-y
[21:33:14] [PASSED] rotate-0
[21:33:14] [PASSED] rotate-90
[21:33:14] [PASSED] rotate-180
[21:33:14] [PASSED] rotate-270
[21:33:14] ============ [PASSED] drm_test_rect_rotate_inv =============
[21:33:14] ==================== [PASSED] drm_rect =====================
[21:33:14] ============ drm_sysfb_modeset_test (1 subtest) ============
[21:33:14] ============ drm_test_sysfb_build_fourcc_list =============
[21:33:14] [PASSED] no native formats
[21:33:14] [PASSED] XRGB8888 as native format
[21:33:14] [PASSED] remove duplicates
[21:33:14] [PASSED] convert alpha formats
[21:33:14] [PASSED] random formats
[21:33:14] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[21:33:14] ============= [PASSED] drm_sysfb_modeset_test ==============
[21:33:14] ================== drm_fixp (2 subtests) ===================
[21:33:14] [PASSED] drm_test_int2fixp
[21:33:14] [PASSED] drm_test_sm2fixp
[21:33:14] ==================== [PASSED] drm_fixp =====================
[21:33:14] ============================================================
[21:33:14] Testing complete. Ran 667 tests: passed: 667
[21:33:14] Elapsed time: 28.236s total, 2.474s configuring, 25.297s building, 0.414s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[21:33:14] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:33:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:33:27] Starting KUnit Kernel (1/1)...
[21:33:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:33:27] ================= ttm_device (5 subtests) ==================
[21:33:27] [PASSED] ttm_device_init_basic
[21:33:27] [PASSED] ttm_device_init_multiple
[21:33:27] [PASSED] ttm_device_fini_basic
[21:33:27] [PASSED] ttm_device_init_no_vma_man
[21:33:27] ================== ttm_device_init_pools ==================
[21:33:27] [PASSED] No DMA allocations, no DMA32 required
[21:33:27] [PASSED] DMA allocations, DMA32 required
[21:33:27] [PASSED] No DMA allocations, DMA32 required
[21:33:27] [PASSED] DMA allocations, no DMA32 required
[21:33:27] ============== [PASSED] ttm_device_init_pools ==============
[21:33:27] =================== [PASSED] ttm_device ====================
[21:33:27] ================== ttm_pool (8 subtests) ===================
[21:33:27] ================== ttm_pool_alloc_basic ===================
[21:33:27] [PASSED] One page
[21:33:27] [PASSED] More than one page
[21:33:27] [PASSED] Above the allocation limit
[21:33:27] [PASSED] One page, with coherent DMA mappings enabled
[21:33:27] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:33:27] ============== [PASSED] ttm_pool_alloc_basic ===============
[21:33:27] ============== ttm_pool_alloc_basic_dma_addr ==============
[21:33:27] [PASSED] One page
[21:33:27] [PASSED] More than one page
[21:33:27] [PASSED] Above the allocation limit
[21:33:27] [PASSED] One page, with coherent DMA mappings enabled
[21:33:27] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:33:27] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[21:33:27] [PASSED] ttm_pool_alloc_order_caching_match
[21:33:27] [PASSED] ttm_pool_alloc_caching_mismatch
[21:33:27] [PASSED] ttm_pool_alloc_order_mismatch
[21:33:27] [PASSED] ttm_pool_free_dma_alloc
[21:33:27] [PASSED] ttm_pool_free_no_dma_alloc
[21:33:27] [PASSED] ttm_pool_fini_basic
[21:33:27] ==================== [PASSED] ttm_pool =====================
[21:33:27] ================ ttm_resource (8 subtests) =================
[21:33:27] ================= ttm_resource_init_basic =================
[21:33:27] [PASSED] Init resource in TTM_PL_SYSTEM
[21:33:27] [PASSED] Init resource in TTM_PL_VRAM
[21:33:27] [PASSED] Init resource in a private placement
[21:33:27] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[21:33:27] ============= [PASSED] ttm_resource_init_basic =============
[21:33:27] [PASSED] ttm_resource_init_pinned
[21:33:27] [PASSED] ttm_resource_fini_basic
[21:33:27] [PASSED] ttm_resource_manager_init_basic
[21:33:27] [PASSED] ttm_resource_manager_usage_basic
[21:33:27] [PASSED] ttm_resource_manager_set_used_basic
[21:33:27] [PASSED] ttm_sys_man_alloc_basic
[21:33:27] [PASSED] ttm_sys_man_free_basic
[21:33:27] ================== [PASSED] ttm_resource ===================
[21:33:27] =================== ttm_tt (15 subtests) ===================
[21:33:27] ==================== ttm_tt_init_basic ====================
[21:33:27] [PASSED] Page-aligned size
[21:33:27] [PASSED] Extra pages requested
[21:33:27] ================ [PASSED] ttm_tt_init_basic ================
[21:33:27] [PASSED] ttm_tt_init_misaligned
[21:33:27] [PASSED] ttm_tt_fini_basic
[21:33:27] [PASSED] ttm_tt_fini_sg
[21:33:27] [PASSED] ttm_tt_fini_shmem
[21:33:27] [PASSED] ttm_tt_create_basic
[21:33:27] [PASSED] ttm_tt_create_invalid_bo_type
[21:33:27] [PASSED] ttm_tt_create_ttm_exists
[21:33:27] [PASSED] ttm_tt_create_failed
[21:33:27] [PASSED] ttm_tt_destroy_basic
[21:33:27] [PASSED] ttm_tt_populate_null_ttm
[21:33:27] [PASSED] ttm_tt_populate_populated_ttm
[21:33:27] [PASSED] ttm_tt_unpopulate_basic
[21:33:27] [PASSED] ttm_tt_unpopulate_empty_ttm
[21:33:27] [PASSED] ttm_tt_swapin_basic
[21:33:27] ===================== [PASSED] ttm_tt ======================
[21:33:27] =================== ttm_bo (14 subtests) ===================
[21:33:27] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[21:33:27] [PASSED] Cannot be interrupted and sleeps
[21:33:27] [PASSED] Cannot be interrupted, locks straight away
[21:33:27] [PASSED] Can be interrupted, sleeps
[21:33:27] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[21:33:27] [PASSED] ttm_bo_reserve_locked_no_sleep
[21:33:27] [PASSED] ttm_bo_reserve_no_wait_ticket
[21:33:27] [PASSED] ttm_bo_reserve_double_resv
[21:33:27] [PASSED] ttm_bo_reserve_interrupted
[21:33:27] [PASSED] ttm_bo_reserve_deadlock
[21:33:27] [PASSED] ttm_bo_unreserve_basic
[21:33:27] [PASSED] ttm_bo_unreserve_pinned
[21:33:27] [PASSED] ttm_bo_unreserve_bulk
[21:33:27] [PASSED] ttm_bo_fini_basic
[21:33:27] [PASSED] ttm_bo_fini_shared_resv
[21:33:27] [PASSED] ttm_bo_pin_basic
[21:33:27] [PASSED] ttm_bo_pin_unpin_resource
[21:33:27] [PASSED] ttm_bo_multiple_pin_one_unpin
[21:33:27] ===================== [PASSED] ttm_bo ======================
[21:33:27] ============== ttm_bo_validate (22 subtests) ===============
[21:33:27] ============== ttm_bo_init_reserved_sys_man ===============
[21:33:27] [PASSED] Buffer object for userspace
[21:33:27] [PASSED] Kernel buffer object
[21:33:27] [PASSED] Shared buffer object
[21:33:27] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[21:33:27] ============== ttm_bo_init_reserved_mock_man ==============
[21:33:27] [PASSED] Buffer object for userspace
[21:33:27] [PASSED] Kernel buffer object
[21:33:27] [PASSED] Shared buffer object
[21:33:27] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[21:33:27] [PASSED] ttm_bo_init_reserved_resv
[21:33:27] ================== ttm_bo_validate_basic ==================
[21:33:27] [PASSED] Buffer object for userspace
[21:33:27] [PASSED] Kernel buffer object
[21:33:27] [PASSED] Shared buffer object
[21:33:27] ============== [PASSED] ttm_bo_validate_basic ==============
[21:33:27] [PASSED] ttm_bo_validate_invalid_placement
[21:33:27] ============= ttm_bo_validate_same_placement ==============
[21:33:27] [PASSED] System manager
[21:33:27] [PASSED] VRAM manager
[21:33:27] ========= [PASSED] ttm_bo_validate_same_placement ==========
[21:33:27] [PASSED] ttm_bo_validate_failed_alloc
[21:33:27] [PASSED] ttm_bo_validate_pinned
[21:33:27] [PASSED] ttm_bo_validate_busy_placement
[21:33:27] ================ ttm_bo_validate_multihop =================
[21:33:27] [PASSED] Buffer object for userspace
[21:33:27] [PASSED] Kernel buffer object
[21:33:27] [PASSED] Shared buffer object
[21:33:27] ============ [PASSED] ttm_bo_validate_multihop =============
[21:33:27] ========== ttm_bo_validate_no_placement_signaled ==========
[21:33:27] [PASSED] Buffer object in system domain, no page vector
[21:33:27] [PASSED] Buffer object in system domain with an existing page vector
[21:33:27] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[21:33:27] ======== ttm_bo_validate_no_placement_not_signaled ========
[21:33:27] [PASSED] Buffer object for userspace
[21:33:27] [PASSED] Kernel buffer object
[21:33:27] [PASSED] Shared buffer object
[21:33:27] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[21:33:27] [PASSED] ttm_bo_validate_move_fence_signaled
[21:33:27] ========= ttm_bo_validate_move_fence_not_signaled =========
[21:33:27] [PASSED] Waits for GPU
[21:33:27] [PASSED] Tries to lock straight away
[21:33:27] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[21:33:27] [PASSED] ttm_bo_validate_swapout
[21:33:27] [PASSED] ttm_bo_validate_happy_evict
[21:33:27] [PASSED] ttm_bo_validate_all_pinned_evict
[21:33:27] [PASSED] ttm_bo_validate_allowed_only_evict
[21:33:27] [PASSED] ttm_bo_validate_deleted_evict
[21:33:27] [PASSED] ttm_bo_validate_busy_domain_evict
[21:33:27] [PASSED] ttm_bo_validate_evict_gutting
[21:33:27] [PASSED] ttm_bo_validate_recrusive_evict
[21:33:27] ================= [PASSED] ttm_bo_validate =================
[21:33:27] ============================================================
[21:33:27] Testing complete. Ran 102 tests: passed: 102
[21:33:27] Elapsed time: 12.965s total, 2.553s configuring, 10.147s building, 0.225s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[21:33:27] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:33:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:33:38] Starting KUnit Kernel (1/1)...
[21:33:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:33:38] =============== dma-buf-fence (12 subtests) ================
[21:33:38] [PASSED] test_sanitycheck
[21:33:38] [PASSED] test_signaling
[21:33:38] [PASSED] test_add_callback
[21:33:38] [PASSED] test_late_add_callback
[21:33:38] [PASSED] test_rm_callback
[21:33:38] [PASSED] test_late_rm_callback
[21:33:38] [PASSED] test_status
[21:33:38] [PASSED] test_error
[21:33:38] [PASSED] test_wait
[21:33:38] [PASSED] test_wait_timeout
[21:33:38] [PASSED] test_stub
[21:33:38] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[21:33:38] ================== [PASSED] dma-buf-fence ==================
[21:33:38] ============ dma-buf-fence-chain (11 subtests) =============
[21:33:38] [PASSED] test_sanitycheck
[21:33:38] [PASSED] test_find_seqno
[21:33:38] [PASSED] test_find_signaled
[21:33:38] [PASSED] test_find_out_of_order
[21:33:44] [PASSED] test_find_gap
[21:33:44] [PASSED] test_find_race
[21:33:44] [PASSED] test_signal_forward
[21:33:44] [PASSED] test_signal_backward
[21:33:44] [PASSED] test_wait_forward
[21:33:44] [PASSED] test_wait_backward
[21:33:44] [PASSED] test_wait_random
[21:33:44] =============== [PASSED] dma-buf-fence-chain ===============
[21:33:44] ============ dma-buf-fence-unwrap (11 subtests) ============
[21:33:44] [PASSED] test_sanitycheck
[21:33:44] [PASSED] test_unwrap_array
[21:33:44] [PASSED] test_unwrap_chain
[21:33:44] [PASSED] test_unwrap_chain_array
[21:33:44] [PASSED] test_unwrap_merge
[21:33:44] [PASSED] test_unwrap_merge_duplicate
[21:33:44] [PASSED] test_unwrap_merge_seqno
[21:33:44] [PASSED] test_unwrap_merge_order
[21:33:44] [PASSED] test_unwrap_merge_complex
[21:33:44] [PASSED] test_unwrap_merge_complex_seqno
[21:33:44] [PASSED] test_dedup_empty
[21:33:44] ============== [PASSED] dma-buf-fence-unwrap ===============
[21:33:44] ================ dma-buf-resv (5 subtests) =================
[21:33:44] [PASSED] test_sanitycheck
[21:33:44] ===================== test_signaling ======================
[21:33:44] [PASSED] kernel
[21:33:44] [PASSED] write
[21:33:44] [PASSED] read
[21:33:44] [PASSED] bookkeep
[21:33:44] ================= [PASSED] test_signaling ==================
[21:33:44] ====================== test_for_each ======================
[21:33:44] [PASSED] kernel
[21:33:44] [PASSED] write
[21:33:44] [PASSED] read
[21:33:44] [PASSED] bookkeep
[21:33:44] ================== [PASSED] test_for_each ==================
[21:33:44] ================= test_for_each_unlocked ==================
[21:33:44] [PASSED] kernel
[21:33:44] [PASSED] write
[21:33:44] [PASSED] read
[21:33:44] [PASSED] bookkeep
[21:33:44] ============= [PASSED] test_for_each_unlocked ==============
[21:33:44] ===================== test_get_fences =====================
[21:33:44] [PASSED] kernel
[21:33:44] [PASSED] write
[21:33:44] [PASSED] read
[21:33:44] [PASSED] bookkeep
[21:33:44] ================= [PASSED] test_get_fences =================
[21:33:44] ================== [PASSED] dma-buf-resv ===================
[21:33:44] ============================================================
[21:33:44] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[21:33:44] Elapsed time: 16.602s total, 2.515s configuring, 8.814s building, 5.258s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 11+ messages in thread* ✓ Xe.CI.BAT: success for drm/xe: Add mode-3 fault inspection with debugfs release
2026-11-02 21:02 [PATCH 0/3] drm/xe: Add mode-3 fault inspection with debugfs release Daniel Charles
` (4 preceding siblings ...)
2026-11-02 21:33 ` ✓ CI.KUnit: success " Patchwork
@ 2026-11-02 22:08 ` Patchwork
2026-11-03 0:08 ` ✓ Xe.CI.FULL: " Patchwork
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-11-02 22:08 UTC (permalink / raw)
To: Daniel Charles; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1261 bytes --]
== Series Details ==
Series: drm/xe: Add mode-3 fault inspection with debugfs release
URL : https://patchwork.freedesktop.org/series/177508/
State : success
== Summary ==
CI Bug Log - changes from xe-6047-2cd78713d917a02987f21b437561a5e1e13ddda2_BAT -> xe-pw-177508v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (15 -> 15)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-177508v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@runner@aborted:
- bat-atsm-2: NOTRUN -> [FAIL][1] ([Intel XE#9717])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177508v1/bat-atsm-2/igt@runner@aborted.html
[Intel XE#9717]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9717
Build changes
-------------
* Linux: xe-6047-2cd78713d917a02987f21b437561a5e1e13ddda2 -> xe-pw-177508v1
IGT_9175: 9175
xe-6047-2cd78713d917a02987f21b437561a5e1e13ddda2: 2cd78713d917a02987f21b437561a5e1e13ddda2
xe-pw-177508v1: 177508v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177508v1/index.html
[-- Attachment #2: Type: text/html, Size: 1825 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread* ✓ Xe.CI.FULL: success for drm/xe: Add mode-3 fault inspection with debugfs release
2026-11-02 21:02 [PATCH 0/3] drm/xe: Add mode-3 fault inspection with debugfs release Daniel Charles
` (5 preceding siblings ...)
2026-11-02 22:08 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-11-03 0:08 ` Patchwork
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-11-03 0:08 UTC (permalink / raw)
To: Daniel Charles; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 879 bytes --]
== Series Details ==
Series: drm/xe: Add mode-3 fault inspection with debugfs release
URL : https://patchwork.freedesktop.org/series/177508/
State : success
== Summary ==
CI Bug Log - changes from xe-6047-2cd78713d917a02987f21b437561a5e1e13ddda2_FULL -> xe-pw-177508v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (3 -> 3)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-6047-2cd78713d917a02987f21b437561a5e1e13ddda2 -> xe-pw-177508v1
IGT_9175: 9175
xe-6047-2cd78713d917a02987f21b437561a5e1e13ddda2: 2cd78713d917a02987f21b437561a5e1e13ddda2
xe-pw-177508v1: 177508v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177508v1/index.html
[-- Attachment #2: Type: text/html, Size: 1427 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread