[PATCH] drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind()

[PATCH] drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind()

[Matthew Brost]

On L2-flush-optimized HW with a dma-resv (non-fault) VM, evicting a BO
only needs to flush the L2 cache before the migration copy runs; the
mappings themselves are torn down and rebuilt lazily via
drm_gpuvm_bo_evict() and a subsequent rebind. Today this flush is done
by waiting for the BO to go idle and then issuing a synchronous TLB
invalidation per mapping VMA from inside xe_bo_trigger_rebind(). Both
the idle wait and the synchronous invalidation stall the calling thread
while holding the BO dma-resv lock, serializing the move behind all
in-flight GPU work on the BO.

Replace this with an asynchronous flush. Add xe_vm_flush_vm_bo_tlb_async()
which, for each VMA mapping the BO on each present tile, queues a TLB
invalidation job on the tile migrate (kernel) exec queue. The jobs depend
on the BO's in-flight GPU work, captured once as a singleton over
DMA_RESV_USAGE_BOOKKEEP, so the flush only fires once the GPU is done with
the current mapping. Each job's completion fence is installed into the
BO's dma-resv as a DMA_RESV_USAGE_KERNEL fence, so the migration copy -
which waits on the resv - waits on the flush without stalling this thread.

No PTEs are zapped and vma->tile_invalidated is left untouched: the
mapping stays valid until the lazy rebind, and the only work performed
here is the L2 flush. On any failure the caller falls back to the
existing blocking wait-idle plus xe_vm_invalidate_vma() path.

Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Assisted-by: GitHub_Copilot:claude-opus-4.8
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_bo.c |  12 ++++
 drivers/gpu/drm/xe/xe_vm.c | 125 +++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_vm.h |   5 ++
 3 files changed, 142 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 85e6d9a0f575..a08b983cb0b1 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -686,6 +686,18 @@ static int xe_bo_trigger_rebind(struct xe_device *xe, struct xe_bo *bo,
 			 */
 			if (!xe_device_is_l2_flush_optimized(xe))
 				continue;
+
+			/*
+			 * On L2-flush-optimized HW the only reason to touch the
+			 * mappings here is to flush L2 via a TLB invalidation.
+			 * Do it asynchronously: queue TLB-invalidation jobs that
+			 * wait on the BO's in-flight GPU work and install their
+			 * completion fences into the BO's kernel dma-resv slots,
+			 * so the migration waits on the flush without stalling
+			 * this thread. Fall back to the blocking path on failure.
+			 */
+			if (!xe_vm_flush_vm_bo_tlb_async(vm, bo, vm_bo))
+				continue;
 		}
 
 		if (!idle) {
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 73ac031ffb04..4557a8a4d270 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -39,6 +39,7 @@
 #include "xe_sync.h"
 #include "xe_tile.h"
 #include "xe_tlb_inval.h"
+#include "xe_tlb_inval_job.h"
 #include "xe_trace_bo.h"
 #include "xe_vm_madvise.h"
 #include "xe_wa.h"
@@ -4401,6 +4402,130 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
 	return ret;
 }
 
+/*
+ * xe_vma_tlb_flush_client - Queue an async TLB flush for one VMA on one client
+ *
+ * Create and push a TLB invalidation job on the tile migrate (kernel) exec
+ * queue covering @vma's range, depending on @dep (the BO's in-flight GPU work)
+ * so the flush only fires once the GPU is done with the current mapping. The
+ * job's completion fence is installed into @resv as a KERNEL fence so the
+ * subsequent migration waits on the flush. No PTEs are zapped; this only
+ * flushes L2 via the TLB invalidation.
+ */
+static int xe_vma_tlb_flush_client(struct xe_vm *vm, struct xe_vma *vma,
+				   struct xe_tile *tile, struct xe_gt *gt,
+				   struct dma_resv *resv, struct dma_fence *dep,
+				   int type)
+{
+	struct xe_exec_queue *q = xe_migrate_exec_queue(tile->migrate);
+	struct xe_tlb_inval_job *job;
+	struct dma_fence *fence;
+	int err;
+
+	job = xe_tlb_inval_job_create(q, &gt->tlb_inval,
+				      q->tlb_inval[type].dep_scheduler, vm,
+				      xe_vma_start(vma), xe_vma_end(vma), type);
+	if (IS_ERR(job))
+		return PTR_ERR(job);
+
+	err = xe_tlb_inval_job_alloc_dep(job);
+	if (err)
+		goto out_put;
+
+	err = dma_resv_reserve_fences(resv, 1);
+	if (err)
+		goto out_put;
+
+	/* Cannot fail; consumes a ref on @dep and returns a referenced fence. */
+	fence = xe_tlb_inval_job_push(job, tile->migrate, dep);
+	dma_resv_add_fence(resv, fence, DMA_RESV_USAGE_KERNEL);
+	dma_fence_put(fence);
+
+out_put:
+	/* Drop the creation reference (destroys the job if it was not pushed). */
+	xe_tlb_inval_job_put(job);
+	return err;
+}
+
+/**
+ * xe_vm_flush_vm_bo_tlb_async - Asynchronously flush TLBs for a vm_bo's mappings
+ * @vm: The VM @vm_bo belongs to
+ * @bo: The buffer object being moved
+ * @vm_bo: The gpuvm_bo linking @bo into @vm
+ *
+ * On L2-flush-optimized HW a BO move only needs to flush L2 (via a TLB
+ * invalidation) for the BO's live mappings; the mappings themselves are torn
+ * down and rebuilt lazily via the eviction/rebind path, so no PTEs need to be
+ * zapped here. Rather than blocking the caller on a synchronous invalidation,
+ * issue a TLB invalidation job per VMA per TLB-invalidation client (per present
+ * tile, primary and media GT). Each job waits on the BO's in-flight GPU work
+ * (all dma-resv usages) and its completion fence is installed into the BO's
+ * dma-resv KERNEL slots, so the following migration waits on the flush without
+ * stalling this thread.
+ *
+ * The caller must hold the BO's dma-resv lock and @vm must not be in fault
+ * mode.
+ *
+ * Return: 0 on success, negative error code on failure. On failure the caller
+ * should fall back to the blocking xe_vm_invalidate_vma() path; any jobs
+ * already queued install harmless extra flush fences.
+ */
+int xe_vm_flush_vm_bo_tlb_async(struct xe_vm *vm, struct xe_bo *bo,
+				struct drm_gpuvm_bo *vm_bo)
+{
+	struct xe_device *xe = vm->xe;
+	struct dma_resv *resv = bo->ttm.base.resv;
+	struct dma_fence *dep = NULL;
+	struct drm_gpuva *gpuva;
+	int err;
+
+	dma_resv_assert_held(resv);
+	xe_assert(xe, !xe_vm_in_fault_mode(vm));
+
+	/*
+	 * Single fence capturing all in-flight GPU work on the BO; the TLB
+	 * invalidation jobs depend on it so the flush fires only once the GPU
+	 * is done with the current mapping.
+	 */
+	err = dma_resv_get_singleton(resv, DMA_RESV_USAGE_BOOKKEEP, &dep);
+	if (err)
+		return err;
+	if (!dep)
+		dep = dma_fence_get_stub();
+
+	drm_gpuvm_bo_for_each_va(gpuva, vm_bo) {
+		struct xe_vma *vma = gpuva_to_vma(gpuva);
+		struct xe_tile *tile;
+		u8 id;
+
+		if (xe_vma_is_null(vma) || xe_vma_is_cpu_addr_mirror(vma))
+			continue;
+
+		for_each_tile(tile, xe, id) {
+			if (!(vma->tile_present & BIT(id)))
+				continue;
+
+			err = xe_vma_tlb_flush_client(vm, vma, tile,
+						      tile->primary_gt, resv, dep,
+						      XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
+			if (err)
+				goto out;
+
+			if (tile->media_gt) {
+				err = xe_vma_tlb_flush_client(vm, vma, tile,
+							      tile->media_gt, resv, dep,
+							      XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT);
+				if (err)
+					goto out;
+			}
+		}
+	}
+
+out:
+	dma_fence_put(dep);
+	return err;
+}
+
 int xe_vm_validate_protected(struct xe_vm *vm)
 {
 	struct drm_gpuva *gpuva;
diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
index c5b900f38ded..dd5b070eaede 100644
--- a/drivers/gpu/drm/xe/xe_vm.h
+++ b/drivers/gpu/drm/xe/xe_vm.h
@@ -26,6 +26,8 @@ struct ttm_buffer_object;
 
 struct dma_fence;
 
+struct xe_bo;
+struct drm_gpuvm_bo;
 struct xe_exec_queue;
 struct xe_file;
 struct xe_pagefault;
@@ -254,6 +256,9 @@ int xe_vm_invalidate_vma(struct xe_vma *vma);
 
 int xe_vm_invalidate_vma_submit(struct xe_vma *vma, struct xe_tlb_inval_batch *batch);
 
+int xe_vm_flush_vm_bo_tlb_async(struct xe_vm *vm, struct xe_bo *bo,
+				struct drm_gpuvm_bo *vm_bo);
+
 int xe_vm_validate_protected(struct xe_vm *vm);
 
 static inline void xe_vm_queue_rebind_worker(struct xe_vm *vm)
-- 
2.34.1

Re: [PATCH] drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind()

[Thomas Hellström]

On Wed, 2026-07-08 at 19:49 -0700, Matthew Brost wrote:
> On L2-flush-optimized HW with a dma-resv (non-fault) VM, evicting a
> BO
> only needs to flush the L2 cache before the migration copy runs; the
> mappings themselves are torn down and rebuilt lazily via
> drm_gpuvm_bo_evict() and a subsequent rebind. Today this flush is
> done
> by waiting for the BO to go idle and then issuing a synchronous TLB
> invalidation per mapping VMA from inside xe_bo_trigger_rebind(). Both
> the idle wait and the synchronous invalidation stall the calling
> thread
> while holding the BO dma-resv lock, serializing the move behind all
> in-flight GPU work on the BO.
> 
> Replace this with an asynchronous flush. Add
> xe_vm_flush_vm_bo_tlb_async()
> which, for each VMA mapping the BO on each present tile, queues a TLB
> invalidation job on the tile migrate (kernel) exec queue. The jobs
> depend
> on the BO's in-flight GPU work, captured once as a singleton over
> DMA_RESV_USAGE_BOOKKEEP, so the flush only fires once the GPU is done
> with
> the current mapping. Each job's completion fence is installed into
> the
> BO's dma-resv as a DMA_RESV_USAGE_KERNEL fence, so the migration copy
> -
> which waits on the resv - waits on the flush without stalling this
> thread.
> 
> No PTEs are zapped and vma->tile_invalidated is left untouched: the
> mapping stays valid until the lazy rebind, and the only work
> performed
> here is the L2 flush. On any failure the caller falls back to the
> existing blocking wait-idle plus xe_vm_invalidate_vma() path.
> 
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
> Assisted-by: GitHub_Copilot:claude-opus-4.8
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>

Is there possibly a way to do this using a GPU command now that we're
making it async anyway?

> ---
>  drivers/gpu/drm/xe/xe_bo.c |  12 ++++
>  drivers/gpu/drm/xe/xe_vm.c | 125
> +++++++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_vm.h |   5 ++
>  3 files changed, 142 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 85e6d9a0f575..a08b983cb0b1 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -686,6 +686,18 @@ static int xe_bo_trigger_rebind(struct xe_device
> *xe, struct xe_bo *bo,
>  			 */
>  			if (!xe_device_is_l2_flush_optimized(xe))
>  				continue;
> +
> +			/*
> +			 * On L2-flush-optimized HW the only reason
> to touch the
> +			 * mappings here is to flush L2 via a TLB
> invalidation.
> +			 * Do it asynchronously: queue TLB-
> invalidation jobs that
> +			 * wait on the BO's in-flight GPU work and
> install their
> +			 * completion fences into the BO's kernel
> dma-resv slots,
> +			 * so the migration waits on the flush
> without stalling
> +			 * this thread. Fall back to the blocking
> path on failure.
> +			 */

This more or less echoes the xe_vm_flush_vm_bo_tlb_async() kerneldoc.
Perhaps /* Attempt to flush L2 async, fallback to sync flush on failure
*/?

> +			if (!xe_vm_flush_vm_bo_tlb_async(vm, bo,
> vm_bo))
> +				continue;
>  		}
>  
>  		if (!idle) {
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 73ac031ffb04..4557a8a4d270 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -39,6 +39,7 @@
>  #include "xe_sync.h"
>  #include "xe_tile.h"
>  #include "xe_tlb_inval.h"
> +#include "xe_tlb_inval_job.h"
>  #include "xe_trace_bo.h"
>  #include "xe_vm_madvise.h"
>  #include "xe_wa.h"
> @@ -4401,6 +4402,130 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
>  	return ret;
>  }
>  
> +/*
> + * xe_vma_tlb_flush_client - Queue an async TLB flush for one VMA on
> one client
> + *
> + * Create and push a TLB invalidation job on the tile migrate
> (kernel) exec
> + * queue covering @vma's range, depending on @dep (the BO's in-
> flight GPU work)
> + * so the flush only fires once the GPU is done with the current
> mapping. The
> + * job's completion fence is installed into @resv as a KERNEL fence
> so the
> + * subsequent migration waits on the flush. No PTEs are zapped; this
> only
> + * flushes L2 via the TLB invalidation.
> + */
> +static int xe_vma_tlb_flush_client(struct xe_vm *vm, struct xe_vma
> *vma,
> +				   struct xe_tile *tile, struct
> xe_gt *gt,
> +				   struct dma_resv *resv, struct
> dma_fence *dep,
> +				   int type)
> +{
> +	struct xe_exec_queue *q = xe_migrate_exec_queue(tile-
> >migrate);
> +	struct xe_tlb_inval_job *job;
> +	struct dma_fence *fence;
> +	int err;
> +
> +	job = xe_tlb_inval_job_create(q, &gt->tlb_inval,
> +				      q-
> >tlb_inval[type].dep_scheduler, vm,
> +				      xe_vma_start(vma),
> xe_vma_end(vma), type);
> +	if (IS_ERR(job))
> +		return PTR_ERR(job);
> +
> +	err = xe_tlb_inval_job_alloc_dep(job);
> +	if (err)
> +		goto out_put;
> +
> +	err = dma_resv_reserve_fences(resv, 1);
> +	if (err)
> +		goto out_put;
> +
> +	/* Cannot fail; consumes a ref on @dep and returns a
> referenced fence. */
> +	fence = xe_tlb_inval_job_push(job, tile->migrate, dep);
> +	dma_resv_add_fence(resv, fence, DMA_RESV_USAGE_KERNEL);
> +	dma_fence_put(fence);
> +
> +out_put:
> +	/* Drop the creation reference (destroys the job if it was
> not pushed). */
> +	xe_tlb_inval_job_put(job);
> +	return err;
> +}
> +
> +/**
> + * xe_vm_flush_vm_bo_tlb_async - Asynchronously flush TLBs for a
> vm_bo's mappings
> + * @vm: The VM @vm_bo belongs to
> + * @bo: The buffer object being moved
> + * @vm_bo: The gpuvm_bo linking @bo into @vm
> + *
> + * On L2-flush-optimized HW a BO move only needs to flush L2 (via a
> TLB
> + * invalidation) for the BO's live mappings; the mappings themselves
> are torn
> + * down and rebuilt lazily via the eviction/rebind path, so no PTEs
> need to be
> + * zapped here. Rather than blocking the caller on a synchronous
> invalidation,
> + * issue a TLB invalidation job per VMA per TLB-invalidation client
> (per present
> + * tile, primary and media GT). Each job waits on the BO's in-flight
> GPU work
> + * (all dma-resv usages) and its completion fence is installed into
> the BO's
> + * dma-resv KERNEL slots, so the following migration waits on the
> flush without
> + * stalling this thread.
> + *
> + * The caller must hold the BO's dma-resv lock and @vm must not be
> in fault
> + * mode.
> + *
> + * Return: 0 on success, negative error code on failure. On failure
> the caller
> + * should fall back to the blocking xe_vm_invalidate_vma() path; any
> jobs
> + * already queued install harmless extra flush fences.
> + */
> +int xe_vm_flush_vm_bo_tlb_async(struct xe_vm *vm, struct xe_bo *bo,
> +				struct drm_gpuvm_bo *vm_bo)
> +{
> +	struct xe_device *xe = vm->xe;
> +	struct dma_resv *resv = bo->ttm.base.resv;
> +	struct dma_fence *dep = NULL;
> +	struct drm_gpuva *gpuva;
> +	int err;
> +
> +	dma_resv_assert_held(resv);
> +	xe_assert(xe, !xe_vm_in_fault_mode(vm));
> +
> +	/*
> +	 * Single fence capturing all in-flight GPU work on the BO;
> the TLB
> +	 * invalidation jobs depend on it so the flush fires only
> once the GPU
> +	 * is done with the current mapping.
> +	 */
> +	err = dma_resv_get_singleton(resv, DMA_RESV_USAGE_BOOKKEEP,
> &dep);
> +	if (err)
> +		return err;
> +	if (!dep)
> +		dep = dma_fence_get_stub();
> +
> +	drm_gpuvm_bo_for_each_va(gpuva, vm_bo) {
> +		struct xe_vma *vma = gpuva_to_vma(gpuva);
> +		struct xe_tile *tile;
> +		u8 id;
> +
> +		if (xe_vma_is_null(vma) ||
> xe_vma_is_cpu_addr_mirror(vma))
> +			continue;
> +
> +		for_each_tile(tile, xe, id) {
> +			if (!(vma->tile_present & BIT(id)))
> +				continue;
> +
> +			err = xe_vma_tlb_flush_client(vm, vma, tile,
> +						      tile-
> >primary_gt, resv, dep,
> +						     
> XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> +			if (err)
> +				goto out;
> +
> +			if (tile->media_gt) {
> +				err = xe_vma_tlb_flush_client(vm,
> vma, tile,
> +							      tile-
> >media_gt, resv, dep,
> +							     
> XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT);
> +				if (err)
> +					goto out;
> +			}
> +		}
> +	}
> +
> +out:
> +	dma_fence_put(dep);
> +	return err;
> +}
> +
>  int xe_vm_validate_protected(struct xe_vm *vm)
>  {
>  	struct drm_gpuva *gpuva;
> diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
> index c5b900f38ded..dd5b070eaede 100644
> --- a/drivers/gpu/drm/xe/xe_vm.h
> +++ b/drivers/gpu/drm/xe/xe_vm.h
> @@ -26,6 +26,8 @@ struct ttm_buffer_object;
>  
>  struct dma_fence;
>  
> +struct xe_bo;
> +struct drm_gpuvm_bo;
>  struct xe_exec_queue;
>  struct xe_file;
>  struct xe_pagefault;
> @@ -254,6 +256,9 @@ int xe_vm_invalidate_vma(struct xe_vma *vma);
>  
>  int xe_vm_invalidate_vma_submit(struct xe_vma *vma, struct
> xe_tlb_inval_batch *batch);
>  
> +int xe_vm_flush_vm_bo_tlb_async(struct xe_vm *vm, struct xe_bo *bo,
> +				struct drm_gpuvm_bo *vm_bo);
> +
>  int xe_vm_validate_protected(struct xe_vm *vm);
>  
>  static inline void xe_vm_queue_rebind_worker(struct xe_vm *vm)

Otherwise LGTM.
/Thomas

Re: [PATCH] drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind()

[Matthew Brost]

On Thu, Jul 09, 2026 at 11:41:00AM +0200, Thomas Hellström wrote:
> On Wed, 2026-07-08 at 19:49 -0700, Matthew Brost wrote:
> > On L2-flush-optimized HW with a dma-resv (non-fault) VM, evicting a
> > BO
> > only needs to flush the L2 cache before the migration copy runs; the
> > mappings themselves are torn down and rebuilt lazily via
> > drm_gpuvm_bo_evict() and a subsequent rebind. Today this flush is
> > done
> > by waiting for the BO to go idle and then issuing a synchronous TLB
> > invalidation per mapping VMA from inside xe_bo_trigger_rebind(). Both
> > the idle wait and the synchronous invalidation stall the calling
> > thread
> > while holding the BO dma-resv lock, serializing the move behind all
> > in-flight GPU work on the BO.
> > 
> > Replace this with an asynchronous flush. Add
> > xe_vm_flush_vm_bo_tlb_async()
> > which, for each VMA mapping the BO on each present tile, queues a TLB
> > invalidation job on the tile migrate (kernel) exec queue. The jobs
> > depend
> > on the BO's in-flight GPU work, captured once as a singleton over
> > DMA_RESV_USAGE_BOOKKEEP, so the flush only fires once the GPU is done
> > with
> > the current mapping. Each job's completion fence is installed into
> > the
> > BO's dma-resv as a DMA_RESV_USAGE_KERNEL fence, so the migration copy
> > -
> > which waits on the resv - waits on the flush without stalling this
> > thread.
> > 
> > No PTEs are zapped and vma->tile_invalidated is left untouched: the
> > mapping stays valid until the lazy rebind, and the only work
> > performed
> > here is the L2 flush. On any failure the caller falls back to the
> > existing blocking wait-idle plus xe_vm_invalidate_vma() path.
> > 
> > Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
> > Assisted-by: GitHub_Copilot:claude-opus-4.8
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> 
> Is there possibly a way to do this using a GPU command now that we're
> making it async anyway?
> 

I think there are ring instructions that can issue various types of TLB
invalidations, but offhand I'm not sure how those differ from the GAM
port invalidations (the GuC more or less programs the GAM port on the
KMD's behalf). We could look into this, but if we take this approach,
I'd layer it on top of the functions introduced in this patch. I'm also
somewhat skeptical that it would perform particularly well if a GPU
context switch (which is relatively expensive) is required to perform
the TLB invalidation and cache flush.

Or are you suggesting that, if we know a copy job will be executed as
part of `xe_bo_move()`, the first copy job could issue the TLB
invalidation and cache flush, allowing us to skip that step here? That
could work, but I don't think `xe_bo_trigger_rebind()` has that
information available yet. It seems like something worth exploring in a
follow-up patch?

> > ---
> >  drivers/gpu/drm/xe/xe_bo.c |  12 ++++
> >  drivers/gpu/drm/xe/xe_vm.c | 125
> > +++++++++++++++++++++++++++++++++++++
> >  drivers/gpu/drm/xe/xe_vm.h |   5 ++
> >  3 files changed, 142 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> > index 85e6d9a0f575..a08b983cb0b1 100644
> > --- a/drivers/gpu/drm/xe/xe_bo.c
> > +++ b/drivers/gpu/drm/xe/xe_bo.c
> > @@ -686,6 +686,18 @@ static int xe_bo_trigger_rebind(struct xe_device
> > *xe, struct xe_bo *bo,
> >  			 */
> >  			if (!xe_device_is_l2_flush_optimized(xe))
> >  				continue;
> > +
> > +			/*
> > +			 * On L2-flush-optimized HW the only reason
> > to touch the
> > +			 * mappings here is to flush L2 via a TLB
> > invalidation.
> > +			 * Do it asynchronously: queue TLB-
> > invalidation jobs that
> > +			 * wait on the BO's in-flight GPU work and
> > install their
> > +			 * completion fences into the BO's kernel
> > dma-resv slots,
> > +			 * so the migration waits on the flush
> > without stalling
> > +			 * this thread. Fall back to the blocking
> > path on failure.
> > +			 */
> 
> This more or less echoes the xe_vm_flush_vm_bo_tlb_async() kerneldoc.
> Perhaps /* Attempt to flush L2 async, fallback to sync flush on failure
> */?

Yes, let me clean this up.

> 
> > +			if (!xe_vm_flush_vm_bo_tlb_async(vm, bo,
> > vm_bo))
> > +				continue;
> >  		}
> >  
> >  		if (!idle) {
> > diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> > index 73ac031ffb04..4557a8a4d270 100644
> > --- a/drivers/gpu/drm/xe/xe_vm.c
> > +++ b/drivers/gpu/drm/xe/xe_vm.c
> > @@ -39,6 +39,7 @@
> >  #include "xe_sync.h"
> >  #include "xe_tile.h"
> >  #include "xe_tlb_inval.h"
> > +#include "xe_tlb_inval_job.h"
> >  #include "xe_trace_bo.h"
> >  #include "xe_vm_madvise.h"
> >  #include "xe_wa.h"
> > @@ -4401,6 +4402,130 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
> >  	return ret;
> >  }
> >  
> > +/*
> > + * xe_vma_tlb_flush_client - Queue an async TLB flush for one VMA on
> > one client
> > + *
> > + * Create and push a TLB invalidation job on the tile migrate
> > (kernel) exec
> > + * queue covering @vma's range, depending on @dep (the BO's in-
> > flight GPU work)
> > + * so the flush only fires once the GPU is done with the current
> > mapping. The
> > + * job's completion fence is installed into @resv as a KERNEL fence
> > so the
> > + * subsequent migration waits on the flush. No PTEs are zapped; this
> > only
> > + * flushes L2 via the TLB invalidation.
> > + */
> > +static int xe_vma_tlb_flush_client(struct xe_vm *vm, struct xe_vma
> > *vma,
> > +				   struct xe_tile *tile, struct
> > xe_gt *gt,
> > +				   struct dma_resv *resv, struct
> > dma_fence *dep,
> > +				   int type)
> > +{
> > +	struct xe_exec_queue *q = xe_migrate_exec_queue(tile-
> > >migrate);
> > +	struct xe_tlb_inval_job *job;
> > +	struct dma_fence *fence;
> > +	int err;
> > +
> > +	job = xe_tlb_inval_job_create(q, &gt->tlb_inval,
> > +				      q-
> > >tlb_inval[type].dep_scheduler, vm,
> > +				      xe_vma_start(vma),
> > xe_vma_end(vma), type);
> > +	if (IS_ERR(job))
> > +		return PTR_ERR(job);
> > +
> > +	err = xe_tlb_inval_job_alloc_dep(job);
> > +	if (err)
> > +		goto out_put;
> > +
> > +	err = dma_resv_reserve_fences(resv, 1);
> > +	if (err)
> > +		goto out_put;
> > +
> > +	/* Cannot fail; consumes a ref on @dep and returns a
> > referenced fence. */
> > +	fence = xe_tlb_inval_job_push(job, tile->migrate, dep);
> > +	dma_resv_add_fence(resv, fence, DMA_RESV_USAGE_KERNEL);
> > +	dma_fence_put(fence);
> > +
> > +out_put:
> > +	/* Drop the creation reference (destroys the job if it was
> > not pushed). */
> > +	xe_tlb_inval_job_put(job);
> > +	return err;
> > +}
> > +
> > +/**
> > + * xe_vm_flush_vm_bo_tlb_async - Asynchronously flush TLBs for a
> > vm_bo's mappings
> > + * @vm: The VM @vm_bo belongs to
> > + * @bo: The buffer object being moved
> > + * @vm_bo: The gpuvm_bo linking @bo into @vm
> > + *
> > + * On L2-flush-optimized HW a BO move only needs to flush L2 (via a
> > TLB
> > + * invalidation) for the BO's live mappings; the mappings themselves
> > are torn
> > + * down and rebuilt lazily via the eviction/rebind path, so no PTEs
> > need to be
> > + * zapped here. Rather than blocking the caller on a synchronous
> > invalidation,
> > + * issue a TLB invalidation job per VMA per TLB-invalidation client
> > (per present
> > + * tile, primary and media GT). Each job waits on the BO's in-flight
> > GPU work
> > + * (all dma-resv usages) and its completion fence is installed into
> > the BO's
> > + * dma-resv KERNEL slots, so the following migration waits on the
> > flush without
> > + * stalling this thread.
> > + *
> > + * The caller must hold the BO's dma-resv lock and @vm must not be
> > in fault
> > + * mode.
> > + *
> > + * Return: 0 on success, negative error code on failure. On failure
> > the caller
> > + * should fall back to the blocking xe_vm_invalidate_vma() path; any
> > jobs
> > + * already queued install harmless extra flush fences.
> > + */
> > +int xe_vm_flush_vm_bo_tlb_async(struct xe_vm *vm, struct xe_bo *bo,
> > +				struct drm_gpuvm_bo *vm_bo)
> > +{
> > +	struct xe_device *xe = vm->xe;
> > +	struct dma_resv *resv = bo->ttm.base.resv;
> > +	struct dma_fence *dep = NULL;
> > +	struct drm_gpuva *gpuva;
> > +	int err;
> > +
> > +	dma_resv_assert_held(resv);
> > +	xe_assert(xe, !xe_vm_in_fault_mode(vm));
> > +
> > +	/*
> > +	 * Single fence capturing all in-flight GPU work on the BO;
> > the TLB
> > +	 * invalidation jobs depend on it so the flush fires only
> > once the GPU
> > +	 * is done with the current mapping.
> > +	 */
> > +	err = dma_resv_get_singleton(resv, DMA_RESV_USAGE_BOOKKEEP,
> > &dep);
> > +	if (err)
> > +		return err;
> > +	if (!dep)
> > +		dep = dma_fence_get_stub();
> > +
> > +	drm_gpuvm_bo_for_each_va(gpuva, vm_bo) {
> > +		struct xe_vma *vma = gpuva_to_vma(gpuva);
> > +		struct xe_tile *tile;
> > +		u8 id;
> > +
> > +		if (xe_vma_is_null(vma) ||
> > xe_vma_is_cpu_addr_mirror(vma))
> > +			continue;
> > +
> > +		for_each_tile(tile, xe, id) {
> > +			if (!(vma->tile_present & BIT(id)))
> > +				continue;
> > +
> > +			err = xe_vma_tlb_flush_client(vm, vma, tile,
> > +						      tile-
> > >primary_gt, resv, dep,
> > +						     
> > XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> > +			if (err)
> > +				goto out;
> > +
> > +			if (tile->media_gt) {
> > +				err = xe_vma_tlb_flush_client(vm,
> > vma, tile,
> > +							      tile-
> > >media_gt, resv, dep,
> > +							     
> > XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT);
> > +				if (err)
> > +					goto out;
> > +			}
> > +		}
> > +	}
> > +
> > +out:
> > +	dma_fence_put(dep);
> > +	return err;
> > +}
> > +
> >  int xe_vm_validate_protected(struct xe_vm *vm)
> >  {
> >  	struct drm_gpuva *gpuva;
> > diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
> > index c5b900f38ded..dd5b070eaede 100644
> > --- a/drivers/gpu/drm/xe/xe_vm.h
> > +++ b/drivers/gpu/drm/xe/xe_vm.h
> > @@ -26,6 +26,8 @@ struct ttm_buffer_object;
> >  
> >  struct dma_fence;
> >  
> > +struct xe_bo;
> > +struct drm_gpuvm_bo;
> >  struct xe_exec_queue;
> >  struct xe_file;
> >  struct xe_pagefault;
> > @@ -254,6 +256,9 @@ int xe_vm_invalidate_vma(struct xe_vma *vma);
> >  
> >  int xe_vm_invalidate_vma_submit(struct xe_vma *vma, struct
> > xe_tlb_inval_batch *batch);
> >  
> > +int xe_vm_flush_vm_bo_tlb_async(struct xe_vm *vm, struct xe_bo *bo,
> > +				struct drm_gpuvm_bo *vm_bo);
> > +
> >  int xe_vm_validate_protected(struct xe_vm *vm);
> >  
> >  static inline void xe_vm_queue_rebind_worker(struct xe_vm *vm)
> 
> Otherwise LGTM.

Thanks.

Matt

> /Thomas

[PATCH] drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind()

[Matthew Brost]

On L2-flush-optimized HW with a dma-resv (non-fault) VM, evicting a BO
only needs to flush the L2 cache before the migration copy runs; the
mappings themselves are torn down and rebuilt lazily via
drm_gpuvm_bo_evict() and a subsequent rebind. Today this flush is done
by waiting for the BO to go idle and then issuing a synchronous TLB
invalidation per mapping VMA from inside xe_bo_trigger_rebind(). Both
the idle wait and the synchronous invalidation stall the calling thread
while holding the BO dma-resv lock, serializing the move behind all
in-flight GPU work on the BO.

Replace this with an asynchronous flush. Add xe_vm_flush_vm_bo_tlb_async()
which, for each VMA mapping the BO on each present tile, queues a TLB
invalidation job on the tile migrate (kernel) exec queue. The jobs depend
on the BO's in-flight GPU work, captured once as a singleton over
DMA_RESV_USAGE_BOOKKEEP, so the flush only fires once the GPU is done with
the current mapping. Each job's completion fence is installed into the
BO's dma-resv as a DMA_RESV_USAGE_KERNEL fence, so the migration copy -
which waits on the resv - waits on the flush without stalling this thread.

No PTEs are zapped and vma->tile_invalidated is left untouched: the
mapping stays valid until the lazy rebind, and the only work performed
here is the L2 flush. On any failure the caller falls back to the
existing blocking wait-idle plus xe_vm_invalidate_vma() path.

Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Assisted-by: LLM
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
---
 drivers/gpu/drm/xe/xe_bo.c |   3 +
 drivers/gpu/drm/xe/xe_vm.c | 125 +++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_vm.h |   5 ++
 3 files changed, 133 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 42a6aa1a2e4a..0ffe4cc46b3b 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -809,6 +809,9 @@ static int xe_bo_trigger_rebind(struct xe_device *xe, struct xe_bo *bo,
 			 */
 			if (!xe_device_is_l2_flush_optimized(xe))
 				continue;
+
+			if (!xe_vm_flush_vm_bo_tlb_async(vm, bo, vm_bo))
+				continue;
 		}
 
 		if (!idle) {
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index a26f6b20a22e..afcf41ded425 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -43,6 +43,7 @@
 #include "xe_sync.h"
 #include "xe_tile.h"
 #include "xe_tlb_inval.h"
+#include "xe_tlb_inval_job.h"
 #include "xe_trace_bo.h"
 #include "xe_vm_madvise.h"
 #include "xe_wa.h"
@@ -4611,6 +4612,130 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
 	return ret;
 }
 
+/*
+ * xe_vma_tlb_flush_client - Queue an async TLB flush for one VMA on one client
+ *
+ * Create and push a TLB invalidation job on the tile migrate (kernel) exec
+ * queue covering @vma's range, depending on @dep (the BO's in-flight GPU work)
+ * so the flush only fires once the GPU is done with the current mapping. The
+ * job's completion fence is installed into @resv as a KERNEL fence so the
+ * subsequent migration waits on the flush. No PTEs are zapped; this only
+ * flushes L2 via the TLB invalidation.
+ */
+static int xe_vma_tlb_flush_client(struct xe_vm *vm, struct xe_vma *vma,
+				   struct xe_tile *tile, struct xe_gt *gt,
+				   struct dma_resv *resv, struct dma_fence *dep,
+				   int type)
+{
+	struct xe_exec_queue *q = xe_migrate_exec_queue(tile->migrate);
+	struct xe_tlb_inval_job *job;
+	struct dma_fence *fence;
+	int err;
+
+	job = xe_tlb_inval_job_create(q, &gt->tlb_inval,
+				      q->tlb_inval[type].dep_scheduler, vm,
+				      xe_vma_start(vma), xe_vma_end(vma), type);
+	if (IS_ERR(job))
+		return PTR_ERR(job);
+
+	err = xe_tlb_inval_job_alloc_dep(job);
+	if (err)
+		goto out_put;
+
+	err = dma_resv_reserve_fences(resv, 1);
+	if (err)
+		goto out_put;
+
+	/* Cannot fail; takes its own ref on @dep and returns a referenced fence. */
+	fence = xe_tlb_inval_job_push(job, dep);
+	dma_resv_add_fence(resv, fence, DMA_RESV_USAGE_KERNEL);
+	dma_fence_put(fence);
+
+out_put:
+	/* Drop the creation reference (destroys the job if it was not pushed). */
+	xe_tlb_inval_job_put(job);
+	return err;
+}
+
+/**
+ * xe_vm_flush_vm_bo_tlb_async - Asynchronously flush TLBs for a vm_bo's mappings
+ * @vm: The VM @vm_bo belongs to
+ * @bo: The buffer object being moved
+ * @vm_bo: The gpuvm_bo linking @bo into @vm
+ *
+ * On L2-flush-optimized HW a BO move only needs to flush L2 (via a TLB
+ * invalidation) for the BO's live mappings; the mappings themselves are torn
+ * down and rebuilt lazily via the eviction/rebind path, so no PTEs need to be
+ * zapped here. Rather than blocking the caller on a synchronous invalidation,
+ * issue a TLB invalidation job per VMA per TLB-invalidation client (per present
+ * tile, primary and media GT). Each job waits on the BO's in-flight GPU work
+ * (all dma-resv usages) and its completion fence is installed into the BO's
+ * dma-resv KERNEL slots, so the following migration waits on the flush without
+ * stalling this thread.
+ *
+ * The caller must hold the BO's dma-resv lock and @vm must not be in fault
+ * mode.
+ *
+ * Return: 0 on success, negative error code on failure. On failure the caller
+ * should fall back to the blocking xe_vm_invalidate_vma() path; any jobs
+ * already queued install harmless extra flush fences.
+ */
+int xe_vm_flush_vm_bo_tlb_async(struct xe_vm *vm, struct xe_bo *bo,
+				struct drm_gpuvm_bo *vm_bo)
+{
+	struct xe_device *xe = vm->xe;
+	struct dma_resv *resv = bo->ttm.base.resv;
+	struct dma_fence *dep = NULL;
+	struct drm_gpuva *gpuva;
+	int err;
+
+	dma_resv_assert_held(resv);
+	xe_assert(xe, !xe_vm_in_fault_mode(vm));
+
+	/*
+	 * Single fence capturing all in-flight GPU work on the BO; the TLB
+	 * invalidation jobs depend on it so the flush fires only once the GPU
+	 * is done with the current mapping.
+	 */
+	err = dma_resv_get_singleton(resv, DMA_RESV_USAGE_BOOKKEEP, &dep);
+	if (err)
+		return err;
+	if (!dep)
+		dep = dma_fence_get_stub();
+
+	drm_gpuvm_bo_for_each_va(gpuva, vm_bo) {
+		struct xe_vma *vma = gpuva_to_vma(gpuva);
+		struct xe_tile *tile;
+		u8 id;
+
+		if (xe_vma_is_null(vma) || xe_vma_is_cpu_addr_mirror(vma))
+			continue;
+
+		for_each_tile(tile, xe, id) {
+			if (!(vma->tile_present & BIT(id)))
+				continue;
+
+			err = xe_vma_tlb_flush_client(vm, vma, tile,
+						      tile->primary_gt, resv, dep,
+						      XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
+			if (err)
+				goto out;
+
+			if (tile->media_gt) {
+				err = xe_vma_tlb_flush_client(vm, vma, tile,
+							      tile->media_gt, resv, dep,
+							      XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT);
+				if (err)
+					goto out;
+			}
+		}
+	}
+
+out:
+	dma_fence_put(dep);
+	return err;
+}
+
 int xe_vm_validate_protected(struct xe_vm *vm)
 {
 	struct drm_gpuva *gpuva;
diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
index b1c5f940bcc5..d3770c7d6b53 100644
--- a/drivers/gpu/drm/xe/xe_vm.h
+++ b/drivers/gpu/drm/xe/xe_vm.h
@@ -19,6 +19,7 @@
 #define MAX_FAULTS_SAVED_PER_VM	50
 
 struct drm_device;
+struct drm_gpuvm_bo;
 struct drm_printer;
 struct drm_file;
 
@@ -26,6 +27,7 @@ struct ttm_buffer_object;
 
 struct dma_fence;
 
+struct xe_bo;
 struct xe_exec_queue;
 struct xe_file;
 struct xe_pagefault;
@@ -254,6 +256,9 @@ int xe_vm_invalidate_vma(struct xe_vma *vma);
 
 int xe_vm_invalidate_vma_submit(struct xe_vma *vma, struct xe_tlb_inval_batch *batch);
 
+int xe_vm_flush_vm_bo_tlb_async(struct xe_vm *vm, struct xe_bo *bo,
+				struct drm_gpuvm_bo *vm_bo);
+
 int xe_vm_validate_protected(struct xe_vm *vm);
 
 static inline void xe_vm_queue_rebind_worker(struct xe_vm *vm)
-- 
2.34.1

✗ CI.checkpatch: warning for drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev4)

[Patchwork]

== Series Details ==

Series: drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev4)
URL   : https://patchwork.freedesktop.org/series/170046/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
3009867cd31863246e4afc138520a7a8bd37bb11
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 8a3fbbc362561f4c8bb54ac7f788f553ccd5efee
Author: Matthew Brost <matthew.brost@intel.com>
Date:   Wed Nov 4 14:14:59 2026 -0800

    drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind()
    
    On L2-flush-optimized HW with a dma-resv (non-fault) VM, evicting a BO
    only needs to flush the L2 cache before the migration copy runs; the
    mappings themselves are torn down and rebuilt lazily via
    drm_gpuvm_bo_evict() and a subsequent rebind. Today this flush is done
    by waiting for the BO to go idle and then issuing a synchronous TLB
    invalidation per mapping VMA from inside xe_bo_trigger_rebind(). Both
    the idle wait and the synchronous invalidation stall the calling thread
    while holding the BO dma-resv lock, serializing the move behind all
    in-flight GPU work on the BO.
    
    Replace this with an asynchronous flush. Add xe_vm_flush_vm_bo_tlb_async()
    which, for each VMA mapping the BO on each present tile, queues a TLB
    invalidation job on the tile migrate (kernel) exec queue. The jobs depend
    on the BO's in-flight GPU work, captured once as a singleton over
    DMA_RESV_USAGE_BOOKKEEP, so the flush only fires once the GPU is done with
    the current mapping. Each job's completion fence is installed into the
    BO's dma-resv as a DMA_RESV_USAGE_KERNEL fence, so the migration copy -
    which waits on the resv - waits on the flush without stalling this thread.
    
    No PTEs are zapped and vma->tile_invalidated is left untouched: the
    mapping stays valid until the lazy rebind, and the only work performed
    here is the L2 flush. On any failure the caller falls back to the
    existing blocking wait-idle plus xe_vm_invalidate_vma() path.
    
    Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
    Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
    Assisted-by: LLM
    Signed-off-by: Matthew Brost <matthew.brost@intel.com>
    Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
+ /mt/dim checkpatch e19b5ed0ad912bb15fa5826fdc746f739e39650d drm-intel
8a3fbbc36256 drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind()
-:35: WARNING:BAD_SIGN_OFF: Non-standard signature: Assisted-by:
#35: 
Assisted-by: LLM

-:35: ERROR:BAD_SIGN_OFF: Unrecognized email address: 'LLM'
#35: 
Assisted-by: LLM

total: 1 errors, 1 warnings, 0 checks, 169 lines checked

✓ CI.KUnit: success for drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev4)

[Patchwork]

== Series Details ==

Series: drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev4)
URL   : https://patchwork.freedesktop.org/series/170046/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[23:14:33] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:14:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:14:58] Starting KUnit Kernel (1/1)...
[23:14:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:14:58] ================= gpu_buddy (14 subtests) ==================
[23:14:58] [PASSED] gpu_test_buddy_alloc_limit
[23:14:58] [PASSED] gpu_test_buddy_alloc_optimistic
[23:14:58] [PASSED] gpu_test_buddy_alloc_pessimistic
[23:14:58] [PASSED] gpu_test_buddy_alloc_pathological
[23:14:58] [PASSED] gpu_test_buddy_alloc_contiguous
[23:14:58] [PASSED] gpu_test_buddy_alloc_clear
[23:14:58] [PASSED] gpu_test_buddy_alloc_range
[23:14:59] [PASSED] gpu_test_buddy_alloc_range_bias
[23:14:59] [PASSED] gpu_test_buddy_fragmentation_performance
[23:15:00] [PASSED] gpu_test_buddy_dirty_tracker_performance
[23:15:00] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[23:15:00] [PASSED] gpu_test_buddy_offset_aligned_allocation
[23:15:00] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[23:15:00] [PASSED] gpu_test_buddy_addr_to_block
[23:15:00] ==================== [PASSED] gpu_buddy ====================
[23:15:00] ============================================================
[23:15:00] Testing complete. Ran 14 tests: passed: 14
[23:15:00] Elapsed time: 26.819s total, 5.042s configuring, 19.910s building, 1.821s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[23:15:00] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:15:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:15:41] Starting KUnit Kernel (1/1)...
[23:15:41] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:15:41] ================== guc_buf (11 subtests) ===================
[23:15:41] [PASSED] test_smallest
[23:15:41] [PASSED] test_largest
[23:15:41] [PASSED] test_granular
[23:15:41] [PASSED] test_unique
[23:15:41] [PASSED] test_overlap
[23:15:41] [PASSED] test_reusable
[23:15:41] [PASSED] test_too_big
[23:15:41] [PASSED] test_flush
[23:15:41] [PASSED] test_lookup
[23:15:41] [PASSED] test_data
[23:15:41] [PASSED] test_class
[23:15:41] ===================== [PASSED] guc_buf =====================
[23:15:41] =================== guc_dbm (7 subtests) ===================
[23:15:41] [PASSED] test_empty
[23:15:41] [PASSED] test_default
[23:15:41] ======================== test_size  ========================
[23:15:41] [PASSED] 4
[23:15:41] [PASSED] 8
[23:15:41] [PASSED] 32
[23:15:41] [PASSED] 256
[23:15:41] ==================== [PASSED] test_size ====================
[23:15:41] ======================= test_reuse  ========================
[23:15:41] [PASSED] 4
[23:15:41] [PASSED] 8
[23:15:41] [PASSED] 32
[23:15:41] [PASSED] 256
[23:15:41] =================== [PASSED] test_reuse ====================
[23:15:41] =================== test_range_overlap  ====================
[23:15:41] [PASSED] 4
[23:15:41] [PASSED] 8
[23:15:41] [PASSED] 32
[23:15:41] [PASSED] 256
[23:15:41] =============== [PASSED] test_range_overlap ================
[23:15:41] =================== test_range_compact  ====================
[23:15:41] [PASSED] 4
[23:15:41] [PASSED] 8
[23:15:41] [PASSED] 32
[23:15:41] [PASSED] 256
[23:15:41] =============== [PASSED] test_range_compact ================
[23:15:41] ==================== test_range_spare  =====================
[23:15:41] [PASSED] 4
[23:15:41] [PASSED] 8
[23:15:41] [PASSED] 32
[23:15:41] [PASSED] 256
[23:15:41] ================ [PASSED] test_range_spare =================
[23:15:41] ===================== [PASSED] guc_dbm =====================
[23:15:41] ================== guc_idm (22 subtests) ===================
[23:15:41] [PASSED] bad_init
[23:15:41] [PASSED] no_init
[23:15:41] [PASSED] init_fini
[23:15:41] [PASSED] check_init_small
[23:15:41] [PASSED] check_init_shared
[23:15:41] [PASSED] check_used
[23:15:41] [PASSED] check_quota
[23:15:41] [PASSED] check_all
[23:15:41] [PASSED] check_limits
[23:15:41] [PASSED] check_overlap
[23:15:41] [PASSED] check_overlap_alloc
[23:15:41] [PASSED] check_overlap_release
[23:15:41] [PASSED] check_overlap_partial_init
[23:15:41] [PASSED] check_overlap_partial_shared_range_blocking
[23:15:41] [PASSED] check_used_usable
[23:15:41] [PASSED] check_used_shareable
[23:15:41] [PASSED] check_used_mixed
[23:15:41] [PASSED] check_release_usable_range
[23:15:41] [PASSED] check_release_shareable_range
[23:15:41] [PASSED] check_split_boundaries
[23:15:41] [PASSED] check_shareable_spare
[23:15:41] [PASSED] check_shareable_spare_fragmented_tail
[23:15:41] ===================== [PASSED] guc_idm =====================
[23:15:41] ============== guc_klv_helpers (13 subtests) ===============
[23:15:41] [PASSED] test_count
[23:15:41] [PASSED] test_encode_u32
[23:15:41] [PASSED] test_encode_u64
[23:15:41] [PASSED] test_encode_string
[23:15:41] [PASSED] test_encode_object_raw
[23:15:41] [PASSED] test_encode_object_klv
[23:15:41] [PASSED] test_encode_object_nested
[23:15:41] [PASSED] test_encode_object_basic
[23:15:41] ===================== test_decode_u16  =====================
[23:15:41] [PASSED] empty
[23:15:41] [PASSED] valid
[23:15:41] [PASSED] max
[23:15:41] [PASSED] big
[23:15:41] [PASSED] long
[23:15:41] ================= [PASSED] test_decode_u16 =================
[23:15:41] ===================== test_decode_u32  =====================
[23:15:41] [PASSED] empty
[23:15:41] [PASSED] valid
[23:15:41] [PASSED] max
[23:15:41] [PASSED] long
[23:15:41] ================= [PASSED] test_decode_u32 =================
[23:15:41] ===================== test_decode_u64  =====================
[23:15:41] [PASSED] empty
[23:15:41] [PASSED] short
[23:15:41] [PASSED] valid
[23:15:41] [PASSED] max
[23:15:41] [PASSED] long
[23:15:41] ================= [PASSED] test_decode_u64 =================
[23:15:41] ===================== test_decode_str  =====================
[23:15:41] [PASSED] empty
[23:15:41] [PASSED] one
[23:15:41] [PASSED] one_trash
[23:15:41] [PASSED] two
[23:15:41] [PASSED] two_trash
[23:15:41] [PASSED] three
[23:15:41] [PASSED] dword
[23:15:41] [PASSED] four
[23:15:41] [PASSED] five
[23:15:41] [PASSED] six
[23:15:41] [PASSED] seven
[23:15:41] [PASSED] qword
[23:15:41] ================= [PASSED] test_decode_str =================
[23:15:41] [PASSED] test_print
[23:15:41] ================= [PASSED] guc_klv_helpers =================
[23:15:41] =================== xe_log (4 subtests) ====================
[23:15:41] [PASSED] demo_cper
[23:15:41] [PASSED] demo_dmesg
[23:15:41] ======================= test_dmesg  ========================
[23:15:41] [PASSED] test_fatal
[23:15:41] [PASSED] test_fatal_tile
[23:15:41] [PASSED] test_fatal_gt
[23:15:41] [PASSED] test_fatal_comp
[23:15:41] [PASSED] test_fatal_comp_tile
[23:15:41] [PASSED] test_fatal_comp_gt
[23:15:41] [PASSED] test_fatal_all
[23:15:41] [PASSED] test_recoverable
[23:15:41] [PASSED] test_recoverable_tile
[23:15:41] [PASSED] test_recoverable_gt
[23:15:41] [PASSED] test_recoverable_comp
[23:15:41] [PASSED] test_recoverable_comp_tile
[23:15:41] [PASSED] test_recoverable_comp_gt
[23:15:41] [PASSED] test_recoverable_all
[23:15:41] [PASSED] test_info
[23:15:41] [PASSED] test_info_tile
[23:15:41] [PASSED] test_info_gt
[23:15:41] [PASSED] test_info_err
[23:15:41] [PASSED] test_info_comp
[23:15:41] [PASSED] test_info_comp_tile
[23:15:41] [PASSED] test_info_comp_gt
[23:15:41] [PASSED] test_info_all
[23:15:41] [PASSED] test_hw_fatal
[23:15:41] [PASSED] test_hw_recoverable
[23:15:41] [PASSED] test_hw_corrected
[23:15:41] [PASSED] test_hw_informational
[23:15:41] =================== [PASSED] test_dmesg ====================
[23:15:41] ====================== test_invalid  =======================
[23:15:41] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[23:15:41] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[23:15:41] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[23:15:41] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[23:15:41] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[23:15:41] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[23:15:41] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[23:15:41] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[23:15:41] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[23:15:41] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[23:15:41] ================== [SKIPPED] test_invalid ==================
[23:15:41] ===================== [PASSED] xe_log ======================
[23:15:41] ================== no_relay (3 subtests) ===================
[23:15:41] [PASSED] xe_drops_guc2pf_if_not_ready
[23:15:41] [PASSED] xe_drops_guc2vf_if_not_ready
[23:15:41] [PASSED] xe_rejects_send_if_not_ready
[23:15:41] ==================== [PASSED] no_relay =====================
[23:15:41] ================== pf_relay (14 subtests) ==================
[23:15:41] [PASSED] pf_rejects_guc2pf_too_short
[23:15:41] [PASSED] pf_rejects_guc2pf_too_long
[23:15:41] [PASSED] pf_rejects_guc2pf_no_payload
[23:15:41] [PASSED] pf_fails_no_payload
[23:15:41] [PASSED] pf_fails_bad_origin
[23:15:41] [PASSED] pf_fails_bad_type
[23:15:41] [PASSED] pf_txn_reports_error
[23:15:41] [PASSED] pf_txn_sends_pf2guc
[23:15:41] [PASSED] pf_sends_pf2guc
[23:15:41] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[23:15:41] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[23:15:41] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[23:15:41] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[23:15:41] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[23:15:41] ==================== [PASSED] pf_relay =====================
[23:15:41] ================== vf_relay (3 subtests) ===================
[23:15:41] [PASSED] vf_rejects_guc2vf_too_short
[23:15:41] [PASSED] vf_rejects_guc2vf_too_long
[23:15:41] [PASSED] vf_rejects_guc2vf_no_payload
[23:15:41] ==================== [PASSED] vf_relay =====================
[23:15:41] ================ pf_gt_config (9 subtests) =================
[23:15:41] [PASSED] fair_contexts_1vf
[23:15:41] [PASSED] fair_doorbells_1vf
[23:15:41] [PASSED] fair_ggtt_1vf
[23:15:41] ====================== fair_vram_1vf  ======================
[23:15:41] [PASSED] 3.50 GiB
[23:15:41] [PASSED] 11.5 GiB
[23:15:41] [PASSED] 15.5 GiB
[23:15:41] [PASSED] 31.5 GiB
[23:15:41] [PASSED] 63.5 GiB
[23:15:41] [PASSED] 1.91 GiB
[23:15:41] ================== [PASSED] fair_vram_1vf ==================
[23:15:41] ================ fair_vram_1vf_admin_only  =================
[23:15:41] [PASSED] 3.50 GiB
[23:15:41] [PASSED] 11.5 GiB
[23:15:41] [PASSED] 15.5 GiB
[23:15:41] [PASSED] 31.5 GiB
[23:15:41] [PASSED] 63.5 GiB
[23:15:41] [PASSED] 1.91 GiB
[23:15:41] ============ [PASSED] fair_vram_1vf_admin_only =============
[23:15:41] ====================== fair_contexts  ======================
[23:15:41] [PASSED] 1 VF
[23:15:41] [PASSED] 2 VFs
[23:15:41] [PASSED] 3 VFs
[23:15:41] [PASSED] 4 VFs
[23:15:41] [PASSED] 5 VFs
[23:15:41] [PASSED] 6 VFs
[23:15:41] [PASSED] 7 VFs
[23:15:41] [PASSED] 8 VFs
[23:15:41] [PASSED] 9 VFs
[23:15:41] [PASSED] 10 VFs
[23:15:41] [PASSED] 11 VFs
[23:15:41] [PASSED] 12 VFs
[23:15:41] [PASSED] 13 VFs
[23:15:41] [PASSED] 14 VFs
[23:15:41] [PASSED] 15 VFs
[23:15:41] [PASSED] 16 VFs
[23:15:41] [PASSED] 17 VFs
[23:15:41] [PASSED] 18 VFs
[23:15:41] [PASSED] 19 VFs
[23:15:41] [PASSED] 20 VFs
[23:15:41] [PASSED] 21 VFs
[23:15:41] [PASSED] 22 VFs
[23:15:41] [PASSED] 23 VFs
[23:15:41] [PASSED] 24 VFs
[23:15:41] [PASSED] 25 VFs
[23:15:41] [PASSED] 26 VFs
[23:15:41] [PASSED] 27 VFs
[23:15:41] [PASSED] 28 VFs
[23:15:41] [PASSED] 29 VFs
[23:15:41] [PASSED] 30 VFs
[23:15:41] [PASSED] 31 VFs
[23:15:41] [PASSED] 32 VFs
[23:15:41] [PASSED] 33 VFs
[23:15:41] [PASSED] 34 VFs
[23:15:41] [PASSED] 35 VFs
[23:15:41] [PASSED] 36 VFs
[23:15:41] [PASSED] 37 VFs
[23:15:41] [PASSED] 38 VFs
[23:15:41] [PASSED] 39 VFs
[23:15:41] [PASSED] 40 VFs
[23:15:41] [PASSED] 41 VFs
[23:15:41] [PASSED] 42 VFs
[23:15:41] [PASSED] 43 VFs
[23:15:41] [PASSED] 44 VFs
[23:15:41] [PASSED] 45 VFs
[23:15:41] [PASSED] 46 VFs
[23:15:41] [PASSED] 47 VFs
[23:15:41] [PASSED] 48 VFs
[23:15:41] [PASSED] 49 VFs
[23:15:41] [PASSED] 50 VFs
[23:15:41] [PASSED] 51 VFs
[23:15:42] [PASSED] 52 VFs
[23:15:42] [PASSED] 53 VFs
[23:15:42] [PASSED] 54 VFs
[23:15:42] [PASSED] 55 VFs
[23:15:42] [PASSED] 56 VFs
[23:15:42] [PASSED] 57 VFs
[23:15:42] [PASSED] 58 VFs
[23:15:42] [PASSED] 59 VFs
[23:15:42] [PASSED] 60 VFs
[23:15:42] [PASSED] 61 VFs
[23:15:42] [PASSED] 62 VFs
[23:15:42] [PASSED] 63 VFs
[23:15:42] ================== [PASSED] fair_contexts ==================
[23:15:42] ===================== fair_doorbells  ======================
[23:15:42] [PASSED] 1 VF
[23:15:42] [PASSED] 2 VFs
[23:15:42] [PASSED] 3 VFs
[23:15:42] [PASSED] 4 VFs
[23:15:42] [PASSED] 5 VFs
[23:15:42] [PASSED] 6 VFs
[23:15:42] [PASSED] 7 VFs
[23:15:42] [PASSED] 8 VFs
[23:15:42] [PASSED] 9 VFs
[23:15:42] [PASSED] 10 VFs
[23:15:42] [PASSED] 11 VFs
[23:15:42] [PASSED] 12 VFs
[23:15:42] [PASSED] 13 VFs
[23:15:42] [PASSED] 14 VFs
[23:15:42] [PASSED] 15 VFs
[23:15:42] [PASSED] 16 VFs
[23:15:42] [PASSED] 17 VFs
[23:15:42] [PASSED] 18 VFs
[23:15:42] [PASSED] 19 VFs
[23:15:42] [PASSED] 20 VFs
[23:15:42] [PASSED] 21 VFs
[23:15:42] [PASSED] 22 VFs
[23:15:42] [PASSED] 23 VFs
[23:15:42] [PASSED] 24 VFs
[23:15:42] [PASSED] 25 VFs
[23:15:42] [PASSED] 26 VFs
[23:15:42] [PASSED] 27 VFs
[23:15:42] [PASSED] 28 VFs
[23:15:42] [PASSED] 29 VFs
[23:15:42] [PASSED] 30 VFs
[23:15:42] [PASSED] 31 VFs
[23:15:42] [PASSED] 32 VFs
[23:15:42] [PASSED] 33 VFs
[23:15:42] [PASSED] 34 VFs
[23:15:42] [PASSED] 35 VFs
[23:15:42] [PASSED] 36 VFs
[23:15:42] [PASSED] 37 VFs
[23:15:42] [PASSED] 38 VFs
[23:15:42] [PASSED] 39 VFs
[23:15:42] [PASSED] 40 VFs
[23:15:42] [PASSED] 41 VFs
[23:15:42] [PASSED] 42 VFs
[23:15:42] [PASSED] 43 VFs
[23:15:42] [PASSED] 44 VFs
[23:15:42] [PASSED] 45 VFs
[23:15:42] [PASSED] 46 VFs
[23:15:42] [PASSED] 47 VFs
[23:15:42] [PASSED] 48 VFs
[23:15:42] [PASSED] 49 VFs
[23:15:42] [PASSED] 50 VFs
[23:15:42] [PASSED] 51 VFs
[23:15:42] [PASSED] 52 VFs
[23:15:42] [PASSED] 53 VFs
[23:15:42] [PASSED] 54 VFs
[23:15:42] [PASSED] 55 VFs
[23:15:42] [PASSED] 56 VFs
[23:15:42] [PASSED] 57 VFs
[23:15:42] [PASSED] 58 VFs
[23:15:42] [PASSED] 59 VFs
[23:15:42] [PASSED] 60 VFs
[23:15:42] [PASSED] 61 VFs
[23:15:42] [PASSED] 62 VFs
[23:15:42] [PASSED] 63 VFs
[23:15:42] ================= [PASSED] fair_doorbells ==================
[23:15:42] ======================== fair_ggtt  ========================
[23:15:42] [PASSED] 1 VF
[23:15:42] [PASSED] 2 VFs
[23:15:42] [PASSED] 3 VFs
[23:15:42] [PASSED] 4 VFs
[23:15:42] [PASSED] 5 VFs
[23:15:42] [PASSED] 6 VFs
[23:15:42] [PASSED] 7 VFs
[23:15:42] [PASSED] 8 VFs
[23:15:42] [PASSED] 9 VFs
[23:15:42] [PASSED] 10 VFs
[23:15:42] [PASSED] 11 VFs
[23:15:42] [PASSED] 12 VFs
[23:15:42] [PASSED] 13 VFs
[23:15:42] [PASSED] 14 VFs
[23:15:42] [PASSED] 15 VFs
[23:15:42] [PASSED] 16 VFs
[23:15:42] [PASSED] 17 VFs
[23:15:42] [PASSED] 18 VFs
[23:15:42] [PASSED] 19 VFs
[23:15:42] [PASSED] 20 VFs
[23:15:42] [PASSED] 21 VFs
[23:15:42] [PASSED] 22 VFs
[23:15:42] [PASSED] 23 VFs
[23:15:42] [PASSED] 24 VFs
[23:15:42] [PASSED] 25 VFs
[23:15:42] [PASSED] 26 VFs
[23:15:42] [PASSED] 27 VFs
[23:15:42] [PASSED] 28 VFs
[23:15:42] [PASSED] 29 VFs
[23:15:42] [PASSED] 30 VFs
[23:15:42] [PASSED] 31 VFs
[23:15:42] [PASSED] 32 VFs
[23:15:42] [PASSED] 33 VFs
[23:15:42] [PASSED] 34 VFs
[23:15:42] [PASSED] 35 VFs
[23:15:42] [PASSED] 36 VFs
[23:15:42] [PASSED] 37 VFs
[23:15:42] [PASSED] 38 VFs
[23:15:42] [PASSED] 39 VFs
[23:15:42] [PASSED] 40 VFs
[23:15:42] [PASSED] 41 VFs
[23:15:42] [PASSED] 42 VFs
[23:15:42] [PASSED] 43 VFs
[23:15:42] [PASSED] 44 VFs
[23:15:42] [PASSED] 45 VFs
[23:15:42] [PASSED] 46 VFs
[23:15:42] [PASSED] 47 VFs
[23:15:42] [PASSED] 48 VFs
[23:15:42] [PASSED] 49 VFs
[23:15:42] [PASSED] 50 VFs
[23:15:42] [PASSED] 51 VFs
[23:15:42] [PASSED] 52 VFs
[23:15:42] [PASSED] 53 VFs
[23:15:42] [PASSED] 54 VFs
[23:15:42] [PASSED] 55 VFs
[23:15:42] [PASSED] 56 VFs
[23:15:42] [PASSED] 57 VFs
[23:15:42] [PASSED] 58 VFs
[23:15:42] [PASSED] 59 VFs
[23:15:42] [PASSED] 60 VFs
[23:15:42] [PASSED] 61 VFs
[23:15:42] [PASSED] 62 VFs
[23:15:42] [PASSED] 63 VFs
[23:15:42] ==================== [PASSED] fair_ggtt ====================
[23:15:42] ======================== fair_vram  ========================
[23:15:42] [PASSED] 1 VF
[23:15:42] [PASSED] 2 VFs
[23:15:42] [PASSED] 3 VFs
[23:15:42] [PASSED] 4 VFs
[23:15:42] [PASSED] 5 VFs
[23:15:42] [PASSED] 6 VFs
[23:15:42] [PASSED] 7 VFs
[23:15:42] [PASSED] 8 VFs
[23:15:42] [PASSED] 9 VFs
[23:15:42] [PASSED] 10 VFs
[23:15:42] [PASSED] 11 VFs
[23:15:42] [PASSED] 12 VFs
[23:15:42] [PASSED] 13 VFs
[23:15:42] [PASSED] 14 VFs
[23:15:42] [PASSED] 15 VFs
[23:15:42] [PASSED] 16 VFs
[23:15:42] [PASSED] 17 VFs
[23:15:42] [PASSED] 18 VFs
[23:15:42] [PASSED] 19 VFs
[23:15:42] [PASSED] 20 VFs
[23:15:42] [PASSED] 21 VFs
[23:15:42] [PASSED] 22 VFs
[23:15:42] [PASSED] 23 VFs
[23:15:42] [PASSED] 24 VFs
[23:15:42] [PASSED] 25 VFs
[23:15:42] [PASSED] 26 VFs
[23:15:42] [PASSED] 27 VFs
[23:15:42] [PASSED] 28 VFs
[23:15:42] [PASSED] 29 VFs
[23:15:42] [PASSED] 30 VFs
[23:15:42] [PASSED] 31 VFs
[23:15:42] [PASSED] 32 VFs
[23:15:42] [PASSED] 33 VFs
[23:15:42] [PASSED] 34 VFs
[23:15:42] [PASSED] 35 VFs
[23:15:42] [PASSED] 36 VFs
[23:15:42] [PASSED] 37 VFs
[23:15:42] [PASSED] 38 VFs
[23:15:42] [PASSED] 39 VFs
[23:15:42] [PASSED] 40 VFs
[23:15:42] [PASSED] 41 VFs
[23:15:42] [PASSED] 42 VFs
[23:15:42] [PASSED] 43 VFs
[23:15:42] [PASSED] 44 VFs
[23:15:42] [PASSED] 45 VFs
[23:15:42] [PASSED] 46 VFs
[23:15:42] [PASSED] 47 VFs
[23:15:42] [PASSED] 48 VFs
[23:15:42] [PASSED] 49 VFs
[23:15:42] [PASSED] 50 VFs
[23:15:42] [PASSED] 51 VFs
[23:15:42] [PASSED] 52 VFs
[23:15:42] [PASSED] 53 VFs
[23:15:42] [PASSED] 54 VFs
[23:15:42] [PASSED] 55 VFs
[23:15:42] [PASSED] 56 VFs
[23:15:42] [PASSED] 57 VFs
[23:15:42] [PASSED] 58 VFs
[23:15:42] [PASSED] 59 VFs
[23:15:42] [PASSED] 60 VFs
[23:15:42] [PASSED] 61 VFs
[23:15:42] [PASSED] 62 VFs
[23:15:42] [PASSED] 63 VFs
[23:15:42] ==================== [PASSED] fair_vram ====================
[23:15:42] ================== [PASSED] pf_gt_config ===================
[23:15:42] ===================== lmtt (1 subtest) =====================
[23:15:42] ======================== test_ops  =========================
[23:15:42] [PASSED] 2-level
[23:15:42] [PASSED] multi-level
[23:15:42] ==================== [PASSED] test_ops =====================
[23:15:42] ====================== [PASSED] lmtt =======================
[23:15:42] ================= sriov_packet (1 subtest) =================
[23:15:42] [PASSED] test_descriptor_init
[23:15:42] ================== [PASSED] sriov_packet ===================
[23:15:42] ================= pf_service (11 subtests) =================
[23:15:42] [PASSED] pf_negotiate_any
[23:15:42] [PASSED] pf_negotiate_base_match
[23:15:42] [PASSED] pf_negotiate_base_newer
[23:15:42] [PASSED] pf_negotiate_base_next
[23:15:42] [SKIPPED] pf_negotiate_base_older (no older minor)
[23:15:42] [PASSED] pf_negotiate_base_prev
[23:15:42] [PASSED] pf_negotiate_latest_match
[23:15:42] [PASSED] pf_negotiate_latest_newer
[23:15:42] [PASSED] pf_negotiate_latest_next
[23:15:42] [SKIPPED] pf_negotiate_latest_older (no older minor)
[23:15:42] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[23:15:42] =================== [PASSED] pf_service ====================
[23:15:42] ================= xe_guc_g2g (2 subtests) ==================
[23:15:42] ============== xe_live_guc_g2g_kunit_default  ==============
[23:15:42] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[23:15:42] ============== xe_live_guc_g2g_kunit_allmem  ===============
[23:15:42] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[23:15:42] =================== [SKIPPED] xe_guc_g2g ===================
[23:15:42] =================== xe_mocs (2 subtests) ===================
[23:15:42] ================ xe_live_mocs_kernel_kunit  ================
[23:15:42] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[23:15:42] ================ xe_live_mocs_reset_kunit  =================
[23:15:42] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[23:15:42] ==================== [SKIPPED] xe_mocs =====================
[23:15:42] ================= xe_migrate (3 subtests) ==================
[23:15:42] ================= xe_migrate_sanity_kunit  =================
[23:15:42] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[23:15:42] ================== xe_validate_ccs_kunit  ==================
[23:15:42] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[23:15:42] ============= xe_migrate_access_memory_kunit  ==============
[23:15:42] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[23:15:42] =================== [SKIPPED] xe_migrate ===================
[23:15:42] ================== xe_dma_buf (1 subtest) ==================
[23:15:42] ==================== xe_dma_buf_kunit  =====================
[23:15:42] ================ [SKIPPED] xe_dma_buf_kunit ================
[23:15:42] =================== [SKIPPED] xe_dma_buf ===================
[23:15:42] ================= xe_bo_shrink (1 subtest) =================
[23:15:42] =================== xe_bo_shrink_kunit  ====================
[23:15:42] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[23:15:42] ================== [SKIPPED] xe_bo_shrink ==================
[23:15:42] ==================== xe_bo (2 subtests) ====================
[23:15:42] ================== xe_ccs_migrate_kunit  ===================
[23:15:42] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[23:15:42] ==================== xe_bo_evict_kunit  ====================
[23:15:42] =============== [SKIPPED] xe_bo_evict_kunit ================
[23:15:42] ===================== [SKIPPED] xe_bo ======================
[23:15:42] =================== xe_any (9 subtests) ====================
[23:15:42] [PASSED] test_to_xe
[23:15:42] [PASSED] test_to_dev
[23:15:42] [PASSED] test_to_pdev
[23:15:42] [PASSED] test_to_drm
[23:15:42] [PASSED] test_if_pdev
[23:15:42] [PASSED] test_if_xe
[23:15:42] [PASSED] test_if_tile
[23:15:42] [PASSED] test_if_gt
[23:15:42] [PASSED] test_to_id
[23:15:42] ===================== [PASSED] xe_any ======================
[23:15:42] ==================== args (13 subtests) ====================
[23:15:42] [PASSED] count_args_test
[23:15:42] [PASSED] call_args_example
[23:15:42] [PASSED] call_args_test
[23:15:42] [PASSED] drop_first_arg_example
[23:15:42] [PASSED] drop_first_arg_test
[23:15:42] [PASSED] first_arg_example
[23:15:42] [PASSED] first_arg_test
[23:15:42] [PASSED] last_arg_example
[23:15:42] [PASSED] last_arg_test
[23:15:42] [PASSED] pick_arg_example
[23:15:42] [PASSED] if_args_example
[23:15:42] [PASSED] if_args_test
[23:15:42] [PASSED] sep_comma_example
[23:15:42] ====================== [PASSED] args =======================
[23:15:42] =================== xe_pci (3 subtests) ====================
[23:15:42] ==================== check_graphics_ip  ====================
[23:15:42] [PASSED] 12.00 Xe_LP
[23:15:42] [PASSED] 12.10 Xe_LP+
[23:15:42] [PASSED] 12.55 Xe_HPG
[23:15:42] [PASSED] 12.60 Xe_HPC
[23:15:42] [PASSED] 12.70 Xe_LPG
[23:15:42] [PASSED] 12.71 Xe_LPG
[23:15:42] [PASSED] 12.74 Xe_LPG+
[23:15:42] [PASSED] 20.01 Xe2_HPG
[23:15:42] [PASSED] 20.02 Xe2_HPG
[23:15:42] [PASSED] 20.04 Xe2_LPG
[23:15:42] [PASSED] 30.00 Xe3_LPG
[23:15:42] [PASSED] 30.01 Xe3_LPG
[23:15:42] [PASSED] 30.03 Xe3_LPG
[23:15:42] [PASSED] 30.04 Xe3_LPG
[23:15:42] [PASSED] 30.05 Xe3_LPG
[23:15:42] [PASSED] 35.10 Xe3p_LPG
[23:15:42] [PASSED] 35.11 Xe3p_XPC
[23:15:42] ================ [PASSED] check_graphics_ip ================
[23:15:42] ===================== check_media_ip  ======================
[23:15:42] [PASSED] 12.00 Xe_M
[23:15:42] [PASSED] 12.55 Xe_HPM
[23:15:42] [PASSED] 13.00 Xe_LPM+
[23:15:42] [PASSED] 13.01 Xe2_HPM
[23:15:42] [PASSED] 20.00 Xe2_LPM
[23:15:42] [PASSED] 30.00 Xe3_LPM
[23:15:42] [PASSED] 30.02 Xe3_LPM
[23:15:42] [PASSED] 35.00 Xe3p_LPM
[23:15:42] [PASSED] 35.03 Xe3p_HPM
[23:15:42] ================= [PASSED] check_media_ip ==================
[23:15:42] =================== check_platform_desc  ===================
[23:15:42] [PASSED] 0x9A60 (TIGERLAKE)
[23:15:42] [PASSED] 0x9A68 (TIGERLAKE)
[23:15:42] [PASSED] 0x9A70 (TIGERLAKE)
[23:15:42] [PASSED] 0x9A40 (TIGERLAKE)
[23:15:42] [PASSED] 0x9A49 (TIGERLAKE)
[23:15:42] [PASSED] 0x9A59 (TIGERLAKE)
[23:15:42] [PASSED] 0x9A78 (TIGERLAKE)
[23:15:42] [PASSED] 0x9AC0 (TIGERLAKE)
[23:15:42] [PASSED] 0x9AC9 (TIGERLAKE)
[23:15:42] [PASSED] 0x9AD9 (TIGERLAKE)
[23:15:42] [PASSED] 0x9AF8 (TIGERLAKE)
[23:15:42] [PASSED] 0x4C80 (ROCKETLAKE)
[23:15:42] [PASSED] 0x4C8A (ROCKETLAKE)
[23:15:42] [PASSED] 0x4C8B (ROCKETLAKE)
[23:15:42] [PASSED] 0x4C8C (ROCKETLAKE)
[23:15:42] [PASSED] 0x4C90 (ROCKETLAKE)
[23:15:42] [PASSED] 0x4C9A (ROCKETLAKE)
[23:15:42] [PASSED] 0x4680 (ALDERLAKE_S)
[23:15:42] [PASSED] 0x4682 (ALDERLAKE_S)
[23:15:42] [PASSED] 0x4688 (ALDERLAKE_S)
[23:15:42] [PASSED] 0x468A (ALDERLAKE_S)
[23:15:42] [PASSED] 0x468B (ALDERLAKE_S)
[23:15:42] [PASSED] 0x4690 (ALDERLAKE_S)
[23:15:42] [PASSED] 0x4692 (ALDERLAKE_S)
[23:15:42] [PASSED] 0x4693 (ALDERLAKE_S)
[23:15:42] [PASSED] 0x46A0 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46A1 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46A2 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46A3 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46A6 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46A8 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46AA (ALDERLAKE_P)
[23:15:42] [PASSED] 0x462A (ALDERLAKE_P)
[23:15:42] [PASSED] 0x4626 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x4628 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46B0 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46B1 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46B2 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46B3 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46C0 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46C1 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46C2 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46C3 (ALDERLAKE_P)
[23:15:42] [PASSED] 0x46D0 (ALDERLAKE_N)
[23:15:42] [PASSED] 0x46D1 (ALDERLAKE_N)
[23:15:42] [PASSED] 0x46D2 (ALDERLAKE_N)
[23:15:42] [PASSED] 0x46D3 (ALDERLAKE_N)
[23:15:42] [PASSED] 0x46D4 (ALDERLAKE_N)
[23:15:42] [PASSED] 0xA721 (ALDERLAKE_P)
[23:15:42] [PASSED] 0xA7A1 (ALDERLAKE_P)
[23:15:42] [PASSED] 0xA7A9 (ALDERLAKE_P)
[23:15:42] [PASSED] 0xA7AC (ALDERLAKE_P)
[23:15:42] [PASSED] 0xA7AD (ALDERLAKE_P)
[23:15:42] [PASSED] 0xA720 (ALDERLAKE_P)
[23:15:42] [PASSED] 0xA7A0 (ALDERLAKE_P)
[23:15:42] [PASSED] 0xA7A8 (ALDERLAKE_P)
[23:15:42] [PASSED] 0xA7AA (ALDERLAKE_P)
[23:15:42] [PASSED] 0xA7AB (ALDERLAKE_P)
[23:15:42] [PASSED] 0xA780 (ALDERLAKE_S)
[23:15:42] [PASSED] 0xA781 (ALDERLAKE_S)
[23:15:42] [PASSED] 0xA782 (ALDERLAKE_S)
[23:15:42] [PASSED] 0xA783 (ALDERLAKE_S)
[23:15:42] [PASSED] 0xA788 (ALDERLAKE_S)
[23:15:42] [PASSED] 0xA789 (ALDERLAKE_S)
[23:15:42] [PASSED] 0xA78A (ALDERLAKE_S)
[23:15:42] [PASSED] 0xA78B (ALDERLAKE_S)
[23:15:42] [PASSED] 0x4905 (DG1)
[23:15:42] [PASSED] 0x4906 (DG1)
[23:15:42] [PASSED] 0x4907 (DG1)
[23:15:42] [PASSED] 0x4908 (DG1)
[23:15:42] [PASSED] 0x4909 (DG1)
[23:15:42] [PASSED] 0x56C0 (DG2)
[23:15:42] [PASSED] 0x56C2 (DG2)
[23:15:42] [PASSED] 0x56C1 (DG2)
[23:15:42] [PASSED] 0x7D51 (METEORLAKE)
[23:15:42] [PASSED] 0x7DD1 (METEORLAKE)
[23:15:42] [PASSED] 0x7D41 (METEORLAKE)
[23:15:42] [PASSED] 0x7D67 (METEORLAKE)
[23:15:42] [PASSED] 0xB640 (METEORLAKE)
[23:15:42] [PASSED] 0x56A0 (DG2)
[23:15:42] [PASSED] 0x56A1 (DG2)
[23:15:42] [PASSED] 0x56A2 (DG2)
[23:15:42] [PASSED] 0x56BE (DG2)
[23:15:42] [PASSED] 0x56BF (DG2)
[23:15:42] [PASSED] 0x5690 (DG2)
[23:15:42] [PASSED] 0x5691 (DG2)
[23:15:42] [PASSED] 0x5692 (DG2)
[23:15:42] [PASSED] 0x56A5 (DG2)
[23:15:42] [PASSED] 0x56A6 (DG2)
[23:15:42] [PASSED] 0x56B0 (DG2)
[23:15:42] [PASSED] 0x56B1 (DG2)
[23:15:42] [PASSED] 0x56BA (DG2)
[23:15:42] [PASSED] 0x56BB (DG2)
[23:15:42] [PASSED] 0x56BC (DG2)
[23:15:42] [PASSED] 0x56BD (DG2)
[23:15:42] [PASSED] 0x5693 (DG2)
[23:15:42] [PASSED] 0x5694 (DG2)
[23:15:42] [PASSED] 0x5695 (DG2)
[23:15:42] [PASSED] 0x56A3 (DG2)
[23:15:42] [PASSED] 0x56A4 (DG2)
[23:15:42] [PASSED] 0x56B2 (DG2)
[23:15:42] [PASSED] 0x56B3 (DG2)
[23:15:42] [PASSED] 0x5696 (DG2)
[23:15:42] [PASSED] 0x5697 (DG2)
[23:15:42] [PASSED] 0xB69 (PVC)
[23:15:42] [PASSED] 0xB6E (PVC)
[23:15:42] [PASSED] 0xBD4 (PVC)
[23:15:42] [PASSED] 0xBD5 (PVC)
[23:15:42] [PASSED] 0xBD6 (PVC)
[23:15:42] [PASSED] 0xBD7 (PVC)
[23:15:42] [PASSED] 0xBD8 (PVC)
[23:15:42] [PASSED] 0xBD9 (PVC)
[23:15:42] [PASSED] 0xBDA (PVC)
[23:15:42] [PASSED] 0xBDB (PVC)
[23:15:42] [PASSED] 0xBE0 (PVC)
[23:15:42] [PASSED] 0xBE1 (PVC)
[23:15:42] [PASSED] 0xBE5 (PVC)
[23:15:42] [PASSED] 0x7D40 (METEORLAKE)
[23:15:42] [PASSED] 0x7D45 (METEORLAKE)
[23:15:42] [PASSED] 0x7D55 (METEORLAKE)
[23:15:42] [PASSED] 0x7D60 (METEORLAKE)
[23:15:42] [PASSED] 0x7DD5 (METEORLAKE)
[23:15:42] [PASSED] 0x6420 (LUNARLAKE)
[23:15:42] [PASSED] 0x64A0 (LUNARLAKE)
[23:15:42] [PASSED] 0x64B0 (LUNARLAKE)
[23:15:42] [PASSED] 0xE202 (BATTLEMAGE)
[23:15:42] [PASSED] 0xE209 (BATTLEMAGE)
[23:15:42] [PASSED] 0xE20B (BATTLEMAGE)
[23:15:42] [PASSED] 0xE20C (BATTLEMAGE)
[23:15:42] [PASSED] 0xE20D (BATTLEMAGE)
[23:15:42] [PASSED] 0xE210 (BATTLEMAGE)
[23:15:42] [PASSED] 0xE211 (BATTLEMAGE)
[23:15:42] [PASSED] 0xE212 (BATTLEMAGE)
[23:15:42] [PASSED] 0xE216 (BATTLEMAGE)
[23:15:42] [PASSED] 0xE220 (BATTLEMAGE)
[23:15:42] [PASSED] 0xE221 (BATTLEMAGE)
[23:15:42] [PASSED] 0xE222 (BATTLEMAGE)
[23:15:42] [PASSED] 0xE223 (BATTLEMAGE)
[23:15:42] [PASSED] 0xB080 (PANTHERLAKE)
[23:15:42] [PASSED] 0xB081 (PANTHERLAKE)
[23:15:42] [PASSED] 0xB082 (PANTHERLAKE)
[23:15:42] [PASSED] 0xB083 (PANTHERLAKE)
[23:15:42] [PASSED] 0xB084 (PANTHERLAKE)
[23:15:42] [PASSED] 0xB085 (PANTHERLAKE)
[23:15:42] [PASSED] 0xB086 (PANTHERLAKE)
[23:15:42] [PASSED] 0xB087 (PANTHERLAKE)
[23:15:42] [PASSED] 0xB08F (PANTHERLAKE)
[23:15:42] [PASSED] 0xB090 (PANTHERLAKE)
[23:15:42] [PASSED] 0xB0A0 (PANTHERLAKE)
[23:15:42] [PASSED] 0xB0A1 (PANTHERLAKE)
[23:15:42] [PASSED] 0xB0B0 (PANTHERLAKE)
[23:15:42] [PASSED] 0xFD80 (PANTHERLAKE)
[23:15:42] [PASSED] 0xFD81 (PANTHERLAKE)
[23:15:42] [PASSED] 0xD740 (NOVALAKE_S)
[23:15:42] [PASSED] 0xD741 (NOVALAKE_S)
[23:15:42] [PASSED] 0xD742 (NOVALAKE_S)
[23:15:42] [PASSED] 0xD743 (NOVALAKE_S)
[23:15:42] [PASSED] 0xD745 (NOVALAKE_S)
[23:15:42] [PASSED] 0xD74A (NOVALAKE_S)
[23:15:42] [PASSED] 0xD74B (NOVALAKE_S)
[23:15:42] [PASSED] 0x674C (CRESCENTISLAND)
[23:15:42] [PASSED] 0x674D (CRESCENTISLAND)
[23:15:42] [PASSED] 0x674E (CRESCENTISLAND)
[23:15:42] [PASSED] 0x674F (CRESCENTISLAND)
[23:15:42] [PASSED] 0x6750 (CRESCENTISLAND)
[23:15:42] [PASSED] 0x6751 (CRESCENTISLAND)
[23:15:42] [PASSED] 0x6752 (CRESCENTISLAND)
[23:15:42] [PASSED] 0xD750 (NOVALAKE_P)
[23:15:42] [PASSED] 0xD751 (NOVALAKE_P)
[23:15:42] [PASSED] 0xD752 (NOVALAKE_P)
[23:15:42] [PASSED] 0xD753 (NOVALAKE_P)
[23:15:42] [PASSED] 0xD754 (NOVALAKE_P)
[23:15:42] [PASSED] 0xD755 (NOVALAKE_P)
[23:15:42] [PASSED] 0xD756 (NOVALAKE_P)
[23:15:42] [PASSED] 0xD757 (NOVALAKE_P)
[23:15:42] [PASSED] 0xD75F (NOVALAKE_P)
[23:15:42] =============== [PASSED] check_platform_desc ===============
[23:15:42] ===================== [PASSED] xe_pci ======================
[23:15:42] ============= xe_rtp_tables_test (5 subtests) ==============
[23:15:42] ================== xe_rtp_table_gt_test  ===================
[23:15:42] [PASSED] gt_was/14011060649
[23:15:42] [PASSED] gt_was/14011059788
[23:15:42] [PASSED] gt_was/14015795083
[23:15:42] [PASSED] gt_was/16021867713
[23:15:42] [PASSED] gt_was/14019449301
[23:15:42] [PASSED] gt_was/16028005424
[23:15:42] [PASSED] gt_was/14026578760
[23:15:42] [PASSED] gt_was/1409420604
[23:15:42] [PASSED] gt_was/1408615072
[23:15:42] [PASSED] gt_was/22010523718
[23:15:42] [PASSED] gt_was/14011006942
[23:15:42] [PASSED] gt_was/14014830051
[23:15:42] [PASSED] gt_was/18018781329
[23:15:42] [PASSED] gt_was/1509235366
[23:15:42] [PASSED] gt_was/18018781329
[23:15:42] [PASSED] gt_was/16016694945
[23:15:42] [PASSED] gt_was/14018575942
[23:15:42] [PASSED] gt_was/22016670082
[23:15:42] [PASSED] gt_was/22016670082
[23:15:42] [PASSED] gt_was/14017421178
[23:15:42] [PASSED] gt_was/16025250150
[23:15:42] [PASSED] gt_was/14021871409
[23:15:42] [PASSED] gt_was/16021865536
[23:15:42] [PASSED] gt_was/14021486841
[23:15:42] [PASSED] gt_was/14025160223
[23:15:42] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[23:15:42] [PASSED] gt_was/14025635424
[23:15:42] [PASSED] gt_was/16028005424
[23:15:42] ============== [PASSED] xe_rtp_table_gt_test ===============
[23:15:42] ================== xe_rtp_table_gt_test  ===================
[23:15:42] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[23:15:42] [PASSED] gt_tunings/Tuning: 32B Access Enable
[23:15:42] [PASSED] gt_tunings/Tuning: L3 cache
[23:15:42] [PASSED] gt_tunings/Tuning: L3 cache - media
[23:15:42] [PASSED] gt_tunings/Tuning: Compression Overfetch
[23:15:42] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[23:15:42] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[23:15:42] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[23:15:42] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[23:15:42] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[23:15:42] [PASSED] gt_tunings/Tuning: Stateless compression control
[23:15:42] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[23:15:42] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[23:15:42] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[23:15:42] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[23:15:42] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[23:15:42] ============== [PASSED] xe_rtp_table_gt_test ===============
[23:15:42] ================== xe_rtp_table_oob_test  ==================
[23:15:42] [PASSED] oob_was/1607983814
[23:15:42] [PASSED] oob_was/16010904313
[23:15:42] [PASSED] oob_was/18022495364
[23:15:42] [PASSED] oob_was/22012773006
[23:15:42] [PASSED] oob_was/14014475959
[23:15:42] [PASSED] oob_was/22011391025
[23:15:42] [PASSED] oob_was/22012727170
[23:15:42] [PASSED] oob_was/22012727685
[23:15:42] [PASSED] oob_was/22016596838
[23:15:42] [PASSED] oob_was/18020744125
[23:15:42] [PASSED] oob_was/1409600907
[23:15:42] [PASSED] oob_was/22014953428
[23:15:42] [PASSED] oob_was/16017236439
[23:15:42] [PASSED] oob_was/14019821291
[23:15:42] [PASSED] oob_was/14015076503
[23:15:42] [PASSED] oob_was/22016122933
[23:15:42] [PASSED] oob_was/14018913170
[23:15:42] [PASSED] oob_was/14018094691
[23:15:42] [PASSED] oob_was/18024947630
[23:15:42] [PASSED] oob_was/16022287689
[23:15:42] [PASSED] oob_was/13011645652
[23:15:42] [PASSED] oob_was/14022293748
[23:15:42] [PASSED] oob_was/22019794406
[23:15:42] [PASSED] oob_was/22019338487
[23:15:42] [PASSED] oob_was/16023588340
[23:15:42] [PASSED] oob_was/14019789679
[23:15:42] [PASSED] oob_was/14022866841
[23:15:42] [PASSED] oob_was/16021333562
[23:15:42] [PASSED] oob_was/14016712196
[23:15:42] [PASSED] oob_was/14015568240
[23:15:42] [PASSED] oob_was/18013179988
[23:15:42] [PASSED] oob_was/1508761755
[23:15:42] [PASSED] oob_was/16023105232
[23:15:42] [PASSED] oob_was/16026508708
[23:15:42] [PASSED] oob_was/14020001231
[23:15:42] [PASSED] oob_was/16023683509
[23:15:42] [PASSED] oob_was/14025515070
[23:15:42] [PASSED] oob_was/15015404425_disable
[23:15:42] [PASSED] oob_was/16026007364
[23:15:42] [PASSED] oob_was/14020316580
[23:15:42] [PASSED] oob_was/14025883347
[23:15:42] [PASSED] oob_was/16029380221
[23:15:42] [PASSED] oob_was/22022079272
[23:15:42] [PASSED] oob_was/16029897822
[23:15:42] [PASSED] oob_was/14026539277
[23:15:42] [PASSED] oob_was/14027054324
[23:15:42] [PASSED] oob_was/14025941587
[23:15:42] [PASSED] oob_was/16030224309
[23:15:42] [PASSED] oob_was/14028709524
[23:15:42] ============== [PASSED] xe_rtp_table_oob_test ==============
[23:15:42] ================ xe_rtp_table_dev_oob_test  ================
[23:15:42] [PASSED] device_oob_was/22010954014
[23:15:42] [PASSED] device_oob_was/15015404425
[23:15:42] [PASSED] device_oob_was/22019338487_display
[23:15:42] [PASSED] device_oob_was/14022085890
[23:15:42] [PASSED] device_oob_was/14026633728
[23:15:42] [PASSED] device_oob_was/14026746987
[23:15:42] [PASSED] device_oob_was/14026779378
[23:15:42] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[23:15:42] ========== xe_rtp_table_missing_upper_bound_test  ==========
[23:15:42] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[23:15:42] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[23:15:42] [PASSED] register_whitelist/1806527549
[23:15:42] [PASSED] register_whitelist/allow_read_ctx_timestamp
[23:15:42] [PASSED] register_whitelist/allow_read_queue_timestamp
[23:15:42] [PASSED] register_whitelist/16014440446
[23:15:42] [PASSED] register_whitelist/16017236439
[23:15:42] [PASSED] register_whitelist/16020183090
[23:15:42] [PASSED] register_whitelist/14024997852
[23:15:42] [PASSED] register_whitelist/14024997852
[23:15:42] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[23:15:42] =============== [PASSED] xe_rtp_tables_test ================
[23:15:42] =================== xe_rtp (3 subtests) ====================
[23:15:42] =================== xe_rtp_rules_tests  ====================
[23:15:42] [PASSED] no
[23:15:42] [PASSED] yes
[23:15:42] [PASSED] no-and-no
[23:15:42] [PASSED] no-and-yes
[23:15:42] [PASSED] yes-and-no
[23:15:42] [PASSED] yes-and-yes
[23:15:42] [PASSED] no-or-no
[23:15:42] [PASSED] no-or-yes
[23:15:42] [PASSED] yes-or-no
[23:15:42] [PASSED] yes-or-yes
[23:15:42] [PASSED] no-yes-or-yes-no
[23:15:42] [PASSED] no-yes-or-yes-yes
[23:15:42] [PASSED] yes-yes-or-no-yes
[23:15:42] [PASSED] yes-yes-or-yes-yes
[23:15:42] [PASSED] no-no-or-yes-or-no
[23:15:42] [PASSED] or
[23:15:42] [PASSED] or-yes
[23:15:42] [PASSED] or-no
[23:15:42] [PASSED] yes-or
[23:15:42] [PASSED] no-or
[23:15:42] [PASSED] no-or-or-yes
[23:15:42] [PASSED] yes-or-or-no
[23:15:42] [PASSED] no-or-or-no
[23:15:42] [PASSED] missing-context-engine-class
[23:15:42] [PASSED] missing-context-engine-class-or-yes
[23:15:42] [PASSED] missing-context-engine-class-or-or-yes
[23:15:42] =============== [PASSED] xe_rtp_rules_tests ================
[23:15:42] =============== xe_rtp_process_to_sr_tests  ================
[23:15:42] [PASSED] coalesce-same-reg
[23:15:42] [PASSED] coalesce-same-reg-literal-and-func
[23:15:42] [PASSED] no-match-no-add
[23:15:42] [PASSED] two-regs-two-entries
[23:15:42] [PASSED] clr-one-set-other
[23:15:42] [PASSED] set-field
[23:15:42] [PASSED] conflict-duplicate
[23:15:42] [PASSED] conflict-not-disjoint
[23:15:42] [PASSED] conflict-not-disjoint-literal-and-func
[23:15:42] [PASSED] conflict-reg-type
[23:15:42] [PASSED] bad-mcr-reg-forced-to-regular
[23:15:42] [PASSED] bad-regular-reg-forced-to-mcr
[23:15:42] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[23:15:42] ================== xe_rtp_process_tests  ===================
[23:15:42] [PASSED] active1
[23:15:42] [PASSED] active2
[23:15:42] [PASSED] active-inactive
[23:15:42] [PASSED] inactive-active
[23:15:42] [PASSED] inactive-active-inactive
[23:15:42] [PASSED] inactive-inactive-inactive
[23:15:42] ============== [PASSED] xe_rtp_process_tests ===============
[23:15:42] ===================== [PASSED] xe_rtp ======================
[23:15:42] ==================== xe_wa (1 subtest) =====================
[23:15:42] ======================== xe_wa_gt  =========================
[23:15:42] [PASSED] TIGERLAKE B0
[23:15:42] [PASSED] DG1 A0
[23:15:42] [PASSED] DG1 B0
[23:15:42] [PASSED] ALDERLAKE_S A0
[23:15:42] [PASSED] ALDERLAKE_S B0
[23:15:42] [PASSED] ALDERLAKE_S C0
[23:15:42] [PASSED] ALDERLAKE_S D0
[23:15:42] [PASSED] ALDERLAKE_P A0
[23:15:42] [PASSED] ALDERLAKE_P B0
[23:15:42] [PASSED] ALDERLAKE_P C0
[23:15:42] [PASSED] ALDERLAKE_S RPLS D0
[23:15:42] [PASSED] ALDERLAKE_P RPLU E0
[23:15:42] [PASSED] DG2 G10 C0
[23:15:42] [PASSED] DG2 G11 B1
[23:15:42] [PASSED] DG2 G12 A1
[23:15:42] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:15:42] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:15:42] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[23:15:42] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[23:15:42] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[23:15:42] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[23:15:42] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[23:15:42] ==================== [PASSED] xe_wa_gt =====================
[23:15:42] ====================== [PASSED] xe_wa ======================
[23:15:42] ============================================================
[23:15:42] Testing complete. Ran 840 tests: passed: 811, skipped: 29
[23:15:42] Elapsed time: 41.605s total, 2.522s configuring, 38.366s building, 0.707s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[23:15:42] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:15:45] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:16:09] Starting KUnit Kernel (1/1)...
[23:16:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:16:09] ============ drm_test_pick_cmdline (2 subtests) ============
[23:16:09] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[23:16:09] =============== drm_test_pick_cmdline_named  ===============
[23:16:09] [PASSED] NTSC
[23:16:09] [PASSED] NTSC-J
[23:16:09] [PASSED] PAL
[23:16:09] [PASSED] PAL-M
[23:16:09] =========== [PASSED] drm_test_pick_cmdline_named ===========
[23:16:09] ============== [PASSED] drm_test_pick_cmdline ==============
[23:16:09] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[23:16:09] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[23:16:09] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[23:16:09] =========== drm_validate_clone_mode (2 subtests) ===========
[23:16:09] ============== drm_test_check_in_clone_mode  ===============
[23:16:09] [PASSED] in_clone_mode
[23:16:09] [PASSED] not_in_clone_mode
[23:16:09] ========== [PASSED] drm_test_check_in_clone_mode ===========
[23:16:09] =============== drm_test_check_valid_clones  ===============
[23:16:09] [PASSED] not_in_clone_mode
[23:16:09] [PASSED] valid_clone
[23:16:09] [PASSED] invalid_clone
[23:16:09] =========== [PASSED] drm_test_check_valid_clones ===========
[23:16:09] ============= [PASSED] drm_validate_clone_mode =============
[23:16:09] ============= drm_validate_modeset (1 subtest) =============
[23:16:09] [PASSED] drm_test_check_connector_changed_modeset
[23:16:09] ============== [PASSED] drm_validate_modeset ===============
[23:16:09] ====== drm_test_bridge_get_current_state (1 subtest) =======
[23:16:09] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[23:16:09] ======== [PASSED] drm_test_bridge_get_current_state ========
[23:16:09] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[23:16:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[23:16:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[23:16:09] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[23:16:09] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[23:16:09] ============== drm_bridge_alloc (2 subtests) ===============
[23:16:09] [PASSED] drm_test_drm_bridge_alloc_basic
[23:16:09] [PASSED] drm_test_drm_bridge_alloc_get_put
[23:16:09] ================ [PASSED] drm_bridge_alloc =================
[23:16:09] ============= drm_bridge_bus_fmt (5 subtests) ==============
[23:16:09] [PASSED] drm_test_bridge_rgb_yuv_rgb
[23:16:09] [PASSED] drm_test_bridge_must_convert_to_yuv444
[23:16:09] [PASSED] drm_test_bridge_hdmi_auto_rgb
[23:16:09] [PASSED] drm_test_bridge_auto_first
[23:16:09] [PASSED] drm_test_bridge_rgb_yuv_no_path
[23:16:09] =============== [PASSED] drm_bridge_bus_fmt ================
[23:16:09] ============= drm_cmdline_parser (40 subtests) =============
[23:16:09] [PASSED] drm_test_cmdline_force_d_only
[23:16:09] [PASSED] drm_test_cmdline_force_D_only_dvi
[23:16:09] [PASSED] drm_test_cmdline_force_D_only_hdmi
[23:16:09] [PASSED] drm_test_cmdline_force_D_only_not_digital
[23:16:09] [PASSED] drm_test_cmdline_force_e_only
[23:16:09] [PASSED] drm_test_cmdline_res
[23:16:09] [PASSED] drm_test_cmdline_res_vesa
[23:16:09] [PASSED] drm_test_cmdline_res_vesa_rblank
[23:16:09] [PASSED] drm_test_cmdline_res_rblank
[23:16:09] [PASSED] drm_test_cmdline_res_bpp
[23:16:09] [PASSED] drm_test_cmdline_res_refresh
[23:16:09] [PASSED] drm_test_cmdline_res_bpp_refresh
[23:16:09] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[23:16:09] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[23:16:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[23:16:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[23:16:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[23:16:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[23:16:09] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[23:16:09] [PASSED] drm_test_cmdline_res_margins_force_on
[23:16:09] [PASSED] drm_test_cmdline_res_vesa_margins
[23:16:09] [PASSED] drm_test_cmdline_name
[23:16:09] [PASSED] drm_test_cmdline_name_bpp
[23:16:09] [PASSED] drm_test_cmdline_name_option
[23:16:09] [PASSED] drm_test_cmdline_name_bpp_option
[23:16:09] [PASSED] drm_test_cmdline_rotate_0
[23:16:09] [PASSED] drm_test_cmdline_rotate_90
[23:16:09] [PASSED] drm_test_cmdline_rotate_180
[23:16:09] [PASSED] drm_test_cmdline_rotate_270
[23:16:09] [PASSED] drm_test_cmdline_hmirror
[23:16:09] [PASSED] drm_test_cmdline_vmirror
[23:16:09] [PASSED] drm_test_cmdline_margin_options
[23:16:09] [PASSED] drm_test_cmdline_multiple_options
[23:16:09] [PASSED] drm_test_cmdline_bpp_extra_and_option
[23:16:09] [PASSED] drm_test_cmdline_extra_and_option
[23:16:09] [PASSED] drm_test_cmdline_freestanding_options
[23:16:09] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[23:16:09] [PASSED] drm_test_cmdline_panel_orientation
[23:16:09] ================ drm_test_cmdline_invalid  =================
[23:16:09] [PASSED] margin_only
[23:16:09] [PASSED] interlace_only
[23:16:09] [PASSED] res_missing_x
[23:16:09] [PASSED] res_missing_y
[23:16:09] [PASSED] res_bad_y
[23:16:09] [PASSED] res_missing_y_bpp
[23:16:09] [PASSED] res_bad_bpp
[23:16:09] [PASSED] res_bad_refresh
[23:16:09] [PASSED] res_bpp_refresh_force_on_off
[23:16:09] [PASSED] res_invalid_mode
[23:16:09] [PASSED] res_bpp_wrong_place_mode
[23:16:09] [PASSED] name_bpp_refresh
[23:16:09] [PASSED] name_refresh
[23:16:09] [PASSED] name_refresh_wrong_mode
[23:16:09] [PASSED] name_refresh_invalid_mode
[23:16:09] [PASSED] rotate_multiple
[23:16:09] [PASSED] rotate_invalid_val
[23:16:09] [PASSED] rotate_truncated
[23:16:09] [PASSED] invalid_option
[23:16:09] [PASSED] invalid_tv_option
[23:16:09] [PASSED] truncated_tv_option
[23:16:09] ============ [PASSED] drm_test_cmdline_invalid =============
[23:16:09] =============== drm_test_cmdline_tv_options  ===============
[23:16:09] [PASSED] NTSC
[23:16:09] [PASSED] NTSC_443
[23:16:09] [PASSED] NTSC_J
[23:16:09] [PASSED] PAL
[23:16:09] [PASSED] PAL_M
[23:16:09] [PASSED] PAL_N
[23:16:09] [PASSED] SECAM
[23:16:09] [PASSED] MONO_525
[23:16:09] [PASSED] MONO_625
[23:16:09] =========== [PASSED] drm_test_cmdline_tv_options ===========
[23:16:09] =============== [PASSED] drm_cmdline_parser ================
[23:16:09] ========== drmm_connector_hdmi_init (20 subtests) ==========
[23:16:09] [PASSED] drm_test_connector_hdmi_init_valid
[23:16:09] [PASSED] drm_test_connector_hdmi_init_bpc_8
[23:16:09] [PASSED] drm_test_connector_hdmi_init_bpc_10
[23:16:09] [PASSED] drm_test_connector_hdmi_init_bpc_12
[23:16:09] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[23:16:09] [PASSED] drm_test_connector_hdmi_init_bpc_null
[23:16:09] [PASSED] drm_test_connector_hdmi_init_formats_empty
[23:16:09] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[23:16:09] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[23:16:09] [PASSED] supported_formats=0x9 yuv420_allowed=1
[23:16:09] [PASSED] supported_formats=0x9 yuv420_allowed=0
[23:16:09] [PASSED] supported_formats=0x5 yuv420_allowed=1
[23:16:09] [PASSED] supported_formats=0x5 yuv420_allowed=0
[23:16:09] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[23:16:09] [PASSED] drm_test_connector_hdmi_init_null_ddc
[23:16:09] [PASSED] drm_test_connector_hdmi_init_null_product
[23:16:09] [PASSED] drm_test_connector_hdmi_init_null_vendor
[23:16:09] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[23:16:09] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[23:16:09] [PASSED] drm_test_connector_hdmi_init_product_valid
[23:16:09] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[23:16:09] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[23:16:09] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[23:16:09] ========= drm_test_connector_hdmi_init_type_valid  =========
[23:16:09] [PASSED] HDMI-A
[23:16:09] [PASSED] HDMI-B
[23:16:09] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[23:16:09] ======== drm_test_connector_hdmi_init_type_invalid  ========
[23:16:09] [PASSED] Unknown
[23:16:09] [PASSED] VGA
[23:16:09] [PASSED] DVI-I
[23:16:09] [PASSED] DVI-D
[23:16:09] [PASSED] DVI-A
[23:16:09] [PASSED] Composite
[23:16:09] [PASSED] SVIDEO
[23:16:09] [PASSED] LVDS
[23:16:09] [PASSED] Component
[23:16:09] [PASSED] DIN
[23:16:09] [PASSED] DP
[23:16:09] [PASSED] TV
[23:16:09] [PASSED] eDP
[23:16:09] [PASSED] Virtual
[23:16:09] [PASSED] DSI
[23:16:09] [PASSED] DPI
[23:16:09] [PASSED] Writeback
[23:16:09] [PASSED] SPI
[23:16:09] [PASSED] USB
[23:16:09] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[23:16:09] ============ [PASSED] drmm_connector_hdmi_init =============
[23:16:09] ============= drmm_connector_init (3 subtests) =============
[23:16:09] [PASSED] drm_test_drmm_connector_init
[23:16:09] [PASSED] drm_test_drmm_connector_init_null_ddc
[23:16:09] ========= drm_test_drmm_connector_init_type_valid  =========
[23:16:09] [PASSED] Unknown
[23:16:09] [PASSED] VGA
[23:16:09] [PASSED] DVI-I
[23:16:09] [PASSED] DVI-D
[23:16:09] [PASSED] DVI-A
[23:16:09] [PASSED] Composite
[23:16:09] [PASSED] SVIDEO
[23:16:09] [PASSED] LVDS
[23:16:09] [PASSED] Component
[23:16:09] [PASSED] DIN
[23:16:09] [PASSED] DP
[23:16:09] [PASSED] HDMI-A
[23:16:09] [PASSED] HDMI-B
[23:16:09] [PASSED] TV
[23:16:09] [PASSED] eDP
[23:16:09] [PASSED] Virtual
[23:16:09] [PASSED] DSI
[23:16:09] [PASSED] DPI
[23:16:09] [PASSED] Writeback
[23:16:09] [PASSED] SPI
[23:16:09] [PASSED] USB
[23:16:09] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[23:16:09] =============== [PASSED] drmm_connector_init ===============
[23:16:09] ========= drm_connector_dynamic_init (6 subtests) ==========
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_init
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_init_properties
[23:16:09] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[23:16:09] [PASSED] Unknown
[23:16:09] [PASSED] VGA
[23:16:09] [PASSED] DVI-I
[23:16:09] [PASSED] DVI-D
[23:16:09] [PASSED] DVI-A
[23:16:09] [PASSED] Composite
[23:16:09] [PASSED] SVIDEO
[23:16:09] [PASSED] LVDS
[23:16:09] [PASSED] Component
[23:16:09] [PASSED] DIN
[23:16:09] [PASSED] DP
[23:16:09] [PASSED] HDMI-A
[23:16:09] [PASSED] HDMI-B
[23:16:09] [PASSED] TV
[23:16:09] [PASSED] eDP
[23:16:09] [PASSED] Virtual
[23:16:09] [PASSED] DSI
[23:16:09] [PASSED] DPI
[23:16:09] [PASSED] Writeback
[23:16:09] [PASSED] SPI
[23:16:09] [PASSED] USB
[23:16:09] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[23:16:09] ======== drm_test_drm_connector_dynamic_init_name  =========
[23:16:09] [PASSED] Unknown
[23:16:09] [PASSED] VGA
[23:16:09] [PASSED] DVI-I
[23:16:09] [PASSED] DVI-D
[23:16:09] [PASSED] DVI-A
[23:16:09] [PASSED] Composite
[23:16:09] [PASSED] SVIDEO
[23:16:09] [PASSED] LVDS
[23:16:09] [PASSED] Component
[23:16:09] [PASSED] DIN
[23:16:09] [PASSED] DP
[23:16:09] [PASSED] HDMI-A
[23:16:09] [PASSED] HDMI-B
[23:16:09] [PASSED] TV
[23:16:09] [PASSED] eDP
[23:16:09] [PASSED] Virtual
[23:16:09] [PASSED] DSI
[23:16:09] [PASSED] DPI
[23:16:09] [PASSED] Writeback
[23:16:09] [PASSED] SPI
[23:16:09] [PASSED] USB
[23:16:09] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[23:16:09] =========== [PASSED] drm_connector_dynamic_init ============
[23:16:09] ==== drm_connector_dynamic_register_early (4 subtests) =====
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[23:16:09] ====== [PASSED] drm_connector_dynamic_register_early =======
[23:16:09] ======= drm_connector_dynamic_register (7 subtests) ========
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[23:16:09] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[23:16:09] ========= [PASSED] drm_connector_dynamic_register ==========
[23:16:09] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[23:16:09] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[23:16:09] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[23:16:09] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[23:16:09] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[23:16:09] ========== drm_test_get_tv_mode_from_name_valid  ===========
[23:16:09] [PASSED] NTSC
[23:16:09] [PASSED] NTSC-443
[23:16:09] [PASSED] NTSC-J
[23:16:09] [PASSED] PAL
[23:16:09] [PASSED] PAL-M
[23:16:09] [PASSED] PAL-N
[23:16:09] [PASSED] SECAM
[23:16:09] [PASSED] Mono
[23:16:09] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[23:16:09] [PASSED] drm_test_get_tv_mode_from_name_truncated
[23:16:09] ============ [PASSED] drm_get_tv_mode_from_name ============
[23:16:09] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[23:16:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[23:16:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[23:16:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[23:16:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[23:16:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[23:16:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[23:16:09] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[23:16:09] [PASSED] VIC 96
[23:16:09] [PASSED] VIC 97
[23:16:09] [PASSED] VIC 101
[23:16:09] [PASSED] VIC 102
[23:16:09] [PASSED] VIC 106
[23:16:09] [PASSED] VIC 107
[23:16:09] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[23:16:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[23:16:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[23:16:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[23:16:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[23:16:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[23:16:09] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[23:16:09] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[23:16:09] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[23:16:09] [PASSED] Automatic
[23:16:09] [PASSED] Full
[23:16:09] [PASSED] Limited 16:235
[23:16:09] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[23:16:09] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[23:16:09] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[23:16:09] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[23:16:09] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[23:16:09] [PASSED] RGB
[23:16:09] [PASSED] YUV 4:2:0
[23:16:09] [PASSED] YUV 4:2:2
[23:16:09] [PASSED] YUV 4:4:4
[23:16:09] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[23:16:09] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[23:16:09] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[23:16:09] ============= drm_damage_helper (21 subtests) ==============
[23:16:09] [PASSED] drm_test_damage_iter_no_damage
[23:16:09] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[23:16:09] [PASSED] drm_test_damage_iter_no_damage_src_moved
[23:16:09] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[23:16:09] [PASSED] drm_test_damage_iter_no_damage_not_visible
[23:16:09] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[23:16:09] [PASSED] drm_test_damage_iter_no_damage_no_fb
[23:16:09] [PASSED] drm_test_damage_iter_simple_damage
[23:16:09] [PASSED] drm_test_damage_iter_single_damage
[23:16:09] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[23:16:09] [PASSED] drm_test_damage_iter_single_damage_outside_src
[23:16:09] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[23:16:09] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[23:16:09] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[23:16:09] [PASSED] drm_test_damage_iter_single_damage_src_moved
[23:16:09] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[23:16:09] [PASSED] drm_test_damage_iter_damage
[23:16:09] [PASSED] drm_test_damage_iter_damage_one_intersect
[23:16:09] [PASSED] drm_test_damage_iter_damage_one_outside
[23:16:09] [PASSED] drm_test_damage_iter_damage_src_moved
[23:16:09] [PASSED] drm_test_damage_iter_damage_not_visible
[23:16:09] ================ [PASSED] drm_damage_helper ================
[23:16:09] ============== drm_dp_mst_helper (3 subtests) ==============
[23:16:09] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[23:16:09] [PASSED] Clock 154000 BPP 30 DSC disabled
[23:16:09] [PASSED] Clock 234000 BPP 30 DSC disabled
[23:16:09] [PASSED] Clock 297000 BPP 24 DSC disabled
[23:16:09] [PASSED] Clock 332880 BPP 24 DSC enabled
[23:16:09] [PASSED] Clock 324540 BPP 24 DSC enabled
[23:16:09] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[23:16:09] ============== drm_test_dp_mst_calc_pbn_div  ===============
[23:16:09] [PASSED] Link rate 2000000 lane count 4
[23:16:09] [PASSED] Link rate 2000000 lane count 2
[23:16:09] [PASSED] Link rate 2000000 lane count 1
[23:16:09] [PASSED] Link rate 1350000 lane count 4
[23:16:09] [PASSED] Link rate 1350000 lane count 2
[23:16:09] [PASSED] Link rate 1350000 lane count 1
[23:16:09] [PASSED] Link rate 1000000 lane count 4
[23:16:09] [PASSED] Link rate 1000000 lane count 2
[23:16:09] [PASSED] Link rate 1000000 lane count 1
[23:16:09] [PASSED] Link rate 810000 lane count 4
[23:16:09] [PASSED] Link rate 810000 lane count 2
[23:16:09] [PASSED] Link rate 810000 lane count 1
[23:16:09] [PASSED] Link rate 540000 lane count 4
[23:16:09] [PASSED] Link rate 540000 lane count 2
[23:16:09] [PASSED] Link rate 540000 lane count 1
[23:16:09] [PASSED] Link rate 270000 lane count 4
[23:16:09] [PASSED] Link rate 270000 lane count 2
[23:16:09] [PASSED] Link rate 270000 lane count 1
[23:16:09] [PASSED] Link rate 162000 lane count 4
[23:16:09] [PASSED] Link rate 162000 lane count 2
[23:16:09] [PASSED] Link rate 162000 lane count 1
[23:16:09] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[23:16:09] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[23:16:09] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[23:16:09] [PASSED] DP_POWER_UP_PHY with port number
[23:16:09] [PASSED] DP_POWER_DOWN_PHY with port number
[23:16:09] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[23:16:09] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[23:16:09] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[23:16:09] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[23:16:09] [PASSED] DP_QUERY_PAYLOAD with port number
[23:16:09] [PASSED] DP_QUERY_PAYLOAD with VCPI
[23:16:09] [PASSED] DP_REMOTE_DPCD_READ with port number
[23:16:09] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[23:16:09] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[23:16:09] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[23:16:09] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[23:16:09] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[23:16:09] [PASSED] DP_REMOTE_I2C_READ with port number
[23:16:09] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[23:16:09] [PASSED] DP_REMOTE_I2C_READ with transactions array
[23:16:09] [PASSED] DP_REMOTE_I2C_WRITE with port number
[23:16:09] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[23:16:09] [PASSED] DP_REMOTE_I2C_WRITE with data array
[23:16:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[23:16:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[23:16:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[23:16:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[23:16:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[23:16:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[23:16:09] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[23:16:09] ================ [PASSED] drm_dp_mst_helper ================
[23:16:09] ================== drm_exec (7 subtests) ===================
[23:16:09] [PASSED] sanitycheck
[23:16:09] [PASSED] test_lock
[23:16:09] [PASSED] test_lock_unlock
[23:16:09] [PASSED] test_duplicates
[23:16:09] [PASSED] test_prepare
[23:16:09] [PASSED] test_prepare_array
[23:16:09] [PASSED] test_multiple_loops
[23:16:09] ==================== [PASSED] drm_exec =====================
[23:16:09] =========== drm_format_helper_test (17 subtests) ===========
[23:16:09] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[23:16:09] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[23:16:09] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[23:16:09] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[23:16:09] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[23:16:09] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[23:16:09] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[23:16:09] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[23:16:09] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[23:16:09] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[23:16:09] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[23:16:09] ============== drm_test_fb_xrgb8888_to_mono  ===============
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[23:16:09] ==================== drm_test_fb_swab  =====================
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ================ [PASSED] drm_test_fb_swab =================
[23:16:09] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[23:16:09] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[23:16:09] [PASSED] single_pixel_source_buffer
[23:16:09] [PASSED] single_pixel_clip_rectangle
[23:16:09] [PASSED] well_known_colors
[23:16:09] [PASSED] destination_pitch
[23:16:09] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[23:16:09] ================= drm_test_fb_clip_offset  =================
[23:16:09] [PASSED] pass through
[23:16:09] [PASSED] horizontal offset
[23:16:09] [PASSED] vertical offset
[23:16:09] [PASSED] horizontal and vertical offset
[23:16:09] [PASSED] horizontal offset (custom pitch)
[23:16:09] [PASSED] vertical offset (custom pitch)
[23:16:09] [PASSED] horizontal and vertical offset (custom pitch)
[23:16:09] ============= [PASSED] drm_test_fb_clip_offset =============
[23:16:09] =================== drm_test_fb_memcpy  ====================
[23:16:09] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[23:16:09] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[23:16:09] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[23:16:09] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[23:16:09] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[23:16:09] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[23:16:09] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[23:16:09] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[23:16:09] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[23:16:09] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[23:16:09] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[23:16:09] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[23:16:09] =============== [PASSED] drm_test_fb_memcpy ================
[23:16:09] ============= [PASSED] drm_format_helper_test ==============
[23:16:09] ================= drm_format (18 subtests) =================
[23:16:09] [PASSED] drm_test_format_block_width_invalid
[23:16:09] [PASSED] drm_test_format_block_width_one_plane
[23:16:09] [PASSED] drm_test_format_block_width_two_plane
[23:16:09] [PASSED] drm_test_format_block_width_three_plane
[23:16:09] [PASSED] drm_test_format_block_width_tiled
[23:16:09] [PASSED] drm_test_format_block_height_invalid
[23:16:09] [PASSED] drm_test_format_block_height_one_plane
[23:16:09] [PASSED] drm_test_format_block_height_two_plane
[23:16:09] [PASSED] drm_test_format_block_height_three_plane
[23:16:09] [PASSED] drm_test_format_block_height_tiled
[23:16:09] [PASSED] drm_test_format_min_pitch_invalid
[23:16:09] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[23:16:09] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[23:16:09] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[23:16:09] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[23:16:09] [PASSED] drm_test_format_min_pitch_two_plane
[23:16:09] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[23:16:09] [PASSED] drm_test_format_min_pitch_tiled
[23:16:09] =================== [PASSED] drm_format ====================
[23:16:09] ============== drm_framebuffer (10 subtests) ===============
[23:16:09] ========== drm_test_framebuffer_check_src_coords  ==========
[23:16:09] [PASSED] Success: source fits into fb
[23:16:09] [PASSED] Fail: overflowing fb with x-axis coordinate
[23:16:09] [PASSED] Fail: overflowing fb with y-axis coordinate
[23:16:09] [PASSED] Fail: overflowing fb with source width
[23:16:09] [PASSED] Fail: overflowing fb with source height
[23:16:09] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[23:16:09] [PASSED] drm_test_framebuffer_cleanup
[23:16:09] =============== drm_test_framebuffer_create  ===============
[23:16:09] [PASSED] ABGR8888 normal sizes
[23:16:09] [PASSED] ABGR8888 max sizes
[23:16:09] [PASSED] ABGR8888 pitch greater than min required
[23:16:09] [PASSED] ABGR8888 pitch less than min required
[23:16:09] [PASSED] ABGR8888 Invalid width
[23:16:09] [PASSED] ABGR8888 Invalid buffer handle
[23:16:09] [PASSED] No pixel format
[23:16:09] [PASSED] ABGR8888 Width 0
[23:16:09] [PASSED] ABGR8888 Height 0
[23:16:09] [PASSED] ABGR8888 Out of bound height * pitch combination
[23:16:09] [PASSED] ABGR8888 Large buffer offset
[23:16:09] [PASSED] ABGR8888 Buffer offset for inexistent plane
[23:16:09] [PASSED] ABGR8888 Invalid flag
[23:16:09] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[23:16:09] [PASSED] ABGR8888 Valid buffer modifier
[23:16:09] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[23:16:09] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[23:16:09] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[23:16:09] [PASSED] NV12 Normal sizes
[23:16:09] [PASSED] NV12 Max sizes
[23:16:09] [PASSED] NV12 Invalid pitch
[23:16:09] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[23:16:09] [PASSED] NV12 different  modifier per-plane
[23:16:09] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[23:16:09] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[23:16:09] [PASSED] NV12 Modifier for inexistent plane
[23:16:09] [PASSED] NV12 Handle for inexistent plane
[23:16:09] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[23:16:09] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[23:16:09] [PASSED] YVU420 Normal sizes
[23:16:09] [PASSED] YVU420 Max sizes
[23:16:09] [PASSED] YVU420 Invalid pitch
[23:16:09] [PASSED] YVU420 Different pitches
[23:16:09] [PASSED] YVU420 Different buffer offsets/pitches
[23:16:09] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[23:16:09] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[23:16:09] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[23:16:09] [PASSED] YVU420 Valid modifier
[23:16:09] [PASSED] YVU420 Different modifiers per plane
[23:16:09] [PASSED] YVU420 Modifier for inexistent plane
[23:16:09] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[23:16:09] [PASSED] X0L2 Normal sizes
[23:16:09] [PASSED] X0L2 Max sizes
[23:16:09] [PASSED] X0L2 Invalid pitch
[23:16:09] [PASSED] X0L2 Pitch greater than minimum required
[23:16:09] [PASSED] X0L2 Handle for inexistent plane
[23:16:09] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[23:16:09] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[23:16:09] [PASSED] X0L2 Valid modifier
[23:16:09] [PASSED] X0L2 Modifier for inexistent plane
[23:16:09] =========== [PASSED] drm_test_framebuffer_create ===========
[23:16:09] [PASSED] drm_test_framebuffer_free
[23:16:09] [PASSED] drm_test_framebuffer_init
[23:16:09] [PASSED] drm_test_framebuffer_init_bad_format
[23:16:09] [PASSED] drm_test_framebuffer_init_dev_mismatch
[23:16:09] [PASSED] drm_test_framebuffer_lookup
[23:16:09] [PASSED] drm_test_framebuffer_lookup_inexistent
[23:16:09] [PASSED] drm_test_framebuffer_modifiers_not_supported
[23:16:09] ================= [PASSED] drm_framebuffer =================
[23:16:09] ================ drm_gem_shmem (8 subtests) ================
[23:16:09] [PASSED] drm_gem_shmem_test_obj_create
[23:16:09] [PASSED] drm_gem_shmem_test_obj_create_private
[23:16:09] [PASSED] drm_gem_shmem_test_pin_pages
[23:16:09] [PASSED] drm_gem_shmem_test_vmap
[23:16:09] [PASSED] drm_gem_shmem_test_get_sg_table
[23:16:09] [PASSED] drm_gem_shmem_test_get_pages_sgt
[23:16:09] [PASSED] drm_gem_shmem_test_madvise
[23:16:09] [PASSED] drm_gem_shmem_test_purge
[23:16:09] ================== [PASSED] drm_gem_shmem ==================
[23:16:09] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[23:16:09] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[23:16:09] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[23:16:09] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[23:16:09] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[23:16:09] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[23:16:09] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[23:16:09] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[23:16:09] [PASSED] Automatic
[23:16:09] [PASSED] Full
[23:16:09] [PASSED] Limited 16:235
[23:16:09] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[23:16:09] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[23:16:09] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[23:16:09] [PASSED] drm_test_check_disable_connector
[23:16:09] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[23:16:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[23:16:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[23:16:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[23:16:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[23:16:09] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[23:16:09] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[23:16:09] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[23:16:09] [PASSED] drm_test_check_output_bpc_dvi
[23:16:09] [PASSED] drm_test_check_output_bpc_format_vic_1
[23:16:09] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[23:16:09] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[23:16:09] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[23:16:09] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[23:16:09] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[23:16:09] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[23:16:09] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[23:16:09] ============ drm_test_check_hdmi_color_format  =============
[23:16:09] [PASSED] AUTO -> RGB
[23:16:09] [PASSED] YCBCR422 -> YUV422
[23:16:09] [PASSED] YCBCR420 -> YUV420
[23:16:09] [PASSED] YCBCR444 -> YUV444
[23:16:09] [PASSED] RGB -> RGB
[23:16:09] ======== [PASSED] drm_test_check_hdmi_color_format =========
[23:16:09] ======== drm_test_check_hdmi_color_format_420_only  ========
[23:16:09] [PASSED] RGB should fail
[23:16:09] [PASSED] YUV444 should fail
[23:16:09] [PASSED] YUV422 should fail
[23:16:09] [PASSED] YUV420 should work
[23:16:09] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[23:16:09] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[23:16:09] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[23:16:09] [PASSED] drm_test_check_broadcast_rgb_value
[23:16:09] [PASSED] drm_test_check_bpc_8_value
[23:16:09] [PASSED] drm_test_check_bpc_10_value
[23:16:09] [PASSED] drm_test_check_bpc_12_value
[23:16:09] [PASSED] drm_test_check_format_value
[23:16:09] [PASSED] drm_test_check_tmds_char_value
[23:16:09] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[23:16:09] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[23:16:09] [PASSED] drm_test_check_mode_valid
[23:16:09] [PASSED] drm_test_check_mode_valid_reject
[23:16:09] [PASSED] drm_test_check_mode_valid_reject_rate
[23:16:09] [PASSED] drm_test_check_mode_valid_reject_max_clock
[23:16:09] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[23:16:09] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[23:16:09] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[23:16:09] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[23:16:09] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[23:16:09] [PASSED] drm_test_check_infoframes
[23:16:09] [PASSED] drm_test_check_reject_avi_infoframe
[23:16:09] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[23:16:09] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[23:16:09] [PASSED] drm_test_check_reject_audio_infoframe
[23:16:09] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[23:16:09] ================= drm_managed (2 subtests) =================
[23:16:09] [PASSED] drm_test_managed_release_action
[23:16:09] [PASSED] drm_test_managed_run_action
[23:16:09] =================== [PASSED] drm_managed ===================
[23:16:09] =================== drm_mm (6 subtests) ====================
[23:16:09] [PASSED] drm_test_mm_init
[23:16:09] [PASSED] drm_test_mm_debug
[23:16:09] [PASSED] drm_test_mm_align32
[23:16:09] [PASSED] drm_test_mm_align64
[23:16:09] [PASSED] drm_test_mm_lowest
[23:16:09] [PASSED] drm_test_mm_highest
[23:16:09] ===================== [PASSED] drm_mm ======================
[23:16:09] ============= drm_modes_analog_tv (5 subtests) =============
[23:16:09] [PASSED] drm_test_modes_analog_tv_mono_576i
[23:16:09] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[23:16:09] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[23:16:09] [PASSED] drm_test_modes_analog_tv_pal_576i
[23:16:09] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[23:16:09] =============== [PASSED] drm_modes_analog_tv ===============
[23:16:09] ============== drm_panic_helper (3 subtests) ===============
[23:16:09] ============= drm_test_panic_screen_user_map  ==============
[23:16:09] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[23:16:09] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[23:16:09] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[23:16:10] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[23:16:10] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[23:16:10] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[23:16:10] ========= [PASSED] drm_test_panic_screen_user_map ==========
[23:16:10] ============= drm_test_panic_screen_user_page  =============
[23:16:10] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[23:16:10] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[23:16:10] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[23:16:10] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[23:16:10] ========= [PASSED] drm_test_panic_screen_user_page =========
[23:16:10] ========== drm_test_panic_screen_user_set_pixel  ===========
[23:16:10] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[23:16:10] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[23:16:10] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[23:16:10] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[23:16:10] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[23:16:10] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[23:16:10] ================ [PASSED] drm_panic_helper =================
[23:16:10] ============== drm_plane_helper (2 subtests) ===============
[23:16:10] =============== drm_test_check_plane_state  ================
[23:16:10] [PASSED] clipping_simple
[23:16:10] [PASSED] clipping_rotate_reflect
[23:16:10] [PASSED] positioning_simple
[23:16:10] [PASSED] upscaling
[23:16:10] [PASSED] downscaling
[23:16:10] [PASSED] rounding1
[23:16:10] [PASSED] rounding2
[23:16:10] [PASSED] rounding3
[23:16:10] [PASSED] rounding4
[23:16:10] =========== [PASSED] drm_test_check_plane_state ============
[23:16:10] =========== drm_test_check_invalid_plane_state  ============
[23:16:10] [PASSED] positioning_invalid
[23:16:10] [PASSED] upscaling_invalid
[23:16:10] [PASSED] downscaling_invalid
[23:16:10] ======= [PASSED] drm_test_check_invalid_plane_state ========
[23:16:10] ================ [PASSED] drm_plane_helper =================
[23:16:10] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[23:16:10] ====== drm_test_connector_helper_tv_get_modes_check  =======
[23:16:10] [PASSED] None
[23:16:10] [PASSED] PAL
[23:16:10] [PASSED] NTSC
[23:16:10] [PASSED] Both, NTSC Default
[23:16:10] [PASSED] Both, PAL Default
[23:16:10] [PASSED] Both, NTSC Default, with PAL on command-line
[23:16:10] [PASSED] Both, PAL Default, with NTSC on command-line
[23:16:10] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[23:16:10] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[23:16:10] ================== drm_rect (9 subtests) ===================
[23:16:10] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[23:16:10] [PASSED] drm_test_rect_clip_scaled_not_clipped
[23:16:10] [PASSED] drm_test_rect_clip_scaled_clipped
[23:16:10] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[23:16:10] ================= drm_test_rect_intersect  =================
[23:16:10] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[23:16:10] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[23:16:10] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[23:16:10] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[23:16:10] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[23:16:10] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[23:16:10] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[23:16:10] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[23:16:10] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[23:16:10] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[23:16:10] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[23:16:10] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[23:16:10] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[23:16:10] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[23:16:10] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[23:16:10] ============= [PASSED] drm_test_rect_intersect =============
[23:16:10] ================ drm_test_rect_calc_hscale  ================
[23:16:10] [PASSED] normal use
[23:16:10] [PASSED] out of max range
[23:16:10] [PASSED] out of min range
[23:16:10] [PASSED] zero dst
[23:16:10] [PASSED] negative src
[23:16:10] [PASSED] negative dst
[23:16:10] ============ [PASSED] drm_test_rect_calc_hscale ============
[23:16:10] ================ drm_test_rect_calc_vscale  ================
[23:16:10] [PASSED] normal use
[23:16:10] [PASSED] out of max range
[23:16:10] [PASSED] out of min range
[23:16:10] [PASSED] zero dst
[23:16:10] [PASSED] negative src
[23:16:10] [PASSED] negative dst
[23:16:10] ============ [PASSED] drm_test_rect_calc_vscale ============
[23:16:10] ================== drm_test_rect_rotate  ===================
[23:16:10] [PASSED] reflect-x
[23:16:10] [PASSED] reflect-y
[23:16:10] [PASSED] rotate-0
[23:16:10] [PASSED] rotate-90
[23:16:10] [PASSED] rotate-180
[23:16:10] [PASSED] rotate-270
[23:16:10] ============== [PASSED] drm_test_rect_rotate ===============
[23:16:10] ================ drm_test_rect_rotate_inv  =================
[23:16:10] [PASSED] reflect-x
[23:16:10] [PASSED] reflect-y
[23:16:10] [PASSED] rotate-0
[23:16:10] [PASSED] rotate-90
[23:16:10] [PASSED] rotate-180
[23:16:10] [PASSED] rotate-270
[23:16:10] ============ [PASSED] drm_test_rect_rotate_inv =============
[23:16:10] ==================== [PASSED] drm_rect =====================
[23:16:10] ============ drm_sysfb_modeset_test (1 subtest) ============
[23:16:10] ============ drm_test_sysfb_build_fourcc_list  =============
[23:16:10] [PASSED] no native formats
[23:16:10] [PASSED] XRGB8888 as native format
[23:16:10] [PASSED] remove duplicates
[23:16:10] [PASSED] convert alpha formats
[23:16:10] [PASSED] random formats
[23:16:10] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[23:16:10] ============= [PASSED] drm_sysfb_modeset_test ==============
[23:16:10] ================== drm_fixp (2 subtests) ===================
[23:16:10] [PASSED] drm_test_int2fixp
[23:16:10] [PASSED] drm_test_sm2fixp
[23:16:10] ==================== [PASSED] drm_fixp =====================
[23:16:10] ============================================================
[23:16:10] Testing complete. Ran 667 tests: passed: 667
[23:16:10] Elapsed time: 27.806s total, 2.562s configuring, 24.778s building, 0.460s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[23:16:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:16:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:16:23] Starting KUnit Kernel (1/1)...
[23:16:23] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:16:23] ================= ttm_device (5 subtests) ==================
[23:16:23] [PASSED] ttm_device_init_basic
[23:16:23] [PASSED] ttm_device_init_multiple
[23:16:23] [PASSED] ttm_device_fini_basic
[23:16:23] [PASSED] ttm_device_init_no_vma_man
[23:16:23] ================== ttm_device_init_pools  ==================
[23:16:23] [PASSED] No DMA allocations, no DMA32 required
[23:16:23] [PASSED] DMA allocations, DMA32 required
[23:16:23] [PASSED] No DMA allocations, DMA32 required
[23:16:23] [PASSED] DMA allocations, no DMA32 required
[23:16:23] ============== [PASSED] ttm_device_init_pools ==============
[23:16:23] =================== [PASSED] ttm_device ====================
[23:16:23] ================== ttm_pool (8 subtests) ===================
[23:16:23] ================== ttm_pool_alloc_basic  ===================
[23:16:23] [PASSED] One page
[23:16:23] [PASSED] More than one page
[23:16:23] [PASSED] Above the allocation limit
[23:16:23] [PASSED] One page, with coherent DMA mappings enabled
[23:16:23] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:16:23] ============== [PASSED] ttm_pool_alloc_basic ===============
[23:16:23] ============== ttm_pool_alloc_basic_dma_addr  ==============
[23:16:23] [PASSED] One page
[23:16:23] [PASSED] More than one page
[23:16:23] [PASSED] Above the allocation limit
[23:16:23] [PASSED] One page, with coherent DMA mappings enabled
[23:16:23] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:16:23] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[23:16:23] [PASSED] ttm_pool_alloc_order_caching_match
[23:16:23] [PASSED] ttm_pool_alloc_caching_mismatch
[23:16:23] [PASSED] ttm_pool_alloc_order_mismatch
[23:16:23] [PASSED] ttm_pool_free_dma_alloc
[23:16:23] [PASSED] ttm_pool_free_no_dma_alloc
[23:16:23] [PASSED] ttm_pool_fini_basic
[23:16:23] ==================== [PASSED] ttm_pool =====================
[23:16:23] ================ ttm_resource (8 subtests) =================
[23:16:23] ================= ttm_resource_init_basic  =================
[23:16:23] [PASSED] Init resource in TTM_PL_SYSTEM
[23:16:23] [PASSED] Init resource in TTM_PL_VRAM
[23:16:23] [PASSED] Init resource in a private placement
[23:16:23] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[23:16:23] ============= [PASSED] ttm_resource_init_basic =============
[23:16:23] [PASSED] ttm_resource_init_pinned
[23:16:23] [PASSED] ttm_resource_fini_basic
[23:16:23] [PASSED] ttm_resource_manager_init_basic
[23:16:23] [PASSED] ttm_resource_manager_usage_basic
[23:16:23] [PASSED] ttm_resource_manager_set_used_basic
[23:16:23] [PASSED] ttm_sys_man_alloc_basic
[23:16:23] [PASSED] ttm_sys_man_free_basic
[23:16:23] ================== [PASSED] ttm_resource ===================
[23:16:23] =================== ttm_tt (15 subtests) ===================
[23:16:23] ==================== ttm_tt_init_basic  ====================
[23:16:23] [PASSED] Page-aligned size
[23:16:23] [PASSED] Extra pages requested
[23:16:23] ================ [PASSED] ttm_tt_init_basic ================
[23:16:23] [PASSED] ttm_tt_init_misaligned
[23:16:23] [PASSED] ttm_tt_fini_basic
[23:16:23] [PASSED] ttm_tt_fini_sg
[23:16:23] [PASSED] ttm_tt_fini_shmem
[23:16:23] [PASSED] ttm_tt_create_basic
[23:16:23] [PASSED] ttm_tt_create_invalid_bo_type
[23:16:23] [PASSED] ttm_tt_create_ttm_exists
[23:16:23] [PASSED] ttm_tt_create_failed
[23:16:23] [PASSED] ttm_tt_destroy_basic
[23:16:23] [PASSED] ttm_tt_populate_null_ttm
[23:16:23] [PASSED] ttm_tt_populate_populated_ttm
[23:16:23] [PASSED] ttm_tt_unpopulate_basic
[23:16:23] [PASSED] ttm_tt_unpopulate_empty_ttm
[23:16:23] [PASSED] ttm_tt_swapin_basic
[23:16:23] ===================== [PASSED] ttm_tt ======================
[23:16:23] =================== ttm_bo (14 subtests) ===================
[23:16:23] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[23:16:23] [PASSED] Cannot be interrupted and sleeps
[23:16:23] [PASSED] Cannot be interrupted, locks straight away
[23:16:23] [PASSED] Can be interrupted, sleeps
[23:16:23] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[23:16:23] [PASSED] ttm_bo_reserve_locked_no_sleep
[23:16:23] [PASSED] ttm_bo_reserve_no_wait_ticket
[23:16:23] [PASSED] ttm_bo_reserve_double_resv
[23:16:23] [PASSED] ttm_bo_reserve_interrupted
[23:16:23] [PASSED] ttm_bo_reserve_deadlock
[23:16:23] [PASSED] ttm_bo_unreserve_basic
[23:16:23] [PASSED] ttm_bo_unreserve_pinned
[23:16:23] [PASSED] ttm_bo_unreserve_bulk
[23:16:23] [PASSED] ttm_bo_fini_basic
[23:16:23] [PASSED] ttm_bo_fini_shared_resv
[23:16:23] [PASSED] ttm_bo_pin_basic
[23:16:23] [PASSED] ttm_bo_pin_unpin_resource
[23:16:23] [PASSED] ttm_bo_multiple_pin_one_unpin
[23:16:23] ===================== [PASSED] ttm_bo ======================
[23:16:23] ============== ttm_bo_validate (22 subtests) ===============
[23:16:23] ============== ttm_bo_init_reserved_sys_man  ===============
[23:16:23] [PASSED] Buffer object for userspace
[23:16:23] [PASSED] Kernel buffer object
[23:16:23] [PASSED] Shared buffer object
[23:16:23] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[23:16:23] ============== ttm_bo_init_reserved_mock_man  ==============
[23:16:23] [PASSED] Buffer object for userspace
[23:16:23] [PASSED] Kernel buffer object
[23:16:23] [PASSED] Shared buffer object
[23:16:23] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[23:16:23] [PASSED] ttm_bo_init_reserved_resv
[23:16:23] ================== ttm_bo_validate_basic  ==================
[23:16:23] [PASSED] Buffer object for userspace
[23:16:23] [PASSED] Kernel buffer object
[23:16:23] [PASSED] Shared buffer object
[23:16:23] ============== [PASSED] ttm_bo_validate_basic ==============
[23:16:23] [PASSED] ttm_bo_validate_invalid_placement
[23:16:23] ============= ttm_bo_validate_same_placement  ==============
[23:16:23] [PASSED] System manager
[23:16:23] [PASSED] VRAM manager
[23:16:23] ========= [PASSED] ttm_bo_validate_same_placement ==========
[23:16:23] [PASSED] ttm_bo_validate_failed_alloc
[23:16:23] [PASSED] ttm_bo_validate_pinned
[23:16:23] [PASSED] ttm_bo_validate_busy_placement
[23:16:23] ================ ttm_bo_validate_multihop  =================
[23:16:23] [PASSED] Buffer object for userspace
[23:16:23] [PASSED] Kernel buffer object
[23:16:23] [PASSED] Shared buffer object
[23:16:23] ============ [PASSED] ttm_bo_validate_multihop =============
[23:16:23] ========== ttm_bo_validate_no_placement_signaled  ==========
[23:16:23] [PASSED] Buffer object in system domain, no page vector
[23:16:23] [PASSED] Buffer object in system domain with an existing page vector
[23:16:23] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[23:16:23] ======== ttm_bo_validate_no_placement_not_signaled  ========
[23:16:23] [PASSED] Buffer object for userspace
[23:16:23] [PASSED] Kernel buffer object
[23:16:23] [PASSED] Shared buffer object
[23:16:23] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[23:16:23] [PASSED] ttm_bo_validate_move_fence_signaled
[23:16:23] ========= ttm_bo_validate_move_fence_not_signaled  =========
[23:16:23] [PASSED] Waits for GPU
[23:16:23] [PASSED] Tries to lock straight away
[23:16:23] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[23:16:23] [PASSED] ttm_bo_validate_swapout
[23:16:23] [PASSED] ttm_bo_validate_happy_evict
[23:16:23] [PASSED] ttm_bo_validate_all_pinned_evict
[23:16:23] [PASSED] ttm_bo_validate_allowed_only_evict
[23:16:23] [PASSED] ttm_bo_validate_deleted_evict
[23:16:23] [PASSED] ttm_bo_validate_busy_domain_evict
[23:16:23] [PASSED] ttm_bo_validate_evict_gutting
[23:16:23] [PASSED] ttm_bo_validate_recrusive_evict
[23:16:23] ================= [PASSED] ttm_bo_validate =================
[23:16:23] ============================================================
[23:16:23] Testing complete. Ran 102 tests: passed: 102
[23:16:23] Elapsed time: 12.838s total, 2.476s configuring, 10.147s building, 0.178s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[23:16:23] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:16:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:16:34] Starting KUnit Kernel (1/1)...
[23:16:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:16:34] =============== dma-buf-fence (12 subtests) ================
[23:16:34] [PASSED] test_sanitycheck
[23:16:34] [PASSED] test_signaling
[23:16:34] [PASSED] test_add_callback
[23:16:34] [PASSED] test_late_add_callback
[23:16:34] [PASSED] test_rm_callback
[23:16:34] [PASSED] test_late_rm_callback
[23:16:34] [PASSED] test_status
[23:16:34] [PASSED] test_error
[23:16:34] [PASSED] test_wait
[23:16:34] [PASSED] test_wait_timeout
[23:16:34] [PASSED] test_stub
[23:16:34] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[23:16:34] ================== [PASSED] dma-buf-fence ==================
[23:16:34] ============ dma-buf-fence-chain (11 subtests) =============
[23:16:34] [PASSED] test_sanitycheck
[23:16:34] [PASSED] test_find_seqno
[23:16:34] [PASSED] test_find_signaled
[23:16:34] [PASSED] test_find_out_of_order
[23:16:39] [PASSED] test_find_gap
[23:16:39] [PASSED] test_find_race
[23:16:39] [PASSED] test_signal_forward
[23:16:39] [PASSED] test_signal_backward
[23:16:39] [PASSED] test_wait_forward
[23:16:39] [PASSED] test_wait_backward
[23:16:39] [PASSED] test_wait_random
[23:16:39] =============== [PASSED] dma-buf-fence-chain ===============
[23:16:39] ============ dma-buf-fence-unwrap (11 subtests) ============
[23:16:39] [PASSED] test_sanitycheck
[23:16:39] [PASSED] test_unwrap_array
[23:16:39] [PASSED] test_unwrap_chain
[23:16:39] [PASSED] test_unwrap_chain_array
[23:16:39] [PASSED] test_unwrap_merge
[23:16:39] [PASSED] test_unwrap_merge_duplicate
[23:16:39] [PASSED] test_unwrap_merge_seqno
[23:16:39] [PASSED] test_unwrap_merge_order
[23:16:39] [PASSED] test_unwrap_merge_complex
[23:16:39] [PASSED] test_unwrap_merge_complex_seqno
[23:16:39] [PASSED] test_dedup_empty
[23:16:39] ============== [PASSED] dma-buf-fence-unwrap ===============
[23:16:39] ================ dma-buf-resv (5 subtests) =================
[23:16:39] [PASSED] test_sanitycheck
[23:16:39] ===================== test_signaling  ======================
[23:16:39] [PASSED] kernel
[23:16:39] [PASSED] write
[23:16:39] [PASSED] read
[23:16:39] [PASSED] bookkeep
[23:16:39] ================= [PASSED] test_signaling ==================
[23:16:39] ====================== test_for_each  ======================
[23:16:39] [PASSED] kernel
[23:16:39] [PASSED] write
[23:16:39] [PASSED] read
[23:16:39] [PASSED] bookkeep
[23:16:39] ================== [PASSED] test_for_each ==================
[23:16:39] ================= test_for_each_unlocked  ==================
[23:16:39] [PASSED] kernel
[23:16:39] [PASSED] write
[23:16:39] [PASSED] read
[23:16:39] [PASSED] bookkeep
[23:16:39] ============= [PASSED] test_for_each_unlocked ==============
[23:16:39] ===================== test_get_fences  =====================
[23:16:39] [PASSED] kernel
[23:16:39] [PASSED] write
[23:16:39] [PASSED] read
[23:16:39] [PASSED] bookkeep
[23:16:39] ================= [PASSED] test_get_fences =================
[23:16:39] ================== [PASSED] dma-buf-resv ===================
[23:16:39] ============================================================
[23:16:39] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[23:16:40] Elapsed time: 16.666s total, 2.495s configuring, 8.850s building, 5.280s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 887 bytes --]

== Series Details ==

Series: drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev4)
URL   : https://patchwork.freedesktop.org/series/170046/
State : success

== Summary ==

CI Bug Log - changes from xe-6061-0c04a32b952ce54c8629218c2071051731965ae1_BAT -> xe-pw-170046v4_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (15 -> 15)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-6061-0c04a32b952ce54c8629218c2071051731965ae1 -> xe-pw-170046v4

  IGT_9177: 9177
  xe-6061-0c04a32b952ce54c8629218c2071051731965ae1: 0c04a32b952ce54c8629218c2071051731965ae1
  xe-pw-170046v4: 170046v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v4/index.html

[-- Attachment #2: Type: text/html, Size: 1435 bytes --]

✗ CI.checkpatch: warning for drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev5)

[Patchwork]

== Series Details ==

Series: drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev5)
URL   : https://patchwork.freedesktop.org/series/170046/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
3009867cd31863246e4afc138520a7a8bd37bb11
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 1452ad128d5825c8aedd3d3f77f747e3ef88e0df
Author: Matthew Brost <matthew.brost@intel.com>
Date:   Wed Nov 4 14:14:59 2026 -0800

    drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind()
    
    On L2-flush-optimized HW with a dma-resv (non-fault) VM, evicting a BO
    only needs to flush the L2 cache before the migration copy runs; the
    mappings themselves are torn down and rebuilt lazily via
    drm_gpuvm_bo_evict() and a subsequent rebind. Today this flush is done
    by waiting for the BO to go idle and then issuing a synchronous TLB
    invalidation per mapping VMA from inside xe_bo_trigger_rebind(). Both
    the idle wait and the synchronous invalidation stall the calling thread
    while holding the BO dma-resv lock, serializing the move behind all
    in-flight GPU work on the BO.
    
    Replace this with an asynchronous flush. Add xe_vm_flush_vm_bo_tlb_async()
    which, for each VMA mapping the BO on each present tile, queues a TLB
    invalidation job on the tile migrate (kernel) exec queue. The jobs depend
    on the BO's in-flight GPU work, captured once as a singleton over
    DMA_RESV_USAGE_BOOKKEEP, so the flush only fires once the GPU is done with
    the current mapping. Each job's completion fence is installed into the
    BO's dma-resv as a DMA_RESV_USAGE_KERNEL fence, so the migration copy -
    which waits on the resv - waits on the flush without stalling this thread.
    
    No PTEs are zapped and vma->tile_invalidated is left untouched: the
    mapping stays valid until the lazy rebind, and the only work performed
    here is the L2 flush. On any failure the caller falls back to the
    existing blocking wait-idle plus xe_vm_invalidate_vma() path.
    
    Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
    Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
    Assisted-by: LLM
    Signed-off-by: Matthew Brost <matthew.brost@intel.com>
    Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
+ /mt/dim checkpatch 3379b0f74f31bfc3746b692822a7700aeeebe15d drm-intel
1452ad128d58 drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind()
-:35: WARNING:BAD_SIGN_OFF: Non-standard signature: Assisted-by:
#35: 
Assisted-by: LLM

-:35: ERROR:BAD_SIGN_OFF: Unrecognized email address: 'LLM'
#35: 
Assisted-by: LLM

total: 1 errors, 1 warnings, 0 checks, 169 lines checked

✓ CI.KUnit: success for drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev5)

[Patchwork]

== Series Details ==

Series: drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev5)
URL   : https://patchwork.freedesktop.org/series/170046/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[02:40:25] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:40:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:40:50] Starting KUnit Kernel (1/1)...
[02:40:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:40:51] ================= gpu_buddy (14 subtests) ==================
[02:40:51] [PASSED] gpu_test_buddy_alloc_limit
[02:40:51] [PASSED] gpu_test_buddy_alloc_optimistic
[02:40:51] [PASSED] gpu_test_buddy_alloc_pessimistic
[02:40:51] [PASSED] gpu_test_buddy_alloc_pathological
[02:40:51] [PASSED] gpu_test_buddy_alloc_contiguous
[02:40:51] [PASSED] gpu_test_buddy_alloc_clear
[02:40:51] [PASSED] gpu_test_buddy_alloc_range
[02:40:51] [PASSED] gpu_test_buddy_alloc_range_bias
[02:40:52] [PASSED] gpu_test_buddy_fragmentation_performance
[02:40:52] [PASSED] gpu_test_buddy_dirty_tracker_performance
[02:40:52] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[02:40:52] [PASSED] gpu_test_buddy_offset_aligned_allocation
[02:40:52] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[02:40:52] [PASSED] gpu_test_buddy_addr_to_block
[02:40:52] ==================== [PASSED] gpu_buddy ====================
[02:40:52] ============================================================
[02:40:52] Testing complete. Ran 14 tests: passed: 14
[02:40:52] Elapsed time: 27.559s total, 5.162s configuring, 20.530s building, 1.824s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[02:40:53] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:40:55] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:41:33] Starting KUnit Kernel (1/1)...
[02:41:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:41:34] ================== guc_buf (11 subtests) ===================
[02:41:34] [PASSED] test_smallest
[02:41:34] [PASSED] test_largest
[02:41:34] [PASSED] test_granular
[02:41:34] [PASSED] test_unique
[02:41:34] [PASSED] test_overlap
[02:41:34] [PASSED] test_reusable
[02:41:34] [PASSED] test_too_big
[02:41:34] [PASSED] test_flush
[02:41:34] [PASSED] test_lookup
[02:41:34] [PASSED] test_data
[02:41:34] [PASSED] test_class
[02:41:34] ===================== [PASSED] guc_buf =====================
[02:41:34] =================== guc_dbm (7 subtests) ===================
[02:41:34] [PASSED] test_empty
[02:41:34] [PASSED] test_default
[02:41:34] ======================== test_size  ========================
[02:41:34] [PASSED] 4
[02:41:34] [PASSED] 8
[02:41:34] [PASSED] 32
[02:41:34] [PASSED] 256
[02:41:34] ==================== [PASSED] test_size ====================
[02:41:34] ======================= test_reuse  ========================
[02:41:34] [PASSED] 4
[02:41:34] [PASSED] 8
[02:41:34] [PASSED] 32
[02:41:34] [PASSED] 256
[02:41:34] =================== [PASSED] test_reuse ====================
[02:41:34] =================== test_range_overlap  ====================
[02:41:34] [PASSED] 4
[02:41:34] [PASSED] 8
[02:41:34] [PASSED] 32
[02:41:34] [PASSED] 256
[02:41:34] =============== [PASSED] test_range_overlap ================
[02:41:34] =================== test_range_compact  ====================
[02:41:34] [PASSED] 4
[02:41:34] [PASSED] 8
[02:41:34] [PASSED] 32
[02:41:34] [PASSED] 256
[02:41:34] =============== [PASSED] test_range_compact ================
[02:41:34] ==================== test_range_spare  =====================
[02:41:34] [PASSED] 4
[02:41:34] [PASSED] 8
[02:41:34] [PASSED] 32
[02:41:34] [PASSED] 256
[02:41:34] ================ [PASSED] test_range_spare =================
[02:41:34] ===================== [PASSED] guc_dbm =====================
[02:41:34] ================== guc_idm (22 subtests) ===================
[02:41:34] [PASSED] bad_init
[02:41:34] [PASSED] no_init
[02:41:34] [PASSED] init_fini
[02:41:34] [PASSED] check_init_small
[02:41:34] [PASSED] check_init_shared
[02:41:34] [PASSED] check_used
[02:41:34] [PASSED] check_quota
[02:41:34] [PASSED] check_all
[02:41:34] [PASSED] check_limits
[02:41:34] [PASSED] check_overlap
[02:41:34] [PASSED] check_overlap_alloc
[02:41:34] [PASSED] check_overlap_release
[02:41:34] [PASSED] check_overlap_partial_init
[02:41:34] [PASSED] check_overlap_partial_shared_range_blocking
[02:41:34] [PASSED] check_used_usable
[02:41:34] [PASSED] check_used_shareable
[02:41:34] [PASSED] check_used_mixed
[02:41:34] [PASSED] check_release_usable_range
[02:41:34] [PASSED] check_release_shareable_range
[02:41:34] [PASSED] check_split_boundaries
[02:41:34] [PASSED] check_shareable_spare
[02:41:34] [PASSED] check_shareable_spare_fragmented_tail
[02:41:34] ===================== [PASSED] guc_idm =====================
[02:41:34] ============== guc_klv_helpers (13 subtests) ===============
[02:41:34] [PASSED] test_count
[02:41:34] [PASSED] test_encode_u32
[02:41:34] [PASSED] test_encode_u64
[02:41:34] [PASSED] test_encode_string
[02:41:34] [PASSED] test_encode_object_raw
[02:41:34] [PASSED] test_encode_object_klv
[02:41:34] [PASSED] test_encode_object_nested
[02:41:34] [PASSED] test_encode_object_basic
[02:41:34] ===================== test_decode_u16  =====================
[02:41:34] [PASSED] empty
[02:41:34] [PASSED] valid
[02:41:34] [PASSED] max
[02:41:34] [PASSED] big
[02:41:34] [PASSED] long
[02:41:34] ================= [PASSED] test_decode_u16 =================
[02:41:34] ===================== test_decode_u32  =====================
[02:41:34] [PASSED] empty
[02:41:34] [PASSED] valid
[02:41:34] [PASSED] max
[02:41:34] [PASSED] long
[02:41:34] ================= [PASSED] test_decode_u32 =================
[02:41:34] ===================== test_decode_u64  =====================
[02:41:34] [PASSED] empty
[02:41:34] [PASSED] short
[02:41:34] [PASSED] valid
[02:41:34] [PASSED] max
[02:41:34] [PASSED] long
[02:41:34] ================= [PASSED] test_decode_u64 =================
[02:41:34] ===================== test_decode_str  =====================
[02:41:34] [PASSED] empty
[02:41:34] [PASSED] one
[02:41:34] [PASSED] one_trash
[02:41:34] [PASSED] two
[02:41:34] [PASSED] two_trash
[02:41:34] [PASSED] three
[02:41:34] [PASSED] dword
[02:41:34] [PASSED] four
[02:41:34] [PASSED] five
[02:41:34] [PASSED] six
[02:41:34] [PASSED] seven
[02:41:34] [PASSED] qword
[02:41:34] ================= [PASSED] test_decode_str =================
[02:41:34] [PASSED] test_print
[02:41:34] ================= [PASSED] guc_klv_helpers =================
[02:41:34] =================== xe_log (4 subtests) ====================
[02:41:34] [PASSED] demo_cper
[02:41:34] [PASSED] demo_dmesg
[02:41:34] ======================= test_dmesg  ========================
[02:41:34] [PASSED] test_fatal
[02:41:34] [PASSED] test_fatal_tile
[02:41:34] [PASSED] test_fatal_gt
[02:41:34] [PASSED] test_fatal_comp
[02:41:34] [PASSED] test_fatal_comp_tile
[02:41:34] [PASSED] test_fatal_comp_gt
[02:41:34] [PASSED] test_fatal_all
[02:41:34] [PASSED] test_recoverable
[02:41:34] [PASSED] test_recoverable_tile
[02:41:34] [PASSED] test_recoverable_gt
[02:41:34] [PASSED] test_recoverable_comp
[02:41:34] [PASSED] test_recoverable_comp_tile
[02:41:34] [PASSED] test_recoverable_comp_gt
[02:41:34] [PASSED] test_recoverable_all
[02:41:34] [PASSED] test_info
[02:41:34] [PASSED] test_info_tile
[02:41:34] [PASSED] test_info_gt
[02:41:34] [PASSED] test_info_err
[02:41:34] [PASSED] test_info_comp
[02:41:34] [PASSED] test_info_comp_tile
[02:41:34] [PASSED] test_info_comp_gt
[02:41:34] [PASSED] test_info_all
[02:41:34] [PASSED] test_hw_fatal
[02:41:34] [PASSED] test_hw_recoverable
[02:41:34] [PASSED] test_hw_corrected
[02:41:34] [PASSED] test_hw_informational
[02:41:34] =================== [PASSED] test_dmesg ====================
[02:41:34] ====================== test_invalid  =======================
[02:41:34] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[02:41:34] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[02:41:34] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[02:41:34] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[02:41:34] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[02:41:34] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[02:41:34] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[02:41:34] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[02:41:34] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[02:41:34] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[02:41:34] ================== [SKIPPED] test_invalid ==================
[02:41:34] ===================== [PASSED] xe_log ======================
[02:41:34] ================== no_relay (3 subtests) ===================
[02:41:34] [PASSED] xe_drops_guc2pf_if_not_ready
[02:41:34] [PASSED] xe_drops_guc2vf_if_not_ready
[02:41:34] [PASSED] xe_rejects_send_if_not_ready
[02:41:34] ==================== [PASSED] no_relay =====================
[02:41:34] ================== pf_relay (14 subtests) ==================
[02:41:34] [PASSED] pf_rejects_guc2pf_too_short
[02:41:34] [PASSED] pf_rejects_guc2pf_too_long
[02:41:34] [PASSED] pf_rejects_guc2pf_no_payload
[02:41:34] [PASSED] pf_fails_no_payload
[02:41:34] [PASSED] pf_fails_bad_origin
[02:41:34] [PASSED] pf_fails_bad_type
[02:41:34] [PASSED] pf_txn_reports_error
[02:41:34] [PASSED] pf_txn_sends_pf2guc
[02:41:34] [PASSED] pf_sends_pf2guc
[02:41:34] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:41:34] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:41:34] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:41:34] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:41:34] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:41:34] ==================== [PASSED] pf_relay =====================
[02:41:34] ================== vf_relay (3 subtests) ===================
[02:41:34] [PASSED] vf_rejects_guc2vf_too_short
[02:41:34] [PASSED] vf_rejects_guc2vf_too_long
[02:41:34] [PASSED] vf_rejects_guc2vf_no_payload
[02:41:34] ==================== [PASSED] vf_relay =====================
[02:41:34] ================ pf_gt_config (9 subtests) =================
[02:41:34] [PASSED] fair_contexts_1vf
[02:41:34] [PASSED] fair_doorbells_1vf
[02:41:34] [PASSED] fair_ggtt_1vf
[02:41:34] ====================== fair_vram_1vf  ======================
[02:41:34] [PASSED] 3.50 GiB
[02:41:34] [PASSED] 11.5 GiB
[02:41:34] [PASSED] 15.5 GiB
[02:41:34] [PASSED] 31.5 GiB
[02:41:34] [PASSED] 63.5 GiB
[02:41:34] [PASSED] 1.91 GiB
[02:41:34] ================== [PASSED] fair_vram_1vf ==================
[02:41:34] ================ fair_vram_1vf_admin_only  =================
[02:41:34] [PASSED] 3.50 GiB
[02:41:34] [PASSED] 11.5 GiB
[02:41:34] [PASSED] 15.5 GiB
[02:41:34] [PASSED] 31.5 GiB
[02:41:34] [PASSED] 63.5 GiB
[02:41:34] [PASSED] 1.91 GiB
[02:41:34] ============ [PASSED] fair_vram_1vf_admin_only =============
[02:41:34] ====================== fair_contexts  ======================
[02:41:34] [PASSED] 1 VF
[02:41:34] [PASSED] 2 VFs
[02:41:34] [PASSED] 3 VFs
[02:41:34] [PASSED] 4 VFs
[02:41:34] [PASSED] 5 VFs
[02:41:34] [PASSED] 6 VFs
[02:41:34] [PASSED] 7 VFs
[02:41:34] [PASSED] 8 VFs
[02:41:34] [PASSED] 9 VFs
[02:41:34] [PASSED] 10 VFs
[02:41:34] [PASSED] 11 VFs
[02:41:34] [PASSED] 12 VFs
[02:41:34] [PASSED] 13 VFs
[02:41:34] [PASSED] 14 VFs
[02:41:34] [PASSED] 15 VFs
[02:41:34] [PASSED] 16 VFs
[02:41:34] [PASSED] 17 VFs
[02:41:34] [PASSED] 18 VFs
[02:41:34] [PASSED] 19 VFs
[02:41:34] [PASSED] 20 VFs
[02:41:34] [PASSED] 21 VFs
[02:41:34] [PASSED] 22 VFs
[02:41:34] [PASSED] 23 VFs
[02:41:34] [PASSED] 24 VFs
[02:41:34] [PASSED] 25 VFs
[02:41:34] [PASSED] 26 VFs
[02:41:34] [PASSED] 27 VFs
[02:41:34] [PASSED] 28 VFs
[02:41:34] [PASSED] 29 VFs
[02:41:34] [PASSED] 30 VFs
[02:41:34] [PASSED] 31 VFs
[02:41:34] [PASSED] 32 VFs
[02:41:34] [PASSED] 33 VFs
[02:41:34] [PASSED] 34 VFs
[02:41:34] [PASSED] 35 VFs
[02:41:34] [PASSED] 36 VFs
[02:41:34] [PASSED] 37 VFs
[02:41:34] [PASSED] 38 VFs
[02:41:34] [PASSED] 39 VFs
[02:41:34] [PASSED] 40 VFs
[02:41:34] [PASSED] 41 VFs
[02:41:34] [PASSED] 42 VFs
[02:41:34] [PASSED] 43 VFs
[02:41:34] [PASSED] 44 VFs
[02:41:34] [PASSED] 45 VFs
[02:41:34] [PASSED] 46 VFs
[02:41:34] [PASSED] 47 VFs
[02:41:34] [PASSED] 48 VFs
[02:41:34] [PASSED] 49 VFs
[02:41:34] [PASSED] 50 VFs
[02:41:34] [PASSED] 51 VFs
[02:41:34] [PASSED] 52 VFs
[02:41:34] [PASSED] 53 VFs
[02:41:34] [PASSED] 54 VFs
[02:41:34] [PASSED] 55 VFs
[02:41:34] [PASSED] 56 VFs
[02:41:34] [PASSED] 57 VFs
[02:41:34] [PASSED] 58 VFs
[02:41:34] [PASSED] 59 VFs
[02:41:34] [PASSED] 60 VFs
[02:41:34] [PASSED] 61 VFs
[02:41:34] [PASSED] 62 VFs
[02:41:34] [PASSED] 63 VFs
[02:41:34] ================== [PASSED] fair_contexts ==================
[02:41:34] ===================== fair_doorbells  ======================
[02:41:34] [PASSED] 1 VF
[02:41:34] [PASSED] 2 VFs
[02:41:34] [PASSED] 3 VFs
[02:41:34] [PASSED] 4 VFs
[02:41:34] [PASSED] 5 VFs
[02:41:34] [PASSED] 6 VFs
[02:41:34] [PASSED] 7 VFs
[02:41:34] [PASSED] 8 VFs
[02:41:34] [PASSED] 9 VFs
[02:41:34] [PASSED] 10 VFs
[02:41:34] [PASSED] 11 VFs
[02:41:34] [PASSED] 12 VFs
[02:41:34] [PASSED] 13 VFs
[02:41:34] [PASSED] 14 VFs
[02:41:34] [PASSED] 15 VFs
[02:41:34] [PASSED] 16 VFs
[02:41:34] [PASSED] 17 VFs
[02:41:34] [PASSED] 18 VFs
[02:41:34] [PASSED] 19 VFs
[02:41:34] [PASSED] 20 VFs
[02:41:34] [PASSED] 21 VFs
[02:41:34] [PASSED] 22 VFs
[02:41:34] [PASSED] 23 VFs
[02:41:34] [PASSED] 24 VFs
[02:41:34] [PASSED] 25 VFs
[02:41:34] [PASSED] 26 VFs
[02:41:34] [PASSED] 27 VFs
[02:41:34] [PASSED] 28 VFs
[02:41:34] [PASSED] 29 VFs
[02:41:34] [PASSED] 30 VFs
[02:41:34] [PASSED] 31 VFs
[02:41:34] [PASSED] 32 VFs
[02:41:34] [PASSED] 33 VFs
[02:41:34] [PASSED] 34 VFs
[02:41:34] [PASSED] 35 VFs
[02:41:34] [PASSED] 36 VFs
[02:41:34] [PASSED] 37 VFs
[02:41:34] [PASSED] 38 VFs
[02:41:34] [PASSED] 39 VFs
[02:41:34] [PASSED] 40 VFs
[02:41:34] [PASSED] 41 VFs
[02:41:34] [PASSED] 42 VFs
[02:41:34] [PASSED] 43 VFs
[02:41:34] [PASSED] 44 VFs
[02:41:34] [PASSED] 45 VFs
[02:41:34] [PASSED] 46 VFs
[02:41:34] [PASSED] 47 VFs
[02:41:34] [PASSED] 48 VFs
[02:41:34] [PASSED] 49 VFs
[02:41:34] [PASSED] 50 VFs
[02:41:34] [PASSED] 51 VFs
[02:41:34] [PASSED] 52 VFs
[02:41:34] [PASSED] 53 VFs
[02:41:34] [PASSED] 54 VFs
[02:41:34] [PASSED] 55 VFs
[02:41:34] [PASSED] 56 VFs
[02:41:34] [PASSED] 57 VFs
[02:41:34] [PASSED] 58 VFs
[02:41:34] [PASSED] 59 VFs
[02:41:34] [PASSED] 60 VFs
[02:41:34] [PASSED] 61 VFs
[02:41:34] [PASSED] 62 VFs
[02:41:34] [PASSED] 63 VFs
[02:41:34] ================= [PASSED] fair_doorbells ==================
[02:41:34] ======================== fair_ggtt  ========================
[02:41:34] [PASSED] 1 VF
[02:41:34] [PASSED] 2 VFs
[02:41:34] [PASSED] 3 VFs
[02:41:34] [PASSED] 4 VFs
[02:41:34] [PASSED] 5 VFs
[02:41:34] [PASSED] 6 VFs
[02:41:34] [PASSED] 7 VFs
[02:41:34] [PASSED] 8 VFs
[02:41:34] [PASSED] 9 VFs
[02:41:34] [PASSED] 10 VFs
[02:41:34] [PASSED] 11 VFs
[02:41:34] [PASSED] 12 VFs
[02:41:34] [PASSED] 13 VFs
[02:41:34] [PASSED] 14 VFs
[02:41:34] [PASSED] 15 VFs
[02:41:34] [PASSED] 16 VFs
[02:41:34] [PASSED] 17 VFs
[02:41:34] [PASSED] 18 VFs
[02:41:34] [PASSED] 19 VFs
[02:41:34] [PASSED] 20 VFs
[02:41:34] [PASSED] 21 VFs
[02:41:34] [PASSED] 22 VFs
[02:41:34] [PASSED] 23 VFs
[02:41:34] [PASSED] 24 VFs
[02:41:34] [PASSED] 25 VFs
[02:41:34] [PASSED] 26 VFs
[02:41:34] [PASSED] 27 VFs
[02:41:34] [PASSED] 28 VFs
[02:41:34] [PASSED] 29 VFs
[02:41:34] [PASSED] 30 VFs
[02:41:34] [PASSED] 31 VFs
[02:41:34] [PASSED] 32 VFs
[02:41:34] [PASSED] 33 VFs
[02:41:34] [PASSED] 34 VFs
[02:41:34] [PASSED] 35 VFs
[02:41:34] [PASSED] 36 VFs
[02:41:34] [PASSED] 37 VFs
[02:41:34] [PASSED] 38 VFs
[02:41:34] [PASSED] 39 VFs
[02:41:34] [PASSED] 40 VFs
[02:41:34] [PASSED] 41 VFs
[02:41:34] [PASSED] 42 VFs
[02:41:34] [PASSED] 43 VFs
[02:41:34] [PASSED] 44 VFs
[02:41:34] [PASSED] 45 VFs
[02:41:34] [PASSED] 46 VFs
[02:41:34] [PASSED] 47 VFs
[02:41:34] [PASSED] 48 VFs
[02:41:34] [PASSED] 49 VFs
[02:41:34] [PASSED] 50 VFs
[02:41:34] [PASSED] 51 VFs
[02:41:34] [PASSED] 52 VFs
[02:41:34] [PASSED] 53 VFs
[02:41:34] [PASSED] 54 VFs
[02:41:34] [PASSED] 55 VFs
[02:41:34] [PASSED] 56 VFs
[02:41:34] [PASSED] 57 VFs
[02:41:34] [PASSED] 58 VFs
[02:41:34] [PASSED] 59 VFs
[02:41:34] [PASSED] 60 VFs
[02:41:34] [PASSED] 61 VFs
[02:41:34] [PASSED] 62 VFs
[02:41:34] [PASSED] 63 VFs
[02:41:34] ==================== [PASSED] fair_ggtt ====================
[02:41:34] ======================== fair_vram  ========================
[02:41:34] [PASSED] 1 VF
[02:41:34] [PASSED] 2 VFs
[02:41:34] [PASSED] 3 VFs
[02:41:34] [PASSED] 4 VFs
[02:41:34] [PASSED] 5 VFs
[02:41:34] [PASSED] 6 VFs
[02:41:34] [PASSED] 7 VFs
[02:41:34] [PASSED] 8 VFs
[02:41:34] [PASSED] 9 VFs
[02:41:34] [PASSED] 10 VFs
[02:41:34] [PASSED] 11 VFs
[02:41:34] [PASSED] 12 VFs
[02:41:34] [PASSED] 13 VFs
[02:41:34] [PASSED] 14 VFs
[02:41:34] [PASSED] 15 VFs
[02:41:34] [PASSED] 16 VFs
[02:41:34] [PASSED] 17 VFs
[02:41:34] [PASSED] 18 VFs
[02:41:34] [PASSED] 19 VFs
[02:41:34] [PASSED] 20 VFs
[02:41:34] [PASSED] 21 VFs
[02:41:34] [PASSED] 22 VFs
[02:41:34] [PASSED] 23 VFs
[02:41:34] [PASSED] 24 VFs
[02:41:34] [PASSED] 25 VFs
[02:41:34] [PASSED] 26 VFs
[02:41:34] [PASSED] 27 VFs
[02:41:34] [PASSED] 28 VFs
[02:41:34] [PASSED] 29 VFs
[02:41:34] [PASSED] 30 VFs
[02:41:34] [PASSED] 31 VFs
[02:41:34] [PASSED] 32 VFs
[02:41:34] [PASSED] 33 VFs
[02:41:34] [PASSED] 34 VFs
[02:41:34] [PASSED] 35 VFs
[02:41:34] [PASSED] 36 VFs
[02:41:34] [PASSED] 37 VFs
[02:41:34] [PASSED] 38 VFs
[02:41:34] [PASSED] 39 VFs
[02:41:34] [PASSED] 40 VFs
[02:41:34] [PASSED] 41 VFs
[02:41:34] [PASSED] 42 VFs
[02:41:34] [PASSED] 43 VFs
[02:41:34] [PASSED] 44 VFs
[02:41:34] [PASSED] 45 VFs
[02:41:34] [PASSED] 46 VFs
[02:41:34] [PASSED] 47 VFs
[02:41:34] [PASSED] 48 VFs
[02:41:34] [PASSED] 49 VFs
[02:41:34] [PASSED] 50 VFs
[02:41:34] [PASSED] 51 VFs
[02:41:34] [PASSED] 52 VFs
[02:41:34] [PASSED] 53 VFs
[02:41:34] [PASSED] 54 VFs
[02:41:34] [PASSED] 55 VFs
[02:41:34] [PASSED] 56 VFs
[02:41:34] [PASSED] 57 VFs
[02:41:34] [PASSED] 58 VFs
[02:41:34] [PASSED] 59 VFs
[02:41:34] [PASSED] 60 VFs
[02:41:34] [PASSED] 61 VFs
[02:41:34] [PASSED] 62 VFs
[02:41:34] [PASSED] 63 VFs
[02:41:34] ==================== [PASSED] fair_vram ====================
[02:41:34] ================== [PASSED] pf_gt_config ===================
[02:41:34] ===================== lmtt (1 subtest) =====================
[02:41:34] ======================== test_ops  =========================
[02:41:34] [PASSED] 2-level
[02:41:34] [PASSED] multi-level
[02:41:34] ==================== [PASSED] test_ops =====================
[02:41:34] ====================== [PASSED] lmtt =======================
[02:41:34] ================= sriov_packet (1 subtest) =================
[02:41:34] [PASSED] test_descriptor_init
[02:41:34] ================== [PASSED] sriov_packet ===================
[02:41:34] ================= pf_service (11 subtests) =================
[02:41:34] [PASSED] pf_negotiate_any
[02:41:34] [PASSED] pf_negotiate_base_match
[02:41:34] [PASSED] pf_negotiate_base_newer
[02:41:34] [PASSED] pf_negotiate_base_next
[02:41:34] [SKIPPED] pf_negotiate_base_older (no older minor)
[02:41:34] [PASSED] pf_negotiate_base_prev
[02:41:34] [PASSED] pf_negotiate_latest_match
[02:41:34] [PASSED] pf_negotiate_latest_newer
[02:41:34] [PASSED] pf_negotiate_latest_next
[02:41:34] [SKIPPED] pf_negotiate_latest_older (no older minor)
[02:41:34] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[02:41:34] =================== [PASSED] pf_service ====================
[02:41:34] ================= xe_guc_g2g (2 subtests) ==================
[02:41:34] ============== xe_live_guc_g2g_kunit_default  ==============
[02:41:34] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[02:41:34] ============== xe_live_guc_g2g_kunit_allmem  ===============
[02:41:34] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[02:41:34] =================== [SKIPPED] xe_guc_g2g ===================
[02:41:34] =================== xe_mocs (2 subtests) ===================
[02:41:34] ================ xe_live_mocs_kernel_kunit  ================
[02:41:34] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[02:41:34] ================ xe_live_mocs_reset_kunit  =================
[02:41:34] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[02:41:34] ==================== [SKIPPED] xe_mocs =====================
[02:41:34] ================= xe_migrate (3 subtests) ==================
[02:41:34] ================= xe_migrate_sanity_kunit  =================
[02:41:34] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[02:41:34] ================== xe_validate_ccs_kunit  ==================
[02:41:34] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[02:41:34] ============= xe_migrate_access_memory_kunit  ==============
[02:41:34] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[02:41:34] =================== [SKIPPED] xe_migrate ===================
[02:41:34] ================== xe_dma_buf (1 subtest) ==================
[02:41:34] ==================== xe_dma_buf_kunit  =====================
[02:41:34] ================ [SKIPPED] xe_dma_buf_kunit ================
[02:41:34] =================== [SKIPPED] xe_dma_buf ===================
[02:41:34] ================= xe_bo_shrink (1 subtest) =================
[02:41:34] =================== xe_bo_shrink_kunit  ====================
[02:41:34] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[02:41:34] ================== [SKIPPED] xe_bo_shrink ==================
[02:41:34] ==================== xe_bo (2 subtests) ====================
[02:41:34] ================== xe_ccs_migrate_kunit  ===================
[02:41:34] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[02:41:34] ==================== xe_bo_evict_kunit  ====================
[02:41:34] =============== [SKIPPED] xe_bo_evict_kunit ================
[02:41:34] ===================== [SKIPPED] xe_bo ======================
[02:41:34] =================== xe_any (9 subtests) ====================
[02:41:34] [PASSED] test_to_xe
[02:41:34] [PASSED] test_to_dev
[02:41:34] [PASSED] test_to_pdev
[02:41:34] [PASSED] test_to_drm
[02:41:34] [PASSED] test_if_pdev
[02:41:34] [PASSED] test_if_xe
[02:41:34] [PASSED] test_if_tile
[02:41:34] [PASSED] test_if_gt
[02:41:34] [PASSED] test_to_id
[02:41:34] ===================== [PASSED] xe_any ======================
[02:41:34] ==================== args (13 subtests) ====================
[02:41:34] [PASSED] count_args_test
[02:41:34] [PASSED] call_args_example
[02:41:34] [PASSED] call_args_test
[02:41:34] [PASSED] drop_first_arg_example
[02:41:34] [PASSED] drop_first_arg_test
[02:41:34] [PASSED] first_arg_example
[02:41:34] [PASSED] first_arg_test
[02:41:34] [PASSED] last_arg_example
[02:41:34] [PASSED] last_arg_test
[02:41:34] [PASSED] pick_arg_example
[02:41:34] [PASSED] if_args_example
[02:41:34] [PASSED] if_args_test
[02:41:34] [PASSED] sep_comma_example
[02:41:34] ====================== [PASSED] args =======================
[02:41:34] =================== xe_pci (3 subtests) ====================
[02:41:34] ==================== check_graphics_ip  ====================
[02:41:34] [PASSED] 12.00 Xe_LP
[02:41:34] [PASSED] 12.10 Xe_LP+
[02:41:34] [PASSED] 12.55 Xe_HPG
[02:41:34] [PASSED] 12.60 Xe_HPC
[02:41:34] [PASSED] 12.70 Xe_LPG
[02:41:34] [PASSED] 12.71 Xe_LPG
[02:41:34] [PASSED] 12.74 Xe_LPG+
[02:41:34] [PASSED] 20.01 Xe2_HPG
[02:41:34] [PASSED] 20.02 Xe2_HPG
[02:41:34] [PASSED] 20.04 Xe2_LPG
[02:41:34] [PASSED] 30.00 Xe3_LPG
[02:41:34] [PASSED] 30.01 Xe3_LPG
[02:41:34] [PASSED] 30.03 Xe3_LPG
[02:41:34] [PASSED] 30.04 Xe3_LPG
[02:41:34] [PASSED] 30.05 Xe3_LPG
[02:41:34] [PASSED] 35.10 Xe3p_LPG
[02:41:34] [PASSED] 35.11 Xe3p_XPC
[02:41:34] ================ [PASSED] check_graphics_ip ================
[02:41:34] ===================== check_media_ip  ======================
[02:41:34] [PASSED] 12.00 Xe_M
[02:41:34] [PASSED] 12.55 Xe_HPM
[02:41:34] [PASSED] 13.00 Xe_LPM+
[02:41:34] [PASSED] 13.01 Xe2_HPM
[02:41:34] [PASSED] 20.00 Xe2_LPM
[02:41:34] [PASSED] 30.00 Xe3_LPM
[02:41:34] [PASSED] 30.02 Xe3_LPM
[02:41:34] [PASSED] 35.00 Xe3p_LPM
[02:41:34] [PASSED] 35.03 Xe3p_HPM
[02:41:34] ================= [PASSED] check_media_ip ==================
[02:41:34] =================== check_platform_desc  ===================
[02:41:34] [PASSED] 0x9A60 (TIGERLAKE)
[02:41:34] [PASSED] 0x9A68 (TIGERLAKE)
[02:41:34] [PASSED] 0x9A70 (TIGERLAKE)
[02:41:34] [PASSED] 0x9A40 (TIGERLAKE)
[02:41:34] [PASSED] 0x9A49 (TIGERLAKE)
[02:41:34] [PASSED] 0x9A59 (TIGERLAKE)
[02:41:34] [PASSED] 0x9A78 (TIGERLAKE)
[02:41:34] [PASSED] 0x9AC0 (TIGERLAKE)
[02:41:34] [PASSED] 0x9AC9 (TIGERLAKE)
[02:41:34] [PASSED] 0x9AD9 (TIGERLAKE)
[02:41:34] [PASSED] 0x9AF8 (TIGERLAKE)
[02:41:34] [PASSED] 0x4C80 (ROCKETLAKE)
[02:41:34] [PASSED] 0x4C8A (ROCKETLAKE)
[02:41:34] [PASSED] 0x4C8B (ROCKETLAKE)
[02:41:34] [PASSED] 0x4C8C (ROCKETLAKE)
[02:41:34] [PASSED] 0x4C90 (ROCKETLAKE)
[02:41:34] [PASSED] 0x4C9A (ROCKETLAKE)
[02:41:34] [PASSED] 0x4680 (ALDERLAKE_S)
[02:41:34] [PASSED] 0x4682 (ALDERLAKE_S)
[02:41:34] [PASSED] 0x4688 (ALDERLAKE_S)
[02:41:34] [PASSED] 0x468A (ALDERLAKE_S)
[02:41:34] [PASSED] 0x468B (ALDERLAKE_S)
[02:41:34] [PASSED] 0x4690 (ALDERLAKE_S)
[02:41:34] [PASSED] 0x4692 (ALDERLAKE_S)
[02:41:34] [PASSED] 0x4693 (ALDERLAKE_S)
[02:41:34] [PASSED] 0x46A0 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46A1 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46A2 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46A3 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46A6 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46A8 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46AA (ALDERLAKE_P)
[02:41:34] [PASSED] 0x462A (ALDERLAKE_P)
[02:41:34] [PASSED] 0x4626 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x4628 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46B0 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46B1 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46B2 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46B3 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46C0 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46C1 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46C2 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46C3 (ALDERLAKE_P)
[02:41:34] [PASSED] 0x46D0 (ALDERLAKE_N)
[02:41:34] [PASSED] 0x46D1 (ALDERLAKE_N)
[02:41:34] [PASSED] 0x46D2 (ALDERLAKE_N)
[02:41:34] [PASSED] 0x46D3 (ALDERLAKE_N)
[02:41:34] [PASSED] 0x46D4 (ALDERLAKE_N)
[02:41:34] [PASSED] 0xA721 (ALDERLAKE_P)
[02:41:34] [PASSED] 0xA7A1 (ALDERLAKE_P)
[02:41:34] [PASSED] 0xA7A9 (ALDERLAKE_P)
[02:41:34] [PASSED] 0xA7AC (ALDERLAKE_P)
[02:41:34] [PASSED] 0xA7AD (ALDERLAKE_P)
[02:41:34] [PASSED] 0xA720 (ALDERLAKE_P)
[02:41:34] [PASSED] 0xA7A0 (ALDERLAKE_P)
[02:41:34] [PASSED] 0xA7A8 (ALDERLAKE_P)
[02:41:34] [PASSED] 0xA7AA (ALDERLAKE_P)
[02:41:34] [PASSED] 0xA7AB (ALDERLAKE_P)
[02:41:34] [PASSED] 0xA780 (ALDERLAKE_S)
[02:41:34] [PASSED] 0xA781 (ALDERLAKE_S)
[02:41:34] [PASSED] 0xA782 (ALDERLAKE_S)
[02:41:34] [PASSED] 0xA783 (ALDERLAKE_S)
[02:41:34] [PASSED] 0xA788 (ALDERLAKE_S)
[02:41:34] [PASSED] 0xA789 (ALDERLAKE_S)
[02:41:34] [PASSED] 0xA78A (ALDERLAKE_S)
[02:41:34] [PASSED] 0xA78B (ALDERLAKE_S)
[02:41:34] [PASSED] 0x4905 (DG1)
[02:41:34] [PASSED] 0x4906 (DG1)
[02:41:34] [PASSED] 0x4907 (DG1)
[02:41:34] [PASSED] 0x4908 (DG1)
[02:41:34] [PASSED] 0x4909 (DG1)
[02:41:34] [PASSED] 0x56C0 (DG2)
[02:41:34] [PASSED] 0x56C2 (DG2)
[02:41:34] [PASSED] 0x56C1 (DG2)
[02:41:34] [PASSED] 0x7D51 (METEORLAKE)
[02:41:34] [PASSED] 0x7DD1 (METEORLAKE)
[02:41:34] [PASSED] 0x7D41 (METEORLAKE)
[02:41:34] [PASSED] 0x7D67 (METEORLAKE)
[02:41:34] [PASSED] 0xB640 (METEORLAKE)
[02:41:34] [PASSED] 0x56A0 (DG2)
[02:41:34] [PASSED] 0x56A1 (DG2)
[02:41:34] [PASSED] 0x56A2 (DG2)
[02:41:34] [PASSED] 0x56BE (DG2)
[02:41:34] [PASSED] 0x56BF (DG2)
[02:41:34] [PASSED] 0x5690 (DG2)
[02:41:34] [PASSED] 0x5691 (DG2)
[02:41:34] [PASSED] 0x5692 (DG2)
[02:41:34] [PASSED] 0x56A5 (DG2)
[02:41:34] [PASSED] 0x56A6 (DG2)
[02:41:34] [PASSED] 0x56B0 (DG2)
[02:41:34] [PASSED] 0x56B1 (DG2)
[02:41:34] [PASSED] 0x56BA (DG2)
[02:41:34] [PASSED] 0x56BB (DG2)
[02:41:34] [PASSED] 0x56BC (DG2)
[02:41:34] [PASSED] 0x56BD (DG2)
[02:41:34] [PASSED] 0x5693 (DG2)
[02:41:34] [PASSED] 0x5694 (DG2)
[02:41:34] [PASSED] 0x5695 (DG2)
[02:41:34] [PASSED] 0x56A3 (DG2)
[02:41:34] [PASSED] 0x56A4 (DG2)
[02:41:34] [PASSED] 0x56B2 (DG2)
[02:41:34] [PASSED] 0x56B3 (DG2)
[02:41:34] [PASSED] 0x5696 (DG2)
[02:41:34] [PASSED] 0x5697 (DG2)
[02:41:34] [PASSED] 0xB69 (PVC)
[02:41:34] [PASSED] 0xB6E (PVC)
[02:41:34] [PASSED] 0xBD4 (PVC)
[02:41:34] [PASSED] 0xBD5 (PVC)
[02:41:34] [PASSED] 0xBD6 (PVC)
[02:41:34] [PASSED] 0xBD7 (PVC)
[02:41:34] [PASSED] 0xBD8 (PVC)
[02:41:34] [PASSED] 0xBD9 (PVC)
[02:41:34] [PASSED] 0xBDA (PVC)
[02:41:34] [PASSED] 0xBDB (PVC)
[02:41:34] [PASSED] 0xBE0 (PVC)
[02:41:34] [PASSED] 0xBE1 (PVC)
[02:41:34] [PASSED] 0xBE5 (PVC)
[02:41:34] [PASSED] 0x7D40 (METEORLAKE)
[02:41:34] [PASSED] 0x7D45 (METEORLAKE)
[02:41:34] [PASSED] 0x7D55 (METEORLAKE)
[02:41:34] [PASSED] 0x7D60 (METEORLAKE)
[02:41:34] [PASSED] 0x7DD5 (METEORLAKE)
[02:41:34] [PASSED] 0x6420 (LUNARLAKE)
[02:41:34] [PASSED] 0x64A0 (LUNARLAKE)
[02:41:34] [PASSED] 0x64B0 (LUNARLAKE)
[02:41:34] [PASSED] 0xE202 (BATTLEMAGE)
[02:41:34] [PASSED] 0xE209 (BATTLEMAGE)
[02:41:34] [PASSED] 0xE20B (BATTLEMAGE)
[02:41:34] [PASSED] 0xE20C (BATTLEMAGE)
[02:41:34] [PASSED] 0xE20D (BATTLEMAGE)
[02:41:34] [PASSED] 0xE210 (BATTLEMAGE)
[02:41:34] [PASSED] 0xE211 (BATTLEMAGE)
[02:41:34] [PASSED] 0xE212 (BATTLEMAGE)
[02:41:34] [PASSED] 0xE216 (BATTLEMAGE)
[02:41:34] [PASSED] 0xE220 (BATTLEMAGE)
[02:41:34] [PASSED] 0xE221 (BATTLEMAGE)
[02:41:34] [PASSED] 0xE222 (BATTLEMAGE)
[02:41:34] [PASSED] 0xE223 (BATTLEMAGE)
[02:41:34] [PASSED] 0xB080 (PANTHERLAKE)
[02:41:34] [PASSED] 0xB081 (PANTHERLAKE)
[02:41:34] [PASSED] 0xB082 (PANTHERLAKE)
[02:41:34] [PASSED] 0xB083 (PANTHERLAKE)
[02:41:34] [PASSED] 0xB084 (PANTHERLAKE)
[02:41:34] [PASSED] 0xB085 (PANTHERLAKE)
[02:41:34] [PASSED] 0xB086 (PANTHERLAKE)
[02:41:34] [PASSED] 0xB087 (PANTHERLAKE)
[02:41:34] [PASSED] 0xB08F (PANTHERLAKE)
[02:41:34] [PASSED] 0xB090 (PANTHERLAKE)
[02:41:34] [PASSED] 0xB0A0 (PANTHERLAKE)
[02:41:34] [PASSED] 0xB0A1 (PANTHERLAKE)
[02:41:34] [PASSED] 0xB0B0 (PANTHERLAKE)
[02:41:34] [PASSED] 0xFD80 (PANTHERLAKE)
[02:41:34] [PASSED] 0xFD81 (PANTHERLAKE)
[02:41:34] [PASSED] 0xD740 (NOVALAKE_S)
[02:41:34] [PASSED] 0xD741 (NOVALAKE_S)
[02:41:34] [PASSED] 0xD742 (NOVALAKE_S)
[02:41:34] [PASSED] 0xD743 (NOVALAKE_S)
[02:41:34] [PASSED] 0xD745 (NOVALAKE_S)
[02:41:34] [PASSED] 0xD74A (NOVALAKE_S)
[02:41:34] [PASSED] 0xD74B (NOVALAKE_S)
[02:41:34] [PASSED] 0x674C (CRESCENTISLAND)
[02:41:34] [PASSED] 0x674D (CRESCENTISLAND)
[02:41:34] [PASSED] 0x674E (CRESCENTISLAND)
[02:41:34] [PASSED] 0x674F (CRESCENTISLAND)
[02:41:34] [PASSED] 0x6750 (CRESCENTISLAND)
[02:41:34] [PASSED] 0x6751 (CRESCENTISLAND)
[02:41:34] [PASSED] 0x6752 (CRESCENTISLAND)
[02:41:34] [PASSED] 0xD750 (NOVALAKE_P)
[02:41:34] [PASSED] 0xD751 (NOVALAKE_P)
[02:41:34] [PASSED] 0xD752 (NOVALAKE_P)
[02:41:34] [PASSED] 0xD753 (NOVALAKE_P)
[02:41:34] [PASSED] 0xD754 (NOVALAKE_P)
[02:41:34] [PASSED] 0xD755 (NOVALAKE_P)
[02:41:34] [PASSED] 0xD756 (NOVALAKE_P)
[02:41:34] [PASSED] 0xD757 (NOVALAKE_P)
[02:41:34] [PASSED] 0xD75F (NOVALAKE_P)
[02:41:34] =============== [PASSED] check_platform_desc ===============
[02:41:34] ===================== [PASSED] xe_pci ======================
[02:41:34] ============= xe_rtp_tables_test (5 subtests) ==============
[02:41:34] ================== xe_rtp_table_gt_test  ===================
[02:41:34] [PASSED] gt_was/14011060649
[02:41:34] [PASSED] gt_was/14011059788
[02:41:34] [PASSED] gt_was/14015795083
[02:41:34] [PASSED] gt_was/16021867713
[02:41:34] [PASSED] gt_was/14019449301
[02:41:34] [PASSED] gt_was/16028005424
[02:41:34] [PASSED] gt_was/14026578760
[02:41:34] [PASSED] gt_was/1409420604
[02:41:34] [PASSED] gt_was/1408615072
[02:41:34] [PASSED] gt_was/22010523718
[02:41:34] [PASSED] gt_was/14011006942
[02:41:34] [PASSED] gt_was/14014830051
[02:41:34] [PASSED] gt_was/18018781329
[02:41:34] [PASSED] gt_was/1509235366
[02:41:34] [PASSED] gt_was/18018781329
[02:41:34] [PASSED] gt_was/16016694945
[02:41:34] [PASSED] gt_was/14018575942
[02:41:34] [PASSED] gt_was/22016670082
[02:41:34] [PASSED] gt_was/22016670082
[02:41:34] [PASSED] gt_was/14017421178
[02:41:34] [PASSED] gt_was/16025250150
[02:41:34] [PASSED] gt_was/14021871409
[02:41:34] [PASSED] gt_was/16021865536
[02:41:34] [PASSED] gt_was/14021486841
[02:41:34] [PASSED] gt_was/14025160223
[02:41:34] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[02:41:34] [PASSED] gt_was/14025635424
[02:41:34] [PASSED] gt_was/16028005424
[02:41:34] ============== [PASSED] xe_rtp_table_gt_test ===============
[02:41:34] ================== xe_rtp_table_gt_test  ===================
[02:41:34] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[02:41:34] [PASSED] gt_tunings/Tuning: 32B Access Enable
[02:41:34] [PASSED] gt_tunings/Tuning: L3 cache
[02:41:34] [PASSED] gt_tunings/Tuning: L3 cache - media
[02:41:34] [PASSED] gt_tunings/Tuning: Compression Overfetch
[02:41:34] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[02:41:34] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[02:41:34] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[02:41:34] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[02:41:34] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[02:41:34] [PASSED] gt_tunings/Tuning: Stateless compression control
[02:41:34] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[02:41:34] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[02:41:34] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[02:41:34] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[02:41:34] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[02:41:34] ============== [PASSED] xe_rtp_table_gt_test ===============
[02:41:34] ================== xe_rtp_table_oob_test  ==================
[02:41:34] [PASSED] oob_was/1607983814
[02:41:34] [PASSED] oob_was/16010904313
[02:41:34] [PASSED] oob_was/18022495364
[02:41:34] [PASSED] oob_was/22012773006
[02:41:34] [PASSED] oob_was/14014475959
[02:41:34] [PASSED] oob_was/22011391025
[02:41:34] [PASSED] oob_was/22012727170
[02:41:34] [PASSED] oob_was/22012727685
[02:41:34] [PASSED] oob_was/22016596838
[02:41:34] [PASSED] oob_was/18020744125
[02:41:34] [PASSED] oob_was/1409600907
[02:41:34] [PASSED] oob_was/22014953428
[02:41:34] [PASSED] oob_was/16017236439
[02:41:34] [PASSED] oob_was/14019821291
[02:41:34] [PASSED] oob_was/14015076503
[02:41:34] [PASSED] oob_was/22016122933
[02:41:34] [PASSED] oob_was/14018913170
[02:41:34] [PASSED] oob_was/14018094691
[02:41:34] [PASSED] oob_was/18024947630
[02:41:34] [PASSED] oob_was/16022287689
[02:41:34] [PASSED] oob_was/13011645652
[02:41:34] [PASSED] oob_was/14022293748
[02:41:34] [PASSED] oob_was/22019794406
[02:41:34] [PASSED] oob_was/22019338487
[02:41:34] [PASSED] oob_was/16023588340
[02:41:34] [PASSED] oob_was/14019789679
[02:41:34] [PASSED] oob_was/14022866841
[02:41:34] [PASSED] oob_was/16021333562
[02:41:34] [PASSED] oob_was/14016712196
[02:41:34] [PASSED] oob_was/14015568240
[02:41:34] [PASSED] oob_was/18013179988
[02:41:34] [PASSED] oob_was/1508761755
[02:41:34] [PASSED] oob_was/16023105232
[02:41:34] [PASSED] oob_was/16026508708
[02:41:34] [PASSED] oob_was/14020001231
[02:41:34] [PASSED] oob_was/16023683509
[02:41:34] [PASSED] oob_was/14025515070
[02:41:34] [PASSED] oob_was/15015404425_disable
[02:41:34] [PASSED] oob_was/16026007364
[02:41:34] [PASSED] oob_was/14020316580
[02:41:34] [PASSED] oob_was/14025883347
[02:41:34] [PASSED] oob_was/16029380221
[02:41:34] [PASSED] oob_was/22022079272
[02:41:34] [PASSED] oob_was/16029897822
[02:41:34] [PASSED] oob_was/14026539277
[02:41:34] [PASSED] oob_was/14027054324
[02:41:34] [PASSED] oob_was/14025941587
[02:41:34] [PASSED] oob_was/16030224309
[02:41:34] [PASSED] oob_was/14028709524
[02:41:34] ============== [PASSED] xe_rtp_table_oob_test ==============
[02:41:34] ================ xe_rtp_table_dev_oob_test  ================
[02:41:34] [PASSED] device_oob_was/22010954014
[02:41:34] [PASSED] device_oob_was/15015404425
[02:41:34] [PASSED] device_oob_was/22019338487_display
[02:41:34] [PASSED] device_oob_was/14022085890
[02:41:34] [PASSED] device_oob_was/14026633728
[02:41:34] [PASSED] device_oob_was/14026746987
[02:41:34] [PASSED] device_oob_was/14026779378
[02:41:34] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[02:41:34] ========== xe_rtp_table_missing_upper_bound_test  ==========
[02:41:34] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[02:41:34] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[02:41:34] [PASSED] register_whitelist/1806527549
[02:41:34] [PASSED] register_whitelist/allow_read_ctx_timestamp
[02:41:34] [PASSED] register_whitelist/allow_read_queue_timestamp
[02:41:34] [PASSED] register_whitelist/16014440446
[02:41:34] [PASSED] register_whitelist/16017236439
[02:41:34] [PASSED] register_whitelist/16020183090
[02:41:34] [PASSED] register_whitelist/14024997852
[02:41:34] [PASSED] register_whitelist/14024997852
[02:41:34] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[02:41:34] =============== [PASSED] xe_rtp_tables_test ================
[02:41:34] =================== xe_rtp (3 subtests) ====================
[02:41:34] =================== xe_rtp_rules_tests  ====================
[02:41:34] [PASSED] no
[02:41:34] [PASSED] yes
[02:41:34] [PASSED] no-and-no
[02:41:34] [PASSED] no-and-yes
[02:41:34] [PASSED] yes-and-no
[02:41:34] [PASSED] yes-and-yes
[02:41:34] [PASSED] no-or-no
[02:41:34] [PASSED] no-or-yes
[02:41:34] [PASSED] yes-or-no
[02:41:34] [PASSED] yes-or-yes
[02:41:34] [PASSED] no-yes-or-yes-no
[02:41:34] [PASSED] no-yes-or-yes-yes
[02:41:34] [PASSED] yes-yes-or-no-yes
[02:41:34] [PASSED] yes-yes-or-yes-yes
[02:41:34] [PASSED] no-no-or-yes-or-no
[02:41:34] [PASSED] or
[02:41:34] [PASSED] or-yes
[02:41:34] [PASSED] or-no
[02:41:34] [PASSED] yes-or
[02:41:34] [PASSED] no-or
[02:41:34] [PASSED] no-or-or-yes
[02:41:34] [PASSED] yes-or-or-no
[02:41:34] [PASSED] no-or-or-no
[02:41:34] [PASSED] missing-context-engine-class
[02:41:34] [PASSED] missing-context-engine-class-or-yes
[02:41:34] [PASSED] missing-context-engine-class-or-or-yes
[02:41:34] =============== [PASSED] xe_rtp_rules_tests ================
[02:41:34] =============== xe_rtp_process_to_sr_tests  ================
[02:41:34] [PASSED] coalesce-same-reg
[02:41:34] [PASSED] coalesce-same-reg-literal-and-func
[02:41:34] [PASSED] no-match-no-add
[02:41:34] [PASSED] two-regs-two-entries
[02:41:34] [PASSED] clr-one-set-other
[02:41:34] [PASSED] set-field
[02:41:34] [PASSED] conflict-duplicate
[02:41:34] [PASSED] conflict-not-disjoint
[02:41:34] [PASSED] conflict-not-disjoint-literal-and-func
[02:41:34] [PASSED] conflict-reg-type
[02:41:34] [PASSED] bad-mcr-reg-forced-to-regular
[02:41:34] [PASSED] bad-regular-reg-forced-to-mcr
[02:41:34] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[02:41:34] ================== xe_rtp_process_tests  ===================
[02:41:34] [PASSED] active1
[02:41:34] [PASSED] active2
[02:41:34] [PASSED] active-inactive
[02:41:34] [PASSED] inactive-active
[02:41:34] [PASSED] inactive-active-inactive
[02:41:34] [PASSED] inactive-inactive-inactive
[02:41:34] ============== [PASSED] xe_rtp_process_tests ===============
[02:41:34] ===================== [PASSED] xe_rtp ======================
[02:41:34] ==================== xe_wa (1 subtest) =====================
[02:41:34] ======================== xe_wa_gt  =========================
[02:41:34] [PASSED] TIGERLAKE B0
[02:41:34] [PASSED] DG1 A0
[02:41:34] [PASSED] DG1 B0
[02:41:34] [PASSED] ALDERLAKE_S A0
[02:41:34] [PASSED] ALDERLAKE_S B0
[02:41:34] [PASSED] ALDERLAKE_S C0
[02:41:34] [PASSED] ALDERLAKE_S D0
[02:41:34] [PASSED] ALDERLAKE_P A0
[02:41:34] [PASSED] ALDERLAKE_P B0
[02:41:34] [PASSED] ALDERLAKE_P C0
[02:41:34] [PASSED] ALDERLAKE_S RPLS D0
[02:41:34] [PASSED] ALDERLAKE_P RPLU E0
[02:41:34] [PASSED] DG2 G10 C0
[02:41:34] [PASSED] DG2 G11 B1
[02:41:34] [PASSED] DG2 G12 A1
[02:41:34] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[02:41:34] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[02:41:34] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[02:41:34] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[02:41:34] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[02:41:34] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[02:41:34] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[02:41:34] ==================== [PASSED] xe_wa_gt =====================
[02:41:34] ====================== [PASSED] xe_wa ======================
[02:41:34] ============================================================
[02:41:34] Testing complete. Ran 840 tests: passed: 811, skipped: 29
[02:41:34] Elapsed time: 41.548s total, 2.494s configuring, 38.338s building, 0.705s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[02:41:34] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:41:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:42:02] Starting KUnit Kernel (1/1)...
[02:42:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:42:02] ============ drm_test_pick_cmdline (2 subtests) ============
[02:42:02] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[02:42:02] =============== drm_test_pick_cmdline_named  ===============
[02:42:02] [PASSED] NTSC
[02:42:02] [PASSED] NTSC-J
[02:42:02] [PASSED] PAL
[02:42:02] [PASSED] PAL-M
[02:42:02] =========== [PASSED] drm_test_pick_cmdline_named ===========
[02:42:02] ============== [PASSED] drm_test_pick_cmdline ==============
[02:42:02] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[02:42:02] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[02:42:02] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[02:42:02] =========== drm_validate_clone_mode (2 subtests) ===========
[02:42:02] ============== drm_test_check_in_clone_mode  ===============
[02:42:02] [PASSED] in_clone_mode
[02:42:02] [PASSED] not_in_clone_mode
[02:42:02] ========== [PASSED] drm_test_check_in_clone_mode ===========
[02:42:02] =============== drm_test_check_valid_clones  ===============
[02:42:02] [PASSED] not_in_clone_mode
[02:42:02] [PASSED] valid_clone
[02:42:02] [PASSED] invalid_clone
[02:42:02] =========== [PASSED] drm_test_check_valid_clones ===========
[02:42:02] ============= [PASSED] drm_validate_clone_mode =============
[02:42:02] ============= drm_validate_modeset (1 subtest) =============
[02:42:02] [PASSED] drm_test_check_connector_changed_modeset
[02:42:02] ============== [PASSED] drm_validate_modeset ===============
[02:42:02] ====== drm_test_bridge_get_current_state (1 subtest) =======
[02:42:02] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[02:42:02] ======== [PASSED] drm_test_bridge_get_current_state ========
[02:42:02] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[02:42:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[02:42:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[02:42:02] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[02:42:02] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[02:42:02] ============== drm_bridge_alloc (2 subtests) ===============
[02:42:02] [PASSED] drm_test_drm_bridge_alloc_basic
[02:42:02] [PASSED] drm_test_drm_bridge_alloc_get_put
[02:42:02] ================ [PASSED] drm_bridge_alloc =================
[02:42:02] ============= drm_bridge_bus_fmt (5 subtests) ==============
[02:42:02] [PASSED] drm_test_bridge_rgb_yuv_rgb
[02:42:02] [PASSED] drm_test_bridge_must_convert_to_yuv444
[02:42:02] [PASSED] drm_test_bridge_hdmi_auto_rgb
[02:42:02] [PASSED] drm_test_bridge_auto_first
[02:42:02] [PASSED] drm_test_bridge_rgb_yuv_no_path
[02:42:02] =============== [PASSED] drm_bridge_bus_fmt ================
[02:42:02] ============= drm_cmdline_parser (40 subtests) =============
[02:42:02] [PASSED] drm_test_cmdline_force_d_only
[02:42:02] [PASSED] drm_test_cmdline_force_D_only_dvi
[02:42:02] [PASSED] drm_test_cmdline_force_D_only_hdmi
[02:42:02] [PASSED] drm_test_cmdline_force_D_only_not_digital
[02:42:02] [PASSED] drm_test_cmdline_force_e_only
[02:42:02] [PASSED] drm_test_cmdline_res
[02:42:02] [PASSED] drm_test_cmdline_res_vesa
[02:42:02] [PASSED] drm_test_cmdline_res_vesa_rblank
[02:42:02] [PASSED] drm_test_cmdline_res_rblank
[02:42:02] [PASSED] drm_test_cmdline_res_bpp
[02:42:02] [PASSED] drm_test_cmdline_res_refresh
[02:42:02] [PASSED] drm_test_cmdline_res_bpp_refresh
[02:42:02] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[02:42:02] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[02:42:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[02:42:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[02:42:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[02:42:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[02:42:02] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[02:42:02] [PASSED] drm_test_cmdline_res_margins_force_on
[02:42:02] [PASSED] drm_test_cmdline_res_vesa_margins
[02:42:02] [PASSED] drm_test_cmdline_name
[02:42:02] [PASSED] drm_test_cmdline_name_bpp
[02:42:02] [PASSED] drm_test_cmdline_name_option
[02:42:02] [PASSED] drm_test_cmdline_name_bpp_option
[02:42:02] [PASSED] drm_test_cmdline_rotate_0
[02:42:02] [PASSED] drm_test_cmdline_rotate_90
[02:42:02] [PASSED] drm_test_cmdline_rotate_180
[02:42:02] [PASSED] drm_test_cmdline_rotate_270
[02:42:02] [PASSED] drm_test_cmdline_hmirror
[02:42:02] [PASSED] drm_test_cmdline_vmirror
[02:42:02] [PASSED] drm_test_cmdline_margin_options
[02:42:02] [PASSED] drm_test_cmdline_multiple_options
[02:42:02] [PASSED] drm_test_cmdline_bpp_extra_and_option
[02:42:02] [PASSED] drm_test_cmdline_extra_and_option
[02:42:02] [PASSED] drm_test_cmdline_freestanding_options
[02:42:02] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[02:42:02] [PASSED] drm_test_cmdline_panel_orientation
[02:42:02] ================ drm_test_cmdline_invalid  =================
[02:42:02] [PASSED] margin_only
[02:42:02] [PASSED] interlace_only
[02:42:02] [PASSED] res_missing_x
[02:42:02] [PASSED] res_missing_y
[02:42:02] [PASSED] res_bad_y
[02:42:02] [PASSED] res_missing_y_bpp
[02:42:02] [PASSED] res_bad_bpp
[02:42:02] [PASSED] res_bad_refresh
[02:42:02] [PASSED] res_bpp_refresh_force_on_off
[02:42:02] [PASSED] res_invalid_mode
[02:42:02] [PASSED] res_bpp_wrong_place_mode
[02:42:02] [PASSED] name_bpp_refresh
[02:42:02] [PASSED] name_refresh
[02:42:02] [PASSED] name_refresh_wrong_mode
[02:42:02] [PASSED] name_refresh_invalid_mode
[02:42:02] [PASSED] rotate_multiple
[02:42:02] [PASSED] rotate_invalid_val
[02:42:02] [PASSED] rotate_truncated
[02:42:02] [PASSED] invalid_option
[02:42:02] [PASSED] invalid_tv_option
[02:42:02] [PASSED] truncated_tv_option
[02:42:02] ============ [PASSED] drm_test_cmdline_invalid =============
[02:42:02] =============== drm_test_cmdline_tv_options  ===============
[02:42:02] [PASSED] NTSC
[02:42:02] [PASSED] NTSC_443
[02:42:02] [PASSED] NTSC_J
[02:42:02] [PASSED] PAL
[02:42:02] [PASSED] PAL_M
[02:42:02] [PASSED] PAL_N
[02:42:02] [PASSED] SECAM
[02:42:02] [PASSED] MONO_525
[02:42:02] [PASSED] MONO_625
[02:42:02] =========== [PASSED] drm_test_cmdline_tv_options ===========
[02:42:02] =============== [PASSED] drm_cmdline_parser ================
[02:42:02] ========== drmm_connector_hdmi_init (20 subtests) ==========
[02:42:02] [PASSED] drm_test_connector_hdmi_init_valid
[02:42:02] [PASSED] drm_test_connector_hdmi_init_bpc_8
[02:42:02] [PASSED] drm_test_connector_hdmi_init_bpc_10
[02:42:02] [PASSED] drm_test_connector_hdmi_init_bpc_12
[02:42:02] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[02:42:02] [PASSED] drm_test_connector_hdmi_init_bpc_null
[02:42:02] [PASSED] drm_test_connector_hdmi_init_formats_empty
[02:42:02] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[02:42:02] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[02:42:02] [PASSED] supported_formats=0x9 yuv420_allowed=1
[02:42:02] [PASSED] supported_formats=0x9 yuv420_allowed=0
[02:42:02] [PASSED] supported_formats=0x5 yuv420_allowed=1
[02:42:02] [PASSED] supported_formats=0x5 yuv420_allowed=0
[02:42:02] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[02:42:02] [PASSED] drm_test_connector_hdmi_init_null_ddc
[02:42:02] [PASSED] drm_test_connector_hdmi_init_null_product
[02:42:02] [PASSED] drm_test_connector_hdmi_init_null_vendor
[02:42:02] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[02:42:02] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[02:42:02] [PASSED] drm_test_connector_hdmi_init_product_valid
[02:42:02] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[02:42:02] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[02:42:02] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[02:42:02] ========= drm_test_connector_hdmi_init_type_valid  =========
[02:42:02] [PASSED] HDMI-A
[02:42:02] [PASSED] HDMI-B
[02:42:02] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[02:42:02] ======== drm_test_connector_hdmi_init_type_invalid  ========
[02:42:02] [PASSED] Unknown
[02:42:02] [PASSED] VGA
[02:42:02] [PASSED] DVI-I
[02:42:02] [PASSED] DVI-D
[02:42:02] [PASSED] DVI-A
[02:42:02] [PASSED] Composite
[02:42:02] [PASSED] SVIDEO
[02:42:02] [PASSED] LVDS
[02:42:02] [PASSED] Component
[02:42:02] [PASSED] DIN
[02:42:02] [PASSED] DP
[02:42:02] [PASSED] TV
[02:42:02] [PASSED] eDP
[02:42:02] [PASSED] Virtual
[02:42:02] [PASSED] DSI
[02:42:02] [PASSED] DPI
[02:42:02] [PASSED] Writeback
[02:42:02] [PASSED] SPI
[02:42:02] [PASSED] USB
[02:42:02] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[02:42:02] ============ [PASSED] drmm_connector_hdmi_init =============
[02:42:02] ============= drmm_connector_init (3 subtests) =============
[02:42:02] [PASSED] drm_test_drmm_connector_init
[02:42:02] [PASSED] drm_test_drmm_connector_init_null_ddc
[02:42:02] ========= drm_test_drmm_connector_init_type_valid  =========
[02:42:02] [PASSED] Unknown
[02:42:02] [PASSED] VGA
[02:42:02] [PASSED] DVI-I
[02:42:02] [PASSED] DVI-D
[02:42:02] [PASSED] DVI-A
[02:42:02] [PASSED] Composite
[02:42:02] [PASSED] SVIDEO
[02:42:02] [PASSED] LVDS
[02:42:02] [PASSED] Component
[02:42:02] [PASSED] DIN
[02:42:02] [PASSED] DP
[02:42:02] [PASSED] HDMI-A
[02:42:02] [PASSED] HDMI-B
[02:42:02] [PASSED] TV
[02:42:02] [PASSED] eDP
[02:42:02] [PASSED] Virtual
[02:42:02] [PASSED] DSI
[02:42:02] [PASSED] DPI
[02:42:02] [PASSED] Writeback
[02:42:02] [PASSED] SPI
[02:42:02] [PASSED] USB
[02:42:02] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[02:42:02] =============== [PASSED] drmm_connector_init ===============
[02:42:02] ========= drm_connector_dynamic_init (6 subtests) ==========
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_init
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_init_properties
[02:42:02] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[02:42:02] [PASSED] Unknown
[02:42:02] [PASSED] VGA
[02:42:02] [PASSED] DVI-I
[02:42:02] [PASSED] DVI-D
[02:42:02] [PASSED] DVI-A
[02:42:02] [PASSED] Composite
[02:42:02] [PASSED] SVIDEO
[02:42:02] [PASSED] LVDS
[02:42:02] [PASSED] Component
[02:42:02] [PASSED] DIN
[02:42:02] [PASSED] DP
[02:42:02] [PASSED] HDMI-A
[02:42:02] [PASSED] HDMI-B
[02:42:02] [PASSED] TV
[02:42:02] [PASSED] eDP
[02:42:02] [PASSED] Virtual
[02:42:02] [PASSED] DSI
[02:42:02] [PASSED] DPI
[02:42:02] [PASSED] Writeback
[02:42:02] [PASSED] SPI
[02:42:02] [PASSED] USB
[02:42:02] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[02:42:02] ======== drm_test_drm_connector_dynamic_init_name  =========
[02:42:02] [PASSED] Unknown
[02:42:02] [PASSED] VGA
[02:42:02] [PASSED] DVI-I
[02:42:02] [PASSED] DVI-D
[02:42:02] [PASSED] DVI-A
[02:42:02] [PASSED] Composite
[02:42:02] [PASSED] SVIDEO
[02:42:02] [PASSED] LVDS
[02:42:02] [PASSED] Component
[02:42:02] [PASSED] DIN
[02:42:02] [PASSED] DP
[02:42:02] [PASSED] HDMI-A
[02:42:02] [PASSED] HDMI-B
[02:42:02] [PASSED] TV
[02:42:02] [PASSED] eDP
[02:42:02] [PASSED] Virtual
[02:42:02] [PASSED] DSI
[02:42:02] [PASSED] DPI
[02:42:02] [PASSED] Writeback
[02:42:02] [PASSED] SPI
[02:42:02] [PASSED] USB
[02:42:02] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[02:42:02] =========== [PASSED] drm_connector_dynamic_init ============
[02:42:02] ==== drm_connector_dynamic_register_early (4 subtests) =====
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[02:42:02] ====== [PASSED] drm_connector_dynamic_register_early =======
[02:42:02] ======= drm_connector_dynamic_register (7 subtests) ========
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[02:42:02] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[02:42:02] ========= [PASSED] drm_connector_dynamic_register ==========
[02:42:02] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[02:42:02] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[02:42:02] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[02:42:02] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[02:42:02] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[02:42:02] ========== drm_test_get_tv_mode_from_name_valid  ===========
[02:42:02] [PASSED] NTSC
[02:42:02] [PASSED] NTSC-443
[02:42:02] [PASSED] NTSC-J
[02:42:02] [PASSED] PAL
[02:42:02] [PASSED] PAL-M
[02:42:02] [PASSED] PAL-N
[02:42:02] [PASSED] SECAM
[02:42:02] [PASSED] Mono
[02:42:02] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[02:42:02] [PASSED] drm_test_get_tv_mode_from_name_truncated
[02:42:02] ============ [PASSED] drm_get_tv_mode_from_name ============
[02:42:02] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[02:42:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[02:42:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[02:42:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[02:42:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[02:42:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[02:42:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[02:42:02] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[02:42:02] [PASSED] VIC 96
[02:42:02] [PASSED] VIC 97
[02:42:02] [PASSED] VIC 101
[02:42:02] [PASSED] VIC 102
[02:42:02] [PASSED] VIC 106
[02:42:02] [PASSED] VIC 107
[02:42:02] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[02:42:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[02:42:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[02:42:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[02:42:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[02:42:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[02:42:02] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[02:42:02] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[02:42:02] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[02:42:02] [PASSED] Automatic
[02:42:02] [PASSED] Full
[02:42:02] [PASSED] Limited 16:235
[02:42:02] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[02:42:02] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[02:42:02] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[02:42:02] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[02:42:02] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[02:42:02] [PASSED] RGB
[02:42:02] [PASSED] YUV 4:2:0
[02:42:02] [PASSED] YUV 4:2:2
[02:42:02] [PASSED] YUV 4:4:4
[02:42:02] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[02:42:02] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[02:42:02] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[02:42:02] ============= drm_damage_helper (21 subtests) ==============
[02:42:02] [PASSED] drm_test_damage_iter_no_damage
[02:42:02] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[02:42:02] [PASSED] drm_test_damage_iter_no_damage_src_moved
[02:42:02] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[02:42:02] [PASSED] drm_test_damage_iter_no_damage_not_visible
[02:42:02] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[02:42:02] [PASSED] drm_test_damage_iter_no_damage_no_fb
[02:42:02] [PASSED] drm_test_damage_iter_simple_damage
[02:42:02] [PASSED] drm_test_damage_iter_single_damage
[02:42:02] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[02:42:02] [PASSED] drm_test_damage_iter_single_damage_outside_src
[02:42:02] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[02:42:02] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[02:42:02] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[02:42:02] [PASSED] drm_test_damage_iter_single_damage_src_moved
[02:42:02] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[02:42:02] [PASSED] drm_test_damage_iter_damage
[02:42:02] [PASSED] drm_test_damage_iter_damage_one_intersect
[02:42:02] [PASSED] drm_test_damage_iter_damage_one_outside
[02:42:02] [PASSED] drm_test_damage_iter_damage_src_moved
[02:42:02] [PASSED] drm_test_damage_iter_damage_not_visible
[02:42:02] ================ [PASSED] drm_damage_helper ================
[02:42:02] ============== drm_dp_mst_helper (3 subtests) ==============
[02:42:02] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[02:42:02] [PASSED] Clock 154000 BPP 30 DSC disabled
[02:42:02] [PASSED] Clock 234000 BPP 30 DSC disabled
[02:42:02] [PASSED] Clock 297000 BPP 24 DSC disabled
[02:42:02] [PASSED] Clock 332880 BPP 24 DSC enabled
[02:42:02] [PASSED] Clock 324540 BPP 24 DSC enabled
[02:42:02] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[02:42:02] ============== drm_test_dp_mst_calc_pbn_div  ===============
[02:42:02] [PASSED] Link rate 2000000 lane count 4
[02:42:02] [PASSED] Link rate 2000000 lane count 2
[02:42:02] [PASSED] Link rate 2000000 lane count 1
[02:42:02] [PASSED] Link rate 1350000 lane count 4
[02:42:02] [PASSED] Link rate 1350000 lane count 2
[02:42:02] [PASSED] Link rate 1350000 lane count 1
[02:42:02] [PASSED] Link rate 1000000 lane count 4
[02:42:02] [PASSED] Link rate 1000000 lane count 2
[02:42:02] [PASSED] Link rate 1000000 lane count 1
[02:42:02] [PASSED] Link rate 810000 lane count 4
[02:42:02] [PASSED] Link rate 810000 lane count 2
[02:42:02] [PASSED] Link rate 810000 lane count 1
[02:42:02] [PASSED] Link rate 540000 lane count 4
[02:42:02] [PASSED] Link rate 540000 lane count 2
[02:42:02] [PASSED] Link rate 540000 lane count 1
[02:42:02] [PASSED] Link rate 270000 lane count 4
[02:42:02] [PASSED] Link rate 270000 lane count 2
[02:42:02] [PASSED] Link rate 270000 lane count 1
[02:42:02] [PASSED] Link rate 162000 lane count 4
[02:42:02] [PASSED] Link rate 162000 lane count 2
[02:42:02] [PASSED] Link rate 162000 lane count 1
[02:42:02] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[02:42:02] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[02:42:02] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[02:42:02] [PASSED] DP_POWER_UP_PHY with port number
[02:42:02] [PASSED] DP_POWER_DOWN_PHY with port number
[02:42:02] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[02:42:02] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[02:42:02] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[02:42:02] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[02:42:02] [PASSED] DP_QUERY_PAYLOAD with port number
[02:42:02] [PASSED] DP_QUERY_PAYLOAD with VCPI
[02:42:02] [PASSED] DP_REMOTE_DPCD_READ with port number
[02:42:02] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[02:42:02] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[02:42:02] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[02:42:02] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[02:42:02] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[02:42:02] [PASSED] DP_REMOTE_I2C_READ with port number
[02:42:02] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[02:42:02] [PASSED] DP_REMOTE_I2C_READ with transactions array
[02:42:02] [PASSED] DP_REMOTE_I2C_WRITE with port number
[02:42:02] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[02:42:02] [PASSED] DP_REMOTE_I2C_WRITE with data array
[02:42:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[02:42:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[02:42:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[02:42:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[02:42:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[02:42:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[02:42:02] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[02:42:02] ================ [PASSED] drm_dp_mst_helper ================
[02:42:02] ================== drm_exec (7 subtests) ===================
[02:42:02] [PASSED] sanitycheck
[02:42:02] [PASSED] test_lock
[02:42:02] [PASSED] test_lock_unlock
[02:42:02] [PASSED] test_duplicates
[02:42:02] [PASSED] test_prepare
[02:42:02] [PASSED] test_prepare_array
[02:42:02] [PASSED] test_multiple_loops
[02:42:02] ==================== [PASSED] drm_exec =====================
[02:42:02] =========== drm_format_helper_test (17 subtests) ===========
[02:42:02] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[02:42:02] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[02:42:02] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[02:42:02] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[02:42:02] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[02:42:02] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[02:42:02] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[02:42:02] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[02:42:02] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[02:42:02] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[02:42:02] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[02:42:02] ============== drm_test_fb_xrgb8888_to_mono  ===============
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[02:42:02] ==================== drm_test_fb_swab  =====================
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ================ [PASSED] drm_test_fb_swab =================
[02:42:02] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[02:42:02] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[02:42:02] [PASSED] single_pixel_source_buffer
[02:42:02] [PASSED] single_pixel_clip_rectangle
[02:42:02] [PASSED] well_known_colors
[02:42:02] [PASSED] destination_pitch
[02:42:02] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[02:42:02] ================= drm_test_fb_clip_offset  =================
[02:42:02] [PASSED] pass through
[02:42:02] [PASSED] horizontal offset
[02:42:02] [PASSED] vertical offset
[02:42:02] [PASSED] horizontal and vertical offset
[02:42:02] [PASSED] horizontal offset (custom pitch)
[02:42:02] [PASSED] vertical offset (custom pitch)
[02:42:02] [PASSED] horizontal and vertical offset (custom pitch)
[02:42:02] ============= [PASSED] drm_test_fb_clip_offset =============
[02:42:02] =================== drm_test_fb_memcpy  ====================
[02:42:02] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[02:42:02] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[02:42:02] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[02:42:02] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[02:42:02] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[02:42:02] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[02:42:02] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[02:42:02] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[02:42:02] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[02:42:02] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[02:42:02] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[02:42:02] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[02:42:02] =============== [PASSED] drm_test_fb_memcpy ================
[02:42:02] ============= [PASSED] drm_format_helper_test ==============
[02:42:02] ================= drm_format (18 subtests) =================
[02:42:02] [PASSED] drm_test_format_block_width_invalid
[02:42:02] [PASSED] drm_test_format_block_width_one_plane
[02:42:02] [PASSED] drm_test_format_block_width_two_plane
[02:42:02] [PASSED] drm_test_format_block_width_three_plane
[02:42:02] [PASSED] drm_test_format_block_width_tiled
[02:42:02] [PASSED] drm_test_format_block_height_invalid
[02:42:02] [PASSED] drm_test_format_block_height_one_plane
[02:42:02] [PASSED] drm_test_format_block_height_two_plane
[02:42:02] [PASSED] drm_test_format_block_height_three_plane
[02:42:02] [PASSED] drm_test_format_block_height_tiled
[02:42:02] [PASSED] drm_test_format_min_pitch_invalid
[02:42:02] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[02:42:02] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[02:42:02] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[02:42:02] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[02:42:02] [PASSED] drm_test_format_min_pitch_two_plane
[02:42:02] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[02:42:02] [PASSED] drm_test_format_min_pitch_tiled
[02:42:02] =================== [PASSED] drm_format ====================
[02:42:02] ============== drm_framebuffer (10 subtests) ===============
[02:42:02] ========== drm_test_framebuffer_check_src_coords  ==========
[02:42:02] [PASSED] Success: source fits into fb
[02:42:02] [PASSED] Fail: overflowing fb with x-axis coordinate
[02:42:02] [PASSED] Fail: overflowing fb with y-axis coordinate
[02:42:02] [PASSED] Fail: overflowing fb with source width
[02:42:02] [PASSED] Fail: overflowing fb with source height
[02:42:02] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[02:42:02] [PASSED] drm_test_framebuffer_cleanup
[02:42:02] =============== drm_test_framebuffer_create  ===============
[02:42:02] [PASSED] ABGR8888 normal sizes
[02:42:02] [PASSED] ABGR8888 max sizes
[02:42:02] [PASSED] ABGR8888 pitch greater than min required
[02:42:02] [PASSED] ABGR8888 pitch less than min required
[02:42:02] [PASSED] ABGR8888 Invalid width
[02:42:02] [PASSED] ABGR8888 Invalid buffer handle
[02:42:02] [PASSED] No pixel format
[02:42:02] [PASSED] ABGR8888 Width 0
[02:42:02] [PASSED] ABGR8888 Height 0
[02:42:02] [PASSED] ABGR8888 Out of bound height * pitch combination
[02:42:02] [PASSED] ABGR8888 Large buffer offset
[02:42:02] [PASSED] ABGR8888 Buffer offset for inexistent plane
[02:42:02] [PASSED] ABGR8888 Invalid flag
[02:42:02] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[02:42:02] [PASSED] ABGR8888 Valid buffer modifier
[02:42:02] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[02:42:02] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[02:42:02] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[02:42:02] [PASSED] NV12 Normal sizes
[02:42:02] [PASSED] NV12 Max sizes
[02:42:02] [PASSED] NV12 Invalid pitch
[02:42:02] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[02:42:02] [PASSED] NV12 different  modifier per-plane
[02:42:02] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[02:42:02] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[02:42:02] [PASSED] NV12 Modifier for inexistent plane
[02:42:02] [PASSED] NV12 Handle for inexistent plane
[02:42:02] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[02:42:02] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[02:42:02] [PASSED] YVU420 Normal sizes
[02:42:02] [PASSED] YVU420 Max sizes
[02:42:02] [PASSED] YVU420 Invalid pitch
[02:42:02] [PASSED] YVU420 Different pitches
[02:42:02] [PASSED] YVU420 Different buffer offsets/pitches
[02:42:02] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[02:42:02] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[02:42:02] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[02:42:02] [PASSED] YVU420 Valid modifier
[02:42:02] [PASSED] YVU420 Different modifiers per plane
[02:42:02] [PASSED] YVU420 Modifier for inexistent plane
[02:42:02] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[02:42:02] [PASSED] X0L2 Normal sizes
[02:42:02] [PASSED] X0L2 Max sizes
[02:42:02] [PASSED] X0L2 Invalid pitch
[02:42:02] [PASSED] X0L2 Pitch greater than minimum required
[02:42:02] [PASSED] X0L2 Handle for inexistent plane
[02:42:02] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[02:42:02] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[02:42:02] [PASSED] X0L2 Valid modifier
[02:42:02] [PASSED] X0L2 Modifier for inexistent plane
[02:42:02] =========== [PASSED] drm_test_framebuffer_create ===========
[02:42:02] [PASSED] drm_test_framebuffer_free
[02:42:02] [PASSED] drm_test_framebuffer_init
[02:42:02] [PASSED] drm_test_framebuffer_init_bad_format
[02:42:02] [PASSED] drm_test_framebuffer_init_dev_mismatch
[02:42:02] [PASSED] drm_test_framebuffer_lookup
[02:42:02] [PASSED] drm_test_framebuffer_lookup_inexistent
[02:42:02] [PASSED] drm_test_framebuffer_modifiers_not_supported
[02:42:02] ================= [PASSED] drm_framebuffer =================
[02:42:02] ================ drm_gem_shmem (8 subtests) ================
[02:42:02] [PASSED] drm_gem_shmem_test_obj_create
[02:42:02] [PASSED] drm_gem_shmem_test_obj_create_private
[02:42:02] [PASSED] drm_gem_shmem_test_pin_pages
[02:42:02] [PASSED] drm_gem_shmem_test_vmap
[02:42:02] [PASSED] drm_gem_shmem_test_get_sg_table
[02:42:02] [PASSED] drm_gem_shmem_test_get_pages_sgt
[02:42:02] [PASSED] drm_gem_shmem_test_madvise
[02:42:02] [PASSED] drm_gem_shmem_test_purge
[02:42:02] ================== [PASSED] drm_gem_shmem ==================
[02:42:02] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[02:42:02] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[02:42:02] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[02:42:02] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[02:42:02] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[02:42:02] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[02:42:02] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[02:42:02] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[02:42:02] [PASSED] Automatic
[02:42:02] [PASSED] Full
[02:42:02] [PASSED] Limited 16:235
[02:42:02] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[02:42:02] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[02:42:02] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[02:42:02] [PASSED] drm_test_check_disable_connector
[02:42:02] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[02:42:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[02:42:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[02:42:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[02:42:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[02:42:02] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[02:42:02] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[02:42:02] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[02:42:02] [PASSED] drm_test_check_output_bpc_dvi
[02:42:02] [PASSED] drm_test_check_output_bpc_format_vic_1
[02:42:02] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[02:42:02] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[02:42:02] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[02:42:02] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[02:42:02] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[02:42:02] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[02:42:02] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[02:42:02] ============ drm_test_check_hdmi_color_format  =============
[02:42:02] [PASSED] AUTO -> RGB
[02:42:02] [PASSED] YCBCR422 -> YUV422
[02:42:02] [PASSED] YCBCR420 -> YUV420
[02:42:02] [PASSED] YCBCR444 -> YUV444
[02:42:02] [PASSED] RGB -> RGB
[02:42:02] ======== [PASSED] drm_test_check_hdmi_color_format =========
[02:42:02] ======== drm_test_check_hdmi_color_format_420_only  ========
[02:42:02] [PASSED] RGB should fail
[02:42:02] [PASSED] YUV444 should fail
[02:42:02] [PASSED] YUV422 should fail
[02:42:02] [PASSED] YUV420 should work
[02:42:02] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[02:42:02] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[02:42:02] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[02:42:02] [PASSED] drm_test_check_broadcast_rgb_value
[02:42:02] [PASSED] drm_test_check_bpc_8_value
[02:42:02] [PASSED] drm_test_check_bpc_10_value
[02:42:02] [PASSED] drm_test_check_bpc_12_value
[02:42:02] [PASSED] drm_test_check_format_value
[02:42:02] [PASSED] drm_test_check_tmds_char_value
[02:42:02] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[02:42:02] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[02:42:02] [PASSED] drm_test_check_mode_valid
[02:42:02] [PASSED] drm_test_check_mode_valid_reject
[02:42:02] [PASSED] drm_test_check_mode_valid_reject_rate
[02:42:02] [PASSED] drm_test_check_mode_valid_reject_max_clock
[02:42:02] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[02:42:02] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[02:42:02] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[02:42:02] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[02:42:02] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[02:42:02] [PASSED] drm_test_check_infoframes
[02:42:02] [PASSED] drm_test_check_reject_avi_infoframe
[02:42:02] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[02:42:02] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[02:42:02] [PASSED] drm_test_check_reject_audio_infoframe
[02:42:02] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[02:42:02] ================= drm_managed (2 subtests) =================
[02:42:02] [PASSED] drm_test_managed_release_action
[02:42:02] [PASSED] drm_test_managed_run_action
[02:42:02] =================== [PASSED] drm_managed ===================
[02:42:02] =================== drm_mm (6 subtests) ====================
[02:42:02] [PASSED] drm_test_mm_init
[02:42:02] [PASSED] drm_test_mm_debug
[02:42:02] [PASSED] drm_test_mm_align32
[02:42:02] [PASSED] drm_test_mm_align64
[02:42:02] [PASSED] drm_test_mm_lowest
[02:42:02] [PASSED] drm_test_mm_highest
[02:42:02] ===================== [PASSED] drm_mm ======================
[02:42:02] ============= drm_modes_analog_tv (5 subtests) =============
[02:42:02] [PASSED] drm_test_modes_analog_tv_mono_576i
[02:42:02] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[02:42:02] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[02:42:02] [PASSED] drm_test_modes_analog_tv_pal_576i
[02:42:02] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[02:42:02] =============== [PASSED] drm_modes_analog_tv ===============
[02:42:02] ============== drm_panic_helper (3 subtests) ===============
[02:42:02] ============= drm_test_panic_screen_user_map  ==============
[02:42:02] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[02:42:02] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[02:42:02] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[02:42:02] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[02:42:02] ========= [PASSED] drm_test_panic_screen_user_map ==========
[02:42:02] ============= drm_test_panic_screen_user_page  =============
[02:42:02] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[02:42:02] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[02:42:02] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[02:42:02] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[02:42:02] ========= [PASSED] drm_test_panic_screen_user_page =========
[02:42:02] ========== drm_test_panic_screen_user_set_pixel  ===========
[02:42:02] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[02:42:02] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[02:42:02] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[02:42:02] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[02:42:02] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[02:42:02] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[02:42:02] ================ [PASSED] drm_panic_helper =================
[02:42:02] ============== drm_plane_helper (2 subtests) ===============
[02:42:02] =============== drm_test_check_plane_state  ================
[02:42:02] [PASSED] clipping_simple
[02:42:02] [PASSED] clipping_rotate_reflect
[02:42:02] [PASSED] positioning_simple
[02:42:02] [PASSED] upscaling
[02:42:02] [PASSED] downscaling
[02:42:02] [PASSED] rounding1
[02:42:02] [PASSED] rounding2
[02:42:02] [PASSED] rounding3
[02:42:02] [PASSED] rounding4
[02:42:02] =========== [PASSED] drm_test_check_plane_state ============
[02:42:02] =========== drm_test_check_invalid_plane_state  ============
[02:42:02] [PASSED] positioning_invalid
[02:42:02] [PASSED] upscaling_invalid
[02:42:02] [PASSED] downscaling_invalid
[02:42:02] ======= [PASSED] drm_test_check_invalid_plane_state ========
[02:42:02] ================ [PASSED] drm_plane_helper =================
[02:42:02] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[02:42:02] ====== drm_test_connector_helper_tv_get_modes_check  =======
[02:42:02] [PASSED] None
[02:42:02] [PASSED] PAL
[02:42:02] [PASSED] NTSC
[02:42:02] [PASSED] Both, NTSC Default
[02:42:02] [PASSED] Both, PAL Default
[02:42:02] [PASSED] Both, NTSC Default, with PAL on command-line
[02:42:02] [PASSED] Both, PAL Default, with NTSC on command-line
[02:42:02] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[02:42:02] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[02:42:02] ================== drm_rect (9 subtests) ===================
[02:42:02] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[02:42:02] [PASSED] drm_test_rect_clip_scaled_not_clipped
[02:42:02] [PASSED] drm_test_rect_clip_scaled_clipped
[02:42:02] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[02:42:02] ================= drm_test_rect_intersect  =================
[02:42:02] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[02:42:02] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[02:42:02] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[02:42:02] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[02:42:02] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[02:42:02] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[02:42:02] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[02:42:02] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[02:42:02] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[02:42:02] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[02:42:02] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[02:42:02] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[02:42:02] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[02:42:02] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[02:42:02] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[02:42:02] ============= [PASSED] drm_test_rect_intersect =============
[02:42:02] ================ drm_test_rect_calc_hscale  ================
[02:42:02] [PASSED] normal use
[02:42:02] [PASSED] out of max range
[02:42:02] [PASSED] out of min range
[02:42:02] [PASSED] zero dst
[02:42:02] [PASSED] negative src
[02:42:02] [PASSED] negative dst
[02:42:02] ============ [PASSED] drm_test_rect_calc_hscale ============
[02:42:02] ================ drm_test_rect_calc_vscale  ================
[02:42:02] [PASSED] normal use
[02:42:02] [PASSED] out of max range
[02:42:02] [PASSED] out of min range
[02:42:02] [PASSED] zero dst
[02:42:02] [PASSED] negative src
[02:42:02] [PASSED] negative dst
[02:42:02] ============ [PASSED] drm_test_rect_calc_vscale ============
[02:42:02] ================== drm_test_rect_rotate  ===================
[02:42:02] [PASSED] reflect-x
[02:42:02] [PASSED] reflect-y
[02:42:02] [PASSED] rotate-0
[02:42:02] [PASSED] rotate-90
[02:42:02] [PASSED] rotate-180
[02:42:02] [PASSED] rotate-270
[02:42:02] ============== [PASSED] drm_test_rect_rotate ===============
[02:42:02] ================ drm_test_rect_rotate_inv  =================
[02:42:02] [PASSED] reflect-x
[02:42:02] [PASSED] reflect-y
[02:42:02] [PASSED] rotate-0
[02:42:02] [PASSED] rotate-90
[02:42:02] [PASSED] rotate-180
[02:42:02] [PASSED] rotate-270
[02:42:02] ============ [PASSED] drm_test_rect_rotate_inv =============
[02:42:02] ==================== [PASSED] drm_rect =====================
[02:42:02] ============ drm_sysfb_modeset_test (1 subtest) ============
[02:42:02] ============ drm_test_sysfb_build_fourcc_list  =============
[02:42:02] [PASSED] no native formats
[02:42:02] [PASSED] XRGB8888 as native format
[02:42:02] [PASSED] remove duplicates
[02:42:02] [PASSED] convert alpha formats
[02:42:02] [PASSED] random formats
[02:42:02] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[02:42:02] ============= [PASSED] drm_sysfb_modeset_test ==============
[02:42:02] ================== drm_fixp (2 subtests) ===================
[02:42:02] [PASSED] drm_test_int2fixp
[02:42:02] [PASSED] drm_test_sm2fixp
[02:42:02] ==================== [PASSED] drm_fixp =====================
[02:42:02] ============================================================
[02:42:02] Testing complete. Ran 667 tests: passed: 667
[02:42:02] Elapsed time: 28.006s total, 2.515s configuring, 25.075s building, 0.409s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[02:42:02] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:42:05] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:42:15] Starting KUnit Kernel (1/1)...
[02:42:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:42:15] ================= ttm_device (5 subtests) ==================
[02:42:15] [PASSED] ttm_device_init_basic
[02:42:15] [PASSED] ttm_device_init_multiple
[02:42:15] [PASSED] ttm_device_fini_basic
[02:42:15] [PASSED] ttm_device_init_no_vma_man
[02:42:15] ================== ttm_device_init_pools  ==================
[02:42:15] [PASSED] No DMA allocations, no DMA32 required
[02:42:15] [PASSED] DMA allocations, DMA32 required
[02:42:15] [PASSED] No DMA allocations, DMA32 required
[02:42:15] [PASSED] DMA allocations, no DMA32 required
[02:42:15] ============== [PASSED] ttm_device_init_pools ==============
[02:42:15] =================== [PASSED] ttm_device ====================
[02:42:15] ================== ttm_pool (8 subtests) ===================
[02:42:15] ================== ttm_pool_alloc_basic  ===================
[02:42:15] [PASSED] One page
[02:42:15] [PASSED] More than one page
[02:42:15] [PASSED] Above the allocation limit
[02:42:15] [PASSED] One page, with coherent DMA mappings enabled
[02:42:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[02:42:15] ============== [PASSED] ttm_pool_alloc_basic ===============
[02:42:15] ============== ttm_pool_alloc_basic_dma_addr  ==============
[02:42:15] [PASSED] One page
[02:42:15] [PASSED] More than one page
[02:42:15] [PASSED] Above the allocation limit
[02:42:15] [PASSED] One page, with coherent DMA mappings enabled
[02:42:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[02:42:15] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[02:42:15] [PASSED] ttm_pool_alloc_order_caching_match
[02:42:15] [PASSED] ttm_pool_alloc_caching_mismatch
[02:42:15] [PASSED] ttm_pool_alloc_order_mismatch
[02:42:15] [PASSED] ttm_pool_free_dma_alloc
[02:42:15] [PASSED] ttm_pool_free_no_dma_alloc
[02:42:15] [PASSED] ttm_pool_fini_basic
[02:42:15] ==================== [PASSED] ttm_pool =====================
[02:42:15] ================ ttm_resource (8 subtests) =================
[02:42:15] ================= ttm_resource_init_basic  =================
[02:42:15] [PASSED] Init resource in TTM_PL_SYSTEM
[02:42:15] [PASSED] Init resource in TTM_PL_VRAM
[02:42:15] [PASSED] Init resource in a private placement
[02:42:15] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[02:42:15] ============= [PASSED] ttm_resource_init_basic =============
[02:42:15] [PASSED] ttm_resource_init_pinned
[02:42:15] [PASSED] ttm_resource_fini_basic
[02:42:15] [PASSED] ttm_resource_manager_init_basic
[02:42:15] [PASSED] ttm_resource_manager_usage_basic
[02:42:15] [PASSED] ttm_resource_manager_set_used_basic
[02:42:15] [PASSED] ttm_sys_man_alloc_basic
[02:42:15] [PASSED] ttm_sys_man_free_basic
[02:42:15] ================== [PASSED] ttm_resource ===================
[02:42:15] =================== ttm_tt (15 subtests) ===================
[02:42:15] ==================== ttm_tt_init_basic  ====================
[02:42:15] [PASSED] Page-aligned size
[02:42:15] [PASSED] Extra pages requested
[02:42:15] ================ [PASSED] ttm_tt_init_basic ================
[02:42:15] [PASSED] ttm_tt_init_misaligned
[02:42:15] [PASSED] ttm_tt_fini_basic
[02:42:15] [PASSED] ttm_tt_fini_sg
[02:42:15] [PASSED] ttm_tt_fini_shmem
[02:42:15] [PASSED] ttm_tt_create_basic
[02:42:15] [PASSED] ttm_tt_create_invalid_bo_type
[02:42:15] [PASSED] ttm_tt_create_ttm_exists
[02:42:15] [PASSED] ttm_tt_create_failed
[02:42:15] [PASSED] ttm_tt_destroy_basic
[02:42:15] [PASSED] ttm_tt_populate_null_ttm
[02:42:15] [PASSED] ttm_tt_populate_populated_ttm
[02:42:15] [PASSED] ttm_tt_unpopulate_basic
[02:42:15] [PASSED] ttm_tt_unpopulate_empty_ttm
[02:42:15] [PASSED] ttm_tt_swapin_basic
[02:42:15] ===================== [PASSED] ttm_tt ======================
[02:42:15] =================== ttm_bo (14 subtests) ===================
[02:42:15] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[02:42:15] [PASSED] Cannot be interrupted and sleeps
[02:42:15] [PASSED] Cannot be interrupted, locks straight away
[02:42:15] [PASSED] Can be interrupted, sleeps
[02:42:15] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[02:42:15] [PASSED] ttm_bo_reserve_locked_no_sleep
[02:42:15] [PASSED] ttm_bo_reserve_no_wait_ticket
[02:42:15] [PASSED] ttm_bo_reserve_double_resv
[02:42:15] [PASSED] ttm_bo_reserve_interrupted
[02:42:15] [PASSED] ttm_bo_reserve_deadlock
[02:42:15] [PASSED] ttm_bo_unreserve_basic
[02:42:15] [PASSED] ttm_bo_unreserve_pinned
[02:42:15] [PASSED] ttm_bo_unreserve_bulk
[02:42:15] [PASSED] ttm_bo_fini_basic
[02:42:15] [PASSED] ttm_bo_fini_shared_resv
[02:42:15] [PASSED] ttm_bo_pin_basic
[02:42:15] [PASSED] ttm_bo_pin_unpin_resource
[02:42:15] [PASSED] ttm_bo_multiple_pin_one_unpin
[02:42:15] ===================== [PASSED] ttm_bo ======================
[02:42:15] ============== ttm_bo_validate (22 subtests) ===============
[02:42:15] ============== ttm_bo_init_reserved_sys_man  ===============
[02:42:15] [PASSED] Buffer object for userspace
[02:42:15] [PASSED] Kernel buffer object
[02:42:15] [PASSED] Shared buffer object
[02:42:15] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[02:42:15] ============== ttm_bo_init_reserved_mock_man  ==============
[02:42:15] [PASSED] Buffer object for userspace
[02:42:15] [PASSED] Kernel buffer object
[02:42:15] [PASSED] Shared buffer object
[02:42:15] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[02:42:15] [PASSED] ttm_bo_init_reserved_resv
[02:42:15] ================== ttm_bo_validate_basic  ==================
[02:42:15] [PASSED] Buffer object for userspace
[02:42:15] [PASSED] Kernel buffer object
[02:42:15] [PASSED] Shared buffer object
[02:42:15] ============== [PASSED] ttm_bo_validate_basic ==============
[02:42:15] [PASSED] ttm_bo_validate_invalid_placement
[02:42:15] ============= ttm_bo_validate_same_placement  ==============
[02:42:15] [PASSED] System manager
[02:42:15] [PASSED] VRAM manager
[02:42:15] ========= [PASSED] ttm_bo_validate_same_placement ==========
[02:42:15] [PASSED] ttm_bo_validate_failed_alloc
[02:42:15] [PASSED] ttm_bo_validate_pinned
[02:42:15] [PASSED] ttm_bo_validate_busy_placement
[02:42:15] ================ ttm_bo_validate_multihop  =================
[02:42:15] [PASSED] Buffer object for userspace
[02:42:15] [PASSED] Kernel buffer object
[02:42:15] [PASSED] Shared buffer object
[02:42:15] ============ [PASSED] ttm_bo_validate_multihop =============
[02:42:15] ========== ttm_bo_validate_no_placement_signaled  ==========
[02:42:15] [PASSED] Buffer object in system domain, no page vector
[02:42:15] [PASSED] Buffer object in system domain with an existing page vector
[02:42:15] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[02:42:15] ======== ttm_bo_validate_no_placement_not_signaled  ========
[02:42:15] [PASSED] Buffer object for userspace
[02:42:15] [PASSED] Kernel buffer object
[02:42:15] [PASSED] Shared buffer object
[02:42:15] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[02:42:15] [PASSED] ttm_bo_validate_move_fence_signaled
[02:42:15] ========= ttm_bo_validate_move_fence_not_signaled  =========
[02:42:15] [PASSED] Waits for GPU
[02:42:15] [PASSED] Tries to lock straight away
[02:42:15] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[02:42:15] [PASSED] ttm_bo_validate_swapout
[02:42:15] [PASSED] ttm_bo_validate_happy_evict
[02:42:15] [PASSED] ttm_bo_validate_all_pinned_evict
[02:42:15] [PASSED] ttm_bo_validate_allowed_only_evict
[02:42:15] [PASSED] ttm_bo_validate_deleted_evict
[02:42:15] [PASSED] ttm_bo_validate_busy_domain_evict
[02:42:15] [PASSED] ttm_bo_validate_evict_gutting
[02:42:15] [PASSED] ttm_bo_validate_recrusive_evict
[02:42:15] ================= [PASSED] ttm_bo_validate =================
[02:42:15] ============================================================
[02:42:15] Testing complete. Ran 102 tests: passed: 102
[02:42:15] Elapsed time: 12.918s total, 2.527s configuring, 10.126s building, 0.222s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[02:42:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:42:18] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:42:27] Starting KUnit Kernel (1/1)...
[02:42:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:42:27] =============== dma-buf-fence (12 subtests) ================
[02:42:27] [PASSED] test_sanitycheck
[02:42:27] [PASSED] test_signaling
[02:42:27] [PASSED] test_add_callback
[02:42:27] [PASSED] test_late_add_callback
[02:42:27] [PASSED] test_rm_callback
[02:42:27] [PASSED] test_late_rm_callback
[02:42:27] [PASSED] test_status
[02:42:27] [PASSED] test_error
[02:42:27] [PASSED] test_wait
[02:42:27] [PASSED] test_wait_timeout
[02:42:27] [PASSED] test_stub
[02:42:27] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[02:42:27] ================== [PASSED] dma-buf-fence ==================
[02:42:27] ============ dma-buf-fence-chain (11 subtests) =============
[02:42:27] [PASSED] test_sanitycheck
[02:42:27] [PASSED] test_find_seqno
[02:42:27] [PASSED] test_find_signaled
[02:42:27] [PASSED] test_find_out_of_order
[02:42:32] [PASSED] test_find_gap
[02:42:32] [PASSED] test_find_race
[02:42:32] [PASSED] test_signal_forward
[02:42:32] [PASSED] test_signal_backward
[02:42:32] [PASSED] test_wait_forward
[02:42:32] [PASSED] test_wait_backward
[02:42:32] [PASSED] test_wait_random
[02:42:32] =============== [PASSED] dma-buf-fence-chain ===============
[02:42:32] ============ dma-buf-fence-unwrap (11 subtests) ============
[02:42:32] [PASSED] test_sanitycheck
[02:42:32] [PASSED] test_unwrap_array
[02:42:32] [PASSED] test_unwrap_chain
[02:42:32] [PASSED] test_unwrap_chain_array
[02:42:32] [PASSED] test_unwrap_merge
[02:42:32] [PASSED] test_unwrap_merge_duplicate
[02:42:32] [PASSED] test_unwrap_merge_seqno
[02:42:32] [PASSED] test_unwrap_merge_order
[02:42:32] [PASSED] test_unwrap_merge_complex
[02:42:32] [PASSED] test_unwrap_merge_complex_seqno
[02:42:32] [PASSED] test_dedup_empty
[02:42:32] ============== [PASSED] dma-buf-fence-unwrap ===============
[02:42:32] ================ dma-buf-resv (5 subtests) =================
[02:42:32] [PASSED] test_sanitycheck
[02:42:32] ===================== test_signaling  ======================
[02:42:32] [PASSED] kernel
[02:42:32] [PASSED] write
[02:42:32] [PASSED] read
[02:42:32] [PASSED] bookkeep
[02:42:32] ================= [PASSED] test_signaling ==================
[02:42:32] ====================== test_for_each  ======================
[02:42:32] [PASSED] kernel
[02:42:32] [PASSED] write
[02:42:32] [PASSED] read
[02:42:32] [PASSED] bookkeep
[02:42:32] ================== [PASSED] test_for_each ==================
[02:42:32] ================= test_for_each_unlocked  ==================
[02:42:32] [PASSED] kernel
[02:42:32] [PASSED] write
[02:42:32] [PASSED] read
[02:42:32] [PASSED] bookkeep
[02:42:32] ============= [PASSED] test_for_each_unlocked ==============
[02:42:32] ===================== test_get_fences  =====================
[02:42:32] [PASSED] kernel
[02:42:32] [PASSED] write
[02:42:32] [PASSED] read
[02:42:32] [PASSED] bookkeep
[02:42:32] ================= [PASSED] test_get_fences =================
[02:42:32] ================== [PASSED] dma-buf-resv ===================
[02:42:32] ============================================================
[02:42:32] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[02:42:32] Elapsed time: 16.523s total, 2.442s configuring, 8.759s building, 5.283s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 887 bytes --]

== Series Details ==

Series: drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev5)
URL   : https://patchwork.freedesktop.org/series/170046/
State : success

== Summary ==

CI Bug Log - changes from xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d_BAT -> xe-pw-170046v5_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (15 -> 15)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d -> xe-pw-170046v5

  IGT_9177: 9177
  xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d: 3379b0f74f31bfc3746b692822a7700aeeebe15d
  xe-pw-170046v5: 170046v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/index.html

[-- Attachment #2: Type: text/html, Size: 1435 bytes --]

Re: [PATCH] drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind()

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 5 potential issue(s) to consider:
- [Critical] drm/xe: wrong exec queue in xe_vma_tlb_flush_client() causes NULL deref and race
- [High] drm/xe: missing tile offset when indexing q->tlb_inval in xe_vm_flush_vm_bo_tlb_async()
- [High] drm/xe: xe_bo_trigger_rebind() ignores ctx->no_wait_gpu when queueing async TLB flush
- [High] drm/xe: GFP_KERNEL allocations in xe_vm_flush_vm_bo_tlb_async() under fs_reclaim
- [Medium] drm/xe: xe_bo_move() synchronously and uninterruptibly waits on async TLB flush
--

commit 1eb2e98a6dad350728e769ae239024f455ba2958
Author: Matthew Brost <matthew.brost@intel.com>

drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind()

This commit replaces the synchronous BO idle wait and VMA TLB invalidation in
xe_bo_trigger_rebind() on L2-flush-optimized platforms with asynchronous TLB
invalidation jobs queued via xe_vm_flush_vm_bo_tlb_async(). Each job waits on
the BO's in-flight GPU work and installs its completion fence into the BO's
dma-resv object with DMA_RESV_USAGE_KERNEL.

> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 42a6aa1a2e4a0..0ffe4cc46b3b3 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -809,6 +809,9 @@ static int xe_bo_trigger_rebind(struct xe_device *xe, struct xe_bo *bo,
>  			 */
>  			if (!xe_device_is_l2_flush_optimized(xe))
>  				continue;
> +
> +			if (!xe_vm_flush_vm_bo_tlb_async(vm, bo, vm_bo))
> +				continue;

[Severity: High]
How does calling xe_vm_flush_vm_bo_tlb_async() before the ctx->no_wait_gpu
check interact with non-blocking callers such as the shrinker?

In the shrinker path, xe_shrinker_walk() runs its first pass with
ctx->no_wait_gpu = true (and in direct reclaim where
ttm_bo_shrink_avoid_wait() is true, ctx.no_wait_gpu remains true for the
entire shrinker invocation). For an already-idle purgeable BO in XE_PL_TT,
ttm_bo_shrink_suitable() succeeds because bo->base.resv is signaled, and
xe_bo_shrink() runs:

drivers/gpu/drm/xe/xe_bo.c:xe_bo_shrink() {
	if (xe_tt->purgeable) {
		if (bo->resource->mem_type != XE_PL_SYSTEM)
			lret = xe_bo_move_notify(xe_bo, ctx);
		if (!lret)
			lret = xe_bo_shrink_purge(ctx, bo, scanned);
}

When xe_bo_move_notify() -> xe_bo_trigger_rebind() calls
xe_vm_flush_vm_bo_tlb_async(), it queues an async TLB invalidation job on
gt->tlb_inval.job_wq and installs an unsignaled DMA_RESV_USAGE_KERNEL fence
into bo->ttm.base.resv. Immediately afterward, xe_bo_shrink_purge() calls
ttm_bo_wait_ctx(bo, ctx):

drivers/gpu/drm/xe/xe_bo.c:xe_bo_shrink_purge() {
	if (bo->resource->mem_type != XE_PL_SYSTEM) {
		struct ttm_resource *new_resource;

		lret = ttm_bo_wait_ctx(bo, ctx);
		if (lret)
			return lret;
}

Because ctx->no_wait_gpu is true and bo->ttm.base.resv now contains the
unsignaled flush fence, ttm_bo_wait_ctx() fails with -EBUSY after
drm_gpuvm_bo_evict() and xe_bo_vunmap() have already run. The same -EBUSY
failure can happen in xe_ttm_bo_purge(), or if a subsequent vm_bo on the same
BO falls through to the if (!idle) block in xe_bo_trigger_rebind().

Conversely, if a BO in XE_PL_TT has in-flight GPU work and xe_bo_move() is
called with ctx->no_wait_gpu = true, xe_bo_trigger_rebind() previously
returned -EBUSY at the ctx->no_wait_gpu check, whereas now it succeeds and
xe_bo_move() proceeds to wait unconditionally on DMA_RESV_USAGE_BOOKKEEP.
Should xe_bo_trigger_rebind() skip the async path or honor ctx->no_wait_gpu
before queueing unsignaled fences into the BO's dma-resv?

[Severity: Medium]
Also, on L2-flush-optimized platforms (where !IS_DGFX(xe) is true), does
xe_bo_move() still end up stalling synchronously on the newly queued flush
fences?

When evicting a BO from XE_PL_TT to XE_PL_SYSTEM, xe_bo_move() calls
xe_bo_move_notify(bo, ctx) and then immediately waits on
DMA_RESV_USAGE_BOOKKEEP before checking handle_system_ccs or scheduling a
migration copy:

drivers/gpu/drm/xe/xe_bo.c:xe_bo_move() {
	if (!move_lacks_source && !xe_bo_is_pinned(bo)) {
		ret = xe_bo_move_notify(bo, ctx);
		if (ret)
			goto out;
	}

	if (old_mem_type == XE_PL_TT &&
	    new_mem->mem_type == XE_PL_SYSTEM) {
		long timeout = dma_resv_wait_timeout(ttm_bo->base.resv,
						     DMA_RESV_USAGE_BOOKKEEP,
						     false,
						     MAX_SCHEDULE_TIMEOUT);
}

Because DMA_RESV_USAGE_BOOKKEEP is a superset of DMA_RESV_USAGE_KERNEL, won't
this wait in xe_bo_move() still block the calling thread synchronously (and
uninterruptibly, with intr = false instead of ctx->interruptible) on both all
in-flight GPU work and the async TLB invalidation jobs just queued by
xe_vm_flush_vm_bo_tlb_async()?

> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index dfbabfb19cbba..6c8164fc7c200 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
[ ... ]
> @@ -4582,6 +4583,130 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
>  	return ret;
>  }
>  
> +/*
> + * xe_vma_tlb_flush_client - Queue an async TLB flush for one VMA on one client
> + *
> + * Create and push a TLB invalidation job on the tile migrate (kernel) exec
> + * queue covering @vma's range, depending on @dep (the BO's in-flight GPU work)
> + * so the flush only fires once the GPU is done with the current mapping. The
> + * job's completion fence is installed into @resv as a KERNEL fence so the
> + * subsequent migration waits on the flush. No PTEs are zapped; this only
> + * flushes L2 via the TLB invalidation.
> + */
> +static int xe_vma_tlb_flush_client(struct xe_vm *vm, struct xe_vma *vma,
> +				   struct xe_tile *tile, struct xe_gt *gt,
> +				   struct dma_resv *resv, struct dma_fence *dep,
> +				   int type)
> +{
> +	struct xe_exec_queue *q = xe_migrate_exec_queue(tile->migrate);
> +	struct xe_tlb_inval_job *job;
> +	struct dma_fence *fence;
> +	int err;
> +
> +	job = xe_tlb_inval_job_create(q, &gt->tlb_inval,
> +				      q->tlb_inval[type].dep_scheduler, vm,
> +				      xe_vma_start(vma), xe_vma_end(vma), type);
> +	if (IS_ERR(job))
> +		return PTR_ERR(job);
> +
> +	err = xe_tlb_inval_job_alloc_dep(job);
> +	if (err)
> +		goto out_put;
> +
> +	err = dma_resv_reserve_fences(resv, 1);
> +	if (err)
> +		goto out_put;
> +
> +	/* Cannot fail; takes its own ref on @dep and returns a referenced fence. */
> +	fence = xe_tlb_inval_job_push(job, dep);

[Severity: Critical]
Is xe_migrate_exec_queue(tile->migrate) the right exec queue to pass to
xe_tlb_inval_job_create() and xe_tlb_inval_job_push() here, or should this be
using xe_cpu_bind_queue(vm->xe->cpu_bind)?

Inside xe_tlb_inval_job_push(), job arming, pushing, and updating last_fence
are serialized by xe_cpu_bind_job_lock():

drivers/gpu/drm/xe/xe_tlb_inval_job.c:xe_tlb_inval_job_push() {
	...
	xe_cpu_bind_job_lock(cpu_bind, job->q);
	...
	drm_sched_job_arm(&job->dep.drm);
	dma_fence_get(&job->dep.drm.s_fence->finished);
	drm_sched_entity_push_job(&job->dep.drm);

	/* Let the upper layers fish this out */
	xe_exec_queue_tlb_inval_last_fence_set(job->q, job->vm,
					       &job->dep.drm.s_fence->finished,
					       job->idx);

	xe_cpu_bind_job_unlock(cpu_bind, job->q);
}

And xe_cpu_bind_job_lock() checks whether q is cpu_bind->q:

drivers/gpu/drm/xe/xe_cpu_bind.c:xe_cpu_bind_job_lock() {
	bool is_cpu_bind = is_cpu_bind_queue(cpu_bind, q);

	if (is_cpu_bind)
		mutex_lock(&cpu_bind->job_mutex);
	else
		xe_vm_assert_held(q->user_vm);	/* User queues VM's should be locked */
}

Because tile->migrate->q is a separate queue from xe->cpu_bind->q and has
q->user_vm == NULL:

1. With CONFIG_PROVE_LOCKING enabled, is_cpu_bind is false, so
   xe_vm_assert_held(q->user_vm) dereferences a NULL q->user_vm pointer.
   In addition, xe_exec_queue_tlb_inval_last_fence_set() calls
   xe_exec_queue_last_fence_lockdep_assert() -> xe_cpu_bind_job_lock_assert(),
   which triggers xe_assert(xe, q == cpu_bind->q) and
   lockdep_assert_held(&cpu_bind->job_mutex).

2. With CONFIG_PROVE_LOCKING disabled, xe_cpu_bind_job_lock() is a no-op for
   tile->migrate->q. Since xe_vm_flush_vm_bo_tlb_async() only holds the per-BO
   dma-resv lock, concurrent evictions of BOs with distinct dma-resv locks can
   call drm_sched_job_arm(), drm_sched_entity_push_job(), and
   xe_exec_queue_tlb_inval_last_fence_set() concurrently on the shared
   tile->migrate->q without any lock, corrupting the drm_sched_entity SPSC
   queue and racing on q->tlb_inval[idx].last_fence.

[Severity: High]
Also, is it safe to call xe_vma_tlb_flush_client() and
xe_tlb_inval_job_alloc_dep() from the shrinker under fs_reclaim?

On L2-flush-optimized platforms, __xe_shrinker_walk() walks XE_PL_TT BOs
during slab shrinking (xe_shrinker_scan() and xe_shrinker_scan_purgeable())
and calls xe_bo_shrink() -> xe_bo_move_notify() -> xe_bo_trigger_rebind() ->
xe_vm_flush_vm_bo_tlb_async().

Within this path, dma_resv_get_singleton(), xe_tlb_inval_job_create(),
dma_resv_reserve_fences(), and xe_tlb_inval_job_alloc_dep() perform GFP_KERNEL
allocations, and xe_tlb_inval_job_alloc_dep() explicitly asserts
might_alloc(GFP_KERNEL):

drivers/gpu/drm/xe/xe_tlb_inval_job.c:xe_tlb_inval_job_alloc_dep() {
	xe_assert(gt_to_xe(job->q->gt), !xa_load(&job->dep.drm.dependencies, 0));
	might_alloc(GFP_KERNEL);

	return drm_sched_job_add_dependency(&job->dep.drm,
					    dma_fence_get_stub());
}

Won't reaching this from the shrinker while fs_reclaim is held trigger a
lockdep recursive-reclaim warning and risk recursive memory reclaim deadlocks?

[ ... ]
> +		for_each_tile(tile, xe, id) {
> +			if (!(vma->tile_present & BIT(id)))
> +				continue;
> +
> +			err = xe_vma_tlb_flush_client(vm, vma, tile,
> +						      tile->primary_gt, resv, dep,
> +						      XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> +			if (err)
> +				goto out;
> +
> +			if (tile->media_gt) {
> +				err = xe_vma_tlb_flush_client(vm, vma, tile,
> +							      tile->media_gt, resv, dep,
> +							      XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT);
> +				if (err)
> +					goto out;
> +			}
> +		}

[Severity: High]
On multi-tile devices, shouldn't the index passed to xe_vma_tlb_flush_client()
be offset by the tile ID?

In alloc_dep_schedulers(), q->tlb_inval[] is populated across all tiles and
GTs as a flat array indexed by i = id * (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1)
+ j:

drivers/gpu/drm/xe/xe_exec_queue.c:alloc_dep_schedulers() {
	for_each_tile(tile, xe, id) {
		for (j = 0; j < (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); ++j, ++i) {
			...
			if (j == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT)
				gt = tile->primary_gt;
			else
				gt = tile->media_gt;

			if (!gt)
				continue;
			...
			q->tlb_inval[i].dep_scheduler = dep_scheduler;
		}
	}
}

Passing the unshifted XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT (0) and
XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT (1) for every tile causes tiles with id > 0
to use tile 0's dep_scheduler and overwrite tile 0's last_fence slots (and if
tile 0 has no media GT while a higher tile does, q->tlb_inval[1].dep_scheduler
will be NULL). Should this compute the index using the tile ID in the same way
as xe_pt_update_ops_run()?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261104221459.1534188-1-matthew.brost@intel.com?part=1

✓ Xe.CI.FULL: success for drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 35620 bytes --]

== Series Details ==

Series: drm/xe: Flush L2 asynchronously in xe_bo_trigger_rebind() (rev5)
URL   : https://patchwork.freedesktop.org/series/170046/
State : success

== Summary ==

CI Bug Log - changes from xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d_FULL -> xe-pw-170046v5_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (3 -> 3)
------------------------------

  No changes in participating hosts

New tests
---------

  New tests have been introduced between xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d_FULL and xe-pw-170046v5_FULL:

### New IGT tests (5) ###

  * igt@fbdev@pan:
    - Statuses : 3 pass(s)
    - Exec time: [0.08, 0.09] s

  * igt@kms_pm_lpsp@kms-lpsp@pipe-a-edp-1:
    - Statuses : 2 pass(s)
    - Exec time: [0.26] s

  * igt@xe_exec_store@cachelines:
    - Statuses : 3 pass(s)
    - Exec time: [0.11, 0.28] s

  * igt@xe_exec_store@page-sized:
    - Statuses : 1 pass(s)
    - Exec time: [0.19] s

  * igt@xe_vm@partial-unbinds:
    - Statuses : 3 pass(s)
    - Exec time: [0.02, 0.05] s

  

Known issues
------------

  Here are the changes found in xe-pw-170046v5_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-ptl:          [PASS][1] -> [FAIL][2] ([Intel XE#6078]) +1 other test fail
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-ptl-5/igt@kms_async_flips@alternate-sync-async-flip.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-7/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2327])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#1124]) +6 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
    - shard-ptl:          NOTRUN -> [SKIP][5] ([Intel XE#5808]) +2 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#2328] / [Intel XE#7367])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_bw@linear-tiling-2-displays-target-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#367]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_bw@linear-tiling-2-displays-target-1920x1080p.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2887]) +8 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc:
    - shard-ptl:          NOTRUN -> [SKIP][9] ([Intel XE#5822]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#3432])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html

  * igt@kms_chamelium_audio@hdmi-audio:
    - shard-ptl:          NOTRUN -> [SKIP][11] ([Intel XE#2252])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_chamelium_audio@hdmi-audio.html

  * igt@kms_chamelium_color@degamma:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2325] / [Intel XE#7358]) +1 other test skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_chamelium_color@degamma.html

  * igt@kms_chamelium_color_pipeline@plane-lut3d-green-only:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#7358]) +2 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_chamelium_color_pipeline@plane-lut3d-green-only.html

  * igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2252]) +3 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-d-plane-4:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#6969]) +7 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-d-plane-4.html

  * igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][16] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html

  * igt@kms_content_protection@content-type-change:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#7642])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@uevent-hdcp14:
    - shard-bmg:          NOTRUN -> [FAIL][18] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_content_protection@uevent-hdcp14.html

  * igt@kms_cursor_crc@cursor-offscreen-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2320]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_cursor_crc@cursor-offscreen-32x10.html

  * igt@kms_cursor_crc@cursor-random-32x10:
    - shard-ptl:          NOTRUN -> [SKIP][20] ([Intel XE#5900]) +1 other test skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_cursor_crc@cursor-random-32x10.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2286] / [Intel XE#6035])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dp_link_training@uhbr-mst-tbtalt-train:
    - shard-ptl:          NOTRUN -> [SKIP][22] ([Intel XE#9531])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_dp_link_training@uhbr-mst-tbtalt-train.html

  * igt@kms_dp_link_training@uhbr-sst-direct-train:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#9529])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@kms_dp_link_training@uhbr-sst-direct-train.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc-bigjoiner:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#8265]) +1 other test skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_dsc@dsc-fractional-bpp-with-bpc-bigjoiner.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#4422] / [Intel XE#7442])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html

  * igt@kms_fbcon_fbt@fbc:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#4156] / [Intel XE#7425])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_fbcon_fbt@fbc.html

  * igt@kms_feature_discovery@display-4x:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#1138] / [Intel XE#7344])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_feature_discovery@display-4x.html

  * igt@kms_flip@2x-modeset-vs-vblank-race-interruptible:
    - shard-ptl:          NOTRUN -> [SKIP][28] ([Intel XE#2316])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html

  * igt@kms_flip@dpms-vs-vblank-race:
    - shard-ptl:          [PASS][29] -> [FAIL][30] ([Intel XE#3098]) +1 other test fail
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-ptl-7/igt@kms_flip@dpms-vs-vblank-race.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-1/igt@kms_flip@dpms-vs-vblank-race.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-ptl:          [PASS][31] -> [FAIL][32] ([Intel XE#3321]) +1 other test fail
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-ptl-6/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
    - shard-lnl:          [PASS][33] -> [FAIL][34] ([Intel XE#301]) +1 other test fail
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#7178] / [Intel XE#7351]) +2 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#7179])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x.html

  * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#2311]) +36 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#4141]) +6 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-offscreen-pri-indfb-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][39] ([Intel XE#6312]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-offscreen-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-pri-indfb-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][40] ([Intel XE#5812]) +13 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#7061]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][42] ([Intel XE#7061]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#2313]) +23 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-indfb-pgflip-blt:
    - shard-ptl:          NOTRUN -> [SKIP][44] ([Intel XE#7865]) +4 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_panel_fitting@legacy:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#2486])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@kms_panel_fitting@legacy.html

  * igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#8303]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier:
    - shard-ptl:          NOTRUN -> [SKIP][47] ([Intel XE#7283])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier.html

  * igt@kms_plane@pixel-format-yf-tiled-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#7283]) +1 other test skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_plane@pixel-format-yf-tiled-modifier.html

  * igt@kms_plane_lowres@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#2393])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@kms_plane_lowres@tiling-y.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#5020] / [Intel XE#7348]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888.html

  * igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#8396]) +1 other test skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-ptl:          NOTRUN -> [SKIP][53] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc3co-vpb-simulation@psr2-yuv420:
    - shard-ptl:          NOTRUN -> [SKIP][54] ([Intel XE#8396]) +1 other test skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_pm_dc@dc3co-vpb-simulation@psr2-yuv420.html

  * igt@kms_pm_dc@deep-pkgc:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#2505] / [Intel XE#7447])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_pm_dc@deep-pkgc.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#1489]) +4 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html

  * igt@kms_psr@psr-basic:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#2234] / [Intel XE#2850]) +4 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@kms_psr@psr-basic.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-ptl:          NOTRUN -> [SKIP][58] ([Intel XE#5821])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_sharpness_filter@filter-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#6503]) +1 other test skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_sharpness_filter@filter-dpms.html

  * igt@kms_vrr@seamless-rr-switch-virtual:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#1499] / [Intel XE#9271])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_vrr@seamless-rr-switch-virtual.html

  * igt@xe_cw_post_sync@walker-post-sync:
    - shard-ptl:          NOTRUN -> [SKIP][61] ([Intel XE#8608])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@xe_cw_post_sync@walker-post-sync.html

  * igt@xe_exec_balancer@once-cm-virtual-userptr-invalidate-race:
    - shard-ptl:          NOTRUN -> [SKIP][62] ([Intel XE#7482]) +2 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@xe_exec_balancer@once-cm-virtual-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr:
    - shard-ptl:          NOTRUN -> [SKIP][63] ([Intel XE#5575] / [Intel XE#7484]) +1 other test skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html

  * igt@xe_exec_basic@multigpu-once-basic:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@xe_exec_basic@multigpu-once-basic.html

  * igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-race-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#8374]) +6 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-race-prefetch.html

  * igt@xe_exec_fault_mode@twice-multi-queue-imm:
    - shard-ptl:          NOTRUN -> [SKIP][66] ([Intel XE#8374]) +1 other test skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@xe_exec_fault_mode@twice-multi-queue-imm.html

  * igt@xe_exec_multi_queue@max-queues-basic:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#8364]) +15 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@xe_exec_multi_queue@max-queues-basic.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-dyn-priority:
    - shard-ptl:          NOTRUN -> [SKIP][68] ([Intel XE#8364]) +4 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@xe_exec_multi_queue@one-queue-preempt-mode-dyn-priority.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-basic:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#8378]) +3 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-cm-fd-basic.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind:
    - shard-ptl:          NOTRUN -> [SKIP][70] ([Intel XE#8378]) +2 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind.html

  * igt@xe_mmap@small-bar:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#586] / [Intel XE#7323] / [Intel XE#7384])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@xe_mmap@small-bar.html

  * igt@xe_multigpu_svm@mgpu-pagefault-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#6964]) +2 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@xe_multigpu_svm@mgpu-pagefault-prefetch.html

  * igt@xe_peer2peer@read:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@xe_peer2peer@read.html

  * igt@xe_pm@s4-mocs:
    - shard-ptl:          [PASS][74] -> [ABORT][75] ([Intel XE#9362])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-ptl-4/igt@xe_pm@s4-mocs.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-4/igt@xe_pm@s4-mocs.html

  * igt@xe_pm_residency@gt-c6-freeze@gt1:
    - shard-bmg:          [PASS][76] -> [FAIL][77] ([Intel XE#9254]) +1 other test fail
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-bmg-8/igt@xe_pm_residency@gt-c6-freeze@gt1.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@xe_pm_residency@gt-c6-freeze@gt1.html

  * igt@xe_pxp@pxp-stale-bo-exec-post-rpm:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#4733] / [Intel XE#7417])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@xe_pxp@pxp-stale-bo-exec-post-rpm.html

  * igt@xe_query@multigpu-query-cs-cycles:
    - shard-ptl:          NOTRUN -> [SKIP][79] ([Intel XE#6019]) +1 other test skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@xe_query@multigpu-query-cs-cycles.html

  * igt@xe_query@multigpu-query-mem-usage:
    - shard-bmg:          NOTRUN -> [SKIP][80] ([Intel XE#944]) +1 other test skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@xe_query@multigpu-query-mem-usage.html

  * igt@xe_sriov_flr@flr-twice:
    - shard-bmg:          NOTRUN -> [FAIL][81] ([Intel XE#6569])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-9/igt@xe_sriov_flr@flr-twice.html

  
#### Possible fixes ####

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [INCOMPLETE][82] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][83] +1 other test pass
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][84] ([Intel XE#301]) -> [PASS][85] +1 other test pass
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][86] ([Intel XE#1503]) -> [PASS][87]
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-8/igt@kms_hdr@invalid-hdr.html

  * igt@kms_vrr@flip-suspend@pipe-a-edp-1:
    - shard-ptl:          [FAIL][88] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][89] +1 other test pass
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-ptl-7/igt@kms_vrr@flip-suspend@pipe-a-edp-1.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-1/igt@kms_vrr@flip-suspend@pipe-a-edp-1.html

  * igt@xe_exec_reset@gt-stress-reset-concurrent-submit-sync:
    - shard-lnl:          [DMESG-WARN][90] ([Intel XE#8652]) -> [PASS][91]
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-lnl-4/igt@xe_exec_reset@gt-stress-reset-concurrent-submit-sync.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-lnl-5/igt@xe_exec_reset@gt-stress-reset-concurrent-submit-sync.html

  * igt@xe_pm@s2idle-mocs:
    - shard-ptl:          [ABORT][92] ([Intel XE#9362]) -> [PASS][93]
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-ptl-6/igt@xe_pm@s2idle-mocs.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-ptl-8/igt@xe_pm@s2idle-mocs.html

  * igt@xe_pm_residency@idle-residency:
    - shard-bmg:          [FAIL][94] ([Intel XE#9254]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-bmg-2/igt@xe_pm_residency@idle-residency.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@xe_pm_residency@idle-residency.html

  * igt@xe_pm_residency@idle-residency@gt0:
    - shard-bmg:          [FAIL][96] ([Intel XE#9725]) -> [PASS][97]
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-bmg-2/igt@xe_pm_residency@idle-residency@gt0.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@xe_pm_residency@idle-residency@gt0.html

  * igt@xe_survivability@runtime-survivability:
    - shard-bmg:          [DMESG-WARN][98] ([Intel XE#9365]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-bmg-9/igt@xe_survivability@runtime-survivability.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-2/igt@xe_survivability@runtime-survivability.html

  
#### Warnings ####

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-lnl:          [SKIP][100] ([Intel XE#309] / [Intel XE#7343]) -> [SKIP][101] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935])
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [SKIP][102] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][103] ([Intel XE#1729] / [Intel XE#7424])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][104] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][105] ([Intel XE#2509] / [Intel XE#7437])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
  [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
  [Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
  [Intel XE#5821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5821
  [Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
  [Intel XE#5900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5900
  [Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7323
  [Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7344]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7344
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7384]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7384
  [Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
  [Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
  [Intel XE#7447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7447
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8608
  [Intel XE#8652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8652
  [Intel XE#9254]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9254
  [Intel XE#9271]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9271
  [Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
  [Intel XE#9365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9365
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#9529]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9529
  [Intel XE#9531]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9531
  [Intel XE#9725]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9725


Build changes
-------------

  * Linux: xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d -> xe-pw-170046v5

  IGT_9177: 9177
  xe-6064-3379b0f74f31bfc3746b692822a7700aeeebe15d: 3379b0f74f31bfc3746b692822a7700aeeebe15d
  xe-pw-170046v5: 170046v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170046v5/index.html

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