* [PATCH v2 1/3] drm/xe/wedge: add fault inspection with debugfs release
2026-11-06 22:13 [PATCH v2 0/3] drm/xe: add wedged_mode=3 fault inspection Daniel Charles
@ 2026-11-06 22:13 ` Daniel Charles
2026-11-06 22:59 ` sashiko-bot
2026-11-06 22:13 ` [PATCH v2 2/3] drm/xe/wedge: preserve pending TLB invalidations during inspection Daniel Charles
` (5 subsequent siblings)
6 siblings, 1 reply; 9+ messages in thread
From: Daniel Charles @ 2026-11-06 22:13 UTC (permalink / raw)
To: intel-xe; +Cc: Alan Previn, Daniel Charles
From: Alan Previn <alan.previn.teres.alexis@intel.com>
Add wedged_mode=3 for inspecting hardware after a fault without automatic
engine recovery. Extend the no-reset GuC policy and provide a debugfs
release interface backed by a dedicated worker.
The worker stops submission on all GTs and blocks new Xe ioctls while
waiting for a skip or continue response. Skip does not undo the GT stop
or restore normal operation; continue proceeds into permanent wedging
and userspace notification. The stop is best-effort, not an atomic
snapshot, and in-flight ioctls can still complete.
Make inspection one-shot after the GTs have been stopped or runtime
resume has failed. Publish terminal resume failure together with release
of the pending-request gate. Reject duplicate requests while inspection
is pending and prevent re-entry after either reply.
Recognize pending inspection in the mode-3 timeout reset guard, including
the interval before execution queues have been marked wedged. Publish
teardown admission independently of the selected mode and join inspection
work so policy writes cannot activate it after teardown starts. Other
wedge modes retain their existing declaration handling.
Configure wedged_mode=3 before starting workloads: changing modes does not
atomically synchronize GuC policy updates with concurrent submissions.
Disable runtime autosuspend and avoid system suspend and hibernation,
including after SKIP; releasing inspection does not restore operation.
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
---
drivers/gpu/drm/xe/xe_debugfs.c | 31 +++-
drivers/gpu/drm/xe/xe_device.c | 12 +-
drivers/gpu/drm/xe/xe_gt.c | 17 +-
drivers/gpu/drm/xe/xe_gt.h | 1 +
drivers/gpu/drm/xe/xe_guc.c | 2 +-
drivers/gpu/drm/xe/xe_guc_ads.c | 2 +-
drivers/gpu/drm/xe/xe_guc_capture.c | 2 +-
drivers/gpu/drm/xe/xe_guc_submit.c | 19 ++-
drivers/gpu/drm/xe/xe_pci.c | 16 +-
drivers/gpu/drm/xe/xe_uc.c | 2 +-
drivers/gpu/drm/xe/xe_wedge.c | 254 ++++++++++++++++++++++++++--
drivers/gpu/drm/xe/xe_wedge.h | 3 +
drivers/gpu/drm/xe/xe_wedge_types.h | 43 +++++
13 files changed, 373 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index e59d4964d811d..2b0b2135e0184 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -419,7 +419,7 @@ static ssize_t wedged_mode_show(struct file *f, char __user *ubuf,
char buf[32];
int len = 0;
- len = scnprintf(buf, sizeof(buf), "%d\n", xe->wedged.mode);
+ len = scnprintf(buf, sizeof(buf), "%d\n", READ_ONCE(xe->wedged.mode));
return simple_read_from_buffer(ubuf, size, pos, buf, len);
}
@@ -448,6 +448,25 @@ static const struct file_operations wedged_mode_fops = {
.write = wedged_mode_set,
};
+static ssize_t wedged_pause_resume_set(struct file *f, const char __user *ubuf,
+ size_t size, loff_t *pos)
+{
+ struct xe_device *xe = file_inode(f)->i_private;
+ u32 reply;
+ int ret;
+
+ ret = kstrtouint_from_user(ubuf, size, 0, &reply);
+ if (ret)
+ return ret;
+ ret = xe_wedge_set_reply(xe, reply);
+ return ret ? ret : size;
+}
+
+static const struct file_operations wedged_pause_resume_fops = {
+ .owner = THIS_MODULE,
+ .write = wedged_pause_resume_set,
+};
+
static ssize_t page_reclaim_hw_assist_show(struct file *f, char __user *ubuf,
size_t size, loff_t *pos)
{
@@ -723,6 +742,16 @@ void xe_debugfs_register(struct xe_device *xe)
debugfs_create_file("wedged_mode", 0600, root, xe,
&wedged_mode_fops);
+ /*
+ * Before starting workloads with wedged_mode=3, disable runtime
+ * autosuspend by writing "on" to the PCI device's power/control sysfs
+ * attribute. Keep it disabled after SKIP and avoid system suspend and
+ * hibernation: releasing inspection does not restore normal operation.
+ * Skip is not recovery: GTs remain stopped. Inspection has no automatic
+ * timeout. Continue completes permanent wedging, not normal execution.
+ */
+ debugfs_create_file("wedged_pause_resume", 0200, root, xe,
+ &wedged_pause_resume_fops);
debugfs_create_file("atomic_svm_timeslice_ms", 0600, root, xe,
&atomic_svm_timeslice_ms_fops);
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index d3bb42e4d0d7c..210bb4229402e 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -239,7 +239,7 @@ static long xe_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
struct xe_device *xe = to_xe_device(file_priv->minor->dev);
long ret;
- if (xe_wedged(xe))
+ if (xe_wedged(xe) || atomic_read(&xe->wedged.declare_pending))
return -ECANCELED;
ACQUIRE(xe_pm_runtime_ioctl, pm)(xe);
@@ -257,7 +257,7 @@ static long xe_drm_compat_ioctl(struct file *file, unsigned int cmd, unsigned lo
struct xe_device *xe = to_xe_device(file_priv->minor->dev);
long ret;
- if (xe_wedged(xe))
+ if (xe_wedged(xe) || atomic_read(&xe->wedged.declare_pending))
return -ECANCELED;
ACQUIRE(xe_pm_runtime_ioctl, pm)(xe);
@@ -461,6 +461,11 @@ int xe_device_init_early(struct xe_device *xe)
{
int err;
+ mutex_init(&xe->wedged.mode_mutex);
+ spin_lock_init(&xe->wedged.mode_lock);
+ atomic_set(&xe->wedged.declare_pending, 0);
+ init_waitqueue_head(&xe->wedged.pause_waitq);
+
err = ttm_device_init(&xe->ttm, &xe_ttm_funcs, xe->drm.dev,
xe->drm.anon_inode->i_mapping,
xe->drm.vma_offset_manager,
@@ -1110,6 +1115,7 @@ int xe_device_probe(struct xe_device *xe)
return 0;
err_unregister_display:
+ xe_wedge_prepare_fini(xe);
xe_display_unregister(xe);
drm_dev_unregister(&xe->drm);
@@ -1132,6 +1138,8 @@ void xe_device_shutdown(struct xe_device *xe)
drm_dbg(&xe->drm, "Shutting down device\n");
+ xe_wedge_prepare_fini(xe);
+
xe_display_shutdown(xe);
xe_irq_suspend(xe);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 45fb074812a29..a84fa80e9fa9b 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -1194,10 +1194,25 @@ void xe_gt_wedge_declare(struct xe_gt *gt)
{
struct xe_device *xe = gt_to_xe(gt);
- xe_gt_assert(gt, xe->wedged.mode);
+ xe_gt_assert(gt, READ_ONCE(xe->wedged.mode));
xe_uc_reset_prepare(>->uc);
xe_pm_runtime_get_noresume(xe);
if (!queue_work(gt->ordered_wq, >->wedge.worker))
xe_pm_runtime_put(xe);
}
+
+/**
+ * xe_gt_wedge_pause() - Stop GT submission synchronously for mode-3 inspection
+ * @gt: GT to stop
+ *
+ * Called only by the sleepable device inspection worker.
+ */
+void xe_gt_wedge_pause(struct xe_gt *gt)
+{
+ xe_gt_assert(gt, READ_ONCE(gt_to_xe(gt)->wedged.mode) ==
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE);
+ xe_uc_reset_prepare(>->uc);
+ xe_uc_wedge_declare(>->uc);
+ xe_tlb_inval_reset(>->tlb_inval);
+}
diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
index 7b6952fe804c4..a2591c5f0ffae 100644
--- a/drivers/gpu/drm/xe/xe_gt.h
+++ b/drivers/gpu/drm/xe/xe_gt.h
@@ -41,6 +41,7 @@ int xe_gt_init_early(struct xe_gt *gt);
int xe_gt_init(struct xe_gt *gt);
void xe_gt_mmio_init(struct xe_gt *gt);
void xe_gt_wedge_declare(struct xe_gt *gt);
+void xe_gt_wedge_pause(struct xe_gt *gt);
int xe_gt_record_default_lrcs(struct xe_gt *gt);
/**
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index b1f4e132fa0cb..1f8df08544ed8 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -1839,7 +1839,7 @@ int xe_guc_print_info(struct xe_guc *guc, struct drm_printer *p)
*/
void xe_guc_wedge_declare(struct xe_guc *guc)
{
- xe_gt_assert(guc_to_gt(guc), guc_to_xe(guc)->wedged.mode);
+ xe_gt_assert(guc_to_gt(guc), READ_ONCE(guc_to_xe(guc)->wedged.mode));
xe_guc_ct_stop(&guc->ct);
xe_guc_submit_wedge(guc);
diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index 43a2951a66d64..01026c024da09 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -534,7 +534,7 @@ static void guc_policies_init(struct xe_guc_ads *ads)
ads_blob_write(ads, policies.max_num_work_items,
GLOBAL_POLICY_MAX_NUM_WI);
- if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)
+ if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode)))
global_flags |= GLOBAL_POLICY_DISABLE_ENGINE_RESET;
ads_blob_write(ads, policies.global_flags, global_flags);
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
index 5a4d085660a20..dfedabc651a56 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.c
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -1894,7 +1894,7 @@ xe_guc_capture_get_matching_and_lock(struct xe_exec_queue *q)
xe = gt_to_xe(q->gt);
- if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)
+ if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode)))
return NULL;
if (!xe_device_uc_enabled(xe))
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 9e7c2778029ca..30adaf9900cb7 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1424,7 +1424,7 @@ void xe_guc_submit_wedge(struct xe_guc *guc)
struct xe_exec_queue *q;
unsigned long index;
- xe_gt_assert(guc_to_gt(guc), guc_to_xe(guc)->wedged.mode);
+ xe_gt_assert(guc_to_gt(guc), READ_ONCE(guc_to_xe(guc)->wedged.mode));
/*
* If device is being wedged even before submission_state is
@@ -1433,7 +1433,7 @@ void xe_guc_submit_wedge(struct xe_guc *guc)
if (!guc->submission_state.initialized)
return;
- if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET) {
+ if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode))) {
mutex_lock(&guc->submission_state.lock);
xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
if (xe_exec_queue_get_unless_zero(q))
@@ -1453,7 +1453,7 @@ static bool guc_submit_hint_wedged(struct xe_guc *guc)
{
struct xe_device *xe = guc_to_xe(guc);
- if (xe->wedged.mode != XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)
+ if (!xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode)))
return false;
if (xe_wedged(xe))
@@ -1672,7 +1672,10 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
if (!exec_queue_killed(q))
wedged = guc_submit_hint_wedged(exec_queue_to_guc(q));
else
- wedged = xe_wedged(xe);
+ wedged = xe_wedged(xe) ||
+ (READ_ONCE(xe->wedged.mode) ==
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE &&
+ exec_queue_wedged(q));
/*
* Only tag as GPU hang if this is the original timeout, not a
@@ -1726,6 +1729,13 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
goto handle_vf_resume;
if (!ret || xe_guc_read_stopped(guc)) {
trigger_reset:
+ if (READ_ONCE(xe->wedged.mode) ==
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE &&
+ (atomic_read(&xe->wedged.declare_pending) ||
+ exec_queue_wedged(q) || exec_queue_wedged(primary))) {
+ wedged = true;
+ goto complete_jobs;
+ }
if (!ret)
xe_gt_warn(guc_to_gt(guc),
"Schedule disable failed to respond, guc_id=%d",
@@ -1778,6 +1788,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
}
}
+complete_jobs:
/* Mark all outstanding jobs as bad, thus completing them */
xe_sched_job_set_error(job, err);
drm_sched_for_each_pending_job(tmp_job, &sched->base, NULL)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 0c13eb901aa73..331a80baa6491 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -39,6 +39,7 @@
#include "xe_survivability_mode.h"
#include "xe_tile.h"
#include "xe_tile_printk.h"
+#include "xe_wedge.h"
enum toggle_d3cold {
D3COLD_DISABLE,
@@ -1120,6 +1121,8 @@ static void xe_pci_remove(struct pci_dev *pdev)
{
struct xe_device *xe = pdev_to_xe_device(pdev);
+ xe_wedge_prepare_fini(xe);
+
if (IS_SRIOV_PF(xe))
xe_pci_sriov_configure(pdev, 0);
@@ -1252,15 +1255,15 @@ static int __xe_pci_probe(struct pci_dev *pdev, const struct xe_device_desc *des
err = xe_probe_info(xe, &probed_info);
if (err)
- return err;
+ goto err_wedge_cleanup;
err = xe_info_init(xe, &probed_info);
if (err)
- return err;
+ goto err_wedge_cleanup;
err = xe_display_probe(xe);
if (err)
- return err;
+ goto err_wedge_cleanup;
drm_dbg(&xe->drm, "%s %s %04x:%04x dgfx:%d gfx:%s (%d.%02d) media:%s (%d.%02d) display:%s dma_m_s:%d tc:%d gscfi:%d cscfi:%d",
desc->platform_name,
@@ -1288,11 +1291,11 @@ static int __xe_pci_probe(struct pci_dev *pdev, const struct xe_device_desc *des
err = xe_pm_probe(xe);
if (err)
- return err;
+ goto err_wedge_cleanup;
err = xe_device_probe(xe);
if (err)
- return err;
+ goto err_wedge_cleanup;
err = xe_pm_init(xe);
if (err)
@@ -1303,6 +1306,9 @@ static int __xe_pci_probe(struct pci_dev *pdev, const struct xe_device_desc *des
err_driver_cleanup:
xe_pci_remove(pdev);
return err;
+err_wedge_cleanup:
+ xe_wedge_prepare_fini(xe);
+ return err;
}
static void xe_pci_shutdown(struct pci_dev *pdev)
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index 686c28856014c..ae428bbe72ac8 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -334,7 +334,7 @@ void xe_uc_runtime_resume(struct xe_uc *uc)
*/
void xe_uc_wedge_declare(struct xe_uc *uc)
{
- xe_gt_assert(uc_to_gt(uc), uc_to_xe(uc)->wedged.mode);
+ xe_gt_assert(uc_to_gt(uc), READ_ONCE(uc_to_xe(uc)->wedged.mode));
xe_guc_wedge_declare(&uc->guc);
}
diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
index 2f35937c5e661..8bfe0e2775d29 100644
--- a/drivers/gpu/drm/xe/xe_wedge.c
+++ b/drivers/gpu/drm/xe/xe_wedge.c
@@ -5,6 +5,7 @@
#include <drm/drm_drv.h>
#include <drm/drm_managed.h>
+#include <linux/workqueue.h>
#include "xe_defaults.h"
#include "xe_device.h"
@@ -67,9 +68,10 @@ static void wedge_work(struct work_struct *work)
#define XE_BUG_URL "https://gitlab.freedesktop.org/drm/xe/kernel/issues/new"
/**
- * xe_wedge_declare() - Declare device wedged
+ * wedge_declare_now() - Declare device wedged
* @xe: xe device instance
* @method: method(s) to be used for recovery
+ * @gts_already_wedged: Inspection has already stopped GT submission
*
* This is the final state that can only be cleared with the recovery method
* specified in the drm wedged uevent.
@@ -87,7 +89,8 @@ static void wedge_work(struct work_struct *work)
* Since the wedge handling is done as part of worker thread, this is safe for
* atomic callers.
*/
-void xe_wedge_declare(struct xe_device *xe, unsigned long method)
+static void wedge_declare_now(struct xe_device *xe, unsigned long method,
+ bool gts_already_wedged)
{
struct xe_gt *gt;
u8 id;
@@ -109,15 +112,17 @@ void xe_wedge_declare(struct xe_device *xe, unsigned long method)
"Please file a _new_ bug report at %s\n",
WEDGED_URL, XE_BUG_URL);
- for_each_initialized_gt(gt, xe, id)
- xe_gt_wedge_declare(gt);
+ if (!gts_already_wedged) {
+ for_each_initialized_gt(gt, xe, id)
+ xe_gt_wedge_declare(gt);
+ }
/*
* XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET is intended for debugging
* hangs, so wedge the device with 'none' recovery method and have
* it available to the user for debugging.
*/
- if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)
+ if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode)))
xe->wedged.method = DRM_WEDGE_RECOVERY_NONE;
else
xe->wedged.method = method;
@@ -125,6 +130,191 @@ void xe_wedge_declare(struct xe_device *xe, unsigned long method)
schedule_work(&xe->wedged.work);
}
+static bool wedge_reply_ready(struct xe_device *xe)
+{
+ u32 reply = READ_ONCE(xe->wedged.reply);
+
+ return reply == XE_WEDGE_REPLY_SKIP || reply == XE_WEDGE_REPLY_CONTINUE;
+}
+
+int xe_wedge_set_reply(struct xe_device *xe, u32 reply)
+{
+ unsigned long flags;
+ int ret = 0;
+
+ if (reply != XE_WEDGE_REPLY_SKIP && reply != XE_WEDGE_REPLY_CONTINUE)
+ return -EINVAL;
+
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ if (READ_ONCE(xe->wedged.mode) !=
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE ||
+ !atomic_read(&xe->wedged.declare_pending) ||
+ !xe->wedged.wait_active || READ_ONCE(xe->wedged.shutting_down))
+ ret = -EINVAL;
+ else if (READ_ONCE(xe->wedged.reply))
+ ret = -EALREADY;
+ else
+ WRITE_ONCE(xe->wedged.reply, reply);
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+
+ if (!ret)
+ wake_up_all(&xe->wedged.pause_waitq);
+ return ret;
+}
+
+static void wedge_pause_work(struct work_struct *work)
+{
+ struct xe_device *xe = container_of(work, struct xe_device, wedged.pause_work);
+ struct xe_gt *gt;
+ unsigned long flags;
+ bool pm_ref;
+ u32 reply;
+ u8 id;
+
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ pm_ref = xe->wedged.pause_pm_ref;
+ xe->wedged.pause_pm_ref = false;
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+
+ if (READ_ONCE(xe->wedged.shutting_down)) {
+ if (pm_ref)
+ goto put_runtime_ref;
+ goto clear_pending;
+ }
+
+ if (!pm_ref) {
+ xe_warn(xe, "Mode-3 wedge could not retain active runtime PM; resuming for inspection, hardware state may have changed\n");
+ if (!xe_pm_runtime_resume_and_get(xe)) {
+ xe_err(xe, "Failed to resume device for mode-3 inspection; aborting pause\n");
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ WRITE_ONCE(xe->wedged.pause_failed, true);
+ atomic_set(&xe->wedged.declare_pending, 0);
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ return;
+ }
+ }
+
+ if (READ_ONCE(xe->wedged.shutting_down))
+ goto put_runtime_ref;
+
+ for_each_initialized_gt(gt, xe, id)
+ xe_gt_wedge_pause(gt);
+ WRITE_ONCE(xe->wedged.pause_stopped, true);
+
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ WRITE_ONCE(xe->wedged.reply, 0);
+ xe->wedged.wait_active = true;
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+
+ xe_err(xe, "GT submission stopped for mode-3 hardware debugging.\n"
+ "New DRM ioctls are blocked while waiting for 'wedged_pause_resume'.\n"
+ "Skip: 0x%08x; continue into permanent wedge: 0x%08x.\n"
+ "Skip does not restart GTs or recover the fault.\n",
+ XE_WEDGE_REPLY_SKIP, XE_WEDGE_REPLY_CONTINUE);
+
+ wait_event_idle(xe->wedged.pause_waitq,
+ wedge_reply_ready(xe) || READ_ONCE(xe->wedged.shutting_down));
+
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ xe->wedged.wait_active = false;
+ reply = READ_ONCE(xe->wedged.reply);
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+
+ if (!READ_ONCE(xe->wedged.shutting_down) && reply == XE_WEDGE_REPLY_CONTINUE)
+ wedge_declare_now(xe, DRM_WEDGE_RECOVERY_NONE, true);
+ else
+ xe_info(xe, "Inspection released without permanent wedge; GTs remain stopped\n");
+put_runtime_ref:
+ xe_pm_runtime_put(xe);
+clear_pending:
+ atomic_set(&xe->wedged.declare_pending, 0);
+}
+
+static void wedge_request(struct xe_device *xe, unsigned long method, bool mode3_only)
+{
+ unsigned long flags;
+ enum xe_wedged_mode mode;
+ bool pm_ref;
+
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ mode = READ_ONCE(xe->wedged.mode);
+ if (mode3_only && mode != XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE) {
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ return;
+ }
+
+ if (mode != XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE) {
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ wedge_declare_now(xe, method, false);
+ return;
+ }
+
+ if (READ_ONCE(xe->wedged.shutting_down) ||
+ atomic_read(&xe->wedged.declare_pending) ||
+ READ_ONCE(xe->wedged.pause_failed) ||
+ READ_ONCE(xe->wedged.pause_stopped) || xe_wedged(xe)) {
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ return;
+ }
+
+ atomic_set(&xe->wedged.declare_pending, 1);
+ pm_ref = xe_pm_runtime_get_if_active(xe);
+ if (WARN_ON_ONCE(!queue_work(xe->wedged.pause_workqueue, &xe->wedged.pause_work))) {
+ xe_err(xe, "Mode-3 inspection work already queued\n");
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ if (pm_ref)
+ xe_pm_runtime_put(xe);
+ return;
+ }
+ xe->wedged.pause_pm_ref = pm_ref;
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+}
+
+/**
+ * xe_wedge_declare() - Request device wedging
+ * @xe: Xe device
+ * @method: Recovery methods for a permanent wedge
+ *
+ * Mode 3 defers all requests, including critical errors, to inspection.
+ * Returning does not imply GT stopping is complete. Permanent wedging and
+ * its userspace notification occur only on continue. Teardown suppresses
+ * new inspection requests. Other modes retain normal wedge handling.
+ */
+void xe_wedge_declare(struct xe_device *xe, unsigned long method)
+{
+ wedge_request(xe, method, false);
+}
+
+/**
+ * xe_wedge_declare_mode3() - Request inspection only in mode 3
+ * @xe: Xe device
+ *
+ * Safe for atomic callers. Returning does not imply the GTs are stopped.
+ */
+void xe_wedge_declare_mode3(struct xe_device *xe)
+{
+ wedge_request(xe, DRM_WEDGE_RECOVERY_NONE, true);
+}
+
+/**
+ * xe_wedge_prepare_fini() - Release and join mode-3 inspection before teardown
+ * @xe: Xe device
+ */
+void xe_wedge_prepare_fini(struct xe_device *xe)
+{
+ unsigned long flags;
+
+ mutex_lock(&xe->wedged.mode_mutex);
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ WRITE_ONCE(xe->wedged.shutting_down, true);
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ if (xe->wedged.pause_workqueue) {
+ wake_up_all(&xe->wedged.pause_waitq);
+ flush_work(&xe->wedged.pause_work);
+ }
+ mutex_unlock(&xe->wedged.mode_mutex);
+}
+
static const char *wedge_mode_to_string(enum xe_wedged_mode mode)
{
switch (mode) {
@@ -134,6 +324,8 @@ static const char *wedge_mode_to_string(enum xe_wedged_mode mode)
return "upon-critical-error";
case XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET:
return "upon-any-hang-no-reset";
+ case XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE:
+ return "upon-any-hang-no-reset-wait-for-release";
default:
return "<invalid>";
}
@@ -141,10 +333,10 @@ static const char *wedge_mode_to_string(enum xe_wedged_mode mode)
static int wedge_validate_mode(struct xe_device *xe, unsigned int mode)
{
- if (mode > XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET) {
+ if (mode > XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE) {
xe_dbg(xe, "wedged_mode: invalid value (%u)\n", mode);
return -EINVAL;
- } else if (mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET && (IS_SRIOV_VF(xe) ||
+ } else if (xe_wedge_is_hanging_on_any(mode) && (IS_SRIOV_VF(xe) ||
(IS_SRIOV_PF(xe) && !IS_ENABLED(CONFIG_DRM_XE_DEBUG)))) {
xe_dbg(xe, "wedged_mode: (%u) %s mode is not supported for %s\n",
mode, wedge_mode_to_string(mode),
@@ -160,11 +352,11 @@ static bool wedge_mode_needs_policy_update(struct xe_device *xe, enum xe_wedged_
if (xe->wedged.inconsistent_reset)
return true;
- if (xe->wedged.mode == mode)
+ if (READ_ONCE(xe->wedged.mode) == mode)
return false;
- if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET ||
- mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)
+ if (xe_wedge_is_hanging_on_any(READ_ONCE(xe->wedged.mode)) ||
+ xe_wedge_is_hanging_on_any(mode))
return true;
return false;
@@ -175,7 +367,7 @@ static int __wedge_mode_set_reset_policy(struct xe_gt *gt, enum xe_wedged_mode m
bool enable_engine_reset;
int ret;
- enable_engine_reset = (mode != XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET);
+ enable_engine_reset = !xe_wedge_is_hanging_on_any(mode);
ret = xe_guc_ads_scheduler_policy_toggle_reset(>->uc.guc.ads,
enable_engine_reset);
if (ret)
@@ -216,20 +408,46 @@ static int wedge_mode_set_reset_policy(struct xe_device *xe, enum xe_wedged_mode
*/
int xe_wedge_set_mode(struct xe_device *xe, enum xe_wedged_mode mode)
{
+ unsigned long flags;
+ enum xe_wedged_mode old_mode;
+ bool update_policy;
int ret;
ret = wedge_validate_mode(xe, mode);
if (ret)
return ret;
- if (wedge_mode_needs_policy_update(xe, mode)) {
+ mutex_lock(&xe->wedged.mode_mutex);
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ if (atomic_read(&xe->wedged.declare_pending) || READ_ONCE(xe->wedged.shutting_down)) {
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ ret = -EBUSY;
+ goto out_unlock;
+ }
+ old_mode = READ_ONCE(xe->wedged.mode);
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+
+ update_policy = wedge_mode_needs_policy_update(xe, mode);
+ if (update_policy) {
ret = wedge_mode_set_reset_policy(xe, mode);
if (ret)
- return ret;
+ goto out_unlock;
}
- xe->wedged.mode = mode;
+ spin_lock_irqsave(&xe->wedged.mode_lock, flags);
+ if (atomic_read(&xe->wedged.declare_pending)) {
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ ret = update_policy ? wedge_mode_set_reset_policy(xe, old_mode) : 0;
+ if (!ret)
+ ret = -EBUSY;
+ goto out_unlock;
+ }
+ WRITE_ONCE(xe->wedged.mode, mode);
+ spin_unlock_irqrestore(&xe->wedged.mode_lock, flags);
+ ret = 0;
+out_unlock:
+ mutex_unlock(&xe->wedged.mode_mutex);
return ret;
}
@@ -237,6 +455,9 @@ static void xe_wedge_fini(struct drm_device *drm, void *arg)
{
struct xe_device *xe = arg;
+ xe_wedge_prepare_fini(xe);
+ if (xe->wedged.pause_workqueue)
+ destroy_workqueue(xe->wedged.pause_workqueue);
disable_work_sync(&xe->wedged.work);
if (atomic_read(&xe->wedged.flag))
@@ -251,7 +472,12 @@ static void xe_wedge_fini(struct drm_device *drm, void *arg)
*/
int xe_wedge_init(struct xe_device *xe)
{
+ xe->wedged.pause_stopped = false;
INIT_WORK(&xe->wedged.work, wedge_work);
+ INIT_WORK(&xe->wedged.pause_work, wedge_pause_work);
+ xe->wedged.pause_workqueue = alloc_workqueue("xe_wedge_pause", WQ_UNBOUND, 1);
+ if (!xe->wedged.pause_workqueue)
+ return -ENOMEM;
xe->wedged.mode = wedge_validate_mode(xe, xe_modparam.wedged_mode) ?
XE_DEFAULT_WEDGED_MODE : xe_modparam.wedged_mode;
diff --git a/drivers/gpu/drm/xe/xe_wedge.h b/drivers/gpu/drm/xe/xe_wedge.h
index 3b5499dfc30d5..3fef49d448f54 100644
--- a/drivers/gpu/drm/xe/xe_wedge.h
+++ b/drivers/gpu/drm/xe/xe_wedge.h
@@ -18,6 +18,9 @@ static inline bool xe_wedged(struct xe_device *xe)
}
void xe_wedge_declare(struct xe_device *xe, unsigned long method);
+void xe_wedge_declare_mode3(struct xe_device *xe);
+void xe_wedge_prepare_fini(struct xe_device *xe);
+int xe_wedge_set_reply(struct xe_device *xe, u32 reply);
int xe_wedge_init(struct xe_device *xe);
int xe_wedge_set_mode(struct xe_device *xe, enum xe_wedged_mode mode);
diff --git a/drivers/gpu/drm/xe/xe_wedge_types.h b/drivers/gpu/drm/xe/xe_wedge_types.h
index e472c5fcbd266..4fe03efffbdab 100644
--- a/drivers/gpu/drm/xe/xe_wedge_types.h
+++ b/drivers/gpu/drm/xe/xe_wedge_types.h
@@ -7,6 +7,9 @@
#define _XE_WEDGE_TYPES_H_
#include <linux/types.h>
+#include <linux/mutex.h>
+#include <linux/spinlock_types.h>
+#include <linux/wait.h>
#include <linux/workqueue_types.h>
/**
@@ -18,13 +21,26 @@
* @XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET: Device will be declared wedged on
* any hang. In this mode, engine resets are disabled to avoid automatic
* recovery attempts. This mode is primarily intended for debugging hangs.
+ * @XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE: Stop submission
+ * for inspection and wait for a debugfs skip or continue response.
*/
enum xe_wedged_mode {
XE_WEDGED_MODE_NEVER = 0,
XE_WEDGED_MODE_UPON_CRITICAL_ERROR = 1,
XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET = 2,
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE = 3,
};
+/* Skip releases inspection without recovering the fault or restarting GTs. */
+#define XE_WEDGE_REPLY_CONTINUE 0xdeadbbbb
+#define XE_WEDGE_REPLY_SKIP 0xdeadf001
+
+static inline bool xe_wedge_is_hanging_on_any(enum xe_wedged_mode mode)
+{
+ return mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET ||
+ mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE;
+}
+
/**
* struct xe_wedge - Struct to control Wedged States and mode
*/
@@ -39,6 +55,33 @@ struct xe_wedge {
bool inconsistent_reset;
/** @work: Worker to defer non-atomic calls */
struct work_struct work;
+ /** @mode_mutex: Serializes mode changes and inspection teardown. */
+ struct mutex mode_mutex;
+ /** @mode_lock: Protects mode updates and inspection activation/replies. */
+ spinlock_t mode_lock;
+ /** @declare_pending: An inspection request owns the ioctl gate. */
+ atomic_t declare_pending;
+ /** @pause_work: Sleepable mode-3 stop and inspection worker. */
+ struct work_struct pause_work;
+ /** @pause_workqueue: Isolated queue for the indefinite inspection wait. */
+ struct workqueue_struct *pause_workqueue;
+ /** @pause_pm_ref: Queued worker's reference, protected by mode_lock. */
+ bool pause_pm_ref;
+ /** @pause_failed: Terminal mode-3 latch after runtime-resume failure. */
+ bool pause_failed;
+ /**
+ * @pause_stopped: Inspection stopped the GTs at least once.
+ * Remains set after SKIP or CONTINUE; neither restarts the GTs.
+ */
+ bool pause_stopped;
+ /** @pause_waitq: Wait for a reply or teardown. */
+ wait_queue_head_t pause_waitq;
+ /** @wait_active: Inspection is accepting replies under mode_lock. */
+ bool wait_active;
+ /** @shutting_down: Teardown blocks mode changes and new mode-3 requests. */
+ bool shutting_down;
+ /** @reply: Accepted debugfs response, protected by mode_lock. */
+ u32 reply;
};
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 2/3] drm/xe/wedge: preserve pending TLB invalidations during inspection
2026-11-06 22:13 [PATCH v2 0/3] drm/xe: add wedged_mode=3 fault inspection Daniel Charles
2026-11-06 22:13 ` [PATCH v2 1/3] drm/xe/wedge: add fault inspection with debugfs release Daniel Charles
@ 2026-11-06 22:13 ` Daniel Charles
2026-11-06 22:13 ` [PATCH v2 3/3] drm/xe/wedge: request inspection for additional fault paths Daniel Charles
` (4 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Daniel Charles @ 2026-11-06 22:13 UTC (permalink / raw)
To: intel-xe; +Cc: Daniel Charles
Pause TLB invalidation timeout and completion processing when the mode-3
inspection worker stops a GT. Keep pending invalidation fences unsignaled
during inspection rather than resetting them as part of the GT stop.
CONTINUE resets the preserved invalidations as part of completing permanent
wedging; SKIP leaves them paused with the GTs stopped. Ordinary GT wedging
retains its existing TLB reset behavior.
Preservation does not freeze subsequent mapping management or change the
existing cancellation and GGTT MMIO fallback behavior for new requests.
Inspection is best-effort, not an atomic snapshot.
Document that preserved fences can block process exit, unbind or unload,
and that a power cycle may be necessary. Inspection has no automatic
timeout, and SKIP does not restore normal operation.
Assisted-by: LLM
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
---
drivers/gpu/drm/xe/xe_debugfs.c | 7 ++++++
drivers/gpu/drm/xe/xe_gt.c | 2 +-
drivers/gpu/drm/xe/xe_tlb_inval.c | 33 +++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_tlb_inval.h | 1 +
drivers/gpu/drm/xe/xe_tlb_inval_types.h | 2 ++
drivers/gpu/drm/xe/xe_wedge.c | 5 ++++
drivers/gpu/drm/xe/xe_wedge_types.h | 7 +++++-
7 files changed, 55 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index 2b0b2135e0184..f5b761e89b3a2 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -749,6 +749,13 @@ void xe_debugfs_register(struct xe_device *xe)
* hibernation: releasing inspection does not restore normal operation.
* Skip is not recovery: GTs remain stopped. Inspection has no automatic
* timeout. Continue completes permanent wedging, not normal execution.
+ * TLB preservation does not freeze mapping changes or gate new
+ * invalidations. New requests may be canceled and signaled while older
+ * fences remain preserved. GGTT invalidations may still program MMIO
+ * with CT disabled; signaling on cancellation does not imply hardware
+ * completion. Inspection is best-effort, not an atomic snapshot.
+ * Preserved TLB fences may block process exit, unbind or unload; a power
+ * cycle may be necessary. Automatic recovery is not guaranteed.
*/
debugfs_create_file("wedged_pause_resume", 0200, root, xe,
&wedged_pause_resume_fops);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index a84fa80e9fa9b..8be2053e6cb01 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -1212,7 +1212,7 @@ void xe_gt_wedge_pause(struct xe_gt *gt)
{
xe_gt_assert(gt, READ_ONCE(gt_to_xe(gt)->wedged.mode) ==
XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE);
+ xe_tlb_inval_debug_pause(>->tlb_inval);
xe_uc_reset_prepare(>->uc);
xe_uc_wedge_declare(>->uc);
- xe_tlb_inval_reset(>->tlb_inval);
}
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index c9cc5842d65b6..293929f92eb0f 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -83,9 +83,17 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
long timeout_delay = tlb_inval->ops->timeout_delay(tlb_inval);
int timedout_seqno = 0, seqno_recv = 0;
+ spin_lock_irq(&tlb_inval->pending_lock);
+ if (tlb_inval->debug_paused)
+ goto out_unlock;
+ spin_unlock_irq(&tlb_inval->pending_lock);
+
tlb_inval->ops->flush(tlb_inval);
spin_lock_irq(&tlb_inval->pending_lock);
+ if (tlb_inval->debug_paused)
+ goto out_unlock;
+
list_for_each_entry_safe(fence, next,
&tlb_inval->pending_fences, link) {
s64 since_inval_ms = ktime_ms_delta(ktime_get(),
@@ -124,6 +132,7 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
queue_delayed_work(tlb_inval->timeout_wq, &tlb_inval->fence_tdr,
timeout_delay);
seqno_recv = tlb_inval->seqno_recv;
+out_unlock:
spin_unlock_irq(&tlb_inval->pending_lock);
/*
@@ -184,6 +193,7 @@ int xe_gt_tlb_inval_init_early(struct xe_gt *gt)
tlb_inval->seqno = 1;
INIT_LIST_HEAD(&tlb_inval->pending_fences);
spin_lock_init(&tlb_inval->pending_lock);
+ tlb_inval->debug_paused = false;
spin_lock_init(&tlb_inval->lock);
INIT_DELAYED_WORK(&tlb_inval->fence_tdr, xe_tlb_inval_fence_timeout);
@@ -209,6 +219,24 @@ int xe_gt_tlb_inval_init_early(struct xe_gt *gt)
return drmm_add_action_or_reset(&xe->drm, tlb_inval_fini, tlb_inval);
}
+/**
+ * xe_tlb_inval_debug_pause() - Preserve pending invalidations for inspection
+ * @tlb_inval: TLB invalidation client
+ *
+ * A reset ends this pause even while inspection waits for a reply.
+ * Holding a runtime PM reference does not prevent system suspend.
+ */
+void xe_tlb_inval_debug_pause(struct xe_tlb_inval *tlb_inval)
+{
+ if (!tlb_inval->ops->initialized(tlb_inval))
+ return;
+
+ spin_lock_irq(&tlb_inval->pending_lock);
+ tlb_inval->debug_paused = true;
+ cancel_delayed_work(&tlb_inval->fence_tdr);
+ spin_unlock_irq(&tlb_inval->pending_lock);
+}
+
/**
* xe_tlb_inval_reset() - TLB invalidation reset
* @tlb_inval: TLB invalidation client
@@ -235,6 +263,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval)
mutex_lock(&tlb_inval->seqno_lock);
spin_lock_irq(&tlb_inval->pending_lock);
+ tlb_inval->debug_paused = false;
cancel_delayed_work(&tlb_inval->fence_tdr);
/*
* We might have various kworkers waiting for TLB flushes to complete
@@ -464,6 +493,10 @@ void xe_tlb_inval_done_handler(struct xe_tlb_inval *tlb_inval, int seqno)
* process_g2h_msg().
*/
spin_lock_irqsave(&tlb_inval->pending_lock, flags);
+ if (tlb_inval->debug_paused) {
+ spin_unlock_irqrestore(&tlb_inval->pending_lock, flags);
+ return;
+ }
if (seqno == TLB_INVALIDATION_SEQNO_INVALID) {
xe_tlb_inval_reset_timeout(tlb_inval);
spin_unlock_irqrestore(&tlb_inval->pending_lock, flags);
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
index 665072b4b81dc..65bb2f6e530b5 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
@@ -17,6 +17,7 @@ struct xe_vm;
int xe_gt_tlb_inval_init_early(struct xe_gt *gt);
void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval);
+void xe_tlb_inval_debug_pause(struct xe_tlb_inval *tlb_inval);
int xe_tlb_inval_all(struct xe_tlb_inval *tlb_inval,
struct xe_tlb_inval_fence *fence);
int xe_tlb_inval_ggtt(struct xe_tlb_inval *tlb_inval);
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
index 80d2019fa20b4..7ccd66c2eea7a 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
@@ -112,6 +112,8 @@ struct xe_tlb_inval {
* @pending_lock: protects @pending_fences and updating @seqno_recv.
*/
spinlock_t pending_lock;
+ /** @debug_paused: Preserve mode-3 pending state under pending_lock. */
+ bool debug_paused;
/**
* @timedout_seqno: seqno of the most recent timed out TLB
* invalidation, 0 if none. Used to measure how late the ack for a
diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
index 8bfe0e2775d29..09ca1708fe5a5 100644
--- a/drivers/gpu/drm/xe/xe_wedge.c
+++ b/drivers/gpu/drm/xe/xe_wedge.c
@@ -17,6 +17,7 @@
#include "xe_pm.h"
#include "xe_printk.h"
#include "xe_sriov.h"
+#include "xe_tlb_inval.h"
#include "xe_wedge.h"
/**
@@ -115,6 +116,9 @@ static void wedge_declare_now(struct xe_device *xe, unsigned long method,
if (!gts_already_wedged) {
for_each_initialized_gt(gt, xe, id)
xe_gt_wedge_declare(gt);
+ } else {
+ for_each_initialized_gt(gt, xe, id)
+ xe_tlb_inval_reset(>->tlb_inval);
}
/*
@@ -208,6 +212,7 @@ static void wedge_pause_work(struct work_struct *work)
xe_err(xe, "GT submission stopped for mode-3 hardware debugging.\n"
"New DRM ioctls are blocked while waiting for 'wedged_pause_resume'.\n"
+ "Pending TLB invalidations are preserved until continue or another reset.\n"
"Skip: 0x%08x; continue into permanent wedge: 0x%08x.\n"
"Skip does not restart GTs or recover the fault.\n",
XE_WEDGE_REPLY_SKIP, XE_WEDGE_REPLY_CONTINUE);
diff --git a/drivers/gpu/drm/xe/xe_wedge_types.h b/drivers/gpu/drm/xe/xe_wedge_types.h
index 4fe03efffbdab..34d6d1b471271 100644
--- a/drivers/gpu/drm/xe/xe_wedge_types.h
+++ b/drivers/gpu/drm/xe/xe_wedge_types.h
@@ -31,7 +31,12 @@ enum xe_wedged_mode {
XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE = 3,
};
-/* Skip releases inspection without recovering the fault or restarting GTs. */
+/*
+ * Skip releases inspection without recovering the fault or restarting GTs.
+ * Pending TLB invalidations remain paused; fence waiters may block indefinitely.
+ * Later resets are possible, but automatic recovery is not guaranteed.
+ * Continue resets deferred invalidations and completes permanent wedging.
+ */
#define XE_WEDGE_REPLY_CONTINUE 0xdeadbbbb
#define XE_WEDGE_REPLY_SKIP 0xdeadf001
--
2.43.0
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 3/3] drm/xe/wedge: request inspection for additional fault paths
2026-11-06 22:13 [PATCH v2 0/3] drm/xe: add wedged_mode=3 fault inspection Daniel Charles
2026-11-06 22:13 ` [PATCH v2 1/3] drm/xe/wedge: add fault inspection with debugfs release Daniel Charles
2026-11-06 22:13 ` [PATCH v2 2/3] drm/xe/wedge: preserve pending TLB invalidations during inspection Daniel Charles
@ 2026-11-06 22:13 ` Daniel Charles
2026-11-06 22:40 ` ✗ CI.checkpatch: warning for drm/xe: add wedged_mode=3 fault inspection Patchwork
` (3 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Daniel Charles @ 2026-11-06 22:13 UTC (permalink / raw)
To: intel-xe; +Cc: Daniel Charles
Request mode-3 inspection for unsuccessful pagefault service, GuC memory
CAT errors, and TLB invalidation fence timeouts. Keep the resume-failure
fallback with the TLB timeout trigger so a failed inspection resume
restores normal timeout handling and completes expired fences with -ETIME.
Preserve the existing TLB timeout diagnostics outside inspection.
Defer timeout processing for a pending pause only while the inspection
request remains pending and resume has not failed. If inspection exits
before taking over the pause, clear stale pause flags and resume normal
timeout handling rather than rearming indefinitely. Preserve indefinite
deferral once inspection has taken over.
For MMIO-enabled RAS reset requests, request or join inspection and wait
before preparing PCI reset or disabling the device. Reuse the framework's
one-shot GT-stop state to decline this device's reset request after SKIP
or CONTINUE. Fall back to normal recovery if inspection aborts before
stopping GTs, except during teardown. Release mode_mutex before waiting
so teardown can abort inspection.
Keep the existing separation between synchronous inspection-only GT
stopping and asynchronous ordinary GT wedging, including the PCI reset
path's worker flushes. Leave frozen-channel recovery and other wedge
modes unchanged.
Inspection can stall shared PCI recovery indefinitely and cannot prevent
resets forced by the PCI core or requested by other devices. The timeout
cleanup does not make CONTINUE safe after an intervening reset or prevent
reset/resume during inspection. Reference the SKIP and CONTINUE reply
constants in the debugfs documentation.
Assisted-by: LLM
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
---
drivers/gpu/drm/xe/xe_debugfs.c | 5 ++--
drivers/gpu/drm/xe/xe_guc_submit.c | 6 +++-
drivers/gpu/drm/xe/xe_pagefault.c | 3 ++
drivers/gpu/drm/xe/xe_pci_error.c | 11 +++++++
drivers/gpu/drm/xe/xe_tlb_inval.c | 38 ++++++++++++++++++++++---
drivers/gpu/drm/xe/xe_tlb_inval_types.h | 2 ++
drivers/gpu/drm/xe/xe_wedge.c | 35 ++++++++++++++++++++++-
drivers/gpu/drm/xe/xe_wedge.h | 1 +
8 files changed, 93 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index f5b761e89b3a2..fa341aa001e68 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -747,8 +747,9 @@ void xe_debugfs_register(struct xe_device *xe)
* autosuspend by writing "on" to the PCI device's power/control sysfs
* attribute. Keep it disabled after SKIP and avoid system suspend and
* hibernation: releasing inspection does not restore normal operation.
- * Skip is not recovery: GTs remain stopped. Inspection has no automatic
- * timeout. Continue completes permanent wedging, not normal execution.
+ * XE_WEDGE_REPLY_SKIP (SKIP) is not recovery: GTs remain stopped.
+ * Inspection has no automatic timeout. XE_WEDGE_REPLY_CONTINUE
+ * (CONTINUE) completes permanent wedging, not normal execution.
* TLB preservation does not freeze mapping changes or gate new
* invalidations. New requests may be canceled and signaled while older
* fences remain preserved. GGTT invalidations may still program MMIO
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 30adaf9900cb7..b4799709c34fb 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -3580,12 +3580,15 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
* context. In such case only PF will be notified about that fault.
*/
xe_gt_err_ratelimited(gt, "Memory CAT error reported by GuC!\n");
+ xe_wedge_declare_mode3(gt_to_xe(gt));
return 0;
}
q = g2h_exec_queue_lookup(guc, guc_id);
- if (unlikely(!q))
+ if (unlikely(!q)) {
+ xe_wedge_declare_mode3(gt_to_xe(gt));
return -EPROTO;
+ }
/*
* The type is HW-defined and changes based on platform, so we don't
@@ -3602,6 +3605,7 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
trace_xe_exec_queue_memory_cat_error(q);
+ xe_wedge_declare_mode3(gt_to_xe(gt));
/* Treat the same as engine reset */
xe_guc_exec_queue_reset_trigger_cleanup(q);
diff --git a/drivers/gpu/drm/xe/xe_pagefault.c b/drivers/gpu/drm/xe/xe_pagefault.c
index 5247321c805ec..8f96252cd0188 100644
--- a/drivers/gpu/drm/xe/xe_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_pagefault.c
@@ -21,6 +21,7 @@
#include "xe_svm.h"
#include "xe_trace_bo.h"
#include "xe_vm.h"
+#include "xe_wedge.h"
/**
* DOC: Xe page faults
@@ -705,10 +706,12 @@ static void xe_pagefault_queue_work(struct work_struct *w)
xe_pagefault_cache_start_invalidate(cache_start);
xe_pagefault_print(pf);
xe_log_err_info(pf->gt, PAGEFAULT, err, "Unsuccessful response\n");
+ xe_wedge_declare_mode3(xe);
} else {
xe_gt_stats_incr(pf->gt, XE_GT_STATS_ID_INVALID_PREFETCH_PAGEFAULT_COUNT, 1);
xe_gt_dbg(pf->gt, "Prefetch Fault response: Unsuccessful %pe\n",
ERR_PTR(err));
+ xe_wedge_declare_mode3(xe);
}
} else {
/* Cache valid fault locally */
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 9bf0da3a3d152..b04c20a7ba28e 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -93,6 +93,17 @@ static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
return PCI_ERS_RESULT_DISCONNECT;
}
+ /*
+ * Wait before reset preparation changes device state or disables PCI.
+ * Neither inspection reply recovers the GTs, so decline our reset request.
+ * Frozen-channel recovery bypasses this callback and may force a reset.
+ */
+ if (action == XE_RAS_RECOVERY_ACTION_RESET &&
+ xe_wedge_mode3_wait(xe)) {
+ xe_info(xe, "PCI recovery stopped after mode-3 inspection or teardown; not requesting reset\n");
+ return PCI_ERS_RESULT_DISCONNECT;
+ }
+
return ras_action_to_pci_result(pdev, action);
}
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index 293929f92eb0f..0d7fdce82956e 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -17,6 +17,7 @@
#include "xe_printk.h"
#include "xe_tlb_inval.h"
#include "xe_trace.h"
+#include "xe_wedge.h"
/**
* DOC: Xe TLB invalidation
@@ -84,15 +85,29 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
int timedout_seqno = 0, seqno_recv = 0;
spin_lock_irq(&tlb_inval->pending_lock);
- if (tlb_inval->debug_paused)
- goto out_unlock;
+ if (tlb_inval->debug_paused) {
+ if (!tlb_inval->debug_pause_pending)
+ goto out_unlock;
+ if (!READ_ONCE(xe->wedged.pause_failed) &&
+ atomic_read(&xe->wedged.declare_pending))
+ goto out_rearm;
+ tlb_inval->debug_paused = false;
+ tlb_inval->debug_pause_pending = false;
+ }
spin_unlock_irq(&tlb_inval->pending_lock);
tlb_inval->ops->flush(tlb_inval);
spin_lock_irq(&tlb_inval->pending_lock);
- if (tlb_inval->debug_paused)
- goto out_unlock;
+ if (tlb_inval->debug_paused) {
+ if (!tlb_inval->debug_pause_pending)
+ goto out_unlock;
+ if (!READ_ONCE(xe->wedged.pause_failed) &&
+ atomic_read(&xe->wedged.declare_pending))
+ goto out_rearm;
+ tlb_inval->debug_paused = false;
+ tlb_inval->debug_pause_pending = false;
+ }
list_for_each_entry_safe(fence, next,
&tlb_inval->pending_fences, link) {
@@ -106,6 +121,17 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
drm_err(&xe->drm,
"TLB invalidation fence timeout, seqno=%d recv=%d",
fence->seqno, tlb_inval->seqno_recv);
+ if (!READ_ONCE(xe->wedged.pause_failed))
+ xe_wedge_declare_mode3(xe);
+ if (!READ_ONCE(xe->wedged.pause_failed) &&
+ READ_ONCE(xe->wedged.mode) ==
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE &&
+ atomic_read(&xe->wedged.declare_pending)) {
+ tlb_inval->debug_paused = true;
+ tlb_inval->debug_pause_pending = true;
+ /* Keep timeout processing until inspection owns the pause. */
+ goto out_rearm;
+ }
if (!timedout_seqno) {
/*
@@ -128,6 +154,7 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
fence->base.error = -ETIME;
xe_tlb_inval_fence_signal(fence);
}
+out_rearm:
if (!list_empty(&tlb_inval->pending_fences))
queue_delayed_work(tlb_inval->timeout_wq, &tlb_inval->fence_tdr,
timeout_delay);
@@ -194,6 +221,7 @@ int xe_gt_tlb_inval_init_early(struct xe_gt *gt)
INIT_LIST_HEAD(&tlb_inval->pending_fences);
spin_lock_init(&tlb_inval->pending_lock);
tlb_inval->debug_paused = false;
+ tlb_inval->debug_pause_pending = false;
spin_lock_init(&tlb_inval->lock);
INIT_DELAYED_WORK(&tlb_inval->fence_tdr, xe_tlb_inval_fence_timeout);
@@ -233,6 +261,7 @@ void xe_tlb_inval_debug_pause(struct xe_tlb_inval *tlb_inval)
spin_lock_irq(&tlb_inval->pending_lock);
tlb_inval->debug_paused = true;
+ tlb_inval->debug_pause_pending = false;
cancel_delayed_work(&tlb_inval->fence_tdr);
spin_unlock_irq(&tlb_inval->pending_lock);
}
@@ -264,6 +293,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval)
mutex_lock(&tlb_inval->seqno_lock);
spin_lock_irq(&tlb_inval->pending_lock);
tlb_inval->debug_paused = false;
+ tlb_inval->debug_pause_pending = false;
cancel_delayed_work(&tlb_inval->fence_tdr);
/*
* We might have various kworkers waiting for TLB flushes to complete
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
index 7ccd66c2eea7a..8e8cb115c9af8 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
@@ -114,6 +114,8 @@ struct xe_tlb_inval {
spinlock_t pending_lock;
/** @debug_paused: Preserve mode-3 pending state under pending_lock. */
bool debug_paused;
+ /** @debug_pause_pending: Worker has not taken over; under pending_lock. */
+ bool debug_pause_pending;
/**
* @timedout_seqno: seqno of the most recent timed out TLB
* invalidation, 0 if none. Used to measure how late the ack for a
diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
index 09ca1708fe5a5..1112944af3df3 100644
--- a/drivers/gpu/drm/xe/xe_wedge.c
+++ b/drivers/gpu/drm/xe/xe_wedge.c
@@ -189,7 +189,7 @@ static void wedge_pause_work(struct work_struct *work)
if (!pm_ref) {
xe_warn(xe, "Mode-3 wedge could not retain active runtime PM; resuming for inspection, hardware state may have changed\n");
if (!xe_pm_runtime_resume_and_get(xe)) {
- xe_err(xe, "Failed to resume device for mode-3 inspection; aborting pause\n");
+ xe_err(xe, "Failed to resume device for mode-3 inspection; restoring TLB timeout handling\n");
spin_lock_irqsave(&xe->wedged.mode_lock, flags);
WRITE_ONCE(xe->wedged.pause_failed, true);
atomic_set(&xe->wedged.declare_pending, 0);
@@ -301,6 +301,39 @@ void xe_wedge_declare_mode3(struct xe_device *xe)
wedge_request(xe, DRM_WEDGE_RECOVERY_NONE, true);
}
+/**
+ * xe_wedge_mode3_wait() - Inspect a recoverable PCI error before reset
+ * @xe: Device with accessible MMIO, kept alive by the caller
+ *
+ * Request or join mode-3 inspection and wait for its worker to finish.
+ * Do not hold mode_mutex while waiting; teardown needs it to abort inspection.
+ * Waiting has no timeout and can stall recovery and removal of devices in the
+ * same PCI hierarchy. Other devices can request reset after this callback
+ * returns; frozen-channel recovery can force reset regardless of our vote.
+ *
+ * Return: true if reset must be declined because inspection stopped the GTs,
+ * the device is wedged, or teardown started. Otherwise, normal recovery may
+ * proceed.
+ */
+bool xe_wedge_mode3_wait(struct xe_device *xe)
+{
+ mutex_lock(&xe->wedged.mode_mutex);
+ if (READ_ONCE(xe->wedged.mode) !=
+ XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET_WAIT_FOR_RELEASE) {
+ mutex_unlock(&xe->wedged.mode_mutex);
+ return false;
+ }
+
+ if (!READ_ONCE(xe->wedged.pause_stopped) && !xe_wedged(xe))
+ xe_wedge_declare_mode3(xe);
+ mutex_unlock(&xe->wedged.mode_mutex);
+
+ flush_work(&xe->wedged.pause_work);
+
+ return READ_ONCE(xe->wedged.pause_stopped) ||
+ READ_ONCE(xe->wedged.shutting_down) || xe_wedged(xe);
+}
+
/**
* xe_wedge_prepare_fini() - Release and join mode-3 inspection before teardown
* @xe: Xe device
diff --git a/drivers/gpu/drm/xe/xe_wedge.h b/drivers/gpu/drm/xe/xe_wedge.h
index 3fef49d448f54..c74cb0ec42c89 100644
--- a/drivers/gpu/drm/xe/xe_wedge.h
+++ b/drivers/gpu/drm/xe/xe_wedge.h
@@ -19,6 +19,7 @@ static inline bool xe_wedged(struct xe_device *xe)
void xe_wedge_declare(struct xe_device *xe, unsigned long method);
void xe_wedge_declare_mode3(struct xe_device *xe);
+bool xe_wedge_mode3_wait(struct xe_device *xe);
void xe_wedge_prepare_fini(struct xe_device *xe);
int xe_wedge_set_reply(struct xe_device *xe, u32 reply);
int xe_wedge_init(struct xe_device *xe);
--
2.43.0
^ permalink raw reply related [flat|nested] 9+ messages in thread* ✓ CI.KUnit: success for drm/xe: add wedged_mode=3 fault inspection
2026-11-06 22:13 [PATCH v2 0/3] drm/xe: add wedged_mode=3 fault inspection Daniel Charles
` (3 preceding siblings ...)
2026-11-06 22:40 ` ✗ CI.checkpatch: warning for drm/xe: add wedged_mode=3 fault inspection Patchwork
@ 2026-11-06 22:42 ` Patchwork
2026-11-06 23:16 ` ✓ Xe.CI.BAT: " Patchwork
2026-11-08 3:36 ` ✗ Xe.CI.FULL: failure " Patchwork
6 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2026-11-06 22:42 UTC (permalink / raw)
To: Daniel Charles; +Cc: intel-xe
== Series Details ==
Series: drm/xe: add wedged_mode=3 fault inspection
URL : https://patchwork.freedesktop.org/series/178025/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[22:40:40] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:40:45] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:41:05] Starting KUnit Kernel (1/1)...
[22:41:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:41:05] ================= gpu_buddy (14 subtests) ==================
[22:41:05] [PASSED] gpu_test_buddy_alloc_limit
[22:41:05] [PASSED] gpu_test_buddy_alloc_optimistic
[22:41:05] [PASSED] gpu_test_buddy_alloc_pessimistic
[22:41:05] [PASSED] gpu_test_buddy_alloc_pathological
[22:41:05] [PASSED] gpu_test_buddy_alloc_contiguous
[22:41:05] [PASSED] gpu_test_buddy_alloc_clear
[22:41:05] [PASSED] gpu_test_buddy_alloc_range
[22:41:06] [PASSED] gpu_test_buddy_alloc_range_bias
[22:41:06] [PASSED] gpu_test_buddy_fragmentation_performance
[22:41:07] [PASSED] gpu_test_buddy_dirty_tracker_performance
[22:41:07] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[22:41:07] [PASSED] gpu_test_buddy_offset_aligned_allocation
[22:41:07] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[22:41:07] [PASSED] gpu_test_buddy_addr_to_block
[22:41:07] ==================== [PASSED] gpu_buddy ====================
[22:41:07] ============================================================
[22:41:07] Testing complete. Ran 14 tests: passed: 14
[22:41:07] Elapsed time: 27.361s total, 5.189s configuring, 20.254s building, 1.872s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[22:41:07] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:41:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:41:48] Starting KUnit Kernel (1/1)...
[22:41:48] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:41:48] ================== guc_buf (11 subtests) ===================
[22:41:48] [PASSED] test_smallest
[22:41:48] [PASSED] test_largest
[22:41:48] [PASSED] test_granular
[22:41:48] [PASSED] test_unique
[22:41:48] [PASSED] test_overlap
[22:41:48] [PASSED] test_reusable
[22:41:48] [PASSED] test_too_big
[22:41:48] [PASSED] test_flush
[22:41:48] [PASSED] test_lookup
[22:41:48] [PASSED] test_data
[22:41:48] [PASSED] test_class
[22:41:48] ===================== [PASSED] guc_buf =====================
[22:41:48] =================== guc_dbm (7 subtests) ===================
[22:41:48] [PASSED] test_empty
[22:41:48] [PASSED] test_default
[22:41:48] ======================== test_size ========================
[22:41:48] [PASSED] 4
[22:41:48] [PASSED] 8
[22:41:48] [PASSED] 32
[22:41:48] [PASSED] 256
[22:41:48] ==================== [PASSED] test_size ====================
[22:41:48] ======================= test_reuse ========================
[22:41:48] [PASSED] 4
[22:41:48] [PASSED] 8
[22:41:48] [PASSED] 32
[22:41:48] [PASSED] 256
[22:41:48] =================== [PASSED] test_reuse ====================
[22:41:48] =================== test_range_overlap ====================
[22:41:48] [PASSED] 4
[22:41:48] [PASSED] 8
[22:41:48] [PASSED] 32
[22:41:48] [PASSED] 256
[22:41:48] =============== [PASSED] test_range_overlap ================
[22:41:48] =================== test_range_compact ====================
[22:41:48] [PASSED] 4
[22:41:48] [PASSED] 8
[22:41:48] [PASSED] 32
[22:41:48] [PASSED] 256
[22:41:48] =============== [PASSED] test_range_compact ================
[22:41:48] ==================== test_range_spare =====================
[22:41:48] [PASSED] 4
[22:41:48] [PASSED] 8
[22:41:48] [PASSED] 32
[22:41:48] [PASSED] 256
[22:41:48] ================ [PASSED] test_range_spare =================
[22:41:48] ===================== [PASSED] guc_dbm =====================
[22:41:48] ================== guc_idm (22 subtests) ===================
[22:41:48] [PASSED] bad_init
[22:41:48] [PASSED] no_init
[22:41:48] [PASSED] init_fini
[22:41:48] [PASSED] check_init_small
[22:41:48] [PASSED] check_init_shared
[22:41:48] [PASSED] check_used
[22:41:48] [PASSED] check_quota
[22:41:48] [PASSED] check_all
[22:41:48] [PASSED] check_limits
[22:41:48] [PASSED] check_overlap
[22:41:48] [PASSED] check_overlap_alloc
[22:41:48] [PASSED] check_overlap_release
[22:41:48] [PASSED] check_overlap_partial_init
[22:41:48] [PASSED] check_overlap_partial_shared_range_blocking
[22:41:48] [PASSED] check_used_usable
[22:41:48] [PASSED] check_used_shareable
[22:41:48] [PASSED] check_used_mixed
[22:41:48] [PASSED] check_release_usable_range
[22:41:48] [PASSED] check_release_shareable_range
[22:41:48] [PASSED] check_split_boundaries
[22:41:48] [PASSED] check_shareable_spare
[22:41:48] [PASSED] check_shareable_spare_fragmented_tail
[22:41:48] ===================== [PASSED] guc_idm =====================
[22:41:48] ============== guc_klv_helpers (13 subtests) ===============
[22:41:48] [PASSED] test_count
[22:41:48] [PASSED] test_encode_u32
[22:41:48] [PASSED] test_encode_u64
[22:41:48] [PASSED] test_encode_string
[22:41:48] [PASSED] test_encode_object_raw
[22:41:48] [PASSED] test_encode_object_klv
[22:41:48] [PASSED] test_encode_object_nested
[22:41:48] [PASSED] test_encode_object_basic
[22:41:48] ===================== test_decode_u16 =====================
[22:41:48] [PASSED] empty
[22:41:48] [PASSED] valid
[22:41:48] [PASSED] max
[22:41:48] [PASSED] big
[22:41:48] [PASSED] long
[22:41:48] ================= [PASSED] test_decode_u16 =================
[22:41:48] ===================== test_decode_u32 =====================
[22:41:48] [PASSED] empty
[22:41:48] [PASSED] valid
[22:41:48] [PASSED] max
[22:41:48] [PASSED] long
[22:41:48] ================= [PASSED] test_decode_u32 =================
[22:41:48] ===================== test_decode_u64 =====================
[22:41:48] [PASSED] empty
[22:41:48] [PASSED] short
[22:41:48] [PASSED] valid
[22:41:48] [PASSED] max
[22:41:48] [PASSED] long
[22:41:48] ================= [PASSED] test_decode_u64 =================
[22:41:48] ===================== test_decode_str =====================
[22:41:48] [PASSED] empty
[22:41:48] [PASSED] one
[22:41:48] [PASSED] one_trash
[22:41:48] [PASSED] two
[22:41:48] [PASSED] two_trash
[22:41:48] [PASSED] three
[22:41:48] [PASSED] dword
[22:41:48] [PASSED] four
[22:41:48] [PASSED] five
[22:41:48] [PASSED] six
[22:41:48] [PASSED] seven
[22:41:48] [PASSED] qword
[22:41:48] ================= [PASSED] test_decode_str =================
[22:41:48] [PASSED] test_print
[22:41:48] ================= [PASSED] guc_klv_helpers =================
[22:41:48] =================== xe_log (4 subtests) ====================
[22:41:48] [PASSED] demo_cper
[22:41:48] [PASSED] demo_dmesg
[22:41:48] ======================= test_dmesg ========================
[22:41:48] [PASSED] test_fatal
[22:41:48] [PASSED] test_fatal_tile
[22:41:48] [PASSED] test_fatal_gt
[22:41:48] [PASSED] test_fatal_comp
[22:41:48] [PASSED] test_fatal_comp_tile
[22:41:48] [PASSED] test_fatal_comp_gt
[22:41:48] [PASSED] test_fatal_all
[22:41:48] [PASSED] test_recoverable
[22:41:48] [PASSED] test_recoverable_tile
[22:41:48] [PASSED] test_recoverable_gt
[22:41:48] [PASSED] test_recoverable_comp
[22:41:48] [PASSED] test_recoverable_comp_tile
[22:41:48] [PASSED] test_recoverable_comp_gt
[22:41:48] [PASSED] test_recoverable_all
[22:41:48] [PASSED] test_info
[22:41:48] [PASSED] test_info_tile
[22:41:48] [PASSED] test_info_gt
[22:41:48] [PASSED] test_info_err
[22:41:48] [PASSED] test_info_comp
[22:41:48] [PASSED] test_info_comp_tile
[22:41:48] [PASSED] test_info_comp_gt
[22:41:48] [PASSED] test_info_all
[22:41:48] [PASSED] test_hw_fatal
[22:41:48] [PASSED] test_hw_recoverable
[22:41:48] [PASSED] test_hw_corrected
[22:41:48] [PASSED] test_hw_informational
[22:41:48] =================== [PASSED] test_dmesg ====================
[22:41:48] ====================== test_invalid =======================
[22:41:48] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[22:41:48] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[22:41:48] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[22:41:48] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[22:41:48] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[22:41:48] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[22:41:48] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[22:41:48] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[22:41:48] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[22:41:48] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[22:41:48] ================== [SKIPPED] test_invalid ==================
[22:41:48] ===================== [PASSED] xe_log ======================
[22:41:48] ================== no_relay (3 subtests) ===================
[22:41:48] [PASSED] xe_drops_guc2pf_if_not_ready
[22:41:48] [PASSED] xe_drops_guc2vf_if_not_ready
[22:41:48] [PASSED] xe_rejects_send_if_not_ready
[22:41:48] ==================== [PASSED] no_relay =====================
[22:41:48] ================== pf_relay (14 subtests) ==================
[22:41:48] [PASSED] pf_rejects_guc2pf_too_short
[22:41:48] [PASSED] pf_rejects_guc2pf_too_long
[22:41:48] [PASSED] pf_rejects_guc2pf_no_payload
[22:41:48] [PASSED] pf_fails_no_payload
[22:41:48] [PASSED] pf_fails_bad_origin
[22:41:48] [PASSED] pf_fails_bad_type
[22:41:48] [PASSED] pf_txn_reports_error
[22:41:48] [PASSED] pf_txn_sends_pf2guc
[22:41:48] [PASSED] pf_sends_pf2guc
[22:41:48] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:41:48] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:41:48] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:41:48] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:41:48] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:41:48] ==================== [PASSED] pf_relay =====================
[22:41:48] ================== vf_relay (3 subtests) ===================
[22:41:48] [PASSED] vf_rejects_guc2vf_too_short
[22:41:48] [PASSED] vf_rejects_guc2vf_too_long
[22:41:48] [PASSED] vf_rejects_guc2vf_no_payload
[22:41:48] ==================== [PASSED] vf_relay =====================
[22:41:48] ================ pf_gt_config (9 subtests) =================
[22:41:48] [PASSED] fair_contexts_1vf
[22:41:48] [PASSED] fair_doorbells_1vf
[22:41:48] [PASSED] fair_ggtt_1vf
[22:41:48] ====================== fair_vram_1vf ======================
[22:41:48] [PASSED] 3.50 GiB
[22:41:48] [PASSED] 11.5 GiB
[22:41:48] [PASSED] 15.5 GiB
[22:41:48] [PASSED] 31.5 GiB
[22:41:48] [PASSED] 63.5 GiB
[22:41:48] [PASSED] 1.91 GiB
[22:41:48] ================== [PASSED] fair_vram_1vf ==================
[22:41:48] ================ fair_vram_1vf_admin_only =================
[22:41:48] [PASSED] 3.50 GiB
[22:41:48] [PASSED] 11.5 GiB
[22:41:48] [PASSED] 15.5 GiB
[22:41:48] [PASSED] 31.5 GiB
[22:41:48] [PASSED] 63.5 GiB
[22:41:48] [PASSED] 1.91 GiB
[22:41:48] ============ [PASSED] fair_vram_1vf_admin_only =============
[22:41:48] ====================== fair_contexts ======================
[22:41:48] [PASSED] 1 VF
[22:41:48] [PASSED] 2 VFs
[22:41:48] [PASSED] 3 VFs
[22:41:48] [PASSED] 4 VFs
[22:41:48] [PASSED] 5 VFs
[22:41:48] [PASSED] 6 VFs
[22:41:48] [PASSED] 7 VFs
[22:41:48] [PASSED] 8 VFs
[22:41:48] [PASSED] 9 VFs
[22:41:48] [PASSED] 10 VFs
[22:41:48] [PASSED] 11 VFs
[22:41:48] [PASSED] 12 VFs
[22:41:48] [PASSED] 13 VFs
[22:41:48] [PASSED] 14 VFs
[22:41:48] [PASSED] 15 VFs
[22:41:48] [PASSED] 16 VFs
[22:41:48] [PASSED] 17 VFs
[22:41:48] [PASSED] 18 VFs
[22:41:48] [PASSED] 19 VFs
[22:41:48] [PASSED] 20 VFs
[22:41:48] [PASSED] 21 VFs
[22:41:48] [PASSED] 22 VFs
[22:41:48] [PASSED] 23 VFs
[22:41:48] [PASSED] 24 VFs
[22:41:48] [PASSED] 25 VFs
[22:41:48] [PASSED] 26 VFs
[22:41:48] [PASSED] 27 VFs
[22:41:48] [PASSED] 28 VFs
[22:41:48] [PASSED] 29 VFs
[22:41:48] [PASSED] 30 VFs
[22:41:48] [PASSED] 31 VFs
[22:41:48] [PASSED] 32 VFs
[22:41:48] [PASSED] 33 VFs
[22:41:48] [PASSED] 34 VFs
[22:41:48] [PASSED] 35 VFs
[22:41:48] [PASSED] 36 VFs
[22:41:48] [PASSED] 37 VFs
[22:41:48] [PASSED] 38 VFs
[22:41:48] [PASSED] 39 VFs
[22:41:48] [PASSED] 40 VFs
[22:41:48] [PASSED] 41 VFs
[22:41:48] [PASSED] 42 VFs
[22:41:48] [PASSED] 43 VFs
[22:41:48] [PASSED] 44 VFs
[22:41:48] [PASSED] 45 VFs
[22:41:48] [PASSED] 46 VFs
[22:41:48] [PASSED] 47 VFs
[22:41:48] [PASSED] 48 VFs
[22:41:48] [PASSED] 49 VFs
[22:41:48] [PASSED] 50 VFs
[22:41:48] [PASSED] 51 VFs
[22:41:48] [PASSED] 52 VFs
[22:41:48] [PASSED] 53 VFs
[22:41:48] [PASSED] 54 VFs
[22:41:48] [PASSED] 55 VFs
[22:41:48] [PASSED] 56 VFs
[22:41:48] [PASSED] 57 VFs
[22:41:48] [PASSED] 58 VFs
[22:41:48] [PASSED] 59 VFs
[22:41:48] [PASSED] 60 VFs
[22:41:48] [PASSED] 61 VFs
[22:41:48] [PASSED] 62 VFs
[22:41:48] [PASSED] 63 VFs
[22:41:48] ================== [PASSED] fair_contexts ==================
[22:41:48] ===================== fair_doorbells ======================
[22:41:48] [PASSED] 1 VF
[22:41:48] [PASSED] 2 VFs
[22:41:48] [PASSED] 3 VFs
[22:41:48] [PASSED] 4 VFs
[22:41:48] [PASSED] 5 VFs
[22:41:48] [PASSED] 6 VFs
[22:41:48] [PASSED] 7 VFs
[22:41:48] [PASSED] 8 VFs
[22:41:48] [PASSED] 9 VFs
[22:41:48] [PASSED] 10 VFs
[22:41:48] [PASSED] 11 VFs
[22:41:48] [PASSED] 12 VFs
[22:41:48] [PASSED] 13 VFs
[22:41:48] [PASSED] 14 VFs
[22:41:48] [PASSED] 15 VFs
[22:41:48] [PASSED] 16 VFs
[22:41:48] [PASSED] 17 VFs
[22:41:48] [PASSED] 18 VFs
[22:41:48] [PASSED] 19 VFs
[22:41:48] [PASSED] 20 VFs
[22:41:48] [PASSED] 21 VFs
[22:41:48] [PASSED] 22 VFs
[22:41:48] [PASSED] 23 VFs
[22:41:48] [PASSED] 24 VFs
[22:41:48] [PASSED] 25 VFs
[22:41:48] [PASSED] 26 VFs
[22:41:48] [PASSED] 27 VFs
[22:41:48] [PASSED] 28 VFs
[22:41:48] [PASSED] 29 VFs
[22:41:48] [PASSED] 30 VFs
[22:41:48] [PASSED] 31 VFs
[22:41:48] [PASSED] 32 VFs
[22:41:48] [PASSED] 33 VFs
[22:41:48] [PASSED] 34 VFs
[22:41:48] [PASSED] 35 VFs
[22:41:48] [PASSED] 36 VFs
[22:41:48] [PASSED] 37 VFs
[22:41:48] [PASSED] 38 VFs
[22:41:48] [PASSED] 39 VFs
[22:41:48] [PASSED] 40 VFs
[22:41:48] [PASSED] 41 VFs
[22:41:48] [PASSED] 42 VFs
[22:41:48] [PASSED] 43 VFs
[22:41:48] [PASSED] 44 VFs
[22:41:48] [PASSED] 45 VFs
[22:41:48] [PASSED] 46 VFs
[22:41:48] [PASSED] 47 VFs
[22:41:48] [PASSED] 48 VFs
[22:41:48] [PASSED] 49 VFs
[22:41:48] [PASSED] 50 VFs
[22:41:48] [PASSED] 51 VFs
[22:41:48] [PASSED] 52 VFs
[22:41:48] [PASSED] 53 VFs
[22:41:48] [PASSED] 54 VFs
[22:41:48] [PASSED] 55 VFs
[22:41:48] [PASSED] 56 VFs
[22:41:48] [PASSED] 57 VFs
[22:41:48] [PASSED] 58 VFs
[22:41:48] [PASSED] 59 VFs
[22:41:48] [PASSED] 60 VFs
[22:41:48] [PASSED] 61 VFs
[22:41:48] [PASSED] 62 VFs
[22:41:48] [PASSED] 63 VFs
[22:41:48] ================= [PASSED] fair_doorbells ==================
[22:41:48] ======================== fair_ggtt ========================
[22:41:48] [PASSED] 1 VF
[22:41:48] [PASSED] 2 VFs
[22:41:48] [PASSED] 3 VFs
[22:41:48] [PASSED] 4 VFs
[22:41:48] [PASSED] 5 VFs
[22:41:48] [PASSED] 6 VFs
[22:41:48] [PASSED] 7 VFs
[22:41:48] [PASSED] 8 VFs
[22:41:48] [PASSED] 9 VFs
[22:41:48] [PASSED] 10 VFs
[22:41:48] [PASSED] 11 VFs
[22:41:48] [PASSED] 12 VFs
[22:41:48] [PASSED] 13 VFs
[22:41:48] [PASSED] 14 VFs
[22:41:48] [PASSED] 15 VFs
[22:41:48] [PASSED] 16 VFs
[22:41:48] [PASSED] 17 VFs
[22:41:48] [PASSED] 18 VFs
[22:41:48] [PASSED] 19 VFs
[22:41:48] [PASSED] 20 VFs
[22:41:48] [PASSED] 21 VFs
[22:41:48] [PASSED] 22 VFs
[22:41:48] [PASSED] 23 VFs
[22:41:48] [PASSED] 24 VFs
[22:41:48] [PASSED] 25 VFs
[22:41:48] [PASSED] 26 VFs
[22:41:48] [PASSED] 27 VFs
[22:41:48] [PASSED] 28 VFs
[22:41:48] [PASSED] 29 VFs
[22:41:48] [PASSED] 30 VFs
[22:41:48] [PASSED] 31 VFs
[22:41:48] [PASSED] 32 VFs
[22:41:48] [PASSED] 33 VFs
[22:41:48] [PASSED] 34 VFs
[22:41:48] [PASSED] 35 VFs
[22:41:48] [PASSED] 36 VFs
[22:41:48] [PASSED] 37 VFs
[22:41:48] [PASSED] 38 VFs
[22:41:48] [PASSED] 39 VFs
[22:41:48] [PASSED] 40 VFs
[22:41:48] [PASSED] 41 VFs
[22:41:48] [PASSED] 42 VFs
[22:41:48] [PASSED] 43 VFs
[22:41:48] [PASSED] 44 VFs
[22:41:48] [PASSED] 45 VFs
[22:41:48] [PASSED] 46 VFs
[22:41:48] [PASSED] 47 VFs
[22:41:48] [PASSED] 48 VFs
[22:41:48] [PASSED] 49 VFs
[22:41:48] [PASSED] 50 VFs
[22:41:48] [PASSED] 51 VFs
[22:41:48] [PASSED] 52 VFs
[22:41:48] [PASSED] 53 VFs
[22:41:48] [PASSED] 54 VFs
[22:41:48] [PASSED] 55 VFs
[22:41:48] [PASSED] 56 VFs
[22:41:48] [PASSED] 57 VFs
[22:41:48] [PASSED] 58 VFs
[22:41:48] [PASSED] 59 VFs
[22:41:48] [PASSED] 60 VFs
[22:41:48] [PASSED] 61 VFs
[22:41:48] [PASSED] 62 VFs
[22:41:48] [PASSED] 63 VFs
[22:41:48] ==================== [PASSED] fair_ggtt ====================
[22:41:48] ======================== fair_vram ========================
[22:41:48] [PASSED] 1 VF
[22:41:48] [PASSED] 2 VFs
[22:41:48] [PASSED] 3 VFs
[22:41:48] [PASSED] 4 VFs
[22:41:48] [PASSED] 5 VFs
[22:41:48] [PASSED] 6 VFs
[22:41:48] [PASSED] 7 VFs
[22:41:48] [PASSED] 8 VFs
[22:41:48] [PASSED] 9 VFs
[22:41:48] [PASSED] 10 VFs
[22:41:48] [PASSED] 11 VFs
[22:41:48] [PASSED] 12 VFs
[22:41:48] [PASSED] 13 VFs
[22:41:48] [PASSED] 14 VFs
[22:41:48] [PASSED] 15 VFs
[22:41:48] [PASSED] 16 VFs
[22:41:48] [PASSED] 17 VFs
[22:41:48] [PASSED] 18 VFs
[22:41:48] [PASSED] 19 VFs
[22:41:48] [PASSED] 20 VFs
[22:41:48] [PASSED] 21 VFs
[22:41:48] [PASSED] 22 VFs
[22:41:48] [PASSED] 23 VFs
[22:41:48] [PASSED] 24 VFs
[22:41:48] [PASSED] 25 VFs
[22:41:48] [PASSED] 26 VFs
[22:41:48] [PASSED] 27 VFs
[22:41:48] [PASSED] 28 VFs
[22:41:48] [PASSED] 29 VFs
[22:41:48] [PASSED] 30 VFs
[22:41:48] [PASSED] 31 VFs
[22:41:48] [PASSED] 32 VFs
[22:41:48] [PASSED] 33 VFs
[22:41:48] [PASSED] 34 VFs
[22:41:48] [PASSED] 35 VFs
[22:41:48] [PASSED] 36 VFs
[22:41:48] [PASSED] 37 VFs
[22:41:48] [PASSED] 38 VFs
[22:41:48] [PASSED] 39 VFs
[22:41:48] [PASSED] 40 VFs
[22:41:48] [PASSED] 41 VFs
[22:41:48] [PASSED] 42 VFs
[22:41:48] [PASSED] 43 VFs
[22:41:48] [PASSED] 44 VFs
[22:41:48] [PASSED] 45 VFs
[22:41:48] [PASSED] 46 VFs
[22:41:48] [PASSED] 47 VFs
[22:41:48] [PASSED] 48 VFs
[22:41:48] [PASSED] 49 VFs
[22:41:48] [PASSED] 50 VFs
[22:41:48] [PASSED] 51 VFs
[22:41:48] [PASSED] 52 VFs
[22:41:48] [PASSED] 53 VFs
[22:41:48] [PASSED] 54 VFs
[22:41:48] [PASSED] 55 VFs
[22:41:48] [PASSED] 56 VFs
[22:41:48] [PASSED] 57 VFs
[22:41:48] [PASSED] 58 VFs
[22:41:48] [PASSED] 59 VFs
[22:41:48] [PASSED] 60 VFs
[22:41:48] [PASSED] 61 VFs
[22:41:48] [PASSED] 62 VFs
[22:41:48] [PASSED] 63 VFs
[22:41:48] ==================== [PASSED] fair_vram ====================
[22:41:48] ================== [PASSED] pf_gt_config ===================
[22:41:48] ===================== lmtt (1 subtest) =====================
[22:41:48] ======================== test_ops =========================
[22:41:48] [PASSED] 2-level
[22:41:48] [PASSED] multi-level
[22:41:48] ==================== [PASSED] test_ops =====================
[22:41:48] ====================== [PASSED] lmtt =======================
[22:41:48] ================= sriov_packet (1 subtest) =================
[22:41:48] [PASSED] test_descriptor_init
[22:41:48] ================== [PASSED] sriov_packet ===================
[22:41:48] ================= pf_service (11 subtests) =================
[22:41:48] [PASSED] pf_negotiate_any
[22:41:48] [PASSED] pf_negotiate_base_match
[22:41:48] [PASSED] pf_negotiate_base_newer
[22:41:48] [PASSED] pf_negotiate_base_next
[22:41:48] [SKIPPED] pf_negotiate_base_older (no older minor)
[22:41:48] [PASSED] pf_negotiate_base_prev
[22:41:48] [PASSED] pf_negotiate_latest_match
[22:41:48] [PASSED] pf_negotiate_latest_newer
[22:41:48] [PASSED] pf_negotiate_latest_next
[22:41:48] [SKIPPED] pf_negotiate_latest_older (no older minor)
[22:41:48] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[22:41:48] =================== [PASSED] pf_service ====================
[22:41:48] ================= xe_guc_g2g (2 subtests) ==================
[22:41:48] ============== xe_live_guc_g2g_kunit_default ==============
[22:41:48] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[22:41:48] ============== xe_live_guc_g2g_kunit_allmem ===============
[22:41:48] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[22:41:48] =================== [SKIPPED] xe_guc_g2g ===================
[22:41:48] =================== xe_mocs (2 subtests) ===================
[22:41:48] ================ xe_live_mocs_kernel_kunit ================
[22:41:48] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[22:41:48] ================ xe_live_mocs_reset_kunit =================
[22:41:48] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[22:41:48] ==================== [SKIPPED] xe_mocs =====================
[22:41:48] ================= xe_migrate (3 subtests) ==================
[22:41:48] ================= xe_migrate_sanity_kunit =================
[22:41:48] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[22:41:48] ================== xe_validate_ccs_kunit ==================
[22:41:48] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[22:41:48] ============= xe_migrate_access_memory_kunit ==============
[22:41:48] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[22:41:48] =================== [SKIPPED] xe_migrate ===================
[22:41:48] ================== xe_dma_buf (1 subtest) ==================
[22:41:48] ==================== xe_dma_buf_kunit =====================
[22:41:48] ================ [SKIPPED] xe_dma_buf_kunit ================
[22:41:48] =================== [SKIPPED] xe_dma_buf ===================
[22:41:48] ================= xe_bo_shrink (1 subtest) =================
[22:41:48] =================== xe_bo_shrink_kunit ====================
[22:41:48] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[22:41:48] ================== [SKIPPED] xe_bo_shrink ==================
[22:41:48] ==================== xe_bo (2 subtests) ====================
[22:41:48] ================== xe_ccs_migrate_kunit ===================
[22:41:48] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[22:41:48] ==================== xe_bo_evict_kunit ====================
[22:41:48] =============== [SKIPPED] xe_bo_evict_kunit ================
[22:41:48] ===================== [SKIPPED] xe_bo ======================
[22:41:48] =================== xe_any (9 subtests) ====================
[22:41:48] [PASSED] test_to_xe
[22:41:48] [PASSED] test_to_dev
[22:41:48] [PASSED] test_to_pdev
[22:41:48] [PASSED] test_to_drm
[22:41:48] [PASSED] test_if_pdev
[22:41:48] [PASSED] test_if_xe
[22:41:48] [PASSED] test_if_tile
[22:41:48] [PASSED] test_if_gt
[22:41:48] [PASSED] test_to_id
[22:41:48] ===================== [PASSED] xe_any ======================
[22:41:48] ==================== args (13 subtests) ====================
[22:41:48] [PASSED] count_args_test
[22:41:48] [PASSED] call_args_example
[22:41:48] [PASSED] call_args_test
[22:41:48] [PASSED] drop_first_arg_example
[22:41:48] [PASSED] drop_first_arg_test
[22:41:48] [PASSED] first_arg_example
[22:41:48] [PASSED] first_arg_test
[22:41:48] [PASSED] last_arg_example
[22:41:48] [PASSED] last_arg_test
[22:41:48] [PASSED] pick_arg_example
[22:41:48] [PASSED] if_args_example
[22:41:48] [PASSED] if_args_test
[22:41:48] [PASSED] sep_comma_example
[22:41:48] ====================== [PASSED] args =======================
[22:41:48] =================== xe_pci (3 subtests) ====================
[22:41:48] ==================== check_graphics_ip ====================
[22:41:48] [PASSED] 12.00 Xe_LP
[22:41:48] [PASSED] 12.10 Xe_LP+
[22:41:48] [PASSED] 12.55 Xe_HPG
[22:41:48] [PASSED] 12.60 Xe_HPC
[22:41:48] [PASSED] 12.70 Xe_LPG
[22:41:48] [PASSED] 12.71 Xe_LPG
[22:41:48] [PASSED] 12.74 Xe_LPG+
[22:41:48] [PASSED] 20.01 Xe2_HPG
[22:41:48] [PASSED] 20.02 Xe2_HPG
[22:41:48] [PASSED] 20.04 Xe2_LPG
[22:41:48] [PASSED] 30.00 Xe3_LPG
[22:41:48] [PASSED] 30.01 Xe3_LPG
[22:41:48] [PASSED] 30.03 Xe3_LPG
[22:41:48] [PASSED] 30.04 Xe3_LPG
[22:41:48] [PASSED] 30.05 Xe3_LPG
[22:41:48] [PASSED] 35.10 Xe3p_LPG
[22:41:48] [PASSED] 35.11 Xe3p_XPC
[22:41:48] ================ [PASSED] check_graphics_ip ================
[22:41:48] ===================== check_media_ip ======================
[22:41:48] [PASSED] 12.00 Xe_M
[22:41:48] [PASSED] 12.55 Xe_HPM
[22:41:48] [PASSED] 13.00 Xe_LPM+
[22:41:48] [PASSED] 13.01 Xe2_HPM
[22:41:48] [PASSED] 20.00 Xe2_LPM
[22:41:48] [PASSED] 30.00 Xe3_LPM
[22:41:48] [PASSED] 30.02 Xe3_LPM
[22:41:48] [PASSED] 35.00 Xe3p_LPM
[22:41:48] [PASSED] 35.03 Xe3p_HPM
[22:41:48] ================= [PASSED] check_media_ip ==================
[22:41:48] =================== check_platform_desc ===================
[22:41:48] [PASSED] 0x9A60 (TIGERLAKE)
[22:41:48] [PASSED] 0x9A68 (TIGERLAKE)
[22:41:48] [PASSED] 0x9A70 (TIGERLAKE)
[22:41:48] [PASSED] 0x9A40 (TIGERLAKE)
[22:41:48] [PASSED] 0x9A49 (TIGERLAKE)
[22:41:48] [PASSED] 0x9A59 (TIGERLAKE)
[22:41:48] [PASSED] 0x9A78 (TIGERLAKE)
[22:41:48] [PASSED] 0x9AC0 (TIGERLAKE)
[22:41:48] [PASSED] 0x9AC9 (TIGERLAKE)
[22:41:48] [PASSED] 0x9AD9 (TIGERLAKE)
[22:41:48] [PASSED] 0x9AF8 (TIGERLAKE)
[22:41:48] [PASSED] 0x4C80 (ROCKETLAKE)
[22:41:48] [PASSED] 0x4C8A (ROCKETLAKE)
[22:41:48] [PASSED] 0x4C8B (ROCKETLAKE)
[22:41:48] [PASSED] 0x4C8C (ROCKETLAKE)
[22:41:48] [PASSED] 0x4C90 (ROCKETLAKE)
[22:41:48] [PASSED] 0x4C9A (ROCKETLAKE)
[22:41:48] [PASSED] 0x4680 (ALDERLAKE_S)
[22:41:48] [PASSED] 0x4682 (ALDERLAKE_S)
[22:41:48] [PASSED] 0x4688 (ALDERLAKE_S)
[22:41:48] [PASSED] 0x468A (ALDERLAKE_S)
[22:41:48] [PASSED] 0x468B (ALDERLAKE_S)
[22:41:48] [PASSED] 0x4690 (ALDERLAKE_S)
[22:41:48] [PASSED] 0x4692 (ALDERLAKE_S)
[22:41:48] [PASSED] 0x4693 (ALDERLAKE_S)
[22:41:48] [PASSED] 0x46A0 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46A1 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46A2 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46A3 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46A6 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46A8 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46AA (ALDERLAKE_P)
[22:41:48] [PASSED] 0x462A (ALDERLAKE_P)
[22:41:48] [PASSED] 0x4626 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x4628 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46B0 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46B1 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46B2 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46B3 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46C0 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46C1 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46C2 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46C3 (ALDERLAKE_P)
[22:41:48] [PASSED] 0x46D0 (ALDERLAKE_N)
[22:41:48] [PASSED] 0x46D1 (ALDERLAKE_N)
[22:41:48] [PASSED] 0x46D2 (ALDERLAKE_N)
[22:41:48] [PASSED] 0x46D3 (ALDERLAKE_N)
[22:41:48] [PASSED] 0x46D4 (ALDERLAKE_N)
[22:41:48] [PASSED] 0xA721 (ALDERLAKE_P)
[22:41:48] [PASSED] 0xA7A1 (ALDERLAKE_P)
[22:41:48] [PASSED] 0xA7A9 (ALDERLAKE_P)
[22:41:48] [PASSED] 0xA7AC (ALDERLAKE_P)
[22:41:48] [PASSED] 0xA7AD (ALDERLAKE_P)
[22:41:48] [PASSED] 0xA720 (ALDERLAKE_P)
[22:41:48] [PASSED] 0xA7A0 (ALDERLAKE_P)
[22:41:48] [PASSED] 0xA7A8 (ALDERLAKE_P)
[22:41:48] [PASSED] 0xA7AA (ALDERLAKE_P)
[22:41:48] [PASSED] 0xA7AB (ALDERLAKE_P)
[22:41:48] [PASSED] 0xA780 (ALDERLAKE_S)
[22:41:48] [PASSED] 0xA781 (ALDERLAKE_S)
[22:41:48] [PASSED] 0xA782 (ALDERLAKE_S)
[22:41:48] [PASSED] 0xA783 (ALDERLAKE_S)
[22:41:48] [PASSED] 0xA788 (ALDERLAKE_S)
[22:41:48] [PASSED] 0xA789 (ALDERLAKE_S)
[22:41:48] [PASSED] 0xA78A (ALDERLAKE_S)
[22:41:48] [PASSED] 0xA78B (ALDERLAKE_S)
[22:41:48] [PASSED] 0x4905 (DG1)
[22:41:48] [PASSED] 0x4906 (DG1)
[22:41:48] [PASSED] 0x4907 (DG1)
[22:41:48] [PASSED] 0x4908 (DG1)
[22:41:48] [PASSED] 0x4909 (DG1)
[22:41:48] [PASSED] 0x56C0 (DG2)
[22:41:48] [PASSED] 0x56C2 (DG2)
[22:41:48] [PASSED] 0x56C1 (DG2)
[22:41:48] [PASSED] 0x7D51 (METEORLAKE)
[22:41:48] [PASSED] 0x7DD1 (METEORLAKE)
[22:41:48] [PASSED] 0x7D41 (METEORLAKE)
[22:41:48] [PASSED] 0x7D67 (METEORLAKE)
[22:41:48] [PASSED] 0xB640 (METEORLAKE)
[22:41:48] [PASSED] 0x56A0 (DG2)
[22:41:48] [PASSED] 0x56A1 (DG2)
[22:41:48] [PASSED] 0x56A2 (DG2)
[22:41:48] [PASSED] 0x56BE (DG2)
[22:41:48] [PASSED] 0x56BF (DG2)
[22:41:48] [PASSED] 0x5690 (DG2)
[22:41:48] [PASSED] 0x5691 (DG2)
[22:41:48] [PASSED] 0x5692 (DG2)
[22:41:48] [PASSED] 0x56A5 (DG2)
[22:41:48] [PASSED] 0x56A6 (DG2)
[22:41:48] [PASSED] 0x56B0 (DG2)
[22:41:48] [PASSED] 0x56B1 (DG2)
[22:41:48] [PASSED] 0x56BA (DG2)
[22:41:48] [PASSED] 0x56BB (DG2)
[22:41:48] [PASSED] 0x56BC (DG2)
[22:41:48] [PASSED] 0x56BD (DG2)
[22:41:48] [PASSED] 0x5693 (DG2)
[22:41:48] [PASSED] 0x5694 (DG2)
[22:41:48] [PASSED] 0x5695 (DG2)
[22:41:48] [PASSED] 0x56A3 (DG2)
[22:41:48] [PASSED] 0x56A4 (DG2)
[22:41:48] [PASSED] 0x56B2 (DG2)
[22:41:48] [PASSED] 0x56B3 (DG2)
[22:41:48] [PASSED] 0x5696 (DG2)
[22:41:48] [PASSED] 0x5697 (DG2)
[22:41:48] [PASSED] 0xB69 (PVC)
[22:41:48] [PASSED] 0xB6E (PVC)
[22:41:48] [PASSED] 0xBD4 (PVC)
[22:41:48] [PASSED] 0xBD5 (PVC)
[22:41:48] [PASSED] 0xBD6 (PVC)
[22:41:48] [PASSED] 0xBD7 (PVC)
[22:41:48] [PASSED] 0xBD8 (PVC)
[22:41:48] [PASSED] 0xBD9 (PVC)
[22:41:48] [PASSED] 0xBDA (PVC)
[22:41:48] [PASSED] 0xBDB (PVC)
[22:41:48] [PASSED] 0xBE0 (PVC)
[22:41:48] [PASSED] 0xBE1 (PVC)
[22:41:48] [PASSED] 0xBE5 (PVC)
[22:41:48] [PASSED] 0x7D40 (METEORLAKE)
[22:41:48] [PASSED] 0x7D45 (METEORLAKE)
[22:41:48] [PASSED] 0x7D55 (METEORLAKE)
[22:41:48] [PASSED] 0x7D60 (METEORLAKE)
[22:41:48] [PASSED] 0x7DD5 (METEORLAKE)
[22:41:48] [PASSED] 0x6420 (LUNARLAKE)
[22:41:48] [PASSED] 0x64A0 (LUNARLAKE)
[22:41:48] [PASSED] 0x64B0 (LUNARLAKE)
[22:41:48] [PASSED] 0xE202 (BATTLEMAGE)
[22:41:48] [PASSED] 0xE209 (BATTLEMAGE)
[22:41:48] [PASSED] 0xE20B (BATTLEMAGE)
[22:41:48] [PASSED] 0xE20C (BATTLEMAGE)
[22:41:48] [PASSED] 0xE20D (BATTLEMAGE)
[22:41:48] [PASSED] 0xE210 (BATTLEMAGE)
[22:41:48] [PASSED] 0xE211 (BATTLEMAGE)
[22:41:48] [PASSED] 0xE212 (BATTLEMAGE)
[22:41:48] [PASSED] 0xE216 (BATTLEMAGE)
[22:41:48] [PASSED] 0xE220 (BATTLEMAGE)
[22:41:48] [PASSED] 0xE221 (BATTLEMAGE)
[22:41:48] [PASSED] 0xE222 (BATTLEMAGE)
[22:41:48] [PASSED] 0xE223 (BATTLEMAGE)
[22:41:48] [PASSED] 0xB080 (PANTHERLAKE)
[22:41:48] [PASSED] 0xB081 (PANTHERLAKE)
[22:41:48] [PASSED] 0xB082 (PANTHERLAKE)
[22:41:48] [PASSED] 0xB083 (PANTHERLAKE)
[22:41:48] [PASSED] 0xB084 (PANTHERLAKE)
[22:41:48] [PASSED] 0xB085 (PANTHERLAKE)
[22:41:48] [PASSED] 0xB086 (PANTHERLAKE)
[22:41:48] [PASSED] 0xB087 (PANTHERLAKE)
[22:41:48] [PASSED] 0xB08F (PANTHERLAKE)
[22:41:48] [PASSED] 0xB090 (PANTHERLAKE)
[22:41:48] [PASSED] 0xB0A0 (PANTHERLAKE)
[22:41:48] [PASSED] 0xB0A1 (PANTHERLAKE)
[22:41:48] [PASSED] 0xB0B0 (PANTHERLAKE)
[22:41:48] [PASSED] 0xFD80 (PANTHERLAKE)
[22:41:48] [PASSED] 0xFD81 (PANTHERLAKE)
[22:41:48] [PASSED] 0xD740 (NOVALAKE_S)
[22:41:48] [PASSED] 0xD741 (NOVALAKE_S)
[22:41:48] [PASSED] 0xD742 (NOVALAKE_S)
[22:41:48] [PASSED] 0xD743 (NOVALAKE_S)
[22:41:48] [PASSED] 0xD745 (NOVALAKE_S)
[22:41:48] [PASSED] 0xD74A (NOVALAKE_S)
[22:41:48] [PASSED] 0xD74B (NOVALAKE_S)
[22:41:48] [PASSED] 0x674C (CRESCENTISLAND)
[22:41:48] [PASSED] 0x674D (CRESCENTISLAND)
[22:41:48] [PASSED] 0x674E (CRESCENTISLAND)
[22:41:48] [PASSED] 0x674F (CRESCENTISLAND)
[22:41:48] [PASSED] 0x6750 (CRESCENTISLAND)
[22:41:48] [PASSED] 0x6751 (CRESCENTISLAND)
[22:41:48] [PASSED] 0x6752 (CRESCENTISLAND)
[22:41:48] [PASSED] 0xD750 (NOVALAKE_P)
[22:41:48] [PASSED] 0xD751 (NOVALAKE_P)
[22:41:48] [PASSED] 0xD752 (NOVALAKE_P)
[22:41:48] [PASSED] 0xD753 (NOVALAKE_P)
[22:41:48] [PASSED] 0xD754 (NOVALAKE_P)
[22:41:48] [PASSED] 0xD755 (NOVALAKE_P)
[22:41:48] [PASSED] 0xD756 (NOVALAKE_P)
[22:41:48] [PASSED] 0xD757 (NOVALAKE_P)
[22:41:48] [PASSED] 0xD75F (NOVALAKE_P)
[22:41:48] =============== [PASSED] check_platform_desc ===============
[22:41:48] ===================== [PASSED] xe_pci ======================
[22:41:48] ============= xe_rtp_tables_test (5 subtests) ==============
[22:41:48] ================== xe_rtp_table_gt_test ===================
[22:41:48] [PASSED] gt_was/14011060649
[22:41:48] [PASSED] gt_was/14011059788
[22:41:48] [PASSED] gt_was/14015795083
[22:41:48] [PASSED] gt_was/16021867713
[22:41:48] [PASSED] gt_was/14019449301
[22:41:48] [PASSED] gt_was/16028005424
[22:41:48] [PASSED] gt_was/14026578760
[22:41:48] [PASSED] gt_was/1409420604
[22:41:48] [PASSED] gt_was/1408615072
[22:41:48] [PASSED] gt_was/22010523718
[22:41:48] [PASSED] gt_was/14011006942
[22:41:48] [PASSED] gt_was/14014830051
[22:41:48] [PASSED] gt_was/18018781329
[22:41:48] [PASSED] gt_was/1509235366
[22:41:48] [PASSED] gt_was/18018781329
[22:41:48] [PASSED] gt_was/16016694945
[22:41:48] [PASSED] gt_was/14018575942
[22:41:48] [PASSED] gt_was/22016670082
[22:41:48] [PASSED] gt_was/22016670082
[22:41:48] [PASSED] gt_was/14017421178
[22:41:48] [PASSED] gt_was/16025250150
[22:41:48] [PASSED] gt_was/14021871409
[22:41:48] [PASSED] gt_was/16021865536
[22:41:48] [PASSED] gt_was/14021486841
[22:41:48] [PASSED] gt_was/14025160223
[22:41:48] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[22:41:48] [PASSED] gt_was/14025635424
[22:41:48] [PASSED] gt_was/16028005424
[22:41:48] ============== [PASSED] xe_rtp_table_gt_test ===============
[22:41:48] ================== xe_rtp_table_gt_test ===================
[22:41:48] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[22:41:48] [PASSED] gt_tunings/Tuning: 32B Access Enable
[22:41:48] [PASSED] gt_tunings/Tuning: L3 cache
[22:41:48] [PASSED] gt_tunings/Tuning: L3 cache - media
[22:41:48] [PASSED] gt_tunings/Tuning: Compression Overfetch
[22:41:48] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[22:41:48] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[22:41:48] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[22:41:48] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[22:41:48] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[22:41:48] [PASSED] gt_tunings/Tuning: Stateless compression control
[22:41:48] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[22:41:48] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[22:41:48] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[22:41:48] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[22:41:48] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[22:41:48] ============== [PASSED] xe_rtp_table_gt_test ===============
[22:41:48] ================== xe_rtp_table_oob_test ==================
[22:41:48] [PASSED] oob_was/1607983814
[22:41:48] [PASSED] oob_was/16010904313
[22:41:48] [PASSED] oob_was/18022495364
[22:41:48] [PASSED] oob_was/22012773006
[22:41:48] [PASSED] oob_was/14014475959
[22:41:48] [PASSED] oob_was/22011391025
[22:41:48] [PASSED] oob_was/22012727170
[22:41:48] [PASSED] oob_was/22012727685
[22:41:48] [PASSED] oob_was/22016596838
[22:41:48] [PASSED] oob_was/18020744125
[22:41:48] [PASSED] oob_was/1409600907
[22:41:48] [PASSED] oob_was/22014953428
[22:41:48] [PASSED] oob_was/16017236439
[22:41:48] [PASSED] oob_was/14019821291
[22:41:48] [PASSED] oob_was/14015076503
[22:41:48] [PASSED] oob_was/22016122933
[22:41:48] [PASSED] oob_was/14018913170
[22:41:48] [PASSED] oob_was/14018094691
[22:41:48] [PASSED] oob_was/18024947630
[22:41:48] [PASSED] oob_was/16022287689
[22:41:48] [PASSED] oob_was/13011645652
[22:41:48] [PASSED] oob_was/14022293748
[22:41:48] [PASSED] oob_was/22019794406
[22:41:48] [PASSED] oob_was/22019338487
[22:41:48] [PASSED] oob_was/16023588340
[22:41:48] [PASSED] oob_was/14019789679
[22:41:48] [PASSED] oob_was/14022866841
[22:41:48] [PASSED] oob_was/16021333562
[22:41:48] [PASSED] oob_was/14016712196
[22:41:48] [PASSED] oob_was/14015568240
[22:41:48] [PASSED] oob_was/18013179988
[22:41:48] [PASSED] oob_was/1508761755
[22:41:48] [PASSED] oob_was/16023105232
[22:41:48] [PASSED] oob_was/16026508708
[22:41:48] [PASSED] oob_was/14020001231
[22:41:48] [PASSED] oob_was/16023683509
[22:41:48] [PASSED] oob_was/14025515070
[22:41:48] [PASSED] oob_was/15015404425_disable
[22:41:48] [PASSED] oob_was/16026007364
[22:41:48] [PASSED] oob_was/14020316580
[22:41:48] [PASSED] oob_was/14025883347
[22:41:48] [PASSED] oob_was/16029380221
[22:41:48] [PASSED] oob_was/22022079272
[22:41:48] [PASSED] oob_was/16029897822
[22:41:48] [PASSED] oob_was/14026539277
[22:41:48] [PASSED] oob_was/14027054324
[22:41:48] [PASSED] oob_was/14025941587
[22:41:48] [PASSED] oob_was/16030224309
[22:41:48] [PASSED] oob_was/14028709524
[22:41:48] ============== [PASSED] xe_rtp_table_oob_test ==============
[22:41:48] ================ xe_rtp_table_dev_oob_test ================
[22:41:48] [PASSED] device_oob_was/22010954014
[22:41:48] [PASSED] device_oob_was/15015404425
[22:41:48] [PASSED] device_oob_was/22019338487_display
[22:41:48] [PASSED] device_oob_was/14022085890
[22:41:48] [PASSED] device_oob_was/14026633728
[22:41:48] [PASSED] device_oob_was/14026746987
[22:41:48] [PASSED] device_oob_was/14026779378
[22:41:48] [PASSED] device_oob_was/14028586678
[22:41:48] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[22:41:48] ========== xe_rtp_table_missing_upper_bound_test ==========
[22:41:48] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[22:41:48] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[22:41:48] [PASSED] register_whitelist/1806527549
[22:41:48] [PASSED] register_whitelist/allow_read_ctx_timestamp
[22:41:48] [PASSED] register_whitelist/allow_read_queue_timestamp
[22:41:48] [PASSED] register_whitelist/16014440446
[22:41:48] [PASSED] register_whitelist/16017236439
[22:41:48] [PASSED] register_whitelist/16020183090
[22:41:48] [PASSED] register_whitelist/14024997852
[22:41:48] [PASSED] register_whitelist/14024997852
[22:41:48] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[22:41:48] =============== [PASSED] xe_rtp_tables_test ================
[22:41:48] =================== xe_rtp (3 subtests) ====================
[22:41:48] =================== xe_rtp_rules_tests ====================
[22:41:48] [PASSED] no
[22:41:48] [PASSED] yes
[22:41:48] [PASSED] no-and-no
[22:41:48] [PASSED] no-and-yes
[22:41:48] [PASSED] yes-and-no
[22:41:48] [PASSED] yes-and-yes
[22:41:48] [PASSED] no-or-no
[22:41:48] [PASSED] no-or-yes
[22:41:48] [PASSED] yes-or-no
[22:41:48] [PASSED] yes-or-yes
[22:41:49] [PASSED] no-yes-or-yes-no
[22:41:49] [PASSED] no-yes-or-yes-yes
[22:41:49] [PASSED] yes-yes-or-no-yes
[22:41:49] [PASSED] yes-yes-or-yes-yes
[22:41:49] [PASSED] no-no-or-yes-or-no
[22:41:49] [PASSED] or
[22:41:49] [PASSED] or-yes
[22:41:49] [PASSED] or-no
[22:41:49] [PASSED] yes-or
[22:41:49] [PASSED] no-or
[22:41:49] [PASSED] no-or-or-yes
[22:41:49] [PASSED] yes-or-or-no
[22:41:49] [PASSED] no-or-or-no
[22:41:49] [PASSED] missing-context-engine-class
[22:41:49] [PASSED] missing-context-engine-class-or-yes
[22:41:49] [PASSED] missing-context-engine-class-or-or-yes
[22:41:49] =============== [PASSED] xe_rtp_rules_tests ================
[22:41:49] =============== xe_rtp_process_to_sr_tests ================
[22:41:49] [PASSED] coalesce-same-reg
[22:41:49] [PASSED] coalesce-same-reg-literal-and-func
[22:41:49] [PASSED] no-match-no-add
[22:41:49] [PASSED] two-regs-two-entries
[22:41:49] [PASSED] clr-one-set-other
[22:41:49] [PASSED] set-field
[22:41:49] [PASSED] conflict-duplicate
[22:41:49] [PASSED] conflict-not-disjoint
[22:41:49] [PASSED] conflict-not-disjoint-literal-and-func
[22:41:49] [PASSED] conflict-reg-type
[22:41:49] [PASSED] bad-mcr-reg-forced-to-regular
[22:41:49] [PASSED] bad-regular-reg-forced-to-mcr
[22:41:49] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[22:41:49] ================== xe_rtp_process_tests ===================
[22:41:49] [PASSED] active1
[22:41:49] [PASSED] active2
[22:41:49] [PASSED] active-inactive
[22:41:49] [PASSED] inactive-active
[22:41:49] [PASSED] inactive-active-inactive
[22:41:49] [PASSED] inactive-inactive-inactive
[22:41:49] ============== [PASSED] xe_rtp_process_tests ===============
[22:41:49] ===================== [PASSED] xe_rtp ======================
[22:41:49] ==================== xe_wa (1 subtest) =====================
[22:41:49] ======================== xe_wa_gt =========================
[22:41:49] [PASSED] TIGERLAKE B0
[22:41:49] [PASSED] DG1 A0
[22:41:49] [PASSED] DG1 B0
[22:41:49] [PASSED] ALDERLAKE_S A0
[22:41:49] [PASSED] ALDERLAKE_S B0
[22:41:49] [PASSED] ALDERLAKE_S C0
[22:41:49] [PASSED] ALDERLAKE_S D0
[22:41:49] [PASSED] ALDERLAKE_P A0
[22:41:49] [PASSED] ALDERLAKE_P B0
[22:41:49] [PASSED] ALDERLAKE_P C0
[22:41:49] [PASSED] ALDERLAKE_S RPLS D0
[22:41:49] [PASSED] ALDERLAKE_P RPLU E0
[22:41:49] [PASSED] DG2 G10 C0
[22:41:49] [PASSED] DG2 G11 B1
[22:41:49] [PASSED] DG2 G12 A1
[22:41:49] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:41:49] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:41:49] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[22:41:49] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[22:41:49] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[22:41:49] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[22:41:49] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[22:41:49] ==================== [PASSED] xe_wa_gt =====================
[22:41:49] ====================== [PASSED] xe_wa ======================
[22:41:49] ============================================================
[22:41:49] Testing complete. Ran 841 tests: passed: 812, skipped: 29
[22:41:49] Elapsed time: 41.257s total, 2.448s configuring, 38.093s building, 0.711s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[22:41:49] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:41:51] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:42:16] Starting KUnit Kernel (1/1)...
[22:42:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:42:16] ============ drm_test_pick_cmdline (2 subtests) ============
[22:42:16] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[22:42:16] =============== drm_test_pick_cmdline_named ===============
[22:42:16] [PASSED] NTSC
[22:42:16] [PASSED] NTSC-J
[22:42:16] [PASSED] PAL
[22:42:16] [PASSED] PAL-M
[22:42:16] =========== [PASSED] drm_test_pick_cmdline_named ===========
[22:42:16] ============== [PASSED] drm_test_pick_cmdline ==============
[22:42:16] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[22:42:16] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[22:42:16] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[22:42:16] =========== drm_validate_clone_mode (2 subtests) ===========
[22:42:16] ============== drm_test_check_in_clone_mode ===============
[22:42:16] [PASSED] in_clone_mode
[22:42:16] [PASSED] not_in_clone_mode
[22:42:16] ========== [PASSED] drm_test_check_in_clone_mode ===========
[22:42:16] =============== drm_test_check_valid_clones ===============
[22:42:16] [PASSED] not_in_clone_mode
[22:42:16] [PASSED] valid_clone
[22:42:16] [PASSED] invalid_clone
[22:42:16] =========== [PASSED] drm_test_check_valid_clones ===========
[22:42:16] ============= [PASSED] drm_validate_clone_mode =============
[22:42:16] ============= drm_validate_modeset (1 subtest) =============
[22:42:16] [PASSED] drm_test_check_connector_changed_modeset
[22:42:16] ============== [PASSED] drm_validate_modeset ===============
[22:42:16] ====== drm_test_bridge_get_current_state (1 subtest) =======
[22:42:16] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[22:42:16] ======== [PASSED] drm_test_bridge_get_current_state ========
[22:42:16] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[22:42:16] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[22:42:16] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[22:42:16] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[22:42:16] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[22:42:16] ============== drm_bridge_alloc (2 subtests) ===============
[22:42:16] [PASSED] drm_test_drm_bridge_alloc_basic
[22:42:16] [PASSED] drm_test_drm_bridge_alloc_get_put
[22:42:16] ================ [PASSED] drm_bridge_alloc =================
[22:42:16] ============= drm_bridge_bus_fmt (5 subtests) ==============
[22:42:16] [PASSED] drm_test_bridge_rgb_yuv_rgb
[22:42:16] [PASSED] drm_test_bridge_must_convert_to_yuv444
[22:42:16] [PASSED] drm_test_bridge_hdmi_auto_rgb
[22:42:16] [PASSED] drm_test_bridge_auto_first
[22:42:16] [PASSED] drm_test_bridge_rgb_yuv_no_path
[22:42:16] =============== [PASSED] drm_bridge_bus_fmt ================
[22:42:16] ============= drm_cmdline_parser (40 subtests) =============
[22:42:16] [PASSED] drm_test_cmdline_force_d_only
[22:42:16] [PASSED] drm_test_cmdline_force_D_only_dvi
[22:42:16] [PASSED] drm_test_cmdline_force_D_only_hdmi
[22:42:16] [PASSED] drm_test_cmdline_force_D_only_not_digital
[22:42:16] [PASSED] drm_test_cmdline_force_e_only
[22:42:16] [PASSED] drm_test_cmdline_res
[22:42:16] [PASSED] drm_test_cmdline_res_vesa
[22:42:16] [PASSED] drm_test_cmdline_res_vesa_rblank
[22:42:16] [PASSED] drm_test_cmdline_res_rblank
[22:42:16] [PASSED] drm_test_cmdline_res_bpp
[22:42:16] [PASSED] drm_test_cmdline_res_refresh
[22:42:16] [PASSED] drm_test_cmdline_res_bpp_refresh
[22:42:16] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[22:42:16] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[22:42:16] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[22:42:16] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[22:42:16] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[22:42:16] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[22:42:16] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[22:42:16] [PASSED] drm_test_cmdline_res_margins_force_on
[22:42:16] [PASSED] drm_test_cmdline_res_vesa_margins
[22:42:16] [PASSED] drm_test_cmdline_name
[22:42:16] [PASSED] drm_test_cmdline_name_bpp
[22:42:16] [PASSED] drm_test_cmdline_name_option
[22:42:16] [PASSED] drm_test_cmdline_name_bpp_option
[22:42:16] [PASSED] drm_test_cmdline_rotate_0
[22:42:16] [PASSED] drm_test_cmdline_rotate_90
[22:42:16] [PASSED] drm_test_cmdline_rotate_180
[22:42:16] [PASSED] drm_test_cmdline_rotate_270
[22:42:16] [PASSED] drm_test_cmdline_hmirror
[22:42:16] [PASSED] drm_test_cmdline_vmirror
[22:42:16] [PASSED] drm_test_cmdline_margin_options
[22:42:16] [PASSED] drm_test_cmdline_multiple_options
[22:42:16] [PASSED] drm_test_cmdline_bpp_extra_and_option
[22:42:16] [PASSED] drm_test_cmdline_extra_and_option
[22:42:16] [PASSED] drm_test_cmdline_freestanding_options
[22:42:16] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[22:42:16] [PASSED] drm_test_cmdline_panel_orientation
[22:42:16] ================ drm_test_cmdline_invalid =================
[22:42:16] [PASSED] margin_only
[22:42:16] [PASSED] interlace_only
[22:42:16] [PASSED] res_missing_x
[22:42:16] [PASSED] res_missing_y
[22:42:16] [PASSED] res_bad_y
[22:42:16] [PASSED] res_missing_y_bpp
[22:42:16] [PASSED] res_bad_bpp
[22:42:16] [PASSED] res_bad_refresh
[22:42:16] [PASSED] res_bpp_refresh_force_on_off
[22:42:16] [PASSED] res_invalid_mode
[22:42:16] [PASSED] res_bpp_wrong_place_mode
[22:42:16] [PASSED] name_bpp_refresh
[22:42:16] [PASSED] name_refresh
[22:42:16] [PASSED] name_refresh_wrong_mode
[22:42:16] [PASSED] name_refresh_invalid_mode
[22:42:16] [PASSED] rotate_multiple
[22:42:16] [PASSED] rotate_invalid_val
[22:42:16] [PASSED] rotate_truncated
[22:42:16] [PASSED] invalid_option
[22:42:16] [PASSED] invalid_tv_option
[22:42:16] [PASSED] truncated_tv_option
[22:42:16] ============ [PASSED] drm_test_cmdline_invalid =============
[22:42:16] =============== drm_test_cmdline_tv_options ===============
[22:42:16] [PASSED] NTSC
[22:42:16] [PASSED] NTSC_443
[22:42:16] [PASSED] NTSC_J
[22:42:16] [PASSED] PAL
[22:42:16] [PASSED] PAL_M
[22:42:16] [PASSED] PAL_N
[22:42:16] [PASSED] SECAM
[22:42:16] [PASSED] MONO_525
[22:42:16] [PASSED] MONO_625
[22:42:16] =========== [PASSED] drm_test_cmdline_tv_options ===========
[22:42:16] =============== [PASSED] drm_cmdline_parser ================
[22:42:16] ========== drmm_connector_hdmi_init (20 subtests) ==========
[22:42:16] [PASSED] drm_test_connector_hdmi_init_valid
[22:42:16] [PASSED] drm_test_connector_hdmi_init_bpc_8
[22:42:16] [PASSED] drm_test_connector_hdmi_init_bpc_10
[22:42:16] [PASSED] drm_test_connector_hdmi_init_bpc_12
[22:42:16] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[22:42:16] [PASSED] drm_test_connector_hdmi_init_bpc_null
[22:42:16] [PASSED] drm_test_connector_hdmi_init_formats_empty
[22:42:16] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[22:42:16] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:42:16] [PASSED] supported_formats=0x9 yuv420_allowed=1
[22:42:16] [PASSED] supported_formats=0x9 yuv420_allowed=0
[22:42:16] [PASSED] supported_formats=0x5 yuv420_allowed=1
[22:42:16] [PASSED] supported_formats=0x5 yuv420_allowed=0
[22:42:16] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:42:16] [PASSED] drm_test_connector_hdmi_init_null_ddc
[22:42:16] [PASSED] drm_test_connector_hdmi_init_null_product
[22:42:16] [PASSED] drm_test_connector_hdmi_init_null_vendor
[22:42:16] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[22:42:16] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[22:42:16] [PASSED] drm_test_connector_hdmi_init_product_valid
[22:42:16] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[22:42:16] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[22:42:16] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[22:42:16] ========= drm_test_connector_hdmi_init_type_valid =========
[22:42:16] [PASSED] HDMI-A
[22:42:16] [PASSED] HDMI-B
[22:42:16] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[22:42:16] ======== drm_test_connector_hdmi_init_type_invalid ========
[22:42:16] [PASSED] Unknown
[22:42:16] [PASSED] VGA
[22:42:16] [PASSED] DVI-I
[22:42:16] [PASSED] DVI-D
[22:42:16] [PASSED] DVI-A
[22:42:16] [PASSED] Composite
[22:42:16] [PASSED] SVIDEO
[22:42:16] [PASSED] LVDS
[22:42:16] [PASSED] Component
[22:42:16] [PASSED] DIN
[22:42:16] [PASSED] DP
[22:42:16] [PASSED] TV
[22:42:16] [PASSED] eDP
[22:42:16] [PASSED] Virtual
[22:42:16] [PASSED] DSI
[22:42:16] [PASSED] DPI
[22:42:16] [PASSED] Writeback
[22:42:16] [PASSED] SPI
[22:42:16] [PASSED] USB
[22:42:16] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[22:42:16] ============ [PASSED] drmm_connector_hdmi_init =============
[22:42:16] ============= drmm_connector_init (3 subtests) =============
[22:42:16] [PASSED] drm_test_drmm_connector_init
[22:42:16] [PASSED] drm_test_drmm_connector_init_null_ddc
[22:42:16] ========= drm_test_drmm_connector_init_type_valid =========
[22:42:16] [PASSED] Unknown
[22:42:16] [PASSED] VGA
[22:42:16] [PASSED] DVI-I
[22:42:16] [PASSED] DVI-D
[22:42:16] [PASSED] DVI-A
[22:42:16] [PASSED] Composite
[22:42:16] [PASSED] SVIDEO
[22:42:16] [PASSED] LVDS
[22:42:16] [PASSED] Component
[22:42:16] [PASSED] DIN
[22:42:16] [PASSED] DP
[22:42:16] [PASSED] HDMI-A
[22:42:16] [PASSED] HDMI-B
[22:42:16] [PASSED] TV
[22:42:16] [PASSED] eDP
[22:42:16] [PASSED] Virtual
[22:42:16] [PASSED] DSI
[22:42:16] [PASSED] DPI
[22:42:16] [PASSED] Writeback
[22:42:16] [PASSED] SPI
[22:42:16] [PASSED] USB
[22:42:16] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[22:42:16] =============== [PASSED] drmm_connector_init ===============
[22:42:16] ========= drm_connector_dynamic_init (6 subtests) ==========
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_init
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_init_properties
[22:42:16] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[22:42:16] [PASSED] Unknown
[22:42:16] [PASSED] VGA
[22:42:16] [PASSED] DVI-I
[22:42:16] [PASSED] DVI-D
[22:42:16] [PASSED] DVI-A
[22:42:16] [PASSED] Composite
[22:42:16] [PASSED] SVIDEO
[22:42:16] [PASSED] LVDS
[22:42:16] [PASSED] Component
[22:42:16] [PASSED] DIN
[22:42:16] [PASSED] DP
[22:42:16] [PASSED] HDMI-A
[22:42:16] [PASSED] HDMI-B
[22:42:16] [PASSED] TV
[22:42:16] [PASSED] eDP
[22:42:16] [PASSED] Virtual
[22:42:16] [PASSED] DSI
[22:42:16] [PASSED] DPI
[22:42:16] [PASSED] Writeback
[22:42:16] [PASSED] SPI
[22:42:16] [PASSED] USB
[22:42:16] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[22:42:16] ======== drm_test_drm_connector_dynamic_init_name =========
[22:42:16] [PASSED] Unknown
[22:42:16] [PASSED] VGA
[22:42:16] [PASSED] DVI-I
[22:42:16] [PASSED] DVI-D
[22:42:16] [PASSED] DVI-A
[22:42:16] [PASSED] Composite
[22:42:16] [PASSED] SVIDEO
[22:42:16] [PASSED] LVDS
[22:42:16] [PASSED] Component
[22:42:16] [PASSED] DIN
[22:42:16] [PASSED] DP
[22:42:16] [PASSED] HDMI-A
[22:42:16] [PASSED] HDMI-B
[22:42:16] [PASSED] TV
[22:42:16] [PASSED] eDP
[22:42:16] [PASSED] Virtual
[22:42:16] [PASSED] DSI
[22:42:16] [PASSED] DPI
[22:42:16] [PASSED] Writeback
[22:42:16] [PASSED] SPI
[22:42:16] [PASSED] USB
[22:42:16] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[22:42:16] =========== [PASSED] drm_connector_dynamic_init ============
[22:42:16] ==== drm_connector_dynamic_register_early (4 subtests) =====
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[22:42:16] ====== [PASSED] drm_connector_dynamic_register_early =======
[22:42:16] ======= drm_connector_dynamic_register (7 subtests) ========
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[22:42:16] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[22:42:16] ========= [PASSED] drm_connector_dynamic_register ==========
[22:42:16] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[22:42:16] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[22:42:16] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[22:42:16] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[22:42:16] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[22:42:16] ========== drm_test_get_tv_mode_from_name_valid ===========
[22:42:16] [PASSED] NTSC
[22:42:16] [PASSED] NTSC-443
[22:42:16] [PASSED] NTSC-J
[22:42:16] [PASSED] PAL
[22:42:16] [PASSED] PAL-M
[22:42:16] [PASSED] PAL-N
[22:42:16] [PASSED] SECAM
[22:42:16] [PASSED] Mono
[22:42:16] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[22:42:16] [PASSED] drm_test_get_tv_mode_from_name_truncated
[22:42:16] ============ [PASSED] drm_get_tv_mode_from_name ============
[22:42:16] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[22:42:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[22:42:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[22:42:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[22:42:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[22:42:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[22:42:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[22:42:16] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[22:42:16] [PASSED] VIC 96
[22:42:16] [PASSED] VIC 97
[22:42:16] [PASSED] VIC 101
[22:42:16] [PASSED] VIC 102
[22:42:16] [PASSED] VIC 106
[22:42:16] [PASSED] VIC 107
[22:42:16] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[22:42:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[22:42:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[22:42:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[22:42:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[22:42:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[22:42:16] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[22:42:16] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[22:42:16] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[22:42:16] [PASSED] Automatic
[22:42:16] [PASSED] Full
[22:42:16] [PASSED] Limited 16:235
[22:42:16] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[22:42:16] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[22:42:16] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[22:42:16] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[22:42:16] === drm_test_drm_hdmi_connector_get_output_format_name ====
[22:42:16] [PASSED] RGB
[22:42:16] [PASSED] YUV 4:2:0
[22:42:16] [PASSED] YUV 4:2:2
[22:42:16] [PASSED] YUV 4:4:4
[22:42:16] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[22:42:16] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[22:42:16] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[22:42:16] ============= drm_damage_helper (21 subtests) ==============
[22:42:16] [PASSED] drm_test_damage_iter_no_damage
[22:42:16] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[22:42:16] [PASSED] drm_test_damage_iter_no_damage_src_moved
[22:42:16] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[22:42:16] [PASSED] drm_test_damage_iter_no_damage_not_visible
[22:42:16] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[22:42:16] [PASSED] drm_test_damage_iter_no_damage_no_fb
[22:42:16] [PASSED] drm_test_damage_iter_simple_damage
[22:42:16] [PASSED] drm_test_damage_iter_single_damage
[22:42:16] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[22:42:16] [PASSED] drm_test_damage_iter_single_damage_outside_src
[22:42:16] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[22:42:16] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[22:42:16] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[22:42:16] [PASSED] drm_test_damage_iter_single_damage_src_moved
[22:42:16] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[22:42:16] [PASSED] drm_test_damage_iter_damage
[22:42:16] [PASSED] drm_test_damage_iter_damage_one_intersect
[22:42:16] [PASSED] drm_test_damage_iter_damage_one_outside
[22:42:16] [PASSED] drm_test_damage_iter_damage_src_moved
[22:42:16] [PASSED] drm_test_damage_iter_damage_not_visible
[22:42:16] ================ [PASSED] drm_damage_helper ================
[22:42:16] ============== drm_dp_mst_helper (3 subtests) ==============
[22:42:16] ============== drm_test_dp_mst_calc_pbn_mode ==============
[22:42:16] [PASSED] Clock 154000 BPP 30 DSC disabled
[22:42:16] [PASSED] Clock 234000 BPP 30 DSC disabled
[22:42:16] [PASSED] Clock 297000 BPP 24 DSC disabled
[22:42:16] [PASSED] Clock 332880 BPP 24 DSC enabled
[22:42:16] [PASSED] Clock 324540 BPP 24 DSC enabled
[22:42:16] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[22:42:16] ============== drm_test_dp_mst_calc_pbn_div ===============
[22:42:16] [PASSED] Link rate 2000000 lane count 4
[22:42:16] [PASSED] Link rate 2000000 lane count 2
[22:42:16] [PASSED] Link rate 2000000 lane count 1
[22:42:16] [PASSED] Link rate 1350000 lane count 4
[22:42:16] [PASSED] Link rate 1350000 lane count 2
[22:42:16] [PASSED] Link rate 1350000 lane count 1
[22:42:16] [PASSED] Link rate 1000000 lane count 4
[22:42:16] [PASSED] Link rate 1000000 lane count 2
[22:42:16] [PASSED] Link rate 1000000 lane count 1
[22:42:16] [PASSED] Link rate 810000 lane count 4
[22:42:16] [PASSED] Link rate 810000 lane count 2
[22:42:16] [PASSED] Link rate 810000 lane count 1
[22:42:16] [PASSED] Link rate 540000 lane count 4
[22:42:16] [PASSED] Link rate 540000 lane count 2
[22:42:16] [PASSED] Link rate 540000 lane count 1
[22:42:16] [PASSED] Link rate 270000 lane count 4
[22:42:16] [PASSED] Link rate 270000 lane count 2
[22:42:16] [PASSED] Link rate 270000 lane count 1
[22:42:16] [PASSED] Link rate 162000 lane count 4
[22:42:16] [PASSED] Link rate 162000 lane count 2
[22:42:16] [PASSED] Link rate 162000 lane count 1
[22:42:16] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[22:42:16] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[22:42:16] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[22:42:16] [PASSED] DP_POWER_UP_PHY with port number
[22:42:16] [PASSED] DP_POWER_DOWN_PHY with port number
[22:42:16] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[22:42:16] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[22:42:16] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[22:42:16] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[22:42:16] [PASSED] DP_QUERY_PAYLOAD with port number
[22:42:16] [PASSED] DP_QUERY_PAYLOAD with VCPI
[22:42:16] [PASSED] DP_REMOTE_DPCD_READ with port number
[22:42:16] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[22:42:16] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[22:42:16] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[22:42:16] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[22:42:16] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[22:42:16] [PASSED] DP_REMOTE_I2C_READ with port number
[22:42:16] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[22:42:16] [PASSED] DP_REMOTE_I2C_READ with transactions array
[22:42:16] [PASSED] DP_REMOTE_I2C_WRITE with port number
[22:42:16] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[22:42:16] [PASSED] DP_REMOTE_I2C_WRITE with data array
[22:42:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[22:42:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[22:42:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[22:42:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[22:42:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[22:42:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[22:42:16] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[22:42:16] ================ [PASSED] drm_dp_mst_helper ================
[22:42:16] ================== drm_exec (7 subtests) ===================
[22:42:16] [PASSED] sanitycheck
[22:42:16] [PASSED] test_lock
[22:42:16] [PASSED] test_lock_unlock
[22:42:16] [PASSED] test_duplicates
[22:42:16] [PASSED] test_prepare
[22:42:16] [PASSED] test_prepare_array
[22:42:16] [PASSED] test_multiple_loops
[22:42:16] ==================== [PASSED] drm_exec =====================
[22:42:16] =========== drm_format_helper_test (17 subtests) ===========
[22:42:16] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[22:42:16] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[22:42:16] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[22:42:16] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[22:42:16] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[22:42:16] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[22:42:16] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[22:42:16] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[22:42:16] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[22:42:16] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[22:42:16] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[22:42:16] ============== drm_test_fb_xrgb8888_to_mono ===============
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[22:42:16] ==================== drm_test_fb_swab =====================
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ================ [PASSED] drm_test_fb_swab =================
[22:42:16] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[22:42:16] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[22:42:16] [PASSED] single_pixel_source_buffer
[22:42:16] [PASSED] single_pixel_clip_rectangle
[22:42:16] [PASSED] well_known_colors
[22:42:16] [PASSED] destination_pitch
[22:42:16] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[22:42:16] ================= drm_test_fb_clip_offset =================
[22:42:16] [PASSED] pass through
[22:42:16] [PASSED] horizontal offset
[22:42:16] [PASSED] vertical offset
[22:42:16] [PASSED] horizontal and vertical offset
[22:42:16] [PASSED] horizontal offset (custom pitch)
[22:42:16] [PASSED] vertical offset (custom pitch)
[22:42:16] [PASSED] horizontal and vertical offset (custom pitch)
[22:42:16] ============= [PASSED] drm_test_fb_clip_offset =============
[22:42:16] =================== drm_test_fb_memcpy ====================
[22:42:16] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[22:42:16] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[22:42:16] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[22:42:16] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[22:42:16] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[22:42:16] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[22:42:16] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[22:42:16] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[22:42:16] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[22:42:16] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[22:42:16] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[22:42:16] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[22:42:16] =============== [PASSED] drm_test_fb_memcpy ================
[22:42:16] ============= [PASSED] drm_format_helper_test ==============
[22:42:16] ================= drm_format (18 subtests) =================
[22:42:16] [PASSED] drm_test_format_block_width_invalid
[22:42:16] [PASSED] drm_test_format_block_width_one_plane
[22:42:16] [PASSED] drm_test_format_block_width_two_plane
[22:42:16] [PASSED] drm_test_format_block_width_three_plane
[22:42:16] [PASSED] drm_test_format_block_width_tiled
[22:42:16] [PASSED] drm_test_format_block_height_invalid
[22:42:16] [PASSED] drm_test_format_block_height_one_plane
[22:42:16] [PASSED] drm_test_format_block_height_two_plane
[22:42:16] [PASSED] drm_test_format_block_height_three_plane
[22:42:16] [PASSED] drm_test_format_block_height_tiled
[22:42:16] [PASSED] drm_test_format_min_pitch_invalid
[22:42:16] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[22:42:16] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[22:42:16] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[22:42:16] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[22:42:16] [PASSED] drm_test_format_min_pitch_two_plane
[22:42:16] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[22:42:16] [PASSED] drm_test_format_min_pitch_tiled
[22:42:16] =================== [PASSED] drm_format ====================
[22:42:16] ============== drm_framebuffer (10 subtests) ===============
[22:42:16] ========== drm_test_framebuffer_check_src_coords ==========
[22:42:16] [PASSED] Success: source fits into fb
[22:42:16] [PASSED] Fail: overflowing fb with x-axis coordinate
[22:42:16] [PASSED] Fail: overflowing fb with y-axis coordinate
[22:42:16] [PASSED] Fail: overflowing fb with source width
[22:42:16] [PASSED] Fail: overflowing fb with source height
[22:42:16] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[22:42:16] [PASSED] drm_test_framebuffer_cleanup
[22:42:16] =============== drm_test_framebuffer_create ===============
[22:42:16] [PASSED] ABGR8888 normal sizes
[22:42:16] [PASSED] ABGR8888 max sizes
[22:42:16] [PASSED] ABGR8888 pitch greater than min required
[22:42:16] [PASSED] ABGR8888 pitch less than min required
[22:42:16] [PASSED] ABGR8888 Invalid width
[22:42:16] [PASSED] ABGR8888 Invalid buffer handle
[22:42:16] [PASSED] No pixel format
[22:42:16] [PASSED] ABGR8888 Width 0
[22:42:16] [PASSED] ABGR8888 Height 0
[22:42:16] [PASSED] ABGR8888 Out of bound height * pitch combination
[22:42:16] [PASSED] ABGR8888 Large buffer offset
[22:42:16] [PASSED] ABGR8888 Buffer offset for inexistent plane
[22:42:16] [PASSED] ABGR8888 Invalid flag
[22:42:16] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[22:42:16] [PASSED] ABGR8888 Valid buffer modifier
[22:42:16] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[22:42:16] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[22:42:16] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[22:42:16] [PASSED] NV12 Normal sizes
[22:42:16] [PASSED] NV12 Max sizes
[22:42:16] [PASSED] NV12 Invalid pitch
[22:42:16] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[22:42:16] [PASSED] NV12 different modifier per-plane
[22:42:16] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[22:42:16] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[22:42:16] [PASSED] NV12 Modifier for inexistent plane
[22:42:16] [PASSED] NV12 Handle for inexistent plane
[22:42:16] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[22:42:16] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[22:42:16] [PASSED] YVU420 Normal sizes
[22:42:16] [PASSED] YVU420 Max sizes
[22:42:16] [PASSED] YVU420 Invalid pitch
[22:42:16] [PASSED] YVU420 Different pitches
[22:42:16] [PASSED] YVU420 Different buffer offsets/pitches
[22:42:16] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[22:42:16] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[22:42:16] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[22:42:16] [PASSED] YVU420 Valid modifier
[22:42:16] [PASSED] YVU420 Different modifiers per plane
[22:42:16] [PASSED] YVU420 Modifier for inexistent plane
[22:42:16] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[22:42:16] [PASSED] X0L2 Normal sizes
[22:42:16] [PASSED] X0L2 Max sizes
[22:42:16] [PASSED] X0L2 Invalid pitch
[22:42:16] [PASSED] X0L2 Pitch greater than minimum required
[22:42:16] [PASSED] X0L2 Handle for inexistent plane
[22:42:16] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[22:42:16] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[22:42:16] [PASSED] X0L2 Valid modifier
[22:42:16] [PASSED] X0L2 Modifier for inexistent plane
[22:42:16] =========== [PASSED] drm_test_framebuffer_create ===========
[22:42:16] [PASSED] drm_test_framebuffer_free
[22:42:16] [PASSED] drm_test_framebuffer_init
[22:42:16] [PASSED] drm_test_framebuffer_init_bad_format
[22:42:16] [PASSED] drm_test_framebuffer_init_dev_mismatch
[22:42:16] [PASSED] drm_test_framebuffer_lookup
[22:42:16] [PASSED] drm_test_framebuffer_lookup_inexistent
[22:42:16] [PASSED] drm_test_framebuffer_modifiers_not_supported
[22:42:16] ================= [PASSED] drm_framebuffer =================
[22:42:16] ================ drm_gem_shmem (8 subtests) ================
[22:42:16] [PASSED] drm_gem_shmem_test_obj_create
[22:42:16] [PASSED] drm_gem_shmem_test_obj_create_private
[22:42:16] [PASSED] drm_gem_shmem_test_pin_pages
[22:42:16] [PASSED] drm_gem_shmem_test_vmap
[22:42:16] [PASSED] drm_gem_shmem_test_get_sg_table
[22:42:16] [PASSED] drm_gem_shmem_test_get_pages_sgt
[22:42:16] [PASSED] drm_gem_shmem_test_madvise
[22:42:16] [PASSED] drm_gem_shmem_test_purge
[22:42:16] ================== [PASSED] drm_gem_shmem ==================
[22:42:16] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[22:42:16] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[22:42:16] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[22:42:16] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[22:42:16] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[22:42:16] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[22:42:16] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[22:42:16] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[22:42:16] [PASSED] Automatic
[22:42:16] [PASSED] Full
[22:42:16] [PASSED] Limited 16:235
[22:42:16] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[22:42:16] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[22:42:16] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[22:42:16] [PASSED] drm_test_check_disable_connector
[22:42:16] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[22:42:16] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[22:42:16] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[22:42:16] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[22:42:16] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[22:42:16] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[22:42:16] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[22:42:16] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[22:42:16] [PASSED] drm_test_check_output_bpc_dvi
[22:42:16] [PASSED] drm_test_check_output_bpc_format_vic_1
[22:42:16] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[22:42:16] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[22:42:16] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[22:42:16] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[22:42:16] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[22:42:16] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[22:42:16] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[22:42:16] ============ drm_test_check_hdmi_color_format =============
[22:42:16] [PASSED] AUTO -> RGB
[22:42:16] [PASSED] YCBCR422 -> YUV422
[22:42:16] [PASSED] YCBCR420 -> YUV420
[22:42:16] [PASSED] YCBCR444 -> YUV444
[22:42:16] [PASSED] RGB -> RGB
[22:42:16] ======== [PASSED] drm_test_check_hdmi_color_format =========
[22:42:16] ======== drm_test_check_hdmi_color_format_420_only ========
[22:42:16] [PASSED] RGB should fail
[22:42:16] [PASSED] YUV444 should fail
[22:42:16] [PASSED] YUV422 should fail
[22:42:16] [PASSED] YUV420 should work
[22:42:16] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[22:42:16] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[22:42:16] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[22:42:16] [PASSED] drm_test_check_broadcast_rgb_value
[22:42:16] [PASSED] drm_test_check_bpc_8_value
[22:42:16] [PASSED] drm_test_check_bpc_10_value
[22:42:16] [PASSED] drm_test_check_bpc_12_value
[22:42:16] [PASSED] drm_test_check_format_value
[22:42:16] [PASSED] drm_test_check_tmds_char_value
[22:42:16] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[22:42:16] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[22:42:16] [PASSED] drm_test_check_mode_valid
[22:42:16] [PASSED] drm_test_check_mode_valid_reject
[22:42:16] [PASSED] drm_test_check_mode_valid_reject_rate
[22:42:16] [PASSED] drm_test_check_mode_valid_reject_max_clock
[22:42:16] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[22:42:16] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[22:42:16] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[22:42:16] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[22:42:16] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[22:42:16] [PASSED] drm_test_check_infoframes
[22:42:16] [PASSED] drm_test_check_reject_avi_infoframe
[22:42:16] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[22:42:16] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[22:42:16] [PASSED] drm_test_check_reject_audio_infoframe
[22:42:16] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[22:42:16] ================= drm_managed (2 subtests) =================
[22:42:16] [PASSED] drm_test_managed_release_action
[22:42:16] [PASSED] drm_test_managed_run_action
[22:42:16] =================== [PASSED] drm_managed ===================
[22:42:16] =================== drm_mm (6 subtests) ====================
[22:42:16] [PASSED] drm_test_mm_init
[22:42:16] [PASSED] drm_test_mm_debug
[22:42:16] [PASSED] drm_test_mm_align32
[22:42:16] [PASSED] drm_test_mm_align64
[22:42:16] [PASSED] drm_test_mm_lowest
[22:42:16] [PASSED] drm_test_mm_highest
[22:42:16] ===================== [PASSED] drm_mm ======================
[22:42:16] ============= drm_modes_analog_tv (5 subtests) =============
[22:42:16] [PASSED] drm_test_modes_analog_tv_mono_576i
[22:42:16] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[22:42:16] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[22:42:16] [PASSED] drm_test_modes_analog_tv_pal_576i
[22:42:16] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[22:42:16] =============== [PASSED] drm_modes_analog_tv ===============
[22:42:16] ============== drm_panic_helper (3 subtests) ===============
[22:42:16] ============= drm_test_panic_screen_user_map ==============
[22:42:16] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[22:42:16] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[22:42:16] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[22:42:16] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[22:42:16] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[22:42:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[22:42:16] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[22:42:16] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[22:42:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[22:42:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[22:42:16] ========= [PASSED] drm_test_panic_screen_user_map ==========
[22:42:16] ============= drm_test_panic_screen_user_page =============
[22:42:16] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[22:42:16] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[22:42:16] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[22:42:16] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[22:42:16] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[22:42:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[22:42:17] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[22:42:17] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[22:42:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[22:42:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[22:42:17] ========= [PASSED] drm_test_panic_screen_user_page =========
[22:42:17] ========== drm_test_panic_screen_user_set_pixel ===========
[22:42:17] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[22:42:17] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[22:42:17] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[22:42:17] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[22:42:17] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[22:42:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[22:42:17] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[22:42:17] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[22:42:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[22:42:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[22:42:17] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[22:42:17] ================ [PASSED] drm_panic_helper =================
[22:42:17] ============== drm_plane_helper (2 subtests) ===============
[22:42:17] =============== drm_test_check_plane_state ================
[22:42:17] [PASSED] clipping_simple
[22:42:17] [PASSED] clipping_rotate_reflect
[22:42:17] [PASSED] positioning_simple
[22:42:17] [PASSED] upscaling
[22:42:17] [PASSED] downscaling
[22:42:17] [PASSED] rounding1
[22:42:17] [PASSED] rounding2
[22:42:17] [PASSED] rounding3
[22:42:17] [PASSED] rounding4
[22:42:17] =========== [PASSED] drm_test_check_plane_state ============
[22:42:17] =========== drm_test_check_invalid_plane_state ============
[22:42:17] [PASSED] positioning_invalid
[22:42:17] [PASSED] upscaling_invalid
[22:42:17] [PASSED] downscaling_invalid
[22:42:17] ======= [PASSED] drm_test_check_invalid_plane_state ========
[22:42:17] ================ [PASSED] drm_plane_helper =================
[22:42:17] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[22:42:17] ====== drm_test_connector_helper_tv_get_modes_check =======
[22:42:17] [PASSED] None
[22:42:17] [PASSED] PAL
[22:42:17] [PASSED] NTSC
[22:42:17] [PASSED] Both, NTSC Default
[22:42:17] [PASSED] Both, PAL Default
[22:42:17] [PASSED] Both, NTSC Default, with PAL on command-line
[22:42:17] [PASSED] Both, PAL Default, with NTSC on command-line
[22:42:17] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[22:42:17] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[22:42:17] ================== drm_rect (9 subtests) ===================
[22:42:17] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[22:42:17] [PASSED] drm_test_rect_clip_scaled_not_clipped
[22:42:17] [PASSED] drm_test_rect_clip_scaled_clipped
[22:42:17] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[22:42:17] ================= drm_test_rect_intersect =================
[22:42:17] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[22:42:17] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[22:42:17] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[22:42:17] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[22:42:17] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[22:42:17] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[22:42:17] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[22:42:17] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[22:42:17] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[22:42:17] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[22:42:17] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[22:42:17] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[22:42:17] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[22:42:17] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[22:42:17] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[22:42:17] ============= [PASSED] drm_test_rect_intersect =============
[22:42:17] ================ drm_test_rect_calc_hscale ================
[22:42:17] [PASSED] normal use
[22:42:17] [PASSED] out of max range
[22:42:17] [PASSED] out of min range
[22:42:17] [PASSED] zero dst
[22:42:17] [PASSED] negative src
[22:42:17] [PASSED] negative dst
[22:42:17] ============ [PASSED] drm_test_rect_calc_hscale ============
[22:42:17] ================ drm_test_rect_calc_vscale ================
[22:42:17] [PASSED] normal use
[22:42:17] [PASSED] out of max range
[22:42:17] [PASSED] out of min range
[22:42:17] [PASSED] zero dst
[22:42:17] [PASSED] negative src
[22:42:17] [PASSED] negative dst
[22:42:17] ============ [PASSED] drm_test_rect_calc_vscale ============
[22:42:17] ================== drm_test_rect_rotate ===================
[22:42:17] [PASSED] reflect-x
[22:42:17] [PASSED] reflect-y
[22:42:17] [PASSED] rotate-0
[22:42:17] [PASSED] rotate-90
[22:42:17] [PASSED] rotate-180
[22:42:17] [PASSED] rotate-270
[22:42:17] ============== [PASSED] drm_test_rect_rotate ===============
[22:42:17] ================ drm_test_rect_rotate_inv =================
[22:42:17] [PASSED] reflect-x
[22:42:17] [PASSED] reflect-y
[22:42:17] [PASSED] rotate-0
[22:42:17] [PASSED] rotate-90
[22:42:17] [PASSED] rotate-180
[22:42:17] [PASSED] rotate-270
[22:42:17] ============ [PASSED] drm_test_rect_rotate_inv =============
[22:42:17] ==================== [PASSED] drm_rect =====================
[22:42:17] ============ drm_sysfb_modeset_test (1 subtest) ============
[22:42:17] ============ drm_test_sysfb_build_fourcc_list =============
[22:42:17] [PASSED] no native formats
[22:42:17] [PASSED] XRGB8888 as native format
[22:42:17] [PASSED] remove duplicates
[22:42:17] [PASSED] convert alpha formats
[22:42:17] [PASSED] random formats
[22:42:17] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[22:42:17] ============= [PASSED] drm_sysfb_modeset_test ==============
[22:42:17] ================== drm_fixp (2 subtests) ===================
[22:42:17] [PASSED] drm_test_int2fixp
[22:42:17] [PASSED] drm_test_sm2fixp
[22:42:17] ==================== [PASSED] drm_fixp =====================
[22:42:17] ============================================================
[22:42:17] Testing complete. Ran 667 tests: passed: 667
[22:42:17] Elapsed time: 27.914s total, 2.452s configuring, 25.042s building, 0.415s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[22:42:17] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:42:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:42:30] Starting KUnit Kernel (1/1)...
[22:42:30] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:42:30] ================= ttm_device (5 subtests) ==================
[22:42:30] [PASSED] ttm_device_init_basic
[22:42:30] [PASSED] ttm_device_init_multiple
[22:42:30] [PASSED] ttm_device_fini_basic
[22:42:30] [PASSED] ttm_device_init_no_vma_man
[22:42:30] ================== ttm_device_init_pools ==================
[22:42:30] [PASSED] No DMA allocations, no DMA32 required
[22:42:30] [PASSED] DMA allocations, DMA32 required
[22:42:30] [PASSED] No DMA allocations, DMA32 required
[22:42:30] [PASSED] DMA allocations, no DMA32 required
[22:42:30] ============== [PASSED] ttm_device_init_pools ==============
[22:42:30] =================== [PASSED] ttm_device ====================
[22:42:30] ================== ttm_pool (8 subtests) ===================
[22:42:30] ================== ttm_pool_alloc_basic ===================
[22:42:30] [PASSED] One page
[22:42:30] [PASSED] More than one page
[22:42:30] [PASSED] Above the allocation limit
[22:42:30] [PASSED] One page, with coherent DMA mappings enabled
[22:42:30] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:42:30] ============== [PASSED] ttm_pool_alloc_basic ===============
[22:42:30] ============== ttm_pool_alloc_basic_dma_addr ==============
[22:42:30] [PASSED] One page
[22:42:30] [PASSED] More than one page
[22:42:30] [PASSED] Above the allocation limit
[22:42:30] [PASSED] One page, with coherent DMA mappings enabled
[22:42:30] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:42:30] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[22:42:30] [PASSED] ttm_pool_alloc_order_caching_match
[22:42:30] [PASSED] ttm_pool_alloc_caching_mismatch
[22:42:30] [PASSED] ttm_pool_alloc_order_mismatch
[22:42:30] [PASSED] ttm_pool_free_dma_alloc
[22:42:30] [PASSED] ttm_pool_free_no_dma_alloc
[22:42:30] [PASSED] ttm_pool_fini_basic
[22:42:30] ==================== [PASSED] ttm_pool =====================
[22:42:30] ================ ttm_resource (8 subtests) =================
[22:42:30] ================= ttm_resource_init_basic =================
[22:42:30] [PASSED] Init resource in TTM_PL_SYSTEM
[22:42:30] [PASSED] Init resource in TTM_PL_VRAM
[22:42:30] [PASSED] Init resource in a private placement
[22:42:30] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[22:42:30] ============= [PASSED] ttm_resource_init_basic =============
[22:42:30] [PASSED] ttm_resource_init_pinned
[22:42:30] [PASSED] ttm_resource_fini_basic
[22:42:30] [PASSED] ttm_resource_manager_init_basic
[22:42:30] [PASSED] ttm_resource_manager_usage_basic
[22:42:30] [PASSED] ttm_resource_manager_set_used_basic
[22:42:30] [PASSED] ttm_sys_man_alloc_basic
[22:42:30] [PASSED] ttm_sys_man_free_basic
[22:42:30] ================== [PASSED] ttm_resource ===================
[22:42:30] =================== ttm_tt (15 subtests) ===================
[22:42:30] ==================== ttm_tt_init_basic ====================
[22:42:30] [PASSED] Page-aligned size
[22:42:30] [PASSED] Extra pages requested
[22:42:30] ================ [PASSED] ttm_tt_init_basic ================
[22:42:30] [PASSED] ttm_tt_init_misaligned
[22:42:30] [PASSED] ttm_tt_fini_basic
[22:42:30] [PASSED] ttm_tt_fini_sg
[22:42:30] [PASSED] ttm_tt_fini_shmem
[22:42:30] [PASSED] ttm_tt_create_basic
[22:42:30] [PASSED] ttm_tt_create_invalid_bo_type
[22:42:30] [PASSED] ttm_tt_create_ttm_exists
[22:42:30] [PASSED] ttm_tt_create_failed
[22:42:30] [PASSED] ttm_tt_destroy_basic
[22:42:30] [PASSED] ttm_tt_populate_null_ttm
[22:42:30] [PASSED] ttm_tt_populate_populated_ttm
[22:42:30] [PASSED] ttm_tt_unpopulate_basic
[22:42:30] [PASSED] ttm_tt_unpopulate_empty_ttm
[22:42:30] [PASSED] ttm_tt_swapin_basic
[22:42:30] ===================== [PASSED] ttm_tt ======================
[22:42:30] =================== ttm_bo (14 subtests) ===================
[22:42:30] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[22:42:30] [PASSED] Cannot be interrupted and sleeps
[22:42:30] [PASSED] Cannot be interrupted, locks straight away
[22:42:30] [PASSED] Can be interrupted, sleeps
[22:42:30] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[22:42:30] [PASSED] ttm_bo_reserve_locked_no_sleep
[22:42:30] [PASSED] ttm_bo_reserve_no_wait_ticket
[22:42:30] [PASSED] ttm_bo_reserve_double_resv
[22:42:30] [PASSED] ttm_bo_reserve_interrupted
[22:42:30] [PASSED] ttm_bo_reserve_deadlock
[22:42:30] [PASSED] ttm_bo_unreserve_basic
[22:42:30] [PASSED] ttm_bo_unreserve_pinned
[22:42:30] [PASSED] ttm_bo_unreserve_bulk
[22:42:30] [PASSED] ttm_bo_fini_basic
[22:42:30] [PASSED] ttm_bo_fini_shared_resv
[22:42:30] [PASSED] ttm_bo_pin_basic
[22:42:30] [PASSED] ttm_bo_pin_unpin_resource
[22:42:30] [PASSED] ttm_bo_multiple_pin_one_unpin
[22:42:30] ===================== [PASSED] ttm_bo ======================
[22:42:30] ============== ttm_bo_validate (22 subtests) ===============
[22:42:30] ============== ttm_bo_init_reserved_sys_man ===============
[22:42:30] [PASSED] Buffer object for userspace
[22:42:30] [PASSED] Kernel buffer object
[22:42:30] [PASSED] Shared buffer object
[22:42:30] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[22:42:30] ============== ttm_bo_init_reserved_mock_man ==============
[22:42:30] [PASSED] Buffer object for userspace
[22:42:30] [PASSED] Kernel buffer object
[22:42:30] [PASSED] Shared buffer object
[22:42:30] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[22:42:30] [PASSED] ttm_bo_init_reserved_resv
[22:42:30] ================== ttm_bo_validate_basic ==================
[22:42:30] [PASSED] Buffer object for userspace
[22:42:30] [PASSED] Kernel buffer object
[22:42:30] [PASSED] Shared buffer object
[22:42:30] ============== [PASSED] ttm_bo_validate_basic ==============
[22:42:30] [PASSED] ttm_bo_validate_invalid_placement
[22:42:30] ============= ttm_bo_validate_same_placement ==============
[22:42:30] [PASSED] System manager
[22:42:30] [PASSED] VRAM manager
[22:42:30] ========= [PASSED] ttm_bo_validate_same_placement ==========
[22:42:30] [PASSED] ttm_bo_validate_failed_alloc
[22:42:30] [PASSED] ttm_bo_validate_pinned
[22:42:30] [PASSED] ttm_bo_validate_busy_placement
[22:42:30] ================ ttm_bo_validate_multihop =================
[22:42:30] [PASSED] Buffer object for userspace
[22:42:30] [PASSED] Kernel buffer object
[22:42:30] [PASSED] Shared buffer object
[22:42:30] ============ [PASSED] ttm_bo_validate_multihop =============
[22:42:30] ========== ttm_bo_validate_no_placement_signaled ==========
[22:42:30] [PASSED] Buffer object in system domain, no page vector
[22:42:30] [PASSED] Buffer object in system domain with an existing page vector
[22:42:30] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[22:42:30] ======== ttm_bo_validate_no_placement_not_signaled ========
[22:42:30] [PASSED] Buffer object for userspace
[22:42:30] [PASSED] Kernel buffer object
[22:42:30] [PASSED] Shared buffer object
[22:42:30] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[22:42:30] [PASSED] ttm_bo_validate_move_fence_signaled
[22:42:30] ========= ttm_bo_validate_move_fence_not_signaled =========
[22:42:30] [PASSED] Waits for GPU
[22:42:30] [PASSED] Tries to lock straight away
[22:42:30] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[22:42:30] [PASSED] ttm_bo_validate_swapout
[22:42:30] [PASSED] ttm_bo_validate_happy_evict
[22:42:30] [PASSED] ttm_bo_validate_all_pinned_evict
[22:42:30] [PASSED] ttm_bo_validate_allowed_only_evict
[22:42:30] [PASSED] ttm_bo_validate_deleted_evict
[22:42:30] [PASSED] ttm_bo_validate_busy_domain_evict
[22:42:30] [PASSED] ttm_bo_validate_evict_gutting
[22:42:30] [PASSED] ttm_bo_validate_recrusive_evict
[22:42:30] ================= [PASSED] ttm_bo_validate =================
[22:42:30] ============================================================
[22:42:30] Testing complete. Ran 102 tests: passed: 102
[22:42:30] Elapsed time: 13.028s total, 2.546s configuring, 10.215s building, 0.224s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[22:42:30] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:42:32] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:42:41] Starting KUnit Kernel (1/1)...
[22:42:41] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:42:41] =============== dma-buf-fence (12 subtests) ================
[22:42:41] [PASSED] test_sanitycheck
[22:42:41] [PASSED] test_signaling
[22:42:41] [PASSED] test_add_callback
[22:42:41] [PASSED] test_late_add_callback
[22:42:41] [PASSED] test_rm_callback
[22:42:41] [PASSED] test_late_rm_callback
[22:42:41] [PASSED] test_status
[22:42:41] [PASSED] test_error
[22:42:41] [PASSED] test_wait
[22:42:41] [PASSED] test_wait_timeout
[22:42:41] [PASSED] test_stub
[22:42:41] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[22:42:41] ================== [PASSED] dma-buf-fence ==================
[22:42:41] ============ dma-buf-fence-chain (11 subtests) =============
[22:42:41] [PASSED] test_sanitycheck
[22:42:41] [PASSED] test_find_seqno
[22:42:41] [PASSED] test_find_signaled
[22:42:41] [PASSED] test_find_out_of_order
[22:42:46] [PASSED] test_find_gap
[22:42:46] [PASSED] test_find_race
[22:42:46] [PASSED] test_signal_forward
[22:42:46] [PASSED] test_signal_backward
[22:42:46] [PASSED] test_wait_forward
[22:42:46] [PASSED] test_wait_backward
[22:42:46] [PASSED] test_wait_random
[22:42:46] =============== [PASSED] dma-buf-fence-chain ===============
[22:42:46] ============ dma-buf-fence-unwrap (11 subtests) ============
[22:42:46] [PASSED] test_sanitycheck
[22:42:46] [PASSED] test_unwrap_array
[22:42:46] [PASSED] test_unwrap_chain
[22:42:46] [PASSED] test_unwrap_chain_array
[22:42:46] [PASSED] test_unwrap_merge
[22:42:46] [PASSED] test_unwrap_merge_duplicate
[22:42:46] [PASSED] test_unwrap_merge_seqno
[22:42:46] [PASSED] test_unwrap_merge_order
[22:42:46] [PASSED] test_unwrap_merge_complex
[22:42:46] [PASSED] test_unwrap_merge_complex_seqno
[22:42:46] [PASSED] test_dedup_empty
[22:42:46] ============== [PASSED] dma-buf-fence-unwrap ===============
[22:42:46] ================ dma-buf-resv (5 subtests) =================
[22:42:46] [PASSED] test_sanitycheck
[22:42:46] ===================== test_signaling ======================
[22:42:46] [PASSED] kernel
[22:42:46] [PASSED] write
[22:42:46] [PASSED] read
[22:42:46] [PASSED] bookkeep
[22:42:46] ================= [PASSED] test_signaling ==================
[22:42:46] ====================== test_for_each ======================
[22:42:46] [PASSED] kernel
[22:42:46] [PASSED] write
[22:42:46] [PASSED] read
[22:42:46] [PASSED] bookkeep
[22:42:46] ================== [PASSED] test_for_each ==================
[22:42:46] ================= test_for_each_unlocked ==================
[22:42:46] [PASSED] kernel
[22:42:46] [PASSED] write
[22:42:46] [PASSED] read
[22:42:46] [PASSED] bookkeep
[22:42:46] ============= [PASSED] test_for_each_unlocked ==============
[22:42:46] ===================== test_get_fences =====================
[22:42:46] [PASSED] kernel
[22:42:46] [PASSED] write
[22:42:46] [PASSED] read
[22:42:46] [PASSED] bookkeep
[22:42:46] ================= [PASSED] test_get_fences =================
[22:42:46] ================== [PASSED] dma-buf-resv ===================
[22:42:46] ============================================================
[22:42:46] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[22:42:46] Elapsed time: 16.584s total, 2.528s configuring, 8.735s building, 5.285s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
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