[PATCH v15 00/10] Introduce Xe PCIe FLR

[PATCH v15 00/10] Introduce Xe PCIe FLR

[Raag Jadav]

Here's my humble attempt at introducing PCIe Function Level Reset (FLR)
support in xe driver. This is ofcourse a half baked implementation and
only limited to re-initializing GT. This needs to be extended for a lot
of components which are expected to be added as a follow up.

Detailed description in commit message and documentation.

PS: All xe_exec_basic tests and clpeak run smoothly after FLR. Give it
a spin and let me know if any regressions.

Trigger it with:

$ echo 1 > /sys/bus/pci/devices/<BDF>/reset

 v2: Re-initialize migrate context (Matthew Brost)
     Add kernel doc (Matthew Brost)
     Spell out Function Level Reset (Jani)

 v3: Cancel in-flight jobs before FLR

 v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)

 v5: Re-initialize kernel queues through submission backend (Matthew Brost)
     Prevent PM ref leak for wedged device (Matthew Brost)

 v6: Skip uC firmware selection during re-initialization (Daniele)
     Add IS_DGFX() and EXEC_QUEUE_FLAG_KERNEL asserts (Daniele)
     s/flr_done/reinit (Daniele)
     Repurpose system suspend/resume helpers for FLR (Daniele)
     Add PCIe FLR documentation (Daniele)

 v7: Refine PCIe FLR documentation (Daniele)
     Introduce xe_pci_reset_skip() helper (Lukasz)

 v8: Set fw state to XE_UC_FIRMWARE_INIT_FAIL on failure (Daniele)
     Introduce xe_sched_reinit() (Daniele)
     Maintain timeout per scheduler instance (Daniele)
     s/reinit/reinit_kernel (Daniele)

 v9: Move drm_sched_is_stopped() assert to xe_sched_reinit() (Daniele)
     Add negative asserts for GSC and PXP (Daniele)
     Provide xe_lrc_ctx_init() as regular function (Daniele)
     Redesign wedged state management to prevent races (Sashiko)
     Add 'Xe' prefix to document title (Rodrigo)

v10: Spell out temporary device wedging in subject (Lukasz)
     Update documentation to include PCI Error Handling (Lukasz)
     Maintain wedge reference on FLR failure (Lukasz)

v11: Wait for xe_pcode_ready() before resume (Riana)
     Update GuC CT path to check against permanent wedging (Lukasz, Riana)
     Put wedge reference only if device is wedged during resume() (Riana)
     Cleanup wedge reference logic in ->reset_prepare() (Lukasz)
     Use 'PCI reset' in logs (Riana)

v12: s/xe_wedge_not_recoverable/xe_wedged_permanent (Riana)
     Refine error logging and documentation (Riana)

v13: Handle ULLS fini (Sashiko)
     Re-initialize cpu bind queue (Sashiko)
     Prevent PM ref leak on slot reset failure (Sashiko)

v14: Early return on survivability mode (Riana)

v15: Rebase

Raag Jadav (10):
  drm/xe/uc_fw: Allow re-initializing firmware
  drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel()
  drm/xe/gt: Introduce FLR helpers
  drm/xe/bo_evict: Introduce xe_bo_restore_map()
  drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
  drm/xe/migrate: Introduce xe_migrate_reinit() and xe_cpu_bind_reinit()
  drm/xe/pm: Introduce xe_device_suspend/resume()
  drm/xe: Introduce temporary device wedging
  drm/xe/pci: Introduce PCIe Function Level Reset
  drm/xe/doc: Wire up PCI Error Handling

 Documentation/gpu/xe/index.rst              |   1 +
 Documentation/gpu/xe/xe_pci_error.rst       |   8 +
 drivers/gpu/drm/xe/xe_bo_evict.c            |  43 +++++-
 drivers/gpu/drm/xe/xe_bo_evict.h            |   1 +
 drivers/gpu/drm/xe/xe_cpu_bind.c            |  11 ++
 drivers/gpu/drm/xe/xe_cpu_bind.h            |   1 +
 drivers/gpu/drm/xe/xe_device.c              | 155 +++++++++++++++++++
 drivers/gpu/drm/xe/xe_device.h              |   2 +
 drivers/gpu/drm/xe/xe_device_types.h        |   3 +
 drivers/gpu/drm/xe/xe_exec_queue.c          |  47 +++++-
 drivers/gpu/drm/xe/xe_exec_queue.h          |   1 +
 drivers/gpu/drm/xe/xe_exec_queue_types.h    |   2 +
 drivers/gpu/drm/xe/xe_execlist.c            |   6 +
 drivers/gpu/drm/xe/xe_gpu_scheduler.c       |  17 ++
 drivers/gpu/drm/xe/xe_gpu_scheduler.h       |   1 +
 drivers/gpu/drm/xe/xe_gpu_scheduler_types.h |   5 +
 drivers/gpu/drm/xe/xe_gsc.c                 |  14 ++
 drivers/gpu/drm/xe/xe_gsc.h                 |   1 +
 drivers/gpu/drm/xe/xe_gt.c                  |  42 +++++
 drivers/gpu/drm/xe/xe_gt.h                  |   2 +
 drivers/gpu/drm/xe/xe_guc.c                 |  29 ++++
 drivers/gpu/drm/xe/xe_guc.h                 |   2 +
 drivers/gpu/drm/xe/xe_guc_ct.c              |   6 +-
 drivers/gpu/drm/xe/xe_guc_submit.c          |   9 ++
 drivers/gpu/drm/xe/xe_huc.c                 |  14 ++
 drivers/gpu/drm/xe/xe_huc.h                 |   1 +
 drivers/gpu/drm/xe/xe_lrc.c                 |  15 +-
 drivers/gpu/drm/xe/xe_lrc.h                 |   2 +
 drivers/gpu/drm/xe/xe_migrate.c             |  39 ++++-
 drivers/gpu/drm/xe/xe_migrate.h             |   2 +
 drivers/gpu/drm/xe/xe_pci.c                 |   2 +
 drivers/gpu/drm/xe/xe_pci_error.c           | 163 ++++++++++++++++++--
 drivers/gpu/drm/xe/xe_pm.c                  | 114 ++------------
 drivers/gpu/drm/xe/xe_pm.h                  |   1 +
 drivers/gpu/drm/xe/xe_uc.c                  |  75 +++++++++
 drivers/gpu/drm/xe/xe_uc.h                  |   2 +
 drivers/gpu/drm/xe/xe_uc_fw.c               |  67 ++++++++
 drivers/gpu/drm/xe/xe_uc_fw.h               |   1 +
 drivers/gpu/drm/xe/xe_uc_types.h            |  14 ++
 drivers/gpu/drm/xe/xe_wedge.c               |  48 +++++-
 drivers/gpu/drm/xe/xe_wedge.h               |  13 +-
 drivers/gpu/drm/xe/xe_wedge_types.h         |  13 +-
 42 files changed, 859 insertions(+), 136 deletions(-)
 create mode 100644 Documentation/gpu/xe/xe_pci_error.rst

-- 
2.43.0

[PATCH v15 01/10] drm/xe/uc_fw: Allow re-initializing firmware

[Raag Jadav]

In preparation of usecases which require re-initializing firmware without
reloading the driver, introduce xe_uc_fw_reinit(). The uC firmware bo
already exists but since it's contents are on VRAM, they are lost on PCIe
FLR. Copy the firmware back to it's bo and mark it as loadable as part of
re-initialization.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v2: Add kernel doc (Matthew Brost)
v6: Skip uC firmware selection during re-initialization (Daniele)
v8: Set fw state to XE_UC_FIRMWARE_INIT_FAIL on failure (Daniele)
---
 drivers/gpu/drm/xe/xe_uc_fw.c | 67 +++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_uc_fw.h |  1 +
 2 files changed, 68 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index 02aa97de6d3a..55bd0a12a2b9 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -837,6 +837,14 @@ static int uc_fw_copy(struct xe_uc_fw *uc_fw, const void *data, size_t size, u32
 	return err;
 }
 
+static void uc_fw_reinit(struct xe_uc_fw *uc_fw, const void *data)
+{
+	struct xe_device *xe = uc_fw_to_xe(uc_fw);
+
+	xe_map_memcpy_to(xe, &uc_fw->bo->vmap, 0, data, uc_fw->size);
+	xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_LOADABLE);
+}
+
 int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
 {
 	const struct firmware *fw = NULL;
@@ -860,6 +868,65 @@ int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
 }
 ALLOW_ERROR_INJECTION(xe_uc_fw_init, ERRNO); /* See xe_pci_probe() */
 
+/**
+ * xe_uc_fw_reinit() - Re-initialize uC firmware into its bo
+ * @uc_fw: uC firmware
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw)
+{
+	struct xe_device *xe = uc_fw_to_xe(uc_fw);
+	struct xe_uc_fw_version old_fw, new_fw;
+	const struct firmware *fw = NULL;
+	int err;
+
+	/* Make sure the status was cleared the last time we reset the uc */
+	xe_assert(xe, !xe_uc_fw_is_loaded(uc_fw));
+
+	/* We shouldn't be here for the firmware which wasn't available */
+	if (!xe_uc_fw_is_available(uc_fw))
+		return -ENOEXEC;
+
+	old_fw = uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
+
+	err = firmware_request_nowarn(&fw, uc_fw->path, xe->drm.dev);
+	if (err)
+		goto init_fail;
+
+	err = parse_headers(uc_fw, fw);
+	if (err)
+		goto restore_old;
+
+	new_fw = uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
+	if (memcmp(&old_fw, &new_fw, sizeof(old_fw)) || uc_fw->size != fw->size) {
+		drm_err(&xe->drm, "%s firmware mismatch on %s",
+			xe_uc_fw_type_repr(uc_fw->type), uc_fw->path);
+
+		err = -ENOEXEC;
+		goto restore_old;
+	}
+
+	uc_fw_reinit(uc_fw, fw->data);
+	uc_fw_release(fw);
+	return 0;
+
+restore_old:
+	/*
+	 * parse_headers() updates version details, so restore original version
+	 * before bailing.
+	 *
+	 * TODO: Create a struct of all the fields touched by parse_headers()
+	 * and restore them all.
+	 */
+	uc_fw->versions.found[XE_UC_FW_VER_RELEASE] = old_fw;
+init_fail:
+	xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_INIT_FAIL);
+	/* OK even if fw is NULL */
+	uc_fw_release(fw);
+	return err;
+}
+
 static u32 uc_fw_ggtt_offset(struct xe_uc_fw *uc_fw)
 {
 	return xe_bo_ggtt_addr(uc_fw->bo);
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.h b/drivers/gpu/drm/xe/xe_uc_fw.h
index f2d3a3e7208b..6debdb924310 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.h
+++ b/drivers/gpu/drm/xe/xe_uc_fw.h
@@ -15,6 +15,7 @@
 struct drm_printer;
 
 int xe_uc_fw_init(struct xe_uc_fw *uc_fw);
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw);
 size_t xe_uc_fw_copy_rsa(struct xe_uc_fw *uc_fw, void *dst, u32 max_len);
 int xe_uc_fw_upload(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags);
 int xe_uc_fw_check_version_requirements(struct xe_uc_fw *uc_fw);
-- 
2.43.0

[PATCH v15 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel()

[Raag Jadav]

In preparation of usecases which require re-initializing GuC submission
after PCIe FLR, introduce guc_exec_queue_reinit_kernel() helper. This will
restore kernel queues which might have been killed before PCIe FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
v5: Re-initialize kernel queues through submission backend (Matthew Brost)
v8: Introduce xe_sched_reinit() (Daniele)
    Maintain timeout per scheduler instance (Daniele)
    s/reinit/reinit_kernel (Daniele)
v9: Move drm_sched_is_stopped() assert to xe_sched_reinit() (Daniele)
---
 drivers/gpu/drm/xe/xe_exec_queue_types.h    |  2 ++
 drivers/gpu/drm/xe/xe_execlist.c            |  6 ++++++
 drivers/gpu/drm/xe/xe_gpu_scheduler.c       | 17 +++++++++++++++++
 drivers/gpu/drm/xe/xe_gpu_scheduler.h       |  1 +
 drivers/gpu/drm/xe/xe_gpu_scheduler_types.h |  5 +++++
 drivers/gpu/drm/xe/xe_guc_submit.c          |  9 +++++++++
 6 files changed, 40 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index 48c05398b016..44a41ddc7a05 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -292,6 +292,8 @@ struct xe_exec_queue {
 struct xe_exec_queue_ops {
 	/** @init: Initialize exec queue for submission backend */
 	int (*init)(struct xe_exec_queue *q);
+	/** @reinit_kernel: Re-initialize kernel queue for submission backend */
+	void (*reinit_kernel)(struct xe_exec_queue *q);
 	/** @kill: Kill inflight submissions for backend */
 	void (*kill)(struct xe_exec_queue *q);
 	/** @fini: Undoes the init() for submission backend */
diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execlist.c
index a6984999962d..47ed4c0e2bfe 100644
--- a/drivers/gpu/drm/xe/xe_execlist.c
+++ b/drivers/gpu/drm/xe/xe_execlist.c
@@ -407,6 +407,11 @@ static void execlist_exec_queue_destroy_async(struct work_struct *w)
 	drm_dev_put(&xe->drm);
 }
 
+static void execlist_exec_queue_reinit_kernel(struct xe_exec_queue *q)
+{
+	/* NIY */
+}
+
 static void execlist_exec_queue_kill(struct xe_exec_queue *q)
 {
 	/* NIY */
@@ -465,6 +470,7 @@ static u64 execlist_exec_queue_reset_status(struct xe_exec_queue *q)
 
 static const struct xe_exec_queue_ops execlist_exec_queue_ops = {
 	.init = execlist_exec_queue_init,
+	.reinit_kernel = execlist_exec_queue_reinit_kernel,
 	.kill = execlist_exec_queue_kill,
 	.fini = execlist_exec_queue_fini,
 	.destroy = execlist_exec_queue_destroy,
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
index 9c8004d5dd91..0ef77cdec51d 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
@@ -3,7 +3,10 @@
  * Copyright © 2023 Intel Corporation
  */
 
+#include "xe_assert.h"
+#include "xe_exec_queue_types.h"
 #include "xe_gpu_scheduler.h"
+#include "xe_guc_exec_queue_types.h"
 
 static void xe_sched_process_msg_queue(struct xe_gpu_scheduler *sched)
 {
@@ -77,6 +80,7 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
 	};
 
 	sched->ops = xe_ops;
+	sched->timeout = timeout;
 	spin_lock_init(&sched->msg_lock);
 	INIT_LIST_HEAD(&sched->msgs);
 	INIT_WORK(&sched->work_process_msg, xe_sched_process_msg_work);
@@ -84,6 +88,19 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
 	return drm_sched_init(&sched->base, &args);
 }
 
+void xe_sched_reinit(struct xe_gpu_scheduler *sched)
+{
+	struct xe_guc_exec_queue *ge = container_of(sched, struct xe_guc_exec_queue, sched);
+
+	xe_gt_assert(ge->q->gt, drm_sched_is_stopped(&sched->base));
+
+	/*
+	 * TODO: Implement drm_sched_reinit() instead of requiring the
+	 * driver to restore individual fields.
+	 */
+	sched->base.timeout = sched->timeout;
+}
+
 void xe_sched_fini(struct xe_gpu_scheduler *sched)
 {
 	xe_sched_submission_stop(sched);
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
index 664c2db56af3..22e24b4b7171 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
@@ -17,6 +17,7 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
 		  long timeout, struct workqueue_struct *timeout_wq,
 		  atomic_t *score, const char *name,
 		  struct device *dev);
+void xe_sched_reinit(struct xe_gpu_scheduler *sched);
 void xe_sched_fini(struct xe_gpu_scheduler *sched);
 
 void xe_sched_submission_start(struct xe_gpu_scheduler *sched);
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h b/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h
index 78ef2e8ded4f..f40764aa78e0 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h
@@ -54,6 +54,11 @@ struct xe_gpu_scheduler {
 	spinlock_t				msg_lock;
 	/** @work_process_msg: processes messages */
 	struct work_struct		work_process_msg;
+	/**
+	 * @timeout: timeout for the scheduler instance, to be restored
+	 * during exec queue re-initialization
+	 */
+	long				timeout;
 };
 
 #define xe_sched_entity		drm_sched_entity
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index b14b37b767f5..d76f125f9c3a 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -2225,6 +2225,14 @@ static int guc_exec_queue_init(struct xe_exec_queue *q)
 	return err;
 }
 
+static void guc_exec_queue_reinit_kernel(struct xe_exec_queue *q)
+{
+	xe_gt_assert(q->gt, q->flags & EXEC_QUEUE_FLAG_KERNEL);
+
+	atomic_set(&q->guc->state, 0);
+	xe_sched_reinit(&q->guc->sched);
+}
+
 static void guc_exec_queue_kill(struct xe_exec_queue *q)
 {
 	trace_xe_exec_queue_kill(q);
@@ -2719,6 +2727,7 @@ static u64 guc_exec_queue_reset_status(struct xe_exec_queue *q)
  */
 static const struct xe_exec_queue_ops guc_exec_queue_ops = {
 	.init = guc_exec_queue_init,
+	.reinit_kernel = guc_exec_queue_reinit_kernel,
 	.kill = guc_exec_queue_kill,
 	.fini = guc_exec_queue_fini,
 	.destroy = guc_exec_queue_destroy,
-- 
2.43.0

[PATCH v15 03/10] drm/xe/gt: Introduce FLR helpers

[Raag Jadav]

In preparation of usecases which require preparing/re-initializing GT and
all its uCs before/after PCIe FLR, introduce flr_prepare/reinit() helpers.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
v2: Add kernel doc (Matthew Brost)
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
v6: Add IS_DGFX() assert (Daniele)
    s/flr_done/reinit (Daniele)
---
 drivers/gpu/drm/xe/xe_gsc.c      | 14 ++++++
 drivers/gpu/drm/xe/xe_gsc.h      |  1 +
 drivers/gpu/drm/xe/xe_gt.c       | 25 +++++++++++
 drivers/gpu/drm/xe/xe_gt.h       |  2 +
 drivers/gpu/drm/xe/xe_guc.c      | 29 ++++++++++++
 drivers/gpu/drm/xe/xe_guc.h      |  2 +
 drivers/gpu/drm/xe/xe_huc.c      | 14 ++++++
 drivers/gpu/drm/xe/xe_huc.h      |  1 +
 drivers/gpu/drm/xe/xe_uc.c       | 75 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_uc.h       |  2 +
 drivers/gpu/drm/xe/xe_uc_types.h | 14 ++++++
 11 files changed, 179 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gsc.c b/drivers/gpu/drm/xe/xe_gsc.c
index db669a953886..8edb8cee3cbd 100644
--- a/drivers/gpu/drm/xe/xe_gsc.c
+++ b/drivers/gpu/drm/xe/xe_gsc.c
@@ -550,6 +550,20 @@ void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc)
 		flush_work(&gsc->work);
 }
 
+/**
+ * xe_gsc_reinit() - Re-initialize GSC after FLR
+ * @gsc: The GSC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gsc_reinit(struct xe_gsc *gsc)
+{
+	if (!xe_uc_fw_is_loadable(&gsc->fw))
+		return 0;
+
+	return xe_uc_fw_reinit(&gsc->fw);
+}
+
 void xe_gsc_stop_prepare(struct xe_gsc *gsc)
 {
 	struct xe_gt *gt = gsc_to_gt(gsc);
diff --git a/drivers/gpu/drm/xe/xe_gsc.h b/drivers/gpu/drm/xe/xe_gsc.h
index b8b8e0810ad9..ce390bffb163 100644
--- a/drivers/gpu/drm/xe/xe_gsc.h
+++ b/drivers/gpu/drm/xe/xe_gsc.h
@@ -15,6 +15,7 @@ struct xe_hw_engine;
 
 int xe_gsc_init(struct xe_gsc *gsc);
 int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc);
+int xe_gsc_reinit(struct xe_gsc *gsc);
 void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc);
 void xe_gsc_stop_prepare(struct xe_gsc *gsc);
 void xe_gsc_load_start(struct xe_gsc *gsc);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index b751b5044f3c..3c65b251b907 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -904,6 +904,31 @@ static int do_gt_restart(struct xe_gt *gt)
 	return 0;
 }
 
+/**
+ * xe_gt_flr_prepare() - Prepare GT for FLR
+ * @gt: the GT object
+ *
+ * Prepare all GT uCs for FLR.
+ */
+void xe_gt_flr_prepare(struct xe_gt *gt)
+{
+	xe_gt_sanitize(gt);
+	xe_uc_flr_prepare(&gt->uc);
+	xe_pagefault_reset(gt_to_xe(gt), gt);
+	xe_tlb_inval_reset(&gt->tlb_inval);
+}
+
+/**
+ * xe_gt_reinit() - Re-initialize GT after FLR
+ * @gt: the GT object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gt_reinit(struct xe_gt *gt)
+{
+	return xe_uc_reinit(&gt->uc);
+}
+
 static void gt_reset_worker(struct work_struct *w)
 {
 	struct xe_gt *gt = container_of(w, typeof(*gt), reset.worker);
diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
index 7d292f9d0be7..1c701dd98edc 100644
--- a/drivers/gpu/drm/xe/xe_gt.h
+++ b/drivers/gpu/drm/xe/xe_gt.h
@@ -37,8 +37,10 @@
 })
 
 struct xe_gt *xe_gt_alloc(struct xe_tile *tile);
+void xe_gt_flr_prepare(struct xe_gt *gt);
 int xe_gt_init_early(struct xe_gt *gt);
 int xe_gt_init(struct xe_gt *gt);
+int xe_gt_reinit(struct xe_gt *gt);
 void xe_gt_mmio_init(struct xe_gt *gt);
 void xe_gt_wedge_declare(struct xe_gt *gt);
 int xe_gt_record_default_lrcs(struct xe_gt *gt);
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 300126e6624f..c4fb34e64cd6 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -1736,6 +1736,35 @@ void xe_guc_sanitize(struct xe_guc *guc)
 	xe_guc_submit_disable(guc);
 }
 
+/**
+ * xe_guc_flr_prepare() - Prepare GuC for FLR
+ * @guc: The GuC object
+ *
+ * Stop GuC submission and tear down exec queues.
+ */
+void xe_guc_flr_prepare(struct xe_guc *guc)
+{
+	if (!xe_uc_fw_is_loadable(&guc->fw))
+		return;
+
+	xe_guc_submit_stop(guc);
+	xe_guc_submit_pause_abort(guc);
+}
+
+/**
+ * xe_guc_reinit() - Re-initialize GuC after FLR
+ * @guc: The GuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_guc_reinit(struct xe_guc *guc)
+{
+	if (!xe_uc_fw_is_loadable(&guc->fw))
+		return 0;
+
+	return xe_uc_fw_reinit(&guc->fw);
+}
+
 int xe_guc_reset_prepare(struct xe_guc *guc)
 {
 	return xe_guc_submit_reset_prepare(guc);
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index 543ba4e5981e..a73bf08df98d 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -33,10 +33,12 @@ struct drm_printer;
 struct xe_gt;
 
 void xe_guc_comm_init_early(struct xe_guc *guc);
+void xe_guc_flr_prepare(struct xe_guc *guc);
 int xe_guc_init_noalloc(struct xe_guc *guc);
 int xe_guc_init(struct xe_guc *guc);
 int xe_guc_init_post_hwconfig(struct xe_guc *guc);
 int xe_guc_post_load_init(struct xe_guc *guc);
+int xe_guc_reinit(struct xe_guc *guc);
 int xe_guc_reset(struct xe_guc *guc);
 void xe_guc_resume_early(struct xe_guc *guc);
 int xe_guc_upload(struct xe_guc *guc);
diff --git a/drivers/gpu/drm/xe/xe_huc.c b/drivers/gpu/drm/xe/xe_huc.c
index 57afe21444b1..c73e1acbd091 100644
--- a/drivers/gpu/drm/xe/xe_huc.c
+++ b/drivers/gpu/drm/xe/xe_huc.c
@@ -296,6 +296,20 @@ void xe_huc_sanitize(struct xe_huc *huc)
 	xe_uc_fw_sanitize(&huc->fw);
 }
 
+/**
+ * xe_huc_reinit() - Re-initialize HuC after FLR
+ * @huc: The HuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_huc_reinit(struct xe_huc *huc)
+{
+	if (!xe_uc_fw_is_loadable(&huc->fw))
+		return 0;
+
+	return xe_uc_fw_reinit(&huc->fw);
+}
+
 void xe_huc_print_info(struct xe_huc *huc, struct drm_printer *p)
 {
 	struct xe_gt *gt = huc_to_gt(huc);
diff --git a/drivers/gpu/drm/xe/xe_huc.h b/drivers/gpu/drm/xe/xe_huc.h
index fa1c45e70443..cb1a770b4a9c 100644
--- a/drivers/gpu/drm/xe/xe_huc.h
+++ b/drivers/gpu/drm/xe/xe_huc.h
@@ -19,6 +19,7 @@ enum xe_huc_auth_types {
 
 int xe_huc_init(struct xe_huc *huc);
 int xe_huc_init_post_hwconfig(struct xe_huc *huc);
+int xe_huc_reinit(struct xe_huc *huc);
 int xe_huc_upload(struct xe_huc *huc);
 int xe_huc_auth(struct xe_huc *huc, enum xe_huc_auth_types type);
 bool xe_huc_is_authenticated(struct xe_huc *huc, enum xe_huc_auth_types type);
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index 89040d9fa05f..2ba57c5c9979 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -19,6 +19,8 @@
 #include "xe_guc_submit.h"
 #include "xe_huc.h"
 #include "xe_sriov.h"
+#include "xe_uc_fw.h"
+#include "xe_wedge.h"
 #include "xe_wopcm.h"
 
 static struct xe_gt *
@@ -279,6 +281,79 @@ static void uc_reset_wait(struct xe_uc *uc)
 		goto again;
 }
 
+static void uc_flr_prepare(struct work_struct *w)
+{
+	struct xe_uc_flr *flr = container_of(w, struct xe_uc_flr, work);
+	struct xe_uc *uc = flr->uc;
+
+	xe_gt_assert(uc_to_gt(uc), xe_wedged(uc_to_xe(uc)));
+
+	xe_guc_flr_prepare(&uc->guc);
+}
+
+static void uc_flr_sanitize(struct work_struct *w)
+{
+	struct xe_uc_flr *flr = container_of(w, struct xe_uc_flr, work);
+	struct xe_uc *uc = flr->uc;
+
+	/* TODO: Sanitize GSC firmware */
+	xe_gt_assert(uc_to_gt(uc), IS_DGFX(uc_to_xe(uc)));
+	xe_gt_assert(uc_to_gt(uc), !xe_uc_fw_is_loadable(&uc->gsc.fw));
+
+	xe_uc_stop(uc);
+	xe_uc_sanitize(uc);
+}
+
+/**
+ * xe_uc_flr_prepare() - Prepare uCs for FLR
+ * @uc: The uC object
+ *
+ * Tear down pending work and stop all uCs.
+ */
+void xe_uc_flr_prepare(struct xe_uc *uc)
+{
+	struct xe_uc_flr flr = { .uc = uc };
+	struct xe_gt *gt = uc_to_gt(uc);
+
+	xe_uc_reset_prepare(uc);
+
+	/*
+	 * We'll be tearing down exec queues which signals the fences and frees the
+	 * jobs but all of that happens asynchronously, so make sure we don't disrupt
+	 * the scheduler while jobs are still in-flight.
+	 */
+	INIT_WORK_ONSTACK(&flr.work, uc_flr_prepare);
+	queue_work(gt->ordered_wq, &flr.work);
+	flush_work(&flr.work);
+	destroy_work_on_stack(&flr.work);
+
+	INIT_WORK_ONSTACK(&flr.work, uc_flr_sanitize);
+	queue_work(gt->ordered_wq, &flr.work);
+	flush_work(&flr.work);
+	destroy_work_on_stack(&flr.work);
+}
+
+/**
+ * xe_uc_reinit() - Re-initialize uCs after FLR
+ * @uc: The uC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_reinit(struct xe_uc *uc)
+{
+	int ret;
+
+	ret = xe_guc_reinit(&uc->guc);
+	if (ret)
+		return ret;
+
+	ret = xe_huc_reinit(&uc->huc);
+	if (ret)
+		return ret;
+
+	return xe_gsc_reinit(&uc->gsc);
+}
+
 void xe_uc_suspend_prepare(struct xe_uc *uc)
 {
 	xe_gsc_wait_for_worker_completion(&uc->gsc);
diff --git a/drivers/gpu/drm/xe/xe_uc.h b/drivers/gpu/drm/xe/xe_uc.h
index 3c56327fb3f9..2978a4e32894 100644
--- a/drivers/gpu/drm/xe/xe_uc.h
+++ b/drivers/gpu/drm/xe/xe_uc.h
@@ -8,10 +8,12 @@
 
 struct xe_uc;
 
+void xe_uc_flr_prepare(struct xe_uc *uc);
 int xe_uc_init_noalloc(struct xe_uc *uc);
 int xe_uc_init(struct xe_uc *uc);
 int xe_uc_init_post_hwconfig(struct xe_uc *uc);
 int xe_uc_load_hw(struct xe_uc *uc);
+int xe_uc_reinit(struct xe_uc *uc);
 int xe_uc_reset_prepare(struct xe_uc *uc);
 void xe_uc_resume_early(struct xe_uc *uc);
 void xe_uc_runtime_resume(struct xe_uc *uc);
diff --git a/drivers/gpu/drm/xe/xe_uc_types.h b/drivers/gpu/drm/xe/xe_uc_types.h
index 1708379dc834..2b47382f7b3b 100644
--- a/drivers/gpu/drm/xe/xe_uc_types.h
+++ b/drivers/gpu/drm/xe/xe_uc_types.h
@@ -25,4 +25,18 @@ struct xe_uc {
 	struct xe_wopcm wopcm;
 };
 
+/**
+ * struct xe_uc_flr - uC FLR teardown
+ */
+struct xe_uc_flr {
+	/** @uc: uC to schedule FLR worker on */
+	struct xe_uc *uc;
+
+	/**
+	 * @work: worker for FLR teardown to be done async allowing to safely
+	 * flush all code paths
+	 */
+	struct work_struct work;
+};
+
 #endif
-- 
2.43.0

[PATCH v15 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map()

[Raag Jadav]

PCIe FLR clears all hardware state along with GGTT mappings of all
existing bos. Iterate over early and late kernel bo list and restore
their GGTT mappings in hardware, so that driver can make use of them
during re-initialization after PCIe FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Varun Gupta <varun.gupta@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_bo_evict.c | 43 ++++++++++++++++++++++++++------
 drivers/gpu/drm/xe/xe_bo_evict.h |  1 +
 2 files changed, 37 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_bo_evict.c b/drivers/gpu/drm/xe/xe_bo_evict.c
index 72a13aba558d..ab7cba57fb3c 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.c
+++ b/drivers/gpu/drm/xe/xe_bo_evict.c
@@ -235,14 +235,8 @@ int xe_bo_evict_all(struct xe_device *xe)
 				     xe_bo_evict_pinned);
 }
 
-static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+static int xe_bo_map_ggtt(struct xe_bo *bo)
 {
-	int ret;
-
-	ret = xe_bo_restore_pinned(bo);
-	if (ret)
-		return ret;
-
 	if (bo->flags & XE_BO_FLAG_GGTT) {
 		struct xe_tile *tile;
 		u8 id;
@@ -258,6 +252,41 @@ static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
 	return 0;
 }
 
+/**
+ * xe_bo_restore_map() - Restore GGTT mappings of kernel bos
+ * @xe: xe device
+ *
+ * PCIe FLR clears all hardware state along with GGTT mappings of all
+ * existing bos. Iterate over early and late kernel bo list and restore
+ * their GGTT mappings in hardware, so that driver can make use of them
+ * during re-initialization after PCIe FLR.
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_bo_restore_map(struct xe_device *xe)
+{
+	int ret;
+
+	ret = xe_bo_apply_to_pinned(xe, &xe->pinned.early.kernel_bo_present,
+				    &xe->pinned.early.kernel_bo_present, xe_bo_map_ggtt);
+	if (!ret)
+		ret = xe_bo_apply_to_pinned(xe, &xe->pinned.late.kernel_bo_present,
+					    &xe->pinned.late.kernel_bo_present, xe_bo_map_ggtt);
+
+	return ret;
+}
+
+static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+{
+	int ret;
+
+	ret = xe_bo_restore_pinned(bo);
+	if (ret)
+		return ret;
+
+	return xe_bo_map_ggtt(bo);
+}
+
 /**
  * xe_bo_restore_early - restore early phase kernel BOs to VRAM
  *
diff --git a/drivers/gpu/drm/xe/xe_bo_evict.h b/drivers/gpu/drm/xe/xe_bo_evict.h
index e8385cb7f5e9..aabba06f0abf 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.h
+++ b/drivers/gpu/drm/xe/xe_bo_evict.h
@@ -14,6 +14,7 @@ int xe_bo_notifier_prepare_all_pinned(struct xe_device *xe);
 void xe_bo_notifier_unprepare_all_pinned(struct xe_device *xe);
 int xe_bo_restore_early(struct xe_device *xe);
 int xe_bo_restore_late(struct xe_device *xe);
+int xe_bo_restore_map(struct xe_device *xe);
 
 void xe_bo_pci_dev_remove_all(struct xe_device *xe);
 
-- 
2.43.0

[PATCH v15 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit()

[Raag Jadav]

In preparation of usecases which require re-initializing exec queue
after PCIe FLR, introduce xe_exec_queue_reinit() helper. All the exec
queue LCRs already exist but the context is lost on PCIe FLR and needs
re-initialization.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
v6: Add IS_DGFX() and EXEC_QUEUE_FLAG_KERNEL asserts (Daniele)
v9: Add negative asserts for GSC and PXP (Daniele)
    Provide xe_lrc_ctx_init() as regular function (Daniele)
---
 drivers/gpu/drm/xe/xe_exec_queue.c | 47 +++++++++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_exec_queue.h |  1 +
 drivers/gpu/drm/xe/xe_lrc.c        | 15 ++++++++--
 drivers/gpu/drm/xe/xe_lrc.h        |  2 ++
 4 files changed, 59 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 7ade915c59a8..ddd9e38aa80b 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -29,6 +29,7 @@
 #include "xe_migrate.h"
 #include "xe_pm.h"
 #include "xe_trace.h"
+#include "xe_uc_fw.h"
 #include "xe_vm.h"
 #include "xe_pxp.h"
 
@@ -391,9 +392,8 @@ static void __xe_exec_queue_fini(struct xe_exec_queue *q)
 		xe_lrc_put(q->lrc[i]);
 }
 
-static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+static u32 xe_lrc_init_flags(struct xe_exec_queue *q, u32 exec_queue_flags)
 {
-	int i, err;
 	u32 flags = 0;
 
 	/*
@@ -416,6 +416,13 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 	if (q->flags & EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX)
 		flags |= XE_LRC_DISABLE_STATE_CACHE_PERF_FIX;
 
+	return flags;
+}
+
+static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+{
+	int i, err;
+
 	err = q->ops->init(q);
 	if (err)
 		return err;
@@ -439,8 +446,8 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 
 			marker = xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
 
-			lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
-					    xe_lrc_ring_size(), q->msix_vec, flags);
+			lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state, xe_lrc_ring_size(),
+					    q->msix_vec, xe_lrc_init_flags(q, exec_queue_flags));
 			if (IS_ERR(lrc)) {
 				err = PTR_ERR(lrc);
 				goto err_lrc;
@@ -462,6 +469,38 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 	return err;
 }
 
+/**
+ * xe_exec_queue_reinit() - Re-initialize exec queue
+ * @q: exec queue to re-initialize
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_exec_queue_reinit(struct xe_exec_queue *q)
+{
+	struct xe_gt *gt = q->gt;
+	int i, err;
+
+	/* TODO: Re-initialize GSC and PXP queues */
+	xe_gt_assert(gt, IS_DGFX(gt_to_xe(gt)));
+	xe_gt_assert(gt, !xe_uc_fw_is_loadable(&gt->uc.gsc.fw));
+	xe_gt_assert(gt, !xe_pxp_is_enabled(gt_to_xe(gt)->pxp));
+
+	/* Re-initialization only allowed for kernel queues */
+	xe_gt_assert(gt, q->flags & EXEC_QUEUE_FLAG_KERNEL);
+
+	/* Re-initialize submission backend */
+	q->ops->reinit_kernel(q);
+
+	for (i = 0; i < q->width; i++) {
+		err = xe_lrc_ctx_init(q->lrc[i], q->hwe, q->vm, q->replay_state,
+				      q->msix_vec, xe_lrc_init_flags(q, q->flags));
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
 /**
  * xe_exec_queue_create() - Create an exec queue
  * @xe: Xe device
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index e8963f85cabd..d48775ef6baf 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -34,6 +34,7 @@ struct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe,
 void xe_exec_queue_fini(struct xe_exec_queue *q);
 void xe_exec_queue_destroy(struct kref *ref);
 void xe_exec_queue_assign_name(struct xe_exec_queue *q, u32 instance);
+int xe_exec_queue_reinit(struct xe_exec_queue *q);
 
 static inline struct xe_exec_queue *
 xe_exec_queue_get_unless_zero(struct xe_exec_queue *q)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 040a52f9320e..8e4f767d7f59 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1536,8 +1536,19 @@ static void xe_lrc_set_gpgpu_preemption_level(struct xe_lrc *lrc, struct xe_gt *
 	xe_lrc_write_ctx_reg(lrc, CTX_CS_CHICKEN1, val);
 }
 
-static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
-			   void *replay_state, u16 msix_vec, u32 init_flags)
+/**
+ * xe_lrc_ctx_init() - Initialize LRC with context details
+ * @lrc: Pointer to the LRC
+ * @hwe: Hardware Engine
+ * @vm: The VM (address space)
+ * @replay_state: GPU hang replay state
+ * @msix_vec: MSI-X interrupt vector (for platforms that support it)
+ * @init_flags: LRC initialization flags
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+		    void *replay_state, u16 msix_vec, u32 init_flags)
 {
 	struct xe_gt *gt = hwe->gt;
 	struct xe_tile *tile = gt_to_tile(gt);
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index f2e829e62168..840f303db97e 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -63,6 +63,8 @@ struct xe_lrc_snapshot {
 
 struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
 			     void *replay_state, u32 ring_size, u16 msix_vec, u32 flags);
+int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+		    void *replay_state, u16 msix_vec, u32 init_flags);
 void xe_lrc_destroy(struct kref *ref);
 
 /**
-- 
2.43.0

[PATCH v15 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() and xe_cpu_bind_reinit()

[Raag Jadav]

In preparation of usecases which require re-initializing migrate and
cpu bind context after PCIe FLR, introduce xe_migrate_reinit() and
xe_cpu_bind_reinit() helpers. Migrate and cpu bind exec queues already
exist in their respective structure but since their contents live on
VRAM, they are lost on PCIe FLR and need re-initialization.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
 v2: Re-initialize migrate context (Matthew Brost)
v13: Handle ULLS fini (Sashiko)
     Re-initialize cpu bind queue (Sashiko)
---
 drivers/gpu/drm/xe/xe_cpu_bind.c | 11 +++++++++
 drivers/gpu/drm/xe/xe_cpu_bind.h |  1 +
 drivers/gpu/drm/xe/xe_gt.c       | 17 ++++++++++++++
 drivers/gpu/drm/xe/xe_migrate.c  | 39 ++++++++++++++++++++++++++++++--
 drivers/gpu/drm/xe/xe_migrate.h  |  2 ++
 5 files changed, 68 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_cpu_bind.c b/drivers/gpu/drm/xe/xe_cpu_bind.c
index 318978298420..d8b526751156 100644
--- a/drivers/gpu/drm/xe/xe_cpu_bind.c
+++ b/drivers/gpu/drm/xe/xe_cpu_bind.c
@@ -75,6 +75,17 @@ int xe_cpu_bind_init(struct xe_device *xe)
 					cpu_bind);
 }
 
+/**
+ * xe_cpu_bind_reinit() - Re-initialize a cpu_bind context
+ * @xe: &struct xe_device
+ *
+ * Return: 0 if successful, negative error code on failure
+ */
+int xe_cpu_bind_reinit(struct xe_device *xe)
+{
+	return xe_exec_queue_reinit(xe->cpu_bind->q);
+}
+
 /**
  * xe_cpu_bind_queue() - Get the bind queue from cpu_bind context.
  * @cpu_bind: The cpu bind context.
diff --git a/drivers/gpu/drm/xe/xe_cpu_bind.h b/drivers/gpu/drm/xe/xe_cpu_bind.h
index 69aad5edf204..4652935d213d 100644
--- a/drivers/gpu/drm/xe/xe_cpu_bind.h
+++ b/drivers/gpu/drm/xe/xe_cpu_bind.h
@@ -81,6 +81,7 @@ struct xe_cpu_bind_pt_update {
 };
 
 int xe_cpu_bind_init(struct xe_device *xe);
+int xe_cpu_bind_reinit(struct xe_device *xe);
 
 struct xe_exec_queue *xe_cpu_bind_queue(struct xe_cpu_bind *cpu_bind);
 
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 3c65b251b907..fe71cb011d3a 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -913,6 +913,13 @@ static int do_gt_restart(struct xe_gt *gt)
 void xe_gt_flr_prepare(struct xe_gt *gt)
 {
 	xe_gt_sanitize(gt);
+
+	if (xe_gt_is_main_type(gt)) {
+		struct xe_tile *tile = gt_to_tile(gt);
+
+		xe_migrate_flr_prepare(tile->migrate);
+	}
+
 	xe_uc_flr_prepare(&gt->uc);
 	xe_pagefault_reset(gt_to_xe(gt), gt);
 	xe_tlb_inval_reset(&gt->tlb_inval);
@@ -926,6 +933,16 @@ void xe_gt_flr_prepare(struct xe_gt *gt)
  */
 int xe_gt_reinit(struct xe_gt *gt)
 {
+	int err;
+
+	if (xe_gt_is_main_type(gt)) {
+		struct xe_tile *tile = gt_to_tile(gt);
+
+		err = xe_migrate_reinit(tile->migrate);
+		if (err)
+			return err;
+	}
+
 	return xe_uc_reinit(&gt->uc);
 }
 
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 19c37eb31589..d8f5744b0eb7 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -272,9 +272,8 @@ static void xe_migrate_ulls_toggle_enable(struct xe_migrate *m, bool enabled)
 	m->ulls.enabled = enabled;
 }
 
-static void xe_migrate_fini(void *arg)
+static void xe_migrate_ulls_fini(struct xe_migrate *m)
 {
-	struct xe_migrate *m = arg;
 	struct xe_device *xe = tile_to_xe(m->tile);
 
 	disable_delayed_work_sync(&m->ulls.exit_work);
@@ -284,6 +283,13 @@ static void xe_migrate_fini(void *arg)
 			xe_migrate_ulls_toggle_enable(m, false);
 		}
 	}
+}
+
+static void xe_migrate_fini(void *arg)
+{
+	struct xe_migrate *m = arg;
+
+	xe_migrate_ulls_fini(m);
 
 	xe_vm_lock(m->q->vm, false);
 	xe_bo_unpin(m->pt_bo);
@@ -778,6 +784,35 @@ static void xe_migrate_ulls_exit(struct work_struct *work)
 	drm_dev_exit(idx);
 }
 
+/**
+ * xe_migrate_flr_prepare() - Prepare migrate context for FLR
+ * @m: The migration context
+ */
+void xe_migrate_flr_prepare(struct xe_migrate *m)
+{
+	xe_migrate_ulls_fini(m);
+}
+
+/**
+ * xe_migrate_reinit() - Re-initialize a migrate context
+ * @m: The migration context
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_migrate_reinit(struct xe_migrate *m)
+{
+	int err;
+
+	xe_migrate_prepare_vm(m->tile, m, m->q->vm, NULL);
+
+	err = xe_exec_queue_reinit(m->q);
+	if (err)
+		return err;
+
+	enable_delayed_work(&m->ulls.exit_work);
+	return 0;
+}
+
 /**
  * xe_migrate_init() - Initialize a migrate context
  * @m: The migration context
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index 2e8be10fdb71..2e0f8fe7024b 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -35,7 +35,9 @@ enum xe_migrate_copy_dir {
 };
 
 struct xe_migrate *xe_migrate_alloc(struct xe_tile *tile);
+void xe_migrate_flr_prepare(struct xe_migrate *m);
 int xe_migrate_init(struct xe_migrate *m);
+int xe_migrate_reinit(struct xe_migrate *m);
 
 struct dma_fence *xe_migrate_to_vram(struct xe_migrate *m,
 				     unsigned long npages,
-- 
2.43.0

[PATCH v15 07/10] drm/xe/pm: Introduce xe_device_suspend/resume()

[Raag Jadav]

PCIe FLR prepare/re-initialization flows pretty much reflect system
suspend/resume flows with a few notable exceptions. Repurpose existing
helpers for PCIe FLR with an explicit flag to distinguish between both
flows.

Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 v6: Repurpose system suspend/resume helpers for FLR (Daniele)
v11: Wait for xe_pcode_ready() before resume (Riana)
---
 drivers/gpu/drm/xe/xe_device.c | 155 +++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_device.h |   2 +
 drivers/gpu/drm/xe/xe_pm.c     | 114 ++++--------------------
 drivers/gpu/drm/xe/xe_pm.h     |   1 +
 4 files changed, 174 insertions(+), 98 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 273e2c45fea9..6911c2ac39f8 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -69,6 +69,7 @@
 #include "xe_soc_remapper.h"
 #include "xe_survivability_mode.h"
 #include "xe_sriov.h"
+#include "xe_sriov_vf_ccs.h"
 #include "xe_svm.h"
 #include "xe_sysctrl.h"
 #include "xe_tile.h"
@@ -1384,3 +1385,157 @@ void xe_device_exit(void)
 		wait_var_event(&xe_device_count, !atomic_read(&xe_device_count));
 	}
 }
+
+/**
+ * xe_device_suspend() - Common helper for system suspend and FLR prepare
+ * @xe: xe device instance
+ * @hibernate: true if preparing for S4 hibernation, false for < S4 suspend
+ * @flr: indicate FLR prepare
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+int xe_device_suspend(struct xe_device *xe, bool hibernate, bool flr)
+{
+	struct xe_gt *gt;
+	u8 id;
+	int err;
+
+	err = xe_pxp_pm_suspend(xe->pxp);
+	if (err)
+		return err;
+
+	xe_late_bind_pm_suspend(&xe->late_bind);
+
+	for_each_gt(gt, xe, id)
+		xe_gt_suspend_prepare(gt);
+
+	if (flr) {
+		for_each_gt(gt, xe, id)
+			xe_gt_flr_prepare(gt);
+	} else {
+		xe_display_pm_suspend(xe);
+
+		if (xe_pm_needs_bo_evict(xe, hibernate)) {
+			/* FIXME: Super racey... */
+			err = xe_bo_evict_all(xe);
+			if (err)
+				goto err_display;
+		}
+
+		for_each_gt(gt, xe, id) {
+			err = xe_gt_suspend(gt);
+			if (err)
+				goto err_display;
+		}
+	}
+
+	xe_irq_suspend(xe);
+
+	if (flr) {
+		unmap_mapping_range(xe->drm.anon_inode->i_mapping, 0, 0, 1);
+	} else {
+		xe_display_pm_suspend_late(xe);
+
+		xe_i2c_pm_suspend(xe);
+	}
+
+	return 0;
+
+err_display:
+	xe_display_pm_resume(xe);
+	xe_pxp_pm_resume(xe->pxp);
+	return err;
+}
+
+/**
+ * xe_device_resume() - Common helper for system resume and re-initialization post FLR
+ * @xe: xe device instance
+ * @flr: indicate re-initialization post FLR
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+int xe_device_resume(struct xe_device *xe, bool flr)
+{
+	struct xe_tile *tile;
+	struct xe_gt *gt;
+	u8 id;
+	int err;
+
+	err = xe_pcode_ready(xe, true);
+	if (err)
+		return err;
+
+	assert_lmem_ready(xe);
+
+	for_each_tile(tile, xe, id)
+		xe_wa_apply_tile_workarounds(tile);
+
+	if (flr) {
+		err = xe_bo_restore_map(xe);
+		if (err)
+			return err;
+
+		for_each_gt(gt, xe, id) {
+			err = xe_gt_reinit(gt);
+			if (err)
+				return err;
+		}
+
+		err = xe_cpu_bind_reinit(xe);
+		if (err)
+			return err;
+	}
+
+	for_each_gt(gt, xe, id)
+		xe_gt_resume_early(gt);
+
+	if (!flr) {
+		xe_display_pm_resume_early(xe);
+
+		/*
+		 * This only restores pinned memory which is the memory required for the
+		 * GT(s) to resume.
+		 */
+		err = xe_bo_restore_early(xe);
+		if (err)
+			return err;
+	}
+
+	xe_i2c_pm_resume(xe, true);
+
+	xe_sysctrl_pm_resume(xe);
+
+	xe_irq_resume(xe);
+
+	for_each_gt(gt, xe, id) {
+		err = xe_gt_resume(gt);
+		if (err)
+			break;
+	}
+
+	if (flr) {
+		if (err)
+			return err;
+	} else {
+		/*
+		 * Try to bring up display before bailing from GT resume failure,
+		 * so we don't leave the user clueless with a blank screen.
+		 */
+		xe_display_pm_resume(xe);
+		if (err)
+			return err;
+
+		err = xe_bo_restore_late(xe);
+		if (err)
+			return err;
+
+		if (IS_VF_CCS_READY(xe))
+			xe_sriov_vf_ccs_register_context(xe);
+	}
+
+	xe_pxp_pm_resume(xe->pxp);
+
+	xe_late_bind_pm_resume(&xe->late_bind);
+
+	return 0;
+}
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 6df60edcb8f8..7a7632e2d56b 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -48,7 +48,9 @@ int xe_device_init_early(struct xe_device *xe);
 int xe_device_probe_early(struct xe_device *xe);
 int xe_device_probe(struct xe_device *xe);
 void xe_device_remove(struct xe_device *xe);
+int xe_device_resume(struct xe_device *xe, bool flr);
 void xe_device_shutdown(struct xe_device *xe);
+int xe_device_suspend(struct xe_device *xe, bool hibernate, bool flr);
 
 void xe_device_wmb(struct xe_device *xe);
 
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index e73192b03074..f73f68bd449b 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -166,7 +166,14 @@ static void xe_rpm_lockmap_release(const struct xe_device *xe)
 			 &xe_pm_runtime_d3cold_map);
 }
 
-static bool xe_pm_needs_bo_evict(struct xe_device *xe, bool hibernate)
+/**
+ * xe_pm_needs_bo_evict() - Check if bo eviction is needed
+ * @xe: The xe device.
+ * @hibernate: Hibernation event
+ *
+ * Return: %true if bo eviction is needed, %false otherwise.
+ */
+bool xe_pm_needs_bo_evict(struct xe_device *xe, bool hibernate)
 {
 	return IS_DGFX(xe) || hibernate;
 }
@@ -180,54 +187,18 @@ static bool xe_pm_needs_bo_evict(struct xe_device *xe, bool hibernate)
  */
 int xe_pm_suspend(struct xe_device *xe, bool hibernate)
 {
-	struct xe_gt *gt;
-	u8 id;
 	int err;
 
 	drm_dbg(&xe->drm, "Suspending device\n");
 	xe_pm_block_begin_signalling();
 	trace_xe_pm_suspend(xe, __builtin_return_address(0));
 
-	err = xe_pxp_pm_suspend(xe->pxp);
+	err = xe_device_suspend(xe, hibernate, false);
 	if (err)
-		goto err;
+		drm_dbg(&xe->drm, "Device suspend failed %d\n", err);
+	else
+		drm_dbg(&xe->drm, "Device suspended\n");
 
-	xe_late_bind_pm_suspend(&xe->late_bind);
-
-	for_each_gt(gt, xe, id)
-		xe_gt_suspend_prepare(gt);
-
-	xe_display_pm_suspend(xe);
-
-	if (xe_pm_needs_bo_evict(xe, hibernate)) {
-		/* FIXME: Super racey... */
-		err = xe_bo_evict_all(xe);
-		if (err)
-			goto err_display;
-	}
-
-	for_each_gt(gt, xe, id) {
-		err = xe_gt_suspend(gt);
-		if (err)
-			goto err_display;
-	}
-
-	xe_irq_suspend(xe);
-
-	xe_display_pm_suspend_late(xe);
-
-	xe_i2c_pm_suspend(xe);
-
-	drm_dbg(&xe->drm, "Device suspended\n");
-	xe_pm_block_end_signalling();
-
-	return 0;
-
-err_display:
-	xe_display_pm_resume(xe);
-	xe_pxp_pm_resume(xe->pxp);
-err:
-	drm_dbg(&xe->drm, "Device suspend failed %d\n", err);
 	xe_pm_block_end_signalling();
 	return err;
 }
@@ -240,71 +211,18 @@ int xe_pm_suspend(struct xe_device *xe, bool hibernate)
  */
 int xe_pm_resume(struct xe_device *xe)
 {
-	struct xe_tile *tile;
-	struct xe_gt *gt;
-	u8 id;
 	int err;
 
 	xe_pm_block_begin_signalling();
 	drm_dbg(&xe->drm, "Resuming device\n");
 	trace_xe_pm_resume(xe, __builtin_return_address(0));
 
-	err = xe_pcode_ready(xe, true);
+	err = xe_device_resume(xe, false);
 	if (err)
-		return err;
+		drm_dbg(&xe->drm, "Device resume failed %d\n", err);
+	else
+		drm_dbg(&xe->drm, "Device resumed\n");
 
-	for_each_tile(tile, xe, id)
-		xe_wa_apply_tile_workarounds(tile);
-
-	for_each_gt(gt, xe, id)
-		xe_gt_resume_early(gt);
-
-	xe_display_pm_resume_early(xe);
-
-	/*
-	 * This only restores pinned memory which is the memory required for the
-	 * GT(s) to resume.
-	 */
-	err = xe_bo_restore_early(xe);
-	if (err)
-		goto err;
-
-	xe_i2c_pm_resume(xe, true);
-
-	xe_sysctrl_pm_resume(xe);
-
-	xe_irq_resume(xe);
-
-	for_each_gt(gt, xe, id) {
-		err = xe_gt_resume(gt);
-		if (err)
-			break;
-	}
-
-	/*
-	 * Try to bring up display before bailing from GT resume failure,
-	 * so we don't leave the user clueless with a blank screen.
-	 */
-	xe_display_pm_resume(xe);
-	if (err)
-		goto err;
-
-	err = xe_bo_restore_late(xe);
-	if (err)
-		goto err;
-
-	xe_pxp_pm_resume(xe->pxp);
-
-	if (IS_VF_CCS_READY(xe))
-		xe_sriov_vf_ccs_register_context(xe);
-
-	xe_late_bind_pm_resume(&xe->late_bind);
-
-	drm_dbg(&xe->drm, "Device resumed\n");
-	xe_pm_block_end_signalling();
-	return 0;
-err:
-	drm_dbg(&xe->drm, "Device resume failed %d\n", err);
 	xe_pm_block_end_signalling();
 	return err;
 }
diff --git a/drivers/gpu/drm/xe/xe_pm.h b/drivers/gpu/drm/xe/xe_pm.h
index af81f2a2975f..f5a916030db4 100644
--- a/drivers/gpu/drm/xe/xe_pm.h
+++ b/drivers/gpu/drm/xe/xe_pm.h
@@ -41,6 +41,7 @@ int xe_pm_block_on_suspend(struct xe_device *xe);
 int xe_pm_wait_all_c6(struct xe_device *xe);
 void xe_pm_might_block_on_suspend(void);
 int xe_pm_module_init(void);
+bool xe_pm_needs_bo_evict(struct xe_device *xe, bool hibernate);
 
 static inline void __xe_pm_runtime_noop(struct xe_device *xe) {}
 
-- 
2.43.0

[PATCH v15 08/10] drm/xe: Introduce temporary device wedging

[Raag Jadav]

Currently, wedged state is serving a single usecase where the device is
permanently declared wedged, but this doesn't allow any wedged state
management for runtime usecases. In preparation of usecases which require
to facilitate temporary device wedging, convert wedged.flag to wedged.ref
which serves as a driver internal refcount for wedged state and blocks
critical path execution during device lifetime. While at it, introduce
wedged.perm which signifies permanent device wedging and operates
independent of the refcount allowing relevant cleanup action on unwind
path.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
---
 v9: Redesign to prevent races (Sashiko)
v10: Spell out temporary device wedging in subject (Lukasz)
v11: Update GuC CT path to check against permanent wedging (Lukasz, Riana)
     Put wedge reference only if device is wedged during resume() (Riana)
v12: s/xe_wedge_not_recoverable/xe_wedged_permanent (Riana)
     Refine documentation (Riana)
v13: Prevent PM ref leak on slot reset failure (Sashiko)
---
 drivers/gpu/drm/xe/xe_guc_ct.c      |  6 ++--
 drivers/gpu/drm/xe/xe_pci.c         |  2 ++
 drivers/gpu/drm/xe/xe_pci_error.c   | 26 ++++++++--------
 drivers/gpu/drm/xe/xe_wedge.c       | 48 ++++++++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_wedge.h       | 13 +++++++-
 drivers/gpu/drm/xe/xe_wedge_types.h | 13 ++++++--
 6 files changed, 84 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
index 0a1b37fa0efb..5b43ca73f6dd 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.c
+++ b/drivers/gpu/drm/xe/xe_guc_ct.c
@@ -1162,7 +1162,7 @@ static int __guc_ct_send_locked(struct xe_guc_ct *ct, const u32 *action,
 	xe_gt_assert(gt, g2h_len || !num_g2h);
 	lockdep_assert_held(&ct->lock);
 
-	if (xe_wedged(ct_to_xe(ct))) {
+	if (xe_wedged_permanent(ct_to_xe(ct))) {
 		ret = -ENOTRECOVERABLE;
 		goto out;
 	}
@@ -1591,7 +1591,7 @@ static int guc_ct_send_recv(struct xe_guc_ct *ct, const u32 *action, u32 len,
 	if (g2h_fence.fail) {
 		if (g2h_fence.cancel) {
 			xe_gt_dbg(gt, "H2G request %#x canceled!\n", action[0]);
-			ret = xe_wedged(ct_to_xe(ct)) ? -ENOTRECOVERABLE : -ECANCELED;
+			ret = xe_wedged_permanent(ct_to_xe(ct)) ? -ENOTRECOVERABLE : -ECANCELED;
 			goto unlock;
 		}
 		xe_gt_err(gt, "H2G request %#x failed: error %#x hint %#x\n",
@@ -1936,7 +1936,7 @@ static int g2h_read(struct xe_guc_ct *ct, u32 *msg, bool fast_path)
 	lockdep_assert_held(&ct->fast_lock);
 
 	/* Keep in sync with g2h_err_is_fatal() */
-	if (xe_wedged(xe))
+	if (xe_wedged_permanent(xe))
 		return -ENOTRECOVERABLE;
 
 	if (ct->state == XE_GUC_CT_STATE_DISABLED)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 073b81c525e0..139d2f63c285 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -39,6 +39,7 @@
 #include "xe_survivability_mode.h"
 #include "xe_tile.h"
 #include "xe_tile_printk.h"
+#include "xe_wedge.h"
 
 enum toggle_d3cold {
 	D3COLD_DISABLE,
@@ -1415,6 +1416,7 @@ static int xe_pci_runtime_suspend(struct device *dev)
 	 */
 	xe_assert(xe, !IS_SRIOV_VF(xe));
 	xe_assert(xe, !pci_num_vf(pdev));
+	xe_assert(xe, !xe_wedged(xe));
 
 	flags = memalloc_noreclaim_save();
 	pme_enabled = xe->pme.capable && !xe->d3cold.allowed &&
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 03a9f295d077..be58fc9e22dc 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -22,13 +22,8 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
 	struct xe_gt *gt;
 	u8 id;
 
-	/*
-	 * Wedge the device to prevent userspace access but do not send the uevent.
-	 * xe_wedge_fini() releases runtime pm if wedged flag is set, so acquire a runtime
-	 * pm reference to avoid underflow.
-	 */
-	if (!atomic_xchg(&xe->wedged.flag, 1))
-		xe_pm_runtime_get_noresume(xe);
+	/* Wedge the device to prevent userspace access but do not send the uevent. */
+	xe_wedge_get(xe);
 
 	xe_device_set_in_reset(xe);
 
@@ -42,10 +37,16 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
 
 static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u8 action)
 {
+	struct xe_device *xe = xe_any_to_xe(pdev);
+
 	switch (action) {
 	case XE_RAS_RECOVERY_ACTION_RECOVERED:
 		return PCI_ERS_RESULT_RECOVERED;
 	case XE_RAS_RECOVERY_ACTION_RESET:
+		/* We should not be doing such ugly hacks, reuse FLR callbacks and drop this. */
+		if (atomic_xchg(&xe->wedged.perm, 1))
+			return PCI_ERS_RESULT_DISCONNECT;
+
 		prepare_device_for_reset(pdev);
 		return PCI_ERS_RESULT_NEED_RESET;
 	case XE_RAS_RECOVERY_ACTION_DISCONNECT:
@@ -72,6 +73,10 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
 	case pci_channel_io_normal:
 		return PCI_ERS_RESULT_CAN_RECOVER;
 	case pci_channel_io_frozen:
+		/* We should not be doing such ugly hacks, reuse FLR callbacks and drop this. */
+		if (atomic_xchg(&xe->wedged.perm, 1))
+			return PCI_ERS_RESULT_DISCONNECT;
+
 		prepare_device_for_reset(pdev);
 		return PCI_ERS_RESULT_NEED_RESET;
 	default:
@@ -132,11 +137,6 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
 	if (pdev->driver->probe(pdev, ent))
 		return PCI_ERS_RESULT_DISCONNECT;
 
-	xe = pdev_to_xe_device(pdev);
-
-	/* Wedge the device to prevent I/O operations till the resume callback */
-	atomic_set(&xe->wedged.flag, 1);
-
 	return PCI_ERS_RESULT_RECOVERED;
 }
 
@@ -145,8 +145,6 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
 	struct xe_device *xe = pdev_to_xe_device(pdev);
 
 	xe_info(xe, "PCI error: resume\n");
-
-	atomic_set(&xe->wedged.flag, 0);
 }
 
 const struct pci_error_handlers xe_pci_error_handlers = {
diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
index 0bc0a4ffc594..827fae058976 100644
--- a/drivers/gpu/drm/xe/xe_wedge.c
+++ b/drivers/gpu/drm/xe/xe_wedge.c
@@ -6,6 +6,7 @@
 #include <drm/drm_drv.h>
 #include <drm/drm_managed.h>
 
+#include "xe_assert.h"
 #include "xe_defaults.h"
 #include "xe_device.h"
 #include "xe_gt.h"
@@ -55,6 +56,43 @@
  *   firmware and restore device to normal operation.
  */
 
+/**
+ * xe_wedge_get() - Acquire wedge reference
+ * @xe: xe device instance
+ *
+ * Get runtime PM reference and block critical path execution.
+ *
+ * Use this for driver internal usecases which require temporarily blocking
+ * userspace access to the device during autonomous recovery, like PCIe FLR
+ * and bus reset. For everything else, use xe_wedge_declare().
+ */
+void xe_wedge_get(struct xe_device *xe)
+{
+	int ref;
+
+	/* We should not be runtime suspending as long as critical paths are blocked */
+	xe_pm_runtime_get_noresume(xe);
+
+	ref = atomic_inc_return(&xe->wedged.ref);
+	xe_assert(xe, ref > 0);
+}
+
+/**
+ * xe_wedge_put() - Relinquish wedge reference
+ * @xe: xe device instance
+ *
+ * Restore critical path execution and put runtime PM reference.
+ */
+void xe_wedge_put(struct xe_device *xe)
+{
+	int ref;
+
+	ref = atomic_dec_return(&xe->wedged.ref);
+	xe_assert(xe, ref >= 0);
+
+	xe_pm_runtime_put(xe);
+}
+
 static void wedge_work(struct work_struct *work)
 {
 	struct xe_device *xe = container_of(work, struct xe_device, wedged.work);
@@ -97,11 +135,11 @@ void xe_wedge_declare(struct xe_device *xe, unsigned long method)
 		return;
 	}
 
-	if (atomic_xchg(&xe->wedged.flag, 1))
+	if (atomic_xchg(&xe->wedged.perm, 1))
 		return;
 
+	xe_wedge_get(xe);
 	xe->needs_flr_on_fini = true;
-	xe_pm_runtime_get_noresume(xe);
 
 	xe_log_err_fatal(xe, WEDGED, -EIO, "Device declared wedged!\n");
 	xe_err_once(xe, "IOCTLs and executions are now blocked!\n"
@@ -241,8 +279,10 @@ static void xe_wedge_fini(struct drm_device *drm, void *arg)
 
 	disable_work_sync(&xe->wedged.work);
 
-	if (atomic_read(&xe->wedged.flag))
-		xe_pm_runtime_put(xe);
+	if (xe_wedged_permanent(xe))
+		xe_wedge_put(xe);
+
+	xe_assert(xe, !xe_wedged(xe));
 }
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_wedge.h b/drivers/gpu/drm/xe/xe_wedge.h
index 3b5499dfc30d..f2cab855db35 100644
--- a/drivers/gpu/drm/xe/xe_wedge.h
+++ b/drivers/gpu/drm/xe/xe_wedge.h
@@ -14,11 +14,22 @@
 
 static inline bool xe_wedged(struct xe_device *xe)
 {
-	return atomic_read(&xe->wedged.flag);
+	return atomic_read(&xe->wedged.ref);
+}
+
+/*
+ * Do not abuse this. Prefer xe_wedged() where possible. Only use this
+ * as a last resort where xe_wedged() is problematic.
+ */
+static inline bool xe_wedged_permanent(struct xe_device *xe)
+{
+	return atomic_read(&xe->wedged.perm);
 }
 
 void xe_wedge_declare(struct xe_device *xe, unsigned long method);
 int xe_wedge_init(struct xe_device *xe);
 int xe_wedge_set_mode(struct xe_device *xe, enum xe_wedged_mode mode);
+void xe_wedge_get(struct xe_device *xe);
+void xe_wedge_put(struct xe_device *xe);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_wedge_types.h b/drivers/gpu/drm/xe/xe_wedge_types.h
index e472c5fcbd26..0ca9f30dbda0 100644
--- a/drivers/gpu/drm/xe/xe_wedge_types.h
+++ b/drivers/gpu/drm/xe/xe_wedge_types.h
@@ -29,8 +29,17 @@ enum xe_wedged_mode {
  * struct xe_wedge - Struct to control Wedged States and mode
  */
 struct xe_wedge {
-	/** @flag: Xe device faced a critical error and is now blocked. */
-	atomic_t flag;
+	/**
+	 * @ref: Refcount for wedged device, blocks critical path execution. Used for
+	 * driver internal usecases which require temporarily blocking userspace access
+	 * to the device during autonomous recovery, like PCIe FLR and bus reset.
+	 */
+	atomic_t ref;
+	/**
+	 * @perm: Permanently wedged device, not recoverable. Only to be set when
+	 * notifying userspace of wedged device through drm wedged uevent.
+	 */
+	atomic_t perm;
 	/** @mode: Mode controlled by kernel parameter and debugfs */
 	enum xe_wedged_mode mode;
 	/** @method: Recovery method to be sent in the drm device wedged uevent */
-- 
2.43.0

[PATCH v15 09/10] drm/xe/pci: Introduce PCIe Function Level Reset

[Raag Jadav]

With bare minimum pieces in place, we can finally introduce PCIe Function
Level Reset (FLR) support which re-initializes hardware state without the
need for reloading the driver from userspace. All VRAM contents are lost
along with hardware state and driver takes care of recreating the required
kernel bos as part of re-initialization, but user still needs to recreate
user bos and reload context after PCIe FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
---
 v2: Spell out Function Level Reset (Jani)
 v5: Prevent PM ref leak for wedged device (Matthew Brost)
 v6: Add PCIe FLR documentation (Daniele)
 v7: Refine PCIe FLR documentation (Daniele)
     Introduce xe_pci_reset_skip() helper (Lukasz)
 v9: Add 'Xe' prefix to document title (Rodrigo)
v10: Update documentation to include PCI Error Handling (Lukasz)
     Maintain wedge reference on FLR failure (Lukasz)
v11: Cleanup wedge reference logic in ->reset_prepare() (Lukasz)
     Use 'PCI reset' in logs (Riana)
v12: Refine error logging (Riana)
v14: Early return on survivability mode (Riana)
---
 drivers/gpu/drm/xe/xe_device_types.h |   3 +
 drivers/gpu/drm/xe/xe_pci_error.c    | 139 +++++++++++++++++++++++++++
 2 files changed, 142 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 933f5d27aa62..8f2a31949073 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -537,6 +537,9 @@ struct xe_device {
 	/** @pxp: Encapsulate Protected Xe Path support */
 	struct xe_pxp *pxp;
 
+	/** @flr_prepared: Prepared for function-reset */
+	bool flr_prepared;
+
 	/** @needs_flr_on_fini: requests function-reset on fini */
 	bool needs_flr_on_fini;
 
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index be58fc9e22dc..d6469171b7f3 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -13,9 +13,55 @@
 #include "xe_pm.h"
 #include "xe_printk.h"
 #include "xe_ras.h"
+#include "xe_sriov_pf_helpers.h"
 #include "xe_survivability_mode.h"
 #include "xe_wedge.h"
 
+/**
+ * DOC: Xe PCI Error Handling
+ *
+ * Xe driver registers PCI callbacks which are called by PCI core in case of
+ * bus errors or resets.
+ *
+ * Currently both Function Level Reset (FLR) and bus error handling callbacks are
+ * supported. Both wipe the VRAM and resets the state of all the hardware units.
+ * Therefore, the contents of all exec queues and BOs in VRAM are lost, and the
+ * hardware needs a full re-initialization. The way Xe driver handles it, is
+ * pretty much similar to system suspend/resume flow with a few notable exceptions.
+ *
+ * Prepare phase:
+ *
+ * - Temporarily wedge the device to prevent userspace access
+ * - Kill exec queues which signals the fences and frees in-flight jobs
+ * - Stop the scheduler and all submissions to GuC
+ * - The fact that FLR is needed is because hardware could be in corrupted state
+ *   and access unreliable, so skip memory eviction due to untrustworthy VRAM
+ *   contents
+ * - Remove all memory mappings since VRAM contents will be lost
+ *
+ * Re-initialization phase:
+ *
+ * - Recreate kernel BOs due to skipped memory eviction in prepare phase
+ * - Restore kernel queues which were killed in prepare phase
+ * - Reload all uC firmwares
+ * - Bring up all hardware units
+ * - Unwedge the device to allow userspace access
+ *
+ * Since VRAM contents are lost, the user is expected to recreate user memory
+ * and reload context.
+ *
+ * TODO: Reuse FLR callbacks for bus error handling.
+ *
+ * Current implementation is only limited to re-initializing GT. This needs to
+ * be extended for a lot of components listed below.
+ *
+ * - Proper re-initialization of GSC and PXP for integrated platforms
+ * - SR-IOV cases which need PF and VF synchronization
+ * - Re-initialization of all child devices registered by Xe
+ * - MM corner cases
+ * - Display
+ */
+
 static void prepare_device_for_reset(struct pci_dev *pdev)
 {
 	struct xe_device *xe = pdev_to_xe_device(pdev);
@@ -147,9 +193,102 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
 	xe_info(xe, "PCI error: resume\n");
 }
 
+static inline bool xe_pci_reset_skip(struct xe_device *xe)
+{
+	return !IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe_sriov_pf_num_vfs(xe) || xe->info.probe_display;
+}
+
+static void xe_pci_reset_prepare(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	int err;
+
+	err = xe_survivability_mode_is_boot_enabled(xe);
+	if (err) {
+		xe_err(xe, "PCI reset: device in survivability mode\n");
+		return;
+	}
+
+	/* No guarantees by PCI core */
+	err = !pm_runtime_active(&pdev->dev);
+	if (err) {
+		xe_err(xe, "PCI reset: unexpected power state\n");
+		return;
+	}
+
+	err = xe_wedged(xe);
+	if (err)
+		xe_err(xe, "PCI reset: device in unexpected state\n");
+
+	/* Wedge the device to prevent userspace access but don't send the event yet */
+	xe_wedge_get(xe);
+	if (err)
+		return;
+
+	err = xe_pci_reset_skip(xe);
+	if (err) {
+		xe_err(xe, "PCI reset: not supported\n");
+		return;
+	}
+
+	/*
+	 * The hardware could be in corrupted state and access unreliable, but we try to
+	 * update data structures and cleanup any pending work to avoid side effects during
+	 * PCIe FLR. This will be similar to system suspend flow but without eviction.
+	 */
+	err = xe_device_suspend(xe, false, true);
+	if (err) {
+		xe_err(xe, "PCI reset: failed to prepare\n");
+		return;
+	}
+
+	xe->flr_prepared = true;
+	xe_info(xe, "PCI reset: prepared\n");
+}
+
+static void xe_pci_reset_done(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	int err;
+
+	err = xe_survivability_mode_is_boot_enabled(xe) || !pm_runtime_active(&pdev->dev);
+	if (err)
+		return;
+
+	if (!xe->flr_prepared)
+		goto out;
+
+	/* Unprepare early in case we fail */
+	xe->flr_prepared = false;
+
+	/*
+	 * We already have the data structures intact, so try to re-initialize the device.
+	 * This will be similar to system resume flow, except we'll also need to recreate
+	 * kernel bos and restore kernel queues.
+	 */
+	err = xe_device_resume(xe, true);
+	if (err) {
+		xe_err(xe, "PCI reset: re-initialization failed\n");
+		goto out;
+	}
+
+	/* Unwedge to allow userspace access */
+	xe_wedge_put(xe);
+	xe_info(xe, "PCI reset: done\n");
+
+	return;
+out:
+	/* Most likely the device is unusable and there's nothing we can do about it */
+	xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_REBIND | DRM_WEDGE_RECOVERY_BUS_RESET);
+	/* Drop local reference */
+	xe_wedge_put(xe);
+}
+
 const struct pci_error_handlers xe_pci_error_handlers = {
 	.error_detected	= xe_pci_error_detected,
 	.mmio_enabled	= xe_pci_error_mmio_enabled,
 	.slot_reset	= xe_pci_error_slot_reset,
 	.resume		= xe_pci_error_resume,
+	.reset_prepare	= xe_pci_reset_prepare,
+	.reset_done	= xe_pci_reset_done,
 };
-- 
2.43.0

[PATCH v15 10/10] drm/xe/doc: Wire up PCI Error Handling

[Raag Jadav]

Wire up PCI Error Handling documentation.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
 Documentation/gpu/xe/index.rst        | 1 +
 Documentation/gpu/xe/xe_pci_error.rst | 8 ++++++++
 2 files changed, 9 insertions(+)
 create mode 100644 Documentation/gpu/xe/xe_pci_error.rst

diff --git a/Documentation/gpu/xe/index.rst b/Documentation/gpu/xe/index.rst
index 0247a255f7e6..497a0a4b12f6 100644
--- a/Documentation/gpu/xe/index.rst
+++ b/Documentation/gpu/xe/index.rst
@@ -36,3 +36,4 @@ The display, or :ref:`drm-kms`, support for drm/xe is provided by
    xe_configfs
    xe_gt_stats
    xe_sigid
+   xe_pci_error
diff --git a/Documentation/gpu/xe/xe_pci_error.rst b/Documentation/gpu/xe/xe_pci_error.rst
new file mode 100644
index 000000000000..25cc5a8adf99
--- /dev/null
+++ b/Documentation/gpu/xe/xe_pci_error.rst
@@ -0,0 +1,8 @@
+.. SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+=====================
+Xe PCI Error Handling
+=====================
+
+.. kernel-doc:: drivers/gpu/drm/xe/xe_pci_error.c
+   :doc: Xe PCI Error Handling
-- 
2.43.0

✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev15)

[Patchwork]

== Series Details ==

Series: Introduce Xe PCIe FLR (rev15)
URL   : https://patchwork.freedesktop.org/series/162055/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
3009867cd31863246e4afc138520a7a8bd37bb11
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 5929f8a6b29f81e86b2174720daca8970b0aa6b4
Author: Raag Jadav <raag.jadav@intel.com>
Date:   Thu Nov 12 14:39:49 2026 +0530

    drm/xe/doc: Wire up PCI Error Handling
    
    Wire up PCI Error Handling documentation.
    
    Signed-off-by: Raag Jadav <raag.jadav@intel.com>
    Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com>
+ /mt/dim checkpatch 020bf044c3c299e9b0961753bf5f8b92c3b505ce drm-intel
5d00eba71997 drm/xe/uc_fw: Allow re-initializing firmware
c195d86a155a drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel()
66cb5cca4c22 drm/xe/gt: Introduce FLR helpers
32528d12441f drm/xe/bo_evict: Introduce xe_bo_restore_map()
91a225e06c32 drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
ce08ff5f9847 drm/xe/migrate: Introduce xe_migrate_reinit() and xe_cpu_bind_reinit()
e8f1958df4f9 drm/xe/pm: Introduce xe_device_suspend/resume()
79f6ae3c34b7 drm/xe: Introduce temporary device wedging
131983f4b92c drm/xe/pci: Introduce PCIe Function Level Reset
5929f8a6b29f drm/xe/doc: Wire up PCI Error Handling
-:21: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#21: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 12 lines checked

✓ CI.KUnit: success for Introduce Xe PCIe FLR (rev15)

[Patchwork]

== Series Details ==

Series: Introduce Xe PCIe FLR (rev15)
URL   : https://patchwork.freedesktop.org/series/162055/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[09:18:39] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:18:44] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:19:04] Starting KUnit Kernel (1/1)...
[09:19:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:19:04] ================= gpu_buddy (15 subtests) ==================
[09:19:04] [PASSED] gpu_test_buddy_alloc_limit
[09:19:04] [PASSED] gpu_test_buddy_alloc_optimistic
[09:19:04] [PASSED] gpu_test_buddy_alloc_pessimistic
[09:19:04] [PASSED] gpu_test_buddy_alloc_pathological
[09:19:04] [PASSED] gpu_test_buddy_alloc_contiguous
[09:19:04] [PASSED] gpu_test_buddy_alloc_clear
[09:19:04] [PASSED] gpu_test_buddy_alloc_range
[09:19:04] [PASSED] gpu_test_buddy_alloc_range_bias
[09:19:05] [PASSED] gpu_test_buddy_alloc_range_clear_guard
[09:19:05] [PASSED] gpu_test_buddy_fragmentation_performance
[09:19:06] [PASSED] gpu_test_buddy_dirty_tracker_performance
[09:19:06] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[09:19:06] [PASSED] gpu_test_buddy_offset_aligned_allocation
[09:19:06] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[09:19:06] [PASSED] gpu_test_buddy_addr_to_block
[09:19:06] ==================== [PASSED] gpu_buddy ====================
[09:19:06] ============================================================
[09:19:06] Testing complete. Ran 15 tests: passed: 15
[09:19:06] Elapsed time: 27.519s total, 5.105s configuring, 20.497s building, 1.874s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[09:19:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:19:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:19:47] Starting KUnit Kernel (1/1)...
[09:19:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:19:47] ================== guc_buf (11 subtests) ===================
[09:19:47] [PASSED] test_smallest
[09:19:47] [PASSED] test_largest
[09:19:47] [PASSED] test_granular
[09:19:47] [PASSED] test_unique
[09:19:47] [PASSED] test_overlap
[09:19:47] [PASSED] test_reusable
[09:19:47] [PASSED] test_too_big
[09:19:47] [PASSED] test_flush
[09:19:47] [PASSED] test_lookup
[09:19:47] [PASSED] test_data
[09:19:47] [PASSED] test_class
[09:19:47] ===================== [PASSED] guc_buf =====================
[09:19:47] =================== guc_dbm (7 subtests) ===================
[09:19:47] [PASSED] test_empty
[09:19:47] [PASSED] test_default
[09:19:47] ======================== test_size  ========================
[09:19:47] [PASSED] 4
[09:19:47] [PASSED] 8
[09:19:47] [PASSED] 32
[09:19:47] [PASSED] 256
[09:19:47] ==================== [PASSED] test_size ====================
[09:19:47] ======================= test_reuse  ========================
[09:19:47] [PASSED] 4
[09:19:47] [PASSED] 8
[09:19:47] [PASSED] 32
[09:19:47] [PASSED] 256
[09:19:47] =================== [PASSED] test_reuse ====================
[09:19:47] =================== test_range_overlap  ====================
[09:19:47] [PASSED] 4
[09:19:47] [PASSED] 8
[09:19:47] [PASSED] 32
[09:19:47] [PASSED] 256
[09:19:47] =============== [PASSED] test_range_overlap ================
[09:19:47] =================== test_range_compact  ====================
[09:19:47] [PASSED] 4
[09:19:47] [PASSED] 8
[09:19:47] [PASSED] 32
[09:19:47] [PASSED] 256
[09:19:47] =============== [PASSED] test_range_compact ================
[09:19:47] ==================== test_range_spare  =====================
[09:19:47] [PASSED] 4
[09:19:47] [PASSED] 8
[09:19:47] [PASSED] 32
[09:19:47] [PASSED] 256
[09:19:47] ================ [PASSED] test_range_spare =================
[09:19:47] ===================== [PASSED] guc_dbm =====================
[09:19:47] ================== guc_idm (22 subtests) ===================
[09:19:47] [PASSED] bad_init
[09:19:47] [PASSED] no_init
[09:19:47] [PASSED] init_fini
[09:19:47] [PASSED] check_init_small
[09:19:47] [PASSED] check_init_shared
[09:19:47] [PASSED] check_used
[09:19:47] [PASSED] check_quota
[09:19:47] [PASSED] check_all
[09:19:47] [PASSED] check_limits
[09:19:47] [PASSED] check_overlap
[09:19:47] [PASSED] check_overlap_alloc
[09:19:47] [PASSED] check_overlap_release
[09:19:47] [PASSED] check_overlap_partial_init
[09:19:47] [PASSED] check_overlap_partial_shared_range_blocking
[09:19:47] [PASSED] check_used_usable
[09:19:47] [PASSED] check_used_shareable
[09:19:47] [PASSED] check_used_mixed
[09:19:47] [PASSED] check_release_usable_range
[09:19:47] [PASSED] check_release_shareable_range
[09:19:47] [PASSED] check_split_boundaries
[09:19:47] [PASSED] check_shareable_spare
[09:19:47] [PASSED] check_shareable_spare_fragmented_tail
[09:19:47] ===================== [PASSED] guc_idm =====================
[09:19:47] ============== guc_klv_helpers (13 subtests) ===============
[09:19:47] [PASSED] test_count
[09:19:47] [PASSED] test_encode_u32
[09:19:47] [PASSED] test_encode_u64
[09:19:47] [PASSED] test_encode_string
[09:19:47] [PASSED] test_encode_object_raw
[09:19:47] [PASSED] test_encode_object_klv
[09:19:47] [PASSED] test_encode_object_nested
[09:19:47] [PASSED] test_encode_object_basic
[09:19:47] ===================== test_decode_u16  =====================
[09:19:47] [PASSED] empty
[09:19:47] [PASSED] valid
[09:19:47] [PASSED] max
[09:19:47] [PASSED] big
[09:19:47] [PASSED] long
[09:19:47] ================= [PASSED] test_decode_u16 =================
[09:19:47] ===================== test_decode_u32  =====================
[09:19:47] [PASSED] empty
[09:19:47] [PASSED] valid
[09:19:47] [PASSED] max
[09:19:47] [PASSED] long
[09:19:47] ================= [PASSED] test_decode_u32 =================
[09:19:47] ===================== test_decode_u64  =====================
[09:19:47] [PASSED] empty
[09:19:47] [PASSED] short
[09:19:47] [PASSED] valid
[09:19:47] [PASSED] max
[09:19:47] [PASSED] long
[09:19:47] ================= [PASSED] test_decode_u64 =================
[09:19:47] ===================== test_decode_str  =====================
[09:19:47] [PASSED] empty
[09:19:47] [PASSED] one
[09:19:47] [PASSED] one_trash
[09:19:47] [PASSED] two
[09:19:47] [PASSED] two_trash
[09:19:47] [PASSED] three
[09:19:47] [PASSED] dword
[09:19:47] [PASSED] four
[09:19:47] [PASSED] five
[09:19:47] [PASSED] six
[09:19:47] [PASSED] seven
[09:19:47] [PASSED] qword
[09:19:47] ================= [PASSED] test_decode_str =================
[09:19:47] [PASSED] test_print
[09:19:47] ================= [PASSED] guc_klv_helpers =================
[09:19:47] =================== xe_log (4 subtests) ====================
[09:19:47] [PASSED] demo_cper
[09:19:47] [PASSED] demo_dmesg
[09:19:47] ======================= test_dmesg  ========================
[09:19:47] [PASSED] test_fatal
[09:19:47] [PASSED] test_fatal_tile
[09:19:47] [PASSED] test_fatal_gt
[09:19:47] [PASSED] test_fatal_comp
[09:19:47] [PASSED] test_fatal_comp_tile
[09:19:47] [PASSED] test_fatal_comp_gt
[09:19:47] [PASSED] test_fatal_all
[09:19:47] [PASSED] test_recoverable
[09:19:47] [PASSED] test_recoverable_tile
[09:19:47] [PASSED] test_recoverable_gt
[09:19:47] [PASSED] test_recoverable_comp
[09:19:47] [PASSED] test_recoverable_comp_tile
[09:19:47] [PASSED] test_recoverable_comp_gt
[09:19:47] [PASSED] test_recoverable_all
[09:19:47] [PASSED] test_info
[09:19:47] [PASSED] test_info_tile
[09:19:47] [PASSED] test_info_gt
[09:19:47] [PASSED] test_info_err
[09:19:47] [PASSED] test_info_comp
[09:19:47] [PASSED] test_info_comp_tile
[09:19:47] [PASSED] test_info_comp_gt
[09:19:47] [PASSED] test_info_all
[09:19:47] [PASSED] test_hw_fatal
[09:19:47] [PASSED] test_hw_recoverable
[09:19:47] [PASSED] test_hw_corrected
[09:19:47] [PASSED] test_hw_informational
[09:19:47] =================== [PASSED] test_dmesg ====================
[09:19:47] ====================== test_invalid  =======================
[09:19:47] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[09:19:47] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[09:19:47] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[09:19:47] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[09:19:47] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[09:19:47] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[09:19:47] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[09:19:47] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[09:19:47] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[09:19:47] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[09:19:47] ================== [SKIPPED] test_invalid ==================
[09:19:47] ===================== [PASSED] xe_log ======================
[09:19:47] ================== no_relay (3 subtests) ===================
[09:19:47] [PASSED] xe_drops_guc2pf_if_not_ready
[09:19:47] [PASSED] xe_drops_guc2vf_if_not_ready
[09:19:47] [PASSED] xe_rejects_send_if_not_ready
[09:19:47] ==================== [PASSED] no_relay =====================
[09:19:47] ================== pf_relay (14 subtests) ==================
[09:19:47] [PASSED] pf_rejects_guc2pf_too_short
[09:19:47] [PASSED] pf_rejects_guc2pf_too_long
[09:19:47] [PASSED] pf_rejects_guc2pf_no_payload
[09:19:47] [PASSED] pf_fails_no_payload
[09:19:47] [PASSED] pf_fails_bad_origin
[09:19:47] [PASSED] pf_fails_bad_type
[09:19:47] [PASSED] pf_txn_reports_error
[09:19:47] [PASSED] pf_txn_sends_pf2guc
[09:19:47] [PASSED] pf_sends_pf2guc
[09:19:47] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:19:47] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:19:47] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:19:47] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:19:47] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:19:47] ==================== [PASSED] pf_relay =====================
[09:19:47] ================== vf_relay (3 subtests) ===================
[09:19:47] [PASSED] vf_rejects_guc2vf_too_short
[09:19:47] [PASSED] vf_rejects_guc2vf_too_long
[09:19:47] [PASSED] vf_rejects_guc2vf_no_payload
[09:19:47] ==================== [PASSED] vf_relay =====================
[09:19:47] ================ pf_gt_config (9 subtests) =================
[09:19:47] [PASSED] fair_contexts_1vf
[09:19:47] [PASSED] fair_doorbells_1vf
[09:19:47] [PASSED] fair_ggtt_1vf
[09:19:47] ====================== fair_vram_1vf  ======================
[09:19:47] [PASSED] 3.50 GiB
[09:19:47] [PASSED] 11.5 GiB
[09:19:47] [PASSED] 15.5 GiB
[09:19:47] [PASSED] 31.5 GiB
[09:19:47] [PASSED] 63.5 GiB
[09:19:47] [PASSED] 1.91 GiB
[09:19:47] ================== [PASSED] fair_vram_1vf ==================
[09:19:47] ================ fair_vram_1vf_admin_only  =================
[09:19:47] [PASSED] 3.50 GiB
[09:19:47] [PASSED] 11.5 GiB
[09:19:47] [PASSED] 15.5 GiB
[09:19:47] [PASSED] 31.5 GiB
[09:19:47] [PASSED] 63.5 GiB
[09:19:47] [PASSED] 1.91 GiB
[09:19:47] ============ [PASSED] fair_vram_1vf_admin_only =============
[09:19:47] ====================== fair_contexts  ======================
[09:19:47] [PASSED] 1 VF
[09:19:47] [PASSED] 2 VFs
[09:19:47] [PASSED] 3 VFs
[09:19:47] [PASSED] 4 VFs
[09:19:47] [PASSED] 5 VFs
[09:19:47] [PASSED] 6 VFs
[09:19:47] [PASSED] 7 VFs
[09:19:47] [PASSED] 8 VFs
[09:19:47] [PASSED] 9 VFs
[09:19:47] [PASSED] 10 VFs
[09:19:47] [PASSED] 11 VFs
[09:19:47] [PASSED] 12 VFs
[09:19:47] [PASSED] 13 VFs
[09:19:47] [PASSED] 14 VFs
[09:19:47] [PASSED] 15 VFs
[09:19:47] [PASSED] 16 VFs
[09:19:47] [PASSED] 17 VFs
[09:19:47] [PASSED] 18 VFs
[09:19:47] [PASSED] 19 VFs
[09:19:47] [PASSED] 20 VFs
[09:19:47] [PASSED] 21 VFs
[09:19:47] [PASSED] 22 VFs
[09:19:47] [PASSED] 23 VFs
[09:19:47] [PASSED] 24 VFs
[09:19:47] [PASSED] 25 VFs
[09:19:47] [PASSED] 26 VFs
[09:19:47] [PASSED] 27 VFs
[09:19:47] [PASSED] 28 VFs
[09:19:47] [PASSED] 29 VFs
[09:19:47] [PASSED] 30 VFs
[09:19:47] [PASSED] 31 VFs
[09:19:47] [PASSED] 32 VFs
[09:19:47] [PASSED] 33 VFs
[09:19:47] [PASSED] 34 VFs
[09:19:47] [PASSED] 35 VFs
[09:19:47] [PASSED] 36 VFs
[09:19:47] [PASSED] 37 VFs
[09:19:47] [PASSED] 38 VFs
[09:19:47] [PASSED] 39 VFs
[09:19:47] [PASSED] 40 VFs
[09:19:47] [PASSED] 41 VFs
[09:19:47] [PASSED] 42 VFs
[09:19:47] [PASSED] 43 VFs
[09:19:47] [PASSED] 44 VFs
[09:19:47] [PASSED] 45 VFs
[09:19:47] [PASSED] 46 VFs
[09:19:47] [PASSED] 47 VFs
[09:19:47] [PASSED] 48 VFs
[09:19:47] [PASSED] 49 VFs
[09:19:47] [PASSED] 50 VFs
[09:19:47] [PASSED] 51 VFs
[09:19:47] [PASSED] 52 VFs
[09:19:47] [PASSED] 53 VFs
[09:19:47] [PASSED] 54 VFs
[09:19:47] [PASSED] 55 VFs
[09:19:47] [PASSED] 56 VFs
[09:19:47] [PASSED] 57 VFs
[09:19:47] [PASSED] 58 VFs
[09:19:47] [PASSED] 59 VFs
[09:19:47] [PASSED] 60 VFs
[09:19:47] [PASSED] 61 VFs
[09:19:47] [PASSED] 62 VFs
[09:19:47] [PASSED] 63 VFs
[09:19:47] ================== [PASSED] fair_contexts ==================
[09:19:47] ===================== fair_doorbells  ======================
[09:19:47] [PASSED] 1 VF
[09:19:47] [PASSED] 2 VFs
[09:19:47] [PASSED] 3 VFs
[09:19:47] [PASSED] 4 VFs
[09:19:47] [PASSED] 5 VFs
[09:19:47] [PASSED] 6 VFs
[09:19:47] [PASSED] 7 VFs
[09:19:47] [PASSED] 8 VFs
[09:19:47] [PASSED] 9 VFs
[09:19:47] [PASSED] 10 VFs
[09:19:47] [PASSED] 11 VFs
[09:19:47] [PASSED] 12 VFs
[09:19:47] [PASSED] 13 VFs
[09:19:47] [PASSED] 14 VFs
[09:19:47] [PASSED] 15 VFs
[09:19:47] [PASSED] 16 VFs
[09:19:47] [PASSED] 17 VFs
[09:19:47] [PASSED] 18 VFs
[09:19:47] [PASSED] 19 VFs
[09:19:47] [PASSED] 20 VFs
[09:19:47] [PASSED] 21 VFs
[09:19:47] [PASSED] 22 VFs
[09:19:47] [PASSED] 23 VFs
[09:19:47] [PASSED] 24 VFs
[09:19:47] [PASSED] 25 VFs
[09:19:47] [PASSED] 26 VFs
[09:19:47] [PASSED] 27 VFs
[09:19:47] [PASSED] 28 VFs
[09:19:47] [PASSED] 29 VFs
[09:19:47] [PASSED] 30 VFs
[09:19:47] [PASSED] 31 VFs
[09:19:47] [PASSED] 32 VFs
[09:19:47] [PASSED] 33 VFs
[09:19:47] [PASSED] 34 VFs
[09:19:47] [PASSED] 35 VFs
[09:19:47] [PASSED] 36 VFs
[09:19:47] [PASSED] 37 VFs
[09:19:47] [PASSED] 38 VFs
[09:19:47] [PASSED] 39 VFs
[09:19:47] [PASSED] 40 VFs
[09:19:47] [PASSED] 41 VFs
[09:19:47] [PASSED] 42 VFs
[09:19:47] [PASSED] 43 VFs
[09:19:47] [PASSED] 44 VFs
[09:19:47] [PASSED] 45 VFs
[09:19:47] [PASSED] 46 VFs
[09:19:47] [PASSED] 47 VFs
[09:19:47] [PASSED] 48 VFs
[09:19:47] [PASSED] 49 VFs
[09:19:47] [PASSED] 50 VFs
[09:19:47] [PASSED] 51 VFs
[09:19:47] [PASSED] 52 VFs
[09:19:47] [PASSED] 53 VFs
[09:19:47] [PASSED] 54 VFs
[09:19:47] [PASSED] 55 VFs
[09:19:47] [PASSED] 56 VFs
[09:19:47] [PASSED] 57 VFs
[09:19:47] [PASSED] 58 VFs
[09:19:47] [PASSED] 59 VFs
[09:19:47] [PASSED] 60 VFs
[09:19:47] [PASSED] 61 VFs
[09:19:47] [PASSED] 62 VFs
[09:19:47] [PASSED] 63 VFs
[09:19:47] ================= [PASSED] fair_doorbells ==================
[09:19:47] ======================== fair_ggtt  ========================
[09:19:47] [PASSED] 1 VF
[09:19:47] [PASSED] 2 VFs
[09:19:47] [PASSED] 3 VFs
[09:19:47] [PASSED] 4 VFs
[09:19:47] [PASSED] 5 VFs
[09:19:47] [PASSED] 6 VFs
[09:19:47] [PASSED] 7 VFs
[09:19:47] [PASSED] 8 VFs
[09:19:47] [PASSED] 9 VFs
[09:19:47] [PASSED] 10 VFs
[09:19:47] [PASSED] 11 VFs
[09:19:47] [PASSED] 12 VFs
[09:19:47] [PASSED] 13 VFs
[09:19:47] [PASSED] 14 VFs
[09:19:47] [PASSED] 15 VFs
[09:19:47] [PASSED] 16 VFs
[09:19:47] [PASSED] 17 VFs
[09:19:47] [PASSED] 18 VFs
[09:19:47] [PASSED] 19 VFs
[09:19:47] [PASSED] 20 VFs
[09:19:47] [PASSED] 21 VFs
[09:19:47] [PASSED] 22 VFs
[09:19:47] [PASSED] 23 VFs
[09:19:47] [PASSED] 24 VFs
[09:19:47] [PASSED] 25 VFs
[09:19:47] [PASSED] 26 VFs
[09:19:47] [PASSED] 27 VFs
[09:19:47] [PASSED] 28 VFs
[09:19:47] [PASSED] 29 VFs
[09:19:47] [PASSED] 30 VFs
[09:19:47] [PASSED] 31 VFs
[09:19:47] [PASSED] 32 VFs
[09:19:47] [PASSED] 33 VFs
[09:19:47] [PASSED] 34 VFs
[09:19:47] [PASSED] 35 VFs
[09:19:47] [PASSED] 36 VFs
[09:19:47] [PASSED] 37 VFs
[09:19:47] [PASSED] 38 VFs
[09:19:47] [PASSED] 39 VFs
[09:19:47] [PASSED] 40 VFs
[09:19:47] [PASSED] 41 VFs
[09:19:47] [PASSED] 42 VFs
[09:19:47] [PASSED] 43 VFs
[09:19:47] [PASSED] 44 VFs
[09:19:47] [PASSED] 45 VFs
[09:19:47] [PASSED] 46 VFs
[09:19:47] [PASSED] 47 VFs
[09:19:47] [PASSED] 48 VFs
[09:19:47] [PASSED] 49 VFs
[09:19:47] [PASSED] 50 VFs
[09:19:47] [PASSED] 51 VFs
[09:19:47] [PASSED] 52 VFs
[09:19:47] [PASSED] 53 VFs
[09:19:47] [PASSED] 54 VFs
[09:19:47] [PASSED] 55 VFs
[09:19:47] [PASSED] 56 VFs
[09:19:47] [PASSED] 57 VFs
[09:19:47] [PASSED] 58 VFs
[09:19:47] [PASSED] 59 VFs
[09:19:47] [PASSED] 60 VFs
[09:19:47] [PASSED] 61 VFs
[09:19:47] [PASSED] 62 VFs
[09:19:47] [PASSED] 63 VFs
[09:19:47] ==================== [PASSED] fair_ggtt ====================
[09:19:47] ======================== fair_vram  ========================
[09:19:47] [PASSED] 1 VF
[09:19:47] [PASSED] 2 VFs
[09:19:47] [PASSED] 3 VFs
[09:19:47] [PASSED] 4 VFs
[09:19:47] [PASSED] 5 VFs
[09:19:47] [PASSED] 6 VFs
[09:19:47] [PASSED] 7 VFs
[09:19:47] [PASSED] 8 VFs
[09:19:47] [PASSED] 9 VFs
[09:19:47] [PASSED] 10 VFs
[09:19:47] [PASSED] 11 VFs
[09:19:47] [PASSED] 12 VFs
[09:19:47] [PASSED] 13 VFs
[09:19:47] [PASSED] 14 VFs
[09:19:47] [PASSED] 15 VFs
[09:19:47] [PASSED] 16 VFs
[09:19:47] [PASSED] 17 VFs
[09:19:48] [PASSED] 18 VFs
[09:19:48] [PASSED] 19 VFs
[09:19:48] [PASSED] 20 VFs
[09:19:48] [PASSED] 21 VFs
[09:19:48] [PASSED] 22 VFs
[09:19:48] [PASSED] 23 VFs
[09:19:48] [PASSED] 24 VFs
[09:19:48] [PASSED] 25 VFs
[09:19:48] [PASSED] 26 VFs
[09:19:48] [PASSED] 27 VFs
[09:19:48] [PASSED] 28 VFs
[09:19:48] [PASSED] 29 VFs
[09:19:48] [PASSED] 30 VFs
[09:19:48] [PASSED] 31 VFs
[09:19:48] [PASSED] 32 VFs
[09:19:48] [PASSED] 33 VFs
[09:19:48] [PASSED] 34 VFs
[09:19:48] [PASSED] 35 VFs
[09:19:48] [PASSED] 36 VFs
[09:19:48] [PASSED] 37 VFs
[09:19:48] [PASSED] 38 VFs
[09:19:48] [PASSED] 39 VFs
[09:19:48] [PASSED] 40 VFs
[09:19:48] [PASSED] 41 VFs
[09:19:48] [PASSED] 42 VFs
[09:19:48] [PASSED] 43 VFs
[09:19:48] [PASSED] 44 VFs
[09:19:48] [PASSED] 45 VFs
[09:19:48] [PASSED] 46 VFs
[09:19:48] [PASSED] 47 VFs
[09:19:48] [PASSED] 48 VFs
[09:19:48] [PASSED] 49 VFs
[09:19:48] [PASSED] 50 VFs
[09:19:48] [PASSED] 51 VFs
[09:19:48] [PASSED] 52 VFs
[09:19:48] [PASSED] 53 VFs
[09:19:48] [PASSED] 54 VFs
[09:19:48] [PASSED] 55 VFs
[09:19:48] [PASSED] 56 VFs
[09:19:48] [PASSED] 57 VFs
[09:19:48] [PASSED] 58 VFs
[09:19:48] [PASSED] 59 VFs
[09:19:48] [PASSED] 60 VFs
[09:19:48] [PASSED] 61 VFs
[09:19:48] [PASSED] 62 VFs
[09:19:48] [PASSED] 63 VFs
[09:19:48] ==================== [PASSED] fair_vram ====================
[09:19:48] ================== [PASSED] pf_gt_config ===================
[09:19:48] ===================== lmtt (1 subtest) =====================
[09:19:48] ======================== test_ops  =========================
[09:19:48] [PASSED] 2-level
[09:19:48] [PASSED] multi-level
[09:19:48] ==================== [PASSED] test_ops =====================
[09:19:48] ====================== [PASSED] lmtt =======================
[09:19:48] ================= sriov_packet (1 subtest) =================
[09:19:48] [PASSED] test_descriptor_init
[09:19:48] ================== [PASSED] sriov_packet ===================
[09:19:48] ================= pf_service (11 subtests) =================
[09:19:48] [PASSED] pf_negotiate_any
[09:19:48] [PASSED] pf_negotiate_base_match
[09:19:48] [PASSED] pf_negotiate_base_newer
[09:19:48] [PASSED] pf_negotiate_base_next
[09:19:48] [SKIPPED] pf_negotiate_base_older (no older minor)
[09:19:48] [PASSED] pf_negotiate_base_prev
[09:19:48] [PASSED] pf_negotiate_latest_match
[09:19:48] [PASSED] pf_negotiate_latest_newer
[09:19:48] [PASSED] pf_negotiate_latest_next
[09:19:48] [SKIPPED] pf_negotiate_latest_older (no older minor)
[09:19:48] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[09:19:48] =================== [PASSED] pf_service ====================
[09:19:48] ================= xe_guc_g2g (2 subtests) ==================
[09:19:48] ============== xe_live_guc_g2g_kunit_default  ==============
[09:19:48] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[09:19:48] ============== xe_live_guc_g2g_kunit_allmem  ===============
[09:19:48] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[09:19:48] =================== [SKIPPED] xe_guc_g2g ===================
[09:19:48] =================== xe_mocs (2 subtests) ===================
[09:19:48] ================ xe_live_mocs_kernel_kunit  ================
[09:19:48] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[09:19:48] ================ xe_live_mocs_reset_kunit  =================
[09:19:48] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[09:19:48] ==================== [SKIPPED] xe_mocs =====================
[09:19:48] ================= xe_migrate (3 subtests) ==================
[09:19:48] ================= xe_migrate_sanity_kunit  =================
[09:19:48] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[09:19:48] ================== xe_validate_ccs_kunit  ==================
[09:19:48] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[09:19:48] ============= xe_migrate_access_memory_kunit  ==============
[09:19:48] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[09:19:48] =================== [SKIPPED] xe_migrate ===================
[09:19:48] ================== xe_dma_buf (1 subtest) ==================
[09:19:48] ==================== xe_dma_buf_kunit  =====================
[09:19:48] ================ [SKIPPED] xe_dma_buf_kunit ================
[09:19:48] =================== [SKIPPED] xe_dma_buf ===================
[09:19:48] ================= xe_bo_shrink (1 subtest) =================
[09:19:48] =================== xe_bo_shrink_kunit  ====================
[09:19:48] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[09:19:48] ================== [SKIPPED] xe_bo_shrink ==================
[09:19:48] ==================== xe_bo (2 subtests) ====================
[09:19:48] ================== xe_ccs_migrate_kunit  ===================
[09:19:48] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[09:19:48] ==================== xe_bo_evict_kunit  ====================
[09:19:48] =============== [SKIPPED] xe_bo_evict_kunit ================
[09:19:48] ===================== [SKIPPED] xe_bo ======================
[09:19:48] =================== xe_any (9 subtests) ====================
[09:19:48] [PASSED] test_to_xe
[09:19:48] [PASSED] test_to_dev
[09:19:48] [PASSED] test_to_pdev
[09:19:48] [PASSED] test_to_drm
[09:19:48] [PASSED] test_if_pdev
[09:19:48] [PASSED] test_if_xe
[09:19:48] [PASSED] test_if_tile
[09:19:48] [PASSED] test_if_gt
[09:19:48] [PASSED] test_to_id
[09:19:48] ===================== [PASSED] xe_any ======================
[09:19:48] ==================== args (13 subtests) ====================
[09:19:48] [PASSED] count_args_test
[09:19:48] [PASSED] call_args_example
[09:19:48] [PASSED] call_args_test
[09:19:48] [PASSED] drop_first_arg_example
[09:19:48] [PASSED] drop_first_arg_test
[09:19:48] [PASSED] first_arg_example
[09:19:48] [PASSED] first_arg_test
[09:19:48] [PASSED] last_arg_example
[09:19:48] [PASSED] last_arg_test
[09:19:48] [PASSED] pick_arg_example
[09:19:48] [PASSED] if_args_example
[09:19:48] [PASSED] if_args_test
[09:19:48] [PASSED] sep_comma_example
[09:19:48] ====================== [PASSED] args =======================
[09:19:48] =================== xe_pci (3 subtests) ====================
[09:19:48] ==================== check_graphics_ip  ====================
[09:19:48] [PASSED] 12.00 Xe_LP
[09:19:48] [PASSED] 12.10 Xe_LP+
[09:19:48] [PASSED] 12.55 Xe_HPG
[09:19:48] [PASSED] 12.60 Xe_HPC
[09:19:48] [PASSED] 12.70 Xe_LPG
[09:19:48] [PASSED] 12.71 Xe_LPG
[09:19:48] [PASSED] 12.74 Xe_LPG+
[09:19:48] [PASSED] 20.01 Xe2_HPG
[09:19:48] [PASSED] 20.02 Xe2_HPG
[09:19:48] [PASSED] 20.04 Xe2_LPG
[09:19:48] [PASSED] 30.00 Xe3_LPG
[09:19:48] [PASSED] 30.01 Xe3_LPG
[09:19:48] [PASSED] 30.03 Xe3_LPG
[09:19:48] [PASSED] 30.04 Xe3_LPG
[09:19:48] [PASSED] 30.05 Xe3_LPG
[09:19:48] [PASSED] 35.10 Xe3p_LPG
[09:19:48] [PASSED] 35.11 Xe3p_XPC
[09:19:48] ================ [PASSED] check_graphics_ip ================
[09:19:48] ===================== check_media_ip  ======================
[09:19:48] [PASSED] 12.00 Xe_M
[09:19:48] [PASSED] 12.55 Xe_HPM
[09:19:48] [PASSED] 13.00 Xe_LPM+
[09:19:48] [PASSED] 13.01 Xe2_HPM
[09:19:48] [PASSED] 20.00 Xe2_LPM
[09:19:48] [PASSED] 30.00 Xe3_LPM
[09:19:48] [PASSED] 30.02 Xe3_LPM
[09:19:48] [PASSED] 35.00 Xe3p_LPM
[09:19:48] [PASSED] 35.03 Xe3p_HPM
[09:19:48] ================= [PASSED] check_media_ip ==================
[09:19:48] =================== check_platform_desc  ===================
[09:19:48] [PASSED] 0x9A60 (TIGERLAKE)
[09:19:48] [PASSED] 0x9A68 (TIGERLAKE)
[09:19:48] [PASSED] 0x9A70 (TIGERLAKE)
[09:19:48] [PASSED] 0x9A40 (TIGERLAKE)
[09:19:48] [PASSED] 0x9A49 (TIGERLAKE)
[09:19:48] [PASSED] 0x9A59 (TIGERLAKE)
[09:19:48] [PASSED] 0x9A78 (TIGERLAKE)
[09:19:48] [PASSED] 0x9AC0 (TIGERLAKE)
[09:19:48] [PASSED] 0x9AC9 (TIGERLAKE)
[09:19:48] [PASSED] 0x9AD9 (TIGERLAKE)
[09:19:48] [PASSED] 0x9AF8 (TIGERLAKE)
[09:19:48] [PASSED] 0x4C80 (ROCKETLAKE)
[09:19:48] [PASSED] 0x4C8A (ROCKETLAKE)
[09:19:48] [PASSED] 0x4C8B (ROCKETLAKE)
[09:19:48] [PASSED] 0x4C8C (ROCKETLAKE)
[09:19:48] [PASSED] 0x4C90 (ROCKETLAKE)
[09:19:48] [PASSED] 0x4C9A (ROCKETLAKE)
[09:19:48] [PASSED] 0x4680 (ALDERLAKE_S)
[09:19:48] [PASSED] 0x4682 (ALDERLAKE_S)
[09:19:48] [PASSED] 0x4688 (ALDERLAKE_S)
[09:19:48] [PASSED] 0x468A (ALDERLAKE_S)
[09:19:48] [PASSED] 0x468B (ALDERLAKE_S)
[09:19:48] [PASSED] 0x4690 (ALDERLAKE_S)
[09:19:48] [PASSED] 0x4692 (ALDERLAKE_S)
[09:19:48] [PASSED] 0x4693 (ALDERLAKE_S)
[09:19:48] [PASSED] 0x46A0 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46A1 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46A2 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46A3 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46A6 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46A8 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46AA (ALDERLAKE_P)
[09:19:48] [PASSED] 0x462A (ALDERLAKE_P)
[09:19:48] [PASSED] 0x4626 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x4628 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46B0 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46B1 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46B2 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46B3 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46C0 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46C1 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46C2 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46C3 (ALDERLAKE_P)
[09:19:48] [PASSED] 0x46D0 (ALDERLAKE_N)
[09:19:48] [PASSED] 0x46D1 (ALDERLAKE_N)
[09:19:48] [PASSED] 0x46D2 (ALDERLAKE_N)
[09:19:48] [PASSED] 0x46D3 (ALDERLAKE_N)
[09:19:48] [PASSED] 0x46D4 (ALDERLAKE_N)
[09:19:48] [PASSED] 0xA721 (ALDERLAKE_P)
[09:19:48] [PASSED] 0xA7A1 (ALDERLAKE_P)
[09:19:48] [PASSED] 0xA7A9 (ALDERLAKE_P)
[09:19:48] [PASSED] 0xA7AC (ALDERLAKE_P)
[09:19:48] [PASSED] 0xA7AD (ALDERLAKE_P)
[09:19:48] [PASSED] 0xA720 (ALDERLAKE_P)
[09:19:48] [PASSED] 0xA7A0 (ALDERLAKE_P)
[09:19:48] [PASSED] 0xA7A8 (ALDERLAKE_P)
[09:19:48] [PASSED] 0xA7AA (ALDERLAKE_P)
[09:19:48] [PASSED] 0xA7AB (ALDERLAKE_P)
[09:19:48] [PASSED] 0xA780 (ALDERLAKE_S)
[09:19:48] [PASSED] 0xA781 (ALDERLAKE_S)
[09:19:48] [PASSED] 0xA782 (ALDERLAKE_S)
[09:19:48] [PASSED] 0xA783 (ALDERLAKE_S)
[09:19:48] [PASSED] 0xA788 (ALDERLAKE_S)
[09:19:48] [PASSED] 0xA789 (ALDERLAKE_S)
[09:19:48] [PASSED] 0xA78A (ALDERLAKE_S)
[09:19:48] [PASSED] 0xA78B (ALDERLAKE_S)
[09:19:48] [PASSED] 0x4905 (DG1)
[09:19:48] [PASSED] 0x4906 (DG1)
[09:19:48] [PASSED] 0x4907 (DG1)
[09:19:48] [PASSED] 0x4908 (DG1)
[09:19:48] [PASSED] 0x4909 (DG1)
[09:19:48] [PASSED] 0x56C0 (DG2)
[09:19:48] [PASSED] 0x56C2 (DG2)
[09:19:48] [PASSED] 0x56C1 (DG2)
[09:19:48] [PASSED] 0x7D51 (METEORLAKE)
[09:19:48] [PASSED] 0x7DD1 (METEORLAKE)
[09:19:48] [PASSED] 0x7D41 (METEORLAKE)
[09:19:48] [PASSED] 0x7D67 (METEORLAKE)
[09:19:48] [PASSED] 0xB640 (METEORLAKE)
[09:19:48] [PASSED] 0x56A0 (DG2)
[09:19:48] [PASSED] 0x56A1 (DG2)
[09:19:48] [PASSED] 0x56A2 (DG2)
[09:19:48] [PASSED] 0x56BE (DG2)
[09:19:48] [PASSED] 0x56BF (DG2)
[09:19:48] [PASSED] 0x5690 (DG2)
[09:19:48] [PASSED] 0x5691 (DG2)
[09:19:48] [PASSED] 0x5692 (DG2)
[09:19:48] [PASSED] 0x56A5 (DG2)
[09:19:48] [PASSED] 0x56A6 (DG2)
[09:19:48] [PASSED] 0x56B0 (DG2)
[09:19:48] [PASSED] 0x56B1 (DG2)
[09:19:48] [PASSED] 0x56BA (DG2)
[09:19:48] [PASSED] 0x56BB (DG2)
[09:19:48] [PASSED] 0x56BC (DG2)
[09:19:48] [PASSED] 0x56BD (DG2)
[09:19:48] [PASSED] 0x5693 (DG2)
[09:19:48] [PASSED] 0x5694 (DG2)
[09:19:48] [PASSED] 0x5695 (DG2)
[09:19:48] [PASSED] 0x56A3 (DG2)
[09:19:48] [PASSED] 0x56A4 (DG2)
[09:19:48] [PASSED] 0x56B2 (DG2)
[09:19:48] [PASSED] 0x56B3 (DG2)
[09:19:48] [PASSED] 0x5696 (DG2)
[09:19:48] [PASSED] 0x5697 (DG2)
[09:19:48] [PASSED] 0xB69 (PVC)
[09:19:48] [PASSED] 0xB6E (PVC)
[09:19:48] [PASSED] 0xBD4 (PVC)
[09:19:48] [PASSED] 0xBD5 (PVC)
[09:19:48] [PASSED] 0xBD6 (PVC)
[09:19:48] [PASSED] 0xBD7 (PVC)
[09:19:48] [PASSED] 0xBD8 (PVC)
[09:19:48] [PASSED] 0xBD9 (PVC)
[09:19:48] [PASSED] 0xBDA (PVC)
[09:19:48] [PASSED] 0xBDB (PVC)
[09:19:48] [PASSED] 0xBE0 (PVC)
[09:19:48] [PASSED] 0xBE1 (PVC)
[09:19:48] [PASSED] 0xBE5 (PVC)
[09:19:48] [PASSED] 0x7D40 (METEORLAKE)
[09:19:48] [PASSED] 0x7D45 (METEORLAKE)
[09:19:48] [PASSED] 0x7D55 (METEORLAKE)
[09:19:48] [PASSED] 0x7D60 (METEORLAKE)
[09:19:48] [PASSED] 0x7DD5 (METEORLAKE)
[09:19:48] [PASSED] 0x6420 (LUNARLAKE)
[09:19:48] [PASSED] 0x64A0 (LUNARLAKE)
[09:19:48] [PASSED] 0x64B0 (LUNARLAKE)
[09:19:48] [PASSED] 0xE202 (BATTLEMAGE)
[09:19:48] [PASSED] 0xE209 (BATTLEMAGE)
[09:19:48] [PASSED] 0xE20B (BATTLEMAGE)
[09:19:48] [PASSED] 0xE20C (BATTLEMAGE)
[09:19:48] [PASSED] 0xE20D (BATTLEMAGE)
[09:19:48] [PASSED] 0xE210 (BATTLEMAGE)
[09:19:48] [PASSED] 0xE211 (BATTLEMAGE)
[09:19:48] [PASSED] 0xE212 (BATTLEMAGE)
[09:19:48] [PASSED] 0xE216 (BATTLEMAGE)
[09:19:48] [PASSED] 0xE220 (BATTLEMAGE)
[09:19:48] [PASSED] 0xE221 (BATTLEMAGE)
[09:19:48] [PASSED] 0xE222 (BATTLEMAGE)
[09:19:48] [PASSED] 0xE223 (BATTLEMAGE)
[09:19:48] [PASSED] 0xB080 (PANTHERLAKE)
[09:19:48] [PASSED] 0xB081 (PANTHERLAKE)
[09:19:48] [PASSED] 0xB082 (PANTHERLAKE)
[09:19:48] [PASSED] 0xB083 (PANTHERLAKE)
[09:19:48] [PASSED] 0xB084 (PANTHERLAKE)
[09:19:48] [PASSED] 0xB085 (PANTHERLAKE)
[09:19:48] [PASSED] 0xB086 (PANTHERLAKE)
[09:19:48] [PASSED] 0xB087 (PANTHERLAKE)
[09:19:48] [PASSED] 0xB08F (PANTHERLAKE)
[09:19:48] [PASSED] 0xB090 (PANTHERLAKE)
[09:19:48] [PASSED] 0xB0A0 (PANTHERLAKE)
[09:19:48] [PASSED] 0xB0A1 (PANTHERLAKE)
[09:19:48] [PASSED] 0xB0B0 (PANTHERLAKE)
[09:19:48] [PASSED] 0xFD80 (PANTHERLAKE)
[09:19:48] [PASSED] 0xFD81 (PANTHERLAKE)
[09:19:48] [PASSED] 0xD740 (NOVALAKE_S)
[09:19:48] [PASSED] 0xD741 (NOVALAKE_S)
[09:19:48] [PASSED] 0xD742 (NOVALAKE_S)
[09:19:48] [PASSED] 0xD743 (NOVALAKE_S)
[09:19:48] [PASSED] 0xD745 (NOVALAKE_S)
[09:19:48] [PASSED] 0xD74A (NOVALAKE_S)
[09:19:48] [PASSED] 0xD74B (NOVALAKE_S)
[09:19:48] [PASSED] 0x674C (CRESCENTISLAND)
[09:19:48] [PASSED] 0x674D (CRESCENTISLAND)
[09:19:48] [PASSED] 0x674E (CRESCENTISLAND)
[09:19:48] [PASSED] 0x674F (CRESCENTISLAND)
[09:19:48] [PASSED] 0x6750 (CRESCENTISLAND)
[09:19:48] [PASSED] 0x6751 (CRESCENTISLAND)
[09:19:48] [PASSED] 0x6752 (CRESCENTISLAND)
[09:19:48] [PASSED] 0xD750 (NOVALAKE_P)
[09:19:48] [PASSED] 0xD751 (NOVALAKE_P)
[09:19:48] [PASSED] 0xD752 (NOVALAKE_P)
[09:19:48] [PASSED] 0xD753 (NOVALAKE_P)
[09:19:48] [PASSED] 0xD754 (NOVALAKE_P)
[09:19:48] [PASSED] 0xD755 (NOVALAKE_P)
[09:19:48] [PASSED] 0xD756 (NOVALAKE_P)
[09:19:48] [PASSED] 0xD757 (NOVALAKE_P)
[09:19:48] [PASSED] 0xD75F (NOVALAKE_P)
[09:19:48] =============== [PASSED] check_platform_desc ===============
[09:19:48] ===================== [PASSED] xe_pci ======================
[09:19:48] ============= xe_rtp_tables_test (5 subtests) ==============
[09:19:48] ================== xe_rtp_table_gt_test  ===================
[09:19:48] [PASSED] gt_was/14011060649
[09:19:48] [PASSED] gt_was/14011059788
[09:19:48] [PASSED] gt_was/14015795083
[09:19:48] [PASSED] gt_was/16021867713
[09:19:48] [PASSED] gt_was/14019449301
[09:19:48] [PASSED] gt_was/16028005424
[09:19:48] [PASSED] gt_was/14026578760
[09:19:48] [PASSED] gt_was/1409420604
[09:19:48] [PASSED] gt_was/1408615072
[09:19:48] [PASSED] gt_was/22010523718
[09:19:48] [PASSED] gt_was/14011006942
[09:19:48] [PASSED] gt_was/14014830051
[09:19:48] [PASSED] gt_was/18018781329
[09:19:48] [PASSED] gt_was/1509235366
[09:19:48] [PASSED] gt_was/18018781329
[09:19:48] [PASSED] gt_was/16016694945
[09:19:48] [PASSED] gt_was/14018575942
[09:19:48] [PASSED] gt_was/22016670082
[09:19:48] [PASSED] gt_was/22016670082
[09:19:48] [PASSED] gt_was/14017421178
[09:19:48] [PASSED] gt_was/16025250150
[09:19:48] [PASSED] gt_was/14021871409
[09:19:48] [PASSED] gt_was/16021865536
[09:19:48] [PASSED] gt_was/14021486841
[09:19:48] [PASSED] gt_was/14025160223
[09:19:48] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[09:19:48] [PASSED] gt_was/14025635424
[09:19:48] [PASSED] gt_was/16028005424
[09:19:48] ============== [PASSED] xe_rtp_table_gt_test ===============
[09:19:48] ================== xe_rtp_table_gt_test  ===================
[09:19:48] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[09:19:48] [PASSED] gt_tunings/Tuning: 32B Access Enable
[09:19:48] [PASSED] gt_tunings/Tuning: L3 cache
[09:19:48] [PASSED] gt_tunings/Tuning: L3 cache - media
[09:19:48] [PASSED] gt_tunings/Tuning: Compression Overfetch
[09:19:48] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[09:19:48] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[09:19:48] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[09:19:48] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[09:19:48] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[09:19:48] [PASSED] gt_tunings/Tuning: Stateless compression control
[09:19:48] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[09:19:48] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[09:19:48] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[09:19:48] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[09:19:48] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[09:19:48] ============== [PASSED] xe_rtp_table_gt_test ===============
[09:19:48] ================== xe_rtp_table_oob_test  ==================
[09:19:48] [PASSED] oob_was/1607983814
[09:19:48] [PASSED] oob_was/16010904313
[09:19:48] [PASSED] oob_was/18022495364
[09:19:48] [PASSED] oob_was/22012773006
[09:19:48] [PASSED] oob_was/14014475959
[09:19:48] [PASSED] oob_was/22011391025
[09:19:48] [PASSED] oob_was/22012727170
[09:19:48] [PASSED] oob_was/22012727685
[09:19:48] [PASSED] oob_was/22016596838
[09:19:48] [PASSED] oob_was/18020744125
[09:19:48] [PASSED] oob_was/1409600907
[09:19:48] [PASSED] oob_was/22014953428
[09:19:48] [PASSED] oob_was/16017236439
[09:19:48] [PASSED] oob_was/14019821291
[09:19:48] [PASSED] oob_was/14015076503
[09:19:48] [PASSED] oob_was/22016122933
[09:19:48] [PASSED] oob_was/14018913170
[09:19:48] [PASSED] oob_was/14018094691
[09:19:48] [PASSED] oob_was/18024947630
[09:19:48] [PASSED] oob_was/16022287689
[09:19:48] [PASSED] oob_was/13011645652
[09:19:48] [PASSED] oob_was/14022293748
[09:19:48] [PASSED] oob_was/22019794406
[09:19:48] [PASSED] oob_was/22019338487
[09:19:48] [PASSED] oob_was/16023588340
[09:19:48] [PASSED] oob_was/14019789679
[09:19:48] [PASSED] oob_was/14022866841
[09:19:48] [PASSED] oob_was/16021333562
[09:19:48] [PASSED] oob_was/14016712196
[09:19:48] [PASSED] oob_was/14015568240
[09:19:48] [PASSED] oob_was/18013179988
[09:19:48] [PASSED] oob_was/1508761755
[09:19:48] [PASSED] oob_was/16023105232
[09:19:48] [PASSED] oob_was/16026508708
[09:19:48] [PASSED] oob_was/14020001231
[09:19:48] [PASSED] oob_was/16023683509
[09:19:48] [PASSED] oob_was/14025515070
[09:19:48] [PASSED] oob_was/15015404425_disable
[09:19:48] [PASSED] oob_was/16026007364
[09:19:48] [PASSED] oob_was/14020316580
[09:19:48] [PASSED] oob_was/14025883347
[09:19:48] [PASSED] oob_was/16029380221
[09:19:48] [PASSED] oob_was/22022079272
[09:19:48] [PASSED] oob_was/16029897822
[09:19:48] [PASSED] oob_was/14026539277
[09:19:48] [PASSED] oob_was/14027054324
[09:19:48] [PASSED] oob_was/14025941587
[09:19:48] [PASSED] oob_was/16030224309
[09:19:48] [PASSED] oob_was/14028709524
[09:19:48] [PASSED] oob_was/14028250015
[09:19:48] [PASSED] oob_was/16031259911
[09:19:48] ============== [PASSED] xe_rtp_table_oob_test ==============
[09:19:48] ================ xe_rtp_table_dev_oob_test  ================
[09:19:48] [PASSED] device_oob_was/22010954014
[09:19:48] [PASSED] device_oob_was/15015404425
[09:19:48] [PASSED] device_oob_was/22019338487_display
[09:19:48] [PASSED] device_oob_was/14022085890
[09:19:48] [PASSED] device_oob_was/14026633728
[09:19:48] [PASSED] device_oob_was/14026746987
[09:19:48] [PASSED] device_oob_was/14026779378
[09:19:48] [PASSED] device_oob_was/14028586678
[09:19:48] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[09:19:48] ========== xe_rtp_table_missing_upper_bound_test  ==========
[09:19:48] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[09:19:48] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[09:19:48] [PASSED] register_whitelist/1806527549
[09:19:48] [PASSED] register_whitelist/allow_read_ctx_timestamp
[09:19:48] [PASSED] register_whitelist/allow_read_queue_timestamp
[09:19:48] [PASSED] register_whitelist/16014440446
[09:19:48] [PASSED] register_whitelist/16017236439
[09:19:48] [PASSED] register_whitelist/16020183090
[09:19:48] [PASSED] register_whitelist/14024997852
[09:19:48] [PASSED] register_whitelist/14024997852
[09:19:48] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[09:19:48] =============== [PASSED] xe_rtp_tables_test ================
[09:19:48] =================== xe_rtp (3 subtests) ====================
[09:19:48] =================== xe_rtp_rules_tests  ====================
[09:19:48] [PASSED] no
[09:19:48] [PASSED] yes
[09:19:48] [PASSED] no-and-no
[09:19:48] [PASSED] no-and-yes
[09:19:48] [PASSED] yes-and-no
[09:19:48] [PASSED] yes-and-yes
[09:19:48] [PASSED] no-or-no
[09:19:48] [PASSED] no-or-yes
[09:19:48] [PASSED] yes-or-no
[09:19:48] [PASSED] yes-or-yes
[09:19:48] [PASSED] no-yes-or-yes-no
[09:19:48] [PASSED] no-yes-or-yes-yes
[09:19:48] [PASSED] yes-yes-or-no-yes
[09:19:48] [PASSED] yes-yes-or-yes-yes
[09:19:48] [PASSED] no-no-or-yes-or-no
[09:19:48] [PASSED] or
[09:19:48] [PASSED] or-yes
[09:19:48] [PASSED] or-no
[09:19:48] [PASSED] yes-or
[09:19:48] [PASSED] no-or
[09:19:48] [PASSED] no-or-or-yes
[09:19:48] [PASSED] yes-or-or-no
[09:19:48] [PASSED] no-or-or-no
[09:19:48] [PASSED] missing-context-engine-class
[09:19:48] [PASSED] missing-context-engine-class-or-yes
[09:19:48] [PASSED] missing-context-engine-class-or-or-yes
[09:19:48] =============== [PASSED] xe_rtp_rules_tests ================
[09:19:48] =============== xe_rtp_process_to_sr_tests  ================
[09:19:48] [PASSED] coalesce-same-reg
[09:19:48] [PASSED] coalesce-same-reg-literal-and-func
[09:19:48] [PASSED] no-match-no-add
[09:19:48] [PASSED] two-regs-two-entries
[09:19:48] [PASSED] clr-one-set-other
[09:19:48] [PASSED] set-field
[09:19:48] [PASSED] conflict-duplicate
[09:19:48] [PASSED] conflict-not-disjoint
[09:19:48] [PASSED] conflict-not-disjoint-literal-and-func
[09:19:48] [PASSED] conflict-reg-type
[09:19:48] [PASSED] bad-mcr-reg-forced-to-regular
[09:19:48] [PASSED] bad-regular-reg-forced-to-mcr
[09:19:48] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[09:19:48] ================== xe_rtp_process_tests  ===================
[09:19:48] [PASSED] active1
[09:19:48] [PASSED] active2
[09:19:48] [PASSED] active-inactive
[09:19:48] [PASSED] inactive-active
[09:19:48] [PASSED] inactive-active-inactive
[09:19:48] [PASSED] inactive-inactive-inactive
[09:19:48] ============== [PASSED] xe_rtp_process_tests ===============
[09:19:48] ===================== [PASSED] xe_rtp ======================
[09:19:48] ==================== xe_wa (1 subtest) =====================
[09:19:48] ======================== xe_wa_gt  =========================
[09:19:48] [PASSED] TIGERLAKE B0
[09:19:48] [PASSED] DG1 A0
[09:19:48] [PASSED] DG1 B0
[09:19:48] [PASSED] ALDERLAKE_S A0
[09:19:48] [PASSED] ALDERLAKE_S B0
[09:19:48] [PASSED] ALDERLAKE_S C0
[09:19:48] [PASSED] ALDERLAKE_S D0
[09:19:48] [PASSED] ALDERLAKE_P A0
[09:19:48] [PASSED] ALDERLAKE_P B0
[09:19:48] [PASSED] ALDERLAKE_P C0
[09:19:48] [PASSED] ALDERLAKE_S RPLS D0
[09:19:48] [PASSED] ALDERLAKE_P RPLU E0
[09:19:48] [PASSED] DG2 G10 C0
[09:19:48] [PASSED] DG2 G11 B1
[09:19:48] [PASSED] DG2 G12 A1
[09:19:48] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:19:48] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:19:48] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[09:19:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[09:19:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[09:19:48] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[09:19:48] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[09:19:48] ==================== [PASSED] xe_wa_gt =====================
[09:19:48] ====================== [PASSED] xe_wa ======================
[09:19:48] ============================================================
[09:19:48] Testing complete. Ran 843 tests: passed: 814, skipped: 29
[09:19:48] Elapsed time: 41.418s total, 2.509s configuring, 38.193s building, 0.708s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[09:19:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:19:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:20:15] Starting KUnit Kernel (1/1)...
[09:20:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:20:15] ============ drm_test_pick_cmdline (2 subtests) ============
[09:20:15] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[09:20:15] =============== drm_test_pick_cmdline_named  ===============
[09:20:15] [PASSED] NTSC
[09:20:15] [PASSED] NTSC-J
[09:20:15] [PASSED] PAL
[09:20:15] [PASSED] PAL-M
[09:20:15] =========== [PASSED] drm_test_pick_cmdline_named ===========
[09:20:15] ============== [PASSED] drm_test_pick_cmdline ==============
[09:20:15] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[09:20:15] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[09:20:15] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[09:20:15] =========== drm_validate_clone_mode (2 subtests) ===========
[09:20:15] ============== drm_test_check_in_clone_mode  ===============
[09:20:15] [PASSED] in_clone_mode
[09:20:15] [PASSED] not_in_clone_mode
[09:20:15] ========== [PASSED] drm_test_check_in_clone_mode ===========
[09:20:15] =============== drm_test_check_valid_clones  ===============
[09:20:15] [PASSED] not_in_clone_mode
[09:20:15] [PASSED] valid_clone
[09:20:15] [PASSED] invalid_clone
[09:20:15] =========== [PASSED] drm_test_check_valid_clones ===========
[09:20:15] ============= [PASSED] drm_validate_clone_mode =============
[09:20:15] ============= drm_validate_modeset (1 subtest) =============
[09:20:15] [PASSED] drm_test_check_connector_changed_modeset
[09:20:15] ============== [PASSED] drm_validate_modeset ===============
[09:20:15] ====== drm_test_bridge_get_current_state (1 subtest) =======
[09:20:15] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[09:20:15] ======== [PASSED] drm_test_bridge_get_current_state ========
[09:20:15] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[09:20:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[09:20:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[09:20:15] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[09:20:15] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[09:20:15] ============== drm_bridge_alloc (2 subtests) ===============
[09:20:15] [PASSED] drm_test_drm_bridge_alloc_basic
[09:20:15] [PASSED] drm_test_drm_bridge_alloc_get_put
[09:20:15] ================ [PASSED] drm_bridge_alloc =================
[09:20:15] ============= drm_bridge_bus_fmt (5 subtests) ==============
[09:20:15] [PASSED] drm_test_bridge_rgb_yuv_rgb
[09:20:15] [PASSED] drm_test_bridge_must_convert_to_yuv444
[09:20:15] [PASSED] drm_test_bridge_hdmi_auto_rgb
[09:20:15] [PASSED] drm_test_bridge_auto_first
[09:20:15] [PASSED] drm_test_bridge_rgb_yuv_no_path
[09:20:15] =============== [PASSED] drm_bridge_bus_fmt ================
[09:20:15] ============= drm_cmdline_parser (40 subtests) =============
[09:20:15] [PASSED] drm_test_cmdline_force_d_only
[09:20:15] [PASSED] drm_test_cmdline_force_D_only_dvi
[09:20:15] [PASSED] drm_test_cmdline_force_D_only_hdmi
[09:20:15] [PASSED] drm_test_cmdline_force_D_only_not_digital
[09:20:15] [PASSED] drm_test_cmdline_force_e_only
[09:20:15] [PASSED] drm_test_cmdline_res
[09:20:15] [PASSED] drm_test_cmdline_res_vesa
[09:20:15] [PASSED] drm_test_cmdline_res_vesa_rblank
[09:20:15] [PASSED] drm_test_cmdline_res_rblank
[09:20:15] [PASSED] drm_test_cmdline_res_bpp
[09:20:15] [PASSED] drm_test_cmdline_res_refresh
[09:20:15] [PASSED] drm_test_cmdline_res_bpp_refresh
[09:20:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[09:20:15] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[09:20:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[09:20:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[09:20:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[09:20:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[09:20:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[09:20:15] [PASSED] drm_test_cmdline_res_margins_force_on
[09:20:15] [PASSED] drm_test_cmdline_res_vesa_margins
[09:20:15] [PASSED] drm_test_cmdline_name
[09:20:15] [PASSED] drm_test_cmdline_name_bpp
[09:20:15] [PASSED] drm_test_cmdline_name_option
[09:20:15] [PASSED] drm_test_cmdline_name_bpp_option
[09:20:15] [PASSED] drm_test_cmdline_rotate_0
[09:20:15] [PASSED] drm_test_cmdline_rotate_90
[09:20:15] [PASSED] drm_test_cmdline_rotate_180
[09:20:15] [PASSED] drm_test_cmdline_rotate_270
[09:20:15] [PASSED] drm_test_cmdline_hmirror
[09:20:15] [PASSED] drm_test_cmdline_vmirror
[09:20:15] [PASSED] drm_test_cmdline_margin_options
[09:20:15] [PASSED] drm_test_cmdline_multiple_options
[09:20:15] [PASSED] drm_test_cmdline_bpp_extra_and_option
[09:20:15] [PASSED] drm_test_cmdline_extra_and_option
[09:20:15] [PASSED] drm_test_cmdline_freestanding_options
[09:20:15] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[09:20:15] [PASSED] drm_test_cmdline_panel_orientation
[09:20:15] ================ drm_test_cmdline_invalid  =================
[09:20:15] [PASSED] margin_only
[09:20:15] [PASSED] interlace_only
[09:20:15] [PASSED] res_missing_x
[09:20:15] [PASSED] res_missing_y
[09:20:15] [PASSED] res_bad_y
[09:20:15] [PASSED] res_missing_y_bpp
[09:20:15] [PASSED] res_bad_bpp
[09:20:15] [PASSED] res_bad_refresh
[09:20:15] [PASSED] res_bpp_refresh_force_on_off
[09:20:15] [PASSED] res_invalid_mode
[09:20:15] [PASSED] res_bpp_wrong_place_mode
[09:20:15] [PASSED] name_bpp_refresh
[09:20:15] [PASSED] name_refresh
[09:20:15] [PASSED] name_refresh_wrong_mode
[09:20:15] [PASSED] name_refresh_invalid_mode
[09:20:15] [PASSED] rotate_multiple
[09:20:15] [PASSED] rotate_invalid_val
[09:20:15] [PASSED] rotate_truncated
[09:20:15] [PASSED] invalid_option
[09:20:15] [PASSED] invalid_tv_option
[09:20:15] [PASSED] truncated_tv_option
[09:20:15] ============ [PASSED] drm_test_cmdline_invalid =============
[09:20:15] =============== drm_test_cmdline_tv_options  ===============
[09:20:15] [PASSED] NTSC
[09:20:15] [PASSED] NTSC_443
[09:20:15] [PASSED] NTSC_J
[09:20:15] [PASSED] PAL
[09:20:15] [PASSED] PAL_M
[09:20:15] [PASSED] PAL_N
[09:20:15] [PASSED] SECAM
[09:20:15] [PASSED] MONO_525
[09:20:15] [PASSED] MONO_625
[09:20:15] =========== [PASSED] drm_test_cmdline_tv_options ===========
[09:20:15] =============== [PASSED] drm_cmdline_parser ================
[09:20:15] ========== drmm_connector_hdmi_init (20 subtests) ==========
[09:20:15] [PASSED] drm_test_connector_hdmi_init_valid
[09:20:15] [PASSED] drm_test_connector_hdmi_init_bpc_8
[09:20:15] [PASSED] drm_test_connector_hdmi_init_bpc_10
[09:20:15] [PASSED] drm_test_connector_hdmi_init_bpc_12
[09:20:15] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[09:20:15] [PASSED] drm_test_connector_hdmi_init_bpc_null
[09:20:15] [PASSED] drm_test_connector_hdmi_init_formats_empty
[09:20:15] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[09:20:15] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[09:20:15] [PASSED] supported_formats=0x9 yuv420_allowed=1
[09:20:15] [PASSED] supported_formats=0x9 yuv420_allowed=0
[09:20:15] [PASSED] supported_formats=0x5 yuv420_allowed=1
[09:20:15] [PASSED] supported_formats=0x5 yuv420_allowed=0
[09:20:15] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:20:15] [PASSED] drm_test_connector_hdmi_init_null_ddc
[09:20:15] [PASSED] drm_test_connector_hdmi_init_null_product
[09:20:15] [PASSED] drm_test_connector_hdmi_init_null_vendor
[09:20:15] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[09:20:15] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[09:20:15] [PASSED] drm_test_connector_hdmi_init_product_valid
[09:20:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[09:20:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[09:20:15] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[09:20:15] ========= drm_test_connector_hdmi_init_type_valid  =========
[09:20:15] [PASSED] HDMI-A
[09:20:15] [PASSED] HDMI-B
[09:20:15] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[09:20:15] ======== drm_test_connector_hdmi_init_type_invalid  ========
[09:20:15] [PASSED] Unknown
[09:20:15] [PASSED] VGA
[09:20:15] [PASSED] DVI-I
[09:20:15] [PASSED] DVI-D
[09:20:15] [PASSED] DVI-A
[09:20:15] [PASSED] Composite
[09:20:15] [PASSED] SVIDEO
[09:20:15] [PASSED] LVDS
[09:20:15] [PASSED] Component
[09:20:15] [PASSED] DIN
[09:20:15] [PASSED] DP
[09:20:15] [PASSED] TV
[09:20:15] [PASSED] eDP
[09:20:15] [PASSED] Virtual
[09:20:15] [PASSED] DSI
[09:20:15] [PASSED] DPI
[09:20:15] [PASSED] Writeback
[09:20:15] [PASSED] SPI
[09:20:15] [PASSED] USB
[09:20:15] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[09:20:15] ============ [PASSED] drmm_connector_hdmi_init =============
[09:20:15] ============= drmm_connector_init (3 subtests) =============
[09:20:15] [PASSED] drm_test_drmm_connector_init
[09:20:15] [PASSED] drm_test_drmm_connector_init_null_ddc
[09:20:15] ========= drm_test_drmm_connector_init_type_valid  =========
[09:20:15] [PASSED] Unknown
[09:20:15] [PASSED] VGA
[09:20:15] [PASSED] DVI-I
[09:20:15] [PASSED] DVI-D
[09:20:15] [PASSED] DVI-A
[09:20:15] [PASSED] Composite
[09:20:15] [PASSED] SVIDEO
[09:20:15] [PASSED] LVDS
[09:20:15] [PASSED] Component
[09:20:15] [PASSED] DIN
[09:20:15] [PASSED] DP
[09:20:15] [PASSED] HDMI-A
[09:20:15] [PASSED] HDMI-B
[09:20:15] [PASSED] TV
[09:20:15] [PASSED] eDP
[09:20:15] [PASSED] Virtual
[09:20:15] [PASSED] DSI
[09:20:15] [PASSED] DPI
[09:20:15] [PASSED] Writeback
[09:20:15] [PASSED] SPI
[09:20:15] [PASSED] USB
[09:20:15] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[09:20:15] =============== [PASSED] drmm_connector_init ===============
[09:20:15] ========= drm_connector_dynamic_init (6 subtests) ==========
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_init
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_init_properties
[09:20:15] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[09:20:15] [PASSED] Unknown
[09:20:15] [PASSED] VGA
[09:20:15] [PASSED] DVI-I
[09:20:15] [PASSED] DVI-D
[09:20:15] [PASSED] DVI-A
[09:20:15] [PASSED] Composite
[09:20:15] [PASSED] SVIDEO
[09:20:15] [PASSED] LVDS
[09:20:15] [PASSED] Component
[09:20:15] [PASSED] DIN
[09:20:15] [PASSED] DP
[09:20:15] [PASSED] HDMI-A
[09:20:15] [PASSED] HDMI-B
[09:20:15] [PASSED] TV
[09:20:15] [PASSED] eDP
[09:20:15] [PASSED] Virtual
[09:20:15] [PASSED] DSI
[09:20:15] [PASSED] DPI
[09:20:15] [PASSED] Writeback
[09:20:15] [PASSED] SPI
[09:20:15] [PASSED] USB
[09:20:15] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[09:20:15] ======== drm_test_drm_connector_dynamic_init_name  =========
[09:20:15] [PASSED] Unknown
[09:20:15] [PASSED] VGA
[09:20:15] [PASSED] DVI-I
[09:20:15] [PASSED] DVI-D
[09:20:15] [PASSED] DVI-A
[09:20:15] [PASSED] Composite
[09:20:15] [PASSED] SVIDEO
[09:20:15] [PASSED] LVDS
[09:20:15] [PASSED] Component
[09:20:15] [PASSED] DIN
[09:20:15] [PASSED] DP
[09:20:15] [PASSED] HDMI-A
[09:20:15] [PASSED] HDMI-B
[09:20:15] [PASSED] TV
[09:20:15] [PASSED] eDP
[09:20:15] [PASSED] Virtual
[09:20:15] [PASSED] DSI
[09:20:15] [PASSED] DPI
[09:20:15] [PASSED] Writeback
[09:20:15] [PASSED] SPI
[09:20:15] [PASSED] USB
[09:20:15] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[09:20:15] =========== [PASSED] drm_connector_dynamic_init ============
[09:20:15] ==== drm_connector_dynamic_register_early (4 subtests) =====
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[09:20:15] ====== [PASSED] drm_connector_dynamic_register_early =======
[09:20:15] ======= drm_connector_dynamic_register (7 subtests) ========
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[09:20:15] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[09:20:15] ========= [PASSED] drm_connector_dynamic_register ==========
[09:20:15] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[09:20:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[09:20:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[09:20:15] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[09:20:15] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[09:20:15] ========== drm_test_get_tv_mode_from_name_valid  ===========
[09:20:15] [PASSED] NTSC
[09:20:15] [PASSED] NTSC-443
[09:20:15] [PASSED] NTSC-J
[09:20:15] [PASSED] PAL
[09:20:15] [PASSED] PAL-M
[09:20:15] [PASSED] PAL-N
[09:20:15] [PASSED] SECAM
[09:20:15] [PASSED] Mono
[09:20:15] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[09:20:15] [PASSED] drm_test_get_tv_mode_from_name_truncated
[09:20:15] ============ [PASSED] drm_get_tv_mode_from_name ============
[09:20:15] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[09:20:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[09:20:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[09:20:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[09:20:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[09:20:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[09:20:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[09:20:15] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[09:20:15] [PASSED] VIC 96
[09:20:15] [PASSED] VIC 97
[09:20:15] [PASSED] VIC 101
[09:20:15] [PASSED] VIC 102
[09:20:15] [PASSED] VIC 106
[09:20:15] [PASSED] VIC 107
[09:20:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[09:20:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[09:20:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[09:20:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[09:20:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[09:20:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[09:20:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[09:20:15] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[09:20:15] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[09:20:15] [PASSED] Automatic
[09:20:15] [PASSED] Full
[09:20:15] [PASSED] Limited 16:235
[09:20:15] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[09:20:15] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[09:20:15] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[09:20:15] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[09:20:15] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[09:20:15] [PASSED] RGB
[09:20:15] [PASSED] YUV 4:2:0
[09:20:15] [PASSED] YUV 4:2:2
[09:20:15] [PASSED] YUV 4:4:4
[09:20:15] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[09:20:15] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[09:20:15] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[09:20:15] ============= drm_damage_helper (21 subtests) ==============
[09:20:15] [PASSED] drm_test_damage_iter_no_damage
[09:20:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[09:20:15] [PASSED] drm_test_damage_iter_no_damage_src_moved
[09:20:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[09:20:15] [PASSED] drm_test_damage_iter_no_damage_not_visible
[09:20:15] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[09:20:15] [PASSED] drm_test_damage_iter_no_damage_no_fb
[09:20:15] [PASSED] drm_test_damage_iter_simple_damage
[09:20:15] [PASSED] drm_test_damage_iter_single_damage
[09:20:15] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[09:20:15] [PASSED] drm_test_damage_iter_single_damage_outside_src
[09:20:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[09:20:15] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[09:20:15] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[09:20:15] [PASSED] drm_test_damage_iter_single_damage_src_moved
[09:20:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[09:20:15] [PASSED] drm_test_damage_iter_damage
[09:20:15] [PASSED] drm_test_damage_iter_damage_one_intersect
[09:20:15] [PASSED] drm_test_damage_iter_damage_one_outside
[09:20:15] [PASSED] drm_test_damage_iter_damage_src_moved
[09:20:15] [PASSED] drm_test_damage_iter_damage_not_visible
[09:20:15] ================ [PASSED] drm_damage_helper ================
[09:20:15] ============== drm_dp_mst_helper (3 subtests) ==============
[09:20:15] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[09:20:15] [PASSED] Clock 154000 BPP 30 DSC disabled
[09:20:15] [PASSED] Clock 234000 BPP 30 DSC disabled
[09:20:15] [PASSED] Clock 297000 BPP 24 DSC disabled
[09:20:15] [PASSED] Clock 332880 BPP 24 DSC enabled
[09:20:15] [PASSED] Clock 324540 BPP 24 DSC enabled
[09:20:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[09:20:15] ============== drm_test_dp_mst_calc_pbn_div  ===============
[09:20:15] [PASSED] Link rate 2000000 lane count 4
[09:20:15] [PASSED] Link rate 2000000 lane count 2
[09:20:15] [PASSED] Link rate 2000000 lane count 1
[09:20:15] [PASSED] Link rate 1350000 lane count 4
[09:20:15] [PASSED] Link rate 1350000 lane count 2
[09:20:15] [PASSED] Link rate 1350000 lane count 1
[09:20:15] [PASSED] Link rate 1000000 lane count 4
[09:20:15] [PASSED] Link rate 1000000 lane count 2
[09:20:15] [PASSED] Link rate 1000000 lane count 1
[09:20:15] [PASSED] Link rate 810000 lane count 4
[09:20:15] [PASSED] Link rate 810000 lane count 2
[09:20:15] [PASSED] Link rate 810000 lane count 1
[09:20:15] [PASSED] Link rate 540000 lane count 4
[09:20:15] [PASSED] Link rate 540000 lane count 2
[09:20:15] [PASSED] Link rate 540000 lane count 1
[09:20:15] [PASSED] Link rate 270000 lane count 4
[09:20:15] [PASSED] Link rate 270000 lane count 2
[09:20:15] [PASSED] Link rate 270000 lane count 1
[09:20:15] [PASSED] Link rate 162000 lane count 4
[09:20:15] [PASSED] Link rate 162000 lane count 2
[09:20:15] [PASSED] Link rate 162000 lane count 1
[09:20:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[09:20:15] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[09:20:15] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[09:20:15] [PASSED] DP_POWER_UP_PHY with port number
[09:20:15] [PASSED] DP_POWER_DOWN_PHY with port number
[09:20:15] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[09:20:15] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[09:20:15] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[09:20:15] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[09:20:15] [PASSED] DP_QUERY_PAYLOAD with port number
[09:20:15] [PASSED] DP_QUERY_PAYLOAD with VCPI
[09:20:15] [PASSED] DP_REMOTE_DPCD_READ with port number
[09:20:15] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[09:20:15] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[09:20:15] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[09:20:15] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[09:20:15] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[09:20:15] [PASSED] DP_REMOTE_I2C_READ with port number
[09:20:15] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[09:20:15] [PASSED] DP_REMOTE_I2C_READ with transactions array
[09:20:15] [PASSED] DP_REMOTE_I2C_WRITE with port number
[09:20:15] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[09:20:15] [PASSED] DP_REMOTE_I2C_WRITE with data array
[09:20:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[09:20:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[09:20:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[09:20:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[09:20:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[09:20:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[09:20:15] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[09:20:15] ================ [PASSED] drm_dp_mst_helper ================
[09:20:15] ================== drm_exec (7 subtests) ===================
[09:20:15] [PASSED] sanitycheck
[09:20:15] [PASSED] test_lock
[09:20:15] [PASSED] test_lock_unlock
[09:20:15] [PASSED] test_duplicates
[09:20:15] [PASSED] test_prepare
[09:20:15] [PASSED] test_prepare_array
[09:20:15] [PASSED] test_multiple_loops
[09:20:15] ==================== [PASSED] drm_exec =====================
[09:20:15] =========== drm_format_helper_test (17 subtests) ===========
[09:20:15] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[09:20:15] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[09:20:15] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[09:20:15] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[09:20:15] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[09:20:15] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[09:20:15] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[09:20:15] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[09:20:15] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[09:20:15] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[09:20:15] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[09:20:15] ============== drm_test_fb_xrgb8888_to_mono  ===============
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[09:20:15] ==================== drm_test_fb_swab  =====================
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ================ [PASSED] drm_test_fb_swab =================
[09:20:15] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[09:20:15] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[09:20:15] [PASSED] single_pixel_source_buffer
[09:20:15] [PASSED] single_pixel_clip_rectangle
[09:20:15] [PASSED] well_known_colors
[09:20:15] [PASSED] destination_pitch
[09:20:15] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[09:20:15] ================= drm_test_fb_clip_offset  =================
[09:20:15] [PASSED] pass through
[09:20:15] [PASSED] horizontal offset
[09:20:15] [PASSED] vertical offset
[09:20:15] [PASSED] horizontal and vertical offset
[09:20:15] [PASSED] horizontal offset (custom pitch)
[09:20:15] [PASSED] vertical offset (custom pitch)
[09:20:15] [PASSED] horizontal and vertical offset (custom pitch)
[09:20:15] ============= [PASSED] drm_test_fb_clip_offset =============
[09:20:15] =================== drm_test_fb_memcpy  ====================
[09:20:15] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[09:20:15] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[09:20:15] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[09:20:15] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[09:20:15] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[09:20:15] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[09:20:15] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[09:20:15] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[09:20:15] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[09:20:15] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[09:20:15] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[09:20:15] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[09:20:15] =============== [PASSED] drm_test_fb_memcpy ================
[09:20:15] ============= [PASSED] drm_format_helper_test ==============
[09:20:15] ================= drm_format (18 subtests) =================
[09:20:15] [PASSED] drm_test_format_block_width_invalid
[09:20:15] [PASSED] drm_test_format_block_width_one_plane
[09:20:15] [PASSED] drm_test_format_block_width_two_plane
[09:20:15] [PASSED] drm_test_format_block_width_three_plane
[09:20:15] [PASSED] drm_test_format_block_width_tiled
[09:20:15] [PASSED] drm_test_format_block_height_invalid
[09:20:15] [PASSED] drm_test_format_block_height_one_plane
[09:20:15] [PASSED] drm_test_format_block_height_two_plane
[09:20:15] [PASSED] drm_test_format_block_height_three_plane
[09:20:15] [PASSED] drm_test_format_block_height_tiled
[09:20:15] [PASSED] drm_test_format_min_pitch_invalid
[09:20:15] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[09:20:15] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[09:20:15] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[09:20:15] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[09:20:15] [PASSED] drm_test_format_min_pitch_two_plane
[09:20:15] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[09:20:15] [PASSED] drm_test_format_min_pitch_tiled
[09:20:15] =================== [PASSED] drm_format ====================
[09:20:15] ============== drm_framebuffer (10 subtests) ===============
[09:20:15] ========== drm_test_framebuffer_check_src_coords  ==========
[09:20:15] [PASSED] Success: source fits into fb
[09:20:15] [PASSED] Fail: overflowing fb with x-axis coordinate
[09:20:15] [PASSED] Fail: overflowing fb with y-axis coordinate
[09:20:15] [PASSED] Fail: overflowing fb with source width
[09:20:15] [PASSED] Fail: overflowing fb with source height
[09:20:15] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[09:20:15] [PASSED] drm_test_framebuffer_cleanup
[09:20:15] =============== drm_test_framebuffer_create  ===============
[09:20:15] [PASSED] ABGR8888 normal sizes
[09:20:15] [PASSED] ABGR8888 max sizes
[09:20:15] [PASSED] ABGR8888 pitch greater than min required
[09:20:15] [PASSED] ABGR8888 pitch less than min required
[09:20:15] [PASSED] ABGR8888 Invalid width
[09:20:15] [PASSED] ABGR8888 Invalid buffer handle
[09:20:15] [PASSED] No pixel format
[09:20:15] [PASSED] ABGR8888 Width 0
[09:20:15] [PASSED] ABGR8888 Height 0
[09:20:15] [PASSED] ABGR8888 Out of bound height * pitch combination
[09:20:15] [PASSED] ABGR8888 Large buffer offset
[09:20:15] [PASSED] ABGR8888 Buffer offset for inexistent plane
[09:20:15] [PASSED] ABGR8888 Invalid flag
[09:20:15] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[09:20:15] [PASSED] ABGR8888 Valid buffer modifier
[09:20:15] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[09:20:15] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[09:20:15] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[09:20:15] [PASSED] NV12 Normal sizes
[09:20:15] [PASSED] NV12 Max sizes
[09:20:15] [PASSED] NV12 Invalid pitch
[09:20:15] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[09:20:15] [PASSED] NV12 different  modifier per-plane
[09:20:15] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[09:20:15] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[09:20:15] [PASSED] NV12 Modifier for inexistent plane
[09:20:15] [PASSED] NV12 Handle for inexistent plane
[09:20:15] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[09:20:15] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[09:20:15] [PASSED] YVU420 Normal sizes
[09:20:15] [PASSED] YVU420 Max sizes
[09:20:15] [PASSED] YVU420 Invalid pitch
[09:20:15] [PASSED] YVU420 Different pitches
[09:20:15] [PASSED] YVU420 Different buffer offsets/pitches
[09:20:15] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[09:20:15] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[09:20:15] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[09:20:15] [PASSED] YVU420 Valid modifier
[09:20:15] [PASSED] YVU420 Different modifiers per plane
[09:20:15] [PASSED] YVU420 Modifier for inexistent plane
[09:20:15] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[09:20:15] [PASSED] X0L2 Normal sizes
[09:20:15] [PASSED] X0L2 Max sizes
[09:20:15] [PASSED] X0L2 Invalid pitch
[09:20:15] [PASSED] X0L2 Pitch greater than minimum required
[09:20:15] [PASSED] X0L2 Handle for inexistent plane
[09:20:15] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[09:20:15] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[09:20:15] [PASSED] X0L2 Valid modifier
[09:20:15] [PASSED] X0L2 Modifier for inexistent plane
[09:20:15] =========== [PASSED] drm_test_framebuffer_create ===========
[09:20:15] [PASSED] drm_test_framebuffer_free
[09:20:15] [PASSED] drm_test_framebuffer_init
[09:20:15] [PASSED] drm_test_framebuffer_init_bad_format
[09:20:15] [PASSED] drm_test_framebuffer_init_dev_mismatch
[09:20:15] [PASSED] drm_test_framebuffer_lookup
[09:20:15] [PASSED] drm_test_framebuffer_lookup_inexistent
[09:20:15] [PASSED] drm_test_framebuffer_modifiers_not_supported
[09:20:15] ================= [PASSED] drm_framebuffer =================
[09:20:15] ================ drm_gem_shmem (8 subtests) ================
[09:20:15] [PASSED] drm_gem_shmem_test_obj_create
[09:20:15] [PASSED] drm_gem_shmem_test_obj_create_private
[09:20:15] [PASSED] drm_gem_shmem_test_pin_pages
[09:20:15] [PASSED] drm_gem_shmem_test_vmap
[09:20:15] [PASSED] drm_gem_shmem_test_get_sg_table
[09:20:15] [PASSED] drm_gem_shmem_test_get_pages_sgt
[09:20:15] [PASSED] drm_gem_shmem_test_madvise
[09:20:15] [PASSED] drm_gem_shmem_test_purge
[09:20:15] ================== [PASSED] drm_gem_shmem ==================
[09:20:15] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[09:20:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[09:20:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[09:20:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[09:20:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[09:20:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[09:20:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[09:20:15] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[09:20:15] [PASSED] Automatic
[09:20:15] [PASSED] Full
[09:20:15] [PASSED] Limited 16:235
[09:20:15] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[09:20:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[09:20:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[09:20:15] [PASSED] drm_test_check_disable_connector
[09:20:15] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[09:20:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[09:20:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[09:20:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[09:20:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[09:20:15] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[09:20:15] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[09:20:15] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[09:20:15] [PASSED] drm_test_check_output_bpc_dvi
[09:20:15] [PASSED] drm_test_check_output_bpc_format_vic_1
[09:20:15] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[09:20:15] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[09:20:15] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[09:20:15] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[09:20:15] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[09:20:15] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[09:20:15] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[09:20:15] ============ drm_test_check_hdmi_color_format  =============
[09:20:15] [PASSED] AUTO -> RGB
[09:20:15] [PASSED] YCBCR422 -> YUV422
[09:20:15] [PASSED] YCBCR420 -> YUV420
[09:20:15] [PASSED] YCBCR444 -> YUV444
[09:20:15] [PASSED] RGB -> RGB
[09:20:15] ======== [PASSED] drm_test_check_hdmi_color_format =========
[09:20:15] ======== drm_test_check_hdmi_color_format_420_only  ========
[09:20:15] [PASSED] RGB should fail
[09:20:15] [PASSED] YUV444 should fail
[09:20:15] [PASSED] YUV422 should fail
[09:20:15] [PASSED] YUV420 should work
[09:20:15] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[09:20:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[09:20:15] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[09:20:15] [PASSED] drm_test_check_broadcast_rgb_value
[09:20:15] [PASSED] drm_test_check_bpc_8_value
[09:20:15] [PASSED] drm_test_check_bpc_10_value
[09:20:15] [PASSED] drm_test_check_bpc_12_value
[09:20:15] [PASSED] drm_test_check_format_value
[09:20:15] [PASSED] drm_test_check_tmds_char_value
[09:20:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[09:20:15] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[09:20:15] [PASSED] drm_test_check_mode_valid
[09:20:15] [PASSED] drm_test_check_mode_valid_reject
[09:20:15] [PASSED] drm_test_check_mode_valid_reject_rate
[09:20:15] [PASSED] drm_test_check_mode_valid_reject_max_clock
[09:20:15] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[09:20:15] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[09:20:15] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[09:20:15] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[09:20:15] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[09:20:15] [PASSED] drm_test_check_infoframes
[09:20:15] [PASSED] drm_test_check_reject_avi_infoframe
[09:20:15] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[09:20:15] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[09:20:15] [PASSED] drm_test_check_reject_audio_infoframe
[09:20:15] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[09:20:15] ================= drm_managed (2 subtests) =================
[09:20:15] [PASSED] drm_test_managed_release_action
[09:20:15] [PASSED] drm_test_managed_run_action
[09:20:15] =================== [PASSED] drm_managed ===================
[09:20:15] =================== drm_mm (6 subtests) ====================
[09:20:15] [PASSED] drm_test_mm_init
[09:20:15] [PASSED] drm_test_mm_debug
[09:20:15] [PASSED] drm_test_mm_align32
[09:20:15] [PASSED] drm_test_mm_align64
[09:20:15] [PASSED] drm_test_mm_lowest
[09:20:15] [PASSED] drm_test_mm_highest
[09:20:15] ===================== [PASSED] drm_mm ======================
[09:20:15] ============= drm_modes_analog_tv (5 subtests) =============
[09:20:15] [PASSED] drm_test_modes_analog_tv_mono_576i
[09:20:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[09:20:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[09:20:15] [PASSED] drm_test_modes_analog_tv_pal_576i
[09:20:15] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[09:20:15] =============== [PASSED] drm_modes_analog_tv ===============
[09:20:15] ============== drm_panic_helper (3 subtests) ===============
[09:20:15] ============= drm_test_panic_screen_user_map  ==============
[09:20:15] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[09:20:15] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[09:20:15] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[09:20:15] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[09:20:15] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[09:20:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[09:20:15] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[09:20:15] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[09:20:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[09:20:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[09:20:15] ========= [PASSED] drm_test_panic_screen_user_map ==========
[09:20:15] ============= drm_test_panic_screen_user_page  =============
[09:20:15] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[09:20:15] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[09:20:15] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[09:20:15] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[09:20:15] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[09:20:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[09:20:16] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[09:20:16] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[09:20:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[09:20:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[09:20:16] ========= [PASSED] drm_test_panic_screen_user_page =========
[09:20:16] ========== drm_test_panic_screen_user_set_pixel  ===========
[09:20:16] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[09:20:16] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[09:20:16] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[09:20:16] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[09:20:16] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[09:20:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[09:20:16] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[09:20:16] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[09:20:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[09:20:16] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[09:20:16] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[09:20:16] ================ [PASSED] drm_panic_helper =================
[09:20:16] ============== drm_plane_helper (2 subtests) ===============
[09:20:16] =============== drm_test_check_plane_state  ================
[09:20:16] [PASSED] clipping_simple
[09:20:16] [PASSED] clipping_rotate_reflect
[09:20:16] [PASSED] positioning_simple
[09:20:16] [PASSED] upscaling
[09:20:16] [PASSED] downscaling
[09:20:16] [PASSED] rounding1
[09:20:16] [PASSED] rounding2
[09:20:16] [PASSED] rounding3
[09:20:16] [PASSED] rounding4
[09:20:16] =========== [PASSED] drm_test_check_plane_state ============
[09:20:16] =========== drm_test_check_invalid_plane_state  ============
[09:20:16] [PASSED] positioning_invalid
[09:20:16] [PASSED] upscaling_invalid
[09:20:16] [PASSED] downscaling_invalid
[09:20:16] ======= [PASSED] drm_test_check_invalid_plane_state ========
[09:20:16] ================ [PASSED] drm_plane_helper =================
[09:20:16] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[09:20:16] ====== drm_test_connector_helper_tv_get_modes_check  =======
[09:20:16] [PASSED] None
[09:20:16] [PASSED] PAL
[09:20:16] [PASSED] NTSC
[09:20:16] [PASSED] Both, NTSC Default
[09:20:16] [PASSED] Both, PAL Default
[09:20:16] [PASSED] Both, NTSC Default, with PAL on command-line
[09:20:16] [PASSED] Both, PAL Default, with NTSC on command-line
[09:20:16] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[09:20:16] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[09:20:16] ================== drm_rect (9 subtests) ===================
[09:20:16] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[09:20:16] [PASSED] drm_test_rect_clip_scaled_not_clipped
[09:20:16] [PASSED] drm_test_rect_clip_scaled_clipped
[09:20:16] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[09:20:16] ================= drm_test_rect_intersect  =================
[09:20:16] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[09:20:16] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[09:20:16] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[09:20:16] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[09:20:16] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[09:20:16] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[09:20:16] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[09:20:16] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[09:20:16] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[09:20:16] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[09:20:16] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[09:20:16] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[09:20:16] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[09:20:16] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[09:20:16] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[09:20:16] ============= [PASSED] drm_test_rect_intersect =============
[09:20:16] ================ drm_test_rect_calc_hscale  ================
[09:20:16] [PASSED] normal use
[09:20:16] [PASSED] out of max range
[09:20:16] [PASSED] out of min range
[09:20:16] [PASSED] zero dst
[09:20:16] [PASSED] negative src
[09:20:16] [PASSED] negative dst
[09:20:16] ============ [PASSED] drm_test_rect_calc_hscale ============
[09:20:16] ================ drm_test_rect_calc_vscale  ================
[09:20:16] [PASSED] normal use
[09:20:16] [PASSED] out of max range
[09:20:16] [PASSED] out of min range
[09:20:16] [PASSED] zero dst
[09:20:16] [PASSED] negative src
[09:20:16] [PASSED] negative dst
[09:20:16] ============ [PASSED] drm_test_rect_calc_vscale ============
[09:20:16] ================== drm_test_rect_rotate  ===================
[09:20:16] [PASSED] reflect-x
[09:20:16] [PASSED] reflect-y
[09:20:16] [PASSED] rotate-0
[09:20:16] [PASSED] rotate-90
[09:20:16] [PASSED] rotate-180
[09:20:16] [PASSED] rotate-270
[09:20:16] ============== [PASSED] drm_test_rect_rotate ===============
[09:20:16] ================ drm_test_rect_rotate_inv  =================
[09:20:16] [PASSED] reflect-x
[09:20:16] [PASSED] reflect-y
[09:20:16] [PASSED] rotate-0
[09:20:16] [PASSED] rotate-90
[09:20:16] [PASSED] rotate-180
[09:20:16] [PASSED] rotate-270
[09:20:16] ============ [PASSED] drm_test_rect_rotate_inv =============
[09:20:16] ==================== [PASSED] drm_rect =====================
[09:20:16] ============ drm_sysfb_modeset_test (1 subtest) ============
[09:20:16] ============ drm_test_sysfb_build_fourcc_list  =============
[09:20:16] [PASSED] no native formats
[09:20:16] [PASSED] XRGB8888 as native format
[09:20:16] [PASSED] remove duplicates
[09:20:16] [PASSED] convert alpha formats
[09:20:16] [PASSED] random formats
[09:20:16] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[09:20:16] ============= [PASSED] drm_sysfb_modeset_test ==============
[09:20:16] ================== drm_fixp (2 subtests) ===================
[09:20:16] [PASSED] drm_test_int2fixp
[09:20:16] [PASSED] drm_test_sm2fixp
[09:20:16] ==================== [PASSED] drm_fixp =====================
[09:20:16] ============================================================
[09:20:16] Testing complete. Ran 667 tests: passed: 667
[09:20:16] Elapsed time: 27.860s total, 2.401s configuring, 24.993s building, 0.415s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[09:20:16] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:20:18] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:20:28] Starting KUnit Kernel (1/1)...
[09:20:28] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:20:29] ================= ttm_device (5 subtests) ==================
[09:20:29] [PASSED] ttm_device_init_basic
[09:20:29] [PASSED] ttm_device_init_multiple
[09:20:29] [PASSED] ttm_device_fini_basic
[09:20:29] [PASSED] ttm_device_init_no_vma_man
[09:20:29] ================== ttm_device_init_pools  ==================
[09:20:29] [PASSED] No DMA allocations, no DMA32 required
[09:20:29] [PASSED] DMA allocations, DMA32 required
[09:20:29] [PASSED] No DMA allocations, DMA32 required
[09:20:29] [PASSED] DMA allocations, no DMA32 required
[09:20:29] ============== [PASSED] ttm_device_init_pools ==============
[09:20:29] =================== [PASSED] ttm_device ====================
[09:20:29] ================== ttm_pool (8 subtests) ===================
[09:20:29] ================== ttm_pool_alloc_basic  ===================
[09:20:29] [PASSED] One page
[09:20:29] [PASSED] More than one page
[09:20:29] [PASSED] Above the allocation limit
[09:20:29] [PASSED] One page, with coherent DMA mappings enabled
[09:20:29] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:20:29] ============== [PASSED] ttm_pool_alloc_basic ===============
[09:20:29] ============== ttm_pool_alloc_basic_dma_addr  ==============
[09:20:29] [PASSED] One page
[09:20:29] [PASSED] More than one page
[09:20:29] [PASSED] Above the allocation limit
[09:20:29] [PASSED] One page, with coherent DMA mappings enabled
[09:20:29] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:20:29] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[09:20:29] [PASSED] ttm_pool_alloc_order_caching_match
[09:20:29] [PASSED] ttm_pool_alloc_caching_mismatch
[09:20:29] [PASSED] ttm_pool_alloc_order_mismatch
[09:20:29] [PASSED] ttm_pool_free_dma_alloc
[09:20:29] [PASSED] ttm_pool_free_no_dma_alloc
[09:20:29] [PASSED] ttm_pool_fini_basic
[09:20:29] ==================== [PASSED] ttm_pool =====================
[09:20:29] ================ ttm_resource (8 subtests) =================
[09:20:29] ================= ttm_resource_init_basic  =================
[09:20:29] [PASSED] Init resource in TTM_PL_SYSTEM
[09:20:29] [PASSED] Init resource in TTM_PL_VRAM
[09:20:29] [PASSED] Init resource in a private placement
[09:20:29] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[09:20:29] ============= [PASSED] ttm_resource_init_basic =============
[09:20:29] [PASSED] ttm_resource_init_pinned
[09:20:29] [PASSED] ttm_resource_fini_basic
[09:20:29] [PASSED] ttm_resource_manager_init_basic
[09:20:29] [PASSED] ttm_resource_manager_usage_basic
[09:20:29] [PASSED] ttm_resource_manager_set_used_basic
[09:20:29] [PASSED] ttm_sys_man_alloc_basic
[09:20:29] [PASSED] ttm_sys_man_free_basic
[09:20:29] ================== [PASSED] ttm_resource ===================
[09:20:29] =================== ttm_tt (15 subtests) ===================
[09:20:29] ==================== ttm_tt_init_basic  ====================
[09:20:29] [PASSED] Page-aligned size
[09:20:29] [PASSED] Extra pages requested
[09:20:29] ================ [PASSED] ttm_tt_init_basic ================
[09:20:29] [PASSED] ttm_tt_init_misaligned
[09:20:29] [PASSED] ttm_tt_fini_basic
[09:20:29] [PASSED] ttm_tt_fini_sg
[09:20:29] [PASSED] ttm_tt_fini_shmem
[09:20:29] [PASSED] ttm_tt_create_basic
[09:20:29] [PASSED] ttm_tt_create_invalid_bo_type
[09:20:29] [PASSED] ttm_tt_create_ttm_exists
[09:20:29] [PASSED] ttm_tt_create_failed
[09:20:29] [PASSED] ttm_tt_destroy_basic
[09:20:29] [PASSED] ttm_tt_populate_null_ttm
[09:20:29] [PASSED] ttm_tt_populate_populated_ttm
[09:20:29] [PASSED] ttm_tt_unpopulate_basic
[09:20:29] [PASSED] ttm_tt_unpopulate_empty_ttm
[09:20:29] [PASSED] ttm_tt_swapin_basic
[09:20:29] ===================== [PASSED] ttm_tt ======================
[09:20:29] =================== ttm_bo (14 subtests) ===================
[09:20:29] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[09:20:29] [PASSED] Cannot be interrupted and sleeps
[09:20:29] [PASSED] Cannot be interrupted, locks straight away
[09:20:29] [PASSED] Can be interrupted, sleeps
[09:20:29] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[09:20:29] [PASSED] ttm_bo_reserve_locked_no_sleep
[09:20:29] [PASSED] ttm_bo_reserve_no_wait_ticket
[09:20:29] [PASSED] ttm_bo_reserve_double_resv
[09:20:29] [PASSED] ttm_bo_reserve_interrupted
[09:20:29] [PASSED] ttm_bo_reserve_deadlock
[09:20:29] [PASSED] ttm_bo_unreserve_basic
[09:20:29] [PASSED] ttm_bo_unreserve_pinned
[09:20:29] [PASSED] ttm_bo_unreserve_bulk
[09:20:29] [PASSED] ttm_bo_fini_basic
[09:20:29] [PASSED] ttm_bo_fini_shared_resv
[09:20:29] [PASSED] ttm_bo_pin_basic
[09:20:29] [PASSED] ttm_bo_pin_unpin_resource
[09:20:29] [PASSED] ttm_bo_multiple_pin_one_unpin
[09:20:29] ===================== [PASSED] ttm_bo ======================
[09:20:29] ============== ttm_bo_validate (22 subtests) ===============
[09:20:29] ============== ttm_bo_init_reserved_sys_man  ===============
[09:20:29] [PASSED] Buffer object for userspace
[09:20:29] [PASSED] Kernel buffer object
[09:20:29] [PASSED] Shared buffer object
[09:20:29] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[09:20:29] ============== ttm_bo_init_reserved_mock_man  ==============
[09:20:29] [PASSED] Buffer object for userspace
[09:20:29] [PASSED] Kernel buffer object
[09:20:29] [PASSED] Shared buffer object
[09:20:29] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[09:20:29] [PASSED] ttm_bo_init_reserved_resv
[09:20:29] ================== ttm_bo_validate_basic  ==================
[09:20:29] [PASSED] Buffer object for userspace
[09:20:29] [PASSED] Kernel buffer object
[09:20:29] [PASSED] Shared buffer object
[09:20:29] ============== [PASSED] ttm_bo_validate_basic ==============
[09:20:29] [PASSED] ttm_bo_validate_invalid_placement
[09:20:29] ============= ttm_bo_validate_same_placement  ==============
[09:20:29] [PASSED] System manager
[09:20:29] [PASSED] VRAM manager
[09:20:29] ========= [PASSED] ttm_bo_validate_same_placement ==========
[09:20:29] [PASSED] ttm_bo_validate_failed_alloc
[09:20:29] [PASSED] ttm_bo_validate_pinned
[09:20:29] [PASSED] ttm_bo_validate_busy_placement
[09:20:29] ================ ttm_bo_validate_multihop  =================
[09:20:29] [PASSED] Buffer object for userspace
[09:20:29] [PASSED] Kernel buffer object
[09:20:29] [PASSED] Shared buffer object
[09:20:29] ============ [PASSED] ttm_bo_validate_multihop =============
[09:20:29] ========== ttm_bo_validate_no_placement_signaled  ==========
[09:20:29] [PASSED] Buffer object in system domain, no page vector
[09:20:29] [PASSED] Buffer object in system domain with an existing page vector
[09:20:29] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[09:20:29] ======== ttm_bo_validate_no_placement_not_signaled  ========
[09:20:29] [PASSED] Buffer object for userspace
[09:20:29] [PASSED] Kernel buffer object
[09:20:29] [PASSED] Shared buffer object
[09:20:29] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[09:20:29] [PASSED] ttm_bo_validate_move_fence_signaled
[09:20:29] ========= ttm_bo_validate_move_fence_not_signaled  =========
[09:20:29] [PASSED] Waits for GPU
[09:20:29] [PASSED] Tries to lock straight away
[09:20:29] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[09:20:29] [PASSED] ttm_bo_validate_swapout
[09:20:29] [PASSED] ttm_bo_validate_happy_evict
[09:20:29] [PASSED] ttm_bo_validate_all_pinned_evict
[09:20:29] [PASSED] ttm_bo_validate_allowed_only_evict
[09:20:29] [PASSED] ttm_bo_validate_deleted_evict
[09:20:29] [PASSED] ttm_bo_validate_busy_domain_evict
[09:20:29] [PASSED] ttm_bo_validate_evict_gutting
[09:20:29] [PASSED] ttm_bo_validate_recrusive_evict
[09:20:29] ================= [PASSED] ttm_bo_validate =================
[09:20:29] ============================================================
[09:20:29] Testing complete. Ran 102 tests: passed: 102
[09:20:29] Elapsed time: 12.957s total, 2.508s configuring, 10.184s building, 0.228s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[09:20:29] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:20:31] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:20:40] Starting KUnit Kernel (1/1)...
[09:20:40] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:20:40] =============== dma-buf-fence (12 subtests) ================
[09:20:40] [PASSED] test_sanitycheck
[09:20:40] [PASSED] test_signaling
[09:20:40] [PASSED] test_add_callback
[09:20:40] [PASSED] test_late_add_callback
[09:20:40] [PASSED] test_rm_callback
[09:20:40] [PASSED] test_late_rm_callback
[09:20:40] [PASSED] test_status
[09:20:40] [PASSED] test_error
[09:20:40] [PASSED] test_wait
[09:20:40] [PASSED] test_wait_timeout
[09:20:40] [PASSED] test_stub
[09:20:40] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[09:20:40] ================== [PASSED] dma-buf-fence ==================
[09:20:40] ============ dma-buf-fence-chain (11 subtests) =============
[09:20:40] [PASSED] test_sanitycheck
[09:20:40] [PASSED] test_find_seqno
[09:20:40] [PASSED] test_find_signaled
[09:20:40] [PASSED] test_find_out_of_order
[09:20:45] [PASSED] test_find_gap
[09:20:45] [PASSED] test_find_race
[09:20:45] [PASSED] test_signal_forward
[09:20:46] [PASSED] test_signal_backward
[09:20:46] [PASSED] test_wait_forward
[09:20:46] [PASSED] test_wait_backward
[09:20:46] [PASSED] test_wait_random
[09:20:46] =============== [PASSED] dma-buf-fence-chain ===============
[09:20:46] ============ dma-buf-fence-unwrap (11 subtests) ============
[09:20:46] [PASSED] test_sanitycheck
[09:20:46] [PASSED] test_unwrap_array
[09:20:46] [PASSED] test_unwrap_chain
[09:20:46] [PASSED] test_unwrap_chain_array
[09:20:46] [PASSED] test_unwrap_merge
[09:20:46] [PASSED] test_unwrap_merge_duplicate
[09:20:46] [PASSED] test_unwrap_merge_seqno
[09:20:46] [PASSED] test_unwrap_merge_order
[09:20:46] [PASSED] test_unwrap_merge_complex
[09:20:46] [PASSED] test_unwrap_merge_complex_seqno
[09:20:46] [PASSED] test_dedup_empty
[09:20:46] ============== [PASSED] dma-buf-fence-unwrap ===============
[09:20:46] ================ dma-buf-resv (5 subtests) =================
[09:20:46] [PASSED] test_sanitycheck
[09:20:46] ===================== test_signaling  ======================
[09:20:46] [PASSED] kernel
[09:20:46] [PASSED] write
[09:20:46] [PASSED] read
[09:20:46] [PASSED] bookkeep
[09:20:46] ================= [PASSED] test_signaling ==================
[09:20:46] ====================== test_for_each  ======================
[09:20:46] [PASSED] kernel
[09:20:46] [PASSED] write
[09:20:46] [PASSED] read
[09:20:46] [PASSED] bookkeep
[09:20:46] ================== [PASSED] test_for_each ==================
[09:20:46] ================= test_for_each_unlocked  ==================
[09:20:46] [PASSED] kernel
[09:20:46] [PASSED] write
[09:20:46] [PASSED] read
[09:20:46] [PASSED] bookkeep
[09:20:46] ============= [PASSED] test_for_each_unlocked ==============
[09:20:46] ===================== test_get_fences  =====================
[09:20:46] [PASSED] kernel
[09:20:46] [PASSED] write
[09:20:46] [PASSED] read
[09:20:46] [PASSED] bookkeep
[09:20:46] ================= [PASSED] test_get_fences =================
[09:20:46] ================== [PASSED] dma-buf-resv ===================
[09:20:46] ============================================================
[09:20:46] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[09:20:46] Elapsed time: 16.675s total, 2.543s configuring, 8.861s building, 5.265s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

Re: [PATCH v15 07/10] drm/xe/pm: Introduce xe_device_suspend/resume()

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [High] drm/xe: unsynchronized scheduler queues in xe_device_suspend()
  FLR path
--

commit c71f7f644880cbc637ea5422a742aa32f1fd9820
Author: Raag Jadav <raag.jadav@intel.com>

drm/xe/pm: Introduce xe_device_suspend/resume()

This commit factors out xe_device_suspend() and xe_device_resume() from
xe_pm_suspend() and xe_pm_resume(), adding an flr flag to handle PCIe FLR
preparation and re-initialization alongside system suspend and resume.

> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 273e2c45fea9b..6911c2ac39f82 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
[ ... ]
> @@ -1384,3 +1385,157 @@ void xe_device_exit(void)
>  		wait_var_event(&xe_device_count, !atomic_read(&xe_device_count));
>  	}
>  }
> +
> +/**
> + * xe_device_suspend() - Common helper for system suspend and FLR prepare
> + * @xe: xe device instance
> + * @hibernate: true if preparing for S4 hibernation, false for < S4 suspend
> + * @flr: indicate FLR prepare
> + *
> + * Return: 0 on success, negative error code otherwise.
> + */
> +int xe_device_suspend(struct xe_device *xe, bool hibernate, bool flr)
> +{
> +	struct xe_gt *gt;
> +	u8 id;
> +	int err;
> +
> +	err = xe_pxp_pm_suspend(xe->pxp);
> +	if (err)
> +		return err;
> +
> +	xe_late_bind_pm_suspend(&xe->late_bind);
> +
> +	for_each_gt(gt, xe, id)
> +		xe_gt_suspend_prepare(gt);
> +
> +	if (flr) {
> +		for_each_gt(gt, xe, id)
> +			xe_gt_flr_prepare(gt);

[Severity: High]
Can xe_gt_flr_prepare() -> xe_uc_flr_prepare() race with
sched->base.submit_wq when aborting in-flight GuC jobs during FLR, causing
either an infinite zero-delay work_tdr livelock on gt->ordered_wq or a
failed drm_sched_is_stopped() assertion in xe_sched_reinit() on resume?

xe_uc_flr_prepare() queues and flushes uc_flr_prepare() on gt->ordered_wq,
and immediately queues and flushes uc_flr_sanitize() on the same
gt->ordered_wq:

drivers/gpu/drm/xe/xe_uc.c:xe_uc_flr_prepare() {
    ...
	INIT_WORK_ONSTACK(&flr.work, uc_flr_prepare);
	queue_work(gt->ordered_wq, &flr.work);
	flush_work(&flr.work);
	destroy_work_on_stack(&flr.work);

	INIT_WORK_ONSTACK(&flr.work, uc_flr_sanitize);
	queue_work(gt->ordered_wq, &flr.work);
	flush_work(&flr.work);
	destroy_work_on_stack(&flr.work);
}

uc_flr_prepare() calls xe_guc_submit_pause_abort(), which starts scheduler
submission (queuing work_run_job and work_free_job on sched->base.submit_wq,
a separate workqueue from gt->ordered_wq) and kills each queue via
xe_sched_tdr_queue_imm(), setting sched->base.timeout = 0 and queuing
work_tdr with delay 0 on gt->ordered_wq:

gt->ordered_wq                    sched->base.submit_wq
--------------                    ---------------------
uc_flr_prepare()
  xe_guc_submit_pause_abort()
    xe_sched_submission_start()
    guc_exec_queue_kill()
      xe_sched_tdr_queue_imm()
        sched->base.timeout = 0
        queue work_tdr (delay 0)
drm_sched_job_timedout()
  guc_exec_queue_timedout_job()
    dma_fence_set_error(-ETIME)
    return DRM_GPU_SCHED_STAT_NO_HANG
  drm_sched_job_reinsert_on_false_timeout()
    list_add(&job->list, &pending_list)
    queue work_free_job --------->
  drm_sched_start_timeout_unlocked()
    queue work_tdr (delay 0)
uc_flr_sanitize()
  xe_guc_stop()
    drm_sched_wqueue_stop()
      sched->base.pause_submit = true
      cancel_work_sync(&work_free_job)
                                  (work_free_job cancelled before running)
drm_sched_job_timedout()
  guc_exec_queue_timedout_job()
    (fence already signaled, returns NO_HANG)
  drm_sched_job_reinsert_on_false_timeout()
    (drm_sched_is_stopped() is true, work_free_job not queued)
  drm_sched_start_timeout_unlocked()
    queue work_tdr (delay 0)      <-- infinite livelock on gt->ordered_wq

Conversely, if a job was still queued in entity->job_queue when
uc_flr_prepare() ran, work_run_job on sched->base.submit_wq can pop it into
pending_list and queue work_tdr on gt->ordered_wq behind uc_flr_sanitize().
After uc_flr_sanitize() stops the scheduler, work_tdr runs
guc_exec_queue_timedout_job(), which calls xe_sched_submission_start() and
leaves pause_submit false, tripping
xe_gt_assert(ge->q->gt, drm_sched_is_stopped(&sched->base)) in
xe_sched_reinit() during xe_device_resume(xe, true).

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261112091033.1813803-1-raag.jadav@intel.com?part=7

Re: [PATCH v15 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() and xe_cpu_bind_reinit()

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] drm/xe/migrate: race between xe_migrate_flr_prepare() and
  xe_migrate_ulls_enter()
--

commit 7621242dd72f22e276d3072cbfb172bd04d6eb8f
Author: Raag Jadav <raag.jadav@intel.com>

drm/xe/migrate: Introduce xe_migrate_reinit() and xe_cpu_bind_reinit()

This commit adds helpers to prepare and re-initialize the migration and
CPU bind contexts across a PCIe FLR.

> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 3c65b251b907e..fe71cb011d3a0 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -913,6 +913,13 @@ static int do_gt_restart(struct xe_gt *gt)
>  void xe_gt_flr_prepare(struct xe_gt *gt)
>  {
>  	xe_gt_sanitize(gt);
> +
> +	if (xe_gt_is_main_type(gt)) {
> +		struct xe_tile *tile = gt_to_tile(gt);
> +
> +		xe_migrate_flr_prepare(tile->migrate);
> +	}
> +
>  	xe_uc_flr_prepare(&gt->uc);
>  	xe_pagefault_reset(gt_to_xe(gt), gt);
>  	xe_tlb_inval_reset(&gt->tlb_inval);

[ ... ]

> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index 19c37eb315893..d8f5744b0eb7c 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -272,9 +272,8 @@ static void xe_migrate_ulls_toggle_enable(struct xe_migrate *m, bool enabled)
>  	m->ulls.enabled = enabled;
>  }
>  
> -static void xe_migrate_fini(void *arg)
> +static void xe_migrate_ulls_fini(struct xe_migrate *m)
>  {
> -	struct xe_migrate *m = arg;
>  	struct xe_device *xe = tile_to_xe(m->tile);
>  
>  	disable_delayed_work_sync(&m->ulls.exit_work);
> @@ -284,6 +283,13 @@ static void xe_migrate_fini(void *arg)
>  			xe_migrate_ulls_toggle_enable(m, false);
>  		}
>  	}
> +}

[ ... ]

> @@ -778,6 +784,35 @@ static void xe_migrate_ulls_exit(struct work_struct *work)
>  	drm_dev_exit(idx);
>  }
>  
> +/**
> + * xe_migrate_flr_prepare() - Prepare migrate context for FLR
> + * @m: The migration context
> + */
> +void xe_migrate_flr_prepare(struct xe_migrate *m)
> +{
> +	xe_migrate_ulls_fini(m);
> +}
> +
> +/**
> + * xe_migrate_reinit() - Re-initialize a migrate context
> + * @m: The migration context
> + *
> + * Returns: 0 on success, negative error code otherwise.
> + */
> +int xe_migrate_reinit(struct xe_migrate *m)
> +{
> +	int err;
> +
> +	xe_migrate_prepare_vm(m->tile, m, m->q->vm, NULL);
> +
> +	err = xe_exec_queue_reinit(m->q);
> +	if (err)
> +		return err;
> +
> +	enable_delayed_work(&m->ulls.exit_work);
> +	return 0;
> +}

[Severity: Medium]
Can an in-flight xe_migrate_ulls_enter() race with xe_migrate_flr_prepare()
and leak a runtime PM reference while leaving m->ulls.enabled stuck true?

xe_gt_flr_prepare() calls xe_migrate_flr_prepare() while pagefault workers
can still run, and xe_migrate_ulls_enter() drops m->job_mutex to allocate a
sched job before re-acquiring it:

CPU0                                  CPU1
xe_gt_flr_prepare()                   xe_pagefault_service()
  xe_migrate_flr_prepare()              ...
    xe_migrate_ulls_fini()                xe_migrate_ulls_enter()
      disable_delayed_work_sync(            job = xe_sched_job_create(...)
        &m->ulls.exit_work)
      mutex_lock(&m->job_mutex)
      m->ulls.enabled = false
      mutex_unlock(&m->job_mutex)
                                            mutex_lock(&m->job_mutex)
                                            xe_pm_runtime_get_noresume(xe)
                                            m->ulls.enabled = true
                                            mod_delayed_work(...,
                                              &m->ulls.exit_work, ...)
                                              <-- fails, work is disabled
                                            mutex_unlock(&m->job_mutex)
...
xe_gt_reinit()
  xe_migrate_reinit()
    xe_exec_queue_reinit(m->q)
    enable_delayed_work(&m->ulls.exit_work)

Because m->ulls.exit_work is disabled when xe_migrate_ulls_enter() calls
mod_delayed_work(), the exit worker is not queued.  When xe_migrate_reinit()
later calls enable_delayed_work(), it only decrements the disable depth
without scheduling the work or resetting m->ulls.enabled, so the runtime PM
reference taken in xe_migrate_ulls_enter() is leaked and m->ulls.enabled
remains true on the re-initialized queue.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261112091033.1813803-1-raag.jadav@intel.com?part=6

Re: [PATCH v15 03/10] drm/xe/gt: Introduce FLR helpers

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 3 potential
issues to consider:
- [High] drm/xe: scheduler teardown race and work_tdr livelock in
  xe_uc_flr_prepare()
- [Medium] drm/xe: race in xe_uc_flr_prepare() stopping queues before
  GuC CT
- [Medium] drm/xe/uc: race with gt_reset_worker in xe_uc_flr_prepare()
  underflows stopped
--

commit 6346e5e2a24f34768e5d1768ff0c83e0c2d64f19
Author: Raag Jadav <raag.jadav@intel.com>

drm/xe/gt: Introduce FLR helpers

This commit introduces helper functions across the GT, uC, GuC, HuC, and
GSC layers to prepare for and re-initialize after a PCIe Function Level
Reset (FLR).

> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index 300126e6624f6..c4fb34e64cd6d 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -1736,6 +1736,35 @@ void xe_guc_sanitize(struct xe_guc *guc)
>  	xe_guc_submit_disable(guc);
>  }
>  
> +/**
> + * xe_guc_flr_prepare() - Prepare GuC for FLR
> + * @guc: The GuC object
> + *
> + * Stop GuC submission and tear down exec queues.
> + */
> +void xe_guc_flr_prepare(struct xe_guc *guc)
> +{
> +	if (!xe_uc_fw_is_loadable(&guc->fw))
> +		return;
> +
> +	xe_guc_submit_stop(guc);
> +	xe_guc_submit_pause_abort(guc);
> +}

[Severity: Medium]
As reported by Tauro, Riana on v10 [1], can stopping and aborting exec
queues here before stopping GuC CT in uc_flr_sanitize() cause
guc_exec_queue_destroy_async() to run twice on the same queue?

All other submission teardown paths (xe_guc_stop(), guc_submit_fini(), and
xe_guc_submit_wedge()) call xe_guc_ct_stop() to stop CT and cancel
ct->g2h_worker before calling xe_guc_submit_stop(), and call
xe_uc_fw_sanitize() before xe_guc_submit_pause_abort(). Here, ct->g2h_worker
is still active during uc_flr_prepare():

kworker (gt->ordered_wq)          kworker (ct->g2h_worker)
uc_flr_prepare()                  dequeue_one_g2h()
  xe_guc_flr_prepare()              g2h_read()
    xe_guc_submit_stop()
      guc_exec_queue_stop(q)
        /* clears REGISTERED,
         * keeps DESTROYED */
        guc_exec_queue_destroy_async(q)
                                    process_g2h_msg()
                                      xe_guc_deregister_done_handler()
                                        handle_deregister_done()
                                          guc_exec_queue_destroy_async(q)
                                            <-- double destroy

Because guc_exec_queue_stop() clears EXEC_QUEUE_STATE_REGISTERED (along
with PENDING_DISABLE, PENDING_ENABLE, and ENABLED) while leaving
EXEC_QUEUE_STATE_DESTROYED set, a concurrent
xe_guc_deregister_done_handler() passes its state check and queues
guc_exec_queue_destroy_async() a second time, corrupting the work item or
underflowing the queue refcount.

[ ... ]

> diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
> index 89040d9fa05ff..2ba57c5c9979b 100644
> --- a/drivers/gpu/drm/xe/xe_uc.c
> +++ b/drivers/gpu/drm/xe/xe_uc.c

[ ... ]

> @@ -279,6 +281,79 @@ static void uc_reset_wait(struct xe_uc *uc)
>  		goto again;
>  }
>  
> +static void uc_flr_prepare(struct work_struct *w)
> +{
> +	struct xe_uc_flr *flr = container_of(w, struct xe_uc_flr, work);
> +	struct xe_uc *uc = flr->uc;
> +
> +	xe_gt_assert(uc_to_gt(uc), xe_wedged(uc_to_xe(uc)));
> +
> +	xe_guc_flr_prepare(&uc->guc);
> +}
> +
> +static void uc_flr_sanitize(struct work_struct *w)
> +{
> +	struct xe_uc_flr *flr = container_of(w, struct xe_uc_flr, work);
> +	struct xe_uc *uc = flr->uc;
> +
> +	/* TODO: Sanitize GSC firmware */
> +	xe_gt_assert(uc_to_gt(uc), IS_DGFX(uc_to_xe(uc)));
> +	xe_gt_assert(uc_to_gt(uc), !xe_uc_fw_is_loadable(&uc->gsc.fw));
> +
> +	xe_uc_stop(uc);
> +	xe_uc_sanitize(uc);
> +}
> +
> +/**
> + * xe_uc_flr_prepare() - Prepare uCs for FLR
> + * @uc: The uC object
> + *
> + * Tear down pending work and stop all uCs.
> + */
> +void xe_uc_flr_prepare(struct xe_uc *uc)
> +{
> +	struct xe_uc_flr flr = { .uc = uc };
> +	struct xe_gt *gt = uc_to_gt(uc);
> +
> +	xe_uc_reset_prepare(uc);
> +
> +	/*
> +	 * We'll be tearing down exec queues which signals the fences and frees the
> +	 * jobs but all of that happens asynchronously, so make sure we don't disrupt
> +	 * the scheduler while jobs are still in-flight.
> +	 */
> +	INIT_WORK_ONSTACK(&flr.work, uc_flr_prepare);
> +	queue_work(gt->ordered_wq, &flr.work);

[Severity: Medium]
Can an in-progress gt_reset_worker on gt->ordered_wq clear
guc->submission_state.stopped before uc_flr_prepare() runs?

CPU0                              kworker (gt->ordered_wq)
                                  gt_reset_worker()
                                    /* passes xe_wedged() check */
xe_gt_flr_prepare()
  xe_uc_flr_prepare()
    xe_uc_reset_prepare()
      /* stopped is already 1 */
    queue_work(..., &flr.work)
                                    do_gt_restart()
                                      xe_uc_start()
                                        xe_guc_submit_start()
                                          atomic_dec(&...->stopped) /* -> 0 */
                                  uc_flr_prepare()
                                    xe_guc_flr_prepare()
                                      xe_guc_submit_stop()
                                        xe_gt_assert(..., stopped == 1)

When gt_reset_worker finishes before uc_flr_prepare() starts on
gt->ordered_wq, xe_guc_submit_start() decrements stopped back to 0. That
trips the xe_guc_read_stopped(guc) == 1 assert in xe_guc_submit_stop(), and
when xe_uc_start() runs after FLR it decrements stopped from 0 to -1,
leaving GuC submission permanently stopped. Calling xe_uc_reset_prepare(uc)
again inside uc_flr_prepare() (as xe_guc_submit_wedge() does on
gt->ordered_wq) would ensure stopped remains set.

> +	flush_work(&flr.work);
> +	destroy_work_on_stack(&flr.work);
> +
> +	INIT_WORK_ONSTACK(&flr.work, uc_flr_sanitize);
> +	queue_work(gt->ordered_wq, &flr.work);
> +	flush_work(&flr.work);
> +	destroy_work_on_stack(&flr.work);
> +}

[Severity: High]
Can queuing uc_flr_sanitize() immediately after uc_flr_prepare() on
gt->ordered_wq livelock work_tdr or leave pending jobs stranded when
in-flight jobs are being torn down?

Inside uc_flr_prepare(), xe_guc_submit_pause_abort() starts each scheduler
and calls guc_exec_queue_kill() -> drm_sched_tdr_queue_imm(), which sets
sched->base.timeout = 0 and queues work_tdr on gt->ordered_wq. When
drm_sched_job_timedout() runs ahead of uc_flr_sanitize(),
guc_exec_queue_timedout_job() marks the job's fence with an error via
async irq_work and returns DRM_GPU_SCHED_STAT_NO_HANG:

drivers/gpu/drm/scheduler/sched_main.c:drm_sched_job_timedout() {
	...
		if (status == DRM_GPU_SCHED_STAT_NO_HANG)
			drm_sched_job_reinsert_on_false_timeout(sched, job);
	} else {
		spin_unlock(&sched->job_list_lock);
	}

	if (status != DRM_GPU_SCHED_STAT_ENODEV)
		drm_sched_start_timeout_unlocked(sched);
	...
}

drm_sched_job_reinsert_on_false_timeout() puts the job back on
pending_list and queues work_free_job on sched->base.submit_wq (a separate
per-scheduler workqueue, not gt->ordered_wq), and
drm_sched_start_timeout_unlocked() immediately re-queues work_tdr with
delay 0 on gt->ordered_wq behind uc_flr_sanitize():

kworker (gt->ordered_wq)          kworker (sched->submit_wq)
uc_flr_prepare()
  ...
    drm_sched_tdr_queue_imm()
drm_sched_job_timedout()
  /* queues irq_work to signal fence */
  /* reinserts job on pending_list */
  drm_sched_run_free_queue()
  drm_sched_start_timeout_unlocked()
    /* re-queues work_tdr (delay 0)
     * behind uc_flr_sanitize */
uc_flr_sanitize()
  xe_uc_stop()
    ...
      drm_sched_wqueue_stop()
        sched->pause_submit = true
        cancel_work_sync(&work_free_job)
                                  /* work_free_job cancelled before
                                   * freeing reinserted job */
drm_sched_job_timedout()
  /* fence is now signaled: returns
   * NO_HANG early, reinserts job;
   * run_free_queue() is a no-op
   * because pause_submit is true;
   * re-queues work_tdr (delay 0) */  <-- infinite 0-delay work_tdr loop

If the re-queued work_tdr instead runs before irq_work signals the fence
(or if work_run_job on submit_wq pops an entity job and queues work_tdr
behind uc_flr_sanitize()), guc_exec_queue_timedout_job() calls
xe_sched_submission_start(sched) after uc_flr_sanitize(), leaving
pause_submit false and tripping the drm_sched_is_stopped() assert in
xe_sched_reinit().

[1] https://lore.kernel.org/r/fcd99d4a-b7b4-4bfd-9e78-65ff1ea2d7d7@intel.com

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261112091033.1813803-1-raag.jadav@intel.com?part=3

✓ Xe.CI.BAT: success for Introduce Xe PCIe FLR (rev15)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 5564 bytes --]

== Series Details ==

Series: Introduce Xe PCIe FLR (rev15)
URL   : https://patchwork.freedesktop.org/series/162055/
State : success

== Summary ==

CI Bug Log - changes from xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82_BAT -> xe-pw-162055v15_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (14 -> 15)
------------------------------

  Additional (1): bat-nvls-1 

Known issues
------------

  Here are the changes found in xe-pw-162055v15_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-nvls-1:         NOTRUN -> [SKIP][1] ([Intel XE#8757])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-nvls-1:         NOTRUN -> [SKIP][2] ([Intel XE#8759])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@kms_dsc@dsc-basic.html

  * igt@xe_evict@evict-small-multi-vm:
    - bat-nvls-1:         NOTRUN -> [SKIP][3] ([Intel XE#8777]) +9 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_evict@evict-small-multi-vm.html

  * igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd:
    - bat-nvls-1:         NOTRUN -> [SKIP][4] ([Intel XE#8744]) +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html

  * igt@xe_exec_balancer@twice-virtual-userptr-invalidate:
    - bat-nvls-1:         NOTRUN -> [SKIP][5] ([Intel XE#8741]) +17 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_exec_balancer@twice-virtual-userptr-invalidate.html

  * igt@xe_exec_multi_queue@many-queues-userptr-invalidate:
    - bat-nvls-1:         NOTRUN -> [SKIP][6] ([Intel XE#8377]) +13 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_exec_multi_queue@many-queues-userptr-invalidate.html

  * igt@xe_huc_copy@huc_copy:
    - bat-nvls-1:         NOTRUN -> [SKIP][7] ([Intel XE#8746])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_huc_copy@huc_copy.html

  * igt@xe_live_ktest@xe_bo:
    - bat-nvls-1:         NOTRUN -> [SKIP][8] ([Intel XE#8792])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_live_ktest@xe_bo.html

  * igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit:
    - bat-nvls-1:         NOTRUN -> [SKIP][9] ([Intel XE#8791] / [Intel XE#8792])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html

  * igt@xe_live_ktest@xe_migrate@xe_migrate_access_memory_kunit:
    - bat-nvls-1:         NOTRUN -> [SKIP][10] ([Intel XE#9657])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_live_ktest@xe_migrate@xe_migrate_access_memory_kunit.html

  * igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
    - bat-nvls-1:         NOTRUN -> [SKIP][11] ([Intel XE#8791])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html

  * igt@xe_mmap@vram:
    - bat-nvls-1:         NOTRUN -> [SKIP][12] ([Intel XE#8747])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_mmap@vram.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-nvls-1:         NOTRUN -> [SKIP][13] ([Intel XE#8748])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelp:
    - bat-nvls-1:         NOTRUN -> [SKIP][14] ([Intel XE#8743])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pat@pat-index-xelpg:
    - bat-nvls-1:         NOTRUN -> [SKIP][15] ([Intel XE#8745])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/bat-nvls-1/igt@xe_pat@pat-index-xelpg.html

  
  [Intel XE#8377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8377
  [Intel XE#8741]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8741
  [Intel XE#8743]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8743
  [Intel XE#8744]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8744
  [Intel XE#8745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8745
  [Intel XE#8746]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8746
  [Intel XE#8747]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8747
  [Intel XE#8748]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8748
  [Intel XE#8757]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8757
  [Intel XE#8759]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8759
  [Intel XE#8777]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8777
  [Intel XE#8791]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8791
  [Intel XE#8792]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8792
  [Intel XE#9657]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9657


Build changes
-------------

  * Linux: xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82 -> xe-pw-162055v15

  IGT_9187: 9187
  xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82: 21bbb4e37d134297f83b5897188c2097defbbc82
  xe-pw-162055v15: 162055v15

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/index.html

[-- Attachment #2: Type: text/html, Size: 6607 bytes --]

Re: [PATCH v15 09/10] drm/xe/pci: Introduce PCIe Function Level Reset

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 6 potential
issues to consider:
- [High] drm/xe/pci: lockless pm_runtime_active() checks in FLR
  callbacks
- [High] drm/xe/pci: broken FLR error handling in xe_pci_reset_done()
- [High] drm/xe: work_tdr infinite loop in xe_uc_flr_prepare() when
  stopping sched
- [Medium] drm/xe/pci: race with xe_wedge_declare() in
  xe_pci_reset_prepare()
- [Medium] drm/xe/pci: unquiesced GTs and post-FLR GuC MMIO timeout in
  xe_pci_reset_prepare()
- [Medium] drm/xe/pci: guc->submission_state.stopped underflow when FLR
  races GT reset
--

commit a6f0e695404c15ff1ce9915094f13ff73d859fb4
Author: Raag Jadav <raag.jadav@intel.com>

drm/xe/pci: Introduce PCIe Function Level Reset

This commit wires up the .reset_prepare and .reset_done PCI error handlers
to support PCIe Function Level Reset (FLR) on discrete GPUs by suspending
execution, resetting hardware state, and re-initializing kernel BOs and
queues across the reset.

> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index be58fc9e22dc7..d6469171b7f36 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
[ ... ]
> +static inline bool xe_pci_reset_skip(struct xe_device *xe)
> +{
> +	return !IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe_sriov_pf_num_vfs(xe) || xe->info.probe_display;
> +}
> +
> +static void xe_pci_reset_prepare(struct pci_dev *pdev)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +	int err;
> +
> +	err = xe_survivability_mode_is_boot_enabled(xe);
> +	if (err) {
> +		xe_err(xe, "PCI reset: device in survivability mode\n");
> +		return;
> +	}
> +
> +	/* No guarantees by PCI core */
> +	err = !pm_runtime_active(&pdev->dev);
> +	if (err) {
> +		xe_err(xe, "PCI reset: unexpected power state\n");
> +		return;
> +	}

[Severity: High]
Can checking pm_runtime_active() locklessly in xe_pci_reset_prepare() and
xe_pci_reset_done() unbalance xe_wedge_get() and xe_wedge_put()?

pci_reset_function() holds only device_lock(&pdev->dev), which does not
serialize runtime PM transitions, and .reset_prepare cannot abort the
reset.

CPU0 (pci_reset_function)         CPU1 (ioctl / work)
xe_pci_reset_prepare()
  !pm_runtime_active() -> true
  return; (no xe_wedge_get)
                                  xe_pm_runtime_get()
                                    pm_runtime_resume()
                                      runtime_status = RPM_ACTIVE
xe_pci_reset_done()
  !pm_runtime_active() -> false
  !xe->flr_prepared -> goto out
  xe_wedge_declare()
  xe_wedge_put()  <-- unbalanced put

Because xe_pci_reset_prepare() returned before xe_wedge_get(),
xe_pci_reset_done() drops the permanent reference just taken by
xe_wedge_declare() (leaving xe_wedged(xe) false with xe->wedged.perm == 1,
or underflowing xe->wedged.ref if wedged.mode == XE_WEDGED_MODE_NEVER).

In the reverse direction, if the device is in its autosuspend idle window
(RPM_ACTIVE with usage_count == 0), xe_wedge_get() ->
xe_pm_runtime_get_noresume() triggers the drm_WARN() for missing outer
runtime PM protection, and if runtime suspend completes before
xe_pci_reset_done(), xe_pci_reset_done() returns early on
!pm_runtime_active() and leaks the wedge and runtime PM references.
Finally, if the device stays runtime-suspended across the whole reset,
both callbacks return early without wedging or re-initializing the device
even though the PCI reset still wipes VRAM and hardware state.

> +	err = xe_wedged(xe);
> +	if (err)
> +		xe_err(xe, "PCI reset: device in unexpected state\n");
> +
> +	/* Wedge the device to prevent userspace access but don't send the event yet */
> +	xe_wedge_get(xe);
> +	if (err)
> +		return;

[Severity: Medium]
What happens if xe_wedge_declare() runs concurrently with
xe_pci_reset_prepare()?

CPU0 (PCI reset)                  CPU1 (GT reset / IRQ / RAS)
xe_pci_reset_prepare()
  xe_wedged(xe) -> false
                                  xe_wedge_declare(xe, ...)
                                    xe->wedged.perm = 1
                                    xe_gt_wedge_declare(gt)
  xe_wedge_get(xe)
  xe_device_suspend(xe, false, true)
  xe->flr_prepared = true
xe_pci_reset_done()
  xe_device_resume(xe, true)
    ...
      guc_exec_queue_reinit_kernel(q)
        atomic_set(&q->guc->state, 0)  <-- clears WEDGED state

An already-running gt_reset_worker() or guc_exec_queue_timedout_job() (or
an IRQ/RAS handler) can call xe_wedge_declare() after the xe_wedged(xe)
check.  Because xe_wedged_permanent(xe) is not re-checked before setting
xe->flr_prepared or running xe_device_resume(xe, true), resume proceeds on
a permanently wedged device: in XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET,
guc_exec_queue_reinit_kernel() zeroes q->guc->state and leaks the queue
reference taken by xe_guc_submit_wedge(), and GuC CT communication later
fails mid-resume with -ENOTRECOVERABLE because xe_wedged_permanent(xe) is
set.

> +	err = xe_pci_reset_skip(xe);
> +	if (err) {
> +		xe_err(xe, "PCI reset: not supported\n");
> +		return;
> +	}

[Severity: Medium]
When xe_pci_reset_skip(xe) is true (or xe_device_suspend() fails at
xe_pxp_pm_suspend()), does returning here leave the GTs running across the
physical PCI reset and cause GuC MMIO timeouts in xe_pci_reset_done()?

Unlike prepare_device_for_reset(), this path only calls xe_wedge_get(xe),
which blocks new ioctls but does not stop DRM schedulers, TDR handlers, or
GT workers while pci_dev_save_and_disable() clears PCI_COMMAND and resets
the hardware.  After the reset wipes the GuC, xe_pci_reset_done() jumps to
out: and calls xe_wedge_declare(), scheduling gt_wedge_worker ->
xe_guc_submit_wedge() -> xe_guc_softreset().  Because xe_uc_fw_sanitize()
was never run before the reset, guc->fw.__status is still
XE_UC_FIRMWARE_RUNNING, so xe_guc_softreset() sends an MMIO HXG request to
the wiped GuC and times out on every GT.

> +	/*
> +	 * The hardware could be in corrupted state and access unreliable, but we try to
> +	 * update data structures and cleanup any pending work to avoid side effects during
> +	 * PCIe FLR. This will be similar to system suspend flow but without eviction.
> +	 */
> +	err = xe_device_suspend(xe, false, true);
> +	if (err) {
> +		xe_err(xe, "PCI reset: failed to prepare\n");
> +		return;
> +	}
> +
> +	xe->flr_prepared = true;
> +	xe_info(xe, "PCI reset: prepared\n");
> +}

[Severity: High]
Can xe_device_suspend(xe, false, true) -> xe_uc_flr_prepare() cause
sched->base.work_tdr to spin in an infinite 0-delay loop on
gt->ordered_wq when an exec queue has an in-flight job?

In xe_uc_flr_prepare() (added in commit "drm/xe/gt: Introduce FLR
helpers"), uc_flr_prepare kills each queue via
xe_guc_exec_queue_trigger_cleanup(), which sets sched->base.timeout = 0
and queues work_tdr on gt->ordered_wq.  xe_uc_flr_prepare() then queues
uc_flr_sanitize right behind work_tdr on gt->ordered_wq:

gt->ordered_wq
  drm_sched_job_timedout() (work_tdr)
    guc_exec_queue_timedout_job()
      xe_sched_job_set_error() (signals job->fence)
      return DRM_GPU_SCHED_STAT_NO_HANG
    drm_sched_job_reinsert_on_false_timeout()
      queues work_free_job on sched->base.submit_wq
    drm_sched_start_timeout_unlocked()
      re-queues work_tdr (delay 0) on gt->ordered_wq
  uc_flr_sanitize()
    ...
      drm_sched_wqueue_stop()
        sched->base.pause_submit = true
        cancel_work_sync(&sched->base.work_free_job)
  drm_sched_job_timedout() (work_tdr)
    guc_exec_queue_timedout_job()
      sees DMA_FENCE_FLAG_SIGNALED_BIT -> returns NO_HANG
    drm_sched_job_reinsert_on_false_timeout()
      drm_sched_run_free_queue() (no-op: pause_submit is true)
    drm_sched_start_timeout_unlocked()
      re-queues work_tdr (delay 0)  <-- spins forever

Because uc_flr_sanitize runs on gt->ordered_wq before the separate
sched->base.submit_wq worker runs work_free_job, drm_sched_wqueue_stop()
cancels work_free_job with the signaled job still on pending_list, and
work_tdr re-queues itself with a 0 timeout forever.

> +
> +static void xe_pci_reset_done(struct pci_dev *pdev)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +	int err;
> +
> +	err = xe_survivability_mode_is_boot_enabled(xe) || !pm_runtime_active(&pdev->dev);
> +	if (err)
> +		return;
> +
> +	if (!xe->flr_prepared)
> +		goto out;
> +
> +	/* Unprepare early in case we fail */
> +	xe->flr_prepared = false;
> +
> +	/*
> +	 * We already have the data structures intact, so try to re-initialize the device.
> +	 * This will be similar to system resume flow, except we'll also need to recreate
> +	 * kernel bos and restore kernel queues.
> +	 */
> +	err = xe_device_resume(xe, true);

[Severity: Medium]
Can guc->submission_state.stopped underflow to -1 if xe_pci_reset_prepare()
races with an already-running gt_reset_worker()?

CPU0 (PCI reset)                  CPU1 (gt->ordered_wq)
                                  gt_reset_worker()
                                    (passes xe_wedged() check)
                                    stopped is 1
xe_pci_reset_prepare()
  xe_wedge_get(xe)
  xe_device_suspend(xe, false, true)
    xe_uc_flr_prepare()
      xe_uc_reset_prepare()
        stopped = 1
      queue_work(flr.work)
                                    do_gt_restart()
                                      xe_guc_submit_start()
                                        atomic_dec(&stopped) -> 0
                                  uc_flr_sanitize()
                                    xe_guc_submit_stop()
                                      assert(stopped == 1)
xe_pci_reset_done()
  xe_device_resume(xe, true)
    xe_guc_submit_start()
      atomic_dec(&stopped)  <-- underflows 0 to -1

Once guc->submission_state.stopped is -1, xe_guc_read_stopped(guc) remains
permanently non-zero after FLR, so guc_exec_queue_init() immediately stops
the scheduler on every newly created queue and xe_gt_reset_async() rejects
future GT resets.

> +	if (err) {
> +		xe_err(xe, "PCI reset: re-initialization failed\n");
> +		goto out;
> +	}
> +
> +	/* Unwedge to allow userspace access */
> +	xe_wedge_put(xe);
> +	xe_info(xe, "PCI reset: done\n");
> +
> +	return;
> +out:
> +	/* Most likely the device is unusable and there's nothing we can do about it */
> +	xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_REBIND | DRM_WEDGE_RECOVERY_BUS_RESET);
> +	/* Drop local reference */
> +	xe_wedge_put(xe);
> +}

[Severity: High]
Does the error path at out: leave the device unwedged or its GuC
schedulers permanently stopped when xe->wedged.mode is not default?

When xe->wedged.mode == XE_WEDGED_MODE_NEVER, xe_wedge_declare() returns
early without calling xe_wedge_get(xe) or xe_gt_wedge_declare(gt), so the
following xe_wedge_put(xe) drops the temporary reference from
xe_pci_reset_prepare() back to 0 and unblocks userspace ioctls on a device
whose VRAM and hardware state were just wiped by the reset.  In addition,
if xe_device_resume(xe, true) fails before xe_uc_start() restarts the
schedulers stopped by uc_flr_sanitize(), neither XE_WEDGED_MODE_NEVER nor
XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET calls xe_guc_submit_pause_abort() in
xe_guc_submit_wedge(), leaving kernel and user queue schedulers stopped so
STATIC_MSG_CLEANUP never runs and driver unbind hangs.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261112091033.1813803-1-raag.jadav@intel.com?part=9

✓ Xe.CI.FULL: success for Introduce Xe PCIe FLR (rev15)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 54713 bytes --]

== Series Details ==

Series: Introduce Xe PCIe FLR (rev15)
URL   : https://patchwork.freedesktop.org/series/162055/
State : success

== Summary ==

CI Bug Log - changes from xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82_FULL -> xe-pw-162055v15_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (3 -> 3)
------------------------------

  No changes in participating hosts

New tests
---------

  New tests have been introduced between xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82_FULL and xe-pw-162055v15_FULL:

### New IGT tests (31) ###

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - Statuses : 1 pass(s) 2 skip(s)
    - Exec time: [0.07, 58.28] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-dp-2:
    - Statuses : 1 pass(s)
    - Exec time: [7.50] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [7.10] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-b-dp-2:
    - Statuses : 1 pass(s)
    - Exec time: [7.09] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-b-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [7.19] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-dp-2:
    - Statuses : 1 pass(s)
    - Exec time: [7.21] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [7.03] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-dp-2:
    - Statuses : 1 pass(s)
    - Exec time: [7.98] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [7.16] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - Statuses : 3 skip(s)
    - Exec time: [0.02, 0.04] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
    - Statuses : 3 skip(s)
    - Exec time: [0.02] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
    - Statuses : 3 skip(s)
    - Exec time: [0.01, 0.03] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
    - Statuses : 1 pass(s) 1 skip(s)
    - Exec time: [0.30, 31.85] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
    - Statuses : 1 skip(s)
    - Exec time: [0.01] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-hdmi-a-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.03] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-dp-2:
    - Statuses : 1 skip(s)
    - Exec time: [0.04] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-hdmi-a-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.03] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-c-dp-2:
    - Statuses : 1 skip(s)
    - Exec time: [0.04] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-c-hdmi-a-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.03] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-dp-2:
    - Statuses : 1 skip(s)
    - Exec time: [0.04] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.03] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs:
    - Statuses : 3 skip(s)
    - Exec time: [0.01, 0.03] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
    - Statuses : 1 skip(s)
    - Exec time: [0.01] s

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc:
    - Statuses : 3 skip(s)
    - Exec time: [0.01, 0.03] s

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
    - Statuses : 3 skip(s)
    - Exec time: [0.01, 0.04] s

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs:
    - Statuses : 3 skip(s)
    - Exec time: [0.02, 0.03] s

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs:
    - Statuses : 3 skip(s)
    - Exec time: [0.01, 0.04] s

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
    - Statuses : 3 skip(s)
    - Exec time: [0.02] s

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
    - Statuses : 3 skip(s)
    - Exec time: [0.02, 0.04] s

  * igt@xe_waitfence@invalid-flag:
    - Statuses : 1 pass(s)
    - Exec time: [0.01] s

  * igt@xe_waitfence@invalid-ops:
    - Statuses : 3 pass(s)
    - Exec time: [0.03, 0.05] s

  

Known issues
------------

  Here are the changes found in xe-pw-162055v15_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-bmg:          NOTRUN -> [SKIP][1] ([Intel XE#2233])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
    - shard-ptl:          NOTRUN -> [SKIP][2] ([Intel XE#3157])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-5/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-270:
    - shard-ptl:          NOTRUN -> [SKIP][3] ([Intel XE#5901]) +2 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-ptl:          NOTRUN -> [SKIP][4] ([Intel XE#6925])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#2327])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-ptl:          NOTRUN -> [SKIP][6] ([Intel XE#7085])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-0:
    - shard-lnl:          [PASS][7] -> [ABORT][8] ([Intel XE#4760])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-lnl-7/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-2/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#1124]) +2 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2328] / [Intel XE#7367])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_big_fb@y-tiled-addfb.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-ptl:          NOTRUN -> [SKIP][11] ([Intel XE#5808]) +10 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-ptl:          NOTRUN -> [SKIP][12] ([Intel XE#5855])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-5/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p:
    - shard-ptl:          NOTRUN -> [SKIP][13] ([Intel XE#7679]) +2 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-target-2560x1440p:
    - shard-ptl:          NOTRUN -> [SKIP][14] ([Intel XE#367]) +1 other test skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_bw@linear-tiling-4-displays-target-2560x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-target-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#367])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_bw@linear-tiling-4-displays-target-3840x2160p.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-d-dp-1:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2652]) +3 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-7/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-d-dp-1.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs (NEW):
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#3432])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2887]) +5 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc:
    - shard-ptl:          NOTRUN -> [SKIP][19] ([Intel XE#5822]) +11 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_cdclk@mode-rejected-max-dotclock:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#9311])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_cdclk@mode-rejected-max-dotclock.html

  * igt@kms_chamelium_color@ctm-negative:
    - shard-ptl:          NOTRUN -> [SKIP][21] ([Intel XE#5824])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_chamelium_color@ctm-negative.html

  * igt@kms_chamelium_color@ctm-red-to-blue:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2325] / [Intel XE#7358])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_chamelium_color@ctm-red-to-blue.html

  * igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#7358]) +1 other test skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601.html
    - shard-ptl:          NOTRUN -> [SKIP][24] ([Intel XE#8391]) +1 other test skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601.html

  * igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
    - shard-ptl:          NOTRUN -> [SKIP][25] ([Intel XE#2252]) +4 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2252]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html

  * igt@kms_chamelium_hpd@dp-hpd-after-runtime-suspend-d3hot:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#9671])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_chamelium_hpd@dp-hpd-after-runtime-suspend-d3hot.html
    - shard-ptl:          NOTRUN -> [SKIP][28] ([Intel XE#9671])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_chamelium_hpd@dp-hpd-after-runtime-suspend-d3hot.html

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-3:
    - shard-ptl:          NOTRUN -> [SKIP][29] ([Intel XE#6969]) +7 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-3.html

  * igt@kms_content_protection@dp-mst-type-0-suspend-resume:
    - shard-ptl:          NOTRUN -> [SKIP][30] ([Intel XE#6974])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-ptl:          NOTRUN -> [SKIP][31] ([Intel XE#5832] / [Intel XE#6974])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@legacy@pipe-a-dp-1:
    - shard-bmg:          NOTRUN -> [FAIL][32] ([Intel XE#3304]) +1 other test fail
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-7/igt@kms_content_protection@legacy@pipe-a-dp-1.html

  * igt@kms_content_protection@lic-type-0:
    - shard-ptl:          NOTRUN -> [SKIP][33] ([Intel XE#7642])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][34] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html

  * igt@kms_content_protection@mei-interface:
    - shard-ptl:          NOTRUN -> [SKIP][35] ([Intel XE#5845])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-5/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@uevent-hdcp14@pipe-a-dp-1:
    - shard-bmg:          NOTRUN -> [FAIL][36] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-7/igt@kms_content_protection@uevent-hdcp14@pipe-a-dp-1.html

  * igt@kms_cursor_crc@cursor-offscreen-128x42:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#2320]) +2 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_cursor_crc@cursor-offscreen-128x42.html

  * igt@kms_cursor_crc@cursor-offscreen-256x85:
    - shard-ptl:          NOTRUN -> [SKIP][38] ([Intel XE#5900]) +2 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_cursor_crc@cursor-offscreen-256x85.html

  * igt@kms_cursor_crc@cursor-sliding-512x170:
    - shard-ptl:          NOTRUN -> [SKIP][39] ([Intel XE#5846]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_cursor_crc@cursor-sliding-512x170.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
    - shard-ptl:          NOTRUN -> [SKIP][40] ([Intel XE#5962]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-ptl:          NOTRUN -> [SKIP][41] ([Intel XE#5962] / [Intel XE#7343]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_dp_link_training@uhbr-sst-direct-train:
    - shard-ptl:          NOTRUN -> [SKIP][42] ([Intel XE#9529])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_dp_link_training@uhbr-sst-direct-train.html
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#9529])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_dp_link_training@uhbr-sst-direct-train.html

  * igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#9009])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback.html
    - shard-ptl:          NOTRUN -> [SKIP][45] ([Intel XE#9009])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback.html

  * igt@kms_dsc@dsc-with-bpc:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#8265])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-6/igt@kms_dsc@dsc-with-bpc.html

  * igt@kms_dsc@dsc-with-formats-bigjoiner:
    - shard-ptl:          NOTRUN -> [SKIP][47] ([Intel XE#5907]) +2 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_dsc@dsc-with-formats-bigjoiner.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#8680])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@chamelium:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#2372] / [Intel XE#7359])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-ptl:          NOTRUN -> [SKIP][50] ([Intel XE#2375])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@psr2:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#2374] / [Intel XE#6128])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@2x-flip-vs-absolute-wf_vblank:
    - shard-ptl:          NOTRUN -> [SKIP][52] ([Intel XE#2316]) +3 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-lnl:          [PASS][53] -> [FAIL][54] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode:
    - shard-ptl:          NOTRUN -> [SKIP][55] ([Intel XE#5828]) +3 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-upscaling:
    - shard-ptl:          NOTRUN -> [SKIP][56] ([Intel XE#7178]) +3 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#7178] / [Intel XE#7351])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x:
    - shard-ptl:          NOTRUN -> [SKIP][58] ([Intel XE#7179])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#656] / [Intel XE#7905])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@drrs-shrfb-scaledprimary:
    - shard-ptl:          NOTRUN -> [SKIP][60] ([Intel XE#5800] / [Intel XE#6312]) +9 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_frontbuffer_tracking@drrs-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@drrshdr-rgb565-draw-render:
    - shard-ptl:          NOTRUN -> [SKIP][61] ([Intel XE#6312]) +12 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_frontbuffer_tracking@drrshdr-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt:
    - shard-ptl:          NOTRUN -> [SKIP][62] ([Intel XE#5812]) +72 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-linear:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#4141]) +4 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-tiling-linear.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#2352] / [Intel XE#7399])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-rgb101010-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#2311]) +17 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcdrrshdr-rgb101010-draw-render.html

  * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-indfb-plflip-blt:
    - shard-ptl:          NOTRUN -> [SKIP][66] ([Intel XE#7865]) +17 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbchdr-tiling-y:
    - shard-ptl:          NOTRUN -> [SKIP][67] ([Intel XE#7399])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_frontbuffer_tracking@fbchdr-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][68] ([Intel XE#7061]) +3 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#7061]) +3 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-argb161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-argb161616f-draw-mmap-wc:
    - shard-ptl:          NOTRUN -> [SKIP][71] ([Intel XE#7061] / [Intel XE#7356]) +2 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-shrfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#2313]) +17 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-ptl:          NOTRUN -> [SKIP][73] ([Intel XE#6901])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_pipe_stress@stress-xrgb8888-xtiled:
    - shard-ptl:          NOTRUN -> [SKIP][74] ([Intel XE#6912])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_pipe_stress@stress-xrgb8888-xtiled.html

  * igt@kms_plane@pixel-format-x-tiled-modifier:
    - shard-ptl:          NOTRUN -> [SKIP][75] ([Intel XE#7283]) +2 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_plane@pixel-format-x-tiled-modifier.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#7283]) +1 other test skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-9/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier.html

  * igt@kms_plane_lowres@tiling-yf:
    - shard-ptl:          NOTRUN -> [SKIP][77] ([Intel XE#5946])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_plane_lowres@tiling-yf.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-ptl:          NOTRUN -> [SKIP][78] ([Intel XE#4596] / [Intel XE#5854])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5:
    - shard-ptl:          NOTRUN -> [SKIP][79] ([Intel XE#6886]) +9 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_plane_scaling@planes-downscale-factor-0-5.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][80] ([Intel XE#2499])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-ptl:          NOTRUN -> [SKIP][81] ([Intel XE#5810])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf:
    - shard-ptl:          NOTRUN -> [SKIP][82] ([Intel XE#7304]) +1 other test skip
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf:
    - shard-ptl:          NOTRUN -> [SKIP][83] ([Intel XE#5858] / [Intel XE#7304]) +1 other test skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-a-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][84] ([Intel XE#5858])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@pr-cursor-plane-update-sf:
    - shard-bmg:          NOTRUN -> [SKIP][85] ([Intel XE#1489])
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-ptl:          NOTRUN -> [SKIP][86] ([Intel XE#7413])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@fbc-psr2-primary-blt@edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][87] ([Intel XE#1406] / [Intel XE#5835]) +3 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_psr@fbc-psr2-primary-blt@edp-1.html

  * igt@kms_psr@pr-cursor-plane-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#2234] / [Intel XE#2850]) +5 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@kms_psr@pr-cursor-plane-onoff.html

  * igt@kms_psr@pr-primary-page-flip:
    - shard-ptl:          NOTRUN -> [SKIP][89] ([Intel XE#1406]) +1 other test skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_psr@pr-primary-page-flip.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-lnl:          NOTRUN -> [SKIP][90] ([Intel XE#3904] / [Intel XE#7342])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-6/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-ptl:          NOTRUN -> [SKIP][91] ([Intel XE#5821]) +1 other test skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  * igt@kms_setmode@invalid-clone-exclusive-crtc:
    - shard-ptl:          NOTRUN -> [SKIP][92] ([Intel XE#5910])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_setmode@invalid-clone-exclusive-crtc.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-ptl:          NOTRUN -> [SKIP][93] ([Intel XE#5857])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@kms_tv_load_detect@load-detect.html

  * igt@xe_evict@evict-beng-cm-threads-large-multi-vm:
    - shard-ptl:          NOTRUN -> [SKIP][94] ([Intel XE#5764]) +8 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@xe_evict@evict-beng-cm-threads-large-multi-vm.html

  * igt@xe_evict@evict-small-external-multi-queue-cm:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#8370])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@xe_evict@evict-small-external-multi-queue-cm.html

  * igt@xe_evict@evict-small-multi-queue:
    - shard-lnl:          NOTRUN -> [SKIP][96] ([Intel XE#6540] / [Intel XE#688])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-6/igt@xe_evict@evict-small-multi-queue.html

  * igt@xe_exec_balancer@many-cm-virtual-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][97] ([Intel XE#7482])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-6/igt@xe_exec_balancer@many-cm-virtual-userptr-invalidate-race.html

  * igt@xe_exec_balancer@once-cm-parallel-rebind:
    - shard-ptl:          NOTRUN -> [SKIP][98] ([Intel XE#7482]) +18 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@xe_exec_balancer@once-cm-parallel-rebind.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind:
    - shard-ptl:          NOTRUN -> [SKIP][99] ([Intel XE#5575] / [Intel XE#7484]) +2 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-once-null-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][100] ([Intel XE#2322] / [Intel XE#7372]) +3 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@xe_exec_basic@multigpu-once-null-rebind.html

  * igt@xe_exec_fault_mode@many-multi-queue-imm:
    - shard-bmg:          NOTRUN -> [SKIP][101] ([Intel XE#8374]) +3 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@xe_exec_fault_mode@many-multi-queue-imm.html

  * igt@xe_exec_fault_mode@once-multi-queue-userptr-rebind:
    - shard-ptl:          NOTRUN -> [SKIP][102] ([Intel XE#8374]) +11 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@xe_exec_fault_mode@once-multi-queue-userptr-rebind.html

  * igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-close-fd-smem:
    - shard-ptl:          NOTRUN -> [SKIP][103] ([Intel XE#8364]) +22 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-close-fd-smem.html

  * igt@xe_exec_multi_queue@max-queues-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][104] ([Intel XE#8364]) +8 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@xe_exec_multi_queue@max-queues-userptr-invalidate.html

  * igt@xe_exec_reset@multi-queue-cancel:
    - shard-ptl:          NOTRUN -> [SKIP][105] ([Intel XE#8369]) +2 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@xe_exec_reset@multi-queue-cancel.html

  * igt@xe_exec_reset@multi-queue-long-spin-many-queue-switch:
    - shard-bmg:          NOTRUN -> [SKIP][106] ([Intel XE#8369])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@xe_exec_reset@multi-queue-long-spin-many-queue-switch.html

  * igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][107] ([Intel XE#8378]) +2 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr.html

  * igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr:
    - shard-ptl:          NOTRUN -> [SKIP][108] ([Intel XE#8378]) +6 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr.html

  * igt@xe_multigpu_svm@mgpu-pagefault-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][109] ([Intel XE#6964])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-6/igt@xe_multigpu_svm@mgpu-pagefault-prefetch.html

  * igt@xe_multigpu_svm@mgpu-xgpu-access-prefetch:
    - shard-ptl:          NOTRUN -> [SKIP][110] ([Intel XE#6964]) +3 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@xe_multigpu_svm@mgpu-xgpu-access-prefetch.html
    - shard-bmg:          NOTRUN -> [SKIP][111] ([Intel XE#6964])
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@xe_multigpu_svm@mgpu-xgpu-access-prefetch.html

  * igt@xe_page_reclaim@pde-vs-pd:
    - shard-ptl:          NOTRUN -> [SKIP][112] ([Intel XE#7793]) +1 other test skip
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@xe_page_reclaim@pde-vs-pd.html

  * igt@xe_pm@s3-d3cold-basic-exec:
    - shard-ptl:          NOTRUN -> [SKIP][113] ([Intel XE#5741]) +1 other test skip
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@xe_pm@s3-d3cold-basic-exec.html

  * igt@xe_pm@s4-vm-bind-prefetch:
    - shard-ptl:          [PASS][114] -> [DMESG-WARN][115] ([Intel XE#7727])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-ptl-6/igt@xe_pm@s4-vm-bind-prefetch.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@xe_pm@s4-vm-bind-prefetch.html

  * igt@xe_pm@s4-vm-bind-userptr:
    - shard-lnl:          [PASS][116] -> [DMESG-WARN][117] ([Intel XE#7727])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-lnl-8/igt@xe_pm@s4-vm-bind-userptr.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-2/igt@xe_pm@s4-vm-bind-userptr.html

  * igt@xe_pm_residency@gt-c6-freeze@gt1:
    - shard-bmg:          [PASS][118] -> [FAIL][119] ([Intel XE#9254])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-bmg-9/igt@xe_pm_residency@gt-c6-freeze@gt1.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-9/igt@xe_pm_residency@gt-c6-freeze@gt1.html

  * igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_enhance0:
    - shard-lnl:          [PASS][120] -> [FAIL][121] ([Intel XE#9461])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-lnl-7/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_enhance0.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_enhance0.html

  * igt@xe_prefetch_fault@l2-prefetch-fault:
    - shard-bmg:          NOTRUN -> [SKIP][122] ([Intel XE#8815])
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@xe_prefetch_fault@l2-prefetch-fault.html

  * igt@xe_prefetch_fault@prefetch-fault:
    - shard-ptl:          NOTRUN -> [SKIP][123] ([Intel XE#7599])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@xe_prefetch_fault@prefetch-fault.html

  * igt@xe_pxp@pxp-stale-queue-post-termination-irq:
    - shard-bmg:          NOTRUN -> [SKIP][124] ([Intel XE#4733] / [Intel XE#7417])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@xe_pxp@pxp-stale-queue-post-termination-irq.html

  * igt@xe_query@multigpu-query-engines:
    - shard-ptl:          NOTRUN -> [SKIP][125] ([Intel XE#6019]) +3 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@xe_query@multigpu-query-engines.html

  * igt@xe_query@multigpu-query-pxp-status:
    - shard-bmg:          NOTRUN -> [SKIP][126] ([Intel XE#944]) +2 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-6/igt@xe_query@multigpu-query-pxp-status.html

  * igt@xe_sriov_vram@vf-access-provisioned:
    - shard-ptl:          NOTRUN -> [SKIP][127] ([Intel XE#6376] / [Intel XE#7422])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-6/igt@xe_sriov_vram@vf-access-provisioned.html

  * igt@xe_vm@overcommit-nonfault-vram-lr-external-nodefer:
    - shard-ptl:          NOTRUN -> [SKIP][128] ([Intel XE#9597])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@xe_vm@overcommit-nonfault-vram-lr-external-nodefer.html

  
#### Possible fixes ####

  * igt@kms_async_flips@alternate-sync-async-flip-atomic:
    - shard-bmg:          [FAIL][129] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][130]
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip-atomic.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-3:
    - shard-bmg:          [FAIL][131] ([Intel XE#6078]) -> [PASS][132]
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-3.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-3.html

  * igt@kms_bw@linear-tiling-1-displays-target-1920x1080p:
    - shard-bmg:          [SKIP][133] ([Intel XE#367]) -> [PASS][134]
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-bmg-10/igt@kms_bw@linear-tiling-1-displays-target-1920x1080p.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-target-1920x1080p.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs (NEW):
    - shard-bmg:          [INCOMPLETE][135] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][136] +1 other test pass
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][137] ([Intel XE#301]) -> [PASS][138] +1 other test pass
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_vrr@flip-basic:
    - shard-ptl:          [FAIL][139] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][140] +1 other test pass
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-ptl-7/igt@kms_vrr@flip-basic.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-8/igt@kms_vrr@flip-basic.html

  * igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute:
    - shard-bmg:          [ABORT][141] ([Intel XE#1727] / [Intel XE#6652]) -> [PASS][142] +1 other test pass
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-bmg-3/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-10/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html

  * igt@xe_pm@s4-basic:
    - shard-lnl:          [ABORT][143] ([Intel XE#9362]) -> [PASS][144]
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-lnl-5/igt@xe_pm@s4-basic.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-6/igt@xe_pm@s4-basic.html

  * igt@xe_pm@s4-basic-exec:
    - shard-ptl:          [ABORT][145] ([Intel XE#9362]) -> [PASS][146] +2 other tests pass
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-ptl-3/igt@xe_pm@s4-basic-exec.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-ptl-1/igt@xe_pm@s4-basic-exec.html

  * igt@xe_pm_residency@gt-c6-freeze@gt0:
    - shard-bmg:          [FAIL][147] ([Intel XE#9254]) -> [PASS][148]
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-bmg-9/igt@xe_pm_residency@gt-c6-freeze@gt0.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-9/igt@xe_pm_residency@gt-c6-freeze@gt0.html

  * igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_render0:
    - shard-lnl:          [FAIL][149] ([Intel XE#9461]) -> [PASS][150]
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-lnl-7/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_render0.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_render0.html

  
#### Warnings ####

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-lnl:          [SKIP][151] ([Intel XE#309] / [Intel XE#7343]) -> [SKIP][152] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935])
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][153] ([Intel XE#3544]) -> [SKIP][154] ([Intel XE#3374] / [Intel XE#3544])
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-bmg-10/igt@kms_hdr@brightness-with-hdr.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][155] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][156] ([Intel XE#2426] / [Intel XE#5848])
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2372
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3157]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3157
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4760
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5741]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5741
  [Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
  [Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
  [Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
  [Intel XE#5810]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5810
  [Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
  [Intel XE#5821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5821
  [Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
  [Intel XE#5824]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5824
  [Intel XE#5828]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5828
  [Intel XE#5832]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5832
  [Intel XE#5835]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5835
  [Intel XE#5845]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5845
  [Intel XE#5846]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5846
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
  [Intel XE#5855]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5855
  [Intel XE#5857]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5857
  [Intel XE#5858]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5858
  [Intel XE#5900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5900
  [Intel XE#5901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5901
  [Intel XE#5907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5907
  [Intel XE#5910]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5910
  [Intel XE#5946]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5946
  [Intel XE#5962]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5962
  [Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6128
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
  [Intel XE#6925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6925
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7359
  [Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7413
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7422
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
  [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7727
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8391
  [Intel XE#8680]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8680
  [Intel XE#8815]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8815
  [Intel XE#9009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9009
  [Intel XE#9254]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9254
  [Intel XE#9311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9311
  [Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#9461]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9461
  [Intel XE#9529]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9529
  [Intel XE#9597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9597
  [Intel XE#9671]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9671


Build changes
-------------

  * Linux: xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82 -> xe-pw-162055v15

  IGT_9187: 9187
  xe-6120-21bbb4e37d134297f83b5897188c2097defbbc82: 21bbb4e37d134297f83b5897188c2097defbbc82
  xe-pw-162055v15: 162055v15

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v15/index.html

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