* [CI 2/2] drm/xe/wopcm: Simplify GuC WOPCM programming
2026-11-13 19:17 [CI 1/2] drm/xe/wopcm: Use the size from HW when excluding the wopcm range from GGTT Daniele Ceraolo Spurio
@ 2026-11-13 19:17 ` Daniele Ceraolo Spurio
2026-11-13 19:33 ` sashiko-bot
2026-11-13 19:40 ` [CI 1/2] drm/xe/wopcm: Use the size from HW when excluding the wopcm range from GGTT sashiko-bot
` (3 subsequent siblings)
4 siblings, 1 reply; 7+ messages in thread
From: Daniele Ceraolo Spurio @ 2026-11-13 19:17 UTC (permalink / raw)
To: intel-xe
Starting from PVC, the GuC WOPCM registers are programmed by BIOS/IFWI,
which is a trusted entity, so we don't really need to double-check the
programmed values; therefore, if we find the WOPCM registers already
locked we can just return early and keep going.
For legacy platform (which are not officially supported by the Xe
driver), we still need to do the math ourselves.
By switching to use the WOPCM size from the HW instead of using an
hardcoded value, we make it impossible for the programming to end up
incorrect when using the official binaries (because those are sized so
that they're guaranteed to fit), so in this case we can drop the layout
check as well. If a malicious user is using modified binaries, we'll
still catch the error and fail at either parse or load time.
Given these simplifications and the fact that the only user left for this
is the uC code, we can move the code in the xe_uc.c file. As part of
this, the wopcm re-programming post-reset/resume has been moved from
do_gt_restart to xe_uc_load_hw.
The documentation has also been dropped, both because it's wrong for
platforms officially supported by the Xe driver (the WOPCM is now shared
by root and media GTs and the GSC FW is also stored there) and because we
don't use the layout anymore so we don't really care.
v2: Don't check against the WOPCM size on VFs, rework WOPCM base and
size log to not look like base and end.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Shuicheng Lin <shuicheng.lin@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
Documentation/gpu/xe/xe_firmware.rst | 6 -
drivers/gpu/drm/xe/Makefile | 3 +-
drivers/gpu/drm/xe/xe_gt.c | 5 -
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 1 -
drivers/gpu/drm/xe/xe_gt_sriov_vf.c | 1 -
drivers/gpu/drm/xe/xe_guc.c | 11 +-
drivers/gpu/drm/xe/xe_tile_sriov_vf.c | 1 -
drivers/gpu/drm/xe/xe_uc.c | 131 +++++++++-
drivers/gpu/drm/xe/xe_uc_types.h | 3 -
drivers/gpu/drm/xe/xe_wopcm.c | 287 ---------------------
drivers/gpu/drm/xe/xe_wopcm.h | 16 --
drivers/gpu/drm/xe/xe_wopcm_types.h | 26 --
12 files changed, 137 insertions(+), 354 deletions(-)
delete mode 100644 drivers/gpu/drm/xe/xe_wopcm.c
delete mode 100644 drivers/gpu/drm/xe/xe_wopcm.h
delete mode 100644 drivers/gpu/drm/xe/xe_wopcm_types.h
diff --git a/Documentation/gpu/xe/xe_firmware.rst b/Documentation/gpu/xe/xe_firmware.rst
index d3030d1c9a84..ed4dc12826f3 100644
--- a/Documentation/gpu/xe/xe_firmware.rst
+++ b/Documentation/gpu/xe/xe_firmware.rst
@@ -13,12 +13,6 @@ Firmware Layout
.. kernel-doc:: drivers/gpu/drm/xe/abi/uc_fw_abi.h
:doc: GSC-based Firmware Layout
-Write Once Protected Content Memory (WOPCM) Layout
-==================================================
-
-.. kernel-doc:: drivers/gpu/drm/xe/xe_wopcm.c
- :doc: Write Once Protected Content Memory (WOPCM) Layout
-
GuC CTB Blob
============
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 0392ba58dd65..52f0d5dd5468 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -154,8 +154,7 @@ xe-y += xe_bb.o \
xe_vsec.o \
xe_wa.o \
xe_wait_user_fence.o \
- xe_wedge.o \
- xe_wopcm.o
+ xe_wedge.o
xe-$(CONFIG_I2C) += xe_i2c.o \
xe_amc.o
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index fe71cb011d3a..3d3b326b9e9e 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -68,7 +68,6 @@
#include "xe_vm.h"
#include "xe_wa.h"
#include "xe_wedge.h"
-#include "xe_wopcm.h"
#define GRDOM_RESET_TIMEOUT_MS 5
@@ -863,10 +862,6 @@ static int do_gt_restart(struct xe_gt *gt)
xe_gt_mcr_set_implicit_defaults(gt);
xe_reg_sr_apply_mmio(>->reg_sr, gt);
- err = xe_wopcm_init(>->uc.wopcm);
- if (err)
- return err;
-
for_each_hw_engine(hwe, gt, id)
xe_hw_engine_enable_ring(hwe);
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
index cca2f837e90b..cae6322fb9a6 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
@@ -33,7 +33,6 @@
#include "xe_sriov.h"
#include "xe_ttm_vram_mgr.h"
#include "xe_vram_types.h"
-#include "xe_wopcm.h"
#define make_u64_from_u32(hi, lo) ((u64)((u64)(u32)(hi) << 32 | (u32)(lo)))
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
index 2a5f2064ad3e..60f1b29358f9 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
@@ -38,7 +38,6 @@
#include "xe_tlb_inval.h"
#include "xe_uc_fw.h"
#include "xe_wedge.h"
-#include "xe_wopcm.h"
#define make_u64_from_u32(hi, lo) ((u64)((u64)(u32)(hi) << 32 | (u32)(lo)))
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index c4fb34e64cd6..e7e818897bf5 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -47,15 +47,16 @@
#include "xe_sleep.h"
#include "xe_sriov.h"
#include "xe_sriov_pf_migration.h"
+#include "xe_tile.h"
#include "xe_uc.h"
#include "xe_uc_fw.h"
#include "xe_wa.h"
-#include "xe_wopcm.h"
static u32 guc_bo_ggtt_addr(struct xe_guc *guc,
struct xe_bo *bo)
{
- struct xe_device *xe = guc_to_xe(guc);
+ struct xe_tile *tile = gt_to_tile(guc_to_gt(guc));
+ struct xe_device *xe = tile_to_xe(tile);
u32 addr;
/*
@@ -64,10 +65,12 @@ static u32 guc_bo_ggtt_addr(struct xe_guc *guc,
* might be different for each tile. So, just always ask for the address
* on the target GuC.
*/
- addr = __xe_bo_ggtt_addr(bo, gt_to_tile(guc_to_gt(guc))->id);
+ addr = __xe_bo_ggtt_addr(bo, tile->id);
+
+ if (!IS_SRIOV_VF(xe))
+ xe_assert(xe, addr >= xe_tile_wopcm_size(tile));
/* GuC addresses above GUC_GGTT_TOP don't map through the GTT */
- xe_assert(xe, addr >= xe_wopcm_size(guc_to_xe(guc)));
xe_assert(xe, addr < GUC_GGTT_TOP);
xe_assert(xe, xe_bo_size(bo) <= GUC_GGTT_TOP - addr);
diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
index 24293521e090..a7c84f2d10c5 100644
--- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
@@ -12,7 +12,6 @@
#include "xe_sriov.h"
#include "xe_sriov_printk.h"
#include "xe_tile_sriov_vf.h"
-#include "xe_wopcm.h"
/**
* DOC: GGTT nodes shifting during VF post-migration recovery
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index b32ba504041c..501961c2cc8f 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -7,6 +7,7 @@
#include "xe_assert.h"
#include "xe_device.h"
+#include "xe_force_wake.h"
#include "xe_gsc.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
@@ -18,10 +19,12 @@
#include "xe_guc_engine_activity.h"
#include "xe_guc_submit.h"
#include "xe_huc.h"
+#include "xe_mmio.h"
#include "xe_sriov.h"
+#include "xe_tile.h"
#include "xe_uc_fw.h"
#include "xe_wedge.h"
-#include "xe_wopcm.h"
+#include "regs/xe_guc_regs.h"
static struct xe_gt *
uc_to_gt(struct xe_uc *uc)
@@ -52,6 +55,126 @@ int xe_uc_init_noalloc(struct xe_uc *uc)
return ret;
}
+static bool __wopcm_regs_locked(struct xe_gt *gt,
+ u32 *guc_wopcm_base, u32 *guc_wopcm_size)
+{
+ u32 reg_base = xe_mmio_read32(>->mmio, DMA_GUC_WOPCM_OFFSET);
+ u32 reg_size = xe_mmio_read32(>->mmio, GUC_WOPCM_SIZE);
+
+ if (!(reg_size & GUC_WOPCM_SIZE_LOCKED) ||
+ !(reg_base & GUC_WOPCM_OFFSET_VALID))
+ return false;
+
+ *guc_wopcm_base = reg_base & GUC_WOPCM_OFFSET_MASK;
+ *guc_wopcm_size = reg_size & GUC_WOPCM_SIZE_MASK;
+ return true;
+}
+
+static int __wopcm_init_regs(struct xe_gt *gt, u32 base, u32 size)
+{
+ u32 huc_agent = xe_uc_fw_is_available(>->uc.huc.fw) ? HUC_LOADING_AGENT_GUC : 0;
+ u32 mask;
+ int err;
+
+ xe_gt_assert(gt, !(base & ~GUC_WOPCM_OFFSET_MASK));
+ xe_gt_assert(gt, !(size & ~GUC_WOPCM_SIZE_MASK));
+
+ mask = GUC_WOPCM_SIZE_MASK | GUC_WOPCM_SIZE_LOCKED;
+ err = xe_mmio_write32_and_verify(>->mmio, GUC_WOPCM_SIZE, size, mask,
+ size | GUC_WOPCM_SIZE_LOCKED);
+ if (err)
+ goto err_out;
+
+ mask = GUC_WOPCM_OFFSET_MASK | GUC_WOPCM_OFFSET_VALID | huc_agent;
+ err = xe_mmio_write32_and_verify(>->mmio, DMA_GUC_WOPCM_OFFSET,
+ base | huc_agent, mask,
+ base | huc_agent |
+ GUC_WOPCM_OFFSET_VALID);
+ if (err)
+ goto err_out;
+
+ xe_gt_dbg(gt, "Programmed GuC WOPCM [b=%uK, s=%uK]\n", base / SZ_1K, size / SZ_1K);
+
+ return 0;
+
+err_out:
+ xe_gt_notice(gt, "Failed to init uC WOPCM registers to [b=%uK, s=%uK]!\n",
+ base / SZ_1K, size / SZ_1K);
+ xe_gt_notice(gt, "%s(%#x)=%#x\n", "DMA_GUC_WOPCM_OFFSET",
+ DMA_GUC_WOPCM_OFFSET.addr,
+ xe_mmio_read32(>->mmio, DMA_GUC_WOPCM_OFFSET));
+ xe_gt_notice(gt, "%s(%#x)=%#x\n", "GUC_WOPCM_SIZE",
+ GUC_WOPCM_SIZE.addr,
+ xe_mmio_read32(>->mmio, GUC_WOPCM_SIZE));
+
+ return err;
+}
+
+static int uc_program_wopcm(struct xe_uc *uc)
+{
+ struct xe_gt *gt = uc_to_gt(uc);
+ struct xe_tile *tile = gt_to_tile(gt);
+ u32 huc_fw_size = xe_uc_fw_get_upload_size(>->uc.huc.fw);
+ u32 wopcm_size = xe_tile_wopcm_size(tile);
+ u32 guc_wopcm_base;
+ u32 guc_wopcm_size;
+ bool locked;
+
+ if (!xe_uc_fw_is_supported(>->uc.guc.fw))
+ return -ENODEV;
+
+ xe_force_wake_assert_held(gt_to_fw(gt), XE_FW_GT);
+
+ locked = __wopcm_regs_locked(gt, &guc_wopcm_base, &guc_wopcm_size);
+ if (locked) {
+ /*
+ * We trust the programming to have been done correctly. If
+ * something is wrong we'll catch it at FW load time.
+ */
+ xe_gt_dbg(gt, "GuC WOPCM is already locked [b=%uK, s=%uK]\n",
+ guc_wopcm_base / SZ_1K, guc_wopcm_size / SZ_1K);
+ return 0;
+ }
+
+ /*
+ * WOPCM partitioning on platforms with a media GT is more complex,
+ * because both GTs share the same WOPCM space. However, on all
+ * platforms with media GT we expect the registers to be preprogrammed
+ * by BIOS/IFWI, so we should never have to do the programming ourselves
+ * and can therefore skip the implementation.
+ */
+ if (XE_WARN_ON(tile->media_gt)) {
+ xe_gt_err(gt, "WOPCM not locked on platform with media GT\n");
+ return -EIO;
+ }
+
+ /*
+ * On legacy HW (pre-PVC) where the driver is responsible for
+ * programming the WOPCM registers, the WOPCM is divided into three
+ * regions, in order from bottom to top:
+ * 1 - The HuC region, which contains the HuC firmware + a 16KB reserved
+ * section.
+ * 2 - The GuC region, which contains the GuC firmware + a reserved
+ * section for GuC's usage.
+ * 3 - A reserved region for HW contexts, which is 36KB in size.
+ *
+ * To keep the math simple, we remove the HW context region from the
+ * WOPCM size, calculate the size of region 1 and then leave the
+ * remaining area for region 2. The official binaries are guaranteed to
+ * fit in the WOPCM, so the math below can only go wrong if a user is
+ * manipulating the blobs. In such a scenario, we'll catch the error at
+ * FW load time, so no need to double verify it here.
+ */
+ wopcm_size -= (SZ_32K + SZ_4K);
+
+ guc_wopcm_base = huc_fw_size + SZ_16K;
+ guc_wopcm_base = ALIGN(guc_wopcm_base, 1UL << GUC_WOPCM_OFFSET_SHIFT);
+
+ guc_wopcm_size = wopcm_size - guc_wopcm_base; /* already 4KB aligned */
+
+ return __wopcm_init_regs(gt, guc_wopcm_base, guc_wopcm_size);
+}
+
int xe_uc_init(struct xe_uc *uc)
{
int ret;
@@ -76,7 +199,7 @@ int xe_uc_init(struct xe_uc *uc)
return 0;
if (!IS_SRIOV_VF(uc_to_xe(uc))) {
- ret = xe_wopcm_init(&uc->wopcm);
+ ret = uc_program_wopcm(uc);
if (ret)
goto err;
}
@@ -193,6 +316,10 @@ int xe_uc_load_hw(struct xe_uc *uc)
if (IS_SRIOV_VF(uc_to_xe(uc)))
return vf_uc_load_hw(uc);
+ ret = uc_program_wopcm(uc);
+ if (ret)
+ return ret;
+
ret = xe_huc_upload(&uc->huc);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/xe/xe_uc_types.h b/drivers/gpu/drm/xe/xe_uc_types.h
index 2b47382f7b3b..56d89e03a59a 100644
--- a/drivers/gpu/drm/xe/xe_uc_types.h
+++ b/drivers/gpu/drm/xe/xe_uc_types.h
@@ -9,7 +9,6 @@
#include "xe_gsc_types.h"
#include "xe_guc_types.h"
#include "xe_huc_types.h"
-#include "xe_wopcm_types.h"
/**
* struct xe_uc - Xe micro controllers
@@ -21,8 +20,6 @@ struct xe_uc {
struct xe_huc huc;
/** @gsc: Graphics Security Controller */
struct xe_gsc gsc;
- /** @wopcm: WOPCM */
- struct xe_wopcm wopcm;
};
/**
diff --git a/drivers/gpu/drm/xe/xe_wopcm.c b/drivers/gpu/drm/xe/xe_wopcm.c
deleted file mode 100644
index 7da1e3ebc839..000000000000
--- a/drivers/gpu/drm/xe/xe_wopcm.c
+++ /dev/null
@@ -1,287 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2022 Intel Corporation
- */
-
-#include "xe_wopcm.h"
-
-#include <linux/error-injection.h>
-
-#include "regs/xe_guc_regs.h"
-#include "xe_device.h"
-#include "xe_force_wake.h"
-#include "xe_gt_types.h"
-#include "xe_mmio.h"
-#include "xe_uc_fw.h"
-
-/**
- * DOC: Write Once Protected Content Memory (WOPCM) Layout
- *
- * The layout of the WOPCM will be fixed after writing to GuC WOPCM size and
- * offset registers whose values are calculated and determined by HuC/GuC
- * firmware size and set of hardware requirements/restrictions as shown below:
- *
- * ::
- *
- * +=========> +====================+ <== WOPCM Top
- * ^ | HW contexts RSVD |
- * | +===> +====================+ <== GuC WOPCM Top
- * | ^ | |
- * | | | |
- * | | | |
- * | GuC | |
- * | WOPCM | |
- * | Size +--------------------+
- * WOPCM | | GuC FW RSVD |
- * | | +--------------------+
- * | | | GuC Stack RSVD |
- * | | +------------------- +
- * | v | GuC WOPCM RSVD |
- * | +===> +====================+ <== GuC WOPCM base
- * | | WOPCM RSVD |
- * | +------------------- + <== HuC Firmware Top
- * v | HuC FW |
- * +=========> +====================+ <== WOPCM Base
- *
- * GuC accessible WOPCM starts at GuC WOPCM base and ends at GuC WOPCM top.
- * The top part of the WOPCM is reserved for hardware contexts (e.g. RC6
- * context).
- */
-
-/* Default WOPCM size is 2MB from Gen11, 1MB on previous platforms */
-/* FIXME: Larger size require for some platforms, do a proper probe sooner or later */
-#define DGFX_WOPCM_SIZE SZ_4M
-#define LNL_WOPCM_SIZE SZ_8M
-#define MTL_WOPCM_SIZE SZ_4M
-#define WOPCM_SIZE SZ_2M
-
-/* 16KB WOPCM (RSVD WOPCM) is reserved from HuC firmware top. */
-#define WOPCM_RESERVED_SIZE SZ_16K
-
-/* 16KB reserved at the beginning of GuC WOPCM. */
-#define GUC_WOPCM_RESERVED SZ_16K
-/* 8KB from GUC_WOPCM_RESERVED is reserved for GuC stack. */
-#define GUC_WOPCM_STACK_RESERVED SZ_8K
-
-/* GuC WOPCM Offset value needs to be aligned to 16KB. */
-#define GUC_WOPCM_OFFSET_ALIGNMENT (1UL << GUC_WOPCM_OFFSET_SHIFT)
-
-/* 36KB WOPCM reserved at the end of WOPCM */
-#define WOPCM_HW_CTX_RESERVED (SZ_32K + SZ_4K)
-
-static inline struct xe_gt *wopcm_to_gt(struct xe_wopcm *wopcm)
-{
- return container_of(wopcm, struct xe_gt, uc.wopcm);
-}
-
-static inline struct xe_device *wopcm_to_xe(struct xe_wopcm *wopcm)
-{
- return gt_to_xe(wopcm_to_gt(wopcm));
-}
-
-static u32 context_reserved_size(void)
-{
- return WOPCM_HW_CTX_RESERVED;
-}
-
-static bool __check_layout(struct xe_device *xe, u32 wopcm_size,
- u32 guc_wopcm_base, u32 guc_wopcm_size,
- u32 guc_fw_size, u32 huc_fw_size)
-{
- const u32 ctx_rsvd = context_reserved_size();
- u32 size;
-
- size = wopcm_size - ctx_rsvd;
- if (unlikely(guc_wopcm_base >= size ||
- guc_wopcm_size > size - guc_wopcm_base)) {
- drm_err(&xe->drm,
- "WOPCM: invalid GuC region layout: %uK + %uK > %uK\n",
- guc_wopcm_base / SZ_1K, guc_wopcm_size / SZ_1K,
- size / SZ_1K);
- return false;
- }
-
- size = guc_fw_size + GUC_WOPCM_RESERVED + GUC_WOPCM_STACK_RESERVED;
- if (unlikely(guc_wopcm_size < size)) {
- drm_err(&xe->drm, "WOPCM: no space for %s: %uK < %uK\n",
- xe_uc_fw_type_repr(XE_UC_FW_TYPE_GUC),
- guc_wopcm_size / SZ_1K, size / SZ_1K);
- return false;
- }
-
- size = huc_fw_size + WOPCM_RESERVED_SIZE;
- if (unlikely(guc_wopcm_base < size)) {
- drm_err(&xe->drm, "WOPCM: no space for %s: %uK < %uK\n",
- xe_uc_fw_type_repr(XE_UC_FW_TYPE_HUC),
- guc_wopcm_base / SZ_1K, size / SZ_1K);
- return false;
- }
-
- return true;
-}
-
-static bool __wopcm_regs_locked(struct xe_gt *gt,
- u32 *guc_wopcm_base, u32 *guc_wopcm_size)
-{
- u32 reg_base = xe_mmio_read32(>->mmio, DMA_GUC_WOPCM_OFFSET);
- u32 reg_size = xe_mmio_read32(>->mmio, GUC_WOPCM_SIZE);
-
- if (!(reg_size & GUC_WOPCM_SIZE_LOCKED) ||
- !(reg_base & GUC_WOPCM_OFFSET_VALID))
- return false;
-
- *guc_wopcm_base = reg_base & GUC_WOPCM_OFFSET_MASK;
- *guc_wopcm_size = reg_size & GUC_WOPCM_SIZE_MASK;
- return true;
-}
-
-static int __wopcm_init_regs(struct xe_device *xe, struct xe_gt *gt,
- struct xe_wopcm *wopcm)
-{
- u32 base = wopcm->guc.base;
- u32 size = wopcm->guc.size;
- u32 huc_agent = xe_uc_fw_is_available(>->uc.huc.fw) ? HUC_LOADING_AGENT_GUC : 0;
- u32 mask;
- int err;
-
- XE_WARN_ON(!(base & GUC_WOPCM_OFFSET_MASK));
- XE_WARN_ON(base & ~GUC_WOPCM_OFFSET_MASK);
- XE_WARN_ON(!(size & GUC_WOPCM_SIZE_MASK));
- XE_WARN_ON(size & ~GUC_WOPCM_SIZE_MASK);
-
- mask = GUC_WOPCM_SIZE_MASK | GUC_WOPCM_SIZE_LOCKED;
- err = xe_mmio_write32_and_verify(>->mmio, GUC_WOPCM_SIZE, size, mask,
- size | GUC_WOPCM_SIZE_LOCKED);
- if (err)
- goto err_out;
-
- mask = GUC_WOPCM_OFFSET_MASK | GUC_WOPCM_OFFSET_VALID | huc_agent;
- err = xe_mmio_write32_and_verify(>->mmio, DMA_GUC_WOPCM_OFFSET,
- base | huc_agent, mask,
- base | huc_agent |
- GUC_WOPCM_OFFSET_VALID);
- if (err)
- goto err_out;
-
- return 0;
-
-err_out:
- drm_notice(&xe->drm, "Failed to init uC WOPCM registers!\n");
- drm_notice(&xe->drm, "%s(%#x)=%#x\n", "DMA_GUC_WOPCM_OFFSET",
- DMA_GUC_WOPCM_OFFSET.addr,
- xe_mmio_read32(>->mmio, DMA_GUC_WOPCM_OFFSET));
- drm_notice(&xe->drm, "%s(%#x)=%#x\n", "GUC_WOPCM_SIZE",
- GUC_WOPCM_SIZE.addr,
- xe_mmio_read32(>->mmio, GUC_WOPCM_SIZE));
-
- return err;
-}
-
-u32 xe_wopcm_size(struct xe_device *xe)
-{
- if (xe->info.platform >= XE_LUNARLAKE)
- return LNL_WOPCM_SIZE;
- else if (IS_DGFX(xe))
- return DGFX_WOPCM_SIZE;
- else if (xe->info.platform == XE_METEORLAKE)
- return MTL_WOPCM_SIZE;
- else
- return WOPCM_SIZE;
-}
-
-static u32 max_wopcm_size(struct xe_device *xe)
-{
- if (xe->info.platform == XE_NOVALAKE_P)
- return SZ_16M;
- else
- return SZ_8M;
-}
-
-/**
- * xe_wopcm_init() - Initialize the WOPCM structure.
- * @wopcm: pointer to xe_wopcm.
- *
- * This function will partition WOPCM space based on GuC and HuC firmware sizes
- * and will allocate max remaining for use by GuC. This function will also
- * enforce platform dependent hardware restrictions on GuC WOPCM offset and
- * size. It will fail the WOPCM init if any of these checks fail, so that the
- * following WOPCM registers setup and GuC firmware uploading would be aborted.
- */
-int xe_wopcm_init(struct xe_wopcm *wopcm)
-{
- struct xe_device *xe = wopcm_to_xe(wopcm);
- struct xe_gt *gt = wopcm_to_gt(wopcm);
- u32 guc_fw_size = xe_uc_fw_get_upload_size(>->uc.guc.fw);
- u32 huc_fw_size = xe_uc_fw_get_upload_size(>->uc.huc.fw);
- u32 ctx_rsvd = context_reserved_size();
- u32 guc_wopcm_base;
- u32 guc_wopcm_size;
- bool locked;
- int ret = 0;
-
- if (!guc_fw_size)
- return -EINVAL;
-
- wopcm->size = xe_wopcm_size(xe);
- drm_dbg(&xe->drm, "WOPCM: %uK\n", wopcm->size / SZ_1K);
-
- xe_force_wake_assert_held(gt_to_fw(gt), XE_FW_GT);
- XE_WARN_ON(guc_fw_size >= wopcm->size);
- XE_WARN_ON(huc_fw_size >= wopcm->size);
- XE_WARN_ON(ctx_rsvd + WOPCM_RESERVED_SIZE >= wopcm->size);
-
- locked = __wopcm_regs_locked(gt, &guc_wopcm_base, &guc_wopcm_size);
- if (locked) {
- drm_dbg(&xe->drm, "GuC WOPCM is already locked [%uK, %uK)\n",
- guc_wopcm_base / SZ_1K, guc_wopcm_size / SZ_1K);
- /*
- * When the GuC wopcm base and size are preprogrammed by
- * BIOS/IFWI, check against the max allowed wopcm size to
- * validate if the programmed values align to the wopcm layout.
- *
- * FIXME: This is giving the maximum overall WOPCM size and not
- * the size relative to each GT.
- */
- wopcm->size = max_wopcm_size(xe);
-
- goto check;
- }
-
- /*
- * Aligned value of guc_wopcm_base will determine available WOPCM space
- * for HuC firmware and mandatory reserved area.
- */
- guc_wopcm_base = huc_fw_size + WOPCM_RESERVED_SIZE;
- guc_wopcm_base = ALIGN(guc_wopcm_base, GUC_WOPCM_OFFSET_ALIGNMENT);
-
- /*
- * Need to clamp guc_wopcm_base now to make sure the following math is
- * correct. Formal check of whole WOPCM layout will be done below.
- */
- guc_wopcm_base = min(guc_wopcm_base, wopcm->size - ctx_rsvd);
-
- /* Aligned remainings of usable WOPCM space can be assigned to GuC. */
- guc_wopcm_size = wopcm->size - ctx_rsvd - guc_wopcm_base;
- guc_wopcm_size &= GUC_WOPCM_SIZE_MASK;
-
- drm_dbg(&xe->drm, "Calculated GuC WOPCM [%uK, %uK)\n",
- guc_wopcm_base / SZ_1K, guc_wopcm_size / SZ_1K);
-
-check:
- if (__check_layout(xe, wopcm->size, guc_wopcm_base, guc_wopcm_size,
- guc_fw_size, huc_fw_size)) {
- wopcm->guc.base = guc_wopcm_base;
- wopcm->guc.size = guc_wopcm_size;
- XE_WARN_ON(!wopcm->guc.base);
- XE_WARN_ON(!wopcm->guc.size);
- } else {
- drm_notice(&xe->drm, "Unsuccessful WOPCM partitioning\n");
- return -E2BIG;
- }
-
- if (!locked)
- ret = __wopcm_init_regs(xe, gt, wopcm);
-
- return ret;
-}
-ALLOW_ERROR_INJECTION(xe_wopcm_init, ERRNO); /* See xe_pci_probe() */
diff --git a/drivers/gpu/drm/xe/xe_wopcm.h b/drivers/gpu/drm/xe/xe_wopcm.h
deleted file mode 100644
index 0197a282460b..000000000000
--- a/drivers/gpu/drm/xe/xe_wopcm.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2022 Intel Corporation
- */
-
-#ifndef _XE_WOPCM_H_
-#define _XE_WOPCM_H_
-
-#include "xe_wopcm_types.h"
-
-struct xe_device;
-
-int xe_wopcm_init(struct xe_wopcm *wopcm);
-u32 xe_wopcm_size(struct xe_device *xe);
-
-#endif
diff --git a/drivers/gpu/drm/xe/xe_wopcm_types.h b/drivers/gpu/drm/xe/xe_wopcm_types.h
deleted file mode 100644
index 99d34837c408..000000000000
--- a/drivers/gpu/drm/xe/xe_wopcm_types.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2022 Intel Corporation
- */
-
-#ifndef _XE_WOPCM_TYPES_H_
-#define _XE_WOPCM_TYPES_H_
-
-#include <linux/types.h>
-
-/**
- * struct xe_wopcm - Overall WOPCM info and WOPCM regions.
- */
-struct xe_wopcm {
- /** @size: Size of overall WOPCM */
- u32 size;
- /** @guc: GuC WOPCM Region info */
- struct {
- /** @guc.base: GuC WOPCM base which is offset from WOPCM base */
- u32 base;
- /** @guc.size: Size of the GuC WOPCM region */
- u32 size;
- } guc;
-};
-
-#endif
--
2.53.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* ✓ CI.KUnit: success for series starting with [CI,1/2] drm/xe/wopcm: Use the size from HW when excluding the wopcm range from GGTT
2026-11-13 19:17 [CI 1/2] drm/xe/wopcm: Use the size from HW when excluding the wopcm range from GGTT Daniele Ceraolo Spurio
` (2 preceding siblings ...)
2026-11-13 19:45 ` ✗ CI.checkpatch: warning for series starting with [CI,1/2] " Patchwork
@ 2026-11-13 19:47 ` Patchwork
2026-11-13 20:18 ` ✓ Xe.CI.BAT: " Patchwork
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-11-13 19:47 UTC (permalink / raw)
To: Daniele Ceraolo Spurio; +Cc: intel-xe
== Series Details ==
Series: series starting with [CI,1/2] drm/xe/wopcm: Use the size from HW when excluding the wopcm range from GGTT
URL : https://patchwork.freedesktop.org/series/178529/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[19:45:22] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:45:27] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:45:48] Starting KUnit Kernel (1/1)...
[19:45:48] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:45:48] ================= gpu_buddy (15 subtests) ==================
[19:45:48] [PASSED] gpu_test_buddy_alloc_limit
[19:45:48] [PASSED] gpu_test_buddy_alloc_optimistic
[19:45:48] [PASSED] gpu_test_buddy_alloc_pessimistic
[19:45:48] [PASSED] gpu_test_buddy_alloc_pathological
[19:45:48] [PASSED] gpu_test_buddy_alloc_contiguous
[19:45:48] [PASSED] gpu_test_buddy_alloc_clear
[19:45:48] [PASSED] gpu_test_buddy_alloc_range
[19:45:48] [PASSED] gpu_test_buddy_alloc_range_bias
[19:45:48] [PASSED] gpu_test_buddy_alloc_range_clear_guard
[19:45:49] [PASSED] gpu_test_buddy_fragmentation_performance
[19:45:49] [PASSED] gpu_test_buddy_dirty_tracker_performance
[19:45:49] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[19:45:49] [PASSED] gpu_test_buddy_offset_aligned_allocation
[19:45:49] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[19:45:49] [PASSED] gpu_test_buddy_addr_to_block
[19:45:49] ==================== [PASSED] gpu_buddy ====================
[19:45:49] ============================================================
[19:45:49] Testing complete. Ran 15 tests: passed: 15
[19:45:49] Elapsed time: 27.449s total, 5.108s configuring, 20.423s building, 1.868s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[19:45:50] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:45:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:46:31] Starting KUnit Kernel (1/1)...
[19:46:31] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:46:31] ================== guc_buf (11 subtests) ===================
[19:46:31] [PASSED] test_smallest
[19:46:31] [PASSED] test_largest
[19:46:31] [PASSED] test_granular
[19:46:31] [PASSED] test_unique
[19:46:31] [PASSED] test_overlap
[19:46:31] [PASSED] test_reusable
[19:46:31] [PASSED] test_too_big
[19:46:31] [PASSED] test_flush
[19:46:31] [PASSED] test_lookup
[19:46:31] [PASSED] test_data
[19:46:31] [PASSED] test_class
[19:46:31] ===================== [PASSED] guc_buf =====================
[19:46:31] =================== guc_dbm (7 subtests) ===================
[19:46:31] [PASSED] test_empty
[19:46:31] [PASSED] test_default
[19:46:31] ======================== test_size ========================
[19:46:31] [PASSED] 4
[19:46:31] [PASSED] 8
[19:46:31] [PASSED] 32
[19:46:31] [PASSED] 256
[19:46:31] ==================== [PASSED] test_size ====================
[19:46:31] ======================= test_reuse ========================
[19:46:31] [PASSED] 4
[19:46:31] [PASSED] 8
[19:46:31] [PASSED] 32
[19:46:31] [PASSED] 256
[19:46:31] =================== [PASSED] test_reuse ====================
[19:46:31] =================== test_range_overlap ====================
[19:46:31] [PASSED] 4
[19:46:31] [PASSED] 8
[19:46:31] [PASSED] 32
[19:46:31] [PASSED] 256
[19:46:31] =============== [PASSED] test_range_overlap ================
[19:46:31] =================== test_range_compact ====================
[19:46:31] [PASSED] 4
[19:46:31] [PASSED] 8
[19:46:31] [PASSED] 32
[19:46:31] [PASSED] 256
[19:46:31] =============== [PASSED] test_range_compact ================
[19:46:31] ==================== test_range_spare =====================
[19:46:31] [PASSED] 4
[19:46:31] [PASSED] 8
[19:46:31] [PASSED] 32
[19:46:31] [PASSED] 256
[19:46:31] ================ [PASSED] test_range_spare =================
[19:46:31] ===================== [PASSED] guc_dbm =====================
[19:46:31] ================== guc_idm (22 subtests) ===================
[19:46:31] [PASSED] bad_init
[19:46:31] [PASSED] no_init
[19:46:31] [PASSED] init_fini
[19:46:31] [PASSED] check_init_small
[19:46:31] [PASSED] check_init_shared
[19:46:31] [PASSED] check_used
[19:46:31] [PASSED] check_quota
[19:46:31] [PASSED] check_all
[19:46:31] [PASSED] check_limits
[19:46:31] [PASSED] check_overlap
[19:46:31] [PASSED] check_overlap_alloc
[19:46:31] [PASSED] check_overlap_release
[19:46:31] [PASSED] check_overlap_partial_init
[19:46:31] [PASSED] check_overlap_partial_shared_range_blocking
[19:46:31] [PASSED] check_used_usable
[19:46:31] [PASSED] check_used_shareable
[19:46:31] [PASSED] check_used_mixed
[19:46:31] [PASSED] check_release_usable_range
[19:46:31] [PASSED] check_release_shareable_range
[19:46:31] [PASSED] check_split_boundaries
[19:46:31] [PASSED] check_shareable_spare
[19:46:31] [PASSED] check_shareable_spare_fragmented_tail
[19:46:31] ===================== [PASSED] guc_idm =====================
[19:46:31] ============== guc_klv_helpers (13 subtests) ===============
[19:46:31] [PASSED] test_count
[19:46:31] [PASSED] test_encode_u32
[19:46:31] [PASSED] test_encode_u64
[19:46:31] [PASSED] test_encode_string
[19:46:31] [PASSED] test_encode_object_raw
[19:46:31] [PASSED] test_encode_object_klv
[19:46:31] [PASSED] test_encode_object_nested
[19:46:31] [PASSED] test_encode_object_basic
[19:46:31] ===================== test_decode_u16 =====================
[19:46:31] [PASSED] empty
[19:46:31] [PASSED] valid
[19:46:31] [PASSED] max
[19:46:31] [PASSED] big
[19:46:31] [PASSED] long
[19:46:31] ================= [PASSED] test_decode_u16 =================
[19:46:31] ===================== test_decode_u32 =====================
[19:46:31] [PASSED] empty
[19:46:31] [PASSED] valid
[19:46:31] [PASSED] max
[19:46:31] [PASSED] long
[19:46:31] ================= [PASSED] test_decode_u32 =================
[19:46:31] ===================== test_decode_u64 =====================
[19:46:31] [PASSED] empty
[19:46:31] [PASSED] short
[19:46:31] [PASSED] valid
[19:46:31] [PASSED] max
[19:46:31] [PASSED] long
[19:46:31] ================= [PASSED] test_decode_u64 =================
[19:46:31] ===================== test_decode_str =====================
[19:46:31] [PASSED] empty
[19:46:31] [PASSED] one
[19:46:31] [PASSED] one_trash
[19:46:31] [PASSED] two
[19:46:31] [PASSED] two_trash
[19:46:31] [PASSED] three
[19:46:31] [PASSED] dword
[19:46:31] [PASSED] four
[19:46:31] [PASSED] five
[19:46:31] [PASSED] six
[19:46:31] [PASSED] seven
[19:46:31] [PASSED] qword
[19:46:31] ================= [PASSED] test_decode_str =================
[19:46:31] [PASSED] test_print
[19:46:31] ================= [PASSED] guc_klv_helpers =================
[19:46:31] =================== xe_log (4 subtests) ====================
[19:46:31] [PASSED] demo_cper
[19:46:31] [PASSED] demo_dmesg
[19:46:31] ======================= test_dmesg ========================
[19:46:31] [PASSED] test_fatal
[19:46:31] [PASSED] test_fatal_tile
[19:46:31] [PASSED] test_fatal_gt
[19:46:31] [PASSED] test_fatal_comp
[19:46:31] [PASSED] test_fatal_comp_tile
[19:46:31] [PASSED] test_fatal_comp_gt
[19:46:31] [PASSED] test_fatal_all
[19:46:31] [PASSED] test_recoverable
[19:46:31] [PASSED] test_recoverable_tile
[19:46:31] [PASSED] test_recoverable_gt
[19:46:31] [PASSED] test_recoverable_comp
[19:46:31] [PASSED] test_recoverable_comp_tile
[19:46:31] [PASSED] test_recoverable_comp_gt
[19:46:31] [PASSED] test_recoverable_all
[19:46:31] [PASSED] test_info
[19:46:31] [PASSED] test_info_tile
[19:46:31] [PASSED] test_info_gt
[19:46:31] [PASSED] test_info_err
[19:46:31] [PASSED] test_info_comp
[19:46:31] [PASSED] test_info_comp_tile
[19:46:31] [PASSED] test_info_comp_gt
[19:46:31] [PASSED] test_info_all
[19:46:31] [PASSED] test_hw_fatal
[19:46:31] [PASSED] test_hw_recoverable
[19:46:31] [PASSED] test_hw_corrected
[19:46:31] [PASSED] test_hw_informational
[19:46:31] =================== [PASSED] test_dmesg ====================
[19:46:31] ====================== test_invalid =======================
[19:46:31] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[19:46:31] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[19:46:31] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[19:46:31] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[19:46:31] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[19:46:31] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[19:46:31] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[19:46:31] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[19:46:31] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[19:46:31] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[19:46:31] ================== [SKIPPED] test_invalid ==================
[19:46:31] ===================== [PASSED] xe_log ======================
[19:46:31] ================== no_relay (3 subtests) ===================
[19:46:31] [PASSED] xe_drops_guc2pf_if_not_ready
[19:46:31] [PASSED] xe_drops_guc2vf_if_not_ready
[19:46:31] [PASSED] xe_rejects_send_if_not_ready
[19:46:31] ==================== [PASSED] no_relay =====================
[19:46:31] ================== pf_relay (14 subtests) ==================
[19:46:31] [PASSED] pf_rejects_guc2pf_too_short
[19:46:31] [PASSED] pf_rejects_guc2pf_too_long
[19:46:31] [PASSED] pf_rejects_guc2pf_no_payload
[19:46:31] [PASSED] pf_fails_no_payload
[19:46:31] [PASSED] pf_fails_bad_origin
[19:46:31] [PASSED] pf_fails_bad_type
[19:46:31] [PASSED] pf_txn_reports_error
[19:46:31] [PASSED] pf_txn_sends_pf2guc
[19:46:31] [PASSED] pf_sends_pf2guc
[19:46:31] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:46:31] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:46:31] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:46:31] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:46:31] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:46:31] ==================== [PASSED] pf_relay =====================
[19:46:31] ================== vf_relay (3 subtests) ===================
[19:46:31] [PASSED] vf_rejects_guc2vf_too_short
[19:46:31] [PASSED] vf_rejects_guc2vf_too_long
[19:46:31] [PASSED] vf_rejects_guc2vf_no_payload
[19:46:31] ==================== [PASSED] vf_relay =====================
[19:46:31] ================ pf_gt_config (9 subtests) =================
[19:46:31] [PASSED] fair_contexts_1vf
[19:46:31] [PASSED] fair_doorbells_1vf
[19:46:31] [PASSED] fair_ggtt_1vf
[19:46:31] ====================== fair_vram_1vf ======================
[19:46:31] [PASSED] 3.50 GiB
[19:46:31] [PASSED] 11.5 GiB
[19:46:31] [PASSED] 15.5 GiB
[19:46:31] [PASSED] 31.5 GiB
[19:46:31] [PASSED] 63.5 GiB
[19:46:31] [PASSED] 1.91 GiB
[19:46:31] ================== [PASSED] fair_vram_1vf ==================
[19:46:31] ================ fair_vram_1vf_admin_only =================
[19:46:31] [PASSED] 3.50 GiB
[19:46:31] [PASSED] 11.5 GiB
[19:46:31] [PASSED] 15.5 GiB
[19:46:31] [PASSED] 31.5 GiB
[19:46:31] [PASSED] 63.5 GiB
[19:46:31] [PASSED] 1.91 GiB
[19:46:31] ============ [PASSED] fair_vram_1vf_admin_only =============
[19:46:31] ====================== fair_contexts ======================
[19:46:31] [PASSED] 1 VF
[19:46:31] [PASSED] 2 VFs
[19:46:31] [PASSED] 3 VFs
[19:46:31] [PASSED] 4 VFs
[19:46:31] [PASSED] 5 VFs
[19:46:31] [PASSED] 6 VFs
[19:46:31] [PASSED] 7 VFs
[19:46:31] [PASSED] 8 VFs
[19:46:31] [PASSED] 9 VFs
[19:46:31] [PASSED] 10 VFs
[19:46:31] [PASSED] 11 VFs
[19:46:31] [PASSED] 12 VFs
[19:46:31] [PASSED] 13 VFs
[19:46:31] [PASSED] 14 VFs
[19:46:31] [PASSED] 15 VFs
[19:46:31] [PASSED] 16 VFs
[19:46:31] [PASSED] 17 VFs
[19:46:31] [PASSED] 18 VFs
[19:46:31] [PASSED] 19 VFs
[19:46:31] [PASSED] 20 VFs
[19:46:31] [PASSED] 21 VFs
[19:46:31] [PASSED] 22 VFs
[19:46:31] [PASSED] 23 VFs
[19:46:31] [PASSED] 24 VFs
[19:46:31] [PASSED] 25 VFs
[19:46:31] [PASSED] 26 VFs
[19:46:31] [PASSED] 27 VFs
[19:46:31] [PASSED] 28 VFs
[19:46:31] [PASSED] 29 VFs
[19:46:31] [PASSED] 30 VFs
[19:46:31] [PASSED] 31 VFs
[19:46:31] [PASSED] 32 VFs
[19:46:31] [PASSED] 33 VFs
[19:46:31] [PASSED] 34 VFs
[19:46:31] [PASSED] 35 VFs
[19:46:31] [PASSED] 36 VFs
[19:46:31] [PASSED] 37 VFs
[19:46:31] [PASSED] 38 VFs
[19:46:31] [PASSED] 39 VFs
[19:46:31] [PASSED] 40 VFs
[19:46:31] [PASSED] 41 VFs
[19:46:31] [PASSED] 42 VFs
[19:46:31] [PASSED] 43 VFs
[19:46:31] [PASSED] 44 VFs
[19:46:31] [PASSED] 45 VFs
[19:46:31] [PASSED] 46 VFs
[19:46:31] [PASSED] 47 VFs
[19:46:31] [PASSED] 48 VFs
[19:46:31] [PASSED] 49 VFs
[19:46:31] [PASSED] 50 VFs
[19:46:31] [PASSED] 51 VFs
[19:46:31] [PASSED] 52 VFs
[19:46:31] [PASSED] 53 VFs
[19:46:31] [PASSED] 54 VFs
[19:46:31] [PASSED] 55 VFs
[19:46:31] [PASSED] 56 VFs
[19:46:31] [PASSED] 57 VFs
[19:46:31] [PASSED] 58 VFs
[19:46:31] [PASSED] 59 VFs
[19:46:31] [PASSED] 60 VFs
[19:46:31] [PASSED] 61 VFs
[19:46:31] [PASSED] 62 VFs
[19:46:31] [PASSED] 63 VFs
[19:46:31] ================== [PASSED] fair_contexts ==================
[19:46:31] ===================== fair_doorbells ======================
[19:46:31] [PASSED] 1 VF
[19:46:31] [PASSED] 2 VFs
[19:46:31] [PASSED] 3 VFs
[19:46:31] [PASSED] 4 VFs
[19:46:31] [PASSED] 5 VFs
[19:46:31] [PASSED] 6 VFs
[19:46:31] [PASSED] 7 VFs
[19:46:31] [PASSED] 8 VFs
[19:46:31] [PASSED] 9 VFs
[19:46:31] [PASSED] 10 VFs
[19:46:31] [PASSED] 11 VFs
[19:46:31] [PASSED] 12 VFs
[19:46:31] [PASSED] 13 VFs
[19:46:31] [PASSED] 14 VFs
[19:46:31] [PASSED] 15 VFs
[19:46:31] [PASSED] 16 VFs
[19:46:31] [PASSED] 17 VFs
[19:46:31] [PASSED] 18 VFs
[19:46:31] [PASSED] 19 VFs
[19:46:31] [PASSED] 20 VFs
[19:46:31] [PASSED] 21 VFs
[19:46:31] [PASSED] 22 VFs
[19:46:31] [PASSED] 23 VFs
[19:46:31] [PASSED] 24 VFs
[19:46:31] [PASSED] 25 VFs
[19:46:31] [PASSED] 26 VFs
[19:46:31] [PASSED] 27 VFs
[19:46:31] [PASSED] 28 VFs
[19:46:31] [PASSED] 29 VFs
[19:46:31] [PASSED] 30 VFs
[19:46:31] [PASSED] 31 VFs
[19:46:31] [PASSED] 32 VFs
[19:46:31] [PASSED] 33 VFs
[19:46:31] [PASSED] 34 VFs
[19:46:31] [PASSED] 35 VFs
[19:46:31] [PASSED] 36 VFs
[19:46:31] [PASSED] 37 VFs
[19:46:31] [PASSED] 38 VFs
[19:46:31] [PASSED] 39 VFs
[19:46:31] [PASSED] 40 VFs
[19:46:31] [PASSED] 41 VFs
[19:46:31] [PASSED] 42 VFs
[19:46:31] [PASSED] 43 VFs
[19:46:31] [PASSED] 44 VFs
[19:46:31] [PASSED] 45 VFs
[19:46:31] [PASSED] 46 VFs
[19:46:31] [PASSED] 47 VFs
[19:46:31] [PASSED] 48 VFs
[19:46:31] [PASSED] 49 VFs
[19:46:31] [PASSED] 50 VFs
[19:46:31] [PASSED] 51 VFs
[19:46:31] [PASSED] 52 VFs
[19:46:31] [PASSED] 53 VFs
[19:46:31] [PASSED] 54 VFs
[19:46:31] [PASSED] 55 VFs
[19:46:31] [PASSED] 56 VFs
[19:46:31] [PASSED] 57 VFs
[19:46:31] [PASSED] 58 VFs
[19:46:31] [PASSED] 59 VFs
[19:46:31] [PASSED] 60 VFs
[19:46:31] [PASSED] 61 VFs
[19:46:31] [PASSED] 62 VFs
[19:46:31] [PASSED] 63 VFs
[19:46:31] ================= [PASSED] fair_doorbells ==================
[19:46:31] ======================== fair_ggtt ========================
[19:46:31] [PASSED] 1 VF
[19:46:31] [PASSED] 2 VFs
[19:46:31] [PASSED] 3 VFs
[19:46:31] [PASSED] 4 VFs
[19:46:31] [PASSED] 5 VFs
[19:46:31] [PASSED] 6 VFs
[19:46:31] [PASSED] 7 VFs
[19:46:31] [PASSED] 8 VFs
[19:46:31] [PASSED] 9 VFs
[19:46:31] [PASSED] 10 VFs
[19:46:31] [PASSED] 11 VFs
[19:46:31] [PASSED] 12 VFs
[19:46:31] [PASSED] 13 VFs
[19:46:31] [PASSED] 14 VFs
[19:46:31] [PASSED] 15 VFs
[19:46:31] [PASSED] 16 VFs
[19:46:31] [PASSED] 17 VFs
[19:46:31] [PASSED] 18 VFs
[19:46:31] [PASSED] 19 VFs
[19:46:31] [PASSED] 20 VFs
[19:46:31] [PASSED] 21 VFs
[19:46:31] [PASSED] 22 VFs
[19:46:31] [PASSED] 23 VFs
[19:46:31] [PASSED] 24 VFs
[19:46:31] [PASSED] 25 VFs
[19:46:31] [PASSED] 26 VFs
[19:46:31] [PASSED] 27 VFs
[19:46:31] [PASSED] 28 VFs
[19:46:31] [PASSED] 29 VFs
[19:46:31] [PASSED] 30 VFs
[19:46:31] [PASSED] 31 VFs
[19:46:31] [PASSED] 32 VFs
[19:46:31] [PASSED] 33 VFs
[19:46:31] [PASSED] 34 VFs
[19:46:31] [PASSED] 35 VFs
[19:46:31] [PASSED] 36 VFs
[19:46:31] [PASSED] 37 VFs
[19:46:31] [PASSED] 38 VFs
[19:46:31] [PASSED] 39 VFs
[19:46:31] [PASSED] 40 VFs
[19:46:31] [PASSED] 41 VFs
[19:46:31] [PASSED] 42 VFs
[19:46:31] [PASSED] 43 VFs
[19:46:31] [PASSED] 44 VFs
[19:46:31] [PASSED] 45 VFs
[19:46:31] [PASSED] 46 VFs
[19:46:31] [PASSED] 47 VFs
[19:46:31] [PASSED] 48 VFs
[19:46:31] [PASSED] 49 VFs
[19:46:31] [PASSED] 50 VFs
[19:46:31] [PASSED] 51 VFs
[19:46:31] [PASSED] 52 VFs
[19:46:31] [PASSED] 53 VFs
[19:46:31] [PASSED] 54 VFs
[19:46:31] [PASSED] 55 VFs
[19:46:31] [PASSED] 56 VFs
[19:46:31] [PASSED] 57 VFs
[19:46:31] [PASSED] 58 VFs
[19:46:31] [PASSED] 59 VFs
[19:46:31] [PASSED] 60 VFs
[19:46:31] [PASSED] 61 VFs
[19:46:31] [PASSED] 62 VFs
[19:46:31] [PASSED] 63 VFs
[19:46:31] ==================== [PASSED] fair_ggtt ====================
[19:46:31] ======================== fair_vram ========================
[19:46:31] [PASSED] 1 VF
[19:46:31] [PASSED] 2 VFs
[19:46:31] [PASSED] 3 VFs
[19:46:31] [PASSED] 4 VFs
[19:46:31] [PASSED] 5 VFs
[19:46:31] [PASSED] 6 VFs
[19:46:31] [PASSED] 7 VFs
[19:46:31] [PASSED] 8 VFs
[19:46:31] [PASSED] 9 VFs
[19:46:31] [PASSED] 10 VFs
[19:46:31] [PASSED] 11 VFs
[19:46:31] [PASSED] 12 VFs
[19:46:31] [PASSED] 13 VFs
[19:46:31] [PASSED] 14 VFs
[19:46:31] [PASSED] 15 VFs
[19:46:31] [PASSED] 16 VFs
[19:46:31] [PASSED] 17 VFs
[19:46:31] [PASSED] 18 VFs
[19:46:31] [PASSED] 19 VFs
[19:46:31] [PASSED] 20 VFs
[19:46:31] [PASSED] 21 VFs
[19:46:31] [PASSED] 22 VFs
[19:46:31] [PASSED] 23 VFs
[19:46:31] [PASSED] 24 VFs
[19:46:31] [PASSED] 25 VFs
[19:46:31] [PASSED] 26 VFs
[19:46:31] [PASSED] 27 VFs
[19:46:31] [PASSED] 28 VFs
[19:46:31] [PASSED] 29 VFs
[19:46:31] [PASSED] 30 VFs
[19:46:31] [PASSED] 31 VFs
[19:46:31] [PASSED] 32 VFs
[19:46:31] [PASSED] 33 VFs
[19:46:31] [PASSED] 34 VFs
[19:46:31] [PASSED] 35 VFs
[19:46:31] [PASSED] 36 VFs
[19:46:31] [PASSED] 37 VFs
[19:46:31] [PASSED] 38 VFs
[19:46:31] [PASSED] 39 VFs
[19:46:31] [PASSED] 40 VFs
[19:46:31] [PASSED] 41 VFs
[19:46:31] [PASSED] 42 VFs
[19:46:31] [PASSED] 43 VFs
[19:46:31] [PASSED] 44 VFs
[19:46:31] [PASSED] 45 VFs
[19:46:31] [PASSED] 46 VFs
[19:46:31] [PASSED] 47 VFs
[19:46:31] [PASSED] 48 VFs
[19:46:31] [PASSED] 49 VFs
[19:46:31] [PASSED] 50 VFs
[19:46:31] [PASSED] 51 VFs
[19:46:31] [PASSED] 52 VFs
[19:46:31] [PASSED] 53 VFs
[19:46:31] [PASSED] 54 VFs
[19:46:31] [PASSED] 55 VFs
[19:46:31] [PASSED] 56 VFs
[19:46:31] [PASSED] 57 VFs
[19:46:31] [PASSED] 58 VFs
[19:46:31] [PASSED] 59 VFs
[19:46:31] [PASSED] 60 VFs
[19:46:31] [PASSED] 61 VFs
[19:46:31] [PASSED] 62 VFs
[19:46:31] [PASSED] 63 VFs
[19:46:31] ==================== [PASSED] fair_vram ====================
[19:46:31] ================== [PASSED] pf_gt_config ===================
[19:46:31] ===================== lmtt (1 subtest) =====================
[19:46:31] ======================== test_ops =========================
[19:46:31] [PASSED] 2-level
[19:46:31] [PASSED] multi-level
[19:46:31] ==================== [PASSED] test_ops =====================
[19:46:31] ====================== [PASSED] lmtt =======================
[19:46:31] ================= sriov_packet (1 subtest) =================
[19:46:31] [PASSED] test_descriptor_init
[19:46:31] ================== [PASSED] sriov_packet ===================
[19:46:31] ================= pf_service (11 subtests) =================
[19:46:31] [PASSED] pf_negotiate_any
[19:46:31] [PASSED] pf_negotiate_base_match
[19:46:31] [PASSED] pf_negotiate_base_newer
[19:46:31] [PASSED] pf_negotiate_base_next
[19:46:31] [SKIPPED] pf_negotiate_base_older (no older minor)
[19:46:31] [PASSED] pf_negotiate_base_prev
[19:46:31] [PASSED] pf_negotiate_latest_match
[19:46:31] [PASSED] pf_negotiate_latest_newer
[19:46:31] [PASSED] pf_negotiate_latest_next
[19:46:31] [SKIPPED] pf_negotiate_latest_older (no older minor)
[19:46:31] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[19:46:31] =================== [PASSED] pf_service ====================
[19:46:31] ================= xe_guc_g2g (2 subtests) ==================
[19:46:31] ============== xe_live_guc_g2g_kunit_default ==============
[19:46:31] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[19:46:31] ============== xe_live_guc_g2g_kunit_allmem ===============
[19:46:31] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[19:46:31] =================== [SKIPPED] xe_guc_g2g ===================
[19:46:31] =================== xe_mocs (2 subtests) ===================
[19:46:31] ================ xe_live_mocs_kernel_kunit ================
[19:46:31] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[19:46:31] ================ xe_live_mocs_reset_kunit =================
[19:46:31] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[19:46:31] ==================== [SKIPPED] xe_mocs =====================
[19:46:31] ================= xe_migrate (3 subtests) ==================
[19:46:31] ================= xe_migrate_sanity_kunit =================
[19:46:31] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[19:46:31] ================== xe_validate_ccs_kunit ==================
[19:46:31] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[19:46:31] ============= xe_migrate_access_memory_kunit ==============
[19:46:31] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[19:46:31] =================== [SKIPPED] xe_migrate ===================
[19:46:31] ================== xe_dma_buf (1 subtest) ==================
[19:46:31] ==================== xe_dma_buf_kunit =====================
[19:46:31] ================ [SKIPPED] xe_dma_buf_kunit ================
[19:46:31] =================== [SKIPPED] xe_dma_buf ===================
[19:46:31] ================= xe_bo_shrink (1 subtest) =================
[19:46:31] =================== xe_bo_shrink_kunit ====================
[19:46:31] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[19:46:31] ================== [SKIPPED] xe_bo_shrink ==================
[19:46:31] ==================== xe_bo (2 subtests) ====================
[19:46:31] ================== xe_ccs_migrate_kunit ===================
[19:46:31] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[19:46:31] ==================== xe_bo_evict_kunit ====================
[19:46:31] =============== [SKIPPED] xe_bo_evict_kunit ================
[19:46:31] ===================== [SKIPPED] xe_bo ======================
[19:46:31] =================== xe_any (9 subtests) ====================
[19:46:31] [PASSED] test_to_xe
[19:46:31] [PASSED] test_to_dev
[19:46:31] [PASSED] test_to_pdev
[19:46:31] [PASSED] test_to_drm
[19:46:31] [PASSED] test_if_pdev
[19:46:31] [PASSED] test_if_xe
[19:46:31] [PASSED] test_if_tile
[19:46:31] [PASSED] test_if_gt
[19:46:31] [PASSED] test_to_id
[19:46:31] ===================== [PASSED] xe_any ======================
[19:46:31] ==================== args (13 subtests) ====================
[19:46:31] [PASSED] count_args_test
[19:46:31] [PASSED] call_args_example
[19:46:31] [PASSED] call_args_test
[19:46:31] [PASSED] drop_first_arg_example
[19:46:31] [PASSED] drop_first_arg_test
[19:46:31] [PASSED] first_arg_example
[19:46:31] [PASSED] first_arg_test
[19:46:31] [PASSED] last_arg_example
[19:46:31] [PASSED] last_arg_test
[19:46:31] [PASSED] pick_arg_example
[19:46:31] [PASSED] if_args_example
[19:46:31] [PASSED] if_args_test
[19:46:31] [PASSED] sep_comma_example
[19:46:31] ====================== [PASSED] args =======================
[19:46:31] =================== xe_pci (3 subtests) ====================
[19:46:31] ==================== check_graphics_ip ====================
[19:46:31] [PASSED] 12.00 Xe_LP
[19:46:31] [PASSED] 12.10 Xe_LP+
[19:46:31] [PASSED] 12.55 Xe_HPG
[19:46:31] [PASSED] 12.60 Xe_HPC
[19:46:31] [PASSED] 12.70 Xe_LPG
[19:46:31] [PASSED] 12.71 Xe_LPG
[19:46:31] [PASSED] 12.74 Xe_LPG+
[19:46:31] [PASSED] 20.01 Xe2_HPG
[19:46:31] [PASSED] 20.02 Xe2_HPG
[19:46:31] [PASSED] 20.04 Xe2_LPG
[19:46:31] [PASSED] 30.00 Xe3_LPG
[19:46:31] [PASSED] 30.01 Xe3_LPG
[19:46:31] [PASSED] 30.03 Xe3_LPG
[19:46:31] [PASSED] 30.04 Xe3_LPG
[19:46:31] [PASSED] 30.05 Xe3_LPG
[19:46:31] [PASSED] 35.10 Xe3p_LPG
[19:46:31] [PASSED] 35.11 Xe3p_XPC
[19:46:31] ================ [PASSED] check_graphics_ip ================
[19:46:31] ===================== check_media_ip ======================
[19:46:31] [PASSED] 12.00 Xe_M
[19:46:31] [PASSED] 12.55 Xe_HPM
[19:46:31] [PASSED] 13.00 Xe_LPM+
[19:46:31] [PASSED] 13.01 Xe2_HPM
[19:46:31] [PASSED] 20.00 Xe2_LPM
[19:46:31] [PASSED] 30.00 Xe3_LPM
[19:46:31] [PASSED] 30.02 Xe3_LPM
[19:46:31] [PASSED] 35.00 Xe3p_LPM
[19:46:31] [PASSED] 35.03 Xe3p_HPM
[19:46:31] ================= [PASSED] check_media_ip ==================
[19:46:31] =================== check_platform_desc ===================
[19:46:31] [PASSED] 0x9A60 (TIGERLAKE)
[19:46:31] [PASSED] 0x9A68 (TIGERLAKE)
[19:46:31] [PASSED] 0x9A70 (TIGERLAKE)
[19:46:31] [PASSED] 0x9A40 (TIGERLAKE)
[19:46:31] [PASSED] 0x9A49 (TIGERLAKE)
[19:46:31] [PASSED] 0x9A59 (TIGERLAKE)
[19:46:31] [PASSED] 0x9A78 (TIGERLAKE)
[19:46:31] [PASSED] 0x9AC0 (TIGERLAKE)
[19:46:31] [PASSED] 0x9AC9 (TIGERLAKE)
[19:46:31] [PASSED] 0x9AD9 (TIGERLAKE)
[19:46:31] [PASSED] 0x9AF8 (TIGERLAKE)
[19:46:31] [PASSED] 0x4C80 (ROCKETLAKE)
[19:46:31] [PASSED] 0x4C8A (ROCKETLAKE)
[19:46:31] [PASSED] 0x4C8B (ROCKETLAKE)
[19:46:31] [PASSED] 0x4C8C (ROCKETLAKE)
[19:46:31] [PASSED] 0x4C90 (ROCKETLAKE)
[19:46:31] [PASSED] 0x4C9A (ROCKETLAKE)
[19:46:31] [PASSED] 0x4680 (ALDERLAKE_S)
[19:46:31] [PASSED] 0x4682 (ALDERLAKE_S)
[19:46:31] [PASSED] 0x4688 (ALDERLAKE_S)
[19:46:31] [PASSED] 0x468A (ALDERLAKE_S)
[19:46:31] [PASSED] 0x468B (ALDERLAKE_S)
[19:46:31] [PASSED] 0x4690 (ALDERLAKE_S)
[19:46:31] [PASSED] 0x4692 (ALDERLAKE_S)
[19:46:31] [PASSED] 0x4693 (ALDERLAKE_S)
[19:46:31] [PASSED] 0x46A0 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46A1 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46A2 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46A3 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46A6 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46A8 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46AA (ALDERLAKE_P)
[19:46:31] [PASSED] 0x462A (ALDERLAKE_P)
[19:46:31] [PASSED] 0x4626 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x4628 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46B0 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46B1 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46B2 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46B3 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46C0 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46C1 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46C2 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46C3 (ALDERLAKE_P)
[19:46:31] [PASSED] 0x46D0 (ALDERLAKE_N)
[19:46:31] [PASSED] 0x46D1 (ALDERLAKE_N)
[19:46:31] [PASSED] 0x46D2 (ALDERLAKE_N)
[19:46:31] [PASSED] 0x46D3 (ALDERLAKE_N)
[19:46:31] [PASSED] 0x46D4 (ALDERLAKE_N)
[19:46:31] [PASSED] 0xA721 (ALDERLAKE_P)
[19:46:31] [PASSED] 0xA7A1 (ALDERLAKE_P)
[19:46:31] [PASSED] 0xA7A9 (ALDERLAKE_P)
[19:46:31] [PASSED] 0xA7AC (ALDERLAKE_P)
[19:46:31] [PASSED] 0xA7AD (ALDERLAKE_P)
[19:46:31] [PASSED] 0xA720 (ALDERLAKE_P)
[19:46:31] [PASSED] 0xA7A0 (ALDERLAKE_P)
[19:46:31] [PASSED] 0xA7A8 (ALDERLAKE_P)
[19:46:31] [PASSED] 0xA7AA (ALDERLAKE_P)
[19:46:31] [PASSED] 0xA7AB (ALDERLAKE_P)
[19:46:31] [PASSED] 0xA780 (ALDERLAKE_S)
[19:46:31] [PASSED] 0xA781 (ALDERLAKE_S)
[19:46:31] [PASSED] 0xA782 (ALDERLAKE_S)
[19:46:31] [PASSED] 0xA783 (ALDERLAKE_S)
[19:46:31] [PASSED] 0xA788 (ALDERLAKE_S)
[19:46:31] [PASSED] 0xA789 (ALDERLAKE_S)
[19:46:31] [PASSED] 0xA78A (ALDERLAKE_S)
[19:46:31] [PASSED] 0xA78B (ALDERLAKE_S)
[19:46:31] [PASSED] 0x4905 (DG1)
[19:46:31] [PASSED] 0x4906 (DG1)
[19:46:31] [PASSED] 0x4907 (DG1)
[19:46:31] [PASSED] 0x4908 (DG1)
[19:46:31] [PASSED] 0x4909 (DG1)
[19:46:31] [PASSED] 0x56C0 (DG2)
[19:46:31] [PASSED] 0x56C2 (DG2)
[19:46:31] [PASSED] 0x56C1 (DG2)
[19:46:31] [PASSED] 0x7D51 (METEORLAKE)
[19:46:31] [PASSED] 0x7DD1 (METEORLAKE)
[19:46:31] [PASSED] 0x7D41 (METEORLAKE)
[19:46:31] [PASSED] 0x7D67 (METEORLAKE)
[19:46:31] [PASSED] 0xB640 (METEORLAKE)
[19:46:31] [PASSED] 0x56A0 (DG2)
[19:46:31] [PASSED] 0x56A1 (DG2)
[19:46:31] [PASSED] 0x56A2 (DG2)
[19:46:31] [PASSED] 0x56BE (DG2)
[19:46:31] [PASSED] 0x56BF (DG2)
[19:46:31] [PASSED] 0x5690 (DG2)
[19:46:31] [PASSED] 0x5691 (DG2)
[19:46:31] [PASSED] 0x5692 (DG2)
[19:46:31] [PASSED] 0x56A5 (DG2)
[19:46:31] [PASSED] 0x56A6 (DG2)
[19:46:31] [PASSED] 0x56B0 (DG2)
[19:46:31] [PASSED] 0x56B1 (DG2)
[19:46:31] [PASSED] 0x56BA (DG2)
[19:46:31] [PASSED] 0x56BB (DG2)
[19:46:31] [PASSED] 0x56BC (DG2)
[19:46:31] [PASSED] 0x56BD (DG2)
[19:46:31] [PASSED] 0x5693 (DG2)
[19:46:31] [PASSED] 0x5694 (DG2)
[19:46:31] [PASSED] 0x5695 (DG2)
[19:46:31] [PASSED] 0x56A3 (DG2)
[19:46:31] [PASSED] 0x56A4 (DG2)
[19:46:31] [PASSED] 0x56B2 (DG2)
[19:46:31] [PASSED] 0x56B3 (DG2)
[19:46:31] [PASSED] 0x5696 (DG2)
[19:46:31] [PASSED] 0x5697 (DG2)
[19:46:31] [PASSED] 0xB69 (PVC)
[19:46:31] [PASSED] 0xB6E (PVC)
[19:46:31] [PASSED] 0xBD4 (PVC)
[19:46:31] [PASSED] 0xBD5 (PVC)
[19:46:31] [PASSED] 0xBD6 (PVC)
[19:46:31] [PASSED] 0xBD7 (PVC)
[19:46:31] [PASSED] 0xBD8 (PVC)
[19:46:31] [PASSED] 0xBD9 (PVC)
[19:46:31] [PASSED] 0xBDA (PVC)
[19:46:31] [PASSED] 0xBDB (PVC)
[19:46:31] [PASSED] 0xBE0 (PVC)
[19:46:31] [PASSED] 0xBE1 (PVC)
[19:46:31] [PASSED] 0xBE5 (PVC)
[19:46:31] [PASSED] 0x7D40 (METEORLAKE)
[19:46:31] [PASSED] 0x7D45 (METEORLAKE)
[19:46:31] [PASSED] 0x7D55 (METEORLAKE)
[19:46:31] [PASSED] 0x7D60 (METEORLAKE)
[19:46:31] [PASSED] 0x7DD5 (METEORLAKE)
[19:46:31] [PASSED] 0x6420 (LUNARLAKE)
[19:46:31] [PASSED] 0x64A0 (LUNARLAKE)
[19:46:31] [PASSED] 0x64B0 (LUNARLAKE)
[19:46:31] [PASSED] 0xE202 (BATTLEMAGE)
[19:46:31] [PASSED] 0xE209 (BATTLEMAGE)
[19:46:31] [PASSED] 0xE20B (BATTLEMAGE)
[19:46:31] [PASSED] 0xE20C (BATTLEMAGE)
[19:46:31] [PASSED] 0xE20D (BATTLEMAGE)
[19:46:31] [PASSED] 0xE210 (BATTLEMAGE)
[19:46:31] [PASSED] 0xE211 (BATTLEMAGE)
[19:46:31] [PASSED] 0xE212 (BATTLEMAGE)
[19:46:31] [PASSED] 0xE216 (BATTLEMAGE)
[19:46:31] [PASSED] 0xE220 (BATTLEMAGE)
[19:46:31] [PASSED] 0xE221 (BATTLEMAGE)
[19:46:31] [PASSED] 0xE222 (BATTLEMAGE)
[19:46:31] [PASSED] 0xE223 (BATTLEMAGE)
[19:46:31] [PASSED] 0xB080 (PANTHERLAKE)
[19:46:31] [PASSED] 0xB081 (PANTHERLAKE)
[19:46:31] [PASSED] 0xB082 (PANTHERLAKE)
[19:46:31] [PASSED] 0xB083 (PANTHERLAKE)
[19:46:31] [PASSED] 0xB084 (PANTHERLAKE)
[19:46:31] [PASSED] 0xB085 (PANTHERLAKE)
[19:46:31] [PASSED] 0xB086 (PANTHERLAKE)
[19:46:31] [PASSED] 0xB087 (PANTHERLAKE)
[19:46:31] [PASSED] 0xB08F (PANTHERLAKE)
[19:46:31] [PASSED] 0xB090 (PANTHERLAKE)
[19:46:31] [PASSED] 0xB0A0 (PANTHERLAKE)
[19:46:31] [PASSED] 0xB0A1 (PANTHERLAKE)
[19:46:31] [PASSED] 0xB0B0 (PANTHERLAKE)
[19:46:31] [PASSED] 0xFD80 (PANTHERLAKE)
[19:46:31] [PASSED] 0xFD81 (PANTHERLAKE)
[19:46:31] [PASSED] 0xD740 (NOVALAKE_S)
[19:46:31] [PASSED] 0xD741 (NOVALAKE_S)
[19:46:31] [PASSED] 0xD742 (NOVALAKE_S)
[19:46:31] [PASSED] 0xD743 (NOVALAKE_S)
[19:46:31] [PASSED] 0xD745 (NOVALAKE_S)
[19:46:31] [PASSED] 0xD74A (NOVALAKE_S)
[19:46:31] [PASSED] 0xD74B (NOVALAKE_S)
[19:46:31] [PASSED] 0x674C (CRESCENTISLAND)
[19:46:31] [PASSED] 0x674D (CRESCENTISLAND)
[19:46:31] [PASSED] 0x674E (CRESCENTISLAND)
[19:46:31] [PASSED] 0x674F (CRESCENTISLAND)
[19:46:31] [PASSED] 0x6750 (CRESCENTISLAND)
[19:46:31] [PASSED] 0x6751 (CRESCENTISLAND)
[19:46:31] [PASSED] 0x6752 (CRESCENTISLAND)
[19:46:31] [PASSED] 0xD750 (NOVALAKE_P)
[19:46:31] [PASSED] 0xD751 (NOVALAKE_P)
[19:46:31] [PASSED] 0xD752 (NOVALAKE_P)
[19:46:31] [PASSED] 0xD753 (NOVALAKE_P)
[19:46:31] [PASSED] 0xD754 (NOVALAKE_P)
[19:46:31] [PASSED] 0xD755 (NOVALAKE_P)
[19:46:31] [PASSED] 0xD756 (NOVALAKE_P)
[19:46:31] [PASSED] 0xD757 (NOVALAKE_P)
[19:46:31] [PASSED] 0xD75F (NOVALAKE_P)
[19:46:31] =============== [PASSED] check_platform_desc ===============
[19:46:31] ===================== [PASSED] xe_pci ======================
[19:46:31] ============= xe_rtp_tables_test (5 subtests) ==============
[19:46:31] ================== xe_rtp_table_gt_test ===================
[19:46:31] [PASSED] gt_was/14011060649
[19:46:31] [PASSED] gt_was/14011059788
[19:46:31] [PASSED] gt_was/14015795083
[19:46:31] [PASSED] gt_was/16021867713
[19:46:31] [PASSED] gt_was/14019449301
[19:46:31] [PASSED] gt_was/16028005424
[19:46:31] [PASSED] gt_was/14026578760
[19:46:31] [PASSED] gt_was/1409420604
[19:46:31] [PASSED] gt_was/1408615072
[19:46:31] [PASSED] gt_was/22010523718
[19:46:31] [PASSED] gt_was/14011006942
[19:46:31] [PASSED] gt_was/14014830051
[19:46:31] [PASSED] gt_was/18018781329
[19:46:31] [PASSED] gt_was/1509235366
[19:46:31] [PASSED] gt_was/18018781329
[19:46:31] [PASSED] gt_was/16016694945
[19:46:31] [PASSED] gt_was/14018575942
[19:46:31] [PASSED] gt_was/22016670082
[19:46:31] [PASSED] gt_was/22016670082
[19:46:31] [PASSED] gt_was/14017421178
[19:46:31] [PASSED] gt_was/16025250150
[19:46:31] [PASSED] gt_was/14021871409
[19:46:31] [PASSED] gt_was/16021865536
[19:46:31] [PASSED] gt_was/14021486841
[19:46:31] [PASSED] gt_was/14025160223
[19:46:31] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[19:46:31] [PASSED] gt_was/14025635424
[19:46:31] [PASSED] gt_was/16028005424
[19:46:31] ============== [PASSED] xe_rtp_table_gt_test ===============
[19:46:31] ================== xe_rtp_table_gt_test ===================
[19:46:31] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[19:46:31] [PASSED] gt_tunings/Tuning: 32B Access Enable
[19:46:31] [PASSED] gt_tunings/Tuning: L3 cache
[19:46:31] [PASSED] gt_tunings/Tuning: L3 cache - media
[19:46:31] [PASSED] gt_tunings/Tuning: Compression Overfetch
[19:46:31] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[19:46:31] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[19:46:31] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[19:46:31] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[19:46:31] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[19:46:31] [PASSED] gt_tunings/Tuning: Stateless compression control
[19:46:31] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[19:46:31] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[19:46:31] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[19:46:31] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[19:46:31] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[19:46:31] ============== [PASSED] xe_rtp_table_gt_test ===============
[19:46:31] ================== xe_rtp_table_oob_test ==================
[19:46:31] [PASSED] oob_was/1607983814
[19:46:31] [PASSED] oob_was/16010904313
[19:46:31] [PASSED] oob_was/18022495364
[19:46:31] [PASSED] oob_was/22012773006
[19:46:31] [PASSED] oob_was/14014475959
[19:46:31] [PASSED] oob_was/22011391025
[19:46:31] [PASSED] oob_was/22012727170
[19:46:31] [PASSED] oob_was/22012727685
[19:46:31] [PASSED] oob_was/22016596838
[19:46:31] [PASSED] oob_was/18020744125
[19:46:31] [PASSED] oob_was/1409600907
[19:46:31] [PASSED] oob_was/22014953428
[19:46:31] [PASSED] oob_was/16017236439
[19:46:31] [PASSED] oob_was/14019821291
[19:46:31] [PASSED] oob_was/14015076503
[19:46:31] [PASSED] oob_was/22016122933
[19:46:31] [PASSED] oob_was/14018913170
[19:46:31] [PASSED] oob_was/14018094691
[19:46:31] [PASSED] oob_was/18024947630
[19:46:31] [PASSED] oob_was/16022287689
[19:46:31] [PASSED] oob_was/13011645652
[19:46:31] [PASSED] oob_was/14022293748
[19:46:31] [PASSED] oob_was/22019794406
[19:46:31] [PASSED] oob_was/22019338487
[19:46:31] [PASSED] oob_was/16023588340
[19:46:31] [PASSED] oob_was/14019789679
[19:46:31] [PASSED] oob_was/14022866841
[19:46:31] [PASSED] oob_was/16021333562
[19:46:31] [PASSED] oob_was/14016712196
[19:46:31] [PASSED] oob_was/14015568240
[19:46:31] [PASSED] oob_was/18013179988
[19:46:31] [PASSED] oob_was/1508761755
[19:46:31] [PASSED] oob_was/16023105232
[19:46:31] [PASSED] oob_was/16026508708
[19:46:31] [PASSED] oob_was/14020001231
[19:46:31] [PASSED] oob_was/16023683509
[19:46:31] [PASSED] oob_was/14025515070
[19:46:31] [PASSED] oob_was/15015404425_disable
[19:46:31] [PASSED] oob_was/16026007364
[19:46:31] [PASSED] oob_was/14020316580
[19:46:31] [PASSED] oob_was/14025883347
[19:46:31] [PASSED] oob_was/16029380221
[19:46:31] [PASSED] oob_was/22022079272
[19:46:31] [PASSED] oob_was/16029897822
[19:46:31] [PASSED] oob_was/14026539277
[19:46:31] [PASSED] oob_was/14027054324
[19:46:31] [PASSED] oob_was/14025941587
[19:46:31] [PASSED] oob_was/16030224309
[19:46:31] [PASSED] oob_was/14028709524
[19:46:31] [PASSED] oob_was/14028250015
[19:46:31] [PASSED] oob_was/16031259911
[19:46:31] ============== [PASSED] xe_rtp_table_oob_test ==============
[19:46:31] ================ xe_rtp_table_dev_oob_test ================
[19:46:31] [PASSED] device_oob_was/22010954014
[19:46:31] [PASSED] device_oob_was/15015404425
[19:46:31] [PASSED] device_oob_was/22019338487_display
[19:46:31] [PASSED] device_oob_was/14022085890
[19:46:31] [PASSED] device_oob_was/14026633728
[19:46:31] [PASSED] device_oob_was/14026746987
[19:46:31] [PASSED] device_oob_was/14026779378
[19:46:31] [PASSED] device_oob_was/14028586678
[19:46:31] [PASSED] device_oob_was/14028434957
[19:46:31] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[19:46:31] ========== xe_rtp_table_missing_upper_bound_test ==========
[19:46:31] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[19:46:31] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[19:46:31] [PASSED] register_whitelist/1806527549
[19:46:31] [PASSED] register_whitelist/allow_read_ctx_timestamp
[19:46:31] [PASSED] register_whitelist/allow_read_queue_timestamp
[19:46:31] [PASSED] register_whitelist/16014440446
[19:46:31] [PASSED] register_whitelist/16017236439
[19:46:31] [PASSED] register_whitelist/16020183090
[19:46:31] [PASSED] register_whitelist/14024997852
[19:46:31] [PASSED] register_whitelist/14024997852
[19:46:31] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[19:46:31] =============== [PASSED] xe_rtp_tables_test ================
[19:46:31] =================== xe_rtp (3 subtests) ====================
[19:46:31] =================== xe_rtp_rules_tests ====================
[19:46:31] [PASSED] no
[19:46:31] [PASSED] yes
[19:46:31] [PASSED] no-and-no
[19:46:31] [PASSED] no-and-yes
[19:46:31] [PASSED] yes-and-no
[19:46:31] [PASSED] yes-and-yes
[19:46:31] [PASSED] no-or-no
[19:46:31] [PASSED] no-or-yes
[19:46:31] [PASSED] yes-or-no
[19:46:31] [PASSED] yes-or-yes
[19:46:31] [PASSED] no-yes-or-yes-no
[19:46:31] [PASSED] no-yes-or-yes-yes
[19:46:31] [PASSED] yes-yes-or-no-yes
[19:46:31] [PASSED] yes-yes-or-yes-yes
[19:46:31] [PASSED] no-no-or-yes-or-no
[19:46:31] [PASSED] or
[19:46:31] [PASSED] or-yes
[19:46:31] [PASSED] or-no
[19:46:31] [PASSED] yes-or
[19:46:31] [PASSED] no-or
[19:46:31] [PASSED] no-or-or-yes
[19:46:31] [PASSED] yes-or-or-no
[19:46:31] [PASSED] no-or-or-no
[19:46:31] [PASSED] missing-context-engine-class
[19:46:31] [PASSED] missing-context-engine-class-or-yes
[19:46:31] [PASSED] missing-context-engine-class-or-or-yes
[19:46:31] =============== [PASSED] xe_rtp_rules_tests ================
[19:46:31] =============== xe_rtp_process_to_sr_tests ================
[19:46:31] [PASSED] coalesce-same-reg
[19:46:31] [PASSED] coalesce-same-reg-literal-and-func
[19:46:31] [PASSED] no-match-no-add
[19:46:31] [PASSED] two-regs-two-entries
[19:46:31] [PASSED] clr-one-set-other
[19:46:31] [PASSED] set-field
[19:46:31] [PASSED] conflict-duplicate
[19:46:31] [PASSED] conflict-not-disjoint
[19:46:31] [PASSED] conflict-not-disjoint-literal-and-func
[19:46:31] [PASSED] conflict-reg-type
[19:46:31] [PASSED] bad-mcr-reg-forced-to-regular
[19:46:31] [PASSED] bad-regular-reg-forced-to-mcr
[19:46:31] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[19:46:31] ================== xe_rtp_process_tests ===================
[19:46:31] [PASSED] active1
[19:46:31] [PASSED] active2
[19:46:31] [PASSED] active-inactive
[19:46:31] [PASSED] inactive-active
[19:46:31] [PASSED] inactive-active-inactive
[19:46:31] [PASSED] inactive-inactive-inactive
[19:46:31] ============== [PASSED] xe_rtp_process_tests ===============
[19:46:31] ===================== [PASSED] xe_rtp ======================
[19:46:31] ==================== xe_wa (1 subtest) =====================
[19:46:31] ======================== xe_wa_gt =========================
[19:46:31] [PASSED] TIGERLAKE B0
[19:46:31] [PASSED] DG1 A0
[19:46:31] [PASSED] DG1 B0
[19:46:31] [PASSED] ALDERLAKE_S A0
[19:46:31] [PASSED] ALDERLAKE_S B0
[19:46:31] [PASSED] ALDERLAKE_S C0
[19:46:31] [PASSED] ALDERLAKE_S D0
[19:46:31] [PASSED] ALDERLAKE_P A0
[19:46:31] [PASSED] ALDERLAKE_P B0
[19:46:31] [PASSED] ALDERLAKE_P C0
[19:46:31] [PASSED] ALDERLAKE_S RPLS D0
[19:46:31] [PASSED] ALDERLAKE_P RPLU E0
[19:46:31] [PASSED] DG2 G10 C0
[19:46:31] [PASSED] DG2 G11 B1
[19:46:31] [PASSED] DG2 G12 A1
[19:46:31] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[19:46:31] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[19:46:31] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[19:46:31] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[19:46:31] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[19:46:31] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[19:46:31] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[19:46:31] ==================== [PASSED] xe_wa_gt =====================
[19:46:31] ====================== [PASSED] xe_wa ======================
[19:46:31] ============================================================
[19:46:31] Testing complete. Ran 844 tests: passed: 815, skipped: 29
[19:46:31] Elapsed time: 41.736s total, 2.556s configuring, 38.463s building, 0.709s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[19:46:31] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:46:34] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:46:59] Starting KUnit Kernel (1/1)...
[19:46:59] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:46:59] ============ drm_test_pick_cmdline (2 subtests) ============
[19:46:59] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[19:46:59] =============== drm_test_pick_cmdline_named ===============
[19:46:59] [PASSED] NTSC
[19:46:59] [PASSED] NTSC-J
[19:46:59] [PASSED] PAL
[19:46:59] [PASSED] PAL-M
[19:46:59] =========== [PASSED] drm_test_pick_cmdline_named ===========
[19:46:59] ============== [PASSED] drm_test_pick_cmdline ==============
[19:46:59] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[19:46:59] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[19:46:59] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[19:46:59] =========== drm_validate_clone_mode (2 subtests) ===========
[19:46:59] ============== drm_test_check_in_clone_mode ===============
[19:46:59] [PASSED] in_clone_mode
[19:46:59] [PASSED] not_in_clone_mode
[19:46:59] ========== [PASSED] drm_test_check_in_clone_mode ===========
[19:46:59] =============== drm_test_check_valid_clones ===============
[19:46:59] [PASSED] not_in_clone_mode
[19:46:59] [PASSED] valid_clone
[19:46:59] [PASSED] invalid_clone
[19:46:59] =========== [PASSED] drm_test_check_valid_clones ===========
[19:46:59] ============= [PASSED] drm_validate_clone_mode =============
[19:46:59] ============= drm_validate_modeset (1 subtest) =============
[19:46:59] [PASSED] drm_test_check_connector_changed_modeset
[19:46:59] ============== [PASSED] drm_validate_modeset ===============
[19:46:59] ====== drm_test_bridge_get_current_state (1 subtest) =======
[19:46:59] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[19:46:59] ======== [PASSED] drm_test_bridge_get_current_state ========
[19:46:59] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[19:46:59] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[19:46:59] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[19:46:59] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[19:46:59] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[19:46:59] ============== drm_bridge_alloc (2 subtests) ===============
[19:46:59] [PASSED] drm_test_drm_bridge_alloc_basic
[19:46:59] [PASSED] drm_test_drm_bridge_alloc_get_put
[19:46:59] ================ [PASSED] drm_bridge_alloc =================
[19:46:59] ============= drm_bridge_bus_fmt (5 subtests) ==============
[19:46:59] [PASSED] drm_test_bridge_rgb_yuv_rgb
[19:46:59] [PASSED] drm_test_bridge_must_convert_to_yuv444
[19:46:59] [PASSED] drm_test_bridge_hdmi_auto_rgb
[19:46:59] [PASSED] drm_test_bridge_auto_first
[19:46:59] [PASSED] drm_test_bridge_rgb_yuv_no_path
[19:46:59] =============== [PASSED] drm_bridge_bus_fmt ================
[19:46:59] ============= drm_cmdline_parser (40 subtests) =============
[19:46:59] [PASSED] drm_test_cmdline_force_d_only
[19:46:59] [PASSED] drm_test_cmdline_force_D_only_dvi
[19:46:59] [PASSED] drm_test_cmdline_force_D_only_hdmi
[19:46:59] [PASSED] drm_test_cmdline_force_D_only_not_digital
[19:46:59] [PASSED] drm_test_cmdline_force_e_only
[19:46:59] [PASSED] drm_test_cmdline_res
[19:46:59] [PASSED] drm_test_cmdline_res_vesa
[19:46:59] [PASSED] drm_test_cmdline_res_vesa_rblank
[19:46:59] [PASSED] drm_test_cmdline_res_rblank
[19:46:59] [PASSED] drm_test_cmdline_res_bpp
[19:46:59] [PASSED] drm_test_cmdline_res_refresh
[19:46:59] [PASSED] drm_test_cmdline_res_bpp_refresh
[19:46:59] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[19:46:59] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[19:46:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[19:46:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[19:46:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[19:46:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[19:46:59] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[19:46:59] [PASSED] drm_test_cmdline_res_margins_force_on
[19:46:59] [PASSED] drm_test_cmdline_res_vesa_margins
[19:46:59] [PASSED] drm_test_cmdline_name
[19:46:59] [PASSED] drm_test_cmdline_name_bpp
[19:46:59] [PASSED] drm_test_cmdline_name_option
[19:46:59] [PASSED] drm_test_cmdline_name_bpp_option
[19:46:59] [PASSED] drm_test_cmdline_rotate_0
[19:46:59] [PASSED] drm_test_cmdline_rotate_90
[19:46:59] [PASSED] drm_test_cmdline_rotate_180
[19:46:59] [PASSED] drm_test_cmdline_rotate_270
[19:46:59] [PASSED] drm_test_cmdline_hmirror
[19:46:59] [PASSED] drm_test_cmdline_vmirror
[19:46:59] [PASSED] drm_test_cmdline_margin_options
[19:46:59] [PASSED] drm_test_cmdline_multiple_options
[19:46:59] [PASSED] drm_test_cmdline_bpp_extra_and_option
[19:46:59] [PASSED] drm_test_cmdline_extra_and_option
[19:46:59] [PASSED] drm_test_cmdline_freestanding_options
[19:46:59] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[19:46:59] [PASSED] drm_test_cmdline_panel_orientation
[19:46:59] ================ drm_test_cmdline_invalid =================
[19:46:59] [PASSED] margin_only
[19:46:59] [PASSED] interlace_only
[19:46:59] [PASSED] res_missing_x
[19:46:59] [PASSED] res_missing_y
[19:46:59] [PASSED] res_bad_y
[19:46:59] [PASSED] res_missing_y_bpp
[19:46:59] [PASSED] res_bad_bpp
[19:46:59] [PASSED] res_bad_refresh
[19:46:59] [PASSED] res_bpp_refresh_force_on_off
[19:46:59] [PASSED] res_invalid_mode
[19:46:59] [PASSED] res_bpp_wrong_place_mode
[19:46:59] [PASSED] name_bpp_refresh
[19:46:59] [PASSED] name_refresh
[19:46:59] [PASSED] name_refresh_wrong_mode
[19:46:59] [PASSED] name_refresh_invalid_mode
[19:46:59] [PASSED] rotate_multiple
[19:46:59] [PASSED] rotate_invalid_val
[19:46:59] [PASSED] rotate_truncated
[19:46:59] [PASSED] invalid_option
[19:46:59] [PASSED] invalid_tv_option
[19:46:59] [PASSED] truncated_tv_option
[19:46:59] ============ [PASSED] drm_test_cmdline_invalid =============
[19:46:59] =============== drm_test_cmdline_tv_options ===============
[19:46:59] [PASSED] NTSC
[19:46:59] [PASSED] NTSC_443
[19:46:59] [PASSED] NTSC_J
[19:46:59] [PASSED] PAL
[19:46:59] [PASSED] PAL_M
[19:46:59] [PASSED] PAL_N
[19:46:59] [PASSED] SECAM
[19:46:59] [PASSED] MONO_525
[19:46:59] [PASSED] MONO_625
[19:46:59] =========== [PASSED] drm_test_cmdline_tv_options ===========
[19:46:59] =============== [PASSED] drm_cmdline_parser ================
[19:46:59] ========== drmm_connector_hdmi_init (20 subtests) ==========
[19:46:59] [PASSED] drm_test_connector_hdmi_init_valid
[19:46:59] [PASSED] drm_test_connector_hdmi_init_bpc_8
[19:46:59] [PASSED] drm_test_connector_hdmi_init_bpc_10
[19:46:59] [PASSED] drm_test_connector_hdmi_init_bpc_12
[19:46:59] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[19:46:59] [PASSED] drm_test_connector_hdmi_init_bpc_null
[19:46:59] [PASSED] drm_test_connector_hdmi_init_formats_empty
[19:46:59] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[19:46:59] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[19:46:59] [PASSED] supported_formats=0x9 yuv420_allowed=1
[19:46:59] [PASSED] supported_formats=0x9 yuv420_allowed=0
[19:46:59] [PASSED] supported_formats=0x5 yuv420_allowed=1
[19:46:59] [PASSED] supported_formats=0x5 yuv420_allowed=0
[19:46:59] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[19:46:59] [PASSED] drm_test_connector_hdmi_init_null_ddc
[19:46:59] [PASSED] drm_test_connector_hdmi_init_null_product
[19:46:59] [PASSED] drm_test_connector_hdmi_init_null_vendor
[19:46:59] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[19:46:59] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[19:46:59] [PASSED] drm_test_connector_hdmi_init_product_valid
[19:46:59] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[19:46:59] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[19:46:59] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[19:46:59] ========= drm_test_connector_hdmi_init_type_valid =========
[19:46:59] [PASSED] HDMI-A
[19:46:59] [PASSED] HDMI-B
[19:46:59] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[19:46:59] ======== drm_test_connector_hdmi_init_type_invalid ========
[19:46:59] [PASSED] Unknown
[19:46:59] [PASSED] VGA
[19:46:59] [PASSED] DVI-I
[19:46:59] [PASSED] DVI-D
[19:46:59] [PASSED] DVI-A
[19:46:59] [PASSED] Composite
[19:46:59] [PASSED] SVIDEO
[19:46:59] [PASSED] LVDS
[19:46:59] [PASSED] Component
[19:46:59] [PASSED] DIN
[19:46:59] [PASSED] DP
[19:46:59] [PASSED] TV
[19:46:59] [PASSED] eDP
[19:46:59] [PASSED] Virtual
[19:46:59] [PASSED] DSI
[19:46:59] [PASSED] DPI
[19:46:59] [PASSED] Writeback
[19:46:59] [PASSED] SPI
[19:46:59] [PASSED] USB
[19:46:59] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[19:46:59] ============ [PASSED] drmm_connector_hdmi_init =============
[19:46:59] ============= drmm_connector_init (3 subtests) =============
[19:46:59] [PASSED] drm_test_drmm_connector_init
[19:46:59] [PASSED] drm_test_drmm_connector_init_null_ddc
[19:46:59] ========= drm_test_drmm_connector_init_type_valid =========
[19:46:59] [PASSED] Unknown
[19:46:59] [PASSED] VGA
[19:46:59] [PASSED] DVI-I
[19:46:59] [PASSED] DVI-D
[19:46:59] [PASSED] DVI-A
[19:46:59] [PASSED] Composite
[19:46:59] [PASSED] SVIDEO
[19:46:59] [PASSED] LVDS
[19:46:59] [PASSED] Component
[19:46:59] [PASSED] DIN
[19:46:59] [PASSED] DP
[19:46:59] [PASSED] HDMI-A
[19:46:59] [PASSED] HDMI-B
[19:46:59] [PASSED] TV
[19:46:59] [PASSED] eDP
[19:46:59] [PASSED] Virtual
[19:46:59] [PASSED] DSI
[19:46:59] [PASSED] DPI
[19:46:59] [PASSED] Writeback
[19:46:59] [PASSED] SPI
[19:46:59] [PASSED] USB
[19:46:59] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[19:46:59] =============== [PASSED] drmm_connector_init ===============
[19:46:59] ========= drm_connector_dynamic_init (6 subtests) ==========
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_init
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_init_properties
[19:46:59] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[19:46:59] [PASSED] Unknown
[19:46:59] [PASSED] VGA
[19:46:59] [PASSED] DVI-I
[19:46:59] [PASSED] DVI-D
[19:46:59] [PASSED] DVI-A
[19:46:59] [PASSED] Composite
[19:46:59] [PASSED] SVIDEO
[19:46:59] [PASSED] LVDS
[19:46:59] [PASSED] Component
[19:46:59] [PASSED] DIN
[19:46:59] [PASSED] DP
[19:46:59] [PASSED] HDMI-A
[19:46:59] [PASSED] HDMI-B
[19:46:59] [PASSED] TV
[19:46:59] [PASSED] eDP
[19:46:59] [PASSED] Virtual
[19:46:59] [PASSED] DSI
[19:46:59] [PASSED] DPI
[19:46:59] [PASSED] Writeback
[19:46:59] [PASSED] SPI
[19:46:59] [PASSED] USB
[19:46:59] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[19:46:59] ======== drm_test_drm_connector_dynamic_init_name =========
[19:46:59] [PASSED] Unknown
[19:46:59] [PASSED] VGA
[19:46:59] [PASSED] DVI-I
[19:46:59] [PASSED] DVI-D
[19:46:59] [PASSED] DVI-A
[19:46:59] [PASSED] Composite
[19:46:59] [PASSED] SVIDEO
[19:46:59] [PASSED] LVDS
[19:46:59] [PASSED] Component
[19:46:59] [PASSED] DIN
[19:46:59] [PASSED] DP
[19:46:59] [PASSED] HDMI-A
[19:46:59] [PASSED] HDMI-B
[19:46:59] [PASSED] TV
[19:46:59] [PASSED] eDP
[19:46:59] [PASSED] Virtual
[19:46:59] [PASSED] DSI
[19:46:59] [PASSED] DPI
[19:46:59] [PASSED] Writeback
[19:46:59] [PASSED] SPI
[19:46:59] [PASSED] USB
[19:46:59] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[19:46:59] =========== [PASSED] drm_connector_dynamic_init ============
[19:46:59] ==== drm_connector_dynamic_register_early (4 subtests) =====
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[19:46:59] ====== [PASSED] drm_connector_dynamic_register_early =======
[19:46:59] ======= drm_connector_dynamic_register (7 subtests) ========
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[19:46:59] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[19:46:59] ========= [PASSED] drm_connector_dynamic_register ==========
[19:46:59] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[19:46:59] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[19:46:59] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[19:46:59] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[19:46:59] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[19:46:59] ========== drm_test_get_tv_mode_from_name_valid ===========
[19:46:59] [PASSED] NTSC
[19:46:59] [PASSED] NTSC-443
[19:46:59] [PASSED] NTSC-J
[19:46:59] [PASSED] PAL
[19:46:59] [PASSED] PAL-M
[19:46:59] [PASSED] PAL-N
[19:46:59] [PASSED] SECAM
[19:46:59] [PASSED] Mono
[19:46:59] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[19:46:59] [PASSED] drm_test_get_tv_mode_from_name_truncated
[19:46:59] ============ [PASSED] drm_get_tv_mode_from_name ============
[19:46:59] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[19:46:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[19:46:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[19:46:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[19:46:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[19:46:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[19:46:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[19:46:59] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[19:46:59] [PASSED] VIC 96
[19:46:59] [PASSED] VIC 97
[19:46:59] [PASSED] VIC 101
[19:46:59] [PASSED] VIC 102
[19:46:59] [PASSED] VIC 106
[19:46:59] [PASSED] VIC 107
[19:46:59] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[19:46:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[19:46:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[19:46:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[19:46:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[19:46:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[19:46:59] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[19:46:59] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[19:46:59] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[19:46:59] [PASSED] Automatic
[19:46:59] [PASSED] Full
[19:46:59] [PASSED] Limited 16:235
[19:46:59] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[19:46:59] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[19:46:59] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[19:46:59] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[19:46:59] === drm_test_drm_hdmi_connector_get_output_format_name ====
[19:46:59] [PASSED] RGB
[19:46:59] [PASSED] YUV 4:2:0
[19:46:59] [PASSED] YUV 4:2:2
[19:46:59] [PASSED] YUV 4:4:4
[19:46:59] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[19:46:59] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[19:46:59] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[19:46:59] ============= drm_damage_helper (21 subtests) ==============
[19:46:59] [PASSED] drm_test_damage_iter_no_damage
[19:46:59] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[19:46:59] [PASSED] drm_test_damage_iter_no_damage_src_moved
[19:46:59] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[19:46:59] [PASSED] drm_test_damage_iter_no_damage_not_visible
[19:46:59] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[19:46:59] [PASSED] drm_test_damage_iter_no_damage_no_fb
[19:46:59] [PASSED] drm_test_damage_iter_simple_damage
[19:46:59] [PASSED] drm_test_damage_iter_single_damage
[19:46:59] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[19:46:59] [PASSED] drm_test_damage_iter_single_damage_outside_src
[19:46:59] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[19:46:59] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[19:46:59] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[19:46:59] [PASSED] drm_test_damage_iter_single_damage_src_moved
[19:46:59] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[19:46:59] [PASSED] drm_test_damage_iter_damage
[19:46:59] [PASSED] drm_test_damage_iter_damage_one_intersect
[19:46:59] [PASSED] drm_test_damage_iter_damage_one_outside
[19:46:59] [PASSED] drm_test_damage_iter_damage_src_moved
[19:46:59] [PASSED] drm_test_damage_iter_damage_not_visible
[19:46:59] ================ [PASSED] drm_damage_helper ================
[19:46:59] ============== drm_dp_mst_helper (3 subtests) ==============
[19:46:59] ============== drm_test_dp_mst_calc_pbn_mode ==============
[19:46:59] [PASSED] Clock 154000 BPP 30 DSC disabled
[19:46:59] [PASSED] Clock 234000 BPP 30 DSC disabled
[19:46:59] [PASSED] Clock 297000 BPP 24 DSC disabled
[19:46:59] [PASSED] Clock 332880 BPP 24 DSC enabled
[19:46:59] [PASSED] Clock 324540 BPP 24 DSC enabled
[19:46:59] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[19:46:59] ============== drm_test_dp_mst_calc_pbn_div ===============
[19:46:59] [PASSED] Link rate 2000000 lane count 4
[19:46:59] [PASSED] Link rate 2000000 lane count 2
[19:46:59] [PASSED] Link rate 2000000 lane count 1
[19:46:59] [PASSED] Link rate 1350000 lane count 4
[19:46:59] [PASSED] Link rate 1350000 lane count 2
[19:46:59] [PASSED] Link rate 1350000 lane count 1
[19:46:59] [PASSED] Link rate 1000000 lane count 4
[19:46:59] [PASSED] Link rate 1000000 lane count 2
[19:46:59] [PASSED] Link rate 1000000 lane count 1
[19:46:59] [PASSED] Link rate 810000 lane count 4
[19:46:59] [PASSED] Link rate 810000 lane count 2
[19:46:59] [PASSED] Link rate 810000 lane count 1
[19:46:59] [PASSED] Link rate 540000 lane count 4
[19:46:59] [PASSED] Link rate 540000 lane count 2
[19:46:59] [PASSED] Link rate 540000 lane count 1
[19:46:59] [PASSED] Link rate 270000 lane count 4
[19:46:59] [PASSED] Link rate 270000 lane count 2
[19:46:59] [PASSED] Link rate 270000 lane count 1
[19:46:59] [PASSED] Link rate 162000 lane count 4
[19:46:59] [PASSED] Link rate 162000 lane count 2
[19:46:59] [PASSED] Link rate 162000 lane count 1
[19:46:59] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[19:46:59] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[19:46:59] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[19:46:59] [PASSED] DP_POWER_UP_PHY with port number
[19:46:59] [PASSED] DP_POWER_DOWN_PHY with port number
[19:46:59] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[19:46:59] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[19:46:59] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[19:46:59] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[19:46:59] [PASSED] DP_QUERY_PAYLOAD with port number
[19:46:59] [PASSED] DP_QUERY_PAYLOAD with VCPI
[19:46:59] [PASSED] DP_REMOTE_DPCD_READ with port number
[19:46:59] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[19:46:59] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[19:46:59] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[19:46:59] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[19:46:59] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[19:46:59] [PASSED] DP_REMOTE_I2C_READ with port number
[19:46:59] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[19:46:59] [PASSED] DP_REMOTE_I2C_READ with transactions array
[19:46:59] [PASSED] DP_REMOTE_I2C_WRITE with port number
[19:46:59] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[19:46:59] [PASSED] DP_REMOTE_I2C_WRITE with data array
[19:46:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[19:46:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[19:46:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[19:46:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[19:46:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[19:46:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[19:46:59] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[19:46:59] ================ [PASSED] drm_dp_mst_helper ================
[19:46:59] ================== drm_exec (7 subtests) ===================
[19:46:59] [PASSED] sanitycheck
[19:46:59] [PASSED] test_lock
[19:46:59] [PASSED] test_lock_unlock
[19:46:59] [PASSED] test_duplicates
[19:46:59] [PASSED] test_prepare
[19:46:59] [PASSED] test_prepare_array
[19:46:59] [PASSED] test_multiple_loops
[19:46:59] ==================== [PASSED] drm_exec =====================
[19:46:59] =========== drm_format_helper_test (17 subtests) ===========
[19:46:59] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[19:46:59] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[19:46:59] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[19:46:59] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[19:46:59] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[19:46:59] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[19:46:59] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[19:46:59] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[19:46:59] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[19:46:59] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[19:46:59] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[19:46:59] ============== drm_test_fb_xrgb8888_to_mono ===============
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[19:46:59] ==================== drm_test_fb_swab =====================
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ================ [PASSED] drm_test_fb_swab =================
[19:46:59] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[19:46:59] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[19:46:59] [PASSED] single_pixel_source_buffer
[19:46:59] [PASSED] single_pixel_clip_rectangle
[19:46:59] [PASSED] well_known_colors
[19:46:59] [PASSED] destination_pitch
[19:46:59] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[19:46:59] ================= drm_test_fb_clip_offset =================
[19:46:59] [PASSED] pass through
[19:46:59] [PASSED] horizontal offset
[19:46:59] [PASSED] vertical offset
[19:46:59] [PASSED] horizontal and vertical offset
[19:46:59] [PASSED] horizontal offset (custom pitch)
[19:46:59] [PASSED] vertical offset (custom pitch)
[19:46:59] [PASSED] horizontal and vertical offset (custom pitch)
[19:46:59] ============= [PASSED] drm_test_fb_clip_offset =============
[19:46:59] =================== drm_test_fb_memcpy ====================
[19:46:59] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[19:46:59] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[19:46:59] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[19:46:59] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[19:46:59] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[19:46:59] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[19:46:59] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[19:46:59] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[19:46:59] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[19:46:59] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[19:46:59] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[19:46:59] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[19:46:59] =============== [PASSED] drm_test_fb_memcpy ================
[19:46:59] ============= [PASSED] drm_format_helper_test ==============
[19:46:59] ================= drm_format (18 subtests) =================
[19:46:59] [PASSED] drm_test_format_block_width_invalid
[19:46:59] [PASSED] drm_test_format_block_width_one_plane
[19:46:59] [PASSED] drm_test_format_block_width_two_plane
[19:46:59] [PASSED] drm_test_format_block_width_three_plane
[19:46:59] [PASSED] drm_test_format_block_width_tiled
[19:46:59] [PASSED] drm_test_format_block_height_invalid
[19:46:59] [PASSED] drm_test_format_block_height_one_plane
[19:46:59] [PASSED] drm_test_format_block_height_two_plane
[19:46:59] [PASSED] drm_test_format_block_height_three_plane
[19:46:59] [PASSED] drm_test_format_block_height_tiled
[19:46:59] [PASSED] drm_test_format_min_pitch_invalid
[19:46:59] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[19:46:59] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[19:46:59] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[19:46:59] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[19:46:59] [PASSED] drm_test_format_min_pitch_two_plane
[19:46:59] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[19:46:59] [PASSED] drm_test_format_min_pitch_tiled
[19:46:59] =================== [PASSED] drm_format ====================
[19:46:59] ============== drm_framebuffer (10 subtests) ===============
[19:46:59] ========== drm_test_framebuffer_check_src_coords ==========
[19:46:59] [PASSED] Success: source fits into fb
[19:46:59] [PASSED] Fail: overflowing fb with x-axis coordinate
[19:46:59] [PASSED] Fail: overflowing fb with y-axis coordinate
[19:46:59] [PASSED] Fail: overflowing fb with source width
[19:46:59] [PASSED] Fail: overflowing fb with source height
[19:46:59] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[19:46:59] [PASSED] drm_test_framebuffer_cleanup
[19:46:59] =============== drm_test_framebuffer_create ===============
[19:46:59] [PASSED] ABGR8888 normal sizes
[19:46:59] [PASSED] ABGR8888 max sizes
[19:46:59] [PASSED] ABGR8888 pitch greater than min required
[19:46:59] [PASSED] ABGR8888 pitch less than min required
[19:46:59] [PASSED] ABGR8888 Invalid width
[19:46:59] [PASSED] ABGR8888 Invalid buffer handle
[19:46:59] [PASSED] No pixel format
[19:46:59] [PASSED] ABGR8888 Width 0
[19:46:59] [PASSED] ABGR8888 Height 0
[19:46:59] [PASSED] ABGR8888 Out of bound height * pitch combination
[19:46:59] [PASSED] ABGR8888 Large buffer offset
[19:46:59] [PASSED] ABGR8888 Buffer offset for inexistent plane
[19:46:59] [PASSED] ABGR8888 Invalid flag
[19:46:59] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[19:46:59] [PASSED] ABGR8888 Valid buffer modifier
[19:46:59] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[19:46:59] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[19:46:59] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[19:46:59] [PASSED] NV12 Normal sizes
[19:46:59] [PASSED] NV12 Max sizes
[19:46:59] [PASSED] NV12 Invalid pitch
[19:46:59] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[19:46:59] [PASSED] NV12 different modifier per-plane
[19:46:59] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[19:46:59] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[19:46:59] [PASSED] NV12 Modifier for inexistent plane
[19:46:59] [PASSED] NV12 Handle for inexistent plane
[19:46:59] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[19:46:59] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[19:46:59] [PASSED] YVU420 Normal sizes
[19:46:59] [PASSED] YVU420 Max sizes
[19:46:59] [PASSED] YVU420 Invalid pitch
[19:46:59] [PASSED] YVU420 Different pitches
[19:46:59] [PASSED] YVU420 Different buffer offsets/pitches
[19:46:59] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[19:46:59] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[19:46:59] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[19:46:59] [PASSED] YVU420 Valid modifier
[19:46:59] [PASSED] YVU420 Different modifiers per plane
[19:46:59] [PASSED] YVU420 Modifier for inexistent plane
[19:46:59] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[19:46:59] [PASSED] X0L2 Normal sizes
[19:46:59] [PASSED] X0L2 Max sizes
[19:46:59] [PASSED] X0L2 Invalid pitch
[19:46:59] [PASSED] X0L2 Pitch greater than minimum required
[19:46:59] [PASSED] X0L2 Handle for inexistent plane
[19:46:59] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[19:46:59] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[19:46:59] [PASSED] X0L2 Valid modifier
[19:46:59] [PASSED] X0L2 Modifier for inexistent plane
[19:46:59] =========== [PASSED] drm_test_framebuffer_create ===========
[19:46:59] [PASSED] drm_test_framebuffer_free
[19:46:59] [PASSED] drm_test_framebuffer_init
[19:46:59] [PASSED] drm_test_framebuffer_init_bad_format
[19:46:59] [PASSED] drm_test_framebuffer_init_dev_mismatch
[19:46:59] [PASSED] drm_test_framebuffer_lookup
[19:46:59] [PASSED] drm_test_framebuffer_lookup_inexistent
[19:46:59] [PASSED] drm_test_framebuffer_modifiers_not_supported
[19:46:59] ================= [PASSED] drm_framebuffer =================
[19:46:59] ================ drm_gem_shmem (8 subtests) ================
[19:46:59] [PASSED] drm_gem_shmem_test_obj_create
[19:46:59] [PASSED] drm_gem_shmem_test_obj_create_private
[19:46:59] [PASSED] drm_gem_shmem_test_pin_pages
[19:46:59] [PASSED] drm_gem_shmem_test_vmap
[19:46:59] [PASSED] drm_gem_shmem_test_get_sg_table
[19:46:59] [PASSED] drm_gem_shmem_test_get_pages_sgt
[19:46:59] [PASSED] drm_gem_shmem_test_madvise
[19:46:59] [PASSED] drm_gem_shmem_test_purge
[19:46:59] ================== [PASSED] drm_gem_shmem ==================
[19:46:59] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[19:46:59] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[19:46:59] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[19:46:59] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[19:46:59] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[19:46:59] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[19:46:59] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[19:46:59] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[19:46:59] [PASSED] Automatic
[19:46:59] [PASSED] Full
[19:46:59] [PASSED] Limited 16:235
[19:46:59] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[19:46:59] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[19:46:59] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[19:46:59] [PASSED] drm_test_check_disable_connector
[19:46:59] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[19:46:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[19:46:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[19:46:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[19:46:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[19:46:59] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[19:46:59] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[19:46:59] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[19:46:59] [PASSED] drm_test_check_output_bpc_dvi
[19:46:59] [PASSED] drm_test_check_output_bpc_format_vic_1
[19:46:59] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[19:46:59] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[19:46:59] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[19:46:59] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[19:46:59] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[19:46:59] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[19:46:59] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[19:46:59] ============ drm_test_check_hdmi_color_format =============
[19:46:59] [PASSED] AUTO -> RGB
[19:46:59] [PASSED] YCBCR422 -> YUV422
[19:46:59] [PASSED] YCBCR420 -> YUV420
[19:46:59] [PASSED] YCBCR444 -> YUV444
[19:46:59] [PASSED] RGB -> RGB
[19:46:59] ======== [PASSED] drm_test_check_hdmi_color_format =========
[19:46:59] ======== drm_test_check_hdmi_color_format_420_only ========
[19:46:59] [PASSED] RGB should fail
[19:46:59] [PASSED] YUV444 should fail
[19:46:59] [PASSED] YUV422 should fail
[19:46:59] [PASSED] YUV420 should work
[19:46:59] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[19:46:59] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[19:46:59] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[19:46:59] [PASSED] drm_test_check_broadcast_rgb_value
[19:46:59] [PASSED] drm_test_check_bpc_8_value
[19:46:59] [PASSED] drm_test_check_bpc_10_value
[19:46:59] [PASSED] drm_test_check_bpc_12_value
[19:46:59] [PASSED] drm_test_check_format_value
[19:46:59] [PASSED] drm_test_check_tmds_char_value
[19:46:59] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[19:46:59] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[19:46:59] [PASSED] drm_test_check_mode_valid
[19:46:59] [PASSED] drm_test_check_mode_valid_reject
[19:46:59] [PASSED] drm_test_check_mode_valid_reject_rate
[19:46:59] [PASSED] drm_test_check_mode_valid_reject_max_clock
[19:46:59] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[19:46:59] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[19:46:59] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[19:46:59] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[19:46:59] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[19:46:59] [PASSED] drm_test_check_infoframes
[19:46:59] [PASSED] drm_test_check_reject_avi_infoframe
[19:46:59] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[19:46:59] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[19:46:59] [PASSED] drm_test_check_reject_audio_infoframe
[19:46:59] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[19:46:59] ================= drm_managed (2 subtests) =================
[19:46:59] [PASSED] drm_test_managed_release_action
[19:46:59] [PASSED] drm_test_managed_run_action
[19:46:59] =================== [PASSED] drm_managed ===================
[19:46:59] =================== drm_mm (6 subtests) ====================
[19:46:59] [PASSED] drm_test_mm_init
[19:46:59] [PASSED] drm_test_mm_debug
[19:46:59] [PASSED] drm_test_mm_align32
[19:46:59] [PASSED] drm_test_mm_align64
[19:46:59] [PASSED] drm_test_mm_lowest
[19:46:59] [PASSED] drm_test_mm_highest
[19:46:59] ===================== [PASSED] drm_mm ======================
[19:46:59] ============= drm_modes_analog_tv (5 subtests) =============
[19:46:59] [PASSED] drm_test_modes_analog_tv_mono_576i
[19:46:59] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[19:46:59] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[19:46:59] [PASSED] drm_test_modes_analog_tv_pal_576i
[19:46:59] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[19:46:59] =============== [PASSED] drm_modes_analog_tv ===============
[19:46:59] ============== drm_panic_helper (3 subtests) ===============
[19:46:59] ============= drm_test_panic_screen_user_map ==============
[19:46:59] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[19:46:59] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[19:46:59] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[19:46:59] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[19:46:59] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[19:46:59] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[19:46:59] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[19:46:59] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[19:47:00] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[19:47:00] ========= [PASSED] drm_test_panic_screen_user_map ==========
[19:47:00] ============= drm_test_panic_screen_user_page =============
[19:47:00] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[19:47:00] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[19:47:00] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[19:47:00] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[19:47:00] ========= [PASSED] drm_test_panic_screen_user_page =========
[19:47:00] ========== drm_test_panic_screen_user_set_pixel ===========
[19:47:00] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[19:47:00] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[19:47:00] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[19:47:00] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[19:47:00] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[19:47:00] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[19:47:00] ================ [PASSED] drm_panic_helper =================
[19:47:00] ============== drm_plane_helper (2 subtests) ===============
[19:47:00] =============== drm_test_check_plane_state ================
[19:47:00] [PASSED] clipping_simple
[19:47:00] [PASSED] clipping_rotate_reflect
[19:47:00] [PASSED] positioning_simple
[19:47:00] [PASSED] upscaling
[19:47:00] [PASSED] downscaling
[19:47:00] [PASSED] rounding1
[19:47:00] [PASSED] rounding2
[19:47:00] [PASSED] rounding3
[19:47:00] [PASSED] rounding4
[19:47:00] =========== [PASSED] drm_test_check_plane_state ============
[19:47:00] =========== drm_test_check_invalid_plane_state ============
[19:47:00] [PASSED] positioning_invalid
[19:47:00] [PASSED] upscaling_invalid
[19:47:00] [PASSED] downscaling_invalid
[19:47:00] ======= [PASSED] drm_test_check_invalid_plane_state ========
[19:47:00] ================ [PASSED] drm_plane_helper =================
[19:47:00] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[19:47:00] ====== drm_test_connector_helper_tv_get_modes_check =======
[19:47:00] [PASSED] None
[19:47:00] [PASSED] PAL
[19:47:00] [PASSED] NTSC
[19:47:00] [PASSED] Both, NTSC Default
[19:47:00] [PASSED] Both, PAL Default
[19:47:00] [PASSED] Both, NTSC Default, with PAL on command-line
[19:47:00] [PASSED] Both, PAL Default, with NTSC on command-line
[19:47:00] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[19:47:00] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[19:47:00] ================== drm_rect (9 subtests) ===================
[19:47:00] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[19:47:00] [PASSED] drm_test_rect_clip_scaled_not_clipped
[19:47:00] [PASSED] drm_test_rect_clip_scaled_clipped
[19:47:00] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[19:47:00] ================= drm_test_rect_intersect =================
[19:47:00] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[19:47:00] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[19:47:00] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[19:47:00] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[19:47:00] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[19:47:00] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[19:47:00] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[19:47:00] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[19:47:00] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[19:47:00] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[19:47:00] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[19:47:00] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[19:47:00] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[19:47:00] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[19:47:00] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[19:47:00] ============= [PASSED] drm_test_rect_intersect =============
[19:47:00] ================ drm_test_rect_calc_hscale ================
[19:47:00] [PASSED] normal use
[19:47:00] [PASSED] out of max range
[19:47:00] [PASSED] out of min range
[19:47:00] [PASSED] zero dst
[19:47:00] [PASSED] negative src
[19:47:00] [PASSED] negative dst
[19:47:00] ============ [PASSED] drm_test_rect_calc_hscale ============
[19:47:00] ================ drm_test_rect_calc_vscale ================
[19:47:00] [PASSED] normal use
[19:47:00] [PASSED] out of max range
[19:47:00] [PASSED] out of min range
[19:47:00] [PASSED] zero dst
[19:47:00] [PASSED] negative src
[19:47:00] [PASSED] negative dst
[19:47:00] ============ [PASSED] drm_test_rect_calc_vscale ============
[19:47:00] ================== drm_test_rect_rotate ===================
[19:47:00] [PASSED] reflect-x
[19:47:00] [PASSED] reflect-y
[19:47:00] [PASSED] rotate-0
[19:47:00] [PASSED] rotate-90
[19:47:00] [PASSED] rotate-180
[19:47:00] [PASSED] rotate-270
[19:47:00] ============== [PASSED] drm_test_rect_rotate ===============
[19:47:00] ================ drm_test_rect_rotate_inv =================
[19:47:00] [PASSED] reflect-x
[19:47:00] [PASSED] reflect-y
[19:47:00] [PASSED] rotate-0
[19:47:00] [PASSED] rotate-90
[19:47:00] [PASSED] rotate-180
[19:47:00] [PASSED] rotate-270
[19:47:00] ============ [PASSED] drm_test_rect_rotate_inv =============
[19:47:00] ==================== [PASSED] drm_rect =====================
[19:47:00] ============ drm_sysfb_modeset_test (1 subtest) ============
[19:47:00] ============ drm_test_sysfb_build_fourcc_list =============
[19:47:00] [PASSED] no native formats
[19:47:00] [PASSED] XRGB8888 as native format
[19:47:00] [PASSED] remove duplicates
[19:47:00] [PASSED] convert alpha formats
[19:47:00] [PASSED] random formats
[19:47:00] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[19:47:00] ============= [PASSED] drm_sysfb_modeset_test ==============
[19:47:00] ================== drm_fixp (2 subtests) ===================
[19:47:00] [PASSED] drm_test_int2fixp
[19:47:00] [PASSED] drm_test_sm2fixp
[19:47:00] ==================== [PASSED] drm_fixp =====================
[19:47:00] ============================================================
[19:47:00] Testing complete. Ran 667 tests: passed: 667
[19:47:00] Elapsed time: 28.256s total, 2.568s configuring, 25.223s building, 0.456s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[19:47:00] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:47:02] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:47:13] Starting KUnit Kernel (1/1)...
[19:47:13] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:47:13] ================= ttm_device (5 subtests) ==================
[19:47:13] [PASSED] ttm_device_init_basic
[19:47:13] [PASSED] ttm_device_init_multiple
[19:47:13] [PASSED] ttm_device_fini_basic
[19:47:13] [PASSED] ttm_device_init_no_vma_man
[19:47:13] ================== ttm_device_init_pools ==================
[19:47:13] [PASSED] No DMA allocations, no DMA32 required
[19:47:13] [PASSED] DMA allocations, DMA32 required
[19:47:13] [PASSED] No DMA allocations, DMA32 required
[19:47:13] [PASSED] DMA allocations, no DMA32 required
[19:47:13] ============== [PASSED] ttm_device_init_pools ==============
[19:47:13] =================== [PASSED] ttm_device ====================
[19:47:13] ================== ttm_pool (8 subtests) ===================
[19:47:13] ================== ttm_pool_alloc_basic ===================
[19:47:13] [PASSED] One page
[19:47:13] [PASSED] More than one page
[19:47:13] [PASSED] Above the allocation limit
[19:47:13] [PASSED] One page, with coherent DMA mappings enabled
[19:47:13] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:47:13] ============== [PASSED] ttm_pool_alloc_basic ===============
[19:47:13] ============== ttm_pool_alloc_basic_dma_addr ==============
[19:47:13] [PASSED] One page
[19:47:13] [PASSED] More than one page
[19:47:13] [PASSED] Above the allocation limit
[19:47:13] [PASSED] One page, with coherent DMA mappings enabled
[19:47:13] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:47:13] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[19:47:13] [PASSED] ttm_pool_alloc_order_caching_match
[19:47:13] [PASSED] ttm_pool_alloc_caching_mismatch
[19:47:13] [PASSED] ttm_pool_alloc_order_mismatch
[19:47:13] [PASSED] ttm_pool_free_dma_alloc
[19:47:13] [PASSED] ttm_pool_free_no_dma_alloc
[19:47:13] [PASSED] ttm_pool_fini_basic
[19:47:13] ==================== [PASSED] ttm_pool =====================
[19:47:13] ================ ttm_resource (8 subtests) =================
[19:47:13] ================= ttm_resource_init_basic =================
[19:47:13] [PASSED] Init resource in TTM_PL_SYSTEM
[19:47:13] [PASSED] Init resource in TTM_PL_VRAM
[19:47:13] [PASSED] Init resource in a private placement
[19:47:13] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[19:47:13] ============= [PASSED] ttm_resource_init_basic =============
[19:47:13] [PASSED] ttm_resource_init_pinned
[19:47:13] [PASSED] ttm_resource_fini_basic
[19:47:13] [PASSED] ttm_resource_manager_init_basic
[19:47:13] [PASSED] ttm_resource_manager_usage_basic
[19:47:13] [PASSED] ttm_resource_manager_set_used_basic
[19:47:13] [PASSED] ttm_sys_man_alloc_basic
[19:47:13] [PASSED] ttm_sys_man_free_basic
[19:47:13] ================== [PASSED] ttm_resource ===================
[19:47:13] =================== ttm_tt (15 subtests) ===================
[19:47:13] ==================== ttm_tt_init_basic ====================
[19:47:13] [PASSED] Page-aligned size
[19:47:13] [PASSED] Extra pages requested
[19:47:13] ================ [PASSED] ttm_tt_init_basic ================
[19:47:13] [PASSED] ttm_tt_init_misaligned
[19:47:13] [PASSED] ttm_tt_fini_basic
[19:47:13] [PASSED] ttm_tt_fini_sg
[19:47:13] [PASSED] ttm_tt_fini_shmem
[19:47:13] [PASSED] ttm_tt_create_basic
[19:47:13] [PASSED] ttm_tt_create_invalid_bo_type
[19:47:13] [PASSED] ttm_tt_create_ttm_exists
[19:47:13] [PASSED] ttm_tt_create_failed
[19:47:13] [PASSED] ttm_tt_destroy_basic
[19:47:13] [PASSED] ttm_tt_populate_null_ttm
[19:47:13] [PASSED] ttm_tt_populate_populated_ttm
[19:47:13] [PASSED] ttm_tt_unpopulate_basic
[19:47:13] [PASSED] ttm_tt_unpopulate_empty_ttm
[19:47:13] [PASSED] ttm_tt_swapin_basic
[19:47:13] ===================== [PASSED] ttm_tt ======================
[19:47:13] =================== ttm_bo (14 subtests) ===================
[19:47:13] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[19:47:13] [PASSED] Cannot be interrupted and sleeps
[19:47:13] [PASSED] Cannot be interrupted, locks straight away
[19:47:13] [PASSED] Can be interrupted, sleeps
[19:47:13] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[19:47:13] [PASSED] ttm_bo_reserve_locked_no_sleep
[19:47:13] [PASSED] ttm_bo_reserve_no_wait_ticket
[19:47:13] [PASSED] ttm_bo_reserve_double_resv
[19:47:13] [PASSED] ttm_bo_reserve_interrupted
[19:47:13] [PASSED] ttm_bo_reserve_deadlock
[19:47:13] [PASSED] ttm_bo_unreserve_basic
[19:47:13] [PASSED] ttm_bo_unreserve_pinned
[19:47:13] [PASSED] ttm_bo_unreserve_bulk
[19:47:13] [PASSED] ttm_bo_fini_basic
[19:47:13] [PASSED] ttm_bo_fini_shared_resv
[19:47:13] [PASSED] ttm_bo_pin_basic
[19:47:13] [PASSED] ttm_bo_pin_unpin_resource
[19:47:13] [PASSED] ttm_bo_multiple_pin_one_unpin
[19:47:13] ===================== [PASSED] ttm_bo ======================
[19:47:13] ============== ttm_bo_validate (22 subtests) ===============
[19:47:13] ============== ttm_bo_init_reserved_sys_man ===============
[19:47:13] [PASSED] Buffer object for userspace
[19:47:13] [PASSED] Kernel buffer object
[19:47:13] [PASSED] Shared buffer object
[19:47:13] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[19:47:13] ============== ttm_bo_init_reserved_mock_man ==============
[19:47:13] [PASSED] Buffer object for userspace
[19:47:13] [PASSED] Kernel buffer object
[19:47:13] [PASSED] Shared buffer object
[19:47:13] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[19:47:13] [PASSED] ttm_bo_init_reserved_resv
[19:47:13] ================== ttm_bo_validate_basic ==================
[19:47:13] [PASSED] Buffer object for userspace
[19:47:13] [PASSED] Kernel buffer object
[19:47:13] [PASSED] Shared buffer object
[19:47:13] ============== [PASSED] ttm_bo_validate_basic ==============
[19:47:13] [PASSED] ttm_bo_validate_invalid_placement
[19:47:13] ============= ttm_bo_validate_same_placement ==============
[19:47:13] [PASSED] System manager
[19:47:13] [PASSED] VRAM manager
[19:47:13] ========= [PASSED] ttm_bo_validate_same_placement ==========
[19:47:13] [PASSED] ttm_bo_validate_failed_alloc
[19:47:13] [PASSED] ttm_bo_validate_pinned
[19:47:13] [PASSED] ttm_bo_validate_busy_placement
[19:47:13] ================ ttm_bo_validate_multihop =================
[19:47:13] [PASSED] Buffer object for userspace
[19:47:13] [PASSED] Kernel buffer object
[19:47:13] [PASSED] Shared buffer object
[19:47:13] ============ [PASSED] ttm_bo_validate_multihop =============
[19:47:13] ========== ttm_bo_validate_no_placement_signaled ==========
[19:47:13] [PASSED] Buffer object in system domain, no page vector
[19:47:13] [PASSED] Buffer object in system domain with an existing page vector
[19:47:13] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[19:47:13] ======== ttm_bo_validate_no_placement_not_signaled ========
[19:47:13] [PASSED] Buffer object for userspace
[19:47:13] [PASSED] Kernel buffer object
[19:47:13] [PASSED] Shared buffer object
[19:47:13] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[19:47:13] [PASSED] ttm_bo_validate_move_fence_signaled
[19:47:13] ========= ttm_bo_validate_move_fence_not_signaled =========
[19:47:13] [PASSED] Waits for GPU
[19:47:13] [PASSED] Tries to lock straight away
[19:47:13] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[19:47:13] [PASSED] ttm_bo_validate_swapout
[19:47:13] [PASSED] ttm_bo_validate_happy_evict
[19:47:13] [PASSED] ttm_bo_validate_all_pinned_evict
[19:47:13] [PASSED] ttm_bo_validate_allowed_only_evict
[19:47:13] [PASSED] ttm_bo_validate_deleted_evict
[19:47:13] [PASSED] ttm_bo_validate_busy_domain_evict
[19:47:13] [PASSED] ttm_bo_validate_evict_gutting
[19:47:13] [PASSED] ttm_bo_validate_recrusive_evict
[19:47:13] ================= [PASSED] ttm_bo_validate =================
[19:47:13] ============================================================
[19:47:13] Testing complete. Ran 102 tests: passed: 102
[19:47:13] Elapsed time: 12.936s total, 2.555s configuring, 10.166s building, 0.180s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[19:47:13] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:47:15] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:47:24] Starting KUnit Kernel (1/1)...
[19:47:24] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:47:24] =============== dma-buf-fence (12 subtests) ================
[19:47:24] [PASSED] test_sanitycheck
[19:47:24] [PASSED] test_signaling
[19:47:24] [PASSED] test_add_callback
[19:47:24] [PASSED] test_late_add_callback
[19:47:24] [PASSED] test_rm_callback
[19:47:24] [PASSED] test_late_rm_callback
[19:47:24] [PASSED] test_status
[19:47:24] [PASSED] test_error
[19:47:24] [PASSED] test_wait
[19:47:24] [PASSED] test_wait_timeout
[19:47:24] [PASSED] test_stub
[19:47:24] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[19:47:24] ================== [PASSED] dma-buf-fence ==================
[19:47:24] ============ dma-buf-fence-chain (11 subtests) =============
[19:47:24] [PASSED] test_sanitycheck
[19:47:24] [PASSED] test_find_seqno
[19:47:24] [PASSED] test_find_signaled
[19:47:24] [PASSED] test_find_out_of_order
[19:47:29] [PASSED] test_find_gap
[19:47:29] [PASSED] test_find_race
[19:47:29] [PASSED] test_signal_forward
[19:47:30] [PASSED] test_signal_backward
[19:47:30] [PASSED] test_wait_forward
[19:47:30] [PASSED] test_wait_backward
[19:47:30] [PASSED] test_wait_random
[19:47:30] =============== [PASSED] dma-buf-fence-chain ===============
[19:47:30] ============ dma-buf-fence-unwrap (11 subtests) ============
[19:47:30] [PASSED] test_sanitycheck
[19:47:30] [PASSED] test_unwrap_array
[19:47:30] [PASSED] test_unwrap_chain
[19:47:30] [PASSED] test_unwrap_chain_array
[19:47:30] [PASSED] test_unwrap_merge
[19:47:30] [PASSED] test_unwrap_merge_duplicate
[19:47:30] [PASSED] test_unwrap_merge_seqno
[19:47:30] [PASSED] test_unwrap_merge_order
[19:47:30] [PASSED] test_unwrap_merge_complex
[19:47:30] [PASSED] test_unwrap_merge_complex_seqno
[19:47:30] [PASSED] test_dedup_empty
[19:47:30] ============== [PASSED] dma-buf-fence-unwrap ===============
[19:47:30] ================ dma-buf-resv (5 subtests) =================
[19:47:30] [PASSED] test_sanitycheck
[19:47:30] ===================== test_signaling ======================
[19:47:30] [PASSED] kernel
[19:47:30] [PASSED] write
[19:47:30] [PASSED] read
[19:47:30] [PASSED] bookkeep
[19:47:30] ================= [PASSED] test_signaling ==================
[19:47:30] ====================== test_for_each ======================
[19:47:30] [PASSED] kernel
[19:47:30] [PASSED] write
[19:47:30] [PASSED] read
[19:47:30] [PASSED] bookkeep
[19:47:30] ================== [PASSED] test_for_each ==================
[19:47:30] ================= test_for_each_unlocked ==================
[19:47:30] [PASSED] kernel
[19:47:30] [PASSED] write
[19:47:30] [PASSED] read
[19:47:30] [PASSED] bookkeep
[19:47:30] ============= [PASSED] test_for_each_unlocked ==============
[19:47:30] ===================== test_get_fences =====================
[19:47:30] [PASSED] kernel
[19:47:30] [PASSED] write
[19:47:30] [PASSED] read
[19:47:30] [PASSED] bookkeep
[19:47:30] ================= [PASSED] test_get_fences =================
[19:47:30] ================== [PASSED] dma-buf-resv ===================
[19:47:30] ============================================================
[19:47:30] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[19:47:30] Elapsed time: 16.695s total, 2.551s configuring, 8.872s building, 5.259s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 7+ messages in thread