* [PATCH v3 1/3] tree-wide: Retrieve 'MAX_PHYSMEM_BITS' from vmcoreinfo (if available)
2019-03-10 10:57 [PATCH v3 0/3] makedumpfile/arm64: Add support for ARMv8.2 extensions Bhupesh Sharma
@ 2019-03-10 10:57 ` Bhupesh Sharma
2019-03-10 10:57 ` [PATCH v3 2/3] makedumpfile/arm64: Add support for ARMv8.2-LPA (52-bit PA support) Bhupesh Sharma
2019-03-10 10:57 ` [PATCH v3 3/3] makedumpfile/arm64: Add support for ARMv8.2-LVA (52-bit user-space VA support) Bhupesh Sharma
2 siblings, 0 replies; 4+ messages in thread
From: Bhupesh Sharma @ 2019-03-10 10:57 UTC (permalink / raw)
To: kexec; +Cc: bhupesh.linux, bhsharma, k-hagio
This patch adds a common feature for archs (except arm64, for which
similar support is added via subsequent patch) to retrieve
'MAX_PHYSMEM_BITS' from vmcoreinfo (if available).
I recently posted a kernel patch (see [0]) which appends
'MAX_PHYSMEM_BITS' to vmcoreinfo in the core code itself rather than
in arch-specific code, so that user-space code can also benefit from
this addition to the vmcoreinfo and use it as a standard way of
determining 'SECTIONS_SHIFT' value in 'makedumpfile' utility.
This patch ensures backward compatibility for kernel versions in which
'MAX_PHYSMEM_BITS' is not available in vmcoreinfo.
[0]. http://lists.infradead.org/pipermail/kexec/2019-March/022531.html
Signed-off-by: Bhupesh Sharma <bhsharma@redhat.com>
---
arch/arm.c | 8 +++++++-
arch/ia64.c | 7 ++++++-
arch/ppc.c | 8 +++++++-
arch/ppc64.c | 49 ++++++++++++++++++++++++++++---------------------
arch/s390x.c | 29 ++++++++++++++++++-----------
arch/sparc64.c | 9 +++++++--
arch/x86.c | 34 ++++++++++++++++++++--------------
arch/x86_64.c | 27 ++++++++++++++++-----------
8 files changed, 109 insertions(+), 62 deletions(-)
diff --git a/arch/arm.c b/arch/arm.c
index af7442ac70bf..33536fc4dfc9 100644
--- a/arch/arm.c
+++ b/arch/arm.c
@@ -81,7 +81,13 @@ int
get_machdep_info_arm(void)
{
info->page_offset = SYMBOL(_stext) & 0xffff0000UL;
- info->max_physmem_bits = _MAX_PHYSMEM_BITS;
+
+ /* Check if we can get MAX_PHYSMEM_BITS from vmcoreinfo */
+ if (NUMBER(MAX_PHYSMEM_BITS) != NOT_FOUND_NUMBER)
+ info->max_physmem_bits = NUMBER(MAX_PHYSMEM_BITS);
+ else
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS;
+
info->kernel_start = SYMBOL(_stext);
info->section_size_bits = _SECTION_SIZE_BITS;
diff --git a/arch/ia64.c b/arch/ia64.c
index 6c33cc7c8288..fb44dda47172 100644
--- a/arch/ia64.c
+++ b/arch/ia64.c
@@ -85,7 +85,12 @@ get_machdep_info_ia64(void)
}
info->section_size_bits = _SECTION_SIZE_BITS;
- info->max_physmem_bits = _MAX_PHYSMEM_BITS;
+
+ /* Check if we can get MAX_PHYSMEM_BITS from vmcoreinfo */
+ if (NUMBER(MAX_PHYSMEM_BITS) != NOT_FOUND_NUMBER)
+ info->max_physmem_bits = NUMBER(MAX_PHYSMEM_BITS);
+ else
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS;
return TRUE;
}
diff --git a/arch/ppc.c b/arch/ppc.c
index 37c6a3b60cd3..ed9447427a30 100644
--- a/arch/ppc.c
+++ b/arch/ppc.c
@@ -31,7 +31,13 @@ get_machdep_info_ppc(void)
unsigned long vmlist, vmap_area_list, vmalloc_start;
info->section_size_bits = _SECTION_SIZE_BITS;
- info->max_physmem_bits = _MAX_PHYSMEM_BITS;
+
+ /* Check if we can get MAX_PHYSMEM_BITS from vmcoreinfo */
+ if (NUMBER(MAX_PHYSMEM_BITS) != NOT_FOUND_NUMBER)
+ info->max_physmem_bits = NUMBER(MAX_PHYSMEM_BITS);
+ else
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS;
+
info->page_offset = __PAGE_OFFSET;
if (SYMBOL(_stext) != NOT_FOUND_SYMBOL)
diff --git a/arch/ppc64.c b/arch/ppc64.c
index 9d8f2525f608..a3984eebdced 100644
--- a/arch/ppc64.c
+++ b/arch/ppc64.c
@@ -466,30 +466,37 @@ int
set_ppc64_max_physmem_bits(void)
{
long array_len = ARRAY_LENGTH(mem_section);
- /*
- * The older ppc64 kernels uses _MAX_PHYSMEM_BITS as 42 and the
- * newer kernels 3.7 onwards uses 46 bits.
- */
-
- info->max_physmem_bits = _MAX_PHYSMEM_BITS_ORIG ;
- if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME()))
- || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT())))
- return TRUE;
-
- info->max_physmem_bits = _MAX_PHYSMEM_BITS_3_7;
- if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME()))
- || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT())))
- return TRUE;
- info->max_physmem_bits = _MAX_PHYSMEM_BITS_4_19;
- if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME()))
- || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT())))
+ /* Check if we can get MAX_PHYSMEM_BITS from vmcoreinfo */
+ if (NUMBER(MAX_PHYSMEM_BITS) != NOT_FOUND_NUMBER) {
+ info->max_physmem_bits = NUMBER(MAX_PHYSMEM_BITS);
return TRUE;
+ } else {
+ /*
+ * The older ppc64 kernels uses _MAX_PHYSMEM_BITS as 42 and the
+ * newer kernels 3.7 onwards uses 46 bits.
+ */
- info->max_physmem_bits = _MAX_PHYSMEM_BITS_4_20;
- if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME()))
- || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT())))
- return TRUE;
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS_ORIG ;
+ if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME()))
+ || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT())))
+ return TRUE;
+
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS_3_7;
+ if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME()))
+ || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT())))
+ return TRUE;
+
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS_4_19;
+ if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME()))
+ || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT())))
+ return TRUE;
+
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS_4_20;
+ if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME()))
+ || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT())))
+ return TRUE;
+ }
return FALSE;
}
diff --git a/arch/s390x.c b/arch/s390x.c
index bf9d58e54fb7..4d17a783e5bd 100644
--- a/arch/s390x.c
+++ b/arch/s390x.c
@@ -63,20 +63,27 @@ int
set_s390x_max_physmem_bits(void)
{
long array_len = ARRAY_LENGTH(mem_section);
- /*
- * The older s390x kernels uses _MAX_PHYSMEM_BITS as 42 and the
- * newer kernels uses 46 bits.
- */
- info->max_physmem_bits = _MAX_PHYSMEM_BITS_ORIG ;
- if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME()))
- || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT())))
+ /* Check if we can get MAX_PHYSMEM_BITS from vmcoreinfo */
+ if (NUMBER(MAX_PHYSMEM_BITS) != NOT_FOUND_NUMBER) {
+ info->max_physmem_bits = NUMBER(MAX_PHYSMEM_BITS);
return TRUE;
+ } else {
+ /*
+ * The older s390x kernels uses _MAX_PHYSMEM_BITS as 42 and the
+ * newer kernels uses 46 bits.
+ */
- info->max_physmem_bits = _MAX_PHYSMEM_BITS_3_3;
- if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME()))
- || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT())))
- return TRUE;
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS_ORIG ;
+ if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME()))
+ || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT())))
+ return TRUE;
+
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS_3_3;
+ if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME()))
+ || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT())))
+ return TRUE;
+ }
return FALSE;
}
diff --git a/arch/sparc64.c b/arch/sparc64.c
index 1cfaa854ce6d..b93a05bdfe59 100644
--- a/arch/sparc64.c
+++ b/arch/sparc64.c
@@ -25,10 +25,15 @@ int get_versiondep_info_sparc64(void)
{
info->section_size_bits = _SECTION_SIZE_BITS;
- if (info->kernel_version >= KERNEL_VERSION(3, 8, 13))
+ /* Check if we can get MAX_PHYSMEM_BITS from vmcoreinfo */
+ if (NUMBER(MAX_PHYSMEM_BITS) != NOT_FOUND_NUMBER)
+ info->max_physmem_bits = NUMBER(MAX_PHYSMEM_BITS);
+ else if (info->kernel_version >= KERNEL_VERSION(3, 8, 13))
info->max_physmem_bits = _MAX_PHYSMEM_BITS_L4;
- else {
+ else
info->max_physmem_bits = _MAX_PHYSMEM_BITS_L3;
+
+ if (info->kernel_version < KERNEL_VERSION(3, 8, 13)) {
info->flag_vmemmap = TRUE;
info->vmemmap_start = VMEMMAP_BASE_SPARC64;
info->vmemmap_end = VMEMMAP_BASE_SPARC64 +
diff --git a/arch/x86.c b/arch/x86.c
index 3fdae93084b8..f1b43d4c8179 100644
--- a/arch/x86.c
+++ b/arch/x86.c
@@ -72,21 +72,27 @@ get_machdep_info_x86(void)
{
unsigned long vmlist, vmap_area_list, vmalloc_start;
- /* PAE */
- if ((vt.mem_flags & MEMORY_X86_PAE)
- || ((SYMBOL(pkmap_count) != NOT_FOUND_SYMBOL)
- && (SYMBOL(pkmap_count_next) != NOT_FOUND_SYMBOL)
- && ((SYMBOL(pkmap_count_next)-SYMBOL(pkmap_count))/sizeof(int))
- == 512)) {
- DEBUG_MSG("\n");
- DEBUG_MSG("PAE : ON\n");
- vt.mem_flags |= MEMORY_X86_PAE;
- info->max_physmem_bits = _MAX_PHYSMEM_BITS_PAE;
- } else {
- DEBUG_MSG("\n");
- DEBUG_MSG("PAE : OFF\n");
- info->max_physmem_bits = _MAX_PHYSMEM_BITS;
+ /* Check if we can get MAX_PHYSMEM_BITS from vmcoreinfo */
+ if (NUMBER(MAX_PHYSMEM_BITS) != NOT_FOUND_NUMBER)
+ info->max_physmem_bits = NUMBER(MAX_PHYSMEM_BITS);
+ else {
+ /* PAE */
+ if ((vt.mem_flags & MEMORY_X86_PAE)
+ || ((SYMBOL(pkmap_count) != NOT_FOUND_SYMBOL)
+ && (SYMBOL(pkmap_count_next) != NOT_FOUND_SYMBOL)
+ && ((SYMBOL(pkmap_count_next)-SYMBOL(pkmap_count))/sizeof(int))
+ == 512)) {
+ DEBUG_MSG("\n");
+ DEBUG_MSG("PAE : ON\n");
+ vt.mem_flags |= MEMORY_X86_PAE;
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS_PAE;
+ } else {
+ DEBUG_MSG("\n");
+ DEBUG_MSG("PAE : OFF\n");
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS;
+ }
}
+
info->page_offset = __PAGE_OFFSET;
if (SYMBOL(_stext) == NOT_FOUND_SYMBOL) {
diff --git a/arch/x86_64.c b/arch/x86_64.c
index 9db1f8139f28..98747fa883ef 100644
--- a/arch/x86_64.c
+++ b/arch/x86_64.c
@@ -259,17 +259,22 @@ get_machdep_info_x86_64(void)
int
get_versiondep_info_x86_64(void)
{
- /*
- * On linux-2.6.26, MAX_PHYSMEM_BITS is changed to 44 from 40.
- */
- if (info->kernel_version < KERNEL_VERSION(2, 6, 26))
- info->max_physmem_bits = _MAX_PHYSMEM_BITS_ORIG;
- else if (info->kernel_version < KERNEL_VERSION(2, 6, 31))
- info->max_physmem_bits = _MAX_PHYSMEM_BITS_2_6_26;
- else if(check_5level_paging())
- info->max_physmem_bits = _MAX_PHYSMEM_BITS_5LEVEL;
- else
- info->max_physmem_bits = _MAX_PHYSMEM_BITS_2_6_31;
+ /* Check if we can get MAX_PHYSMEM_BITS from vmcoreinfo */
+ if (NUMBER(MAX_PHYSMEM_BITS) != NOT_FOUND_NUMBER) {
+ info->max_physmem_bits = NUMBER(MAX_PHYSMEM_BITS);
+ } else {
+ /*
+ * On linux-2.6.26, MAX_PHYSMEM_BITS is changed to 44 from 40.
+ */
+ if (info->kernel_version < KERNEL_VERSION(2, 6, 26))
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS_ORIG;
+ else if (info->kernel_version < KERNEL_VERSION(2, 6, 31))
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS_2_6_26;
+ else if(check_5level_paging())
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS_5LEVEL;
+ else
+ info->max_physmem_bits = _MAX_PHYSMEM_BITS_2_6_31;
+ }
if (!get_page_offset_x86_64())
return FALSE;
--
2.7.4
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^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v3 2/3] makedumpfile/arm64: Add support for ARMv8.2-LPA (52-bit PA support)
2019-03-10 10:57 [PATCH v3 0/3] makedumpfile/arm64: Add support for ARMv8.2 extensions Bhupesh Sharma
2019-03-10 10:57 ` [PATCH v3 1/3] tree-wide: Retrieve 'MAX_PHYSMEM_BITS' from vmcoreinfo (if available) Bhupesh Sharma
@ 2019-03-10 10:57 ` Bhupesh Sharma
2019-03-10 10:57 ` [PATCH v3 3/3] makedumpfile/arm64: Add support for ARMv8.2-LVA (52-bit user-space VA support) Bhupesh Sharma
2 siblings, 0 replies; 4+ messages in thread
From: Bhupesh Sharma @ 2019-03-10 10:57 UTC (permalink / raw)
To: kexec; +Cc: bhupesh.linux, bhsharma, k-hagio
ARMv8.2-LPA architecture extension (if available on underlying hardware)
can support 52-bit physical addresses, while the kernel virtual
addresses remain 48-bit.
This patch is in accordance with ARMv8 Architecture Reference Manual
version D.a
Make sure that we read the 52-bit PA address capability from
'MAX_PHYSMEM_BITS' variable (if available in vmcoreinfo) and
accordingly change the pte_to_phy() mask values and also traverse
the page-table walk accordingly.
Also make sure that it works well for the existing 48-bit PA address
platforms and also on environments which use newer kernels with 52-bit
PA support but hardware which is not ARM8.2-LPA compliant.
I have sent a kernel patch upstream to add 'MAX_PHYSMEM_BITS' to
vmcoreinfo for arm64 (see [0]).
[0]. http://lists.infradead.org/pipermail/kexec/2019-February/022411.html
Signed-off-by: Bhupesh Sharma <bhsharma@redhat.com>
---
arch/arm64.c | 292 +++++++++++++++++++++++++++++++++++++++++------------------
1 file changed, 204 insertions(+), 88 deletions(-)
diff --git a/arch/arm64.c b/arch/arm64.c
index 053519359cbc..6ed09fab5ba2 100644
--- a/arch/arm64.c
+++ b/arch/arm64.c
@@ -39,72 +39,184 @@ typedef struct {
unsigned long pte;
} pte_t;
+#define __pte(x) ((pte_t) { (x) } )
+#define __pmd(x) ((pmd_t) { (x) } )
+#define __pud(x) ((pud_t) { (x) } )
+#define __pgd(x) ((pgd_t) { (x) } )
+
+static int lpa_52_bit_support_available;
static int pgtable_level;
static int va_bits;
static unsigned long kimage_voffset;
-#define SZ_4K (4 * 1024)
-#define SZ_16K (16 * 1024)
-#define SZ_64K (64 * 1024)
-#define SZ_128M (128 * 1024 * 1024)
+#define SZ_4K 4096
+#define SZ_16K 16384
+#define SZ_64K 65536
-#define PAGE_OFFSET_36 ((0xffffffffffffffffUL) << 36)
-#define PAGE_OFFSET_39 ((0xffffffffffffffffUL) << 39)
-#define PAGE_OFFSET_42 ((0xffffffffffffffffUL) << 42)
-#define PAGE_OFFSET_47 ((0xffffffffffffffffUL) << 47)
-#define PAGE_OFFSET_48 ((0xffffffffffffffffUL) << 48)
+#define PAGE_OFFSET_36 ((0xffffffffffffffffUL) << 36)
+#define PAGE_OFFSET_39 ((0xffffffffffffffffUL) << 39)
+#define PAGE_OFFSET_42 ((0xffffffffffffffffUL) << 42)
+#define PAGE_OFFSET_47 ((0xffffffffffffffffUL) << 47)
+#define PAGE_OFFSET_48 ((0xffffffffffffffffUL) << 48)
+#define PAGE_OFFSET_52 ((0xffffffffffffffffUL) << 52)
#define pgd_val(x) ((x).pgd)
#define pud_val(x) (pgd_val((x).pgd))
#define pmd_val(x) (pud_val((x).pud))
#define pte_val(x) ((x).pte)
-#define PAGE_MASK (~(PAGESIZE() - 1))
-#define PGDIR_SHIFT ((PAGESHIFT() - 3) * pgtable_level + 3)
-#define PTRS_PER_PGD (1 << (va_bits - PGDIR_SHIFT))
-#define PUD_SHIFT get_pud_shift_arm64()
-#define PUD_SIZE (1UL << PUD_SHIFT)
-#define PUD_MASK (~(PUD_SIZE - 1))
-#define PTRS_PER_PTE (1 << (PAGESHIFT() - 3))
-#define PTRS_PER_PUD PTRS_PER_PTE
-#define PMD_SHIFT ((PAGESHIFT() - 3) * 2 + 3)
-#define PMD_SIZE (1UL << PMD_SHIFT)
-#define PMD_MASK (~(PMD_SIZE - 1))
+/* See 'include/uapi/linux/const.h' for definitions below */
+#define __AC(X,Y) (X##Y)
+#define _AC(X,Y) __AC(X,Y)
+#define _AT(T,X) ((T)(X))
+
+/* See 'include/asm/pgtable-types.h' for definitions below */
+typedef unsigned long pteval_t;
+typedef unsigned long pmdval_t;
+typedef unsigned long pudval_t;
+typedef unsigned long pgdval_t;
+
+#define PAGE_SHIFT PAGESHIFT()
+
+/* See 'arch/arm64/include/asm/pgtable-hwdef.h' for definitions below */
+
+#define ARM64_HW_PGTABLE_LEVEL_SHIFT(n) ((PAGE_SHIFT - 3) * (4 - (n)) + 3)
+
+#define PTRS_PER_PTE (1 << (PAGE_SHIFT - 3))
+
+/*
+ * PMD_SHIFT determines the size a level 2 page table entry can map.
+ */
+#define PMD_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(2)
+#define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
+#define PMD_MASK (~(PMD_SIZE-1))
#define PTRS_PER_PMD PTRS_PER_PTE
-#define PAGE_PRESENT (1 << 0)
+/*
+ * PUD_SHIFT determines the size a level 1 page table entry can map.
+ */
+#define PUD_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(1)
+#define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
+#define PUD_MASK (~(PUD_SIZE-1))
+#define PTRS_PER_PUD PTRS_PER_PTE
+
+/*
+ * PGDIR_SHIFT determines the size a top-level page table entry can map
+ * (depending on the configuration, this level can be 0, 1 or 2).
+ */
+#define PGDIR_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(4 - (pgtable_level))
+#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
+#define PGDIR_MASK (~(PGDIR_SIZE-1))
+#define PTRS_PER_PGD (1 << ((va_bits) - PGDIR_SHIFT))
+
+/*
+ * Section address mask and size definitions.
+ */
#define SECTIONS_SIZE_BITS 30
-/* Highest possible physical address supported */
-#define PHYS_MASK_SHIFT 48
-#define PHYS_MASK ((1UL << PHYS_MASK_SHIFT) - 1)
+
/*
- * Remove the highest order bits that are not a part of the
- * physical address in a section
+ * Hardware page table definitions.
+ *
+ * Level 1 descriptor (PUD).
*/
-#define PMD_SECTION_MASK ((1UL << 40) - 1)
+#define PUD_TYPE_TABLE (_AT(pudval_t, 3) << 0)
+#define PUD_TABLE_BIT (_AT(pudval_t, 1) << 1)
+#define PUD_TYPE_MASK (_AT(pudval_t, 3) << 0)
+#define PUD_TYPE_SECT (_AT(pudval_t, 1) << 0)
-#define PMD_TYPE_MASK 3
-#define PMD_TYPE_SECT 1
-#define PMD_TYPE_TABLE 3
+/*
+ * Level 2 descriptor (PMD).
+ */
+#define PMD_TYPE_MASK (_AT(pmdval_t, 3) << 0)
+#define PMD_TYPE_FAULT (_AT(pmdval_t, 0) << 0)
+#define PMD_TYPE_TABLE (_AT(pmdval_t, 3) << 0)
+#define PMD_TYPE_SECT (_AT(pmdval_t, 1) << 0)
+#define PMD_TABLE_BIT (_AT(pmdval_t, 1) << 1)
+
+/*
+ * Level 3 descriptor (PTE).
+ */
+#define PTE_ADDR_LOW (((_AT(pteval_t, 1) << (48 - PAGE_SHIFT)) - 1) << PAGE_SHIFT)
+#define PTE_ADDR_HIGH (_AT(pteval_t, 0xf) << 12)
+
+static inline unsigned long
+get_pte_addr_mask_arm64(void)
+{
+ if (lpa_52_bit_support_available)
+ return (PTE_ADDR_LOW | PTE_ADDR_HIGH);
+ else
+ return PTE_ADDR_LOW;
+}
+
+#define PTE_ADDR_MASK get_pte_addr_mask_arm64()
-#define PUD_TYPE_MASK 3
-#define PUD_TYPE_SECT 1
-#define PUD_TYPE_TABLE 3
+#define PAGE_MASK (~(PAGESIZE() - 1))
+#define PAGE_PRESENT (1 << 0)
+/* Helper API to convert between a physical address and its placement
+ * in a page table entry, taking care of 52-bit addresses.
+ */
+static inline unsigned long
+__pte_to_phys(pte_t pte)
+{
+ if (lpa_52_bit_support_available)
+ return ((pte_val(pte) & PTE_ADDR_LOW) | ((pte_val(pte) & PTE_ADDR_HIGH) << 36));
+ else
+ return (pte_val(pte) & PTE_ADDR_MASK);
+}
+
+/* Find an entry in a page-table-directory */
#define pgd_index(vaddr) (((vaddr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
-#define pgd_offset(pgdir, vaddr) ((pgd_t *)(pgdir) + pgd_index(vaddr))
-#define pte_index(vaddr) (((vaddr) >> PAGESHIFT()) & (PTRS_PER_PTE - 1))
-#define pmd_page_paddr(pmd) (pmd_val(pmd) & PHYS_MASK & (int32_t)PAGE_MASK)
-#define pte_offset(dir, vaddr) ((pte_t*)pmd_page_paddr((*dir)) + pte_index(vaddr))
+static inline pte_t
+pgd_pte(pgd_t pgd)
+{
+ return __pte(pgd_val(pgd));
+}
-#define pmd_index(vaddr) (((vaddr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
-#define pud_page_paddr(pud) (pud_val(pud) & PHYS_MASK & (int32_t)PAGE_MASK)
-#define pmd_offset_pgtbl_lvl_2(pud, vaddr) ((pmd_t *)pud)
-#define pmd_offset_pgtbl_lvl_3(pud, vaddr) ((pmd_t *)pud_page_paddr((*pud)) + pmd_index(vaddr))
+#define __pgd_to_phys(pgd) __pte_to_phys(pgd_pte(pgd))
+#define pgd_offset(pgd, vaddr) ((pgd_t *)(pgd) + pgd_index(vaddr))
+
+static inline pte_t pud_pte(pud_t pud)
+{
+ return __pte(pud_val(pud));
+}
+static inline unsigned long
+pgd_page_paddr(pgd_t pgd)
+{
+ return __pgd_to_phys(pgd);
+}
+
+/* Find an entry in the first-level page table. */
#define pud_index(vaddr) (((vaddr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
-#define pgd_page_paddr(pgd) (pgd_val(pgd) & PHYS_MASK & (int32_t)PAGE_MASK)
+#define __pud_to_phys(pud) __pte_to_phys(pud_pte(pud))
+
+static inline unsigned long
+pud_page_paddr(pud_t pud)
+{
+ return __pud_to_phys(pud);
+}
+
+/* Find an entry in the second-level page table. */
+#define pmd_index(vaddr) (((vaddr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
+
+static inline pte_t pmd_pte(pmd_t pmd)
+{
+ return __pte(pmd_val(pmd));
+}
+
+#define __pmd_to_phys(pmd) __pte_to_phys(pmd_pte(pmd))
+
+static inline unsigned long
+pmd_page_paddr(pmd_t pmd)
+{
+ return __pmd_to_phys(pmd);
+}
+
+/* Find an entry in the third-level page table. */
+#define pte_index(vaddr) (((vaddr) >> PAGESHIFT()) & (PTRS_PER_PTE - 1))
+#define pte_offset(dir, vaddr) (pmd_page_paddr((*dir)) + pte_index(vaddr) * sizeof(pte_t))
static unsigned long long
__pa(unsigned long vaddr)
@@ -116,32 +228,22 @@ __pa(unsigned long vaddr)
return (vaddr - kimage_voffset);
}
-static int
-get_pud_shift_arm64(void)
+static pud_t *
+pud_offset(pgd_t *pgda, pgd_t *pgdv, unsigned long vaddr)
{
- if (pgtable_level == 4)
- return ((PAGESHIFT() - 3) * 3 + 3);
+ if (pgtable_level > 3)
+ return (pud_t *)(pgd_page_paddr(*pgdv) + pud_index(vaddr) * sizeof(pud_t));
else
- return PGDIR_SHIFT;
+ return (pud_t *)(pgda);
}
static pmd_t *
pmd_offset(pud_t *puda, pud_t *pudv, unsigned long vaddr)
{
- if (pgtable_level == 2) {
- return pmd_offset_pgtbl_lvl_2(puda, vaddr);
- } else {
- return pmd_offset_pgtbl_lvl_3(pudv, vaddr);
- }
-}
-
-static pud_t *
-pud_offset(pgd_t *pgda, pgd_t *pgdv, unsigned long vaddr)
-{
- if (pgtable_level == 4)
- return ((pud_t *)pgd_page_paddr((*pgdv)) + pud_index(vaddr));
+ if (pgtable_level > 2)
+ return (pmd_t *)(pud_page_paddr(*pudv) + pmd_index(vaddr) * sizeof(pmd_t));
else
- return (pud_t *)(pgda);
+ return (pmd_t*)(puda);
}
static int calculate_plat_config(void)
@@ -287,6 +389,14 @@ get_stext_symbol(void)
int
get_machdep_info_arm64(void)
{
+ /* Determine if the PA address range is 52-bits: ARMv8.2-LPA */
+ if (NUMBER(MAX_PHYSMEM_BITS) != NOT_FOUND_NUMBER) {
+ info->max_physmem_bits = NUMBER(MAX_PHYSMEM_BITS);
+ if (info->max_physmem_bits == 52)
+ lpa_52_bit_support_available = 1;
+ } else
+ info->max_physmem_bits = 48;
+
/* Check if va_bits is still not initialized. If still 0, call
* get_versiondep_info() to initialize the same.
*/
@@ -299,12 +409,11 @@ get_machdep_info_arm64(void)
}
kimage_voffset = NUMBER(kimage_voffset);
- info->max_physmem_bits = PHYS_MASK_SHIFT;
info->section_size_bits = SECTIONS_SIZE_BITS;
DEBUG_MSG("kimage_voffset : %lx\n", kimage_voffset);
- DEBUG_MSG("max_physmem_bits : %lx\n", info->max_physmem_bits);
- DEBUG_MSG("section_size_bits: %lx\n", info->section_size_bits);
+ DEBUG_MSG("max_physmem_bits : %ld\n", info->max_physmem_bits);
+ DEBUG_MSG("section_size_bits: %ld\n", info->section_size_bits);
return TRUE;
}
@@ -362,6 +471,19 @@ get_versiondep_info_arm64(void)
return TRUE;
}
+/* 1GB section for Page Table level = 4 and Page Size = 4KB */
+static int
+is_pud_sect(pud_t pud)
+{
+ return ((pud_val(pud) & PUD_TYPE_MASK) == PUD_TYPE_SECT);
+}
+
+static int
+is_pmd_sect(pmd_t pmd)
+{
+ return ((pmd_val(pmd) & PMD_TYPE_MASK) == PMD_TYPE_SECT);
+}
+
/*
* vaddr_to_paddr_arm64() - translate arbitrary virtual address to physical
* @vaddr: virtual address to translate
@@ -399,10 +521,9 @@ vaddr_to_paddr_arm64(unsigned long vaddr)
return NOT_PADDR;
}
- if ((pud_val(pudv) & PUD_TYPE_MASK) == PUD_TYPE_SECT) {
- /* 1GB section for Page Table level = 4 and Page Size = 4KB */
- paddr = (pud_val(pudv) & (PUD_MASK & PMD_SECTION_MASK))
- + (vaddr & (PUD_SIZE - 1));
+ if (is_pud_sect(pudv)) {
+ paddr = (pud_page_paddr(pudv) & PUD_MASK) +
+ (vaddr & (PUD_SIZE - 1));
return paddr;
}
@@ -412,29 +533,24 @@ vaddr_to_paddr_arm64(unsigned long vaddr)
return NOT_PADDR;
}
- switch (pmd_val(pmdv) & PMD_TYPE_MASK) {
- case PMD_TYPE_TABLE:
- ptea = pte_offset(&pmdv, vaddr);
- /* 64k page */
- if (!readmem(PADDR, (unsigned long long)ptea, &ptev, sizeof(ptev))) {
- ERRMSG("Can't read pte\n");
- return NOT_PADDR;
- }
+ if (is_pmd_sect(pmdv)) {
+ paddr = (pmd_page_paddr(pmdv) & PMD_MASK) +
+ (vaddr & (PMD_SIZE - 1));
+ return paddr;
+ }
- if (!(pte_val(ptev) & PAGE_PRESENT)) {
- ERRMSG("Can't get a valid pte.\n");
- return NOT_PADDR;
- } else {
+ ptea = (pte_t *)pte_offset(&pmdv, vaddr);
+ if (!readmem(PADDR, (unsigned long long)ptea, &ptev, sizeof(ptev))) {
+ ERRMSG("Can't read pte\n");
+ return NOT_PADDR;
+ }
- paddr = (PAGEBASE(pte_val(ptev)) & PHYS_MASK)
- + (vaddr & (PAGESIZE() - 1));
- }
- break;
- case PMD_TYPE_SECT:
- /* 512MB section for Page Table level = 3 and Page Size = 64KB*/
- paddr = (pmd_val(pmdv) & (PMD_MASK & PMD_SECTION_MASK))
- + (vaddr & (PMD_SIZE - 1));
- break;
+ if (!(pte_val(ptev) & PAGE_PRESENT)) {
+ ERRMSG("Can't get a valid pte.\n");
+ return NOT_PADDR;
+ } else {
+ paddr = __pte_to_phys(ptev) +
+ (vaddr & (PAGESIZE() - 1));
}
return paddr;
--
2.7.4
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^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v3 3/3] makedumpfile/arm64: Add support for ARMv8.2-LVA (52-bit user-space VA support)
2019-03-10 10:57 [PATCH v3 0/3] makedumpfile/arm64: Add support for ARMv8.2 extensions Bhupesh Sharma
2019-03-10 10:57 ` [PATCH v3 1/3] tree-wide: Retrieve 'MAX_PHYSMEM_BITS' from vmcoreinfo (if available) Bhupesh Sharma
2019-03-10 10:57 ` [PATCH v3 2/3] makedumpfile/arm64: Add support for ARMv8.2-LPA (52-bit PA support) Bhupesh Sharma
@ 2019-03-10 10:57 ` Bhupesh Sharma
2 siblings, 0 replies; 4+ messages in thread
From: Bhupesh Sharma @ 2019-03-10 10:57 UTC (permalink / raw)
To: kexec; +Cc: bhupesh.linux, bhsharma, k-hagio
With ARMv8.2-LVA architecture extension availability, arm64 hardware
which supports this extension can support upto 52-bit virtual
addresses. It is specially useful for having a 52-bit user-space virtual
address space while the kernel can still retain 48-bit virtual
addresses.
Since at the moment we enable the support of this extension in the
kernel via a CONFIG flag (CONFIG_ARM64_USER_VA_BITS_52), so there are
no clear mechanisms in user-space to determine this CONFIG
flag value and use it to determine the user-space VA address range
values.
'makedumpfile' can instead use 'MAX_USER_VA_BITS' value to
determine the maximum virtual physical address supported by user-space.
If 'MAX_USER_VA_BITS' value is greater than 'VA_BITS' than we are
running a use-case where user-space is 52-bit and underlying kernel is
still 48-bit. The increased 'PTRS_PER_PGD' value for such cases can then
be calculated as is done by the underlying kernel (see kernel file
'arch/arm64/include/asm/pgtable-hwdef.h' for details):
#define PTRS_PER_PGD (1 << (MAX_USER_VA_BITS - PGDIR_SHIFT))
I have sent a kernel patch upstream to add 'MAX_USER_VA_BITS' to
vmcoreinfo for arm64 (see [0]).
This patch is in accordance with ARMv8 Architecture Reference Manual
version D.a
[0].
http://lists.infradead.org/pipermail/kexec/2019-February/022411.html
Signed-off-by: Bhupesh Sharma <bhsharma@redhat.com>
---
arch/arm64.c | 106 +++++++++++++++++++++++++++++++++++++++++----------------
makedumpfile.c | 2 ++
makedumpfile.h | 1 +
3 files changed, 79 insertions(+), 30 deletions(-)
diff --git a/arch/arm64.c b/arch/arm64.c
index 6ed09fab5ba2..d23128df31f1 100644
--- a/arch/arm64.c
+++ b/arch/arm64.c
@@ -47,6 +47,7 @@ typedef struct {
static int lpa_52_bit_support_available;
static int pgtable_level;
static int va_bits;
+static int ptrs_per_pgd;
static unsigned long kimage_voffset;
#define SZ_4K 4096
@@ -107,7 +108,6 @@ typedef unsigned long pgdval_t;
#define PGDIR_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(4 - (pgtable_level))
#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
#define PGDIR_MASK (~(PGDIR_SIZE-1))
-#define PTRS_PER_PGD (1 << ((va_bits) - PGDIR_SHIFT))
/*
* Section address mask and size definitions.
@@ -166,7 +166,7 @@ __pte_to_phys(pte_t pte)
}
/* Find an entry in a page-table-directory */
-#define pgd_index(vaddr) (((vaddr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
+#define pgd_index(vaddr) (((vaddr) >> PGDIR_SHIFT) & (ptrs_per_pgd - 1))
static inline pte_t
pgd_pte(pgd_t pgd)
@@ -386,6 +386,46 @@ get_stext_symbol(void)
return(found ? kallsym : FALSE);
}
+static int
+get_va_bits_from_stext_arm64(void)
+{
+ ulong _stext;
+
+ _stext = get_stext_symbol();
+ if (!_stext) {
+ ERRMSG("Can't get the symbol of _stext.\n");
+ return FALSE;
+ }
+
+ /* Derive va_bits as per arch/arm64/Kconfig */
+ if ((_stext & PAGE_OFFSET_36) == PAGE_OFFSET_36) {
+ va_bits = 36;
+ } else if ((_stext & PAGE_OFFSET_39) == PAGE_OFFSET_39) {
+ va_bits = 39;
+ } else if ((_stext & PAGE_OFFSET_42) == PAGE_OFFSET_42) {
+ va_bits = 42;
+ } else if ((_stext & PAGE_OFFSET_47) == PAGE_OFFSET_47) {
+ va_bits = 47;
+ } else if ((_stext & PAGE_OFFSET_48) == PAGE_OFFSET_48) {
+ va_bits = 48;
+ } else {
+ ERRMSG("Cannot find a proper _stext for calculating VA_BITS\n");
+ return FALSE;
+ }
+
+ DEBUG_MSG("va_bits : %d (_stext)\n", va_bits);
+
+ return TRUE;
+}
+
+static void
+get_page_offset_arm64(void)
+{
+ info->page_offset = (0xffffffffffffffffUL) << (va_bits - 1);
+
+ DEBUG_MSG("page_offset : %lx\n", info->page_offset);
+}
+
int
get_machdep_info_arm64(void)
{
@@ -400,8 +440,37 @@ get_machdep_info_arm64(void)
/* Check if va_bits is still not initialized. If still 0, call
* get_versiondep_info() to initialize the same.
*/
+ if (NUMBER(VA_BITS) != NOT_FOUND_NUMBER) {
+ va_bits = NUMBER(VA_BITS);
+ DEBUG_MSG("va_bits : %d (vmcoreinfo)\n",
+ va_bits);
+ }
+
+ /* Check if va_bits is still not initialized. If still 0, call
+ * get_versiondep_info() to initialize the same from _stext
+ * symbol.
+ */
if (!va_bits)
- get_versiondep_info_arm64();
+ if (get_va_bits_from_stext_arm64() == FALSE)
+ return FALSE;
+
+ get_page_offset_arm64();
+
+ if (NUMBER(PTRS_PER_PGD) != NOT_FOUND_NUMBER) {
+ ptrs_per_pgd = NUMBER(PTRS_PER_PGD);
+ DEBUG_MSG("ptrs_per_pgd : %d (vmcoreinfo)\n",
+ ptrs_per_pgd);
+ }
+
+ /* Check if ptrs_per_pgd is still not initialized.
+ * If still 0, its not available in vmcoreinfo and its
+ * safe to initialize it with va_bits.
+ */
+ if (!ptrs_per_pgd) {
+ ptrs_per_pgd = (1 << ((va_bits) - PGDIR_SHIFT));
+ DEBUG_MSG("ptrs_per_pgd : %d (default)\n",
+ ptrs_per_pgd);
+ }
if (!calculate_plat_config()) {
ERRMSG("Can't determine platform config values\n");
@@ -439,34 +508,11 @@ get_xen_info_arm64(void)
int
get_versiondep_info_arm64(void)
{
- ulong _stext;
-
- _stext = get_stext_symbol();
- if (!_stext) {
- ERRMSG("Can't get the symbol of _stext.\n");
- return FALSE;
- }
-
- /* Derive va_bits as per arch/arm64/Kconfig */
- if ((_stext & PAGE_OFFSET_36) == PAGE_OFFSET_36) {
- va_bits = 36;
- } else if ((_stext & PAGE_OFFSET_39) == PAGE_OFFSET_39) {
- va_bits = 39;
- } else if ((_stext & PAGE_OFFSET_42) == PAGE_OFFSET_42) {
- va_bits = 42;
- } else if ((_stext & PAGE_OFFSET_47) == PAGE_OFFSET_47) {
- va_bits = 47;
- } else if ((_stext & PAGE_OFFSET_48) == PAGE_OFFSET_48) {
- va_bits = 48;
- } else {
- ERRMSG("Cannot find a proper _stext for calculating VA_BITS\n");
- return FALSE;
- }
-
- info->page_offset = (0xffffffffffffffffUL) << (va_bits - 1);
+ if (!va_bits)
+ if (get_va_bits_from_stext_arm64() == FALSE)
+ return FALSE;
- DEBUG_MSG("va_bits : %d\n", va_bits);
- DEBUG_MSG("page_offset : %lx\n", info->page_offset);
+ get_page_offset_arm64();
return TRUE;
}
diff --git a/makedumpfile.c b/makedumpfile.c
index b7c1c01251bf..3ddb99a1e988 100644
--- a/makedumpfile.c
+++ b/makedumpfile.c
@@ -2291,6 +2291,7 @@ write_vmcoreinfo_data(void)
WRITE_NUMBER("HUGETLB_PAGE_DTOR", HUGETLB_PAGE_DTOR);
#ifdef __aarch64__
+ WRITE_NUMBER("PTRS_PER_PGD", PTRS_PER_PGD);
WRITE_NUMBER("VA_BITS", VA_BITS);
WRITE_NUMBER_UNSIGNED("PHYS_OFFSET", PHYS_OFFSET);
WRITE_NUMBER_UNSIGNED("kimage_voffset", kimage_voffset);
@@ -2694,6 +2695,7 @@ read_vmcoreinfo(void)
READ_NUMBER("PAGE_BUDDY_MAPCOUNT_VALUE", PAGE_BUDDY_MAPCOUNT_VALUE);
READ_NUMBER("phys_base", phys_base);
#ifdef __aarch64__
+ READ_NUMBER("PTRS_PER_PGD", PTRS_PER_PGD);
READ_NUMBER("VA_BITS", VA_BITS);
READ_NUMBER_UNSIGNED("PHYS_OFFSET", PHYS_OFFSET);
READ_NUMBER_UNSIGNED("kimage_voffset", kimage_voffset);
diff --git a/makedumpfile.h b/makedumpfile.h
index d49f1f1fc1a9..a9f88721f141 100644
--- a/makedumpfile.h
+++ b/makedumpfile.h
@@ -1933,6 +1933,7 @@ struct number_table {
long HUGETLB_PAGE_DTOR;
long phys_base;
#ifdef __aarch64__
+ long PTRS_PER_PGD;
long VA_BITS;
unsigned long PHYS_OFFSET;
unsigned long kimage_voffset;
--
2.7.4
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^ permalink raw reply related [flat|nested] 4+ messages in thread