[kexec-tools][PATCH] ARM: Fix add_buffer_phys_virt() align issue

[kexec-tools][PATCH] ARM: Fix add_buffer_phys_virt() align issue

[Alexander Kanavin]

From: Haiqing Bai <Haiqing.Bai@windriver.com>

When "CONFIG_ARM_LPAE" is enabled,3 level page table
is used by MMU, the "SECTION_SIZE" is defined with
(1 << 21), but 'add_buffer_phys_virt()' hardcode this
to (1 << 20).

Suggested-By: fredrik.markstrom@gmail.com
Signed-off-by: Haiqing Bai <Haiqing.Bai@windriver.com>
Signed-off-by: Alexander Kanavin <alex@linutronix.de>
---
 kexec/arch/arm/crashdump-arm.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/kexec/arch/arm/crashdump-arm.c b/kexec/arch/arm/crashdump-arm.c
index 1ec1826..cc20f63 100644
--- a/kexec/arch/arm/crashdump-arm.c
+++ b/kexec/arch/arm/crashdump-arm.c
@@ -242,6 +242,7 @@ int load_crashdump_segments(struct kexec_info *info, char *mod_cmdline)
 	void *buf;
 	int err;
 	int last_ranges;
+	unsigned short align_bit_shift = 20;
 
 	/*
 	 * First fetch all the memory (RAM) ranges that we are going to pass to
@@ -283,6 +284,7 @@ int load_crashdump_segments(struct kexec_info *info, char *mod_cmdline)
 
 		/* for support LPAE enabled kernel*/
 		elf_info.class = ELFCLASS64;
+		align_bit_shift = 21;
 
 		err = crash_create_elf64_headers(info, &elf_info,
 					 usablemem_rgns.ranges,
@@ -304,8 +306,9 @@ int load_crashdump_segments(struct kexec_info *info, char *mod_cmdline)
 	 * 1MB) so that available memory passed in kernel command line will be
 	 * aligned to 1MB. This is because kernel create_mapping() wants memory
 	 * regions to be aligned to SECTION_SIZE.
+	 * The SECTION_SIZE of LPAE kernel is '1UL << 21' defined in pgtable-3level.h
 	 */
-	elfcorehdr = add_buffer_phys_virt(info, buf, bufsz, bufsz, 1 << 20,
+	elfcorehdr = add_buffer_phys_virt(info, buf, bufsz, bufsz, 1 << align_bit_shift,
 					  crash_kernel_mem.start,
 					  crash_kernel_mem.end, -1, 0);
 
-- 
2.39.2


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Re: [kexec-tools][PATCH] ARM: Fix add_buffer_phys_virt() align issue

[Simon Horman]

On Wed, Apr 24, 2024 at 02:17:27PM +0200, Alexander Kanavin wrote:
> From: Haiqing Bai <Haiqing.Bai@windriver.com>
> 
> When "CONFIG_ARM_LPAE" is enabled,3 level page table
> is used by MMU, the "SECTION_SIZE" is defined with
> (1 << 21), but 'add_buffer_phys_virt()' hardcode this
> to (1 << 20).
> 
> Suggested-By: fredrik.markstrom@gmail.com
> Signed-off-by: Haiqing Bai <Haiqing.Bai@windriver.com>
> Signed-off-by: Alexander Kanavin <alex@linutronix.de>

Thanks, applied.

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