From: Jerone Young <jyoung5@us.ibm.com>
To: kvm-ppc@vger.kernel.org
Subject: Re: [PATCH] [v5] Add gdb break point support to PowerPC kvm
Date: Mon, 09 Jun 2008 23:56:36 +0000 [thread overview]
Message-ID: <1213055796.12472.2.camel@thinkpadL> (raw)
In-Reply-To: <1664758e846c292f5882.1213035589@thinkpadL>
On Mon, 2008-06-09 at 17:56 -0500, Hollis Blanchard wrote:
> On Mon, 2008-06-09 at 16:08 -0500, Jerone Young wrote:
> >
> > > You also have not addressed the case I pointed out where an IAC
> > matches
> > > after you've programmed it but before you've entered the guest.
> >
> > Basically can disable them in the dbcr0 before we do any switching out
> > of registers.
>
> We'll have to enable DBCR0 some time, right?
>
Yes it gets enabled when when the guest cuts on the bits it wants & the
we restre the host DBCR0.
> > If an IAC is matched before we enter the guest it will be caught host
> > that catches it.
>
> But that won't happen because you've disabled MSR[DE].
Ah... you don't rember the whole imprecise interrupts ;-) . When MSR[DE]
=0 and an IAC will go off but not at the exact address. This was fun
figuring out.
I also have a bug in this patch. I placed the wrong definitions when
disabling the debug interrupts. I'll respin again. Look things over more
carefully this time.
>
next prev parent reply other threads:[~2008-06-09 23:56 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-06-09 18:19 [PATCH] [v5] Add gdb break point support to PowerPC kvm Jerone Young
2008-06-09 20:51 ` Hollis Blanchard
2008-06-09 21:08 ` Jerone Young
2008-06-09 22:56 ` Hollis Blanchard
2008-06-09 23:56 ` Jerone Young [this message]
2008-06-10 15:12 ` Hollis Blanchard
2008-06-10 15:33 ` Jerone Young
2008-06-10 15:45 ` Hollis Blanchard
2008-06-10 15:54 ` Jerone Young
2008-06-10 16:27 ` Jerone Young
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