Re: [PATCH] [v5] Add gdb break point support to PowerPC kvm

[Jerone Young <jyoung5@us.ibm.com>]

On Tue, 2008-06-10 at 10:45 -0500, Hollis Blanchard wrote:
> On Tue, 2008-06-10 at 10:33 -0500, Jerone Young wrote:
> > On Tue, 2008-06-10 at 10:12 -0500, Hollis Blanchard wrote:
> > > On Mon, 2008-06-09 at 18:56 -0500, Jerone Young wrote:
> > > > > > If an IAC is matched before we enter the guest it will be caught host
> > > > > > that catches it.
> > > > > 
> > > > > But that won't happen because you've disabled MSR[DE].
> > > > 
> > > > Ah... you don't rember the whole imprecise interrupts ;-) . When MSR[DE]
> > > > =0 and an IAC will go off but not at the exact address. This was fun
> > > > figuring out.
> > > 
> > > Right. Now, when will the deferred debug event fire, and who will handle
> > > it? What can we do about that?
> > 
> > If the debug registers are turned off before we disable MSR[DE], there
> > will be no debug events at all.
> > 
> > This is what I was talking about in my first couple of emails. If a
> > debug event does go off and the host does not handle it, the only way to
> > know is the dbsr register (and there is no way to save that off). So in
> > the end it could end up going off in the guest.  
> > 
> > This is why I said you should not do host debugging if you want to do
> > guest debugging at the sametime, as a work around for now.
> 
> As I said before, forget host debugging!
> 
> In fact, here is the exact text I sent to you on Friday, which you don't
> appear to have read, in which I said exactly the same thing:
> 
> On Fri, 2008-06-06 at 14:27 -0500, Hollis Blanchard wrote:
> > On Fri, 2008-06-06 at 14:11 -0500, Jerone Young wrote:
> > > That is an issue if you are using the IAC registers in the host
> > also > at the same time.
> > 
> > That is a totally separate issue. Imagine this in the host:
> > 
> > 0xc0001000 load_guest_debug_registers:
> >         MSR[DE] = 0
> >         IAC[0] = 0xc0001080
> >         ...
> > 0xc0001080
> >         ...
> >         enter guest
> > 
> > IAC1 matched. Now what happens?
> 
> Please think about this scenario.

Oh it hit me. So we *could* get an imprecise interrupt once we enable
dbcr0. 

So do you want to enable dbcr0 once we enable MSR_DE in
__kvmppc_vcpu_run() ?

(In the future please just plainly state the issue..it saves
emails..which I guess saves trees .. in someway).

> 
> > I can clear the dbsr registers also when disabling the debug interrupts
> > as a solution?
> 
> I think you're on the right track, but what you propose here simply
> won't affect the above scenario.
>