* [PATCH v2 0/5] Fix LPCR[AIL]=3 implementation and reject
@ 2019-09-16 7:31 Nicholas Piggin
2019-09-24 6:20 ` Paul Mackerras
2019-10-02 6:00 ` [PATCH v2 0/5] Fix LPCR[AIL]=3 implementation Nicholas Piggin
0 siblings, 2 replies; 3+ messages in thread
From: Nicholas Piggin @ 2019-09-16 7:31 UTC (permalink / raw)
To: kvm-ppc
This is an update of the series with comments addressed. Most of them
were relatively minor details except patch 3, which incorrectly added
end_cede to guest entry interrupt injection, now fixed.
Thanks,
Nick
Nicholas Piggin (5):
KVM: PPC: Book3S: Define and use SRR1_MSR_BITS
KVM: PPC: Book3S: Replace reset_msr mmu op with inject_interrupt arch
op
KVM: PPC: Book3S HV: Reuse kvmppc_inject_interrupt for async guest
delivery
KVM: PPC: Book3S HV: Implement LPCR[AIL]=3 mode for injected
interrupts
KVM: PPC: Book3S HV: Reject mflags=2 (LPCR[AIL]=2) ADDR_TRANS_MODE
mode
arch/powerpc/include/asm/kvm_host.h | 1 -
arch/powerpc/include/asm/kvm_ppc.h | 1 +
arch/powerpc/include/asm/reg.h | 12 ++++
arch/powerpc/kvm/book3s.c | 27 +--------
arch/powerpc/kvm/book3s.h | 3 +
arch/powerpc/kvm/book3s_32_mmu.c | 6 --
arch/powerpc/kvm/book3s_64_mmu.c | 15 -----
arch/powerpc/kvm/book3s_64_mmu_hv.c | 13 -----
arch/powerpc/kvm/book3s_hv.c | 28 ++--------
arch/powerpc/kvm/book3s_hv_builtin.c | 82 +++++++++++++++++++++++-----
arch/powerpc/kvm/book3s_hv_nested.c | 2 +-
arch/powerpc/kvm/book3s_pr.c | 38 ++++++++++++-
12 files changed, 129 insertions(+), 99 deletions(-)
--
2.23.0
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH v2 0/5] Fix LPCR[AIL]=3 implementation and reject
2019-09-16 7:31 [PATCH v2 0/5] Fix LPCR[AIL]=3 implementation and reject Nicholas Piggin
@ 2019-09-24 6:20 ` Paul Mackerras
2019-10-02 6:00 ` [PATCH v2 0/5] Fix LPCR[AIL]=3 implementation Nicholas Piggin
1 sibling, 0 replies; 3+ messages in thread
From: Paul Mackerras @ 2019-09-24 6:20 UTC (permalink / raw)
To: kvm-ppc
On Mon, Sep 16, 2019 at 05:31:03PM +1000, Nicholas Piggin wrote:
> This is an update of the series with comments addressed. Most of them
> were relatively minor details except patch 3, which incorrectly added
> end_cede to guest entry interrupt injection, now fixed.
With this series, compiling a pmac32_defconfig with PR KVM turned on,
I get compile errors as follows:
make[1]: Entering directory '/home/paulus/kernel/test-pmac-kvm'
Using /home/paulus/kernel/kvm as source for kernel
GEN Makefile
CALL /home/paulus/kernel/kvm/scripts/checksyscalls.sh
<stdin>:1511:2: warning: #warning syscall clone3 not implemented [-Wcpp]
CALL /home/paulus/kernel/kvm/scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
CALL /home/paulus/kernel/kvm/arch/powerpc/kernel/prom_init_check.sh
CC [M] arch/powerpc/kvm/book3s_pr.o
In file included from /home/paulus/kernel/kvm/arch/powerpc/include/asm/processor.h:9:0,
from /home/paulus/kernel/kvm/arch/powerpc/include/asm/thread_info.h:22,
from /home/paulus/kernel/kvm/include/linux/thread_info.h:38,
from /home/paulus/kernel/kvm/include/asm-generic/preempt.h:5,
from ./arch/powerpc/include/generated/asm/preempt.h:1,
from /home/paulus/kernel/kvm/include/linux/preempt.h:78,
from /home/paulus/kernel/kvm/include/linux/hardirq.h:5,
from /home/paulus/kernel/kvm/include/linux/kvm_host.h:7,
from /home/paulus/kernel/kvm/arch/powerpc/kvm/book3s_pr.c:19:
/home/paulus/kernel/kvm/arch/powerpc/kvm/book3s_pr.c: In function ‘kvmppc_inject_interrupt_pr’:
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:67:23: error: left shift count >= width of type [-Werror=shift-count-overflow]
#define __MASK(X) (1UL<<(X))
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:119:18: note: in expansion of macro ‘__MASK’
#define MSR_TS_T __MASK(MSR_TS_T_LG) /* Transaction Transactional */
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:120:22: note: in expansion of macro ‘MSR_TS_T’
#define MSR_TS_MASK (MSR_TS_T | MSR_TS_S) /* Transaction State bits */
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:122:41: note: in expansion of macro ‘MSR_TS_MASK’
#define MSR_TM_TRANSACTIONAL(x) (((x) & MSR_TS_MASK) = MSR_TS_T)
^
/home/paulus/kernel/kvm/arch/powerpc/kvm/book3s_pr.c:118:6: note: in expansion of macro ‘MSR_TM_TRANSACTIONAL’
if (MSR_TM_TRANSACTIONAL(msr))
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:67:23: error: left shift count >= width of type [-Werror=shift-count-overflow]
#define __MASK(X) (1UL<<(X))
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:118:18: note: in expansion of macro ‘__MASK’
#define MSR_TS_S __MASK(MSR_TS_S_LG) /* Transaction Suspended */
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:120:33: note: in expansion of macro ‘MSR_TS_S’
#define MSR_TS_MASK (MSR_TS_T | MSR_TS_S) /* Transaction State bits */
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:122:41: note: in expansion of macro ‘MSR_TS_MASK’
#define MSR_TM_TRANSACTIONAL(x) (((x) & MSR_TS_MASK) = MSR_TS_T)
^
/home/paulus/kernel/kvm/arch/powerpc/kvm/book3s_pr.c:118:6: note: in expansion of macro ‘MSR_TM_TRANSACTIONAL’
if (MSR_TM_TRANSACTIONAL(msr))
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:67:23: error: left shift count >= width of type [-Werror=shift-count-overflow]
#define __MASK(X) (1UL<<(X))
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:119:18: note: in expansion of macro ‘__MASK’
#define MSR_TS_T __MASK(MSR_TS_T_LG) /* Transaction Transactional */
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:122:57: note: in expansion of macro ‘MSR_TS_T’
#define MSR_TM_TRANSACTIONAL(x) (((x) & MSR_TS_MASK) = MSR_TS_T)
^
/home/paulus/kernel/kvm/arch/powerpc/kvm/book3s_pr.c:118:6: note: in expansion of macro ‘MSR_TM_TRANSACTIONAL’
if (MSR_TM_TRANSACTIONAL(msr))
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:67:23: error: left shift count >= width of type [-Werror=shift-count-overflow]
#define __MASK(X) (1UL<<(X))
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:118:18: note: in expansion of macro ‘__MASK’
#define MSR_TS_S __MASK(MSR_TS_S_LG) /* Transaction Suspended */
^
/home/paulus/kernel/kvm/arch/powerpc/kvm/book3s_pr.c:119:14: note: in expansion of macro ‘MSR_TS_S’
new_msr |= MSR_TS_S;
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:67:23: error: left shift count >= width of type [-Werror=shift-count-overflow]
#define __MASK(X) (1UL<<(X))
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:119:18: note: in expansion of macro ‘__MASK’
#define MSR_TS_T __MASK(MSR_TS_T_LG) /* Transaction Transactional */
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:120:22: note: in expansion of macro ‘MSR_TS_T’
#define MSR_TS_MASK (MSR_TS_T | MSR_TS_S) /* Transaction State bits */
^
/home/paulus/kernel/kvm/arch/powerpc/kvm/book3s_pr.c:121:20: note: in expansion of macro ‘MSR_TS_MASK’
new_msr |= msr & MSR_TS_MASK;
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:67:23: error: left shift count >= width of type [-Werror=shift-count-overflow]
#define __MASK(X) (1UL<<(X))
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:118:18: note: in expansion of macro ‘__MASK’
#define MSR_TS_S __MASK(MSR_TS_S_LG) /* Transaction Suspended */
^
/home/paulus/kernel/kvm/arch/powerpc/include/asm/reg.h:120:33: note: in expansion of macro ‘MSR_TS_S’
#define MSR_TS_MASK (MSR_TS_T | MSR_TS_S) /* Transaction State bits */
^
/home/paulus/kernel/kvm/arch/powerpc/kvm/book3s_pr.c:121:20: note: in expansion of macro ‘MSR_TS_MASK’
new_msr |= msr & MSR_TS_MASK;
^
cc1: all warnings being treated as errors
make[3]: *** [/home/paulus/kernel/kvm/scripts/Makefile.build:274: arch/powerpc/kvm/book3s_pr.o] Error 1
make[2]: *** [/home/paulus/kernel/kvm/scripts/Makefile.build:490: arch/powerpc/kvm] Error 2
make[1]: *** [/home/paulus/kernel/kvm/Makefile:1079: arch/powerpc] Error 2
make[1]: Leaving directory '/home/paulus/kernel/test-pmac-kvm'
make: *** [Makefile:179: sub-make] Error 2
I think this is attributable to patch 2 of your series.
Paul.
^ permalink raw reply [flat|nested] 3+ messages in thread* [PATCH v2 0/5] Fix LPCR[AIL]=3 implementation
2019-09-16 7:31 [PATCH v2 0/5] Fix LPCR[AIL]=3 implementation and reject Nicholas Piggin
2019-09-24 6:20 ` Paul Mackerras
@ 2019-10-02 6:00 ` Nicholas Piggin
1 sibling, 0 replies; 3+ messages in thread
From: Nicholas Piggin @ 2019-10-02 6:00 UTC (permalink / raw)
To: kvm-ppc
- Fixed compile failure on pmac32_defconfig + PR KVM.
- Fixed bug where end_cede was still being incorrectly called.
- Slightly improved a comment about AIL delivery criteria.
Thanks,
Nick
Nicholas Piggin (5):
KVM: PPC: Book3S: Define and use SRR1_MSR_BITS
KVM: PPC: Book3S: Replace reset_msr mmu op with inject_interrupt arch
op
KVM: PPC: Book3S HV: Reuse kvmppc_inject_interrupt for async guest
delivery
KVM: PPC: Book3S HV: Implement LPCR[AIL]=3 mode for injected
interrupts
KVM: PPC: Book3S HV: Reject mflags=2 (LPCR[AIL]=2) ADDR_TRANS_MODE
mode
arch/powerpc/include/asm/kvm_host.h | 1 -
arch/powerpc/include/asm/kvm_ppc.h | 1 +
arch/powerpc/include/asm/reg.h | 12 ++++
arch/powerpc/kvm/book3s.c | 27 +--------
arch/powerpc/kvm/book3s.h | 3 +
arch/powerpc/kvm/book3s_32_mmu.c | 6 --
arch/powerpc/kvm/book3s_64_mmu.c | 15 -----
arch/powerpc/kvm/book3s_64_mmu_hv.c | 13 -----
arch/powerpc/kvm/book3s_hv.c | 28 ++--------
arch/powerpc/kvm/book3s_hv_builtin.c | 82 +++++++++++++++++++++++-----
arch/powerpc/kvm/book3s_hv_nested.c | 2 +-
arch/powerpc/kvm/book3s_pr.c | 40 +++++++++++++-
12 files changed, 131 insertions(+), 99 deletions(-)
--
2.23.0
^ permalink raw reply [flat|nested] 3+ messages in thread
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2019-09-16 7:31 [PATCH v2 0/5] Fix LPCR[AIL]=3 implementation and reject Nicholas Piggin
2019-09-24 6:20 ` Paul Mackerras
2019-10-02 6:00 ` [PATCH v2 0/5] Fix LPCR[AIL]=3 implementation Nicholas Piggin
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