[PATCH kvmtool 0/6] RISC-V Svinval, Zihintpause, anad Zicbom support

[PATCH kvmtool 0/6] RISC-V Svinval, Zihintpause, anad Zicbom support

[Anup Patel]

The latest Linux-6.1-rc1 has support for Svinval, Zihintpause and Zicbom
extensions in KVM RISC-V. This series adds corresponding changes in KVMTOOL
to allow Guest/VM use these new RISC-V extensions.

These patches can also be found in the riscv_svinval_zihintpause_zicbom_v1
branch at: https://github.com/avpatel/kvmtool.git

Andrew Jones (2):
  riscv: Move reg encoding helpers to kvm-cpu-arch.h
  riscv: Add Zicbom extension support

Anup Patel (3):
  Update UAPI headers based on Linux-6.1-rc1
  riscv: Add Svinval extension support
  riscv: Add --disable-<xyz> options to allow user disable extensions

Mayuresh Chitale (1):
  riscv: Add zihintpause extension support

 arm/aarch64/include/asm/kvm.h       |  6 ++++--
 include/linux/kvm.h                 |  1 +
 include/linux/virtio_blk.h          | 19 +++++++++++++++++++
 include/linux/virtio_net.h          | 14 +++++++-------
 include/linux/virtio_ring.h         | 16 +++++++++++-----
 riscv/fdt.c                         | 23 +++++++++++++++++++++--
 riscv/include/asm/kvm.h             |  4 ++++
 riscv/include/kvm/kvm-config-arch.h | 18 +++++++++++++++++-
 riscv/include/kvm/kvm-cpu-arch.h    | 19 +++++++++++++++++++
 riscv/kvm-cpu.c                     | 16 ----------------
 10 files changed, 103 insertions(+), 33 deletions(-)

-- 
2.34.1

[PATCH kvmtool 1/6] Update UAPI headers based on Linux-6.1-rc1

[Anup Patel]

We update all UAPI headers based on Linux-6.1-rc1 so that we can
use latest features.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 arm/aarch64/include/asm/kvm.h |  6 ++++--
 include/linux/kvm.h           |  1 +
 include/linux/virtio_blk.h    | 19 +++++++++++++++++++
 include/linux/virtio_net.h    | 14 +++++++-------
 include/linux/virtio_ring.h   | 16 +++++++++++-----
 riscv/include/asm/kvm.h       |  4 ++++
 6 files changed, 46 insertions(+), 14 deletions(-)

diff --git a/arm/aarch64/include/asm/kvm.h b/arm/aarch64/include/asm/kvm.h
index 3bb1343..316917b 100644
--- a/arm/aarch64/include/asm/kvm.h
+++ b/arm/aarch64/include/asm/kvm.h
@@ -75,9 +75,11 @@ struct kvm_regs {
 
 /* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */
 #define KVM_ARM_DEVICE_TYPE_SHIFT	0
-#define KVM_ARM_DEVICE_TYPE_MASK	(0xffff << KVM_ARM_DEVICE_TYPE_SHIFT)
+#define KVM_ARM_DEVICE_TYPE_MASK	GENMASK(KVM_ARM_DEVICE_TYPE_SHIFT + 15, \
+						KVM_ARM_DEVICE_TYPE_SHIFT)
 #define KVM_ARM_DEVICE_ID_SHIFT		16
-#define KVM_ARM_DEVICE_ID_MASK		(0xffff << KVM_ARM_DEVICE_ID_SHIFT)
+#define KVM_ARM_DEVICE_ID_MASK		GENMASK(KVM_ARM_DEVICE_ID_SHIFT + 15, \
+						KVM_ARM_DEVICE_ID_SHIFT)
 
 /* Supported device IDs */
 #define KVM_ARM_DEVICE_VGIC_V2		0
diff --git a/include/linux/kvm.h b/include/linux/kvm.h
index eed0315..0d5d441 100644
--- a/include/linux/kvm.h
+++ b/include/linux/kvm.h
@@ -1177,6 +1177,7 @@ struct kvm_ppc_resize_hpt {
 #define KVM_CAP_VM_DISABLE_NX_HUGE_PAGES 220
 #define KVM_CAP_S390_ZPCI_OP 221
 #define KVM_CAP_S390_CPU_TOPOLOGY 222
+#define KVM_CAP_DIRTY_LOG_RING_ACQ_REL 223
 
 #ifdef KVM_CAP_IRQ_ROUTING
 
diff --git a/include/linux/virtio_blk.h b/include/linux/virtio_blk.h
index d888f01..58e70b2 100644
--- a/include/linux/virtio_blk.h
+++ b/include/linux/virtio_blk.h
@@ -40,6 +40,7 @@
 #define VIRTIO_BLK_F_MQ		12	/* support more than one vq */
 #define VIRTIO_BLK_F_DISCARD	13	/* DISCARD is supported */
 #define VIRTIO_BLK_F_WRITE_ZEROES	14	/* WRITE ZEROES is supported */
+#define VIRTIO_BLK_F_SECURE_ERASE	16 /* Secure Erase is supported */
 
 /* Legacy feature bits */
 #ifndef VIRTIO_BLK_NO_LEGACY
@@ -121,6 +122,21 @@ struct virtio_blk_config {
 	__u8 write_zeroes_may_unmap;
 
 	__u8 unused1[3];
+
+	/* the next 3 entries are guarded by VIRTIO_BLK_F_SECURE_ERASE */
+	/*
+	 * The maximum secure erase sectors (in 512-byte sectors) for
+	 * one segment.
+	 */
+	__virtio32 max_secure_erase_sectors;
+	/*
+	 * The maximum number of secure erase segments in a
+	 * secure erase command.
+	 */
+	__virtio32 max_secure_erase_seg;
+	/* Secure erase commands must be aligned to this number of sectors. */
+	__virtio32 secure_erase_sector_alignment;
+
 } __attribute__((packed));
 
 /*
@@ -155,6 +171,9 @@ struct virtio_blk_config {
 /* Write zeroes command */
 #define VIRTIO_BLK_T_WRITE_ZEROES	13
 
+/* Secure erase command */
+#define VIRTIO_BLK_T_SECURE_ERASE	14
+
 #ifndef VIRTIO_BLK_NO_LEGACY
 /* Barrier before this op. */
 #define VIRTIO_BLK_T_BARRIER	0x80000000
diff --git a/include/linux/virtio_net.h b/include/linux/virtio_net.h
index 29ced55..6cb842e 100644
--- a/include/linux/virtio_net.h
+++ b/include/linux/virtio_net.h
@@ -56,7 +56,7 @@
 #define VIRTIO_NET_F_MQ	22	/* Device supports Receive Flow
 					 * Steering */
 #define VIRTIO_NET_F_CTRL_MAC_ADDR 23	/* Set MAC address */
-#define VIRTIO_NET_F_NOTF_COAL	53	/* Guest can handle notifications coalescing */
+#define VIRTIO_NET_F_NOTF_COAL	53	/* Device supports notifications coalescing */
 #define VIRTIO_NET_F_HASH_REPORT  57	/* Supports hash report */
 #define VIRTIO_NET_F_RSS	  60	/* Supports RSS RX steering */
 #define VIRTIO_NET_F_RSC_EXT	  61	/* extended coalescing info */
@@ -364,24 +364,24 @@ struct virtio_net_hash_config {
  */
 #define VIRTIO_NET_CTRL_NOTF_COAL		6
 /*
- * Set the tx-usecs/tx-max-packets patameters.
- * tx-usecs - Maximum number of usecs to delay a TX notification.
- * tx-max-packets - Maximum number of packets to send before a TX notification.
+ * Set the tx-usecs/tx-max-packets parameters.
  */
 struct virtio_net_ctrl_coal_tx {
+	/* Maximum number of packets to send before a TX notification */
 	__le32 tx_max_packets;
+	/* Maximum number of usecs to delay a TX notification */
 	__le32 tx_usecs;
 };
 
 #define VIRTIO_NET_CTRL_NOTF_COAL_TX_SET		0
 
 /*
- * Set the rx-usecs/rx-max-packets patameters.
- * rx-usecs - Maximum number of usecs to delay a RX notification.
- * rx-max-frames - Maximum number of packets to receive before a RX notification.
+ * Set the rx-usecs/rx-max-packets parameters.
  */
 struct virtio_net_ctrl_coal_rx {
+	/* Maximum number of packets to receive before a RX notification */
 	__le32 rx_max_packets;
+	/* Maximum number of usecs to delay a RX notification */
 	__le32 rx_usecs;
 };
 
diff --git a/include/linux/virtio_ring.h b/include/linux/virtio_ring.h
index 476d3e5..f8c20d3 100644
--- a/include/linux/virtio_ring.h
+++ b/include/linux/virtio_ring.h
@@ -93,15 +93,21 @@
 #define VRING_USED_ALIGN_SIZE 4
 #define VRING_DESC_ALIGN_SIZE 16
 
-/* Virtio ring descriptors: 16 bytes.  These can chain together via "next". */
+/**
+ * struct vring_desc - Virtio ring descriptors,
+ * 16 bytes long. These can chain together via @next.
+ *
+ * @addr: buffer address (guest-physical)
+ * @len: buffer length
+ * @flags: descriptor flags
+ * @next: index of the next descriptor in the chain,
+ *        if the VRING_DESC_F_NEXT flag is set. We chain unused
+ *        descriptors via this, too.
+ */
 struct vring_desc {
-	/* Address (guest-physical). */
 	__virtio64 addr;
-	/* Length. */
 	__virtio32 len;
-	/* The flags as indicated above. */
 	__virtio16 flags;
-	/* We chain unused descriptors via this, too */
 	__virtio16 next;
 };
 
diff --git a/riscv/include/asm/kvm.h b/riscv/include/asm/kvm.h
index 7351417..8985ff2 100644
--- a/riscv/include/asm/kvm.h
+++ b/riscv/include/asm/kvm.h
@@ -48,6 +48,7 @@ struct kvm_sregs {
 /* CONFIG registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
 struct kvm_riscv_config {
 	unsigned long isa;
+	unsigned long zicbom_block_size;
 };
 
 /* CORE registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
@@ -98,6 +99,9 @@ enum KVM_RISCV_ISA_EXT_ID {
 	KVM_RISCV_ISA_EXT_M,
 	KVM_RISCV_ISA_EXT_SVPBMT,
 	KVM_RISCV_ISA_EXT_SSTC,
+	KVM_RISCV_ISA_EXT_SVINVAL,
+	KVM_RISCV_ISA_EXT_ZIHINTPAUSE,
+	KVM_RISCV_ISA_EXT_ZICBOM,
 	KVM_RISCV_ISA_EXT_MAX,
 };
 
-- 
2.34.1

[PATCH kvmtool 2/6] riscv: Add Svinval extension support

[Anup Patel]

Svinval extension allows the guest OS to perform range based TLB
maintenance efficiently. Add the Svinval extensiont to the device
tree if it is supported by the host.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 riscv/fdt.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/riscv/fdt.c b/riscv/fdt.c
index e3d7717..42bc062 100644
--- a/riscv/fdt.c
+++ b/riscv/fdt.c
@@ -19,6 +19,7 @@ struct isa_ext_info {
 struct isa_ext_info isa_info_arr[] = {
 	{"svpbmt", KVM_RISCV_ISA_EXT_SVPBMT},
 	{"sstc", KVM_RISCV_ISA_EXT_SSTC},
+	{"svinval", KVM_RISCV_ISA_EXT_SVINVAL},
 };
 
 static void dump_fdt(const char *dtb_file, void *fdt)
-- 
2.34.1

[PATCH kvmtool 3/6] riscv: Add zihintpause extension support

[Anup Patel]

From: Mayuresh Chitale <mchitale@ventanamicro.com>

The zihintpause extension allows software to use the PAUSE instruction to
reduce energy consumption while executing spin-wait code sequences. Add the
zihintpause extension to the device tree if it is supported by the host.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
 riscv/fdt.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/riscv/fdt.c b/riscv/fdt.c
index 42bc062..ef0bc47 100644
--- a/riscv/fdt.c
+++ b/riscv/fdt.c
@@ -20,6 +20,7 @@ struct isa_ext_info isa_info_arr[] = {
 	{"svpbmt", KVM_RISCV_ISA_EXT_SVPBMT},
 	{"sstc", KVM_RISCV_ISA_EXT_SSTC},
 	{"svinval", KVM_RISCV_ISA_EXT_SVINVAL},
+	{"zihintpause", KVM_RISCV_ISA_EXT_ZIHINTPAUSE},
 };
 
 static void dump_fdt(const char *dtb_file, void *fdt)
-- 
2.34.1

[PATCH kvmtool 4/6] riscv: Move reg encoding helpers to kvm-cpu-arch.h

[Anup Patel]

From: Andrew Jones <ajones@ventanamicro.com>

We'll need one of these helpers in the next patch in another file.
Let's proactively move them all now, since others may some day also
be useful.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 riscv/fdt.c                      |  2 --
 riscv/include/kvm/kvm-cpu-arch.h | 19 +++++++++++++++++++
 riscv/kvm-cpu.c                  | 16 ----------------
 3 files changed, 19 insertions(+), 18 deletions(-)

diff --git a/riscv/fdt.c b/riscv/fdt.c
index ef0bc47..8d6da11 100644
--- a/riscv/fdt.c
+++ b/riscv/fdt.c
@@ -9,8 +9,6 @@
 #include <linux/kernel.h>
 #include <linux/sizes.h>
 
-#define RISCV_ISA_EXT_REG(id)	__kvm_reg_id(KVM_REG_RISCV_ISA_EXT, \
-					     id, KVM_REG_SIZE_ULONG)
 struct isa_ext_info {
 	const char *name;
 	unsigned long ext_id;
diff --git a/riscv/include/kvm/kvm-cpu-arch.h b/riscv/include/kvm/kvm-cpu-arch.h
index 4b3e602..e014839 100644
--- a/riscv/include/kvm/kvm-cpu-arch.h
+++ b/riscv/include/kvm/kvm-cpu-arch.h
@@ -18,6 +18,25 @@ static inline __u64 __kvm_reg_id(__u64 type, __u64 idx, __u64  size)
 #define KVM_REG_SIZE_ULONG	KVM_REG_SIZE_U32
 #endif
 
+#define RISCV_CONFIG_REG(name)	__kvm_reg_id(KVM_REG_RISCV_CONFIG, \
+					     KVM_REG_RISCV_CONFIG_REG(name), \
+					     KVM_REG_SIZE_ULONG)
+
+#define RISCV_ISA_EXT_REG(id)	__kvm_reg_id(KVM_REG_RISCV_ISA_EXT, \
+					     id, KVM_REG_SIZE_ULONG)
+
+#define RISCV_CORE_REG(name)	__kvm_reg_id(KVM_REG_RISCV_CORE, \
+					     KVM_REG_RISCV_CORE_REG(name), \
+					     KVM_REG_SIZE_ULONG)
+
+#define RISCV_CSR_REG(name)	__kvm_reg_id(KVM_REG_RISCV_CSR, \
+					     KVM_REG_RISCV_CSR_REG(name), \
+					     KVM_REG_SIZE_ULONG)
+
+#define RISCV_TIMER_REG(name)	__kvm_reg_id(KVM_REG_RISCV_TIMER, \
+					     KVM_REG_RISCV_TIMER_REG(name), \
+					     KVM_REG_SIZE_U64)
+
 struct kvm_cpu {
 	pthread_t	thread;
 
diff --git a/riscv/kvm-cpu.c b/riscv/kvm-cpu.c
index a17b957..f98bd7a 100644
--- a/riscv/kvm-cpu.c
+++ b/riscv/kvm-cpu.c
@@ -18,22 +18,6 @@ int kvm_cpu__get_debug_fd(void)
 	return debug_fd;
 }
 
-#define RISCV_CONFIG_REG(name)	__kvm_reg_id(KVM_REG_RISCV_CONFIG, \
-					     KVM_REG_RISCV_CONFIG_REG(name), \
-					     KVM_REG_SIZE_ULONG)
-
-#define RISCV_CORE_REG(name)	__kvm_reg_id(KVM_REG_RISCV_CORE, \
-					     KVM_REG_RISCV_CORE_REG(name), \
-					     KVM_REG_SIZE_ULONG)
-
-#define RISCV_CSR_REG(name)	__kvm_reg_id(KVM_REG_RISCV_CSR, \
-					     KVM_REG_RISCV_CSR_REG(name), \
-					     KVM_REG_SIZE_ULONG)
-
-#define RISCV_TIMER_REG(name)	__kvm_reg_id(KVM_REG_RISCV_TIMER, \
-					     KVM_REG_RISCV_TIMER_REG(name), \
-					     KVM_REG_SIZE_U64)
-
 struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, unsigned long cpu_id)
 {
 	struct kvm_cpu *vcpu;
-- 
2.34.1

[PATCH kvmtool 5/6] riscv: Add Zicbom extension support

[Anup Patel]

From: Andrew Jones <ajones@ventanamicro.com>

When the Zicbom extension is available expose it to the guest.
Also provide the guest the size of the cache block through DT.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 riscv/fdt.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/riscv/fdt.c b/riscv/fdt.c
index 8d6da11..30d3460 100644
--- a/riscv/fdt.c
+++ b/riscv/fdt.c
@@ -19,6 +19,7 @@ struct isa_ext_info isa_info_arr[] = {
 	{"sstc", KVM_RISCV_ISA_EXT_SSTC},
 	{"svinval", KVM_RISCV_ISA_EXT_SVINVAL},
 	{"zihintpause", KVM_RISCV_ISA_EXT_ZIHINTPAUSE},
+	{"zicbom", KVM_RISCV_ISA_EXT_ZICBOM},
 };
 
 static void dump_fdt(const char *dtb_file, void *fdt)
@@ -44,6 +45,7 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
 	int cpu, pos, i, index, valid_isa_len;
 	const char *valid_isa_order = "IEMAFDQCLBJTPVNSUHKORWXYZG";
 	int arr_sz = ARRAY_SIZE(isa_info_arr);
+	unsigned long cbom_blksz = 0;
 
 	_FDT(fdt_begin_node(fdt, "cpus"));
 	_FDT(fdt_property_cell(fdt, "#address-cells", 0x1));
@@ -78,6 +80,13 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
 				/* This extension is not available in hardware */
 				continue;
 
+			if (isa_info_arr[i].ext_id == KVM_RISCV_ISA_EXT_ZICBOM && !cbom_blksz) {
+				reg.id = RISCV_CONFIG_REG(zicbom_block_size);
+				reg.addr = (unsigned long)&cbom_blksz;
+				if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
+					die("KVM_GET_ONE_REG failed (config.zicbom_block_size)");
+			}
+
 			if ((strlen(isa_info_arr[i].name) + pos + 1) >= CPU_ISA_MAX_LEN) {
 				pr_warning("Insufficient space to append ISA exension\n");
 				break;
@@ -97,6 +106,8 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
 			_FDT(fdt_property_string(fdt, "mmu-type",
 						 "riscv,sv32"));
 		_FDT(fdt_property_string(fdt, "riscv,isa", cpu_isa));
+		if (cbom_blksz)
+			_FDT(fdt_property_cell(fdt, "riscv,cbom-block-size", cbom_blksz));
 		_FDT(fdt_property_cell(fdt, "reg", cpu));
 		_FDT(fdt_property_string(fdt, "status", "okay"));
 
-- 
2.34.1

[PATCH kvmtool 6/6] riscv: Add --disable-<xyz> options to allow user disable extensions

[Anup Patel]

By default, the KVM RISC-V keeps all extensions available to VCPU
enabled and KVMTOOL does not disable any extension.

We add --disable-<xyz> command-line options in KVMTOOL RISC-V to
allow users explicitly disable certain extension if they don't
desire it.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 riscv/fdt.c                         |  8 ++++++++
 riscv/include/kvm/kvm-config-arch.h | 18 +++++++++++++++++-
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/riscv/fdt.c b/riscv/fdt.c
index 30d3460..3cdb95c 100644
--- a/riscv/fdt.c
+++ b/riscv/fdt.c
@@ -80,6 +80,14 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
 				/* This extension is not available in hardware */
 				continue;
 
+			if (kvm->cfg.arch.ext_disabled[isa_info_arr[i].ext_id]) {
+				isa_ext_out = 0;
+				if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
+					pr_warning("Failed to disable %s ISA exension\n",
+						   isa_info_arr[i].name);
+				continue;
+			}
+
 			if (isa_info_arr[i].ext_id == KVM_RISCV_ISA_EXT_ZICBOM && !cbom_blksz) {
 				reg.id = RISCV_CONFIG_REG(zicbom_block_size);
 				reg.addr = (unsigned long)&cbom_blksz;
diff --git a/riscv/include/kvm/kvm-config-arch.h b/riscv/include/kvm/kvm-config-arch.h
index 526fca2..188125c 100644
--- a/riscv/include/kvm/kvm-config-arch.h
+++ b/riscv/include/kvm/kvm-config-arch.h
@@ -5,11 +5,27 @@
 
 struct kvm_config_arch {
 	const char	*dump_dtb_filename;
+	bool		ext_disabled[KVM_RISCV_ISA_EXT_MAX];
 };
 
 #define OPT_ARCH_RUN(pfx, cfg)						\
 	pfx,								\
 	OPT_STRING('\0', "dump-dtb", &(cfg)->dump_dtb_filename,		\
-		   ".dtb file", "Dump generated .dtb to specified file"),
+		   ".dtb file", "Dump generated .dtb to specified file"),\
+	OPT_BOOLEAN('\0', "disable-sstc",				\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_SSTC],	\
+		    "Disable Sstc Extension"),				\
+	OPT_BOOLEAN('\0', "disable-svinval",				\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_SVINVAL],	\
+		    "Disable Svinval Extension"),			\
+	OPT_BOOLEAN('\0', "disable-svpbmt",				\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_SVPBMT],	\
+		    "Disable Svpbmt Extension"),			\
+	OPT_BOOLEAN('\0', "disable-zicbom",				\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZICBOM],	\
+		    "Disable Zicbom Extension"),			\
+	OPT_BOOLEAN('\0', "disable-zihintpause",			\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZIHINTPAUSE],\
+		    "Disable Zihintpause Extension"),
 
 #endif /* KVM__KVM_CONFIG_ARCH_H */
-- 
2.34.1

[PATCH kvmtool 0/6] RISC-V Svinval, Zihintpause, anad Zicbom support

[Anup Patel]

Hi Will,

On Tue, Oct 18, 2022 at 7:39 PM Anup Patel <apatel@ventanamicro.com> wrote:
>
> The latest Linux-6.1-rc1 has support for Svinval, Zihintpause and Zicbom
> extensions in KVM RISC-V. This series adds corresponding changes in KVMTOOL
> to allow Guest/VM use these new RISC-V extensions.
>
> These patches can also be found in the riscv_svinval_zihintpause_zicbom_v1
> branch at: https://github.com/avpatel/kvmtool.git
>
> Andrew Jones (2):
>   riscv: Move reg encoding helpers to kvm-cpu-arch.h
>   riscv: Add Zicbom extension support
>
> Anup Patel (3):
>   Update UAPI headers based on Linux-6.1-rc1
>   riscv: Add Svinval extension support
>   riscv: Add --disable-<xyz> options to allow user disable extensions
>
> Mayuresh Chitale (1):
>   riscv: Add zihintpause extension support
>
>  arm/aarch64/include/asm/kvm.h       |  6 ++++--
>  include/linux/kvm.h                 |  1 +
>  include/linux/virtio_blk.h          | 19 +++++++++++++++++++
>  include/linux/virtio_net.h          | 14 +++++++-------
>  include/linux/virtio_ring.h         | 16 +++++++++++-----
>  riscv/fdt.c                         | 23 +++++++++++++++++++++--
>  riscv/include/asm/kvm.h             |  4 ++++
>  riscv/include/kvm/kvm-config-arch.h | 18 +++++++++++++++++-
>  riscv/include/kvm/kvm-cpu-arch.h    | 19 +++++++++++++++++++
>  riscv/kvm-cpu.c                     | 16 ----------------
>  10 files changed, 103 insertions(+), 33 deletions(-)
>
> --
> 2.34.1
>

Friendly ping ?

Please check this series.

Regards,
Anup

[PATCH kvmtool 0/6] RISC-V Svinval, Zihintpause, anad Zicbom support

[Will Deacon]

On Mon, Nov 07, 2022 at 05:50:16PM +0530, Anup Patel wrote:
> On Tue, Oct 18, 2022 at 7:39 PM Anup Patel <apatel@ventanamicro.com> wrote:
> >
> > The latest Linux-6.1-rc1 has support for Svinval, Zihintpause and Zicbom
> > extensions in KVM RISC-V. This series adds corresponding changes in KVMTOOL
> > to allow Guest/VM use these new RISC-V extensions.
> >
> > These patches can also be found in the riscv_svinval_zihintpause_zicbom_v1
> > branch at: https://github.com/avpatel/kvmtool.git
> >
> > Andrew Jones (2):
> >   riscv: Move reg encoding helpers to kvm-cpu-arch.h
> >   riscv: Add Zicbom extension support
> >
> > Anup Patel (3):
> >   Update UAPI headers based on Linux-6.1-rc1
> >   riscv: Add Svinval extension support
> >   riscv: Add --disable-<xyz> options to allow user disable extensions
> >
> > Mayuresh Chitale (1):
> >   riscv: Add zihintpause extension support
> >
> >  arm/aarch64/include/asm/kvm.h       |  6 ++++--
> >  include/linux/kvm.h                 |  1 +
> >  include/linux/virtio_blk.h          | 19 +++++++++++++++++++
> >  include/linux/virtio_net.h          | 14 +++++++-------
> >  include/linux/virtio_ring.h         | 16 +++++++++++-----
> >  riscv/fdt.c                         | 23 +++++++++++++++++++++--
> >  riscv/include/asm/kvm.h             |  4 ++++
> >  riscv/include/kvm/kvm-config-arch.h | 18 +++++++++++++++++-
> >  riscv/include/kvm/kvm-cpu-arch.h    | 19 +++++++++++++++++++
> >  riscv/kvm-cpu.c                     | 16 ----------------
> >  10 files changed, 103 insertions(+), 33 deletions(-)
> >
> > --
> > 2.34.1
> >
> 
> Friendly ping ?
> 
> Please check this series.

It's all a random sequence of letters to me, so I guess I'll apply it :)

Will

[PATCH kvmtool 0/6] RISC-V Svinval, Zihintpause, anad Zicbom support

[Will Deacon]

On Tue, 18 Oct 2022 19:38:48 +0530, Anup Patel wrote:
> The latest Linux-6.1-rc1 has support for Svinval, Zihintpause and Zicbom
> extensions in KVM RISC-V. This series adds corresponding changes in KVMTOOL
> to allow Guest/VM use these new RISC-V extensions.
> 
> These patches can also be found in the riscv_svinval_zihintpause_zicbom_v1
> branch at: https://github.com/avpatel/kvmtool.git
> 
> [...]

Applied to kvmtool (master), thanks!

[1/6] Update UAPI headers based on Linux-6.1-rc1
      https://git.kernel.org/will/kvmtool/c/76dfc0cf2d6b
[2/6] riscv: Add Svinval extension support
      https://git.kernel.org/will/kvmtool/c/ac16e9430627
[3/6] riscv: Add zihintpause extension support
      https://git.kernel.org/will/kvmtool/c/23a8ed907331
[4/6] riscv: Move reg encoding helpers to kvm-cpu-arch.h
      https://git.kernel.org/will/kvmtool/c/b721ac0ad88a
[5/6] riscv: Add Zicbom extension support
      https://git.kernel.org/will/kvmtool/c/798398f40a16
[6/6] riscv: Add --disable-<xyz> options to allow user disable extensions
      https://git.kernel.org/will/kvmtool/c/e17d182ad3f7

Cheers,
-- 
Will

https://fixes.arm64.dev
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