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From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH V4 0/6] Add riscv tests to cover the base extension specs
Date: Mon, 18 Mar 2024 18:27:03 +0100	[thread overview]
Message-ID: <20240318-336372c31d669f9bd3f64794@orel> (raw)
In-Reply-To: <20240318-4db92d2af2562faffcf9829d@orel>

On Mon, Mar 18, 2024 at 06:24:09PM +0100, Andrew Jones wrote:
> On Wed, Mar 13, 2024 at 10:50:51PM +0100, cem at kernel.org wrote:
> > From: Carlos Maiolino <cem@kernel.org>
> > 
> > Hi,
> > 
> > This is a new (V4) version of this series to create tests to cover functions
> > of the riscv's SBI base implementation spec. The series also includes a
> > a few helpers to reduce code duplication.
> > 
> > This new version includes updates related to Drew reviews, and rebasing of
> > the patches according to the changes. 
> > This new series has also been rebased on TOT, didn't affect the patches,
> > but worth the heads up.
> > 
> > Patches tagged with V4 needed modifications from the previous version.
> > 
> > Detailed updates are specified on a patch-basis
> > 
> > 
> > Carlos Maiolino (6):
> >   riscv: Add a wrapper to call sbi_ecall for base extension
> >   riscv: Add test to probe SBI Extension
> >   riscv: Factor out environment variable check and report generation
> >   riscv: Implement test for architecture ID register
> >   riscv: Enable gen_report() to print the wrong value in case of failure
> >   riscv: Test for specific SBI implementation ID
> > 
> >  riscv/sbi.c | 81 +++++++++++++++++++++++++++++++++++++++++++++--------
> >  1 file changed, 69 insertions(+), 12 deletions(-)
> > 
> > -- 
> > 2.44.0
> >
> 
> Merged to https://gitlab.com/kvm-unit-tests/kvm-unit-tests

Hi Carlos,

I just realized you've forgotten to CC tech-prs on v3 and v4.

drew


  reply	other threads:[~2024-03-18 17:27 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-13 21:50 [PATCH V4 0/6] Add riscv tests to cover the base extension specs cem
2024-03-13 21:50 ` [PATCH V4 1/6] riscv: Add a wrapper to call sbi_ecall for base extension cem
2024-03-13 21:50 ` [PATCH V4 2/6] riscv: Add test to probe SBI Extension cem
2024-03-14  7:09   ` Andrew Jones
2024-03-13 21:50 ` [PATCH V4 3/6] riscv: Factor out environment variable check and report generation cem
2024-03-13 21:50 ` [PATCH 4/6] riscv: Implement test for architecture ID register cem
2024-03-13 21:50 ` [PATCH V4 5/6] riscv: Enable gen_report() to print the wrong value in case of failure cem
2024-03-14  8:45   ` Andrew Jones
2024-03-13 21:50 ` [PATCH V4 6/6] riscv: Test for specific SBI implementation ID cem
2024-03-14  7:13   ` Andrew Jones
2024-03-14  8:46   ` Andrew Jones
2024-03-14  8:59     ` Carlos Maiolino
2024-03-18 17:24 ` [PATCH V4 0/6] Add riscv tests to cover the base extension specs Andrew Jones
2024-03-18 17:27   ` Andrew Jones [this message]
2024-03-18 18:39     ` Carlos Maiolino
2024-03-18 19:37       ` Atish Patra
2024-03-19  7:38         ` Andrew Jones
2024-03-20  8:16         ` Carlos Maiolino

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