* [PATCH 1/5] KVM: x86 emulator: add support for vector alignment
2012-04-09 15:39 [PATCH 0/5] MMX/SSE data movement Avi Kivity
@ 2012-04-09 15:39 ` Avi Kivity
2012-04-09 15:40 ` [PATCH 2/5] KVM: x86: emulate movdqa Avi Kivity
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Avi Kivity @ 2012-04-09 15:39 UTC (permalink / raw)
To: Marcelo Tosatti, kvm; +Cc: Stefan Hajnoczi
x86 defines three classes of vector instructions: explicitly
aligned (#GP(0) if unaligned, explicitly unaligned, and default
(which depends on the encoding: AVX is unaligned, SSE is aligned).
Add support for marking an instruction as explicitly aligned or
unaligned, and mark MOVDQU as unaligned.
Signed-off-by: Avi Kivity <avi@redhat.com>
---
arch/x86/kvm/emulate.c | 30 +++++++++++++++++++++++++++++-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 8375622..6302e5c 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -142,6 +142,9 @@
#define Src2FS (OpFS << Src2Shift)
#define Src2GS (OpGS << Src2Shift)
#define Src2Mask (OpMask << Src2Shift)
+#define Aligned ((u64)1 << 41) /* Explicitly aligned (e.g. MOVDQA) */
+#define Unaligned ((u64)1 << 42) /* Explicitly unaligned (e.g. MOVDQU) */
+#define Avx ((u64)1 << 43) /* Advanced Vector Extensions */
#define X2(x...) x, x
#define X3(x...) X2(x), x
@@ -557,6 +560,29 @@ static void set_segment_selector(struct x86_emulate_ctxt *ctxt, u16 selector,
ctxt->ops->set_segment(ctxt, selector, &desc, base3, seg);
}
+/*
+ * x86 defines three classes of vector instructions: explicitly
+ * aligned, explicitly unaligned, and the rest, which change behaviour
+ * depending on whether they're AVX encoded or not.
+ *
+ * Also included is CMPXCHG16B which is not a vector instruction, yet it is
+ * subject to the same check.
+ */
+static bool insn_aligned(struct x86_emulate_ctxt *ctxt, unsigned size)
+{
+ if (likely(size < 16))
+ return false;
+
+ if (ctxt->d & Aligned)
+ return true;
+ else if (ctxt->d & Unaligned)
+ return false;
+ else if (ctxt->d & Avx)
+ return false;
+ else
+ return true;
+}
+
static int __linearize(struct x86_emulate_ctxt *ctxt,
struct segmented_address addr,
unsigned size, bool write, bool fetch,
@@ -621,6 +647,8 @@ static int __linearize(struct x86_emulate_ctxt *ctxt,
}
if (fetch ? ctxt->mode != X86EMUL_MODE_PROT64 : ctxt->ad_bytes != 8)
la &= (u32)-1;
+ if (insn_aligned(ctxt, size) && ((la & (size - 1)) != 0))
+ return emulate_gp(ctxt, 0);
*linear = la;
return X86EMUL_CONTINUE;
bad:
@@ -3415,7 +3443,7 @@ static int check_perm_out(struct x86_emulate_ctxt *ctxt)
};
static struct gprefix pfx_0f_6f_0f_7f = {
- N, N, N, I(Sse, em_movdqu),
+ N, N, N, I(Sse | Unaligned, em_movdqu),
};
static struct opcode opcode_table[256] = {
--
1.7.10
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/5] KVM: x86: emulate movdqa
2012-04-09 15:39 [PATCH 0/5] MMX/SSE data movement Avi Kivity
2012-04-09 15:39 ` [PATCH 1/5] KVM: x86 emulator: add support for vector alignment Avi Kivity
@ 2012-04-09 15:40 ` Avi Kivity
2012-04-09 15:40 ` [PATCH 3/5] KVM: x86 emulator: implement movntps Avi Kivity
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Avi Kivity @ 2012-04-09 15:40 UTC (permalink / raw)
To: Marcelo Tosatti, kvm; +Cc: Stefan Hajnoczi
From: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
An Ubuntu 9.10 Karmic Koala guest is unable to boot or install due to
missing movdqa emulation:
kvm_exit: reason EXCEPTION_NMI rip 0x7fef3e025a7b info 7fef3e799000 80000b0e
kvm_page_fault: address 7fef3e799000 error_code f
kvm_emulate_insn: 0:7fef3e025a7b: 66 0f 7f 07 (prot64)
movdqa %xmm0,(%rdi)
[avi: mark it explicitly aligned]
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
arch/x86/kvm/emulate.c | 10 ++--------
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 6302e5c..b160fb1f 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -2818,7 +2818,7 @@ static int em_rdpmc(struct x86_emulate_ctxt *ctxt)
static int em_mov(struct x86_emulate_ctxt *ctxt)
{
- ctxt->dst.val = ctxt->src.val;
+ memcpy(ctxt->dst.valptr, ctxt->src.valptr, ctxt->op_bytes);
return X86EMUL_CONTINUE;
}
@@ -2898,12 +2898,6 @@ static int em_mov_sreg_rm(struct x86_emulate_ctxt *ctxt)
return load_segment_descriptor(ctxt, sel, ctxt->modrm_reg);
}
-static int em_movdqu(struct x86_emulate_ctxt *ctxt)
-{
- memcpy(&ctxt->dst.vec_val, &ctxt->src.vec_val, ctxt->op_bytes);
- return X86EMUL_CONTINUE;
-}
-
static int em_invlpg(struct x86_emulate_ctxt *ctxt)
{
int rc;
@@ -3443,7 +3437,7 @@ static int check_perm_out(struct x86_emulate_ctxt *ctxt)
};
static struct gprefix pfx_0f_6f_0f_7f = {
- N, N, N, I(Sse | Unaligned, em_movdqu),
+ N, I(Sse | Aligned, em_mov), N, I(Sse | Unaligned, em_mov),
};
static struct opcode opcode_table[256] = {
--
1.7.10
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/5] KVM: x86 emulator: implement movntps
2012-04-09 15:39 [PATCH 0/5] MMX/SSE data movement Avi Kivity
2012-04-09 15:39 ` [PATCH 1/5] KVM: x86 emulator: add support for vector alignment Avi Kivity
2012-04-09 15:40 ` [PATCH 2/5] KVM: x86: emulate movdqa Avi Kivity
@ 2012-04-09 15:40 ` Avi Kivity
2012-04-09 15:40 ` [PATCH 4/5] KVM: x86 emulator: MMX support Avi Kivity
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Avi Kivity @ 2012-04-09 15:40 UTC (permalink / raw)
To: Marcelo Tosatti, kvm; +Cc: Stefan Hajnoczi
Used to write to framebuffers (by at least Icaros).
Signed-off-by: Avi Kivity <avi@redhat.com>
---
arch/x86/kvm/emulate.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index b160fb1f..fb39e0b 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -3440,6 +3440,10 @@ static int check_perm_out(struct x86_emulate_ctxt *ctxt)
N, I(Sse | Aligned, em_mov), N, I(Sse | Unaligned, em_mov),
};
+static struct gprefix pfx_vmovntpx = {
+ I(0, em_mov), N, N, N,
+};
+
static struct opcode opcode_table[256] = {
/* 0x00 - 0x07 */
I6ALU(Lock, em_add),
@@ -3571,7 +3575,8 @@ static int check_perm_out(struct x86_emulate_ctxt *ctxt)
IIP(ModRM | SrcMem | Priv | Op3264, em_cr_write, cr_write, check_cr_write),
IIP(ModRM | SrcMem | Priv | Op3264, em_dr_write, dr_write, check_dr_write),
N, N, N, N,
- N, N, N, N, N, N, N, N,
+ N, N, N, GP(ModRM | DstMem | SrcReg | Sse | Mov | Aligned, &pfx_vmovntpx),
+ N, N, N, N,
/* 0x30 - 0x3F */
II(ImplicitOps | Priv, em_wrmsr, wrmsr),
IIP(ImplicitOps, em_rdtsc, rdtsc, check_rdtsc),
--
1.7.10
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 4/5] KVM: x86 emulator: MMX support
2012-04-09 15:39 [PATCH 0/5] MMX/SSE data movement Avi Kivity
` (2 preceding siblings ...)
2012-04-09 15:40 ` [PATCH 3/5] KVM: x86 emulator: implement movntps Avi Kivity
@ 2012-04-09 15:40 ` Avi Kivity
2012-04-09 15:40 ` [PATCH 5/5] KVM: x86 emulator: implement MMX MOVQ (opcodes 0f 6f, 0f 7f) Avi Kivity
2012-04-13 20:50 ` [PATCH 0/5] MMX/SSE data movement Marcelo Tosatti
5 siblings, 0 replies; 7+ messages in thread
From: Avi Kivity @ 2012-04-09 15:40 UTC (permalink / raw)
To: Marcelo Tosatti, kvm; +Cc: Stefan Hajnoczi
General support for the MMX instruction set. Special care is taken
to trap pending x87 exceptions so that they are properly reflected
to the guest.
Signed-off-by: Avi Kivity <avi@redhat.com>
---
arch/x86/include/asm/kvm_emulate.h | 4 +-
arch/x86/kvm/emulate.c | 103 ++++++++++++++++++++++++++++++++++--
2 files changed, 102 insertions(+), 5 deletions(-)
diff --git a/arch/x86/include/asm/kvm_emulate.h b/arch/x86/include/asm/kvm_emulate.h
index c222e1a..1ac46c22 100644
--- a/arch/x86/include/asm/kvm_emulate.h
+++ b/arch/x86/include/asm/kvm_emulate.h
@@ -200,7 +200,7 @@ typedef u32 __attribute__((vector_size(16))) sse128_t;
/* Type, address-of, and value of an instruction's operand. */
struct operand {
- enum { OP_REG, OP_MEM, OP_IMM, OP_XMM, OP_NONE } type;
+ enum { OP_REG, OP_MEM, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
unsigned int bytes;
union {
unsigned long orig_val;
@@ -213,12 +213,14 @@ struct operand {
unsigned seg;
} mem;
unsigned xmm;
+ unsigned mm;
} addr;
union {
unsigned long val;
u64 val64;
char valptr[sizeof(unsigned long) + 2];
sse128_t vec_val;
+ u64 mm_val;
};
};
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index fb39e0b..0011b4a 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -142,6 +142,7 @@
#define Src2FS (OpFS << Src2Shift)
#define Src2GS (OpGS << Src2Shift)
#define Src2Mask (OpMask << Src2Shift)
+#define Mmx ((u64)1 << 40) /* MMX Vector instruction */
#define Aligned ((u64)1 << 41) /* Explicitly aligned (e.g. MOVDQA) */
#define Unaligned ((u64)1 << 42) /* Explicitly unaligned (e.g. MOVDQU) */
#define Avx ((u64)1 << 43) /* Advanced Vector Extensions */
@@ -887,6 +888,40 @@ static void write_sse_reg(struct x86_emulate_ctxt *ctxt, sse128_t *data,
ctxt->ops->put_fpu(ctxt);
}
+static void read_mmx_reg(struct x86_emulate_ctxt *ctxt, u64 *data, int reg)
+{
+ ctxt->ops->get_fpu(ctxt);
+ switch (reg) {
+ case 0: asm("movq %%mm0, %0" : "=m"(*data)); break;
+ case 1: asm("movq %%mm1, %0" : "=m"(*data)); break;
+ case 2: asm("movq %%mm2, %0" : "=m"(*data)); break;
+ case 3: asm("movq %%mm3, %0" : "=m"(*data)); break;
+ case 4: asm("movq %%mm4, %0" : "=m"(*data)); break;
+ case 5: asm("movq %%mm5, %0" : "=m"(*data)); break;
+ case 6: asm("movq %%mm6, %0" : "=m"(*data)); break;
+ case 7: asm("movq %%mm7, %0" : "=m"(*data)); break;
+ default: BUG();
+ }
+ ctxt->ops->put_fpu(ctxt);
+}
+
+static void write_mmx_reg(struct x86_emulate_ctxt *ctxt, u64 *data, int reg)
+{
+ ctxt->ops->get_fpu(ctxt);
+ switch (reg) {
+ case 0: asm("movq %0, %%mm0" : : "m"(*data)); break;
+ case 1: asm("movq %0, %%mm1" : : "m"(*data)); break;
+ case 2: asm("movq %0, %%mm2" : : "m"(*data)); break;
+ case 3: asm("movq %0, %%mm3" : : "m"(*data)); break;
+ case 4: asm("movq %0, %%mm4" : : "m"(*data)); break;
+ case 5: asm("movq %0, %%mm5" : : "m"(*data)); break;
+ case 6: asm("movq %0, %%mm6" : : "m"(*data)); break;
+ case 7: asm("movq %0, %%mm7" : : "m"(*data)); break;
+ default: BUG();
+ }
+ ctxt->ops->put_fpu(ctxt);
+}
+
static void decode_register_operand(struct x86_emulate_ctxt *ctxt,
struct operand *op)
{
@@ -903,6 +938,13 @@ static void decode_register_operand(struct x86_emulate_ctxt *ctxt,
read_sse_reg(ctxt, &op->vec_val, reg);
return;
}
+ if (ctxt->d & Mmx) {
+ reg &= 7;
+ op->type = OP_MM;
+ op->bytes = 8;
+ op->addr.mm = reg;
+ return;
+ }
op->type = OP_REG;
if (ctxt->d & ByteOp) {
@@ -948,6 +990,12 @@ static int decode_modrm(struct x86_emulate_ctxt *ctxt,
read_sse_reg(ctxt, &op->vec_val, ctxt->modrm_rm);
return rc;
}
+ if (ctxt->d & Mmx) {
+ op->type = OP_MM;
+ op->bytes = 8;
+ op->addr.xmm = ctxt->modrm_rm & 7;
+ return rc;
+ }
fetch_register_operand(op);
return rc;
}
@@ -1415,6 +1463,9 @@ static int writeback(struct x86_emulate_ctxt *ctxt)
case OP_XMM:
write_sse_reg(ctxt, &ctxt->dst.vec_val, ctxt->dst.addr.xmm);
break;
+ case OP_MM:
+ write_mmx_reg(ctxt, &ctxt->dst.mm_val, ctxt->dst.addr.mm);
+ break;
case OP_NONE:
/* no writeback */
break;
@@ -3987,6 +4038,8 @@ int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len)
if (ctxt->d & Sse)
ctxt->op_bytes = 16;
+ else if (ctxt->d & Mmx)
+ ctxt->op_bytes = 8;
/* ModRM and SIB bytes. */
if (ctxt->d & ModRM) {
@@ -4057,6 +4110,35 @@ static bool string_insn_completed(struct x86_emulate_ctxt *ctxt)
return false;
}
+static int flush_pending_x87_faults(struct x86_emulate_ctxt *ctxt)
+{
+ bool fault = false;
+
+ ctxt->ops->get_fpu(ctxt);
+ asm volatile("1: fwait \n\t"
+ "2: \n\t"
+ ".pushsection .fixup,\"ax\" \n\t"
+ "3: \n\t"
+ "movb $1, %[fault] \n\t"
+ "jmp 2b \n\t"
+ ".popsection \n\t"
+ _ASM_EXTABLE(1b, 3b)
+ : [fault]"+rm"(fault));
+ ctxt->ops->put_fpu(ctxt);
+
+ if (unlikely(fault))
+ return emulate_exception(ctxt, MF_VECTOR, 0, false);
+
+ return X86EMUL_CONTINUE;
+}
+
+static void fetch_possible_mmx_operand(struct x86_emulate_ctxt *ctxt,
+ struct operand *op)
+{
+ if (op->type == OP_MM)
+ read_mmx_reg(ctxt, &op->mm_val, op->addr.mm);
+}
+
int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
{
struct x86_emulate_ops *ops = ctxt->ops;
@@ -4081,18 +4163,31 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
goto done;
}
- if ((ctxt->d & Sse)
- && ((ops->get_cr(ctxt, 0) & X86_CR0_EM)
- || !(ops->get_cr(ctxt, 4) & X86_CR4_OSFXSR))) {
+ if (((ctxt->d & (Sse|Mmx)) && ((ops->get_cr(ctxt, 0) & X86_CR0_EM)))
+ || ((ctxt->d & Sse) && !(ops->get_cr(ctxt, 4) & X86_CR4_OSFXSR))) {
rc = emulate_ud(ctxt);
goto done;
}
- if ((ctxt->d & Sse) && (ops->get_cr(ctxt, 0) & X86_CR0_TS)) {
+ if ((ctxt->d & (Sse|Mmx)) && (ops->get_cr(ctxt, 0) & X86_CR0_TS)) {
rc = emulate_nm(ctxt);
goto done;
}
+ if (ctxt->d & Mmx) {
+ rc = flush_pending_x87_faults(ctxt);
+ if (rc != X86EMUL_CONTINUE)
+ goto done;
+ /*
+ * Now that we know the fpu is exception safe, we can fetch
+ * operands from it.
+ */
+ fetch_possible_mmx_operand(ctxt, &ctxt->src);
+ fetch_possible_mmx_operand(ctxt, &ctxt->src2);
+ if (!(ctxt->d & Mov))
+ fetch_possible_mmx_operand(ctxt, &ctxt->dst);
+ }
+
if (unlikely(ctxt->guest_mode) && ctxt->intercept) {
rc = emulator_check_intercept(ctxt, ctxt->intercept,
X86_ICPT_PRE_EXCEPT);
--
1.7.10
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 5/5] KVM: x86 emulator: implement MMX MOVQ (opcodes 0f 6f, 0f 7f)
2012-04-09 15:39 [PATCH 0/5] MMX/SSE data movement Avi Kivity
` (3 preceding siblings ...)
2012-04-09 15:40 ` [PATCH 4/5] KVM: x86 emulator: MMX support Avi Kivity
@ 2012-04-09 15:40 ` Avi Kivity
2012-04-13 20:50 ` [PATCH 0/5] MMX/SSE data movement Marcelo Tosatti
5 siblings, 0 replies; 7+ messages in thread
From: Avi Kivity @ 2012-04-09 15:40 UTC (permalink / raw)
To: Marcelo Tosatti, kvm; +Cc: Stefan Hajnoczi
Needed by some framebuffer drivers. See
https://bugzilla.kernel.org/show_bug.cgi?id=42779
Signed-off-by: Avi Kivity <avi@redhat.com>
---
arch/x86/kvm/emulate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 0011b4a..d5729a9 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -3488,7 +3488,7 @@ static int check_perm_out(struct x86_emulate_ctxt *ctxt)
};
static struct gprefix pfx_0f_6f_0f_7f = {
- N, I(Sse | Aligned, em_mov), N, I(Sse | Unaligned, em_mov),
+ I(Mmx, em_mov), I(Sse | Aligned, em_mov), N, I(Sse | Unaligned, em_mov),
};
static struct gprefix pfx_vmovntpx = {
--
1.7.10
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 0/5] MMX/SSE data movement
2012-04-09 15:39 [PATCH 0/5] MMX/SSE data movement Avi Kivity
` (4 preceding siblings ...)
2012-04-09 15:40 ` [PATCH 5/5] KVM: x86 emulator: implement MMX MOVQ (opcodes 0f 6f, 0f 7f) Avi Kivity
@ 2012-04-13 20:50 ` Marcelo Tosatti
5 siblings, 0 replies; 7+ messages in thread
From: Marcelo Tosatti @ 2012-04-13 20:50 UTC (permalink / raw)
To: Avi Kivity; +Cc: kvm, Stefan Hajnoczi
On Mon, Apr 09, 2012 at 06:39:58PM +0300, Avi Kivity wrote:
> This patchset implements MMX registers, SSE data alignment, and three
> instructions:
>
> MOVQ (MMX)
> MOVNTPS (SSE)
> MOVDQA (SSE)
>
> all used in accessing framebuffers from guests.
>
> Avi Kivity (4):
> KVM: x86 emulator: add support for vector alignment
> KVM: x86 emulator: implement movntps
> KVM: x86 emulator: MMX support
> KVM: x86 emulator: implement MMX MOVQ (opcodes 0f 6f, 0f 7f)
>
> Stefan Hajnoczi (1):
> KVM: x86: emulate movdqa
>
> arch/x86/include/asm/kvm_emulate.h | 4 +-
> arch/x86/kvm/emulate.c | 148 ++++++++++++++++++++++++++++++++----
> 2 files changed, 138 insertions(+), 14 deletions(-)
Applied, thanks.
^ permalink raw reply [flat|nested] 7+ messages in thread