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From: Alexander Graf <agraf@suse.de>
To: "kvm@vger.kernel.org mailing list" <kvm@vger.kernel.org>
Cc: kvm-ppc@vger.kernel.org, Gleb Natapov <gleb@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Paul Mackerras <paulus@samba.org>
Subject: [PULL 06/51] KVM: PPC: Book3S HV: Restructure kvmppc_hv_entry to be a subroutine
Date: Thu, 31 Oct 2013 22:17:51 +0100	[thread overview]
Message-ID: <1383254316-11243-7-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1383254316-11243-1-git-send-email-agraf@suse.de>

From: Paul Mackerras <paulus@samba.org>

We have two paths into and out of the low-level guest entry and exit
code: from a vcpu task via kvmppc_hv_entry_trampoline, and from the
system reset vector for an offline secondary thread on POWER7 via
kvm_start_guest.  Currently both just branch to kvmppc_hv_entry to
enter the guest, and on guest exit, we test the vcpu physical thread
ID to detect which way we came in and thus whether we should return
to the vcpu task or go back to nap mode.

In order to make the code flow clearer, and to keep the code relating
to each flow together, this turns kvmppc_hv_entry into a subroutine
that follows the normal conventions for call and return.  This means
that kvmppc_hv_entry_trampoline() and kvmppc_hv_entry() now establish
normal stack frames, and we use the normal stack slots for saving
return addresses rather than local_paca->kvm_hstate.vmhandler.  Apart
from that this is mostly moving code around unchanged.

Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 344 +++++++++++++++++---------------
 1 file changed, 178 insertions(+), 166 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 82b06df..2bf2951 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -66,8 +66,11 @@ kvmppc_skip_Hinterrupt:
  * LR = return address to continue at after eventually re-enabling MMU
  */
 _GLOBAL(kvmppc_hv_entry_trampoline)
+	mflr	r0
+	std	r0, PPC_LR_STKOFF(r1)
+	stdu	r1, -112(r1)
 	mfmsr	r10
-	LOAD_REG_ADDR(r5, kvmppc_hv_entry)
+	LOAD_REG_ADDR(r5, kvmppc_call_hv_entry)
 	li	r0,MSR_RI
 	andc	r0,r10,r0
 	li	r6,MSR_IR | MSR_DR
@@ -77,11 +80,103 @@ _GLOBAL(kvmppc_hv_entry_trampoline)
 	mtsrr1	r6
 	RFI
 
-/******************************************************************************
- *                                                                            *
- *                               Entry code                                   *
- *                                                                            *
- *****************************************************************************/
+kvmppc_call_hv_entry:
+	bl	kvmppc_hv_entry
+
+	/* Back from guest - restore host state and return to caller */
+
+	/* Restore host DABR and DABRX */
+	ld	r5,HSTATE_DABR(r13)
+	li	r6,7
+	mtspr	SPRN_DABR,r5
+	mtspr	SPRN_DABRX,r6
+
+	/* Restore SPRG3 */
+	ld	r3,PACA_SPRG3(r13)
+	mtspr	SPRN_SPRG3,r3
+
+	/*
+	 * Reload DEC.  HDEC interrupts were disabled when
+	 * we reloaded the host's LPCR value.
+	 */
+	ld	r3, HSTATE_DECEXP(r13)
+	mftb	r4
+	subf	r4, r4, r3
+	mtspr	SPRN_DEC, r4
+
+	/* Reload the host's PMU registers */
+	ld	r3, PACALPPACAPTR(r13)	/* is the host using the PMU? */
+	lbz	r4, LPPACA_PMCINUSE(r3)
+	cmpwi	r4, 0
+	beq	23f			/* skip if not */
+	lwz	r3, HSTATE_PMC(r13)
+	lwz	r4, HSTATE_PMC + 4(r13)
+	lwz	r5, HSTATE_PMC + 8(r13)
+	lwz	r6, HSTATE_PMC + 12(r13)
+	lwz	r8, HSTATE_PMC + 16(r13)
+	lwz	r9, HSTATE_PMC + 20(r13)
+BEGIN_FTR_SECTION
+	lwz	r10, HSTATE_PMC + 24(r13)
+	lwz	r11, HSTATE_PMC + 28(r13)
+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
+	mtspr	SPRN_PMC1, r3
+	mtspr	SPRN_PMC2, r4
+	mtspr	SPRN_PMC3, r5
+	mtspr	SPRN_PMC4, r6
+	mtspr	SPRN_PMC5, r8
+	mtspr	SPRN_PMC6, r9
+BEGIN_FTR_SECTION
+	mtspr	SPRN_PMC7, r10
+	mtspr	SPRN_PMC8, r11
+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
+	ld	r3, HSTATE_MMCR(r13)
+	ld	r4, HSTATE_MMCR + 8(r13)
+	ld	r5, HSTATE_MMCR + 16(r13)
+	mtspr	SPRN_MMCR1, r4
+	mtspr	SPRN_MMCRA, r5
+	mtspr	SPRN_MMCR0, r3
+	isync
+23:
+
+	/*
+	 * For external and machine check interrupts, we need
+	 * to call the Linux handler to process the interrupt.
+	 * We do that by jumping to absolute address 0x500 for
+	 * external interrupts, or the machine_check_fwnmi label
+	 * for machine checks (since firmware might have patched
+	 * the vector area at 0x200).  The [h]rfid at the end of the
+	 * handler will return to the book3s_hv_interrupts.S code.
+	 * For other interrupts we do the rfid to get back
+	 * to the book3s_hv_interrupts.S code here.
+	 */
+	ld	r8, 112+PPC_LR_STKOFF(r1)
+	addi	r1, r1, 112
+	ld	r7, HSTATE_HOST_MSR(r13)
+
+	cmpwi	cr1, r12, BOOK3S_INTERRUPT_MACHINE_CHECK
+	cmpwi	r12, BOOK3S_INTERRUPT_EXTERNAL
+BEGIN_FTR_SECTION
+	beq	11f
+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
+
+	/* RFI into the highmem handler, or branch to interrupt handler */
+	mfmsr	r6
+	li	r0, MSR_RI
+	andc	r6, r6, r0
+	mtmsrd	r6, 1			/* Clear RI in MSR */
+	mtsrr0	r8
+	mtsrr1	r7
+	beqa	0x500			/* external interrupt (PPC970) */
+	beq	cr1, 13f		/* machine check */
+	RFI
+
+	/* On POWER7, we have external interrupts set to use HSRR0/1 */
+11:	mtspr	SPRN_HSRR0, r8
+	mtspr	SPRN_HSRR1, r7
+	ba	0x500
+
+13:	b	machine_check_fwnmi
+
 
 /*
  * We come in here when wakened from nap mode on a secondary hw thread.
@@ -137,7 +232,7 @@ kvm_start_guest:
 	cmpdi	r4,0
 	/* if we have no vcpu to run, go back to sleep */
 	beq	kvm_no_guest
-	b	kvmppc_hv_entry
+	b	30f
 
 27:	/* XXX should handle hypervisor maintenance interrupts etc. here */
 	b	kvm_no_guest
@@ -147,6 +242,57 @@ kvm_start_guest:
 	stw	r8,HSTATE_SAVED_XIRR(r13)
 	b	kvm_no_guest
 
+30:	bl	kvmppc_hv_entry
+
+	/* Back from the guest, go back to nap */
+	/* Clear our vcpu pointer so we don't come back in early */
+	li	r0, 0
+	std	r0, HSTATE_KVM_VCPU(r13)
+	lwsync
+	/* Clear any pending IPI - we're an offline thread */
+	ld	r5, HSTATE_XICS_PHYS(r13)
+	li	r7, XICS_XIRR
+	lwzcix	r3, r5, r7		/* ack any pending interrupt */
+	rlwinm.	r0, r3, 0, 0xffffff	/* any pending? */
+	beq	37f
+	sync
+	li	r0, 0xff
+	li	r6, XICS_MFRR
+	stbcix	r0, r5, r6		/* clear the IPI */
+	stwcix	r3, r5, r7		/* EOI it */
+37:	sync
+
+	/* increment the nap count and then go to nap mode */
+	ld	r4, HSTATE_KVM_VCORE(r13)
+	addi	r4, r4, VCORE_NAP_COUNT
+	lwsync				/* make previous updates visible */
+51:	lwarx	r3, 0, r4
+	addi	r3, r3, 1
+	stwcx.	r3, 0, r4
+	bne	51b
+
+kvm_no_guest:
+	li	r0, KVM_HWTHREAD_IN_NAP
+	stb	r0, HSTATE_HWTHREAD_STATE(r13)
+	li	r3, LPCR_PECE0
+	mfspr	r4, SPRN_LPCR
+	rlwimi	r4, r3, 0, LPCR_PECE0 | LPCR_PECE1
+	mtspr	SPRN_LPCR, r4
+	isync
+	std	r0, HSTATE_SCRATCH0(r13)
+	ptesync
+	ld	r0, HSTATE_SCRATCH0(r13)
+1:	cmpd	r0, r0
+	bne	1b
+	nap
+	b	.
+
+/******************************************************************************
+ *                                                                            *
+ *                               Entry code                                   *
+ *                                                                            *
+ *****************************************************************************/
+
 .global kvmppc_hv_entry
 kvmppc_hv_entry:
 
@@ -159,7 +305,8 @@ kvmppc_hv_entry:
 	 * all other volatile GPRS = free
 	 */
 	mflr	r0
-	std	r0, HSTATE_VMHANDLER(r13)
+	std	r0, PPC_LR_STKOFF(r1)
+	stdu	r1, -112(r1)
 
 	/* Set partition DABR */
 	/* Do this before re-enabling PMU to avoid P7 DABR corruption bug */
@@ -1198,103 +1345,30 @@ BEGIN_FTR_SECTION
 	stw	r11, VCPU_PMC + 28(r9)
 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
 22:
+	ld	r0, 112+PPC_LR_STKOFF(r1)
+	addi	r1, r1, 112
+	mtlr	r0
+	blr
+secondary_too_late:
+	ld	r5,HSTATE_KVM_VCORE(r13)
+	HMT_LOW
+13:	lbz	r3,VCORE_IN_GUEST(r5)
+	cmpwi	r3,0
+	bne	13b
+	HMT_MEDIUM
+	li	r0, KVM_GUEST_MODE_NONE
+	stb	r0, HSTATE_IN_GUEST(r13)
+	ld	r11,PACA_SLBSHADOWPTR(r13)
 
-	/* Secondary threads go off to take a nap on POWER7 */
-BEGIN_FTR_SECTION
-	lwz	r0,VCPU_PTID(r9)
-	cmpwi	r0,0
-	bne	secondary_nap
-END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
-
-	/* Restore host DABR and DABRX */
-	ld	r5,HSTATE_DABR(r13)
-	li	r6,7
-	mtspr	SPRN_DABR,r5
-	mtspr	SPRN_DABRX,r6
-
-	/* Restore SPRG3 */
-	ld	r3,PACA_SPRG3(r13)
-	mtspr	SPRN_SPRG3,r3
-
-	/*
-	 * Reload DEC.  HDEC interrupts were disabled when
-	 * we reloaded the host's LPCR value.
-	 */
-	ld	r3, HSTATE_DECEXP(r13)
-	mftb	r4
-	subf	r4, r4, r3
-	mtspr	SPRN_DEC, r4
-
-	/* Reload the host's PMU registers */
-	ld	r3, PACALPPACAPTR(r13)	/* is the host using the PMU? */
-	lbz	r4, LPPACA_PMCINUSE(r3)
-	cmpwi	r4, 0
-	beq	23f			/* skip if not */
-	lwz	r3, HSTATE_PMC(r13)
-	lwz	r4, HSTATE_PMC + 4(r13)
-	lwz	r5, HSTATE_PMC + 8(r13)
-	lwz	r6, HSTATE_PMC + 12(r13)
-	lwz	r8, HSTATE_PMC + 16(r13)
-	lwz	r9, HSTATE_PMC + 20(r13)
-BEGIN_FTR_SECTION
-	lwz	r10, HSTATE_PMC + 24(r13)
-	lwz	r11, HSTATE_PMC + 28(r13)
-END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
-	mtspr	SPRN_PMC1, r3
-	mtspr	SPRN_PMC2, r4
-	mtspr	SPRN_PMC3, r5
-	mtspr	SPRN_PMC4, r6
-	mtspr	SPRN_PMC5, r8
-	mtspr	SPRN_PMC6, r9
-BEGIN_FTR_SECTION
-	mtspr	SPRN_PMC7, r10
-	mtspr	SPRN_PMC8, r11
-END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
-	ld	r3, HSTATE_MMCR(r13)
-	ld	r4, HSTATE_MMCR + 8(r13)
-	ld	r5, HSTATE_MMCR + 16(r13)
-	mtspr	SPRN_MMCR1, r4
-	mtspr	SPRN_MMCRA, r5
-	mtspr	SPRN_MMCR0, r3
-	isync
-23:
-	/*
-	 * For external and machine check interrupts, we need
-	 * to call the Linux handler to process the interrupt.
-	 * We do that by jumping to absolute address 0x500 for
-	 * external interrupts, or the machine_check_fwnmi label
-	 * for machine checks (since firmware might have patched
-	 * the vector area at 0x200).  The [h]rfid at the end of the
-	 * handler will return to the book3s_hv_interrupts.S code.
-	 * For other interrupts we do the rfid to get back
-	 * to the book3s_hv_interrupts.S code here.
-	 */
-	ld	r8, HSTATE_VMHANDLER(r13)
-	ld	r7, HSTATE_HOST_MSR(r13)
-
-	cmpwi	cr1, r12, BOOK3S_INTERRUPT_MACHINE_CHECK
-	cmpwi	r12, BOOK3S_INTERRUPT_EXTERNAL
-BEGIN_FTR_SECTION
-	beq	11f
-END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
-
-	/* RFI into the highmem handler, or branch to interrupt handler */
-	mfmsr	r6
-	li	r0, MSR_RI
-	andc	r6, r6, r0
-	mtmsrd	r6, 1			/* Clear RI in MSR */
-	mtsrr0	r8
-	mtsrr1	r7
-	beqa	0x500			/* external interrupt (PPC970) */
-	beq	cr1, 13f		/* machine check */
-	RFI
-
-	/* On POWER7, we have external interrupts set to use HSRR0/1 */
-11:	mtspr	SPRN_HSRR0, r8
-	mtspr	SPRN_HSRR1, r7
-	ba	0x500
-
-13:	b	machine_check_fwnmi
+	.rept	SLB_NUM_BOLTED
+	ld	r5,SLBSHADOW_SAVEAREA(r11)
+	ld	r6,SLBSHADOW_SAVEAREA+8(r11)
+	andis.	r7,r5,SLB_ESID_V@h
+	beq	1f
+	slbmte	r6,r5
+1:	addi	r11,r11,16
+	.endr
+	b	22b
 
 /*
  * Check whether an HDSI is an HPTE not found fault or something else.
@@ -1741,68 +1815,6 @@ machine_check_realmode:
 	rotldi	r11, r11, 63
 	b	fast_interrupt_c_return
 
-secondary_too_late:
-	ld	r5,HSTATE_KVM_VCORE(r13)
-	HMT_LOW
-13:	lbz	r3,VCORE_IN_GUEST(r5)
-	cmpwi	r3,0
-	bne	13b
-	HMT_MEDIUM
-	ld	r11,PACA_SLBSHADOWPTR(r13)
-
-	.rept	SLB_NUM_BOLTED
-	ld	r5,SLBSHADOW_SAVEAREA(r11)
-	ld	r6,SLBSHADOW_SAVEAREA+8(r11)
-	andis.	r7,r5,SLB_ESID_V@h
-	beq	1f
-	slbmte	r6,r5
-1:	addi	r11,r11,16
-	.endr
-
-secondary_nap:
-	/* Clear our vcpu pointer so we don't come back in early */
-	li	r0, 0
-	std	r0, HSTATE_KVM_VCPU(r13)
-	lwsync
-	/* Clear any pending IPI - assume we're a secondary thread */
-	ld	r5, HSTATE_XICS_PHYS(r13)
-	li	r7, XICS_XIRR
-	lwzcix	r3, r5, r7		/* ack any pending interrupt */
-	rlwinm.	r0, r3, 0, 0xffffff	/* any pending? */
-	beq	37f
-	sync
-	li	r0, 0xff
-	li	r6, XICS_MFRR
-	stbcix	r0, r5, r6		/* clear the IPI */
-	stwcix	r3, r5, r7		/* EOI it */
-37:	sync
-
-	/* increment the nap count and then go to nap mode */
-	ld	r4, HSTATE_KVM_VCORE(r13)
-	addi	r4, r4, VCORE_NAP_COUNT
-	lwsync				/* make previous updates visible */
-51:	lwarx	r3, 0, r4
-	addi	r3, r3, 1
-	stwcx.	r3, 0, r4
-	bne	51b
-
-kvm_no_guest:
-	li	r0, KVM_HWTHREAD_IN_NAP
-	stb	r0, HSTATE_HWTHREAD_STATE(r13)
-
-	li	r3, LPCR_PECE0
-	mfspr	r4, SPRN_LPCR
-	rlwimi	r4, r3, 0, LPCR_PECE0 | LPCR_PECE1
-	mtspr	SPRN_LPCR, r4
-	isync
-	std	r0, HSTATE_SCRATCH0(r13)
-	ptesync
-	ld	r0, HSTATE_SCRATCH0(r13)
-1:	cmpd	r0, r0
-	bne	1b
-	nap
-	b	.
-
 /*
  * Save away FP, VMX and VSX registers.
  * r3 = vcpu pointer
-- 
1.8.1.4

  parent reply	other threads:[~2013-10-31 21:17 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-31 21:17 [PULL 00/51] ppc patch queue 2013-10-31 Alexander Graf
2013-10-31 21:17 ` [PULL 01/51] KVM: PPC: Book3S HV: Reserve POWER8 space in get/set_one_reg Alexander Graf
2013-10-31 21:17 ` [PULL 02/51] KVM: PPC: Book3S HV: Save/restore SIAR and SDAR along with other PMU registers Alexander Graf
2013-10-31 21:17 ` [PULL 03/51] KVM: PPC: Book3S HV: Implement timebase offset for guests Alexander Graf
2013-10-31 21:17 ` [PULL 04/51] KVM: PPC: Book3S: Add GET/SET_ONE_REG interface for VRSAVE Alexander Graf
2013-10-31 21:17 ` [PULL 05/51] KVM: PPC: Book3S HV: Implement H_CONFER Alexander Graf
2013-10-31 21:17 ` Alexander Graf [this message]
2013-10-31 21:17 ` [PULL 07/51] KVM: PPC: Book3S HV: Pull out interrupt-reading code into a subroutine Alexander Graf
2013-10-31 21:17 ` [PULL 08/51] KVM: PPC: Book3S HV: Avoid unbalanced increments of VPA yield count Alexander Graf
2013-10-31 21:17 ` [PULL 09/51] KVM: PPC: BookE: Add GET/SET_ONE_REG interface for VRSAVE Alexander Graf
2013-10-31 21:17 ` [PULL 10/51] KVM: PPC: Book3S HV: Store LPCR value for each virtual core Alexander Graf
2013-10-31 21:17 ` [PULL 11/51] KVM: PPC: Book3S HV: Add support for guest Program Priority Register Alexander Graf
2013-10-31 21:17 ` [PULL 12/51] KVM: PPC: Book3S HV: Support POWER6 compatibility mode on POWER7 Alexander Graf
2013-10-31 21:17 ` [PULL 13/51] KVM: PPC: Book3S HV: Don't crash host on unknown guest interrupt Alexander Graf
2013-10-31 21:17 ` [PULL 14/51] KVM: PPC: Book3S PR: Fix compilation without CONFIG_ALTIVEC Alexander Graf
2013-10-31 21:18 ` [PULL 15/51] KVM: PPC: Book3S PR: Keep volatile reg values in vcpu rather than shadow_vcpu Alexander Graf
2013-10-31 21:18 ` [PULL 16/51] KVM: PPC: Book3S PR: Allow guest to use 64k pages Alexander Graf
2013-10-31 21:18 ` [PULL 17/51] KVM: PPC: Book3S PR: Use 64k host pages where possible Alexander Graf
2013-10-31 21:18 ` [PULL 18/51] KVM: PPC: Book3S PR: Handle PP0 page-protection bit in guest HPTEs Alexander Graf
2013-10-31 21:18 ` [PULL 19/51] KVM: PPC: Book3S PR: Correct errors in H_ENTER implementation Alexander Graf
2013-10-31 21:18 ` [PULL 20/51] KVM: PPC: Book3S PR: Make HPT accesses and updates SMP-safe Alexander Graf
2013-10-31 21:18 ` [PULL 21/51] KVM: PPC: Book3S PR: Allocate kvm_vcpu structs from kvm_vcpu_cache Alexander Graf
2013-10-31 21:18 ` [PULL 22/51] KVM: PPC: Book3S: Move skip-interrupt handlers to common code Alexander Graf
2013-10-31 21:18 ` [PULL 23/51] KVM: PPC: Book3S PR: Better handling of host-side read-only pages Alexander Graf
2013-10-31 21:18 ` [PULL 24/51] KVM: PPC: Book3S PR: Use mmu_notifier_retry() in kvmppc_mmu_map_page() Alexander Graf
2013-10-31 21:18 ` [PULL 25/51] KVM: PPC: Book3S PR: Mark pages accessed, and dirty if being written Alexander Graf
2013-10-31 21:18 ` [PULL 26/51] KVM: PPC: Book3S PR: Reduce number of shadow PTEs invalidated by MMU notifiers Alexander Graf
2013-10-31 21:18 ` [PULL 27/51] kvm: powerpc: book3s hv: Fix vcore leak Alexander Graf
2013-10-31 21:18 ` [PULL 28/51] KVM: PPC: Book3S HV: Better handling of exceptions that happen in real mode Alexander Graf
2013-10-31 21:18 ` [PULL 29/51] powerpc: book3e: _PAGE_LENDIAN must be _PAGE_ENDIAN Alexander Graf
2013-10-31 21:18 ` [PULL 30/51] kvm: powerpc: allow guest control "E" attribute in mas2 Alexander Graf
2013-10-31 21:18 ` [PULL 31/51] kvm: powerpc: allow guest control "G" " Alexander Graf
2013-10-31 21:18 ` [PULL 32/51] kvm: powerpc: e500: mark page accessed when mapping a guest page Alexander Graf
2013-10-31 21:18 ` [PULL 33/51] powerpc: remove unnecessary line continuations Alexander Graf
2013-10-31 21:18 ` [PULL 34/51] powerpc: move debug registers in a structure Alexander Graf
2013-11-03 14:30   ` Gleb Natapov
2013-11-03 20:56     ` Benjamin Herrenschmidt
2013-11-04  0:03       ` Scott Wood
2013-11-04  6:43         ` Alexander Graf
2013-11-04  6:51           ` Benjamin Herrenschmidt
2013-10-31 21:18 ` [PULL 35/51] powerpc: export debug registers save function for KVM Alexander Graf
2013-10-31 21:18 ` [PULL 36/51] KVM: PPC: E500: exit to user space on "ehpriv 1" instruction Alexander Graf
2013-10-31 21:18 ` [PULL 37/51] KVM: PPC: E500: Using "struct debug_reg" Alexander Graf
2013-10-31 21:18 ` [PULL 38/51] KVM: PPC: E500: Add userspace debug stub support Alexander Graf
2013-10-31 21:18 ` [PULL 39/51] kvm: powerpc: book3s: remove kvmppc_handler_highmem label Alexander Graf
2013-10-31 21:18 ` [PULL 40/51] kvm: powerpc: book3s: move book3s_64_vio_hv.c into the main kernel binary Alexander Graf
2013-10-31 21:18 ` [PULL 41/51] kvm: powerpc: book3s: pr: Rename KVM_BOOK3S_PR to KVM_BOOK3S_PR_POSSIBLE Alexander Graf
2013-10-31 21:18 ` [PULL 42/51] kvm: powerpc: book3s: Add a new config variable CONFIG_KVM_BOOK3S_HV_POSSIBLE Alexander Graf
2013-10-31 21:18 ` [PULL 43/51] kvm: powerpc: Add kvmppc_ops callback Alexander Graf
2013-10-31 21:18 ` [PULL 44/51] kvm: powerpc: book3s: Cleanup interrupt handling code Alexander Graf
2013-10-31 21:18 ` [PULL 45/51] kvm: powerpc: book3s: Add is_hv_enabled to kvmppc_ops Alexander Graf
2013-10-31 21:18 ` [PULL 46/51] kvm: powerpc: book3s: pr: move PR related tracepoints to a separate header Alexander Graf
2013-10-31 21:18 ` [PULL 47/51] kvm: powerpc: booke: Move booke related tracepoints to " Alexander Graf
2013-10-31 21:18 ` [PULL 48/51] kvm: powerpc: book3s: Support building HV and PR KVM as module Alexander Graf
2013-10-31 21:18 ` [PULL 49/51] kvm: Add struct kvm arg to memslot APIs Alexander Graf
2013-10-31 21:18 ` [PULL 50/51] kvm: powerpc: book3s: Allow the HV and PR selection per virtual machine Alexander Graf
2013-10-31 21:18 ` [PULL 51/51] kvm: powerpc: book3s: drop is_hv_enabled Alexander Graf

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